Macros
#define	vaadd_vv_i16m1(...) __riscv_vaadd_vv_i16m1(__VA_ARGS__)

#define	vaadd_vv_i16m1_m(...) __riscv_vaadd_vv_i16m1_tumu(__VA_ARGS__)

#define	vaadd_vv_i16m2(...) __riscv_vaadd_vv_i16m2(__VA_ARGS__)

#define	vaadd_vv_i16m2_m(...) __riscv_vaadd_vv_i16m2_tumu(__VA_ARGS__)

#define	vaadd_vv_i16m4(...) __riscv_vaadd_vv_i16m4(__VA_ARGS__)

#define	vaadd_vv_i16m4_m(...) __riscv_vaadd_vv_i16m4_tumu(__VA_ARGS__)

#define	vaadd_vv_i16m8(...) __riscv_vaadd_vv_i16m8(__VA_ARGS__)

#define	vaadd_vv_i16m8_m(...) __riscv_vaadd_vv_i16m8_tumu(__VA_ARGS__)

#define	vaadd_vv_i16mf2(...) __riscv_vaadd_vv_i16mf2(__VA_ARGS__)

#define	vaadd_vv_i16mf2_m(...) __riscv_vaadd_vv_i16mf2_tumu(__VA_ARGS__)

#define	vaadd_vv_i16mf4(...) __riscv_vaadd_vv_i16mf4(__VA_ARGS__)

#define	vaadd_vv_i16mf4_m(...) __riscv_vaadd_vv_i16mf4_tumu(__VA_ARGS__)

#define	vaadd_vv_i32m1(...) __riscv_vaadd_vv_i32m1(__VA_ARGS__)

#define	vaadd_vv_i32m1_m(...) __riscv_vaadd_vv_i32m1_tumu(__VA_ARGS__)

#define	vaadd_vv_i32m2(...) __riscv_vaadd_vv_i32m2(__VA_ARGS__)

#define	vaadd_vv_i32m2_m(...) __riscv_vaadd_vv_i32m2_tumu(__VA_ARGS__)

#define	vaadd_vv_i32m4(...) __riscv_vaadd_vv_i32m4(__VA_ARGS__)

#define	vaadd_vv_i32m4_m(...) __riscv_vaadd_vv_i32m4_tumu(__VA_ARGS__)

#define	vaadd_vv_i32m8(...) __riscv_vaadd_vv_i32m8(__VA_ARGS__)

#define	vaadd_vv_i32m8_m(...) __riscv_vaadd_vv_i32m8_tumu(__VA_ARGS__)

#define	vaadd_vv_i32mf2(...) __riscv_vaadd_vv_i32mf2(__VA_ARGS__)

#define	vaadd_vv_i32mf2_m(...) __riscv_vaadd_vv_i32mf2_tumu(__VA_ARGS__)

#define	vaadd_vv_i64m1(...) __riscv_vaadd_vv_i64m1(__VA_ARGS__)

#define	vaadd_vv_i64m1_m(...) __riscv_vaadd_vv_i64m1_tumu(__VA_ARGS__)

#define	vaadd_vv_i64m2(...) __riscv_vaadd_vv_i64m2(__VA_ARGS__)

#define	vaadd_vv_i64m2_m(...) __riscv_vaadd_vv_i64m2_tumu(__VA_ARGS__)

#define	vaadd_vv_i64m4(...) __riscv_vaadd_vv_i64m4(__VA_ARGS__)

#define	vaadd_vv_i64m4_m(...) __riscv_vaadd_vv_i64m4_tumu(__VA_ARGS__)

#define	vaadd_vv_i64m8(...) __riscv_vaadd_vv_i64m8(__VA_ARGS__)

#define	vaadd_vv_i64m8_m(...) __riscv_vaadd_vv_i64m8_tumu(__VA_ARGS__)

#define	vaadd_vv_i8m1(...) __riscv_vaadd_vv_i8m1(__VA_ARGS__)

#define	vaadd_vv_i8m1_m(...) __riscv_vaadd_vv_i8m1_tumu(__VA_ARGS__)

#define	vaadd_vv_i8m2(...) __riscv_vaadd_vv_i8m2(__VA_ARGS__)

#define	vaadd_vv_i8m2_m(...) __riscv_vaadd_vv_i8m2_tumu(__VA_ARGS__)

#define	vaadd_vv_i8m4(...) __riscv_vaadd_vv_i8m4(__VA_ARGS__)

#define	vaadd_vv_i8m4_m(...) __riscv_vaadd_vv_i8m4_tumu(__VA_ARGS__)

#define	vaadd_vv_i8m8(...) __riscv_vaadd_vv_i8m8(__VA_ARGS__)

#define	vaadd_vv_i8m8_m(...) __riscv_vaadd_vv_i8m8_tumu(__VA_ARGS__)

#define	vaadd_vv_i8mf2(...) __riscv_vaadd_vv_i8mf2(__VA_ARGS__)

#define	vaadd_vv_i8mf2_m(...) __riscv_vaadd_vv_i8mf2_tumu(__VA_ARGS__)

#define	vaadd_vv_i8mf4(...) __riscv_vaadd_vv_i8mf4(__VA_ARGS__)

#define	vaadd_vv_i8mf4_m(...) __riscv_vaadd_vv_i8mf4_tumu(__VA_ARGS__)

#define	vaadd_vv_i8mf8(...) __riscv_vaadd_vv_i8mf8(__VA_ARGS__)

#define	vaadd_vv_i8mf8_m(...) __riscv_vaadd_vv_i8mf8_tumu(__VA_ARGS__)

#define	vaadd_vx_i16m1(...) __riscv_vaadd_vx_i16m1(__VA_ARGS__)

#define	vaadd_vx_i16m1_m(...) __riscv_vaadd_vx_i16m1_tumu(__VA_ARGS__)

#define	vaadd_vx_i16m2(...) __riscv_vaadd_vx_i16m2(__VA_ARGS__)

#define	vaadd_vx_i16m2_m(...) __riscv_vaadd_vx_i16m2_tumu(__VA_ARGS__)

#define	vaadd_vx_i16m4(...) __riscv_vaadd_vx_i16m4(__VA_ARGS__)

#define	vaadd_vx_i16m4_m(...) __riscv_vaadd_vx_i16m4_tumu(__VA_ARGS__)

#define	vaadd_vx_i16m8(...) __riscv_vaadd_vx_i16m8(__VA_ARGS__)

#define	vaadd_vx_i16m8_m(...) __riscv_vaadd_vx_i16m8_tumu(__VA_ARGS__)

#define	vaadd_vx_i16mf2(...) __riscv_vaadd_vx_i16mf2(__VA_ARGS__)

#define	vaadd_vx_i16mf2_m(...) __riscv_vaadd_vx_i16mf2_tumu(__VA_ARGS__)

#define	vaadd_vx_i16mf4(...) __riscv_vaadd_vx_i16mf4(__VA_ARGS__)

#define	vaadd_vx_i16mf4_m(...) __riscv_vaadd_vx_i16mf4_tumu(__VA_ARGS__)

#define	vaadd_vx_i32m1(...) __riscv_vaadd_vx_i32m1(__VA_ARGS__)

#define	vaadd_vx_i32m1_m(...) __riscv_vaadd_vx_i32m1_tumu(__VA_ARGS__)

#define	vaadd_vx_i32m2(...) __riscv_vaadd_vx_i32m2(__VA_ARGS__)

#define	vaadd_vx_i32m2_m(...) __riscv_vaadd_vx_i32m2_tumu(__VA_ARGS__)

#define	vaadd_vx_i32m4(...) __riscv_vaadd_vx_i32m4(__VA_ARGS__)

#define	vaadd_vx_i32m4_m(...) __riscv_vaadd_vx_i32m4_tumu(__VA_ARGS__)

#define	vaadd_vx_i32m8(...) __riscv_vaadd_vx_i32m8(__VA_ARGS__)

#define	vaadd_vx_i32m8_m(...) __riscv_vaadd_vx_i32m8_tumu(__VA_ARGS__)

#define	vaadd_vx_i32mf2(...) __riscv_vaadd_vx_i32mf2(__VA_ARGS__)

#define	vaadd_vx_i32mf2_m(...) __riscv_vaadd_vx_i32mf2_tumu(__VA_ARGS__)

#define	vaadd_vx_i64m1(...) __riscv_vaadd_vx_i64m1(__VA_ARGS__)

#define	vaadd_vx_i64m1_m(...) __riscv_vaadd_vx_i64m1_tumu(__VA_ARGS__)

#define	vaadd_vx_i64m2(...) __riscv_vaadd_vx_i64m2(__VA_ARGS__)

#define	vaadd_vx_i64m2_m(...) __riscv_vaadd_vx_i64m2_tumu(__VA_ARGS__)

#define	vaadd_vx_i64m4(...) __riscv_vaadd_vx_i64m4(__VA_ARGS__)

#define	vaadd_vx_i64m4_m(...) __riscv_vaadd_vx_i64m4_tumu(__VA_ARGS__)

#define	vaadd_vx_i64m8(...) __riscv_vaadd_vx_i64m8(__VA_ARGS__)

#define	vaadd_vx_i64m8_m(...) __riscv_vaadd_vx_i64m8_tumu(__VA_ARGS__)

#define	vaadd_vx_i8m1(...) __riscv_vaadd_vx_i8m1(__VA_ARGS__)

#define	vaadd_vx_i8m1_m(...) __riscv_vaadd_vx_i8m1_tumu(__VA_ARGS__)

#define	vaadd_vx_i8m2(...) __riscv_vaadd_vx_i8m2(__VA_ARGS__)

#define	vaadd_vx_i8m2_m(...) __riscv_vaadd_vx_i8m2_tumu(__VA_ARGS__)

#define	vaadd_vx_i8m4(...) __riscv_vaadd_vx_i8m4(__VA_ARGS__)

#define	vaadd_vx_i8m4_m(...) __riscv_vaadd_vx_i8m4_tumu(__VA_ARGS__)

#define	vaadd_vx_i8m8(...) __riscv_vaadd_vx_i8m8(__VA_ARGS__)

#define	vaadd_vx_i8m8_m(...) __riscv_vaadd_vx_i8m8_tumu(__VA_ARGS__)

#define	vaadd_vx_i8mf2(...) __riscv_vaadd_vx_i8mf2(__VA_ARGS__)

#define	vaadd_vx_i8mf2_m(...) __riscv_vaadd_vx_i8mf2_tumu(__VA_ARGS__)

#define	vaadd_vx_i8mf4(...) __riscv_vaadd_vx_i8mf4(__VA_ARGS__)

#define	vaadd_vx_i8mf4_m(...) __riscv_vaadd_vx_i8mf4_tumu(__VA_ARGS__)

#define	vaadd_vx_i8mf8(...) __riscv_vaadd_vx_i8mf8(__VA_ARGS__)

#define	vaadd_vx_i8mf8_m(...) __riscv_vaadd_vx_i8mf8_tumu(__VA_ARGS__)

#define	vaaddu_vv_u16m1(...) __riscv_vaaddu_vv_u16m1(__VA_ARGS__)

#define	vaaddu_vv_u16m1_m(...) __riscv_vaaddu_vv_u16m1_tumu(__VA_ARGS__)

#define	vaaddu_vv_u16m2(...) __riscv_vaaddu_vv_u16m2(__VA_ARGS__)

#define	vaaddu_vv_u16m2_m(...) __riscv_vaaddu_vv_u16m2_tumu(__VA_ARGS__)

#define	vaaddu_vv_u16m4(...) __riscv_vaaddu_vv_u16m4(__VA_ARGS__)

#define	vaaddu_vv_u16m4_m(...) __riscv_vaaddu_vv_u16m4_tumu(__VA_ARGS__)

#define	vaaddu_vv_u16m8(...) __riscv_vaaddu_vv_u16m8(__VA_ARGS__)

#define	vaaddu_vv_u16m8_m(...) __riscv_vaaddu_vv_u16m8_tumu(__VA_ARGS__)

#define	vaaddu_vv_u16mf2(...) __riscv_vaaddu_vv_u16mf2(__VA_ARGS__)

#define	vaaddu_vv_u16mf2_m(...) __riscv_vaaddu_vv_u16mf2_tumu(__VA_ARGS__)

#define	vaaddu_vv_u16mf4(...) __riscv_vaaddu_vv_u16mf4(__VA_ARGS__)

#define	vaaddu_vv_u16mf4_m(...) __riscv_vaaddu_vv_u16mf4_tumu(__VA_ARGS__)

#define	vaaddu_vv_u32m1(...) __riscv_vaaddu_vv_u32m1(__VA_ARGS__)

#define	vaaddu_vv_u32m1_m(...) __riscv_vaaddu_vv_u32m1_tumu(__VA_ARGS__)

#define	vaaddu_vv_u32m2(...) __riscv_vaaddu_vv_u32m2(__VA_ARGS__)

#define	vaaddu_vv_u32m2_m(...) __riscv_vaaddu_vv_u32m2_tumu(__VA_ARGS__)

#define	vaaddu_vv_u32m4(...) __riscv_vaaddu_vv_u32m4(__VA_ARGS__)

#define	vaaddu_vv_u32m4_m(...) __riscv_vaaddu_vv_u32m4_tumu(__VA_ARGS__)

#define	vaaddu_vv_u32m8(...) __riscv_vaaddu_vv_u32m8(__VA_ARGS__)

#define	vaaddu_vv_u32m8_m(...) __riscv_vaaddu_vv_u32m8_tumu(__VA_ARGS__)

#define	vaaddu_vv_u32mf2(...) __riscv_vaaddu_vv_u32mf2(__VA_ARGS__)

#define	vaaddu_vv_u32mf2_m(...) __riscv_vaaddu_vv_u32mf2_tumu(__VA_ARGS__)

#define	vaaddu_vv_u64m1(...) __riscv_vaaddu_vv_u64m1(__VA_ARGS__)

#define	vaaddu_vv_u64m1_m(...) __riscv_vaaddu_vv_u64m1_tumu(__VA_ARGS__)

#define	vaaddu_vv_u64m2(...) __riscv_vaaddu_vv_u64m2(__VA_ARGS__)

#define	vaaddu_vv_u64m2_m(...) __riscv_vaaddu_vv_u64m2_tumu(__VA_ARGS__)

#define	vaaddu_vv_u64m4(...) __riscv_vaaddu_vv_u64m4(__VA_ARGS__)

#define	vaaddu_vv_u64m4_m(...) __riscv_vaaddu_vv_u64m4_tumu(__VA_ARGS__)

#define	vaaddu_vv_u64m8(...) __riscv_vaaddu_vv_u64m8(__VA_ARGS__)

#define	vaaddu_vv_u64m8_m(...) __riscv_vaaddu_vv_u64m8_tumu(__VA_ARGS__)

#define	vaaddu_vv_u8m1(...) __riscv_vaaddu_vv_u8m1(__VA_ARGS__)

#define	vaaddu_vv_u8m1_m(...) __riscv_vaaddu_vv_u8m1_tumu(__VA_ARGS__)

#define	vaaddu_vv_u8m2(...) __riscv_vaaddu_vv_u8m2(__VA_ARGS__)

#define	vaaddu_vv_u8m2_m(...) __riscv_vaaddu_vv_u8m2_tumu(__VA_ARGS__)

#define	vaaddu_vv_u8m4(...) __riscv_vaaddu_vv_u8m4(__VA_ARGS__)

#define	vaaddu_vv_u8m4_m(...) __riscv_vaaddu_vv_u8m4_tumu(__VA_ARGS__)

#define	vaaddu_vv_u8m8(...) __riscv_vaaddu_vv_u8m8(__VA_ARGS__)

#define	vaaddu_vv_u8m8_m(...) __riscv_vaaddu_vv_u8m8_tumu(__VA_ARGS__)

#define	vaaddu_vv_u8mf2(...) __riscv_vaaddu_vv_u8mf2(__VA_ARGS__)

#define	vaaddu_vv_u8mf2_m(...) __riscv_vaaddu_vv_u8mf2_tumu(__VA_ARGS__)

#define	vaaddu_vv_u8mf4(...) __riscv_vaaddu_vv_u8mf4(__VA_ARGS__)

#define	vaaddu_vv_u8mf4_m(...) __riscv_vaaddu_vv_u8mf4_tumu(__VA_ARGS__)

#define	vaaddu_vv_u8mf8(...) __riscv_vaaddu_vv_u8mf8(__VA_ARGS__)

#define	vaaddu_vv_u8mf8_m(...) __riscv_vaaddu_vv_u8mf8_tumu(__VA_ARGS__)

#define	vaaddu_vx_u16m1(...) __riscv_vaaddu_vx_u16m1(__VA_ARGS__)

#define	vaaddu_vx_u16m1_m(...) __riscv_vaaddu_vx_u16m1_tumu(__VA_ARGS__)

#define	vaaddu_vx_u16m2(...) __riscv_vaaddu_vx_u16m2(__VA_ARGS__)

#define	vaaddu_vx_u16m2_m(...) __riscv_vaaddu_vx_u16m2_tumu(__VA_ARGS__)

#define	vaaddu_vx_u16m4(...) __riscv_vaaddu_vx_u16m4(__VA_ARGS__)

#define	vaaddu_vx_u16m4_m(...) __riscv_vaaddu_vx_u16m4_tumu(__VA_ARGS__)

#define	vaaddu_vx_u16m8(...) __riscv_vaaddu_vx_u16m8(__VA_ARGS__)

#define	vaaddu_vx_u16m8_m(...) __riscv_vaaddu_vx_u16m8_tumu(__VA_ARGS__)

#define	vaaddu_vx_u16mf2(...) __riscv_vaaddu_vx_u16mf2(__VA_ARGS__)

#define	vaaddu_vx_u16mf2_m(...) __riscv_vaaddu_vx_u16mf2_tumu(__VA_ARGS__)

#define	vaaddu_vx_u16mf4(...) __riscv_vaaddu_vx_u16mf4(__VA_ARGS__)

#define	vaaddu_vx_u16mf4_m(...) __riscv_vaaddu_vx_u16mf4_tumu(__VA_ARGS__)

#define	vaaddu_vx_u32m1(...) __riscv_vaaddu_vx_u32m1(__VA_ARGS__)

#define	vaaddu_vx_u32m1_m(...) __riscv_vaaddu_vx_u32m1_tumu(__VA_ARGS__)

#define	vaaddu_vx_u32m2(...) __riscv_vaaddu_vx_u32m2(__VA_ARGS__)

#define	vaaddu_vx_u32m2_m(...) __riscv_vaaddu_vx_u32m2_tumu(__VA_ARGS__)

#define	vaaddu_vx_u32m4(...) __riscv_vaaddu_vx_u32m4(__VA_ARGS__)

#define	vaaddu_vx_u32m4_m(...) __riscv_vaaddu_vx_u32m4_tumu(__VA_ARGS__)

#define	vaaddu_vx_u32m8(...) __riscv_vaaddu_vx_u32m8(__VA_ARGS__)

#define	vaaddu_vx_u32m8_m(...) __riscv_vaaddu_vx_u32m8_tumu(__VA_ARGS__)

#define	vaaddu_vx_u32mf2(...) __riscv_vaaddu_vx_u32mf2(__VA_ARGS__)

#define	vaaddu_vx_u32mf2_m(...) __riscv_vaaddu_vx_u32mf2_tumu(__VA_ARGS__)

#define	vaaddu_vx_u64m1(...) __riscv_vaaddu_vx_u64m1(__VA_ARGS__)

#define	vaaddu_vx_u64m1_m(...) __riscv_vaaddu_vx_u64m1_tumu(__VA_ARGS__)

#define	vaaddu_vx_u64m2(...) __riscv_vaaddu_vx_u64m2(__VA_ARGS__)

#define	vaaddu_vx_u64m2_m(...) __riscv_vaaddu_vx_u64m2_tumu(__VA_ARGS__)

#define	vaaddu_vx_u64m4(...) __riscv_vaaddu_vx_u64m4(__VA_ARGS__)

#define	vaaddu_vx_u64m4_m(...) __riscv_vaaddu_vx_u64m4_tumu(__VA_ARGS__)

#define	vaaddu_vx_u64m8(...) __riscv_vaaddu_vx_u64m8(__VA_ARGS__)

#define	vaaddu_vx_u64m8_m(...) __riscv_vaaddu_vx_u64m8_tumu(__VA_ARGS__)

#define	vaaddu_vx_u8m1(...) __riscv_vaaddu_vx_u8m1(__VA_ARGS__)

#define	vaaddu_vx_u8m1_m(...) __riscv_vaaddu_vx_u8m1_tumu(__VA_ARGS__)

#define	vaaddu_vx_u8m2(...) __riscv_vaaddu_vx_u8m2(__VA_ARGS__)

#define	vaaddu_vx_u8m2_m(...) __riscv_vaaddu_vx_u8m2_tumu(__VA_ARGS__)

#define	vaaddu_vx_u8m4(...) __riscv_vaaddu_vx_u8m4(__VA_ARGS__)

#define	vaaddu_vx_u8m4_m(...) __riscv_vaaddu_vx_u8m4_tumu(__VA_ARGS__)

#define	vaaddu_vx_u8m8(...) __riscv_vaaddu_vx_u8m8(__VA_ARGS__)

#define	vaaddu_vx_u8m8_m(...) __riscv_vaaddu_vx_u8m8_tumu(__VA_ARGS__)

#define	vaaddu_vx_u8mf2(...) __riscv_vaaddu_vx_u8mf2(__VA_ARGS__)

#define	vaaddu_vx_u8mf2_m(...) __riscv_vaaddu_vx_u8mf2_tumu(__VA_ARGS__)

#define	vaaddu_vx_u8mf4(...) __riscv_vaaddu_vx_u8mf4(__VA_ARGS__)

#define	vaaddu_vx_u8mf4_m(...) __riscv_vaaddu_vx_u8mf4_tumu(__VA_ARGS__)

#define	vaaddu_vx_u8mf8(...) __riscv_vaaddu_vx_u8mf8(__VA_ARGS__)

#define	vaaddu_vx_u8mf8_m(...) __riscv_vaaddu_vx_u8mf8_tumu(__VA_ARGS__)

#define	vadc_vvm_i16m1(...) __riscv_vadc_vvm_i16m1(__VA_ARGS__)

#define	vadc_vvm_i16m2(...) __riscv_vadc_vvm_i16m2(__VA_ARGS__)

#define	vadc_vvm_i16m4(...) __riscv_vadc_vvm_i16m4(__VA_ARGS__)

#define	vadc_vvm_i16m8(...) __riscv_vadc_vvm_i16m8(__VA_ARGS__)

#define	vadc_vvm_i16mf2(...) __riscv_vadc_vvm_i16mf2(__VA_ARGS__)

#define	vadc_vvm_i16mf4(...) __riscv_vadc_vvm_i16mf4(__VA_ARGS__)

#define	vadc_vvm_i32m1(...) __riscv_vadc_vvm_i32m1(__VA_ARGS__)

#define	vadc_vvm_i32m2(...) __riscv_vadc_vvm_i32m2(__VA_ARGS__)

#define	vadc_vvm_i32m4(...) __riscv_vadc_vvm_i32m4(__VA_ARGS__)

#define	vadc_vvm_i32m8(...) __riscv_vadc_vvm_i32m8(__VA_ARGS__)

#define	vadc_vvm_i32mf2(...) __riscv_vadc_vvm_i32mf2(__VA_ARGS__)

#define	vadc_vvm_i64m1(...) __riscv_vadc_vvm_i64m1(__VA_ARGS__)

#define	vadc_vvm_i64m2(...) __riscv_vadc_vvm_i64m2(__VA_ARGS__)

#define	vadc_vvm_i64m4(...) __riscv_vadc_vvm_i64m4(__VA_ARGS__)

#define	vadc_vvm_i64m8(...) __riscv_vadc_vvm_i64m8(__VA_ARGS__)

#define	vadc_vvm_i8m1(...) __riscv_vadc_vvm_i8m1(__VA_ARGS__)

#define	vadc_vvm_i8m2(...) __riscv_vadc_vvm_i8m2(__VA_ARGS__)

#define	vadc_vvm_i8m4(...) __riscv_vadc_vvm_i8m4(__VA_ARGS__)

#define	vadc_vvm_i8m8(...) __riscv_vadc_vvm_i8m8(__VA_ARGS__)

#define	vadc_vvm_i8mf2(...) __riscv_vadc_vvm_i8mf2(__VA_ARGS__)

#define	vadc_vvm_i8mf4(...) __riscv_vadc_vvm_i8mf4(__VA_ARGS__)

#define	vadc_vvm_i8mf8(...) __riscv_vadc_vvm_i8mf8(__VA_ARGS__)

#define	vadc_vvm_u16m1(...) __riscv_vadc_vvm_u16m1(__VA_ARGS__)

#define	vadc_vvm_u16m2(...) __riscv_vadc_vvm_u16m2(__VA_ARGS__)

#define	vadc_vvm_u16m4(...) __riscv_vadc_vvm_u16m4(__VA_ARGS__)

#define	vadc_vvm_u16m8(...) __riscv_vadc_vvm_u16m8(__VA_ARGS__)

#define	vadc_vvm_u16mf2(...) __riscv_vadc_vvm_u16mf2(__VA_ARGS__)

#define	vadc_vvm_u16mf4(...) __riscv_vadc_vvm_u16mf4(__VA_ARGS__)

#define	vadc_vvm_u32m1(...) __riscv_vadc_vvm_u32m1(__VA_ARGS__)

#define	vadc_vvm_u32m2(...) __riscv_vadc_vvm_u32m2(__VA_ARGS__)

#define	vadc_vvm_u32m4(...) __riscv_vadc_vvm_u32m4(__VA_ARGS__)

#define	vadc_vvm_u32m8(...) __riscv_vadc_vvm_u32m8(__VA_ARGS__)

#define	vadc_vvm_u32mf2(...) __riscv_vadc_vvm_u32mf2(__VA_ARGS__)

#define	vadc_vvm_u64m1(...) __riscv_vadc_vvm_u64m1(__VA_ARGS__)

#define	vadc_vvm_u64m2(...) __riscv_vadc_vvm_u64m2(__VA_ARGS__)

#define	vadc_vvm_u64m4(...) __riscv_vadc_vvm_u64m4(__VA_ARGS__)

#define	vadc_vvm_u64m8(...) __riscv_vadc_vvm_u64m8(__VA_ARGS__)

#define	vadc_vvm_u8m1(...) __riscv_vadc_vvm_u8m1(__VA_ARGS__)

#define	vadc_vvm_u8m2(...) __riscv_vadc_vvm_u8m2(__VA_ARGS__)

#define	vadc_vvm_u8m4(...) __riscv_vadc_vvm_u8m4(__VA_ARGS__)

#define	vadc_vvm_u8m8(...) __riscv_vadc_vvm_u8m8(__VA_ARGS__)

#define	vadc_vvm_u8mf2(...) __riscv_vadc_vvm_u8mf2(__VA_ARGS__)

#define	vadc_vvm_u8mf4(...) __riscv_vadc_vvm_u8mf4(__VA_ARGS__)

#define	vadc_vvm_u8mf8(...) __riscv_vadc_vvm_u8mf8(__VA_ARGS__)

#define	vadc_vxm_i16m1(...) __riscv_vadc_vxm_i16m1(__VA_ARGS__)

#define	vadc_vxm_i16m2(...) __riscv_vadc_vxm_i16m2(__VA_ARGS__)

#define	vadc_vxm_i16m4(...) __riscv_vadc_vxm_i16m4(__VA_ARGS__)

#define	vadc_vxm_i16m8(...) __riscv_vadc_vxm_i16m8(__VA_ARGS__)

#define	vadc_vxm_i16mf2(...) __riscv_vadc_vxm_i16mf2(__VA_ARGS__)

#define	vadc_vxm_i16mf4(...) __riscv_vadc_vxm_i16mf4(__VA_ARGS__)

#define	vadc_vxm_i32m1(...) __riscv_vadc_vxm_i32m1(__VA_ARGS__)

#define	vadc_vxm_i32m2(...) __riscv_vadc_vxm_i32m2(__VA_ARGS__)

#define	vadc_vxm_i32m4(...) __riscv_vadc_vxm_i32m4(__VA_ARGS__)

#define	vadc_vxm_i32m8(...) __riscv_vadc_vxm_i32m8(__VA_ARGS__)

#define	vadc_vxm_i32mf2(...) __riscv_vadc_vxm_i32mf2(__VA_ARGS__)

#define	vadc_vxm_i64m1(...) __riscv_vadc_vxm_i64m1(__VA_ARGS__)

#define	vadc_vxm_i64m2(...) __riscv_vadc_vxm_i64m2(__VA_ARGS__)

#define	vadc_vxm_i64m4(...) __riscv_vadc_vxm_i64m4(__VA_ARGS__)

#define	vadc_vxm_i64m8(...) __riscv_vadc_vxm_i64m8(__VA_ARGS__)

#define	vadc_vxm_i8m1(...) __riscv_vadc_vxm_i8m1(__VA_ARGS__)

#define	vadc_vxm_i8m2(...) __riscv_vadc_vxm_i8m2(__VA_ARGS__)

#define	vadc_vxm_i8m4(...) __riscv_vadc_vxm_i8m4(__VA_ARGS__)

#define	vadc_vxm_i8m8(...) __riscv_vadc_vxm_i8m8(__VA_ARGS__)

#define	vadc_vxm_i8mf2(...) __riscv_vadc_vxm_i8mf2(__VA_ARGS__)

#define	vadc_vxm_i8mf4(...) __riscv_vadc_vxm_i8mf4(__VA_ARGS__)

#define	vadc_vxm_i8mf8(...) __riscv_vadc_vxm_i8mf8(__VA_ARGS__)

#define	vadc_vxm_u16m1(...) __riscv_vadc_vxm_u16m1(__VA_ARGS__)

#define	vadc_vxm_u16m2(...) __riscv_vadc_vxm_u16m2(__VA_ARGS__)

#define	vadc_vxm_u16m4(...) __riscv_vadc_vxm_u16m4(__VA_ARGS__)

#define	vadc_vxm_u16m8(...) __riscv_vadc_vxm_u16m8(__VA_ARGS__)

#define	vadc_vxm_u16mf2(...) __riscv_vadc_vxm_u16mf2(__VA_ARGS__)

#define	vadc_vxm_u16mf4(...) __riscv_vadc_vxm_u16mf4(__VA_ARGS__)

#define	vadc_vxm_u32m1(...) __riscv_vadc_vxm_u32m1(__VA_ARGS__)

#define	vadc_vxm_u32m2(...) __riscv_vadc_vxm_u32m2(__VA_ARGS__)

#define	vadc_vxm_u32m4(...) __riscv_vadc_vxm_u32m4(__VA_ARGS__)

#define	vadc_vxm_u32m8(...) __riscv_vadc_vxm_u32m8(__VA_ARGS__)

#define	vadc_vxm_u32mf2(...) __riscv_vadc_vxm_u32mf2(__VA_ARGS__)

#define	vadc_vxm_u64m1(...) __riscv_vadc_vxm_u64m1(__VA_ARGS__)

#define	vadc_vxm_u64m2(...) __riscv_vadc_vxm_u64m2(__VA_ARGS__)

#define	vadc_vxm_u64m4(...) __riscv_vadc_vxm_u64m4(__VA_ARGS__)

#define	vadc_vxm_u64m8(...) __riscv_vadc_vxm_u64m8(__VA_ARGS__)

#define	vadc_vxm_u8m1(...) __riscv_vadc_vxm_u8m1(__VA_ARGS__)

#define	vadc_vxm_u8m2(...) __riscv_vadc_vxm_u8m2(__VA_ARGS__)

#define	vadc_vxm_u8m4(...) __riscv_vadc_vxm_u8m4(__VA_ARGS__)

#define	vadc_vxm_u8m8(...) __riscv_vadc_vxm_u8m8(__VA_ARGS__)

#define	vadc_vxm_u8mf2(...) __riscv_vadc_vxm_u8mf2(__VA_ARGS__)

#define	vadc_vxm_u8mf4(...) __riscv_vadc_vxm_u8mf4(__VA_ARGS__)

#define	vadc_vxm_u8mf8(...) __riscv_vadc_vxm_u8mf8(__VA_ARGS__)

#define	vadd_vv_i16m1(...) __riscv_vadd_vv_i16m1(__VA_ARGS__)

#define	vadd_vv_i16m1_m(...) __riscv_vadd_vv_i16m1_tumu(__VA_ARGS__)

#define	vadd_vv_i16m2(...) __riscv_vadd_vv_i16m2(__VA_ARGS__)

#define	vadd_vv_i16m2_m(...) __riscv_vadd_vv_i16m2_tumu(__VA_ARGS__)

#define	vadd_vv_i16m4(...) __riscv_vadd_vv_i16m4(__VA_ARGS__)

#define	vadd_vv_i16m4_m(...) __riscv_vadd_vv_i16m4_tumu(__VA_ARGS__)

#define	vadd_vv_i16m8(...) __riscv_vadd_vv_i16m8(__VA_ARGS__)

#define	vadd_vv_i16m8_m(...) __riscv_vadd_vv_i16m8_tumu(__VA_ARGS__)

#define	vadd_vv_i16mf2(...) __riscv_vadd_vv_i16mf2(__VA_ARGS__)

#define	vadd_vv_i16mf2_m(...) __riscv_vadd_vv_i16mf2_tumu(__VA_ARGS__)

#define	vadd_vv_i16mf4(...) __riscv_vadd_vv_i16mf4(__VA_ARGS__)

#define	vadd_vv_i16mf4_m(...) __riscv_vadd_vv_i16mf4_tumu(__VA_ARGS__)

#define	vadd_vv_i32m1(...) __riscv_vadd_vv_i32m1(__VA_ARGS__)

#define	vadd_vv_i32m1_m(...) __riscv_vadd_vv_i32m1_tumu(__VA_ARGS__)

#define	vadd_vv_i32m2(...) __riscv_vadd_vv_i32m2(__VA_ARGS__)

#define	vadd_vv_i32m2_m(...) __riscv_vadd_vv_i32m2_tumu(__VA_ARGS__)

#define	vadd_vv_i32m4(...) __riscv_vadd_vv_i32m4(__VA_ARGS__)

#define	vadd_vv_i32m4_m(...) __riscv_vadd_vv_i32m4_tumu(__VA_ARGS__)

#define	vadd_vv_i32m8(...) __riscv_vadd_vv_i32m8(__VA_ARGS__)

#define	vadd_vv_i32m8_m(...) __riscv_vadd_vv_i32m8_tumu(__VA_ARGS__)

#define	vadd_vv_i32mf2(...) __riscv_vadd_vv_i32mf2(__VA_ARGS__)

#define	vadd_vv_i32mf2_m(...) __riscv_vadd_vv_i32mf2_tumu(__VA_ARGS__)

#define	vadd_vv_i64m1(...) __riscv_vadd_vv_i64m1(__VA_ARGS__)

#define	vadd_vv_i64m1_m(...) __riscv_vadd_vv_i64m1_tumu(__VA_ARGS__)

#define	vadd_vv_i64m2(...) __riscv_vadd_vv_i64m2(__VA_ARGS__)

#define	vadd_vv_i64m2_m(...) __riscv_vadd_vv_i64m2_tumu(__VA_ARGS__)

#define	vadd_vv_i64m4(...) __riscv_vadd_vv_i64m4(__VA_ARGS__)

#define	vadd_vv_i64m4_m(...) __riscv_vadd_vv_i64m4_tumu(__VA_ARGS__)

#define	vadd_vv_i64m8(...) __riscv_vadd_vv_i64m8(__VA_ARGS__)

#define	vadd_vv_i64m8_m(...) __riscv_vadd_vv_i64m8_tumu(__VA_ARGS__)

#define	vadd_vv_i8m1(...) __riscv_vadd_vv_i8m1(__VA_ARGS__)

#define	vadd_vv_i8m1_m(...) __riscv_vadd_vv_i8m1_tumu(__VA_ARGS__)

#define	vadd_vv_i8m2(...) __riscv_vadd_vv_i8m2(__VA_ARGS__)

#define	vadd_vv_i8m2_m(...) __riscv_vadd_vv_i8m2_tumu(__VA_ARGS__)

#define	vadd_vv_i8m4(...) __riscv_vadd_vv_i8m4(__VA_ARGS__)

#define	vadd_vv_i8m4_m(...) __riscv_vadd_vv_i8m4_tumu(__VA_ARGS__)

#define	vadd_vv_i8m8(...) __riscv_vadd_vv_i8m8(__VA_ARGS__)

#define	vadd_vv_i8m8_m(...) __riscv_vadd_vv_i8m8_tumu(__VA_ARGS__)

#define	vadd_vv_i8mf2(...) __riscv_vadd_vv_i8mf2(__VA_ARGS__)

#define	vadd_vv_i8mf2_m(...) __riscv_vadd_vv_i8mf2_tumu(__VA_ARGS__)

#define	vadd_vv_i8mf4(...) __riscv_vadd_vv_i8mf4(__VA_ARGS__)

#define	vadd_vv_i8mf4_m(...) __riscv_vadd_vv_i8mf4_tumu(__VA_ARGS__)

#define	vadd_vv_i8mf8(...) __riscv_vadd_vv_i8mf8(__VA_ARGS__)

#define	vadd_vv_i8mf8_m(...) __riscv_vadd_vv_i8mf8_tumu(__VA_ARGS__)

#define	vadd_vv_u16m1(...) __riscv_vadd_vv_u16m1(__VA_ARGS__)

#define	vadd_vv_u16m1_m(...) __riscv_vadd_vv_u16m1_tumu(__VA_ARGS__)

#define	vadd_vv_u16m2(...) __riscv_vadd_vv_u16m2(__VA_ARGS__)

#define	vadd_vv_u16m2_m(...) __riscv_vadd_vv_u16m2_tumu(__VA_ARGS__)

#define	vadd_vv_u16m4(...) __riscv_vadd_vv_u16m4(__VA_ARGS__)

#define	vadd_vv_u16m4_m(...) __riscv_vadd_vv_u16m4_tumu(__VA_ARGS__)

#define	vadd_vv_u16m8(...) __riscv_vadd_vv_u16m8(__VA_ARGS__)

#define	vadd_vv_u16m8_m(...) __riscv_vadd_vv_u16m8_tumu(__VA_ARGS__)

#define	vadd_vv_u16mf2(...) __riscv_vadd_vv_u16mf2(__VA_ARGS__)

#define	vadd_vv_u16mf2_m(...) __riscv_vadd_vv_u16mf2_tumu(__VA_ARGS__)

#define	vadd_vv_u16mf4(...) __riscv_vadd_vv_u16mf4(__VA_ARGS__)

#define	vadd_vv_u16mf4_m(...) __riscv_vadd_vv_u16mf4_tumu(__VA_ARGS__)

#define	vadd_vv_u32m1(...) __riscv_vadd_vv_u32m1(__VA_ARGS__)

#define	vadd_vv_u32m1_m(...) __riscv_vadd_vv_u32m1_tumu(__VA_ARGS__)

#define	vadd_vv_u32m2(...) __riscv_vadd_vv_u32m2(__VA_ARGS__)

#define	vadd_vv_u32m2_m(...) __riscv_vadd_vv_u32m2_tumu(__VA_ARGS__)

#define	vadd_vv_u32m4(...) __riscv_vadd_vv_u32m4(__VA_ARGS__)

#define	vadd_vv_u32m4_m(...) __riscv_vadd_vv_u32m4_tumu(__VA_ARGS__)

#define	vadd_vv_u32m8(...) __riscv_vadd_vv_u32m8(__VA_ARGS__)

#define	vadd_vv_u32m8_m(...) __riscv_vadd_vv_u32m8_tumu(__VA_ARGS__)

#define	vadd_vv_u32mf2(...) __riscv_vadd_vv_u32mf2(__VA_ARGS__)

#define	vadd_vv_u32mf2_m(...) __riscv_vadd_vv_u32mf2_tumu(__VA_ARGS__)

#define	vadd_vv_u64m1(...) __riscv_vadd_vv_u64m1(__VA_ARGS__)

#define	vadd_vv_u64m1_m(...) __riscv_vadd_vv_u64m1_tumu(__VA_ARGS__)

#define	vadd_vv_u64m2(...) __riscv_vadd_vv_u64m2(__VA_ARGS__)

#define	vadd_vv_u64m2_m(...) __riscv_vadd_vv_u64m2_tumu(__VA_ARGS__)

#define	vadd_vv_u64m4(...) __riscv_vadd_vv_u64m4(__VA_ARGS__)

#define	vadd_vv_u64m4_m(...) __riscv_vadd_vv_u64m4_tumu(__VA_ARGS__)

#define	vadd_vv_u64m8(...) __riscv_vadd_vv_u64m8(__VA_ARGS__)

#define	vadd_vv_u64m8_m(...) __riscv_vadd_vv_u64m8_tumu(__VA_ARGS__)

#define	vadd_vv_u8m1(...) __riscv_vadd_vv_u8m1(__VA_ARGS__)

#define	vadd_vv_u8m1_m(...) __riscv_vadd_vv_u8m1_tumu(__VA_ARGS__)

#define	vadd_vv_u8m2(...) __riscv_vadd_vv_u8m2(__VA_ARGS__)

#define	vadd_vv_u8m2_m(...) __riscv_vadd_vv_u8m2_tumu(__VA_ARGS__)

#define	vadd_vv_u8m4(...) __riscv_vadd_vv_u8m4(__VA_ARGS__)

#define	vadd_vv_u8m4_m(...) __riscv_vadd_vv_u8m4_tumu(__VA_ARGS__)

#define	vadd_vv_u8m8(...) __riscv_vadd_vv_u8m8(__VA_ARGS__)

#define	vadd_vv_u8m8_m(...) __riscv_vadd_vv_u8m8_tumu(__VA_ARGS__)

#define	vadd_vv_u8mf2(...) __riscv_vadd_vv_u8mf2(__VA_ARGS__)

#define	vadd_vv_u8mf2_m(...) __riscv_vadd_vv_u8mf2_tumu(__VA_ARGS__)

#define	vadd_vv_u8mf4(...) __riscv_vadd_vv_u8mf4(__VA_ARGS__)

#define	vadd_vv_u8mf4_m(...) __riscv_vadd_vv_u8mf4_tumu(__VA_ARGS__)

#define	vadd_vv_u8mf8(...) __riscv_vadd_vv_u8mf8(__VA_ARGS__)

#define	vadd_vv_u8mf8_m(...) __riscv_vadd_vv_u8mf8_tumu(__VA_ARGS__)

#define	vadd_vx_i16m1(...) __riscv_vadd_vx_i16m1(__VA_ARGS__)

#define	vadd_vx_i16m1_m(...) __riscv_vadd_vx_i16m1_tumu(__VA_ARGS__)

#define	vadd_vx_i16m2(...) __riscv_vadd_vx_i16m2(__VA_ARGS__)

#define	vadd_vx_i16m2_m(...) __riscv_vadd_vx_i16m2_tumu(__VA_ARGS__)

#define	vadd_vx_i16m4(...) __riscv_vadd_vx_i16m4(__VA_ARGS__)

#define	vadd_vx_i16m4_m(...) __riscv_vadd_vx_i16m4_tumu(__VA_ARGS__)

#define	vadd_vx_i16m8(...) __riscv_vadd_vx_i16m8(__VA_ARGS__)

#define	vadd_vx_i16m8_m(...) __riscv_vadd_vx_i16m8_tumu(__VA_ARGS__)

#define	vadd_vx_i16mf2(...) __riscv_vadd_vx_i16mf2(__VA_ARGS__)

#define	vadd_vx_i16mf2_m(...) __riscv_vadd_vx_i16mf2_tumu(__VA_ARGS__)

#define	vadd_vx_i16mf4(...) __riscv_vadd_vx_i16mf4(__VA_ARGS__)

#define	vadd_vx_i16mf4_m(...) __riscv_vadd_vx_i16mf4_tumu(__VA_ARGS__)

#define	vadd_vx_i32m1(...) __riscv_vadd_vx_i32m1(__VA_ARGS__)

#define	vadd_vx_i32m1_m(...) __riscv_vadd_vx_i32m1_tumu(__VA_ARGS__)

#define	vadd_vx_i32m2(...) __riscv_vadd_vx_i32m2(__VA_ARGS__)

#define	vadd_vx_i32m2_m(...) __riscv_vadd_vx_i32m2_tumu(__VA_ARGS__)

#define	vadd_vx_i32m4(...) __riscv_vadd_vx_i32m4(__VA_ARGS__)

#define	vadd_vx_i32m4_m(...) __riscv_vadd_vx_i32m4_tumu(__VA_ARGS__)

#define	vadd_vx_i32m8(...) __riscv_vadd_vx_i32m8(__VA_ARGS__)

#define	vadd_vx_i32m8_m(...) __riscv_vadd_vx_i32m8_tumu(__VA_ARGS__)

#define	vadd_vx_i32mf2(...) __riscv_vadd_vx_i32mf2(__VA_ARGS__)

#define	vadd_vx_i32mf2_m(...) __riscv_vadd_vx_i32mf2_tumu(__VA_ARGS__)

#define	vadd_vx_i64m1(...) __riscv_vadd_vx_i64m1(__VA_ARGS__)

#define	vadd_vx_i64m1_m(...) __riscv_vadd_vx_i64m1_tumu(__VA_ARGS__)

#define	vadd_vx_i64m2(...) __riscv_vadd_vx_i64m2(__VA_ARGS__)

#define	vadd_vx_i64m2_m(...) __riscv_vadd_vx_i64m2_tumu(__VA_ARGS__)

#define	vadd_vx_i64m4(...) __riscv_vadd_vx_i64m4(__VA_ARGS__)

#define	vadd_vx_i64m4_m(...) __riscv_vadd_vx_i64m4_tumu(__VA_ARGS__)

#define	vadd_vx_i64m8(...) __riscv_vadd_vx_i64m8(__VA_ARGS__)

#define	vadd_vx_i64m8_m(...) __riscv_vadd_vx_i64m8_tumu(__VA_ARGS__)

#define	vadd_vx_i8m1(...) __riscv_vadd_vx_i8m1(__VA_ARGS__)

#define	vadd_vx_i8m1_m(...) __riscv_vadd_vx_i8m1_tumu(__VA_ARGS__)

#define	vadd_vx_i8m2(...) __riscv_vadd_vx_i8m2(__VA_ARGS__)

#define	vadd_vx_i8m2_m(...) __riscv_vadd_vx_i8m2_tumu(__VA_ARGS__)

#define	vadd_vx_i8m4(...) __riscv_vadd_vx_i8m4(__VA_ARGS__)

#define	vadd_vx_i8m4_m(...) __riscv_vadd_vx_i8m4_tumu(__VA_ARGS__)

#define	vadd_vx_i8m8(...) __riscv_vadd_vx_i8m8(__VA_ARGS__)

#define	vadd_vx_i8m8_m(...) __riscv_vadd_vx_i8m8_tumu(__VA_ARGS__)

#define	vadd_vx_i8mf2(...) __riscv_vadd_vx_i8mf2(__VA_ARGS__)

#define	vadd_vx_i8mf2_m(...) __riscv_vadd_vx_i8mf2_tumu(__VA_ARGS__)

#define	vadd_vx_i8mf4(...) __riscv_vadd_vx_i8mf4(__VA_ARGS__)

#define	vadd_vx_i8mf4_m(...) __riscv_vadd_vx_i8mf4_tumu(__VA_ARGS__)

#define	vadd_vx_i8mf8(...) __riscv_vadd_vx_i8mf8(__VA_ARGS__)

#define	vadd_vx_i8mf8_m(...) __riscv_vadd_vx_i8mf8_tumu(__VA_ARGS__)

#define	vadd_vx_u16m1(...) __riscv_vadd_vx_u16m1(__VA_ARGS__)

#define	vadd_vx_u16m1_m(...) __riscv_vadd_vx_u16m1_tumu(__VA_ARGS__)

#define	vadd_vx_u16m2(...) __riscv_vadd_vx_u16m2(__VA_ARGS__)

#define	vadd_vx_u16m2_m(...) __riscv_vadd_vx_u16m2_tumu(__VA_ARGS__)

#define	vadd_vx_u16m4(...) __riscv_vadd_vx_u16m4(__VA_ARGS__)

#define	vadd_vx_u16m4_m(...) __riscv_vadd_vx_u16m4_tumu(__VA_ARGS__)

#define	vadd_vx_u16m8(...) __riscv_vadd_vx_u16m8(__VA_ARGS__)

#define	vadd_vx_u16m8_m(...) __riscv_vadd_vx_u16m8_tumu(__VA_ARGS__)

#define	vadd_vx_u16mf2(...) __riscv_vadd_vx_u16mf2(__VA_ARGS__)

#define	vadd_vx_u16mf2_m(...) __riscv_vadd_vx_u16mf2_tumu(__VA_ARGS__)

#define	vadd_vx_u16mf4(...) __riscv_vadd_vx_u16mf4(__VA_ARGS__)

#define	vadd_vx_u16mf4_m(...) __riscv_vadd_vx_u16mf4_tumu(__VA_ARGS__)

#define	vadd_vx_u32m1(...) __riscv_vadd_vx_u32m1(__VA_ARGS__)

#define	vadd_vx_u32m1_m(...) __riscv_vadd_vx_u32m1_tumu(__VA_ARGS__)

#define	vadd_vx_u32m2(...) __riscv_vadd_vx_u32m2(__VA_ARGS__)

#define	vadd_vx_u32m2_m(...) __riscv_vadd_vx_u32m2_tumu(__VA_ARGS__)

#define	vadd_vx_u32m4(...) __riscv_vadd_vx_u32m4(__VA_ARGS__)

#define	vadd_vx_u32m4_m(...) __riscv_vadd_vx_u32m4_tumu(__VA_ARGS__)

#define	vadd_vx_u32m8(...) __riscv_vadd_vx_u32m8(__VA_ARGS__)

#define	vadd_vx_u32m8_m(...) __riscv_vadd_vx_u32m8_tumu(__VA_ARGS__)

#define	vadd_vx_u32mf2(...) __riscv_vadd_vx_u32mf2(__VA_ARGS__)

#define	vadd_vx_u32mf2_m(...) __riscv_vadd_vx_u32mf2_tumu(__VA_ARGS__)

#define	vadd_vx_u64m1(...) __riscv_vadd_vx_u64m1(__VA_ARGS__)

#define	vadd_vx_u64m1_m(...) __riscv_vadd_vx_u64m1_tumu(__VA_ARGS__)

#define	vadd_vx_u64m2(...) __riscv_vadd_vx_u64m2(__VA_ARGS__)

#define	vadd_vx_u64m2_m(...) __riscv_vadd_vx_u64m2_tumu(__VA_ARGS__)

#define	vadd_vx_u64m4(...) __riscv_vadd_vx_u64m4(__VA_ARGS__)

#define	vadd_vx_u64m4_m(...) __riscv_vadd_vx_u64m4_tumu(__VA_ARGS__)

#define	vadd_vx_u64m8(...) __riscv_vadd_vx_u64m8(__VA_ARGS__)

#define	vadd_vx_u64m8_m(...) __riscv_vadd_vx_u64m8_tumu(__VA_ARGS__)

#define	vadd_vx_u8m1(...) __riscv_vadd_vx_u8m1(__VA_ARGS__)

#define	vadd_vx_u8m1_m(...) __riscv_vadd_vx_u8m1_tumu(__VA_ARGS__)

#define	vadd_vx_u8m2(...) __riscv_vadd_vx_u8m2(__VA_ARGS__)

#define	vadd_vx_u8m2_m(...) __riscv_vadd_vx_u8m2_tumu(__VA_ARGS__)

#define	vadd_vx_u8m4(...) __riscv_vadd_vx_u8m4(__VA_ARGS__)

#define	vadd_vx_u8m4_m(...) __riscv_vadd_vx_u8m4_tumu(__VA_ARGS__)

#define	vadd_vx_u8m8(...) __riscv_vadd_vx_u8m8(__VA_ARGS__)

#define	vadd_vx_u8m8_m(...) __riscv_vadd_vx_u8m8_tumu(__VA_ARGS__)

#define	vadd_vx_u8mf2(...) __riscv_vadd_vx_u8mf2(__VA_ARGS__)

#define	vadd_vx_u8mf2_m(...) __riscv_vadd_vx_u8mf2_tumu(__VA_ARGS__)

#define	vadd_vx_u8mf4(...) __riscv_vadd_vx_u8mf4(__VA_ARGS__)

#define	vadd_vx_u8mf4_m(...) __riscv_vadd_vx_u8mf4_tumu(__VA_ARGS__)

#define	vadd_vx_u8mf8(...) __riscv_vadd_vx_u8mf8(__VA_ARGS__)

#define	vadd_vx_u8mf8_m(...) __riscv_vadd_vx_u8mf8_tumu(__VA_ARGS__)

#define	vand_vv_i16m1(...) __riscv_vand_vv_i16m1(__VA_ARGS__)

#define	vand_vv_i16m1_m(...) __riscv_vand_vv_i16m1_tumu(__VA_ARGS__)

#define	vand_vv_i16m2(...) __riscv_vand_vv_i16m2(__VA_ARGS__)

#define	vand_vv_i16m2_m(...) __riscv_vand_vv_i16m2_tumu(__VA_ARGS__)

#define	vand_vv_i16m4(...) __riscv_vand_vv_i16m4(__VA_ARGS__)

#define	vand_vv_i16m4_m(...) __riscv_vand_vv_i16m4_tumu(__VA_ARGS__)

#define	vand_vv_i16m8(...) __riscv_vand_vv_i16m8(__VA_ARGS__)

#define	vand_vv_i16m8_m(...) __riscv_vand_vv_i16m8_tumu(__VA_ARGS__)

#define	vand_vv_i16mf2(...) __riscv_vand_vv_i16mf2(__VA_ARGS__)

#define	vand_vv_i16mf2_m(...) __riscv_vand_vv_i16mf2_tumu(__VA_ARGS__)

#define	vand_vv_i16mf4(...) __riscv_vand_vv_i16mf4(__VA_ARGS__)

#define	vand_vv_i16mf4_m(...) __riscv_vand_vv_i16mf4_tumu(__VA_ARGS__)

#define	vand_vv_i32m1(...) __riscv_vand_vv_i32m1(__VA_ARGS__)

#define	vand_vv_i32m1_m(...) __riscv_vand_vv_i32m1_tumu(__VA_ARGS__)

#define	vand_vv_i32m2(...) __riscv_vand_vv_i32m2(__VA_ARGS__)

#define	vand_vv_i32m2_m(...) __riscv_vand_vv_i32m2_tumu(__VA_ARGS__)

#define	vand_vv_i32m4(...) __riscv_vand_vv_i32m4(__VA_ARGS__)

#define	vand_vv_i32m4_m(...) __riscv_vand_vv_i32m4_tumu(__VA_ARGS__)

#define	vand_vv_i32m8(...) __riscv_vand_vv_i32m8(__VA_ARGS__)

#define	vand_vv_i32m8_m(...) __riscv_vand_vv_i32m8_tumu(__VA_ARGS__)

#define	vand_vv_i32mf2(...) __riscv_vand_vv_i32mf2(__VA_ARGS__)

#define	vand_vv_i32mf2_m(...) __riscv_vand_vv_i32mf2_tumu(__VA_ARGS__)

#define	vand_vv_i64m1(...) __riscv_vand_vv_i64m1(__VA_ARGS__)

#define	vand_vv_i64m1_m(...) __riscv_vand_vv_i64m1_tumu(__VA_ARGS__)

#define	vand_vv_i64m2(...) __riscv_vand_vv_i64m2(__VA_ARGS__)

#define	vand_vv_i64m2_m(...) __riscv_vand_vv_i64m2_tumu(__VA_ARGS__)

#define	vand_vv_i64m4(...) __riscv_vand_vv_i64m4(__VA_ARGS__)

#define	vand_vv_i64m4_m(...) __riscv_vand_vv_i64m4_tumu(__VA_ARGS__)

#define	vand_vv_i64m8(...) __riscv_vand_vv_i64m8(__VA_ARGS__)

#define	vand_vv_i64m8_m(...) __riscv_vand_vv_i64m8_tumu(__VA_ARGS__)

#define	vand_vv_i8m1(...) __riscv_vand_vv_i8m1(__VA_ARGS__)

#define	vand_vv_i8m1_m(...) __riscv_vand_vv_i8m1_tumu(__VA_ARGS__)

#define	vand_vv_i8m2(...) __riscv_vand_vv_i8m2(__VA_ARGS__)

#define	vand_vv_i8m2_m(...) __riscv_vand_vv_i8m2_tumu(__VA_ARGS__)

#define	vand_vv_i8m4(...) __riscv_vand_vv_i8m4(__VA_ARGS__)

#define	vand_vv_i8m4_m(...) __riscv_vand_vv_i8m4_tumu(__VA_ARGS__)

#define	vand_vv_i8m8(...) __riscv_vand_vv_i8m8(__VA_ARGS__)

#define	vand_vv_i8m8_m(...) __riscv_vand_vv_i8m8_tumu(__VA_ARGS__)

#define	vand_vv_i8mf2(...) __riscv_vand_vv_i8mf2(__VA_ARGS__)

#define	vand_vv_i8mf2_m(...) __riscv_vand_vv_i8mf2_tumu(__VA_ARGS__)

#define	vand_vv_i8mf4(...) __riscv_vand_vv_i8mf4(__VA_ARGS__)

#define	vand_vv_i8mf4_m(...) __riscv_vand_vv_i8mf4_tumu(__VA_ARGS__)

#define	vand_vv_i8mf8(...) __riscv_vand_vv_i8mf8(__VA_ARGS__)

#define	vand_vv_i8mf8_m(...) __riscv_vand_vv_i8mf8_tumu(__VA_ARGS__)

#define	vand_vv_u16m1(...) __riscv_vand_vv_u16m1(__VA_ARGS__)

#define	vand_vv_u16m1_m(...) __riscv_vand_vv_u16m1_tumu(__VA_ARGS__)

#define	vand_vv_u16m2(...) __riscv_vand_vv_u16m2(__VA_ARGS__)

#define	vand_vv_u16m2_m(...) __riscv_vand_vv_u16m2_tumu(__VA_ARGS__)

#define	vand_vv_u16m4(...) __riscv_vand_vv_u16m4(__VA_ARGS__)

#define	vand_vv_u16m4_m(...) __riscv_vand_vv_u16m4_tumu(__VA_ARGS__)

#define	vand_vv_u16m8(...) __riscv_vand_vv_u16m8(__VA_ARGS__)

#define	vand_vv_u16m8_m(...) __riscv_vand_vv_u16m8_tumu(__VA_ARGS__)

#define	vand_vv_u16mf2(...) __riscv_vand_vv_u16mf2(__VA_ARGS__)

#define	vand_vv_u16mf2_m(...) __riscv_vand_vv_u16mf2_tumu(__VA_ARGS__)

#define	vand_vv_u16mf4(...) __riscv_vand_vv_u16mf4(__VA_ARGS__)

#define	vand_vv_u16mf4_m(...) __riscv_vand_vv_u16mf4_tumu(__VA_ARGS__)

#define	vand_vv_u32m1(...) __riscv_vand_vv_u32m1(__VA_ARGS__)

#define	vand_vv_u32m1_m(...) __riscv_vand_vv_u32m1_tumu(__VA_ARGS__)

#define	vand_vv_u32m2(...) __riscv_vand_vv_u32m2(__VA_ARGS__)

#define	vand_vv_u32m2_m(...) __riscv_vand_vv_u32m2_tumu(__VA_ARGS__)

#define	vand_vv_u32m4(...) __riscv_vand_vv_u32m4(__VA_ARGS__)

#define	vand_vv_u32m4_m(...) __riscv_vand_vv_u32m4_tumu(__VA_ARGS__)

#define	vand_vv_u32m8(...) __riscv_vand_vv_u32m8(__VA_ARGS__)

#define	vand_vv_u32m8_m(...) __riscv_vand_vv_u32m8_tumu(__VA_ARGS__)

#define	vand_vv_u32mf2(...) __riscv_vand_vv_u32mf2(__VA_ARGS__)

#define	vand_vv_u32mf2_m(...) __riscv_vand_vv_u32mf2_tumu(__VA_ARGS__)

#define	vand_vv_u64m1(...) __riscv_vand_vv_u64m1(__VA_ARGS__)

#define	vand_vv_u64m1_m(...) __riscv_vand_vv_u64m1_tumu(__VA_ARGS__)

#define	vand_vv_u64m2(...) __riscv_vand_vv_u64m2(__VA_ARGS__)

#define	vand_vv_u64m2_m(...) __riscv_vand_vv_u64m2_tumu(__VA_ARGS__)

#define	vand_vv_u64m4(...) __riscv_vand_vv_u64m4(__VA_ARGS__)

#define	vand_vv_u64m4_m(...) __riscv_vand_vv_u64m4_tumu(__VA_ARGS__)

#define	vand_vv_u64m8(...) __riscv_vand_vv_u64m8(__VA_ARGS__)

#define	vand_vv_u64m8_m(...) __riscv_vand_vv_u64m8_tumu(__VA_ARGS__)

#define	vand_vv_u8m1(...) __riscv_vand_vv_u8m1(__VA_ARGS__)

#define	vand_vv_u8m1_m(...) __riscv_vand_vv_u8m1_tumu(__VA_ARGS__)

#define	vand_vv_u8m2(...) __riscv_vand_vv_u8m2(__VA_ARGS__)

#define	vand_vv_u8m2_m(...) __riscv_vand_vv_u8m2_tumu(__VA_ARGS__)

#define	vand_vv_u8m4(...) __riscv_vand_vv_u8m4(__VA_ARGS__)

#define	vand_vv_u8m4_m(...) __riscv_vand_vv_u8m4_tumu(__VA_ARGS__)

#define	vand_vv_u8m8(...) __riscv_vand_vv_u8m8(__VA_ARGS__)

#define	vand_vv_u8m8_m(...) __riscv_vand_vv_u8m8_tumu(__VA_ARGS__)

#define	vand_vv_u8mf2(...) __riscv_vand_vv_u8mf2(__VA_ARGS__)

#define	vand_vv_u8mf2_m(...) __riscv_vand_vv_u8mf2_tumu(__VA_ARGS__)

#define	vand_vv_u8mf4(...) __riscv_vand_vv_u8mf4(__VA_ARGS__)

#define	vand_vv_u8mf4_m(...) __riscv_vand_vv_u8mf4_tumu(__VA_ARGS__)

#define	vand_vv_u8mf8(...) __riscv_vand_vv_u8mf8(__VA_ARGS__)

#define	vand_vv_u8mf8_m(...) __riscv_vand_vv_u8mf8_tumu(__VA_ARGS__)

#define	vand_vx_i16m1(...) __riscv_vand_vx_i16m1(__VA_ARGS__)

#define	vand_vx_i16m1_m(...) __riscv_vand_vx_i16m1_tumu(__VA_ARGS__)

#define	vand_vx_i16m2(...) __riscv_vand_vx_i16m2(__VA_ARGS__)

#define	vand_vx_i16m2_m(...) __riscv_vand_vx_i16m2_tumu(__VA_ARGS__)

#define	vand_vx_i16m4(...) __riscv_vand_vx_i16m4(__VA_ARGS__)

#define	vand_vx_i16m4_m(...) __riscv_vand_vx_i16m4_tumu(__VA_ARGS__)

#define	vand_vx_i16m8(...) __riscv_vand_vx_i16m8(__VA_ARGS__)

#define	vand_vx_i16m8_m(...) __riscv_vand_vx_i16m8_tumu(__VA_ARGS__)

#define	vand_vx_i16mf2(...) __riscv_vand_vx_i16mf2(__VA_ARGS__)

#define	vand_vx_i16mf2_m(...) __riscv_vand_vx_i16mf2_tumu(__VA_ARGS__)

#define	vand_vx_i16mf4(...) __riscv_vand_vx_i16mf4(__VA_ARGS__)

#define	vand_vx_i16mf4_m(...) __riscv_vand_vx_i16mf4_tumu(__VA_ARGS__)

#define	vand_vx_i32m1(...) __riscv_vand_vx_i32m1(__VA_ARGS__)

#define	vand_vx_i32m1_m(...) __riscv_vand_vx_i32m1_tumu(__VA_ARGS__)

#define	vand_vx_i32m2(...) __riscv_vand_vx_i32m2(__VA_ARGS__)

#define	vand_vx_i32m2_m(...) __riscv_vand_vx_i32m2_tumu(__VA_ARGS__)

#define	vand_vx_i32m4(...) __riscv_vand_vx_i32m4(__VA_ARGS__)

#define	vand_vx_i32m4_m(...) __riscv_vand_vx_i32m4_tumu(__VA_ARGS__)

#define	vand_vx_i32m8(...) __riscv_vand_vx_i32m8(__VA_ARGS__)

#define	vand_vx_i32m8_m(...) __riscv_vand_vx_i32m8_tumu(__VA_ARGS__)

#define	vand_vx_i32mf2(...) __riscv_vand_vx_i32mf2(__VA_ARGS__)

#define	vand_vx_i32mf2_m(...) __riscv_vand_vx_i32mf2_tumu(__VA_ARGS__)

#define	vand_vx_i64m1(...) __riscv_vand_vx_i64m1(__VA_ARGS__)

#define	vand_vx_i64m1_m(...) __riscv_vand_vx_i64m1_tumu(__VA_ARGS__)

#define	vand_vx_i64m2(...) __riscv_vand_vx_i64m2(__VA_ARGS__)

#define	vand_vx_i64m2_m(...) __riscv_vand_vx_i64m2_tumu(__VA_ARGS__)

#define	vand_vx_i64m4(...) __riscv_vand_vx_i64m4(__VA_ARGS__)

#define	vand_vx_i64m4_m(...) __riscv_vand_vx_i64m4_tumu(__VA_ARGS__)

#define	vand_vx_i64m8(...) __riscv_vand_vx_i64m8(__VA_ARGS__)

#define	vand_vx_i64m8_m(...) __riscv_vand_vx_i64m8_tumu(__VA_ARGS__)

#define	vand_vx_i8m1(...) __riscv_vand_vx_i8m1(__VA_ARGS__)

#define	vand_vx_i8m1_m(...) __riscv_vand_vx_i8m1_tumu(__VA_ARGS__)

#define	vand_vx_i8m2(...) __riscv_vand_vx_i8m2(__VA_ARGS__)

#define	vand_vx_i8m2_m(...) __riscv_vand_vx_i8m2_tumu(__VA_ARGS__)

#define	vand_vx_i8m4(...) __riscv_vand_vx_i8m4(__VA_ARGS__)

#define	vand_vx_i8m4_m(...) __riscv_vand_vx_i8m4_tumu(__VA_ARGS__)

#define	vand_vx_i8m8(...) __riscv_vand_vx_i8m8(__VA_ARGS__)

#define	vand_vx_i8m8_m(...) __riscv_vand_vx_i8m8_tumu(__VA_ARGS__)

#define	vand_vx_i8mf2(...) __riscv_vand_vx_i8mf2(__VA_ARGS__)

#define	vand_vx_i8mf2_m(...) __riscv_vand_vx_i8mf2_tumu(__VA_ARGS__)

#define	vand_vx_i8mf4(...) __riscv_vand_vx_i8mf4(__VA_ARGS__)

#define	vand_vx_i8mf4_m(...) __riscv_vand_vx_i8mf4_tumu(__VA_ARGS__)

#define	vand_vx_i8mf8(...) __riscv_vand_vx_i8mf8(__VA_ARGS__)

#define	vand_vx_i8mf8_m(...) __riscv_vand_vx_i8mf8_tumu(__VA_ARGS__)

#define	vand_vx_u16m1(...) __riscv_vand_vx_u16m1(__VA_ARGS__)

#define	vand_vx_u16m1_m(...) __riscv_vand_vx_u16m1_tumu(__VA_ARGS__)

#define	vand_vx_u16m2(...) __riscv_vand_vx_u16m2(__VA_ARGS__)

#define	vand_vx_u16m2_m(...) __riscv_vand_vx_u16m2_tumu(__VA_ARGS__)

#define	vand_vx_u16m4(...) __riscv_vand_vx_u16m4(__VA_ARGS__)

#define	vand_vx_u16m4_m(...) __riscv_vand_vx_u16m4_tumu(__VA_ARGS__)

#define	vand_vx_u16m8(...) __riscv_vand_vx_u16m8(__VA_ARGS__)

#define	vand_vx_u16m8_m(...) __riscv_vand_vx_u16m8_tumu(__VA_ARGS__)

#define	vand_vx_u16mf2(...) __riscv_vand_vx_u16mf2(__VA_ARGS__)

#define	vand_vx_u16mf2_m(...) __riscv_vand_vx_u16mf2_tumu(__VA_ARGS__)

#define	vand_vx_u16mf4(...) __riscv_vand_vx_u16mf4(__VA_ARGS__)

#define	vand_vx_u16mf4_m(...) __riscv_vand_vx_u16mf4_tumu(__VA_ARGS__)

#define	vand_vx_u32m1(...) __riscv_vand_vx_u32m1(__VA_ARGS__)

#define	vand_vx_u32m1_m(...) __riscv_vand_vx_u32m1_tumu(__VA_ARGS__)

#define	vand_vx_u32m2(...) __riscv_vand_vx_u32m2(__VA_ARGS__)

#define	vand_vx_u32m2_m(...) __riscv_vand_vx_u32m2_tumu(__VA_ARGS__)

#define	vand_vx_u32m4(...) __riscv_vand_vx_u32m4(__VA_ARGS__)

#define	vand_vx_u32m4_m(...) __riscv_vand_vx_u32m4_tumu(__VA_ARGS__)

#define	vand_vx_u32m8(...) __riscv_vand_vx_u32m8(__VA_ARGS__)

#define	vand_vx_u32m8_m(...) __riscv_vand_vx_u32m8_tumu(__VA_ARGS__)

#define	vand_vx_u32mf2(...) __riscv_vand_vx_u32mf2(__VA_ARGS__)

#define	vand_vx_u32mf2_m(...) __riscv_vand_vx_u32mf2_tumu(__VA_ARGS__)

#define	vand_vx_u64m1(...) __riscv_vand_vx_u64m1(__VA_ARGS__)

#define	vand_vx_u64m1_m(...) __riscv_vand_vx_u64m1_tumu(__VA_ARGS__)

#define	vand_vx_u64m2(...) __riscv_vand_vx_u64m2(__VA_ARGS__)

#define	vand_vx_u64m2_m(...) __riscv_vand_vx_u64m2_tumu(__VA_ARGS__)

#define	vand_vx_u64m4(...) __riscv_vand_vx_u64m4(__VA_ARGS__)

#define	vand_vx_u64m4_m(...) __riscv_vand_vx_u64m4_tumu(__VA_ARGS__)

#define	vand_vx_u64m8(...) __riscv_vand_vx_u64m8(__VA_ARGS__)

#define	vand_vx_u64m8_m(...) __riscv_vand_vx_u64m8_tumu(__VA_ARGS__)

#define	vand_vx_u8m1(...) __riscv_vand_vx_u8m1(__VA_ARGS__)

#define	vand_vx_u8m1_m(...) __riscv_vand_vx_u8m1_tumu(__VA_ARGS__)

#define	vand_vx_u8m2(...) __riscv_vand_vx_u8m2(__VA_ARGS__)

#define	vand_vx_u8m2_m(...) __riscv_vand_vx_u8m2_tumu(__VA_ARGS__)

#define	vand_vx_u8m4(...) __riscv_vand_vx_u8m4(__VA_ARGS__)

#define	vand_vx_u8m4_m(...) __riscv_vand_vx_u8m4_tumu(__VA_ARGS__)

#define	vand_vx_u8m8(...) __riscv_vand_vx_u8m8(__VA_ARGS__)

#define	vand_vx_u8m8_m(...) __riscv_vand_vx_u8m8_tumu(__VA_ARGS__)

#define	vand_vx_u8mf2(...) __riscv_vand_vx_u8mf2(__VA_ARGS__)

#define	vand_vx_u8mf2_m(...) __riscv_vand_vx_u8mf2_tumu(__VA_ARGS__)

#define	vand_vx_u8mf4(...) __riscv_vand_vx_u8mf4(__VA_ARGS__)

#define	vand_vx_u8mf4_m(...) __riscv_vand_vx_u8mf4_tumu(__VA_ARGS__)

#define	vand_vx_u8mf8(...) __riscv_vand_vx_u8mf8(__VA_ARGS__)

#define	vand_vx_u8mf8_m(...) __riscv_vand_vx_u8mf8_tumu(__VA_ARGS__)

#define	vasub_vv_i16m1(...) __riscv_vasub_vv_i16m1(__VA_ARGS__)

#define	vasub_vv_i16m1_m(...) __riscv_vasub_vv_i16m1_tumu(__VA_ARGS__)

#define	vasub_vv_i16m2(...) __riscv_vasub_vv_i16m2(__VA_ARGS__)

#define	vasub_vv_i16m2_m(...) __riscv_vasub_vv_i16m2_tumu(__VA_ARGS__)

#define	vasub_vv_i16m4(...) __riscv_vasub_vv_i16m4(__VA_ARGS__)

#define	vasub_vv_i16m4_m(...) __riscv_vasub_vv_i16m4_tumu(__VA_ARGS__)

#define	vasub_vv_i16m8(...) __riscv_vasub_vv_i16m8(__VA_ARGS__)

#define	vasub_vv_i16m8_m(...) __riscv_vasub_vv_i16m8_tumu(__VA_ARGS__)

#define	vasub_vv_i16mf2(...) __riscv_vasub_vv_i16mf2(__VA_ARGS__)

#define	vasub_vv_i16mf2_m(...) __riscv_vasub_vv_i16mf2_tumu(__VA_ARGS__)

#define	vasub_vv_i16mf4(...) __riscv_vasub_vv_i16mf4(__VA_ARGS__)

#define	vasub_vv_i16mf4_m(...) __riscv_vasub_vv_i16mf4_tumu(__VA_ARGS__)

#define	vasub_vv_i32m1(...) __riscv_vasub_vv_i32m1(__VA_ARGS__)

#define	vasub_vv_i32m1_m(...) __riscv_vasub_vv_i32m1_tumu(__VA_ARGS__)

#define	vasub_vv_i32m2(...) __riscv_vasub_vv_i32m2(__VA_ARGS__)

#define	vasub_vv_i32m2_m(...) __riscv_vasub_vv_i32m2_tumu(__VA_ARGS__)

#define	vasub_vv_i32m4(...) __riscv_vasub_vv_i32m4(__VA_ARGS__)

#define	vasub_vv_i32m4_m(...) __riscv_vasub_vv_i32m4_tumu(__VA_ARGS__)

#define	vasub_vv_i32m8(...) __riscv_vasub_vv_i32m8(__VA_ARGS__)

#define	vasub_vv_i32m8_m(...) __riscv_vasub_vv_i32m8_tumu(__VA_ARGS__)

#define	vasub_vv_i32mf2(...) __riscv_vasub_vv_i32mf2(__VA_ARGS__)

#define	vasub_vv_i32mf2_m(...) __riscv_vasub_vv_i32mf2_tumu(__VA_ARGS__)

#define	vasub_vv_i64m1(...) __riscv_vasub_vv_i64m1(__VA_ARGS__)

#define	vasub_vv_i64m1_m(...) __riscv_vasub_vv_i64m1_tumu(__VA_ARGS__)

#define	vasub_vv_i64m2(...) __riscv_vasub_vv_i64m2(__VA_ARGS__)

#define	vasub_vv_i64m2_m(...) __riscv_vasub_vv_i64m2_tumu(__VA_ARGS__)

#define	vasub_vv_i64m4(...) __riscv_vasub_vv_i64m4(__VA_ARGS__)

#define	vasub_vv_i64m4_m(...) __riscv_vasub_vv_i64m4_tumu(__VA_ARGS__)

#define	vasub_vv_i64m8(...) __riscv_vasub_vv_i64m8(__VA_ARGS__)

#define	vasub_vv_i64m8_m(...) __riscv_vasub_vv_i64m8_tumu(__VA_ARGS__)

#define	vasub_vv_i8m1(...) __riscv_vasub_vv_i8m1(__VA_ARGS__)

#define	vasub_vv_i8m1_m(...) __riscv_vasub_vv_i8m1_tumu(__VA_ARGS__)

#define	vasub_vv_i8m2(...) __riscv_vasub_vv_i8m2(__VA_ARGS__)

#define	vasub_vv_i8m2_m(...) __riscv_vasub_vv_i8m2_tumu(__VA_ARGS__)

#define	vasub_vv_i8m4(...) __riscv_vasub_vv_i8m4(__VA_ARGS__)

#define	vasub_vv_i8m4_m(...) __riscv_vasub_vv_i8m4_tumu(__VA_ARGS__)

#define	vasub_vv_i8m8(...) __riscv_vasub_vv_i8m8(__VA_ARGS__)

#define	vasub_vv_i8m8_m(...) __riscv_vasub_vv_i8m8_tumu(__VA_ARGS__)

#define	vasub_vv_i8mf2(...) __riscv_vasub_vv_i8mf2(__VA_ARGS__)

#define	vasub_vv_i8mf2_m(...) __riscv_vasub_vv_i8mf2_tumu(__VA_ARGS__)

#define	vasub_vv_i8mf4(...) __riscv_vasub_vv_i8mf4(__VA_ARGS__)

#define	vasub_vv_i8mf4_m(...) __riscv_vasub_vv_i8mf4_tumu(__VA_ARGS__)

#define	vasub_vv_i8mf8(...) __riscv_vasub_vv_i8mf8(__VA_ARGS__)

#define	vasub_vv_i8mf8_m(...) __riscv_vasub_vv_i8mf8_tumu(__VA_ARGS__)

#define	vasub_vx_i16m1(...) __riscv_vasub_vx_i16m1(__VA_ARGS__)

#define	vasub_vx_i16m1_m(...) __riscv_vasub_vx_i16m1_tumu(__VA_ARGS__)

#define	vasub_vx_i16m2(...) __riscv_vasub_vx_i16m2(__VA_ARGS__)

#define	vasub_vx_i16m2_m(...) __riscv_vasub_vx_i16m2_tumu(__VA_ARGS__)

#define	vasub_vx_i16m4(...) __riscv_vasub_vx_i16m4(__VA_ARGS__)

#define	vasub_vx_i16m4_m(...) __riscv_vasub_vx_i16m4_tumu(__VA_ARGS__)

#define	vasub_vx_i16m8(...) __riscv_vasub_vx_i16m8(__VA_ARGS__)

#define	vasub_vx_i16m8_m(...) __riscv_vasub_vx_i16m8_tumu(__VA_ARGS__)

#define	vasub_vx_i16mf2(...) __riscv_vasub_vx_i16mf2(__VA_ARGS__)

#define	vasub_vx_i16mf2_m(...) __riscv_vasub_vx_i16mf2_tumu(__VA_ARGS__)

#define	vasub_vx_i16mf4(...) __riscv_vasub_vx_i16mf4(__VA_ARGS__)

#define	vasub_vx_i16mf4_m(...) __riscv_vasub_vx_i16mf4_tumu(__VA_ARGS__)

#define	vasub_vx_i32m1(...) __riscv_vasub_vx_i32m1(__VA_ARGS__)

#define	vasub_vx_i32m1_m(...) __riscv_vasub_vx_i32m1_tumu(__VA_ARGS__)

#define	vasub_vx_i32m2(...) __riscv_vasub_vx_i32m2(__VA_ARGS__)

#define	vasub_vx_i32m2_m(...) __riscv_vasub_vx_i32m2_tumu(__VA_ARGS__)

#define	vasub_vx_i32m4(...) __riscv_vasub_vx_i32m4(__VA_ARGS__)

#define	vasub_vx_i32m4_m(...) __riscv_vasub_vx_i32m4_tumu(__VA_ARGS__)

#define	vasub_vx_i32m8(...) __riscv_vasub_vx_i32m8(__VA_ARGS__)

#define	vasub_vx_i32m8_m(...) __riscv_vasub_vx_i32m8_tumu(__VA_ARGS__)

#define	vasub_vx_i32mf2(...) __riscv_vasub_vx_i32mf2(__VA_ARGS__)

#define	vasub_vx_i32mf2_m(...) __riscv_vasub_vx_i32mf2_tumu(__VA_ARGS__)

#define	vasub_vx_i64m1(...) __riscv_vasub_vx_i64m1(__VA_ARGS__)

#define	vasub_vx_i64m1_m(...) __riscv_vasub_vx_i64m1_tumu(__VA_ARGS__)

#define	vasub_vx_i64m2(...) __riscv_vasub_vx_i64m2(__VA_ARGS__)

#define	vasub_vx_i64m2_m(...) __riscv_vasub_vx_i64m2_tumu(__VA_ARGS__)

#define	vasub_vx_i64m4(...) __riscv_vasub_vx_i64m4(__VA_ARGS__)

#define	vasub_vx_i64m4_m(...) __riscv_vasub_vx_i64m4_tumu(__VA_ARGS__)

#define	vasub_vx_i64m8(...) __riscv_vasub_vx_i64m8(__VA_ARGS__)

#define	vasub_vx_i64m8_m(...) __riscv_vasub_vx_i64m8_tumu(__VA_ARGS__)

#define	vasub_vx_i8m1(...) __riscv_vasub_vx_i8m1(__VA_ARGS__)

#define	vasub_vx_i8m1_m(...) __riscv_vasub_vx_i8m1_tumu(__VA_ARGS__)

#define	vasub_vx_i8m2(...) __riscv_vasub_vx_i8m2(__VA_ARGS__)

#define	vasub_vx_i8m2_m(...) __riscv_vasub_vx_i8m2_tumu(__VA_ARGS__)

#define	vasub_vx_i8m4(...) __riscv_vasub_vx_i8m4(__VA_ARGS__)

#define	vasub_vx_i8m4_m(...) __riscv_vasub_vx_i8m4_tumu(__VA_ARGS__)

#define	vasub_vx_i8m8(...) __riscv_vasub_vx_i8m8(__VA_ARGS__)

#define	vasub_vx_i8m8_m(...) __riscv_vasub_vx_i8m8_tumu(__VA_ARGS__)

#define	vasub_vx_i8mf2(...) __riscv_vasub_vx_i8mf2(__VA_ARGS__)

#define	vasub_vx_i8mf2_m(...) __riscv_vasub_vx_i8mf2_tumu(__VA_ARGS__)

#define	vasub_vx_i8mf4(...) __riscv_vasub_vx_i8mf4(__VA_ARGS__)

#define	vasub_vx_i8mf4_m(...) __riscv_vasub_vx_i8mf4_tumu(__VA_ARGS__)

#define	vasub_vx_i8mf8(...) __riscv_vasub_vx_i8mf8(__VA_ARGS__)

#define	vasub_vx_i8mf8_m(...) __riscv_vasub_vx_i8mf8_tumu(__VA_ARGS__)

#define	vasubu_vv_u16m1(...) __riscv_vasubu_vv_u16m1(__VA_ARGS__)

#define	vasubu_vv_u16m1_m(...) __riscv_vasubu_vv_u16m1_tumu(__VA_ARGS__)

#define	vasubu_vv_u16m2(...) __riscv_vasubu_vv_u16m2(__VA_ARGS__)

#define	vasubu_vv_u16m2_m(...) __riscv_vasubu_vv_u16m2_tumu(__VA_ARGS__)

#define	vasubu_vv_u16m4(...) __riscv_vasubu_vv_u16m4(__VA_ARGS__)

#define	vasubu_vv_u16m4_m(...) __riscv_vasubu_vv_u16m4_tumu(__VA_ARGS__)

#define	vasubu_vv_u16m8(...) __riscv_vasubu_vv_u16m8(__VA_ARGS__)

#define	vasubu_vv_u16m8_m(...) __riscv_vasubu_vv_u16m8_tumu(__VA_ARGS__)

#define	vasubu_vv_u16mf2(...) __riscv_vasubu_vv_u16mf2(__VA_ARGS__)

#define	vasubu_vv_u16mf2_m(...) __riscv_vasubu_vv_u16mf2_tumu(__VA_ARGS__)

#define	vasubu_vv_u16mf4(...) __riscv_vasubu_vv_u16mf4(__VA_ARGS__)

#define	vasubu_vv_u16mf4_m(...) __riscv_vasubu_vv_u16mf4_tumu(__VA_ARGS__)

#define	vasubu_vv_u32m1(...) __riscv_vasubu_vv_u32m1(__VA_ARGS__)

#define	vasubu_vv_u32m1_m(...) __riscv_vasubu_vv_u32m1_tumu(__VA_ARGS__)

#define	vasubu_vv_u32m2(...) __riscv_vasubu_vv_u32m2(__VA_ARGS__)

#define	vasubu_vv_u32m2_m(...) __riscv_vasubu_vv_u32m2_tumu(__VA_ARGS__)

#define	vasubu_vv_u32m4(...) __riscv_vasubu_vv_u32m4(__VA_ARGS__)

#define	vasubu_vv_u32m4_m(...) __riscv_vasubu_vv_u32m4_tumu(__VA_ARGS__)

#define	vasubu_vv_u32m8(...) __riscv_vasubu_vv_u32m8(__VA_ARGS__)

#define	vasubu_vv_u32m8_m(...) __riscv_vasubu_vv_u32m8_tumu(__VA_ARGS__)

#define	vasubu_vv_u32mf2(...) __riscv_vasubu_vv_u32mf2(__VA_ARGS__)

#define	vasubu_vv_u32mf2_m(...) __riscv_vasubu_vv_u32mf2_tumu(__VA_ARGS__)

#define	vasubu_vv_u64m1(...) __riscv_vasubu_vv_u64m1(__VA_ARGS__)

#define	vasubu_vv_u64m1_m(...) __riscv_vasubu_vv_u64m1_tumu(__VA_ARGS__)

#define	vasubu_vv_u64m2(...) __riscv_vasubu_vv_u64m2(__VA_ARGS__)

#define	vasubu_vv_u64m2_m(...) __riscv_vasubu_vv_u64m2_tumu(__VA_ARGS__)

#define	vasubu_vv_u64m4(...) __riscv_vasubu_vv_u64m4(__VA_ARGS__)

#define	vasubu_vv_u64m4_m(...) __riscv_vasubu_vv_u64m4_tumu(__VA_ARGS__)

#define	vasubu_vv_u64m8(...) __riscv_vasubu_vv_u64m8(__VA_ARGS__)

#define	vasubu_vv_u64m8_m(...) __riscv_vasubu_vv_u64m8_tumu(__VA_ARGS__)

#define	vasubu_vv_u8m1(...) __riscv_vasubu_vv_u8m1(__VA_ARGS__)

#define	vasubu_vv_u8m1_m(...) __riscv_vasubu_vv_u8m1_tumu(__VA_ARGS__)

#define	vasubu_vv_u8m2(...) __riscv_vasubu_vv_u8m2(__VA_ARGS__)

#define	vasubu_vv_u8m2_m(...) __riscv_vasubu_vv_u8m2_tumu(__VA_ARGS__)

#define	vasubu_vv_u8m4(...) __riscv_vasubu_vv_u8m4(__VA_ARGS__)

#define	vasubu_vv_u8m4_m(...) __riscv_vasubu_vv_u8m4_tumu(__VA_ARGS__)

#define	vasubu_vv_u8m8(...) __riscv_vasubu_vv_u8m8(__VA_ARGS__)

#define	vasubu_vv_u8m8_m(...) __riscv_vasubu_vv_u8m8_tumu(__VA_ARGS__)

#define	vasubu_vv_u8mf2(...) __riscv_vasubu_vv_u8mf2(__VA_ARGS__)

#define	vasubu_vv_u8mf2_m(...) __riscv_vasubu_vv_u8mf2_tumu(__VA_ARGS__)

#define	vasubu_vv_u8mf4(...) __riscv_vasubu_vv_u8mf4(__VA_ARGS__)

#define	vasubu_vv_u8mf4_m(...) __riscv_vasubu_vv_u8mf4_tumu(__VA_ARGS__)

#define	vasubu_vv_u8mf8(...) __riscv_vasubu_vv_u8mf8(__VA_ARGS__)

#define	vasubu_vv_u8mf8_m(...) __riscv_vasubu_vv_u8mf8_tumu(__VA_ARGS__)

#define	vasubu_vx_u16m1(...) __riscv_vasubu_vx_u16m1(__VA_ARGS__)

#define	vasubu_vx_u16m1_m(...) __riscv_vasubu_vx_u16m1_tumu(__VA_ARGS__)

#define	vasubu_vx_u16m2(...) __riscv_vasubu_vx_u16m2(__VA_ARGS__)

#define	vasubu_vx_u16m2_m(...) __riscv_vasubu_vx_u16m2_tumu(__VA_ARGS__)

#define	vasubu_vx_u16m4(...) __riscv_vasubu_vx_u16m4(__VA_ARGS__)

#define	vasubu_vx_u16m4_m(...) __riscv_vasubu_vx_u16m4_tumu(__VA_ARGS__)

#define	vasubu_vx_u16m8(...) __riscv_vasubu_vx_u16m8(__VA_ARGS__)

#define	vasubu_vx_u16m8_m(...) __riscv_vasubu_vx_u16m8_tumu(__VA_ARGS__)

#define	vasubu_vx_u16mf2(...) __riscv_vasubu_vx_u16mf2(__VA_ARGS__)

#define	vasubu_vx_u16mf2_m(...) __riscv_vasubu_vx_u16mf2_tumu(__VA_ARGS__)

#define	vasubu_vx_u16mf4(...) __riscv_vasubu_vx_u16mf4(__VA_ARGS__)

#define	vasubu_vx_u16mf4_m(...) __riscv_vasubu_vx_u16mf4_tumu(__VA_ARGS__)

#define	vasubu_vx_u32m1(...) __riscv_vasubu_vx_u32m1(__VA_ARGS__)

#define	vasubu_vx_u32m1_m(...) __riscv_vasubu_vx_u32m1_tumu(__VA_ARGS__)

#define	vasubu_vx_u32m2(...) __riscv_vasubu_vx_u32m2(__VA_ARGS__)

#define	vasubu_vx_u32m2_m(...) __riscv_vasubu_vx_u32m2_tumu(__VA_ARGS__)

#define	vasubu_vx_u32m4(...) __riscv_vasubu_vx_u32m4(__VA_ARGS__)

#define	vasubu_vx_u32m4_m(...) __riscv_vasubu_vx_u32m4_tumu(__VA_ARGS__)

#define	vasubu_vx_u32m8(...) __riscv_vasubu_vx_u32m8(__VA_ARGS__)

#define	vasubu_vx_u32m8_m(...) __riscv_vasubu_vx_u32m8_tumu(__VA_ARGS__)

#define	vasubu_vx_u32mf2(...) __riscv_vasubu_vx_u32mf2(__VA_ARGS__)

#define	vasubu_vx_u32mf2_m(...) __riscv_vasubu_vx_u32mf2_tumu(__VA_ARGS__)

#define	vasubu_vx_u64m1(...) __riscv_vasubu_vx_u64m1(__VA_ARGS__)

#define	vasubu_vx_u64m1_m(...) __riscv_vasubu_vx_u64m1_tumu(__VA_ARGS__)

#define	vasubu_vx_u64m2(...) __riscv_vasubu_vx_u64m2(__VA_ARGS__)

#define	vasubu_vx_u64m2_m(...) __riscv_vasubu_vx_u64m2_tumu(__VA_ARGS__)

#define	vasubu_vx_u64m4(...) __riscv_vasubu_vx_u64m4(__VA_ARGS__)

#define	vasubu_vx_u64m4_m(...) __riscv_vasubu_vx_u64m4_tumu(__VA_ARGS__)

#define	vasubu_vx_u64m8(...) __riscv_vasubu_vx_u64m8(__VA_ARGS__)

#define	vasubu_vx_u64m8_m(...) __riscv_vasubu_vx_u64m8_tumu(__VA_ARGS__)

#define	vasubu_vx_u8m1(...) __riscv_vasubu_vx_u8m1(__VA_ARGS__)

#define	vasubu_vx_u8m1_m(...) __riscv_vasubu_vx_u8m1_tumu(__VA_ARGS__)

#define	vasubu_vx_u8m2(...) __riscv_vasubu_vx_u8m2(__VA_ARGS__)

#define	vasubu_vx_u8m2_m(...) __riscv_vasubu_vx_u8m2_tumu(__VA_ARGS__)

#define	vasubu_vx_u8m4(...) __riscv_vasubu_vx_u8m4(__VA_ARGS__)

#define	vasubu_vx_u8m4_m(...) __riscv_vasubu_vx_u8m4_tumu(__VA_ARGS__)

#define	vasubu_vx_u8m8(...) __riscv_vasubu_vx_u8m8(__VA_ARGS__)

#define	vasubu_vx_u8m8_m(...) __riscv_vasubu_vx_u8m8_tumu(__VA_ARGS__)

#define	vasubu_vx_u8mf2(...) __riscv_vasubu_vx_u8mf2(__VA_ARGS__)

#define	vasubu_vx_u8mf2_m(...) __riscv_vasubu_vx_u8mf2_tumu(__VA_ARGS__)

#define	vasubu_vx_u8mf4(...) __riscv_vasubu_vx_u8mf4(__VA_ARGS__)

#define	vasubu_vx_u8mf4_m(...) __riscv_vasubu_vx_u8mf4_tumu(__VA_ARGS__)

#define	vasubu_vx_u8mf8(...) __riscv_vasubu_vx_u8mf8(__VA_ARGS__)

#define	vasubu_vx_u8mf8_m(...) __riscv_vasubu_vx_u8mf8_tumu(__VA_ARGS__)

#define	vcompress_vm_f16m1(mask, dest, src, vl) __riscv_vcompress_vm_f16m1_tu((dest), (src), (mask), (vl))

#define	vcompress_vm_f16m2(mask, dest, src, vl) __riscv_vcompress_vm_f16m2_tu((dest), (src), (mask), (vl))

#define	vcompress_vm_f16m4(mask, dest, src, vl) __riscv_vcompress_vm_f16m4_tu((dest), (src), (mask), (vl))

#define	vcompress_vm_f16m8(mask, dest, src, vl) __riscv_vcompress_vm_f16m8_tu((dest), (src), (mask), (vl))

#define	vcompress_vm_f16mf2(mask, dest, src, vl) __riscv_vcompress_vm_f16mf2_tu((dest), (src), (mask), (vl))

#define	vcompress_vm_f16mf4(mask, dest, src, vl) __riscv_vcompress_vm_f16mf4_tu((dest), (src), (mask), (vl))

#define	vcompress_vm_f32m1(mask, dest, src, vl) __riscv_vcompress_vm_f32m1_tu((dest), (src), (mask), (vl))

#define	vcompress_vm_f32m2(mask, dest, src, vl) __riscv_vcompress_vm_f32m2_tu((dest), (src), (mask), (vl))

#define	vcompress_vm_f32m4(mask, dest, src, vl) __riscv_vcompress_vm_f32m4_tu((dest), (src), (mask), (vl))

#define	vcompress_vm_f32m8(mask, dest, src, vl) __riscv_vcompress_vm_f32m8_tu((dest), (src), (mask), (vl))

#define	vcompress_vm_f32mf2(mask, dest, src, vl) __riscv_vcompress_vm_f32mf2_tu((dest), (src), (mask), (vl))

#define	vcompress_vm_f64m1(mask, dest, src, vl) __riscv_vcompress_vm_f64m1_tu((dest), (src), (mask), (vl))

#define	vcompress_vm_f64m2(mask, dest, src, vl) __riscv_vcompress_vm_f64m2_tu((dest), (src), (mask), (vl))

#define	vcompress_vm_f64m4(mask, dest, src, vl) __riscv_vcompress_vm_f64m4_tu((dest), (src), (mask), (vl))

#define	vcompress_vm_f64m8(mask, dest, src, vl) __riscv_vcompress_vm_f64m8_tu((dest), (src), (mask), (vl))

#define	vcompress_vm_i16m1(mask, dest, src, vl) __riscv_vcompress_vm_i16m1_tu((dest), (src), (mask), (vl))

#define	vcompress_vm_i16m2(mask, dest, src, vl) __riscv_vcompress_vm_i16m2_tu((dest), (src), (mask), (vl))

#define	vcompress_vm_i16m4(mask, dest, src, vl) __riscv_vcompress_vm_i16m4_tu((dest), (src), (mask), (vl))

#define	vcompress_vm_i16m8(mask, dest, src, vl) __riscv_vcompress_vm_i16m8_tu((dest), (src), (mask), (vl))

#define	vcompress_vm_i16mf2(mask, dest, src, vl) __riscv_vcompress_vm_i16mf2_tu((dest), (src), (mask), (vl))

#define	vcompress_vm_i16mf4(mask, dest, src, vl) __riscv_vcompress_vm_i16mf4_tu((dest), (src), (mask), (vl))

#define	vcompress_vm_i32m1(mask, dest, src, vl) __riscv_vcompress_vm_i32m1_tu((dest), (src), (mask), (vl))

#define	vcompress_vm_i32m2(mask, dest, src, vl) __riscv_vcompress_vm_i32m2_tu((dest), (src), (mask), (vl))

#define	vcompress_vm_i32m4(mask, dest, src, vl) __riscv_vcompress_vm_i32m4_tu((dest), (src), (mask), (vl))

#define	vcompress_vm_i32m8(mask, dest, src, vl) __riscv_vcompress_vm_i32m8_tu((dest), (src), (mask), (vl))

#define	vcompress_vm_i32mf2(mask, dest, src, vl) __riscv_vcompress_vm_i32mf2_tu((dest), (src), (mask), (vl))

#define	vcompress_vm_i64m1(mask, dest, src, vl) __riscv_vcompress_vm_i64m1_tu((dest), (src), (mask), (vl))

#define	vcompress_vm_i64m2(mask, dest, src, vl) __riscv_vcompress_vm_i64m2_tu((dest), (src), (mask), (vl))

#define	vcompress_vm_i64m4(mask, dest, src, vl) __riscv_vcompress_vm_i64m4_tu((dest), (src), (mask), (vl))

#define	vcompress_vm_i64m8(mask, dest, src, vl) __riscv_vcompress_vm_i64m8_tu((dest), (src), (mask), (vl))

#define	vcompress_vm_i8m1(mask, dest, src, vl) __riscv_vcompress_vm_i8m1_tu((dest), (src), (mask), (vl))

#define	vcompress_vm_i8m2(mask, dest, src, vl) __riscv_vcompress_vm_i8m2_tu((dest), (src), (mask), (vl))

#define	vcompress_vm_i8m4(mask, dest, src, vl) __riscv_vcompress_vm_i8m4_tu((dest), (src), (mask), (vl))

#define	vcompress_vm_i8m8(mask, dest, src, vl) __riscv_vcompress_vm_i8m8_tu((dest), (src), (mask), (vl))

#define	vcompress_vm_i8mf2(mask, dest, src, vl) __riscv_vcompress_vm_i8mf2_tu((dest), (src), (mask), (vl))

#define	vcompress_vm_i8mf4(mask, dest, src, vl) __riscv_vcompress_vm_i8mf4_tu((dest), (src), (mask), (vl))

#define	vcompress_vm_i8mf8(mask, dest, src, vl) __riscv_vcompress_vm_i8mf8_tu((dest), (src), (mask), (vl))

#define	vcompress_vm_u16m1(mask, dest, src, vl) __riscv_vcompress_vm_u16m1_tu((dest), (src), (mask), (vl))

#define	vcompress_vm_u16m2(mask, dest, src, vl) __riscv_vcompress_vm_u16m2_tu((dest), (src), (mask), (vl))

#define	vcompress_vm_u16m4(mask, dest, src, vl) __riscv_vcompress_vm_u16m4_tu((dest), (src), (mask), (vl))

#define	vcompress_vm_u16m8(mask, dest, src, vl) __riscv_vcompress_vm_u16m8_tu((dest), (src), (mask), (vl))

#define	vcompress_vm_u16mf2(mask, dest, src, vl) __riscv_vcompress_vm_u16mf2_tu((dest), (src), (mask), (vl))

#define	vcompress_vm_u16mf4(mask, dest, src, vl) __riscv_vcompress_vm_u16mf4_tu((dest), (src), (mask), (vl))

#define	vcompress_vm_u32m1(mask, dest, src, vl) __riscv_vcompress_vm_u32m1_tu((dest), (src), (mask), (vl))

#define	vcompress_vm_u32m2(mask, dest, src, vl) __riscv_vcompress_vm_u32m2_tu((dest), (src), (mask), (vl))

#define	vcompress_vm_u32m4(mask, dest, src, vl) __riscv_vcompress_vm_u32m4_tu((dest), (src), (mask), (vl))

#define	vcompress_vm_u32m8(mask, dest, src, vl) __riscv_vcompress_vm_u32m8_tu((dest), (src), (mask), (vl))

#define	vcompress_vm_u32mf2(mask, dest, src, vl) __riscv_vcompress_vm_u32mf2_tu((dest), (src), (mask), (vl))

#define	vcompress_vm_u64m1(mask, dest, src, vl) __riscv_vcompress_vm_u64m1_tu((dest), (src), (mask), (vl))

#define	vcompress_vm_u64m2(mask, dest, src, vl) __riscv_vcompress_vm_u64m2_tu((dest), (src), (mask), (vl))

#define	vcompress_vm_u64m4(mask, dest, src, vl) __riscv_vcompress_vm_u64m4_tu((dest), (src), (mask), (vl))

#define	vcompress_vm_u64m8(mask, dest, src, vl) __riscv_vcompress_vm_u64m8_tu((dest), (src), (mask), (vl))

#define	vcompress_vm_u8m1(mask, dest, src, vl) __riscv_vcompress_vm_u8m1_tu((dest), (src), (mask), (vl))

#define	vcompress_vm_u8m2(mask, dest, src, vl) __riscv_vcompress_vm_u8m2_tu((dest), (src), (mask), (vl))

#define	vcompress_vm_u8m4(mask, dest, src, vl) __riscv_vcompress_vm_u8m4_tu((dest), (src), (mask), (vl))

#define	vcompress_vm_u8m8(mask, dest, src, vl) __riscv_vcompress_vm_u8m8_tu((dest), (src), (mask), (vl))

#define	vcompress_vm_u8mf2(mask, dest, src, vl) __riscv_vcompress_vm_u8mf2_tu((dest), (src), (mask), (vl))

#define	vcompress_vm_u8mf4(mask, dest, src, vl) __riscv_vcompress_vm_u8mf4_tu((dest), (src), (mask), (vl))

#define	vcompress_vm_u8mf8(mask, dest, src, vl) __riscv_vcompress_vm_u8mf8_tu((dest), (src), (mask), (vl))

#define	vcpop_m_b1(...) __riscv_vcpop_m_b1(__VA_ARGS__)

#define	vcpop_m_b16(...) __riscv_vcpop_m_b16(__VA_ARGS__)

#define	vcpop_m_b16_m(...) __riscv_vcpop_m_b16_m(__VA_ARGS__)

#define	vcpop_m_b1_m(...) __riscv_vcpop_m_b1_m(__VA_ARGS__)

#define	vcpop_m_b2(...) __riscv_vcpop_m_b2(__VA_ARGS__)

#define	vcpop_m_b2_m(...) __riscv_vcpop_m_b2_m(__VA_ARGS__)

#define	vcpop_m_b32(...) __riscv_vcpop_m_b32(__VA_ARGS__)

#define	vcpop_m_b32_m(...) __riscv_vcpop_m_b32_m(__VA_ARGS__)

#define	vcpop_m_b4(...) __riscv_vcpop_m_b4(__VA_ARGS__)

#define	vcpop_m_b4_m(...) __riscv_vcpop_m_b4_m(__VA_ARGS__)

#define	vcpop_m_b64(...) __riscv_vcpop_m_b64(__VA_ARGS__)

#define	vcpop_m_b64_m(...) __riscv_vcpop_m_b64_m(__VA_ARGS__)

#define	vcpop_m_b8(...) __riscv_vcpop_m_b8(__VA_ARGS__)

#define	vcpop_m_b8_m(...) __riscv_vcpop_m_b8_m(__VA_ARGS__)

#define	vdiv_vv_i16m1(...) __riscv_vdiv_vv_i16m1(__VA_ARGS__)

#define	vdiv_vv_i16m1_m(...) __riscv_vdiv_vv_i16m1_tumu(__VA_ARGS__)

#define	vdiv_vv_i16m2(...) __riscv_vdiv_vv_i16m2(__VA_ARGS__)

#define	vdiv_vv_i16m2_m(...) __riscv_vdiv_vv_i16m2_tumu(__VA_ARGS__)

#define	vdiv_vv_i16m4(...) __riscv_vdiv_vv_i16m4(__VA_ARGS__)

#define	vdiv_vv_i16m4_m(...) __riscv_vdiv_vv_i16m4_tumu(__VA_ARGS__)

#define	vdiv_vv_i16m8(...) __riscv_vdiv_vv_i16m8(__VA_ARGS__)

#define	vdiv_vv_i16m8_m(...) __riscv_vdiv_vv_i16m8_tumu(__VA_ARGS__)

#define	vdiv_vv_i16mf2(...) __riscv_vdiv_vv_i16mf2(__VA_ARGS__)

#define	vdiv_vv_i16mf2_m(...) __riscv_vdiv_vv_i16mf2_tumu(__VA_ARGS__)

#define	vdiv_vv_i16mf4(...) __riscv_vdiv_vv_i16mf4(__VA_ARGS__)

#define	vdiv_vv_i16mf4_m(...) __riscv_vdiv_vv_i16mf4_tumu(__VA_ARGS__)

#define	vdiv_vv_i32m1(...) __riscv_vdiv_vv_i32m1(__VA_ARGS__)

#define	vdiv_vv_i32m1_m(...) __riscv_vdiv_vv_i32m1_tumu(__VA_ARGS__)

#define	vdiv_vv_i32m2(...) __riscv_vdiv_vv_i32m2(__VA_ARGS__)

#define	vdiv_vv_i32m2_m(...) __riscv_vdiv_vv_i32m2_tumu(__VA_ARGS__)

#define	vdiv_vv_i32m4(...) __riscv_vdiv_vv_i32m4(__VA_ARGS__)

#define	vdiv_vv_i32m4_m(...) __riscv_vdiv_vv_i32m4_tumu(__VA_ARGS__)

#define	vdiv_vv_i32m8(...) __riscv_vdiv_vv_i32m8(__VA_ARGS__)

#define	vdiv_vv_i32m8_m(...) __riscv_vdiv_vv_i32m8_tumu(__VA_ARGS__)

#define	vdiv_vv_i32mf2(...) __riscv_vdiv_vv_i32mf2(__VA_ARGS__)

#define	vdiv_vv_i32mf2_m(...) __riscv_vdiv_vv_i32mf2_tumu(__VA_ARGS__)

#define	vdiv_vv_i64m1(...) __riscv_vdiv_vv_i64m1(__VA_ARGS__)

#define	vdiv_vv_i64m1_m(...) __riscv_vdiv_vv_i64m1_tumu(__VA_ARGS__)

#define	vdiv_vv_i64m2(...) __riscv_vdiv_vv_i64m2(__VA_ARGS__)

#define	vdiv_vv_i64m2_m(...) __riscv_vdiv_vv_i64m2_tumu(__VA_ARGS__)

#define	vdiv_vv_i64m4(...) __riscv_vdiv_vv_i64m4(__VA_ARGS__)

#define	vdiv_vv_i64m4_m(...) __riscv_vdiv_vv_i64m4_tumu(__VA_ARGS__)

#define	vdiv_vv_i64m8(...) __riscv_vdiv_vv_i64m8(__VA_ARGS__)

#define	vdiv_vv_i64m8_m(...) __riscv_vdiv_vv_i64m8_tumu(__VA_ARGS__)

#define	vdiv_vv_i8m1(...) __riscv_vdiv_vv_i8m1(__VA_ARGS__)

#define	vdiv_vv_i8m1_m(...) __riscv_vdiv_vv_i8m1_tumu(__VA_ARGS__)

#define	vdiv_vv_i8m2(...) __riscv_vdiv_vv_i8m2(__VA_ARGS__)

#define	vdiv_vv_i8m2_m(...) __riscv_vdiv_vv_i8m2_tumu(__VA_ARGS__)

#define	vdiv_vv_i8m4(...) __riscv_vdiv_vv_i8m4(__VA_ARGS__)

#define	vdiv_vv_i8m4_m(...) __riscv_vdiv_vv_i8m4_tumu(__VA_ARGS__)

#define	vdiv_vv_i8m8(...) __riscv_vdiv_vv_i8m8(__VA_ARGS__)

#define	vdiv_vv_i8m8_m(...) __riscv_vdiv_vv_i8m8_tumu(__VA_ARGS__)

#define	vdiv_vv_i8mf2(...) __riscv_vdiv_vv_i8mf2(__VA_ARGS__)

#define	vdiv_vv_i8mf2_m(...) __riscv_vdiv_vv_i8mf2_tumu(__VA_ARGS__)

#define	vdiv_vv_i8mf4(...) __riscv_vdiv_vv_i8mf4(__VA_ARGS__)

#define	vdiv_vv_i8mf4_m(...) __riscv_vdiv_vv_i8mf4_tumu(__VA_ARGS__)

#define	vdiv_vv_i8mf8(...) __riscv_vdiv_vv_i8mf8(__VA_ARGS__)

#define	vdiv_vv_i8mf8_m(...) __riscv_vdiv_vv_i8mf8_tumu(__VA_ARGS__)

#define	vdiv_vx_i16m1(...) __riscv_vdiv_vx_i16m1(__VA_ARGS__)

#define	vdiv_vx_i16m1_m(...) __riscv_vdiv_vx_i16m1_tumu(__VA_ARGS__)

#define	vdiv_vx_i16m2(...) __riscv_vdiv_vx_i16m2(__VA_ARGS__)

#define	vdiv_vx_i16m2_m(...) __riscv_vdiv_vx_i16m2_tumu(__VA_ARGS__)

#define	vdiv_vx_i16m4(...) __riscv_vdiv_vx_i16m4(__VA_ARGS__)

#define	vdiv_vx_i16m4_m(...) __riscv_vdiv_vx_i16m4_tumu(__VA_ARGS__)

#define	vdiv_vx_i16m8(...) __riscv_vdiv_vx_i16m8(__VA_ARGS__)

#define	vdiv_vx_i16m8_m(...) __riscv_vdiv_vx_i16m8_tumu(__VA_ARGS__)

#define	vdiv_vx_i16mf2(...) __riscv_vdiv_vx_i16mf2(__VA_ARGS__)

#define	vdiv_vx_i16mf2_m(...) __riscv_vdiv_vx_i16mf2_tumu(__VA_ARGS__)

#define	vdiv_vx_i16mf4(...) __riscv_vdiv_vx_i16mf4(__VA_ARGS__)

#define	vdiv_vx_i16mf4_m(...) __riscv_vdiv_vx_i16mf4_tumu(__VA_ARGS__)

#define	vdiv_vx_i32m1(...) __riscv_vdiv_vx_i32m1(__VA_ARGS__)

#define	vdiv_vx_i32m1_m(...) __riscv_vdiv_vx_i32m1_tumu(__VA_ARGS__)

#define	vdiv_vx_i32m2(...) __riscv_vdiv_vx_i32m2(__VA_ARGS__)

#define	vdiv_vx_i32m2_m(...) __riscv_vdiv_vx_i32m2_tumu(__VA_ARGS__)

#define	vdiv_vx_i32m4(...) __riscv_vdiv_vx_i32m4(__VA_ARGS__)

#define	vdiv_vx_i32m4_m(...) __riscv_vdiv_vx_i32m4_tumu(__VA_ARGS__)

#define	vdiv_vx_i32m8(...) __riscv_vdiv_vx_i32m8(__VA_ARGS__)

#define	vdiv_vx_i32m8_m(...) __riscv_vdiv_vx_i32m8_tumu(__VA_ARGS__)

#define	vdiv_vx_i32mf2(...) __riscv_vdiv_vx_i32mf2(__VA_ARGS__)

#define	vdiv_vx_i32mf2_m(...) __riscv_vdiv_vx_i32mf2_tumu(__VA_ARGS__)

#define	vdiv_vx_i64m1(...) __riscv_vdiv_vx_i64m1(__VA_ARGS__)

#define	vdiv_vx_i64m1_m(...) __riscv_vdiv_vx_i64m1_tumu(__VA_ARGS__)

#define	vdiv_vx_i64m2(...) __riscv_vdiv_vx_i64m2(__VA_ARGS__)

#define	vdiv_vx_i64m2_m(...) __riscv_vdiv_vx_i64m2_tumu(__VA_ARGS__)

#define	vdiv_vx_i64m4(...) __riscv_vdiv_vx_i64m4(__VA_ARGS__)

#define	vdiv_vx_i64m4_m(...) __riscv_vdiv_vx_i64m4_tumu(__VA_ARGS__)

#define	vdiv_vx_i64m8(...) __riscv_vdiv_vx_i64m8(__VA_ARGS__)

#define	vdiv_vx_i64m8_m(...) __riscv_vdiv_vx_i64m8_tumu(__VA_ARGS__)

#define	vdiv_vx_i8m1(...) __riscv_vdiv_vx_i8m1(__VA_ARGS__)

#define	vdiv_vx_i8m1_m(...) __riscv_vdiv_vx_i8m1_tumu(__VA_ARGS__)

#define	vdiv_vx_i8m2(...) __riscv_vdiv_vx_i8m2(__VA_ARGS__)

#define	vdiv_vx_i8m2_m(...) __riscv_vdiv_vx_i8m2_tumu(__VA_ARGS__)

#define	vdiv_vx_i8m4(...) __riscv_vdiv_vx_i8m4(__VA_ARGS__)

#define	vdiv_vx_i8m4_m(...) __riscv_vdiv_vx_i8m4_tumu(__VA_ARGS__)

#define	vdiv_vx_i8m8(...) __riscv_vdiv_vx_i8m8(__VA_ARGS__)

#define	vdiv_vx_i8m8_m(...) __riscv_vdiv_vx_i8m8_tumu(__VA_ARGS__)

#define	vdiv_vx_i8mf2(...) __riscv_vdiv_vx_i8mf2(__VA_ARGS__)

#define	vdiv_vx_i8mf2_m(...) __riscv_vdiv_vx_i8mf2_tumu(__VA_ARGS__)

#define	vdiv_vx_i8mf4(...) __riscv_vdiv_vx_i8mf4(__VA_ARGS__)

#define	vdiv_vx_i8mf4_m(...) __riscv_vdiv_vx_i8mf4_tumu(__VA_ARGS__)

#define	vdiv_vx_i8mf8(...) __riscv_vdiv_vx_i8mf8(__VA_ARGS__)

#define	vdiv_vx_i8mf8_m(...) __riscv_vdiv_vx_i8mf8_tumu(__VA_ARGS__)

#define	vdivu_vv_u16m1(...) __riscv_vdivu_vv_u16m1(__VA_ARGS__)

#define	vdivu_vv_u16m1_m(...) __riscv_vdivu_vv_u16m1_tumu(__VA_ARGS__)

#define	vdivu_vv_u16m2(...) __riscv_vdivu_vv_u16m2(__VA_ARGS__)

#define	vdivu_vv_u16m2_m(...) __riscv_vdivu_vv_u16m2_tumu(__VA_ARGS__)

#define	vdivu_vv_u16m4(...) __riscv_vdivu_vv_u16m4(__VA_ARGS__)

#define	vdivu_vv_u16m4_m(...) __riscv_vdivu_vv_u16m4_tumu(__VA_ARGS__)

#define	vdivu_vv_u16m8(...) __riscv_vdivu_vv_u16m8(__VA_ARGS__)

#define	vdivu_vv_u16m8_m(...) __riscv_vdivu_vv_u16m8_tumu(__VA_ARGS__)

#define	vdivu_vv_u16mf2(...) __riscv_vdivu_vv_u16mf2(__VA_ARGS__)

#define	vdivu_vv_u16mf2_m(...) __riscv_vdivu_vv_u16mf2_tumu(__VA_ARGS__)

#define	vdivu_vv_u16mf4(...) __riscv_vdivu_vv_u16mf4(__VA_ARGS__)

#define	vdivu_vv_u16mf4_m(...) __riscv_vdivu_vv_u16mf4_tumu(__VA_ARGS__)

#define	vdivu_vv_u32m1(...) __riscv_vdivu_vv_u32m1(__VA_ARGS__)

#define	vdivu_vv_u32m1_m(...) __riscv_vdivu_vv_u32m1_tumu(__VA_ARGS__)

#define	vdivu_vv_u32m2(...) __riscv_vdivu_vv_u32m2(__VA_ARGS__)

#define	vdivu_vv_u32m2_m(...) __riscv_vdivu_vv_u32m2_tumu(__VA_ARGS__)

#define	vdivu_vv_u32m4(...) __riscv_vdivu_vv_u32m4(__VA_ARGS__)

#define	vdivu_vv_u32m4_m(...) __riscv_vdivu_vv_u32m4_tumu(__VA_ARGS__)

#define	vdivu_vv_u32m8(...) __riscv_vdivu_vv_u32m8(__VA_ARGS__)

#define	vdivu_vv_u32m8_m(...) __riscv_vdivu_vv_u32m8_tumu(__VA_ARGS__)

#define	vdivu_vv_u32mf2(...) __riscv_vdivu_vv_u32mf2(__VA_ARGS__)

#define	vdivu_vv_u32mf2_m(...) __riscv_vdivu_vv_u32mf2_tumu(__VA_ARGS__)

#define	vdivu_vv_u64m1(...) __riscv_vdivu_vv_u64m1(__VA_ARGS__)

#define	vdivu_vv_u64m1_m(...) __riscv_vdivu_vv_u64m1_tumu(__VA_ARGS__)

#define	vdivu_vv_u64m2(...) __riscv_vdivu_vv_u64m2(__VA_ARGS__)

#define	vdivu_vv_u64m2_m(...) __riscv_vdivu_vv_u64m2_tumu(__VA_ARGS__)

#define	vdivu_vv_u64m4(...) __riscv_vdivu_vv_u64m4(__VA_ARGS__)

#define	vdivu_vv_u64m4_m(...) __riscv_vdivu_vv_u64m4_tumu(__VA_ARGS__)

#define	vdivu_vv_u64m8(...) __riscv_vdivu_vv_u64m8(__VA_ARGS__)

#define	vdivu_vv_u64m8_m(...) __riscv_vdivu_vv_u64m8_tumu(__VA_ARGS__)

#define	vdivu_vv_u8m1(...) __riscv_vdivu_vv_u8m1(__VA_ARGS__)

#define	vdivu_vv_u8m1_m(...) __riscv_vdivu_vv_u8m1_tumu(__VA_ARGS__)

#define	vdivu_vv_u8m2(...) __riscv_vdivu_vv_u8m2(__VA_ARGS__)

#define	vdivu_vv_u8m2_m(...) __riscv_vdivu_vv_u8m2_tumu(__VA_ARGS__)

#define	vdivu_vv_u8m4(...) __riscv_vdivu_vv_u8m4(__VA_ARGS__)

#define	vdivu_vv_u8m4_m(...) __riscv_vdivu_vv_u8m4_tumu(__VA_ARGS__)

#define	vdivu_vv_u8m8(...) __riscv_vdivu_vv_u8m8(__VA_ARGS__)

#define	vdivu_vv_u8m8_m(...) __riscv_vdivu_vv_u8m8_tumu(__VA_ARGS__)

#define	vdivu_vv_u8mf2(...) __riscv_vdivu_vv_u8mf2(__VA_ARGS__)

#define	vdivu_vv_u8mf2_m(...) __riscv_vdivu_vv_u8mf2_tumu(__VA_ARGS__)

#define	vdivu_vv_u8mf4(...) __riscv_vdivu_vv_u8mf4(__VA_ARGS__)

#define	vdivu_vv_u8mf4_m(...) __riscv_vdivu_vv_u8mf4_tumu(__VA_ARGS__)

#define	vdivu_vv_u8mf8(...) __riscv_vdivu_vv_u8mf8(__VA_ARGS__)

#define	vdivu_vv_u8mf8_m(...) __riscv_vdivu_vv_u8mf8_tumu(__VA_ARGS__)

#define	vdivu_vx_u16m1(...) __riscv_vdivu_vx_u16m1(__VA_ARGS__)

#define	vdivu_vx_u16m1_m(...) __riscv_vdivu_vx_u16m1_tumu(__VA_ARGS__)

#define	vdivu_vx_u16m2(...) __riscv_vdivu_vx_u16m2(__VA_ARGS__)

#define	vdivu_vx_u16m2_m(...) __riscv_vdivu_vx_u16m2_tumu(__VA_ARGS__)

#define	vdivu_vx_u16m4(...) __riscv_vdivu_vx_u16m4(__VA_ARGS__)

#define	vdivu_vx_u16m4_m(...) __riscv_vdivu_vx_u16m4_tumu(__VA_ARGS__)

#define	vdivu_vx_u16m8(...) __riscv_vdivu_vx_u16m8(__VA_ARGS__)

#define	vdivu_vx_u16m8_m(...) __riscv_vdivu_vx_u16m8_tumu(__VA_ARGS__)

#define	vdivu_vx_u16mf2(...) __riscv_vdivu_vx_u16mf2(__VA_ARGS__)

#define	vdivu_vx_u16mf2_m(...) __riscv_vdivu_vx_u16mf2_tumu(__VA_ARGS__)

#define	vdivu_vx_u16mf4(...) __riscv_vdivu_vx_u16mf4(__VA_ARGS__)

#define	vdivu_vx_u16mf4_m(...) __riscv_vdivu_vx_u16mf4_tumu(__VA_ARGS__)

#define	vdivu_vx_u32m1(...) __riscv_vdivu_vx_u32m1(__VA_ARGS__)

#define	vdivu_vx_u32m1_m(...) __riscv_vdivu_vx_u32m1_tumu(__VA_ARGS__)

#define	vdivu_vx_u32m2(...) __riscv_vdivu_vx_u32m2(__VA_ARGS__)

#define	vdivu_vx_u32m2_m(...) __riscv_vdivu_vx_u32m2_tumu(__VA_ARGS__)

#define	vdivu_vx_u32m4(...) __riscv_vdivu_vx_u32m4(__VA_ARGS__)

#define	vdivu_vx_u32m4_m(...) __riscv_vdivu_vx_u32m4_tumu(__VA_ARGS__)

#define	vdivu_vx_u32m8(...) __riscv_vdivu_vx_u32m8(__VA_ARGS__)

#define	vdivu_vx_u32m8_m(...) __riscv_vdivu_vx_u32m8_tumu(__VA_ARGS__)

#define	vdivu_vx_u32mf2(...) __riscv_vdivu_vx_u32mf2(__VA_ARGS__)

#define	vdivu_vx_u32mf2_m(...) __riscv_vdivu_vx_u32mf2_tumu(__VA_ARGS__)

#define	vdivu_vx_u64m1(...) __riscv_vdivu_vx_u64m1(__VA_ARGS__)

#define	vdivu_vx_u64m1_m(...) __riscv_vdivu_vx_u64m1_tumu(__VA_ARGS__)

#define	vdivu_vx_u64m2(...) __riscv_vdivu_vx_u64m2(__VA_ARGS__)

#define	vdivu_vx_u64m2_m(...) __riscv_vdivu_vx_u64m2_tumu(__VA_ARGS__)

#define	vdivu_vx_u64m4(...) __riscv_vdivu_vx_u64m4(__VA_ARGS__)

#define	vdivu_vx_u64m4_m(...) __riscv_vdivu_vx_u64m4_tumu(__VA_ARGS__)

#define	vdivu_vx_u64m8(...) __riscv_vdivu_vx_u64m8(__VA_ARGS__)

#define	vdivu_vx_u64m8_m(...) __riscv_vdivu_vx_u64m8_tumu(__VA_ARGS__)

#define	vdivu_vx_u8m1(...) __riscv_vdivu_vx_u8m1(__VA_ARGS__)

#define	vdivu_vx_u8m1_m(...) __riscv_vdivu_vx_u8m1_tumu(__VA_ARGS__)

#define	vdivu_vx_u8m2(...) __riscv_vdivu_vx_u8m2(__VA_ARGS__)

#define	vdivu_vx_u8m2_m(...) __riscv_vdivu_vx_u8m2_tumu(__VA_ARGS__)

#define	vdivu_vx_u8m4(...) __riscv_vdivu_vx_u8m4(__VA_ARGS__)

#define	vdivu_vx_u8m4_m(...) __riscv_vdivu_vx_u8m4_tumu(__VA_ARGS__)

#define	vdivu_vx_u8m8(...) __riscv_vdivu_vx_u8m8(__VA_ARGS__)

#define	vdivu_vx_u8m8_m(...) __riscv_vdivu_vx_u8m8_tumu(__VA_ARGS__)

#define	vdivu_vx_u8mf2(...) __riscv_vdivu_vx_u8mf2(__VA_ARGS__)

#define	vdivu_vx_u8mf2_m(...) __riscv_vdivu_vx_u8mf2_tumu(__VA_ARGS__)

#define	vdivu_vx_u8mf4(...) __riscv_vdivu_vx_u8mf4(__VA_ARGS__)

#define	vdivu_vx_u8mf4_m(...) __riscv_vdivu_vx_u8mf4_tumu(__VA_ARGS__)

#define	vdivu_vx_u8mf8(...) __riscv_vdivu_vx_u8mf8(__VA_ARGS__)

#define	vdivu_vx_u8mf8_m(...) __riscv_vdivu_vx_u8mf8_tumu(__VA_ARGS__)

#define	vfabs_v_f16m1(...) __riscv_vfabs_v_f16m1(__VA_ARGS__)

#define	vfabs_v_f16m1_m(...) __riscv_vfabs_v_f16m1_tumu(__VA_ARGS__)

#define	vfabs_v_f16m2(...) __riscv_vfabs_v_f16m2(__VA_ARGS__)

#define	vfabs_v_f16m2_m(...) __riscv_vfabs_v_f16m2_tumu(__VA_ARGS__)

#define	vfabs_v_f16m4(...) __riscv_vfabs_v_f16m4(__VA_ARGS__)

#define	vfabs_v_f16m4_m(...) __riscv_vfabs_v_f16m4_tumu(__VA_ARGS__)

#define	vfabs_v_f16m8(...) __riscv_vfabs_v_f16m8(__VA_ARGS__)

#define	vfabs_v_f16m8_m(...) __riscv_vfabs_v_f16m8_tumu(__VA_ARGS__)

#define	vfabs_v_f16mf2(...) __riscv_vfabs_v_f16mf2(__VA_ARGS__)

#define	vfabs_v_f16mf2_m(...) __riscv_vfabs_v_f16mf2_tumu(__VA_ARGS__)

#define	vfabs_v_f16mf4(...) __riscv_vfabs_v_f16mf4(__VA_ARGS__)

#define	vfabs_v_f16mf4_m(...) __riscv_vfabs_v_f16mf4_tumu(__VA_ARGS__)

#define	vfabs_v_f32m1(...) __riscv_vfabs_v_f32m1(__VA_ARGS__)

#define	vfabs_v_f32m1_m(...) __riscv_vfabs_v_f32m1_tumu(__VA_ARGS__)

#define	vfabs_v_f32m2(...) __riscv_vfabs_v_f32m2(__VA_ARGS__)

#define	vfabs_v_f32m2_m(...) __riscv_vfabs_v_f32m2_tumu(__VA_ARGS__)

#define	vfabs_v_f32m4(...) __riscv_vfabs_v_f32m4(__VA_ARGS__)

#define	vfabs_v_f32m4_m(...) __riscv_vfabs_v_f32m4_tumu(__VA_ARGS__)

#define	vfabs_v_f32m8(...) __riscv_vfabs_v_f32m8(__VA_ARGS__)

#define	vfabs_v_f32m8_m(...) __riscv_vfabs_v_f32m8_tumu(__VA_ARGS__)

#define	vfabs_v_f32mf2(...) __riscv_vfabs_v_f32mf2(__VA_ARGS__)

#define	vfabs_v_f32mf2_m(...) __riscv_vfabs_v_f32mf2_tumu(__VA_ARGS__)

#define	vfabs_v_f64m1(...) __riscv_vfabs_v_f64m1(__VA_ARGS__)

#define	vfabs_v_f64m1_m(...) __riscv_vfabs_v_f64m1_tumu(__VA_ARGS__)

#define	vfabs_v_f64m2(...) __riscv_vfabs_v_f64m2(__VA_ARGS__)

#define	vfabs_v_f64m2_m(...) __riscv_vfabs_v_f64m2_tumu(__VA_ARGS__)

#define	vfabs_v_f64m4(...) __riscv_vfabs_v_f64m4(__VA_ARGS__)

#define	vfabs_v_f64m4_m(...) __riscv_vfabs_v_f64m4_tumu(__VA_ARGS__)

#define	vfabs_v_f64m8(...) __riscv_vfabs_v_f64m8(__VA_ARGS__)

#define	vfabs_v_f64m8_m(...) __riscv_vfabs_v_f64m8_tumu(__VA_ARGS__)

#define	vfadd_vf_f16m1(...) __riscv_vfadd_vf_f16m1(__VA_ARGS__)

#define	vfadd_vf_f16m1_m(...) __riscv_vfadd_vf_f16m1_tumu(__VA_ARGS__)

#define	vfadd_vf_f16m2(...) __riscv_vfadd_vf_f16m2(__VA_ARGS__)

#define	vfadd_vf_f16m2_m(...) __riscv_vfadd_vf_f16m2_tumu(__VA_ARGS__)

#define	vfadd_vf_f16m4(...) __riscv_vfadd_vf_f16m4(__VA_ARGS__)

#define	vfadd_vf_f16m4_m(...) __riscv_vfadd_vf_f16m4_tumu(__VA_ARGS__)

#define	vfadd_vf_f16m8(...) __riscv_vfadd_vf_f16m8(__VA_ARGS__)

#define	vfadd_vf_f16m8_m(...) __riscv_vfadd_vf_f16m8_tumu(__VA_ARGS__)

#define	vfadd_vf_f16mf2(...) __riscv_vfadd_vf_f16mf2(__VA_ARGS__)

#define	vfadd_vf_f16mf2_m(...) __riscv_vfadd_vf_f16mf2_tumu(__VA_ARGS__)

#define	vfadd_vf_f16mf4(...) __riscv_vfadd_vf_f16mf4(__VA_ARGS__)

#define	vfadd_vf_f16mf4_m(...) __riscv_vfadd_vf_f16mf4_tumu(__VA_ARGS__)

#define	vfadd_vf_f32m1(...) __riscv_vfadd_vf_f32m1(__VA_ARGS__)

#define	vfadd_vf_f32m1_m(...) __riscv_vfadd_vf_f32m1_tumu(__VA_ARGS__)

#define	vfadd_vf_f32m2(...) __riscv_vfadd_vf_f32m2(__VA_ARGS__)

#define	vfadd_vf_f32m2_m(...) __riscv_vfadd_vf_f32m2_tumu(__VA_ARGS__)

#define	vfadd_vf_f32m4(...) __riscv_vfadd_vf_f32m4(__VA_ARGS__)

#define	vfadd_vf_f32m4_m(...) __riscv_vfadd_vf_f32m4_tumu(__VA_ARGS__)

#define	vfadd_vf_f32m8(...) __riscv_vfadd_vf_f32m8(__VA_ARGS__)

#define	vfadd_vf_f32m8_m(...) __riscv_vfadd_vf_f32m8_tumu(__VA_ARGS__)

#define	vfadd_vf_f32mf2(...) __riscv_vfadd_vf_f32mf2(__VA_ARGS__)

#define	vfadd_vf_f32mf2_m(...) __riscv_vfadd_vf_f32mf2_tumu(__VA_ARGS__)

#define	vfadd_vf_f64m1(...) __riscv_vfadd_vf_f64m1(__VA_ARGS__)

#define	vfadd_vf_f64m1_m(...) __riscv_vfadd_vf_f64m1_tumu(__VA_ARGS__)

#define	vfadd_vf_f64m2(...) __riscv_vfadd_vf_f64m2(__VA_ARGS__)

#define	vfadd_vf_f64m2_m(...) __riscv_vfadd_vf_f64m2_tumu(__VA_ARGS__)

#define	vfadd_vf_f64m4(...) __riscv_vfadd_vf_f64m4(__VA_ARGS__)

#define	vfadd_vf_f64m4_m(...) __riscv_vfadd_vf_f64m4_tumu(__VA_ARGS__)

#define	vfadd_vf_f64m8(...) __riscv_vfadd_vf_f64m8(__VA_ARGS__)

#define	vfadd_vf_f64m8_m(...) __riscv_vfadd_vf_f64m8_tumu(__VA_ARGS__)

#define	vfadd_vv_f16m1(...) __riscv_vfadd_vv_f16m1(__VA_ARGS__)

#define	vfadd_vv_f16m1_m(...) __riscv_vfadd_vv_f16m1_tumu(__VA_ARGS__)

#define	vfadd_vv_f16m2(...) __riscv_vfadd_vv_f16m2(__VA_ARGS__)

#define	vfadd_vv_f16m2_m(...) __riscv_vfadd_vv_f16m2_tumu(__VA_ARGS__)

#define	vfadd_vv_f16m4(...) __riscv_vfadd_vv_f16m4(__VA_ARGS__)

#define	vfadd_vv_f16m4_m(...) __riscv_vfadd_vv_f16m4_tumu(__VA_ARGS__)

#define	vfadd_vv_f16m8(...) __riscv_vfadd_vv_f16m8(__VA_ARGS__)

#define	vfadd_vv_f16m8_m(...) __riscv_vfadd_vv_f16m8_tumu(__VA_ARGS__)

#define	vfadd_vv_f16mf2(...) __riscv_vfadd_vv_f16mf2(__VA_ARGS__)

#define	vfadd_vv_f16mf2_m(...) __riscv_vfadd_vv_f16mf2_tumu(__VA_ARGS__)

#define	vfadd_vv_f16mf4(...) __riscv_vfadd_vv_f16mf4(__VA_ARGS__)

#define	vfadd_vv_f16mf4_m(...) __riscv_vfadd_vv_f16mf4_tumu(__VA_ARGS__)

#define	vfadd_vv_f32m1(...) __riscv_vfadd_vv_f32m1(__VA_ARGS__)

#define	vfadd_vv_f32m1_m(...) __riscv_vfadd_vv_f32m1_tumu(__VA_ARGS__)

#define	vfadd_vv_f32m2(...) __riscv_vfadd_vv_f32m2(__VA_ARGS__)

#define	vfadd_vv_f32m2_m(...) __riscv_vfadd_vv_f32m2_tumu(__VA_ARGS__)

#define	vfadd_vv_f32m4(...) __riscv_vfadd_vv_f32m4(__VA_ARGS__)

#define	vfadd_vv_f32m4_m(...) __riscv_vfadd_vv_f32m4_tumu(__VA_ARGS__)

#define	vfadd_vv_f32m8(...) __riscv_vfadd_vv_f32m8(__VA_ARGS__)

#define	vfadd_vv_f32m8_m(...) __riscv_vfadd_vv_f32m8_tumu(__VA_ARGS__)

#define	vfadd_vv_f32mf2(...) __riscv_vfadd_vv_f32mf2(__VA_ARGS__)

#define	vfadd_vv_f32mf2_m(...) __riscv_vfadd_vv_f32mf2_tumu(__VA_ARGS__)

#define	vfadd_vv_f64m1(...) __riscv_vfadd_vv_f64m1(__VA_ARGS__)

#define	vfadd_vv_f64m1_m(...) __riscv_vfadd_vv_f64m1_tumu(__VA_ARGS__)

#define	vfadd_vv_f64m2(...) __riscv_vfadd_vv_f64m2(__VA_ARGS__)

#define	vfadd_vv_f64m2_m(...) __riscv_vfadd_vv_f64m2_tumu(__VA_ARGS__)

#define	vfadd_vv_f64m4(...) __riscv_vfadd_vv_f64m4(__VA_ARGS__)

#define	vfadd_vv_f64m4_m(...) __riscv_vfadd_vv_f64m4_tumu(__VA_ARGS__)

#define	vfadd_vv_f64m8(...) __riscv_vfadd_vv_f64m8(__VA_ARGS__)

#define	vfadd_vv_f64m8_m(...) __riscv_vfadd_vv_f64m8_tumu(__VA_ARGS__)

#define	vfclass_v_u16m1(...) __riscv_vfclass_v_u16m1(__VA_ARGS__)

#define	vfclass_v_u16m1_m(...) __riscv_vfclass_v_u16m1_tumu(__VA_ARGS__)

#define	vfclass_v_u16m2(...) __riscv_vfclass_v_u16m2(__VA_ARGS__)

#define	vfclass_v_u16m2_m(...) __riscv_vfclass_v_u16m2_tumu(__VA_ARGS__)

#define	vfclass_v_u16m4(...) __riscv_vfclass_v_u16m4(__VA_ARGS__)

#define	vfclass_v_u16m4_m(...) __riscv_vfclass_v_u16m4_tumu(__VA_ARGS__)

#define	vfclass_v_u16m8(...) __riscv_vfclass_v_u16m8(__VA_ARGS__)

#define	vfclass_v_u16m8_m(...) __riscv_vfclass_v_u16m8_tumu(__VA_ARGS__)

#define	vfclass_v_u16mf2(...) __riscv_vfclass_v_u16mf2(__VA_ARGS__)

#define	vfclass_v_u16mf2_m(...) __riscv_vfclass_v_u16mf2_tumu(__VA_ARGS__)

#define	vfclass_v_u16mf4(...) __riscv_vfclass_v_u16mf4(__VA_ARGS__)

#define	vfclass_v_u16mf4_m(...) __riscv_vfclass_v_u16mf4_tumu(__VA_ARGS__)

#define	vfclass_v_u32m1(...) __riscv_vfclass_v_u32m1(__VA_ARGS__)

#define	vfclass_v_u32m1_m(...) __riscv_vfclass_v_u32m1_tumu(__VA_ARGS__)

#define	vfclass_v_u32m2(...) __riscv_vfclass_v_u32m2(__VA_ARGS__)

#define	vfclass_v_u32m2_m(...) __riscv_vfclass_v_u32m2_tumu(__VA_ARGS__)

#define	vfclass_v_u32m4(...) __riscv_vfclass_v_u32m4(__VA_ARGS__)

#define	vfclass_v_u32m4_m(...) __riscv_vfclass_v_u32m4_tumu(__VA_ARGS__)

#define	vfclass_v_u32m8(...) __riscv_vfclass_v_u32m8(__VA_ARGS__)

#define	vfclass_v_u32m8_m(...) __riscv_vfclass_v_u32m8_tumu(__VA_ARGS__)

#define	vfclass_v_u32mf2(...) __riscv_vfclass_v_u32mf2(__VA_ARGS__)

#define	vfclass_v_u32mf2_m(...) __riscv_vfclass_v_u32mf2_tumu(__VA_ARGS__)

#define	vfclass_v_u64m1(...) __riscv_vfclass_v_u64m1(__VA_ARGS__)

#define	vfclass_v_u64m1_m(...) __riscv_vfclass_v_u64m1_tumu(__VA_ARGS__)

#define	vfclass_v_u64m2(...) __riscv_vfclass_v_u64m2(__VA_ARGS__)

#define	vfclass_v_u64m2_m(...) __riscv_vfclass_v_u64m2_tumu(__VA_ARGS__)

#define	vfclass_v_u64m4(...) __riscv_vfclass_v_u64m4(__VA_ARGS__)

#define	vfclass_v_u64m4_m(...) __riscv_vfclass_v_u64m4_tumu(__VA_ARGS__)

#define	vfclass_v_u64m8(...) __riscv_vfclass_v_u64m8(__VA_ARGS__)

#define	vfclass_v_u64m8_m(...) __riscv_vfclass_v_u64m8_tumu(__VA_ARGS__)

#define	vfcvt_f_x_v_f16m1(...) __riscv_vfcvt_f_x_v_f16m1(__VA_ARGS__)

#define	vfcvt_f_x_v_f16m1_m(...) __riscv_vfcvt_f_x_v_f16m1_tumu(__VA_ARGS__)

#define	vfcvt_f_x_v_f16m2(...) __riscv_vfcvt_f_x_v_f16m2(__VA_ARGS__)

#define	vfcvt_f_x_v_f16m2_m(...) __riscv_vfcvt_f_x_v_f16m2_tumu(__VA_ARGS__)

#define	vfcvt_f_x_v_f16m4(...) __riscv_vfcvt_f_x_v_f16m4(__VA_ARGS__)

#define	vfcvt_f_x_v_f16m4_m(...) __riscv_vfcvt_f_x_v_f16m4_tumu(__VA_ARGS__)

#define	vfcvt_f_x_v_f16m8(...) __riscv_vfcvt_f_x_v_f16m8(__VA_ARGS__)

#define	vfcvt_f_x_v_f16m8_m(...) __riscv_vfcvt_f_x_v_f16m8_tumu(__VA_ARGS__)

#define	vfcvt_f_x_v_f16mf2(...) __riscv_vfcvt_f_x_v_f16mf2(__VA_ARGS__)

#define	vfcvt_f_x_v_f16mf2_m(...) __riscv_vfcvt_f_x_v_f16mf2_tumu(__VA_ARGS__)

#define	vfcvt_f_x_v_f16mf4(...) __riscv_vfcvt_f_x_v_f16mf4(__VA_ARGS__)

#define	vfcvt_f_x_v_f16mf4_m(...) __riscv_vfcvt_f_x_v_f16mf4_tumu(__VA_ARGS__)

#define	vfcvt_f_x_v_f32m1(...) __riscv_vfcvt_f_x_v_f32m1(__VA_ARGS__)

#define	vfcvt_f_x_v_f32m1_m(...) __riscv_vfcvt_f_x_v_f32m1_tumu(__VA_ARGS__)

#define	vfcvt_f_x_v_f32m2(...) __riscv_vfcvt_f_x_v_f32m2(__VA_ARGS__)

#define	vfcvt_f_x_v_f32m2_m(...) __riscv_vfcvt_f_x_v_f32m2_tumu(__VA_ARGS__)

#define	vfcvt_f_x_v_f32m4(...) __riscv_vfcvt_f_x_v_f32m4(__VA_ARGS__)

#define	vfcvt_f_x_v_f32m4_m(...) __riscv_vfcvt_f_x_v_f32m4_tumu(__VA_ARGS__)

#define	vfcvt_f_x_v_f32m8(...) __riscv_vfcvt_f_x_v_f32m8(__VA_ARGS__)

#define	vfcvt_f_x_v_f32m8_m(...) __riscv_vfcvt_f_x_v_f32m8_tumu(__VA_ARGS__)

#define	vfcvt_f_x_v_f32mf2(...) __riscv_vfcvt_f_x_v_f32mf2(__VA_ARGS__)

#define	vfcvt_f_x_v_f32mf2_m(...) __riscv_vfcvt_f_x_v_f32mf2_tumu(__VA_ARGS__)

#define	vfcvt_f_x_v_f64m1(...) __riscv_vfcvt_f_x_v_f64m1(__VA_ARGS__)

#define	vfcvt_f_x_v_f64m1_m(...) __riscv_vfcvt_f_x_v_f64m1_tumu(__VA_ARGS__)

#define	vfcvt_f_x_v_f64m2(...) __riscv_vfcvt_f_x_v_f64m2(__VA_ARGS__)

#define	vfcvt_f_x_v_f64m2_m(...) __riscv_vfcvt_f_x_v_f64m2_tumu(__VA_ARGS__)

#define	vfcvt_f_x_v_f64m4(...) __riscv_vfcvt_f_x_v_f64m4(__VA_ARGS__)

#define	vfcvt_f_x_v_f64m4_m(...) __riscv_vfcvt_f_x_v_f64m4_tumu(__VA_ARGS__)

#define	vfcvt_f_x_v_f64m8(...) __riscv_vfcvt_f_x_v_f64m8(__VA_ARGS__)

#define	vfcvt_f_x_v_f64m8_m(...) __riscv_vfcvt_f_x_v_f64m8_tumu(__VA_ARGS__)

#define	vfcvt_f_xu_v_f16m1(...) __riscv_vfcvt_f_xu_v_f16m1(__VA_ARGS__)

#define	vfcvt_f_xu_v_f16m1_m(...) __riscv_vfcvt_f_xu_v_f16m1_tumu(__VA_ARGS__)

#define	vfcvt_f_xu_v_f16m2(...) __riscv_vfcvt_f_xu_v_f16m2(__VA_ARGS__)

#define	vfcvt_f_xu_v_f16m2_m(...) __riscv_vfcvt_f_xu_v_f16m2_tumu(__VA_ARGS__)

#define	vfcvt_f_xu_v_f16m4(...) __riscv_vfcvt_f_xu_v_f16m4(__VA_ARGS__)

#define	vfcvt_f_xu_v_f16m4_m(...) __riscv_vfcvt_f_xu_v_f16m4_tumu(__VA_ARGS__)

#define	vfcvt_f_xu_v_f16m8(...) __riscv_vfcvt_f_xu_v_f16m8(__VA_ARGS__)

#define	vfcvt_f_xu_v_f16m8_m(...) __riscv_vfcvt_f_xu_v_f16m8_tumu(__VA_ARGS__)

#define	vfcvt_f_xu_v_f16mf2(...) __riscv_vfcvt_f_xu_v_f16mf2(__VA_ARGS__)

#define	vfcvt_f_xu_v_f16mf2_m(...) __riscv_vfcvt_f_xu_v_f16mf2_tumu(__VA_ARGS__)

#define	vfcvt_f_xu_v_f16mf4(...) __riscv_vfcvt_f_xu_v_f16mf4(__VA_ARGS__)

#define	vfcvt_f_xu_v_f16mf4_m(...) __riscv_vfcvt_f_xu_v_f16mf4_tumu(__VA_ARGS__)

#define	vfcvt_f_xu_v_f32m1(...) __riscv_vfcvt_f_xu_v_f32m1(__VA_ARGS__)

#define	vfcvt_f_xu_v_f32m1_m(...) __riscv_vfcvt_f_xu_v_f32m1_tumu(__VA_ARGS__)

#define	vfcvt_f_xu_v_f32m2(...) __riscv_vfcvt_f_xu_v_f32m2(__VA_ARGS__)

#define	vfcvt_f_xu_v_f32m2_m(...) __riscv_vfcvt_f_xu_v_f32m2_tumu(__VA_ARGS__)

#define	vfcvt_f_xu_v_f32m4(...) __riscv_vfcvt_f_xu_v_f32m4(__VA_ARGS__)

#define	vfcvt_f_xu_v_f32m4_m(...) __riscv_vfcvt_f_xu_v_f32m4_tumu(__VA_ARGS__)

#define	vfcvt_f_xu_v_f32m8(...) __riscv_vfcvt_f_xu_v_f32m8(__VA_ARGS__)

#define	vfcvt_f_xu_v_f32m8_m(...) __riscv_vfcvt_f_xu_v_f32m8_tumu(__VA_ARGS__)

#define	vfcvt_f_xu_v_f32mf2(...) __riscv_vfcvt_f_xu_v_f32mf2(__VA_ARGS__)

#define	vfcvt_f_xu_v_f32mf2_m(...) __riscv_vfcvt_f_xu_v_f32mf2_tumu(__VA_ARGS__)

#define	vfcvt_f_xu_v_f64m1(...) __riscv_vfcvt_f_xu_v_f64m1(__VA_ARGS__)

#define	vfcvt_f_xu_v_f64m1_m(...) __riscv_vfcvt_f_xu_v_f64m1_tumu(__VA_ARGS__)

#define	vfcvt_f_xu_v_f64m2(...) __riscv_vfcvt_f_xu_v_f64m2(__VA_ARGS__)

#define	vfcvt_f_xu_v_f64m2_m(...) __riscv_vfcvt_f_xu_v_f64m2_tumu(__VA_ARGS__)

#define	vfcvt_f_xu_v_f64m4(...) __riscv_vfcvt_f_xu_v_f64m4(__VA_ARGS__)

#define	vfcvt_f_xu_v_f64m4_m(...) __riscv_vfcvt_f_xu_v_f64m4_tumu(__VA_ARGS__)

#define	vfcvt_f_xu_v_f64m8(...) __riscv_vfcvt_f_xu_v_f64m8(__VA_ARGS__)

#define	vfcvt_f_xu_v_f64m8_m(...) __riscv_vfcvt_f_xu_v_f64m8_tumu(__VA_ARGS__)

#define	vfcvt_rtz_x_f_v_i16m1(...) __riscv_vfcvt_rtz_x_f_v_i16m1(__VA_ARGS__)

#define	vfcvt_rtz_x_f_v_i16m1_m(...) __riscv_vfcvt_rtz_x_f_v_i16m1_tumu(__VA_ARGS__)

#define	vfcvt_rtz_x_f_v_i16m2(...) __riscv_vfcvt_rtz_x_f_v_i16m2(__VA_ARGS__)

#define	vfcvt_rtz_x_f_v_i16m2_m(...) __riscv_vfcvt_rtz_x_f_v_i16m2_tumu(__VA_ARGS__)

#define	vfcvt_rtz_x_f_v_i16m4(...) __riscv_vfcvt_rtz_x_f_v_i16m4(__VA_ARGS__)

#define	vfcvt_rtz_x_f_v_i16m4_m(...) __riscv_vfcvt_rtz_x_f_v_i16m4_tumu(__VA_ARGS__)

#define	vfcvt_rtz_x_f_v_i16m8(...) __riscv_vfcvt_rtz_x_f_v_i16m8(__VA_ARGS__)

#define	vfcvt_rtz_x_f_v_i16m8_m(...) __riscv_vfcvt_rtz_x_f_v_i16m8_tumu(__VA_ARGS__)

#define	vfcvt_rtz_x_f_v_i16mf2(...) __riscv_vfcvt_rtz_x_f_v_i16mf2(__VA_ARGS__)

#define	vfcvt_rtz_x_f_v_i16mf2_m(...) __riscv_vfcvt_rtz_x_f_v_i16mf2_tumu(__VA_ARGS__)

#define	vfcvt_rtz_x_f_v_i16mf4(...) __riscv_vfcvt_rtz_x_f_v_i16mf4(__VA_ARGS__)

#define	vfcvt_rtz_x_f_v_i16mf4_m(...) __riscv_vfcvt_rtz_x_f_v_i16mf4_tumu(__VA_ARGS__)

#define	vfcvt_rtz_x_f_v_i32m1(...) __riscv_vfcvt_rtz_x_f_v_i32m1(__VA_ARGS__)

#define	vfcvt_rtz_x_f_v_i32m1_m(...) __riscv_vfcvt_rtz_x_f_v_i32m1_tumu(__VA_ARGS__)

#define	vfcvt_rtz_x_f_v_i32m2(...) __riscv_vfcvt_rtz_x_f_v_i32m2(__VA_ARGS__)

#define	vfcvt_rtz_x_f_v_i32m2_m(...) __riscv_vfcvt_rtz_x_f_v_i32m2_tumu(__VA_ARGS__)

#define	vfcvt_rtz_x_f_v_i32m4(...) __riscv_vfcvt_rtz_x_f_v_i32m4(__VA_ARGS__)

#define	vfcvt_rtz_x_f_v_i32m4_m(...) __riscv_vfcvt_rtz_x_f_v_i32m4_tumu(__VA_ARGS__)

#define	vfcvt_rtz_x_f_v_i32m8(...) __riscv_vfcvt_rtz_x_f_v_i32m8(__VA_ARGS__)

#define	vfcvt_rtz_x_f_v_i32m8_m(...) __riscv_vfcvt_rtz_x_f_v_i32m8_tumu(__VA_ARGS__)

#define	vfcvt_rtz_x_f_v_i32mf2(...) __riscv_vfcvt_rtz_x_f_v_i32mf2(__VA_ARGS__)

#define	vfcvt_rtz_x_f_v_i32mf2_m(...) __riscv_vfcvt_rtz_x_f_v_i32mf2_tumu(__VA_ARGS__)

#define	vfcvt_rtz_x_f_v_i64m1(...) __riscv_vfcvt_rtz_x_f_v_i64m1(__VA_ARGS__)

#define	vfcvt_rtz_x_f_v_i64m1_m(...) __riscv_vfcvt_rtz_x_f_v_i64m1_tumu(__VA_ARGS__)

#define	vfcvt_rtz_x_f_v_i64m2(...) __riscv_vfcvt_rtz_x_f_v_i64m2(__VA_ARGS__)

#define	vfcvt_rtz_x_f_v_i64m2_m(...) __riscv_vfcvt_rtz_x_f_v_i64m2_tumu(__VA_ARGS__)

#define	vfcvt_rtz_x_f_v_i64m4(...) __riscv_vfcvt_rtz_x_f_v_i64m4(__VA_ARGS__)

#define	vfcvt_rtz_x_f_v_i64m4_m(...) __riscv_vfcvt_rtz_x_f_v_i64m4_tumu(__VA_ARGS__)

#define	vfcvt_rtz_x_f_v_i64m8(...) __riscv_vfcvt_rtz_x_f_v_i64m8(__VA_ARGS__)

#define	vfcvt_rtz_x_f_v_i64m8_m(...) __riscv_vfcvt_rtz_x_f_v_i64m8_tumu(__VA_ARGS__)

#define	vfcvt_rtz_xu_f_v_u16m1(...) __riscv_vfcvt_rtz_xu_f_v_u16m1(__VA_ARGS__)

#define	vfcvt_rtz_xu_f_v_u16m1_m(...) __riscv_vfcvt_rtz_xu_f_v_u16m1_tumu(__VA_ARGS__)

#define	vfcvt_rtz_xu_f_v_u16m2(...) __riscv_vfcvt_rtz_xu_f_v_u16m2(__VA_ARGS__)

#define	vfcvt_rtz_xu_f_v_u16m2_m(...) __riscv_vfcvt_rtz_xu_f_v_u16m2_tumu(__VA_ARGS__)

#define	vfcvt_rtz_xu_f_v_u16m4(...) __riscv_vfcvt_rtz_xu_f_v_u16m4(__VA_ARGS__)

#define	vfcvt_rtz_xu_f_v_u16m4_m(...) __riscv_vfcvt_rtz_xu_f_v_u16m4_tumu(__VA_ARGS__)

#define	vfcvt_rtz_xu_f_v_u16m8(...) __riscv_vfcvt_rtz_xu_f_v_u16m8(__VA_ARGS__)

#define	vfcvt_rtz_xu_f_v_u16m8_m(...) __riscv_vfcvt_rtz_xu_f_v_u16m8_tumu(__VA_ARGS__)

#define	vfcvt_rtz_xu_f_v_u16mf2(...) __riscv_vfcvt_rtz_xu_f_v_u16mf2(__VA_ARGS__)

#define	vfcvt_rtz_xu_f_v_u16mf2_m(...) __riscv_vfcvt_rtz_xu_f_v_u16mf2_tumu(__VA_ARGS__)

#define	vfcvt_rtz_xu_f_v_u16mf4(...) __riscv_vfcvt_rtz_xu_f_v_u16mf4(__VA_ARGS__)

#define	vfcvt_rtz_xu_f_v_u16mf4_m(...) __riscv_vfcvt_rtz_xu_f_v_u16mf4_tumu(__VA_ARGS__)

#define	vfcvt_rtz_xu_f_v_u32m1(...) __riscv_vfcvt_rtz_xu_f_v_u32m1(__VA_ARGS__)

#define	vfcvt_rtz_xu_f_v_u32m1_m(...) __riscv_vfcvt_rtz_xu_f_v_u32m1_tumu(__VA_ARGS__)

#define	vfcvt_rtz_xu_f_v_u32m2(...) __riscv_vfcvt_rtz_xu_f_v_u32m2(__VA_ARGS__)

#define	vfcvt_rtz_xu_f_v_u32m2_m(...) __riscv_vfcvt_rtz_xu_f_v_u32m2_tumu(__VA_ARGS__)

#define	vfcvt_rtz_xu_f_v_u32m4(...) __riscv_vfcvt_rtz_xu_f_v_u32m4(__VA_ARGS__)

#define	vfcvt_rtz_xu_f_v_u32m4_m(...) __riscv_vfcvt_rtz_xu_f_v_u32m4_tumu(__VA_ARGS__)

#define	vfcvt_rtz_xu_f_v_u32m8(...) __riscv_vfcvt_rtz_xu_f_v_u32m8(__VA_ARGS__)

#define	vfcvt_rtz_xu_f_v_u32m8_m(...) __riscv_vfcvt_rtz_xu_f_v_u32m8_tumu(__VA_ARGS__)

#define	vfcvt_rtz_xu_f_v_u32mf2(...) __riscv_vfcvt_rtz_xu_f_v_u32mf2(__VA_ARGS__)

#define	vfcvt_rtz_xu_f_v_u32mf2_m(...) __riscv_vfcvt_rtz_xu_f_v_u32mf2_tumu(__VA_ARGS__)

#define	vfcvt_rtz_xu_f_v_u64m1(...) __riscv_vfcvt_rtz_xu_f_v_u64m1(__VA_ARGS__)

#define	vfcvt_rtz_xu_f_v_u64m1_m(...) __riscv_vfcvt_rtz_xu_f_v_u64m1_tumu(__VA_ARGS__)

#define	vfcvt_rtz_xu_f_v_u64m2(...) __riscv_vfcvt_rtz_xu_f_v_u64m2(__VA_ARGS__)

#define	vfcvt_rtz_xu_f_v_u64m2_m(...) __riscv_vfcvt_rtz_xu_f_v_u64m2_tumu(__VA_ARGS__)

#define	vfcvt_rtz_xu_f_v_u64m4(...) __riscv_vfcvt_rtz_xu_f_v_u64m4(__VA_ARGS__)

#define	vfcvt_rtz_xu_f_v_u64m4_m(...) __riscv_vfcvt_rtz_xu_f_v_u64m4_tumu(__VA_ARGS__)

#define	vfcvt_rtz_xu_f_v_u64m8(...) __riscv_vfcvt_rtz_xu_f_v_u64m8(__VA_ARGS__)

#define	vfcvt_rtz_xu_f_v_u64m8_m(...) __riscv_vfcvt_rtz_xu_f_v_u64m8_tumu(__VA_ARGS__)

#define	vfcvt_x_f_v_i16m1(...) __riscv_vfcvt_x_f_v_i16m1(__VA_ARGS__)

#define	vfcvt_x_f_v_i16m1_m(...) __riscv_vfcvt_x_f_v_i16m1_tumu(__VA_ARGS__)

#define	vfcvt_x_f_v_i16m2(...) __riscv_vfcvt_x_f_v_i16m2(__VA_ARGS__)

#define	vfcvt_x_f_v_i16m2_m(...) __riscv_vfcvt_x_f_v_i16m2_tumu(__VA_ARGS__)

#define	vfcvt_x_f_v_i16m4(...) __riscv_vfcvt_x_f_v_i16m4(__VA_ARGS__)

#define	vfcvt_x_f_v_i16m4_m(...) __riscv_vfcvt_x_f_v_i16m4_tumu(__VA_ARGS__)

#define	vfcvt_x_f_v_i16m8(...) __riscv_vfcvt_x_f_v_i16m8(__VA_ARGS__)

#define	vfcvt_x_f_v_i16m8_m(...) __riscv_vfcvt_x_f_v_i16m8_tumu(__VA_ARGS__)

#define	vfcvt_x_f_v_i16mf2(...) __riscv_vfcvt_x_f_v_i16mf2(__VA_ARGS__)

#define	vfcvt_x_f_v_i16mf2_m(...) __riscv_vfcvt_x_f_v_i16mf2_tumu(__VA_ARGS__)

#define	vfcvt_x_f_v_i16mf4(...) __riscv_vfcvt_x_f_v_i16mf4(__VA_ARGS__)

#define	vfcvt_x_f_v_i16mf4_m(...) __riscv_vfcvt_x_f_v_i16mf4_tumu(__VA_ARGS__)

#define	vfcvt_x_f_v_i32m1(...) __riscv_vfcvt_x_f_v_i32m1(__VA_ARGS__)

#define	vfcvt_x_f_v_i32m1_m(...) __riscv_vfcvt_x_f_v_i32m1_tumu(__VA_ARGS__)

#define	vfcvt_x_f_v_i32m2(...) __riscv_vfcvt_x_f_v_i32m2(__VA_ARGS__)

#define	vfcvt_x_f_v_i32m2_m(...) __riscv_vfcvt_x_f_v_i32m2_tumu(__VA_ARGS__)

#define	vfcvt_x_f_v_i32m4(...) __riscv_vfcvt_x_f_v_i32m4(__VA_ARGS__)

#define	vfcvt_x_f_v_i32m4_m(...) __riscv_vfcvt_x_f_v_i32m4_tumu(__VA_ARGS__)

#define	vfcvt_x_f_v_i32m8(...) __riscv_vfcvt_x_f_v_i32m8(__VA_ARGS__)

#define	vfcvt_x_f_v_i32m8_m(...) __riscv_vfcvt_x_f_v_i32m8_tumu(__VA_ARGS__)

#define	vfcvt_x_f_v_i32mf2(...) __riscv_vfcvt_x_f_v_i32mf2(__VA_ARGS__)

#define	vfcvt_x_f_v_i32mf2_m(...) __riscv_vfcvt_x_f_v_i32mf2_tumu(__VA_ARGS__)

#define	vfcvt_x_f_v_i64m1(...) __riscv_vfcvt_x_f_v_i64m1(__VA_ARGS__)

#define	vfcvt_x_f_v_i64m1_m(...) __riscv_vfcvt_x_f_v_i64m1_tumu(__VA_ARGS__)

#define	vfcvt_x_f_v_i64m2(...) __riscv_vfcvt_x_f_v_i64m2(__VA_ARGS__)

#define	vfcvt_x_f_v_i64m2_m(...) __riscv_vfcvt_x_f_v_i64m2_tumu(__VA_ARGS__)

#define	vfcvt_x_f_v_i64m4(...) __riscv_vfcvt_x_f_v_i64m4(__VA_ARGS__)

#define	vfcvt_x_f_v_i64m4_m(...) __riscv_vfcvt_x_f_v_i64m4_tumu(__VA_ARGS__)

#define	vfcvt_x_f_v_i64m8(...) __riscv_vfcvt_x_f_v_i64m8(__VA_ARGS__)

#define	vfcvt_x_f_v_i64m8_m(...) __riscv_vfcvt_x_f_v_i64m8_tumu(__VA_ARGS__)

#define	vfcvt_xu_f_v_u16m1(...) __riscv_vfcvt_xu_f_v_u16m1(__VA_ARGS__)

#define	vfcvt_xu_f_v_u16m1_m(...) __riscv_vfcvt_xu_f_v_u16m1_tumu(__VA_ARGS__)

#define	vfcvt_xu_f_v_u16m2(...) __riscv_vfcvt_xu_f_v_u16m2(__VA_ARGS__)

#define	vfcvt_xu_f_v_u16m2_m(...) __riscv_vfcvt_xu_f_v_u16m2_tumu(__VA_ARGS__)

#define	vfcvt_xu_f_v_u16m4(...) __riscv_vfcvt_xu_f_v_u16m4(__VA_ARGS__)

#define	vfcvt_xu_f_v_u16m4_m(...) __riscv_vfcvt_xu_f_v_u16m4_tumu(__VA_ARGS__)

#define	vfcvt_xu_f_v_u16m8(...) __riscv_vfcvt_xu_f_v_u16m8(__VA_ARGS__)

#define	vfcvt_xu_f_v_u16m8_m(...) __riscv_vfcvt_xu_f_v_u16m8_tumu(__VA_ARGS__)

#define	vfcvt_xu_f_v_u16mf2(...) __riscv_vfcvt_xu_f_v_u16mf2(__VA_ARGS__)

#define	vfcvt_xu_f_v_u16mf2_m(...) __riscv_vfcvt_xu_f_v_u16mf2_tumu(__VA_ARGS__)

#define	vfcvt_xu_f_v_u16mf4(...) __riscv_vfcvt_xu_f_v_u16mf4(__VA_ARGS__)

#define	vfcvt_xu_f_v_u16mf4_m(...) __riscv_vfcvt_xu_f_v_u16mf4_tumu(__VA_ARGS__)

#define	vfcvt_xu_f_v_u32m1(...) __riscv_vfcvt_xu_f_v_u32m1(__VA_ARGS__)

#define	vfcvt_xu_f_v_u32m1_m(...) __riscv_vfcvt_xu_f_v_u32m1_tumu(__VA_ARGS__)

#define	vfcvt_xu_f_v_u32m2(...) __riscv_vfcvt_xu_f_v_u32m2(__VA_ARGS__)

#define	vfcvt_xu_f_v_u32m2_m(...) __riscv_vfcvt_xu_f_v_u32m2_tumu(__VA_ARGS__)

#define	vfcvt_xu_f_v_u32m4(...) __riscv_vfcvt_xu_f_v_u32m4(__VA_ARGS__)

#define	vfcvt_xu_f_v_u32m4_m(...) __riscv_vfcvt_xu_f_v_u32m4_tumu(__VA_ARGS__)

#define	vfcvt_xu_f_v_u32m8(...) __riscv_vfcvt_xu_f_v_u32m8(__VA_ARGS__)

#define	vfcvt_xu_f_v_u32m8_m(...) __riscv_vfcvt_xu_f_v_u32m8_tumu(__VA_ARGS__)

#define	vfcvt_xu_f_v_u32mf2(...) __riscv_vfcvt_xu_f_v_u32mf2(__VA_ARGS__)

#define	vfcvt_xu_f_v_u32mf2_m(...) __riscv_vfcvt_xu_f_v_u32mf2_tumu(__VA_ARGS__)

#define	vfcvt_xu_f_v_u64m1(...) __riscv_vfcvt_xu_f_v_u64m1(__VA_ARGS__)

#define	vfcvt_xu_f_v_u64m1_m(...) __riscv_vfcvt_xu_f_v_u64m1_tumu(__VA_ARGS__)

#define	vfcvt_xu_f_v_u64m2(...) __riscv_vfcvt_xu_f_v_u64m2(__VA_ARGS__)

#define	vfcvt_xu_f_v_u64m2_m(...) __riscv_vfcvt_xu_f_v_u64m2_tumu(__VA_ARGS__)

#define	vfcvt_xu_f_v_u64m4(...) __riscv_vfcvt_xu_f_v_u64m4(__VA_ARGS__)

#define	vfcvt_xu_f_v_u64m4_m(...) __riscv_vfcvt_xu_f_v_u64m4_tumu(__VA_ARGS__)

#define	vfcvt_xu_f_v_u64m8(...) __riscv_vfcvt_xu_f_v_u64m8(__VA_ARGS__)

#define	vfcvt_xu_f_v_u64m8_m(...) __riscv_vfcvt_xu_f_v_u64m8_tumu(__VA_ARGS__)

#define	vfdiv_vf_f16m1(...) __riscv_vfdiv_vf_f16m1(__VA_ARGS__)

#define	vfdiv_vf_f16m1_m(...) __riscv_vfdiv_vf_f16m1_tumu(__VA_ARGS__)

#define	vfdiv_vf_f16m2(...) __riscv_vfdiv_vf_f16m2(__VA_ARGS__)

#define	vfdiv_vf_f16m2_m(...) __riscv_vfdiv_vf_f16m2_tumu(__VA_ARGS__)

#define	vfdiv_vf_f16m4(...) __riscv_vfdiv_vf_f16m4(__VA_ARGS__)

#define	vfdiv_vf_f16m4_m(...) __riscv_vfdiv_vf_f16m4_tumu(__VA_ARGS__)

#define	vfdiv_vf_f16m8(...) __riscv_vfdiv_vf_f16m8(__VA_ARGS__)

#define	vfdiv_vf_f16m8_m(...) __riscv_vfdiv_vf_f16m8_tumu(__VA_ARGS__)

#define	vfdiv_vf_f16mf2(...) __riscv_vfdiv_vf_f16mf2(__VA_ARGS__)

#define	vfdiv_vf_f16mf2_m(...) __riscv_vfdiv_vf_f16mf2_tumu(__VA_ARGS__)

#define	vfdiv_vf_f16mf4(...) __riscv_vfdiv_vf_f16mf4(__VA_ARGS__)

#define	vfdiv_vf_f16mf4_m(...) __riscv_vfdiv_vf_f16mf4_tumu(__VA_ARGS__)

#define	vfdiv_vf_f32m1(...) __riscv_vfdiv_vf_f32m1(__VA_ARGS__)

#define	vfdiv_vf_f32m1_m(...) __riscv_vfdiv_vf_f32m1_tumu(__VA_ARGS__)

#define	vfdiv_vf_f32m2(...) __riscv_vfdiv_vf_f32m2(__VA_ARGS__)

#define	vfdiv_vf_f32m2_m(...) __riscv_vfdiv_vf_f32m2_tumu(__VA_ARGS__)

#define	vfdiv_vf_f32m4(...) __riscv_vfdiv_vf_f32m4(__VA_ARGS__)

#define	vfdiv_vf_f32m4_m(...) __riscv_vfdiv_vf_f32m4_tumu(__VA_ARGS__)

#define	vfdiv_vf_f32m8(...) __riscv_vfdiv_vf_f32m8(__VA_ARGS__)

#define	vfdiv_vf_f32m8_m(...) __riscv_vfdiv_vf_f32m8_tumu(__VA_ARGS__)

#define	vfdiv_vf_f32mf2(...) __riscv_vfdiv_vf_f32mf2(__VA_ARGS__)

#define	vfdiv_vf_f32mf2_m(...) __riscv_vfdiv_vf_f32mf2_tumu(__VA_ARGS__)

#define	vfdiv_vf_f64m1(...) __riscv_vfdiv_vf_f64m1(__VA_ARGS__)

#define	vfdiv_vf_f64m1_m(...) __riscv_vfdiv_vf_f64m1_tumu(__VA_ARGS__)

#define	vfdiv_vf_f64m2(...) __riscv_vfdiv_vf_f64m2(__VA_ARGS__)

#define	vfdiv_vf_f64m2_m(...) __riscv_vfdiv_vf_f64m2_tumu(__VA_ARGS__)

#define	vfdiv_vf_f64m4(...) __riscv_vfdiv_vf_f64m4(__VA_ARGS__)

#define	vfdiv_vf_f64m4_m(...) __riscv_vfdiv_vf_f64m4_tumu(__VA_ARGS__)

#define	vfdiv_vf_f64m8(...) __riscv_vfdiv_vf_f64m8(__VA_ARGS__)

#define	vfdiv_vf_f64m8_m(...) __riscv_vfdiv_vf_f64m8_tumu(__VA_ARGS__)

#define	vfdiv_vv_f16m1(...) __riscv_vfdiv_vv_f16m1(__VA_ARGS__)

#define	vfdiv_vv_f16m1_m(...) __riscv_vfdiv_vv_f16m1_tumu(__VA_ARGS__)

#define	vfdiv_vv_f16m2(...) __riscv_vfdiv_vv_f16m2(__VA_ARGS__)

#define	vfdiv_vv_f16m2_m(...) __riscv_vfdiv_vv_f16m2_tumu(__VA_ARGS__)

#define	vfdiv_vv_f16m4(...) __riscv_vfdiv_vv_f16m4(__VA_ARGS__)

#define	vfdiv_vv_f16m4_m(...) __riscv_vfdiv_vv_f16m4_tumu(__VA_ARGS__)

#define	vfdiv_vv_f16m8(...) __riscv_vfdiv_vv_f16m8(__VA_ARGS__)

#define	vfdiv_vv_f16m8_m(...) __riscv_vfdiv_vv_f16m8_tumu(__VA_ARGS__)

#define	vfdiv_vv_f16mf2(...) __riscv_vfdiv_vv_f16mf2(__VA_ARGS__)

#define	vfdiv_vv_f16mf2_m(...) __riscv_vfdiv_vv_f16mf2_tumu(__VA_ARGS__)

#define	vfdiv_vv_f16mf4(...) __riscv_vfdiv_vv_f16mf4(__VA_ARGS__)

#define	vfdiv_vv_f16mf4_m(...) __riscv_vfdiv_vv_f16mf4_tumu(__VA_ARGS__)

#define	vfdiv_vv_f32m1(...) __riscv_vfdiv_vv_f32m1(__VA_ARGS__)

#define	vfdiv_vv_f32m1_m(...) __riscv_vfdiv_vv_f32m1_tumu(__VA_ARGS__)

#define	vfdiv_vv_f32m2(...) __riscv_vfdiv_vv_f32m2(__VA_ARGS__)

#define	vfdiv_vv_f32m2_m(...) __riscv_vfdiv_vv_f32m2_tumu(__VA_ARGS__)

#define	vfdiv_vv_f32m4(...) __riscv_vfdiv_vv_f32m4(__VA_ARGS__)

#define	vfdiv_vv_f32m4_m(...) __riscv_vfdiv_vv_f32m4_tumu(__VA_ARGS__)

#define	vfdiv_vv_f32m8(...) __riscv_vfdiv_vv_f32m8(__VA_ARGS__)

#define	vfdiv_vv_f32m8_m(...) __riscv_vfdiv_vv_f32m8_tumu(__VA_ARGS__)

#define	vfdiv_vv_f32mf2(...) __riscv_vfdiv_vv_f32mf2(__VA_ARGS__)

#define	vfdiv_vv_f32mf2_m(...) __riscv_vfdiv_vv_f32mf2_tumu(__VA_ARGS__)

#define	vfdiv_vv_f64m1(...) __riscv_vfdiv_vv_f64m1(__VA_ARGS__)

#define	vfdiv_vv_f64m1_m(...) __riscv_vfdiv_vv_f64m1_tumu(__VA_ARGS__)

#define	vfdiv_vv_f64m2(...) __riscv_vfdiv_vv_f64m2(__VA_ARGS__)

#define	vfdiv_vv_f64m2_m(...) __riscv_vfdiv_vv_f64m2_tumu(__VA_ARGS__)

#define	vfdiv_vv_f64m4(...) __riscv_vfdiv_vv_f64m4(__VA_ARGS__)

#define	vfdiv_vv_f64m4_m(...) __riscv_vfdiv_vv_f64m4_tumu(__VA_ARGS__)

#define	vfdiv_vv_f64m8(...) __riscv_vfdiv_vv_f64m8(__VA_ARGS__)

#define	vfdiv_vv_f64m8_m(...) __riscv_vfdiv_vv_f64m8_tumu(__VA_ARGS__)

#define	vfirst_m_b1(...) __riscv_vfirst_m_b1(__VA_ARGS__)

#define	vfirst_m_b16(...) __riscv_vfirst_m_b16(__VA_ARGS__)

#define	vfirst_m_b16_m(...) __riscv_vfirst_m_b16_m(__VA_ARGS__)

#define	vfirst_m_b1_m(...) __riscv_vfirst_m_b1_m(__VA_ARGS__)

#define	vfirst_m_b2(...) __riscv_vfirst_m_b2(__VA_ARGS__)

#define	vfirst_m_b2_m(...) __riscv_vfirst_m_b2_m(__VA_ARGS__)

#define	vfirst_m_b32(...) __riscv_vfirst_m_b32(__VA_ARGS__)

#define	vfirst_m_b32_m(...) __riscv_vfirst_m_b32_m(__VA_ARGS__)

#define	vfirst_m_b4(...) __riscv_vfirst_m_b4(__VA_ARGS__)

#define	vfirst_m_b4_m(...) __riscv_vfirst_m_b4_m(__VA_ARGS__)

#define	vfirst_m_b64(...) __riscv_vfirst_m_b64(__VA_ARGS__)

#define	vfirst_m_b64_m(...) __riscv_vfirst_m_b64_m(__VA_ARGS__)

#define	vfirst_m_b8(...) __riscv_vfirst_m_b8(__VA_ARGS__)

#define	vfirst_m_b8_m(...) __riscv_vfirst_m_b8_m(__VA_ARGS__)

#define	vfmacc_vf_f16m1(...) __riscv_vfmacc_vf_f16m1_tu(__VA_ARGS__)

#define	vfmacc_vf_f16m1_m(...) __riscv_vfmacc_vf_f16m1_tumu(__VA_ARGS__)

#define	vfmacc_vf_f16m2(...) __riscv_vfmacc_vf_f16m2_tu(__VA_ARGS__)

#define	vfmacc_vf_f16m2_m(...) __riscv_vfmacc_vf_f16m2_tumu(__VA_ARGS__)

#define	vfmacc_vf_f16m4(...) __riscv_vfmacc_vf_f16m4_tu(__VA_ARGS__)

#define	vfmacc_vf_f16m4_m(...) __riscv_vfmacc_vf_f16m4_tumu(__VA_ARGS__)

#define	vfmacc_vf_f16m8(...) __riscv_vfmacc_vf_f16m8_tu(__VA_ARGS__)

#define	vfmacc_vf_f16m8_m(...) __riscv_vfmacc_vf_f16m8_tumu(__VA_ARGS__)

#define	vfmacc_vf_f16mf2(...) __riscv_vfmacc_vf_f16mf2_tu(__VA_ARGS__)

#define	vfmacc_vf_f16mf2_m(...) __riscv_vfmacc_vf_f16mf2_tumu(__VA_ARGS__)

#define	vfmacc_vf_f16mf4(...) __riscv_vfmacc_vf_f16mf4_tu(__VA_ARGS__)

#define	vfmacc_vf_f16mf4_m(...) __riscv_vfmacc_vf_f16mf4_tumu(__VA_ARGS__)

#define	vfmacc_vf_f32m1(...) __riscv_vfmacc_vf_f32m1_tu(__VA_ARGS__)

#define	vfmacc_vf_f32m1_m(...) __riscv_vfmacc_vf_f32m1_tumu(__VA_ARGS__)

#define	vfmacc_vf_f32m2(...) __riscv_vfmacc_vf_f32m2_tu(__VA_ARGS__)

#define	vfmacc_vf_f32m2_m(...) __riscv_vfmacc_vf_f32m2_tumu(__VA_ARGS__)

#define	vfmacc_vf_f32m4(...) __riscv_vfmacc_vf_f32m4_tu(__VA_ARGS__)

#define	vfmacc_vf_f32m4_m(...) __riscv_vfmacc_vf_f32m4_tumu(__VA_ARGS__)

#define	vfmacc_vf_f32m8(...) __riscv_vfmacc_vf_f32m8_tu(__VA_ARGS__)

#define	vfmacc_vf_f32m8_m(...) __riscv_vfmacc_vf_f32m8_tumu(__VA_ARGS__)

#define	vfmacc_vf_f32mf2(...) __riscv_vfmacc_vf_f32mf2_tu(__VA_ARGS__)

#define	vfmacc_vf_f32mf2_m(...) __riscv_vfmacc_vf_f32mf2_tumu(__VA_ARGS__)

#define	vfmacc_vf_f64m1(...) __riscv_vfmacc_vf_f64m1_tu(__VA_ARGS__)

#define	vfmacc_vf_f64m1_m(...) __riscv_vfmacc_vf_f64m1_tumu(__VA_ARGS__)

#define	vfmacc_vf_f64m2(...) __riscv_vfmacc_vf_f64m2_tu(__VA_ARGS__)

#define	vfmacc_vf_f64m2_m(...) __riscv_vfmacc_vf_f64m2_tumu(__VA_ARGS__)

#define	vfmacc_vf_f64m4(...) __riscv_vfmacc_vf_f64m4_tu(__VA_ARGS__)

#define	vfmacc_vf_f64m4_m(...) __riscv_vfmacc_vf_f64m4_tumu(__VA_ARGS__)

#define	vfmacc_vf_f64m8(...) __riscv_vfmacc_vf_f64m8_tu(__VA_ARGS__)

#define	vfmacc_vf_f64m8_m(...) __riscv_vfmacc_vf_f64m8_tumu(__VA_ARGS__)

#define	vfmacc_vv_f16m1(...) __riscv_vfmacc_vv_f16m1_tu(__VA_ARGS__)

#define	vfmacc_vv_f16m1_m(...) __riscv_vfmacc_vv_f16m1_tumu(__VA_ARGS__)

#define	vfmacc_vv_f16m2(...) __riscv_vfmacc_vv_f16m2_tu(__VA_ARGS__)

#define	vfmacc_vv_f16m2_m(...) __riscv_vfmacc_vv_f16m2_tumu(__VA_ARGS__)

#define	vfmacc_vv_f16m4(...) __riscv_vfmacc_vv_f16m4_tu(__VA_ARGS__)

#define	vfmacc_vv_f16m4_m(...) __riscv_vfmacc_vv_f16m4_tumu(__VA_ARGS__)

#define	vfmacc_vv_f16m8(...) __riscv_vfmacc_vv_f16m8_tu(__VA_ARGS__)

#define	vfmacc_vv_f16m8_m(...) __riscv_vfmacc_vv_f16m8_tumu(__VA_ARGS__)

#define	vfmacc_vv_f16mf2(...) __riscv_vfmacc_vv_f16mf2_tu(__VA_ARGS__)

#define	vfmacc_vv_f16mf2_m(...) __riscv_vfmacc_vv_f16mf2_tumu(__VA_ARGS__)

#define	vfmacc_vv_f16mf4(...) __riscv_vfmacc_vv_f16mf4_tu(__VA_ARGS__)

#define	vfmacc_vv_f16mf4_m(...) __riscv_vfmacc_vv_f16mf4_tumu(__VA_ARGS__)

#define	vfmacc_vv_f32m1(...) __riscv_vfmacc_vv_f32m1_tu(__VA_ARGS__)

#define	vfmacc_vv_f32m1_m(...) __riscv_vfmacc_vv_f32m1_tumu(__VA_ARGS__)

#define	vfmacc_vv_f32m2(...) __riscv_vfmacc_vv_f32m2_tu(__VA_ARGS__)

#define	vfmacc_vv_f32m2_m(...) __riscv_vfmacc_vv_f32m2_tumu(__VA_ARGS__)

#define	vfmacc_vv_f32m4(...) __riscv_vfmacc_vv_f32m4_tu(__VA_ARGS__)

#define	vfmacc_vv_f32m4_m(...) __riscv_vfmacc_vv_f32m4_tumu(__VA_ARGS__)

#define	vfmacc_vv_f32m8(...) __riscv_vfmacc_vv_f32m8_tu(__VA_ARGS__)

#define	vfmacc_vv_f32m8_m(...) __riscv_vfmacc_vv_f32m8_tumu(__VA_ARGS__)

#define	vfmacc_vv_f32mf2(...) __riscv_vfmacc_vv_f32mf2_tu(__VA_ARGS__)

#define	vfmacc_vv_f32mf2_m(...) __riscv_vfmacc_vv_f32mf2_tumu(__VA_ARGS__)

#define	vfmacc_vv_f64m1(...) __riscv_vfmacc_vv_f64m1_tu(__VA_ARGS__)

#define	vfmacc_vv_f64m1_m(...) __riscv_vfmacc_vv_f64m1_tumu(__VA_ARGS__)

#define	vfmacc_vv_f64m2(...) __riscv_vfmacc_vv_f64m2_tu(__VA_ARGS__)

#define	vfmacc_vv_f64m2_m(...) __riscv_vfmacc_vv_f64m2_tumu(__VA_ARGS__)

#define	vfmacc_vv_f64m4(...) __riscv_vfmacc_vv_f64m4_tu(__VA_ARGS__)

#define	vfmacc_vv_f64m4_m(...) __riscv_vfmacc_vv_f64m4_tumu(__VA_ARGS__)

#define	vfmacc_vv_f64m8(...) __riscv_vfmacc_vv_f64m8_tu(__VA_ARGS__)

#define	vfmacc_vv_f64m8_m(...) __riscv_vfmacc_vv_f64m8_tumu(__VA_ARGS__)

#define	vfmadd_vf_f16m1(...) __riscv_vfmadd_vf_f16m1_tu(__VA_ARGS__)

#define	vfmadd_vf_f16m1_m(...) __riscv_vfmadd_vf_f16m1_tumu(__VA_ARGS__)

#define	vfmadd_vf_f16m2(...) __riscv_vfmadd_vf_f16m2_tu(__VA_ARGS__)

#define	vfmadd_vf_f16m2_m(...) __riscv_vfmadd_vf_f16m2_tumu(__VA_ARGS__)

#define	vfmadd_vf_f16m4(...) __riscv_vfmadd_vf_f16m4_tu(__VA_ARGS__)

#define	vfmadd_vf_f16m4_m(...) __riscv_vfmadd_vf_f16m4_tumu(__VA_ARGS__)

#define	vfmadd_vf_f16m8(...) __riscv_vfmadd_vf_f16m8_tu(__VA_ARGS__)

#define	vfmadd_vf_f16m8_m(...) __riscv_vfmadd_vf_f16m8_tumu(__VA_ARGS__)

#define	vfmadd_vf_f16mf2(...) __riscv_vfmadd_vf_f16mf2_tu(__VA_ARGS__)

#define	vfmadd_vf_f16mf2_m(...) __riscv_vfmadd_vf_f16mf2_tumu(__VA_ARGS__)

#define	vfmadd_vf_f16mf4(...) __riscv_vfmadd_vf_f16mf4_tu(__VA_ARGS__)

#define	vfmadd_vf_f16mf4_m(...) __riscv_vfmadd_vf_f16mf4_tumu(__VA_ARGS__)

#define	vfmadd_vf_f32m1(...) __riscv_vfmadd_vf_f32m1_tu(__VA_ARGS__)

#define	vfmadd_vf_f32m1_m(...) __riscv_vfmadd_vf_f32m1_tumu(__VA_ARGS__)

#define	vfmadd_vf_f32m2(...) __riscv_vfmadd_vf_f32m2_tu(__VA_ARGS__)

#define	vfmadd_vf_f32m2_m(...) __riscv_vfmadd_vf_f32m2_tumu(__VA_ARGS__)

#define	vfmadd_vf_f32m4(...) __riscv_vfmadd_vf_f32m4_tu(__VA_ARGS__)

#define	vfmadd_vf_f32m4_m(...) __riscv_vfmadd_vf_f32m4_tumu(__VA_ARGS__)

#define	vfmadd_vf_f32m8(...) __riscv_vfmadd_vf_f32m8_tu(__VA_ARGS__)

#define	vfmadd_vf_f32m8_m(...) __riscv_vfmadd_vf_f32m8_tumu(__VA_ARGS__)

#define	vfmadd_vf_f32mf2(...) __riscv_vfmadd_vf_f32mf2_tu(__VA_ARGS__)

#define	vfmadd_vf_f32mf2_m(...) __riscv_vfmadd_vf_f32mf2_tumu(__VA_ARGS__)

#define	vfmadd_vf_f64m1(...) __riscv_vfmadd_vf_f64m1_tu(__VA_ARGS__)

#define	vfmadd_vf_f64m1_m(...) __riscv_vfmadd_vf_f64m1_tumu(__VA_ARGS__)

#define	vfmadd_vf_f64m2(...) __riscv_vfmadd_vf_f64m2_tu(__VA_ARGS__)

#define	vfmadd_vf_f64m2_m(...) __riscv_vfmadd_vf_f64m2_tumu(__VA_ARGS__)

#define	vfmadd_vf_f64m4(...) __riscv_vfmadd_vf_f64m4_tu(__VA_ARGS__)

#define	vfmadd_vf_f64m4_m(...) __riscv_vfmadd_vf_f64m4_tumu(__VA_ARGS__)

#define	vfmadd_vf_f64m8(...) __riscv_vfmadd_vf_f64m8_tu(__VA_ARGS__)

#define	vfmadd_vf_f64m8_m(...) __riscv_vfmadd_vf_f64m8_tumu(__VA_ARGS__)

#define	vfmadd_vv_f16m1(...) __riscv_vfmadd_vv_f16m1_tu(__VA_ARGS__)

#define	vfmadd_vv_f16m1_m(...) __riscv_vfmadd_vv_f16m1_tumu(__VA_ARGS__)

#define	vfmadd_vv_f16m2(...) __riscv_vfmadd_vv_f16m2_tu(__VA_ARGS__)

#define	vfmadd_vv_f16m2_m(...) __riscv_vfmadd_vv_f16m2_tumu(__VA_ARGS__)

#define	vfmadd_vv_f16m4(...) __riscv_vfmadd_vv_f16m4_tu(__VA_ARGS__)

#define	vfmadd_vv_f16m4_m(...) __riscv_vfmadd_vv_f16m4_tumu(__VA_ARGS__)

#define	vfmadd_vv_f16m8(...) __riscv_vfmadd_vv_f16m8_tu(__VA_ARGS__)

#define	vfmadd_vv_f16m8_m(...) __riscv_vfmadd_vv_f16m8_tumu(__VA_ARGS__)

#define	vfmadd_vv_f16mf2(...) __riscv_vfmadd_vv_f16mf2_tu(__VA_ARGS__)

#define	vfmadd_vv_f16mf2_m(...) __riscv_vfmadd_vv_f16mf2_tumu(__VA_ARGS__)

#define	vfmadd_vv_f16mf4(...) __riscv_vfmadd_vv_f16mf4_tu(__VA_ARGS__)

#define	vfmadd_vv_f16mf4_m(...) __riscv_vfmadd_vv_f16mf4_tumu(__VA_ARGS__)

#define	vfmadd_vv_f32m1(...) __riscv_vfmadd_vv_f32m1_tu(__VA_ARGS__)

#define	vfmadd_vv_f32m1_m(...) __riscv_vfmadd_vv_f32m1_tumu(__VA_ARGS__)

#define	vfmadd_vv_f32m2(...) __riscv_vfmadd_vv_f32m2_tu(__VA_ARGS__)

#define	vfmadd_vv_f32m2_m(...) __riscv_vfmadd_vv_f32m2_tumu(__VA_ARGS__)

#define	vfmadd_vv_f32m4(...) __riscv_vfmadd_vv_f32m4_tu(__VA_ARGS__)

#define	vfmadd_vv_f32m4_m(...) __riscv_vfmadd_vv_f32m4_tumu(__VA_ARGS__)

#define	vfmadd_vv_f32m8(...) __riscv_vfmadd_vv_f32m8_tu(__VA_ARGS__)

#define	vfmadd_vv_f32m8_m(...) __riscv_vfmadd_vv_f32m8_tumu(__VA_ARGS__)

#define	vfmadd_vv_f32mf2(...) __riscv_vfmadd_vv_f32mf2_tu(__VA_ARGS__)

#define	vfmadd_vv_f32mf2_m(...) __riscv_vfmadd_vv_f32mf2_tumu(__VA_ARGS__)

#define	vfmadd_vv_f64m1(...) __riscv_vfmadd_vv_f64m1_tu(__VA_ARGS__)

#define	vfmadd_vv_f64m1_m(...) __riscv_vfmadd_vv_f64m1_tumu(__VA_ARGS__)

#define	vfmadd_vv_f64m2(...) __riscv_vfmadd_vv_f64m2_tu(__VA_ARGS__)

#define	vfmadd_vv_f64m2_m(...) __riscv_vfmadd_vv_f64m2_tumu(__VA_ARGS__)

#define	vfmadd_vv_f64m4(...) __riscv_vfmadd_vv_f64m4_tu(__VA_ARGS__)

#define	vfmadd_vv_f64m4_m(...) __riscv_vfmadd_vv_f64m4_tumu(__VA_ARGS__)

#define	vfmadd_vv_f64m8(...) __riscv_vfmadd_vv_f64m8_tu(__VA_ARGS__)

#define	vfmadd_vv_f64m8_m(...) __riscv_vfmadd_vv_f64m8_tumu(__VA_ARGS__)

#define	vfmax_vf_f16m1(...) __riscv_vfmax_vf_f16m1(__VA_ARGS__)

#define	vfmax_vf_f16m1_m(...) __riscv_vfmax_vf_f16m1_tumu(__VA_ARGS__)

#define	vfmax_vf_f16m2(...) __riscv_vfmax_vf_f16m2(__VA_ARGS__)

#define	vfmax_vf_f16m2_m(...) __riscv_vfmax_vf_f16m2_tumu(__VA_ARGS__)

#define	vfmax_vf_f16m4(...) __riscv_vfmax_vf_f16m4(__VA_ARGS__)

#define	vfmax_vf_f16m4_m(...) __riscv_vfmax_vf_f16m4_tumu(__VA_ARGS__)

#define	vfmax_vf_f16m8(...) __riscv_vfmax_vf_f16m8(__VA_ARGS__)

#define	vfmax_vf_f16m8_m(...) __riscv_vfmax_vf_f16m8_tumu(__VA_ARGS__)

#define	vfmax_vf_f16mf2(...) __riscv_vfmax_vf_f16mf2(__VA_ARGS__)

#define	vfmax_vf_f16mf2_m(...) __riscv_vfmax_vf_f16mf2_tumu(__VA_ARGS__)

#define	vfmax_vf_f16mf4(...) __riscv_vfmax_vf_f16mf4(__VA_ARGS__)

#define	vfmax_vf_f16mf4_m(...) __riscv_vfmax_vf_f16mf4_tumu(__VA_ARGS__)

#define	vfmax_vf_f32m1(...) __riscv_vfmax_vf_f32m1(__VA_ARGS__)

#define	vfmax_vf_f32m1_m(...) __riscv_vfmax_vf_f32m1_tumu(__VA_ARGS__)

#define	vfmax_vf_f32m2(...) __riscv_vfmax_vf_f32m2(__VA_ARGS__)

#define	vfmax_vf_f32m2_m(...) __riscv_vfmax_vf_f32m2_tumu(__VA_ARGS__)

#define	vfmax_vf_f32m4(...) __riscv_vfmax_vf_f32m4(__VA_ARGS__)

#define	vfmax_vf_f32m4_m(...) __riscv_vfmax_vf_f32m4_tumu(__VA_ARGS__)

#define	vfmax_vf_f32m8(...) __riscv_vfmax_vf_f32m8(__VA_ARGS__)

#define	vfmax_vf_f32m8_m(...) __riscv_vfmax_vf_f32m8_tumu(__VA_ARGS__)

#define	vfmax_vf_f32mf2(...) __riscv_vfmax_vf_f32mf2(__VA_ARGS__)

#define	vfmax_vf_f32mf2_m(...) __riscv_vfmax_vf_f32mf2_tumu(__VA_ARGS__)

#define	vfmax_vf_f64m1(...) __riscv_vfmax_vf_f64m1(__VA_ARGS__)

#define	vfmax_vf_f64m1_m(...) __riscv_vfmax_vf_f64m1_tumu(__VA_ARGS__)

#define	vfmax_vf_f64m2(...) __riscv_vfmax_vf_f64m2(__VA_ARGS__)

#define	vfmax_vf_f64m2_m(...) __riscv_vfmax_vf_f64m2_tumu(__VA_ARGS__)

#define	vfmax_vf_f64m4(...) __riscv_vfmax_vf_f64m4(__VA_ARGS__)

#define	vfmax_vf_f64m4_m(...) __riscv_vfmax_vf_f64m4_tumu(__VA_ARGS__)

#define	vfmax_vf_f64m8(...) __riscv_vfmax_vf_f64m8(__VA_ARGS__)

#define	vfmax_vf_f64m8_m(...) __riscv_vfmax_vf_f64m8_tumu(__VA_ARGS__)

#define	vfmax_vv_f16m1(...) __riscv_vfmax_vv_f16m1(__VA_ARGS__)

#define	vfmax_vv_f16m1_m(...) __riscv_vfmax_vv_f16m1_tumu(__VA_ARGS__)

#define	vfmax_vv_f16m2(...) __riscv_vfmax_vv_f16m2(__VA_ARGS__)

#define	vfmax_vv_f16m2_m(...) __riscv_vfmax_vv_f16m2_tumu(__VA_ARGS__)

#define	vfmax_vv_f16m4(...) __riscv_vfmax_vv_f16m4(__VA_ARGS__)

#define	vfmax_vv_f16m4_m(...) __riscv_vfmax_vv_f16m4_tumu(__VA_ARGS__)

#define	vfmax_vv_f16m8(...) __riscv_vfmax_vv_f16m8(__VA_ARGS__)

#define	vfmax_vv_f16m8_m(...) __riscv_vfmax_vv_f16m8_tumu(__VA_ARGS__)

#define	vfmax_vv_f16mf2(...) __riscv_vfmax_vv_f16mf2(__VA_ARGS__)

#define	vfmax_vv_f16mf2_m(...) __riscv_vfmax_vv_f16mf2_tumu(__VA_ARGS__)

#define	vfmax_vv_f16mf4(...) __riscv_vfmax_vv_f16mf4(__VA_ARGS__)

#define	vfmax_vv_f16mf4_m(...) __riscv_vfmax_vv_f16mf4_tumu(__VA_ARGS__)

#define	vfmax_vv_f32m1(...) __riscv_vfmax_vv_f32m1(__VA_ARGS__)

#define	vfmax_vv_f32m1_m(...) __riscv_vfmax_vv_f32m1_tumu(__VA_ARGS__)

#define	vfmax_vv_f32m2(...) __riscv_vfmax_vv_f32m2(__VA_ARGS__)

#define	vfmax_vv_f32m2_m(...) __riscv_vfmax_vv_f32m2_tumu(__VA_ARGS__)

#define	vfmax_vv_f32m4(...) __riscv_vfmax_vv_f32m4(__VA_ARGS__)

#define	vfmax_vv_f32m4_m(...) __riscv_vfmax_vv_f32m4_tumu(__VA_ARGS__)

#define	vfmax_vv_f32m8(...) __riscv_vfmax_vv_f32m8(__VA_ARGS__)

#define	vfmax_vv_f32m8_m(...) __riscv_vfmax_vv_f32m8_tumu(__VA_ARGS__)

#define	vfmax_vv_f32mf2(...) __riscv_vfmax_vv_f32mf2(__VA_ARGS__)

#define	vfmax_vv_f32mf2_m(...) __riscv_vfmax_vv_f32mf2_tumu(__VA_ARGS__)

#define	vfmax_vv_f64m1(...) __riscv_vfmax_vv_f64m1(__VA_ARGS__)

#define	vfmax_vv_f64m1_m(...) __riscv_vfmax_vv_f64m1_tumu(__VA_ARGS__)

#define	vfmax_vv_f64m2(...) __riscv_vfmax_vv_f64m2(__VA_ARGS__)

#define	vfmax_vv_f64m2_m(...) __riscv_vfmax_vv_f64m2_tumu(__VA_ARGS__)

#define	vfmax_vv_f64m4(...) __riscv_vfmax_vv_f64m4(__VA_ARGS__)

#define	vfmax_vv_f64m4_m(...) __riscv_vfmax_vv_f64m4_tumu(__VA_ARGS__)

#define	vfmax_vv_f64m8(...) __riscv_vfmax_vv_f64m8(__VA_ARGS__)

#define	vfmax_vv_f64m8_m(...) __riscv_vfmax_vv_f64m8_tumu(__VA_ARGS__)

#define	vfmerge_vfm_f16m1(mask, op1, op2, vl) __riscv_vfmerge_vfm_f16m1((op1), (op2), (mask), (vl))

#define	vfmerge_vfm_f16m2(mask, op1, op2, vl) __riscv_vfmerge_vfm_f16m2((op1), (op2), (mask), (vl))

#define	vfmerge_vfm_f16m4(mask, op1, op2, vl) __riscv_vfmerge_vfm_f16m4((op1), (op2), (mask), (vl))

#define	vfmerge_vfm_f16m8(mask, op1, op2, vl) __riscv_vfmerge_vfm_f16m8((op1), (op2), (mask), (vl))

#define	vfmerge_vfm_f16mf2(mask, op1, op2, vl) __riscv_vfmerge_vfm_f16mf2((op1), (op2), (mask), (vl))

#define	vfmerge_vfm_f16mf4(mask, op1, op2, vl) __riscv_vfmerge_vfm_f16mf4((op1), (op2), (mask), (vl))

#define	vfmerge_vfm_f32m1(mask, op1, op2, vl) __riscv_vfmerge_vfm_f32m1((op1), (op2), (mask), (vl))

#define	vfmerge_vfm_f32m2(mask, op1, op2, vl) __riscv_vfmerge_vfm_f32m2((op1), (op2), (mask), (vl))

#define	vfmerge_vfm_f32m4(mask, op1, op2, vl) __riscv_vfmerge_vfm_f32m4((op1), (op2), (mask), (vl))

#define	vfmerge_vfm_f32m8(mask, op1, op2, vl) __riscv_vfmerge_vfm_f32m8((op1), (op2), (mask), (vl))

#define	vfmerge_vfm_f32mf2(mask, op1, op2, vl) __riscv_vfmerge_vfm_f32mf2((op1), (op2), (mask), (vl))

#define	vfmerge_vfm_f64m1(mask, op1, op2, vl) __riscv_vfmerge_vfm_f64m1((op1), (op2), (mask), (vl))

#define	vfmerge_vfm_f64m2(mask, op1, op2, vl) __riscv_vfmerge_vfm_f64m2((op1), (op2), (mask), (vl))

#define	vfmerge_vfm_f64m4(mask, op1, op2, vl) __riscv_vfmerge_vfm_f64m4((op1), (op2), (mask), (vl))

#define	vfmerge_vfm_f64m8(mask, op1, op2, vl) __riscv_vfmerge_vfm_f64m8((op1), (op2), (mask), (vl))

#define	vfmin_vf_f16m1(...) __riscv_vfmin_vf_f16m1(__VA_ARGS__)

#define	vfmin_vf_f16m1_m(...) __riscv_vfmin_vf_f16m1_tumu(__VA_ARGS__)

#define	vfmin_vf_f16m2(...) __riscv_vfmin_vf_f16m2(__VA_ARGS__)

#define	vfmin_vf_f16m2_m(...) __riscv_vfmin_vf_f16m2_tumu(__VA_ARGS__)

#define	vfmin_vf_f16m4(...) __riscv_vfmin_vf_f16m4(__VA_ARGS__)

#define	vfmin_vf_f16m4_m(...) __riscv_vfmin_vf_f16m4_tumu(__VA_ARGS__)

#define	vfmin_vf_f16m8(...) __riscv_vfmin_vf_f16m8(__VA_ARGS__)

#define	vfmin_vf_f16m8_m(...) __riscv_vfmin_vf_f16m8_tumu(__VA_ARGS__)

#define	vfmin_vf_f16mf2(...) __riscv_vfmin_vf_f16mf2(__VA_ARGS__)

#define	vfmin_vf_f16mf2_m(...) __riscv_vfmin_vf_f16mf2_tumu(__VA_ARGS__)

#define	vfmin_vf_f16mf4(...) __riscv_vfmin_vf_f16mf4(__VA_ARGS__)

#define	vfmin_vf_f16mf4_m(...) __riscv_vfmin_vf_f16mf4_tumu(__VA_ARGS__)

#define	vfmin_vf_f32m1(...) __riscv_vfmin_vf_f32m1(__VA_ARGS__)

#define	vfmin_vf_f32m1_m(...) __riscv_vfmin_vf_f32m1_tumu(__VA_ARGS__)

#define	vfmin_vf_f32m2(...) __riscv_vfmin_vf_f32m2(__VA_ARGS__)

#define	vfmin_vf_f32m2_m(...) __riscv_vfmin_vf_f32m2_tumu(__VA_ARGS__)

#define	vfmin_vf_f32m4(...) __riscv_vfmin_vf_f32m4(__VA_ARGS__)

#define	vfmin_vf_f32m4_m(...) __riscv_vfmin_vf_f32m4_tumu(__VA_ARGS__)

#define	vfmin_vf_f32m8(...) __riscv_vfmin_vf_f32m8(__VA_ARGS__)

#define	vfmin_vf_f32m8_m(...) __riscv_vfmin_vf_f32m8_tumu(__VA_ARGS__)

#define	vfmin_vf_f32mf2(...) __riscv_vfmin_vf_f32mf2(__VA_ARGS__)

#define	vfmin_vf_f32mf2_m(...) __riscv_vfmin_vf_f32mf2_tumu(__VA_ARGS__)

#define	vfmin_vf_f64m1(...) __riscv_vfmin_vf_f64m1(__VA_ARGS__)

#define	vfmin_vf_f64m1_m(...) __riscv_vfmin_vf_f64m1_tumu(__VA_ARGS__)

#define	vfmin_vf_f64m2(...) __riscv_vfmin_vf_f64m2(__VA_ARGS__)

#define	vfmin_vf_f64m2_m(...) __riscv_vfmin_vf_f64m2_tumu(__VA_ARGS__)

#define	vfmin_vf_f64m4(...) __riscv_vfmin_vf_f64m4(__VA_ARGS__)

#define	vfmin_vf_f64m4_m(...) __riscv_vfmin_vf_f64m4_tumu(__VA_ARGS__)

#define	vfmin_vf_f64m8(...) __riscv_vfmin_vf_f64m8(__VA_ARGS__)

#define	vfmin_vf_f64m8_m(...) __riscv_vfmin_vf_f64m8_tumu(__VA_ARGS__)

#define	vfmin_vv_f16m1(...) __riscv_vfmin_vv_f16m1(__VA_ARGS__)

#define	vfmin_vv_f16m1_m(...) __riscv_vfmin_vv_f16m1_tumu(__VA_ARGS__)

#define	vfmin_vv_f16m2(...) __riscv_vfmin_vv_f16m2(__VA_ARGS__)

#define	vfmin_vv_f16m2_m(...) __riscv_vfmin_vv_f16m2_tumu(__VA_ARGS__)

#define	vfmin_vv_f16m4(...) __riscv_vfmin_vv_f16m4(__VA_ARGS__)

#define	vfmin_vv_f16m4_m(...) __riscv_vfmin_vv_f16m4_tumu(__VA_ARGS__)

#define	vfmin_vv_f16m8(...) __riscv_vfmin_vv_f16m8(__VA_ARGS__)

#define	vfmin_vv_f16m8_m(...) __riscv_vfmin_vv_f16m8_tumu(__VA_ARGS__)

#define	vfmin_vv_f16mf2(...) __riscv_vfmin_vv_f16mf2(__VA_ARGS__)

#define	vfmin_vv_f16mf2_m(...) __riscv_vfmin_vv_f16mf2_tumu(__VA_ARGS__)

#define	vfmin_vv_f16mf4(...) __riscv_vfmin_vv_f16mf4(__VA_ARGS__)

#define	vfmin_vv_f16mf4_m(...) __riscv_vfmin_vv_f16mf4_tumu(__VA_ARGS__)

#define	vfmin_vv_f32m1(...) __riscv_vfmin_vv_f32m1(__VA_ARGS__)

#define	vfmin_vv_f32m1_m(...) __riscv_vfmin_vv_f32m1_tumu(__VA_ARGS__)

#define	vfmin_vv_f32m2(...) __riscv_vfmin_vv_f32m2(__VA_ARGS__)

#define	vfmin_vv_f32m2_m(...) __riscv_vfmin_vv_f32m2_tumu(__VA_ARGS__)

#define	vfmin_vv_f32m4(...) __riscv_vfmin_vv_f32m4(__VA_ARGS__)

#define	vfmin_vv_f32m4_m(...) __riscv_vfmin_vv_f32m4_tumu(__VA_ARGS__)

#define	vfmin_vv_f32m8(...) __riscv_vfmin_vv_f32m8(__VA_ARGS__)

#define	vfmin_vv_f32m8_m(...) __riscv_vfmin_vv_f32m8_tumu(__VA_ARGS__)

#define	vfmin_vv_f32mf2(...) __riscv_vfmin_vv_f32mf2(__VA_ARGS__)

#define	vfmin_vv_f32mf2_m(...) __riscv_vfmin_vv_f32mf2_tumu(__VA_ARGS__)

#define	vfmin_vv_f64m1(...) __riscv_vfmin_vv_f64m1(__VA_ARGS__)

#define	vfmin_vv_f64m1_m(...) __riscv_vfmin_vv_f64m1_tumu(__VA_ARGS__)

#define	vfmin_vv_f64m2(...) __riscv_vfmin_vv_f64m2(__VA_ARGS__)

#define	vfmin_vv_f64m2_m(...) __riscv_vfmin_vv_f64m2_tumu(__VA_ARGS__)

#define	vfmin_vv_f64m4(...) __riscv_vfmin_vv_f64m4(__VA_ARGS__)

#define	vfmin_vv_f64m4_m(...) __riscv_vfmin_vv_f64m4_tumu(__VA_ARGS__)

#define	vfmin_vv_f64m8(...) __riscv_vfmin_vv_f64m8(__VA_ARGS__)

#define	vfmin_vv_f64m8_m(...) __riscv_vfmin_vv_f64m8_tumu(__VA_ARGS__)

#define	vfmsac_vf_f16m1(...) __riscv_vfmsac_vf_f16m1_tu(__VA_ARGS__)

#define	vfmsac_vf_f16m1_m(...) __riscv_vfmsac_vf_f16m1_tumu(__VA_ARGS__)

#define	vfmsac_vf_f16m2(...) __riscv_vfmsac_vf_f16m2_tu(__VA_ARGS__)

#define	vfmsac_vf_f16m2_m(...) __riscv_vfmsac_vf_f16m2_tumu(__VA_ARGS__)

#define	vfmsac_vf_f16m4(...) __riscv_vfmsac_vf_f16m4_tu(__VA_ARGS__)

#define	vfmsac_vf_f16m4_m(...) __riscv_vfmsac_vf_f16m4_tumu(__VA_ARGS__)

#define	vfmsac_vf_f16m8(...) __riscv_vfmsac_vf_f16m8_tu(__VA_ARGS__)

#define	vfmsac_vf_f16m8_m(...) __riscv_vfmsac_vf_f16m8_tumu(__VA_ARGS__)

#define	vfmsac_vf_f16mf2(...) __riscv_vfmsac_vf_f16mf2_tu(__VA_ARGS__)

#define	vfmsac_vf_f16mf2_m(...) __riscv_vfmsac_vf_f16mf2_tumu(__VA_ARGS__)

#define	vfmsac_vf_f16mf4(...) __riscv_vfmsac_vf_f16mf4_tu(__VA_ARGS__)

#define	vfmsac_vf_f16mf4_m(...) __riscv_vfmsac_vf_f16mf4_tumu(__VA_ARGS__)

#define	vfmsac_vf_f32m1(...) __riscv_vfmsac_vf_f32m1_tu(__VA_ARGS__)

#define	vfmsac_vf_f32m1_m(...) __riscv_vfmsac_vf_f32m1_tumu(__VA_ARGS__)

#define	vfmsac_vf_f32m2(...) __riscv_vfmsac_vf_f32m2_tu(__VA_ARGS__)

#define	vfmsac_vf_f32m2_m(...) __riscv_vfmsac_vf_f32m2_tumu(__VA_ARGS__)

#define	vfmsac_vf_f32m4(...) __riscv_vfmsac_vf_f32m4_tu(__VA_ARGS__)

#define	vfmsac_vf_f32m4_m(...) __riscv_vfmsac_vf_f32m4_tumu(__VA_ARGS__)

#define	vfmsac_vf_f32m8(...) __riscv_vfmsac_vf_f32m8_tu(__VA_ARGS__)

#define	vfmsac_vf_f32m8_m(...) __riscv_vfmsac_vf_f32m8_tumu(__VA_ARGS__)

#define	vfmsac_vf_f32mf2(...) __riscv_vfmsac_vf_f32mf2_tu(__VA_ARGS__)

#define	vfmsac_vf_f32mf2_m(...) __riscv_vfmsac_vf_f32mf2_tumu(__VA_ARGS__)

#define	vfmsac_vf_f64m1(...) __riscv_vfmsac_vf_f64m1_tu(__VA_ARGS__)

#define	vfmsac_vf_f64m1_m(...) __riscv_vfmsac_vf_f64m1_tumu(__VA_ARGS__)

#define	vfmsac_vf_f64m2(...) __riscv_vfmsac_vf_f64m2_tu(__VA_ARGS__)

#define	vfmsac_vf_f64m2_m(...) __riscv_vfmsac_vf_f64m2_tumu(__VA_ARGS__)

#define	vfmsac_vf_f64m4(...) __riscv_vfmsac_vf_f64m4_tu(__VA_ARGS__)

#define	vfmsac_vf_f64m4_m(...) __riscv_vfmsac_vf_f64m4_tumu(__VA_ARGS__)

#define	vfmsac_vf_f64m8(...) __riscv_vfmsac_vf_f64m8_tu(__VA_ARGS__)

#define	vfmsac_vf_f64m8_m(...) __riscv_vfmsac_vf_f64m8_tumu(__VA_ARGS__)

#define	vfmsac_vv_f16m1(...) __riscv_vfmsac_vv_f16m1_tu(__VA_ARGS__)

#define	vfmsac_vv_f16m1_m(...) __riscv_vfmsac_vv_f16m1_tumu(__VA_ARGS__)

#define	vfmsac_vv_f16m2(...) __riscv_vfmsac_vv_f16m2_tu(__VA_ARGS__)

#define	vfmsac_vv_f16m2_m(...) __riscv_vfmsac_vv_f16m2_tumu(__VA_ARGS__)

#define	vfmsac_vv_f16m4(...) __riscv_vfmsac_vv_f16m4_tu(__VA_ARGS__)

#define	vfmsac_vv_f16m4_m(...) __riscv_vfmsac_vv_f16m4_tumu(__VA_ARGS__)

#define	vfmsac_vv_f16m8(...) __riscv_vfmsac_vv_f16m8_tu(__VA_ARGS__)

#define	vfmsac_vv_f16m8_m(...) __riscv_vfmsac_vv_f16m8_tumu(__VA_ARGS__)

#define	vfmsac_vv_f16mf2(...) __riscv_vfmsac_vv_f16mf2_tu(__VA_ARGS__)

#define	vfmsac_vv_f16mf2_m(...) __riscv_vfmsac_vv_f16mf2_tumu(__VA_ARGS__)

#define	vfmsac_vv_f16mf4(...) __riscv_vfmsac_vv_f16mf4_tu(__VA_ARGS__)

#define	vfmsac_vv_f16mf4_m(...) __riscv_vfmsac_vv_f16mf4_tumu(__VA_ARGS__)

#define	vfmsac_vv_f32m1(...) __riscv_vfmsac_vv_f32m1_tu(__VA_ARGS__)

#define	vfmsac_vv_f32m1_m(...) __riscv_vfmsac_vv_f32m1_tumu(__VA_ARGS__)

#define	vfmsac_vv_f32m2(...) __riscv_vfmsac_vv_f32m2_tu(__VA_ARGS__)

#define	vfmsac_vv_f32m2_m(...) __riscv_vfmsac_vv_f32m2_tumu(__VA_ARGS__)

#define	vfmsac_vv_f32m4(...) __riscv_vfmsac_vv_f32m4_tu(__VA_ARGS__)

#define	vfmsac_vv_f32m4_m(...) __riscv_vfmsac_vv_f32m4_tumu(__VA_ARGS__)

#define	vfmsac_vv_f32m8(...) __riscv_vfmsac_vv_f32m8_tu(__VA_ARGS__)

#define	vfmsac_vv_f32m8_m(...) __riscv_vfmsac_vv_f32m8_tumu(__VA_ARGS__)

#define	vfmsac_vv_f32mf2(...) __riscv_vfmsac_vv_f32mf2_tu(__VA_ARGS__)

#define	vfmsac_vv_f32mf2_m(...) __riscv_vfmsac_vv_f32mf2_tumu(__VA_ARGS__)

#define	vfmsac_vv_f64m1(...) __riscv_vfmsac_vv_f64m1_tu(__VA_ARGS__)

#define	vfmsac_vv_f64m1_m(...) __riscv_vfmsac_vv_f64m1_tumu(__VA_ARGS__)

#define	vfmsac_vv_f64m2(...) __riscv_vfmsac_vv_f64m2_tu(__VA_ARGS__)

#define	vfmsac_vv_f64m2_m(...) __riscv_vfmsac_vv_f64m2_tumu(__VA_ARGS__)

#define	vfmsac_vv_f64m4(...) __riscv_vfmsac_vv_f64m4_tu(__VA_ARGS__)

#define	vfmsac_vv_f64m4_m(...) __riscv_vfmsac_vv_f64m4_tumu(__VA_ARGS__)

#define	vfmsac_vv_f64m8(...) __riscv_vfmsac_vv_f64m8_tu(__VA_ARGS__)

#define	vfmsac_vv_f64m8_m(...) __riscv_vfmsac_vv_f64m8_tumu(__VA_ARGS__)

#define	vfmsub_vf_f16m1(...) __riscv_vfmsub_vf_f16m1_tu(__VA_ARGS__)

#define	vfmsub_vf_f16m1_m(...) __riscv_vfmsub_vf_f16m1_tumu(__VA_ARGS__)

#define	vfmsub_vf_f16m2(...) __riscv_vfmsub_vf_f16m2_tu(__VA_ARGS__)

#define	vfmsub_vf_f16m2_m(...) __riscv_vfmsub_vf_f16m2_tumu(__VA_ARGS__)

#define	vfmsub_vf_f16m4(...) __riscv_vfmsub_vf_f16m4_tu(__VA_ARGS__)

#define	vfmsub_vf_f16m4_m(...) __riscv_vfmsub_vf_f16m4_tumu(__VA_ARGS__)

#define	vfmsub_vf_f16m8(...) __riscv_vfmsub_vf_f16m8_tu(__VA_ARGS__)

#define	vfmsub_vf_f16m8_m(...) __riscv_vfmsub_vf_f16m8_tumu(__VA_ARGS__)

#define	vfmsub_vf_f16mf2(...) __riscv_vfmsub_vf_f16mf2_tu(__VA_ARGS__)

#define	vfmsub_vf_f16mf2_m(...) __riscv_vfmsub_vf_f16mf2_tumu(__VA_ARGS__)

#define	vfmsub_vf_f16mf4(...) __riscv_vfmsub_vf_f16mf4_tu(__VA_ARGS__)

#define	vfmsub_vf_f16mf4_m(...) __riscv_vfmsub_vf_f16mf4_tumu(__VA_ARGS__)

#define	vfmsub_vf_f32m1(...) __riscv_vfmsub_vf_f32m1_tu(__VA_ARGS__)

#define	vfmsub_vf_f32m1_m(...) __riscv_vfmsub_vf_f32m1_tumu(__VA_ARGS__)

#define	vfmsub_vf_f32m2(...) __riscv_vfmsub_vf_f32m2_tu(__VA_ARGS__)

#define	vfmsub_vf_f32m2_m(...) __riscv_vfmsub_vf_f32m2_tumu(__VA_ARGS__)

#define	vfmsub_vf_f32m4(...) __riscv_vfmsub_vf_f32m4_tu(__VA_ARGS__)

#define	vfmsub_vf_f32m4_m(...) __riscv_vfmsub_vf_f32m4_tumu(__VA_ARGS__)

#define	vfmsub_vf_f32m8(...) __riscv_vfmsub_vf_f32m8_tu(__VA_ARGS__)

#define	vfmsub_vf_f32m8_m(...) __riscv_vfmsub_vf_f32m8_tumu(__VA_ARGS__)

#define	vfmsub_vf_f32mf2(...) __riscv_vfmsub_vf_f32mf2_tu(__VA_ARGS__)

#define	vfmsub_vf_f32mf2_m(...) __riscv_vfmsub_vf_f32mf2_tumu(__VA_ARGS__)

#define	vfmsub_vf_f64m1(...) __riscv_vfmsub_vf_f64m1_tu(__VA_ARGS__)

#define	vfmsub_vf_f64m1_m(...) __riscv_vfmsub_vf_f64m1_tumu(__VA_ARGS__)

#define	vfmsub_vf_f64m2(...) __riscv_vfmsub_vf_f64m2_tu(__VA_ARGS__)

#define	vfmsub_vf_f64m2_m(...) __riscv_vfmsub_vf_f64m2_tumu(__VA_ARGS__)

#define	vfmsub_vf_f64m4(...) __riscv_vfmsub_vf_f64m4_tu(__VA_ARGS__)

#define	vfmsub_vf_f64m4_m(...) __riscv_vfmsub_vf_f64m4_tumu(__VA_ARGS__)

#define	vfmsub_vf_f64m8(...) __riscv_vfmsub_vf_f64m8_tu(__VA_ARGS__)

#define	vfmsub_vf_f64m8_m(...) __riscv_vfmsub_vf_f64m8_tumu(__VA_ARGS__)

#define	vfmsub_vv_f16m1(...) __riscv_vfmsub_vv_f16m1_tu(__VA_ARGS__)

#define	vfmsub_vv_f16m1_m(...) __riscv_vfmsub_vv_f16m1_tumu(__VA_ARGS__)

#define	vfmsub_vv_f16m2(...) __riscv_vfmsub_vv_f16m2_tu(__VA_ARGS__)

#define	vfmsub_vv_f16m2_m(...) __riscv_vfmsub_vv_f16m2_tumu(__VA_ARGS__)

#define	vfmsub_vv_f16m4(...) __riscv_vfmsub_vv_f16m4_tu(__VA_ARGS__)

#define	vfmsub_vv_f16m4_m(...) __riscv_vfmsub_vv_f16m4_tumu(__VA_ARGS__)

#define	vfmsub_vv_f16m8(...) __riscv_vfmsub_vv_f16m8_tu(__VA_ARGS__)

#define	vfmsub_vv_f16m8_m(...) __riscv_vfmsub_vv_f16m8_tumu(__VA_ARGS__)

#define	vfmsub_vv_f16mf2(...) __riscv_vfmsub_vv_f16mf2_tu(__VA_ARGS__)

#define	vfmsub_vv_f16mf2_m(...) __riscv_vfmsub_vv_f16mf2_tumu(__VA_ARGS__)

#define	vfmsub_vv_f16mf4(...) __riscv_vfmsub_vv_f16mf4_tu(__VA_ARGS__)

#define	vfmsub_vv_f16mf4_m(...) __riscv_vfmsub_vv_f16mf4_tumu(__VA_ARGS__)

#define	vfmsub_vv_f32m1(...) __riscv_vfmsub_vv_f32m1_tu(__VA_ARGS__)

#define	vfmsub_vv_f32m1_m(...) __riscv_vfmsub_vv_f32m1_tumu(__VA_ARGS__)

#define	vfmsub_vv_f32m2(...) __riscv_vfmsub_vv_f32m2_tu(__VA_ARGS__)

#define	vfmsub_vv_f32m2_m(...) __riscv_vfmsub_vv_f32m2_tumu(__VA_ARGS__)

#define	vfmsub_vv_f32m4(...) __riscv_vfmsub_vv_f32m4_tu(__VA_ARGS__)

#define	vfmsub_vv_f32m4_m(...) __riscv_vfmsub_vv_f32m4_tumu(__VA_ARGS__)

#define	vfmsub_vv_f32m8(...) __riscv_vfmsub_vv_f32m8_tu(__VA_ARGS__)

#define	vfmsub_vv_f32m8_m(...) __riscv_vfmsub_vv_f32m8_tumu(__VA_ARGS__)

#define	vfmsub_vv_f32mf2(...) __riscv_vfmsub_vv_f32mf2_tu(__VA_ARGS__)

#define	vfmsub_vv_f32mf2_m(...) __riscv_vfmsub_vv_f32mf2_tumu(__VA_ARGS__)

#define	vfmsub_vv_f64m1(...) __riscv_vfmsub_vv_f64m1_tu(__VA_ARGS__)

#define	vfmsub_vv_f64m1_m(...) __riscv_vfmsub_vv_f64m1_tumu(__VA_ARGS__)

#define	vfmsub_vv_f64m2(...) __riscv_vfmsub_vv_f64m2_tu(__VA_ARGS__)

#define	vfmsub_vv_f64m2_m(...) __riscv_vfmsub_vv_f64m2_tumu(__VA_ARGS__)

#define	vfmsub_vv_f64m4(...) __riscv_vfmsub_vv_f64m4_tu(__VA_ARGS__)

#define	vfmsub_vv_f64m4_m(...) __riscv_vfmsub_vv_f64m4_tumu(__VA_ARGS__)

#define	vfmsub_vv_f64m8(...) __riscv_vfmsub_vv_f64m8_tu(__VA_ARGS__)

#define	vfmsub_vv_f64m8_m(...) __riscv_vfmsub_vv_f64m8_tumu(__VA_ARGS__)

#define	vfmul_vf_f16m1(...) __riscv_vfmul_vf_f16m1(__VA_ARGS__)

#define	vfmul_vf_f16m1_m(...) __riscv_vfmul_vf_f16m1_tumu(__VA_ARGS__)

#define	vfmul_vf_f16m2(...) __riscv_vfmul_vf_f16m2(__VA_ARGS__)

#define	vfmul_vf_f16m2_m(...) __riscv_vfmul_vf_f16m2_tumu(__VA_ARGS__)

#define	vfmul_vf_f16m4(...) __riscv_vfmul_vf_f16m4(__VA_ARGS__)

#define	vfmul_vf_f16m4_m(...) __riscv_vfmul_vf_f16m4_tumu(__VA_ARGS__)

#define	vfmul_vf_f16m8(...) __riscv_vfmul_vf_f16m8(__VA_ARGS__)

#define	vfmul_vf_f16m8_m(...) __riscv_vfmul_vf_f16m8_tumu(__VA_ARGS__)

#define	vfmul_vf_f16mf2(...) __riscv_vfmul_vf_f16mf2(__VA_ARGS__)

#define	vfmul_vf_f16mf2_m(...) __riscv_vfmul_vf_f16mf2_tumu(__VA_ARGS__)

#define	vfmul_vf_f16mf4(...) __riscv_vfmul_vf_f16mf4(__VA_ARGS__)

#define	vfmul_vf_f16mf4_m(...) __riscv_vfmul_vf_f16mf4_tumu(__VA_ARGS__)

#define	vfmul_vf_f32m1(...) __riscv_vfmul_vf_f32m1(__VA_ARGS__)

#define	vfmul_vf_f32m1_m(...) __riscv_vfmul_vf_f32m1_tumu(__VA_ARGS__)

#define	vfmul_vf_f32m2(...) __riscv_vfmul_vf_f32m2(__VA_ARGS__)

#define	vfmul_vf_f32m2_m(...) __riscv_vfmul_vf_f32m2_tumu(__VA_ARGS__)

#define	vfmul_vf_f32m4(...) __riscv_vfmul_vf_f32m4(__VA_ARGS__)

#define	vfmul_vf_f32m4_m(...) __riscv_vfmul_vf_f32m4_tumu(__VA_ARGS__)

#define	vfmul_vf_f32m8(...) __riscv_vfmul_vf_f32m8(__VA_ARGS__)

#define	vfmul_vf_f32m8_m(...) __riscv_vfmul_vf_f32m8_tumu(__VA_ARGS__)

#define	vfmul_vf_f32mf2(...) __riscv_vfmul_vf_f32mf2(__VA_ARGS__)

#define	vfmul_vf_f32mf2_m(...) __riscv_vfmul_vf_f32mf2_tumu(__VA_ARGS__)

#define	vfmul_vf_f64m1(...) __riscv_vfmul_vf_f64m1(__VA_ARGS__)

#define	vfmul_vf_f64m1_m(...) __riscv_vfmul_vf_f64m1_tumu(__VA_ARGS__)

#define	vfmul_vf_f64m2(...) __riscv_vfmul_vf_f64m2(__VA_ARGS__)

#define	vfmul_vf_f64m2_m(...) __riscv_vfmul_vf_f64m2_tumu(__VA_ARGS__)

#define	vfmul_vf_f64m4(...) __riscv_vfmul_vf_f64m4(__VA_ARGS__)

#define	vfmul_vf_f64m4_m(...) __riscv_vfmul_vf_f64m4_tumu(__VA_ARGS__)

#define	vfmul_vf_f64m8(...) __riscv_vfmul_vf_f64m8(__VA_ARGS__)

#define	vfmul_vf_f64m8_m(...) __riscv_vfmul_vf_f64m8_tumu(__VA_ARGS__)

#define	vfmul_vv_f16m1(...) __riscv_vfmul_vv_f16m1(__VA_ARGS__)

#define	vfmul_vv_f16m1_m(...) __riscv_vfmul_vv_f16m1_tumu(__VA_ARGS__)

#define	vfmul_vv_f16m2(...) __riscv_vfmul_vv_f16m2(__VA_ARGS__)

#define	vfmul_vv_f16m2_m(...) __riscv_vfmul_vv_f16m2_tumu(__VA_ARGS__)

#define	vfmul_vv_f16m4(...) __riscv_vfmul_vv_f16m4(__VA_ARGS__)

#define	vfmul_vv_f16m4_m(...) __riscv_vfmul_vv_f16m4_tumu(__VA_ARGS__)

#define	vfmul_vv_f16m8(...) __riscv_vfmul_vv_f16m8(__VA_ARGS__)

#define	vfmul_vv_f16m8_m(...) __riscv_vfmul_vv_f16m8_tumu(__VA_ARGS__)

#define	vfmul_vv_f16mf2(...) __riscv_vfmul_vv_f16mf2(__VA_ARGS__)

#define	vfmul_vv_f16mf2_m(...) __riscv_vfmul_vv_f16mf2_tumu(__VA_ARGS__)

#define	vfmul_vv_f16mf4(...) __riscv_vfmul_vv_f16mf4(__VA_ARGS__)

#define	vfmul_vv_f16mf4_m(...) __riscv_vfmul_vv_f16mf4_tumu(__VA_ARGS__)

#define	vfmul_vv_f32m1(...) __riscv_vfmul_vv_f32m1(__VA_ARGS__)

#define	vfmul_vv_f32m1_m(...) __riscv_vfmul_vv_f32m1_tumu(__VA_ARGS__)

#define	vfmul_vv_f32m2(...) __riscv_vfmul_vv_f32m2(__VA_ARGS__)

#define	vfmul_vv_f32m2_m(...) __riscv_vfmul_vv_f32m2_tumu(__VA_ARGS__)

#define	vfmul_vv_f32m4(...) __riscv_vfmul_vv_f32m4(__VA_ARGS__)

#define	vfmul_vv_f32m4_m(...) __riscv_vfmul_vv_f32m4_tumu(__VA_ARGS__)

#define	vfmul_vv_f32m8(...) __riscv_vfmul_vv_f32m8(__VA_ARGS__)

#define	vfmul_vv_f32m8_m(...) __riscv_vfmul_vv_f32m8_tumu(__VA_ARGS__)

#define	vfmul_vv_f32mf2(...) __riscv_vfmul_vv_f32mf2(__VA_ARGS__)

#define	vfmul_vv_f32mf2_m(...) __riscv_vfmul_vv_f32mf2_tumu(__VA_ARGS__)

#define	vfmul_vv_f64m1(...) __riscv_vfmul_vv_f64m1(__VA_ARGS__)

#define	vfmul_vv_f64m1_m(...) __riscv_vfmul_vv_f64m1_tumu(__VA_ARGS__)

#define	vfmul_vv_f64m2(...) __riscv_vfmul_vv_f64m2(__VA_ARGS__)

#define	vfmul_vv_f64m2_m(...) __riscv_vfmul_vv_f64m2_tumu(__VA_ARGS__)

#define	vfmul_vv_f64m4(...) __riscv_vfmul_vv_f64m4(__VA_ARGS__)

#define	vfmul_vv_f64m4_m(...) __riscv_vfmul_vv_f64m4_tumu(__VA_ARGS__)

#define	vfmul_vv_f64m8(...) __riscv_vfmul_vv_f64m8(__VA_ARGS__)

#define	vfmul_vv_f64m8_m(...) __riscv_vfmul_vv_f64m8_tumu(__VA_ARGS__)

#define	vfmv_f_s_f16m1_f16(...) __riscv_vfmv_f_s_f16m1_f16(__VA_ARGS__)

#define	vfmv_f_s_f16m2_f16(...) __riscv_vfmv_f_s_f16m2_f16(__VA_ARGS__)

#define	vfmv_f_s_f16m4_f16(...) __riscv_vfmv_f_s_f16m4_f16(__VA_ARGS__)

#define	vfmv_f_s_f16m8_f16(...) __riscv_vfmv_f_s_f16m8_f16(__VA_ARGS__)

#define	vfmv_f_s_f16mf2_f16(...) __riscv_vfmv_f_s_f16mf2_f16(__VA_ARGS__)

#define	vfmv_f_s_f16mf4_f16(...) __riscv_vfmv_f_s_f16mf4_f16(__VA_ARGS__)

#define	vfmv_f_s_f32m1_f32(...) __riscv_vfmv_f_s_f32m1_f32(__VA_ARGS__)

#define	vfmv_f_s_f32m2_f32(...) __riscv_vfmv_f_s_f32m2_f32(__VA_ARGS__)

#define	vfmv_f_s_f32m4_f32(...) __riscv_vfmv_f_s_f32m4_f32(__VA_ARGS__)

#define	vfmv_f_s_f32m8_f32(...) __riscv_vfmv_f_s_f32m8_f32(__VA_ARGS__)

#define	vfmv_f_s_f32mf2_f32(...) __riscv_vfmv_f_s_f32mf2_f32(__VA_ARGS__)

#define	vfmv_f_s_f64m1_f64(...) __riscv_vfmv_f_s_f64m1_f64(__VA_ARGS__)

#define	vfmv_f_s_f64m2_f64(...) __riscv_vfmv_f_s_f64m2_f64(__VA_ARGS__)

#define	vfmv_f_s_f64m4_f64(...) __riscv_vfmv_f_s_f64m4_f64(__VA_ARGS__)

#define	vfmv_f_s_f64m8_f64(...) __riscv_vfmv_f_s_f64m8_f64(__VA_ARGS__)

#define	vfmv_s_f_f16m1(...) __riscv_vfmv_s_f_f16m1_tu(__VA_ARGS__)

#define	vfmv_s_f_f16m2(...) __riscv_vfmv_s_f_f16m2_tu(__VA_ARGS__)

#define	vfmv_s_f_f16m4(...) __riscv_vfmv_s_f_f16m4_tu(__VA_ARGS__)

#define	vfmv_s_f_f16m8(...) __riscv_vfmv_s_f_f16m8_tu(__VA_ARGS__)

#define	vfmv_s_f_f16mf2(...) __riscv_vfmv_s_f_f16mf2_tu(__VA_ARGS__)

#define	vfmv_s_f_f16mf4(...) __riscv_vfmv_s_f_f16mf4_tu(__VA_ARGS__)

#define	vfmv_s_f_f32m1(...) __riscv_vfmv_s_f_f32m1_tu(__VA_ARGS__)

#define	vfmv_s_f_f32m2(...) __riscv_vfmv_s_f_f32m2_tu(__VA_ARGS__)

#define	vfmv_s_f_f32m4(...) __riscv_vfmv_s_f_f32m4_tu(__VA_ARGS__)

#define	vfmv_s_f_f32m8(...) __riscv_vfmv_s_f_f32m8_tu(__VA_ARGS__)

#define	vfmv_s_f_f32mf2(...) __riscv_vfmv_s_f_f32mf2_tu(__VA_ARGS__)

#define	vfmv_s_f_f64m1(...) __riscv_vfmv_s_f_f64m1_tu(__VA_ARGS__)

#define	vfmv_s_f_f64m2(...) __riscv_vfmv_s_f_f64m2_tu(__VA_ARGS__)

#define	vfmv_s_f_f64m4(...) __riscv_vfmv_s_f_f64m4_tu(__VA_ARGS__)

#define	vfmv_s_f_f64m8(...) __riscv_vfmv_s_f_f64m8_tu(__VA_ARGS__)

#define	vfmv_v_f_f16m1(...) __riscv_vfmv_v_f_f16m1(__VA_ARGS__)

#define	vfmv_v_f_f16m2(...) __riscv_vfmv_v_f_f16m2(__VA_ARGS__)

#define	vfmv_v_f_f16m4(...) __riscv_vfmv_v_f_f16m4(__VA_ARGS__)

#define	vfmv_v_f_f16m8(...) __riscv_vfmv_v_f_f16m8(__VA_ARGS__)

#define	vfmv_v_f_f16mf2(...) __riscv_vfmv_v_f_f16mf2(__VA_ARGS__)

#define	vfmv_v_f_f16mf4(...) __riscv_vfmv_v_f_f16mf4(__VA_ARGS__)

#define	vfmv_v_f_f32m1(...) __riscv_vfmv_v_f_f32m1(__VA_ARGS__)

#define	vfmv_v_f_f32m2(...) __riscv_vfmv_v_f_f32m2(__VA_ARGS__)

#define	vfmv_v_f_f32m4(...) __riscv_vfmv_v_f_f32m4(__VA_ARGS__)

#define	vfmv_v_f_f32m8(...) __riscv_vfmv_v_f_f32m8(__VA_ARGS__)

#define	vfmv_v_f_f32mf2(...) __riscv_vfmv_v_f_f32mf2(__VA_ARGS__)

#define	vfmv_v_f_f64m1(...) __riscv_vfmv_v_f_f64m1(__VA_ARGS__)

#define	vfmv_v_f_f64m2(...) __riscv_vfmv_v_f_f64m2(__VA_ARGS__)

#define	vfmv_v_f_f64m4(...) __riscv_vfmv_v_f_f64m4(__VA_ARGS__)

#define	vfmv_v_f_f64m8(...) __riscv_vfmv_v_f_f64m8(__VA_ARGS__)

#define	vfncvt_f_f_w_f16m1(...) __riscv_vfncvt_f_f_w_f16m1(__VA_ARGS__)

#define	vfncvt_f_f_w_f16m1_m(...) __riscv_vfncvt_f_f_w_f16m1_tumu(__VA_ARGS__)

#define	vfncvt_f_f_w_f16m2(...) __riscv_vfncvt_f_f_w_f16m2(__VA_ARGS__)

#define	vfncvt_f_f_w_f16m2_m(...) __riscv_vfncvt_f_f_w_f16m2_tumu(__VA_ARGS__)

#define	vfncvt_f_f_w_f16m4(...) __riscv_vfncvt_f_f_w_f16m4(__VA_ARGS__)

#define	vfncvt_f_f_w_f16m4_m(...) __riscv_vfncvt_f_f_w_f16m4_tumu(__VA_ARGS__)

#define	vfncvt_f_f_w_f16mf2(...) __riscv_vfncvt_f_f_w_f16mf2(__VA_ARGS__)

#define	vfncvt_f_f_w_f16mf2_m(...) __riscv_vfncvt_f_f_w_f16mf2_tumu(__VA_ARGS__)

#define	vfncvt_f_f_w_f16mf4(...) __riscv_vfncvt_f_f_w_f16mf4(__VA_ARGS__)

#define	vfncvt_f_f_w_f16mf4_m(...) __riscv_vfncvt_f_f_w_f16mf4_tumu(__VA_ARGS__)

#define	vfncvt_f_f_w_f32m1(...) __riscv_vfncvt_f_f_w_f32m1(__VA_ARGS__)

#define	vfncvt_f_f_w_f32m1_m(...) __riscv_vfncvt_f_f_w_f32m1_tumu(__VA_ARGS__)

#define	vfncvt_f_f_w_f32m2(...) __riscv_vfncvt_f_f_w_f32m2(__VA_ARGS__)

#define	vfncvt_f_f_w_f32m2_m(...) __riscv_vfncvt_f_f_w_f32m2_tumu(__VA_ARGS__)

#define	vfncvt_f_f_w_f32m4(...) __riscv_vfncvt_f_f_w_f32m4(__VA_ARGS__)

#define	vfncvt_f_f_w_f32m4_m(...) __riscv_vfncvt_f_f_w_f32m4_tumu(__VA_ARGS__)

#define	vfncvt_f_f_w_f32mf2(...) __riscv_vfncvt_f_f_w_f32mf2(__VA_ARGS__)

#define	vfncvt_f_f_w_f32mf2_m(...) __riscv_vfncvt_f_f_w_f32mf2_tumu(__VA_ARGS__)

#define	vfncvt_f_x_w_f16m1(...) __riscv_vfncvt_f_x_w_f16m1(__VA_ARGS__)

#define	vfncvt_f_x_w_f16m1_m(...) __riscv_vfncvt_f_x_w_f16m1_tumu(__VA_ARGS__)

#define	vfncvt_f_x_w_f16m2(...) __riscv_vfncvt_f_x_w_f16m2(__VA_ARGS__)

#define	vfncvt_f_x_w_f16m2_m(...) __riscv_vfncvt_f_x_w_f16m2_tumu(__VA_ARGS__)

#define	vfncvt_f_x_w_f16m4(...) __riscv_vfncvt_f_x_w_f16m4(__VA_ARGS__)

#define	vfncvt_f_x_w_f16m4_m(...) __riscv_vfncvt_f_x_w_f16m4_tumu(__VA_ARGS__)

#define	vfncvt_f_x_w_f16mf2(...) __riscv_vfncvt_f_x_w_f16mf2(__VA_ARGS__)

#define	vfncvt_f_x_w_f16mf2_m(...) __riscv_vfncvt_f_x_w_f16mf2_tumu(__VA_ARGS__)

#define	vfncvt_f_x_w_f16mf4(...) __riscv_vfncvt_f_x_w_f16mf4(__VA_ARGS__)

#define	vfncvt_f_x_w_f16mf4_m(...) __riscv_vfncvt_f_x_w_f16mf4_tumu(__VA_ARGS__)

#define	vfncvt_f_x_w_f32m1(...) __riscv_vfncvt_f_x_w_f32m1(__VA_ARGS__)

#define	vfncvt_f_x_w_f32m1_m(...) __riscv_vfncvt_f_x_w_f32m1_tumu(__VA_ARGS__)

#define	vfncvt_f_x_w_f32m2(...) __riscv_vfncvt_f_x_w_f32m2(__VA_ARGS__)

#define	vfncvt_f_x_w_f32m2_m(...) __riscv_vfncvt_f_x_w_f32m2_tumu(__VA_ARGS__)

#define	vfncvt_f_x_w_f32m4(...) __riscv_vfncvt_f_x_w_f32m4(__VA_ARGS__)

#define	vfncvt_f_x_w_f32m4_m(...) __riscv_vfncvt_f_x_w_f32m4_tumu(__VA_ARGS__)

#define	vfncvt_f_x_w_f32mf2(...) __riscv_vfncvt_f_x_w_f32mf2(__VA_ARGS__)

#define	vfncvt_f_x_w_f32mf2_m(...) __riscv_vfncvt_f_x_w_f32mf2_tumu(__VA_ARGS__)

#define	vfncvt_f_xu_w_f16m1(...) __riscv_vfncvt_f_xu_w_f16m1(__VA_ARGS__)

#define	vfncvt_f_xu_w_f16m1_m(...) __riscv_vfncvt_f_xu_w_f16m1_tumu(__VA_ARGS__)

#define	vfncvt_f_xu_w_f16m2(...) __riscv_vfncvt_f_xu_w_f16m2(__VA_ARGS__)

#define	vfncvt_f_xu_w_f16m2_m(...) __riscv_vfncvt_f_xu_w_f16m2_tumu(__VA_ARGS__)

#define	vfncvt_f_xu_w_f16m4(...) __riscv_vfncvt_f_xu_w_f16m4(__VA_ARGS__)

#define	vfncvt_f_xu_w_f16m4_m(...) __riscv_vfncvt_f_xu_w_f16m4_tumu(__VA_ARGS__)

#define	vfncvt_f_xu_w_f16mf2(...) __riscv_vfncvt_f_xu_w_f16mf2(__VA_ARGS__)

#define	vfncvt_f_xu_w_f16mf2_m(...) __riscv_vfncvt_f_xu_w_f16mf2_tumu(__VA_ARGS__)

#define	vfncvt_f_xu_w_f16mf4(...) __riscv_vfncvt_f_xu_w_f16mf4(__VA_ARGS__)

#define	vfncvt_f_xu_w_f16mf4_m(...) __riscv_vfncvt_f_xu_w_f16mf4_tumu(__VA_ARGS__)

#define	vfncvt_f_xu_w_f32m1(...) __riscv_vfncvt_f_xu_w_f32m1(__VA_ARGS__)

#define	vfncvt_f_xu_w_f32m1_m(...) __riscv_vfncvt_f_xu_w_f32m1_tumu(__VA_ARGS__)

#define	vfncvt_f_xu_w_f32m2(...) __riscv_vfncvt_f_xu_w_f32m2(__VA_ARGS__)

#define	vfncvt_f_xu_w_f32m2_m(...) __riscv_vfncvt_f_xu_w_f32m2_tumu(__VA_ARGS__)

#define	vfncvt_f_xu_w_f32m4(...) __riscv_vfncvt_f_xu_w_f32m4(__VA_ARGS__)

#define	vfncvt_f_xu_w_f32m4_m(...) __riscv_vfncvt_f_xu_w_f32m4_tumu(__VA_ARGS__)

#define	vfncvt_f_xu_w_f32mf2(...) __riscv_vfncvt_f_xu_w_f32mf2(__VA_ARGS__)

#define	vfncvt_f_xu_w_f32mf2_m(...) __riscv_vfncvt_f_xu_w_f32mf2_tumu(__VA_ARGS__)

#define	vfncvt_rod_f_f_w_f16m1(...) __riscv_vfncvt_rod_f_f_w_f16m1(__VA_ARGS__)

#define	vfncvt_rod_f_f_w_f16m1_m(...) __riscv_vfncvt_rod_f_f_w_f16m1_tumu(__VA_ARGS__)

#define	vfncvt_rod_f_f_w_f16m2(...) __riscv_vfncvt_rod_f_f_w_f16m2(__VA_ARGS__)

#define	vfncvt_rod_f_f_w_f16m2_m(...) __riscv_vfncvt_rod_f_f_w_f16m2_tumu(__VA_ARGS__)

#define	vfncvt_rod_f_f_w_f16m4(...) __riscv_vfncvt_rod_f_f_w_f16m4(__VA_ARGS__)

#define	vfncvt_rod_f_f_w_f16m4_m(...) __riscv_vfncvt_rod_f_f_w_f16m4_tumu(__VA_ARGS__)

#define	vfncvt_rod_f_f_w_f16mf2(...) __riscv_vfncvt_rod_f_f_w_f16mf2(__VA_ARGS__)

#define	vfncvt_rod_f_f_w_f16mf2_m(...) __riscv_vfncvt_rod_f_f_w_f16mf2_tumu(__VA_ARGS__)

#define	vfncvt_rod_f_f_w_f16mf4(...) __riscv_vfncvt_rod_f_f_w_f16mf4(__VA_ARGS__)

#define	vfncvt_rod_f_f_w_f16mf4_m(...) __riscv_vfncvt_rod_f_f_w_f16mf4_tumu(__VA_ARGS__)

#define	vfncvt_rod_f_f_w_f32m1(...) __riscv_vfncvt_rod_f_f_w_f32m1(__VA_ARGS__)

#define	vfncvt_rod_f_f_w_f32m1_m(...) __riscv_vfncvt_rod_f_f_w_f32m1_tumu(__VA_ARGS__)

#define	vfncvt_rod_f_f_w_f32m2(...) __riscv_vfncvt_rod_f_f_w_f32m2(__VA_ARGS__)

#define	vfncvt_rod_f_f_w_f32m2_m(...) __riscv_vfncvt_rod_f_f_w_f32m2_tumu(__VA_ARGS__)

#define	vfncvt_rod_f_f_w_f32m4(...) __riscv_vfncvt_rod_f_f_w_f32m4(__VA_ARGS__)

#define	vfncvt_rod_f_f_w_f32m4_m(...) __riscv_vfncvt_rod_f_f_w_f32m4_tumu(__VA_ARGS__)

#define	vfncvt_rod_f_f_w_f32mf2(...) __riscv_vfncvt_rod_f_f_w_f32mf2(__VA_ARGS__)

#define	vfncvt_rod_f_f_w_f32mf2_m(...) __riscv_vfncvt_rod_f_f_w_f32mf2_tumu(__VA_ARGS__)

#define	vfncvt_rtz_x_f_w_i16m1(...) __riscv_vfncvt_rtz_x_f_w_i16m1(__VA_ARGS__)

#define	vfncvt_rtz_x_f_w_i16m1_m(...) __riscv_vfncvt_rtz_x_f_w_i16m1_tumu(__VA_ARGS__)

#define	vfncvt_rtz_x_f_w_i16m2(...) __riscv_vfncvt_rtz_x_f_w_i16m2(__VA_ARGS__)

#define	vfncvt_rtz_x_f_w_i16m2_m(...) __riscv_vfncvt_rtz_x_f_w_i16m2_tumu(__VA_ARGS__)

#define	vfncvt_rtz_x_f_w_i16m4(...) __riscv_vfncvt_rtz_x_f_w_i16m4(__VA_ARGS__)

#define	vfncvt_rtz_x_f_w_i16m4_m(...) __riscv_vfncvt_rtz_x_f_w_i16m4_tumu(__VA_ARGS__)

#define	vfncvt_rtz_x_f_w_i16mf2(...) __riscv_vfncvt_rtz_x_f_w_i16mf2(__VA_ARGS__)

#define	vfncvt_rtz_x_f_w_i16mf2_m(...) __riscv_vfncvt_rtz_x_f_w_i16mf2_tumu(__VA_ARGS__)

#define	vfncvt_rtz_x_f_w_i16mf4(...) __riscv_vfncvt_rtz_x_f_w_i16mf4(__VA_ARGS__)

#define	vfncvt_rtz_x_f_w_i16mf4_m(...) __riscv_vfncvt_rtz_x_f_w_i16mf4_tumu(__VA_ARGS__)

#define	vfncvt_rtz_x_f_w_i32m1(...) __riscv_vfncvt_rtz_x_f_w_i32m1(__VA_ARGS__)

#define	vfncvt_rtz_x_f_w_i32m1_m(...) __riscv_vfncvt_rtz_x_f_w_i32m1_tumu(__VA_ARGS__)

#define	vfncvt_rtz_x_f_w_i32m2(...) __riscv_vfncvt_rtz_x_f_w_i32m2(__VA_ARGS__)

#define	vfncvt_rtz_x_f_w_i32m2_m(...) __riscv_vfncvt_rtz_x_f_w_i32m2_tumu(__VA_ARGS__)

#define	vfncvt_rtz_x_f_w_i32m4(...) __riscv_vfncvt_rtz_x_f_w_i32m4(__VA_ARGS__)

#define	vfncvt_rtz_x_f_w_i32m4_m(...) __riscv_vfncvt_rtz_x_f_w_i32m4_tumu(__VA_ARGS__)

#define	vfncvt_rtz_x_f_w_i32mf2(...) __riscv_vfncvt_rtz_x_f_w_i32mf2(__VA_ARGS__)

#define	vfncvt_rtz_x_f_w_i32mf2_m(...) __riscv_vfncvt_rtz_x_f_w_i32mf2_tumu(__VA_ARGS__)

#define	vfncvt_rtz_x_f_w_i8m1(...) __riscv_vfncvt_rtz_x_f_w_i8m1(__VA_ARGS__)

#define	vfncvt_rtz_x_f_w_i8m1_m(...) __riscv_vfncvt_rtz_x_f_w_i8m1_tumu(__VA_ARGS__)

#define	vfncvt_rtz_x_f_w_i8m2(...) __riscv_vfncvt_rtz_x_f_w_i8m2(__VA_ARGS__)

#define	vfncvt_rtz_x_f_w_i8m2_m(...) __riscv_vfncvt_rtz_x_f_w_i8m2_tumu(__VA_ARGS__)

#define	vfncvt_rtz_x_f_w_i8m4(...) __riscv_vfncvt_rtz_x_f_w_i8m4(__VA_ARGS__)

#define	vfncvt_rtz_x_f_w_i8m4_m(...) __riscv_vfncvt_rtz_x_f_w_i8m4_tumu(__VA_ARGS__)

#define	vfncvt_rtz_x_f_w_i8mf2(...) __riscv_vfncvt_rtz_x_f_w_i8mf2(__VA_ARGS__)

#define	vfncvt_rtz_x_f_w_i8mf2_m(...) __riscv_vfncvt_rtz_x_f_w_i8mf2_tumu(__VA_ARGS__)

#define	vfncvt_rtz_x_f_w_i8mf4(...) __riscv_vfncvt_rtz_x_f_w_i8mf4(__VA_ARGS__)

#define	vfncvt_rtz_x_f_w_i8mf4_m(...) __riscv_vfncvt_rtz_x_f_w_i8mf4_tumu(__VA_ARGS__)

#define	vfncvt_rtz_x_f_w_i8mf8(...) __riscv_vfncvt_rtz_x_f_w_i8mf8(__VA_ARGS__)

#define	vfncvt_rtz_x_f_w_i8mf8_m(...) __riscv_vfncvt_rtz_x_f_w_i8mf8_tumu(__VA_ARGS__)

#define	vfncvt_rtz_xu_f_w_u16m1(...) __riscv_vfncvt_rtz_xu_f_w_u16m1(__VA_ARGS__)

#define	vfncvt_rtz_xu_f_w_u16m1_m(...) __riscv_vfncvt_rtz_xu_f_w_u16m1_tumu(__VA_ARGS__)

#define	vfncvt_rtz_xu_f_w_u16m2(...) __riscv_vfncvt_rtz_xu_f_w_u16m2(__VA_ARGS__)

#define	vfncvt_rtz_xu_f_w_u16m2_m(...) __riscv_vfncvt_rtz_xu_f_w_u16m2_tumu(__VA_ARGS__)

#define	vfncvt_rtz_xu_f_w_u16m4(...) __riscv_vfncvt_rtz_xu_f_w_u16m4(__VA_ARGS__)

#define	vfncvt_rtz_xu_f_w_u16m4_m(...) __riscv_vfncvt_rtz_xu_f_w_u16m4_tumu(__VA_ARGS__)

#define	vfncvt_rtz_xu_f_w_u16mf2(...) __riscv_vfncvt_rtz_xu_f_w_u16mf2(__VA_ARGS__)

#define	vfncvt_rtz_xu_f_w_u16mf2_m(...) __riscv_vfncvt_rtz_xu_f_w_u16mf2_tumu(__VA_ARGS__)

#define	vfncvt_rtz_xu_f_w_u16mf4(...) __riscv_vfncvt_rtz_xu_f_w_u16mf4(__VA_ARGS__)

#define	vfncvt_rtz_xu_f_w_u16mf4_m(...) __riscv_vfncvt_rtz_xu_f_w_u16mf4_tumu(__VA_ARGS__)

#define	vfncvt_rtz_xu_f_w_u32m1(...) __riscv_vfncvt_rtz_xu_f_w_u32m1(__VA_ARGS__)

#define	vfncvt_rtz_xu_f_w_u32m1_m(...) __riscv_vfncvt_rtz_xu_f_w_u32m1_tumu(__VA_ARGS__)

#define	vfncvt_rtz_xu_f_w_u32m2(...) __riscv_vfncvt_rtz_xu_f_w_u32m2(__VA_ARGS__)

#define	vfncvt_rtz_xu_f_w_u32m2_m(...) __riscv_vfncvt_rtz_xu_f_w_u32m2_tumu(__VA_ARGS__)

#define	vfncvt_rtz_xu_f_w_u32m4(...) __riscv_vfncvt_rtz_xu_f_w_u32m4(__VA_ARGS__)

#define	vfncvt_rtz_xu_f_w_u32m4_m(...) __riscv_vfncvt_rtz_xu_f_w_u32m4_tumu(__VA_ARGS__)

#define	vfncvt_rtz_xu_f_w_u32mf2(...) __riscv_vfncvt_rtz_xu_f_w_u32mf2(__VA_ARGS__)

#define	vfncvt_rtz_xu_f_w_u32mf2_m(...) __riscv_vfncvt_rtz_xu_f_w_u32mf2_tumu(__VA_ARGS__)

#define	vfncvt_rtz_xu_f_w_u8m1(...) __riscv_vfncvt_rtz_xu_f_w_u8m1(__VA_ARGS__)

#define	vfncvt_rtz_xu_f_w_u8m1_m(...) __riscv_vfncvt_rtz_xu_f_w_u8m1_tumu(__VA_ARGS__)

#define	vfncvt_rtz_xu_f_w_u8m2(...) __riscv_vfncvt_rtz_xu_f_w_u8m2(__VA_ARGS__)

#define	vfncvt_rtz_xu_f_w_u8m2_m(...) __riscv_vfncvt_rtz_xu_f_w_u8m2_tumu(__VA_ARGS__)

#define	vfncvt_rtz_xu_f_w_u8m4(...) __riscv_vfncvt_rtz_xu_f_w_u8m4(__VA_ARGS__)

#define	vfncvt_rtz_xu_f_w_u8m4_m(...) __riscv_vfncvt_rtz_xu_f_w_u8m4_tumu(__VA_ARGS__)

#define	vfncvt_rtz_xu_f_w_u8mf2(...) __riscv_vfncvt_rtz_xu_f_w_u8mf2(__VA_ARGS__)

#define	vfncvt_rtz_xu_f_w_u8mf2_m(...) __riscv_vfncvt_rtz_xu_f_w_u8mf2_tumu(__VA_ARGS__)

#define	vfncvt_rtz_xu_f_w_u8mf4(...) __riscv_vfncvt_rtz_xu_f_w_u8mf4(__VA_ARGS__)

#define	vfncvt_rtz_xu_f_w_u8mf4_m(...) __riscv_vfncvt_rtz_xu_f_w_u8mf4_tumu(__VA_ARGS__)

#define	vfncvt_rtz_xu_f_w_u8mf8(...) __riscv_vfncvt_rtz_xu_f_w_u8mf8(__VA_ARGS__)

#define	vfncvt_rtz_xu_f_w_u8mf8_m(...) __riscv_vfncvt_rtz_xu_f_w_u8mf8_tumu(__VA_ARGS__)

#define	vfncvt_x_f_w_i16m1(...) __riscv_vfncvt_x_f_w_i16m1(__VA_ARGS__)

#define	vfncvt_x_f_w_i16m1_m(...) __riscv_vfncvt_x_f_w_i16m1_tumu(__VA_ARGS__)

#define	vfncvt_x_f_w_i16m2(...) __riscv_vfncvt_x_f_w_i16m2(__VA_ARGS__)

#define	vfncvt_x_f_w_i16m2_m(...) __riscv_vfncvt_x_f_w_i16m2_tumu(__VA_ARGS__)

#define	vfncvt_x_f_w_i16m4(...) __riscv_vfncvt_x_f_w_i16m4(__VA_ARGS__)

#define	vfncvt_x_f_w_i16m4_m(...) __riscv_vfncvt_x_f_w_i16m4_tumu(__VA_ARGS__)

#define	vfncvt_x_f_w_i16mf2(...) __riscv_vfncvt_x_f_w_i16mf2(__VA_ARGS__)

#define	vfncvt_x_f_w_i16mf2_m(...) __riscv_vfncvt_x_f_w_i16mf2_tumu(__VA_ARGS__)

#define	vfncvt_x_f_w_i16mf4(...) __riscv_vfncvt_x_f_w_i16mf4(__VA_ARGS__)

#define	vfncvt_x_f_w_i16mf4_m(...) __riscv_vfncvt_x_f_w_i16mf4_tumu(__VA_ARGS__)

#define	vfncvt_x_f_w_i32m1(...) __riscv_vfncvt_x_f_w_i32m1(__VA_ARGS__)

#define	vfncvt_x_f_w_i32m1_m(...) __riscv_vfncvt_x_f_w_i32m1_tumu(__VA_ARGS__)

#define	vfncvt_x_f_w_i32m2(...) __riscv_vfncvt_x_f_w_i32m2(__VA_ARGS__)

#define	vfncvt_x_f_w_i32m2_m(...) __riscv_vfncvt_x_f_w_i32m2_tumu(__VA_ARGS__)

#define	vfncvt_x_f_w_i32m4(...) __riscv_vfncvt_x_f_w_i32m4(__VA_ARGS__)

#define	vfncvt_x_f_w_i32m4_m(...) __riscv_vfncvt_x_f_w_i32m4_tumu(__VA_ARGS__)

#define	vfncvt_x_f_w_i32mf2(...) __riscv_vfncvt_x_f_w_i32mf2(__VA_ARGS__)

#define	vfncvt_x_f_w_i32mf2_m(...) __riscv_vfncvt_x_f_w_i32mf2_tumu(__VA_ARGS__)

#define	vfncvt_x_f_w_i8m1(...) __riscv_vfncvt_x_f_w_i8m1(__VA_ARGS__)

#define	vfncvt_x_f_w_i8m1_m(...) __riscv_vfncvt_x_f_w_i8m1_tumu(__VA_ARGS__)

#define	vfncvt_x_f_w_i8m2(...) __riscv_vfncvt_x_f_w_i8m2(__VA_ARGS__)

#define	vfncvt_x_f_w_i8m2_m(...) __riscv_vfncvt_x_f_w_i8m2_tumu(__VA_ARGS__)

#define	vfncvt_x_f_w_i8m4(...) __riscv_vfncvt_x_f_w_i8m4(__VA_ARGS__)

#define	vfncvt_x_f_w_i8m4_m(...) __riscv_vfncvt_x_f_w_i8m4_tumu(__VA_ARGS__)

#define	vfncvt_x_f_w_i8mf2(...) __riscv_vfncvt_x_f_w_i8mf2(__VA_ARGS__)

#define	vfncvt_x_f_w_i8mf2_m(...) __riscv_vfncvt_x_f_w_i8mf2_tumu(__VA_ARGS__)

#define	vfncvt_x_f_w_i8mf4(...) __riscv_vfncvt_x_f_w_i8mf4(__VA_ARGS__)

#define	vfncvt_x_f_w_i8mf4_m(...) __riscv_vfncvt_x_f_w_i8mf4_tumu(__VA_ARGS__)

#define	vfncvt_x_f_w_i8mf8(...) __riscv_vfncvt_x_f_w_i8mf8(__VA_ARGS__)

#define	vfncvt_x_f_w_i8mf8_m(...) __riscv_vfncvt_x_f_w_i8mf8_tumu(__VA_ARGS__)

#define	vfncvt_xu_f_w_u16m1(...) __riscv_vfncvt_xu_f_w_u16m1(__VA_ARGS__)

#define	vfncvt_xu_f_w_u16m1_m(...) __riscv_vfncvt_xu_f_w_u16m1_tumu(__VA_ARGS__)

#define	vfncvt_xu_f_w_u16m2(...) __riscv_vfncvt_xu_f_w_u16m2(__VA_ARGS__)

#define	vfncvt_xu_f_w_u16m2_m(...) __riscv_vfncvt_xu_f_w_u16m2_tumu(__VA_ARGS__)

#define	vfncvt_xu_f_w_u16m4(...) __riscv_vfncvt_xu_f_w_u16m4(__VA_ARGS__)

#define	vfncvt_xu_f_w_u16m4_m(...) __riscv_vfncvt_xu_f_w_u16m4_tumu(__VA_ARGS__)

#define	vfncvt_xu_f_w_u16mf2(...) __riscv_vfncvt_xu_f_w_u16mf2(__VA_ARGS__)

#define	vfncvt_xu_f_w_u16mf2_m(...) __riscv_vfncvt_xu_f_w_u16mf2_tumu(__VA_ARGS__)

#define	vfncvt_xu_f_w_u16mf4(...) __riscv_vfncvt_xu_f_w_u16mf4(__VA_ARGS__)

#define	vfncvt_xu_f_w_u16mf4_m(...) __riscv_vfncvt_xu_f_w_u16mf4_tumu(__VA_ARGS__)

#define	vfncvt_xu_f_w_u32m1(...) __riscv_vfncvt_xu_f_w_u32m1(__VA_ARGS__)

#define	vfncvt_xu_f_w_u32m1_m(...) __riscv_vfncvt_xu_f_w_u32m1_tumu(__VA_ARGS__)

#define	vfncvt_xu_f_w_u32m2(...) __riscv_vfncvt_xu_f_w_u32m2(__VA_ARGS__)

#define	vfncvt_xu_f_w_u32m2_m(...) __riscv_vfncvt_xu_f_w_u32m2_tumu(__VA_ARGS__)

#define	vfncvt_xu_f_w_u32m4(...) __riscv_vfncvt_xu_f_w_u32m4(__VA_ARGS__)

#define	vfncvt_xu_f_w_u32m4_m(...) __riscv_vfncvt_xu_f_w_u32m4_tumu(__VA_ARGS__)

#define	vfncvt_xu_f_w_u32mf2(...) __riscv_vfncvt_xu_f_w_u32mf2(__VA_ARGS__)

#define	vfncvt_xu_f_w_u32mf2_m(...) __riscv_vfncvt_xu_f_w_u32mf2_tumu(__VA_ARGS__)

#define	vfncvt_xu_f_w_u8m1(...) __riscv_vfncvt_xu_f_w_u8m1(__VA_ARGS__)

#define	vfncvt_xu_f_w_u8m1_m(...) __riscv_vfncvt_xu_f_w_u8m1_tumu(__VA_ARGS__)

#define	vfncvt_xu_f_w_u8m2(...) __riscv_vfncvt_xu_f_w_u8m2(__VA_ARGS__)

#define	vfncvt_xu_f_w_u8m2_m(...) __riscv_vfncvt_xu_f_w_u8m2_tumu(__VA_ARGS__)

#define	vfncvt_xu_f_w_u8m4(...) __riscv_vfncvt_xu_f_w_u8m4(__VA_ARGS__)

#define	vfncvt_xu_f_w_u8m4_m(...) __riscv_vfncvt_xu_f_w_u8m4_tumu(__VA_ARGS__)

#define	vfncvt_xu_f_w_u8mf2(...) __riscv_vfncvt_xu_f_w_u8mf2(__VA_ARGS__)

#define	vfncvt_xu_f_w_u8mf2_m(...) __riscv_vfncvt_xu_f_w_u8mf2_tumu(__VA_ARGS__)

#define	vfncvt_xu_f_w_u8mf4(...) __riscv_vfncvt_xu_f_w_u8mf4(__VA_ARGS__)

#define	vfncvt_xu_f_w_u8mf4_m(...) __riscv_vfncvt_xu_f_w_u8mf4_tumu(__VA_ARGS__)

#define	vfncvt_xu_f_w_u8mf8(...) __riscv_vfncvt_xu_f_w_u8mf8(__VA_ARGS__)

#define	vfncvt_xu_f_w_u8mf8_m(...) __riscv_vfncvt_xu_f_w_u8mf8_tumu(__VA_ARGS__)

#define	vfneg_v_f16m1(...) __riscv_vfneg_v_f16m1(__VA_ARGS__)

#define	vfneg_v_f16m1_m(...) __riscv_vfneg_v_f16m1_tumu(__VA_ARGS__)

#define	vfneg_v_f16m2(...) __riscv_vfneg_v_f16m2(__VA_ARGS__)

#define	vfneg_v_f16m2_m(...) __riscv_vfneg_v_f16m2_tumu(__VA_ARGS__)

#define	vfneg_v_f16m4(...) __riscv_vfneg_v_f16m4(__VA_ARGS__)

#define	vfneg_v_f16m4_m(...) __riscv_vfneg_v_f16m4_tumu(__VA_ARGS__)

#define	vfneg_v_f16m8(...) __riscv_vfneg_v_f16m8(__VA_ARGS__)

#define	vfneg_v_f16m8_m(...) __riscv_vfneg_v_f16m8_tumu(__VA_ARGS__)

#define	vfneg_v_f16mf2(...) __riscv_vfneg_v_f16mf2(__VA_ARGS__)

#define	vfneg_v_f16mf2_m(...) __riscv_vfneg_v_f16mf2_tumu(__VA_ARGS__)

#define	vfneg_v_f16mf4(...) __riscv_vfneg_v_f16mf4(__VA_ARGS__)

#define	vfneg_v_f16mf4_m(...) __riscv_vfneg_v_f16mf4_tumu(__VA_ARGS__)

#define	vfneg_v_f32m1(...) __riscv_vfneg_v_f32m1(__VA_ARGS__)

#define	vfneg_v_f32m1_m(...) __riscv_vfneg_v_f32m1_tumu(__VA_ARGS__)

#define	vfneg_v_f32m2(...) __riscv_vfneg_v_f32m2(__VA_ARGS__)

#define	vfneg_v_f32m2_m(...) __riscv_vfneg_v_f32m2_tumu(__VA_ARGS__)

#define	vfneg_v_f32m4(...) __riscv_vfneg_v_f32m4(__VA_ARGS__)

#define	vfneg_v_f32m4_m(...) __riscv_vfneg_v_f32m4_tumu(__VA_ARGS__)

#define	vfneg_v_f32m8(...) __riscv_vfneg_v_f32m8(__VA_ARGS__)

#define	vfneg_v_f32m8_m(...) __riscv_vfneg_v_f32m8_tumu(__VA_ARGS__)

#define	vfneg_v_f32mf2(...) __riscv_vfneg_v_f32mf2(__VA_ARGS__)

#define	vfneg_v_f32mf2_m(...) __riscv_vfneg_v_f32mf2_tumu(__VA_ARGS__)

#define	vfneg_v_f64m1(...) __riscv_vfneg_v_f64m1(__VA_ARGS__)

#define	vfneg_v_f64m1_m(...) __riscv_vfneg_v_f64m1_tumu(__VA_ARGS__)

#define	vfneg_v_f64m2(...) __riscv_vfneg_v_f64m2(__VA_ARGS__)

#define	vfneg_v_f64m2_m(...) __riscv_vfneg_v_f64m2_tumu(__VA_ARGS__)

#define	vfneg_v_f64m4(...) __riscv_vfneg_v_f64m4(__VA_ARGS__)

#define	vfneg_v_f64m4_m(...) __riscv_vfneg_v_f64m4_tumu(__VA_ARGS__)

#define	vfneg_v_f64m8(...) __riscv_vfneg_v_f64m8(__VA_ARGS__)

#define	vfneg_v_f64m8_m(...) __riscv_vfneg_v_f64m8_tumu(__VA_ARGS__)

#define	vfnmacc_vf_f16m1(...) __riscv_vfnmacc_vf_f16m1_tu(__VA_ARGS__)

#define	vfnmacc_vf_f16m1_m(...) __riscv_vfnmacc_vf_f16m1_tumu(__VA_ARGS__)

#define	vfnmacc_vf_f16m2(...) __riscv_vfnmacc_vf_f16m2_tu(__VA_ARGS__)

#define	vfnmacc_vf_f16m2_m(...) __riscv_vfnmacc_vf_f16m2_tumu(__VA_ARGS__)

#define	vfnmacc_vf_f16m4(...) __riscv_vfnmacc_vf_f16m4_tu(__VA_ARGS__)

#define	vfnmacc_vf_f16m4_m(...) __riscv_vfnmacc_vf_f16m4_tumu(__VA_ARGS__)

#define	vfnmacc_vf_f16m8(...) __riscv_vfnmacc_vf_f16m8_tu(__VA_ARGS__)

#define	vfnmacc_vf_f16m8_m(...) __riscv_vfnmacc_vf_f16m8_tumu(__VA_ARGS__)

#define	vfnmacc_vf_f16mf2(...) __riscv_vfnmacc_vf_f16mf2_tu(__VA_ARGS__)

#define	vfnmacc_vf_f16mf2_m(...) __riscv_vfnmacc_vf_f16mf2_tumu(__VA_ARGS__)

#define	vfnmacc_vf_f16mf4(...) __riscv_vfnmacc_vf_f16mf4_tu(__VA_ARGS__)

#define	vfnmacc_vf_f16mf4_m(...) __riscv_vfnmacc_vf_f16mf4_tumu(__VA_ARGS__)

#define	vfnmacc_vf_f32m1(...) __riscv_vfnmacc_vf_f32m1_tu(__VA_ARGS__)

#define	vfnmacc_vf_f32m1_m(...) __riscv_vfnmacc_vf_f32m1_tumu(__VA_ARGS__)

#define	vfnmacc_vf_f32m2(...) __riscv_vfnmacc_vf_f32m2_tu(__VA_ARGS__)

#define	vfnmacc_vf_f32m2_m(...) __riscv_vfnmacc_vf_f32m2_tumu(__VA_ARGS__)

#define	vfnmacc_vf_f32m4(...) __riscv_vfnmacc_vf_f32m4_tu(__VA_ARGS__)

#define	vfnmacc_vf_f32m4_m(...) __riscv_vfnmacc_vf_f32m4_tumu(__VA_ARGS__)

#define	vfnmacc_vf_f32m8(...) __riscv_vfnmacc_vf_f32m8_tu(__VA_ARGS__)

#define	vfnmacc_vf_f32m8_m(...) __riscv_vfnmacc_vf_f32m8_tumu(__VA_ARGS__)

#define	vfnmacc_vf_f32mf2(...) __riscv_vfnmacc_vf_f32mf2_tu(__VA_ARGS__)

#define	vfnmacc_vf_f32mf2_m(...) __riscv_vfnmacc_vf_f32mf2_tumu(__VA_ARGS__)

#define	vfnmacc_vf_f64m1(...) __riscv_vfnmacc_vf_f64m1_tu(__VA_ARGS__)

#define	vfnmacc_vf_f64m1_m(...) __riscv_vfnmacc_vf_f64m1_tumu(__VA_ARGS__)

#define	vfnmacc_vf_f64m2(...) __riscv_vfnmacc_vf_f64m2_tu(__VA_ARGS__)

#define	vfnmacc_vf_f64m2_m(...) __riscv_vfnmacc_vf_f64m2_tumu(__VA_ARGS__)

#define	vfnmacc_vf_f64m4(...) __riscv_vfnmacc_vf_f64m4_tu(__VA_ARGS__)

#define	vfnmacc_vf_f64m4_m(...) __riscv_vfnmacc_vf_f64m4_tumu(__VA_ARGS__)

#define	vfnmacc_vf_f64m8(...) __riscv_vfnmacc_vf_f64m8_tu(__VA_ARGS__)

#define	vfnmacc_vf_f64m8_m(...) __riscv_vfnmacc_vf_f64m8_tumu(__VA_ARGS__)

#define	vfnmacc_vv_f16m1(...) __riscv_vfnmacc_vv_f16m1_tu(__VA_ARGS__)

#define	vfnmacc_vv_f16m1_m(...) __riscv_vfnmacc_vv_f16m1_tumu(__VA_ARGS__)

#define	vfnmacc_vv_f16m2(...) __riscv_vfnmacc_vv_f16m2_tu(__VA_ARGS__)

#define	vfnmacc_vv_f16m2_m(...) __riscv_vfnmacc_vv_f16m2_tumu(__VA_ARGS__)

#define	vfnmacc_vv_f16m4(...) __riscv_vfnmacc_vv_f16m4_tu(__VA_ARGS__)

#define	vfnmacc_vv_f16m4_m(...) __riscv_vfnmacc_vv_f16m4_tumu(__VA_ARGS__)

#define	vfnmacc_vv_f16m8(...) __riscv_vfnmacc_vv_f16m8_tu(__VA_ARGS__)

#define	vfnmacc_vv_f16m8_m(...) __riscv_vfnmacc_vv_f16m8_tumu(__VA_ARGS__)

#define	vfnmacc_vv_f16mf2(...) __riscv_vfnmacc_vv_f16mf2_tu(__VA_ARGS__)

#define	vfnmacc_vv_f16mf2_m(...) __riscv_vfnmacc_vv_f16mf2_tumu(__VA_ARGS__)

#define	vfnmacc_vv_f16mf4(...) __riscv_vfnmacc_vv_f16mf4_tu(__VA_ARGS__)

#define	vfnmacc_vv_f16mf4_m(...) __riscv_vfnmacc_vv_f16mf4_tumu(__VA_ARGS__)

#define	vfnmacc_vv_f32m1(...) __riscv_vfnmacc_vv_f32m1_tu(__VA_ARGS__)

#define	vfnmacc_vv_f32m1_m(...) __riscv_vfnmacc_vv_f32m1_tumu(__VA_ARGS__)

#define	vfnmacc_vv_f32m2(...) __riscv_vfnmacc_vv_f32m2_tu(__VA_ARGS__)

#define	vfnmacc_vv_f32m2_m(...) __riscv_vfnmacc_vv_f32m2_tumu(__VA_ARGS__)

#define	vfnmacc_vv_f32m4(...) __riscv_vfnmacc_vv_f32m4_tu(__VA_ARGS__)

#define	vfnmacc_vv_f32m4_m(...) __riscv_vfnmacc_vv_f32m4_tumu(__VA_ARGS__)

#define	vfnmacc_vv_f32m8(...) __riscv_vfnmacc_vv_f32m8_tu(__VA_ARGS__)

#define	vfnmacc_vv_f32m8_m(...) __riscv_vfnmacc_vv_f32m8_tumu(__VA_ARGS__)

#define	vfnmacc_vv_f32mf2(...) __riscv_vfnmacc_vv_f32mf2_tu(__VA_ARGS__)

#define	vfnmacc_vv_f32mf2_m(...) __riscv_vfnmacc_vv_f32mf2_tumu(__VA_ARGS__)

#define	vfnmacc_vv_f64m1(...) __riscv_vfnmacc_vv_f64m1_tu(__VA_ARGS__)

#define	vfnmacc_vv_f64m1_m(...) __riscv_vfnmacc_vv_f64m1_tumu(__VA_ARGS__)

#define	vfnmacc_vv_f64m2(...) __riscv_vfnmacc_vv_f64m2_tu(__VA_ARGS__)

#define	vfnmacc_vv_f64m2_m(...) __riscv_vfnmacc_vv_f64m2_tumu(__VA_ARGS__)

#define	vfnmacc_vv_f64m4(...) __riscv_vfnmacc_vv_f64m4_tu(__VA_ARGS__)

#define	vfnmacc_vv_f64m4_m(...) __riscv_vfnmacc_vv_f64m4_tumu(__VA_ARGS__)

#define	vfnmacc_vv_f64m8(...) __riscv_vfnmacc_vv_f64m8_tu(__VA_ARGS__)

#define	vfnmacc_vv_f64m8_m(...) __riscv_vfnmacc_vv_f64m8_tumu(__VA_ARGS__)

#define	vfnmadd_vf_f16m1(...) __riscv_vfnmadd_vf_f16m1_tu(__VA_ARGS__)

#define	vfnmadd_vf_f16m1_m(...) __riscv_vfnmadd_vf_f16m1_tumu(__VA_ARGS__)

#define	vfnmadd_vf_f16m2(...) __riscv_vfnmadd_vf_f16m2_tu(__VA_ARGS__)

#define	vfnmadd_vf_f16m2_m(...) __riscv_vfnmadd_vf_f16m2_tumu(__VA_ARGS__)

#define	vfnmadd_vf_f16m4(...) __riscv_vfnmadd_vf_f16m4_tu(__VA_ARGS__)

#define	vfnmadd_vf_f16m4_m(...) __riscv_vfnmadd_vf_f16m4_tumu(__VA_ARGS__)

#define	vfnmadd_vf_f16m8(...) __riscv_vfnmadd_vf_f16m8_tu(__VA_ARGS__)

#define	vfnmadd_vf_f16m8_m(...) __riscv_vfnmadd_vf_f16m8_tumu(__VA_ARGS__)

#define	vfnmadd_vf_f16mf2(...) __riscv_vfnmadd_vf_f16mf2_tu(__VA_ARGS__)

#define	vfnmadd_vf_f16mf2_m(...) __riscv_vfnmadd_vf_f16mf2_tumu(__VA_ARGS__)

#define	vfnmadd_vf_f16mf4(...) __riscv_vfnmadd_vf_f16mf4_tu(__VA_ARGS__)

#define	vfnmadd_vf_f16mf4_m(...) __riscv_vfnmadd_vf_f16mf4_tumu(__VA_ARGS__)

#define	vfnmadd_vf_f32m1(...) __riscv_vfnmadd_vf_f32m1_tu(__VA_ARGS__)

#define	vfnmadd_vf_f32m1_m(...) __riscv_vfnmadd_vf_f32m1_tumu(__VA_ARGS__)

#define	vfnmadd_vf_f32m2(...) __riscv_vfnmadd_vf_f32m2_tu(__VA_ARGS__)

#define	vfnmadd_vf_f32m2_m(...) __riscv_vfnmadd_vf_f32m2_tumu(__VA_ARGS__)

#define	vfnmadd_vf_f32m4(...) __riscv_vfnmadd_vf_f32m4_tu(__VA_ARGS__)

#define	vfnmadd_vf_f32m4_m(...) __riscv_vfnmadd_vf_f32m4_tumu(__VA_ARGS__)

#define	vfnmadd_vf_f32m8(...) __riscv_vfnmadd_vf_f32m8_tu(__VA_ARGS__)

#define	vfnmadd_vf_f32m8_m(...) __riscv_vfnmadd_vf_f32m8_tumu(__VA_ARGS__)

#define	vfnmadd_vf_f32mf2(...) __riscv_vfnmadd_vf_f32mf2_tu(__VA_ARGS__)

#define	vfnmadd_vf_f32mf2_m(...) __riscv_vfnmadd_vf_f32mf2_tumu(__VA_ARGS__)

#define	vfnmadd_vf_f64m1(...) __riscv_vfnmadd_vf_f64m1_tu(__VA_ARGS__)

#define	vfnmadd_vf_f64m1_m(...) __riscv_vfnmadd_vf_f64m1_tumu(__VA_ARGS__)

#define	vfnmadd_vf_f64m2(...) __riscv_vfnmadd_vf_f64m2_tu(__VA_ARGS__)

#define	vfnmadd_vf_f64m2_m(...) __riscv_vfnmadd_vf_f64m2_tumu(__VA_ARGS__)

#define	vfnmadd_vf_f64m4(...) __riscv_vfnmadd_vf_f64m4_tu(__VA_ARGS__)

#define	vfnmadd_vf_f64m4_m(...) __riscv_vfnmadd_vf_f64m4_tumu(__VA_ARGS__)

#define	vfnmadd_vf_f64m8(...) __riscv_vfnmadd_vf_f64m8_tu(__VA_ARGS__)

#define	vfnmadd_vf_f64m8_m(...) __riscv_vfnmadd_vf_f64m8_tumu(__VA_ARGS__)

#define	vfnmadd_vv_f16m1(...) __riscv_vfnmadd_vv_f16m1_tu(__VA_ARGS__)

#define	vfnmadd_vv_f16m1_m(...) __riscv_vfnmadd_vv_f16m1_tumu(__VA_ARGS__)

#define	vfnmadd_vv_f16m2(...) __riscv_vfnmadd_vv_f16m2_tu(__VA_ARGS__)

#define	vfnmadd_vv_f16m2_m(...) __riscv_vfnmadd_vv_f16m2_tumu(__VA_ARGS__)

#define	vfnmadd_vv_f16m4(...) __riscv_vfnmadd_vv_f16m4_tu(__VA_ARGS__)

#define	vfnmadd_vv_f16m4_m(...) __riscv_vfnmadd_vv_f16m4_tumu(__VA_ARGS__)

#define	vfnmadd_vv_f16m8(...) __riscv_vfnmadd_vv_f16m8_tu(__VA_ARGS__)

#define	vfnmadd_vv_f16m8_m(...) __riscv_vfnmadd_vv_f16m8_tumu(__VA_ARGS__)

#define	vfnmadd_vv_f16mf2(...) __riscv_vfnmadd_vv_f16mf2_tu(__VA_ARGS__)

#define	vfnmadd_vv_f16mf2_m(...) __riscv_vfnmadd_vv_f16mf2_tumu(__VA_ARGS__)

#define	vfnmadd_vv_f16mf4(...) __riscv_vfnmadd_vv_f16mf4_tu(__VA_ARGS__)

#define	vfnmadd_vv_f16mf4_m(...) __riscv_vfnmadd_vv_f16mf4_tumu(__VA_ARGS__)

#define	vfnmadd_vv_f32m1(...) __riscv_vfnmadd_vv_f32m1_tu(__VA_ARGS__)

#define	vfnmadd_vv_f32m1_m(...) __riscv_vfnmadd_vv_f32m1_tumu(__VA_ARGS__)

#define	vfnmadd_vv_f32m2(...) __riscv_vfnmadd_vv_f32m2_tu(__VA_ARGS__)

#define	vfnmadd_vv_f32m2_m(...) __riscv_vfnmadd_vv_f32m2_tumu(__VA_ARGS__)

#define	vfnmadd_vv_f32m4(...) __riscv_vfnmadd_vv_f32m4_tu(__VA_ARGS__)

#define	vfnmadd_vv_f32m4_m(...) __riscv_vfnmadd_vv_f32m4_tumu(__VA_ARGS__)

#define	vfnmadd_vv_f32m8(...) __riscv_vfnmadd_vv_f32m8_tu(__VA_ARGS__)

#define	vfnmadd_vv_f32m8_m(...) __riscv_vfnmadd_vv_f32m8_tumu(__VA_ARGS__)

#define	vfnmadd_vv_f32mf2(...) __riscv_vfnmadd_vv_f32mf2_tu(__VA_ARGS__)

#define	vfnmadd_vv_f32mf2_m(...) __riscv_vfnmadd_vv_f32mf2_tumu(__VA_ARGS__)

#define	vfnmadd_vv_f64m1(...) __riscv_vfnmadd_vv_f64m1_tu(__VA_ARGS__)

#define	vfnmadd_vv_f64m1_m(...) __riscv_vfnmadd_vv_f64m1_tumu(__VA_ARGS__)

#define	vfnmadd_vv_f64m2(...) __riscv_vfnmadd_vv_f64m2_tu(__VA_ARGS__)

#define	vfnmadd_vv_f64m2_m(...) __riscv_vfnmadd_vv_f64m2_tumu(__VA_ARGS__)

#define	vfnmadd_vv_f64m4(...) __riscv_vfnmadd_vv_f64m4_tu(__VA_ARGS__)

#define	vfnmadd_vv_f64m4_m(...) __riscv_vfnmadd_vv_f64m4_tumu(__VA_ARGS__)

#define	vfnmadd_vv_f64m8(...) __riscv_vfnmadd_vv_f64m8_tu(__VA_ARGS__)

#define	vfnmadd_vv_f64m8_m(...) __riscv_vfnmadd_vv_f64m8_tumu(__VA_ARGS__)

#define	vfnmsac_vf_f16m1(...) __riscv_vfnmsac_vf_f16m1_tu(__VA_ARGS__)

#define	vfnmsac_vf_f16m1_m(...) __riscv_vfnmsac_vf_f16m1_tumu(__VA_ARGS__)

#define	vfnmsac_vf_f16m2(...) __riscv_vfnmsac_vf_f16m2_tu(__VA_ARGS__)

#define	vfnmsac_vf_f16m2_m(...) __riscv_vfnmsac_vf_f16m2_tumu(__VA_ARGS__)

#define	vfnmsac_vf_f16m4(...) __riscv_vfnmsac_vf_f16m4_tu(__VA_ARGS__)

#define	vfnmsac_vf_f16m4_m(...) __riscv_vfnmsac_vf_f16m4_tumu(__VA_ARGS__)

#define	vfnmsac_vf_f16m8(...) __riscv_vfnmsac_vf_f16m8_tu(__VA_ARGS__)

#define	vfnmsac_vf_f16m8_m(...) __riscv_vfnmsac_vf_f16m8_tumu(__VA_ARGS__)

#define	vfnmsac_vf_f16mf2(...) __riscv_vfnmsac_vf_f16mf2_tu(__VA_ARGS__)

#define	vfnmsac_vf_f16mf2_m(...) __riscv_vfnmsac_vf_f16mf2_tumu(__VA_ARGS__)

#define	vfnmsac_vf_f16mf4(...) __riscv_vfnmsac_vf_f16mf4_tu(__VA_ARGS__)

#define	vfnmsac_vf_f16mf4_m(...) __riscv_vfnmsac_vf_f16mf4_tumu(__VA_ARGS__)

#define	vfnmsac_vf_f32m1(...) __riscv_vfnmsac_vf_f32m1_tu(__VA_ARGS__)

#define	vfnmsac_vf_f32m1_m(...) __riscv_vfnmsac_vf_f32m1_tumu(__VA_ARGS__)

#define	vfnmsac_vf_f32m2(...) __riscv_vfnmsac_vf_f32m2_tu(__VA_ARGS__)

#define	vfnmsac_vf_f32m2_m(...) __riscv_vfnmsac_vf_f32m2_tumu(__VA_ARGS__)

#define	vfnmsac_vf_f32m4(...) __riscv_vfnmsac_vf_f32m4_tu(__VA_ARGS__)

#define	vfnmsac_vf_f32m4_m(...) __riscv_vfnmsac_vf_f32m4_tumu(__VA_ARGS__)

#define	vfnmsac_vf_f32m8(...) __riscv_vfnmsac_vf_f32m8_tu(__VA_ARGS__)

#define	vfnmsac_vf_f32m8_m(...) __riscv_vfnmsac_vf_f32m8_tumu(__VA_ARGS__)

#define	vfnmsac_vf_f32mf2(...) __riscv_vfnmsac_vf_f32mf2_tu(__VA_ARGS__)

#define	vfnmsac_vf_f32mf2_m(...) __riscv_vfnmsac_vf_f32mf2_tumu(__VA_ARGS__)

#define	vfnmsac_vf_f64m1(...) __riscv_vfnmsac_vf_f64m1_tu(__VA_ARGS__)

#define	vfnmsac_vf_f64m1_m(...) __riscv_vfnmsac_vf_f64m1_tumu(__VA_ARGS__)

#define	vfnmsac_vf_f64m2(...) __riscv_vfnmsac_vf_f64m2_tu(__VA_ARGS__)

#define	vfnmsac_vf_f64m2_m(...) __riscv_vfnmsac_vf_f64m2_tumu(__VA_ARGS__)

#define	vfnmsac_vf_f64m4(...) __riscv_vfnmsac_vf_f64m4_tu(__VA_ARGS__)

#define	vfnmsac_vf_f64m4_m(...) __riscv_vfnmsac_vf_f64m4_tumu(__VA_ARGS__)

#define	vfnmsac_vf_f64m8(...) __riscv_vfnmsac_vf_f64m8_tu(__VA_ARGS__)

#define	vfnmsac_vf_f64m8_m(...) __riscv_vfnmsac_vf_f64m8_tumu(__VA_ARGS__)

#define	vfnmsac_vv_f16m1(...) __riscv_vfnmsac_vv_f16m1_tu(__VA_ARGS__)

#define	vfnmsac_vv_f16m1_m(...) __riscv_vfnmsac_vv_f16m1_tumu(__VA_ARGS__)

#define	vfnmsac_vv_f16m2(...) __riscv_vfnmsac_vv_f16m2_tu(__VA_ARGS__)

#define	vfnmsac_vv_f16m2_m(...) __riscv_vfnmsac_vv_f16m2_tumu(__VA_ARGS__)

#define	vfnmsac_vv_f16m4(...) __riscv_vfnmsac_vv_f16m4_tu(__VA_ARGS__)

#define	vfnmsac_vv_f16m4_m(...) __riscv_vfnmsac_vv_f16m4_tumu(__VA_ARGS__)

#define	vfnmsac_vv_f16m8(...) __riscv_vfnmsac_vv_f16m8_tu(__VA_ARGS__)

#define	vfnmsac_vv_f16m8_m(...) __riscv_vfnmsac_vv_f16m8_tumu(__VA_ARGS__)

#define	vfnmsac_vv_f16mf2(...) __riscv_vfnmsac_vv_f16mf2_tu(__VA_ARGS__)

#define	vfnmsac_vv_f16mf2_m(...) __riscv_vfnmsac_vv_f16mf2_tumu(__VA_ARGS__)

#define	vfnmsac_vv_f16mf4(...) __riscv_vfnmsac_vv_f16mf4_tu(__VA_ARGS__)

#define	vfnmsac_vv_f16mf4_m(...) __riscv_vfnmsac_vv_f16mf4_tumu(__VA_ARGS__)

#define	vfnmsac_vv_f32m1(...) __riscv_vfnmsac_vv_f32m1_tu(__VA_ARGS__)

#define	vfnmsac_vv_f32m1_m(...) __riscv_vfnmsac_vv_f32m1_tumu(__VA_ARGS__)

#define	vfnmsac_vv_f32m2(...) __riscv_vfnmsac_vv_f32m2_tu(__VA_ARGS__)

#define	vfnmsac_vv_f32m2_m(...) __riscv_vfnmsac_vv_f32m2_tumu(__VA_ARGS__)

#define	vfnmsac_vv_f32m4(...) __riscv_vfnmsac_vv_f32m4_tu(__VA_ARGS__)

#define	vfnmsac_vv_f32m4_m(...) __riscv_vfnmsac_vv_f32m4_tumu(__VA_ARGS__)

#define	vfnmsac_vv_f32m8(...) __riscv_vfnmsac_vv_f32m8_tu(__VA_ARGS__)

#define	vfnmsac_vv_f32m8_m(...) __riscv_vfnmsac_vv_f32m8_tumu(__VA_ARGS__)

#define	vfnmsac_vv_f32mf2(...) __riscv_vfnmsac_vv_f32mf2_tu(__VA_ARGS__)

#define	vfnmsac_vv_f32mf2_m(...) __riscv_vfnmsac_vv_f32mf2_tumu(__VA_ARGS__)

#define	vfnmsac_vv_f64m1(...) __riscv_vfnmsac_vv_f64m1_tu(__VA_ARGS__)

#define	vfnmsac_vv_f64m1_m(...) __riscv_vfnmsac_vv_f64m1_tumu(__VA_ARGS__)

#define	vfnmsac_vv_f64m2(...) __riscv_vfnmsac_vv_f64m2_tu(__VA_ARGS__)

#define	vfnmsac_vv_f64m2_m(...) __riscv_vfnmsac_vv_f64m2_tumu(__VA_ARGS__)

#define	vfnmsac_vv_f64m4(...) __riscv_vfnmsac_vv_f64m4_tu(__VA_ARGS__)

#define	vfnmsac_vv_f64m4_m(...) __riscv_vfnmsac_vv_f64m4_tumu(__VA_ARGS__)

#define	vfnmsac_vv_f64m8(...) __riscv_vfnmsac_vv_f64m8_tu(__VA_ARGS__)

#define	vfnmsac_vv_f64m8_m(...) __riscv_vfnmsac_vv_f64m8_tumu(__VA_ARGS__)

#define	vfnmsub_vf_f16m1(...) __riscv_vfnmsub_vf_f16m1_tu(__VA_ARGS__)

#define	vfnmsub_vf_f16m1_m(...) __riscv_vfnmsub_vf_f16m1_tumu(__VA_ARGS__)

#define	vfnmsub_vf_f16m2(...) __riscv_vfnmsub_vf_f16m2_tu(__VA_ARGS__)

#define	vfnmsub_vf_f16m2_m(...) __riscv_vfnmsub_vf_f16m2_tumu(__VA_ARGS__)

#define	vfnmsub_vf_f16m4(...) __riscv_vfnmsub_vf_f16m4_tu(__VA_ARGS__)

#define	vfnmsub_vf_f16m4_m(...) __riscv_vfnmsub_vf_f16m4_tumu(__VA_ARGS__)

#define	vfnmsub_vf_f16m8(...) __riscv_vfnmsub_vf_f16m8_tu(__VA_ARGS__)

#define	vfnmsub_vf_f16m8_m(...) __riscv_vfnmsub_vf_f16m8_tumu(__VA_ARGS__)

#define	vfnmsub_vf_f16mf2(...) __riscv_vfnmsub_vf_f16mf2_tu(__VA_ARGS__)

#define	vfnmsub_vf_f16mf2_m(...) __riscv_vfnmsub_vf_f16mf2_tumu(__VA_ARGS__)

#define	vfnmsub_vf_f16mf4(...) __riscv_vfnmsub_vf_f16mf4_tu(__VA_ARGS__)

#define	vfnmsub_vf_f16mf4_m(...) __riscv_vfnmsub_vf_f16mf4_tumu(__VA_ARGS__)

#define	vfnmsub_vf_f32m1(...) __riscv_vfnmsub_vf_f32m1_tu(__VA_ARGS__)

#define	vfnmsub_vf_f32m1_m(...) __riscv_vfnmsub_vf_f32m1_tumu(__VA_ARGS__)

#define	vfnmsub_vf_f32m2(...) __riscv_vfnmsub_vf_f32m2_tu(__VA_ARGS__)

#define	vfnmsub_vf_f32m2_m(...) __riscv_vfnmsub_vf_f32m2_tumu(__VA_ARGS__)

#define	vfnmsub_vf_f32m4(...) __riscv_vfnmsub_vf_f32m4_tu(__VA_ARGS__)

#define	vfnmsub_vf_f32m4_m(...) __riscv_vfnmsub_vf_f32m4_tumu(__VA_ARGS__)

#define	vfnmsub_vf_f32m8(...) __riscv_vfnmsub_vf_f32m8_tu(__VA_ARGS__)

#define	vfnmsub_vf_f32m8_m(...) __riscv_vfnmsub_vf_f32m8_tumu(__VA_ARGS__)

#define	vfnmsub_vf_f32mf2(...) __riscv_vfnmsub_vf_f32mf2_tu(__VA_ARGS__)

#define	vfnmsub_vf_f32mf2_m(...) __riscv_vfnmsub_vf_f32mf2_tumu(__VA_ARGS__)

#define	vfnmsub_vf_f64m1(...) __riscv_vfnmsub_vf_f64m1_tu(__VA_ARGS__)

#define	vfnmsub_vf_f64m1_m(...) __riscv_vfnmsub_vf_f64m1_tumu(__VA_ARGS__)

#define	vfnmsub_vf_f64m2(...) __riscv_vfnmsub_vf_f64m2_tu(__VA_ARGS__)

#define	vfnmsub_vf_f64m2_m(...) __riscv_vfnmsub_vf_f64m2_tumu(__VA_ARGS__)

#define	vfnmsub_vf_f64m4(...) __riscv_vfnmsub_vf_f64m4_tu(__VA_ARGS__)

#define	vfnmsub_vf_f64m4_m(...) __riscv_vfnmsub_vf_f64m4_tumu(__VA_ARGS__)

#define	vfnmsub_vf_f64m8(...) __riscv_vfnmsub_vf_f64m8_tu(__VA_ARGS__)

#define	vfnmsub_vf_f64m8_m(...) __riscv_vfnmsub_vf_f64m8_tumu(__VA_ARGS__)

#define	vfnmsub_vv_f16m1(...) __riscv_vfnmsub_vv_f16m1_tu(__VA_ARGS__)

#define	vfnmsub_vv_f16m1_m(...) __riscv_vfnmsub_vv_f16m1_tumu(__VA_ARGS__)

#define	vfnmsub_vv_f16m2(...) __riscv_vfnmsub_vv_f16m2_tu(__VA_ARGS__)

#define	vfnmsub_vv_f16m2_m(...) __riscv_vfnmsub_vv_f16m2_tumu(__VA_ARGS__)

#define	vfnmsub_vv_f16m4(...) __riscv_vfnmsub_vv_f16m4_tu(__VA_ARGS__)

#define	vfnmsub_vv_f16m4_m(...) __riscv_vfnmsub_vv_f16m4_tumu(__VA_ARGS__)

#define	vfnmsub_vv_f16m8(...) __riscv_vfnmsub_vv_f16m8_tu(__VA_ARGS__)

#define	vfnmsub_vv_f16m8_m(...) __riscv_vfnmsub_vv_f16m8_tumu(__VA_ARGS__)

#define	vfnmsub_vv_f16mf2(...) __riscv_vfnmsub_vv_f16mf2_tu(__VA_ARGS__)

#define	vfnmsub_vv_f16mf2_m(...) __riscv_vfnmsub_vv_f16mf2_tumu(__VA_ARGS__)

#define	vfnmsub_vv_f16mf4(...) __riscv_vfnmsub_vv_f16mf4_tu(__VA_ARGS__)

#define	vfnmsub_vv_f16mf4_m(...) __riscv_vfnmsub_vv_f16mf4_tumu(__VA_ARGS__)

#define	vfnmsub_vv_f32m1(...) __riscv_vfnmsub_vv_f32m1_tu(__VA_ARGS__)

#define	vfnmsub_vv_f32m1_m(...) __riscv_vfnmsub_vv_f32m1_tumu(__VA_ARGS__)

#define	vfnmsub_vv_f32m2(...) __riscv_vfnmsub_vv_f32m2_tu(__VA_ARGS__)

#define	vfnmsub_vv_f32m2_m(...) __riscv_vfnmsub_vv_f32m2_tumu(__VA_ARGS__)

#define	vfnmsub_vv_f32m4(...) __riscv_vfnmsub_vv_f32m4_tu(__VA_ARGS__)

#define	vfnmsub_vv_f32m4_m(...) __riscv_vfnmsub_vv_f32m4_tumu(__VA_ARGS__)

#define	vfnmsub_vv_f32m8(...) __riscv_vfnmsub_vv_f32m8_tu(__VA_ARGS__)

#define	vfnmsub_vv_f32m8_m(...) __riscv_vfnmsub_vv_f32m8_tumu(__VA_ARGS__)

#define	vfnmsub_vv_f32mf2(...) __riscv_vfnmsub_vv_f32mf2_tu(__VA_ARGS__)

#define	vfnmsub_vv_f32mf2_m(...) __riscv_vfnmsub_vv_f32mf2_tumu(__VA_ARGS__)

#define	vfnmsub_vv_f64m1(...) __riscv_vfnmsub_vv_f64m1_tu(__VA_ARGS__)

#define	vfnmsub_vv_f64m1_m(...) __riscv_vfnmsub_vv_f64m1_tumu(__VA_ARGS__)

#define	vfnmsub_vv_f64m2(...) __riscv_vfnmsub_vv_f64m2_tu(__VA_ARGS__)

#define	vfnmsub_vv_f64m2_m(...) __riscv_vfnmsub_vv_f64m2_tumu(__VA_ARGS__)

#define	vfnmsub_vv_f64m4(...) __riscv_vfnmsub_vv_f64m4_tu(__VA_ARGS__)

#define	vfnmsub_vv_f64m4_m(...) __riscv_vfnmsub_vv_f64m4_tumu(__VA_ARGS__)

#define	vfnmsub_vv_f64m8(...) __riscv_vfnmsub_vv_f64m8_tu(__VA_ARGS__)

#define	vfnmsub_vv_f64m8_m(...) __riscv_vfnmsub_vv_f64m8_tumu(__VA_ARGS__)

#define	vfrdiv_vf_f16m1(...) __riscv_vfrdiv_vf_f16m1(__VA_ARGS__)

#define	vfrdiv_vf_f16m1_m(...) __riscv_vfrdiv_vf_f16m1_tumu(__VA_ARGS__)

#define	vfrdiv_vf_f16m2(...) __riscv_vfrdiv_vf_f16m2(__VA_ARGS__)

#define	vfrdiv_vf_f16m2_m(...) __riscv_vfrdiv_vf_f16m2_tumu(__VA_ARGS__)

#define	vfrdiv_vf_f16m4(...) __riscv_vfrdiv_vf_f16m4(__VA_ARGS__)

#define	vfrdiv_vf_f16m4_m(...) __riscv_vfrdiv_vf_f16m4_tumu(__VA_ARGS__)

#define	vfrdiv_vf_f16m8(...) __riscv_vfrdiv_vf_f16m8(__VA_ARGS__)

#define	vfrdiv_vf_f16m8_m(...) __riscv_vfrdiv_vf_f16m8_tumu(__VA_ARGS__)

#define	vfrdiv_vf_f16mf2(...) __riscv_vfrdiv_vf_f16mf2(__VA_ARGS__)

#define	vfrdiv_vf_f16mf2_m(...) __riscv_vfrdiv_vf_f16mf2_tumu(__VA_ARGS__)

#define	vfrdiv_vf_f16mf4(...) __riscv_vfrdiv_vf_f16mf4(__VA_ARGS__)

#define	vfrdiv_vf_f16mf4_m(...) __riscv_vfrdiv_vf_f16mf4_tumu(__VA_ARGS__)

#define	vfrdiv_vf_f32m1(...) __riscv_vfrdiv_vf_f32m1(__VA_ARGS__)

#define	vfrdiv_vf_f32m1_m(...) __riscv_vfrdiv_vf_f32m1_tumu(__VA_ARGS__)

#define	vfrdiv_vf_f32m2(...) __riscv_vfrdiv_vf_f32m2(__VA_ARGS__)

#define	vfrdiv_vf_f32m2_m(...) __riscv_vfrdiv_vf_f32m2_tumu(__VA_ARGS__)

#define	vfrdiv_vf_f32m4(...) __riscv_vfrdiv_vf_f32m4(__VA_ARGS__)

#define	vfrdiv_vf_f32m4_m(...) __riscv_vfrdiv_vf_f32m4_tumu(__VA_ARGS__)

#define	vfrdiv_vf_f32m8(...) __riscv_vfrdiv_vf_f32m8(__VA_ARGS__)

#define	vfrdiv_vf_f32m8_m(...) __riscv_vfrdiv_vf_f32m8_tumu(__VA_ARGS__)

#define	vfrdiv_vf_f32mf2(...) __riscv_vfrdiv_vf_f32mf2(__VA_ARGS__)

#define	vfrdiv_vf_f32mf2_m(...) __riscv_vfrdiv_vf_f32mf2_tumu(__VA_ARGS__)

#define	vfrdiv_vf_f64m1(...) __riscv_vfrdiv_vf_f64m1(__VA_ARGS__)

#define	vfrdiv_vf_f64m1_m(...) __riscv_vfrdiv_vf_f64m1_tumu(__VA_ARGS__)

#define	vfrdiv_vf_f64m2(...) __riscv_vfrdiv_vf_f64m2(__VA_ARGS__)

#define	vfrdiv_vf_f64m2_m(...) __riscv_vfrdiv_vf_f64m2_tumu(__VA_ARGS__)

#define	vfrdiv_vf_f64m4(...) __riscv_vfrdiv_vf_f64m4(__VA_ARGS__)

#define	vfrdiv_vf_f64m4_m(...) __riscv_vfrdiv_vf_f64m4_tumu(__VA_ARGS__)

#define	vfrdiv_vf_f64m8(...) __riscv_vfrdiv_vf_f64m8(__VA_ARGS__)

#define	vfrdiv_vf_f64m8_m(...) __riscv_vfrdiv_vf_f64m8_tumu(__VA_ARGS__)

#define	vfrec7_v_f16m1(...) __riscv_vfrec7_v_f16m1(__VA_ARGS__)

#define	vfrec7_v_f16m1_m(...) __riscv_vfrec7_v_f16m1_tumu(__VA_ARGS__)

#define	vfrec7_v_f16m2(...) __riscv_vfrec7_v_f16m2(__VA_ARGS__)

#define	vfrec7_v_f16m2_m(...) __riscv_vfrec7_v_f16m2_tumu(__VA_ARGS__)

#define	vfrec7_v_f16m4(...) __riscv_vfrec7_v_f16m4(__VA_ARGS__)

#define	vfrec7_v_f16m4_m(...) __riscv_vfrec7_v_f16m4_tumu(__VA_ARGS__)

#define	vfrec7_v_f16m8(...) __riscv_vfrec7_v_f16m8(__VA_ARGS__)

#define	vfrec7_v_f16m8_m(...) __riscv_vfrec7_v_f16m8_tumu(__VA_ARGS__)

#define	vfrec7_v_f16mf2(...) __riscv_vfrec7_v_f16mf2(__VA_ARGS__)

#define	vfrec7_v_f16mf2_m(...) __riscv_vfrec7_v_f16mf2_tumu(__VA_ARGS__)

#define	vfrec7_v_f16mf4(...) __riscv_vfrec7_v_f16mf4(__VA_ARGS__)

#define	vfrec7_v_f16mf4_m(...) __riscv_vfrec7_v_f16mf4_tumu(__VA_ARGS__)

#define	vfrec7_v_f32m1(...) __riscv_vfrec7_v_f32m1(__VA_ARGS__)

#define	vfrec7_v_f32m1_m(...) __riscv_vfrec7_v_f32m1_tumu(__VA_ARGS__)

#define	vfrec7_v_f32m2(...) __riscv_vfrec7_v_f32m2(__VA_ARGS__)

#define	vfrec7_v_f32m2_m(...) __riscv_vfrec7_v_f32m2_tumu(__VA_ARGS__)

#define	vfrec7_v_f32m4(...) __riscv_vfrec7_v_f32m4(__VA_ARGS__)

#define	vfrec7_v_f32m4_m(...) __riscv_vfrec7_v_f32m4_tumu(__VA_ARGS__)

#define	vfrec7_v_f32m8(...) __riscv_vfrec7_v_f32m8(__VA_ARGS__)

#define	vfrec7_v_f32m8_m(...) __riscv_vfrec7_v_f32m8_tumu(__VA_ARGS__)

#define	vfrec7_v_f32mf2(...) __riscv_vfrec7_v_f32mf2(__VA_ARGS__)

#define	vfrec7_v_f32mf2_m(...) __riscv_vfrec7_v_f32mf2_tumu(__VA_ARGS__)

#define	vfrec7_v_f64m1(...) __riscv_vfrec7_v_f64m1(__VA_ARGS__)

#define	vfrec7_v_f64m1_m(...) __riscv_vfrec7_v_f64m1_tumu(__VA_ARGS__)

#define	vfrec7_v_f64m2(...) __riscv_vfrec7_v_f64m2(__VA_ARGS__)

#define	vfrec7_v_f64m2_m(...) __riscv_vfrec7_v_f64m2_tumu(__VA_ARGS__)

#define	vfrec7_v_f64m4(...) __riscv_vfrec7_v_f64m4(__VA_ARGS__)

#define	vfrec7_v_f64m4_m(...) __riscv_vfrec7_v_f64m4_tumu(__VA_ARGS__)

#define	vfrec7_v_f64m8(...) __riscv_vfrec7_v_f64m8(__VA_ARGS__)

#define	vfrec7_v_f64m8_m(...) __riscv_vfrec7_v_f64m8_tumu(__VA_ARGS__)

#define	vfredmax_vs_f16m1_f16m1(...) __riscv_vfredmax_vs_f16m1_f16m1_tu(__VA_ARGS__)

#define	vfredmax_vs_f16m1_f16m1_m(...) __riscv_vfredmax_vs_f16m1_f16m1_tum(__VA_ARGS__)

#define	vfredmax_vs_f16m2_f16m1(...) __riscv_vfredmax_vs_f16m2_f16m1_tu(__VA_ARGS__)

#define	vfredmax_vs_f16m2_f16m1_m(...) __riscv_vfredmax_vs_f16m2_f16m1_tum(__VA_ARGS__)

#define	vfredmax_vs_f16m4_f16m1(...) __riscv_vfredmax_vs_f16m4_f16m1_tu(__VA_ARGS__)

#define	vfredmax_vs_f16m4_f16m1_m(...) __riscv_vfredmax_vs_f16m4_f16m1_tum(__VA_ARGS__)

#define	vfredmax_vs_f16m8_f16m1(...) __riscv_vfredmax_vs_f16m8_f16m1_tu(__VA_ARGS__)

#define	vfredmax_vs_f16m8_f16m1_m(...) __riscv_vfredmax_vs_f16m8_f16m1_tum(__VA_ARGS__)

#define	vfredmax_vs_f16mf2_f16m1(...) __riscv_vfredmax_vs_f16mf2_f16m1_tu(__VA_ARGS__)

#define	vfredmax_vs_f16mf2_f16m1_m(...) __riscv_vfredmax_vs_f16mf2_f16m1_tum(__VA_ARGS__)

#define	vfredmax_vs_f16mf4_f16m1(...) __riscv_vfredmax_vs_f16mf4_f16m1_tu(__VA_ARGS__)

#define	vfredmax_vs_f16mf4_f16m1_m(...) __riscv_vfredmax_vs_f16mf4_f16m1_tum(__VA_ARGS__)

#define	vfredmax_vs_f32m1_f32m1(...) __riscv_vfredmax_vs_f32m1_f32m1_tu(__VA_ARGS__)

#define	vfredmax_vs_f32m1_f32m1_m(...) __riscv_vfredmax_vs_f32m1_f32m1_tum(__VA_ARGS__)

#define	vfredmax_vs_f32m2_f32m1(...) __riscv_vfredmax_vs_f32m2_f32m1_tu(__VA_ARGS__)

#define	vfredmax_vs_f32m2_f32m1_m(...) __riscv_vfredmax_vs_f32m2_f32m1_tum(__VA_ARGS__)

#define	vfredmax_vs_f32m4_f32m1(...) __riscv_vfredmax_vs_f32m4_f32m1_tu(__VA_ARGS__)

#define	vfredmax_vs_f32m4_f32m1_m(...) __riscv_vfredmax_vs_f32m4_f32m1_tum(__VA_ARGS__)

#define	vfredmax_vs_f32m8_f32m1(...) __riscv_vfredmax_vs_f32m8_f32m1_tu(__VA_ARGS__)

#define	vfredmax_vs_f32m8_f32m1_m(...) __riscv_vfredmax_vs_f32m8_f32m1_tum(__VA_ARGS__)

#define	vfredmax_vs_f32mf2_f32m1(...) __riscv_vfredmax_vs_f32mf2_f32m1_tu(__VA_ARGS__)

#define	vfredmax_vs_f32mf2_f32m1_m(...) __riscv_vfredmax_vs_f32mf2_f32m1_tum(__VA_ARGS__)

#define	vfredmax_vs_f64m1_f64m1(...) __riscv_vfredmax_vs_f64m1_f64m1_tu(__VA_ARGS__)

#define	vfredmax_vs_f64m1_f64m1_m(...) __riscv_vfredmax_vs_f64m1_f64m1_tum(__VA_ARGS__)

#define	vfredmax_vs_f64m2_f64m1(...) __riscv_vfredmax_vs_f64m2_f64m1_tu(__VA_ARGS__)

#define	vfredmax_vs_f64m2_f64m1_m(...) __riscv_vfredmax_vs_f64m2_f64m1_tum(__VA_ARGS__)

#define	vfredmax_vs_f64m4_f64m1(...) __riscv_vfredmax_vs_f64m4_f64m1_tu(__VA_ARGS__)

#define	vfredmax_vs_f64m4_f64m1_m(...) __riscv_vfredmax_vs_f64m4_f64m1_tum(__VA_ARGS__)

#define	vfredmax_vs_f64m8_f64m1(...) __riscv_vfredmax_vs_f64m8_f64m1_tu(__VA_ARGS__)

#define	vfredmax_vs_f64m8_f64m1_m(...) __riscv_vfredmax_vs_f64m8_f64m1_tum(__VA_ARGS__)

#define	vfredmin_vs_f16m1_f16m1(...) __riscv_vfredmin_vs_f16m1_f16m1_tu(__VA_ARGS__)

#define	vfredmin_vs_f16m1_f16m1_m(...) __riscv_vfredmin_vs_f16m1_f16m1_tum(__VA_ARGS__)

#define	vfredmin_vs_f16m2_f16m1(...) __riscv_vfredmin_vs_f16m2_f16m1_tu(__VA_ARGS__)

#define	vfredmin_vs_f16m2_f16m1_m(...) __riscv_vfredmin_vs_f16m2_f16m1_tum(__VA_ARGS__)

#define	vfredmin_vs_f16m4_f16m1(...) __riscv_vfredmin_vs_f16m4_f16m1_tu(__VA_ARGS__)

#define	vfredmin_vs_f16m4_f16m1_m(...) __riscv_vfredmin_vs_f16m4_f16m1_tum(__VA_ARGS__)

#define	vfredmin_vs_f16m8_f16m1(...) __riscv_vfredmin_vs_f16m8_f16m1_tu(__VA_ARGS__)

#define	vfredmin_vs_f16m8_f16m1_m(...) __riscv_vfredmin_vs_f16m8_f16m1_tum(__VA_ARGS__)

#define	vfredmin_vs_f16mf2_f16m1(...) __riscv_vfredmin_vs_f16mf2_f16m1_tu(__VA_ARGS__)

#define	vfredmin_vs_f16mf2_f16m1_m(...) __riscv_vfredmin_vs_f16mf2_f16m1_tum(__VA_ARGS__)

#define	vfredmin_vs_f16mf4_f16m1(...) __riscv_vfredmin_vs_f16mf4_f16m1_tu(__VA_ARGS__)

#define	vfredmin_vs_f16mf4_f16m1_m(...) __riscv_vfredmin_vs_f16mf4_f16m1_tum(__VA_ARGS__)

#define	vfredmin_vs_f32m1_f32m1(...) __riscv_vfredmin_vs_f32m1_f32m1_tu(__VA_ARGS__)

#define	vfredmin_vs_f32m1_f32m1_m(...) __riscv_vfredmin_vs_f32m1_f32m1_tum(__VA_ARGS__)

#define	vfredmin_vs_f32m2_f32m1(...) __riscv_vfredmin_vs_f32m2_f32m1_tu(__VA_ARGS__)

#define	vfredmin_vs_f32m2_f32m1_m(...) __riscv_vfredmin_vs_f32m2_f32m1_tum(__VA_ARGS__)

#define	vfredmin_vs_f32m4_f32m1(...) __riscv_vfredmin_vs_f32m4_f32m1_tu(__VA_ARGS__)

#define	vfredmin_vs_f32m4_f32m1_m(...) __riscv_vfredmin_vs_f32m4_f32m1_tum(__VA_ARGS__)

#define	vfredmin_vs_f32m8_f32m1(...) __riscv_vfredmin_vs_f32m8_f32m1_tu(__VA_ARGS__)

#define	vfredmin_vs_f32m8_f32m1_m(...) __riscv_vfredmin_vs_f32m8_f32m1_tum(__VA_ARGS__)

#define	vfredmin_vs_f32mf2_f32m1(...) __riscv_vfredmin_vs_f32mf2_f32m1_tu(__VA_ARGS__)

#define	vfredmin_vs_f32mf2_f32m1_m(...) __riscv_vfredmin_vs_f32mf2_f32m1_tum(__VA_ARGS__)

#define	vfredmin_vs_f64m1_f64m1(...) __riscv_vfredmin_vs_f64m1_f64m1_tu(__VA_ARGS__)

#define	vfredmin_vs_f64m1_f64m1_m(...) __riscv_vfredmin_vs_f64m1_f64m1_tum(__VA_ARGS__)

#define	vfredmin_vs_f64m2_f64m1(...) __riscv_vfredmin_vs_f64m2_f64m1_tu(__VA_ARGS__)

#define	vfredmin_vs_f64m2_f64m1_m(...) __riscv_vfredmin_vs_f64m2_f64m1_tum(__VA_ARGS__)

#define	vfredmin_vs_f64m4_f64m1(...) __riscv_vfredmin_vs_f64m4_f64m1_tu(__VA_ARGS__)

#define	vfredmin_vs_f64m4_f64m1_m(...) __riscv_vfredmin_vs_f64m4_f64m1_tum(__VA_ARGS__)

#define	vfredmin_vs_f64m8_f64m1(...) __riscv_vfredmin_vs_f64m8_f64m1_tu(__VA_ARGS__)

#define	vfredmin_vs_f64m8_f64m1_m(...) __riscv_vfredmin_vs_f64m8_f64m1_tum(__VA_ARGS__)

#define	vfredosum_vs_f16m1_f16m1(...) __riscv_vfredosum_vs_f16m1_f16m1_tu(__VA_ARGS__)

#define	vfredosum_vs_f16m1_f16m1_m(...) __riscv_vfredosum_vs_f16m1_f16m1_tum(__VA_ARGS__)

#define	vfredosum_vs_f16m2_f16m1(...) __riscv_vfredosum_vs_f16m2_f16m1_tu(__VA_ARGS__)

#define	vfredosum_vs_f16m2_f16m1_m(...) __riscv_vfredosum_vs_f16m2_f16m1_tum(__VA_ARGS__)

#define	vfredosum_vs_f16m4_f16m1(...) __riscv_vfredosum_vs_f16m4_f16m1_tu(__VA_ARGS__)

#define	vfredosum_vs_f16m4_f16m1_m(...) __riscv_vfredosum_vs_f16m4_f16m1_tum(__VA_ARGS__)

#define	vfredosum_vs_f16m8_f16m1(...) __riscv_vfredosum_vs_f16m8_f16m1_tu(__VA_ARGS__)

#define	vfredosum_vs_f16m8_f16m1_m(...) __riscv_vfredosum_vs_f16m8_f16m1_tum(__VA_ARGS__)

#define	vfredosum_vs_f16mf2_f16m1(...) __riscv_vfredosum_vs_f16mf2_f16m1_tu(__VA_ARGS__)

#define	vfredosum_vs_f16mf2_f16m1_m(...) __riscv_vfredosum_vs_f16mf2_f16m1_tum(__VA_ARGS__)

#define	vfredosum_vs_f16mf4_f16m1(...) __riscv_vfredosum_vs_f16mf4_f16m1_tu(__VA_ARGS__)

#define	vfredosum_vs_f16mf4_f16m1_m(...) __riscv_vfredosum_vs_f16mf4_f16m1_tum(__VA_ARGS__)

#define	vfredosum_vs_f32m1_f32m1(...) __riscv_vfredosum_vs_f32m1_f32m1_tu(__VA_ARGS__)

#define	vfredosum_vs_f32m1_f32m1_m(...) __riscv_vfredosum_vs_f32m1_f32m1_tum(__VA_ARGS__)

#define	vfredosum_vs_f32m2_f32m1(...) __riscv_vfredosum_vs_f32m2_f32m1_tu(__VA_ARGS__)

#define	vfredosum_vs_f32m2_f32m1_m(...) __riscv_vfredosum_vs_f32m2_f32m1_tum(__VA_ARGS__)

#define	vfredosum_vs_f32m4_f32m1(...) __riscv_vfredosum_vs_f32m4_f32m1_tu(__VA_ARGS__)

#define	vfredosum_vs_f32m4_f32m1_m(...) __riscv_vfredosum_vs_f32m4_f32m1_tum(__VA_ARGS__)

#define	vfredosum_vs_f32m8_f32m1(...) __riscv_vfredosum_vs_f32m8_f32m1_tu(__VA_ARGS__)

#define	vfredosum_vs_f32m8_f32m1_m(...) __riscv_vfredosum_vs_f32m8_f32m1_tum(__VA_ARGS__)

#define	vfredosum_vs_f32mf2_f32m1(...) __riscv_vfredosum_vs_f32mf2_f32m1_tu(__VA_ARGS__)

#define	vfredosum_vs_f32mf2_f32m1_m(...) __riscv_vfredosum_vs_f32mf2_f32m1_tum(__VA_ARGS__)

#define	vfredosum_vs_f64m1_f64m1(...) __riscv_vfredosum_vs_f64m1_f64m1_tu(__VA_ARGS__)

#define	vfredosum_vs_f64m1_f64m1_m(...) __riscv_vfredosum_vs_f64m1_f64m1_tum(__VA_ARGS__)

#define	vfredosum_vs_f64m2_f64m1(...) __riscv_vfredosum_vs_f64m2_f64m1_tu(__VA_ARGS__)

#define	vfredosum_vs_f64m2_f64m1_m(...) __riscv_vfredosum_vs_f64m2_f64m1_tum(__VA_ARGS__)

#define	vfredosum_vs_f64m4_f64m1(...) __riscv_vfredosum_vs_f64m4_f64m1_tu(__VA_ARGS__)

#define	vfredosum_vs_f64m4_f64m1_m(...) __riscv_vfredosum_vs_f64m4_f64m1_tum(__VA_ARGS__)

#define	vfredosum_vs_f64m8_f64m1(...) __riscv_vfredosum_vs_f64m8_f64m1_tu(__VA_ARGS__)

#define	vfredosum_vs_f64m8_f64m1_m(...) __riscv_vfredosum_vs_f64m8_f64m1_tum(__VA_ARGS__)

#define	vfredusum_vs_f16m1_f16m1(...) __riscv_vfredusum_vs_f16m1_f16m1_tu(__VA_ARGS__)

#define	vfredusum_vs_f16m1_f16m1_m(...) __riscv_vfredusum_vs_f16m1_f16m1_tum(__VA_ARGS__)

#define	vfredusum_vs_f16m2_f16m1(...) __riscv_vfredusum_vs_f16m2_f16m1_tu(__VA_ARGS__)

#define	vfredusum_vs_f16m2_f16m1_m(...) __riscv_vfredusum_vs_f16m2_f16m1_tum(__VA_ARGS__)

#define	vfredusum_vs_f16m4_f16m1(...) __riscv_vfredusum_vs_f16m4_f16m1_tu(__VA_ARGS__)

#define	vfredusum_vs_f16m4_f16m1_m(...) __riscv_vfredusum_vs_f16m4_f16m1_tum(__VA_ARGS__)

#define	vfredusum_vs_f16m8_f16m1(...) __riscv_vfredusum_vs_f16m8_f16m1_tu(__VA_ARGS__)

#define	vfredusum_vs_f16m8_f16m1_m(...) __riscv_vfredusum_vs_f16m8_f16m1_tum(__VA_ARGS__)

#define	vfredusum_vs_f16mf2_f16m1(...) __riscv_vfredusum_vs_f16mf2_f16m1_tu(__VA_ARGS__)

#define	vfredusum_vs_f16mf2_f16m1_m(...) __riscv_vfredusum_vs_f16mf2_f16m1_tum(__VA_ARGS__)

#define	vfredusum_vs_f16mf4_f16m1(...) __riscv_vfredusum_vs_f16mf4_f16m1_tu(__VA_ARGS__)

#define	vfredusum_vs_f16mf4_f16m1_m(...) __riscv_vfredusum_vs_f16mf4_f16m1_tum(__VA_ARGS__)

#define	vfredusum_vs_f32m1_f32m1(...) __riscv_vfredusum_vs_f32m1_f32m1_tu(__VA_ARGS__)

#define	vfredusum_vs_f32m1_f32m1_m(...) __riscv_vfredusum_vs_f32m1_f32m1_tum(__VA_ARGS__)

#define	vfredusum_vs_f32m2_f32m1(...) __riscv_vfredusum_vs_f32m2_f32m1_tu(__VA_ARGS__)

#define	vfredusum_vs_f32m2_f32m1_m(...) __riscv_vfredusum_vs_f32m2_f32m1_tum(__VA_ARGS__)

#define	vfredusum_vs_f32m4_f32m1(...) __riscv_vfredusum_vs_f32m4_f32m1_tu(__VA_ARGS__)

#define	vfredusum_vs_f32m4_f32m1_m(...) __riscv_vfredusum_vs_f32m4_f32m1_tum(__VA_ARGS__)

#define	vfredusum_vs_f32m8_f32m1(...) __riscv_vfredusum_vs_f32m8_f32m1_tu(__VA_ARGS__)

#define	vfredusum_vs_f32m8_f32m1_m(...) __riscv_vfredusum_vs_f32m8_f32m1_tum(__VA_ARGS__)

#define	vfredusum_vs_f32mf2_f32m1(...) __riscv_vfredusum_vs_f32mf2_f32m1_tu(__VA_ARGS__)

#define	vfredusum_vs_f32mf2_f32m1_m(...) __riscv_vfredusum_vs_f32mf2_f32m1_tum(__VA_ARGS__)

#define	vfredusum_vs_f64m1_f64m1(...) __riscv_vfredusum_vs_f64m1_f64m1_tu(__VA_ARGS__)

#define	vfredusum_vs_f64m1_f64m1_m(...) __riscv_vfredusum_vs_f64m1_f64m1_tum(__VA_ARGS__)

#define	vfredusum_vs_f64m2_f64m1(...) __riscv_vfredusum_vs_f64m2_f64m1_tu(__VA_ARGS__)

#define	vfredusum_vs_f64m2_f64m1_m(...) __riscv_vfredusum_vs_f64m2_f64m1_tum(__VA_ARGS__)

#define	vfredusum_vs_f64m4_f64m1(...) __riscv_vfredusum_vs_f64m4_f64m1_tu(__VA_ARGS__)

#define	vfredusum_vs_f64m4_f64m1_m(...) __riscv_vfredusum_vs_f64m4_f64m1_tum(__VA_ARGS__)

#define	vfredusum_vs_f64m8_f64m1(...) __riscv_vfredusum_vs_f64m8_f64m1_tu(__VA_ARGS__)

#define	vfredusum_vs_f64m8_f64m1_m(...) __riscv_vfredusum_vs_f64m8_f64m1_tum(__VA_ARGS__)

#define	vfrsqrt7_v_f16m1(...) __riscv_vfrsqrt7_v_f16m1(__VA_ARGS__)

#define	vfrsqrt7_v_f16m1_m(...) __riscv_vfrsqrt7_v_f16m1_tumu(__VA_ARGS__)

#define	vfrsqrt7_v_f16m2(...) __riscv_vfrsqrt7_v_f16m2(__VA_ARGS__)

#define	vfrsqrt7_v_f16m2_m(...) __riscv_vfrsqrt7_v_f16m2_tumu(__VA_ARGS__)

#define	vfrsqrt7_v_f16m4(...) __riscv_vfrsqrt7_v_f16m4(__VA_ARGS__)

#define	vfrsqrt7_v_f16m4_m(...) __riscv_vfrsqrt7_v_f16m4_tumu(__VA_ARGS__)

#define	vfrsqrt7_v_f16m8(...) __riscv_vfrsqrt7_v_f16m8(__VA_ARGS__)

#define	vfrsqrt7_v_f16m8_m(...) __riscv_vfrsqrt7_v_f16m8_tumu(__VA_ARGS__)

#define	vfrsqrt7_v_f16mf2(...) __riscv_vfrsqrt7_v_f16mf2(__VA_ARGS__)

#define	vfrsqrt7_v_f16mf2_m(...) __riscv_vfrsqrt7_v_f16mf2_tumu(__VA_ARGS__)

#define	vfrsqrt7_v_f16mf4(...) __riscv_vfrsqrt7_v_f16mf4(__VA_ARGS__)

#define	vfrsqrt7_v_f16mf4_m(...) __riscv_vfrsqrt7_v_f16mf4_tumu(__VA_ARGS__)

#define	vfrsqrt7_v_f32m1(...) __riscv_vfrsqrt7_v_f32m1(__VA_ARGS__)

#define	vfrsqrt7_v_f32m1_m(...) __riscv_vfrsqrt7_v_f32m1_tumu(__VA_ARGS__)

#define	vfrsqrt7_v_f32m2(...) __riscv_vfrsqrt7_v_f32m2(__VA_ARGS__)

#define	vfrsqrt7_v_f32m2_m(...) __riscv_vfrsqrt7_v_f32m2_tumu(__VA_ARGS__)

#define	vfrsqrt7_v_f32m4(...) __riscv_vfrsqrt7_v_f32m4(__VA_ARGS__)

#define	vfrsqrt7_v_f32m4_m(...) __riscv_vfrsqrt7_v_f32m4_tumu(__VA_ARGS__)

#define	vfrsqrt7_v_f32m8(...) __riscv_vfrsqrt7_v_f32m8(__VA_ARGS__)

#define	vfrsqrt7_v_f32m8_m(...) __riscv_vfrsqrt7_v_f32m8_tumu(__VA_ARGS__)

#define	vfrsqrt7_v_f32mf2(...) __riscv_vfrsqrt7_v_f32mf2(__VA_ARGS__)

#define	vfrsqrt7_v_f32mf2_m(...) __riscv_vfrsqrt7_v_f32mf2_tumu(__VA_ARGS__)

#define	vfrsqrt7_v_f64m1(...) __riscv_vfrsqrt7_v_f64m1(__VA_ARGS__)

#define	vfrsqrt7_v_f64m1_m(...) __riscv_vfrsqrt7_v_f64m1_tumu(__VA_ARGS__)

#define	vfrsqrt7_v_f64m2(...) __riscv_vfrsqrt7_v_f64m2(__VA_ARGS__)

#define	vfrsqrt7_v_f64m2_m(...) __riscv_vfrsqrt7_v_f64m2_tumu(__VA_ARGS__)

#define	vfrsqrt7_v_f64m4(...) __riscv_vfrsqrt7_v_f64m4(__VA_ARGS__)

#define	vfrsqrt7_v_f64m4_m(...) __riscv_vfrsqrt7_v_f64m4_tumu(__VA_ARGS__)

#define	vfrsqrt7_v_f64m8(...) __riscv_vfrsqrt7_v_f64m8(__VA_ARGS__)

#define	vfrsqrt7_v_f64m8_m(...) __riscv_vfrsqrt7_v_f64m8_tumu(__VA_ARGS__)

#define	vfrsub_vf_f16m1(...) __riscv_vfrsub_vf_f16m1(__VA_ARGS__)

#define	vfrsub_vf_f16m1_m(...) __riscv_vfrsub_vf_f16m1_tumu(__VA_ARGS__)

#define	vfrsub_vf_f16m2(...) __riscv_vfrsub_vf_f16m2(__VA_ARGS__)

#define	vfrsub_vf_f16m2_m(...) __riscv_vfrsub_vf_f16m2_tumu(__VA_ARGS__)

#define	vfrsub_vf_f16m4(...) __riscv_vfrsub_vf_f16m4(__VA_ARGS__)

#define	vfrsub_vf_f16m4_m(...) __riscv_vfrsub_vf_f16m4_tumu(__VA_ARGS__)

#define	vfrsub_vf_f16m8(...) __riscv_vfrsub_vf_f16m8(__VA_ARGS__)

#define	vfrsub_vf_f16m8_m(...) __riscv_vfrsub_vf_f16m8_tumu(__VA_ARGS__)

#define	vfrsub_vf_f16mf2(...) __riscv_vfrsub_vf_f16mf2(__VA_ARGS__)

#define	vfrsub_vf_f16mf2_m(...) __riscv_vfrsub_vf_f16mf2_tumu(__VA_ARGS__)

#define	vfrsub_vf_f16mf4(...) __riscv_vfrsub_vf_f16mf4(__VA_ARGS__)

#define	vfrsub_vf_f16mf4_m(...) __riscv_vfrsub_vf_f16mf4_tumu(__VA_ARGS__)

#define	vfrsub_vf_f32m1(...) __riscv_vfrsub_vf_f32m1(__VA_ARGS__)

#define	vfrsub_vf_f32m1_m(...) __riscv_vfrsub_vf_f32m1_tumu(__VA_ARGS__)

#define	vfrsub_vf_f32m2(...) __riscv_vfrsub_vf_f32m2(__VA_ARGS__)

#define	vfrsub_vf_f32m2_m(...) __riscv_vfrsub_vf_f32m2_tumu(__VA_ARGS__)

#define	vfrsub_vf_f32m4(...) __riscv_vfrsub_vf_f32m4(__VA_ARGS__)

#define	vfrsub_vf_f32m4_m(...) __riscv_vfrsub_vf_f32m4_tumu(__VA_ARGS__)

#define	vfrsub_vf_f32m8(...) __riscv_vfrsub_vf_f32m8(__VA_ARGS__)

#define	vfrsub_vf_f32m8_m(...) __riscv_vfrsub_vf_f32m8_tumu(__VA_ARGS__)

#define	vfrsub_vf_f32mf2(...) __riscv_vfrsub_vf_f32mf2(__VA_ARGS__)

#define	vfrsub_vf_f32mf2_m(...) __riscv_vfrsub_vf_f32mf2_tumu(__VA_ARGS__)

#define	vfrsub_vf_f64m1(...) __riscv_vfrsub_vf_f64m1(__VA_ARGS__)

#define	vfrsub_vf_f64m1_m(...) __riscv_vfrsub_vf_f64m1_tumu(__VA_ARGS__)

#define	vfrsub_vf_f64m2(...) __riscv_vfrsub_vf_f64m2(__VA_ARGS__)

#define	vfrsub_vf_f64m2_m(...) __riscv_vfrsub_vf_f64m2_tumu(__VA_ARGS__)

#define	vfrsub_vf_f64m4(...) __riscv_vfrsub_vf_f64m4(__VA_ARGS__)

#define	vfrsub_vf_f64m4_m(...) __riscv_vfrsub_vf_f64m4_tumu(__VA_ARGS__)

#define	vfrsub_vf_f64m8(...) __riscv_vfrsub_vf_f64m8(__VA_ARGS__)

#define	vfrsub_vf_f64m8_m(...) __riscv_vfrsub_vf_f64m8_tumu(__VA_ARGS__)

#define	vfsgnj_vf_f16m1(...) __riscv_vfsgnj_vf_f16m1(__VA_ARGS__)

#define	vfsgnj_vf_f16m1_m(...) __riscv_vfsgnj_vf_f16m1_tumu(__VA_ARGS__)

#define	vfsgnj_vf_f16m2(...) __riscv_vfsgnj_vf_f16m2(__VA_ARGS__)

#define	vfsgnj_vf_f16m2_m(...) __riscv_vfsgnj_vf_f16m2_tumu(__VA_ARGS__)

#define	vfsgnj_vf_f16m4(...) __riscv_vfsgnj_vf_f16m4(__VA_ARGS__)

#define	vfsgnj_vf_f16m4_m(...) __riscv_vfsgnj_vf_f16m4_tumu(__VA_ARGS__)

#define	vfsgnj_vf_f16m8(...) __riscv_vfsgnj_vf_f16m8(__VA_ARGS__)

#define	vfsgnj_vf_f16m8_m(...) __riscv_vfsgnj_vf_f16m8_tumu(__VA_ARGS__)

#define	vfsgnj_vf_f16mf2(...) __riscv_vfsgnj_vf_f16mf2(__VA_ARGS__)

#define	vfsgnj_vf_f16mf2_m(...) __riscv_vfsgnj_vf_f16mf2_tumu(__VA_ARGS__)

#define	vfsgnj_vf_f16mf4(...) __riscv_vfsgnj_vf_f16mf4(__VA_ARGS__)

#define	vfsgnj_vf_f16mf4_m(...) __riscv_vfsgnj_vf_f16mf4_tumu(__VA_ARGS__)

#define	vfsgnj_vf_f32m1(...) __riscv_vfsgnj_vf_f32m1(__VA_ARGS__)

#define	vfsgnj_vf_f32m1_m(...) __riscv_vfsgnj_vf_f32m1_tumu(__VA_ARGS__)

#define	vfsgnj_vf_f32m2(...) __riscv_vfsgnj_vf_f32m2(__VA_ARGS__)

#define	vfsgnj_vf_f32m2_m(...) __riscv_vfsgnj_vf_f32m2_tumu(__VA_ARGS__)

#define	vfsgnj_vf_f32m4(...) __riscv_vfsgnj_vf_f32m4(__VA_ARGS__)

#define	vfsgnj_vf_f32m4_m(...) __riscv_vfsgnj_vf_f32m4_tumu(__VA_ARGS__)

#define	vfsgnj_vf_f32m8(...) __riscv_vfsgnj_vf_f32m8(__VA_ARGS__)

#define	vfsgnj_vf_f32m8_m(...) __riscv_vfsgnj_vf_f32m8_tumu(__VA_ARGS__)

#define	vfsgnj_vf_f32mf2(...) __riscv_vfsgnj_vf_f32mf2(__VA_ARGS__)

#define	vfsgnj_vf_f32mf2_m(...) __riscv_vfsgnj_vf_f32mf2_tumu(__VA_ARGS__)

#define	vfsgnj_vf_f64m1(...) __riscv_vfsgnj_vf_f64m1(__VA_ARGS__)

#define	vfsgnj_vf_f64m1_m(...) __riscv_vfsgnj_vf_f64m1_tumu(__VA_ARGS__)

#define	vfsgnj_vf_f64m2(...) __riscv_vfsgnj_vf_f64m2(__VA_ARGS__)

#define	vfsgnj_vf_f64m2_m(...) __riscv_vfsgnj_vf_f64m2_tumu(__VA_ARGS__)

#define	vfsgnj_vf_f64m4(...) __riscv_vfsgnj_vf_f64m4(__VA_ARGS__)

#define	vfsgnj_vf_f64m4_m(...) __riscv_vfsgnj_vf_f64m4_tumu(__VA_ARGS__)

#define	vfsgnj_vf_f64m8(...) __riscv_vfsgnj_vf_f64m8(__VA_ARGS__)

#define	vfsgnj_vf_f64m8_m(...) __riscv_vfsgnj_vf_f64m8_tumu(__VA_ARGS__)

#define	vfsgnj_vv_f16m1(...) __riscv_vfsgnj_vv_f16m1(__VA_ARGS__)

#define	vfsgnj_vv_f16m1_m(...) __riscv_vfsgnj_vv_f16m1_tumu(__VA_ARGS__)

#define	vfsgnj_vv_f16m2(...) __riscv_vfsgnj_vv_f16m2(__VA_ARGS__)

#define	vfsgnj_vv_f16m2_m(...) __riscv_vfsgnj_vv_f16m2_tumu(__VA_ARGS__)

#define	vfsgnj_vv_f16m4(...) __riscv_vfsgnj_vv_f16m4(__VA_ARGS__)

#define	vfsgnj_vv_f16m4_m(...) __riscv_vfsgnj_vv_f16m4_tumu(__VA_ARGS__)

#define	vfsgnj_vv_f16m8(...) __riscv_vfsgnj_vv_f16m8(__VA_ARGS__)

#define	vfsgnj_vv_f16m8_m(...) __riscv_vfsgnj_vv_f16m8_tumu(__VA_ARGS__)

#define	vfsgnj_vv_f16mf2(...) __riscv_vfsgnj_vv_f16mf2(__VA_ARGS__)

#define	vfsgnj_vv_f16mf2_m(...) __riscv_vfsgnj_vv_f16mf2_tumu(__VA_ARGS__)

#define	vfsgnj_vv_f16mf4(...) __riscv_vfsgnj_vv_f16mf4(__VA_ARGS__)

#define	vfsgnj_vv_f16mf4_m(...) __riscv_vfsgnj_vv_f16mf4_tumu(__VA_ARGS__)

#define	vfsgnj_vv_f32m1(...) __riscv_vfsgnj_vv_f32m1(__VA_ARGS__)

#define	vfsgnj_vv_f32m1_m(...) __riscv_vfsgnj_vv_f32m1_tumu(__VA_ARGS__)

#define	vfsgnj_vv_f32m2(...) __riscv_vfsgnj_vv_f32m2(__VA_ARGS__)

#define	vfsgnj_vv_f32m2_m(...) __riscv_vfsgnj_vv_f32m2_tumu(__VA_ARGS__)

#define	vfsgnj_vv_f32m4(...) __riscv_vfsgnj_vv_f32m4(__VA_ARGS__)

#define	vfsgnj_vv_f32m4_m(...) __riscv_vfsgnj_vv_f32m4_tumu(__VA_ARGS__)

#define	vfsgnj_vv_f32m8(...) __riscv_vfsgnj_vv_f32m8(__VA_ARGS__)

#define	vfsgnj_vv_f32m8_m(...) __riscv_vfsgnj_vv_f32m8_tumu(__VA_ARGS__)

#define	vfsgnj_vv_f32mf2(...) __riscv_vfsgnj_vv_f32mf2(__VA_ARGS__)

#define	vfsgnj_vv_f32mf2_m(...) __riscv_vfsgnj_vv_f32mf2_tumu(__VA_ARGS__)

#define	vfsgnj_vv_f64m1(...) __riscv_vfsgnj_vv_f64m1(__VA_ARGS__)

#define	vfsgnj_vv_f64m1_m(...) __riscv_vfsgnj_vv_f64m1_tumu(__VA_ARGS__)

#define	vfsgnj_vv_f64m2(...) __riscv_vfsgnj_vv_f64m2(__VA_ARGS__)

#define	vfsgnj_vv_f64m2_m(...) __riscv_vfsgnj_vv_f64m2_tumu(__VA_ARGS__)

#define	vfsgnj_vv_f64m4(...) __riscv_vfsgnj_vv_f64m4(__VA_ARGS__)

#define	vfsgnj_vv_f64m4_m(...) __riscv_vfsgnj_vv_f64m4_tumu(__VA_ARGS__)

#define	vfsgnj_vv_f64m8(...) __riscv_vfsgnj_vv_f64m8(__VA_ARGS__)

#define	vfsgnj_vv_f64m8_m(...) __riscv_vfsgnj_vv_f64m8_tumu(__VA_ARGS__)

#define	vfsgnjn_vf_f16m1(...) __riscv_vfsgnjn_vf_f16m1(__VA_ARGS__)

#define	vfsgnjn_vf_f16m1_m(...) __riscv_vfsgnjn_vf_f16m1_tumu(__VA_ARGS__)

#define	vfsgnjn_vf_f16m2(...) __riscv_vfsgnjn_vf_f16m2(__VA_ARGS__)

#define	vfsgnjn_vf_f16m2_m(...) __riscv_vfsgnjn_vf_f16m2_tumu(__VA_ARGS__)

#define	vfsgnjn_vf_f16m4(...) __riscv_vfsgnjn_vf_f16m4(__VA_ARGS__)

#define	vfsgnjn_vf_f16m4_m(...) __riscv_vfsgnjn_vf_f16m4_tumu(__VA_ARGS__)

#define	vfsgnjn_vf_f16m8(...) __riscv_vfsgnjn_vf_f16m8(__VA_ARGS__)

#define	vfsgnjn_vf_f16m8_m(...) __riscv_vfsgnjn_vf_f16m8_tumu(__VA_ARGS__)

#define	vfsgnjn_vf_f16mf2(...) __riscv_vfsgnjn_vf_f16mf2(__VA_ARGS__)

#define	vfsgnjn_vf_f16mf2_m(...) __riscv_vfsgnjn_vf_f16mf2_tumu(__VA_ARGS__)

#define	vfsgnjn_vf_f16mf4(...) __riscv_vfsgnjn_vf_f16mf4(__VA_ARGS__)

#define	vfsgnjn_vf_f16mf4_m(...) __riscv_vfsgnjn_vf_f16mf4_tumu(__VA_ARGS__)

#define	vfsgnjn_vf_f32m1(...) __riscv_vfsgnjn_vf_f32m1(__VA_ARGS__)

#define	vfsgnjn_vf_f32m1_m(...) __riscv_vfsgnjn_vf_f32m1_tumu(__VA_ARGS__)

#define	vfsgnjn_vf_f32m2(...) __riscv_vfsgnjn_vf_f32m2(__VA_ARGS__)

#define	vfsgnjn_vf_f32m2_m(...) __riscv_vfsgnjn_vf_f32m2_tumu(__VA_ARGS__)

#define	vfsgnjn_vf_f32m4(...) __riscv_vfsgnjn_vf_f32m4(__VA_ARGS__)

#define	vfsgnjn_vf_f32m4_m(...) __riscv_vfsgnjn_vf_f32m4_tumu(__VA_ARGS__)

#define	vfsgnjn_vf_f32m8(...) __riscv_vfsgnjn_vf_f32m8(__VA_ARGS__)

#define	vfsgnjn_vf_f32m8_m(...) __riscv_vfsgnjn_vf_f32m8_tumu(__VA_ARGS__)

#define	vfsgnjn_vf_f32mf2(...) __riscv_vfsgnjn_vf_f32mf2(__VA_ARGS__)

#define	vfsgnjn_vf_f32mf2_m(...) __riscv_vfsgnjn_vf_f32mf2_tumu(__VA_ARGS__)

#define	vfsgnjn_vf_f64m1(...) __riscv_vfsgnjn_vf_f64m1(__VA_ARGS__)

#define	vfsgnjn_vf_f64m1_m(...) __riscv_vfsgnjn_vf_f64m1_tumu(__VA_ARGS__)

#define	vfsgnjn_vf_f64m2(...) __riscv_vfsgnjn_vf_f64m2(__VA_ARGS__)

#define	vfsgnjn_vf_f64m2_m(...) __riscv_vfsgnjn_vf_f64m2_tumu(__VA_ARGS__)

#define	vfsgnjn_vf_f64m4(...) __riscv_vfsgnjn_vf_f64m4(__VA_ARGS__)

#define	vfsgnjn_vf_f64m4_m(...) __riscv_vfsgnjn_vf_f64m4_tumu(__VA_ARGS__)

#define	vfsgnjn_vf_f64m8(...) __riscv_vfsgnjn_vf_f64m8(__VA_ARGS__)

#define	vfsgnjn_vf_f64m8_m(...) __riscv_vfsgnjn_vf_f64m8_tumu(__VA_ARGS__)

#define	vfsgnjn_vv_f16m1(...) __riscv_vfsgnjn_vv_f16m1(__VA_ARGS__)

#define	vfsgnjn_vv_f16m1_m(...) __riscv_vfsgnjn_vv_f16m1_tumu(__VA_ARGS__)

#define	vfsgnjn_vv_f16m2(...) __riscv_vfsgnjn_vv_f16m2(__VA_ARGS__)

#define	vfsgnjn_vv_f16m2_m(...) __riscv_vfsgnjn_vv_f16m2_tumu(__VA_ARGS__)

#define	vfsgnjn_vv_f16m4(...) __riscv_vfsgnjn_vv_f16m4(__VA_ARGS__)

#define	vfsgnjn_vv_f16m4_m(...) __riscv_vfsgnjn_vv_f16m4_tumu(__VA_ARGS__)

#define	vfsgnjn_vv_f16m8(...) __riscv_vfsgnjn_vv_f16m8(__VA_ARGS__)

#define	vfsgnjn_vv_f16m8_m(...) __riscv_vfsgnjn_vv_f16m8_tumu(__VA_ARGS__)

#define	vfsgnjn_vv_f16mf2(...) __riscv_vfsgnjn_vv_f16mf2(__VA_ARGS__)

#define	vfsgnjn_vv_f16mf2_m(...) __riscv_vfsgnjn_vv_f16mf2_tumu(__VA_ARGS__)

#define	vfsgnjn_vv_f16mf4(...) __riscv_vfsgnjn_vv_f16mf4(__VA_ARGS__)

#define	vfsgnjn_vv_f16mf4_m(...) __riscv_vfsgnjn_vv_f16mf4_tumu(__VA_ARGS__)

#define	vfsgnjn_vv_f32m1(...) __riscv_vfsgnjn_vv_f32m1(__VA_ARGS__)

#define	vfsgnjn_vv_f32m1_m(...) __riscv_vfsgnjn_vv_f32m1_tumu(__VA_ARGS__)

#define	vfsgnjn_vv_f32m2(...) __riscv_vfsgnjn_vv_f32m2(__VA_ARGS__)

#define	vfsgnjn_vv_f32m2_m(...) __riscv_vfsgnjn_vv_f32m2_tumu(__VA_ARGS__)

#define	vfsgnjn_vv_f32m4(...) __riscv_vfsgnjn_vv_f32m4(__VA_ARGS__)

#define	vfsgnjn_vv_f32m4_m(...) __riscv_vfsgnjn_vv_f32m4_tumu(__VA_ARGS__)

#define	vfsgnjn_vv_f32m8(...) __riscv_vfsgnjn_vv_f32m8(__VA_ARGS__)

#define	vfsgnjn_vv_f32m8_m(...) __riscv_vfsgnjn_vv_f32m8_tumu(__VA_ARGS__)

#define	vfsgnjn_vv_f32mf2(...) __riscv_vfsgnjn_vv_f32mf2(__VA_ARGS__)

#define	vfsgnjn_vv_f32mf2_m(...) __riscv_vfsgnjn_vv_f32mf2_tumu(__VA_ARGS__)

#define	vfsgnjn_vv_f64m1(...) __riscv_vfsgnjn_vv_f64m1(__VA_ARGS__)

#define	vfsgnjn_vv_f64m1_m(...) __riscv_vfsgnjn_vv_f64m1_tumu(__VA_ARGS__)

#define	vfsgnjn_vv_f64m2(...) __riscv_vfsgnjn_vv_f64m2(__VA_ARGS__)

#define	vfsgnjn_vv_f64m2_m(...) __riscv_vfsgnjn_vv_f64m2_tumu(__VA_ARGS__)

#define	vfsgnjn_vv_f64m4(...) __riscv_vfsgnjn_vv_f64m4(__VA_ARGS__)

#define	vfsgnjn_vv_f64m4_m(...) __riscv_vfsgnjn_vv_f64m4_tumu(__VA_ARGS__)

#define	vfsgnjn_vv_f64m8(...) __riscv_vfsgnjn_vv_f64m8(__VA_ARGS__)

#define	vfsgnjn_vv_f64m8_m(...) __riscv_vfsgnjn_vv_f64m8_tumu(__VA_ARGS__)

#define	vfsgnjx_vf_f16m1(...) __riscv_vfsgnjx_vf_f16m1(__VA_ARGS__)

#define	vfsgnjx_vf_f16m1_m(...) __riscv_vfsgnjx_vf_f16m1_tumu(__VA_ARGS__)

#define	vfsgnjx_vf_f16m2(...) __riscv_vfsgnjx_vf_f16m2(__VA_ARGS__)

#define	vfsgnjx_vf_f16m2_m(...) __riscv_vfsgnjx_vf_f16m2_tumu(__VA_ARGS__)

#define	vfsgnjx_vf_f16m4(...) __riscv_vfsgnjx_vf_f16m4(__VA_ARGS__)

#define	vfsgnjx_vf_f16m4_m(...) __riscv_vfsgnjx_vf_f16m4_tumu(__VA_ARGS__)

#define	vfsgnjx_vf_f16m8(...) __riscv_vfsgnjx_vf_f16m8(__VA_ARGS__)

#define	vfsgnjx_vf_f16m8_m(...) __riscv_vfsgnjx_vf_f16m8_tumu(__VA_ARGS__)

#define	vfsgnjx_vf_f16mf2(...) __riscv_vfsgnjx_vf_f16mf2(__VA_ARGS__)

#define	vfsgnjx_vf_f16mf2_m(...) __riscv_vfsgnjx_vf_f16mf2_tumu(__VA_ARGS__)

#define	vfsgnjx_vf_f16mf4(...) __riscv_vfsgnjx_vf_f16mf4(__VA_ARGS__)

#define	vfsgnjx_vf_f16mf4_m(...) __riscv_vfsgnjx_vf_f16mf4_tumu(__VA_ARGS__)

#define	vfsgnjx_vf_f32m1(...) __riscv_vfsgnjx_vf_f32m1(__VA_ARGS__)

#define	vfsgnjx_vf_f32m1_m(...) __riscv_vfsgnjx_vf_f32m1_tumu(__VA_ARGS__)

#define	vfsgnjx_vf_f32m2(...) __riscv_vfsgnjx_vf_f32m2(__VA_ARGS__)

#define	vfsgnjx_vf_f32m2_m(...) __riscv_vfsgnjx_vf_f32m2_tumu(__VA_ARGS__)

#define	vfsgnjx_vf_f32m4(...) __riscv_vfsgnjx_vf_f32m4(__VA_ARGS__)

#define	vfsgnjx_vf_f32m4_m(...) __riscv_vfsgnjx_vf_f32m4_tumu(__VA_ARGS__)

#define	vfsgnjx_vf_f32m8(...) __riscv_vfsgnjx_vf_f32m8(__VA_ARGS__)

#define	vfsgnjx_vf_f32m8_m(...) __riscv_vfsgnjx_vf_f32m8_tumu(__VA_ARGS__)

#define	vfsgnjx_vf_f32mf2(...) __riscv_vfsgnjx_vf_f32mf2(__VA_ARGS__)

#define	vfsgnjx_vf_f32mf2_m(...) __riscv_vfsgnjx_vf_f32mf2_tumu(__VA_ARGS__)

#define	vfsgnjx_vf_f64m1(...) __riscv_vfsgnjx_vf_f64m1(__VA_ARGS__)

#define	vfsgnjx_vf_f64m1_m(...) __riscv_vfsgnjx_vf_f64m1_tumu(__VA_ARGS__)

#define	vfsgnjx_vf_f64m2(...) __riscv_vfsgnjx_vf_f64m2(__VA_ARGS__)

#define	vfsgnjx_vf_f64m2_m(...) __riscv_vfsgnjx_vf_f64m2_tumu(__VA_ARGS__)

#define	vfsgnjx_vf_f64m4(...) __riscv_vfsgnjx_vf_f64m4(__VA_ARGS__)

#define	vfsgnjx_vf_f64m4_m(...) __riscv_vfsgnjx_vf_f64m4_tumu(__VA_ARGS__)

#define	vfsgnjx_vf_f64m8(...) __riscv_vfsgnjx_vf_f64m8(__VA_ARGS__)

#define	vfsgnjx_vf_f64m8_m(...) __riscv_vfsgnjx_vf_f64m8_tumu(__VA_ARGS__)

#define	vfsgnjx_vv_f16m1(...) __riscv_vfsgnjx_vv_f16m1(__VA_ARGS__)

#define	vfsgnjx_vv_f16m1_m(...) __riscv_vfsgnjx_vv_f16m1_tumu(__VA_ARGS__)

#define	vfsgnjx_vv_f16m2(...) __riscv_vfsgnjx_vv_f16m2(__VA_ARGS__)

#define	vfsgnjx_vv_f16m2_m(...) __riscv_vfsgnjx_vv_f16m2_tumu(__VA_ARGS__)

#define	vfsgnjx_vv_f16m4(...) __riscv_vfsgnjx_vv_f16m4(__VA_ARGS__)

#define	vfsgnjx_vv_f16m4_m(...) __riscv_vfsgnjx_vv_f16m4_tumu(__VA_ARGS__)

#define	vfsgnjx_vv_f16m8(...) __riscv_vfsgnjx_vv_f16m8(__VA_ARGS__)

#define	vfsgnjx_vv_f16m8_m(...) __riscv_vfsgnjx_vv_f16m8_tumu(__VA_ARGS__)

#define	vfsgnjx_vv_f16mf2(...) __riscv_vfsgnjx_vv_f16mf2(__VA_ARGS__)

#define	vfsgnjx_vv_f16mf2_m(...) __riscv_vfsgnjx_vv_f16mf2_tumu(__VA_ARGS__)

#define	vfsgnjx_vv_f16mf4(...) __riscv_vfsgnjx_vv_f16mf4(__VA_ARGS__)

#define	vfsgnjx_vv_f16mf4_m(...) __riscv_vfsgnjx_vv_f16mf4_tumu(__VA_ARGS__)

#define	vfsgnjx_vv_f32m1(...) __riscv_vfsgnjx_vv_f32m1(__VA_ARGS__)

#define	vfsgnjx_vv_f32m1_m(...) __riscv_vfsgnjx_vv_f32m1_tumu(__VA_ARGS__)

#define	vfsgnjx_vv_f32m2(...) __riscv_vfsgnjx_vv_f32m2(__VA_ARGS__)

#define	vfsgnjx_vv_f32m2_m(...) __riscv_vfsgnjx_vv_f32m2_tumu(__VA_ARGS__)

#define	vfsgnjx_vv_f32m4(...) __riscv_vfsgnjx_vv_f32m4(__VA_ARGS__)

#define	vfsgnjx_vv_f32m4_m(...) __riscv_vfsgnjx_vv_f32m4_tumu(__VA_ARGS__)

#define	vfsgnjx_vv_f32m8(...) __riscv_vfsgnjx_vv_f32m8(__VA_ARGS__)

#define	vfsgnjx_vv_f32m8_m(...) __riscv_vfsgnjx_vv_f32m8_tumu(__VA_ARGS__)

#define	vfsgnjx_vv_f32mf2(...) __riscv_vfsgnjx_vv_f32mf2(__VA_ARGS__)

#define	vfsgnjx_vv_f32mf2_m(...) __riscv_vfsgnjx_vv_f32mf2_tumu(__VA_ARGS__)

#define	vfsgnjx_vv_f64m1(...) __riscv_vfsgnjx_vv_f64m1(__VA_ARGS__)

#define	vfsgnjx_vv_f64m1_m(...) __riscv_vfsgnjx_vv_f64m1_tumu(__VA_ARGS__)

#define	vfsgnjx_vv_f64m2(...) __riscv_vfsgnjx_vv_f64m2(__VA_ARGS__)

#define	vfsgnjx_vv_f64m2_m(...) __riscv_vfsgnjx_vv_f64m2_tumu(__VA_ARGS__)

#define	vfsgnjx_vv_f64m4(...) __riscv_vfsgnjx_vv_f64m4(__VA_ARGS__)

#define	vfsgnjx_vv_f64m4_m(...) __riscv_vfsgnjx_vv_f64m4_tumu(__VA_ARGS__)

#define	vfsgnjx_vv_f64m8(...) __riscv_vfsgnjx_vv_f64m8(__VA_ARGS__)

#define	vfsgnjx_vv_f64m8_m(...) __riscv_vfsgnjx_vv_f64m8_tumu(__VA_ARGS__)

#define	vfslide1down_vf_f16m1(...) __riscv_vfslide1down_vf_f16m1(__VA_ARGS__)

#define	vfslide1down_vf_f16m1_m(...) __riscv_vfslide1down_vf_f16m1_tumu(__VA_ARGS__)

#define	vfslide1down_vf_f16m2(...) __riscv_vfslide1down_vf_f16m2(__VA_ARGS__)

#define	vfslide1down_vf_f16m2_m(...) __riscv_vfslide1down_vf_f16m2_tumu(__VA_ARGS__)

#define	vfslide1down_vf_f16m4(...) __riscv_vfslide1down_vf_f16m4(__VA_ARGS__)

#define	vfslide1down_vf_f16m4_m(...) __riscv_vfslide1down_vf_f16m4_tumu(__VA_ARGS__)

#define	vfslide1down_vf_f16m8(...) __riscv_vfslide1down_vf_f16m8(__VA_ARGS__)

#define	vfslide1down_vf_f16m8_m(...) __riscv_vfslide1down_vf_f16m8_tumu(__VA_ARGS__)

#define	vfslide1down_vf_f16mf2(...) __riscv_vfslide1down_vf_f16mf2(__VA_ARGS__)

#define	vfslide1down_vf_f16mf2_m(...) __riscv_vfslide1down_vf_f16mf2_tumu(__VA_ARGS__)

#define	vfslide1down_vf_f16mf4(...) __riscv_vfslide1down_vf_f16mf4(__VA_ARGS__)

#define	vfslide1down_vf_f16mf4_m(...) __riscv_vfslide1down_vf_f16mf4_tumu(__VA_ARGS__)

#define	vfslide1down_vf_f32m1(...) __riscv_vfslide1down_vf_f32m1(__VA_ARGS__)

#define	vfslide1down_vf_f32m1_m(...) __riscv_vfslide1down_vf_f32m1_tumu(__VA_ARGS__)

#define	vfslide1down_vf_f32m2(...) __riscv_vfslide1down_vf_f32m2(__VA_ARGS__)

#define	vfslide1down_vf_f32m2_m(...) __riscv_vfslide1down_vf_f32m2_tumu(__VA_ARGS__)

#define	vfslide1down_vf_f32m4(...) __riscv_vfslide1down_vf_f32m4(__VA_ARGS__)

#define	vfslide1down_vf_f32m4_m(...) __riscv_vfslide1down_vf_f32m4_tumu(__VA_ARGS__)

#define	vfslide1down_vf_f32m8(...) __riscv_vfslide1down_vf_f32m8(__VA_ARGS__)

#define	vfslide1down_vf_f32m8_m(...) __riscv_vfslide1down_vf_f32m8_tumu(__VA_ARGS__)

#define	vfslide1down_vf_f32mf2(...) __riscv_vfslide1down_vf_f32mf2(__VA_ARGS__)

#define	vfslide1down_vf_f32mf2_m(...) __riscv_vfslide1down_vf_f32mf2_tumu(__VA_ARGS__)

#define	vfslide1down_vf_f64m1(...) __riscv_vfslide1down_vf_f64m1(__VA_ARGS__)

#define	vfslide1down_vf_f64m1_m(...) __riscv_vfslide1down_vf_f64m1_tumu(__VA_ARGS__)

#define	vfslide1down_vf_f64m2(...) __riscv_vfslide1down_vf_f64m2(__VA_ARGS__)

#define	vfslide1down_vf_f64m2_m(...) __riscv_vfslide1down_vf_f64m2_tumu(__VA_ARGS__)

#define	vfslide1down_vf_f64m4(...) __riscv_vfslide1down_vf_f64m4(__VA_ARGS__)

#define	vfslide1down_vf_f64m4_m(...) __riscv_vfslide1down_vf_f64m4_tumu(__VA_ARGS__)

#define	vfslide1down_vf_f64m8(...) __riscv_vfslide1down_vf_f64m8(__VA_ARGS__)

#define	vfslide1down_vf_f64m8_m(...) __riscv_vfslide1down_vf_f64m8_tumu(__VA_ARGS__)

#define	vfslide1up_vf_f16m1(...) __riscv_vfslide1up_vf_f16m1(__VA_ARGS__)

#define	vfslide1up_vf_f16m1_m(...) __riscv_vfslide1up_vf_f16m1_tumu(__VA_ARGS__)

#define	vfslide1up_vf_f16m2(...) __riscv_vfslide1up_vf_f16m2(__VA_ARGS__)

#define	vfslide1up_vf_f16m2_m(...) __riscv_vfslide1up_vf_f16m2_tumu(__VA_ARGS__)

#define	vfslide1up_vf_f16m4(...) __riscv_vfslide1up_vf_f16m4(__VA_ARGS__)

#define	vfslide1up_vf_f16m4_m(...) __riscv_vfslide1up_vf_f16m4_tumu(__VA_ARGS__)

#define	vfslide1up_vf_f16m8(...) __riscv_vfslide1up_vf_f16m8(__VA_ARGS__)

#define	vfslide1up_vf_f16m8_m(...) __riscv_vfslide1up_vf_f16m8_tumu(__VA_ARGS__)

#define	vfslide1up_vf_f16mf2(...) __riscv_vfslide1up_vf_f16mf2(__VA_ARGS__)

#define	vfslide1up_vf_f16mf2_m(...) __riscv_vfslide1up_vf_f16mf2_tumu(__VA_ARGS__)

#define	vfslide1up_vf_f16mf4(...) __riscv_vfslide1up_vf_f16mf4(__VA_ARGS__)

#define	vfslide1up_vf_f16mf4_m(...) __riscv_vfslide1up_vf_f16mf4_tumu(__VA_ARGS__)

#define	vfslide1up_vf_f32m1(...) __riscv_vfslide1up_vf_f32m1(__VA_ARGS__)

#define	vfslide1up_vf_f32m1_m(...) __riscv_vfslide1up_vf_f32m1_tumu(__VA_ARGS__)

#define	vfslide1up_vf_f32m2(...) __riscv_vfslide1up_vf_f32m2(__VA_ARGS__)

#define	vfslide1up_vf_f32m2_m(...) __riscv_vfslide1up_vf_f32m2_tumu(__VA_ARGS__)

#define	vfslide1up_vf_f32m4(...) __riscv_vfslide1up_vf_f32m4(__VA_ARGS__)

#define	vfslide1up_vf_f32m4_m(...) __riscv_vfslide1up_vf_f32m4_tumu(__VA_ARGS__)

#define	vfslide1up_vf_f32m8(...) __riscv_vfslide1up_vf_f32m8(__VA_ARGS__)

#define	vfslide1up_vf_f32m8_m(...) __riscv_vfslide1up_vf_f32m8_tumu(__VA_ARGS__)

#define	vfslide1up_vf_f32mf2(...) __riscv_vfslide1up_vf_f32mf2(__VA_ARGS__)

#define	vfslide1up_vf_f32mf2_m(...) __riscv_vfslide1up_vf_f32mf2_tumu(__VA_ARGS__)

#define	vfslide1up_vf_f64m1(...) __riscv_vfslide1up_vf_f64m1(__VA_ARGS__)

#define	vfslide1up_vf_f64m1_m(...) __riscv_vfslide1up_vf_f64m1_tumu(__VA_ARGS__)

#define	vfslide1up_vf_f64m2(...) __riscv_vfslide1up_vf_f64m2(__VA_ARGS__)

#define	vfslide1up_vf_f64m2_m(...) __riscv_vfslide1up_vf_f64m2_tumu(__VA_ARGS__)

#define	vfslide1up_vf_f64m4(...) __riscv_vfslide1up_vf_f64m4(__VA_ARGS__)

#define	vfslide1up_vf_f64m4_m(...) __riscv_vfslide1up_vf_f64m4_tumu(__VA_ARGS__)

#define	vfslide1up_vf_f64m8(...) __riscv_vfslide1up_vf_f64m8(__VA_ARGS__)

#define	vfslide1up_vf_f64m8_m(...) __riscv_vfslide1up_vf_f64m8_tumu(__VA_ARGS__)

#define	vfsqrt_v_f16m1(...) __riscv_vfsqrt_v_f16m1(__VA_ARGS__)

#define	vfsqrt_v_f16m1_m(...) __riscv_vfsqrt_v_f16m1_tumu(__VA_ARGS__)

#define	vfsqrt_v_f16m2(...) __riscv_vfsqrt_v_f16m2(__VA_ARGS__)

#define	vfsqrt_v_f16m2_m(...) __riscv_vfsqrt_v_f16m2_tumu(__VA_ARGS__)

#define	vfsqrt_v_f16m4(...) __riscv_vfsqrt_v_f16m4(__VA_ARGS__)

#define	vfsqrt_v_f16m4_m(...) __riscv_vfsqrt_v_f16m4_tumu(__VA_ARGS__)

#define	vfsqrt_v_f16m8(...) __riscv_vfsqrt_v_f16m8(__VA_ARGS__)

#define	vfsqrt_v_f16m8_m(...) __riscv_vfsqrt_v_f16m8_tumu(__VA_ARGS__)

#define	vfsqrt_v_f16mf2(...) __riscv_vfsqrt_v_f16mf2(__VA_ARGS__)

#define	vfsqrt_v_f16mf2_m(...) __riscv_vfsqrt_v_f16mf2_tumu(__VA_ARGS__)

#define	vfsqrt_v_f16mf4(...) __riscv_vfsqrt_v_f16mf4(__VA_ARGS__)

#define	vfsqrt_v_f16mf4_m(...) __riscv_vfsqrt_v_f16mf4_tumu(__VA_ARGS__)

#define	vfsqrt_v_f32m1(...) __riscv_vfsqrt_v_f32m1(__VA_ARGS__)

#define	vfsqrt_v_f32m1_m(...) __riscv_vfsqrt_v_f32m1_tumu(__VA_ARGS__)

#define	vfsqrt_v_f32m2(...) __riscv_vfsqrt_v_f32m2(__VA_ARGS__)

#define	vfsqrt_v_f32m2_m(...) __riscv_vfsqrt_v_f32m2_tumu(__VA_ARGS__)

#define	vfsqrt_v_f32m4(...) __riscv_vfsqrt_v_f32m4(__VA_ARGS__)

#define	vfsqrt_v_f32m4_m(...) __riscv_vfsqrt_v_f32m4_tumu(__VA_ARGS__)

#define	vfsqrt_v_f32m8(...) __riscv_vfsqrt_v_f32m8(__VA_ARGS__)

#define	vfsqrt_v_f32m8_m(...) __riscv_vfsqrt_v_f32m8_tumu(__VA_ARGS__)

#define	vfsqrt_v_f32mf2(...) __riscv_vfsqrt_v_f32mf2(__VA_ARGS__)

#define	vfsqrt_v_f32mf2_m(...) __riscv_vfsqrt_v_f32mf2_tumu(__VA_ARGS__)

#define	vfsqrt_v_f64m1(...) __riscv_vfsqrt_v_f64m1(__VA_ARGS__)

#define	vfsqrt_v_f64m1_m(...) __riscv_vfsqrt_v_f64m1_tumu(__VA_ARGS__)

#define	vfsqrt_v_f64m2(...) __riscv_vfsqrt_v_f64m2(__VA_ARGS__)

#define	vfsqrt_v_f64m2_m(...) __riscv_vfsqrt_v_f64m2_tumu(__VA_ARGS__)

#define	vfsqrt_v_f64m4(...) __riscv_vfsqrt_v_f64m4(__VA_ARGS__)

#define	vfsqrt_v_f64m4_m(...) __riscv_vfsqrt_v_f64m4_tumu(__VA_ARGS__)

#define	vfsqrt_v_f64m8(...) __riscv_vfsqrt_v_f64m8(__VA_ARGS__)

#define	vfsqrt_v_f64m8_m(...) __riscv_vfsqrt_v_f64m8_tumu(__VA_ARGS__)

#define	vfsub_vf_f16m1(...) __riscv_vfsub_vf_f16m1(__VA_ARGS__)

#define	vfsub_vf_f16m1_m(...) __riscv_vfsub_vf_f16m1_tumu(__VA_ARGS__)

#define	vfsub_vf_f16m2(...) __riscv_vfsub_vf_f16m2(__VA_ARGS__)

#define	vfsub_vf_f16m2_m(...) __riscv_vfsub_vf_f16m2_tumu(__VA_ARGS__)

#define	vfsub_vf_f16m4(...) __riscv_vfsub_vf_f16m4(__VA_ARGS__)

#define	vfsub_vf_f16m4_m(...) __riscv_vfsub_vf_f16m4_tumu(__VA_ARGS__)

#define	vfsub_vf_f16m8(...) __riscv_vfsub_vf_f16m8(__VA_ARGS__)

#define	vfsub_vf_f16m8_m(...) __riscv_vfsub_vf_f16m8_tumu(__VA_ARGS__)

#define	vfsub_vf_f16mf2(...) __riscv_vfsub_vf_f16mf2(__VA_ARGS__)

#define	vfsub_vf_f16mf2_m(...) __riscv_vfsub_vf_f16mf2_tumu(__VA_ARGS__)

#define	vfsub_vf_f16mf4(...) __riscv_vfsub_vf_f16mf4(__VA_ARGS__)

#define	vfsub_vf_f16mf4_m(...) __riscv_vfsub_vf_f16mf4_tumu(__VA_ARGS__)

#define	vfsub_vf_f32m1(...) __riscv_vfsub_vf_f32m1(__VA_ARGS__)

#define	vfsub_vf_f32m1_m(...) __riscv_vfsub_vf_f32m1_tumu(__VA_ARGS__)

#define	vfsub_vf_f32m2(...) __riscv_vfsub_vf_f32m2(__VA_ARGS__)

#define	vfsub_vf_f32m2_m(...) __riscv_vfsub_vf_f32m2_tumu(__VA_ARGS__)

#define	vfsub_vf_f32m4(...) __riscv_vfsub_vf_f32m4(__VA_ARGS__)

#define	vfsub_vf_f32m4_m(...) __riscv_vfsub_vf_f32m4_tumu(__VA_ARGS__)

#define	vfsub_vf_f32m8(...) __riscv_vfsub_vf_f32m8(__VA_ARGS__)

#define	vfsub_vf_f32m8_m(...) __riscv_vfsub_vf_f32m8_tumu(__VA_ARGS__)

#define	vfsub_vf_f32mf2(...) __riscv_vfsub_vf_f32mf2(__VA_ARGS__)

#define	vfsub_vf_f32mf2_m(...) __riscv_vfsub_vf_f32mf2_tumu(__VA_ARGS__)

#define	vfsub_vf_f64m1(...) __riscv_vfsub_vf_f64m1(__VA_ARGS__)

#define	vfsub_vf_f64m1_m(...) __riscv_vfsub_vf_f64m1_tumu(__VA_ARGS__)

#define	vfsub_vf_f64m2(...) __riscv_vfsub_vf_f64m2(__VA_ARGS__)

#define	vfsub_vf_f64m2_m(...) __riscv_vfsub_vf_f64m2_tumu(__VA_ARGS__)

#define	vfsub_vf_f64m4(...) __riscv_vfsub_vf_f64m4(__VA_ARGS__)

#define	vfsub_vf_f64m4_m(...) __riscv_vfsub_vf_f64m4_tumu(__VA_ARGS__)

#define	vfsub_vf_f64m8(...) __riscv_vfsub_vf_f64m8(__VA_ARGS__)

#define	vfsub_vf_f64m8_m(...) __riscv_vfsub_vf_f64m8_tumu(__VA_ARGS__)

#define	vfsub_vv_f16m1(...) __riscv_vfsub_vv_f16m1(__VA_ARGS__)

#define	vfsub_vv_f16m1_m(...) __riscv_vfsub_vv_f16m1_tumu(__VA_ARGS__)

#define	vfsub_vv_f16m2(...) __riscv_vfsub_vv_f16m2(__VA_ARGS__)

#define	vfsub_vv_f16m2_m(...) __riscv_vfsub_vv_f16m2_tumu(__VA_ARGS__)

#define	vfsub_vv_f16m4(...) __riscv_vfsub_vv_f16m4(__VA_ARGS__)

#define	vfsub_vv_f16m4_m(...) __riscv_vfsub_vv_f16m4_tumu(__VA_ARGS__)

#define	vfsub_vv_f16m8(...) __riscv_vfsub_vv_f16m8(__VA_ARGS__)

#define	vfsub_vv_f16m8_m(...) __riscv_vfsub_vv_f16m8_tumu(__VA_ARGS__)

#define	vfsub_vv_f16mf2(...) __riscv_vfsub_vv_f16mf2(__VA_ARGS__)

#define	vfsub_vv_f16mf2_m(...) __riscv_vfsub_vv_f16mf2_tumu(__VA_ARGS__)

#define	vfsub_vv_f16mf4(...) __riscv_vfsub_vv_f16mf4(__VA_ARGS__)

#define	vfsub_vv_f16mf4_m(...) __riscv_vfsub_vv_f16mf4_tumu(__VA_ARGS__)

#define	vfsub_vv_f32m1(...) __riscv_vfsub_vv_f32m1(__VA_ARGS__)

#define	vfsub_vv_f32m1_m(...) __riscv_vfsub_vv_f32m1_tumu(__VA_ARGS__)

#define	vfsub_vv_f32m2(...) __riscv_vfsub_vv_f32m2(__VA_ARGS__)

#define	vfsub_vv_f32m2_m(...) __riscv_vfsub_vv_f32m2_tumu(__VA_ARGS__)

#define	vfsub_vv_f32m4(...) __riscv_vfsub_vv_f32m4(__VA_ARGS__)

#define	vfsub_vv_f32m4_m(...) __riscv_vfsub_vv_f32m4_tumu(__VA_ARGS__)

#define	vfsub_vv_f32m8(...) __riscv_vfsub_vv_f32m8(__VA_ARGS__)

#define	vfsub_vv_f32m8_m(...) __riscv_vfsub_vv_f32m8_tumu(__VA_ARGS__)

#define	vfsub_vv_f32mf2(...) __riscv_vfsub_vv_f32mf2(__VA_ARGS__)

#define	vfsub_vv_f32mf2_m(...) __riscv_vfsub_vv_f32mf2_tumu(__VA_ARGS__)

#define	vfsub_vv_f64m1(...) __riscv_vfsub_vv_f64m1(__VA_ARGS__)

#define	vfsub_vv_f64m1_m(...) __riscv_vfsub_vv_f64m1_tumu(__VA_ARGS__)

#define	vfsub_vv_f64m2(...) __riscv_vfsub_vv_f64m2(__VA_ARGS__)

#define	vfsub_vv_f64m2_m(...) __riscv_vfsub_vv_f64m2_tumu(__VA_ARGS__)

#define	vfsub_vv_f64m4(...) __riscv_vfsub_vv_f64m4(__VA_ARGS__)

#define	vfsub_vv_f64m4_m(...) __riscv_vfsub_vv_f64m4_tumu(__VA_ARGS__)

#define	vfsub_vv_f64m8(...) __riscv_vfsub_vv_f64m8(__VA_ARGS__)

#define	vfsub_vv_f64m8_m(...) __riscv_vfsub_vv_f64m8_tumu(__VA_ARGS__)

#define	vfwadd_vf_f32m1(...) __riscv_vfwadd_vf_f32m1(__VA_ARGS__)

#define	vfwadd_vf_f32m1_m(...) __riscv_vfwadd_vf_f32m1_tumu(__VA_ARGS__)

#define	vfwadd_vf_f32m2(...) __riscv_vfwadd_vf_f32m2(__VA_ARGS__)

#define	vfwadd_vf_f32m2_m(...) __riscv_vfwadd_vf_f32m2_tumu(__VA_ARGS__)

#define	vfwadd_vf_f32m4(...) __riscv_vfwadd_vf_f32m4(__VA_ARGS__)

#define	vfwadd_vf_f32m4_m(...) __riscv_vfwadd_vf_f32m4_tumu(__VA_ARGS__)

#define	vfwadd_vf_f32m8(...) __riscv_vfwadd_vf_f32m8(__VA_ARGS__)

#define	vfwadd_vf_f32m8_m(...) __riscv_vfwadd_vf_f32m8_tumu(__VA_ARGS__)

#define	vfwadd_vf_f32mf2(...) __riscv_vfwadd_vf_f32mf2(__VA_ARGS__)

#define	vfwadd_vf_f32mf2_m(...) __riscv_vfwadd_vf_f32mf2_tumu(__VA_ARGS__)

#define	vfwadd_vf_f64m1(...) __riscv_vfwadd_vf_f64m1(__VA_ARGS__)

#define	vfwadd_vf_f64m1_m(...) __riscv_vfwadd_vf_f64m1_tumu(__VA_ARGS__)

#define	vfwadd_vf_f64m2(...) __riscv_vfwadd_vf_f64m2(__VA_ARGS__)

#define	vfwadd_vf_f64m2_m(...) __riscv_vfwadd_vf_f64m2_tumu(__VA_ARGS__)

#define	vfwadd_vf_f64m4(...) __riscv_vfwadd_vf_f64m4(__VA_ARGS__)

#define	vfwadd_vf_f64m4_m(...) __riscv_vfwadd_vf_f64m4_tumu(__VA_ARGS__)

#define	vfwadd_vf_f64m8(...) __riscv_vfwadd_vf_f64m8(__VA_ARGS__)

#define	vfwadd_vf_f64m8_m(...) __riscv_vfwadd_vf_f64m8_tumu(__VA_ARGS__)

#define	vfwadd_vv_f32m1(...) __riscv_vfwadd_vv_f32m1(__VA_ARGS__)

#define	vfwadd_vv_f32m1_m(...) __riscv_vfwadd_vv_f32m1_tumu(__VA_ARGS__)

#define	vfwadd_vv_f32m2(...) __riscv_vfwadd_vv_f32m2(__VA_ARGS__)

#define	vfwadd_vv_f32m2_m(...) __riscv_vfwadd_vv_f32m2_tumu(__VA_ARGS__)

#define	vfwadd_vv_f32m4(...) __riscv_vfwadd_vv_f32m4(__VA_ARGS__)

#define	vfwadd_vv_f32m4_m(...) __riscv_vfwadd_vv_f32m4_tumu(__VA_ARGS__)

#define	vfwadd_vv_f32m8(...) __riscv_vfwadd_vv_f32m8(__VA_ARGS__)

#define	vfwadd_vv_f32m8_m(...) __riscv_vfwadd_vv_f32m8_tumu(__VA_ARGS__)

#define	vfwadd_vv_f32mf2(...) __riscv_vfwadd_vv_f32mf2(__VA_ARGS__)

#define	vfwadd_vv_f32mf2_m(...) __riscv_vfwadd_vv_f32mf2_tumu(__VA_ARGS__)

#define	vfwadd_vv_f64m1(...) __riscv_vfwadd_vv_f64m1(__VA_ARGS__)

#define	vfwadd_vv_f64m1_m(...) __riscv_vfwadd_vv_f64m1_tumu(__VA_ARGS__)

#define	vfwadd_vv_f64m2(...) __riscv_vfwadd_vv_f64m2(__VA_ARGS__)

#define	vfwadd_vv_f64m2_m(...) __riscv_vfwadd_vv_f64m2_tumu(__VA_ARGS__)

#define	vfwadd_vv_f64m4(...) __riscv_vfwadd_vv_f64m4(__VA_ARGS__)

#define	vfwadd_vv_f64m4_m(...) __riscv_vfwadd_vv_f64m4_tumu(__VA_ARGS__)

#define	vfwadd_vv_f64m8(...) __riscv_vfwadd_vv_f64m8(__VA_ARGS__)

#define	vfwadd_vv_f64m8_m(...) __riscv_vfwadd_vv_f64m8_tumu(__VA_ARGS__)

#define	vfwadd_wf_f32m1(...) __riscv_vfwadd_wf_f32m1(__VA_ARGS__)

#define	vfwadd_wf_f32m1_m(...) __riscv_vfwadd_wf_f32m1_tumu(__VA_ARGS__)

#define	vfwadd_wf_f32m2(...) __riscv_vfwadd_wf_f32m2(__VA_ARGS__)

#define	vfwadd_wf_f32m2_m(...) __riscv_vfwadd_wf_f32m2_tumu(__VA_ARGS__)

#define	vfwadd_wf_f32m4(...) __riscv_vfwadd_wf_f32m4(__VA_ARGS__)

#define	vfwadd_wf_f32m4_m(...) __riscv_vfwadd_wf_f32m4_tumu(__VA_ARGS__)

#define	vfwadd_wf_f32m8(...) __riscv_vfwadd_wf_f32m8(__VA_ARGS__)

#define	vfwadd_wf_f32m8_m(...) __riscv_vfwadd_wf_f32m8_tumu(__VA_ARGS__)

#define	vfwadd_wf_f32mf2(...) __riscv_vfwadd_wf_f32mf2(__VA_ARGS__)

#define	vfwadd_wf_f32mf2_m(...) __riscv_vfwadd_wf_f32mf2_tumu(__VA_ARGS__)

#define	vfwadd_wf_f64m1(...) __riscv_vfwadd_wf_f64m1(__VA_ARGS__)

#define	vfwadd_wf_f64m1_m(...) __riscv_vfwadd_wf_f64m1_tumu(__VA_ARGS__)

#define	vfwadd_wf_f64m2(...) __riscv_vfwadd_wf_f64m2(__VA_ARGS__)

#define	vfwadd_wf_f64m2_m(...) __riscv_vfwadd_wf_f64m2_tumu(__VA_ARGS__)

#define	vfwadd_wf_f64m4(...) __riscv_vfwadd_wf_f64m4(__VA_ARGS__)

#define	vfwadd_wf_f64m4_m(...) __riscv_vfwadd_wf_f64m4_tumu(__VA_ARGS__)

#define	vfwadd_wf_f64m8(...) __riscv_vfwadd_wf_f64m8(__VA_ARGS__)

#define	vfwadd_wf_f64m8_m(...) __riscv_vfwadd_wf_f64m8_tumu(__VA_ARGS__)

#define	vfwadd_wv_f32m1(...) __riscv_vfwadd_wv_f32m1(__VA_ARGS__)

#define	vfwadd_wv_f32m1_m(...) __riscv_vfwadd_wv_f32m1_tumu(__VA_ARGS__)

#define	vfwadd_wv_f32m2(...) __riscv_vfwadd_wv_f32m2(__VA_ARGS__)

#define	vfwadd_wv_f32m2_m(...) __riscv_vfwadd_wv_f32m2_tumu(__VA_ARGS__)

#define	vfwadd_wv_f32m4(...) __riscv_vfwadd_wv_f32m4(__VA_ARGS__)

#define	vfwadd_wv_f32m4_m(...) __riscv_vfwadd_wv_f32m4_tumu(__VA_ARGS__)

#define	vfwadd_wv_f32m8(...) __riscv_vfwadd_wv_f32m8(__VA_ARGS__)

#define	vfwadd_wv_f32m8_m(...) __riscv_vfwadd_wv_f32m8_tumu(__VA_ARGS__)

#define	vfwadd_wv_f32mf2(...) __riscv_vfwadd_wv_f32mf2(__VA_ARGS__)

#define	vfwadd_wv_f32mf2_m(...) __riscv_vfwadd_wv_f32mf2_tumu(__VA_ARGS__)

#define	vfwadd_wv_f64m1(...) __riscv_vfwadd_wv_f64m1(__VA_ARGS__)

#define	vfwadd_wv_f64m1_m(...) __riscv_vfwadd_wv_f64m1_tumu(__VA_ARGS__)

#define	vfwadd_wv_f64m2(...) __riscv_vfwadd_wv_f64m2(__VA_ARGS__)

#define	vfwadd_wv_f64m2_m(...) __riscv_vfwadd_wv_f64m2_tumu(__VA_ARGS__)

#define	vfwadd_wv_f64m4(...) __riscv_vfwadd_wv_f64m4(__VA_ARGS__)

#define	vfwadd_wv_f64m4_m(...) __riscv_vfwadd_wv_f64m4_tumu(__VA_ARGS__)

#define	vfwadd_wv_f64m8(...) __riscv_vfwadd_wv_f64m8(__VA_ARGS__)

#define	vfwadd_wv_f64m8_m(...) __riscv_vfwadd_wv_f64m8_tumu(__VA_ARGS__)

#define	vfwcvt_f_f_v_f32m1(...) __riscv_vfwcvt_f_f_v_f32m1(__VA_ARGS__)

#define	vfwcvt_f_f_v_f32m1_m(...) __riscv_vfwcvt_f_f_v_f32m1_tumu(__VA_ARGS__)

#define	vfwcvt_f_f_v_f32m2(...) __riscv_vfwcvt_f_f_v_f32m2(__VA_ARGS__)

#define	vfwcvt_f_f_v_f32m2_m(...) __riscv_vfwcvt_f_f_v_f32m2_tumu(__VA_ARGS__)

#define	vfwcvt_f_f_v_f32m4(...) __riscv_vfwcvt_f_f_v_f32m4(__VA_ARGS__)

#define	vfwcvt_f_f_v_f32m4_m(...) __riscv_vfwcvt_f_f_v_f32m4_tumu(__VA_ARGS__)

#define	vfwcvt_f_f_v_f32m8(...) __riscv_vfwcvt_f_f_v_f32m8(__VA_ARGS__)

#define	vfwcvt_f_f_v_f32m8_m(...) __riscv_vfwcvt_f_f_v_f32m8_tumu(__VA_ARGS__)

#define	vfwcvt_f_f_v_f32mf2(...) __riscv_vfwcvt_f_f_v_f32mf2(__VA_ARGS__)

#define	vfwcvt_f_f_v_f32mf2_m(...) __riscv_vfwcvt_f_f_v_f32mf2_tumu(__VA_ARGS__)

#define	vfwcvt_f_f_v_f64m1(...) __riscv_vfwcvt_f_f_v_f64m1(__VA_ARGS__)

#define	vfwcvt_f_f_v_f64m1_m(...) __riscv_vfwcvt_f_f_v_f64m1_tumu(__VA_ARGS__)

#define	vfwcvt_f_f_v_f64m2(...) __riscv_vfwcvt_f_f_v_f64m2(__VA_ARGS__)

#define	vfwcvt_f_f_v_f64m2_m(...) __riscv_vfwcvt_f_f_v_f64m2_tumu(__VA_ARGS__)

#define	vfwcvt_f_f_v_f64m4(...) __riscv_vfwcvt_f_f_v_f64m4(__VA_ARGS__)

#define	vfwcvt_f_f_v_f64m4_m(...) __riscv_vfwcvt_f_f_v_f64m4_tumu(__VA_ARGS__)

#define	vfwcvt_f_f_v_f64m8(...) __riscv_vfwcvt_f_f_v_f64m8(__VA_ARGS__)

#define	vfwcvt_f_f_v_f64m8_m(...) __riscv_vfwcvt_f_f_v_f64m8_tumu(__VA_ARGS__)

#define	vfwcvt_f_x_v_f16m1(...) __riscv_vfwcvt_f_x_v_f16m1(__VA_ARGS__)

#define	vfwcvt_f_x_v_f16m1_m(...) __riscv_vfwcvt_f_x_v_f16m1_tumu(__VA_ARGS__)

#define	vfwcvt_f_x_v_f16m2(...) __riscv_vfwcvt_f_x_v_f16m2(__VA_ARGS__)

#define	vfwcvt_f_x_v_f16m2_m(...) __riscv_vfwcvt_f_x_v_f16m2_tumu(__VA_ARGS__)

#define	vfwcvt_f_x_v_f16m4(...) __riscv_vfwcvt_f_x_v_f16m4(__VA_ARGS__)

#define	vfwcvt_f_x_v_f16m4_m(...) __riscv_vfwcvt_f_x_v_f16m4_tumu(__VA_ARGS__)

#define	vfwcvt_f_x_v_f16m8(...) __riscv_vfwcvt_f_x_v_f16m8(__VA_ARGS__)

#define	vfwcvt_f_x_v_f16m8_m(...) __riscv_vfwcvt_f_x_v_f16m8_tumu(__VA_ARGS__)

#define	vfwcvt_f_x_v_f16mf2(...) __riscv_vfwcvt_f_x_v_f16mf2(__VA_ARGS__)

#define	vfwcvt_f_x_v_f16mf2_m(...) __riscv_vfwcvt_f_x_v_f16mf2_tumu(__VA_ARGS__)

#define	vfwcvt_f_x_v_f16mf4(...) __riscv_vfwcvt_f_x_v_f16mf4(__VA_ARGS__)

#define	vfwcvt_f_x_v_f16mf4_m(...) __riscv_vfwcvt_f_x_v_f16mf4_tumu(__VA_ARGS__)

#define	vfwcvt_f_x_v_f32m1(...) __riscv_vfwcvt_f_x_v_f32m1(__VA_ARGS__)

#define	vfwcvt_f_x_v_f32m1_m(...) __riscv_vfwcvt_f_x_v_f32m1_tumu(__VA_ARGS__)

#define	vfwcvt_f_x_v_f32m2(...) __riscv_vfwcvt_f_x_v_f32m2(__VA_ARGS__)

#define	vfwcvt_f_x_v_f32m2_m(...) __riscv_vfwcvt_f_x_v_f32m2_tumu(__VA_ARGS__)

#define	vfwcvt_f_x_v_f32m4(...) __riscv_vfwcvt_f_x_v_f32m4(__VA_ARGS__)

#define	vfwcvt_f_x_v_f32m4_m(...) __riscv_vfwcvt_f_x_v_f32m4_tumu(__VA_ARGS__)

#define	vfwcvt_f_x_v_f32m8(...) __riscv_vfwcvt_f_x_v_f32m8(__VA_ARGS__)

#define	vfwcvt_f_x_v_f32m8_m(...) __riscv_vfwcvt_f_x_v_f32m8_tumu(__VA_ARGS__)

#define	vfwcvt_f_x_v_f32mf2(...) __riscv_vfwcvt_f_x_v_f32mf2(__VA_ARGS__)

#define	vfwcvt_f_x_v_f32mf2_m(...) __riscv_vfwcvt_f_x_v_f32mf2_tumu(__VA_ARGS__)

#define	vfwcvt_f_x_v_f64m1(...) __riscv_vfwcvt_f_x_v_f64m1(__VA_ARGS__)

#define	vfwcvt_f_x_v_f64m1_m(...) __riscv_vfwcvt_f_x_v_f64m1_tumu(__VA_ARGS__)

#define	vfwcvt_f_x_v_f64m2(...) __riscv_vfwcvt_f_x_v_f64m2(__VA_ARGS__)

#define	vfwcvt_f_x_v_f64m2_m(...) __riscv_vfwcvt_f_x_v_f64m2_tumu(__VA_ARGS__)

#define	vfwcvt_f_x_v_f64m4(...) __riscv_vfwcvt_f_x_v_f64m4(__VA_ARGS__)

#define	vfwcvt_f_x_v_f64m4_m(...) __riscv_vfwcvt_f_x_v_f64m4_tumu(__VA_ARGS__)

#define	vfwcvt_f_x_v_f64m8(...) __riscv_vfwcvt_f_x_v_f64m8(__VA_ARGS__)

#define	vfwcvt_f_x_v_f64m8_m(...) __riscv_vfwcvt_f_x_v_f64m8_tumu(__VA_ARGS__)

#define	vfwcvt_f_xu_v_f16m1(...) __riscv_vfwcvt_f_xu_v_f16m1(__VA_ARGS__)

#define	vfwcvt_f_xu_v_f16m1_m(...) __riscv_vfwcvt_f_xu_v_f16m1_tumu(__VA_ARGS__)

#define	vfwcvt_f_xu_v_f16m2(...) __riscv_vfwcvt_f_xu_v_f16m2(__VA_ARGS__)

#define	vfwcvt_f_xu_v_f16m2_m(...) __riscv_vfwcvt_f_xu_v_f16m2_tumu(__VA_ARGS__)

#define	vfwcvt_f_xu_v_f16m4(...) __riscv_vfwcvt_f_xu_v_f16m4(__VA_ARGS__)

#define	vfwcvt_f_xu_v_f16m4_m(...) __riscv_vfwcvt_f_xu_v_f16m4_tumu(__VA_ARGS__)

#define	vfwcvt_f_xu_v_f16m8(...) __riscv_vfwcvt_f_xu_v_f16m8(__VA_ARGS__)

#define	vfwcvt_f_xu_v_f16m8_m(...) __riscv_vfwcvt_f_xu_v_f16m8_tumu(__VA_ARGS__)

#define	vfwcvt_f_xu_v_f16mf2(...) __riscv_vfwcvt_f_xu_v_f16mf2(__VA_ARGS__)

#define	vfwcvt_f_xu_v_f16mf2_m(...) __riscv_vfwcvt_f_xu_v_f16mf2_tumu(__VA_ARGS__)

#define	vfwcvt_f_xu_v_f16mf4(...) __riscv_vfwcvt_f_xu_v_f16mf4(__VA_ARGS__)

#define	vfwcvt_f_xu_v_f16mf4_m(...) __riscv_vfwcvt_f_xu_v_f16mf4_tumu(__VA_ARGS__)

#define	vfwcvt_f_xu_v_f32m1(...) __riscv_vfwcvt_f_xu_v_f32m1(__VA_ARGS__)

#define	vfwcvt_f_xu_v_f32m1_m(...) __riscv_vfwcvt_f_xu_v_f32m1_tumu(__VA_ARGS__)

#define	vfwcvt_f_xu_v_f32m2(...) __riscv_vfwcvt_f_xu_v_f32m2(__VA_ARGS__)

#define	vfwcvt_f_xu_v_f32m2_m(...) __riscv_vfwcvt_f_xu_v_f32m2_tumu(__VA_ARGS__)

#define	vfwcvt_f_xu_v_f32m4(...) __riscv_vfwcvt_f_xu_v_f32m4(__VA_ARGS__)

#define	vfwcvt_f_xu_v_f32m4_m(...) __riscv_vfwcvt_f_xu_v_f32m4_tumu(__VA_ARGS__)

#define	vfwcvt_f_xu_v_f32m8(...) __riscv_vfwcvt_f_xu_v_f32m8(__VA_ARGS__)

#define	vfwcvt_f_xu_v_f32m8_m(...) __riscv_vfwcvt_f_xu_v_f32m8_tumu(__VA_ARGS__)

#define	vfwcvt_f_xu_v_f32mf2(...) __riscv_vfwcvt_f_xu_v_f32mf2(__VA_ARGS__)

#define	vfwcvt_f_xu_v_f32mf2_m(...) __riscv_vfwcvt_f_xu_v_f32mf2_tumu(__VA_ARGS__)

#define	vfwcvt_f_xu_v_f64m1(...) __riscv_vfwcvt_f_xu_v_f64m1(__VA_ARGS__)

#define	vfwcvt_f_xu_v_f64m1_m(...) __riscv_vfwcvt_f_xu_v_f64m1_tumu(__VA_ARGS__)

#define	vfwcvt_f_xu_v_f64m2(...) __riscv_vfwcvt_f_xu_v_f64m2(__VA_ARGS__)

#define	vfwcvt_f_xu_v_f64m2_m(...) __riscv_vfwcvt_f_xu_v_f64m2_tumu(__VA_ARGS__)

#define	vfwcvt_f_xu_v_f64m4(...) __riscv_vfwcvt_f_xu_v_f64m4(__VA_ARGS__)

#define	vfwcvt_f_xu_v_f64m4_m(...) __riscv_vfwcvt_f_xu_v_f64m4_tumu(__VA_ARGS__)

#define	vfwcvt_f_xu_v_f64m8(...) __riscv_vfwcvt_f_xu_v_f64m8(__VA_ARGS__)

#define	vfwcvt_f_xu_v_f64m8_m(...) __riscv_vfwcvt_f_xu_v_f64m8_tumu(__VA_ARGS__)

#define	vfwcvt_rtz_x_f_v_i32m1(...) __riscv_vfwcvt_rtz_x_f_v_i32m1(__VA_ARGS__)

#define	vfwcvt_rtz_x_f_v_i32m1_m(...) __riscv_vfwcvt_rtz_x_f_v_i32m1_tumu(__VA_ARGS__)

#define	vfwcvt_rtz_x_f_v_i32m2(...) __riscv_vfwcvt_rtz_x_f_v_i32m2(__VA_ARGS__)

#define	vfwcvt_rtz_x_f_v_i32m2_m(...) __riscv_vfwcvt_rtz_x_f_v_i32m2_tumu(__VA_ARGS__)

#define	vfwcvt_rtz_x_f_v_i32m4(...) __riscv_vfwcvt_rtz_x_f_v_i32m4(__VA_ARGS__)

#define	vfwcvt_rtz_x_f_v_i32m4_m(...) __riscv_vfwcvt_rtz_x_f_v_i32m4_tumu(__VA_ARGS__)

#define	vfwcvt_rtz_x_f_v_i32m8(...) __riscv_vfwcvt_rtz_x_f_v_i32m8(__VA_ARGS__)

#define	vfwcvt_rtz_x_f_v_i32m8_m(...) __riscv_vfwcvt_rtz_x_f_v_i32m8_tumu(__VA_ARGS__)

#define	vfwcvt_rtz_x_f_v_i32mf2(...) __riscv_vfwcvt_rtz_x_f_v_i32mf2(__VA_ARGS__)

#define	vfwcvt_rtz_x_f_v_i32mf2_m(...) __riscv_vfwcvt_rtz_x_f_v_i32mf2_tumu(__VA_ARGS__)

#define	vfwcvt_rtz_x_f_v_i64m1(...) __riscv_vfwcvt_rtz_x_f_v_i64m1(__VA_ARGS__)

#define	vfwcvt_rtz_x_f_v_i64m1_m(...) __riscv_vfwcvt_rtz_x_f_v_i64m1_tumu(__VA_ARGS__)

#define	vfwcvt_rtz_x_f_v_i64m2(...) __riscv_vfwcvt_rtz_x_f_v_i64m2(__VA_ARGS__)

#define	vfwcvt_rtz_x_f_v_i64m2_m(...) __riscv_vfwcvt_rtz_x_f_v_i64m2_tumu(__VA_ARGS__)

#define	vfwcvt_rtz_x_f_v_i64m4(...) __riscv_vfwcvt_rtz_x_f_v_i64m4(__VA_ARGS__)

#define	vfwcvt_rtz_x_f_v_i64m4_m(...) __riscv_vfwcvt_rtz_x_f_v_i64m4_tumu(__VA_ARGS__)

#define	vfwcvt_rtz_x_f_v_i64m8(...) __riscv_vfwcvt_rtz_x_f_v_i64m8(__VA_ARGS__)

#define	vfwcvt_rtz_x_f_v_i64m8_m(...) __riscv_vfwcvt_rtz_x_f_v_i64m8_tumu(__VA_ARGS__)

#define	vfwcvt_rtz_xu_f_v_u32m1(...) __riscv_vfwcvt_rtz_xu_f_v_u32m1(__VA_ARGS__)

#define	vfwcvt_rtz_xu_f_v_u32m1_m(...) __riscv_vfwcvt_rtz_xu_f_v_u32m1_tumu(__VA_ARGS__)

#define	vfwcvt_rtz_xu_f_v_u32m2(...) __riscv_vfwcvt_rtz_xu_f_v_u32m2(__VA_ARGS__)

#define	vfwcvt_rtz_xu_f_v_u32m2_m(...) __riscv_vfwcvt_rtz_xu_f_v_u32m2_tumu(__VA_ARGS__)

#define	vfwcvt_rtz_xu_f_v_u32m4(...) __riscv_vfwcvt_rtz_xu_f_v_u32m4(__VA_ARGS__)

#define	vfwcvt_rtz_xu_f_v_u32m4_m(...) __riscv_vfwcvt_rtz_xu_f_v_u32m4_tumu(__VA_ARGS__)

#define	vfwcvt_rtz_xu_f_v_u32m8(...) __riscv_vfwcvt_rtz_xu_f_v_u32m8(__VA_ARGS__)

#define	vfwcvt_rtz_xu_f_v_u32m8_m(...) __riscv_vfwcvt_rtz_xu_f_v_u32m8_tumu(__VA_ARGS__)

#define	vfwcvt_rtz_xu_f_v_u32mf2(...) __riscv_vfwcvt_rtz_xu_f_v_u32mf2(__VA_ARGS__)

#define	vfwcvt_rtz_xu_f_v_u32mf2_m(...) __riscv_vfwcvt_rtz_xu_f_v_u32mf2_tumu(__VA_ARGS__)

#define	vfwcvt_rtz_xu_f_v_u64m1(...) __riscv_vfwcvt_rtz_xu_f_v_u64m1(__VA_ARGS__)

#define	vfwcvt_rtz_xu_f_v_u64m1_m(...) __riscv_vfwcvt_rtz_xu_f_v_u64m1_tumu(__VA_ARGS__)

#define	vfwcvt_rtz_xu_f_v_u64m2(...) __riscv_vfwcvt_rtz_xu_f_v_u64m2(__VA_ARGS__)

#define	vfwcvt_rtz_xu_f_v_u64m2_m(...) __riscv_vfwcvt_rtz_xu_f_v_u64m2_tumu(__VA_ARGS__)

#define	vfwcvt_rtz_xu_f_v_u64m4(...) __riscv_vfwcvt_rtz_xu_f_v_u64m4(__VA_ARGS__)

#define	vfwcvt_rtz_xu_f_v_u64m4_m(...) __riscv_vfwcvt_rtz_xu_f_v_u64m4_tumu(__VA_ARGS__)

#define	vfwcvt_rtz_xu_f_v_u64m8(...) __riscv_vfwcvt_rtz_xu_f_v_u64m8(__VA_ARGS__)

#define	vfwcvt_rtz_xu_f_v_u64m8_m(...) __riscv_vfwcvt_rtz_xu_f_v_u64m8_tumu(__VA_ARGS__)

#define	vfwcvt_x_f_v_i32m1(...) __riscv_vfwcvt_x_f_v_i32m1(__VA_ARGS__)

#define	vfwcvt_x_f_v_i32m1_m(...) __riscv_vfwcvt_x_f_v_i32m1_tumu(__VA_ARGS__)

#define	vfwcvt_x_f_v_i32m2(...) __riscv_vfwcvt_x_f_v_i32m2(__VA_ARGS__)

#define	vfwcvt_x_f_v_i32m2_m(...) __riscv_vfwcvt_x_f_v_i32m2_tumu(__VA_ARGS__)

#define	vfwcvt_x_f_v_i32m4(...) __riscv_vfwcvt_x_f_v_i32m4(__VA_ARGS__)

#define	vfwcvt_x_f_v_i32m4_m(...) __riscv_vfwcvt_x_f_v_i32m4_tumu(__VA_ARGS__)

#define	vfwcvt_x_f_v_i32m8(...) __riscv_vfwcvt_x_f_v_i32m8(__VA_ARGS__)

#define	vfwcvt_x_f_v_i32m8_m(...) __riscv_vfwcvt_x_f_v_i32m8_tumu(__VA_ARGS__)

#define	vfwcvt_x_f_v_i32mf2(...) __riscv_vfwcvt_x_f_v_i32mf2(__VA_ARGS__)

#define	vfwcvt_x_f_v_i32mf2_m(...) __riscv_vfwcvt_x_f_v_i32mf2_tumu(__VA_ARGS__)

#define	vfwcvt_x_f_v_i64m1(...) __riscv_vfwcvt_x_f_v_i64m1(__VA_ARGS__)

#define	vfwcvt_x_f_v_i64m1_m(...) __riscv_vfwcvt_x_f_v_i64m1_tumu(__VA_ARGS__)

#define	vfwcvt_x_f_v_i64m2(...) __riscv_vfwcvt_x_f_v_i64m2(__VA_ARGS__)

#define	vfwcvt_x_f_v_i64m2_m(...) __riscv_vfwcvt_x_f_v_i64m2_tumu(__VA_ARGS__)

#define	vfwcvt_x_f_v_i64m4(...) __riscv_vfwcvt_x_f_v_i64m4(__VA_ARGS__)

#define	vfwcvt_x_f_v_i64m4_m(...) __riscv_vfwcvt_x_f_v_i64m4_tumu(__VA_ARGS__)

#define	vfwcvt_x_f_v_i64m8(...) __riscv_vfwcvt_x_f_v_i64m8(__VA_ARGS__)

#define	vfwcvt_x_f_v_i64m8_m(...) __riscv_vfwcvt_x_f_v_i64m8_tumu(__VA_ARGS__)

#define	vfwcvt_xu_f_v_u32m1(...) __riscv_vfwcvt_xu_f_v_u32m1(__VA_ARGS__)

#define	vfwcvt_xu_f_v_u32m1_m(...) __riscv_vfwcvt_xu_f_v_u32m1_tumu(__VA_ARGS__)

#define	vfwcvt_xu_f_v_u32m2(...) __riscv_vfwcvt_xu_f_v_u32m2(__VA_ARGS__)

#define	vfwcvt_xu_f_v_u32m2_m(...) __riscv_vfwcvt_xu_f_v_u32m2_tumu(__VA_ARGS__)

#define	vfwcvt_xu_f_v_u32m4(...) __riscv_vfwcvt_xu_f_v_u32m4(__VA_ARGS__)

#define	vfwcvt_xu_f_v_u32m4_m(...) __riscv_vfwcvt_xu_f_v_u32m4_tumu(__VA_ARGS__)

#define	vfwcvt_xu_f_v_u32m8(...) __riscv_vfwcvt_xu_f_v_u32m8(__VA_ARGS__)

#define	vfwcvt_xu_f_v_u32m8_m(...) __riscv_vfwcvt_xu_f_v_u32m8_tumu(__VA_ARGS__)

#define	vfwcvt_xu_f_v_u32mf2(...) __riscv_vfwcvt_xu_f_v_u32mf2(__VA_ARGS__)

#define	vfwcvt_xu_f_v_u32mf2_m(...) __riscv_vfwcvt_xu_f_v_u32mf2_tumu(__VA_ARGS__)

#define	vfwcvt_xu_f_v_u64m1(...) __riscv_vfwcvt_xu_f_v_u64m1(__VA_ARGS__)

#define	vfwcvt_xu_f_v_u64m1_m(...) __riscv_vfwcvt_xu_f_v_u64m1_tumu(__VA_ARGS__)

#define	vfwcvt_xu_f_v_u64m2(...) __riscv_vfwcvt_xu_f_v_u64m2(__VA_ARGS__)

#define	vfwcvt_xu_f_v_u64m2_m(...) __riscv_vfwcvt_xu_f_v_u64m2_tumu(__VA_ARGS__)

#define	vfwcvt_xu_f_v_u64m4(...) __riscv_vfwcvt_xu_f_v_u64m4(__VA_ARGS__)

#define	vfwcvt_xu_f_v_u64m4_m(...) __riscv_vfwcvt_xu_f_v_u64m4_tumu(__VA_ARGS__)

#define	vfwcvt_xu_f_v_u64m8(...) __riscv_vfwcvt_xu_f_v_u64m8(__VA_ARGS__)

#define	vfwcvt_xu_f_v_u64m8_m(...) __riscv_vfwcvt_xu_f_v_u64m8_tumu(__VA_ARGS__)

#define	vfwmacc_vf_f32m1(...) __riscv_vfwmacc_vf_f32m1_tu(__VA_ARGS__)

#define	vfwmacc_vf_f32m1_m(...) __riscv_vfwmacc_vf_f32m1_tumu(__VA_ARGS__)

#define	vfwmacc_vf_f32m2(...) __riscv_vfwmacc_vf_f32m2_tu(__VA_ARGS__)

#define	vfwmacc_vf_f32m2_m(...) __riscv_vfwmacc_vf_f32m2_tumu(__VA_ARGS__)

#define	vfwmacc_vf_f32m4(...) __riscv_vfwmacc_vf_f32m4_tu(__VA_ARGS__)

#define	vfwmacc_vf_f32m4_m(...) __riscv_vfwmacc_vf_f32m4_tumu(__VA_ARGS__)

#define	vfwmacc_vf_f32m8(...) __riscv_vfwmacc_vf_f32m8_tu(__VA_ARGS__)

#define	vfwmacc_vf_f32m8_m(...) __riscv_vfwmacc_vf_f32m8_tumu(__VA_ARGS__)

#define	vfwmacc_vf_f32mf2(...) __riscv_vfwmacc_vf_f32mf2_tu(__VA_ARGS__)

#define	vfwmacc_vf_f32mf2_m(...) __riscv_vfwmacc_vf_f32mf2_tumu(__VA_ARGS__)

#define	vfwmacc_vf_f64m1(...) __riscv_vfwmacc_vf_f64m1_tu(__VA_ARGS__)

#define	vfwmacc_vf_f64m1_m(...) __riscv_vfwmacc_vf_f64m1_tumu(__VA_ARGS__)

#define	vfwmacc_vf_f64m2(...) __riscv_vfwmacc_vf_f64m2_tu(__VA_ARGS__)

#define	vfwmacc_vf_f64m2_m(...) __riscv_vfwmacc_vf_f64m2_tumu(__VA_ARGS__)

#define	vfwmacc_vf_f64m4(...) __riscv_vfwmacc_vf_f64m4_tu(__VA_ARGS__)

#define	vfwmacc_vf_f64m4_m(...) __riscv_vfwmacc_vf_f64m4_tumu(__VA_ARGS__)

#define	vfwmacc_vf_f64m8(...) __riscv_vfwmacc_vf_f64m8_tu(__VA_ARGS__)

#define	vfwmacc_vf_f64m8_m(...) __riscv_vfwmacc_vf_f64m8_tumu(__VA_ARGS__)

#define	vfwmacc_vv_f32m1(...) __riscv_vfwmacc_vv_f32m1_tu(__VA_ARGS__)

#define	vfwmacc_vv_f32m1_m(...) __riscv_vfwmacc_vv_f32m1_tumu(__VA_ARGS__)

#define	vfwmacc_vv_f32m2(...) __riscv_vfwmacc_vv_f32m2_tu(__VA_ARGS__)

#define	vfwmacc_vv_f32m2_m(...) __riscv_vfwmacc_vv_f32m2_tumu(__VA_ARGS__)

#define	vfwmacc_vv_f32m4(...) __riscv_vfwmacc_vv_f32m4_tu(__VA_ARGS__)

#define	vfwmacc_vv_f32m4_m(...) __riscv_vfwmacc_vv_f32m4_tumu(__VA_ARGS__)

#define	vfwmacc_vv_f32m8(...) __riscv_vfwmacc_vv_f32m8_tu(__VA_ARGS__)

#define	vfwmacc_vv_f32m8_m(...) __riscv_vfwmacc_vv_f32m8_tumu(__VA_ARGS__)

#define	vfwmacc_vv_f32mf2(...) __riscv_vfwmacc_vv_f32mf2_tu(__VA_ARGS__)

#define	vfwmacc_vv_f32mf2_m(...) __riscv_vfwmacc_vv_f32mf2_tumu(__VA_ARGS__)

#define	vfwmacc_vv_f64m1(...) __riscv_vfwmacc_vv_f64m1_tu(__VA_ARGS__)

#define	vfwmacc_vv_f64m1_m(...) __riscv_vfwmacc_vv_f64m1_tumu(__VA_ARGS__)

#define	vfwmacc_vv_f64m2(...) __riscv_vfwmacc_vv_f64m2_tu(__VA_ARGS__)

#define	vfwmacc_vv_f64m2_m(...) __riscv_vfwmacc_vv_f64m2_tumu(__VA_ARGS__)

#define	vfwmacc_vv_f64m4(...) __riscv_vfwmacc_vv_f64m4_tu(__VA_ARGS__)

#define	vfwmacc_vv_f64m4_m(...) __riscv_vfwmacc_vv_f64m4_tumu(__VA_ARGS__)

#define	vfwmacc_vv_f64m8(...) __riscv_vfwmacc_vv_f64m8_tu(__VA_ARGS__)

#define	vfwmacc_vv_f64m8_m(...) __riscv_vfwmacc_vv_f64m8_tumu(__VA_ARGS__)

#define	vfwmsac_vf_f32m1(...) __riscv_vfwmsac_vf_f32m1_tu(__VA_ARGS__)

#define	vfwmsac_vf_f32m1_m(...) __riscv_vfwmsac_vf_f32m1_tumu(__VA_ARGS__)

#define	vfwmsac_vf_f32m2(...) __riscv_vfwmsac_vf_f32m2_tu(__VA_ARGS__)

#define	vfwmsac_vf_f32m2_m(...) __riscv_vfwmsac_vf_f32m2_tumu(__VA_ARGS__)

#define	vfwmsac_vf_f32m4(...) __riscv_vfwmsac_vf_f32m4_tu(__VA_ARGS__)

#define	vfwmsac_vf_f32m4_m(...) __riscv_vfwmsac_vf_f32m4_tumu(__VA_ARGS__)

#define	vfwmsac_vf_f32m8(...) __riscv_vfwmsac_vf_f32m8_tu(__VA_ARGS__)

#define	vfwmsac_vf_f32m8_m(...) __riscv_vfwmsac_vf_f32m8_tumu(__VA_ARGS__)

#define	vfwmsac_vf_f32mf2(...) __riscv_vfwmsac_vf_f32mf2_tu(__VA_ARGS__)

#define	vfwmsac_vf_f32mf2_m(...) __riscv_vfwmsac_vf_f32mf2_tumu(__VA_ARGS__)

#define	vfwmsac_vf_f64m1(...) __riscv_vfwmsac_vf_f64m1_tu(__VA_ARGS__)

#define	vfwmsac_vf_f64m1_m(...) __riscv_vfwmsac_vf_f64m1_tumu(__VA_ARGS__)

#define	vfwmsac_vf_f64m2(...) __riscv_vfwmsac_vf_f64m2_tu(__VA_ARGS__)

#define	vfwmsac_vf_f64m2_m(...) __riscv_vfwmsac_vf_f64m2_tumu(__VA_ARGS__)

#define	vfwmsac_vf_f64m4(...) __riscv_vfwmsac_vf_f64m4_tu(__VA_ARGS__)

#define	vfwmsac_vf_f64m4_m(...) __riscv_vfwmsac_vf_f64m4_tumu(__VA_ARGS__)

#define	vfwmsac_vf_f64m8(...) __riscv_vfwmsac_vf_f64m8_tu(__VA_ARGS__)

#define	vfwmsac_vf_f64m8_m(...) __riscv_vfwmsac_vf_f64m8_tumu(__VA_ARGS__)

#define	vfwmsac_vv_f32m1(...) __riscv_vfwmsac_vv_f32m1_tu(__VA_ARGS__)

#define	vfwmsac_vv_f32m1_m(...) __riscv_vfwmsac_vv_f32m1_tumu(__VA_ARGS__)

#define	vfwmsac_vv_f32m2(...) __riscv_vfwmsac_vv_f32m2_tu(__VA_ARGS__)

#define	vfwmsac_vv_f32m2_m(...) __riscv_vfwmsac_vv_f32m2_tumu(__VA_ARGS__)

#define	vfwmsac_vv_f32m4(...) __riscv_vfwmsac_vv_f32m4_tu(__VA_ARGS__)

#define	vfwmsac_vv_f32m4_m(...) __riscv_vfwmsac_vv_f32m4_tumu(__VA_ARGS__)

#define	vfwmsac_vv_f32m8(...) __riscv_vfwmsac_vv_f32m8_tu(__VA_ARGS__)

#define	vfwmsac_vv_f32m8_m(...) __riscv_vfwmsac_vv_f32m8_tumu(__VA_ARGS__)

#define	vfwmsac_vv_f32mf2(...) __riscv_vfwmsac_vv_f32mf2_tu(__VA_ARGS__)

#define	vfwmsac_vv_f32mf2_m(...) __riscv_vfwmsac_vv_f32mf2_tumu(__VA_ARGS__)

#define	vfwmsac_vv_f64m1(...) __riscv_vfwmsac_vv_f64m1_tu(__VA_ARGS__)

#define	vfwmsac_vv_f64m1_m(...) __riscv_vfwmsac_vv_f64m1_tumu(__VA_ARGS__)

#define	vfwmsac_vv_f64m2(...) __riscv_vfwmsac_vv_f64m2_tu(__VA_ARGS__)

#define	vfwmsac_vv_f64m2_m(...) __riscv_vfwmsac_vv_f64m2_tumu(__VA_ARGS__)

#define	vfwmsac_vv_f64m4(...) __riscv_vfwmsac_vv_f64m4_tu(__VA_ARGS__)

#define	vfwmsac_vv_f64m4_m(...) __riscv_vfwmsac_vv_f64m4_tumu(__VA_ARGS__)

#define	vfwmsac_vv_f64m8(...) __riscv_vfwmsac_vv_f64m8_tu(__VA_ARGS__)

#define	vfwmsac_vv_f64m8_m(...) __riscv_vfwmsac_vv_f64m8_tumu(__VA_ARGS__)

#define	vfwmul_vf_f32m1(...) __riscv_vfwmul_vf_f32m1(__VA_ARGS__)

#define	vfwmul_vf_f32m1_m(...) __riscv_vfwmul_vf_f32m1_tumu(__VA_ARGS__)

#define	vfwmul_vf_f32m2(...) __riscv_vfwmul_vf_f32m2(__VA_ARGS__)

#define	vfwmul_vf_f32m2_m(...) __riscv_vfwmul_vf_f32m2_tumu(__VA_ARGS__)

#define	vfwmul_vf_f32m4(...) __riscv_vfwmul_vf_f32m4(__VA_ARGS__)

#define	vfwmul_vf_f32m4_m(...) __riscv_vfwmul_vf_f32m4_tumu(__VA_ARGS__)

#define	vfwmul_vf_f32m8(...) __riscv_vfwmul_vf_f32m8(__VA_ARGS__)

#define	vfwmul_vf_f32m8_m(...) __riscv_vfwmul_vf_f32m8_tumu(__VA_ARGS__)

#define	vfwmul_vf_f32mf2(...) __riscv_vfwmul_vf_f32mf2(__VA_ARGS__)

#define	vfwmul_vf_f32mf2_m(...) __riscv_vfwmul_vf_f32mf2_tumu(__VA_ARGS__)

#define	vfwmul_vf_f64m1(...) __riscv_vfwmul_vf_f64m1(__VA_ARGS__)

#define	vfwmul_vf_f64m1_m(...) __riscv_vfwmul_vf_f64m1_tumu(__VA_ARGS__)

#define	vfwmul_vf_f64m2(...) __riscv_vfwmul_vf_f64m2(__VA_ARGS__)

#define	vfwmul_vf_f64m2_m(...) __riscv_vfwmul_vf_f64m2_tumu(__VA_ARGS__)

#define	vfwmul_vf_f64m4(...) __riscv_vfwmul_vf_f64m4(__VA_ARGS__)

#define	vfwmul_vf_f64m4_m(...) __riscv_vfwmul_vf_f64m4_tumu(__VA_ARGS__)

#define	vfwmul_vf_f64m8(...) __riscv_vfwmul_vf_f64m8(__VA_ARGS__)

#define	vfwmul_vf_f64m8_m(...) __riscv_vfwmul_vf_f64m8_tumu(__VA_ARGS__)

#define	vfwmul_vv_f32m1(...) __riscv_vfwmul_vv_f32m1(__VA_ARGS__)

#define	vfwmul_vv_f32m1_m(...) __riscv_vfwmul_vv_f32m1_tumu(__VA_ARGS__)

#define	vfwmul_vv_f32m2(...) __riscv_vfwmul_vv_f32m2(__VA_ARGS__)

#define	vfwmul_vv_f32m2_m(...) __riscv_vfwmul_vv_f32m2_tumu(__VA_ARGS__)

#define	vfwmul_vv_f32m4(...) __riscv_vfwmul_vv_f32m4(__VA_ARGS__)

#define	vfwmul_vv_f32m4_m(...) __riscv_vfwmul_vv_f32m4_tumu(__VA_ARGS__)

#define	vfwmul_vv_f32m8(...) __riscv_vfwmul_vv_f32m8(__VA_ARGS__)

#define	vfwmul_vv_f32m8_m(...) __riscv_vfwmul_vv_f32m8_tumu(__VA_ARGS__)

#define	vfwmul_vv_f32mf2(...) __riscv_vfwmul_vv_f32mf2(__VA_ARGS__)

#define	vfwmul_vv_f32mf2_m(...) __riscv_vfwmul_vv_f32mf2_tumu(__VA_ARGS__)

#define	vfwmul_vv_f64m1(...) __riscv_vfwmul_vv_f64m1(__VA_ARGS__)

#define	vfwmul_vv_f64m1_m(...) __riscv_vfwmul_vv_f64m1_tumu(__VA_ARGS__)

#define	vfwmul_vv_f64m2(...) __riscv_vfwmul_vv_f64m2(__VA_ARGS__)

#define	vfwmul_vv_f64m2_m(...) __riscv_vfwmul_vv_f64m2_tumu(__VA_ARGS__)

#define	vfwmul_vv_f64m4(...) __riscv_vfwmul_vv_f64m4(__VA_ARGS__)

#define	vfwmul_vv_f64m4_m(...) __riscv_vfwmul_vv_f64m4_tumu(__VA_ARGS__)

#define	vfwmul_vv_f64m8(...) __riscv_vfwmul_vv_f64m8(__VA_ARGS__)

#define	vfwmul_vv_f64m8_m(...) __riscv_vfwmul_vv_f64m8_tumu(__VA_ARGS__)

#define	vfwnmacc_vf_f32m1(...) __riscv_vfwnmacc_vf_f32m1_tu(__VA_ARGS__)

#define	vfwnmacc_vf_f32m1_m(...) __riscv_vfwnmacc_vf_f32m1_tumu(__VA_ARGS__)

#define	vfwnmacc_vf_f32m2(...) __riscv_vfwnmacc_vf_f32m2_tu(__VA_ARGS__)

#define	vfwnmacc_vf_f32m2_m(...) __riscv_vfwnmacc_vf_f32m2_tumu(__VA_ARGS__)

#define	vfwnmacc_vf_f32m4(...) __riscv_vfwnmacc_vf_f32m4_tu(__VA_ARGS__)

#define	vfwnmacc_vf_f32m4_m(...) __riscv_vfwnmacc_vf_f32m4_tumu(__VA_ARGS__)

#define	vfwnmacc_vf_f32m8(...) __riscv_vfwnmacc_vf_f32m8_tu(__VA_ARGS__)

#define	vfwnmacc_vf_f32m8_m(...) __riscv_vfwnmacc_vf_f32m8_tumu(__VA_ARGS__)

#define	vfwnmacc_vf_f32mf2(...) __riscv_vfwnmacc_vf_f32mf2_tu(__VA_ARGS__)

#define	vfwnmacc_vf_f32mf2_m(...) __riscv_vfwnmacc_vf_f32mf2_tumu(__VA_ARGS__)

#define	vfwnmacc_vf_f64m1(...) __riscv_vfwnmacc_vf_f64m1_tu(__VA_ARGS__)

#define	vfwnmacc_vf_f64m1_m(...) __riscv_vfwnmacc_vf_f64m1_tumu(__VA_ARGS__)

#define	vfwnmacc_vf_f64m2(...) __riscv_vfwnmacc_vf_f64m2_tu(__VA_ARGS__)

#define	vfwnmacc_vf_f64m2_m(...) __riscv_vfwnmacc_vf_f64m2_tumu(__VA_ARGS__)

#define	vfwnmacc_vf_f64m4(...) __riscv_vfwnmacc_vf_f64m4_tu(__VA_ARGS__)

#define	vfwnmacc_vf_f64m4_m(...) __riscv_vfwnmacc_vf_f64m4_tumu(__VA_ARGS__)

#define	vfwnmacc_vf_f64m8(...) __riscv_vfwnmacc_vf_f64m8_tu(__VA_ARGS__)

#define	vfwnmacc_vf_f64m8_m(...) __riscv_vfwnmacc_vf_f64m8_tumu(__VA_ARGS__)

#define	vfwnmacc_vv_f32m1(...) __riscv_vfwnmacc_vv_f32m1_tu(__VA_ARGS__)

#define	vfwnmacc_vv_f32m1_m(...) __riscv_vfwnmacc_vv_f32m1_tumu(__VA_ARGS__)

#define	vfwnmacc_vv_f32m2(...) __riscv_vfwnmacc_vv_f32m2_tu(__VA_ARGS__)

#define	vfwnmacc_vv_f32m2_m(...) __riscv_vfwnmacc_vv_f32m2_tumu(__VA_ARGS__)

#define	vfwnmacc_vv_f32m4(...) __riscv_vfwnmacc_vv_f32m4_tu(__VA_ARGS__)

#define	vfwnmacc_vv_f32m4_m(...) __riscv_vfwnmacc_vv_f32m4_tumu(__VA_ARGS__)

#define	vfwnmacc_vv_f32m8(...) __riscv_vfwnmacc_vv_f32m8_tu(__VA_ARGS__)

#define	vfwnmacc_vv_f32m8_m(...) __riscv_vfwnmacc_vv_f32m8_tumu(__VA_ARGS__)

#define	vfwnmacc_vv_f32mf2(...) __riscv_vfwnmacc_vv_f32mf2_tu(__VA_ARGS__)

#define	vfwnmacc_vv_f32mf2_m(...) __riscv_vfwnmacc_vv_f32mf2_tumu(__VA_ARGS__)

#define	vfwnmacc_vv_f64m1(...) __riscv_vfwnmacc_vv_f64m1_tu(__VA_ARGS__)

#define	vfwnmacc_vv_f64m1_m(...) __riscv_vfwnmacc_vv_f64m1_tumu(__VA_ARGS__)

#define	vfwnmacc_vv_f64m2(...) __riscv_vfwnmacc_vv_f64m2_tu(__VA_ARGS__)

#define	vfwnmacc_vv_f64m2_m(...) __riscv_vfwnmacc_vv_f64m2_tumu(__VA_ARGS__)

#define	vfwnmacc_vv_f64m4(...) __riscv_vfwnmacc_vv_f64m4_tu(__VA_ARGS__)

#define	vfwnmacc_vv_f64m4_m(...) __riscv_vfwnmacc_vv_f64m4_tumu(__VA_ARGS__)

#define	vfwnmacc_vv_f64m8(...) __riscv_vfwnmacc_vv_f64m8_tu(__VA_ARGS__)

#define	vfwnmacc_vv_f64m8_m(...) __riscv_vfwnmacc_vv_f64m8_tumu(__VA_ARGS__)

#define	vfwnmsac_vf_f32m1(...) __riscv_vfwnmsac_vf_f32m1_tu(__VA_ARGS__)

#define	vfwnmsac_vf_f32m1_m(...) __riscv_vfwnmsac_vf_f32m1_tumu(__VA_ARGS__)

#define	vfwnmsac_vf_f32m2(...) __riscv_vfwnmsac_vf_f32m2_tu(__VA_ARGS__)

#define	vfwnmsac_vf_f32m2_m(...) __riscv_vfwnmsac_vf_f32m2_tumu(__VA_ARGS__)

#define	vfwnmsac_vf_f32m4(...) __riscv_vfwnmsac_vf_f32m4_tu(__VA_ARGS__)

#define	vfwnmsac_vf_f32m4_m(...) __riscv_vfwnmsac_vf_f32m4_tumu(__VA_ARGS__)

#define	vfwnmsac_vf_f32m8(...) __riscv_vfwnmsac_vf_f32m8_tu(__VA_ARGS__)

#define	vfwnmsac_vf_f32m8_m(...) __riscv_vfwnmsac_vf_f32m8_tumu(__VA_ARGS__)

#define	vfwnmsac_vf_f32mf2(...) __riscv_vfwnmsac_vf_f32mf2_tu(__VA_ARGS__)

#define	vfwnmsac_vf_f32mf2_m(...) __riscv_vfwnmsac_vf_f32mf2_tumu(__VA_ARGS__)

#define	vfwnmsac_vf_f64m1(...) __riscv_vfwnmsac_vf_f64m1_tu(__VA_ARGS__)

#define	vfwnmsac_vf_f64m1_m(...) __riscv_vfwnmsac_vf_f64m1_tumu(__VA_ARGS__)

#define	vfwnmsac_vf_f64m2(...) __riscv_vfwnmsac_vf_f64m2_tu(__VA_ARGS__)

#define	vfwnmsac_vf_f64m2_m(...) __riscv_vfwnmsac_vf_f64m2_tumu(__VA_ARGS__)

#define	vfwnmsac_vf_f64m4(...) __riscv_vfwnmsac_vf_f64m4_tu(__VA_ARGS__)

#define	vfwnmsac_vf_f64m4_m(...) __riscv_vfwnmsac_vf_f64m4_tumu(__VA_ARGS__)

#define	vfwnmsac_vf_f64m8(...) __riscv_vfwnmsac_vf_f64m8_tu(__VA_ARGS__)

#define	vfwnmsac_vf_f64m8_m(...) __riscv_vfwnmsac_vf_f64m8_tumu(__VA_ARGS__)

#define	vfwnmsac_vv_f32m1(...) __riscv_vfwnmsac_vv_f32m1_tu(__VA_ARGS__)

#define	vfwnmsac_vv_f32m1_m(...) __riscv_vfwnmsac_vv_f32m1_tumu(__VA_ARGS__)

#define	vfwnmsac_vv_f32m2(...) __riscv_vfwnmsac_vv_f32m2_tu(__VA_ARGS__)

#define	vfwnmsac_vv_f32m2_m(...) __riscv_vfwnmsac_vv_f32m2_tumu(__VA_ARGS__)

#define	vfwnmsac_vv_f32m4(...) __riscv_vfwnmsac_vv_f32m4_tu(__VA_ARGS__)

#define	vfwnmsac_vv_f32m4_m(...) __riscv_vfwnmsac_vv_f32m4_tumu(__VA_ARGS__)

#define	vfwnmsac_vv_f32m8(...) __riscv_vfwnmsac_vv_f32m8_tu(__VA_ARGS__)

#define	vfwnmsac_vv_f32m8_m(...) __riscv_vfwnmsac_vv_f32m8_tumu(__VA_ARGS__)

#define	vfwnmsac_vv_f32mf2(...) __riscv_vfwnmsac_vv_f32mf2_tu(__VA_ARGS__)

#define	vfwnmsac_vv_f32mf2_m(...) __riscv_vfwnmsac_vv_f32mf2_tumu(__VA_ARGS__)

#define	vfwnmsac_vv_f64m1(...) __riscv_vfwnmsac_vv_f64m1_tu(__VA_ARGS__)

#define	vfwnmsac_vv_f64m1_m(...) __riscv_vfwnmsac_vv_f64m1_tumu(__VA_ARGS__)

#define	vfwnmsac_vv_f64m2(...) __riscv_vfwnmsac_vv_f64m2_tu(__VA_ARGS__)

#define	vfwnmsac_vv_f64m2_m(...) __riscv_vfwnmsac_vv_f64m2_tumu(__VA_ARGS__)

#define	vfwnmsac_vv_f64m4(...) __riscv_vfwnmsac_vv_f64m4_tu(__VA_ARGS__)

#define	vfwnmsac_vv_f64m4_m(...) __riscv_vfwnmsac_vv_f64m4_tumu(__VA_ARGS__)

#define	vfwnmsac_vv_f64m8(...) __riscv_vfwnmsac_vv_f64m8_tu(__VA_ARGS__)

#define	vfwnmsac_vv_f64m8_m(...) __riscv_vfwnmsac_vv_f64m8_tumu(__VA_ARGS__)

#define	vfwredosum_vs_f16m1_f32m1(...) __riscv_vfwredosum_vs_f16m1_f32m1_tu(__VA_ARGS__)

#define	vfwredosum_vs_f16m1_f32m1_m(...) __riscv_vfwredosum_vs_f16m1_f32m1_tum(__VA_ARGS__)

#define	vfwredosum_vs_f16m2_f32m1(...) __riscv_vfwredosum_vs_f16m2_f32m1_tu(__VA_ARGS__)

#define	vfwredosum_vs_f16m2_f32m1_m(...) __riscv_vfwredosum_vs_f16m2_f32m1_tum(__VA_ARGS__)

#define	vfwredosum_vs_f16m4_f32m1(...) __riscv_vfwredosum_vs_f16m4_f32m1_tu(__VA_ARGS__)

#define	vfwredosum_vs_f16m4_f32m1_m(...) __riscv_vfwredosum_vs_f16m4_f32m1_tum(__VA_ARGS__)

#define	vfwredosum_vs_f16m8_f32m1(...) __riscv_vfwredosum_vs_f16m8_f32m1_tu(__VA_ARGS__)

#define	vfwredosum_vs_f16m8_f32m1_m(...) __riscv_vfwredosum_vs_f16m8_f32m1_tum(__VA_ARGS__)

#define	vfwredosum_vs_f16mf2_f32m1(...) __riscv_vfwredosum_vs_f16mf2_f32m1_tu(__VA_ARGS__)

#define	vfwredosum_vs_f16mf2_f32m1_m(...) __riscv_vfwredosum_vs_f16mf2_f32m1_tum(__VA_ARGS__)

#define	vfwredosum_vs_f16mf4_f32m1(...) __riscv_vfwredosum_vs_f16mf4_f32m1_tu(__VA_ARGS__)

#define	vfwredosum_vs_f16mf4_f32m1_m(...) __riscv_vfwredosum_vs_f16mf4_f32m1_tum(__VA_ARGS__)

#define	vfwredosum_vs_f32m1_f64m1(...) __riscv_vfwredosum_vs_f32m1_f64m1_tu(__VA_ARGS__)

#define	vfwredosum_vs_f32m1_f64m1_m(...) __riscv_vfwredosum_vs_f32m1_f64m1_tum(__VA_ARGS__)

#define	vfwredosum_vs_f32m2_f64m1(...) __riscv_vfwredosum_vs_f32m2_f64m1_tu(__VA_ARGS__)

#define	vfwredosum_vs_f32m2_f64m1_m(...) __riscv_vfwredosum_vs_f32m2_f64m1_tum(__VA_ARGS__)

#define	vfwredosum_vs_f32m4_f64m1(...) __riscv_vfwredosum_vs_f32m4_f64m1_tu(__VA_ARGS__)

#define	vfwredosum_vs_f32m4_f64m1_m(...) __riscv_vfwredosum_vs_f32m4_f64m1_tum(__VA_ARGS__)

#define	vfwredosum_vs_f32m8_f64m1(...) __riscv_vfwredosum_vs_f32m8_f64m1_tu(__VA_ARGS__)

#define	vfwredosum_vs_f32m8_f64m1_m(...) __riscv_vfwredosum_vs_f32m8_f64m1_tum(__VA_ARGS__)

#define	vfwredosum_vs_f32mf2_f64m1(...) __riscv_vfwredosum_vs_f32mf2_f64m1_tu(__VA_ARGS__)

#define	vfwredosum_vs_f32mf2_f64m1_m(...) __riscv_vfwredosum_vs_f32mf2_f64m1_tum(__VA_ARGS__)

#define	vfwredusum_vs_f16m1_f32m1(...) __riscv_vfwredusum_vs_f16m1_f32m1_tu(__VA_ARGS__)

#define	vfwredusum_vs_f16m1_f32m1_m(...) __riscv_vfwredusum_vs_f16m1_f32m1_tum(__VA_ARGS__)

#define	vfwredusum_vs_f16m2_f32m1(...) __riscv_vfwredusum_vs_f16m2_f32m1_tu(__VA_ARGS__)

#define	vfwredusum_vs_f16m2_f32m1_m(...) __riscv_vfwredusum_vs_f16m2_f32m1_tum(__VA_ARGS__)

#define	vfwredusum_vs_f16m4_f32m1(...) __riscv_vfwredusum_vs_f16m4_f32m1_tu(__VA_ARGS__)

#define	vfwredusum_vs_f16m4_f32m1_m(...) __riscv_vfwredusum_vs_f16m4_f32m1_tum(__VA_ARGS__)

#define	vfwredusum_vs_f16m8_f32m1(...) __riscv_vfwredusum_vs_f16m8_f32m1_tu(__VA_ARGS__)

#define	vfwredusum_vs_f16m8_f32m1_m(...) __riscv_vfwredusum_vs_f16m8_f32m1_tum(__VA_ARGS__)

#define	vfwredusum_vs_f16mf2_f32m1(...) __riscv_vfwredusum_vs_f16mf2_f32m1_tu(__VA_ARGS__)

#define	vfwredusum_vs_f16mf2_f32m1_m(...) __riscv_vfwredusum_vs_f16mf2_f32m1_tum(__VA_ARGS__)

#define	vfwredusum_vs_f16mf4_f32m1(...) __riscv_vfwredusum_vs_f16mf4_f32m1_tu(__VA_ARGS__)

#define	vfwredusum_vs_f16mf4_f32m1_m(...) __riscv_vfwredusum_vs_f16mf4_f32m1_tum(__VA_ARGS__)

#define	vfwredusum_vs_f32m1_f64m1(...) __riscv_vfwredusum_vs_f32m1_f64m1_tu(__VA_ARGS__)

#define	vfwredusum_vs_f32m1_f64m1_m(...) __riscv_vfwredusum_vs_f32m1_f64m1_tum(__VA_ARGS__)

#define	vfwredusum_vs_f32m2_f64m1(...) __riscv_vfwredusum_vs_f32m2_f64m1_tu(__VA_ARGS__)

#define	vfwredusum_vs_f32m2_f64m1_m(...) __riscv_vfwredusum_vs_f32m2_f64m1_tum(__VA_ARGS__)

#define	vfwredusum_vs_f32m4_f64m1(...) __riscv_vfwredusum_vs_f32m4_f64m1_tu(__VA_ARGS__)

#define	vfwredusum_vs_f32m4_f64m1_m(...) __riscv_vfwredusum_vs_f32m4_f64m1_tum(__VA_ARGS__)

#define	vfwredusum_vs_f32m8_f64m1(...) __riscv_vfwredusum_vs_f32m8_f64m1_tu(__VA_ARGS__)

#define	vfwredusum_vs_f32m8_f64m1_m(...) __riscv_vfwredusum_vs_f32m8_f64m1_tum(__VA_ARGS__)

#define	vfwredusum_vs_f32mf2_f64m1(...) __riscv_vfwredusum_vs_f32mf2_f64m1_tu(__VA_ARGS__)

#define	vfwredusum_vs_f32mf2_f64m1_m(...) __riscv_vfwredusum_vs_f32mf2_f64m1_tum(__VA_ARGS__)

#define	vfwsub_vf_f32m1(...) __riscv_vfwsub_vf_f32m1(__VA_ARGS__)

#define	vfwsub_vf_f32m1_m(...) __riscv_vfwsub_vf_f32m1_tumu(__VA_ARGS__)

#define	vfwsub_vf_f32m2(...) __riscv_vfwsub_vf_f32m2(__VA_ARGS__)

#define	vfwsub_vf_f32m2_m(...) __riscv_vfwsub_vf_f32m2_tumu(__VA_ARGS__)

#define	vfwsub_vf_f32m4(...) __riscv_vfwsub_vf_f32m4(__VA_ARGS__)

#define	vfwsub_vf_f32m4_m(...) __riscv_vfwsub_vf_f32m4_tumu(__VA_ARGS__)

#define	vfwsub_vf_f32m8(...) __riscv_vfwsub_vf_f32m8(__VA_ARGS__)

#define	vfwsub_vf_f32m8_m(...) __riscv_vfwsub_vf_f32m8_tumu(__VA_ARGS__)

#define	vfwsub_vf_f32mf2(...) __riscv_vfwsub_vf_f32mf2(__VA_ARGS__)

#define	vfwsub_vf_f32mf2_m(...) __riscv_vfwsub_vf_f32mf2_tumu(__VA_ARGS__)

#define	vfwsub_vf_f64m1(...) __riscv_vfwsub_vf_f64m1(__VA_ARGS__)

#define	vfwsub_vf_f64m1_m(...) __riscv_vfwsub_vf_f64m1_tumu(__VA_ARGS__)

#define	vfwsub_vf_f64m2(...) __riscv_vfwsub_vf_f64m2(__VA_ARGS__)

#define	vfwsub_vf_f64m2_m(...) __riscv_vfwsub_vf_f64m2_tumu(__VA_ARGS__)

#define	vfwsub_vf_f64m4(...) __riscv_vfwsub_vf_f64m4(__VA_ARGS__)

#define	vfwsub_vf_f64m4_m(...) __riscv_vfwsub_vf_f64m4_tumu(__VA_ARGS__)

#define	vfwsub_vf_f64m8(...) __riscv_vfwsub_vf_f64m8(__VA_ARGS__)

#define	vfwsub_vf_f64m8_m(...) __riscv_vfwsub_vf_f64m8_tumu(__VA_ARGS__)

#define	vfwsub_vv_f32m1(...) __riscv_vfwsub_vv_f32m1(__VA_ARGS__)

#define	vfwsub_vv_f32m1_m(...) __riscv_vfwsub_vv_f32m1_tumu(__VA_ARGS__)

#define	vfwsub_vv_f32m2(...) __riscv_vfwsub_vv_f32m2(__VA_ARGS__)

#define	vfwsub_vv_f32m2_m(...) __riscv_vfwsub_vv_f32m2_tumu(__VA_ARGS__)

#define	vfwsub_vv_f32m4(...) __riscv_vfwsub_vv_f32m4(__VA_ARGS__)

#define	vfwsub_vv_f32m4_m(...) __riscv_vfwsub_vv_f32m4_tumu(__VA_ARGS__)

#define	vfwsub_vv_f32m8(...) __riscv_vfwsub_vv_f32m8(__VA_ARGS__)

#define	vfwsub_vv_f32m8_m(...) __riscv_vfwsub_vv_f32m8_tumu(__VA_ARGS__)

#define	vfwsub_vv_f32mf2(...) __riscv_vfwsub_vv_f32mf2(__VA_ARGS__)

#define	vfwsub_vv_f32mf2_m(...) __riscv_vfwsub_vv_f32mf2_tumu(__VA_ARGS__)

#define	vfwsub_vv_f64m1(...) __riscv_vfwsub_vv_f64m1(__VA_ARGS__)

#define	vfwsub_vv_f64m1_m(...) __riscv_vfwsub_vv_f64m1_tumu(__VA_ARGS__)

#define	vfwsub_vv_f64m2(...) __riscv_vfwsub_vv_f64m2(__VA_ARGS__)

#define	vfwsub_vv_f64m2_m(...) __riscv_vfwsub_vv_f64m2_tumu(__VA_ARGS__)

#define	vfwsub_vv_f64m4(...) __riscv_vfwsub_vv_f64m4(__VA_ARGS__)

#define	vfwsub_vv_f64m4_m(...) __riscv_vfwsub_vv_f64m4_tumu(__VA_ARGS__)

#define	vfwsub_vv_f64m8(...) __riscv_vfwsub_vv_f64m8(__VA_ARGS__)

#define	vfwsub_vv_f64m8_m(...) __riscv_vfwsub_vv_f64m8_tumu(__VA_ARGS__)

#define	vfwsub_wf_f32m1(...) __riscv_vfwsub_wf_f32m1(__VA_ARGS__)

#define	vfwsub_wf_f32m1_m(...) __riscv_vfwsub_wf_f32m1_tumu(__VA_ARGS__)

#define	vfwsub_wf_f32m2(...) __riscv_vfwsub_wf_f32m2(__VA_ARGS__)

#define	vfwsub_wf_f32m2_m(...) __riscv_vfwsub_wf_f32m2_tumu(__VA_ARGS__)

#define	vfwsub_wf_f32m4(...) __riscv_vfwsub_wf_f32m4(__VA_ARGS__)

#define	vfwsub_wf_f32m4_m(...) __riscv_vfwsub_wf_f32m4_tumu(__VA_ARGS__)

#define	vfwsub_wf_f32m8(...) __riscv_vfwsub_wf_f32m8(__VA_ARGS__)

#define	vfwsub_wf_f32m8_m(...) __riscv_vfwsub_wf_f32m8_tumu(__VA_ARGS__)

#define	vfwsub_wf_f32mf2(...) __riscv_vfwsub_wf_f32mf2(__VA_ARGS__)

#define	vfwsub_wf_f32mf2_m(...) __riscv_vfwsub_wf_f32mf2_tumu(__VA_ARGS__)

#define	vfwsub_wf_f64m1(...) __riscv_vfwsub_wf_f64m1(__VA_ARGS__)

#define	vfwsub_wf_f64m1_m(...) __riscv_vfwsub_wf_f64m1_tumu(__VA_ARGS__)

#define	vfwsub_wf_f64m2(...) __riscv_vfwsub_wf_f64m2(__VA_ARGS__)

#define	vfwsub_wf_f64m2_m(...) __riscv_vfwsub_wf_f64m2_tumu(__VA_ARGS__)

#define	vfwsub_wf_f64m4(...) __riscv_vfwsub_wf_f64m4(__VA_ARGS__)

#define	vfwsub_wf_f64m4_m(...) __riscv_vfwsub_wf_f64m4_tumu(__VA_ARGS__)

#define	vfwsub_wf_f64m8(...) __riscv_vfwsub_wf_f64m8(__VA_ARGS__)

#define	vfwsub_wf_f64m8_m(...) __riscv_vfwsub_wf_f64m8_tumu(__VA_ARGS__)

#define	vfwsub_wv_f32m1(...) __riscv_vfwsub_wv_f32m1(__VA_ARGS__)

#define	vfwsub_wv_f32m1_m(...) __riscv_vfwsub_wv_f32m1_tumu(__VA_ARGS__)

#define	vfwsub_wv_f32m2(...) __riscv_vfwsub_wv_f32m2(__VA_ARGS__)

#define	vfwsub_wv_f32m2_m(...) __riscv_vfwsub_wv_f32m2_tumu(__VA_ARGS__)

#define	vfwsub_wv_f32m4(...) __riscv_vfwsub_wv_f32m4(__VA_ARGS__)

#define	vfwsub_wv_f32m4_m(...) __riscv_vfwsub_wv_f32m4_tumu(__VA_ARGS__)

#define	vfwsub_wv_f32m8(...) __riscv_vfwsub_wv_f32m8(__VA_ARGS__)

#define	vfwsub_wv_f32m8_m(...) __riscv_vfwsub_wv_f32m8_tumu(__VA_ARGS__)

#define	vfwsub_wv_f32mf2(...) __riscv_vfwsub_wv_f32mf2(__VA_ARGS__)

#define	vfwsub_wv_f32mf2_m(...) __riscv_vfwsub_wv_f32mf2_tumu(__VA_ARGS__)

#define	vfwsub_wv_f64m1(...) __riscv_vfwsub_wv_f64m1(__VA_ARGS__)

#define	vfwsub_wv_f64m1_m(...) __riscv_vfwsub_wv_f64m1_tumu(__VA_ARGS__)

#define	vfwsub_wv_f64m2(...) __riscv_vfwsub_wv_f64m2(__VA_ARGS__)

#define	vfwsub_wv_f64m2_m(...) __riscv_vfwsub_wv_f64m2_tumu(__VA_ARGS__)

#define	vfwsub_wv_f64m4(...) __riscv_vfwsub_wv_f64m4(__VA_ARGS__)

#define	vfwsub_wv_f64m4_m(...) __riscv_vfwsub_wv_f64m4_tumu(__VA_ARGS__)

#define	vfwsub_wv_f64m8(...) __riscv_vfwsub_wv_f64m8(__VA_ARGS__)

#define	vfwsub_wv_f64m8_m(...) __riscv_vfwsub_wv_f64m8_tumu(__VA_ARGS__)

#define	vget_v_f16m2_f16m1(...) __riscv_vget_v_f16m2_f16m1(__VA_ARGS__)

#define	vget_v_f16m4_f16m1(...) __riscv_vget_v_f16m4_f16m1(__VA_ARGS__)

#define	vget_v_f16m4_f16m2(...) __riscv_vget_v_f16m4_f16m2(__VA_ARGS__)

#define	vget_v_f16m8_f16m1(...) __riscv_vget_v_f16m8_f16m1(__VA_ARGS__)

#define	vget_v_f16m8_f16m2(...) __riscv_vget_v_f16m8_f16m2(__VA_ARGS__)

#define	vget_v_f16m8_f16m4(...) __riscv_vget_v_f16m8_f16m4(__VA_ARGS__)

#define	vget_v_f32m2_f32m1(...) __riscv_vget_v_f32m2_f32m1(__VA_ARGS__)

#define	vget_v_f32m4_f32m1(...) __riscv_vget_v_f32m4_f32m1(__VA_ARGS__)

#define	vget_v_f32m4_f32m2(...) __riscv_vget_v_f32m4_f32m2(__VA_ARGS__)

#define	vget_v_f32m8_f32m1(...) __riscv_vget_v_f32m8_f32m1(__VA_ARGS__)

#define	vget_v_f32m8_f32m2(...) __riscv_vget_v_f32m8_f32m2(__VA_ARGS__)

#define	vget_v_f32m8_f32m4(...) __riscv_vget_v_f32m8_f32m4(__VA_ARGS__)

#define	vget_v_f64m2_f64m1(...) __riscv_vget_v_f64m2_f64m1(__VA_ARGS__)

#define	vget_v_f64m4_f64m1(...) __riscv_vget_v_f64m4_f64m1(__VA_ARGS__)

#define	vget_v_f64m4_f64m2(...) __riscv_vget_v_f64m4_f64m2(__VA_ARGS__)

#define	vget_v_f64m8_f64m1(...) __riscv_vget_v_f64m8_f64m1(__VA_ARGS__)

#define	vget_v_f64m8_f64m2(...) __riscv_vget_v_f64m8_f64m2(__VA_ARGS__)

#define	vget_v_f64m8_f64m4(...) __riscv_vget_v_f64m8_f64m4(__VA_ARGS__)

#define	vget_v_i16m2_i16m1(...) __riscv_vget_v_i16m2_i16m1(__VA_ARGS__)

#define	vget_v_i16m4_i16m1(...) __riscv_vget_v_i16m4_i16m1(__VA_ARGS__)

#define	vget_v_i16m4_i16m2(...) __riscv_vget_v_i16m4_i16m2(__VA_ARGS__)

#define	vget_v_i16m8_i16m1(...) __riscv_vget_v_i16m8_i16m1(__VA_ARGS__)

#define	vget_v_i16m8_i16m2(...) __riscv_vget_v_i16m8_i16m2(__VA_ARGS__)

#define	vget_v_i16m8_i16m4(...) __riscv_vget_v_i16m8_i16m4(__VA_ARGS__)

#define	vget_v_i32m2_i32m1(...) __riscv_vget_v_i32m2_i32m1(__VA_ARGS__)

#define	vget_v_i32m4_i32m1(...) __riscv_vget_v_i32m4_i32m1(__VA_ARGS__)

#define	vget_v_i32m4_i32m2(...) __riscv_vget_v_i32m4_i32m2(__VA_ARGS__)

#define	vget_v_i32m8_i32m1(...) __riscv_vget_v_i32m8_i32m1(__VA_ARGS__)

#define	vget_v_i32m8_i32m2(...) __riscv_vget_v_i32m8_i32m2(__VA_ARGS__)

#define	vget_v_i32m8_i32m4(...) __riscv_vget_v_i32m8_i32m4(__VA_ARGS__)

#define	vget_v_i64m2_i64m1(...) __riscv_vget_v_i64m2_i64m1(__VA_ARGS__)

#define	vget_v_i64m4_i64m1(...) __riscv_vget_v_i64m4_i64m1(__VA_ARGS__)

#define	vget_v_i64m4_i64m2(...) __riscv_vget_v_i64m4_i64m2(__VA_ARGS__)

#define	vget_v_i64m8_i64m1(...) __riscv_vget_v_i64m8_i64m1(__VA_ARGS__)

#define	vget_v_i64m8_i64m2(...) __riscv_vget_v_i64m8_i64m2(__VA_ARGS__)

#define	vget_v_i64m8_i64m4(...) __riscv_vget_v_i64m8_i64m4(__VA_ARGS__)

#define	vget_v_i8m2_i8m1(...) __riscv_vget_v_i8m2_i8m1(__VA_ARGS__)

#define	vget_v_i8m4_i8m1(...) __riscv_vget_v_i8m4_i8m1(__VA_ARGS__)

#define	vget_v_i8m4_i8m2(...) __riscv_vget_v_i8m4_i8m2(__VA_ARGS__)

#define	vget_v_i8m8_i8m1(...) __riscv_vget_v_i8m8_i8m1(__VA_ARGS__)

#define	vget_v_i8m8_i8m2(...) __riscv_vget_v_i8m8_i8m2(__VA_ARGS__)

#define	vget_v_i8m8_i8m4(...) __riscv_vget_v_i8m8_i8m4(__VA_ARGS__)

#define	vget_v_u16m2_u16m1(...) __riscv_vget_v_u16m2_u16m1(__VA_ARGS__)

#define	vget_v_u16m4_u16m1(...) __riscv_vget_v_u16m4_u16m1(__VA_ARGS__)

#define	vget_v_u16m4_u16m2(...) __riscv_vget_v_u16m4_u16m2(__VA_ARGS__)

#define	vget_v_u16m8_u16m1(...) __riscv_vget_v_u16m8_u16m1(__VA_ARGS__)

#define	vget_v_u16m8_u16m2(...) __riscv_vget_v_u16m8_u16m2(__VA_ARGS__)

#define	vget_v_u16m8_u16m4(...) __riscv_vget_v_u16m8_u16m4(__VA_ARGS__)

#define	vget_v_u32m2_u32m1(...) __riscv_vget_v_u32m2_u32m1(__VA_ARGS__)

#define	vget_v_u32m4_u32m1(...) __riscv_vget_v_u32m4_u32m1(__VA_ARGS__)

#define	vget_v_u32m4_u32m2(...) __riscv_vget_v_u32m4_u32m2(__VA_ARGS__)

#define	vget_v_u32m8_u32m1(...) __riscv_vget_v_u32m8_u32m1(__VA_ARGS__)

#define	vget_v_u32m8_u32m2(...) __riscv_vget_v_u32m8_u32m2(__VA_ARGS__)

#define	vget_v_u32m8_u32m4(...) __riscv_vget_v_u32m8_u32m4(__VA_ARGS__)

#define	vget_v_u64m2_u64m1(...) __riscv_vget_v_u64m2_u64m1(__VA_ARGS__)

#define	vget_v_u64m4_u64m1(...) __riscv_vget_v_u64m4_u64m1(__VA_ARGS__)

#define	vget_v_u64m4_u64m2(...) __riscv_vget_v_u64m4_u64m2(__VA_ARGS__)

#define	vget_v_u64m8_u64m1(...) __riscv_vget_v_u64m8_u64m1(__VA_ARGS__)

#define	vget_v_u64m8_u64m2(...) __riscv_vget_v_u64m8_u64m2(__VA_ARGS__)

#define	vget_v_u64m8_u64m4(...) __riscv_vget_v_u64m8_u64m4(__VA_ARGS__)

#define	vget_v_u8m2_u8m1(...) __riscv_vget_v_u8m2_u8m1(__VA_ARGS__)

#define	vget_v_u8m4_u8m1(...) __riscv_vget_v_u8m4_u8m1(__VA_ARGS__)

#define	vget_v_u8m4_u8m2(...) __riscv_vget_v_u8m4_u8m2(__VA_ARGS__)

#define	vget_v_u8m8_u8m1(...) __riscv_vget_v_u8m8_u8m1(__VA_ARGS__)

#define	vget_v_u8m8_u8m2(...) __riscv_vget_v_u8m8_u8m2(__VA_ARGS__)

#define	vget_v_u8m8_u8m4(...) __riscv_vget_v_u8m8_u8m4(__VA_ARGS__)

#define	vid_v_u16m1(...) __riscv_vid_v_u16m1(__VA_ARGS__)

#define	vid_v_u16m1_m(...) __riscv_vid_v_u16m1_tumu(__VA_ARGS__)

#define	vid_v_u16m2(...) __riscv_vid_v_u16m2(__VA_ARGS__)

#define	vid_v_u16m2_m(...) __riscv_vid_v_u16m2_tumu(__VA_ARGS__)

#define	vid_v_u16m4(...) __riscv_vid_v_u16m4(__VA_ARGS__)

#define	vid_v_u16m4_m(...) __riscv_vid_v_u16m4_tumu(__VA_ARGS__)

#define	vid_v_u16m8(...) __riscv_vid_v_u16m8(__VA_ARGS__)

#define	vid_v_u16m8_m(...) __riscv_vid_v_u16m8_tumu(__VA_ARGS__)

#define	vid_v_u16mf2(...) __riscv_vid_v_u16mf2(__VA_ARGS__)

#define	vid_v_u16mf2_m(...) __riscv_vid_v_u16mf2_tumu(__VA_ARGS__)

#define	vid_v_u16mf4(...) __riscv_vid_v_u16mf4(__VA_ARGS__)

#define	vid_v_u16mf4_m(...) __riscv_vid_v_u16mf4_tumu(__VA_ARGS__)

#define	vid_v_u32m1(...) __riscv_vid_v_u32m1(__VA_ARGS__)

#define	vid_v_u32m1_m(...) __riscv_vid_v_u32m1_tumu(__VA_ARGS__)

#define	vid_v_u32m2(...) __riscv_vid_v_u32m2(__VA_ARGS__)

#define	vid_v_u32m2_m(...) __riscv_vid_v_u32m2_tumu(__VA_ARGS__)

#define	vid_v_u32m4(...) __riscv_vid_v_u32m4(__VA_ARGS__)

#define	vid_v_u32m4_m(...) __riscv_vid_v_u32m4_tumu(__VA_ARGS__)

#define	vid_v_u32m8(...) __riscv_vid_v_u32m8(__VA_ARGS__)

#define	vid_v_u32m8_m(...) __riscv_vid_v_u32m8_tumu(__VA_ARGS__)

#define	vid_v_u32mf2(...) __riscv_vid_v_u32mf2(__VA_ARGS__)

#define	vid_v_u32mf2_m(...) __riscv_vid_v_u32mf2_tumu(__VA_ARGS__)

#define	vid_v_u64m1(...) __riscv_vid_v_u64m1(__VA_ARGS__)

#define	vid_v_u64m1_m(...) __riscv_vid_v_u64m1_tumu(__VA_ARGS__)

#define	vid_v_u64m2(...) __riscv_vid_v_u64m2(__VA_ARGS__)

#define	vid_v_u64m2_m(...) __riscv_vid_v_u64m2_tumu(__VA_ARGS__)

#define	vid_v_u64m4(...) __riscv_vid_v_u64m4(__VA_ARGS__)

#define	vid_v_u64m4_m(...) __riscv_vid_v_u64m4_tumu(__VA_ARGS__)

#define	vid_v_u64m8(...) __riscv_vid_v_u64m8(__VA_ARGS__)

#define	vid_v_u64m8_m(...) __riscv_vid_v_u64m8_tumu(__VA_ARGS__)

#define	vid_v_u8m1(...) __riscv_vid_v_u8m1(__VA_ARGS__)

#define	vid_v_u8m1_m(...) __riscv_vid_v_u8m1_tumu(__VA_ARGS__)

#define	vid_v_u8m2(...) __riscv_vid_v_u8m2(__VA_ARGS__)

#define	vid_v_u8m2_m(...) __riscv_vid_v_u8m2_tumu(__VA_ARGS__)

#define	vid_v_u8m4(...) __riscv_vid_v_u8m4(__VA_ARGS__)

#define	vid_v_u8m4_m(...) __riscv_vid_v_u8m4_tumu(__VA_ARGS__)

#define	vid_v_u8m8(...) __riscv_vid_v_u8m8(__VA_ARGS__)

#define	vid_v_u8m8_m(...) __riscv_vid_v_u8m8_tumu(__VA_ARGS__)

#define	vid_v_u8mf2(...) __riscv_vid_v_u8mf2(__VA_ARGS__)

#define	vid_v_u8mf2_m(...) __riscv_vid_v_u8mf2_tumu(__VA_ARGS__)

#define	vid_v_u8mf4(...) __riscv_vid_v_u8mf4(__VA_ARGS__)

#define	vid_v_u8mf4_m(...) __riscv_vid_v_u8mf4_tumu(__VA_ARGS__)

#define	vid_v_u8mf8(...) __riscv_vid_v_u8mf8(__VA_ARGS__)

#define	vid_v_u8mf8_m(...) __riscv_vid_v_u8mf8_tumu(__VA_ARGS__)

#define	viota_m_u16m1(...) __riscv_viota_m_u16m1(__VA_ARGS__)

#define	viota_m_u16m1_m(...) __riscv_viota_m_u16m1_tumu(__VA_ARGS__)

#define	viota_m_u16m2(...) __riscv_viota_m_u16m2(__VA_ARGS__)

#define	viota_m_u16m2_m(...) __riscv_viota_m_u16m2_tumu(__VA_ARGS__)

#define	viota_m_u16m4(...) __riscv_viota_m_u16m4(__VA_ARGS__)

#define	viota_m_u16m4_m(...) __riscv_viota_m_u16m4_tumu(__VA_ARGS__)

#define	viota_m_u16m8(...) __riscv_viota_m_u16m8(__VA_ARGS__)

#define	viota_m_u16m8_m(...) __riscv_viota_m_u16m8_tumu(__VA_ARGS__)

#define	viota_m_u16mf2(...) __riscv_viota_m_u16mf2(__VA_ARGS__)

#define	viota_m_u16mf2_m(...) __riscv_viota_m_u16mf2_tumu(__VA_ARGS__)

#define	viota_m_u16mf4(...) __riscv_viota_m_u16mf4(__VA_ARGS__)

#define	viota_m_u16mf4_m(...) __riscv_viota_m_u16mf4_tumu(__VA_ARGS__)

#define	viota_m_u32m1(...) __riscv_viota_m_u32m1(__VA_ARGS__)

#define	viota_m_u32m1_m(...) __riscv_viota_m_u32m1_tumu(__VA_ARGS__)

#define	viota_m_u32m2(...) __riscv_viota_m_u32m2(__VA_ARGS__)

#define	viota_m_u32m2_m(...) __riscv_viota_m_u32m2_tumu(__VA_ARGS__)

#define	viota_m_u32m4(...) __riscv_viota_m_u32m4(__VA_ARGS__)

#define	viota_m_u32m4_m(...) __riscv_viota_m_u32m4_tumu(__VA_ARGS__)

#define	viota_m_u32m8(...) __riscv_viota_m_u32m8(__VA_ARGS__)

#define	viota_m_u32m8_m(...) __riscv_viota_m_u32m8_tumu(__VA_ARGS__)

#define	viota_m_u32mf2(...) __riscv_viota_m_u32mf2(__VA_ARGS__)

#define	viota_m_u32mf2_m(...) __riscv_viota_m_u32mf2_tumu(__VA_ARGS__)

#define	viota_m_u64m1(...) __riscv_viota_m_u64m1(__VA_ARGS__)

#define	viota_m_u64m1_m(...) __riscv_viota_m_u64m1_tumu(__VA_ARGS__)

#define	viota_m_u64m2(...) __riscv_viota_m_u64m2(__VA_ARGS__)

#define	viota_m_u64m2_m(...) __riscv_viota_m_u64m2_tumu(__VA_ARGS__)

#define	viota_m_u64m4(...) __riscv_viota_m_u64m4(__VA_ARGS__)

#define	viota_m_u64m4_m(...) __riscv_viota_m_u64m4_tumu(__VA_ARGS__)

#define	viota_m_u64m8(...) __riscv_viota_m_u64m8(__VA_ARGS__)

#define	viota_m_u64m8_m(...) __riscv_viota_m_u64m8_tumu(__VA_ARGS__)

#define	viota_m_u8m1(...) __riscv_viota_m_u8m1(__VA_ARGS__)

#define	viota_m_u8m1_m(...) __riscv_viota_m_u8m1_tumu(__VA_ARGS__)

#define	viota_m_u8m2(...) __riscv_viota_m_u8m2(__VA_ARGS__)

#define	viota_m_u8m2_m(...) __riscv_viota_m_u8m2_tumu(__VA_ARGS__)

#define	viota_m_u8m4(...) __riscv_viota_m_u8m4(__VA_ARGS__)

#define	viota_m_u8m4_m(...) __riscv_viota_m_u8m4_tumu(__VA_ARGS__)

#define	viota_m_u8m8(...) __riscv_viota_m_u8m8(__VA_ARGS__)

#define	viota_m_u8m8_m(...) __riscv_viota_m_u8m8_tumu(__VA_ARGS__)

#define	viota_m_u8mf2(...) __riscv_viota_m_u8mf2(__VA_ARGS__)

#define	viota_m_u8mf2_m(...) __riscv_viota_m_u8mf2_tumu(__VA_ARGS__)

#define	viota_m_u8mf4(...) __riscv_viota_m_u8mf4(__VA_ARGS__)

#define	viota_m_u8mf4_m(...) __riscv_viota_m_u8mf4_tumu(__VA_ARGS__)

#define	viota_m_u8mf8(...) __riscv_viota_m_u8mf8(__VA_ARGS__)

#define	viota_m_u8mf8_m(...) __riscv_viota_m_u8mf8_tumu(__VA_ARGS__)

#define	vle16_v_f16m1(...) __riscv_vle16_v_f16m1(__VA_ARGS__)

#define	vle16_v_f16m1_m(...) __riscv_vle16_v_f16m1_tumu(__VA_ARGS__)

#define	vle16_v_f16m2(...) __riscv_vle16_v_f16m2(__VA_ARGS__)

#define	vle16_v_f16m2_m(...) __riscv_vle16_v_f16m2_tumu(__VA_ARGS__)

#define	vle16_v_f16m4(...) __riscv_vle16_v_f16m4(__VA_ARGS__)

#define	vle16_v_f16m4_m(...) __riscv_vle16_v_f16m4_tumu(__VA_ARGS__)

#define	vle16_v_f16m8(...) __riscv_vle16_v_f16m8(__VA_ARGS__)

#define	vle16_v_f16m8_m(...) __riscv_vle16_v_f16m8_tumu(__VA_ARGS__)

#define	vle16_v_f16mf2(...) __riscv_vle16_v_f16mf2(__VA_ARGS__)

#define	vle16_v_f16mf2_m(...) __riscv_vle16_v_f16mf2_tumu(__VA_ARGS__)

#define	vle16_v_f16mf4(...) __riscv_vle16_v_f16mf4(__VA_ARGS__)

#define	vle16_v_f16mf4_m(...) __riscv_vle16_v_f16mf4_tumu(__VA_ARGS__)

#define	vle16_v_i16m1(...) __riscv_vle16_v_i16m1(__VA_ARGS__)

#define	vle16_v_i16m1_m(...) __riscv_vle16_v_i16m1_tumu(__VA_ARGS__)

#define	vle16_v_i16m2(...) __riscv_vle16_v_i16m2(__VA_ARGS__)

#define	vle16_v_i16m2_m(...) __riscv_vle16_v_i16m2_tumu(__VA_ARGS__)

#define	vle16_v_i16m4(...) __riscv_vle16_v_i16m4(__VA_ARGS__)

#define	vle16_v_i16m4_m(...) __riscv_vle16_v_i16m4_tumu(__VA_ARGS__)

#define	vle16_v_i16m8(...) __riscv_vle16_v_i16m8(__VA_ARGS__)

#define	vle16_v_i16m8_m(...) __riscv_vle16_v_i16m8_tumu(__VA_ARGS__)

#define	vle16_v_i16mf2(...) __riscv_vle16_v_i16mf2(__VA_ARGS__)

#define	vle16_v_i16mf2_m(...) __riscv_vle16_v_i16mf2_tumu(__VA_ARGS__)

#define	vle16_v_i16mf4(...) __riscv_vle16_v_i16mf4(__VA_ARGS__)

#define	vle16_v_i16mf4_m(...) __riscv_vle16_v_i16mf4_tumu(__VA_ARGS__)

#define	vle16_v_u16m1(...) __riscv_vle16_v_u16m1(__VA_ARGS__)

#define	vle16_v_u16m1_m(...) __riscv_vle16_v_u16m1_tumu(__VA_ARGS__)

#define	vle16_v_u16m2(...) __riscv_vle16_v_u16m2(__VA_ARGS__)

#define	vle16_v_u16m2_m(...) __riscv_vle16_v_u16m2_tumu(__VA_ARGS__)

#define	vle16_v_u16m4(...) __riscv_vle16_v_u16m4(__VA_ARGS__)

#define	vle16_v_u16m4_m(...) __riscv_vle16_v_u16m4_tumu(__VA_ARGS__)

#define	vle16_v_u16m8(...) __riscv_vle16_v_u16m8(__VA_ARGS__)

#define	vle16_v_u16m8_m(...) __riscv_vle16_v_u16m8_tumu(__VA_ARGS__)

#define	vle16_v_u16mf2(...) __riscv_vle16_v_u16mf2(__VA_ARGS__)

#define	vle16_v_u16mf2_m(...) __riscv_vle16_v_u16mf2_tumu(__VA_ARGS__)

#define	vle16_v_u16mf4(...) __riscv_vle16_v_u16mf4(__VA_ARGS__)

#define	vle16_v_u16mf4_m(...) __riscv_vle16_v_u16mf4_tumu(__VA_ARGS__)

#define	vle16ff_v_f16m1(...) __riscv_vle16ff_v_f16m1(__VA_ARGS__)

#define	vle16ff_v_f16m1_m(...) __riscv_vle16ff_v_f16m1_tumu(__VA_ARGS__)

#define	vle16ff_v_f16m2(...) __riscv_vle16ff_v_f16m2(__VA_ARGS__)

#define	vle16ff_v_f16m2_m(...) __riscv_vle16ff_v_f16m2_tumu(__VA_ARGS__)

#define	vle16ff_v_f16m4(...) __riscv_vle16ff_v_f16m4(__VA_ARGS__)

#define	vle16ff_v_f16m4_m(...) __riscv_vle16ff_v_f16m4_tumu(__VA_ARGS__)

#define	vle16ff_v_f16m8(...) __riscv_vle16ff_v_f16m8(__VA_ARGS__)

#define	vle16ff_v_f16m8_m(...) __riscv_vle16ff_v_f16m8_tumu(__VA_ARGS__)

#define	vle16ff_v_f16mf2(...) __riscv_vle16ff_v_f16mf2(__VA_ARGS__)

#define	vle16ff_v_f16mf2_m(...) __riscv_vle16ff_v_f16mf2_tumu(__VA_ARGS__)

#define	vle16ff_v_f16mf4(...) __riscv_vle16ff_v_f16mf4(__VA_ARGS__)

#define	vle16ff_v_f16mf4_m(...) __riscv_vle16ff_v_f16mf4_tumu(__VA_ARGS__)

#define	vle16ff_v_i16m1(...) __riscv_vle16ff_v_i16m1(__VA_ARGS__)

#define	vle16ff_v_i16m1_m(...) __riscv_vle16ff_v_i16m1_tumu(__VA_ARGS__)

#define	vle16ff_v_i16m2(...) __riscv_vle16ff_v_i16m2(__VA_ARGS__)

#define	vle16ff_v_i16m2_m(...) __riscv_vle16ff_v_i16m2_tumu(__VA_ARGS__)

#define	vle16ff_v_i16m4(...) __riscv_vle16ff_v_i16m4(__VA_ARGS__)

#define	vle16ff_v_i16m4_m(...) __riscv_vle16ff_v_i16m4_tumu(__VA_ARGS__)

#define	vle16ff_v_i16m8(...) __riscv_vle16ff_v_i16m8(__VA_ARGS__)

#define	vle16ff_v_i16m8_m(...) __riscv_vle16ff_v_i16m8_tumu(__VA_ARGS__)

#define	vle16ff_v_i16mf2(...) __riscv_vle16ff_v_i16mf2(__VA_ARGS__)

#define	vle16ff_v_i16mf2_m(...) __riscv_vle16ff_v_i16mf2_tumu(__VA_ARGS__)

#define	vle16ff_v_i16mf4(...) __riscv_vle16ff_v_i16mf4(__VA_ARGS__)

#define	vle16ff_v_i16mf4_m(...) __riscv_vle16ff_v_i16mf4_tumu(__VA_ARGS__)

#define	vle16ff_v_u16m1(...) __riscv_vle16ff_v_u16m1(__VA_ARGS__)

#define	vle16ff_v_u16m1_m(...) __riscv_vle16ff_v_u16m1_tumu(__VA_ARGS__)

#define	vle16ff_v_u16m2(...) __riscv_vle16ff_v_u16m2(__VA_ARGS__)

#define	vle16ff_v_u16m2_m(...) __riscv_vle16ff_v_u16m2_tumu(__VA_ARGS__)

#define	vle16ff_v_u16m4(...) __riscv_vle16ff_v_u16m4(__VA_ARGS__)

#define	vle16ff_v_u16m4_m(...) __riscv_vle16ff_v_u16m4_tumu(__VA_ARGS__)

#define	vle16ff_v_u16m8(...) __riscv_vle16ff_v_u16m8(__VA_ARGS__)

#define	vle16ff_v_u16m8_m(...) __riscv_vle16ff_v_u16m8_tumu(__VA_ARGS__)

#define	vle16ff_v_u16mf2(...) __riscv_vle16ff_v_u16mf2(__VA_ARGS__)

#define	vle16ff_v_u16mf2_m(...) __riscv_vle16ff_v_u16mf2_tumu(__VA_ARGS__)

#define	vle16ff_v_u16mf4(...) __riscv_vle16ff_v_u16mf4(__VA_ARGS__)

#define	vle16ff_v_u16mf4_m(...) __riscv_vle16ff_v_u16mf4_tumu(__VA_ARGS__)

#define	vle32_v_f32m1(...) __riscv_vle32_v_f32m1(__VA_ARGS__)

#define	vle32_v_f32m1_m(...) __riscv_vle32_v_f32m1_tumu(__VA_ARGS__)

#define	vle32_v_f32m2(...) __riscv_vle32_v_f32m2(__VA_ARGS__)

#define	vle32_v_f32m2_m(...) __riscv_vle32_v_f32m2_tumu(__VA_ARGS__)

#define	vle32_v_f32m4(...) __riscv_vle32_v_f32m4(__VA_ARGS__)

#define	vle32_v_f32m4_m(...) __riscv_vle32_v_f32m4_tumu(__VA_ARGS__)

#define	vle32_v_f32m8(...) __riscv_vle32_v_f32m8(__VA_ARGS__)

#define	vle32_v_f32m8_m(...) __riscv_vle32_v_f32m8_tumu(__VA_ARGS__)

#define	vle32_v_f32mf2(...) __riscv_vle32_v_f32mf2(__VA_ARGS__)

#define	vle32_v_f32mf2_m(...) __riscv_vle32_v_f32mf2_tumu(__VA_ARGS__)

#define	vle32_v_i32m1(...) __riscv_vle32_v_i32m1(__VA_ARGS__)

#define	vle32_v_i32m1_m(...) __riscv_vle32_v_i32m1_tumu(__VA_ARGS__)

#define	vle32_v_i32m2(...) __riscv_vle32_v_i32m2(__VA_ARGS__)

#define	vle32_v_i32m2_m(...) __riscv_vle32_v_i32m2_tumu(__VA_ARGS__)

#define	vle32_v_i32m4(...) __riscv_vle32_v_i32m4(__VA_ARGS__)

#define	vle32_v_i32m4_m(...) __riscv_vle32_v_i32m4_tumu(__VA_ARGS__)

#define	vle32_v_i32m8(...) __riscv_vle32_v_i32m8(__VA_ARGS__)

#define	vle32_v_i32m8_m(...) __riscv_vle32_v_i32m8_tumu(__VA_ARGS__)

#define	vle32_v_i32mf2(...) __riscv_vle32_v_i32mf2(__VA_ARGS__)

#define	vle32_v_i32mf2_m(...) __riscv_vle32_v_i32mf2_tumu(__VA_ARGS__)

#define	vle32_v_u32m1(...) __riscv_vle32_v_u32m1(__VA_ARGS__)

#define	vle32_v_u32m1_m(...) __riscv_vle32_v_u32m1_tumu(__VA_ARGS__)

#define	vle32_v_u32m2(...) __riscv_vle32_v_u32m2(__VA_ARGS__)

#define	vle32_v_u32m2_m(...) __riscv_vle32_v_u32m2_tumu(__VA_ARGS__)

#define	vle32_v_u32m4(...) __riscv_vle32_v_u32m4(__VA_ARGS__)

#define	vle32_v_u32m4_m(...) __riscv_vle32_v_u32m4_tumu(__VA_ARGS__)

#define	vle32_v_u32m8(...) __riscv_vle32_v_u32m8(__VA_ARGS__)

#define	vle32_v_u32m8_m(...) __riscv_vle32_v_u32m8_tumu(__VA_ARGS__)

#define	vle32_v_u32mf2(...) __riscv_vle32_v_u32mf2(__VA_ARGS__)

#define	vle32_v_u32mf2_m(...) __riscv_vle32_v_u32mf2_tumu(__VA_ARGS__)

#define	vle32ff_v_f32m1(...) __riscv_vle32ff_v_f32m1(__VA_ARGS__)

#define	vle32ff_v_f32m1_m(...) __riscv_vle32ff_v_f32m1_tumu(__VA_ARGS__)

#define	vle32ff_v_f32m2(...) __riscv_vle32ff_v_f32m2(__VA_ARGS__)

#define	vle32ff_v_f32m2_m(...) __riscv_vle32ff_v_f32m2_tumu(__VA_ARGS__)

#define	vle32ff_v_f32m4(...) __riscv_vle32ff_v_f32m4(__VA_ARGS__)

#define	vle32ff_v_f32m4_m(...) __riscv_vle32ff_v_f32m4_tumu(__VA_ARGS__)

#define	vle32ff_v_f32m8(...) __riscv_vle32ff_v_f32m8(__VA_ARGS__)

#define	vle32ff_v_f32m8_m(...) __riscv_vle32ff_v_f32m8_tumu(__VA_ARGS__)

#define	vle32ff_v_f32mf2(...) __riscv_vle32ff_v_f32mf2(__VA_ARGS__)

#define	vle32ff_v_f32mf2_m(...) __riscv_vle32ff_v_f32mf2_tumu(__VA_ARGS__)

#define	vle32ff_v_i32m1(...) __riscv_vle32ff_v_i32m1(__VA_ARGS__)

#define	vle32ff_v_i32m1_m(...) __riscv_vle32ff_v_i32m1_tumu(__VA_ARGS__)

#define	vle32ff_v_i32m2(...) __riscv_vle32ff_v_i32m2(__VA_ARGS__)

#define	vle32ff_v_i32m2_m(...) __riscv_vle32ff_v_i32m2_tumu(__VA_ARGS__)

#define	vle32ff_v_i32m4(...) __riscv_vle32ff_v_i32m4(__VA_ARGS__)

#define	vle32ff_v_i32m4_m(...) __riscv_vle32ff_v_i32m4_tumu(__VA_ARGS__)

#define	vle32ff_v_i32m8(...) __riscv_vle32ff_v_i32m8(__VA_ARGS__)

#define	vle32ff_v_i32m8_m(...) __riscv_vle32ff_v_i32m8_tumu(__VA_ARGS__)

#define	vle32ff_v_i32mf2(...) __riscv_vle32ff_v_i32mf2(__VA_ARGS__)

#define	vle32ff_v_i32mf2_m(...) __riscv_vle32ff_v_i32mf2_tumu(__VA_ARGS__)

#define	vle32ff_v_u32m1(...) __riscv_vle32ff_v_u32m1(__VA_ARGS__)

#define	vle32ff_v_u32m1_m(...) __riscv_vle32ff_v_u32m1_tumu(__VA_ARGS__)

#define	vle32ff_v_u32m2(...) __riscv_vle32ff_v_u32m2(__VA_ARGS__)

#define	vle32ff_v_u32m2_m(...) __riscv_vle32ff_v_u32m2_tumu(__VA_ARGS__)

#define	vle32ff_v_u32m4(...) __riscv_vle32ff_v_u32m4(__VA_ARGS__)

#define	vle32ff_v_u32m4_m(...) __riscv_vle32ff_v_u32m4_tumu(__VA_ARGS__)

#define	vle32ff_v_u32m8(...) __riscv_vle32ff_v_u32m8(__VA_ARGS__)

#define	vle32ff_v_u32m8_m(...) __riscv_vle32ff_v_u32m8_tumu(__VA_ARGS__)

#define	vle32ff_v_u32mf2(...) __riscv_vle32ff_v_u32mf2(__VA_ARGS__)

#define	vle32ff_v_u32mf2_m(...) __riscv_vle32ff_v_u32mf2_tumu(__VA_ARGS__)

#define	vle64_v_f64m1(...) __riscv_vle64_v_f64m1(__VA_ARGS__)

#define	vle64_v_f64m1_m(...) __riscv_vle64_v_f64m1_tumu(__VA_ARGS__)

#define	vle64_v_f64m2(...) __riscv_vle64_v_f64m2(__VA_ARGS__)

#define	vle64_v_f64m2_m(...) __riscv_vle64_v_f64m2_tumu(__VA_ARGS__)

#define	vle64_v_f64m4(...) __riscv_vle64_v_f64m4(__VA_ARGS__)

#define	vle64_v_f64m4_m(...) __riscv_vle64_v_f64m4_tumu(__VA_ARGS__)

#define	vle64_v_f64m8(...) __riscv_vle64_v_f64m8(__VA_ARGS__)

#define	vle64_v_f64m8_m(...) __riscv_vle64_v_f64m8_tumu(__VA_ARGS__)

#define	vle64_v_i64m1(...) __riscv_vle64_v_i64m1(__VA_ARGS__)

#define	vle64_v_i64m1_m(...) __riscv_vle64_v_i64m1_tumu(__VA_ARGS__)

#define	vle64_v_i64m2(...) __riscv_vle64_v_i64m2(__VA_ARGS__)

#define	vle64_v_i64m2_m(...) __riscv_vle64_v_i64m2_tumu(__VA_ARGS__)

#define	vle64_v_i64m4(...) __riscv_vle64_v_i64m4(__VA_ARGS__)

#define	vle64_v_i64m4_m(...) __riscv_vle64_v_i64m4_tumu(__VA_ARGS__)

#define	vle64_v_i64m8(...) __riscv_vle64_v_i64m8(__VA_ARGS__)

#define	vle64_v_i64m8_m(...) __riscv_vle64_v_i64m8_tumu(__VA_ARGS__)

#define	vle64_v_u64m1(...) __riscv_vle64_v_u64m1(__VA_ARGS__)

#define	vle64_v_u64m1_m(...) __riscv_vle64_v_u64m1_tumu(__VA_ARGS__)

#define	vle64_v_u64m2(...) __riscv_vle64_v_u64m2(__VA_ARGS__)

#define	vle64_v_u64m2_m(...) __riscv_vle64_v_u64m2_tumu(__VA_ARGS__)

#define	vle64_v_u64m4(...) __riscv_vle64_v_u64m4(__VA_ARGS__)

#define	vle64_v_u64m4_m(...) __riscv_vle64_v_u64m4_tumu(__VA_ARGS__)

#define	vle64_v_u64m8(...) __riscv_vle64_v_u64m8(__VA_ARGS__)

#define	vle64_v_u64m8_m(...) __riscv_vle64_v_u64m8_tumu(__VA_ARGS__)

#define	vle64ff_v_f64m1(...) __riscv_vle64ff_v_f64m1(__VA_ARGS__)

#define	vle64ff_v_f64m1_m(...) __riscv_vle64ff_v_f64m1_tumu(__VA_ARGS__)

#define	vle64ff_v_f64m2(...) __riscv_vle64ff_v_f64m2(__VA_ARGS__)

#define	vle64ff_v_f64m2_m(...) __riscv_vle64ff_v_f64m2_tumu(__VA_ARGS__)

#define	vle64ff_v_f64m4(...) __riscv_vle64ff_v_f64m4(__VA_ARGS__)

#define	vle64ff_v_f64m4_m(...) __riscv_vle64ff_v_f64m4_tumu(__VA_ARGS__)

#define	vle64ff_v_f64m8(...) __riscv_vle64ff_v_f64m8(__VA_ARGS__)

#define	vle64ff_v_f64m8_m(...) __riscv_vle64ff_v_f64m8_tumu(__VA_ARGS__)

#define	vle64ff_v_i64m1(...) __riscv_vle64ff_v_i64m1(__VA_ARGS__)

#define	vle64ff_v_i64m1_m(...) __riscv_vle64ff_v_i64m1_tumu(__VA_ARGS__)

#define	vle64ff_v_i64m2(...) __riscv_vle64ff_v_i64m2(__VA_ARGS__)

#define	vle64ff_v_i64m2_m(...) __riscv_vle64ff_v_i64m2_tumu(__VA_ARGS__)

#define	vle64ff_v_i64m4(...) __riscv_vle64ff_v_i64m4(__VA_ARGS__)

#define	vle64ff_v_i64m4_m(...) __riscv_vle64ff_v_i64m4_tumu(__VA_ARGS__)

#define	vle64ff_v_i64m8(...) __riscv_vle64ff_v_i64m8(__VA_ARGS__)

#define	vle64ff_v_i64m8_m(...) __riscv_vle64ff_v_i64m8_tumu(__VA_ARGS__)

#define	vle64ff_v_u64m1(...) __riscv_vle64ff_v_u64m1(__VA_ARGS__)

#define	vle64ff_v_u64m1_m(...) __riscv_vle64ff_v_u64m1_tumu(__VA_ARGS__)

#define	vle64ff_v_u64m2(...) __riscv_vle64ff_v_u64m2(__VA_ARGS__)

#define	vle64ff_v_u64m2_m(...) __riscv_vle64ff_v_u64m2_tumu(__VA_ARGS__)

#define	vle64ff_v_u64m4(...) __riscv_vle64ff_v_u64m4(__VA_ARGS__)

#define	vle64ff_v_u64m4_m(...) __riscv_vle64ff_v_u64m4_tumu(__VA_ARGS__)

#define	vle64ff_v_u64m8(...) __riscv_vle64ff_v_u64m8(__VA_ARGS__)

#define	vle64ff_v_u64m8_m(...) __riscv_vle64ff_v_u64m8_tumu(__VA_ARGS__)

#define	vle8_v_i8m1(...) __riscv_vle8_v_i8m1(__VA_ARGS__)

#define	vle8_v_i8m1_m(...) __riscv_vle8_v_i8m1_tumu(__VA_ARGS__)

#define	vle8_v_i8m2(...) __riscv_vle8_v_i8m2(__VA_ARGS__)

#define	vle8_v_i8m2_m(...) __riscv_vle8_v_i8m2_tumu(__VA_ARGS__)

#define	vle8_v_i8m4(...) __riscv_vle8_v_i8m4(__VA_ARGS__)

#define	vle8_v_i8m4_m(...) __riscv_vle8_v_i8m4_tumu(__VA_ARGS__)

#define	vle8_v_i8m8(...) __riscv_vle8_v_i8m8(__VA_ARGS__)

#define	vle8_v_i8m8_m(...) __riscv_vle8_v_i8m8_tumu(__VA_ARGS__)

#define	vle8_v_i8mf2(...) __riscv_vle8_v_i8mf2(__VA_ARGS__)

#define	vle8_v_i8mf2_m(...) __riscv_vle8_v_i8mf2_tumu(__VA_ARGS__)

#define	vle8_v_i8mf4(...) __riscv_vle8_v_i8mf4(__VA_ARGS__)

#define	vle8_v_i8mf4_m(...) __riscv_vle8_v_i8mf4_tumu(__VA_ARGS__)

#define	vle8_v_i8mf8(...) __riscv_vle8_v_i8mf8(__VA_ARGS__)

#define	vle8_v_i8mf8_m(...) __riscv_vle8_v_i8mf8_tumu(__VA_ARGS__)

#define	vle8_v_u8m1(...) __riscv_vle8_v_u8m1(__VA_ARGS__)

#define	vle8_v_u8m1_m(...) __riscv_vle8_v_u8m1_tumu(__VA_ARGS__)

#define	vle8_v_u8m2(...) __riscv_vle8_v_u8m2(__VA_ARGS__)

#define	vle8_v_u8m2_m(...) __riscv_vle8_v_u8m2_tumu(__VA_ARGS__)

#define	vle8_v_u8m4(...) __riscv_vle8_v_u8m4(__VA_ARGS__)

#define	vle8_v_u8m4_m(...) __riscv_vle8_v_u8m4_tumu(__VA_ARGS__)

#define	vle8_v_u8m8(...) __riscv_vle8_v_u8m8(__VA_ARGS__)

#define	vle8_v_u8m8_m(...) __riscv_vle8_v_u8m8_tumu(__VA_ARGS__)

#define	vle8_v_u8mf2(...) __riscv_vle8_v_u8mf2(__VA_ARGS__)

#define	vle8_v_u8mf2_m(...) __riscv_vle8_v_u8mf2_tumu(__VA_ARGS__)

#define	vle8_v_u8mf4(...) __riscv_vle8_v_u8mf4(__VA_ARGS__)

#define	vle8_v_u8mf4_m(...) __riscv_vle8_v_u8mf4_tumu(__VA_ARGS__)

#define	vle8_v_u8mf8(...) __riscv_vle8_v_u8mf8(__VA_ARGS__)

#define	vle8_v_u8mf8_m(...) __riscv_vle8_v_u8mf8_tumu(__VA_ARGS__)

#define	vle8ff_v_i8m1(...) __riscv_vle8ff_v_i8m1(__VA_ARGS__)

#define	vle8ff_v_i8m1_m(...) __riscv_vle8ff_v_i8m1_tumu(__VA_ARGS__)

#define	vle8ff_v_i8m2(...) __riscv_vle8ff_v_i8m2(__VA_ARGS__)

#define	vle8ff_v_i8m2_m(...) __riscv_vle8ff_v_i8m2_tumu(__VA_ARGS__)

#define	vle8ff_v_i8m4(...) __riscv_vle8ff_v_i8m4(__VA_ARGS__)

#define	vle8ff_v_i8m4_m(...) __riscv_vle8ff_v_i8m4_tumu(__VA_ARGS__)

#define	vle8ff_v_i8m8(...) __riscv_vle8ff_v_i8m8(__VA_ARGS__)

#define	vle8ff_v_i8m8_m(...) __riscv_vle8ff_v_i8m8_tumu(__VA_ARGS__)

#define	vle8ff_v_i8mf2(...) __riscv_vle8ff_v_i8mf2(__VA_ARGS__)

#define	vle8ff_v_i8mf2_m(...) __riscv_vle8ff_v_i8mf2_tumu(__VA_ARGS__)

#define	vle8ff_v_i8mf4(...) __riscv_vle8ff_v_i8mf4(__VA_ARGS__)

#define	vle8ff_v_i8mf4_m(...) __riscv_vle8ff_v_i8mf4_tumu(__VA_ARGS__)

#define	vle8ff_v_i8mf8(...) __riscv_vle8ff_v_i8mf8(__VA_ARGS__)

#define	vle8ff_v_i8mf8_m(...) __riscv_vle8ff_v_i8mf8_tumu(__VA_ARGS__)

#define	vle8ff_v_u8m1(...) __riscv_vle8ff_v_u8m1(__VA_ARGS__)

#define	vle8ff_v_u8m1_m(...) __riscv_vle8ff_v_u8m1_tumu(__VA_ARGS__)

#define	vle8ff_v_u8m2(...) __riscv_vle8ff_v_u8m2(__VA_ARGS__)

#define	vle8ff_v_u8m2_m(...) __riscv_vle8ff_v_u8m2_tumu(__VA_ARGS__)

#define	vle8ff_v_u8m4(...) __riscv_vle8ff_v_u8m4(__VA_ARGS__)

#define	vle8ff_v_u8m4_m(...) __riscv_vle8ff_v_u8m4_tumu(__VA_ARGS__)

#define	vle8ff_v_u8m8(...) __riscv_vle8ff_v_u8m8(__VA_ARGS__)

#define	vle8ff_v_u8m8_m(...) __riscv_vle8ff_v_u8m8_tumu(__VA_ARGS__)

#define	vle8ff_v_u8mf2(...) __riscv_vle8ff_v_u8mf2(__VA_ARGS__)

#define	vle8ff_v_u8mf2_m(...) __riscv_vle8ff_v_u8mf2_tumu(__VA_ARGS__)

#define	vle8ff_v_u8mf4(...) __riscv_vle8ff_v_u8mf4(__VA_ARGS__)

#define	vle8ff_v_u8mf4_m(...) __riscv_vle8ff_v_u8mf4_tumu(__VA_ARGS__)

#define	vle8ff_v_u8mf8(...) __riscv_vle8ff_v_u8mf8(__VA_ARGS__)

#define	vle8ff_v_u8mf8_m(...) __riscv_vle8ff_v_u8mf8_tumu(__VA_ARGS__)

#define	vlm_v_b1(...) __riscv_vlm_v_b1(__VA_ARGS__)

#define	vlm_v_b16(...) __riscv_vlm_v_b16(__VA_ARGS__)

#define	vlm_v_b2(...) __riscv_vlm_v_b2(__VA_ARGS__)

#define	vlm_v_b32(...) __riscv_vlm_v_b32(__VA_ARGS__)

#define	vlm_v_b4(...) __riscv_vlm_v_b4(__VA_ARGS__)

#define	vlm_v_b64(...) __riscv_vlm_v_b64(__VA_ARGS__)

#define	vlm_v_b8(...) __riscv_vlm_v_b8(__VA_ARGS__)

#define	vlmul_ext_v_f16m1_f16m2(...) __riscv_vlmul_ext_v_f16m1_f16m2(__VA_ARGS__)

#define	vlmul_ext_v_f16m1_f16m4(...) __riscv_vlmul_ext_v_f16m1_f16m4(__VA_ARGS__)

#define	vlmul_ext_v_f16m1_f16m8(...) __riscv_vlmul_ext_v_f16m1_f16m8(__VA_ARGS__)

#define	vlmul_ext_v_f16m2_f16m4(...) __riscv_vlmul_ext_v_f16m2_f16m4(__VA_ARGS__)

#define	vlmul_ext_v_f16m2_f16m8(...) __riscv_vlmul_ext_v_f16m2_f16m8(__VA_ARGS__)

#define	vlmul_ext_v_f16m4_f16m8(...) __riscv_vlmul_ext_v_f16m4_f16m8(__VA_ARGS__)

#define	vlmul_ext_v_f16mf2_f16m1(...) __riscv_vlmul_ext_v_f16mf2_f16m1(__VA_ARGS__)

#define	vlmul_ext_v_f16mf2_f16m2(...) __riscv_vlmul_ext_v_f16mf2_f16m2(__VA_ARGS__)

#define	vlmul_ext_v_f16mf2_f16m4(...) __riscv_vlmul_ext_v_f16mf2_f16m4(__VA_ARGS__)

#define	vlmul_ext_v_f16mf2_f16m8(...) __riscv_vlmul_ext_v_f16mf2_f16m8(__VA_ARGS__)

#define	vlmul_ext_v_f16mf4_f16m1(...) __riscv_vlmul_ext_v_f16mf4_f16m1(__VA_ARGS__)

#define	vlmul_ext_v_f16mf4_f16m2(...) __riscv_vlmul_ext_v_f16mf4_f16m2(__VA_ARGS__)

#define	vlmul_ext_v_f16mf4_f16m4(...) __riscv_vlmul_ext_v_f16mf4_f16m4(__VA_ARGS__)

#define	vlmul_ext_v_f16mf4_f16m8(...) __riscv_vlmul_ext_v_f16mf4_f16m8(__VA_ARGS__)

#define	vlmul_ext_v_f16mf4_f16mf2(...) __riscv_vlmul_ext_v_f16mf4_f16mf2(__VA_ARGS__)

#define	vlmul_ext_v_f32m1_f32m2(...) __riscv_vlmul_ext_v_f32m1_f32m2(__VA_ARGS__)

#define	vlmul_ext_v_f32m1_f32m4(...) __riscv_vlmul_ext_v_f32m1_f32m4(__VA_ARGS__)

#define	vlmul_ext_v_f32m1_f32m8(...) __riscv_vlmul_ext_v_f32m1_f32m8(__VA_ARGS__)

#define	vlmul_ext_v_f32m2_f32m4(...) __riscv_vlmul_ext_v_f32m2_f32m4(__VA_ARGS__)

#define	vlmul_ext_v_f32m2_f32m8(...) __riscv_vlmul_ext_v_f32m2_f32m8(__VA_ARGS__)

#define	vlmul_ext_v_f32m4_f32m8(...) __riscv_vlmul_ext_v_f32m4_f32m8(__VA_ARGS__)

#define	vlmul_ext_v_f32mf2_f32m1(...) __riscv_vlmul_ext_v_f32mf2_f32m1(__VA_ARGS__)

#define	vlmul_ext_v_f32mf2_f32m2(...) __riscv_vlmul_ext_v_f32mf2_f32m2(__VA_ARGS__)

#define	vlmul_ext_v_f32mf2_f32m4(...) __riscv_vlmul_ext_v_f32mf2_f32m4(__VA_ARGS__)

#define	vlmul_ext_v_f32mf2_f32m8(...) __riscv_vlmul_ext_v_f32mf2_f32m8(__VA_ARGS__)

#define	vlmul_ext_v_f64m1_f64m2(...) __riscv_vlmul_ext_v_f64m1_f64m2(__VA_ARGS__)

#define	vlmul_ext_v_f64m1_f64m4(...) __riscv_vlmul_ext_v_f64m1_f64m4(__VA_ARGS__)

#define	vlmul_ext_v_f64m1_f64m8(...) __riscv_vlmul_ext_v_f64m1_f64m8(__VA_ARGS__)

#define	vlmul_ext_v_f64m2_f64m4(...) __riscv_vlmul_ext_v_f64m2_f64m4(__VA_ARGS__)

#define	vlmul_ext_v_f64m2_f64m8(...) __riscv_vlmul_ext_v_f64m2_f64m8(__VA_ARGS__)

#define	vlmul_ext_v_f64m4_f64m8(...) __riscv_vlmul_ext_v_f64m4_f64m8(__VA_ARGS__)

#define	vlmul_ext_v_i16m1_i16m2(...) __riscv_vlmul_ext_v_i16m1_i16m2(__VA_ARGS__)

#define	vlmul_ext_v_i16m1_i16m4(...) __riscv_vlmul_ext_v_i16m1_i16m4(__VA_ARGS__)

#define	vlmul_ext_v_i16m1_i16m8(...) __riscv_vlmul_ext_v_i16m1_i16m8(__VA_ARGS__)

#define	vlmul_ext_v_i16m2_i16m4(...) __riscv_vlmul_ext_v_i16m2_i16m4(__VA_ARGS__)

#define	vlmul_ext_v_i16m2_i16m8(...) __riscv_vlmul_ext_v_i16m2_i16m8(__VA_ARGS__)

#define	vlmul_ext_v_i16m4_i16m8(...) __riscv_vlmul_ext_v_i16m4_i16m8(__VA_ARGS__)

#define	vlmul_ext_v_i16mf2_i16m1(...) __riscv_vlmul_ext_v_i16mf2_i16m1(__VA_ARGS__)

#define	vlmul_ext_v_i16mf2_i16m2(...) __riscv_vlmul_ext_v_i16mf2_i16m2(__VA_ARGS__)

#define	vlmul_ext_v_i16mf2_i16m4(...) __riscv_vlmul_ext_v_i16mf2_i16m4(__VA_ARGS__)

#define	vlmul_ext_v_i16mf2_i16m8(...) __riscv_vlmul_ext_v_i16mf2_i16m8(__VA_ARGS__)

#define	vlmul_ext_v_i16mf4_i16m1(...) __riscv_vlmul_ext_v_i16mf4_i16m1(__VA_ARGS__)

#define	vlmul_ext_v_i16mf4_i16m2(...) __riscv_vlmul_ext_v_i16mf4_i16m2(__VA_ARGS__)

#define	vlmul_ext_v_i16mf4_i16m4(...) __riscv_vlmul_ext_v_i16mf4_i16m4(__VA_ARGS__)

#define	vlmul_ext_v_i16mf4_i16m8(...) __riscv_vlmul_ext_v_i16mf4_i16m8(__VA_ARGS__)

#define	vlmul_ext_v_i16mf4_i16mf2(...) __riscv_vlmul_ext_v_i16mf4_i16mf2(__VA_ARGS__)

#define	vlmul_ext_v_i32m1_i32m2(...) __riscv_vlmul_ext_v_i32m1_i32m2(__VA_ARGS__)

#define	vlmul_ext_v_i32m1_i32m4(...) __riscv_vlmul_ext_v_i32m1_i32m4(__VA_ARGS__)

#define	vlmul_ext_v_i32m1_i32m8(...) __riscv_vlmul_ext_v_i32m1_i32m8(__VA_ARGS__)

#define	vlmul_ext_v_i32m2_i32m4(...) __riscv_vlmul_ext_v_i32m2_i32m4(__VA_ARGS__)

#define	vlmul_ext_v_i32m2_i32m8(...) __riscv_vlmul_ext_v_i32m2_i32m8(__VA_ARGS__)

#define	vlmul_ext_v_i32m4_i32m8(...) __riscv_vlmul_ext_v_i32m4_i32m8(__VA_ARGS__)

#define	vlmul_ext_v_i32mf2_i32m1(...) __riscv_vlmul_ext_v_i32mf2_i32m1(__VA_ARGS__)

#define	vlmul_ext_v_i32mf2_i32m2(...) __riscv_vlmul_ext_v_i32mf2_i32m2(__VA_ARGS__)

#define	vlmul_ext_v_i32mf2_i32m4(...) __riscv_vlmul_ext_v_i32mf2_i32m4(__VA_ARGS__)

#define	vlmul_ext_v_i32mf2_i32m8(...) __riscv_vlmul_ext_v_i32mf2_i32m8(__VA_ARGS__)

#define	vlmul_ext_v_i64m1_i64m2(...) __riscv_vlmul_ext_v_i64m1_i64m2(__VA_ARGS__)

#define	vlmul_ext_v_i64m1_i64m4(...) __riscv_vlmul_ext_v_i64m1_i64m4(__VA_ARGS__)

#define	vlmul_ext_v_i64m1_i64m8(...) __riscv_vlmul_ext_v_i64m1_i64m8(__VA_ARGS__)

#define	vlmul_ext_v_i64m2_i64m4(...) __riscv_vlmul_ext_v_i64m2_i64m4(__VA_ARGS__)

#define	vlmul_ext_v_i64m2_i64m8(...) __riscv_vlmul_ext_v_i64m2_i64m8(__VA_ARGS__)

#define	vlmul_ext_v_i64m4_i64m8(...) __riscv_vlmul_ext_v_i64m4_i64m8(__VA_ARGS__)

#define	vlmul_ext_v_i8m1_i8m2(...) __riscv_vlmul_ext_v_i8m1_i8m2(__VA_ARGS__)

#define	vlmul_ext_v_i8m1_i8m4(...) __riscv_vlmul_ext_v_i8m1_i8m4(__VA_ARGS__)

#define	vlmul_ext_v_i8m1_i8m8(...) __riscv_vlmul_ext_v_i8m1_i8m8(__VA_ARGS__)

#define	vlmul_ext_v_i8m2_i8m4(...) __riscv_vlmul_ext_v_i8m2_i8m4(__VA_ARGS__)

#define	vlmul_ext_v_i8m2_i8m8(...) __riscv_vlmul_ext_v_i8m2_i8m8(__VA_ARGS__)

#define	vlmul_ext_v_i8m4_i8m8(...) __riscv_vlmul_ext_v_i8m4_i8m8(__VA_ARGS__)

#define	vlmul_ext_v_i8mf2_i8m1(...) __riscv_vlmul_ext_v_i8mf2_i8m1(__VA_ARGS__)

#define	vlmul_ext_v_i8mf2_i8m2(...) __riscv_vlmul_ext_v_i8mf2_i8m2(__VA_ARGS__)

#define	vlmul_ext_v_i8mf2_i8m4(...) __riscv_vlmul_ext_v_i8mf2_i8m4(__VA_ARGS__)

#define	vlmul_ext_v_i8mf2_i8m8(...) __riscv_vlmul_ext_v_i8mf2_i8m8(__VA_ARGS__)

#define	vlmul_ext_v_i8mf4_i8m1(...) __riscv_vlmul_ext_v_i8mf4_i8m1(__VA_ARGS__)

#define	vlmul_ext_v_i8mf4_i8m2(...) __riscv_vlmul_ext_v_i8mf4_i8m2(__VA_ARGS__)

#define	vlmul_ext_v_i8mf4_i8m4(...) __riscv_vlmul_ext_v_i8mf4_i8m4(__VA_ARGS__)

#define	vlmul_ext_v_i8mf4_i8m8(...) __riscv_vlmul_ext_v_i8mf4_i8m8(__VA_ARGS__)

#define	vlmul_ext_v_i8mf4_i8mf2(...) __riscv_vlmul_ext_v_i8mf4_i8mf2(__VA_ARGS__)

#define	vlmul_ext_v_i8mf8_i8m1(...) __riscv_vlmul_ext_v_i8mf8_i8m1(__VA_ARGS__)

#define	vlmul_ext_v_i8mf8_i8m2(...) __riscv_vlmul_ext_v_i8mf8_i8m2(__VA_ARGS__)

#define	vlmul_ext_v_i8mf8_i8m4(...) __riscv_vlmul_ext_v_i8mf8_i8m4(__VA_ARGS__)

#define	vlmul_ext_v_i8mf8_i8m8(...) __riscv_vlmul_ext_v_i8mf8_i8m8(__VA_ARGS__)

#define	vlmul_ext_v_i8mf8_i8mf2(...) __riscv_vlmul_ext_v_i8mf8_i8mf2(__VA_ARGS__)

#define	vlmul_ext_v_i8mf8_i8mf4(...) __riscv_vlmul_ext_v_i8mf8_i8mf4(__VA_ARGS__)

#define	vlmul_ext_v_u16m1_u16m2(...) __riscv_vlmul_ext_v_u16m1_u16m2(__VA_ARGS__)

#define	vlmul_ext_v_u16m1_u16m4(...) __riscv_vlmul_ext_v_u16m1_u16m4(__VA_ARGS__)

#define	vlmul_ext_v_u16m1_u16m8(...) __riscv_vlmul_ext_v_u16m1_u16m8(__VA_ARGS__)

#define	vlmul_ext_v_u16m2_u16m4(...) __riscv_vlmul_ext_v_u16m2_u16m4(__VA_ARGS__)

#define	vlmul_ext_v_u16m2_u16m8(...) __riscv_vlmul_ext_v_u16m2_u16m8(__VA_ARGS__)

#define	vlmul_ext_v_u16m4_u16m8(...) __riscv_vlmul_ext_v_u16m4_u16m8(__VA_ARGS__)

#define	vlmul_ext_v_u16mf2_u16m1(...) __riscv_vlmul_ext_v_u16mf2_u16m1(__VA_ARGS__)

#define	vlmul_ext_v_u16mf2_u16m2(...) __riscv_vlmul_ext_v_u16mf2_u16m2(__VA_ARGS__)

#define	vlmul_ext_v_u16mf2_u16m4(...) __riscv_vlmul_ext_v_u16mf2_u16m4(__VA_ARGS__)

#define	vlmul_ext_v_u16mf2_u16m8(...) __riscv_vlmul_ext_v_u16mf2_u16m8(__VA_ARGS__)

#define	vlmul_ext_v_u16mf4_u16m1(...) __riscv_vlmul_ext_v_u16mf4_u16m1(__VA_ARGS__)

#define	vlmul_ext_v_u16mf4_u16m2(...) __riscv_vlmul_ext_v_u16mf4_u16m2(__VA_ARGS__)

#define	vlmul_ext_v_u16mf4_u16m4(...) __riscv_vlmul_ext_v_u16mf4_u16m4(__VA_ARGS__)

#define	vlmul_ext_v_u16mf4_u16m8(...) __riscv_vlmul_ext_v_u16mf4_u16m8(__VA_ARGS__)

#define	vlmul_ext_v_u16mf4_u16mf2(...) __riscv_vlmul_ext_v_u16mf4_u16mf2(__VA_ARGS__)

#define	vlmul_ext_v_u32m1_u32m2(...) __riscv_vlmul_ext_v_u32m1_u32m2(__VA_ARGS__)

#define	vlmul_ext_v_u32m1_u32m4(...) __riscv_vlmul_ext_v_u32m1_u32m4(__VA_ARGS__)

#define	vlmul_ext_v_u32m1_u32m8(...) __riscv_vlmul_ext_v_u32m1_u32m8(__VA_ARGS__)

#define	vlmul_ext_v_u32m2_u32m4(...) __riscv_vlmul_ext_v_u32m2_u32m4(__VA_ARGS__)

#define	vlmul_ext_v_u32m2_u32m8(...) __riscv_vlmul_ext_v_u32m2_u32m8(__VA_ARGS__)

#define	vlmul_ext_v_u32m4_u32m8(...) __riscv_vlmul_ext_v_u32m4_u32m8(__VA_ARGS__)

#define	vlmul_ext_v_u32mf2_u32m1(...) __riscv_vlmul_ext_v_u32mf2_u32m1(__VA_ARGS__)

#define	vlmul_ext_v_u32mf2_u32m2(...) __riscv_vlmul_ext_v_u32mf2_u32m2(__VA_ARGS__)

#define	vlmul_ext_v_u32mf2_u32m4(...) __riscv_vlmul_ext_v_u32mf2_u32m4(__VA_ARGS__)

#define	vlmul_ext_v_u32mf2_u32m8(...) __riscv_vlmul_ext_v_u32mf2_u32m8(__VA_ARGS__)

#define	vlmul_ext_v_u64m1_u64m2(...) __riscv_vlmul_ext_v_u64m1_u64m2(__VA_ARGS__)

#define	vlmul_ext_v_u64m1_u64m4(...) __riscv_vlmul_ext_v_u64m1_u64m4(__VA_ARGS__)

#define	vlmul_ext_v_u64m1_u64m8(...) __riscv_vlmul_ext_v_u64m1_u64m8(__VA_ARGS__)

#define	vlmul_ext_v_u64m2_u64m4(...) __riscv_vlmul_ext_v_u64m2_u64m4(__VA_ARGS__)

#define	vlmul_ext_v_u64m2_u64m8(...) __riscv_vlmul_ext_v_u64m2_u64m8(__VA_ARGS__)

#define	vlmul_ext_v_u64m4_u64m8(...) __riscv_vlmul_ext_v_u64m4_u64m8(__VA_ARGS__)

#define	vlmul_ext_v_u8m1_u8m2(...) __riscv_vlmul_ext_v_u8m1_u8m2(__VA_ARGS__)

#define	vlmul_ext_v_u8m1_u8m4(...) __riscv_vlmul_ext_v_u8m1_u8m4(__VA_ARGS__)

#define	vlmul_ext_v_u8m1_u8m8(...) __riscv_vlmul_ext_v_u8m1_u8m8(__VA_ARGS__)

#define	vlmul_ext_v_u8m2_u8m4(...) __riscv_vlmul_ext_v_u8m2_u8m4(__VA_ARGS__)

#define	vlmul_ext_v_u8m2_u8m8(...) __riscv_vlmul_ext_v_u8m2_u8m8(__VA_ARGS__)

#define	vlmul_ext_v_u8m4_u8m8(...) __riscv_vlmul_ext_v_u8m4_u8m8(__VA_ARGS__)

#define	vlmul_ext_v_u8mf2_u8m1(...) __riscv_vlmul_ext_v_u8mf2_u8m1(__VA_ARGS__)

#define	vlmul_ext_v_u8mf2_u8m2(...) __riscv_vlmul_ext_v_u8mf2_u8m2(__VA_ARGS__)

#define	vlmul_ext_v_u8mf2_u8m4(...) __riscv_vlmul_ext_v_u8mf2_u8m4(__VA_ARGS__)

#define	vlmul_ext_v_u8mf2_u8m8(...) __riscv_vlmul_ext_v_u8mf2_u8m8(__VA_ARGS__)

#define	vlmul_ext_v_u8mf4_u8m1(...) __riscv_vlmul_ext_v_u8mf4_u8m1(__VA_ARGS__)

#define	vlmul_ext_v_u8mf4_u8m2(...) __riscv_vlmul_ext_v_u8mf4_u8m2(__VA_ARGS__)

#define	vlmul_ext_v_u8mf4_u8m4(...) __riscv_vlmul_ext_v_u8mf4_u8m4(__VA_ARGS__)

#define	vlmul_ext_v_u8mf4_u8m8(...) __riscv_vlmul_ext_v_u8mf4_u8m8(__VA_ARGS__)

#define	vlmul_ext_v_u8mf4_u8mf2(...) __riscv_vlmul_ext_v_u8mf4_u8mf2(__VA_ARGS__)

#define	vlmul_ext_v_u8mf8_u8m1(...) __riscv_vlmul_ext_v_u8mf8_u8m1(__VA_ARGS__)

#define	vlmul_ext_v_u8mf8_u8m2(...) __riscv_vlmul_ext_v_u8mf8_u8m2(__VA_ARGS__)

#define	vlmul_ext_v_u8mf8_u8m4(...) __riscv_vlmul_ext_v_u8mf8_u8m4(__VA_ARGS__)

#define	vlmul_ext_v_u8mf8_u8m8(...) __riscv_vlmul_ext_v_u8mf8_u8m8(__VA_ARGS__)

#define	vlmul_ext_v_u8mf8_u8mf2(...) __riscv_vlmul_ext_v_u8mf8_u8mf2(__VA_ARGS__)

#define	vlmul_ext_v_u8mf8_u8mf4(...) __riscv_vlmul_ext_v_u8mf8_u8mf4(__VA_ARGS__)

#define	vlmul_trunc_v_f16m1_f16mf2(...) __riscv_vlmul_trunc_v_f16m1_f16mf2(__VA_ARGS__)

#define	vlmul_trunc_v_f16m1_f16mf4(...) __riscv_vlmul_trunc_v_f16m1_f16mf4(__VA_ARGS__)

#define	vlmul_trunc_v_f16m2_f16m1(...) __riscv_vlmul_trunc_v_f16m2_f16m1(__VA_ARGS__)

#define	vlmul_trunc_v_f16m2_f16mf2(...) __riscv_vlmul_trunc_v_f16m2_f16mf2(__VA_ARGS__)

#define	vlmul_trunc_v_f16m2_f16mf4(...) __riscv_vlmul_trunc_v_f16m2_f16mf4(__VA_ARGS__)

#define	vlmul_trunc_v_f16m4_f16m1(...) __riscv_vlmul_trunc_v_f16m4_f16m1(__VA_ARGS__)

#define	vlmul_trunc_v_f16m4_f16m2(...) __riscv_vlmul_trunc_v_f16m4_f16m2(__VA_ARGS__)

#define	vlmul_trunc_v_f16m4_f16mf2(...) __riscv_vlmul_trunc_v_f16m4_f16mf2(__VA_ARGS__)

#define	vlmul_trunc_v_f16m4_f16mf4(...) __riscv_vlmul_trunc_v_f16m4_f16mf4(__VA_ARGS__)

#define	vlmul_trunc_v_f16m8_f16m1(...) __riscv_vlmul_trunc_v_f16m8_f16m1(__VA_ARGS__)

#define	vlmul_trunc_v_f16m8_f16m2(...) __riscv_vlmul_trunc_v_f16m8_f16m2(__VA_ARGS__)

#define	vlmul_trunc_v_f16m8_f16m4(...) __riscv_vlmul_trunc_v_f16m8_f16m4(__VA_ARGS__)

#define	vlmul_trunc_v_f16m8_f16mf2(...) __riscv_vlmul_trunc_v_f16m8_f16mf2(__VA_ARGS__)

#define	vlmul_trunc_v_f16m8_f16mf4(...) __riscv_vlmul_trunc_v_f16m8_f16mf4(__VA_ARGS__)

#define	vlmul_trunc_v_f16mf2_f16mf4(...) __riscv_vlmul_trunc_v_f16mf2_f16mf4(__VA_ARGS__)

#define	vlmul_trunc_v_f32m1_f32mf2(...) __riscv_vlmul_trunc_v_f32m1_f32mf2(__VA_ARGS__)

#define	vlmul_trunc_v_f32m2_f32m1(...) __riscv_vlmul_trunc_v_f32m2_f32m1(__VA_ARGS__)

#define	vlmul_trunc_v_f32m2_f32mf2(...) __riscv_vlmul_trunc_v_f32m2_f32mf2(__VA_ARGS__)

#define	vlmul_trunc_v_f32m4_f32m1(...) __riscv_vlmul_trunc_v_f32m4_f32m1(__VA_ARGS__)

#define	vlmul_trunc_v_f32m4_f32m2(...) __riscv_vlmul_trunc_v_f32m4_f32m2(__VA_ARGS__)

#define	vlmul_trunc_v_f32m4_f32mf2(...) __riscv_vlmul_trunc_v_f32m4_f32mf2(__VA_ARGS__)

#define	vlmul_trunc_v_f32m8_f32m1(...) __riscv_vlmul_trunc_v_f32m8_f32m1(__VA_ARGS__)

#define	vlmul_trunc_v_f32m8_f32m2(...) __riscv_vlmul_trunc_v_f32m8_f32m2(__VA_ARGS__)

#define	vlmul_trunc_v_f32m8_f32m4(...) __riscv_vlmul_trunc_v_f32m8_f32m4(__VA_ARGS__)

#define	vlmul_trunc_v_f32m8_f32mf2(...) __riscv_vlmul_trunc_v_f32m8_f32mf2(__VA_ARGS__)

#define	vlmul_trunc_v_f64m2_f64m1(...) __riscv_vlmul_trunc_v_f64m2_f64m1(__VA_ARGS__)

#define	vlmul_trunc_v_f64m4_f64m1(...) __riscv_vlmul_trunc_v_f64m4_f64m1(__VA_ARGS__)

#define	vlmul_trunc_v_f64m4_f64m2(...) __riscv_vlmul_trunc_v_f64m4_f64m2(__VA_ARGS__)

#define	vlmul_trunc_v_f64m8_f64m1(...) __riscv_vlmul_trunc_v_f64m8_f64m1(__VA_ARGS__)

#define	vlmul_trunc_v_f64m8_f64m2(...) __riscv_vlmul_trunc_v_f64m8_f64m2(__VA_ARGS__)

#define	vlmul_trunc_v_f64m8_f64m4(...) __riscv_vlmul_trunc_v_f64m8_f64m4(__VA_ARGS__)

#define	vlmul_trunc_v_i16m1_i16mf2(...) __riscv_vlmul_trunc_v_i16m1_i16mf2(__VA_ARGS__)

#define	vlmul_trunc_v_i16m1_i16mf4(...) __riscv_vlmul_trunc_v_i16m1_i16mf4(__VA_ARGS__)

#define	vlmul_trunc_v_i16m2_i16m1(...) __riscv_vlmul_trunc_v_i16m2_i16m1(__VA_ARGS__)

#define	vlmul_trunc_v_i16m2_i16mf2(...) __riscv_vlmul_trunc_v_i16m2_i16mf2(__VA_ARGS__)

#define	vlmul_trunc_v_i16m2_i16mf4(...) __riscv_vlmul_trunc_v_i16m2_i16mf4(__VA_ARGS__)

#define	vlmul_trunc_v_i16m4_i16m1(...) __riscv_vlmul_trunc_v_i16m4_i16m1(__VA_ARGS__)

#define	vlmul_trunc_v_i16m4_i16m2(...) __riscv_vlmul_trunc_v_i16m4_i16m2(__VA_ARGS__)

#define	vlmul_trunc_v_i16m4_i16mf2(...) __riscv_vlmul_trunc_v_i16m4_i16mf2(__VA_ARGS__)

#define	vlmul_trunc_v_i16m4_i16mf4(...) __riscv_vlmul_trunc_v_i16m4_i16mf4(__VA_ARGS__)

#define	vlmul_trunc_v_i16m8_i16m1(...) __riscv_vlmul_trunc_v_i16m8_i16m1(__VA_ARGS__)

#define	vlmul_trunc_v_i16m8_i16m2(...) __riscv_vlmul_trunc_v_i16m8_i16m2(__VA_ARGS__)

#define	vlmul_trunc_v_i16m8_i16m4(...) __riscv_vlmul_trunc_v_i16m8_i16m4(__VA_ARGS__)

#define	vlmul_trunc_v_i16m8_i16mf2(...) __riscv_vlmul_trunc_v_i16m8_i16mf2(__VA_ARGS__)

#define	vlmul_trunc_v_i16m8_i16mf4(...) __riscv_vlmul_trunc_v_i16m8_i16mf4(__VA_ARGS__)

#define	vlmul_trunc_v_i16mf2_i16mf4(...) __riscv_vlmul_trunc_v_i16mf2_i16mf4(__VA_ARGS__)

#define	vlmul_trunc_v_i32m1_i32mf2(...) __riscv_vlmul_trunc_v_i32m1_i32mf2(__VA_ARGS__)

#define	vlmul_trunc_v_i32m2_i32m1(...) __riscv_vlmul_trunc_v_i32m2_i32m1(__VA_ARGS__)

#define	vlmul_trunc_v_i32m2_i32mf2(...) __riscv_vlmul_trunc_v_i32m2_i32mf2(__VA_ARGS__)

#define	vlmul_trunc_v_i32m4_i32m1(...) __riscv_vlmul_trunc_v_i32m4_i32m1(__VA_ARGS__)

#define	vlmul_trunc_v_i32m4_i32m2(...) __riscv_vlmul_trunc_v_i32m4_i32m2(__VA_ARGS__)

#define	vlmul_trunc_v_i32m4_i32mf2(...) __riscv_vlmul_trunc_v_i32m4_i32mf2(__VA_ARGS__)

#define	vlmul_trunc_v_i32m8_i32m1(...) __riscv_vlmul_trunc_v_i32m8_i32m1(__VA_ARGS__)

#define	vlmul_trunc_v_i32m8_i32m2(...) __riscv_vlmul_trunc_v_i32m8_i32m2(__VA_ARGS__)

#define	vlmul_trunc_v_i32m8_i32m4(...) __riscv_vlmul_trunc_v_i32m8_i32m4(__VA_ARGS__)

#define	vlmul_trunc_v_i32m8_i32mf2(...) __riscv_vlmul_trunc_v_i32m8_i32mf2(__VA_ARGS__)

#define	vlmul_trunc_v_i64m2_i64m1(...) __riscv_vlmul_trunc_v_i64m2_i64m1(__VA_ARGS__)

#define	vlmul_trunc_v_i64m4_i64m1(...) __riscv_vlmul_trunc_v_i64m4_i64m1(__VA_ARGS__)

#define	vlmul_trunc_v_i64m4_i64m2(...) __riscv_vlmul_trunc_v_i64m4_i64m2(__VA_ARGS__)

#define	vlmul_trunc_v_i64m8_i64m1(...) __riscv_vlmul_trunc_v_i64m8_i64m1(__VA_ARGS__)

#define	vlmul_trunc_v_i64m8_i64m2(...) __riscv_vlmul_trunc_v_i64m8_i64m2(__VA_ARGS__)

#define	vlmul_trunc_v_i64m8_i64m4(...) __riscv_vlmul_trunc_v_i64m8_i64m4(__VA_ARGS__)

#define	vlmul_trunc_v_i8m1_i8mf2(...) __riscv_vlmul_trunc_v_i8m1_i8mf2(__VA_ARGS__)

#define	vlmul_trunc_v_i8m1_i8mf4(...) __riscv_vlmul_trunc_v_i8m1_i8mf4(__VA_ARGS__)

#define	vlmul_trunc_v_i8m1_i8mf8(...) __riscv_vlmul_trunc_v_i8m1_i8mf8(__VA_ARGS__)

#define	vlmul_trunc_v_i8m2_i8m1(...) __riscv_vlmul_trunc_v_i8m2_i8m1(__VA_ARGS__)

#define	vlmul_trunc_v_i8m2_i8mf2(...) __riscv_vlmul_trunc_v_i8m2_i8mf2(__VA_ARGS__)

#define	vlmul_trunc_v_i8m2_i8mf4(...) __riscv_vlmul_trunc_v_i8m2_i8mf4(__VA_ARGS__)

#define	vlmul_trunc_v_i8m2_i8mf8(...) __riscv_vlmul_trunc_v_i8m2_i8mf8(__VA_ARGS__)

#define	vlmul_trunc_v_i8m4_i8m1(...) __riscv_vlmul_trunc_v_i8m4_i8m1(__VA_ARGS__)

#define	vlmul_trunc_v_i8m4_i8m2(...) __riscv_vlmul_trunc_v_i8m4_i8m2(__VA_ARGS__)

#define	vlmul_trunc_v_i8m4_i8mf2(...) __riscv_vlmul_trunc_v_i8m4_i8mf2(__VA_ARGS__)

#define	vlmul_trunc_v_i8m4_i8mf4(...) __riscv_vlmul_trunc_v_i8m4_i8mf4(__VA_ARGS__)

#define	vlmul_trunc_v_i8m4_i8mf8(...) __riscv_vlmul_trunc_v_i8m4_i8mf8(__VA_ARGS__)

#define	vlmul_trunc_v_i8m8_i8m1(...) __riscv_vlmul_trunc_v_i8m8_i8m1(__VA_ARGS__)

#define	vlmul_trunc_v_i8m8_i8m2(...) __riscv_vlmul_trunc_v_i8m8_i8m2(__VA_ARGS__)

#define	vlmul_trunc_v_i8m8_i8m4(...) __riscv_vlmul_trunc_v_i8m8_i8m4(__VA_ARGS__)

#define	vlmul_trunc_v_i8m8_i8mf2(...) __riscv_vlmul_trunc_v_i8m8_i8mf2(__VA_ARGS__)

#define	vlmul_trunc_v_i8m8_i8mf4(...) __riscv_vlmul_trunc_v_i8m8_i8mf4(__VA_ARGS__)

#define	vlmul_trunc_v_i8m8_i8mf8(...) __riscv_vlmul_trunc_v_i8m8_i8mf8(__VA_ARGS__)

#define	vlmul_trunc_v_i8mf2_i8mf4(...) __riscv_vlmul_trunc_v_i8mf2_i8mf4(__VA_ARGS__)

#define	vlmul_trunc_v_i8mf2_i8mf8(...) __riscv_vlmul_trunc_v_i8mf2_i8mf8(__VA_ARGS__)

#define	vlmul_trunc_v_i8mf4_i8mf8(...) __riscv_vlmul_trunc_v_i8mf4_i8mf8(__VA_ARGS__)

#define	vlmul_trunc_v_u16m1_u16mf2(...) __riscv_vlmul_trunc_v_u16m1_u16mf2(__VA_ARGS__)

#define	vlmul_trunc_v_u16m1_u16mf4(...) __riscv_vlmul_trunc_v_u16m1_u16mf4(__VA_ARGS__)

#define	vlmul_trunc_v_u16m2_u16m1(...) __riscv_vlmul_trunc_v_u16m2_u16m1(__VA_ARGS__)

#define	vlmul_trunc_v_u16m2_u16mf2(...) __riscv_vlmul_trunc_v_u16m2_u16mf2(__VA_ARGS__)

#define	vlmul_trunc_v_u16m2_u16mf4(...) __riscv_vlmul_trunc_v_u16m2_u16mf4(__VA_ARGS__)

#define	vlmul_trunc_v_u16m4_u16m1(...) __riscv_vlmul_trunc_v_u16m4_u16m1(__VA_ARGS__)

#define	vlmul_trunc_v_u16m4_u16m2(...) __riscv_vlmul_trunc_v_u16m4_u16m2(__VA_ARGS__)

#define	vlmul_trunc_v_u16m4_u16mf2(...) __riscv_vlmul_trunc_v_u16m4_u16mf2(__VA_ARGS__)

#define	vlmul_trunc_v_u16m4_u16mf4(...) __riscv_vlmul_trunc_v_u16m4_u16mf4(__VA_ARGS__)

#define	vlmul_trunc_v_u16m8_u16m1(...) __riscv_vlmul_trunc_v_u16m8_u16m1(__VA_ARGS__)

#define	vlmul_trunc_v_u16m8_u16m2(...) __riscv_vlmul_trunc_v_u16m8_u16m2(__VA_ARGS__)

#define	vlmul_trunc_v_u16m8_u16m4(...) __riscv_vlmul_trunc_v_u16m8_u16m4(__VA_ARGS__)

#define	vlmul_trunc_v_u16m8_u16mf2(...) __riscv_vlmul_trunc_v_u16m8_u16mf2(__VA_ARGS__)

#define	vlmul_trunc_v_u16m8_u16mf4(...) __riscv_vlmul_trunc_v_u16m8_u16mf4(__VA_ARGS__)

#define	vlmul_trunc_v_u16mf2_u16mf4(...) __riscv_vlmul_trunc_v_u16mf2_u16mf4(__VA_ARGS__)

#define	vlmul_trunc_v_u32m1_u32mf2(...) __riscv_vlmul_trunc_v_u32m1_u32mf2(__VA_ARGS__)

#define	vlmul_trunc_v_u32m2_u32m1(...) __riscv_vlmul_trunc_v_u32m2_u32m1(__VA_ARGS__)

#define	vlmul_trunc_v_u32m2_u32mf2(...) __riscv_vlmul_trunc_v_u32m2_u32mf2(__VA_ARGS__)

#define	vlmul_trunc_v_u32m4_u32m1(...) __riscv_vlmul_trunc_v_u32m4_u32m1(__VA_ARGS__)

#define	vlmul_trunc_v_u32m4_u32m2(...) __riscv_vlmul_trunc_v_u32m4_u32m2(__VA_ARGS__)

#define	vlmul_trunc_v_u32m4_u32mf2(...) __riscv_vlmul_trunc_v_u32m4_u32mf2(__VA_ARGS__)

#define	vlmul_trunc_v_u32m8_u32m1(...) __riscv_vlmul_trunc_v_u32m8_u32m1(__VA_ARGS__)

#define	vlmul_trunc_v_u32m8_u32m2(...) __riscv_vlmul_trunc_v_u32m8_u32m2(__VA_ARGS__)

#define	vlmul_trunc_v_u32m8_u32m4(...) __riscv_vlmul_trunc_v_u32m8_u32m4(__VA_ARGS__)

#define	vlmul_trunc_v_u32m8_u32mf2(...) __riscv_vlmul_trunc_v_u32m8_u32mf2(__VA_ARGS__)

#define	vlmul_trunc_v_u64m2_u64m1(...) __riscv_vlmul_trunc_v_u64m2_u64m1(__VA_ARGS__)

#define	vlmul_trunc_v_u64m4_u64m1(...) __riscv_vlmul_trunc_v_u64m4_u64m1(__VA_ARGS__)

#define	vlmul_trunc_v_u64m4_u64m2(...) __riscv_vlmul_trunc_v_u64m4_u64m2(__VA_ARGS__)

#define	vlmul_trunc_v_u64m8_u64m1(...) __riscv_vlmul_trunc_v_u64m8_u64m1(__VA_ARGS__)

#define	vlmul_trunc_v_u64m8_u64m2(...) __riscv_vlmul_trunc_v_u64m8_u64m2(__VA_ARGS__)

#define	vlmul_trunc_v_u64m8_u64m4(...) __riscv_vlmul_trunc_v_u64m8_u64m4(__VA_ARGS__)

#define	vlmul_trunc_v_u8m1_u8mf2(...) __riscv_vlmul_trunc_v_u8m1_u8mf2(__VA_ARGS__)

#define	vlmul_trunc_v_u8m1_u8mf4(...) __riscv_vlmul_trunc_v_u8m1_u8mf4(__VA_ARGS__)

#define	vlmul_trunc_v_u8m1_u8mf8(...) __riscv_vlmul_trunc_v_u8m1_u8mf8(__VA_ARGS__)

#define	vlmul_trunc_v_u8m2_u8m1(...) __riscv_vlmul_trunc_v_u8m2_u8m1(__VA_ARGS__)

#define	vlmul_trunc_v_u8m2_u8mf2(...) __riscv_vlmul_trunc_v_u8m2_u8mf2(__VA_ARGS__)

#define	vlmul_trunc_v_u8m2_u8mf4(...) __riscv_vlmul_trunc_v_u8m2_u8mf4(__VA_ARGS__)

#define	vlmul_trunc_v_u8m2_u8mf8(...) __riscv_vlmul_trunc_v_u8m2_u8mf8(__VA_ARGS__)

#define	vlmul_trunc_v_u8m4_u8m1(...) __riscv_vlmul_trunc_v_u8m4_u8m1(__VA_ARGS__)

#define	vlmul_trunc_v_u8m4_u8m2(...) __riscv_vlmul_trunc_v_u8m4_u8m2(__VA_ARGS__)

#define	vlmul_trunc_v_u8m4_u8mf2(...) __riscv_vlmul_trunc_v_u8m4_u8mf2(__VA_ARGS__)

#define	vlmul_trunc_v_u8m4_u8mf4(...) __riscv_vlmul_trunc_v_u8m4_u8mf4(__VA_ARGS__)

#define	vlmul_trunc_v_u8m4_u8mf8(...) __riscv_vlmul_trunc_v_u8m4_u8mf8(__VA_ARGS__)

#define	vlmul_trunc_v_u8m8_u8m1(...) __riscv_vlmul_trunc_v_u8m8_u8m1(__VA_ARGS__)

#define	vlmul_trunc_v_u8m8_u8m2(...) __riscv_vlmul_trunc_v_u8m8_u8m2(__VA_ARGS__)

#define	vlmul_trunc_v_u8m8_u8m4(...) __riscv_vlmul_trunc_v_u8m8_u8m4(__VA_ARGS__)

#define	vlmul_trunc_v_u8m8_u8mf2(...) __riscv_vlmul_trunc_v_u8m8_u8mf2(__VA_ARGS__)

#define	vlmul_trunc_v_u8m8_u8mf4(...) __riscv_vlmul_trunc_v_u8m8_u8mf4(__VA_ARGS__)

#define	vlmul_trunc_v_u8m8_u8mf8(...) __riscv_vlmul_trunc_v_u8m8_u8mf8(__VA_ARGS__)

#define	vlmul_trunc_v_u8mf2_u8mf4(...) __riscv_vlmul_trunc_v_u8mf2_u8mf4(__VA_ARGS__)

#define	vlmul_trunc_v_u8mf2_u8mf8(...) __riscv_vlmul_trunc_v_u8mf2_u8mf8(__VA_ARGS__)

#define	vlmul_trunc_v_u8mf4_u8mf8(...) __riscv_vlmul_trunc_v_u8mf4_u8mf8(__VA_ARGS__)

#define	vloxei16_v_f16m1(...) __riscv_vloxei16_v_f16m1(__VA_ARGS__)

#define	vloxei16_v_f16m1_m(...) __riscv_vloxei16_v_f16m1_tumu(__VA_ARGS__)

#define	vloxei16_v_f16m2(...) __riscv_vloxei16_v_f16m2(__VA_ARGS__)

#define	vloxei16_v_f16m2_m(...) __riscv_vloxei16_v_f16m2_tumu(__VA_ARGS__)

#define	vloxei16_v_f16m4(...) __riscv_vloxei16_v_f16m4(__VA_ARGS__)

#define	vloxei16_v_f16m4_m(...) __riscv_vloxei16_v_f16m4_tumu(__VA_ARGS__)

#define	vloxei16_v_f16m8(...) __riscv_vloxei16_v_f16m8(__VA_ARGS__)

#define	vloxei16_v_f16m8_m(...) __riscv_vloxei16_v_f16m8_tumu(__VA_ARGS__)

#define	vloxei16_v_f16mf2(...) __riscv_vloxei16_v_f16mf2(__VA_ARGS__)

#define	vloxei16_v_f16mf2_m(...) __riscv_vloxei16_v_f16mf2_tumu(__VA_ARGS__)

#define	vloxei16_v_f16mf4(...) __riscv_vloxei16_v_f16mf4(__VA_ARGS__)

#define	vloxei16_v_f16mf4_m(...) __riscv_vloxei16_v_f16mf4_tumu(__VA_ARGS__)

#define	vloxei16_v_f32m1(...) __riscv_vloxei16_v_f32m1(__VA_ARGS__)

#define	vloxei16_v_f32m1_m(...) __riscv_vloxei16_v_f32m1_tumu(__VA_ARGS__)

#define	vloxei16_v_f32m2(...) __riscv_vloxei16_v_f32m2(__VA_ARGS__)

#define	vloxei16_v_f32m2_m(...) __riscv_vloxei16_v_f32m2_tumu(__VA_ARGS__)

#define	vloxei16_v_f32m4(...) __riscv_vloxei16_v_f32m4(__VA_ARGS__)

#define	vloxei16_v_f32m4_m(...) __riscv_vloxei16_v_f32m4_tumu(__VA_ARGS__)

#define	vloxei16_v_f32m8(...) __riscv_vloxei16_v_f32m8(__VA_ARGS__)

#define	vloxei16_v_f32m8_m(...) __riscv_vloxei16_v_f32m8_tumu(__VA_ARGS__)

#define	vloxei16_v_f32mf2(...) __riscv_vloxei16_v_f32mf2(__VA_ARGS__)

#define	vloxei16_v_f32mf2_m(...) __riscv_vloxei16_v_f32mf2_tumu(__VA_ARGS__)

#define	vloxei16_v_f64m1(...) __riscv_vloxei16_v_f64m1(__VA_ARGS__)

#define	vloxei16_v_f64m1_m(...) __riscv_vloxei16_v_f64m1_tumu(__VA_ARGS__)

#define	vloxei16_v_f64m2(...) __riscv_vloxei16_v_f64m2(__VA_ARGS__)

#define	vloxei16_v_f64m2_m(...) __riscv_vloxei16_v_f64m2_tumu(__VA_ARGS__)

#define	vloxei16_v_f64m4(...) __riscv_vloxei16_v_f64m4(__VA_ARGS__)

#define	vloxei16_v_f64m4_m(...) __riscv_vloxei16_v_f64m4_tumu(__VA_ARGS__)

#define	vloxei16_v_f64m8(...) __riscv_vloxei16_v_f64m8(__VA_ARGS__)

#define	vloxei16_v_f64m8_m(...) __riscv_vloxei16_v_f64m8_tumu(__VA_ARGS__)

#define	vloxei16_v_i16m1(...) __riscv_vloxei16_v_i16m1(__VA_ARGS__)

#define	vloxei16_v_i16m1_m(...) __riscv_vloxei16_v_i16m1_tumu(__VA_ARGS__)

#define	vloxei16_v_i16m2(...) __riscv_vloxei16_v_i16m2(__VA_ARGS__)

#define	vloxei16_v_i16m2_m(...) __riscv_vloxei16_v_i16m2_tumu(__VA_ARGS__)

#define	vloxei16_v_i16m4(...) __riscv_vloxei16_v_i16m4(__VA_ARGS__)

#define	vloxei16_v_i16m4_m(...) __riscv_vloxei16_v_i16m4_tumu(__VA_ARGS__)

#define	vloxei16_v_i16m8(...) __riscv_vloxei16_v_i16m8(__VA_ARGS__)

#define	vloxei16_v_i16m8_m(...) __riscv_vloxei16_v_i16m8_tumu(__VA_ARGS__)

#define	vloxei16_v_i16mf2(...) __riscv_vloxei16_v_i16mf2(__VA_ARGS__)

#define	vloxei16_v_i16mf2_m(...) __riscv_vloxei16_v_i16mf2_tumu(__VA_ARGS__)

#define	vloxei16_v_i16mf4(...) __riscv_vloxei16_v_i16mf4(__VA_ARGS__)

#define	vloxei16_v_i16mf4_m(...) __riscv_vloxei16_v_i16mf4_tumu(__VA_ARGS__)

#define	vloxei16_v_i32m1(...) __riscv_vloxei16_v_i32m1(__VA_ARGS__)

#define	vloxei16_v_i32m1_m(...) __riscv_vloxei16_v_i32m1_tumu(__VA_ARGS__)

#define	vloxei16_v_i32m2(...) __riscv_vloxei16_v_i32m2(__VA_ARGS__)

#define	vloxei16_v_i32m2_m(...) __riscv_vloxei16_v_i32m2_tumu(__VA_ARGS__)

#define	vloxei16_v_i32m4(...) __riscv_vloxei16_v_i32m4(__VA_ARGS__)

#define	vloxei16_v_i32m4_m(...) __riscv_vloxei16_v_i32m4_tumu(__VA_ARGS__)

#define	vloxei16_v_i32m8(...) __riscv_vloxei16_v_i32m8(__VA_ARGS__)

#define	vloxei16_v_i32m8_m(...) __riscv_vloxei16_v_i32m8_tumu(__VA_ARGS__)

#define	vloxei16_v_i32mf2(...) __riscv_vloxei16_v_i32mf2(__VA_ARGS__)

#define	vloxei16_v_i32mf2_m(...) __riscv_vloxei16_v_i32mf2_tumu(__VA_ARGS__)

#define	vloxei16_v_i64m1(...) __riscv_vloxei16_v_i64m1(__VA_ARGS__)

#define	vloxei16_v_i64m1_m(...) __riscv_vloxei16_v_i64m1_tumu(__VA_ARGS__)

#define	vloxei16_v_i64m2(...) __riscv_vloxei16_v_i64m2(__VA_ARGS__)

#define	vloxei16_v_i64m2_m(...) __riscv_vloxei16_v_i64m2_tumu(__VA_ARGS__)

#define	vloxei16_v_i64m4(...) __riscv_vloxei16_v_i64m4(__VA_ARGS__)

#define	vloxei16_v_i64m4_m(...) __riscv_vloxei16_v_i64m4_tumu(__VA_ARGS__)

#define	vloxei16_v_i64m8(...) __riscv_vloxei16_v_i64m8(__VA_ARGS__)

#define	vloxei16_v_i64m8_m(...) __riscv_vloxei16_v_i64m8_tumu(__VA_ARGS__)

#define	vloxei16_v_i8m1(...) __riscv_vloxei16_v_i8m1(__VA_ARGS__)

#define	vloxei16_v_i8m1_m(...) __riscv_vloxei16_v_i8m1_tumu(__VA_ARGS__)

#define	vloxei16_v_i8m2(...) __riscv_vloxei16_v_i8m2(__VA_ARGS__)

#define	vloxei16_v_i8m2_m(...) __riscv_vloxei16_v_i8m2_tumu(__VA_ARGS__)

#define	vloxei16_v_i8m4(...) __riscv_vloxei16_v_i8m4(__VA_ARGS__)

#define	vloxei16_v_i8m4_m(...) __riscv_vloxei16_v_i8m4_tumu(__VA_ARGS__)

#define	vloxei16_v_i8mf2(...) __riscv_vloxei16_v_i8mf2(__VA_ARGS__)

#define	vloxei16_v_i8mf2_m(...) __riscv_vloxei16_v_i8mf2_tumu(__VA_ARGS__)

#define	vloxei16_v_i8mf4(...) __riscv_vloxei16_v_i8mf4(__VA_ARGS__)

#define	vloxei16_v_i8mf4_m(...) __riscv_vloxei16_v_i8mf4_tumu(__VA_ARGS__)

#define	vloxei16_v_i8mf8(...) __riscv_vloxei16_v_i8mf8(__VA_ARGS__)

#define	vloxei16_v_i8mf8_m(...) __riscv_vloxei16_v_i8mf8_tumu(__VA_ARGS__)

#define	vloxei16_v_u16m1(...) __riscv_vloxei16_v_u16m1(__VA_ARGS__)

#define	vloxei16_v_u16m1_m(...) __riscv_vloxei16_v_u16m1_tumu(__VA_ARGS__)

#define	vloxei16_v_u16m2(...) __riscv_vloxei16_v_u16m2(__VA_ARGS__)

#define	vloxei16_v_u16m2_m(...) __riscv_vloxei16_v_u16m2_tumu(__VA_ARGS__)

#define	vloxei16_v_u16m4(...) __riscv_vloxei16_v_u16m4(__VA_ARGS__)

#define	vloxei16_v_u16m4_m(...) __riscv_vloxei16_v_u16m4_tumu(__VA_ARGS__)

#define	vloxei16_v_u16m8(...) __riscv_vloxei16_v_u16m8(__VA_ARGS__)

#define	vloxei16_v_u16m8_m(...) __riscv_vloxei16_v_u16m8_tumu(__VA_ARGS__)

#define	vloxei16_v_u16mf2(...) __riscv_vloxei16_v_u16mf2(__VA_ARGS__)

#define	vloxei16_v_u16mf2_m(...) __riscv_vloxei16_v_u16mf2_tumu(__VA_ARGS__)

#define	vloxei16_v_u16mf4(...) __riscv_vloxei16_v_u16mf4(__VA_ARGS__)

#define	vloxei16_v_u16mf4_m(...) __riscv_vloxei16_v_u16mf4_tumu(__VA_ARGS__)

#define	vloxei16_v_u32m1(...) __riscv_vloxei16_v_u32m1(__VA_ARGS__)

#define	vloxei16_v_u32m1_m(...) __riscv_vloxei16_v_u32m1_tumu(__VA_ARGS__)

#define	vloxei16_v_u32m2(...) __riscv_vloxei16_v_u32m2(__VA_ARGS__)

#define	vloxei16_v_u32m2_m(...) __riscv_vloxei16_v_u32m2_tumu(__VA_ARGS__)

#define	vloxei16_v_u32m4(...) __riscv_vloxei16_v_u32m4(__VA_ARGS__)

#define	vloxei16_v_u32m4_m(...) __riscv_vloxei16_v_u32m4_tumu(__VA_ARGS__)

#define	vloxei16_v_u32m8(...) __riscv_vloxei16_v_u32m8(__VA_ARGS__)

#define	vloxei16_v_u32m8_m(...) __riscv_vloxei16_v_u32m8_tumu(__VA_ARGS__)

#define	vloxei16_v_u32mf2(...) __riscv_vloxei16_v_u32mf2(__VA_ARGS__)

#define	vloxei16_v_u32mf2_m(...) __riscv_vloxei16_v_u32mf2_tumu(__VA_ARGS__)

#define	vloxei16_v_u64m1(...) __riscv_vloxei16_v_u64m1(__VA_ARGS__)

#define	vloxei16_v_u64m1_m(...) __riscv_vloxei16_v_u64m1_tumu(__VA_ARGS__)

#define	vloxei16_v_u64m2(...) __riscv_vloxei16_v_u64m2(__VA_ARGS__)

#define	vloxei16_v_u64m2_m(...) __riscv_vloxei16_v_u64m2_tumu(__VA_ARGS__)

#define	vloxei16_v_u64m4(...) __riscv_vloxei16_v_u64m4(__VA_ARGS__)

#define	vloxei16_v_u64m4_m(...) __riscv_vloxei16_v_u64m4_tumu(__VA_ARGS__)

#define	vloxei16_v_u64m8(...) __riscv_vloxei16_v_u64m8(__VA_ARGS__)

#define	vloxei16_v_u64m8_m(...) __riscv_vloxei16_v_u64m8_tumu(__VA_ARGS__)

#define	vloxei16_v_u8m1(...) __riscv_vloxei16_v_u8m1(__VA_ARGS__)

#define	vloxei16_v_u8m1_m(...) __riscv_vloxei16_v_u8m1_tumu(__VA_ARGS__)

#define	vloxei16_v_u8m2(...) __riscv_vloxei16_v_u8m2(__VA_ARGS__)

#define	vloxei16_v_u8m2_m(...) __riscv_vloxei16_v_u8m2_tumu(__VA_ARGS__)

#define	vloxei16_v_u8m4(...) __riscv_vloxei16_v_u8m4(__VA_ARGS__)

#define	vloxei16_v_u8m4_m(...) __riscv_vloxei16_v_u8m4_tumu(__VA_ARGS__)

#define	vloxei16_v_u8mf2(...) __riscv_vloxei16_v_u8mf2(__VA_ARGS__)

#define	vloxei16_v_u8mf2_m(...) __riscv_vloxei16_v_u8mf2_tumu(__VA_ARGS__)

#define	vloxei16_v_u8mf4(...) __riscv_vloxei16_v_u8mf4(__VA_ARGS__)

#define	vloxei16_v_u8mf4_m(...) __riscv_vloxei16_v_u8mf4_tumu(__VA_ARGS__)

#define	vloxei16_v_u8mf8(...) __riscv_vloxei16_v_u8mf8(__VA_ARGS__)

#define	vloxei16_v_u8mf8_m(...) __riscv_vloxei16_v_u8mf8_tumu(__VA_ARGS__)

#define	vloxei32_v_f16m1(...) __riscv_vloxei32_v_f16m1(__VA_ARGS__)

#define	vloxei32_v_f16m1_m(...) __riscv_vloxei32_v_f16m1_tumu(__VA_ARGS__)

#define	vloxei32_v_f16m2(...) __riscv_vloxei32_v_f16m2(__VA_ARGS__)

#define	vloxei32_v_f16m2_m(...) __riscv_vloxei32_v_f16m2_tumu(__VA_ARGS__)

#define	vloxei32_v_f16m4(...) __riscv_vloxei32_v_f16m4(__VA_ARGS__)

#define	vloxei32_v_f16m4_m(...) __riscv_vloxei32_v_f16m4_tumu(__VA_ARGS__)

#define	vloxei32_v_f16mf2(...) __riscv_vloxei32_v_f16mf2(__VA_ARGS__)

#define	vloxei32_v_f16mf2_m(...) __riscv_vloxei32_v_f16mf2_tumu(__VA_ARGS__)

#define	vloxei32_v_f16mf4(...) __riscv_vloxei32_v_f16mf4(__VA_ARGS__)

#define	vloxei32_v_f16mf4_m(...) __riscv_vloxei32_v_f16mf4_tumu(__VA_ARGS__)

#define	vloxei32_v_f32m1(...) __riscv_vloxei32_v_f32m1(__VA_ARGS__)

#define	vloxei32_v_f32m1_m(...) __riscv_vloxei32_v_f32m1_tumu(__VA_ARGS__)

#define	vloxei32_v_f32m2(...) __riscv_vloxei32_v_f32m2(__VA_ARGS__)

#define	vloxei32_v_f32m2_m(...) __riscv_vloxei32_v_f32m2_tumu(__VA_ARGS__)

#define	vloxei32_v_f32m4(...) __riscv_vloxei32_v_f32m4(__VA_ARGS__)

#define	vloxei32_v_f32m4_m(...) __riscv_vloxei32_v_f32m4_tumu(__VA_ARGS__)

#define	vloxei32_v_f32m8(...) __riscv_vloxei32_v_f32m8(__VA_ARGS__)

#define	vloxei32_v_f32m8_m(...) __riscv_vloxei32_v_f32m8_tumu(__VA_ARGS__)

#define	vloxei32_v_f32mf2(...) __riscv_vloxei32_v_f32mf2(__VA_ARGS__)

#define	vloxei32_v_f32mf2_m(...) __riscv_vloxei32_v_f32mf2_tumu(__VA_ARGS__)

#define	vloxei32_v_f64m1(...) __riscv_vloxei32_v_f64m1(__VA_ARGS__)

#define	vloxei32_v_f64m1_m(...) __riscv_vloxei32_v_f64m1_tumu(__VA_ARGS__)

#define	vloxei32_v_f64m2(...) __riscv_vloxei32_v_f64m2(__VA_ARGS__)

#define	vloxei32_v_f64m2_m(...) __riscv_vloxei32_v_f64m2_tumu(__VA_ARGS__)

#define	vloxei32_v_f64m4(...) __riscv_vloxei32_v_f64m4(__VA_ARGS__)

#define	vloxei32_v_f64m4_m(...) __riscv_vloxei32_v_f64m4_tumu(__VA_ARGS__)

#define	vloxei32_v_f64m8(...) __riscv_vloxei32_v_f64m8(__VA_ARGS__)

#define	vloxei32_v_f64m8_m(...) __riscv_vloxei32_v_f64m8_tumu(__VA_ARGS__)

#define	vloxei32_v_i16m1(...) __riscv_vloxei32_v_i16m1(__VA_ARGS__)

#define	vloxei32_v_i16m1_m(...) __riscv_vloxei32_v_i16m1_tumu(__VA_ARGS__)

#define	vloxei32_v_i16m2(...) __riscv_vloxei32_v_i16m2(__VA_ARGS__)

#define	vloxei32_v_i16m2_m(...) __riscv_vloxei32_v_i16m2_tumu(__VA_ARGS__)

#define	vloxei32_v_i16m4(...) __riscv_vloxei32_v_i16m4(__VA_ARGS__)

#define	vloxei32_v_i16m4_m(...) __riscv_vloxei32_v_i16m4_tumu(__VA_ARGS__)

#define	vloxei32_v_i16mf2(...) __riscv_vloxei32_v_i16mf2(__VA_ARGS__)

#define	vloxei32_v_i16mf2_m(...) __riscv_vloxei32_v_i16mf2_tumu(__VA_ARGS__)

#define	vloxei32_v_i16mf4(...) __riscv_vloxei32_v_i16mf4(__VA_ARGS__)

#define	vloxei32_v_i16mf4_m(...) __riscv_vloxei32_v_i16mf4_tumu(__VA_ARGS__)

#define	vloxei32_v_i32m1(...) __riscv_vloxei32_v_i32m1(__VA_ARGS__)

#define	vloxei32_v_i32m1_m(...) __riscv_vloxei32_v_i32m1_tumu(__VA_ARGS__)

#define	vloxei32_v_i32m2(...) __riscv_vloxei32_v_i32m2(__VA_ARGS__)

#define	vloxei32_v_i32m2_m(...) __riscv_vloxei32_v_i32m2_tumu(__VA_ARGS__)

#define	vloxei32_v_i32m4(...) __riscv_vloxei32_v_i32m4(__VA_ARGS__)

#define	vloxei32_v_i32m4_m(...) __riscv_vloxei32_v_i32m4_tumu(__VA_ARGS__)

#define	vloxei32_v_i32m8(...) __riscv_vloxei32_v_i32m8(__VA_ARGS__)

#define	vloxei32_v_i32m8_m(...) __riscv_vloxei32_v_i32m8_tumu(__VA_ARGS__)

#define	vloxei32_v_i32mf2(...) __riscv_vloxei32_v_i32mf2(__VA_ARGS__)

#define	vloxei32_v_i32mf2_m(...) __riscv_vloxei32_v_i32mf2_tumu(__VA_ARGS__)

#define	vloxei32_v_i64m1(...) __riscv_vloxei32_v_i64m1(__VA_ARGS__)

#define	vloxei32_v_i64m1_m(...) __riscv_vloxei32_v_i64m1_tumu(__VA_ARGS__)

#define	vloxei32_v_i64m2(...) __riscv_vloxei32_v_i64m2(__VA_ARGS__)

#define	vloxei32_v_i64m2_m(...) __riscv_vloxei32_v_i64m2_tumu(__VA_ARGS__)

#define	vloxei32_v_i64m4(...) __riscv_vloxei32_v_i64m4(__VA_ARGS__)

#define	vloxei32_v_i64m4_m(...) __riscv_vloxei32_v_i64m4_tumu(__VA_ARGS__)

#define	vloxei32_v_i64m8(...) __riscv_vloxei32_v_i64m8(__VA_ARGS__)

#define	vloxei32_v_i64m8_m(...) __riscv_vloxei32_v_i64m8_tumu(__VA_ARGS__)

#define	vloxei32_v_i8m1(...) __riscv_vloxei32_v_i8m1(__VA_ARGS__)

#define	vloxei32_v_i8m1_m(...) __riscv_vloxei32_v_i8m1_tumu(__VA_ARGS__)

#define	vloxei32_v_i8m2(...) __riscv_vloxei32_v_i8m2(__VA_ARGS__)

#define	vloxei32_v_i8m2_m(...) __riscv_vloxei32_v_i8m2_tumu(__VA_ARGS__)

#define	vloxei32_v_i8mf2(...) __riscv_vloxei32_v_i8mf2(__VA_ARGS__)

#define	vloxei32_v_i8mf2_m(...) __riscv_vloxei32_v_i8mf2_tumu(__VA_ARGS__)

#define	vloxei32_v_i8mf4(...) __riscv_vloxei32_v_i8mf4(__VA_ARGS__)

#define	vloxei32_v_i8mf4_m(...) __riscv_vloxei32_v_i8mf4_tumu(__VA_ARGS__)

#define	vloxei32_v_i8mf8(...) __riscv_vloxei32_v_i8mf8(__VA_ARGS__)

#define	vloxei32_v_i8mf8_m(...) __riscv_vloxei32_v_i8mf8_tumu(__VA_ARGS__)

#define	vloxei32_v_u16m1(...) __riscv_vloxei32_v_u16m1(__VA_ARGS__)

#define	vloxei32_v_u16m1_m(...) __riscv_vloxei32_v_u16m1_tumu(__VA_ARGS__)

#define	vloxei32_v_u16m2(...) __riscv_vloxei32_v_u16m2(__VA_ARGS__)

#define	vloxei32_v_u16m2_m(...) __riscv_vloxei32_v_u16m2_tumu(__VA_ARGS__)

#define	vloxei32_v_u16m4(...) __riscv_vloxei32_v_u16m4(__VA_ARGS__)

#define	vloxei32_v_u16m4_m(...) __riscv_vloxei32_v_u16m4_tumu(__VA_ARGS__)

#define	vloxei32_v_u16mf2(...) __riscv_vloxei32_v_u16mf2(__VA_ARGS__)

#define	vloxei32_v_u16mf2_m(...) __riscv_vloxei32_v_u16mf2_tumu(__VA_ARGS__)

#define	vloxei32_v_u16mf4(...) __riscv_vloxei32_v_u16mf4(__VA_ARGS__)

#define	vloxei32_v_u16mf4_m(...) __riscv_vloxei32_v_u16mf4_tumu(__VA_ARGS__)

#define	vloxei32_v_u32m1(...) __riscv_vloxei32_v_u32m1(__VA_ARGS__)

#define	vloxei32_v_u32m1_m(...) __riscv_vloxei32_v_u32m1_tumu(__VA_ARGS__)

#define	vloxei32_v_u32m2(...) __riscv_vloxei32_v_u32m2(__VA_ARGS__)

#define	vloxei32_v_u32m2_m(...) __riscv_vloxei32_v_u32m2_tumu(__VA_ARGS__)

#define	vloxei32_v_u32m4(...) __riscv_vloxei32_v_u32m4(__VA_ARGS__)

#define	vloxei32_v_u32m4_m(...) __riscv_vloxei32_v_u32m4_tumu(__VA_ARGS__)

#define	vloxei32_v_u32m8(...) __riscv_vloxei32_v_u32m8(__VA_ARGS__)

#define	vloxei32_v_u32m8_m(...) __riscv_vloxei32_v_u32m8_tumu(__VA_ARGS__)

#define	vloxei32_v_u32mf2(...) __riscv_vloxei32_v_u32mf2(__VA_ARGS__)

#define	vloxei32_v_u32mf2_m(...) __riscv_vloxei32_v_u32mf2_tumu(__VA_ARGS__)

#define	vloxei32_v_u64m1(...) __riscv_vloxei32_v_u64m1(__VA_ARGS__)

#define	vloxei32_v_u64m1_m(...) __riscv_vloxei32_v_u64m1_tumu(__VA_ARGS__)

#define	vloxei32_v_u64m2(...) __riscv_vloxei32_v_u64m2(__VA_ARGS__)

#define	vloxei32_v_u64m2_m(...) __riscv_vloxei32_v_u64m2_tumu(__VA_ARGS__)

#define	vloxei32_v_u64m4(...) __riscv_vloxei32_v_u64m4(__VA_ARGS__)

#define	vloxei32_v_u64m4_m(...) __riscv_vloxei32_v_u64m4_tumu(__VA_ARGS__)

#define	vloxei32_v_u64m8(...) __riscv_vloxei32_v_u64m8(__VA_ARGS__)

#define	vloxei32_v_u64m8_m(...) __riscv_vloxei32_v_u64m8_tumu(__VA_ARGS__)

#define	vloxei32_v_u8m1(...) __riscv_vloxei32_v_u8m1(__VA_ARGS__)

#define	vloxei32_v_u8m1_m(...) __riscv_vloxei32_v_u8m1_tumu(__VA_ARGS__)

#define	vloxei32_v_u8m2(...) __riscv_vloxei32_v_u8m2(__VA_ARGS__)

#define	vloxei32_v_u8m2_m(...) __riscv_vloxei32_v_u8m2_tumu(__VA_ARGS__)

#define	vloxei32_v_u8mf2(...) __riscv_vloxei32_v_u8mf2(__VA_ARGS__)

#define	vloxei32_v_u8mf2_m(...) __riscv_vloxei32_v_u8mf2_tumu(__VA_ARGS__)

#define	vloxei32_v_u8mf4(...) __riscv_vloxei32_v_u8mf4(__VA_ARGS__)

#define	vloxei32_v_u8mf4_m(...) __riscv_vloxei32_v_u8mf4_tumu(__VA_ARGS__)

#define	vloxei32_v_u8mf8(...) __riscv_vloxei32_v_u8mf8(__VA_ARGS__)

#define	vloxei32_v_u8mf8_m(...) __riscv_vloxei32_v_u8mf8_tumu(__VA_ARGS__)

#define	vloxei64_v_f16m1(...) __riscv_vloxei64_v_f16m1(__VA_ARGS__)

#define	vloxei64_v_f16m1_m(...) __riscv_vloxei64_v_f16m1_tumu(__VA_ARGS__)

#define	vloxei64_v_f16m2(...) __riscv_vloxei64_v_f16m2(__VA_ARGS__)

#define	vloxei64_v_f16m2_m(...) __riscv_vloxei64_v_f16m2_tumu(__VA_ARGS__)

#define	vloxei64_v_f16mf2(...) __riscv_vloxei64_v_f16mf2(__VA_ARGS__)

#define	vloxei64_v_f16mf2_m(...) __riscv_vloxei64_v_f16mf2_tumu(__VA_ARGS__)

#define	vloxei64_v_f16mf4(...) __riscv_vloxei64_v_f16mf4(__VA_ARGS__)

#define	vloxei64_v_f16mf4_m(...) __riscv_vloxei64_v_f16mf4_tumu(__VA_ARGS__)

#define	vloxei64_v_f32m1(...) __riscv_vloxei64_v_f32m1(__VA_ARGS__)

#define	vloxei64_v_f32m1_m(...) __riscv_vloxei64_v_f32m1_tumu(__VA_ARGS__)

#define	vloxei64_v_f32m2(...) __riscv_vloxei64_v_f32m2(__VA_ARGS__)

#define	vloxei64_v_f32m2_m(...) __riscv_vloxei64_v_f32m2_tumu(__VA_ARGS__)

#define	vloxei64_v_f32m4(...) __riscv_vloxei64_v_f32m4(__VA_ARGS__)

#define	vloxei64_v_f32m4_m(...) __riscv_vloxei64_v_f32m4_tumu(__VA_ARGS__)

#define	vloxei64_v_f32mf2(...) __riscv_vloxei64_v_f32mf2(__VA_ARGS__)

#define	vloxei64_v_f32mf2_m(...) __riscv_vloxei64_v_f32mf2_tumu(__VA_ARGS__)

#define	vloxei64_v_f64m1(...) __riscv_vloxei64_v_f64m1(__VA_ARGS__)

#define	vloxei64_v_f64m1_m(...) __riscv_vloxei64_v_f64m1_tumu(__VA_ARGS__)

#define	vloxei64_v_f64m2(...) __riscv_vloxei64_v_f64m2(__VA_ARGS__)

#define	vloxei64_v_f64m2_m(...) __riscv_vloxei64_v_f64m2_tumu(__VA_ARGS__)

#define	vloxei64_v_f64m4(...) __riscv_vloxei64_v_f64m4(__VA_ARGS__)

#define	vloxei64_v_f64m4_m(...) __riscv_vloxei64_v_f64m4_tumu(__VA_ARGS__)

#define	vloxei64_v_f64m8(...) __riscv_vloxei64_v_f64m8(__VA_ARGS__)

#define	vloxei64_v_f64m8_m(...) __riscv_vloxei64_v_f64m8_tumu(__VA_ARGS__)

#define	vloxei64_v_i16m1(...) __riscv_vloxei64_v_i16m1(__VA_ARGS__)

#define	vloxei64_v_i16m1_m(...) __riscv_vloxei64_v_i16m1_tumu(__VA_ARGS__)

#define	vloxei64_v_i16m2(...) __riscv_vloxei64_v_i16m2(__VA_ARGS__)

#define	vloxei64_v_i16m2_m(...) __riscv_vloxei64_v_i16m2_tumu(__VA_ARGS__)

#define	vloxei64_v_i16mf2(...) __riscv_vloxei64_v_i16mf2(__VA_ARGS__)

#define	vloxei64_v_i16mf2_m(...) __riscv_vloxei64_v_i16mf2_tumu(__VA_ARGS__)

#define	vloxei64_v_i16mf4(...) __riscv_vloxei64_v_i16mf4(__VA_ARGS__)

#define	vloxei64_v_i16mf4_m(...) __riscv_vloxei64_v_i16mf4_tumu(__VA_ARGS__)

#define	vloxei64_v_i32m1(...) __riscv_vloxei64_v_i32m1(__VA_ARGS__)

#define	vloxei64_v_i32m1_m(...) __riscv_vloxei64_v_i32m1_tumu(__VA_ARGS__)

#define	vloxei64_v_i32m2(...) __riscv_vloxei64_v_i32m2(__VA_ARGS__)

#define	vloxei64_v_i32m2_m(...) __riscv_vloxei64_v_i32m2_tumu(__VA_ARGS__)

#define	vloxei64_v_i32m4(...) __riscv_vloxei64_v_i32m4(__VA_ARGS__)

#define	vloxei64_v_i32m4_m(...) __riscv_vloxei64_v_i32m4_tumu(__VA_ARGS__)

#define	vloxei64_v_i32mf2(...) __riscv_vloxei64_v_i32mf2(__VA_ARGS__)

#define	vloxei64_v_i32mf2_m(...) __riscv_vloxei64_v_i32mf2_tumu(__VA_ARGS__)

#define	vloxei64_v_i64m1(...) __riscv_vloxei64_v_i64m1(__VA_ARGS__)

#define	vloxei64_v_i64m1_m(...) __riscv_vloxei64_v_i64m1_tumu(__VA_ARGS__)

#define	vloxei64_v_i64m2(...) __riscv_vloxei64_v_i64m2(__VA_ARGS__)

#define	vloxei64_v_i64m2_m(...) __riscv_vloxei64_v_i64m2_tumu(__VA_ARGS__)

#define	vloxei64_v_i64m4(...) __riscv_vloxei64_v_i64m4(__VA_ARGS__)

#define	vloxei64_v_i64m4_m(...) __riscv_vloxei64_v_i64m4_tumu(__VA_ARGS__)

#define	vloxei64_v_i64m8(...) __riscv_vloxei64_v_i64m8(__VA_ARGS__)

#define	vloxei64_v_i64m8_m(...) __riscv_vloxei64_v_i64m8_tumu(__VA_ARGS__)

#define	vloxei64_v_i8m1(...) __riscv_vloxei64_v_i8m1(__VA_ARGS__)

#define	vloxei64_v_i8m1_m(...) __riscv_vloxei64_v_i8m1_tumu(__VA_ARGS__)

#define	vloxei64_v_i8mf2(...) __riscv_vloxei64_v_i8mf2(__VA_ARGS__)

#define	vloxei64_v_i8mf2_m(...) __riscv_vloxei64_v_i8mf2_tumu(__VA_ARGS__)

#define	vloxei64_v_i8mf4(...) __riscv_vloxei64_v_i8mf4(__VA_ARGS__)

#define	vloxei64_v_i8mf4_m(...) __riscv_vloxei64_v_i8mf4_tumu(__VA_ARGS__)

#define	vloxei64_v_i8mf8(...) __riscv_vloxei64_v_i8mf8(__VA_ARGS__)

#define	vloxei64_v_i8mf8_m(...) __riscv_vloxei64_v_i8mf8_tumu(__VA_ARGS__)

#define	vloxei64_v_u16m1(...) __riscv_vloxei64_v_u16m1(__VA_ARGS__)

#define	vloxei64_v_u16m1_m(...) __riscv_vloxei64_v_u16m1_tumu(__VA_ARGS__)

#define	vloxei64_v_u16m2(...) __riscv_vloxei64_v_u16m2(__VA_ARGS__)

#define	vloxei64_v_u16m2_m(...) __riscv_vloxei64_v_u16m2_tumu(__VA_ARGS__)

#define	vloxei64_v_u16mf2(...) __riscv_vloxei64_v_u16mf2(__VA_ARGS__)

#define	vloxei64_v_u16mf2_m(...) __riscv_vloxei64_v_u16mf2_tumu(__VA_ARGS__)

#define	vloxei64_v_u16mf4(...) __riscv_vloxei64_v_u16mf4(__VA_ARGS__)

#define	vloxei64_v_u16mf4_m(...) __riscv_vloxei64_v_u16mf4_tumu(__VA_ARGS__)

#define	vloxei64_v_u32m1(...) __riscv_vloxei64_v_u32m1(__VA_ARGS__)

#define	vloxei64_v_u32m1_m(...) __riscv_vloxei64_v_u32m1_tumu(__VA_ARGS__)

#define	vloxei64_v_u32m2(...) __riscv_vloxei64_v_u32m2(__VA_ARGS__)

#define	vloxei64_v_u32m2_m(...) __riscv_vloxei64_v_u32m2_tumu(__VA_ARGS__)

#define	vloxei64_v_u32m4(...) __riscv_vloxei64_v_u32m4(__VA_ARGS__)

#define	vloxei64_v_u32m4_m(...) __riscv_vloxei64_v_u32m4_tumu(__VA_ARGS__)

#define	vloxei64_v_u32mf2(...) __riscv_vloxei64_v_u32mf2(__VA_ARGS__)

#define	vloxei64_v_u32mf2_m(...) __riscv_vloxei64_v_u32mf2_tumu(__VA_ARGS__)

#define	vloxei64_v_u64m1(...) __riscv_vloxei64_v_u64m1(__VA_ARGS__)

#define	vloxei64_v_u64m1_m(...) __riscv_vloxei64_v_u64m1_tumu(__VA_ARGS__)

#define	vloxei64_v_u64m2(...) __riscv_vloxei64_v_u64m2(__VA_ARGS__)

#define	vloxei64_v_u64m2_m(...) __riscv_vloxei64_v_u64m2_tumu(__VA_ARGS__)

#define	vloxei64_v_u64m4(...) __riscv_vloxei64_v_u64m4(__VA_ARGS__)

#define	vloxei64_v_u64m4_m(...) __riscv_vloxei64_v_u64m4_tumu(__VA_ARGS__)

#define	vloxei64_v_u64m8(...) __riscv_vloxei64_v_u64m8(__VA_ARGS__)

#define	vloxei64_v_u64m8_m(...) __riscv_vloxei64_v_u64m8_tumu(__VA_ARGS__)

#define	vloxei64_v_u8m1(...) __riscv_vloxei64_v_u8m1(__VA_ARGS__)

#define	vloxei64_v_u8m1_m(...) __riscv_vloxei64_v_u8m1_tumu(__VA_ARGS__)

#define	vloxei64_v_u8mf2(...) __riscv_vloxei64_v_u8mf2(__VA_ARGS__)

#define	vloxei64_v_u8mf2_m(...) __riscv_vloxei64_v_u8mf2_tumu(__VA_ARGS__)

#define	vloxei64_v_u8mf4(...) __riscv_vloxei64_v_u8mf4(__VA_ARGS__)

#define	vloxei64_v_u8mf4_m(...) __riscv_vloxei64_v_u8mf4_tumu(__VA_ARGS__)

#define	vloxei64_v_u8mf8(...) __riscv_vloxei64_v_u8mf8(__VA_ARGS__)

#define	vloxei64_v_u8mf8_m(...) __riscv_vloxei64_v_u8mf8_tumu(__VA_ARGS__)

#define	vloxei8_v_f16m1(...) __riscv_vloxei8_v_f16m1(__VA_ARGS__)

#define	vloxei8_v_f16m1_m(...) __riscv_vloxei8_v_f16m1_tumu(__VA_ARGS__)

#define	vloxei8_v_f16m2(...) __riscv_vloxei8_v_f16m2(__VA_ARGS__)

#define	vloxei8_v_f16m2_m(...) __riscv_vloxei8_v_f16m2_tumu(__VA_ARGS__)

#define	vloxei8_v_f16m4(...) __riscv_vloxei8_v_f16m4(__VA_ARGS__)

#define	vloxei8_v_f16m4_m(...) __riscv_vloxei8_v_f16m4_tumu(__VA_ARGS__)

#define	vloxei8_v_f16m8(...) __riscv_vloxei8_v_f16m8(__VA_ARGS__)

#define	vloxei8_v_f16m8_m(...) __riscv_vloxei8_v_f16m8_tumu(__VA_ARGS__)

#define	vloxei8_v_f16mf2(...) __riscv_vloxei8_v_f16mf2(__VA_ARGS__)

#define	vloxei8_v_f16mf2_m(...) __riscv_vloxei8_v_f16mf2_tumu(__VA_ARGS__)

#define	vloxei8_v_f16mf4(...) __riscv_vloxei8_v_f16mf4(__VA_ARGS__)

#define	vloxei8_v_f16mf4_m(...) __riscv_vloxei8_v_f16mf4_tumu(__VA_ARGS__)

#define	vloxei8_v_f32m1(...) __riscv_vloxei8_v_f32m1(__VA_ARGS__)

#define	vloxei8_v_f32m1_m(...) __riscv_vloxei8_v_f32m1_tumu(__VA_ARGS__)

#define	vloxei8_v_f32m2(...) __riscv_vloxei8_v_f32m2(__VA_ARGS__)

#define	vloxei8_v_f32m2_m(...) __riscv_vloxei8_v_f32m2_tumu(__VA_ARGS__)

#define	vloxei8_v_f32m4(...) __riscv_vloxei8_v_f32m4(__VA_ARGS__)

#define	vloxei8_v_f32m4_m(...) __riscv_vloxei8_v_f32m4_tumu(__VA_ARGS__)

#define	vloxei8_v_f32m8(...) __riscv_vloxei8_v_f32m8(__VA_ARGS__)

#define	vloxei8_v_f32m8_m(...) __riscv_vloxei8_v_f32m8_tumu(__VA_ARGS__)

#define	vloxei8_v_f32mf2(...) __riscv_vloxei8_v_f32mf2(__VA_ARGS__)

#define	vloxei8_v_f32mf2_m(...) __riscv_vloxei8_v_f32mf2_tumu(__VA_ARGS__)

#define	vloxei8_v_f64m1(...) __riscv_vloxei8_v_f64m1(__VA_ARGS__)

#define	vloxei8_v_f64m1_m(...) __riscv_vloxei8_v_f64m1_tumu(__VA_ARGS__)

#define	vloxei8_v_f64m2(...) __riscv_vloxei8_v_f64m2(__VA_ARGS__)

#define	vloxei8_v_f64m2_m(...) __riscv_vloxei8_v_f64m2_tumu(__VA_ARGS__)

#define	vloxei8_v_f64m4(...) __riscv_vloxei8_v_f64m4(__VA_ARGS__)

#define	vloxei8_v_f64m4_m(...) __riscv_vloxei8_v_f64m4_tumu(__VA_ARGS__)

#define	vloxei8_v_f64m8(...) __riscv_vloxei8_v_f64m8(__VA_ARGS__)

#define	vloxei8_v_f64m8_m(...) __riscv_vloxei8_v_f64m8_tumu(__VA_ARGS__)

#define	vloxei8_v_i16m1(...) __riscv_vloxei8_v_i16m1(__VA_ARGS__)

#define	vloxei8_v_i16m1_m(...) __riscv_vloxei8_v_i16m1_tumu(__VA_ARGS__)

#define	vloxei8_v_i16m2(...) __riscv_vloxei8_v_i16m2(__VA_ARGS__)

#define	vloxei8_v_i16m2_m(...) __riscv_vloxei8_v_i16m2_tumu(__VA_ARGS__)

#define	vloxei8_v_i16m4(...) __riscv_vloxei8_v_i16m4(__VA_ARGS__)

#define	vloxei8_v_i16m4_m(...) __riscv_vloxei8_v_i16m4_tumu(__VA_ARGS__)

#define	vloxei8_v_i16m8(...) __riscv_vloxei8_v_i16m8(__VA_ARGS__)

#define	vloxei8_v_i16m8_m(...) __riscv_vloxei8_v_i16m8_tumu(__VA_ARGS__)

#define	vloxei8_v_i16mf2(...) __riscv_vloxei8_v_i16mf2(__VA_ARGS__)

#define	vloxei8_v_i16mf2_m(...) __riscv_vloxei8_v_i16mf2_tumu(__VA_ARGS__)

#define	vloxei8_v_i16mf4(...) __riscv_vloxei8_v_i16mf4(__VA_ARGS__)

#define	vloxei8_v_i16mf4_m(...) __riscv_vloxei8_v_i16mf4_tumu(__VA_ARGS__)

#define	vloxei8_v_i32m1(...) __riscv_vloxei8_v_i32m1(__VA_ARGS__)

#define	vloxei8_v_i32m1_m(...) __riscv_vloxei8_v_i32m1_tumu(__VA_ARGS__)

#define	vloxei8_v_i32m2(...) __riscv_vloxei8_v_i32m2(__VA_ARGS__)

#define	vloxei8_v_i32m2_m(...) __riscv_vloxei8_v_i32m2_tumu(__VA_ARGS__)

#define	vloxei8_v_i32m4(...) __riscv_vloxei8_v_i32m4(__VA_ARGS__)

#define	vloxei8_v_i32m4_m(...) __riscv_vloxei8_v_i32m4_tumu(__VA_ARGS__)

#define	vloxei8_v_i32m8(...) __riscv_vloxei8_v_i32m8(__VA_ARGS__)

#define	vloxei8_v_i32m8_m(...) __riscv_vloxei8_v_i32m8_tumu(__VA_ARGS__)

#define	vloxei8_v_i32mf2(...) __riscv_vloxei8_v_i32mf2(__VA_ARGS__)

#define	vloxei8_v_i32mf2_m(...) __riscv_vloxei8_v_i32mf2_tumu(__VA_ARGS__)

#define	vloxei8_v_i64m1(...) __riscv_vloxei8_v_i64m1(__VA_ARGS__)

#define	vloxei8_v_i64m1_m(...) __riscv_vloxei8_v_i64m1_tumu(__VA_ARGS__)

#define	vloxei8_v_i64m2(...) __riscv_vloxei8_v_i64m2(__VA_ARGS__)

#define	vloxei8_v_i64m2_m(...) __riscv_vloxei8_v_i64m2_tumu(__VA_ARGS__)

#define	vloxei8_v_i64m4(...) __riscv_vloxei8_v_i64m4(__VA_ARGS__)

#define	vloxei8_v_i64m4_m(...) __riscv_vloxei8_v_i64m4_tumu(__VA_ARGS__)

#define	vloxei8_v_i64m8(...) __riscv_vloxei8_v_i64m8(__VA_ARGS__)

#define	vloxei8_v_i64m8_m(...) __riscv_vloxei8_v_i64m8_tumu(__VA_ARGS__)

#define	vloxei8_v_i8m1(...) __riscv_vloxei8_v_i8m1(__VA_ARGS__)

#define	vloxei8_v_i8m1_m(...) __riscv_vloxei8_v_i8m1_tumu(__VA_ARGS__)

#define	vloxei8_v_i8m2(...) __riscv_vloxei8_v_i8m2(__VA_ARGS__)

#define	vloxei8_v_i8m2_m(...) __riscv_vloxei8_v_i8m2_tumu(__VA_ARGS__)

#define	vloxei8_v_i8m4(...) __riscv_vloxei8_v_i8m4(__VA_ARGS__)

#define	vloxei8_v_i8m4_m(...) __riscv_vloxei8_v_i8m4_tumu(__VA_ARGS__)

#define	vloxei8_v_i8m8(...) __riscv_vloxei8_v_i8m8(__VA_ARGS__)

#define	vloxei8_v_i8m8_m(...) __riscv_vloxei8_v_i8m8_tumu(__VA_ARGS__)

#define	vloxei8_v_i8mf2(...) __riscv_vloxei8_v_i8mf2(__VA_ARGS__)

#define	vloxei8_v_i8mf2_m(...) __riscv_vloxei8_v_i8mf2_tumu(__VA_ARGS__)

#define	vloxei8_v_i8mf4(...) __riscv_vloxei8_v_i8mf4(__VA_ARGS__)

#define	vloxei8_v_i8mf4_m(...) __riscv_vloxei8_v_i8mf4_tumu(__VA_ARGS__)

#define	vloxei8_v_i8mf8(...) __riscv_vloxei8_v_i8mf8(__VA_ARGS__)

#define	vloxei8_v_i8mf8_m(...) __riscv_vloxei8_v_i8mf8_tumu(__VA_ARGS__)

#define	vloxei8_v_u16m1(...) __riscv_vloxei8_v_u16m1(__VA_ARGS__)

#define	vloxei8_v_u16m1_m(...) __riscv_vloxei8_v_u16m1_tumu(__VA_ARGS__)

#define	vloxei8_v_u16m2(...) __riscv_vloxei8_v_u16m2(__VA_ARGS__)

#define	vloxei8_v_u16m2_m(...) __riscv_vloxei8_v_u16m2_tumu(__VA_ARGS__)

#define	vloxei8_v_u16m4(...) __riscv_vloxei8_v_u16m4(__VA_ARGS__)

#define	vloxei8_v_u16m4_m(...) __riscv_vloxei8_v_u16m4_tumu(__VA_ARGS__)

#define	vloxei8_v_u16m8(...) __riscv_vloxei8_v_u16m8(__VA_ARGS__)

#define	vloxei8_v_u16m8_m(...) __riscv_vloxei8_v_u16m8_tumu(__VA_ARGS__)

#define	vloxei8_v_u16mf2(...) __riscv_vloxei8_v_u16mf2(__VA_ARGS__)

#define	vloxei8_v_u16mf2_m(...) __riscv_vloxei8_v_u16mf2_tumu(__VA_ARGS__)

#define	vloxei8_v_u16mf4(...) __riscv_vloxei8_v_u16mf4(__VA_ARGS__)

#define	vloxei8_v_u16mf4_m(...) __riscv_vloxei8_v_u16mf4_tumu(__VA_ARGS__)

#define	vloxei8_v_u32m1(...) __riscv_vloxei8_v_u32m1(__VA_ARGS__)

#define	vloxei8_v_u32m1_m(...) __riscv_vloxei8_v_u32m1_tumu(__VA_ARGS__)

#define	vloxei8_v_u32m2(...) __riscv_vloxei8_v_u32m2(__VA_ARGS__)

#define	vloxei8_v_u32m2_m(...) __riscv_vloxei8_v_u32m2_tumu(__VA_ARGS__)

#define	vloxei8_v_u32m4(...) __riscv_vloxei8_v_u32m4(__VA_ARGS__)

#define	vloxei8_v_u32m4_m(...) __riscv_vloxei8_v_u32m4_tumu(__VA_ARGS__)

#define	vloxei8_v_u32m8(...) __riscv_vloxei8_v_u32m8(__VA_ARGS__)

#define	vloxei8_v_u32m8_m(...) __riscv_vloxei8_v_u32m8_tumu(__VA_ARGS__)

#define	vloxei8_v_u32mf2(...) __riscv_vloxei8_v_u32mf2(__VA_ARGS__)

#define	vloxei8_v_u32mf2_m(...) __riscv_vloxei8_v_u32mf2_tumu(__VA_ARGS__)

#define	vloxei8_v_u64m1(...) __riscv_vloxei8_v_u64m1(__VA_ARGS__)

#define	vloxei8_v_u64m1_m(...) __riscv_vloxei8_v_u64m1_tumu(__VA_ARGS__)

#define	vloxei8_v_u64m2(...) __riscv_vloxei8_v_u64m2(__VA_ARGS__)

#define	vloxei8_v_u64m2_m(...) __riscv_vloxei8_v_u64m2_tumu(__VA_ARGS__)

#define	vloxei8_v_u64m4(...) __riscv_vloxei8_v_u64m4(__VA_ARGS__)

#define	vloxei8_v_u64m4_m(...) __riscv_vloxei8_v_u64m4_tumu(__VA_ARGS__)

#define	vloxei8_v_u64m8(...) __riscv_vloxei8_v_u64m8(__VA_ARGS__)

#define	vloxei8_v_u64m8_m(...) __riscv_vloxei8_v_u64m8_tumu(__VA_ARGS__)

#define	vloxei8_v_u8m1(...) __riscv_vloxei8_v_u8m1(__VA_ARGS__)

#define	vloxei8_v_u8m1_m(...) __riscv_vloxei8_v_u8m1_tumu(__VA_ARGS__)

#define	vloxei8_v_u8m2(...) __riscv_vloxei8_v_u8m2(__VA_ARGS__)

#define	vloxei8_v_u8m2_m(...) __riscv_vloxei8_v_u8m2_tumu(__VA_ARGS__)

#define	vloxei8_v_u8m4(...) __riscv_vloxei8_v_u8m4(__VA_ARGS__)

#define	vloxei8_v_u8m4_m(...) __riscv_vloxei8_v_u8m4_tumu(__VA_ARGS__)

#define	vloxei8_v_u8m8(...) __riscv_vloxei8_v_u8m8(__VA_ARGS__)

#define	vloxei8_v_u8m8_m(...) __riscv_vloxei8_v_u8m8_tumu(__VA_ARGS__)

#define	vloxei8_v_u8mf2(...) __riscv_vloxei8_v_u8mf2(__VA_ARGS__)

#define	vloxei8_v_u8mf2_m(...) __riscv_vloxei8_v_u8mf2_tumu(__VA_ARGS__)

#define	vloxei8_v_u8mf4(...) __riscv_vloxei8_v_u8mf4(__VA_ARGS__)

#define	vloxei8_v_u8mf4_m(...) __riscv_vloxei8_v_u8mf4_tumu(__VA_ARGS__)

#define	vloxei8_v_u8mf8(...) __riscv_vloxei8_v_u8mf8(__VA_ARGS__)

#define	vloxei8_v_u8mf8_m(...) __riscv_vloxei8_v_u8mf8_tumu(__VA_ARGS__)

#define	vloxseg2ei16_v_f16m1(...) __riscv_vloxseg2ei16_v_f16m1(__VA_ARGS__)

#define	vloxseg2ei16_v_f16m1_m(...) __riscv_vloxseg2ei16_v_f16m1_tumu(__VA_ARGS__)

#define	vloxseg2ei16_v_f16m2(...) __riscv_vloxseg2ei16_v_f16m2(__VA_ARGS__)

#define	vloxseg2ei16_v_f16m2_m(...) __riscv_vloxseg2ei16_v_f16m2_tumu(__VA_ARGS__)

#define	vloxseg2ei16_v_f16m4(...) __riscv_vloxseg2ei16_v_f16m4(__VA_ARGS__)

#define	vloxseg2ei16_v_f16m4_m(...) __riscv_vloxseg2ei16_v_f16m4_tumu(__VA_ARGS__)

#define	vloxseg2ei16_v_f16mf2(...) __riscv_vloxseg2ei16_v_f16mf2(__VA_ARGS__)

#define	vloxseg2ei16_v_f16mf2_m(...) __riscv_vloxseg2ei16_v_f16mf2_tumu(__VA_ARGS__)

#define	vloxseg2ei16_v_f16mf4(...) __riscv_vloxseg2ei16_v_f16mf4(__VA_ARGS__)

#define	vloxseg2ei16_v_f16mf4_m(...) __riscv_vloxseg2ei16_v_f16mf4_tumu(__VA_ARGS__)

#define	vloxseg2ei16_v_f32m1(...) __riscv_vloxseg2ei16_v_f32m1(__VA_ARGS__)

#define	vloxseg2ei16_v_f32m1_m(...) __riscv_vloxseg2ei16_v_f32m1_tumu(__VA_ARGS__)

#define	vloxseg2ei16_v_f32m2(...) __riscv_vloxseg2ei16_v_f32m2(__VA_ARGS__)

#define	vloxseg2ei16_v_f32m2_m(...) __riscv_vloxseg2ei16_v_f32m2_tumu(__VA_ARGS__)

#define	vloxseg2ei16_v_f32m4(...) __riscv_vloxseg2ei16_v_f32m4(__VA_ARGS__)

#define	vloxseg2ei16_v_f32m4_m(...) __riscv_vloxseg2ei16_v_f32m4_tumu(__VA_ARGS__)

#define	vloxseg2ei16_v_f32mf2(...) __riscv_vloxseg2ei16_v_f32mf2(__VA_ARGS__)

#define	vloxseg2ei16_v_f32mf2_m(...) __riscv_vloxseg2ei16_v_f32mf2_tumu(__VA_ARGS__)

#define	vloxseg2ei16_v_f64m1(...) __riscv_vloxseg2ei16_v_f64m1(__VA_ARGS__)

#define	vloxseg2ei16_v_f64m1_m(...) __riscv_vloxseg2ei16_v_f64m1_tumu(__VA_ARGS__)

#define	vloxseg2ei16_v_f64m2(...) __riscv_vloxseg2ei16_v_f64m2(__VA_ARGS__)

#define	vloxseg2ei16_v_f64m2_m(...) __riscv_vloxseg2ei16_v_f64m2_tumu(__VA_ARGS__)

#define	vloxseg2ei16_v_f64m4(...) __riscv_vloxseg2ei16_v_f64m4(__VA_ARGS__)

#define	vloxseg2ei16_v_f64m4_m(...) __riscv_vloxseg2ei16_v_f64m4_tumu(__VA_ARGS__)

#define	vloxseg2ei16_v_i16m1(...) __riscv_vloxseg2ei16_v_i16m1(__VA_ARGS__)

#define	vloxseg2ei16_v_i16m1_m(...) __riscv_vloxseg2ei16_v_i16m1_tumu(__VA_ARGS__)

#define	vloxseg2ei16_v_i16m2(...) __riscv_vloxseg2ei16_v_i16m2(__VA_ARGS__)

#define	vloxseg2ei16_v_i16m2_m(...) __riscv_vloxseg2ei16_v_i16m2_tumu(__VA_ARGS__)

#define	vloxseg2ei16_v_i16m4(...) __riscv_vloxseg2ei16_v_i16m4(__VA_ARGS__)

#define	vloxseg2ei16_v_i16m4_m(...) __riscv_vloxseg2ei16_v_i16m4_tumu(__VA_ARGS__)

#define	vloxseg2ei16_v_i16mf2(...) __riscv_vloxseg2ei16_v_i16mf2(__VA_ARGS__)

#define	vloxseg2ei16_v_i16mf2_m(...) __riscv_vloxseg2ei16_v_i16mf2_tumu(__VA_ARGS__)

#define	vloxseg2ei16_v_i16mf4(...) __riscv_vloxseg2ei16_v_i16mf4(__VA_ARGS__)

#define	vloxseg2ei16_v_i16mf4_m(...) __riscv_vloxseg2ei16_v_i16mf4_tumu(__VA_ARGS__)

#define	vloxseg2ei16_v_i32m1(...) __riscv_vloxseg2ei16_v_i32m1(__VA_ARGS__)

#define	vloxseg2ei16_v_i32m1_m(...) __riscv_vloxseg2ei16_v_i32m1_tumu(__VA_ARGS__)

#define	vloxseg2ei16_v_i32m2(...) __riscv_vloxseg2ei16_v_i32m2(__VA_ARGS__)

#define	vloxseg2ei16_v_i32m2_m(...) __riscv_vloxseg2ei16_v_i32m2_tumu(__VA_ARGS__)

#define	vloxseg2ei16_v_i32m4(...) __riscv_vloxseg2ei16_v_i32m4(__VA_ARGS__)

#define	vloxseg2ei16_v_i32m4_m(...) __riscv_vloxseg2ei16_v_i32m4_tumu(__VA_ARGS__)

#define	vloxseg2ei16_v_i32mf2(...) __riscv_vloxseg2ei16_v_i32mf2(__VA_ARGS__)

#define	vloxseg2ei16_v_i32mf2_m(...) __riscv_vloxseg2ei16_v_i32mf2_tumu(__VA_ARGS__)

#define	vloxseg2ei16_v_i64m1(...) __riscv_vloxseg2ei16_v_i64m1(__VA_ARGS__)

#define	vloxseg2ei16_v_i64m1_m(...) __riscv_vloxseg2ei16_v_i64m1_tumu(__VA_ARGS__)

#define	vloxseg2ei16_v_i64m2(...) __riscv_vloxseg2ei16_v_i64m2(__VA_ARGS__)

#define	vloxseg2ei16_v_i64m2_m(...) __riscv_vloxseg2ei16_v_i64m2_tumu(__VA_ARGS__)

#define	vloxseg2ei16_v_i64m4(...) __riscv_vloxseg2ei16_v_i64m4(__VA_ARGS__)

#define	vloxseg2ei16_v_i64m4_m(...) __riscv_vloxseg2ei16_v_i64m4_tumu(__VA_ARGS__)

#define	vloxseg2ei16_v_i8m1(...) __riscv_vloxseg2ei16_v_i8m1(__VA_ARGS__)

#define	vloxseg2ei16_v_i8m1_m(...) __riscv_vloxseg2ei16_v_i8m1_tumu(__VA_ARGS__)

#define	vloxseg2ei16_v_i8m2(...) __riscv_vloxseg2ei16_v_i8m2(__VA_ARGS__)

#define	vloxseg2ei16_v_i8m2_m(...) __riscv_vloxseg2ei16_v_i8m2_tumu(__VA_ARGS__)

#define	vloxseg2ei16_v_i8m4(...) __riscv_vloxseg2ei16_v_i8m4(__VA_ARGS__)

#define	vloxseg2ei16_v_i8m4_m(...) __riscv_vloxseg2ei16_v_i8m4_tumu(__VA_ARGS__)

#define	vloxseg2ei16_v_i8mf2(...) __riscv_vloxseg2ei16_v_i8mf2(__VA_ARGS__)

#define	vloxseg2ei16_v_i8mf2_m(...) __riscv_vloxseg2ei16_v_i8mf2_tumu(__VA_ARGS__)

#define	vloxseg2ei16_v_i8mf4(...) __riscv_vloxseg2ei16_v_i8mf4(__VA_ARGS__)

#define	vloxseg2ei16_v_i8mf4_m(...) __riscv_vloxseg2ei16_v_i8mf4_tumu(__VA_ARGS__)

#define	vloxseg2ei16_v_i8mf8(...) __riscv_vloxseg2ei16_v_i8mf8(__VA_ARGS__)

#define	vloxseg2ei16_v_i8mf8_m(...) __riscv_vloxseg2ei16_v_i8mf8_tumu(__VA_ARGS__)

#define	vloxseg2ei16_v_u16m1(...) __riscv_vloxseg2ei16_v_u16m1(__VA_ARGS__)

#define	vloxseg2ei16_v_u16m1_m(...) __riscv_vloxseg2ei16_v_u16m1_tumu(__VA_ARGS__)

#define	vloxseg2ei16_v_u16m2(...) __riscv_vloxseg2ei16_v_u16m2(__VA_ARGS__)

#define	vloxseg2ei16_v_u16m2_m(...) __riscv_vloxseg2ei16_v_u16m2_tumu(__VA_ARGS__)

#define	vloxseg2ei16_v_u16m4(...) __riscv_vloxseg2ei16_v_u16m4(__VA_ARGS__)

#define	vloxseg2ei16_v_u16m4_m(...) __riscv_vloxseg2ei16_v_u16m4_tumu(__VA_ARGS__)

#define	vloxseg2ei16_v_u16mf2(...) __riscv_vloxseg2ei16_v_u16mf2(__VA_ARGS__)

#define	vloxseg2ei16_v_u16mf2_m(...) __riscv_vloxseg2ei16_v_u16mf2_tumu(__VA_ARGS__)

#define	vloxseg2ei16_v_u16mf4(...) __riscv_vloxseg2ei16_v_u16mf4(__VA_ARGS__)

#define	vloxseg2ei16_v_u16mf4_m(...) __riscv_vloxseg2ei16_v_u16mf4_tumu(__VA_ARGS__)

#define	vloxseg2ei16_v_u32m1(...) __riscv_vloxseg2ei16_v_u32m1(__VA_ARGS__)

#define	vloxseg2ei16_v_u32m1_m(...) __riscv_vloxseg2ei16_v_u32m1_tumu(__VA_ARGS__)

#define	vloxseg2ei16_v_u32m2(...) __riscv_vloxseg2ei16_v_u32m2(__VA_ARGS__)

#define	vloxseg2ei16_v_u32m2_m(...) __riscv_vloxseg2ei16_v_u32m2_tumu(__VA_ARGS__)

#define	vloxseg2ei16_v_u32m4(...) __riscv_vloxseg2ei16_v_u32m4(__VA_ARGS__)

#define	vloxseg2ei16_v_u32m4_m(...) __riscv_vloxseg2ei16_v_u32m4_tumu(__VA_ARGS__)

#define	vloxseg2ei16_v_u32mf2(...) __riscv_vloxseg2ei16_v_u32mf2(__VA_ARGS__)

#define	vloxseg2ei16_v_u32mf2_m(...) __riscv_vloxseg2ei16_v_u32mf2_tumu(__VA_ARGS__)

#define	vloxseg2ei16_v_u64m1(...) __riscv_vloxseg2ei16_v_u64m1(__VA_ARGS__)

#define	vloxseg2ei16_v_u64m1_m(...) __riscv_vloxseg2ei16_v_u64m1_tumu(__VA_ARGS__)

#define	vloxseg2ei16_v_u64m2(...) __riscv_vloxseg2ei16_v_u64m2(__VA_ARGS__)

#define	vloxseg2ei16_v_u64m2_m(...) __riscv_vloxseg2ei16_v_u64m2_tumu(__VA_ARGS__)

#define	vloxseg2ei16_v_u64m4(...) __riscv_vloxseg2ei16_v_u64m4(__VA_ARGS__)

#define	vloxseg2ei16_v_u64m4_m(...) __riscv_vloxseg2ei16_v_u64m4_tumu(__VA_ARGS__)

#define	vloxseg2ei16_v_u8m1(...) __riscv_vloxseg2ei16_v_u8m1(__VA_ARGS__)

#define	vloxseg2ei16_v_u8m1_m(...) __riscv_vloxseg2ei16_v_u8m1_tumu(__VA_ARGS__)

#define	vloxseg2ei16_v_u8m2(...) __riscv_vloxseg2ei16_v_u8m2(__VA_ARGS__)

#define	vloxseg2ei16_v_u8m2_m(...) __riscv_vloxseg2ei16_v_u8m2_tumu(__VA_ARGS__)

#define	vloxseg2ei16_v_u8m4(...) __riscv_vloxseg2ei16_v_u8m4(__VA_ARGS__)

#define	vloxseg2ei16_v_u8m4_m(...) __riscv_vloxseg2ei16_v_u8m4_tumu(__VA_ARGS__)

#define	vloxseg2ei16_v_u8mf2(...) __riscv_vloxseg2ei16_v_u8mf2(__VA_ARGS__)

#define	vloxseg2ei16_v_u8mf2_m(...) __riscv_vloxseg2ei16_v_u8mf2_tumu(__VA_ARGS__)

#define	vloxseg2ei16_v_u8mf4(...) __riscv_vloxseg2ei16_v_u8mf4(__VA_ARGS__)

#define	vloxseg2ei16_v_u8mf4_m(...) __riscv_vloxseg2ei16_v_u8mf4_tumu(__VA_ARGS__)

#define	vloxseg2ei16_v_u8mf8(...) __riscv_vloxseg2ei16_v_u8mf8(__VA_ARGS__)

#define	vloxseg2ei16_v_u8mf8_m(...) __riscv_vloxseg2ei16_v_u8mf8_tumu(__VA_ARGS__)

#define	vloxseg2ei32_v_f16m1(...) __riscv_vloxseg2ei32_v_f16m1(__VA_ARGS__)

#define	vloxseg2ei32_v_f16m1_m(...) __riscv_vloxseg2ei32_v_f16m1_tumu(__VA_ARGS__)

#define	vloxseg2ei32_v_f16m2(...) __riscv_vloxseg2ei32_v_f16m2(__VA_ARGS__)

#define	vloxseg2ei32_v_f16m2_m(...) __riscv_vloxseg2ei32_v_f16m2_tumu(__VA_ARGS__)

#define	vloxseg2ei32_v_f16m4(...) __riscv_vloxseg2ei32_v_f16m4(__VA_ARGS__)

#define	vloxseg2ei32_v_f16m4_m(...) __riscv_vloxseg2ei32_v_f16m4_tumu(__VA_ARGS__)

#define	vloxseg2ei32_v_f16mf2(...) __riscv_vloxseg2ei32_v_f16mf2(__VA_ARGS__)

#define	vloxseg2ei32_v_f16mf2_m(...) __riscv_vloxseg2ei32_v_f16mf2_tumu(__VA_ARGS__)

#define	vloxseg2ei32_v_f16mf4(...) __riscv_vloxseg2ei32_v_f16mf4(__VA_ARGS__)

#define	vloxseg2ei32_v_f16mf4_m(...) __riscv_vloxseg2ei32_v_f16mf4_tumu(__VA_ARGS__)

#define	vloxseg2ei32_v_f32m1(...) __riscv_vloxseg2ei32_v_f32m1(__VA_ARGS__)

#define	vloxseg2ei32_v_f32m1_m(...) __riscv_vloxseg2ei32_v_f32m1_tumu(__VA_ARGS__)

#define	vloxseg2ei32_v_f32m2(...) __riscv_vloxseg2ei32_v_f32m2(__VA_ARGS__)

#define	vloxseg2ei32_v_f32m2_m(...) __riscv_vloxseg2ei32_v_f32m2_tumu(__VA_ARGS__)

#define	vloxseg2ei32_v_f32m4(...) __riscv_vloxseg2ei32_v_f32m4(__VA_ARGS__)

#define	vloxseg2ei32_v_f32m4_m(...) __riscv_vloxseg2ei32_v_f32m4_tumu(__VA_ARGS__)

#define	vloxseg2ei32_v_f32mf2(...) __riscv_vloxseg2ei32_v_f32mf2(__VA_ARGS__)

#define	vloxseg2ei32_v_f32mf2_m(...) __riscv_vloxseg2ei32_v_f32mf2_tumu(__VA_ARGS__)

#define	vloxseg2ei32_v_f64m1(...) __riscv_vloxseg2ei32_v_f64m1(__VA_ARGS__)

#define	vloxseg2ei32_v_f64m1_m(...) __riscv_vloxseg2ei32_v_f64m1_tumu(__VA_ARGS__)

#define	vloxseg2ei32_v_f64m2(...) __riscv_vloxseg2ei32_v_f64m2(__VA_ARGS__)

#define	vloxseg2ei32_v_f64m2_m(...) __riscv_vloxseg2ei32_v_f64m2_tumu(__VA_ARGS__)

#define	vloxseg2ei32_v_f64m4(...) __riscv_vloxseg2ei32_v_f64m4(__VA_ARGS__)

#define	vloxseg2ei32_v_f64m4_m(...) __riscv_vloxseg2ei32_v_f64m4_tumu(__VA_ARGS__)

#define	vloxseg2ei32_v_i16m1(...) __riscv_vloxseg2ei32_v_i16m1(__VA_ARGS__)

#define	vloxseg2ei32_v_i16m1_m(...) __riscv_vloxseg2ei32_v_i16m1_tumu(__VA_ARGS__)

#define	vloxseg2ei32_v_i16m2(...) __riscv_vloxseg2ei32_v_i16m2(__VA_ARGS__)

#define	vloxseg2ei32_v_i16m2_m(...) __riscv_vloxseg2ei32_v_i16m2_tumu(__VA_ARGS__)

#define	vloxseg2ei32_v_i16m4(...) __riscv_vloxseg2ei32_v_i16m4(__VA_ARGS__)

#define	vloxseg2ei32_v_i16m4_m(...) __riscv_vloxseg2ei32_v_i16m4_tumu(__VA_ARGS__)

#define	vloxseg2ei32_v_i16mf2(...) __riscv_vloxseg2ei32_v_i16mf2(__VA_ARGS__)

#define	vloxseg2ei32_v_i16mf2_m(...) __riscv_vloxseg2ei32_v_i16mf2_tumu(__VA_ARGS__)

#define	vloxseg2ei32_v_i16mf4(...) __riscv_vloxseg2ei32_v_i16mf4(__VA_ARGS__)

#define	vloxseg2ei32_v_i16mf4_m(...) __riscv_vloxseg2ei32_v_i16mf4_tumu(__VA_ARGS__)

#define	vloxseg2ei32_v_i32m1(...) __riscv_vloxseg2ei32_v_i32m1(__VA_ARGS__)

#define	vloxseg2ei32_v_i32m1_m(...) __riscv_vloxseg2ei32_v_i32m1_tumu(__VA_ARGS__)

#define	vloxseg2ei32_v_i32m2(...) __riscv_vloxseg2ei32_v_i32m2(__VA_ARGS__)

#define	vloxseg2ei32_v_i32m2_m(...) __riscv_vloxseg2ei32_v_i32m2_tumu(__VA_ARGS__)

#define	vloxseg2ei32_v_i32m4(...) __riscv_vloxseg2ei32_v_i32m4(__VA_ARGS__)

#define	vloxseg2ei32_v_i32m4_m(...) __riscv_vloxseg2ei32_v_i32m4_tumu(__VA_ARGS__)

#define	vloxseg2ei32_v_i32mf2(...) __riscv_vloxseg2ei32_v_i32mf2(__VA_ARGS__)

#define	vloxseg2ei32_v_i32mf2_m(...) __riscv_vloxseg2ei32_v_i32mf2_tumu(__VA_ARGS__)

#define	vloxseg2ei32_v_i64m1(...) __riscv_vloxseg2ei32_v_i64m1(__VA_ARGS__)

#define	vloxseg2ei32_v_i64m1_m(...) __riscv_vloxseg2ei32_v_i64m1_tumu(__VA_ARGS__)

#define	vloxseg2ei32_v_i64m2(...) __riscv_vloxseg2ei32_v_i64m2(__VA_ARGS__)

#define	vloxseg2ei32_v_i64m2_m(...) __riscv_vloxseg2ei32_v_i64m2_tumu(__VA_ARGS__)

#define	vloxseg2ei32_v_i64m4(...) __riscv_vloxseg2ei32_v_i64m4(__VA_ARGS__)

#define	vloxseg2ei32_v_i64m4_m(...) __riscv_vloxseg2ei32_v_i64m4_tumu(__VA_ARGS__)

#define	vloxseg2ei32_v_i8m1(...) __riscv_vloxseg2ei32_v_i8m1(__VA_ARGS__)

#define	vloxseg2ei32_v_i8m1_m(...) __riscv_vloxseg2ei32_v_i8m1_tumu(__VA_ARGS__)

#define	vloxseg2ei32_v_i8m2(...) __riscv_vloxseg2ei32_v_i8m2(__VA_ARGS__)

#define	vloxseg2ei32_v_i8m2_m(...) __riscv_vloxseg2ei32_v_i8m2_tumu(__VA_ARGS__)

#define	vloxseg2ei32_v_i8mf2(...) __riscv_vloxseg2ei32_v_i8mf2(__VA_ARGS__)

#define	vloxseg2ei32_v_i8mf2_m(...) __riscv_vloxseg2ei32_v_i8mf2_tumu(__VA_ARGS__)

#define	vloxseg2ei32_v_i8mf4(...) __riscv_vloxseg2ei32_v_i8mf4(__VA_ARGS__)

#define	vloxseg2ei32_v_i8mf4_m(...) __riscv_vloxseg2ei32_v_i8mf4_tumu(__VA_ARGS__)

#define	vloxseg2ei32_v_i8mf8(...) __riscv_vloxseg2ei32_v_i8mf8(__VA_ARGS__)

#define	vloxseg2ei32_v_i8mf8_m(...) __riscv_vloxseg2ei32_v_i8mf8_tumu(__VA_ARGS__)

#define	vloxseg2ei32_v_u16m1(...) __riscv_vloxseg2ei32_v_u16m1(__VA_ARGS__)

#define	vloxseg2ei32_v_u16m1_m(...) __riscv_vloxseg2ei32_v_u16m1_tumu(__VA_ARGS__)

#define	vloxseg2ei32_v_u16m2(...) __riscv_vloxseg2ei32_v_u16m2(__VA_ARGS__)

#define	vloxseg2ei32_v_u16m2_m(...) __riscv_vloxseg2ei32_v_u16m2_tumu(__VA_ARGS__)

#define	vloxseg2ei32_v_u16m4(...) __riscv_vloxseg2ei32_v_u16m4(__VA_ARGS__)

#define	vloxseg2ei32_v_u16m4_m(...) __riscv_vloxseg2ei32_v_u16m4_tumu(__VA_ARGS__)

#define	vloxseg2ei32_v_u16mf2(...) __riscv_vloxseg2ei32_v_u16mf2(__VA_ARGS__)

#define	vloxseg2ei32_v_u16mf2_m(...) __riscv_vloxseg2ei32_v_u16mf2_tumu(__VA_ARGS__)

#define	vloxseg2ei32_v_u16mf4(...) __riscv_vloxseg2ei32_v_u16mf4(__VA_ARGS__)

#define	vloxseg2ei32_v_u16mf4_m(...) __riscv_vloxseg2ei32_v_u16mf4_tumu(__VA_ARGS__)

#define	vloxseg2ei32_v_u32m1(...) __riscv_vloxseg2ei32_v_u32m1(__VA_ARGS__)

#define	vloxseg2ei32_v_u32m1_m(...) __riscv_vloxseg2ei32_v_u32m1_tumu(__VA_ARGS__)

#define	vloxseg2ei32_v_u32m2(...) __riscv_vloxseg2ei32_v_u32m2(__VA_ARGS__)

#define	vloxseg2ei32_v_u32m2_m(...) __riscv_vloxseg2ei32_v_u32m2_tumu(__VA_ARGS__)

#define	vloxseg2ei32_v_u32m4(...) __riscv_vloxseg2ei32_v_u32m4(__VA_ARGS__)

#define	vloxseg2ei32_v_u32m4_m(...) __riscv_vloxseg2ei32_v_u32m4_tumu(__VA_ARGS__)

#define	vloxseg2ei32_v_u32mf2(...) __riscv_vloxseg2ei32_v_u32mf2(__VA_ARGS__)

#define	vloxseg2ei32_v_u32mf2_m(...) __riscv_vloxseg2ei32_v_u32mf2_tumu(__VA_ARGS__)

#define	vloxseg2ei32_v_u64m1(...) __riscv_vloxseg2ei32_v_u64m1(__VA_ARGS__)

#define	vloxseg2ei32_v_u64m1_m(...) __riscv_vloxseg2ei32_v_u64m1_tumu(__VA_ARGS__)

#define	vloxseg2ei32_v_u64m2(...) __riscv_vloxseg2ei32_v_u64m2(__VA_ARGS__)

#define	vloxseg2ei32_v_u64m2_m(...) __riscv_vloxseg2ei32_v_u64m2_tumu(__VA_ARGS__)

#define	vloxseg2ei32_v_u64m4(...) __riscv_vloxseg2ei32_v_u64m4(__VA_ARGS__)

#define	vloxseg2ei32_v_u64m4_m(...) __riscv_vloxseg2ei32_v_u64m4_tumu(__VA_ARGS__)

#define	vloxseg2ei32_v_u8m1(...) __riscv_vloxseg2ei32_v_u8m1(__VA_ARGS__)

#define	vloxseg2ei32_v_u8m1_m(...) __riscv_vloxseg2ei32_v_u8m1_tumu(__VA_ARGS__)

#define	vloxseg2ei32_v_u8m2(...) __riscv_vloxseg2ei32_v_u8m2(__VA_ARGS__)

#define	vloxseg2ei32_v_u8m2_m(...) __riscv_vloxseg2ei32_v_u8m2_tumu(__VA_ARGS__)

#define	vloxseg2ei32_v_u8mf2(...) __riscv_vloxseg2ei32_v_u8mf2(__VA_ARGS__)

#define	vloxseg2ei32_v_u8mf2_m(...) __riscv_vloxseg2ei32_v_u8mf2_tumu(__VA_ARGS__)

#define	vloxseg2ei32_v_u8mf4(...) __riscv_vloxseg2ei32_v_u8mf4(__VA_ARGS__)

#define	vloxseg2ei32_v_u8mf4_m(...) __riscv_vloxseg2ei32_v_u8mf4_tumu(__VA_ARGS__)

#define	vloxseg2ei32_v_u8mf8(...) __riscv_vloxseg2ei32_v_u8mf8(__VA_ARGS__)

#define	vloxseg2ei32_v_u8mf8_m(...) __riscv_vloxseg2ei32_v_u8mf8_tumu(__VA_ARGS__)

#define	vloxseg2ei64_v_f16m1(...) __riscv_vloxseg2ei64_v_f16m1(__VA_ARGS__)

#define	vloxseg2ei64_v_f16m1_m(...) __riscv_vloxseg2ei64_v_f16m1_tumu(__VA_ARGS__)

#define	vloxseg2ei64_v_f16m2(...) __riscv_vloxseg2ei64_v_f16m2(__VA_ARGS__)

#define	vloxseg2ei64_v_f16m2_m(...) __riscv_vloxseg2ei64_v_f16m2_tumu(__VA_ARGS__)

#define	vloxseg2ei64_v_f16mf2(...) __riscv_vloxseg2ei64_v_f16mf2(__VA_ARGS__)

#define	vloxseg2ei64_v_f16mf2_m(...) __riscv_vloxseg2ei64_v_f16mf2_tumu(__VA_ARGS__)

#define	vloxseg2ei64_v_f16mf4(...) __riscv_vloxseg2ei64_v_f16mf4(__VA_ARGS__)

#define	vloxseg2ei64_v_f16mf4_m(...) __riscv_vloxseg2ei64_v_f16mf4_tumu(__VA_ARGS__)

#define	vloxseg2ei64_v_f32m1(...) __riscv_vloxseg2ei64_v_f32m1(__VA_ARGS__)

#define	vloxseg2ei64_v_f32m1_m(...) __riscv_vloxseg2ei64_v_f32m1_tumu(__VA_ARGS__)

#define	vloxseg2ei64_v_f32m2(...) __riscv_vloxseg2ei64_v_f32m2(__VA_ARGS__)

#define	vloxseg2ei64_v_f32m2_m(...) __riscv_vloxseg2ei64_v_f32m2_tumu(__VA_ARGS__)

#define	vloxseg2ei64_v_f32m4(...) __riscv_vloxseg2ei64_v_f32m4(__VA_ARGS__)

#define	vloxseg2ei64_v_f32m4_m(...) __riscv_vloxseg2ei64_v_f32m4_tumu(__VA_ARGS__)

#define	vloxseg2ei64_v_f32mf2(...) __riscv_vloxseg2ei64_v_f32mf2(__VA_ARGS__)

#define	vloxseg2ei64_v_f32mf2_m(...) __riscv_vloxseg2ei64_v_f32mf2_tumu(__VA_ARGS__)

#define	vloxseg2ei64_v_f64m1(...) __riscv_vloxseg2ei64_v_f64m1(__VA_ARGS__)

#define	vloxseg2ei64_v_f64m1_m(...) __riscv_vloxseg2ei64_v_f64m1_tumu(__VA_ARGS__)

#define	vloxseg2ei64_v_f64m2(...) __riscv_vloxseg2ei64_v_f64m2(__VA_ARGS__)

#define	vloxseg2ei64_v_f64m2_m(...) __riscv_vloxseg2ei64_v_f64m2_tumu(__VA_ARGS__)

#define	vloxseg2ei64_v_f64m4(...) __riscv_vloxseg2ei64_v_f64m4(__VA_ARGS__)

#define	vloxseg2ei64_v_f64m4_m(...) __riscv_vloxseg2ei64_v_f64m4_tumu(__VA_ARGS__)

#define	vloxseg2ei64_v_i16m1(...) __riscv_vloxseg2ei64_v_i16m1(__VA_ARGS__)

#define	vloxseg2ei64_v_i16m1_m(...) __riscv_vloxseg2ei64_v_i16m1_tumu(__VA_ARGS__)

#define	vloxseg2ei64_v_i16m2(...) __riscv_vloxseg2ei64_v_i16m2(__VA_ARGS__)

#define	vloxseg2ei64_v_i16m2_m(...) __riscv_vloxseg2ei64_v_i16m2_tumu(__VA_ARGS__)

#define	vloxseg2ei64_v_i16mf2(...) __riscv_vloxseg2ei64_v_i16mf2(__VA_ARGS__)

#define	vloxseg2ei64_v_i16mf2_m(...) __riscv_vloxseg2ei64_v_i16mf2_tumu(__VA_ARGS__)

#define	vloxseg2ei64_v_i16mf4(...) __riscv_vloxseg2ei64_v_i16mf4(__VA_ARGS__)

#define	vloxseg2ei64_v_i16mf4_m(...) __riscv_vloxseg2ei64_v_i16mf4_tumu(__VA_ARGS__)

#define	vloxseg2ei64_v_i32m1(...) __riscv_vloxseg2ei64_v_i32m1(__VA_ARGS__)

#define	vloxseg2ei64_v_i32m1_m(...) __riscv_vloxseg2ei64_v_i32m1_tumu(__VA_ARGS__)

#define	vloxseg2ei64_v_i32m2(...) __riscv_vloxseg2ei64_v_i32m2(__VA_ARGS__)

#define	vloxseg2ei64_v_i32m2_m(...) __riscv_vloxseg2ei64_v_i32m2_tumu(__VA_ARGS__)

#define	vloxseg2ei64_v_i32m4(...) __riscv_vloxseg2ei64_v_i32m4(__VA_ARGS__)

#define	vloxseg2ei64_v_i32m4_m(...) __riscv_vloxseg2ei64_v_i32m4_tumu(__VA_ARGS__)

#define	vloxseg2ei64_v_i32mf2(...) __riscv_vloxseg2ei64_v_i32mf2(__VA_ARGS__)

#define	vloxseg2ei64_v_i32mf2_m(...) __riscv_vloxseg2ei64_v_i32mf2_tumu(__VA_ARGS__)

#define	vloxseg2ei64_v_i64m1(...) __riscv_vloxseg2ei64_v_i64m1(__VA_ARGS__)

#define	vloxseg2ei64_v_i64m1_m(...) __riscv_vloxseg2ei64_v_i64m1_tumu(__VA_ARGS__)

#define	vloxseg2ei64_v_i64m2(...) __riscv_vloxseg2ei64_v_i64m2(__VA_ARGS__)

#define	vloxseg2ei64_v_i64m2_m(...) __riscv_vloxseg2ei64_v_i64m2_tumu(__VA_ARGS__)

#define	vloxseg2ei64_v_i64m4(...) __riscv_vloxseg2ei64_v_i64m4(__VA_ARGS__)

#define	vloxseg2ei64_v_i64m4_m(...) __riscv_vloxseg2ei64_v_i64m4_tumu(__VA_ARGS__)

#define	vloxseg2ei64_v_i8m1(...) __riscv_vloxseg2ei64_v_i8m1(__VA_ARGS__)

#define	vloxseg2ei64_v_i8m1_m(...) __riscv_vloxseg2ei64_v_i8m1_tumu(__VA_ARGS__)

#define	vloxseg2ei64_v_i8mf2(...) __riscv_vloxseg2ei64_v_i8mf2(__VA_ARGS__)

#define	vloxseg2ei64_v_i8mf2_m(...) __riscv_vloxseg2ei64_v_i8mf2_tumu(__VA_ARGS__)

#define	vloxseg2ei64_v_i8mf4(...) __riscv_vloxseg2ei64_v_i8mf4(__VA_ARGS__)

#define	vloxseg2ei64_v_i8mf4_m(...) __riscv_vloxseg2ei64_v_i8mf4_tumu(__VA_ARGS__)

#define	vloxseg2ei64_v_i8mf8(...) __riscv_vloxseg2ei64_v_i8mf8(__VA_ARGS__)

#define	vloxseg2ei64_v_i8mf8_m(...) __riscv_vloxseg2ei64_v_i8mf8_tumu(__VA_ARGS__)

#define	vloxseg2ei64_v_u16m1(...) __riscv_vloxseg2ei64_v_u16m1(__VA_ARGS__)

#define	vloxseg2ei64_v_u16m1_m(...) __riscv_vloxseg2ei64_v_u16m1_tumu(__VA_ARGS__)

#define	vloxseg2ei64_v_u16m2(...) __riscv_vloxseg2ei64_v_u16m2(__VA_ARGS__)

#define	vloxseg2ei64_v_u16m2_m(...) __riscv_vloxseg2ei64_v_u16m2_tumu(__VA_ARGS__)

#define	vloxseg2ei64_v_u16mf2(...) __riscv_vloxseg2ei64_v_u16mf2(__VA_ARGS__)

#define	vloxseg2ei64_v_u16mf2_m(...) __riscv_vloxseg2ei64_v_u16mf2_tumu(__VA_ARGS__)

#define	vloxseg2ei64_v_u16mf4(...) __riscv_vloxseg2ei64_v_u16mf4(__VA_ARGS__)

#define	vloxseg2ei64_v_u16mf4_m(...) __riscv_vloxseg2ei64_v_u16mf4_tumu(__VA_ARGS__)

#define	vloxseg2ei64_v_u32m1(...) __riscv_vloxseg2ei64_v_u32m1(__VA_ARGS__)

#define	vloxseg2ei64_v_u32m1_m(...) __riscv_vloxseg2ei64_v_u32m1_tumu(__VA_ARGS__)

#define	vloxseg2ei64_v_u32m2(...) __riscv_vloxseg2ei64_v_u32m2(__VA_ARGS__)

#define	vloxseg2ei64_v_u32m2_m(...) __riscv_vloxseg2ei64_v_u32m2_tumu(__VA_ARGS__)

#define	vloxseg2ei64_v_u32m4(...) __riscv_vloxseg2ei64_v_u32m4(__VA_ARGS__)

#define	vloxseg2ei64_v_u32m4_m(...) __riscv_vloxseg2ei64_v_u32m4_tumu(__VA_ARGS__)

#define	vloxseg2ei64_v_u32mf2(...) __riscv_vloxseg2ei64_v_u32mf2(__VA_ARGS__)

#define	vloxseg2ei64_v_u32mf2_m(...) __riscv_vloxseg2ei64_v_u32mf2_tumu(__VA_ARGS__)

#define	vloxseg2ei64_v_u64m1(...) __riscv_vloxseg2ei64_v_u64m1(__VA_ARGS__)

#define	vloxseg2ei64_v_u64m1_m(...) __riscv_vloxseg2ei64_v_u64m1_tumu(__VA_ARGS__)

#define	vloxseg2ei64_v_u64m2(...) __riscv_vloxseg2ei64_v_u64m2(__VA_ARGS__)

#define	vloxseg2ei64_v_u64m2_m(...) __riscv_vloxseg2ei64_v_u64m2_tumu(__VA_ARGS__)

#define	vloxseg2ei64_v_u64m4(...) __riscv_vloxseg2ei64_v_u64m4(__VA_ARGS__)

#define	vloxseg2ei64_v_u64m4_m(...) __riscv_vloxseg2ei64_v_u64m4_tumu(__VA_ARGS__)

#define	vloxseg2ei64_v_u8m1(...) __riscv_vloxseg2ei64_v_u8m1(__VA_ARGS__)

#define	vloxseg2ei64_v_u8m1_m(...) __riscv_vloxseg2ei64_v_u8m1_tumu(__VA_ARGS__)

#define	vloxseg2ei64_v_u8mf2(...) __riscv_vloxseg2ei64_v_u8mf2(__VA_ARGS__)

#define	vloxseg2ei64_v_u8mf2_m(...) __riscv_vloxseg2ei64_v_u8mf2_tumu(__VA_ARGS__)

#define	vloxseg2ei64_v_u8mf4(...) __riscv_vloxseg2ei64_v_u8mf4(__VA_ARGS__)

#define	vloxseg2ei64_v_u8mf4_m(...) __riscv_vloxseg2ei64_v_u8mf4_tumu(__VA_ARGS__)

#define	vloxseg2ei64_v_u8mf8(...) __riscv_vloxseg2ei64_v_u8mf8(__VA_ARGS__)

#define	vloxseg2ei64_v_u8mf8_m(...) __riscv_vloxseg2ei64_v_u8mf8_tumu(__VA_ARGS__)

#define	vloxseg2ei8_v_f16m1(...) __riscv_vloxseg2ei8_v_f16m1(__VA_ARGS__)

#define	vloxseg2ei8_v_f16m1_m(...) __riscv_vloxseg2ei8_v_f16m1_tumu(__VA_ARGS__)

#define	vloxseg2ei8_v_f16m2(...) __riscv_vloxseg2ei8_v_f16m2(__VA_ARGS__)

#define	vloxseg2ei8_v_f16m2_m(...) __riscv_vloxseg2ei8_v_f16m2_tumu(__VA_ARGS__)

#define	vloxseg2ei8_v_f16m4(...) __riscv_vloxseg2ei8_v_f16m4(__VA_ARGS__)

#define	vloxseg2ei8_v_f16m4_m(...) __riscv_vloxseg2ei8_v_f16m4_tumu(__VA_ARGS__)

#define	vloxseg2ei8_v_f16mf2(...) __riscv_vloxseg2ei8_v_f16mf2(__VA_ARGS__)

#define	vloxseg2ei8_v_f16mf2_m(...) __riscv_vloxseg2ei8_v_f16mf2_tumu(__VA_ARGS__)

#define	vloxseg2ei8_v_f16mf4(...) __riscv_vloxseg2ei8_v_f16mf4(__VA_ARGS__)

#define	vloxseg2ei8_v_f16mf4_m(...) __riscv_vloxseg2ei8_v_f16mf4_tumu(__VA_ARGS__)

#define	vloxseg2ei8_v_f32m1(...) __riscv_vloxseg2ei8_v_f32m1(__VA_ARGS__)

#define	vloxseg2ei8_v_f32m1_m(...) __riscv_vloxseg2ei8_v_f32m1_tumu(__VA_ARGS__)

#define	vloxseg2ei8_v_f32m2(...) __riscv_vloxseg2ei8_v_f32m2(__VA_ARGS__)

#define	vloxseg2ei8_v_f32m2_m(...) __riscv_vloxseg2ei8_v_f32m2_tumu(__VA_ARGS__)

#define	vloxseg2ei8_v_f32m4(...) __riscv_vloxseg2ei8_v_f32m4(__VA_ARGS__)

#define	vloxseg2ei8_v_f32m4_m(...) __riscv_vloxseg2ei8_v_f32m4_tumu(__VA_ARGS__)

#define	vloxseg2ei8_v_f32mf2(...) __riscv_vloxseg2ei8_v_f32mf2(__VA_ARGS__)

#define	vloxseg2ei8_v_f32mf2_m(...) __riscv_vloxseg2ei8_v_f32mf2_tumu(__VA_ARGS__)

#define	vloxseg2ei8_v_f64m1(...) __riscv_vloxseg2ei8_v_f64m1(__VA_ARGS__)

#define	vloxseg2ei8_v_f64m1_m(...) __riscv_vloxseg2ei8_v_f64m1_tumu(__VA_ARGS__)

#define	vloxseg2ei8_v_f64m2(...) __riscv_vloxseg2ei8_v_f64m2(__VA_ARGS__)

#define	vloxseg2ei8_v_f64m2_m(...) __riscv_vloxseg2ei8_v_f64m2_tumu(__VA_ARGS__)

#define	vloxseg2ei8_v_f64m4(...) __riscv_vloxseg2ei8_v_f64m4(__VA_ARGS__)

#define	vloxseg2ei8_v_f64m4_m(...) __riscv_vloxseg2ei8_v_f64m4_tumu(__VA_ARGS__)

#define	vloxseg2ei8_v_i16m1(...) __riscv_vloxseg2ei8_v_i16m1(__VA_ARGS__)

#define	vloxseg2ei8_v_i16m1_m(...) __riscv_vloxseg2ei8_v_i16m1_tumu(__VA_ARGS__)

#define	vloxseg2ei8_v_i16m2(...) __riscv_vloxseg2ei8_v_i16m2(__VA_ARGS__)

#define	vloxseg2ei8_v_i16m2_m(...) __riscv_vloxseg2ei8_v_i16m2_tumu(__VA_ARGS__)

#define	vloxseg2ei8_v_i16m4(...) __riscv_vloxseg2ei8_v_i16m4(__VA_ARGS__)

#define	vloxseg2ei8_v_i16m4_m(...) __riscv_vloxseg2ei8_v_i16m4_tumu(__VA_ARGS__)

#define	vloxseg2ei8_v_i16mf2(...) __riscv_vloxseg2ei8_v_i16mf2(__VA_ARGS__)

#define	vloxseg2ei8_v_i16mf2_m(...) __riscv_vloxseg2ei8_v_i16mf2_tumu(__VA_ARGS__)

#define	vloxseg2ei8_v_i16mf4(...) __riscv_vloxseg2ei8_v_i16mf4(__VA_ARGS__)

#define	vloxseg2ei8_v_i16mf4_m(...) __riscv_vloxseg2ei8_v_i16mf4_tumu(__VA_ARGS__)

#define	vloxseg2ei8_v_i32m1(...) __riscv_vloxseg2ei8_v_i32m1(__VA_ARGS__)

#define	vloxseg2ei8_v_i32m1_m(...) __riscv_vloxseg2ei8_v_i32m1_tumu(__VA_ARGS__)

#define	vloxseg2ei8_v_i32m2(...) __riscv_vloxseg2ei8_v_i32m2(__VA_ARGS__)

#define	vloxseg2ei8_v_i32m2_m(...) __riscv_vloxseg2ei8_v_i32m2_tumu(__VA_ARGS__)

#define	vloxseg2ei8_v_i32m4(...) __riscv_vloxseg2ei8_v_i32m4(__VA_ARGS__)

#define	vloxseg2ei8_v_i32m4_m(...) __riscv_vloxseg2ei8_v_i32m4_tumu(__VA_ARGS__)

#define	vloxseg2ei8_v_i32mf2(...) __riscv_vloxseg2ei8_v_i32mf2(__VA_ARGS__)

#define	vloxseg2ei8_v_i32mf2_m(...) __riscv_vloxseg2ei8_v_i32mf2_tumu(__VA_ARGS__)

#define	vloxseg2ei8_v_i64m1(...) __riscv_vloxseg2ei8_v_i64m1(__VA_ARGS__)

#define	vloxseg2ei8_v_i64m1_m(...) __riscv_vloxseg2ei8_v_i64m1_tumu(__VA_ARGS__)

#define	vloxseg2ei8_v_i64m2(...) __riscv_vloxseg2ei8_v_i64m2(__VA_ARGS__)

#define	vloxseg2ei8_v_i64m2_m(...) __riscv_vloxseg2ei8_v_i64m2_tumu(__VA_ARGS__)

#define	vloxseg2ei8_v_i64m4(...) __riscv_vloxseg2ei8_v_i64m4(__VA_ARGS__)

#define	vloxseg2ei8_v_i64m4_m(...) __riscv_vloxseg2ei8_v_i64m4_tumu(__VA_ARGS__)

#define	vloxseg2ei8_v_i8m1(...) __riscv_vloxseg2ei8_v_i8m1(__VA_ARGS__)

#define	vloxseg2ei8_v_i8m1_m(...) __riscv_vloxseg2ei8_v_i8m1_tumu(__VA_ARGS__)

#define	vloxseg2ei8_v_i8m2(...) __riscv_vloxseg2ei8_v_i8m2(__VA_ARGS__)

#define	vloxseg2ei8_v_i8m2_m(...) __riscv_vloxseg2ei8_v_i8m2_tumu(__VA_ARGS__)

#define	vloxseg2ei8_v_i8m4(...) __riscv_vloxseg2ei8_v_i8m4(__VA_ARGS__)

#define	vloxseg2ei8_v_i8m4_m(...) __riscv_vloxseg2ei8_v_i8m4_tumu(__VA_ARGS__)

#define	vloxseg2ei8_v_i8mf2(...) __riscv_vloxseg2ei8_v_i8mf2(__VA_ARGS__)

#define	vloxseg2ei8_v_i8mf2_m(...) __riscv_vloxseg2ei8_v_i8mf2_tumu(__VA_ARGS__)

#define	vloxseg2ei8_v_i8mf4(...) __riscv_vloxseg2ei8_v_i8mf4(__VA_ARGS__)

#define	vloxseg2ei8_v_i8mf4_m(...) __riscv_vloxseg2ei8_v_i8mf4_tumu(__VA_ARGS__)

#define	vloxseg2ei8_v_i8mf8(...) __riscv_vloxseg2ei8_v_i8mf8(__VA_ARGS__)

#define	vloxseg2ei8_v_i8mf8_m(...) __riscv_vloxseg2ei8_v_i8mf8_tumu(__VA_ARGS__)

#define	vloxseg2ei8_v_u16m1(...) __riscv_vloxseg2ei8_v_u16m1(__VA_ARGS__)

#define	vloxseg2ei8_v_u16m1_m(...) __riscv_vloxseg2ei8_v_u16m1_tumu(__VA_ARGS__)

#define	vloxseg2ei8_v_u16m2(...) __riscv_vloxseg2ei8_v_u16m2(__VA_ARGS__)

#define	vloxseg2ei8_v_u16m2_m(...) __riscv_vloxseg2ei8_v_u16m2_tumu(__VA_ARGS__)

#define	vloxseg2ei8_v_u16m4(...) __riscv_vloxseg2ei8_v_u16m4(__VA_ARGS__)

#define	vloxseg2ei8_v_u16m4_m(...) __riscv_vloxseg2ei8_v_u16m4_tumu(__VA_ARGS__)

#define	vloxseg2ei8_v_u16mf2(...) __riscv_vloxseg2ei8_v_u16mf2(__VA_ARGS__)

#define	vloxseg2ei8_v_u16mf2_m(...) __riscv_vloxseg2ei8_v_u16mf2_tumu(__VA_ARGS__)

#define	vloxseg2ei8_v_u16mf4(...) __riscv_vloxseg2ei8_v_u16mf4(__VA_ARGS__)

#define	vloxseg2ei8_v_u16mf4_m(...) __riscv_vloxseg2ei8_v_u16mf4_tumu(__VA_ARGS__)

#define	vloxseg2ei8_v_u32m1(...) __riscv_vloxseg2ei8_v_u32m1(__VA_ARGS__)

#define	vloxseg2ei8_v_u32m1_m(...) __riscv_vloxseg2ei8_v_u32m1_tumu(__VA_ARGS__)

#define	vloxseg2ei8_v_u32m2(...) __riscv_vloxseg2ei8_v_u32m2(__VA_ARGS__)

#define	vloxseg2ei8_v_u32m2_m(...) __riscv_vloxseg2ei8_v_u32m2_tumu(__VA_ARGS__)

#define	vloxseg2ei8_v_u32m4(...) __riscv_vloxseg2ei8_v_u32m4(__VA_ARGS__)

#define	vloxseg2ei8_v_u32m4_m(...) __riscv_vloxseg2ei8_v_u32m4_tumu(__VA_ARGS__)

#define	vloxseg2ei8_v_u32mf2(...) __riscv_vloxseg2ei8_v_u32mf2(__VA_ARGS__)

#define	vloxseg2ei8_v_u32mf2_m(...) __riscv_vloxseg2ei8_v_u32mf2_tumu(__VA_ARGS__)

#define	vloxseg2ei8_v_u64m1(...) __riscv_vloxseg2ei8_v_u64m1(__VA_ARGS__)

#define	vloxseg2ei8_v_u64m1_m(...) __riscv_vloxseg2ei8_v_u64m1_tumu(__VA_ARGS__)

#define	vloxseg2ei8_v_u64m2(...) __riscv_vloxseg2ei8_v_u64m2(__VA_ARGS__)

#define	vloxseg2ei8_v_u64m2_m(...) __riscv_vloxseg2ei8_v_u64m2_tumu(__VA_ARGS__)

#define	vloxseg2ei8_v_u64m4(...) __riscv_vloxseg2ei8_v_u64m4(__VA_ARGS__)

#define	vloxseg2ei8_v_u64m4_m(...) __riscv_vloxseg2ei8_v_u64m4_tumu(__VA_ARGS__)

#define	vloxseg2ei8_v_u8m1(...) __riscv_vloxseg2ei8_v_u8m1(__VA_ARGS__)

#define	vloxseg2ei8_v_u8m1_m(...) __riscv_vloxseg2ei8_v_u8m1_tumu(__VA_ARGS__)

#define	vloxseg2ei8_v_u8m2(...) __riscv_vloxseg2ei8_v_u8m2(__VA_ARGS__)

#define	vloxseg2ei8_v_u8m2_m(...) __riscv_vloxseg2ei8_v_u8m2_tumu(__VA_ARGS__)

#define	vloxseg2ei8_v_u8m4(...) __riscv_vloxseg2ei8_v_u8m4(__VA_ARGS__)

#define	vloxseg2ei8_v_u8m4_m(...) __riscv_vloxseg2ei8_v_u8m4_tumu(__VA_ARGS__)

#define	vloxseg2ei8_v_u8mf2(...) __riscv_vloxseg2ei8_v_u8mf2(__VA_ARGS__)

#define	vloxseg2ei8_v_u8mf2_m(...) __riscv_vloxseg2ei8_v_u8mf2_tumu(__VA_ARGS__)

#define	vloxseg2ei8_v_u8mf4(...) __riscv_vloxseg2ei8_v_u8mf4(__VA_ARGS__)

#define	vloxseg2ei8_v_u8mf4_m(...) __riscv_vloxseg2ei8_v_u8mf4_tumu(__VA_ARGS__)

#define	vloxseg2ei8_v_u8mf8(...) __riscv_vloxseg2ei8_v_u8mf8(__VA_ARGS__)

#define	vloxseg2ei8_v_u8mf8_m(...) __riscv_vloxseg2ei8_v_u8mf8_tumu(__VA_ARGS__)

#define	vloxseg3ei16_v_f16m1(...) __riscv_vloxseg3ei16_v_f16m1(__VA_ARGS__)

#define	vloxseg3ei16_v_f16m1_m(...) __riscv_vloxseg3ei16_v_f16m1_tumu(__VA_ARGS__)

#define	vloxseg3ei16_v_f16m2(...) __riscv_vloxseg3ei16_v_f16m2(__VA_ARGS__)

#define	vloxseg3ei16_v_f16m2_m(...) __riscv_vloxseg3ei16_v_f16m2_tumu(__VA_ARGS__)

#define	vloxseg3ei16_v_f16mf2(...) __riscv_vloxseg3ei16_v_f16mf2(__VA_ARGS__)

#define	vloxseg3ei16_v_f16mf2_m(...) __riscv_vloxseg3ei16_v_f16mf2_tumu(__VA_ARGS__)

#define	vloxseg3ei16_v_f16mf4(...) __riscv_vloxseg3ei16_v_f16mf4(__VA_ARGS__)

#define	vloxseg3ei16_v_f16mf4_m(...) __riscv_vloxseg3ei16_v_f16mf4_tumu(__VA_ARGS__)

#define	vloxseg3ei16_v_f32m1(...) __riscv_vloxseg3ei16_v_f32m1(__VA_ARGS__)

#define	vloxseg3ei16_v_f32m1_m(...) __riscv_vloxseg3ei16_v_f32m1_tumu(__VA_ARGS__)

#define	vloxseg3ei16_v_f32m2(...) __riscv_vloxseg3ei16_v_f32m2(__VA_ARGS__)

#define	vloxseg3ei16_v_f32m2_m(...) __riscv_vloxseg3ei16_v_f32m2_tumu(__VA_ARGS__)

#define	vloxseg3ei16_v_f32mf2(...) __riscv_vloxseg3ei16_v_f32mf2(__VA_ARGS__)

#define	vloxseg3ei16_v_f32mf2_m(...) __riscv_vloxseg3ei16_v_f32mf2_tumu(__VA_ARGS__)

#define	vloxseg3ei16_v_f64m1(...) __riscv_vloxseg3ei16_v_f64m1(__VA_ARGS__)

#define	vloxseg3ei16_v_f64m1_m(...) __riscv_vloxseg3ei16_v_f64m1_tumu(__VA_ARGS__)

#define	vloxseg3ei16_v_f64m2(...) __riscv_vloxseg3ei16_v_f64m2(__VA_ARGS__)

#define	vloxseg3ei16_v_f64m2_m(...) __riscv_vloxseg3ei16_v_f64m2_tumu(__VA_ARGS__)

#define	vloxseg3ei16_v_i16m1(...) __riscv_vloxseg3ei16_v_i16m1(__VA_ARGS__)

#define	vloxseg3ei16_v_i16m1_m(...) __riscv_vloxseg3ei16_v_i16m1_tumu(__VA_ARGS__)

#define	vloxseg3ei16_v_i16m2(...) __riscv_vloxseg3ei16_v_i16m2(__VA_ARGS__)

#define	vloxseg3ei16_v_i16m2_m(...) __riscv_vloxseg3ei16_v_i16m2_tumu(__VA_ARGS__)

#define	vloxseg3ei16_v_i16mf2(...) __riscv_vloxseg3ei16_v_i16mf2(__VA_ARGS__)

#define	vloxseg3ei16_v_i16mf2_m(...) __riscv_vloxseg3ei16_v_i16mf2_tumu(__VA_ARGS__)

#define	vloxseg3ei16_v_i16mf4(...) __riscv_vloxseg3ei16_v_i16mf4(__VA_ARGS__)

#define	vloxseg3ei16_v_i16mf4_m(...) __riscv_vloxseg3ei16_v_i16mf4_tumu(__VA_ARGS__)

#define	vloxseg3ei16_v_i32m1(...) __riscv_vloxseg3ei16_v_i32m1(__VA_ARGS__)

#define	vloxseg3ei16_v_i32m1_m(...) __riscv_vloxseg3ei16_v_i32m1_tumu(__VA_ARGS__)

#define	vloxseg3ei16_v_i32m2(...) __riscv_vloxseg3ei16_v_i32m2(__VA_ARGS__)

#define	vloxseg3ei16_v_i32m2_m(...) __riscv_vloxseg3ei16_v_i32m2_tumu(__VA_ARGS__)

#define	vloxseg3ei16_v_i32mf2(...) __riscv_vloxseg3ei16_v_i32mf2(__VA_ARGS__)

#define	vloxseg3ei16_v_i32mf2_m(...) __riscv_vloxseg3ei16_v_i32mf2_tumu(__VA_ARGS__)

#define	vloxseg3ei16_v_i64m1(...) __riscv_vloxseg3ei16_v_i64m1(__VA_ARGS__)

#define	vloxseg3ei16_v_i64m1_m(...) __riscv_vloxseg3ei16_v_i64m1_tumu(__VA_ARGS__)

#define	vloxseg3ei16_v_i64m2(...) __riscv_vloxseg3ei16_v_i64m2(__VA_ARGS__)

#define	vloxseg3ei16_v_i64m2_m(...) __riscv_vloxseg3ei16_v_i64m2_tumu(__VA_ARGS__)

#define	vloxseg3ei16_v_i8m1(...) __riscv_vloxseg3ei16_v_i8m1(__VA_ARGS__)

#define	vloxseg3ei16_v_i8m1_m(...) __riscv_vloxseg3ei16_v_i8m1_tumu(__VA_ARGS__)

#define	vloxseg3ei16_v_i8m2(...) __riscv_vloxseg3ei16_v_i8m2(__VA_ARGS__)

#define	vloxseg3ei16_v_i8m2_m(...) __riscv_vloxseg3ei16_v_i8m2_tumu(__VA_ARGS__)

#define	vloxseg3ei16_v_i8mf2(...) __riscv_vloxseg3ei16_v_i8mf2(__VA_ARGS__)

#define	vloxseg3ei16_v_i8mf2_m(...) __riscv_vloxseg3ei16_v_i8mf2_tumu(__VA_ARGS__)

#define	vloxseg3ei16_v_i8mf4(...) __riscv_vloxseg3ei16_v_i8mf4(__VA_ARGS__)

#define	vloxseg3ei16_v_i8mf4_m(...) __riscv_vloxseg3ei16_v_i8mf4_tumu(__VA_ARGS__)

#define	vloxseg3ei16_v_i8mf8(...) __riscv_vloxseg3ei16_v_i8mf8(__VA_ARGS__)

#define	vloxseg3ei16_v_i8mf8_m(...) __riscv_vloxseg3ei16_v_i8mf8_tumu(__VA_ARGS__)

#define	vloxseg3ei16_v_u16m1(...) __riscv_vloxseg3ei16_v_u16m1(__VA_ARGS__)

#define	vloxseg3ei16_v_u16m1_m(...) __riscv_vloxseg3ei16_v_u16m1_tumu(__VA_ARGS__)

#define	vloxseg3ei16_v_u16m2(...) __riscv_vloxseg3ei16_v_u16m2(__VA_ARGS__)

#define	vloxseg3ei16_v_u16m2_m(...) __riscv_vloxseg3ei16_v_u16m2_tumu(__VA_ARGS__)

#define	vloxseg3ei16_v_u16mf2(...) __riscv_vloxseg3ei16_v_u16mf2(__VA_ARGS__)

#define	vloxseg3ei16_v_u16mf2_m(...) __riscv_vloxseg3ei16_v_u16mf2_tumu(__VA_ARGS__)

#define	vloxseg3ei16_v_u16mf4(...) __riscv_vloxseg3ei16_v_u16mf4(__VA_ARGS__)

#define	vloxseg3ei16_v_u16mf4_m(...) __riscv_vloxseg3ei16_v_u16mf4_tumu(__VA_ARGS__)

#define	vloxseg3ei16_v_u32m1(...) __riscv_vloxseg3ei16_v_u32m1(__VA_ARGS__)

#define	vloxseg3ei16_v_u32m1_m(...) __riscv_vloxseg3ei16_v_u32m1_tumu(__VA_ARGS__)

#define	vloxseg3ei16_v_u32m2(...) __riscv_vloxseg3ei16_v_u32m2(__VA_ARGS__)

#define	vloxseg3ei16_v_u32m2_m(...) __riscv_vloxseg3ei16_v_u32m2_tumu(__VA_ARGS__)

#define	vloxseg3ei16_v_u32mf2(...) __riscv_vloxseg3ei16_v_u32mf2(__VA_ARGS__)

#define	vloxseg3ei16_v_u32mf2_m(...) __riscv_vloxseg3ei16_v_u32mf2_tumu(__VA_ARGS__)

#define	vloxseg3ei16_v_u64m1(...) __riscv_vloxseg3ei16_v_u64m1(__VA_ARGS__)

#define	vloxseg3ei16_v_u64m1_m(...) __riscv_vloxseg3ei16_v_u64m1_tumu(__VA_ARGS__)

#define	vloxseg3ei16_v_u64m2(...) __riscv_vloxseg3ei16_v_u64m2(__VA_ARGS__)

#define	vloxseg3ei16_v_u64m2_m(...) __riscv_vloxseg3ei16_v_u64m2_tumu(__VA_ARGS__)

#define	vloxseg3ei16_v_u8m1(...) __riscv_vloxseg3ei16_v_u8m1(__VA_ARGS__)

#define	vloxseg3ei16_v_u8m1_m(...) __riscv_vloxseg3ei16_v_u8m1_tumu(__VA_ARGS__)

#define	vloxseg3ei16_v_u8m2(...) __riscv_vloxseg3ei16_v_u8m2(__VA_ARGS__)

#define	vloxseg3ei16_v_u8m2_m(...) __riscv_vloxseg3ei16_v_u8m2_tumu(__VA_ARGS__)

#define	vloxseg3ei16_v_u8mf2(...) __riscv_vloxseg3ei16_v_u8mf2(__VA_ARGS__)

#define	vloxseg3ei16_v_u8mf2_m(...) __riscv_vloxseg3ei16_v_u8mf2_tumu(__VA_ARGS__)

#define	vloxseg3ei16_v_u8mf4(...) __riscv_vloxseg3ei16_v_u8mf4(__VA_ARGS__)

#define	vloxseg3ei16_v_u8mf4_m(...) __riscv_vloxseg3ei16_v_u8mf4_tumu(__VA_ARGS__)

#define	vloxseg3ei16_v_u8mf8(...) __riscv_vloxseg3ei16_v_u8mf8(__VA_ARGS__)

#define	vloxseg3ei16_v_u8mf8_m(...) __riscv_vloxseg3ei16_v_u8mf8_tumu(__VA_ARGS__)

#define	vloxseg3ei32_v_f16m1(...) __riscv_vloxseg3ei32_v_f16m1(__VA_ARGS__)

#define	vloxseg3ei32_v_f16m1_m(...) __riscv_vloxseg3ei32_v_f16m1_tumu(__VA_ARGS__)

#define	vloxseg3ei32_v_f16m2(...) __riscv_vloxseg3ei32_v_f16m2(__VA_ARGS__)

#define	vloxseg3ei32_v_f16m2_m(...) __riscv_vloxseg3ei32_v_f16m2_tumu(__VA_ARGS__)

#define	vloxseg3ei32_v_f16mf2(...) __riscv_vloxseg3ei32_v_f16mf2(__VA_ARGS__)

#define	vloxseg3ei32_v_f16mf2_m(...) __riscv_vloxseg3ei32_v_f16mf2_tumu(__VA_ARGS__)

#define	vloxseg3ei32_v_f16mf4(...) __riscv_vloxseg3ei32_v_f16mf4(__VA_ARGS__)

#define	vloxseg3ei32_v_f16mf4_m(...) __riscv_vloxseg3ei32_v_f16mf4_tumu(__VA_ARGS__)

#define	vloxseg3ei32_v_f32m1(...) __riscv_vloxseg3ei32_v_f32m1(__VA_ARGS__)

#define	vloxseg3ei32_v_f32m1_m(...) __riscv_vloxseg3ei32_v_f32m1_tumu(__VA_ARGS__)

#define	vloxseg3ei32_v_f32m2(...) __riscv_vloxseg3ei32_v_f32m2(__VA_ARGS__)

#define	vloxseg3ei32_v_f32m2_m(...) __riscv_vloxseg3ei32_v_f32m2_tumu(__VA_ARGS__)

#define	vloxseg3ei32_v_f32mf2(...) __riscv_vloxseg3ei32_v_f32mf2(__VA_ARGS__)

#define	vloxseg3ei32_v_f32mf2_m(...) __riscv_vloxseg3ei32_v_f32mf2_tumu(__VA_ARGS__)

#define	vloxseg3ei32_v_f64m1(...) __riscv_vloxseg3ei32_v_f64m1(__VA_ARGS__)

#define	vloxseg3ei32_v_f64m1_m(...) __riscv_vloxseg3ei32_v_f64m1_tumu(__VA_ARGS__)

#define	vloxseg3ei32_v_f64m2(...) __riscv_vloxseg3ei32_v_f64m2(__VA_ARGS__)

#define	vloxseg3ei32_v_f64m2_m(...) __riscv_vloxseg3ei32_v_f64m2_tumu(__VA_ARGS__)

#define	vloxseg3ei32_v_i16m1(...) __riscv_vloxseg3ei32_v_i16m1(__VA_ARGS__)

#define	vloxseg3ei32_v_i16m1_m(...) __riscv_vloxseg3ei32_v_i16m1_tumu(__VA_ARGS__)

#define	vloxseg3ei32_v_i16m2(...) __riscv_vloxseg3ei32_v_i16m2(__VA_ARGS__)

#define	vloxseg3ei32_v_i16m2_m(...) __riscv_vloxseg3ei32_v_i16m2_tumu(__VA_ARGS__)

#define	vloxseg3ei32_v_i16mf2(...) __riscv_vloxseg3ei32_v_i16mf2(__VA_ARGS__)

#define	vloxseg3ei32_v_i16mf2_m(...) __riscv_vloxseg3ei32_v_i16mf2_tumu(__VA_ARGS__)

#define	vloxseg3ei32_v_i16mf4(...) __riscv_vloxseg3ei32_v_i16mf4(__VA_ARGS__)

#define	vloxseg3ei32_v_i16mf4_m(...) __riscv_vloxseg3ei32_v_i16mf4_tumu(__VA_ARGS__)

#define	vloxseg3ei32_v_i32m1(...) __riscv_vloxseg3ei32_v_i32m1(__VA_ARGS__)

#define	vloxseg3ei32_v_i32m1_m(...) __riscv_vloxseg3ei32_v_i32m1_tumu(__VA_ARGS__)

#define	vloxseg3ei32_v_i32m2(...) __riscv_vloxseg3ei32_v_i32m2(__VA_ARGS__)

#define	vloxseg3ei32_v_i32m2_m(...) __riscv_vloxseg3ei32_v_i32m2_tumu(__VA_ARGS__)

#define	vloxseg3ei32_v_i32mf2(...) __riscv_vloxseg3ei32_v_i32mf2(__VA_ARGS__)

#define	vloxseg3ei32_v_i32mf2_m(...) __riscv_vloxseg3ei32_v_i32mf2_tumu(__VA_ARGS__)

#define	vloxseg3ei32_v_i64m1(...) __riscv_vloxseg3ei32_v_i64m1(__VA_ARGS__)

#define	vloxseg3ei32_v_i64m1_m(...) __riscv_vloxseg3ei32_v_i64m1_tumu(__VA_ARGS__)

#define	vloxseg3ei32_v_i64m2(...) __riscv_vloxseg3ei32_v_i64m2(__VA_ARGS__)

#define	vloxseg3ei32_v_i64m2_m(...) __riscv_vloxseg3ei32_v_i64m2_tumu(__VA_ARGS__)

#define	vloxseg3ei32_v_i8m1(...) __riscv_vloxseg3ei32_v_i8m1(__VA_ARGS__)

#define	vloxseg3ei32_v_i8m1_m(...) __riscv_vloxseg3ei32_v_i8m1_tumu(__VA_ARGS__)

#define	vloxseg3ei32_v_i8m2(...) __riscv_vloxseg3ei32_v_i8m2(__VA_ARGS__)

#define	vloxseg3ei32_v_i8m2_m(...) __riscv_vloxseg3ei32_v_i8m2_tumu(__VA_ARGS__)

#define	vloxseg3ei32_v_i8mf2(...) __riscv_vloxseg3ei32_v_i8mf2(__VA_ARGS__)

#define	vloxseg3ei32_v_i8mf2_m(...) __riscv_vloxseg3ei32_v_i8mf2_tumu(__VA_ARGS__)

#define	vloxseg3ei32_v_i8mf4(...) __riscv_vloxseg3ei32_v_i8mf4(__VA_ARGS__)

#define	vloxseg3ei32_v_i8mf4_m(...) __riscv_vloxseg3ei32_v_i8mf4_tumu(__VA_ARGS__)

#define	vloxseg3ei32_v_i8mf8(...) __riscv_vloxseg3ei32_v_i8mf8(__VA_ARGS__)

#define	vloxseg3ei32_v_i8mf8_m(...) __riscv_vloxseg3ei32_v_i8mf8_tumu(__VA_ARGS__)

#define	vloxseg3ei32_v_u16m1(...) __riscv_vloxseg3ei32_v_u16m1(__VA_ARGS__)

#define	vloxseg3ei32_v_u16m1_m(...) __riscv_vloxseg3ei32_v_u16m1_tumu(__VA_ARGS__)

#define	vloxseg3ei32_v_u16m2(...) __riscv_vloxseg3ei32_v_u16m2(__VA_ARGS__)

#define	vloxseg3ei32_v_u16m2_m(...) __riscv_vloxseg3ei32_v_u16m2_tumu(__VA_ARGS__)

#define	vloxseg3ei32_v_u16mf2(...) __riscv_vloxseg3ei32_v_u16mf2(__VA_ARGS__)

#define	vloxseg3ei32_v_u16mf2_m(...) __riscv_vloxseg3ei32_v_u16mf2_tumu(__VA_ARGS__)

#define	vloxseg3ei32_v_u16mf4(...) __riscv_vloxseg3ei32_v_u16mf4(__VA_ARGS__)

#define	vloxseg3ei32_v_u16mf4_m(...) __riscv_vloxseg3ei32_v_u16mf4_tumu(__VA_ARGS__)

#define	vloxseg3ei32_v_u32m1(...) __riscv_vloxseg3ei32_v_u32m1(__VA_ARGS__)

#define	vloxseg3ei32_v_u32m1_m(...) __riscv_vloxseg3ei32_v_u32m1_tumu(__VA_ARGS__)

#define	vloxseg3ei32_v_u32m2(...) __riscv_vloxseg3ei32_v_u32m2(__VA_ARGS__)

#define	vloxseg3ei32_v_u32m2_m(...) __riscv_vloxseg3ei32_v_u32m2_tumu(__VA_ARGS__)

#define	vloxseg3ei32_v_u32mf2(...) __riscv_vloxseg3ei32_v_u32mf2(__VA_ARGS__)

#define	vloxseg3ei32_v_u32mf2_m(...) __riscv_vloxseg3ei32_v_u32mf2_tumu(__VA_ARGS__)

#define	vloxseg3ei32_v_u64m1(...) __riscv_vloxseg3ei32_v_u64m1(__VA_ARGS__)

#define	vloxseg3ei32_v_u64m1_m(...) __riscv_vloxseg3ei32_v_u64m1_tumu(__VA_ARGS__)

#define	vloxseg3ei32_v_u64m2(...) __riscv_vloxseg3ei32_v_u64m2(__VA_ARGS__)

#define	vloxseg3ei32_v_u64m2_m(...) __riscv_vloxseg3ei32_v_u64m2_tumu(__VA_ARGS__)

#define	vloxseg3ei32_v_u8m1(...) __riscv_vloxseg3ei32_v_u8m1(__VA_ARGS__)

#define	vloxseg3ei32_v_u8m1_m(...) __riscv_vloxseg3ei32_v_u8m1_tumu(__VA_ARGS__)

#define	vloxseg3ei32_v_u8m2(...) __riscv_vloxseg3ei32_v_u8m2(__VA_ARGS__)

#define	vloxseg3ei32_v_u8m2_m(...) __riscv_vloxseg3ei32_v_u8m2_tumu(__VA_ARGS__)

#define	vloxseg3ei32_v_u8mf2(...) __riscv_vloxseg3ei32_v_u8mf2(__VA_ARGS__)

#define	vloxseg3ei32_v_u8mf2_m(...) __riscv_vloxseg3ei32_v_u8mf2_tumu(__VA_ARGS__)

#define	vloxseg3ei32_v_u8mf4(...) __riscv_vloxseg3ei32_v_u8mf4(__VA_ARGS__)

#define	vloxseg3ei32_v_u8mf4_m(...) __riscv_vloxseg3ei32_v_u8mf4_tumu(__VA_ARGS__)

#define	vloxseg3ei32_v_u8mf8(...) __riscv_vloxseg3ei32_v_u8mf8(__VA_ARGS__)

#define	vloxseg3ei32_v_u8mf8_m(...) __riscv_vloxseg3ei32_v_u8mf8_tumu(__VA_ARGS__)

#define	vloxseg3ei64_v_f16m1(...) __riscv_vloxseg3ei64_v_f16m1(__VA_ARGS__)

#define	vloxseg3ei64_v_f16m1_m(...) __riscv_vloxseg3ei64_v_f16m1_tumu(__VA_ARGS__)

#define	vloxseg3ei64_v_f16m2(...) __riscv_vloxseg3ei64_v_f16m2(__VA_ARGS__)

#define	vloxseg3ei64_v_f16m2_m(...) __riscv_vloxseg3ei64_v_f16m2_tumu(__VA_ARGS__)

#define	vloxseg3ei64_v_f16mf2(...) __riscv_vloxseg3ei64_v_f16mf2(__VA_ARGS__)

#define	vloxseg3ei64_v_f16mf2_m(...) __riscv_vloxseg3ei64_v_f16mf2_tumu(__VA_ARGS__)

#define	vloxseg3ei64_v_f16mf4(...) __riscv_vloxseg3ei64_v_f16mf4(__VA_ARGS__)

#define	vloxseg3ei64_v_f16mf4_m(...) __riscv_vloxseg3ei64_v_f16mf4_tumu(__VA_ARGS__)

#define	vloxseg3ei64_v_f32m1(...) __riscv_vloxseg3ei64_v_f32m1(__VA_ARGS__)

#define	vloxseg3ei64_v_f32m1_m(...) __riscv_vloxseg3ei64_v_f32m1_tumu(__VA_ARGS__)

#define	vloxseg3ei64_v_f32m2(...) __riscv_vloxseg3ei64_v_f32m2(__VA_ARGS__)

#define	vloxseg3ei64_v_f32m2_m(...) __riscv_vloxseg3ei64_v_f32m2_tumu(__VA_ARGS__)

#define	vloxseg3ei64_v_f32mf2(...) __riscv_vloxseg3ei64_v_f32mf2(__VA_ARGS__)

#define	vloxseg3ei64_v_f32mf2_m(...) __riscv_vloxseg3ei64_v_f32mf2_tumu(__VA_ARGS__)

#define	vloxseg3ei64_v_f64m1(...) __riscv_vloxseg3ei64_v_f64m1(__VA_ARGS__)

#define	vloxseg3ei64_v_f64m1_m(...) __riscv_vloxseg3ei64_v_f64m1_tumu(__VA_ARGS__)

#define	vloxseg3ei64_v_f64m2(...) __riscv_vloxseg3ei64_v_f64m2(__VA_ARGS__)

#define	vloxseg3ei64_v_f64m2_m(...) __riscv_vloxseg3ei64_v_f64m2_tumu(__VA_ARGS__)

#define	vloxseg3ei64_v_i16m1(...) __riscv_vloxseg3ei64_v_i16m1(__VA_ARGS__)

#define	vloxseg3ei64_v_i16m1_m(...) __riscv_vloxseg3ei64_v_i16m1_tumu(__VA_ARGS__)

#define	vloxseg3ei64_v_i16m2(...) __riscv_vloxseg3ei64_v_i16m2(__VA_ARGS__)

#define	vloxseg3ei64_v_i16m2_m(...) __riscv_vloxseg3ei64_v_i16m2_tumu(__VA_ARGS__)

#define	vloxseg3ei64_v_i16mf2(...) __riscv_vloxseg3ei64_v_i16mf2(__VA_ARGS__)

#define	vloxseg3ei64_v_i16mf2_m(...) __riscv_vloxseg3ei64_v_i16mf2_tumu(__VA_ARGS__)

#define	vloxseg3ei64_v_i16mf4(...) __riscv_vloxseg3ei64_v_i16mf4(__VA_ARGS__)

#define	vloxseg3ei64_v_i16mf4_m(...) __riscv_vloxseg3ei64_v_i16mf4_tumu(__VA_ARGS__)

#define	vloxseg3ei64_v_i32m1(...) __riscv_vloxseg3ei64_v_i32m1(__VA_ARGS__)

#define	vloxseg3ei64_v_i32m1_m(...) __riscv_vloxseg3ei64_v_i32m1_tumu(__VA_ARGS__)

#define	vloxseg3ei64_v_i32m2(...) __riscv_vloxseg3ei64_v_i32m2(__VA_ARGS__)

#define	vloxseg3ei64_v_i32m2_m(...) __riscv_vloxseg3ei64_v_i32m2_tumu(__VA_ARGS__)

#define	vloxseg3ei64_v_i32mf2(...) __riscv_vloxseg3ei64_v_i32mf2(__VA_ARGS__)

#define	vloxseg3ei64_v_i32mf2_m(...) __riscv_vloxseg3ei64_v_i32mf2_tumu(__VA_ARGS__)

#define	vloxseg3ei64_v_i64m1(...) __riscv_vloxseg3ei64_v_i64m1(__VA_ARGS__)

#define	vloxseg3ei64_v_i64m1_m(...) __riscv_vloxseg3ei64_v_i64m1_tumu(__VA_ARGS__)

#define	vloxseg3ei64_v_i64m2(...) __riscv_vloxseg3ei64_v_i64m2(__VA_ARGS__)

#define	vloxseg3ei64_v_i64m2_m(...) __riscv_vloxseg3ei64_v_i64m2_tumu(__VA_ARGS__)

#define	vloxseg3ei64_v_i8m1(...) __riscv_vloxseg3ei64_v_i8m1(__VA_ARGS__)

#define	vloxseg3ei64_v_i8m1_m(...) __riscv_vloxseg3ei64_v_i8m1_tumu(__VA_ARGS__)

#define	vloxseg3ei64_v_i8mf2(...) __riscv_vloxseg3ei64_v_i8mf2(__VA_ARGS__)

#define	vloxseg3ei64_v_i8mf2_m(...) __riscv_vloxseg3ei64_v_i8mf2_tumu(__VA_ARGS__)

#define	vloxseg3ei64_v_i8mf4(...) __riscv_vloxseg3ei64_v_i8mf4(__VA_ARGS__)

#define	vloxseg3ei64_v_i8mf4_m(...) __riscv_vloxseg3ei64_v_i8mf4_tumu(__VA_ARGS__)

#define	vloxseg3ei64_v_i8mf8(...) __riscv_vloxseg3ei64_v_i8mf8(__VA_ARGS__)

#define	vloxseg3ei64_v_i8mf8_m(...) __riscv_vloxseg3ei64_v_i8mf8_tumu(__VA_ARGS__)

#define	vloxseg3ei64_v_u16m1(...) __riscv_vloxseg3ei64_v_u16m1(__VA_ARGS__)

#define	vloxseg3ei64_v_u16m1_m(...) __riscv_vloxseg3ei64_v_u16m1_tumu(__VA_ARGS__)

#define	vloxseg3ei64_v_u16m2(...) __riscv_vloxseg3ei64_v_u16m2(__VA_ARGS__)

#define	vloxseg3ei64_v_u16m2_m(...) __riscv_vloxseg3ei64_v_u16m2_tumu(__VA_ARGS__)

#define	vloxseg3ei64_v_u16mf2(...) __riscv_vloxseg3ei64_v_u16mf2(__VA_ARGS__)

#define	vloxseg3ei64_v_u16mf2_m(...) __riscv_vloxseg3ei64_v_u16mf2_tumu(__VA_ARGS__)

#define	vloxseg3ei64_v_u16mf4(...) __riscv_vloxseg3ei64_v_u16mf4(__VA_ARGS__)

#define	vloxseg3ei64_v_u16mf4_m(...) __riscv_vloxseg3ei64_v_u16mf4_tumu(__VA_ARGS__)

#define	vloxseg3ei64_v_u32m1(...) __riscv_vloxseg3ei64_v_u32m1(__VA_ARGS__)

#define	vloxseg3ei64_v_u32m1_m(...) __riscv_vloxseg3ei64_v_u32m1_tumu(__VA_ARGS__)

#define	vloxseg3ei64_v_u32m2(...) __riscv_vloxseg3ei64_v_u32m2(__VA_ARGS__)

#define	vloxseg3ei64_v_u32m2_m(...) __riscv_vloxseg3ei64_v_u32m2_tumu(__VA_ARGS__)

#define	vloxseg3ei64_v_u32mf2(...) __riscv_vloxseg3ei64_v_u32mf2(__VA_ARGS__)

#define	vloxseg3ei64_v_u32mf2_m(...) __riscv_vloxseg3ei64_v_u32mf2_tumu(__VA_ARGS__)

#define	vloxseg3ei64_v_u64m1(...) __riscv_vloxseg3ei64_v_u64m1(__VA_ARGS__)

#define	vloxseg3ei64_v_u64m1_m(...) __riscv_vloxseg3ei64_v_u64m1_tumu(__VA_ARGS__)

#define	vloxseg3ei64_v_u64m2(...) __riscv_vloxseg3ei64_v_u64m2(__VA_ARGS__)

#define	vloxseg3ei64_v_u64m2_m(...) __riscv_vloxseg3ei64_v_u64m2_tumu(__VA_ARGS__)

#define	vloxseg3ei64_v_u8m1(...) __riscv_vloxseg3ei64_v_u8m1(__VA_ARGS__)

#define	vloxseg3ei64_v_u8m1_m(...) __riscv_vloxseg3ei64_v_u8m1_tumu(__VA_ARGS__)

#define	vloxseg3ei64_v_u8mf2(...) __riscv_vloxseg3ei64_v_u8mf2(__VA_ARGS__)

#define	vloxseg3ei64_v_u8mf2_m(...) __riscv_vloxseg3ei64_v_u8mf2_tumu(__VA_ARGS__)

#define	vloxseg3ei64_v_u8mf4(...) __riscv_vloxseg3ei64_v_u8mf4(__VA_ARGS__)

#define	vloxseg3ei64_v_u8mf4_m(...) __riscv_vloxseg3ei64_v_u8mf4_tumu(__VA_ARGS__)

#define	vloxseg3ei64_v_u8mf8(...) __riscv_vloxseg3ei64_v_u8mf8(__VA_ARGS__)

#define	vloxseg3ei64_v_u8mf8_m(...) __riscv_vloxseg3ei64_v_u8mf8_tumu(__VA_ARGS__)

#define	vloxseg3ei8_v_f16m1(...) __riscv_vloxseg3ei8_v_f16m1(__VA_ARGS__)

#define	vloxseg3ei8_v_f16m1_m(...) __riscv_vloxseg3ei8_v_f16m1_tumu(__VA_ARGS__)

#define	vloxseg3ei8_v_f16m2(...) __riscv_vloxseg3ei8_v_f16m2(__VA_ARGS__)

#define	vloxseg3ei8_v_f16m2_m(...) __riscv_vloxseg3ei8_v_f16m2_tumu(__VA_ARGS__)

#define	vloxseg3ei8_v_f16mf2(...) __riscv_vloxseg3ei8_v_f16mf2(__VA_ARGS__)

#define	vloxseg3ei8_v_f16mf2_m(...) __riscv_vloxseg3ei8_v_f16mf2_tumu(__VA_ARGS__)

#define	vloxseg3ei8_v_f16mf4(...) __riscv_vloxseg3ei8_v_f16mf4(__VA_ARGS__)

#define	vloxseg3ei8_v_f16mf4_m(...) __riscv_vloxseg3ei8_v_f16mf4_tumu(__VA_ARGS__)

#define	vloxseg3ei8_v_f32m1(...) __riscv_vloxseg3ei8_v_f32m1(__VA_ARGS__)

#define	vloxseg3ei8_v_f32m1_m(...) __riscv_vloxseg3ei8_v_f32m1_tumu(__VA_ARGS__)

#define	vloxseg3ei8_v_f32m2(...) __riscv_vloxseg3ei8_v_f32m2(__VA_ARGS__)

#define	vloxseg3ei8_v_f32m2_m(...) __riscv_vloxseg3ei8_v_f32m2_tumu(__VA_ARGS__)

#define	vloxseg3ei8_v_f32mf2(...) __riscv_vloxseg3ei8_v_f32mf2(__VA_ARGS__)

#define	vloxseg3ei8_v_f32mf2_m(...) __riscv_vloxseg3ei8_v_f32mf2_tumu(__VA_ARGS__)

#define	vloxseg3ei8_v_f64m1(...) __riscv_vloxseg3ei8_v_f64m1(__VA_ARGS__)

#define	vloxseg3ei8_v_f64m1_m(...) __riscv_vloxseg3ei8_v_f64m1_tumu(__VA_ARGS__)

#define	vloxseg3ei8_v_f64m2(...) __riscv_vloxseg3ei8_v_f64m2(__VA_ARGS__)

#define	vloxseg3ei8_v_f64m2_m(...) __riscv_vloxseg3ei8_v_f64m2_tumu(__VA_ARGS__)

#define	vloxseg3ei8_v_i16m1(...) __riscv_vloxseg3ei8_v_i16m1(__VA_ARGS__)

#define	vloxseg3ei8_v_i16m1_m(...) __riscv_vloxseg3ei8_v_i16m1_tumu(__VA_ARGS__)

#define	vloxseg3ei8_v_i16m2(...) __riscv_vloxseg3ei8_v_i16m2(__VA_ARGS__)

#define	vloxseg3ei8_v_i16m2_m(...) __riscv_vloxseg3ei8_v_i16m2_tumu(__VA_ARGS__)

#define	vloxseg3ei8_v_i16mf2(...) __riscv_vloxseg3ei8_v_i16mf2(__VA_ARGS__)

#define	vloxseg3ei8_v_i16mf2_m(...) __riscv_vloxseg3ei8_v_i16mf2_tumu(__VA_ARGS__)

#define	vloxseg3ei8_v_i16mf4(...) __riscv_vloxseg3ei8_v_i16mf4(__VA_ARGS__)

#define	vloxseg3ei8_v_i16mf4_m(...) __riscv_vloxseg3ei8_v_i16mf4_tumu(__VA_ARGS__)

#define	vloxseg3ei8_v_i32m1(...) __riscv_vloxseg3ei8_v_i32m1(__VA_ARGS__)

#define	vloxseg3ei8_v_i32m1_m(...) __riscv_vloxseg3ei8_v_i32m1_tumu(__VA_ARGS__)

#define	vloxseg3ei8_v_i32m2(...) __riscv_vloxseg3ei8_v_i32m2(__VA_ARGS__)

#define	vloxseg3ei8_v_i32m2_m(...) __riscv_vloxseg3ei8_v_i32m2_tumu(__VA_ARGS__)

#define	vloxseg3ei8_v_i32mf2(...) __riscv_vloxseg3ei8_v_i32mf2(__VA_ARGS__)

#define	vloxseg3ei8_v_i32mf2_m(...) __riscv_vloxseg3ei8_v_i32mf2_tumu(__VA_ARGS__)

#define	vloxseg3ei8_v_i64m1(...) __riscv_vloxseg3ei8_v_i64m1(__VA_ARGS__)

#define	vloxseg3ei8_v_i64m1_m(...) __riscv_vloxseg3ei8_v_i64m1_tumu(__VA_ARGS__)

#define	vloxseg3ei8_v_i64m2(...) __riscv_vloxseg3ei8_v_i64m2(__VA_ARGS__)

#define	vloxseg3ei8_v_i64m2_m(...) __riscv_vloxseg3ei8_v_i64m2_tumu(__VA_ARGS__)

#define	vloxseg3ei8_v_i8m1(...) __riscv_vloxseg3ei8_v_i8m1(__VA_ARGS__)

#define	vloxseg3ei8_v_i8m1_m(...) __riscv_vloxseg3ei8_v_i8m1_tumu(__VA_ARGS__)

#define	vloxseg3ei8_v_i8m2(...) __riscv_vloxseg3ei8_v_i8m2(__VA_ARGS__)

#define	vloxseg3ei8_v_i8m2_m(...) __riscv_vloxseg3ei8_v_i8m2_tumu(__VA_ARGS__)

#define	vloxseg3ei8_v_i8mf2(...) __riscv_vloxseg3ei8_v_i8mf2(__VA_ARGS__)

#define	vloxseg3ei8_v_i8mf2_m(...) __riscv_vloxseg3ei8_v_i8mf2_tumu(__VA_ARGS__)

#define	vloxseg3ei8_v_i8mf4(...) __riscv_vloxseg3ei8_v_i8mf4(__VA_ARGS__)

#define	vloxseg3ei8_v_i8mf4_m(...) __riscv_vloxseg3ei8_v_i8mf4_tumu(__VA_ARGS__)

#define	vloxseg3ei8_v_i8mf8(...) __riscv_vloxseg3ei8_v_i8mf8(__VA_ARGS__)

#define	vloxseg3ei8_v_i8mf8_m(...) __riscv_vloxseg3ei8_v_i8mf8_tumu(__VA_ARGS__)

#define	vloxseg3ei8_v_u16m1(...) __riscv_vloxseg3ei8_v_u16m1(__VA_ARGS__)

#define	vloxseg3ei8_v_u16m1_m(...) __riscv_vloxseg3ei8_v_u16m1_tumu(__VA_ARGS__)

#define	vloxseg3ei8_v_u16m2(...) __riscv_vloxseg3ei8_v_u16m2(__VA_ARGS__)

#define	vloxseg3ei8_v_u16m2_m(...) __riscv_vloxseg3ei8_v_u16m2_tumu(__VA_ARGS__)

#define	vloxseg3ei8_v_u16mf2(...) __riscv_vloxseg3ei8_v_u16mf2(__VA_ARGS__)

#define	vloxseg3ei8_v_u16mf2_m(...) __riscv_vloxseg3ei8_v_u16mf2_tumu(__VA_ARGS__)

#define	vloxseg3ei8_v_u16mf4(...) __riscv_vloxseg3ei8_v_u16mf4(__VA_ARGS__)

#define	vloxseg3ei8_v_u16mf4_m(...) __riscv_vloxseg3ei8_v_u16mf4_tumu(__VA_ARGS__)

#define	vloxseg3ei8_v_u32m1(...) __riscv_vloxseg3ei8_v_u32m1(__VA_ARGS__)

#define	vloxseg3ei8_v_u32m1_m(...) __riscv_vloxseg3ei8_v_u32m1_tumu(__VA_ARGS__)

#define	vloxseg3ei8_v_u32m2(...) __riscv_vloxseg3ei8_v_u32m2(__VA_ARGS__)

#define	vloxseg3ei8_v_u32m2_m(...) __riscv_vloxseg3ei8_v_u32m2_tumu(__VA_ARGS__)

#define	vloxseg3ei8_v_u32mf2(...) __riscv_vloxseg3ei8_v_u32mf2(__VA_ARGS__)

#define	vloxseg3ei8_v_u32mf2_m(...) __riscv_vloxseg3ei8_v_u32mf2_tumu(__VA_ARGS__)

#define	vloxseg3ei8_v_u64m1(...) __riscv_vloxseg3ei8_v_u64m1(__VA_ARGS__)

#define	vloxseg3ei8_v_u64m1_m(...) __riscv_vloxseg3ei8_v_u64m1_tumu(__VA_ARGS__)

#define	vloxseg3ei8_v_u64m2(...) __riscv_vloxseg3ei8_v_u64m2(__VA_ARGS__)

#define	vloxseg3ei8_v_u64m2_m(...) __riscv_vloxseg3ei8_v_u64m2_tumu(__VA_ARGS__)

#define	vloxseg3ei8_v_u8m1(...) __riscv_vloxseg3ei8_v_u8m1(__VA_ARGS__)

#define	vloxseg3ei8_v_u8m1_m(...) __riscv_vloxseg3ei8_v_u8m1_tumu(__VA_ARGS__)

#define	vloxseg3ei8_v_u8m2(...) __riscv_vloxseg3ei8_v_u8m2(__VA_ARGS__)

#define	vloxseg3ei8_v_u8m2_m(...) __riscv_vloxseg3ei8_v_u8m2_tumu(__VA_ARGS__)

#define	vloxseg3ei8_v_u8mf2(...) __riscv_vloxseg3ei8_v_u8mf2(__VA_ARGS__)

#define	vloxseg3ei8_v_u8mf2_m(...) __riscv_vloxseg3ei8_v_u8mf2_tumu(__VA_ARGS__)

#define	vloxseg3ei8_v_u8mf4(...) __riscv_vloxseg3ei8_v_u8mf4(__VA_ARGS__)

#define	vloxseg3ei8_v_u8mf4_m(...) __riscv_vloxseg3ei8_v_u8mf4_tumu(__VA_ARGS__)

#define	vloxseg3ei8_v_u8mf8(...) __riscv_vloxseg3ei8_v_u8mf8(__VA_ARGS__)

#define	vloxseg3ei8_v_u8mf8_m(...) __riscv_vloxseg3ei8_v_u8mf8_tumu(__VA_ARGS__)

#define	vloxseg4ei16_v_f16m1(...) __riscv_vloxseg4ei16_v_f16m1(__VA_ARGS__)

#define	vloxseg4ei16_v_f16m1_m(...) __riscv_vloxseg4ei16_v_f16m1_tumu(__VA_ARGS__)

#define	vloxseg4ei16_v_f16m2(...) __riscv_vloxseg4ei16_v_f16m2(__VA_ARGS__)

#define	vloxseg4ei16_v_f16m2_m(...) __riscv_vloxseg4ei16_v_f16m2_tumu(__VA_ARGS__)

#define	vloxseg4ei16_v_f16mf2(...) __riscv_vloxseg4ei16_v_f16mf2(__VA_ARGS__)

#define	vloxseg4ei16_v_f16mf2_m(...) __riscv_vloxseg4ei16_v_f16mf2_tumu(__VA_ARGS__)

#define	vloxseg4ei16_v_f16mf4(...) __riscv_vloxseg4ei16_v_f16mf4(__VA_ARGS__)

#define	vloxseg4ei16_v_f16mf4_m(...) __riscv_vloxseg4ei16_v_f16mf4_tumu(__VA_ARGS__)

#define	vloxseg4ei16_v_f32m1(...) __riscv_vloxseg4ei16_v_f32m1(__VA_ARGS__)

#define	vloxseg4ei16_v_f32m1_m(...) __riscv_vloxseg4ei16_v_f32m1_tumu(__VA_ARGS__)

#define	vloxseg4ei16_v_f32m2(...) __riscv_vloxseg4ei16_v_f32m2(__VA_ARGS__)

#define	vloxseg4ei16_v_f32m2_m(...) __riscv_vloxseg4ei16_v_f32m2_tumu(__VA_ARGS__)

#define	vloxseg4ei16_v_f32mf2(...) __riscv_vloxseg4ei16_v_f32mf2(__VA_ARGS__)

#define	vloxseg4ei16_v_f32mf2_m(...) __riscv_vloxseg4ei16_v_f32mf2_tumu(__VA_ARGS__)

#define	vloxseg4ei16_v_f64m1(...) __riscv_vloxseg4ei16_v_f64m1(__VA_ARGS__)

#define	vloxseg4ei16_v_f64m1_m(...) __riscv_vloxseg4ei16_v_f64m1_tumu(__VA_ARGS__)

#define	vloxseg4ei16_v_f64m2(...) __riscv_vloxseg4ei16_v_f64m2(__VA_ARGS__)

#define	vloxseg4ei16_v_f64m2_m(...) __riscv_vloxseg4ei16_v_f64m2_tumu(__VA_ARGS__)

#define	vloxseg4ei16_v_i16m1(...) __riscv_vloxseg4ei16_v_i16m1(__VA_ARGS__)

#define	vloxseg4ei16_v_i16m1_m(...) __riscv_vloxseg4ei16_v_i16m1_tumu(__VA_ARGS__)

#define	vloxseg4ei16_v_i16m2(...) __riscv_vloxseg4ei16_v_i16m2(__VA_ARGS__)

#define	vloxseg4ei16_v_i16m2_m(...) __riscv_vloxseg4ei16_v_i16m2_tumu(__VA_ARGS__)

#define	vloxseg4ei16_v_i16mf2(...) __riscv_vloxseg4ei16_v_i16mf2(__VA_ARGS__)

#define	vloxseg4ei16_v_i16mf2_m(...) __riscv_vloxseg4ei16_v_i16mf2_tumu(__VA_ARGS__)

#define	vloxseg4ei16_v_i16mf4(...) __riscv_vloxseg4ei16_v_i16mf4(__VA_ARGS__)

#define	vloxseg4ei16_v_i16mf4_m(...) __riscv_vloxseg4ei16_v_i16mf4_tumu(__VA_ARGS__)

#define	vloxseg4ei16_v_i32m1(...) __riscv_vloxseg4ei16_v_i32m1(__VA_ARGS__)

#define	vloxseg4ei16_v_i32m1_m(...) __riscv_vloxseg4ei16_v_i32m1_tumu(__VA_ARGS__)

#define	vloxseg4ei16_v_i32m2(...) __riscv_vloxseg4ei16_v_i32m2(__VA_ARGS__)

#define	vloxseg4ei16_v_i32m2_m(...) __riscv_vloxseg4ei16_v_i32m2_tumu(__VA_ARGS__)

#define	vloxseg4ei16_v_i32mf2(...) __riscv_vloxseg4ei16_v_i32mf2(__VA_ARGS__)

#define	vloxseg4ei16_v_i32mf2_m(...) __riscv_vloxseg4ei16_v_i32mf2_tumu(__VA_ARGS__)

#define	vloxseg4ei16_v_i64m1(...) __riscv_vloxseg4ei16_v_i64m1(__VA_ARGS__)

#define	vloxseg4ei16_v_i64m1_m(...) __riscv_vloxseg4ei16_v_i64m1_tumu(__VA_ARGS__)

#define	vloxseg4ei16_v_i64m2(...) __riscv_vloxseg4ei16_v_i64m2(__VA_ARGS__)

#define	vloxseg4ei16_v_i64m2_m(...) __riscv_vloxseg4ei16_v_i64m2_tumu(__VA_ARGS__)

#define	vloxseg4ei16_v_i8m1(...) __riscv_vloxseg4ei16_v_i8m1(__VA_ARGS__)

#define	vloxseg4ei16_v_i8m1_m(...) __riscv_vloxseg4ei16_v_i8m1_tumu(__VA_ARGS__)

#define	vloxseg4ei16_v_i8m2(...) __riscv_vloxseg4ei16_v_i8m2(__VA_ARGS__)

#define	vloxseg4ei16_v_i8m2_m(...) __riscv_vloxseg4ei16_v_i8m2_tumu(__VA_ARGS__)

#define	vloxseg4ei16_v_i8mf2(...) __riscv_vloxseg4ei16_v_i8mf2(__VA_ARGS__)

#define	vloxseg4ei16_v_i8mf2_m(...) __riscv_vloxseg4ei16_v_i8mf2_tumu(__VA_ARGS__)

#define	vloxseg4ei16_v_i8mf4(...) __riscv_vloxseg4ei16_v_i8mf4(__VA_ARGS__)

#define	vloxseg4ei16_v_i8mf4_m(...) __riscv_vloxseg4ei16_v_i8mf4_tumu(__VA_ARGS__)

#define	vloxseg4ei16_v_i8mf8(...) __riscv_vloxseg4ei16_v_i8mf8(__VA_ARGS__)

#define	vloxseg4ei16_v_i8mf8_m(...) __riscv_vloxseg4ei16_v_i8mf8_tumu(__VA_ARGS__)

#define	vloxseg4ei16_v_u16m1(...) __riscv_vloxseg4ei16_v_u16m1(__VA_ARGS__)

#define	vloxseg4ei16_v_u16m1_m(...) __riscv_vloxseg4ei16_v_u16m1_tumu(__VA_ARGS__)

#define	vloxseg4ei16_v_u16m2(...) __riscv_vloxseg4ei16_v_u16m2(__VA_ARGS__)

#define	vloxseg4ei16_v_u16m2_m(...) __riscv_vloxseg4ei16_v_u16m2_tumu(__VA_ARGS__)

#define	vloxseg4ei16_v_u16mf2(...) __riscv_vloxseg4ei16_v_u16mf2(__VA_ARGS__)

#define	vloxseg4ei16_v_u16mf2_m(...) __riscv_vloxseg4ei16_v_u16mf2_tumu(__VA_ARGS__)

#define	vloxseg4ei16_v_u16mf4(...) __riscv_vloxseg4ei16_v_u16mf4(__VA_ARGS__)

#define	vloxseg4ei16_v_u16mf4_m(...) __riscv_vloxseg4ei16_v_u16mf4_tumu(__VA_ARGS__)

#define	vloxseg4ei16_v_u32m1(...) __riscv_vloxseg4ei16_v_u32m1(__VA_ARGS__)

#define	vloxseg4ei16_v_u32m1_m(...) __riscv_vloxseg4ei16_v_u32m1_tumu(__VA_ARGS__)

#define	vloxseg4ei16_v_u32m2(...) __riscv_vloxseg4ei16_v_u32m2(__VA_ARGS__)

#define	vloxseg4ei16_v_u32m2_m(...) __riscv_vloxseg4ei16_v_u32m2_tumu(__VA_ARGS__)

#define	vloxseg4ei16_v_u32mf2(...) __riscv_vloxseg4ei16_v_u32mf2(__VA_ARGS__)

#define	vloxseg4ei16_v_u32mf2_m(...) __riscv_vloxseg4ei16_v_u32mf2_tumu(__VA_ARGS__)

#define	vloxseg4ei16_v_u64m1(...) __riscv_vloxseg4ei16_v_u64m1(__VA_ARGS__)

#define	vloxseg4ei16_v_u64m1_m(...) __riscv_vloxseg4ei16_v_u64m1_tumu(__VA_ARGS__)

#define	vloxseg4ei16_v_u64m2(...) __riscv_vloxseg4ei16_v_u64m2(__VA_ARGS__)

#define	vloxseg4ei16_v_u64m2_m(...) __riscv_vloxseg4ei16_v_u64m2_tumu(__VA_ARGS__)

#define	vloxseg4ei16_v_u8m1(...) __riscv_vloxseg4ei16_v_u8m1(__VA_ARGS__)

#define	vloxseg4ei16_v_u8m1_m(...) __riscv_vloxseg4ei16_v_u8m1_tumu(__VA_ARGS__)

#define	vloxseg4ei16_v_u8m2(...) __riscv_vloxseg4ei16_v_u8m2(__VA_ARGS__)

#define	vloxseg4ei16_v_u8m2_m(...) __riscv_vloxseg4ei16_v_u8m2_tumu(__VA_ARGS__)

#define	vloxseg4ei16_v_u8mf2(...) __riscv_vloxseg4ei16_v_u8mf2(__VA_ARGS__)

#define	vloxseg4ei16_v_u8mf2_m(...) __riscv_vloxseg4ei16_v_u8mf2_tumu(__VA_ARGS__)

#define	vloxseg4ei16_v_u8mf4(...) __riscv_vloxseg4ei16_v_u8mf4(__VA_ARGS__)

#define	vloxseg4ei16_v_u8mf4_m(...) __riscv_vloxseg4ei16_v_u8mf4_tumu(__VA_ARGS__)

#define	vloxseg4ei16_v_u8mf8(...) __riscv_vloxseg4ei16_v_u8mf8(__VA_ARGS__)

#define	vloxseg4ei16_v_u8mf8_m(...) __riscv_vloxseg4ei16_v_u8mf8_tumu(__VA_ARGS__)

#define	vloxseg4ei32_v_f16m1(...) __riscv_vloxseg4ei32_v_f16m1(__VA_ARGS__)

#define	vloxseg4ei32_v_f16m1_m(...) __riscv_vloxseg4ei32_v_f16m1_tumu(__VA_ARGS__)

#define	vloxseg4ei32_v_f16m2(...) __riscv_vloxseg4ei32_v_f16m2(__VA_ARGS__)

#define	vloxseg4ei32_v_f16m2_m(...) __riscv_vloxseg4ei32_v_f16m2_tumu(__VA_ARGS__)

#define	vloxseg4ei32_v_f16mf2(...) __riscv_vloxseg4ei32_v_f16mf2(__VA_ARGS__)

#define	vloxseg4ei32_v_f16mf2_m(...) __riscv_vloxseg4ei32_v_f16mf2_tumu(__VA_ARGS__)

#define	vloxseg4ei32_v_f16mf4(...) __riscv_vloxseg4ei32_v_f16mf4(__VA_ARGS__)

#define	vloxseg4ei32_v_f16mf4_m(...) __riscv_vloxseg4ei32_v_f16mf4_tumu(__VA_ARGS__)

#define	vloxseg4ei32_v_f32m1(...) __riscv_vloxseg4ei32_v_f32m1(__VA_ARGS__)

#define	vloxseg4ei32_v_f32m1_m(...) __riscv_vloxseg4ei32_v_f32m1_tumu(__VA_ARGS__)

#define	vloxseg4ei32_v_f32m2(...) __riscv_vloxseg4ei32_v_f32m2(__VA_ARGS__)

#define	vloxseg4ei32_v_f32m2_m(...) __riscv_vloxseg4ei32_v_f32m2_tumu(__VA_ARGS__)

#define	vloxseg4ei32_v_f32mf2(...) __riscv_vloxseg4ei32_v_f32mf2(__VA_ARGS__)

#define	vloxseg4ei32_v_f32mf2_m(...) __riscv_vloxseg4ei32_v_f32mf2_tumu(__VA_ARGS__)

#define	vloxseg4ei32_v_f64m1(...) __riscv_vloxseg4ei32_v_f64m1(__VA_ARGS__)

#define	vloxseg4ei32_v_f64m1_m(...) __riscv_vloxseg4ei32_v_f64m1_tumu(__VA_ARGS__)

#define	vloxseg4ei32_v_f64m2(...) __riscv_vloxseg4ei32_v_f64m2(__VA_ARGS__)

#define	vloxseg4ei32_v_f64m2_m(...) __riscv_vloxseg4ei32_v_f64m2_tumu(__VA_ARGS__)

#define	vloxseg4ei32_v_i16m1(...) __riscv_vloxseg4ei32_v_i16m1(__VA_ARGS__)

#define	vloxseg4ei32_v_i16m1_m(...) __riscv_vloxseg4ei32_v_i16m1_tumu(__VA_ARGS__)

#define	vloxseg4ei32_v_i16m2(...) __riscv_vloxseg4ei32_v_i16m2(__VA_ARGS__)

#define	vloxseg4ei32_v_i16m2_m(...) __riscv_vloxseg4ei32_v_i16m2_tumu(__VA_ARGS__)

#define	vloxseg4ei32_v_i16mf2(...) __riscv_vloxseg4ei32_v_i16mf2(__VA_ARGS__)

#define	vloxseg4ei32_v_i16mf2_m(...) __riscv_vloxseg4ei32_v_i16mf2_tumu(__VA_ARGS__)

#define	vloxseg4ei32_v_i16mf4(...) __riscv_vloxseg4ei32_v_i16mf4(__VA_ARGS__)

#define	vloxseg4ei32_v_i16mf4_m(...) __riscv_vloxseg4ei32_v_i16mf4_tumu(__VA_ARGS__)

#define	vloxseg4ei32_v_i32m1(...) __riscv_vloxseg4ei32_v_i32m1(__VA_ARGS__)

#define	vloxseg4ei32_v_i32m1_m(...) __riscv_vloxseg4ei32_v_i32m1_tumu(__VA_ARGS__)

#define	vloxseg4ei32_v_i32m2(...) __riscv_vloxseg4ei32_v_i32m2(__VA_ARGS__)

#define	vloxseg4ei32_v_i32m2_m(...) __riscv_vloxseg4ei32_v_i32m2_tumu(__VA_ARGS__)

#define	vloxseg4ei32_v_i32mf2(...) __riscv_vloxseg4ei32_v_i32mf2(__VA_ARGS__)

#define	vloxseg4ei32_v_i32mf2_m(...) __riscv_vloxseg4ei32_v_i32mf2_tumu(__VA_ARGS__)

#define	vloxseg4ei32_v_i64m1(...) __riscv_vloxseg4ei32_v_i64m1(__VA_ARGS__)

#define	vloxseg4ei32_v_i64m1_m(...) __riscv_vloxseg4ei32_v_i64m1_tumu(__VA_ARGS__)

#define	vloxseg4ei32_v_i64m2(...) __riscv_vloxseg4ei32_v_i64m2(__VA_ARGS__)

#define	vloxseg4ei32_v_i64m2_m(...) __riscv_vloxseg4ei32_v_i64m2_tumu(__VA_ARGS__)

#define	vloxseg4ei32_v_i8m1(...) __riscv_vloxseg4ei32_v_i8m1(__VA_ARGS__)

#define	vloxseg4ei32_v_i8m1_m(...) __riscv_vloxseg4ei32_v_i8m1_tumu(__VA_ARGS__)

#define	vloxseg4ei32_v_i8m2(...) __riscv_vloxseg4ei32_v_i8m2(__VA_ARGS__)

#define	vloxseg4ei32_v_i8m2_m(...) __riscv_vloxseg4ei32_v_i8m2_tumu(__VA_ARGS__)

#define	vloxseg4ei32_v_i8mf2(...) __riscv_vloxseg4ei32_v_i8mf2(__VA_ARGS__)

#define	vloxseg4ei32_v_i8mf2_m(...) __riscv_vloxseg4ei32_v_i8mf2_tumu(__VA_ARGS__)

#define	vloxseg4ei32_v_i8mf4(...) __riscv_vloxseg4ei32_v_i8mf4(__VA_ARGS__)

#define	vloxseg4ei32_v_i8mf4_m(...) __riscv_vloxseg4ei32_v_i8mf4_tumu(__VA_ARGS__)

#define	vloxseg4ei32_v_i8mf8(...) __riscv_vloxseg4ei32_v_i8mf8(__VA_ARGS__)

#define	vloxseg4ei32_v_i8mf8_m(...) __riscv_vloxseg4ei32_v_i8mf8_tumu(__VA_ARGS__)

#define	vloxseg4ei32_v_u16m1(...) __riscv_vloxseg4ei32_v_u16m1(__VA_ARGS__)

#define	vloxseg4ei32_v_u16m1_m(...) __riscv_vloxseg4ei32_v_u16m1_tumu(__VA_ARGS__)

#define	vloxseg4ei32_v_u16m2(...) __riscv_vloxseg4ei32_v_u16m2(__VA_ARGS__)

#define	vloxseg4ei32_v_u16m2_m(...) __riscv_vloxseg4ei32_v_u16m2_tumu(__VA_ARGS__)

#define	vloxseg4ei32_v_u16mf2(...) __riscv_vloxseg4ei32_v_u16mf2(__VA_ARGS__)

#define	vloxseg4ei32_v_u16mf2_m(...) __riscv_vloxseg4ei32_v_u16mf2_tumu(__VA_ARGS__)

#define	vloxseg4ei32_v_u16mf4(...) __riscv_vloxseg4ei32_v_u16mf4(__VA_ARGS__)

#define	vloxseg4ei32_v_u16mf4_m(...) __riscv_vloxseg4ei32_v_u16mf4_tumu(__VA_ARGS__)

#define	vloxseg4ei32_v_u32m1(...) __riscv_vloxseg4ei32_v_u32m1(__VA_ARGS__)

#define	vloxseg4ei32_v_u32m1_m(...) __riscv_vloxseg4ei32_v_u32m1_tumu(__VA_ARGS__)

#define	vloxseg4ei32_v_u32m2(...) __riscv_vloxseg4ei32_v_u32m2(__VA_ARGS__)

#define	vloxseg4ei32_v_u32m2_m(...) __riscv_vloxseg4ei32_v_u32m2_tumu(__VA_ARGS__)

#define	vloxseg4ei32_v_u32mf2(...) __riscv_vloxseg4ei32_v_u32mf2(__VA_ARGS__)

#define	vloxseg4ei32_v_u32mf2_m(...) __riscv_vloxseg4ei32_v_u32mf2_tumu(__VA_ARGS__)

#define	vloxseg4ei32_v_u64m1(...) __riscv_vloxseg4ei32_v_u64m1(__VA_ARGS__)

#define	vloxseg4ei32_v_u64m1_m(...) __riscv_vloxseg4ei32_v_u64m1_tumu(__VA_ARGS__)

#define	vloxseg4ei32_v_u64m2(...) __riscv_vloxseg4ei32_v_u64m2(__VA_ARGS__)

#define	vloxseg4ei32_v_u64m2_m(...) __riscv_vloxseg4ei32_v_u64m2_tumu(__VA_ARGS__)

#define	vloxseg4ei32_v_u8m1(...) __riscv_vloxseg4ei32_v_u8m1(__VA_ARGS__)

#define	vloxseg4ei32_v_u8m1_m(...) __riscv_vloxseg4ei32_v_u8m1_tumu(__VA_ARGS__)

#define	vloxseg4ei32_v_u8m2(...) __riscv_vloxseg4ei32_v_u8m2(__VA_ARGS__)

#define	vloxseg4ei32_v_u8m2_m(...) __riscv_vloxseg4ei32_v_u8m2_tumu(__VA_ARGS__)

#define	vloxseg4ei32_v_u8mf2(...) __riscv_vloxseg4ei32_v_u8mf2(__VA_ARGS__)

#define	vloxseg4ei32_v_u8mf2_m(...) __riscv_vloxseg4ei32_v_u8mf2_tumu(__VA_ARGS__)

#define	vloxseg4ei32_v_u8mf4(...) __riscv_vloxseg4ei32_v_u8mf4(__VA_ARGS__)

#define	vloxseg4ei32_v_u8mf4_m(...) __riscv_vloxseg4ei32_v_u8mf4_tumu(__VA_ARGS__)

#define	vloxseg4ei32_v_u8mf8(...) __riscv_vloxseg4ei32_v_u8mf8(__VA_ARGS__)

#define	vloxseg4ei32_v_u8mf8_m(...) __riscv_vloxseg4ei32_v_u8mf8_tumu(__VA_ARGS__)

#define	vloxseg4ei64_v_f16m1(...) __riscv_vloxseg4ei64_v_f16m1(__VA_ARGS__)

#define	vloxseg4ei64_v_f16m1_m(...) __riscv_vloxseg4ei64_v_f16m1_tumu(__VA_ARGS__)

#define	vloxseg4ei64_v_f16m2(...) __riscv_vloxseg4ei64_v_f16m2(__VA_ARGS__)

#define	vloxseg4ei64_v_f16m2_m(...) __riscv_vloxseg4ei64_v_f16m2_tumu(__VA_ARGS__)

#define	vloxseg4ei64_v_f16mf2(...) __riscv_vloxseg4ei64_v_f16mf2(__VA_ARGS__)

#define	vloxseg4ei64_v_f16mf2_m(...) __riscv_vloxseg4ei64_v_f16mf2_tumu(__VA_ARGS__)

#define	vloxseg4ei64_v_f16mf4(...) __riscv_vloxseg4ei64_v_f16mf4(__VA_ARGS__)

#define	vloxseg4ei64_v_f16mf4_m(...) __riscv_vloxseg4ei64_v_f16mf4_tumu(__VA_ARGS__)

#define	vloxseg4ei64_v_f32m1(...) __riscv_vloxseg4ei64_v_f32m1(__VA_ARGS__)

#define	vloxseg4ei64_v_f32m1_m(...) __riscv_vloxseg4ei64_v_f32m1_tumu(__VA_ARGS__)

#define	vloxseg4ei64_v_f32m2(...) __riscv_vloxseg4ei64_v_f32m2(__VA_ARGS__)

#define	vloxseg4ei64_v_f32m2_m(...) __riscv_vloxseg4ei64_v_f32m2_tumu(__VA_ARGS__)

#define	vloxseg4ei64_v_f32mf2(...) __riscv_vloxseg4ei64_v_f32mf2(__VA_ARGS__)

#define	vloxseg4ei64_v_f32mf2_m(...) __riscv_vloxseg4ei64_v_f32mf2_tumu(__VA_ARGS__)

#define	vloxseg4ei64_v_f64m1(...) __riscv_vloxseg4ei64_v_f64m1(__VA_ARGS__)

#define	vloxseg4ei64_v_f64m1_m(...) __riscv_vloxseg4ei64_v_f64m1_tumu(__VA_ARGS__)

#define	vloxseg4ei64_v_f64m2(...) __riscv_vloxseg4ei64_v_f64m2(__VA_ARGS__)

#define	vloxseg4ei64_v_f64m2_m(...) __riscv_vloxseg4ei64_v_f64m2_tumu(__VA_ARGS__)

#define	vloxseg4ei64_v_i16m1(...) __riscv_vloxseg4ei64_v_i16m1(__VA_ARGS__)

#define	vloxseg4ei64_v_i16m1_m(...) __riscv_vloxseg4ei64_v_i16m1_tumu(__VA_ARGS__)

#define	vloxseg4ei64_v_i16m2(...) __riscv_vloxseg4ei64_v_i16m2(__VA_ARGS__)

#define	vloxseg4ei64_v_i16m2_m(...) __riscv_vloxseg4ei64_v_i16m2_tumu(__VA_ARGS__)

#define	vloxseg4ei64_v_i16mf2(...) __riscv_vloxseg4ei64_v_i16mf2(__VA_ARGS__)

#define	vloxseg4ei64_v_i16mf2_m(...) __riscv_vloxseg4ei64_v_i16mf2_tumu(__VA_ARGS__)

#define	vloxseg4ei64_v_i16mf4(...) __riscv_vloxseg4ei64_v_i16mf4(__VA_ARGS__)

#define	vloxseg4ei64_v_i16mf4_m(...) __riscv_vloxseg4ei64_v_i16mf4_tumu(__VA_ARGS__)

#define	vloxseg4ei64_v_i32m1(...) __riscv_vloxseg4ei64_v_i32m1(__VA_ARGS__)

#define	vloxseg4ei64_v_i32m1_m(...) __riscv_vloxseg4ei64_v_i32m1_tumu(__VA_ARGS__)

#define	vloxseg4ei64_v_i32m2(...) __riscv_vloxseg4ei64_v_i32m2(__VA_ARGS__)

#define	vloxseg4ei64_v_i32m2_m(...) __riscv_vloxseg4ei64_v_i32m2_tumu(__VA_ARGS__)

#define	vloxseg4ei64_v_i32mf2(...) __riscv_vloxseg4ei64_v_i32mf2(__VA_ARGS__)

#define	vloxseg4ei64_v_i32mf2_m(...) __riscv_vloxseg4ei64_v_i32mf2_tumu(__VA_ARGS__)

#define	vloxseg4ei64_v_i64m1(...) __riscv_vloxseg4ei64_v_i64m1(__VA_ARGS__)

#define	vloxseg4ei64_v_i64m1_m(...) __riscv_vloxseg4ei64_v_i64m1_tumu(__VA_ARGS__)

#define	vloxseg4ei64_v_i64m2(...) __riscv_vloxseg4ei64_v_i64m2(__VA_ARGS__)

#define	vloxseg4ei64_v_i64m2_m(...) __riscv_vloxseg4ei64_v_i64m2_tumu(__VA_ARGS__)

#define	vloxseg4ei64_v_i8m1(...) __riscv_vloxseg4ei64_v_i8m1(__VA_ARGS__)

#define	vloxseg4ei64_v_i8m1_m(...) __riscv_vloxseg4ei64_v_i8m1_tumu(__VA_ARGS__)

#define	vloxseg4ei64_v_i8mf2(...) __riscv_vloxseg4ei64_v_i8mf2(__VA_ARGS__)

#define	vloxseg4ei64_v_i8mf2_m(...) __riscv_vloxseg4ei64_v_i8mf2_tumu(__VA_ARGS__)

#define	vloxseg4ei64_v_i8mf4(...) __riscv_vloxseg4ei64_v_i8mf4(__VA_ARGS__)

#define	vloxseg4ei64_v_i8mf4_m(...) __riscv_vloxseg4ei64_v_i8mf4_tumu(__VA_ARGS__)

#define	vloxseg4ei64_v_i8mf8(...) __riscv_vloxseg4ei64_v_i8mf8(__VA_ARGS__)

#define	vloxseg4ei64_v_i8mf8_m(...) __riscv_vloxseg4ei64_v_i8mf8_tumu(__VA_ARGS__)

#define	vloxseg4ei64_v_u16m1(...) __riscv_vloxseg4ei64_v_u16m1(__VA_ARGS__)

#define	vloxseg4ei64_v_u16m1_m(...) __riscv_vloxseg4ei64_v_u16m1_tumu(__VA_ARGS__)

#define	vloxseg4ei64_v_u16m2(...) __riscv_vloxseg4ei64_v_u16m2(__VA_ARGS__)

#define	vloxseg4ei64_v_u16m2_m(...) __riscv_vloxseg4ei64_v_u16m2_tumu(__VA_ARGS__)

#define	vloxseg4ei64_v_u16mf2(...) __riscv_vloxseg4ei64_v_u16mf2(__VA_ARGS__)

#define	vloxseg4ei64_v_u16mf2_m(...) __riscv_vloxseg4ei64_v_u16mf2_tumu(__VA_ARGS__)

#define	vloxseg4ei64_v_u16mf4(...) __riscv_vloxseg4ei64_v_u16mf4(__VA_ARGS__)

#define	vloxseg4ei64_v_u16mf4_m(...) __riscv_vloxseg4ei64_v_u16mf4_tumu(__VA_ARGS__)

#define	vloxseg4ei64_v_u32m1(...) __riscv_vloxseg4ei64_v_u32m1(__VA_ARGS__)

#define	vloxseg4ei64_v_u32m1_m(...) __riscv_vloxseg4ei64_v_u32m1_tumu(__VA_ARGS__)

#define	vloxseg4ei64_v_u32m2(...) __riscv_vloxseg4ei64_v_u32m2(__VA_ARGS__)

#define	vloxseg4ei64_v_u32m2_m(...) __riscv_vloxseg4ei64_v_u32m2_tumu(__VA_ARGS__)

#define	vloxseg4ei64_v_u32mf2(...) __riscv_vloxseg4ei64_v_u32mf2(__VA_ARGS__)

#define	vloxseg4ei64_v_u32mf2_m(...) __riscv_vloxseg4ei64_v_u32mf2_tumu(__VA_ARGS__)

#define	vloxseg4ei64_v_u64m1(...) __riscv_vloxseg4ei64_v_u64m1(__VA_ARGS__)

#define	vloxseg4ei64_v_u64m1_m(...) __riscv_vloxseg4ei64_v_u64m1_tumu(__VA_ARGS__)

#define	vloxseg4ei64_v_u64m2(...) __riscv_vloxseg4ei64_v_u64m2(__VA_ARGS__)

#define	vloxseg4ei64_v_u64m2_m(...) __riscv_vloxseg4ei64_v_u64m2_tumu(__VA_ARGS__)

#define	vloxseg4ei64_v_u8m1(...) __riscv_vloxseg4ei64_v_u8m1(__VA_ARGS__)

#define	vloxseg4ei64_v_u8m1_m(...) __riscv_vloxseg4ei64_v_u8m1_tumu(__VA_ARGS__)

#define	vloxseg4ei64_v_u8mf2(...) __riscv_vloxseg4ei64_v_u8mf2(__VA_ARGS__)

#define	vloxseg4ei64_v_u8mf2_m(...) __riscv_vloxseg4ei64_v_u8mf2_tumu(__VA_ARGS__)

#define	vloxseg4ei64_v_u8mf4(...) __riscv_vloxseg4ei64_v_u8mf4(__VA_ARGS__)

#define	vloxseg4ei64_v_u8mf4_m(...) __riscv_vloxseg4ei64_v_u8mf4_tumu(__VA_ARGS__)

#define	vloxseg4ei64_v_u8mf8(...) __riscv_vloxseg4ei64_v_u8mf8(__VA_ARGS__)

#define	vloxseg4ei64_v_u8mf8_m(...) __riscv_vloxseg4ei64_v_u8mf8_tumu(__VA_ARGS__)

#define	vloxseg4ei8_v_f16m1(...) __riscv_vloxseg4ei8_v_f16m1(__VA_ARGS__)

#define	vloxseg4ei8_v_f16m1_m(...) __riscv_vloxseg4ei8_v_f16m1_tumu(__VA_ARGS__)

#define	vloxseg4ei8_v_f16m2(...) __riscv_vloxseg4ei8_v_f16m2(__VA_ARGS__)

#define	vloxseg4ei8_v_f16m2_m(...) __riscv_vloxseg4ei8_v_f16m2_tumu(__VA_ARGS__)

#define	vloxseg4ei8_v_f16mf2(...) __riscv_vloxseg4ei8_v_f16mf2(__VA_ARGS__)

#define	vloxseg4ei8_v_f16mf2_m(...) __riscv_vloxseg4ei8_v_f16mf2_tumu(__VA_ARGS__)

#define	vloxseg4ei8_v_f16mf4(...) __riscv_vloxseg4ei8_v_f16mf4(__VA_ARGS__)

#define	vloxseg4ei8_v_f16mf4_m(...) __riscv_vloxseg4ei8_v_f16mf4_tumu(__VA_ARGS__)

#define	vloxseg4ei8_v_f32m1(...) __riscv_vloxseg4ei8_v_f32m1(__VA_ARGS__)

#define	vloxseg4ei8_v_f32m1_m(...) __riscv_vloxseg4ei8_v_f32m1_tumu(__VA_ARGS__)

#define	vloxseg4ei8_v_f32m2(...) __riscv_vloxseg4ei8_v_f32m2(__VA_ARGS__)

#define	vloxseg4ei8_v_f32m2_m(...) __riscv_vloxseg4ei8_v_f32m2_tumu(__VA_ARGS__)

#define	vloxseg4ei8_v_f32mf2(...) __riscv_vloxseg4ei8_v_f32mf2(__VA_ARGS__)

#define	vloxseg4ei8_v_f32mf2_m(...) __riscv_vloxseg4ei8_v_f32mf2_tumu(__VA_ARGS__)

#define	vloxseg4ei8_v_f64m1(...) __riscv_vloxseg4ei8_v_f64m1(__VA_ARGS__)

#define	vloxseg4ei8_v_f64m1_m(...) __riscv_vloxseg4ei8_v_f64m1_tumu(__VA_ARGS__)

#define	vloxseg4ei8_v_f64m2(...) __riscv_vloxseg4ei8_v_f64m2(__VA_ARGS__)

#define	vloxseg4ei8_v_f64m2_m(...) __riscv_vloxseg4ei8_v_f64m2_tumu(__VA_ARGS__)

#define	vloxseg4ei8_v_i16m1(...) __riscv_vloxseg4ei8_v_i16m1(__VA_ARGS__)

#define	vloxseg4ei8_v_i16m1_m(...) __riscv_vloxseg4ei8_v_i16m1_tumu(__VA_ARGS__)

#define	vloxseg4ei8_v_i16m2(...) __riscv_vloxseg4ei8_v_i16m2(__VA_ARGS__)

#define	vloxseg4ei8_v_i16m2_m(...) __riscv_vloxseg4ei8_v_i16m2_tumu(__VA_ARGS__)

#define	vloxseg4ei8_v_i16mf2(...) __riscv_vloxseg4ei8_v_i16mf2(__VA_ARGS__)

#define	vloxseg4ei8_v_i16mf2_m(...) __riscv_vloxseg4ei8_v_i16mf2_tumu(__VA_ARGS__)

#define	vloxseg4ei8_v_i16mf4(...) __riscv_vloxseg4ei8_v_i16mf4(__VA_ARGS__)

#define	vloxseg4ei8_v_i16mf4_m(...) __riscv_vloxseg4ei8_v_i16mf4_tumu(__VA_ARGS__)

#define	vloxseg4ei8_v_i32m1(...) __riscv_vloxseg4ei8_v_i32m1(__VA_ARGS__)

#define	vloxseg4ei8_v_i32m1_m(...) __riscv_vloxseg4ei8_v_i32m1_tumu(__VA_ARGS__)

#define	vloxseg4ei8_v_i32m2(...) __riscv_vloxseg4ei8_v_i32m2(__VA_ARGS__)

#define	vloxseg4ei8_v_i32m2_m(...) __riscv_vloxseg4ei8_v_i32m2_tumu(__VA_ARGS__)

#define	vloxseg4ei8_v_i32mf2(...) __riscv_vloxseg4ei8_v_i32mf2(__VA_ARGS__)

#define	vloxseg4ei8_v_i32mf2_m(...) __riscv_vloxseg4ei8_v_i32mf2_tumu(__VA_ARGS__)

#define	vloxseg4ei8_v_i64m1(...) __riscv_vloxseg4ei8_v_i64m1(__VA_ARGS__)

#define	vloxseg4ei8_v_i64m1_m(...) __riscv_vloxseg4ei8_v_i64m1_tumu(__VA_ARGS__)

#define	vloxseg4ei8_v_i64m2(...) __riscv_vloxseg4ei8_v_i64m2(__VA_ARGS__)

#define	vloxseg4ei8_v_i64m2_m(...) __riscv_vloxseg4ei8_v_i64m2_tumu(__VA_ARGS__)

#define	vloxseg4ei8_v_i8m1(...) __riscv_vloxseg4ei8_v_i8m1(__VA_ARGS__)

#define	vloxseg4ei8_v_i8m1_m(...) __riscv_vloxseg4ei8_v_i8m1_tumu(__VA_ARGS__)

#define	vloxseg4ei8_v_i8m2(...) __riscv_vloxseg4ei8_v_i8m2(__VA_ARGS__)

#define	vloxseg4ei8_v_i8m2_m(...) __riscv_vloxseg4ei8_v_i8m2_tumu(__VA_ARGS__)

#define	vloxseg4ei8_v_i8mf2(...) __riscv_vloxseg4ei8_v_i8mf2(__VA_ARGS__)

#define	vloxseg4ei8_v_i8mf2_m(...) __riscv_vloxseg4ei8_v_i8mf2_tumu(__VA_ARGS__)

#define	vloxseg4ei8_v_i8mf4(...) __riscv_vloxseg4ei8_v_i8mf4(__VA_ARGS__)

#define	vloxseg4ei8_v_i8mf4_m(...) __riscv_vloxseg4ei8_v_i8mf4_tumu(__VA_ARGS__)

#define	vloxseg4ei8_v_i8mf8(...) __riscv_vloxseg4ei8_v_i8mf8(__VA_ARGS__)

#define	vloxseg4ei8_v_i8mf8_m(...) __riscv_vloxseg4ei8_v_i8mf8_tumu(__VA_ARGS__)

#define	vloxseg4ei8_v_u16m1(...) __riscv_vloxseg4ei8_v_u16m1(__VA_ARGS__)

#define	vloxseg4ei8_v_u16m1_m(...) __riscv_vloxseg4ei8_v_u16m1_tumu(__VA_ARGS__)

#define	vloxseg4ei8_v_u16m2(...) __riscv_vloxseg4ei8_v_u16m2(__VA_ARGS__)

#define	vloxseg4ei8_v_u16m2_m(...) __riscv_vloxseg4ei8_v_u16m2_tumu(__VA_ARGS__)

#define	vloxseg4ei8_v_u16mf2(...) __riscv_vloxseg4ei8_v_u16mf2(__VA_ARGS__)

#define	vloxseg4ei8_v_u16mf2_m(...) __riscv_vloxseg4ei8_v_u16mf2_tumu(__VA_ARGS__)

#define	vloxseg4ei8_v_u16mf4(...) __riscv_vloxseg4ei8_v_u16mf4(__VA_ARGS__)

#define	vloxseg4ei8_v_u16mf4_m(...) __riscv_vloxseg4ei8_v_u16mf4_tumu(__VA_ARGS__)

#define	vloxseg4ei8_v_u32m1(...) __riscv_vloxseg4ei8_v_u32m1(__VA_ARGS__)

#define	vloxseg4ei8_v_u32m1_m(...) __riscv_vloxseg4ei8_v_u32m1_tumu(__VA_ARGS__)

#define	vloxseg4ei8_v_u32m2(...) __riscv_vloxseg4ei8_v_u32m2(__VA_ARGS__)

#define	vloxseg4ei8_v_u32m2_m(...) __riscv_vloxseg4ei8_v_u32m2_tumu(__VA_ARGS__)

#define	vloxseg4ei8_v_u32mf2(...) __riscv_vloxseg4ei8_v_u32mf2(__VA_ARGS__)

#define	vloxseg4ei8_v_u32mf2_m(...) __riscv_vloxseg4ei8_v_u32mf2_tumu(__VA_ARGS__)

#define	vloxseg4ei8_v_u64m1(...) __riscv_vloxseg4ei8_v_u64m1(__VA_ARGS__)

#define	vloxseg4ei8_v_u64m1_m(...) __riscv_vloxseg4ei8_v_u64m1_tumu(__VA_ARGS__)

#define	vloxseg4ei8_v_u64m2(...) __riscv_vloxseg4ei8_v_u64m2(__VA_ARGS__)

#define	vloxseg4ei8_v_u64m2_m(...) __riscv_vloxseg4ei8_v_u64m2_tumu(__VA_ARGS__)

#define	vloxseg4ei8_v_u8m1(...) __riscv_vloxseg4ei8_v_u8m1(__VA_ARGS__)

#define	vloxseg4ei8_v_u8m1_m(...) __riscv_vloxseg4ei8_v_u8m1_tumu(__VA_ARGS__)

#define	vloxseg4ei8_v_u8m2(...) __riscv_vloxseg4ei8_v_u8m2(__VA_ARGS__)

#define	vloxseg4ei8_v_u8m2_m(...) __riscv_vloxseg4ei8_v_u8m2_tumu(__VA_ARGS__)

#define	vloxseg4ei8_v_u8mf2(...) __riscv_vloxseg4ei8_v_u8mf2(__VA_ARGS__)

#define	vloxseg4ei8_v_u8mf2_m(...) __riscv_vloxseg4ei8_v_u8mf2_tumu(__VA_ARGS__)

#define	vloxseg4ei8_v_u8mf4(...) __riscv_vloxseg4ei8_v_u8mf4(__VA_ARGS__)

#define	vloxseg4ei8_v_u8mf4_m(...) __riscv_vloxseg4ei8_v_u8mf4_tumu(__VA_ARGS__)

#define	vloxseg4ei8_v_u8mf8(...) __riscv_vloxseg4ei8_v_u8mf8(__VA_ARGS__)

#define	vloxseg4ei8_v_u8mf8_m(...) __riscv_vloxseg4ei8_v_u8mf8_tumu(__VA_ARGS__)

#define	vloxseg5ei16_v_f16m1(...) __riscv_vloxseg5ei16_v_f16m1(__VA_ARGS__)

#define	vloxseg5ei16_v_f16m1_m(...) __riscv_vloxseg5ei16_v_f16m1_tumu(__VA_ARGS__)

#define	vloxseg5ei16_v_f16mf2(...) __riscv_vloxseg5ei16_v_f16mf2(__VA_ARGS__)

#define	vloxseg5ei16_v_f16mf2_m(...) __riscv_vloxseg5ei16_v_f16mf2_tumu(__VA_ARGS__)

#define	vloxseg5ei16_v_f16mf4(...) __riscv_vloxseg5ei16_v_f16mf4(__VA_ARGS__)

#define	vloxseg5ei16_v_f16mf4_m(...) __riscv_vloxseg5ei16_v_f16mf4_tumu(__VA_ARGS__)

#define	vloxseg5ei16_v_f32m1(...) __riscv_vloxseg5ei16_v_f32m1(__VA_ARGS__)

#define	vloxseg5ei16_v_f32m1_m(...) __riscv_vloxseg5ei16_v_f32m1_tumu(__VA_ARGS__)

#define	vloxseg5ei16_v_f32mf2(...) __riscv_vloxseg5ei16_v_f32mf2(__VA_ARGS__)

#define	vloxseg5ei16_v_f32mf2_m(...) __riscv_vloxseg5ei16_v_f32mf2_tumu(__VA_ARGS__)

#define	vloxseg5ei16_v_f64m1(...) __riscv_vloxseg5ei16_v_f64m1(__VA_ARGS__)

#define	vloxseg5ei16_v_f64m1_m(...) __riscv_vloxseg5ei16_v_f64m1_tumu(__VA_ARGS__)

#define	vloxseg5ei16_v_i16m1(...) __riscv_vloxseg5ei16_v_i16m1(__VA_ARGS__)

#define	vloxseg5ei16_v_i16m1_m(...) __riscv_vloxseg5ei16_v_i16m1_tumu(__VA_ARGS__)

#define	vloxseg5ei16_v_i16mf2(...) __riscv_vloxseg5ei16_v_i16mf2(__VA_ARGS__)

#define	vloxseg5ei16_v_i16mf2_m(...) __riscv_vloxseg5ei16_v_i16mf2_tumu(__VA_ARGS__)

#define	vloxseg5ei16_v_i16mf4(...) __riscv_vloxseg5ei16_v_i16mf4(__VA_ARGS__)

#define	vloxseg5ei16_v_i16mf4_m(...) __riscv_vloxseg5ei16_v_i16mf4_tumu(__VA_ARGS__)

#define	vloxseg5ei16_v_i32m1(...) __riscv_vloxseg5ei16_v_i32m1(__VA_ARGS__)

#define	vloxseg5ei16_v_i32m1_m(...) __riscv_vloxseg5ei16_v_i32m1_tumu(__VA_ARGS__)

#define	vloxseg5ei16_v_i32mf2(...) __riscv_vloxseg5ei16_v_i32mf2(__VA_ARGS__)

#define	vloxseg5ei16_v_i32mf2_m(...) __riscv_vloxseg5ei16_v_i32mf2_tumu(__VA_ARGS__)

#define	vloxseg5ei16_v_i64m1(...) __riscv_vloxseg5ei16_v_i64m1(__VA_ARGS__)

#define	vloxseg5ei16_v_i64m1_m(...) __riscv_vloxseg5ei16_v_i64m1_tumu(__VA_ARGS__)

#define	vloxseg5ei16_v_i8m1(...) __riscv_vloxseg5ei16_v_i8m1(__VA_ARGS__)

#define	vloxseg5ei16_v_i8m1_m(...) __riscv_vloxseg5ei16_v_i8m1_tumu(__VA_ARGS__)

#define	vloxseg5ei16_v_i8mf2(...) __riscv_vloxseg5ei16_v_i8mf2(__VA_ARGS__)

#define	vloxseg5ei16_v_i8mf2_m(...) __riscv_vloxseg5ei16_v_i8mf2_tumu(__VA_ARGS__)

#define	vloxseg5ei16_v_i8mf4(...) __riscv_vloxseg5ei16_v_i8mf4(__VA_ARGS__)

#define	vloxseg5ei16_v_i8mf4_m(...) __riscv_vloxseg5ei16_v_i8mf4_tumu(__VA_ARGS__)

#define	vloxseg5ei16_v_i8mf8(...) __riscv_vloxseg5ei16_v_i8mf8(__VA_ARGS__)

#define	vloxseg5ei16_v_i8mf8_m(...) __riscv_vloxseg5ei16_v_i8mf8_tumu(__VA_ARGS__)

#define	vloxseg5ei16_v_u16m1(...) __riscv_vloxseg5ei16_v_u16m1(__VA_ARGS__)

#define	vloxseg5ei16_v_u16m1_m(...) __riscv_vloxseg5ei16_v_u16m1_tumu(__VA_ARGS__)

#define	vloxseg5ei16_v_u16mf2(...) __riscv_vloxseg5ei16_v_u16mf2(__VA_ARGS__)

#define	vloxseg5ei16_v_u16mf2_m(...) __riscv_vloxseg5ei16_v_u16mf2_tumu(__VA_ARGS__)

#define	vloxseg5ei16_v_u16mf4(...) __riscv_vloxseg5ei16_v_u16mf4(__VA_ARGS__)

#define	vloxseg5ei16_v_u16mf4_m(...) __riscv_vloxseg5ei16_v_u16mf4_tumu(__VA_ARGS__)

#define	vloxseg5ei16_v_u32m1(...) __riscv_vloxseg5ei16_v_u32m1(__VA_ARGS__)

#define	vloxseg5ei16_v_u32m1_m(...) __riscv_vloxseg5ei16_v_u32m1_tumu(__VA_ARGS__)

#define	vloxseg5ei16_v_u32mf2(...) __riscv_vloxseg5ei16_v_u32mf2(__VA_ARGS__)

#define	vloxseg5ei16_v_u32mf2_m(...) __riscv_vloxseg5ei16_v_u32mf2_tumu(__VA_ARGS__)

#define	vloxseg5ei16_v_u64m1(...) __riscv_vloxseg5ei16_v_u64m1(__VA_ARGS__)

#define	vloxseg5ei16_v_u64m1_m(...) __riscv_vloxseg5ei16_v_u64m1_tumu(__VA_ARGS__)

#define	vloxseg5ei16_v_u8m1(...) __riscv_vloxseg5ei16_v_u8m1(__VA_ARGS__)

#define	vloxseg5ei16_v_u8m1_m(...) __riscv_vloxseg5ei16_v_u8m1_tumu(__VA_ARGS__)

#define	vloxseg5ei16_v_u8mf2(...) __riscv_vloxseg5ei16_v_u8mf2(__VA_ARGS__)

#define	vloxseg5ei16_v_u8mf2_m(...) __riscv_vloxseg5ei16_v_u8mf2_tumu(__VA_ARGS__)

#define	vloxseg5ei16_v_u8mf4(...) __riscv_vloxseg5ei16_v_u8mf4(__VA_ARGS__)

#define	vloxseg5ei16_v_u8mf4_m(...) __riscv_vloxseg5ei16_v_u8mf4_tumu(__VA_ARGS__)

#define	vloxseg5ei16_v_u8mf8(...) __riscv_vloxseg5ei16_v_u8mf8(__VA_ARGS__)

#define	vloxseg5ei16_v_u8mf8_m(...) __riscv_vloxseg5ei16_v_u8mf8_tumu(__VA_ARGS__)

#define	vloxseg5ei32_v_f16m1(...) __riscv_vloxseg5ei32_v_f16m1(__VA_ARGS__)

#define	vloxseg5ei32_v_f16m1_m(...) __riscv_vloxseg5ei32_v_f16m1_tumu(__VA_ARGS__)

#define	vloxseg5ei32_v_f16mf2(...) __riscv_vloxseg5ei32_v_f16mf2(__VA_ARGS__)

#define	vloxseg5ei32_v_f16mf2_m(...) __riscv_vloxseg5ei32_v_f16mf2_tumu(__VA_ARGS__)

#define	vloxseg5ei32_v_f16mf4(...) __riscv_vloxseg5ei32_v_f16mf4(__VA_ARGS__)

#define	vloxseg5ei32_v_f16mf4_m(...) __riscv_vloxseg5ei32_v_f16mf4_tumu(__VA_ARGS__)

#define	vloxseg5ei32_v_f32m1(...) __riscv_vloxseg5ei32_v_f32m1(__VA_ARGS__)

#define	vloxseg5ei32_v_f32m1_m(...) __riscv_vloxseg5ei32_v_f32m1_tumu(__VA_ARGS__)

#define	vloxseg5ei32_v_f32mf2(...) __riscv_vloxseg5ei32_v_f32mf2(__VA_ARGS__)

#define	vloxseg5ei32_v_f32mf2_m(...) __riscv_vloxseg5ei32_v_f32mf2_tumu(__VA_ARGS__)

#define	vloxseg5ei32_v_f64m1(...) __riscv_vloxseg5ei32_v_f64m1(__VA_ARGS__)

#define	vloxseg5ei32_v_f64m1_m(...) __riscv_vloxseg5ei32_v_f64m1_tumu(__VA_ARGS__)

#define	vloxseg5ei32_v_i16m1(...) __riscv_vloxseg5ei32_v_i16m1(__VA_ARGS__)

#define	vloxseg5ei32_v_i16m1_m(...) __riscv_vloxseg5ei32_v_i16m1_tumu(__VA_ARGS__)

#define	vloxseg5ei32_v_i16mf2(...) __riscv_vloxseg5ei32_v_i16mf2(__VA_ARGS__)

#define	vloxseg5ei32_v_i16mf2_m(...) __riscv_vloxseg5ei32_v_i16mf2_tumu(__VA_ARGS__)

#define	vloxseg5ei32_v_i16mf4(...) __riscv_vloxseg5ei32_v_i16mf4(__VA_ARGS__)

#define	vloxseg5ei32_v_i16mf4_m(...) __riscv_vloxseg5ei32_v_i16mf4_tumu(__VA_ARGS__)

#define	vloxseg5ei32_v_i32m1(...) __riscv_vloxseg5ei32_v_i32m1(__VA_ARGS__)

#define	vloxseg5ei32_v_i32m1_m(...) __riscv_vloxseg5ei32_v_i32m1_tumu(__VA_ARGS__)

#define	vloxseg5ei32_v_i32mf2(...) __riscv_vloxseg5ei32_v_i32mf2(__VA_ARGS__)

#define	vloxseg5ei32_v_i32mf2_m(...) __riscv_vloxseg5ei32_v_i32mf2_tumu(__VA_ARGS__)

#define	vloxseg5ei32_v_i64m1(...) __riscv_vloxseg5ei32_v_i64m1(__VA_ARGS__)

#define	vloxseg5ei32_v_i64m1_m(...) __riscv_vloxseg5ei32_v_i64m1_tumu(__VA_ARGS__)

#define	vloxseg5ei32_v_i8m1(...) __riscv_vloxseg5ei32_v_i8m1(__VA_ARGS__)

#define	vloxseg5ei32_v_i8m1_m(...) __riscv_vloxseg5ei32_v_i8m1_tumu(__VA_ARGS__)

#define	vloxseg5ei32_v_i8mf2(...) __riscv_vloxseg5ei32_v_i8mf2(__VA_ARGS__)

#define	vloxseg5ei32_v_i8mf2_m(...) __riscv_vloxseg5ei32_v_i8mf2_tumu(__VA_ARGS__)

#define	vloxseg5ei32_v_i8mf4(...) __riscv_vloxseg5ei32_v_i8mf4(__VA_ARGS__)

#define	vloxseg5ei32_v_i8mf4_m(...) __riscv_vloxseg5ei32_v_i8mf4_tumu(__VA_ARGS__)

#define	vloxseg5ei32_v_i8mf8(...) __riscv_vloxseg5ei32_v_i8mf8(__VA_ARGS__)

#define	vloxseg5ei32_v_i8mf8_m(...) __riscv_vloxseg5ei32_v_i8mf8_tumu(__VA_ARGS__)

#define	vloxseg5ei32_v_u16m1(...) __riscv_vloxseg5ei32_v_u16m1(__VA_ARGS__)

#define	vloxseg5ei32_v_u16m1_m(...) __riscv_vloxseg5ei32_v_u16m1_tumu(__VA_ARGS__)

#define	vloxseg5ei32_v_u16mf2(...) __riscv_vloxseg5ei32_v_u16mf2(__VA_ARGS__)

#define	vloxseg5ei32_v_u16mf2_m(...) __riscv_vloxseg5ei32_v_u16mf2_tumu(__VA_ARGS__)

#define	vloxseg5ei32_v_u16mf4(...) __riscv_vloxseg5ei32_v_u16mf4(__VA_ARGS__)

#define	vloxseg5ei32_v_u16mf4_m(...) __riscv_vloxseg5ei32_v_u16mf4_tumu(__VA_ARGS__)

#define	vloxseg5ei32_v_u32m1(...) __riscv_vloxseg5ei32_v_u32m1(__VA_ARGS__)

#define	vloxseg5ei32_v_u32m1_m(...) __riscv_vloxseg5ei32_v_u32m1_tumu(__VA_ARGS__)

#define	vloxseg5ei32_v_u32mf2(...) __riscv_vloxseg5ei32_v_u32mf2(__VA_ARGS__)

#define	vloxseg5ei32_v_u32mf2_m(...) __riscv_vloxseg5ei32_v_u32mf2_tumu(__VA_ARGS__)

#define	vloxseg5ei32_v_u64m1(...) __riscv_vloxseg5ei32_v_u64m1(__VA_ARGS__)

#define	vloxseg5ei32_v_u64m1_m(...) __riscv_vloxseg5ei32_v_u64m1_tumu(__VA_ARGS__)

#define	vloxseg5ei32_v_u8m1(...) __riscv_vloxseg5ei32_v_u8m1(__VA_ARGS__)

#define	vloxseg5ei32_v_u8m1_m(...) __riscv_vloxseg5ei32_v_u8m1_tumu(__VA_ARGS__)

#define	vloxseg5ei32_v_u8mf2(...) __riscv_vloxseg5ei32_v_u8mf2(__VA_ARGS__)

#define	vloxseg5ei32_v_u8mf2_m(...) __riscv_vloxseg5ei32_v_u8mf2_tumu(__VA_ARGS__)

#define	vloxseg5ei32_v_u8mf4(...) __riscv_vloxseg5ei32_v_u8mf4(__VA_ARGS__)

#define	vloxseg5ei32_v_u8mf4_m(...) __riscv_vloxseg5ei32_v_u8mf4_tumu(__VA_ARGS__)

#define	vloxseg5ei32_v_u8mf8(...) __riscv_vloxseg5ei32_v_u8mf8(__VA_ARGS__)

#define	vloxseg5ei32_v_u8mf8_m(...) __riscv_vloxseg5ei32_v_u8mf8_tumu(__VA_ARGS__)

#define	vloxseg5ei64_v_f16m1(...) __riscv_vloxseg5ei64_v_f16m1(__VA_ARGS__)

#define	vloxseg5ei64_v_f16m1_m(...) __riscv_vloxseg5ei64_v_f16m1_tumu(__VA_ARGS__)

#define	vloxseg5ei64_v_f16mf2(...) __riscv_vloxseg5ei64_v_f16mf2(__VA_ARGS__)

#define	vloxseg5ei64_v_f16mf2_m(...) __riscv_vloxseg5ei64_v_f16mf2_tumu(__VA_ARGS__)

#define	vloxseg5ei64_v_f16mf4(...) __riscv_vloxseg5ei64_v_f16mf4(__VA_ARGS__)

#define	vloxseg5ei64_v_f16mf4_m(...) __riscv_vloxseg5ei64_v_f16mf4_tumu(__VA_ARGS__)

#define	vloxseg5ei64_v_f32m1(...) __riscv_vloxseg5ei64_v_f32m1(__VA_ARGS__)

#define	vloxseg5ei64_v_f32m1_m(...) __riscv_vloxseg5ei64_v_f32m1_tumu(__VA_ARGS__)

#define	vloxseg5ei64_v_f32mf2(...) __riscv_vloxseg5ei64_v_f32mf2(__VA_ARGS__)

#define	vloxseg5ei64_v_f32mf2_m(...) __riscv_vloxseg5ei64_v_f32mf2_tumu(__VA_ARGS__)

#define	vloxseg5ei64_v_f64m1(...) __riscv_vloxseg5ei64_v_f64m1(__VA_ARGS__)

#define	vloxseg5ei64_v_f64m1_m(...) __riscv_vloxseg5ei64_v_f64m1_tumu(__VA_ARGS__)

#define	vloxseg5ei64_v_i16m1(...) __riscv_vloxseg5ei64_v_i16m1(__VA_ARGS__)

#define	vloxseg5ei64_v_i16m1_m(...) __riscv_vloxseg5ei64_v_i16m1_tumu(__VA_ARGS__)

#define	vloxseg5ei64_v_i16mf2(...) __riscv_vloxseg5ei64_v_i16mf2(__VA_ARGS__)

#define	vloxseg5ei64_v_i16mf2_m(...) __riscv_vloxseg5ei64_v_i16mf2_tumu(__VA_ARGS__)

#define	vloxseg5ei64_v_i16mf4(...) __riscv_vloxseg5ei64_v_i16mf4(__VA_ARGS__)

#define	vloxseg5ei64_v_i16mf4_m(...) __riscv_vloxseg5ei64_v_i16mf4_tumu(__VA_ARGS__)

#define	vloxseg5ei64_v_i32m1(...) __riscv_vloxseg5ei64_v_i32m1(__VA_ARGS__)

#define	vloxseg5ei64_v_i32m1_m(...) __riscv_vloxseg5ei64_v_i32m1_tumu(__VA_ARGS__)

#define	vloxseg5ei64_v_i32mf2(...) __riscv_vloxseg5ei64_v_i32mf2(__VA_ARGS__)

#define	vloxseg5ei64_v_i32mf2_m(...) __riscv_vloxseg5ei64_v_i32mf2_tumu(__VA_ARGS__)

#define	vloxseg5ei64_v_i64m1(...) __riscv_vloxseg5ei64_v_i64m1(__VA_ARGS__)

#define	vloxseg5ei64_v_i64m1_m(...) __riscv_vloxseg5ei64_v_i64m1_tumu(__VA_ARGS__)

#define	vloxseg5ei64_v_i8m1(...) __riscv_vloxseg5ei64_v_i8m1(__VA_ARGS__)

#define	vloxseg5ei64_v_i8m1_m(...) __riscv_vloxseg5ei64_v_i8m1_tumu(__VA_ARGS__)

#define	vloxseg5ei64_v_i8mf2(...) __riscv_vloxseg5ei64_v_i8mf2(__VA_ARGS__)

#define	vloxseg5ei64_v_i8mf2_m(...) __riscv_vloxseg5ei64_v_i8mf2_tumu(__VA_ARGS__)

#define	vloxseg5ei64_v_i8mf4(...) __riscv_vloxseg5ei64_v_i8mf4(__VA_ARGS__)

#define	vloxseg5ei64_v_i8mf4_m(...) __riscv_vloxseg5ei64_v_i8mf4_tumu(__VA_ARGS__)

#define	vloxseg5ei64_v_i8mf8(...) __riscv_vloxseg5ei64_v_i8mf8(__VA_ARGS__)

#define	vloxseg5ei64_v_i8mf8_m(...) __riscv_vloxseg5ei64_v_i8mf8_tumu(__VA_ARGS__)

#define	vloxseg5ei64_v_u16m1(...) __riscv_vloxseg5ei64_v_u16m1(__VA_ARGS__)

#define	vloxseg5ei64_v_u16m1_m(...) __riscv_vloxseg5ei64_v_u16m1_tumu(__VA_ARGS__)

#define	vloxseg5ei64_v_u16mf2(...) __riscv_vloxseg5ei64_v_u16mf2(__VA_ARGS__)

#define	vloxseg5ei64_v_u16mf2_m(...) __riscv_vloxseg5ei64_v_u16mf2_tumu(__VA_ARGS__)

#define	vloxseg5ei64_v_u16mf4(...) __riscv_vloxseg5ei64_v_u16mf4(__VA_ARGS__)

#define	vloxseg5ei64_v_u16mf4_m(...) __riscv_vloxseg5ei64_v_u16mf4_tumu(__VA_ARGS__)

#define	vloxseg5ei64_v_u32m1(...) __riscv_vloxseg5ei64_v_u32m1(__VA_ARGS__)

#define	vloxseg5ei64_v_u32m1_m(...) __riscv_vloxseg5ei64_v_u32m1_tumu(__VA_ARGS__)

#define	vloxseg5ei64_v_u32mf2(...) __riscv_vloxseg5ei64_v_u32mf2(__VA_ARGS__)

#define	vloxseg5ei64_v_u32mf2_m(...) __riscv_vloxseg5ei64_v_u32mf2_tumu(__VA_ARGS__)

#define	vloxseg5ei64_v_u64m1(...) __riscv_vloxseg5ei64_v_u64m1(__VA_ARGS__)

#define	vloxseg5ei64_v_u64m1_m(...) __riscv_vloxseg5ei64_v_u64m1_tumu(__VA_ARGS__)

#define	vloxseg5ei64_v_u8m1(...) __riscv_vloxseg5ei64_v_u8m1(__VA_ARGS__)

#define	vloxseg5ei64_v_u8m1_m(...) __riscv_vloxseg5ei64_v_u8m1_tumu(__VA_ARGS__)

#define	vloxseg5ei64_v_u8mf2(...) __riscv_vloxseg5ei64_v_u8mf2(__VA_ARGS__)

#define	vloxseg5ei64_v_u8mf2_m(...) __riscv_vloxseg5ei64_v_u8mf2_tumu(__VA_ARGS__)

#define	vloxseg5ei64_v_u8mf4(...) __riscv_vloxseg5ei64_v_u8mf4(__VA_ARGS__)

#define	vloxseg5ei64_v_u8mf4_m(...) __riscv_vloxseg5ei64_v_u8mf4_tumu(__VA_ARGS__)

#define	vloxseg5ei64_v_u8mf8(...) __riscv_vloxseg5ei64_v_u8mf8(__VA_ARGS__)

#define	vloxseg5ei64_v_u8mf8_m(...) __riscv_vloxseg5ei64_v_u8mf8_tumu(__VA_ARGS__)

#define	vloxseg5ei8_v_f16m1(...) __riscv_vloxseg5ei8_v_f16m1(__VA_ARGS__)

#define	vloxseg5ei8_v_f16m1_m(...) __riscv_vloxseg5ei8_v_f16m1_tumu(__VA_ARGS__)

#define	vloxseg5ei8_v_f16mf2(...) __riscv_vloxseg5ei8_v_f16mf2(__VA_ARGS__)

#define	vloxseg5ei8_v_f16mf2_m(...) __riscv_vloxseg5ei8_v_f16mf2_tumu(__VA_ARGS__)

#define	vloxseg5ei8_v_f16mf4(...) __riscv_vloxseg5ei8_v_f16mf4(__VA_ARGS__)

#define	vloxseg5ei8_v_f16mf4_m(...) __riscv_vloxseg5ei8_v_f16mf4_tumu(__VA_ARGS__)

#define	vloxseg5ei8_v_f32m1(...) __riscv_vloxseg5ei8_v_f32m1(__VA_ARGS__)

#define	vloxseg5ei8_v_f32m1_m(...) __riscv_vloxseg5ei8_v_f32m1_tumu(__VA_ARGS__)

#define	vloxseg5ei8_v_f32mf2(...) __riscv_vloxseg5ei8_v_f32mf2(__VA_ARGS__)

#define	vloxseg5ei8_v_f32mf2_m(...) __riscv_vloxseg5ei8_v_f32mf2_tumu(__VA_ARGS__)

#define	vloxseg5ei8_v_f64m1(...) __riscv_vloxseg5ei8_v_f64m1(__VA_ARGS__)

#define	vloxseg5ei8_v_f64m1_m(...) __riscv_vloxseg5ei8_v_f64m1_tumu(__VA_ARGS__)

#define	vloxseg5ei8_v_i16m1(...) __riscv_vloxseg5ei8_v_i16m1(__VA_ARGS__)

#define	vloxseg5ei8_v_i16m1_m(...) __riscv_vloxseg5ei8_v_i16m1_tumu(__VA_ARGS__)

#define	vloxseg5ei8_v_i16mf2(...) __riscv_vloxseg5ei8_v_i16mf2(__VA_ARGS__)

#define	vloxseg5ei8_v_i16mf2_m(...) __riscv_vloxseg5ei8_v_i16mf2_tumu(__VA_ARGS__)

#define	vloxseg5ei8_v_i16mf4(...) __riscv_vloxseg5ei8_v_i16mf4(__VA_ARGS__)

#define	vloxseg5ei8_v_i16mf4_m(...) __riscv_vloxseg5ei8_v_i16mf4_tumu(__VA_ARGS__)

#define	vloxseg5ei8_v_i32m1(...) __riscv_vloxseg5ei8_v_i32m1(__VA_ARGS__)

#define	vloxseg5ei8_v_i32m1_m(...) __riscv_vloxseg5ei8_v_i32m1_tumu(__VA_ARGS__)

#define	vloxseg5ei8_v_i32mf2(...) __riscv_vloxseg5ei8_v_i32mf2(__VA_ARGS__)

#define	vloxseg5ei8_v_i32mf2_m(...) __riscv_vloxseg5ei8_v_i32mf2_tumu(__VA_ARGS__)

#define	vloxseg5ei8_v_i64m1(...) __riscv_vloxseg5ei8_v_i64m1(__VA_ARGS__)

#define	vloxseg5ei8_v_i64m1_m(...) __riscv_vloxseg5ei8_v_i64m1_tumu(__VA_ARGS__)

#define	vloxseg5ei8_v_i8m1(...) __riscv_vloxseg5ei8_v_i8m1(__VA_ARGS__)

#define	vloxseg5ei8_v_i8m1_m(...) __riscv_vloxseg5ei8_v_i8m1_tumu(__VA_ARGS__)

#define	vloxseg5ei8_v_i8mf2(...) __riscv_vloxseg5ei8_v_i8mf2(__VA_ARGS__)

#define	vloxseg5ei8_v_i8mf2_m(...) __riscv_vloxseg5ei8_v_i8mf2_tumu(__VA_ARGS__)

#define	vloxseg5ei8_v_i8mf4(...) __riscv_vloxseg5ei8_v_i8mf4(__VA_ARGS__)

#define	vloxseg5ei8_v_i8mf4_m(...) __riscv_vloxseg5ei8_v_i8mf4_tumu(__VA_ARGS__)

#define	vloxseg5ei8_v_i8mf8(...) __riscv_vloxseg5ei8_v_i8mf8(__VA_ARGS__)

#define	vloxseg5ei8_v_i8mf8_m(...) __riscv_vloxseg5ei8_v_i8mf8_tumu(__VA_ARGS__)

#define	vloxseg5ei8_v_u16m1(...) __riscv_vloxseg5ei8_v_u16m1(__VA_ARGS__)

#define	vloxseg5ei8_v_u16m1_m(...) __riscv_vloxseg5ei8_v_u16m1_tumu(__VA_ARGS__)

#define	vloxseg5ei8_v_u16mf2(...) __riscv_vloxseg5ei8_v_u16mf2(__VA_ARGS__)

#define	vloxseg5ei8_v_u16mf2_m(...) __riscv_vloxseg5ei8_v_u16mf2_tumu(__VA_ARGS__)

#define	vloxseg5ei8_v_u16mf4(...) __riscv_vloxseg5ei8_v_u16mf4(__VA_ARGS__)

#define	vloxseg5ei8_v_u16mf4_m(...) __riscv_vloxseg5ei8_v_u16mf4_tumu(__VA_ARGS__)

#define	vloxseg5ei8_v_u32m1(...) __riscv_vloxseg5ei8_v_u32m1(__VA_ARGS__)

#define	vloxseg5ei8_v_u32m1_m(...) __riscv_vloxseg5ei8_v_u32m1_tumu(__VA_ARGS__)

#define	vloxseg5ei8_v_u32mf2(...) __riscv_vloxseg5ei8_v_u32mf2(__VA_ARGS__)

#define	vloxseg5ei8_v_u32mf2_m(...) __riscv_vloxseg5ei8_v_u32mf2_tumu(__VA_ARGS__)

#define	vloxseg5ei8_v_u64m1(...) __riscv_vloxseg5ei8_v_u64m1(__VA_ARGS__)

#define	vloxseg5ei8_v_u64m1_m(...) __riscv_vloxseg5ei8_v_u64m1_tumu(__VA_ARGS__)

#define	vloxseg5ei8_v_u8m1(...) __riscv_vloxseg5ei8_v_u8m1(__VA_ARGS__)

#define	vloxseg5ei8_v_u8m1_m(...) __riscv_vloxseg5ei8_v_u8m1_tumu(__VA_ARGS__)

#define	vloxseg5ei8_v_u8mf2(...) __riscv_vloxseg5ei8_v_u8mf2(__VA_ARGS__)

#define	vloxseg5ei8_v_u8mf2_m(...) __riscv_vloxseg5ei8_v_u8mf2_tumu(__VA_ARGS__)

#define	vloxseg5ei8_v_u8mf4(...) __riscv_vloxseg5ei8_v_u8mf4(__VA_ARGS__)

#define	vloxseg5ei8_v_u8mf4_m(...) __riscv_vloxseg5ei8_v_u8mf4_tumu(__VA_ARGS__)

#define	vloxseg5ei8_v_u8mf8(...) __riscv_vloxseg5ei8_v_u8mf8(__VA_ARGS__)

#define	vloxseg5ei8_v_u8mf8_m(...) __riscv_vloxseg5ei8_v_u8mf8_tumu(__VA_ARGS__)

#define	vloxseg6ei16_v_f16m1(...) __riscv_vloxseg6ei16_v_f16m1(__VA_ARGS__)

#define	vloxseg6ei16_v_f16m1_m(...) __riscv_vloxseg6ei16_v_f16m1_tumu(__VA_ARGS__)

#define	vloxseg6ei16_v_f16mf2(...) __riscv_vloxseg6ei16_v_f16mf2(__VA_ARGS__)

#define	vloxseg6ei16_v_f16mf2_m(...) __riscv_vloxseg6ei16_v_f16mf2_tumu(__VA_ARGS__)

#define	vloxseg6ei16_v_f16mf4(...) __riscv_vloxseg6ei16_v_f16mf4(__VA_ARGS__)

#define	vloxseg6ei16_v_f16mf4_m(...) __riscv_vloxseg6ei16_v_f16mf4_tumu(__VA_ARGS__)

#define	vloxseg6ei16_v_f32m1(...) __riscv_vloxseg6ei16_v_f32m1(__VA_ARGS__)

#define	vloxseg6ei16_v_f32m1_m(...) __riscv_vloxseg6ei16_v_f32m1_tumu(__VA_ARGS__)

#define	vloxseg6ei16_v_f32mf2(...) __riscv_vloxseg6ei16_v_f32mf2(__VA_ARGS__)

#define	vloxseg6ei16_v_f32mf2_m(...) __riscv_vloxseg6ei16_v_f32mf2_tumu(__VA_ARGS__)

#define	vloxseg6ei16_v_f64m1(...) __riscv_vloxseg6ei16_v_f64m1(__VA_ARGS__)

#define	vloxseg6ei16_v_f64m1_m(...) __riscv_vloxseg6ei16_v_f64m1_tumu(__VA_ARGS__)

#define	vloxseg6ei16_v_i16m1(...) __riscv_vloxseg6ei16_v_i16m1(__VA_ARGS__)

#define	vloxseg6ei16_v_i16m1_m(...) __riscv_vloxseg6ei16_v_i16m1_tumu(__VA_ARGS__)

#define	vloxseg6ei16_v_i16mf2(...) __riscv_vloxseg6ei16_v_i16mf2(__VA_ARGS__)

#define	vloxseg6ei16_v_i16mf2_m(...) __riscv_vloxseg6ei16_v_i16mf2_tumu(__VA_ARGS__)

#define	vloxseg6ei16_v_i16mf4(...) __riscv_vloxseg6ei16_v_i16mf4(__VA_ARGS__)

#define	vloxseg6ei16_v_i16mf4_m(...) __riscv_vloxseg6ei16_v_i16mf4_tumu(__VA_ARGS__)

#define	vloxseg6ei16_v_i32m1(...) __riscv_vloxseg6ei16_v_i32m1(__VA_ARGS__)

#define	vloxseg6ei16_v_i32m1_m(...) __riscv_vloxseg6ei16_v_i32m1_tumu(__VA_ARGS__)

#define	vloxseg6ei16_v_i32mf2(...) __riscv_vloxseg6ei16_v_i32mf2(__VA_ARGS__)

#define	vloxseg6ei16_v_i32mf2_m(...) __riscv_vloxseg6ei16_v_i32mf2_tumu(__VA_ARGS__)

#define	vloxseg6ei16_v_i64m1(...) __riscv_vloxseg6ei16_v_i64m1(__VA_ARGS__)

#define	vloxseg6ei16_v_i64m1_m(...) __riscv_vloxseg6ei16_v_i64m1_tumu(__VA_ARGS__)

#define	vloxseg6ei16_v_i8m1(...) __riscv_vloxseg6ei16_v_i8m1(__VA_ARGS__)

#define	vloxseg6ei16_v_i8m1_m(...) __riscv_vloxseg6ei16_v_i8m1_tumu(__VA_ARGS__)

#define	vloxseg6ei16_v_i8mf2(...) __riscv_vloxseg6ei16_v_i8mf2(__VA_ARGS__)

#define	vloxseg6ei16_v_i8mf2_m(...) __riscv_vloxseg6ei16_v_i8mf2_tumu(__VA_ARGS__)

#define	vloxseg6ei16_v_i8mf4(...) __riscv_vloxseg6ei16_v_i8mf4(__VA_ARGS__)

#define	vloxseg6ei16_v_i8mf4_m(...) __riscv_vloxseg6ei16_v_i8mf4_tumu(__VA_ARGS__)

#define	vloxseg6ei16_v_i8mf8(...) __riscv_vloxseg6ei16_v_i8mf8(__VA_ARGS__)

#define	vloxseg6ei16_v_i8mf8_m(...) __riscv_vloxseg6ei16_v_i8mf8_tumu(__VA_ARGS__)

#define	vloxseg6ei16_v_u16m1(...) __riscv_vloxseg6ei16_v_u16m1(__VA_ARGS__)

#define	vloxseg6ei16_v_u16m1_m(...) __riscv_vloxseg6ei16_v_u16m1_tumu(__VA_ARGS__)

#define	vloxseg6ei16_v_u16mf2(...) __riscv_vloxseg6ei16_v_u16mf2(__VA_ARGS__)

#define	vloxseg6ei16_v_u16mf2_m(...) __riscv_vloxseg6ei16_v_u16mf2_tumu(__VA_ARGS__)

#define	vloxseg6ei16_v_u16mf4(...) __riscv_vloxseg6ei16_v_u16mf4(__VA_ARGS__)

#define	vloxseg6ei16_v_u16mf4_m(...) __riscv_vloxseg6ei16_v_u16mf4_tumu(__VA_ARGS__)

#define	vloxseg6ei16_v_u32m1(...) __riscv_vloxseg6ei16_v_u32m1(__VA_ARGS__)

#define	vloxseg6ei16_v_u32m1_m(...) __riscv_vloxseg6ei16_v_u32m1_tumu(__VA_ARGS__)

#define	vloxseg6ei16_v_u32mf2(...) __riscv_vloxseg6ei16_v_u32mf2(__VA_ARGS__)

#define	vloxseg6ei16_v_u32mf2_m(...) __riscv_vloxseg6ei16_v_u32mf2_tumu(__VA_ARGS__)

#define	vloxseg6ei16_v_u64m1(...) __riscv_vloxseg6ei16_v_u64m1(__VA_ARGS__)

#define	vloxseg6ei16_v_u64m1_m(...) __riscv_vloxseg6ei16_v_u64m1_tumu(__VA_ARGS__)

#define	vloxseg6ei16_v_u8m1(...) __riscv_vloxseg6ei16_v_u8m1(__VA_ARGS__)

#define	vloxseg6ei16_v_u8m1_m(...) __riscv_vloxseg6ei16_v_u8m1_tumu(__VA_ARGS__)

#define	vloxseg6ei16_v_u8mf2(...) __riscv_vloxseg6ei16_v_u8mf2(__VA_ARGS__)

#define	vloxseg6ei16_v_u8mf2_m(...) __riscv_vloxseg6ei16_v_u8mf2_tumu(__VA_ARGS__)

#define	vloxseg6ei16_v_u8mf4(...) __riscv_vloxseg6ei16_v_u8mf4(__VA_ARGS__)

#define	vloxseg6ei16_v_u8mf4_m(...) __riscv_vloxseg6ei16_v_u8mf4_tumu(__VA_ARGS__)

#define	vloxseg6ei16_v_u8mf8(...) __riscv_vloxseg6ei16_v_u8mf8(__VA_ARGS__)

#define	vloxseg6ei16_v_u8mf8_m(...) __riscv_vloxseg6ei16_v_u8mf8_tumu(__VA_ARGS__)

#define	vloxseg6ei32_v_f16m1(...) __riscv_vloxseg6ei32_v_f16m1(__VA_ARGS__)

#define	vloxseg6ei32_v_f16m1_m(...) __riscv_vloxseg6ei32_v_f16m1_tumu(__VA_ARGS__)

#define	vloxseg6ei32_v_f16mf2(...) __riscv_vloxseg6ei32_v_f16mf2(__VA_ARGS__)

#define	vloxseg6ei32_v_f16mf2_m(...) __riscv_vloxseg6ei32_v_f16mf2_tumu(__VA_ARGS__)

#define	vloxseg6ei32_v_f16mf4(...) __riscv_vloxseg6ei32_v_f16mf4(__VA_ARGS__)

#define	vloxseg6ei32_v_f16mf4_m(...) __riscv_vloxseg6ei32_v_f16mf4_tumu(__VA_ARGS__)

#define	vloxseg6ei32_v_f32m1(...) __riscv_vloxseg6ei32_v_f32m1(__VA_ARGS__)

#define	vloxseg6ei32_v_f32m1_m(...) __riscv_vloxseg6ei32_v_f32m1_tumu(__VA_ARGS__)

#define	vloxseg6ei32_v_f32mf2(...) __riscv_vloxseg6ei32_v_f32mf2(__VA_ARGS__)

#define	vloxseg6ei32_v_f32mf2_m(...) __riscv_vloxseg6ei32_v_f32mf2_tumu(__VA_ARGS__)

#define	vloxseg6ei32_v_f64m1(...) __riscv_vloxseg6ei32_v_f64m1(__VA_ARGS__)

#define	vloxseg6ei32_v_f64m1_m(...) __riscv_vloxseg6ei32_v_f64m1_tumu(__VA_ARGS__)

#define	vloxseg6ei32_v_i16m1(...) __riscv_vloxseg6ei32_v_i16m1(__VA_ARGS__)

#define	vloxseg6ei32_v_i16m1_m(...) __riscv_vloxseg6ei32_v_i16m1_tumu(__VA_ARGS__)

#define	vloxseg6ei32_v_i16mf2(...) __riscv_vloxseg6ei32_v_i16mf2(__VA_ARGS__)

#define	vloxseg6ei32_v_i16mf2_m(...) __riscv_vloxseg6ei32_v_i16mf2_tumu(__VA_ARGS__)

#define	vloxseg6ei32_v_i16mf4(...) __riscv_vloxseg6ei32_v_i16mf4(__VA_ARGS__)

#define	vloxseg6ei32_v_i16mf4_m(...) __riscv_vloxseg6ei32_v_i16mf4_tumu(__VA_ARGS__)

#define	vloxseg6ei32_v_i32m1(...) __riscv_vloxseg6ei32_v_i32m1(__VA_ARGS__)

#define	vloxseg6ei32_v_i32m1_m(...) __riscv_vloxseg6ei32_v_i32m1_tumu(__VA_ARGS__)

#define	vloxseg6ei32_v_i32mf2(...) __riscv_vloxseg6ei32_v_i32mf2(__VA_ARGS__)

#define	vloxseg6ei32_v_i32mf2_m(...) __riscv_vloxseg6ei32_v_i32mf2_tumu(__VA_ARGS__)

#define	vloxseg6ei32_v_i64m1(...) __riscv_vloxseg6ei32_v_i64m1(__VA_ARGS__)

#define	vloxseg6ei32_v_i64m1_m(...) __riscv_vloxseg6ei32_v_i64m1_tumu(__VA_ARGS__)

#define	vloxseg6ei32_v_i8m1(...) __riscv_vloxseg6ei32_v_i8m1(__VA_ARGS__)

#define	vloxseg6ei32_v_i8m1_m(...) __riscv_vloxseg6ei32_v_i8m1_tumu(__VA_ARGS__)

#define	vloxseg6ei32_v_i8mf2(...) __riscv_vloxseg6ei32_v_i8mf2(__VA_ARGS__)

#define	vloxseg6ei32_v_i8mf2_m(...) __riscv_vloxseg6ei32_v_i8mf2_tumu(__VA_ARGS__)

#define	vloxseg6ei32_v_i8mf4(...) __riscv_vloxseg6ei32_v_i8mf4(__VA_ARGS__)

#define	vloxseg6ei32_v_i8mf4_m(...) __riscv_vloxseg6ei32_v_i8mf4_tumu(__VA_ARGS__)

#define	vloxseg6ei32_v_i8mf8(...) __riscv_vloxseg6ei32_v_i8mf8(__VA_ARGS__)

#define	vloxseg6ei32_v_i8mf8_m(...) __riscv_vloxseg6ei32_v_i8mf8_tumu(__VA_ARGS__)

#define	vloxseg6ei32_v_u16m1(...) __riscv_vloxseg6ei32_v_u16m1(__VA_ARGS__)

#define	vloxseg6ei32_v_u16m1_m(...) __riscv_vloxseg6ei32_v_u16m1_tumu(__VA_ARGS__)

#define	vloxseg6ei32_v_u16mf2(...) __riscv_vloxseg6ei32_v_u16mf2(__VA_ARGS__)

#define	vloxseg6ei32_v_u16mf2_m(...) __riscv_vloxseg6ei32_v_u16mf2_tumu(__VA_ARGS__)

#define	vloxseg6ei32_v_u16mf4(...) __riscv_vloxseg6ei32_v_u16mf4(__VA_ARGS__)

#define	vloxseg6ei32_v_u16mf4_m(...) __riscv_vloxseg6ei32_v_u16mf4_tumu(__VA_ARGS__)

#define	vloxseg6ei32_v_u32m1(...) __riscv_vloxseg6ei32_v_u32m1(__VA_ARGS__)

#define	vloxseg6ei32_v_u32m1_m(...) __riscv_vloxseg6ei32_v_u32m1_tumu(__VA_ARGS__)

#define	vloxseg6ei32_v_u32mf2(...) __riscv_vloxseg6ei32_v_u32mf2(__VA_ARGS__)

#define	vloxseg6ei32_v_u32mf2_m(...) __riscv_vloxseg6ei32_v_u32mf2_tumu(__VA_ARGS__)

#define	vloxseg6ei32_v_u64m1(...) __riscv_vloxseg6ei32_v_u64m1(__VA_ARGS__)

#define	vloxseg6ei32_v_u64m1_m(...) __riscv_vloxseg6ei32_v_u64m1_tumu(__VA_ARGS__)

#define	vloxseg6ei32_v_u8m1(...) __riscv_vloxseg6ei32_v_u8m1(__VA_ARGS__)

#define	vloxseg6ei32_v_u8m1_m(...) __riscv_vloxseg6ei32_v_u8m1_tumu(__VA_ARGS__)

#define	vloxseg6ei32_v_u8mf2(...) __riscv_vloxseg6ei32_v_u8mf2(__VA_ARGS__)

#define	vloxseg6ei32_v_u8mf2_m(...) __riscv_vloxseg6ei32_v_u8mf2_tumu(__VA_ARGS__)

#define	vloxseg6ei32_v_u8mf4(...) __riscv_vloxseg6ei32_v_u8mf4(__VA_ARGS__)

#define	vloxseg6ei32_v_u8mf4_m(...) __riscv_vloxseg6ei32_v_u8mf4_tumu(__VA_ARGS__)

#define	vloxseg6ei32_v_u8mf8(...) __riscv_vloxseg6ei32_v_u8mf8(__VA_ARGS__)

#define	vloxseg6ei32_v_u8mf8_m(...) __riscv_vloxseg6ei32_v_u8mf8_tumu(__VA_ARGS__)

#define	vloxseg6ei64_v_f16m1(...) __riscv_vloxseg6ei64_v_f16m1(__VA_ARGS__)

#define	vloxseg6ei64_v_f16m1_m(...) __riscv_vloxseg6ei64_v_f16m1_tumu(__VA_ARGS__)

#define	vloxseg6ei64_v_f16mf2(...) __riscv_vloxseg6ei64_v_f16mf2(__VA_ARGS__)

#define	vloxseg6ei64_v_f16mf2_m(...) __riscv_vloxseg6ei64_v_f16mf2_tumu(__VA_ARGS__)

#define	vloxseg6ei64_v_f16mf4(...) __riscv_vloxseg6ei64_v_f16mf4(__VA_ARGS__)

#define	vloxseg6ei64_v_f16mf4_m(...) __riscv_vloxseg6ei64_v_f16mf4_tumu(__VA_ARGS__)

#define	vloxseg6ei64_v_f32m1(...) __riscv_vloxseg6ei64_v_f32m1(__VA_ARGS__)

#define	vloxseg6ei64_v_f32m1_m(...) __riscv_vloxseg6ei64_v_f32m1_tumu(__VA_ARGS__)

#define	vloxseg6ei64_v_f32mf2(...) __riscv_vloxseg6ei64_v_f32mf2(__VA_ARGS__)

#define	vloxseg6ei64_v_f32mf2_m(...) __riscv_vloxseg6ei64_v_f32mf2_tumu(__VA_ARGS__)

#define	vloxseg6ei64_v_f64m1(...) __riscv_vloxseg6ei64_v_f64m1(__VA_ARGS__)

#define	vloxseg6ei64_v_f64m1_m(...) __riscv_vloxseg6ei64_v_f64m1_tumu(__VA_ARGS__)

#define	vloxseg6ei64_v_i16m1(...) __riscv_vloxseg6ei64_v_i16m1(__VA_ARGS__)

#define	vloxseg6ei64_v_i16m1_m(...) __riscv_vloxseg6ei64_v_i16m1_tumu(__VA_ARGS__)

#define	vloxseg6ei64_v_i16mf2(...) __riscv_vloxseg6ei64_v_i16mf2(__VA_ARGS__)

#define	vloxseg6ei64_v_i16mf2_m(...) __riscv_vloxseg6ei64_v_i16mf2_tumu(__VA_ARGS__)

#define	vloxseg6ei64_v_i16mf4(...) __riscv_vloxseg6ei64_v_i16mf4(__VA_ARGS__)

#define	vloxseg6ei64_v_i16mf4_m(...) __riscv_vloxseg6ei64_v_i16mf4_tumu(__VA_ARGS__)

#define	vloxseg6ei64_v_i32m1(...) __riscv_vloxseg6ei64_v_i32m1(__VA_ARGS__)

#define	vloxseg6ei64_v_i32m1_m(...) __riscv_vloxseg6ei64_v_i32m1_tumu(__VA_ARGS__)

#define	vloxseg6ei64_v_i32mf2(...) __riscv_vloxseg6ei64_v_i32mf2(__VA_ARGS__)

#define	vloxseg6ei64_v_i32mf2_m(...) __riscv_vloxseg6ei64_v_i32mf2_tumu(__VA_ARGS__)

#define	vloxseg6ei64_v_i64m1(...) __riscv_vloxseg6ei64_v_i64m1(__VA_ARGS__)

#define	vloxseg6ei64_v_i64m1_m(...) __riscv_vloxseg6ei64_v_i64m1_tumu(__VA_ARGS__)

#define	vloxseg6ei64_v_i8m1(...) __riscv_vloxseg6ei64_v_i8m1(__VA_ARGS__)

#define	vloxseg6ei64_v_i8m1_m(...) __riscv_vloxseg6ei64_v_i8m1_tumu(__VA_ARGS__)

#define	vloxseg6ei64_v_i8mf2(...) __riscv_vloxseg6ei64_v_i8mf2(__VA_ARGS__)

#define	vloxseg6ei64_v_i8mf2_m(...) __riscv_vloxseg6ei64_v_i8mf2_tumu(__VA_ARGS__)

#define	vloxseg6ei64_v_i8mf4(...) __riscv_vloxseg6ei64_v_i8mf4(__VA_ARGS__)

#define	vloxseg6ei64_v_i8mf4_m(...) __riscv_vloxseg6ei64_v_i8mf4_tumu(__VA_ARGS__)

#define	vloxseg6ei64_v_i8mf8(...) __riscv_vloxseg6ei64_v_i8mf8(__VA_ARGS__)

#define	vloxseg6ei64_v_i8mf8_m(...) __riscv_vloxseg6ei64_v_i8mf8_tumu(__VA_ARGS__)

#define	vloxseg6ei64_v_u16m1(...) __riscv_vloxseg6ei64_v_u16m1(__VA_ARGS__)

#define	vloxseg6ei64_v_u16m1_m(...) __riscv_vloxseg6ei64_v_u16m1_tumu(__VA_ARGS__)

#define	vloxseg6ei64_v_u16mf2(...) __riscv_vloxseg6ei64_v_u16mf2(__VA_ARGS__)

#define	vloxseg6ei64_v_u16mf2_m(...) __riscv_vloxseg6ei64_v_u16mf2_tumu(__VA_ARGS__)

#define	vloxseg6ei64_v_u16mf4(...) __riscv_vloxseg6ei64_v_u16mf4(__VA_ARGS__)

#define	vloxseg6ei64_v_u16mf4_m(...) __riscv_vloxseg6ei64_v_u16mf4_tumu(__VA_ARGS__)

#define	vloxseg6ei64_v_u32m1(...) __riscv_vloxseg6ei64_v_u32m1(__VA_ARGS__)

#define	vloxseg6ei64_v_u32m1_m(...) __riscv_vloxseg6ei64_v_u32m1_tumu(__VA_ARGS__)

#define	vloxseg6ei64_v_u32mf2(...) __riscv_vloxseg6ei64_v_u32mf2(__VA_ARGS__)

#define	vloxseg6ei64_v_u32mf2_m(...) __riscv_vloxseg6ei64_v_u32mf2_tumu(__VA_ARGS__)

#define	vloxseg6ei64_v_u64m1(...) __riscv_vloxseg6ei64_v_u64m1(__VA_ARGS__)

#define	vloxseg6ei64_v_u64m1_m(...) __riscv_vloxseg6ei64_v_u64m1_tumu(__VA_ARGS__)

#define	vloxseg6ei64_v_u8m1(...) __riscv_vloxseg6ei64_v_u8m1(__VA_ARGS__)

#define	vloxseg6ei64_v_u8m1_m(...) __riscv_vloxseg6ei64_v_u8m1_tumu(__VA_ARGS__)

#define	vloxseg6ei64_v_u8mf2(...) __riscv_vloxseg6ei64_v_u8mf2(__VA_ARGS__)

#define	vloxseg6ei64_v_u8mf2_m(...) __riscv_vloxseg6ei64_v_u8mf2_tumu(__VA_ARGS__)

#define	vloxseg6ei64_v_u8mf4(...) __riscv_vloxseg6ei64_v_u8mf4(__VA_ARGS__)

#define	vloxseg6ei64_v_u8mf4_m(...) __riscv_vloxseg6ei64_v_u8mf4_tumu(__VA_ARGS__)

#define	vloxseg6ei64_v_u8mf8(...) __riscv_vloxseg6ei64_v_u8mf8(__VA_ARGS__)

#define	vloxseg6ei64_v_u8mf8_m(...) __riscv_vloxseg6ei64_v_u8mf8_tumu(__VA_ARGS__)

#define	vloxseg6ei8_v_f16m1(...) __riscv_vloxseg6ei8_v_f16m1(__VA_ARGS__)

#define	vloxseg6ei8_v_f16m1_m(...) __riscv_vloxseg6ei8_v_f16m1_tumu(__VA_ARGS__)

#define	vloxseg6ei8_v_f16mf2(...) __riscv_vloxseg6ei8_v_f16mf2(__VA_ARGS__)

#define	vloxseg6ei8_v_f16mf2_m(...) __riscv_vloxseg6ei8_v_f16mf2_tumu(__VA_ARGS__)

#define	vloxseg6ei8_v_f16mf4(...) __riscv_vloxseg6ei8_v_f16mf4(__VA_ARGS__)

#define	vloxseg6ei8_v_f16mf4_m(...) __riscv_vloxseg6ei8_v_f16mf4_tumu(__VA_ARGS__)

#define	vloxseg6ei8_v_f32m1(...) __riscv_vloxseg6ei8_v_f32m1(__VA_ARGS__)

#define	vloxseg6ei8_v_f32m1_m(...) __riscv_vloxseg6ei8_v_f32m1_tumu(__VA_ARGS__)

#define	vloxseg6ei8_v_f32mf2(...) __riscv_vloxseg6ei8_v_f32mf2(__VA_ARGS__)

#define	vloxseg6ei8_v_f32mf2_m(...) __riscv_vloxseg6ei8_v_f32mf2_tumu(__VA_ARGS__)

#define	vloxseg6ei8_v_f64m1(...) __riscv_vloxseg6ei8_v_f64m1(__VA_ARGS__)

#define	vloxseg6ei8_v_f64m1_m(...) __riscv_vloxseg6ei8_v_f64m1_tumu(__VA_ARGS__)

#define	vloxseg6ei8_v_i16m1(...) __riscv_vloxseg6ei8_v_i16m1(__VA_ARGS__)

#define	vloxseg6ei8_v_i16m1_m(...) __riscv_vloxseg6ei8_v_i16m1_tumu(__VA_ARGS__)

#define	vloxseg6ei8_v_i16mf2(...) __riscv_vloxseg6ei8_v_i16mf2(__VA_ARGS__)

#define	vloxseg6ei8_v_i16mf2_m(...) __riscv_vloxseg6ei8_v_i16mf2_tumu(__VA_ARGS__)

#define	vloxseg6ei8_v_i16mf4(...) __riscv_vloxseg6ei8_v_i16mf4(__VA_ARGS__)

#define	vloxseg6ei8_v_i16mf4_m(...) __riscv_vloxseg6ei8_v_i16mf4_tumu(__VA_ARGS__)

#define	vloxseg6ei8_v_i32m1(...) __riscv_vloxseg6ei8_v_i32m1(__VA_ARGS__)

#define	vloxseg6ei8_v_i32m1_m(...) __riscv_vloxseg6ei8_v_i32m1_tumu(__VA_ARGS__)

#define	vloxseg6ei8_v_i32mf2(...) __riscv_vloxseg6ei8_v_i32mf2(__VA_ARGS__)

#define	vloxseg6ei8_v_i32mf2_m(...) __riscv_vloxseg6ei8_v_i32mf2_tumu(__VA_ARGS__)

#define	vloxseg6ei8_v_i64m1(...) __riscv_vloxseg6ei8_v_i64m1(__VA_ARGS__)

#define	vloxseg6ei8_v_i64m1_m(...) __riscv_vloxseg6ei8_v_i64m1_tumu(__VA_ARGS__)

#define	vloxseg6ei8_v_i8m1(...) __riscv_vloxseg6ei8_v_i8m1(__VA_ARGS__)

#define	vloxseg6ei8_v_i8m1_m(...) __riscv_vloxseg6ei8_v_i8m1_tumu(__VA_ARGS__)

#define	vloxseg6ei8_v_i8mf2(...) __riscv_vloxseg6ei8_v_i8mf2(__VA_ARGS__)

#define	vloxseg6ei8_v_i8mf2_m(...) __riscv_vloxseg6ei8_v_i8mf2_tumu(__VA_ARGS__)

#define	vloxseg6ei8_v_i8mf4(...) __riscv_vloxseg6ei8_v_i8mf4(__VA_ARGS__)

#define	vloxseg6ei8_v_i8mf4_m(...) __riscv_vloxseg6ei8_v_i8mf4_tumu(__VA_ARGS__)

#define	vloxseg6ei8_v_i8mf8(...) __riscv_vloxseg6ei8_v_i8mf8(__VA_ARGS__)

#define	vloxseg6ei8_v_i8mf8_m(...) __riscv_vloxseg6ei8_v_i8mf8_tumu(__VA_ARGS__)

#define	vloxseg6ei8_v_u16m1(...) __riscv_vloxseg6ei8_v_u16m1(__VA_ARGS__)

#define	vloxseg6ei8_v_u16m1_m(...) __riscv_vloxseg6ei8_v_u16m1_tumu(__VA_ARGS__)

#define	vloxseg6ei8_v_u16mf2(...) __riscv_vloxseg6ei8_v_u16mf2(__VA_ARGS__)

#define	vloxseg6ei8_v_u16mf2_m(...) __riscv_vloxseg6ei8_v_u16mf2_tumu(__VA_ARGS__)

#define	vloxseg6ei8_v_u16mf4(...) __riscv_vloxseg6ei8_v_u16mf4(__VA_ARGS__)

#define	vloxseg6ei8_v_u16mf4_m(...) __riscv_vloxseg6ei8_v_u16mf4_tumu(__VA_ARGS__)

#define	vloxseg6ei8_v_u32m1(...) __riscv_vloxseg6ei8_v_u32m1(__VA_ARGS__)

#define	vloxseg6ei8_v_u32m1_m(...) __riscv_vloxseg6ei8_v_u32m1_tumu(__VA_ARGS__)

#define	vloxseg6ei8_v_u32mf2(...) __riscv_vloxseg6ei8_v_u32mf2(__VA_ARGS__)

#define	vloxseg6ei8_v_u32mf2_m(...) __riscv_vloxseg6ei8_v_u32mf2_tumu(__VA_ARGS__)

#define	vloxseg6ei8_v_u64m1(...) __riscv_vloxseg6ei8_v_u64m1(__VA_ARGS__)

#define	vloxseg6ei8_v_u64m1_m(...) __riscv_vloxseg6ei8_v_u64m1_tumu(__VA_ARGS__)

#define	vloxseg6ei8_v_u8m1(...) __riscv_vloxseg6ei8_v_u8m1(__VA_ARGS__)

#define	vloxseg6ei8_v_u8m1_m(...) __riscv_vloxseg6ei8_v_u8m1_tumu(__VA_ARGS__)

#define	vloxseg6ei8_v_u8mf2(...) __riscv_vloxseg6ei8_v_u8mf2(__VA_ARGS__)

#define	vloxseg6ei8_v_u8mf2_m(...) __riscv_vloxseg6ei8_v_u8mf2_tumu(__VA_ARGS__)

#define	vloxseg6ei8_v_u8mf4(...) __riscv_vloxseg6ei8_v_u8mf4(__VA_ARGS__)

#define	vloxseg6ei8_v_u8mf4_m(...) __riscv_vloxseg6ei8_v_u8mf4_tumu(__VA_ARGS__)

#define	vloxseg6ei8_v_u8mf8(...) __riscv_vloxseg6ei8_v_u8mf8(__VA_ARGS__)

#define	vloxseg6ei8_v_u8mf8_m(...) __riscv_vloxseg6ei8_v_u8mf8_tumu(__VA_ARGS__)

#define	vloxseg7ei16_v_f16m1(...) __riscv_vloxseg7ei16_v_f16m1(__VA_ARGS__)

#define	vloxseg7ei16_v_f16m1_m(...) __riscv_vloxseg7ei16_v_f16m1_tumu(__VA_ARGS__)

#define	vloxseg7ei16_v_f16mf2(...) __riscv_vloxseg7ei16_v_f16mf2(__VA_ARGS__)

#define	vloxseg7ei16_v_f16mf2_m(...) __riscv_vloxseg7ei16_v_f16mf2_tumu(__VA_ARGS__)

#define	vloxseg7ei16_v_f16mf4(...) __riscv_vloxseg7ei16_v_f16mf4(__VA_ARGS__)

#define	vloxseg7ei16_v_f16mf4_m(...) __riscv_vloxseg7ei16_v_f16mf4_tumu(__VA_ARGS__)

#define	vloxseg7ei16_v_f32m1(...) __riscv_vloxseg7ei16_v_f32m1(__VA_ARGS__)

#define	vloxseg7ei16_v_f32m1_m(...) __riscv_vloxseg7ei16_v_f32m1_tumu(__VA_ARGS__)

#define	vloxseg7ei16_v_f32mf2(...) __riscv_vloxseg7ei16_v_f32mf2(__VA_ARGS__)

#define	vloxseg7ei16_v_f32mf2_m(...) __riscv_vloxseg7ei16_v_f32mf2_tumu(__VA_ARGS__)

#define	vloxseg7ei16_v_f64m1(...) __riscv_vloxseg7ei16_v_f64m1(__VA_ARGS__)

#define	vloxseg7ei16_v_f64m1_m(...) __riscv_vloxseg7ei16_v_f64m1_tumu(__VA_ARGS__)

#define	vloxseg7ei16_v_i16m1(...) __riscv_vloxseg7ei16_v_i16m1(__VA_ARGS__)

#define	vloxseg7ei16_v_i16m1_m(...) __riscv_vloxseg7ei16_v_i16m1_tumu(__VA_ARGS__)

#define	vloxseg7ei16_v_i16mf2(...) __riscv_vloxseg7ei16_v_i16mf2(__VA_ARGS__)

#define	vloxseg7ei16_v_i16mf2_m(...) __riscv_vloxseg7ei16_v_i16mf2_tumu(__VA_ARGS__)

#define	vloxseg7ei16_v_i16mf4(...) __riscv_vloxseg7ei16_v_i16mf4(__VA_ARGS__)

#define	vloxseg7ei16_v_i16mf4_m(...) __riscv_vloxseg7ei16_v_i16mf4_tumu(__VA_ARGS__)

#define	vloxseg7ei16_v_i32m1(...) __riscv_vloxseg7ei16_v_i32m1(__VA_ARGS__)

#define	vloxseg7ei16_v_i32m1_m(...) __riscv_vloxseg7ei16_v_i32m1_tumu(__VA_ARGS__)

#define	vloxseg7ei16_v_i32mf2(...) __riscv_vloxseg7ei16_v_i32mf2(__VA_ARGS__)

#define	vloxseg7ei16_v_i32mf2_m(...) __riscv_vloxseg7ei16_v_i32mf2_tumu(__VA_ARGS__)

#define	vloxseg7ei16_v_i64m1(...) __riscv_vloxseg7ei16_v_i64m1(__VA_ARGS__)

#define	vloxseg7ei16_v_i64m1_m(...) __riscv_vloxseg7ei16_v_i64m1_tumu(__VA_ARGS__)

#define	vloxseg7ei16_v_i8m1(...) __riscv_vloxseg7ei16_v_i8m1(__VA_ARGS__)

#define	vloxseg7ei16_v_i8m1_m(...) __riscv_vloxseg7ei16_v_i8m1_tumu(__VA_ARGS__)

#define	vloxseg7ei16_v_i8mf2(...) __riscv_vloxseg7ei16_v_i8mf2(__VA_ARGS__)

#define	vloxseg7ei16_v_i8mf2_m(...) __riscv_vloxseg7ei16_v_i8mf2_tumu(__VA_ARGS__)

#define	vloxseg7ei16_v_i8mf4(...) __riscv_vloxseg7ei16_v_i8mf4(__VA_ARGS__)

#define	vloxseg7ei16_v_i8mf4_m(...) __riscv_vloxseg7ei16_v_i8mf4_tumu(__VA_ARGS__)

#define	vloxseg7ei16_v_i8mf8(...) __riscv_vloxseg7ei16_v_i8mf8(__VA_ARGS__)

#define	vloxseg7ei16_v_i8mf8_m(...) __riscv_vloxseg7ei16_v_i8mf8_tumu(__VA_ARGS__)

#define	vloxseg7ei16_v_u16m1(...) __riscv_vloxseg7ei16_v_u16m1(__VA_ARGS__)

#define	vloxseg7ei16_v_u16m1_m(...) __riscv_vloxseg7ei16_v_u16m1_tumu(__VA_ARGS__)

#define	vloxseg7ei16_v_u16mf2(...) __riscv_vloxseg7ei16_v_u16mf2(__VA_ARGS__)

#define	vloxseg7ei16_v_u16mf2_m(...) __riscv_vloxseg7ei16_v_u16mf2_tumu(__VA_ARGS__)

#define	vloxseg7ei16_v_u16mf4(...) __riscv_vloxseg7ei16_v_u16mf4(__VA_ARGS__)

#define	vloxseg7ei16_v_u16mf4_m(...) __riscv_vloxseg7ei16_v_u16mf4_tumu(__VA_ARGS__)

#define	vloxseg7ei16_v_u32m1(...) __riscv_vloxseg7ei16_v_u32m1(__VA_ARGS__)

#define	vloxseg7ei16_v_u32m1_m(...) __riscv_vloxseg7ei16_v_u32m1_tumu(__VA_ARGS__)

#define	vloxseg7ei16_v_u32mf2(...) __riscv_vloxseg7ei16_v_u32mf2(__VA_ARGS__)

#define	vloxseg7ei16_v_u32mf2_m(...) __riscv_vloxseg7ei16_v_u32mf2_tumu(__VA_ARGS__)

#define	vloxseg7ei16_v_u64m1(...) __riscv_vloxseg7ei16_v_u64m1(__VA_ARGS__)

#define	vloxseg7ei16_v_u64m1_m(...) __riscv_vloxseg7ei16_v_u64m1_tumu(__VA_ARGS__)

#define	vloxseg7ei16_v_u8m1(...) __riscv_vloxseg7ei16_v_u8m1(__VA_ARGS__)

#define	vloxseg7ei16_v_u8m1_m(...) __riscv_vloxseg7ei16_v_u8m1_tumu(__VA_ARGS__)

#define	vloxseg7ei16_v_u8mf2(...) __riscv_vloxseg7ei16_v_u8mf2(__VA_ARGS__)

#define	vloxseg7ei16_v_u8mf2_m(...) __riscv_vloxseg7ei16_v_u8mf2_tumu(__VA_ARGS__)

#define	vloxseg7ei16_v_u8mf4(...) __riscv_vloxseg7ei16_v_u8mf4(__VA_ARGS__)

#define	vloxseg7ei16_v_u8mf4_m(...) __riscv_vloxseg7ei16_v_u8mf4_tumu(__VA_ARGS__)

#define	vloxseg7ei16_v_u8mf8(...) __riscv_vloxseg7ei16_v_u8mf8(__VA_ARGS__)

#define	vloxseg7ei16_v_u8mf8_m(...) __riscv_vloxseg7ei16_v_u8mf8_tumu(__VA_ARGS__)

#define	vloxseg7ei32_v_f16m1(...) __riscv_vloxseg7ei32_v_f16m1(__VA_ARGS__)

#define	vloxseg7ei32_v_f16m1_m(...) __riscv_vloxseg7ei32_v_f16m1_tumu(__VA_ARGS__)

#define	vloxseg7ei32_v_f16mf2(...) __riscv_vloxseg7ei32_v_f16mf2(__VA_ARGS__)

#define	vloxseg7ei32_v_f16mf2_m(...) __riscv_vloxseg7ei32_v_f16mf2_tumu(__VA_ARGS__)

#define	vloxseg7ei32_v_f16mf4(...) __riscv_vloxseg7ei32_v_f16mf4(__VA_ARGS__)

#define	vloxseg7ei32_v_f16mf4_m(...) __riscv_vloxseg7ei32_v_f16mf4_tumu(__VA_ARGS__)

#define	vloxseg7ei32_v_f32m1(...) __riscv_vloxseg7ei32_v_f32m1(__VA_ARGS__)

#define	vloxseg7ei32_v_f32m1_m(...) __riscv_vloxseg7ei32_v_f32m1_tumu(__VA_ARGS__)

#define	vloxseg7ei32_v_f32mf2(...) __riscv_vloxseg7ei32_v_f32mf2(__VA_ARGS__)

#define	vloxseg7ei32_v_f32mf2_m(...) __riscv_vloxseg7ei32_v_f32mf2_tumu(__VA_ARGS__)

#define	vloxseg7ei32_v_f64m1(...) __riscv_vloxseg7ei32_v_f64m1(__VA_ARGS__)

#define	vloxseg7ei32_v_f64m1_m(...) __riscv_vloxseg7ei32_v_f64m1_tumu(__VA_ARGS__)

#define	vloxseg7ei32_v_i16m1(...) __riscv_vloxseg7ei32_v_i16m1(__VA_ARGS__)

#define	vloxseg7ei32_v_i16m1_m(...) __riscv_vloxseg7ei32_v_i16m1_tumu(__VA_ARGS__)

#define	vloxseg7ei32_v_i16mf2(...) __riscv_vloxseg7ei32_v_i16mf2(__VA_ARGS__)

#define	vloxseg7ei32_v_i16mf2_m(...) __riscv_vloxseg7ei32_v_i16mf2_tumu(__VA_ARGS__)

#define	vloxseg7ei32_v_i16mf4(...) __riscv_vloxseg7ei32_v_i16mf4(__VA_ARGS__)

#define	vloxseg7ei32_v_i16mf4_m(...) __riscv_vloxseg7ei32_v_i16mf4_tumu(__VA_ARGS__)

#define	vloxseg7ei32_v_i32m1(...) __riscv_vloxseg7ei32_v_i32m1(__VA_ARGS__)

#define	vloxseg7ei32_v_i32m1_m(...) __riscv_vloxseg7ei32_v_i32m1_tumu(__VA_ARGS__)

#define	vloxseg7ei32_v_i32mf2(...) __riscv_vloxseg7ei32_v_i32mf2(__VA_ARGS__)

#define	vloxseg7ei32_v_i32mf2_m(...) __riscv_vloxseg7ei32_v_i32mf2_tumu(__VA_ARGS__)

#define	vloxseg7ei32_v_i64m1(...) __riscv_vloxseg7ei32_v_i64m1(__VA_ARGS__)

#define	vloxseg7ei32_v_i64m1_m(...) __riscv_vloxseg7ei32_v_i64m1_tumu(__VA_ARGS__)

#define	vloxseg7ei32_v_i8m1(...) __riscv_vloxseg7ei32_v_i8m1(__VA_ARGS__)

#define	vloxseg7ei32_v_i8m1_m(...) __riscv_vloxseg7ei32_v_i8m1_tumu(__VA_ARGS__)

#define	vloxseg7ei32_v_i8mf2(...) __riscv_vloxseg7ei32_v_i8mf2(__VA_ARGS__)

#define	vloxseg7ei32_v_i8mf2_m(...) __riscv_vloxseg7ei32_v_i8mf2_tumu(__VA_ARGS__)

#define	vloxseg7ei32_v_i8mf4(...) __riscv_vloxseg7ei32_v_i8mf4(__VA_ARGS__)

#define	vloxseg7ei32_v_i8mf4_m(...) __riscv_vloxseg7ei32_v_i8mf4_tumu(__VA_ARGS__)

#define	vloxseg7ei32_v_i8mf8(...) __riscv_vloxseg7ei32_v_i8mf8(__VA_ARGS__)

#define	vloxseg7ei32_v_i8mf8_m(...) __riscv_vloxseg7ei32_v_i8mf8_tumu(__VA_ARGS__)

#define	vloxseg7ei32_v_u16m1(...) __riscv_vloxseg7ei32_v_u16m1(__VA_ARGS__)

#define	vloxseg7ei32_v_u16m1_m(...) __riscv_vloxseg7ei32_v_u16m1_tumu(__VA_ARGS__)

#define	vloxseg7ei32_v_u16mf2(...) __riscv_vloxseg7ei32_v_u16mf2(__VA_ARGS__)

#define	vloxseg7ei32_v_u16mf2_m(...) __riscv_vloxseg7ei32_v_u16mf2_tumu(__VA_ARGS__)

#define	vloxseg7ei32_v_u16mf4(...) __riscv_vloxseg7ei32_v_u16mf4(__VA_ARGS__)

#define	vloxseg7ei32_v_u16mf4_m(...) __riscv_vloxseg7ei32_v_u16mf4_tumu(__VA_ARGS__)

#define	vloxseg7ei32_v_u32m1(...) __riscv_vloxseg7ei32_v_u32m1(__VA_ARGS__)

#define	vloxseg7ei32_v_u32m1_m(...) __riscv_vloxseg7ei32_v_u32m1_tumu(__VA_ARGS__)

#define	vloxseg7ei32_v_u32mf2(...) __riscv_vloxseg7ei32_v_u32mf2(__VA_ARGS__)

#define	vloxseg7ei32_v_u32mf2_m(...) __riscv_vloxseg7ei32_v_u32mf2_tumu(__VA_ARGS__)

#define	vloxseg7ei32_v_u64m1(...) __riscv_vloxseg7ei32_v_u64m1(__VA_ARGS__)

#define	vloxseg7ei32_v_u64m1_m(...) __riscv_vloxseg7ei32_v_u64m1_tumu(__VA_ARGS__)

#define	vloxseg7ei32_v_u8m1(...) __riscv_vloxseg7ei32_v_u8m1(__VA_ARGS__)

#define	vloxseg7ei32_v_u8m1_m(...) __riscv_vloxseg7ei32_v_u8m1_tumu(__VA_ARGS__)

#define	vloxseg7ei32_v_u8mf2(...) __riscv_vloxseg7ei32_v_u8mf2(__VA_ARGS__)

#define	vloxseg7ei32_v_u8mf2_m(...) __riscv_vloxseg7ei32_v_u8mf2_tumu(__VA_ARGS__)

#define	vloxseg7ei32_v_u8mf4(...) __riscv_vloxseg7ei32_v_u8mf4(__VA_ARGS__)

#define	vloxseg7ei32_v_u8mf4_m(...) __riscv_vloxseg7ei32_v_u8mf4_tumu(__VA_ARGS__)

#define	vloxseg7ei32_v_u8mf8(...) __riscv_vloxseg7ei32_v_u8mf8(__VA_ARGS__)

#define	vloxseg7ei32_v_u8mf8_m(...) __riscv_vloxseg7ei32_v_u8mf8_tumu(__VA_ARGS__)

#define	vloxseg7ei64_v_f16m1(...) __riscv_vloxseg7ei64_v_f16m1(__VA_ARGS__)

#define	vloxseg7ei64_v_f16m1_m(...) __riscv_vloxseg7ei64_v_f16m1_tumu(__VA_ARGS__)

#define	vloxseg7ei64_v_f16mf2(...) __riscv_vloxseg7ei64_v_f16mf2(__VA_ARGS__)

#define	vloxseg7ei64_v_f16mf2_m(...) __riscv_vloxseg7ei64_v_f16mf2_tumu(__VA_ARGS__)

#define	vloxseg7ei64_v_f16mf4(...) __riscv_vloxseg7ei64_v_f16mf4(__VA_ARGS__)

#define	vloxseg7ei64_v_f16mf4_m(...) __riscv_vloxseg7ei64_v_f16mf4_tumu(__VA_ARGS__)

#define	vloxseg7ei64_v_f32m1(...) __riscv_vloxseg7ei64_v_f32m1(__VA_ARGS__)

#define	vloxseg7ei64_v_f32m1_m(...) __riscv_vloxseg7ei64_v_f32m1_tumu(__VA_ARGS__)

#define	vloxseg7ei64_v_f32mf2(...) __riscv_vloxseg7ei64_v_f32mf2(__VA_ARGS__)

#define	vloxseg7ei64_v_f32mf2_m(...) __riscv_vloxseg7ei64_v_f32mf2_tumu(__VA_ARGS__)

#define	vloxseg7ei64_v_f64m1(...) __riscv_vloxseg7ei64_v_f64m1(__VA_ARGS__)

#define	vloxseg7ei64_v_f64m1_m(...) __riscv_vloxseg7ei64_v_f64m1_tumu(__VA_ARGS__)

#define	vloxseg7ei64_v_i16m1(...) __riscv_vloxseg7ei64_v_i16m1(__VA_ARGS__)

#define	vloxseg7ei64_v_i16m1_m(...) __riscv_vloxseg7ei64_v_i16m1_tumu(__VA_ARGS__)

#define	vloxseg7ei64_v_i16mf2(...) __riscv_vloxseg7ei64_v_i16mf2(__VA_ARGS__)

#define	vloxseg7ei64_v_i16mf2_m(...) __riscv_vloxseg7ei64_v_i16mf2_tumu(__VA_ARGS__)

#define	vloxseg7ei64_v_i16mf4(...) __riscv_vloxseg7ei64_v_i16mf4(__VA_ARGS__)

#define	vloxseg7ei64_v_i16mf4_m(...) __riscv_vloxseg7ei64_v_i16mf4_tumu(__VA_ARGS__)

#define	vloxseg7ei64_v_i32m1(...) __riscv_vloxseg7ei64_v_i32m1(__VA_ARGS__)

#define	vloxseg7ei64_v_i32m1_m(...) __riscv_vloxseg7ei64_v_i32m1_tumu(__VA_ARGS__)

#define	vloxseg7ei64_v_i32mf2(...) __riscv_vloxseg7ei64_v_i32mf2(__VA_ARGS__)

#define	vloxseg7ei64_v_i32mf2_m(...) __riscv_vloxseg7ei64_v_i32mf2_tumu(__VA_ARGS__)

#define	vloxseg7ei64_v_i64m1(...) __riscv_vloxseg7ei64_v_i64m1(__VA_ARGS__)

#define	vloxseg7ei64_v_i64m1_m(...) __riscv_vloxseg7ei64_v_i64m1_tumu(__VA_ARGS__)

#define	vloxseg7ei64_v_i8m1(...) __riscv_vloxseg7ei64_v_i8m1(__VA_ARGS__)

#define	vloxseg7ei64_v_i8m1_m(...) __riscv_vloxseg7ei64_v_i8m1_tumu(__VA_ARGS__)

#define	vloxseg7ei64_v_i8mf2(...) __riscv_vloxseg7ei64_v_i8mf2(__VA_ARGS__)

#define	vloxseg7ei64_v_i8mf2_m(...) __riscv_vloxseg7ei64_v_i8mf2_tumu(__VA_ARGS__)

#define	vloxseg7ei64_v_i8mf4(...) __riscv_vloxseg7ei64_v_i8mf4(__VA_ARGS__)

#define	vloxseg7ei64_v_i8mf4_m(...) __riscv_vloxseg7ei64_v_i8mf4_tumu(__VA_ARGS__)

#define	vloxseg7ei64_v_i8mf8(...) __riscv_vloxseg7ei64_v_i8mf8(__VA_ARGS__)

#define	vloxseg7ei64_v_i8mf8_m(...) __riscv_vloxseg7ei64_v_i8mf8_tumu(__VA_ARGS__)

#define	vloxseg7ei64_v_u16m1(...) __riscv_vloxseg7ei64_v_u16m1(__VA_ARGS__)

#define	vloxseg7ei64_v_u16m1_m(...) __riscv_vloxseg7ei64_v_u16m1_tumu(__VA_ARGS__)

#define	vloxseg7ei64_v_u16mf2(...) __riscv_vloxseg7ei64_v_u16mf2(__VA_ARGS__)

#define	vloxseg7ei64_v_u16mf2_m(...) __riscv_vloxseg7ei64_v_u16mf2_tumu(__VA_ARGS__)

#define	vloxseg7ei64_v_u16mf4(...) __riscv_vloxseg7ei64_v_u16mf4(__VA_ARGS__)

#define	vloxseg7ei64_v_u16mf4_m(...) __riscv_vloxseg7ei64_v_u16mf4_tumu(__VA_ARGS__)

#define	vloxseg7ei64_v_u32m1(...) __riscv_vloxseg7ei64_v_u32m1(__VA_ARGS__)

#define	vloxseg7ei64_v_u32m1_m(...) __riscv_vloxseg7ei64_v_u32m1_tumu(__VA_ARGS__)

#define	vloxseg7ei64_v_u32mf2(...) __riscv_vloxseg7ei64_v_u32mf2(__VA_ARGS__)

#define	vloxseg7ei64_v_u32mf2_m(...) __riscv_vloxseg7ei64_v_u32mf2_tumu(__VA_ARGS__)

#define	vloxseg7ei64_v_u64m1(...) __riscv_vloxseg7ei64_v_u64m1(__VA_ARGS__)

#define	vloxseg7ei64_v_u64m1_m(...) __riscv_vloxseg7ei64_v_u64m1_tumu(__VA_ARGS__)

#define	vloxseg7ei64_v_u8m1(...) __riscv_vloxseg7ei64_v_u8m1(__VA_ARGS__)

#define	vloxseg7ei64_v_u8m1_m(...) __riscv_vloxseg7ei64_v_u8m1_tumu(__VA_ARGS__)

#define	vloxseg7ei64_v_u8mf2(...) __riscv_vloxseg7ei64_v_u8mf2(__VA_ARGS__)

#define	vloxseg7ei64_v_u8mf2_m(...) __riscv_vloxseg7ei64_v_u8mf2_tumu(__VA_ARGS__)

#define	vloxseg7ei64_v_u8mf4(...) __riscv_vloxseg7ei64_v_u8mf4(__VA_ARGS__)

#define	vloxseg7ei64_v_u8mf4_m(...) __riscv_vloxseg7ei64_v_u8mf4_tumu(__VA_ARGS__)

#define	vloxseg7ei64_v_u8mf8(...) __riscv_vloxseg7ei64_v_u8mf8(__VA_ARGS__)

#define	vloxseg7ei64_v_u8mf8_m(...) __riscv_vloxseg7ei64_v_u8mf8_tumu(__VA_ARGS__)

#define	vloxseg7ei8_v_f16m1(...) __riscv_vloxseg7ei8_v_f16m1(__VA_ARGS__)

#define	vloxseg7ei8_v_f16m1_m(...) __riscv_vloxseg7ei8_v_f16m1_tumu(__VA_ARGS__)

#define	vloxseg7ei8_v_f16mf2(...) __riscv_vloxseg7ei8_v_f16mf2(__VA_ARGS__)

#define	vloxseg7ei8_v_f16mf2_m(...) __riscv_vloxseg7ei8_v_f16mf2_tumu(__VA_ARGS__)

#define	vloxseg7ei8_v_f16mf4(...) __riscv_vloxseg7ei8_v_f16mf4(__VA_ARGS__)

#define	vloxseg7ei8_v_f16mf4_m(...) __riscv_vloxseg7ei8_v_f16mf4_tumu(__VA_ARGS__)

#define	vloxseg7ei8_v_f32m1(...) __riscv_vloxseg7ei8_v_f32m1(__VA_ARGS__)

#define	vloxseg7ei8_v_f32m1_m(...) __riscv_vloxseg7ei8_v_f32m1_tumu(__VA_ARGS__)

#define	vloxseg7ei8_v_f32mf2(...) __riscv_vloxseg7ei8_v_f32mf2(__VA_ARGS__)

#define	vloxseg7ei8_v_f32mf2_m(...) __riscv_vloxseg7ei8_v_f32mf2_tumu(__VA_ARGS__)

#define	vloxseg7ei8_v_f64m1(...) __riscv_vloxseg7ei8_v_f64m1(__VA_ARGS__)

#define	vloxseg7ei8_v_f64m1_m(...) __riscv_vloxseg7ei8_v_f64m1_tumu(__VA_ARGS__)

#define	vloxseg7ei8_v_i16m1(...) __riscv_vloxseg7ei8_v_i16m1(__VA_ARGS__)

#define	vloxseg7ei8_v_i16m1_m(...) __riscv_vloxseg7ei8_v_i16m1_tumu(__VA_ARGS__)

#define	vloxseg7ei8_v_i16mf2(...) __riscv_vloxseg7ei8_v_i16mf2(__VA_ARGS__)

#define	vloxseg7ei8_v_i16mf2_m(...) __riscv_vloxseg7ei8_v_i16mf2_tumu(__VA_ARGS__)

#define	vloxseg7ei8_v_i16mf4(...) __riscv_vloxseg7ei8_v_i16mf4(__VA_ARGS__)

#define	vloxseg7ei8_v_i16mf4_m(...) __riscv_vloxseg7ei8_v_i16mf4_tumu(__VA_ARGS__)

#define	vloxseg7ei8_v_i32m1(...) __riscv_vloxseg7ei8_v_i32m1(__VA_ARGS__)

#define	vloxseg7ei8_v_i32m1_m(...) __riscv_vloxseg7ei8_v_i32m1_tumu(__VA_ARGS__)

#define	vloxseg7ei8_v_i32mf2(...) __riscv_vloxseg7ei8_v_i32mf2(__VA_ARGS__)

#define	vloxseg7ei8_v_i32mf2_m(...) __riscv_vloxseg7ei8_v_i32mf2_tumu(__VA_ARGS__)

#define	vloxseg7ei8_v_i64m1(...) __riscv_vloxseg7ei8_v_i64m1(__VA_ARGS__)

#define	vloxseg7ei8_v_i64m1_m(...) __riscv_vloxseg7ei8_v_i64m1_tumu(__VA_ARGS__)

#define	vloxseg7ei8_v_i8m1(...) __riscv_vloxseg7ei8_v_i8m1(__VA_ARGS__)

#define	vloxseg7ei8_v_i8m1_m(...) __riscv_vloxseg7ei8_v_i8m1_tumu(__VA_ARGS__)

#define	vloxseg7ei8_v_i8mf2(...) __riscv_vloxseg7ei8_v_i8mf2(__VA_ARGS__)

#define	vloxseg7ei8_v_i8mf2_m(...) __riscv_vloxseg7ei8_v_i8mf2_tumu(__VA_ARGS__)

#define	vloxseg7ei8_v_i8mf4(...) __riscv_vloxseg7ei8_v_i8mf4(__VA_ARGS__)

#define	vloxseg7ei8_v_i8mf4_m(...) __riscv_vloxseg7ei8_v_i8mf4_tumu(__VA_ARGS__)

#define	vloxseg7ei8_v_i8mf8(...) __riscv_vloxseg7ei8_v_i8mf8(__VA_ARGS__)

#define	vloxseg7ei8_v_i8mf8_m(...) __riscv_vloxseg7ei8_v_i8mf8_tumu(__VA_ARGS__)

#define	vloxseg7ei8_v_u16m1(...) __riscv_vloxseg7ei8_v_u16m1(__VA_ARGS__)

#define	vloxseg7ei8_v_u16m1_m(...) __riscv_vloxseg7ei8_v_u16m1_tumu(__VA_ARGS__)

#define	vloxseg7ei8_v_u16mf2(...) __riscv_vloxseg7ei8_v_u16mf2(__VA_ARGS__)

#define	vloxseg7ei8_v_u16mf2_m(...) __riscv_vloxseg7ei8_v_u16mf2_tumu(__VA_ARGS__)

#define	vloxseg7ei8_v_u16mf4(...) __riscv_vloxseg7ei8_v_u16mf4(__VA_ARGS__)

#define	vloxseg7ei8_v_u16mf4_m(...) __riscv_vloxseg7ei8_v_u16mf4_tumu(__VA_ARGS__)

#define	vloxseg7ei8_v_u32m1(...) __riscv_vloxseg7ei8_v_u32m1(__VA_ARGS__)

#define	vloxseg7ei8_v_u32m1_m(...) __riscv_vloxseg7ei8_v_u32m1_tumu(__VA_ARGS__)

#define	vloxseg7ei8_v_u32mf2(...) __riscv_vloxseg7ei8_v_u32mf2(__VA_ARGS__)

#define	vloxseg7ei8_v_u32mf2_m(...) __riscv_vloxseg7ei8_v_u32mf2_tumu(__VA_ARGS__)

#define	vloxseg7ei8_v_u64m1(...) __riscv_vloxseg7ei8_v_u64m1(__VA_ARGS__)

#define	vloxseg7ei8_v_u64m1_m(...) __riscv_vloxseg7ei8_v_u64m1_tumu(__VA_ARGS__)

#define	vloxseg7ei8_v_u8m1(...) __riscv_vloxseg7ei8_v_u8m1(__VA_ARGS__)

#define	vloxseg7ei8_v_u8m1_m(...) __riscv_vloxseg7ei8_v_u8m1_tumu(__VA_ARGS__)

#define	vloxseg7ei8_v_u8mf2(...) __riscv_vloxseg7ei8_v_u8mf2(__VA_ARGS__)

#define	vloxseg7ei8_v_u8mf2_m(...) __riscv_vloxseg7ei8_v_u8mf2_tumu(__VA_ARGS__)

#define	vloxseg7ei8_v_u8mf4(...) __riscv_vloxseg7ei8_v_u8mf4(__VA_ARGS__)

#define	vloxseg7ei8_v_u8mf4_m(...) __riscv_vloxseg7ei8_v_u8mf4_tumu(__VA_ARGS__)

#define	vloxseg7ei8_v_u8mf8(...) __riscv_vloxseg7ei8_v_u8mf8(__VA_ARGS__)

#define	vloxseg7ei8_v_u8mf8_m(...) __riscv_vloxseg7ei8_v_u8mf8_tumu(__VA_ARGS__)

#define	vloxseg8ei16_v_f16m1(...) __riscv_vloxseg8ei16_v_f16m1(__VA_ARGS__)

#define	vloxseg8ei16_v_f16m1_m(...) __riscv_vloxseg8ei16_v_f16m1_tumu(__VA_ARGS__)

#define	vloxseg8ei16_v_f16mf2(...) __riscv_vloxseg8ei16_v_f16mf2(__VA_ARGS__)

#define	vloxseg8ei16_v_f16mf2_m(...) __riscv_vloxseg8ei16_v_f16mf2_tumu(__VA_ARGS__)

#define	vloxseg8ei16_v_f16mf4(...) __riscv_vloxseg8ei16_v_f16mf4(__VA_ARGS__)

#define	vloxseg8ei16_v_f16mf4_m(...) __riscv_vloxseg8ei16_v_f16mf4_tumu(__VA_ARGS__)

#define	vloxseg8ei16_v_f32m1(...) __riscv_vloxseg8ei16_v_f32m1(__VA_ARGS__)

#define	vloxseg8ei16_v_f32m1_m(...) __riscv_vloxseg8ei16_v_f32m1_tumu(__VA_ARGS__)

#define	vloxseg8ei16_v_f32mf2(...) __riscv_vloxseg8ei16_v_f32mf2(__VA_ARGS__)

#define	vloxseg8ei16_v_f32mf2_m(...) __riscv_vloxseg8ei16_v_f32mf2_tumu(__VA_ARGS__)

#define	vloxseg8ei16_v_f64m1(...) __riscv_vloxseg8ei16_v_f64m1(__VA_ARGS__)

#define	vloxseg8ei16_v_f64m1_m(...) __riscv_vloxseg8ei16_v_f64m1_tumu(__VA_ARGS__)

#define	vloxseg8ei16_v_i16m1(...) __riscv_vloxseg8ei16_v_i16m1(__VA_ARGS__)

#define	vloxseg8ei16_v_i16m1_m(...) __riscv_vloxseg8ei16_v_i16m1_tumu(__VA_ARGS__)

#define	vloxseg8ei16_v_i16mf2(...) __riscv_vloxseg8ei16_v_i16mf2(__VA_ARGS__)

#define	vloxseg8ei16_v_i16mf2_m(...) __riscv_vloxseg8ei16_v_i16mf2_tumu(__VA_ARGS__)

#define	vloxseg8ei16_v_i16mf4(...) __riscv_vloxseg8ei16_v_i16mf4(__VA_ARGS__)

#define	vloxseg8ei16_v_i16mf4_m(...) __riscv_vloxseg8ei16_v_i16mf4_tumu(__VA_ARGS__)

#define	vloxseg8ei16_v_i32m1(...) __riscv_vloxseg8ei16_v_i32m1(__VA_ARGS__)

#define	vloxseg8ei16_v_i32m1_m(...) __riscv_vloxseg8ei16_v_i32m1_tumu(__VA_ARGS__)

#define	vloxseg8ei16_v_i32mf2(...) __riscv_vloxseg8ei16_v_i32mf2(__VA_ARGS__)

#define	vloxseg8ei16_v_i32mf2_m(...) __riscv_vloxseg8ei16_v_i32mf2_tumu(__VA_ARGS__)

#define	vloxseg8ei16_v_i64m1(...) __riscv_vloxseg8ei16_v_i64m1(__VA_ARGS__)

#define	vloxseg8ei16_v_i64m1_m(...) __riscv_vloxseg8ei16_v_i64m1_tumu(__VA_ARGS__)

#define	vloxseg8ei16_v_i8m1(...) __riscv_vloxseg8ei16_v_i8m1(__VA_ARGS__)

#define	vloxseg8ei16_v_i8m1_m(...) __riscv_vloxseg8ei16_v_i8m1_tumu(__VA_ARGS__)

#define	vloxseg8ei16_v_i8mf2(...) __riscv_vloxseg8ei16_v_i8mf2(__VA_ARGS__)

#define	vloxseg8ei16_v_i8mf2_m(...) __riscv_vloxseg8ei16_v_i8mf2_tumu(__VA_ARGS__)

#define	vloxseg8ei16_v_i8mf4(...) __riscv_vloxseg8ei16_v_i8mf4(__VA_ARGS__)

#define	vloxseg8ei16_v_i8mf4_m(...) __riscv_vloxseg8ei16_v_i8mf4_tumu(__VA_ARGS__)

#define	vloxseg8ei16_v_i8mf8(...) __riscv_vloxseg8ei16_v_i8mf8(__VA_ARGS__)

#define	vloxseg8ei16_v_i8mf8_m(...) __riscv_vloxseg8ei16_v_i8mf8_tumu(__VA_ARGS__)

#define	vloxseg8ei16_v_u16m1(...) __riscv_vloxseg8ei16_v_u16m1(__VA_ARGS__)

#define	vloxseg8ei16_v_u16m1_m(...) __riscv_vloxseg8ei16_v_u16m1_tumu(__VA_ARGS__)

#define	vloxseg8ei16_v_u16mf2(...) __riscv_vloxseg8ei16_v_u16mf2(__VA_ARGS__)

#define	vloxseg8ei16_v_u16mf2_m(...) __riscv_vloxseg8ei16_v_u16mf2_tumu(__VA_ARGS__)

#define	vloxseg8ei16_v_u16mf4(...) __riscv_vloxseg8ei16_v_u16mf4(__VA_ARGS__)

#define	vloxseg8ei16_v_u16mf4_m(...) __riscv_vloxseg8ei16_v_u16mf4_tumu(__VA_ARGS__)

#define	vloxseg8ei16_v_u32m1(...) __riscv_vloxseg8ei16_v_u32m1(__VA_ARGS__)

#define	vloxseg8ei16_v_u32m1_m(...) __riscv_vloxseg8ei16_v_u32m1_tumu(__VA_ARGS__)

#define	vloxseg8ei16_v_u32mf2(...) __riscv_vloxseg8ei16_v_u32mf2(__VA_ARGS__)

#define	vloxseg8ei16_v_u32mf2_m(...) __riscv_vloxseg8ei16_v_u32mf2_tumu(__VA_ARGS__)

#define	vloxseg8ei16_v_u64m1(...) __riscv_vloxseg8ei16_v_u64m1(__VA_ARGS__)

#define	vloxseg8ei16_v_u64m1_m(...) __riscv_vloxseg8ei16_v_u64m1_tumu(__VA_ARGS__)

#define	vloxseg8ei16_v_u8m1(...) __riscv_vloxseg8ei16_v_u8m1(__VA_ARGS__)

#define	vloxseg8ei16_v_u8m1_m(...) __riscv_vloxseg8ei16_v_u8m1_tumu(__VA_ARGS__)

#define	vloxseg8ei16_v_u8mf2(...) __riscv_vloxseg8ei16_v_u8mf2(__VA_ARGS__)

#define	vloxseg8ei16_v_u8mf2_m(...) __riscv_vloxseg8ei16_v_u8mf2_tumu(__VA_ARGS__)

#define	vloxseg8ei16_v_u8mf4(...) __riscv_vloxseg8ei16_v_u8mf4(__VA_ARGS__)

#define	vloxseg8ei16_v_u8mf4_m(...) __riscv_vloxseg8ei16_v_u8mf4_tumu(__VA_ARGS__)

#define	vloxseg8ei16_v_u8mf8(...) __riscv_vloxseg8ei16_v_u8mf8(__VA_ARGS__)

#define	vloxseg8ei16_v_u8mf8_m(...) __riscv_vloxseg8ei16_v_u8mf8_tumu(__VA_ARGS__)

#define	vloxseg8ei32_v_f16m1(...) __riscv_vloxseg8ei32_v_f16m1(__VA_ARGS__)

#define	vloxseg8ei32_v_f16m1_m(...) __riscv_vloxseg8ei32_v_f16m1_tumu(__VA_ARGS__)

#define	vloxseg8ei32_v_f16mf2(...) __riscv_vloxseg8ei32_v_f16mf2(__VA_ARGS__)

#define	vloxseg8ei32_v_f16mf2_m(...) __riscv_vloxseg8ei32_v_f16mf2_tumu(__VA_ARGS__)

#define	vloxseg8ei32_v_f16mf4(...) __riscv_vloxseg8ei32_v_f16mf4(__VA_ARGS__)

#define	vloxseg8ei32_v_f16mf4_m(...) __riscv_vloxseg8ei32_v_f16mf4_tumu(__VA_ARGS__)

#define	vloxseg8ei32_v_f32m1(...) __riscv_vloxseg8ei32_v_f32m1(__VA_ARGS__)

#define	vloxseg8ei32_v_f32m1_m(...) __riscv_vloxseg8ei32_v_f32m1_tumu(__VA_ARGS__)

#define	vloxseg8ei32_v_f32mf2(...) __riscv_vloxseg8ei32_v_f32mf2(__VA_ARGS__)

#define	vloxseg8ei32_v_f32mf2_m(...) __riscv_vloxseg8ei32_v_f32mf2_tumu(__VA_ARGS__)

#define	vloxseg8ei32_v_f64m1(...) __riscv_vloxseg8ei32_v_f64m1(__VA_ARGS__)

#define	vloxseg8ei32_v_f64m1_m(...) __riscv_vloxseg8ei32_v_f64m1_tumu(__VA_ARGS__)

#define	vloxseg8ei32_v_i16m1(...) __riscv_vloxseg8ei32_v_i16m1(__VA_ARGS__)

#define	vloxseg8ei32_v_i16m1_m(...) __riscv_vloxseg8ei32_v_i16m1_tumu(__VA_ARGS__)

#define	vloxseg8ei32_v_i16mf2(...) __riscv_vloxseg8ei32_v_i16mf2(__VA_ARGS__)

#define	vloxseg8ei32_v_i16mf2_m(...) __riscv_vloxseg8ei32_v_i16mf2_tumu(__VA_ARGS__)

#define	vloxseg8ei32_v_i16mf4(...) __riscv_vloxseg8ei32_v_i16mf4(__VA_ARGS__)

#define	vloxseg8ei32_v_i16mf4_m(...) __riscv_vloxseg8ei32_v_i16mf4_tumu(__VA_ARGS__)

#define	vloxseg8ei32_v_i32m1(...) __riscv_vloxseg8ei32_v_i32m1(__VA_ARGS__)

#define	vloxseg8ei32_v_i32m1_m(...) __riscv_vloxseg8ei32_v_i32m1_tumu(__VA_ARGS__)

#define	vloxseg8ei32_v_i32mf2(...) __riscv_vloxseg8ei32_v_i32mf2(__VA_ARGS__)

#define	vloxseg8ei32_v_i32mf2_m(...) __riscv_vloxseg8ei32_v_i32mf2_tumu(__VA_ARGS__)

#define	vloxseg8ei32_v_i64m1(...) __riscv_vloxseg8ei32_v_i64m1(__VA_ARGS__)

#define	vloxseg8ei32_v_i64m1_m(...) __riscv_vloxseg8ei32_v_i64m1_tumu(__VA_ARGS__)

#define	vloxseg8ei32_v_i8m1(...) __riscv_vloxseg8ei32_v_i8m1(__VA_ARGS__)

#define	vloxseg8ei32_v_i8m1_m(...) __riscv_vloxseg8ei32_v_i8m1_tumu(__VA_ARGS__)

#define	vloxseg8ei32_v_i8mf2(...) __riscv_vloxseg8ei32_v_i8mf2(__VA_ARGS__)

#define	vloxseg8ei32_v_i8mf2_m(...) __riscv_vloxseg8ei32_v_i8mf2_tumu(__VA_ARGS__)

#define	vloxseg8ei32_v_i8mf4(...) __riscv_vloxseg8ei32_v_i8mf4(__VA_ARGS__)

#define	vloxseg8ei32_v_i8mf4_m(...) __riscv_vloxseg8ei32_v_i8mf4_tumu(__VA_ARGS__)

#define	vloxseg8ei32_v_i8mf8(...) __riscv_vloxseg8ei32_v_i8mf8(__VA_ARGS__)

#define	vloxseg8ei32_v_i8mf8_m(...) __riscv_vloxseg8ei32_v_i8mf8_tumu(__VA_ARGS__)

#define	vloxseg8ei32_v_u16m1(...) __riscv_vloxseg8ei32_v_u16m1(__VA_ARGS__)

#define	vloxseg8ei32_v_u16m1_m(...) __riscv_vloxseg8ei32_v_u16m1_tumu(__VA_ARGS__)

#define	vloxseg8ei32_v_u16mf2(...) __riscv_vloxseg8ei32_v_u16mf2(__VA_ARGS__)

#define	vloxseg8ei32_v_u16mf2_m(...) __riscv_vloxseg8ei32_v_u16mf2_tumu(__VA_ARGS__)

#define	vloxseg8ei32_v_u16mf4(...) __riscv_vloxseg8ei32_v_u16mf4(__VA_ARGS__)

#define	vloxseg8ei32_v_u16mf4_m(...) __riscv_vloxseg8ei32_v_u16mf4_tumu(__VA_ARGS__)

#define	vloxseg8ei32_v_u32m1(...) __riscv_vloxseg8ei32_v_u32m1(__VA_ARGS__)

#define	vloxseg8ei32_v_u32m1_m(...) __riscv_vloxseg8ei32_v_u32m1_tumu(__VA_ARGS__)

#define	vloxseg8ei32_v_u32mf2(...) __riscv_vloxseg8ei32_v_u32mf2(__VA_ARGS__)

#define	vloxseg8ei32_v_u32mf2_m(...) __riscv_vloxseg8ei32_v_u32mf2_tumu(__VA_ARGS__)

#define	vloxseg8ei32_v_u64m1(...) __riscv_vloxseg8ei32_v_u64m1(__VA_ARGS__)

#define	vloxseg8ei32_v_u64m1_m(...) __riscv_vloxseg8ei32_v_u64m1_tumu(__VA_ARGS__)

#define	vloxseg8ei32_v_u8m1(...) __riscv_vloxseg8ei32_v_u8m1(__VA_ARGS__)

#define	vloxseg8ei32_v_u8m1_m(...) __riscv_vloxseg8ei32_v_u8m1_tumu(__VA_ARGS__)

#define	vloxseg8ei32_v_u8mf2(...) __riscv_vloxseg8ei32_v_u8mf2(__VA_ARGS__)

#define	vloxseg8ei32_v_u8mf2_m(...) __riscv_vloxseg8ei32_v_u8mf2_tumu(__VA_ARGS__)

#define	vloxseg8ei32_v_u8mf4(...) __riscv_vloxseg8ei32_v_u8mf4(__VA_ARGS__)

#define	vloxseg8ei32_v_u8mf4_m(...) __riscv_vloxseg8ei32_v_u8mf4_tumu(__VA_ARGS__)

#define	vloxseg8ei32_v_u8mf8(...) __riscv_vloxseg8ei32_v_u8mf8(__VA_ARGS__)

#define	vloxseg8ei32_v_u8mf8_m(...) __riscv_vloxseg8ei32_v_u8mf8_tumu(__VA_ARGS__)

#define	vloxseg8ei64_v_f16m1(...) __riscv_vloxseg8ei64_v_f16m1(__VA_ARGS__)

#define	vloxseg8ei64_v_f16m1_m(...) __riscv_vloxseg8ei64_v_f16m1_tumu(__VA_ARGS__)

#define	vloxseg8ei64_v_f16mf2(...) __riscv_vloxseg8ei64_v_f16mf2(__VA_ARGS__)

#define	vloxseg8ei64_v_f16mf2_m(...) __riscv_vloxseg8ei64_v_f16mf2_tumu(__VA_ARGS__)

#define	vloxseg8ei64_v_f16mf4(...) __riscv_vloxseg8ei64_v_f16mf4(__VA_ARGS__)

#define	vloxseg8ei64_v_f16mf4_m(...) __riscv_vloxseg8ei64_v_f16mf4_tumu(__VA_ARGS__)

#define	vloxseg8ei64_v_f32m1(...) __riscv_vloxseg8ei64_v_f32m1(__VA_ARGS__)

#define	vloxseg8ei64_v_f32m1_m(...) __riscv_vloxseg8ei64_v_f32m1_tumu(__VA_ARGS__)

#define	vloxseg8ei64_v_f32mf2(...) __riscv_vloxseg8ei64_v_f32mf2(__VA_ARGS__)

#define	vloxseg8ei64_v_f32mf2_m(...) __riscv_vloxseg8ei64_v_f32mf2_tumu(__VA_ARGS__)

#define	vloxseg8ei64_v_f64m1(...) __riscv_vloxseg8ei64_v_f64m1(__VA_ARGS__)

#define	vloxseg8ei64_v_f64m1_m(...) __riscv_vloxseg8ei64_v_f64m1_tumu(__VA_ARGS__)

#define	vloxseg8ei64_v_i16m1(...) __riscv_vloxseg8ei64_v_i16m1(__VA_ARGS__)

#define	vloxseg8ei64_v_i16m1_m(...) __riscv_vloxseg8ei64_v_i16m1_tumu(__VA_ARGS__)

#define	vloxseg8ei64_v_i16mf2(...) __riscv_vloxseg8ei64_v_i16mf2(__VA_ARGS__)

#define	vloxseg8ei64_v_i16mf2_m(...) __riscv_vloxseg8ei64_v_i16mf2_tumu(__VA_ARGS__)

#define	vloxseg8ei64_v_i16mf4(...) __riscv_vloxseg8ei64_v_i16mf4(__VA_ARGS__)

#define	vloxseg8ei64_v_i16mf4_m(...) __riscv_vloxseg8ei64_v_i16mf4_tumu(__VA_ARGS__)

#define	vloxseg8ei64_v_i32m1(...) __riscv_vloxseg8ei64_v_i32m1(__VA_ARGS__)

#define	vloxseg8ei64_v_i32m1_m(...) __riscv_vloxseg8ei64_v_i32m1_tumu(__VA_ARGS__)

#define	vloxseg8ei64_v_i32mf2(...) __riscv_vloxseg8ei64_v_i32mf2(__VA_ARGS__)

#define	vloxseg8ei64_v_i32mf2_m(...) __riscv_vloxseg8ei64_v_i32mf2_tumu(__VA_ARGS__)

#define	vloxseg8ei64_v_i64m1(...) __riscv_vloxseg8ei64_v_i64m1(__VA_ARGS__)

#define	vloxseg8ei64_v_i64m1_m(...) __riscv_vloxseg8ei64_v_i64m1_tumu(__VA_ARGS__)

#define	vloxseg8ei64_v_i8m1(...) __riscv_vloxseg8ei64_v_i8m1(__VA_ARGS__)

#define	vloxseg8ei64_v_i8m1_m(...) __riscv_vloxseg8ei64_v_i8m1_tumu(__VA_ARGS__)

#define	vloxseg8ei64_v_i8mf2(...) __riscv_vloxseg8ei64_v_i8mf2(__VA_ARGS__)

#define	vloxseg8ei64_v_i8mf2_m(...) __riscv_vloxseg8ei64_v_i8mf2_tumu(__VA_ARGS__)

#define	vloxseg8ei64_v_i8mf4(...) __riscv_vloxseg8ei64_v_i8mf4(__VA_ARGS__)

#define	vloxseg8ei64_v_i8mf4_m(...) __riscv_vloxseg8ei64_v_i8mf4_tumu(__VA_ARGS__)

#define	vloxseg8ei64_v_i8mf8(...) __riscv_vloxseg8ei64_v_i8mf8(__VA_ARGS__)

#define	vloxseg8ei64_v_i8mf8_m(...) __riscv_vloxseg8ei64_v_i8mf8_tumu(__VA_ARGS__)

#define	vloxseg8ei64_v_u16m1(...) __riscv_vloxseg8ei64_v_u16m1(__VA_ARGS__)

#define	vloxseg8ei64_v_u16m1_m(...) __riscv_vloxseg8ei64_v_u16m1_tumu(__VA_ARGS__)

#define	vloxseg8ei64_v_u16mf2(...) __riscv_vloxseg8ei64_v_u16mf2(__VA_ARGS__)

#define	vloxseg8ei64_v_u16mf2_m(...) __riscv_vloxseg8ei64_v_u16mf2_tumu(__VA_ARGS__)

#define	vloxseg8ei64_v_u16mf4(...) __riscv_vloxseg8ei64_v_u16mf4(__VA_ARGS__)

#define	vloxseg8ei64_v_u16mf4_m(...) __riscv_vloxseg8ei64_v_u16mf4_tumu(__VA_ARGS__)

#define	vloxseg8ei64_v_u32m1(...) __riscv_vloxseg8ei64_v_u32m1(__VA_ARGS__)

#define	vloxseg8ei64_v_u32m1_m(...) __riscv_vloxseg8ei64_v_u32m1_tumu(__VA_ARGS__)

#define	vloxseg8ei64_v_u32mf2(...) __riscv_vloxseg8ei64_v_u32mf2(__VA_ARGS__)

#define	vloxseg8ei64_v_u32mf2_m(...) __riscv_vloxseg8ei64_v_u32mf2_tumu(__VA_ARGS__)

#define	vloxseg8ei64_v_u64m1(...) __riscv_vloxseg8ei64_v_u64m1(__VA_ARGS__)

#define	vloxseg8ei64_v_u64m1_m(...) __riscv_vloxseg8ei64_v_u64m1_tumu(__VA_ARGS__)

#define	vloxseg8ei64_v_u8m1(...) __riscv_vloxseg8ei64_v_u8m1(__VA_ARGS__)

#define	vloxseg8ei64_v_u8m1_m(...) __riscv_vloxseg8ei64_v_u8m1_tumu(__VA_ARGS__)

#define	vloxseg8ei64_v_u8mf2(...) __riscv_vloxseg8ei64_v_u8mf2(__VA_ARGS__)

#define	vloxseg8ei64_v_u8mf2_m(...) __riscv_vloxseg8ei64_v_u8mf2_tumu(__VA_ARGS__)

#define	vloxseg8ei64_v_u8mf4(...) __riscv_vloxseg8ei64_v_u8mf4(__VA_ARGS__)

#define	vloxseg8ei64_v_u8mf4_m(...) __riscv_vloxseg8ei64_v_u8mf4_tumu(__VA_ARGS__)

#define	vloxseg8ei64_v_u8mf8(...) __riscv_vloxseg8ei64_v_u8mf8(__VA_ARGS__)

#define	vloxseg8ei64_v_u8mf8_m(...) __riscv_vloxseg8ei64_v_u8mf8_tumu(__VA_ARGS__)

#define	vloxseg8ei8_v_f16m1(...) __riscv_vloxseg8ei8_v_f16m1(__VA_ARGS__)

#define	vloxseg8ei8_v_f16m1_m(...) __riscv_vloxseg8ei8_v_f16m1_tumu(__VA_ARGS__)

#define	vloxseg8ei8_v_f16mf2(...) __riscv_vloxseg8ei8_v_f16mf2(__VA_ARGS__)

#define	vloxseg8ei8_v_f16mf2_m(...) __riscv_vloxseg8ei8_v_f16mf2_tumu(__VA_ARGS__)

#define	vloxseg8ei8_v_f16mf4(...) __riscv_vloxseg8ei8_v_f16mf4(__VA_ARGS__)

#define	vloxseg8ei8_v_f16mf4_m(...) __riscv_vloxseg8ei8_v_f16mf4_tumu(__VA_ARGS__)

#define	vloxseg8ei8_v_f32m1(...) __riscv_vloxseg8ei8_v_f32m1(__VA_ARGS__)

#define	vloxseg8ei8_v_f32m1_m(...) __riscv_vloxseg8ei8_v_f32m1_tumu(__VA_ARGS__)

#define	vloxseg8ei8_v_f32mf2(...) __riscv_vloxseg8ei8_v_f32mf2(__VA_ARGS__)

#define	vloxseg8ei8_v_f32mf2_m(...) __riscv_vloxseg8ei8_v_f32mf2_tumu(__VA_ARGS__)

#define	vloxseg8ei8_v_f64m1(...) __riscv_vloxseg8ei8_v_f64m1(__VA_ARGS__)

#define	vloxseg8ei8_v_f64m1_m(...) __riscv_vloxseg8ei8_v_f64m1_tumu(__VA_ARGS__)

#define	vloxseg8ei8_v_i16m1(...) __riscv_vloxseg8ei8_v_i16m1(__VA_ARGS__)

#define	vloxseg8ei8_v_i16m1_m(...) __riscv_vloxseg8ei8_v_i16m1_tumu(__VA_ARGS__)

#define	vloxseg8ei8_v_i16mf2(...) __riscv_vloxseg8ei8_v_i16mf2(__VA_ARGS__)

#define	vloxseg8ei8_v_i16mf2_m(...) __riscv_vloxseg8ei8_v_i16mf2_tumu(__VA_ARGS__)

#define	vloxseg8ei8_v_i16mf4(...) __riscv_vloxseg8ei8_v_i16mf4(__VA_ARGS__)

#define	vloxseg8ei8_v_i16mf4_m(...) __riscv_vloxseg8ei8_v_i16mf4_tumu(__VA_ARGS__)

#define	vloxseg8ei8_v_i32m1(...) __riscv_vloxseg8ei8_v_i32m1(__VA_ARGS__)

#define	vloxseg8ei8_v_i32m1_m(...) __riscv_vloxseg8ei8_v_i32m1_tumu(__VA_ARGS__)

#define	vloxseg8ei8_v_i32mf2(...) __riscv_vloxseg8ei8_v_i32mf2(__VA_ARGS__)

#define	vloxseg8ei8_v_i32mf2_m(...) __riscv_vloxseg8ei8_v_i32mf2_tumu(__VA_ARGS__)

#define	vloxseg8ei8_v_i64m1(...) __riscv_vloxseg8ei8_v_i64m1(__VA_ARGS__)

#define	vloxseg8ei8_v_i64m1_m(...) __riscv_vloxseg8ei8_v_i64m1_tumu(__VA_ARGS__)

#define	vloxseg8ei8_v_i8m1(...) __riscv_vloxseg8ei8_v_i8m1(__VA_ARGS__)

#define	vloxseg8ei8_v_i8m1_m(...) __riscv_vloxseg8ei8_v_i8m1_tumu(__VA_ARGS__)

#define	vloxseg8ei8_v_i8mf2(...) __riscv_vloxseg8ei8_v_i8mf2(__VA_ARGS__)

#define	vloxseg8ei8_v_i8mf2_m(...) __riscv_vloxseg8ei8_v_i8mf2_tumu(__VA_ARGS__)

#define	vloxseg8ei8_v_i8mf4(...) __riscv_vloxseg8ei8_v_i8mf4(__VA_ARGS__)

#define	vloxseg8ei8_v_i8mf4_m(...) __riscv_vloxseg8ei8_v_i8mf4_tumu(__VA_ARGS__)

#define	vloxseg8ei8_v_i8mf8(...) __riscv_vloxseg8ei8_v_i8mf8(__VA_ARGS__)

#define	vloxseg8ei8_v_i8mf8_m(...) __riscv_vloxseg8ei8_v_i8mf8_tumu(__VA_ARGS__)

#define	vloxseg8ei8_v_u16m1(...) __riscv_vloxseg8ei8_v_u16m1(__VA_ARGS__)

#define	vloxseg8ei8_v_u16m1_m(...) __riscv_vloxseg8ei8_v_u16m1_tumu(__VA_ARGS__)

#define	vloxseg8ei8_v_u16mf2(...) __riscv_vloxseg8ei8_v_u16mf2(__VA_ARGS__)

#define	vloxseg8ei8_v_u16mf2_m(...) __riscv_vloxseg8ei8_v_u16mf2_tumu(__VA_ARGS__)

#define	vloxseg8ei8_v_u16mf4(...) __riscv_vloxseg8ei8_v_u16mf4(__VA_ARGS__)

#define	vloxseg8ei8_v_u16mf4_m(...) __riscv_vloxseg8ei8_v_u16mf4_tumu(__VA_ARGS__)

#define	vloxseg8ei8_v_u32m1(...) __riscv_vloxseg8ei8_v_u32m1(__VA_ARGS__)

#define	vloxseg8ei8_v_u32m1_m(...) __riscv_vloxseg8ei8_v_u32m1_tumu(__VA_ARGS__)

#define	vloxseg8ei8_v_u32mf2(...) __riscv_vloxseg8ei8_v_u32mf2(__VA_ARGS__)

#define	vloxseg8ei8_v_u32mf2_m(...) __riscv_vloxseg8ei8_v_u32mf2_tumu(__VA_ARGS__)

#define	vloxseg8ei8_v_u64m1(...) __riscv_vloxseg8ei8_v_u64m1(__VA_ARGS__)

#define	vloxseg8ei8_v_u64m1_m(...) __riscv_vloxseg8ei8_v_u64m1_tumu(__VA_ARGS__)

#define	vloxseg8ei8_v_u8m1(...) __riscv_vloxseg8ei8_v_u8m1(__VA_ARGS__)

#define	vloxseg8ei8_v_u8m1_m(...) __riscv_vloxseg8ei8_v_u8m1_tumu(__VA_ARGS__)

#define	vloxseg8ei8_v_u8mf2(...) __riscv_vloxseg8ei8_v_u8mf2(__VA_ARGS__)

#define	vloxseg8ei8_v_u8mf2_m(...) __riscv_vloxseg8ei8_v_u8mf2_tumu(__VA_ARGS__)

#define	vloxseg8ei8_v_u8mf4(...) __riscv_vloxseg8ei8_v_u8mf4(__VA_ARGS__)

#define	vloxseg8ei8_v_u8mf4_m(...) __riscv_vloxseg8ei8_v_u8mf4_tumu(__VA_ARGS__)

#define	vloxseg8ei8_v_u8mf8(...) __riscv_vloxseg8ei8_v_u8mf8(__VA_ARGS__)

#define	vloxseg8ei8_v_u8mf8_m(...) __riscv_vloxseg8ei8_v_u8mf8_tumu(__VA_ARGS__)

#define	vlse16_v_f16m1(...) __riscv_vlse16_v_f16m1(__VA_ARGS__)

#define	vlse16_v_f16m1_m(...) __riscv_vlse16_v_f16m1_tumu(__VA_ARGS__)

#define	vlse16_v_f16m2(...) __riscv_vlse16_v_f16m2(__VA_ARGS__)

#define	vlse16_v_f16m2_m(...) __riscv_vlse16_v_f16m2_tumu(__VA_ARGS__)

#define	vlse16_v_f16m4(...) __riscv_vlse16_v_f16m4(__VA_ARGS__)

#define	vlse16_v_f16m4_m(...) __riscv_vlse16_v_f16m4_tumu(__VA_ARGS__)

#define	vlse16_v_f16m8(...) __riscv_vlse16_v_f16m8(__VA_ARGS__)

#define	vlse16_v_f16m8_m(...) __riscv_vlse16_v_f16m8_tumu(__VA_ARGS__)

#define	vlse16_v_f16mf2(...) __riscv_vlse16_v_f16mf2(__VA_ARGS__)

#define	vlse16_v_f16mf2_m(...) __riscv_vlse16_v_f16mf2_tumu(__VA_ARGS__)

#define	vlse16_v_f16mf4(...) __riscv_vlse16_v_f16mf4(__VA_ARGS__)

#define	vlse16_v_f16mf4_m(...) __riscv_vlse16_v_f16mf4_tumu(__VA_ARGS__)

#define	vlse16_v_i16m1(...) __riscv_vlse16_v_i16m1(__VA_ARGS__)

#define	vlse16_v_i16m1_m(...) __riscv_vlse16_v_i16m1_tumu(__VA_ARGS__)

#define	vlse16_v_i16m2(...) __riscv_vlse16_v_i16m2(__VA_ARGS__)

#define	vlse16_v_i16m2_m(...) __riscv_vlse16_v_i16m2_tumu(__VA_ARGS__)

#define	vlse16_v_i16m4(...) __riscv_vlse16_v_i16m4(__VA_ARGS__)

#define	vlse16_v_i16m4_m(...) __riscv_vlse16_v_i16m4_tumu(__VA_ARGS__)

#define	vlse16_v_i16m8(...) __riscv_vlse16_v_i16m8(__VA_ARGS__)

#define	vlse16_v_i16m8_m(...) __riscv_vlse16_v_i16m8_tumu(__VA_ARGS__)

#define	vlse16_v_i16mf2(...) __riscv_vlse16_v_i16mf2(__VA_ARGS__)

#define	vlse16_v_i16mf2_m(...) __riscv_vlse16_v_i16mf2_tumu(__VA_ARGS__)

#define	vlse16_v_i16mf4(...) __riscv_vlse16_v_i16mf4(__VA_ARGS__)

#define	vlse16_v_i16mf4_m(...) __riscv_vlse16_v_i16mf4_tumu(__VA_ARGS__)

#define	vlse16_v_u16m1(...) __riscv_vlse16_v_u16m1(__VA_ARGS__)

#define	vlse16_v_u16m1_m(...) __riscv_vlse16_v_u16m1_tumu(__VA_ARGS__)

#define	vlse16_v_u16m2(...) __riscv_vlse16_v_u16m2(__VA_ARGS__)

#define	vlse16_v_u16m2_m(...) __riscv_vlse16_v_u16m2_tumu(__VA_ARGS__)

#define	vlse16_v_u16m4(...) __riscv_vlse16_v_u16m4(__VA_ARGS__)

#define	vlse16_v_u16m4_m(...) __riscv_vlse16_v_u16m4_tumu(__VA_ARGS__)

#define	vlse16_v_u16m8(...) __riscv_vlse16_v_u16m8(__VA_ARGS__)

#define	vlse16_v_u16m8_m(...) __riscv_vlse16_v_u16m8_tumu(__VA_ARGS__)

#define	vlse16_v_u16mf2(...) __riscv_vlse16_v_u16mf2(__VA_ARGS__)

#define	vlse16_v_u16mf2_m(...) __riscv_vlse16_v_u16mf2_tumu(__VA_ARGS__)

#define	vlse16_v_u16mf4(...) __riscv_vlse16_v_u16mf4(__VA_ARGS__)

#define	vlse16_v_u16mf4_m(...) __riscv_vlse16_v_u16mf4_tumu(__VA_ARGS__)

#define	vlse32_v_f32m1(...) __riscv_vlse32_v_f32m1(__VA_ARGS__)

#define	vlse32_v_f32m1_m(...) __riscv_vlse32_v_f32m1_tumu(__VA_ARGS__)

#define	vlse32_v_f32m2(...) __riscv_vlse32_v_f32m2(__VA_ARGS__)

#define	vlse32_v_f32m2_m(...) __riscv_vlse32_v_f32m2_tumu(__VA_ARGS__)

#define	vlse32_v_f32m4(...) __riscv_vlse32_v_f32m4(__VA_ARGS__)

#define	vlse32_v_f32m4_m(...) __riscv_vlse32_v_f32m4_tumu(__VA_ARGS__)

#define	vlse32_v_f32m8(...) __riscv_vlse32_v_f32m8(__VA_ARGS__)

#define	vlse32_v_f32m8_m(...) __riscv_vlse32_v_f32m8_tumu(__VA_ARGS__)

#define	vlse32_v_f32mf2(...) __riscv_vlse32_v_f32mf2(__VA_ARGS__)

#define	vlse32_v_f32mf2_m(...) __riscv_vlse32_v_f32mf2_tumu(__VA_ARGS__)

#define	vlse32_v_i32m1(...) __riscv_vlse32_v_i32m1(__VA_ARGS__)

#define	vlse32_v_i32m1_m(...) __riscv_vlse32_v_i32m1_tumu(__VA_ARGS__)

#define	vlse32_v_i32m2(...) __riscv_vlse32_v_i32m2(__VA_ARGS__)

#define	vlse32_v_i32m2_m(...) __riscv_vlse32_v_i32m2_tumu(__VA_ARGS__)

#define	vlse32_v_i32m4(...) __riscv_vlse32_v_i32m4(__VA_ARGS__)

#define	vlse32_v_i32m4_m(...) __riscv_vlse32_v_i32m4_tumu(__VA_ARGS__)

#define	vlse32_v_i32m8(...) __riscv_vlse32_v_i32m8(__VA_ARGS__)

#define	vlse32_v_i32m8_m(...) __riscv_vlse32_v_i32m8_tumu(__VA_ARGS__)

#define	vlse32_v_i32mf2(...) __riscv_vlse32_v_i32mf2(__VA_ARGS__)

#define	vlse32_v_i32mf2_m(...) __riscv_vlse32_v_i32mf2_tumu(__VA_ARGS__)

#define	vlse32_v_u32m1(...) __riscv_vlse32_v_u32m1(__VA_ARGS__)

#define	vlse32_v_u32m1_m(...) __riscv_vlse32_v_u32m1_tumu(__VA_ARGS__)

#define	vlse32_v_u32m2(...) __riscv_vlse32_v_u32m2(__VA_ARGS__)

#define	vlse32_v_u32m2_m(...) __riscv_vlse32_v_u32m2_tumu(__VA_ARGS__)

#define	vlse32_v_u32m4(...) __riscv_vlse32_v_u32m4(__VA_ARGS__)

#define	vlse32_v_u32m4_m(...) __riscv_vlse32_v_u32m4_tumu(__VA_ARGS__)

#define	vlse32_v_u32m8(...) __riscv_vlse32_v_u32m8(__VA_ARGS__)

#define	vlse32_v_u32m8_m(...) __riscv_vlse32_v_u32m8_tumu(__VA_ARGS__)

#define	vlse32_v_u32mf2(...) __riscv_vlse32_v_u32mf2(__VA_ARGS__)

#define	vlse32_v_u32mf2_m(...) __riscv_vlse32_v_u32mf2_tumu(__VA_ARGS__)

#define	vlse64_v_f64m1(...) __riscv_vlse64_v_f64m1(__VA_ARGS__)

#define	vlse64_v_f64m1_m(...) __riscv_vlse64_v_f64m1_tumu(__VA_ARGS__)

#define	vlse64_v_f64m2(...) __riscv_vlse64_v_f64m2(__VA_ARGS__)

#define	vlse64_v_f64m2_m(...) __riscv_vlse64_v_f64m2_tumu(__VA_ARGS__)

#define	vlse64_v_f64m4(...) __riscv_vlse64_v_f64m4(__VA_ARGS__)

#define	vlse64_v_f64m4_m(...) __riscv_vlse64_v_f64m4_tumu(__VA_ARGS__)

#define	vlse64_v_f64m8(...) __riscv_vlse64_v_f64m8(__VA_ARGS__)

#define	vlse64_v_f64m8_m(...) __riscv_vlse64_v_f64m8_tumu(__VA_ARGS__)

#define	vlse64_v_i64m1(...) __riscv_vlse64_v_i64m1(__VA_ARGS__)

#define	vlse64_v_i64m1_m(...) __riscv_vlse64_v_i64m1_tumu(__VA_ARGS__)

#define	vlse64_v_i64m2(...) __riscv_vlse64_v_i64m2(__VA_ARGS__)

#define	vlse64_v_i64m2_m(...) __riscv_vlse64_v_i64m2_tumu(__VA_ARGS__)

#define	vlse64_v_i64m4(...) __riscv_vlse64_v_i64m4(__VA_ARGS__)

#define	vlse64_v_i64m4_m(...) __riscv_vlse64_v_i64m4_tumu(__VA_ARGS__)

#define	vlse64_v_i64m8(...) __riscv_vlse64_v_i64m8(__VA_ARGS__)

#define	vlse64_v_i64m8_m(...) __riscv_vlse64_v_i64m8_tumu(__VA_ARGS__)

#define	vlse64_v_u64m1(...) __riscv_vlse64_v_u64m1(__VA_ARGS__)

#define	vlse64_v_u64m1_m(...) __riscv_vlse64_v_u64m1_tumu(__VA_ARGS__)

#define	vlse64_v_u64m2(...) __riscv_vlse64_v_u64m2(__VA_ARGS__)

#define	vlse64_v_u64m2_m(...) __riscv_vlse64_v_u64m2_tumu(__VA_ARGS__)

#define	vlse64_v_u64m4(...) __riscv_vlse64_v_u64m4(__VA_ARGS__)

#define	vlse64_v_u64m4_m(...) __riscv_vlse64_v_u64m4_tumu(__VA_ARGS__)

#define	vlse64_v_u64m8(...) __riscv_vlse64_v_u64m8(__VA_ARGS__)

#define	vlse64_v_u64m8_m(...) __riscv_vlse64_v_u64m8_tumu(__VA_ARGS__)

#define	vlse8_v_i8m1(...) __riscv_vlse8_v_i8m1(__VA_ARGS__)

#define	vlse8_v_i8m1_m(...) __riscv_vlse8_v_i8m1_tumu(__VA_ARGS__)

#define	vlse8_v_i8m2(...) __riscv_vlse8_v_i8m2(__VA_ARGS__)

#define	vlse8_v_i8m2_m(...) __riscv_vlse8_v_i8m2_tumu(__VA_ARGS__)

#define	vlse8_v_i8m4(...) __riscv_vlse8_v_i8m4(__VA_ARGS__)

#define	vlse8_v_i8m4_m(...) __riscv_vlse8_v_i8m4_tumu(__VA_ARGS__)

#define	vlse8_v_i8m8(...) __riscv_vlse8_v_i8m8(__VA_ARGS__)

#define	vlse8_v_i8m8_m(...) __riscv_vlse8_v_i8m8_tumu(__VA_ARGS__)

#define	vlse8_v_i8mf2(...) __riscv_vlse8_v_i8mf2(__VA_ARGS__)

#define	vlse8_v_i8mf2_m(...) __riscv_vlse8_v_i8mf2_tumu(__VA_ARGS__)

#define	vlse8_v_i8mf4(...) __riscv_vlse8_v_i8mf4(__VA_ARGS__)

#define	vlse8_v_i8mf4_m(...) __riscv_vlse8_v_i8mf4_tumu(__VA_ARGS__)

#define	vlse8_v_i8mf8(...) __riscv_vlse8_v_i8mf8(__VA_ARGS__)

#define	vlse8_v_i8mf8_m(...) __riscv_vlse8_v_i8mf8_tumu(__VA_ARGS__)

#define	vlse8_v_u8m1(...) __riscv_vlse8_v_u8m1(__VA_ARGS__)

#define	vlse8_v_u8m1_m(...) __riscv_vlse8_v_u8m1_tumu(__VA_ARGS__)

#define	vlse8_v_u8m2(...) __riscv_vlse8_v_u8m2(__VA_ARGS__)

#define	vlse8_v_u8m2_m(...) __riscv_vlse8_v_u8m2_tumu(__VA_ARGS__)

#define	vlse8_v_u8m4(...) __riscv_vlse8_v_u8m4(__VA_ARGS__)

#define	vlse8_v_u8m4_m(...) __riscv_vlse8_v_u8m4_tumu(__VA_ARGS__)

#define	vlse8_v_u8m8(...) __riscv_vlse8_v_u8m8(__VA_ARGS__)

#define	vlse8_v_u8m8_m(...) __riscv_vlse8_v_u8m8_tumu(__VA_ARGS__)

#define	vlse8_v_u8mf2(...) __riscv_vlse8_v_u8mf2(__VA_ARGS__)

#define	vlse8_v_u8mf2_m(...) __riscv_vlse8_v_u8mf2_tumu(__VA_ARGS__)

#define	vlse8_v_u8mf4(...) __riscv_vlse8_v_u8mf4(__VA_ARGS__)

#define	vlse8_v_u8mf4_m(...) __riscv_vlse8_v_u8mf4_tumu(__VA_ARGS__)

#define	vlse8_v_u8mf8(...) __riscv_vlse8_v_u8mf8(__VA_ARGS__)

#define	vlse8_v_u8mf8_m(...) __riscv_vlse8_v_u8mf8_tumu(__VA_ARGS__)

#define	vlseg2e16_v_f16m1(...) __riscv_vlseg2e16_v_f16m1(__VA_ARGS__)

#define	vlseg2e16_v_f16m1_m(...) __riscv_vlseg2e16_v_f16m1_tumu(__VA_ARGS__)

#define	vlseg2e16_v_f16m2(...) __riscv_vlseg2e16_v_f16m2(__VA_ARGS__)

#define	vlseg2e16_v_f16m2_m(...) __riscv_vlseg2e16_v_f16m2_tumu(__VA_ARGS__)

#define	vlseg2e16_v_f16m4(...) __riscv_vlseg2e16_v_f16m4(__VA_ARGS__)

#define	vlseg2e16_v_f16m4_m(...) __riscv_vlseg2e16_v_f16m4_tumu(__VA_ARGS__)

#define	vlseg2e16_v_f16mf2(...) __riscv_vlseg2e16_v_f16mf2(__VA_ARGS__)

#define	vlseg2e16_v_f16mf2_m(...) __riscv_vlseg2e16_v_f16mf2_tumu(__VA_ARGS__)

#define	vlseg2e16_v_f16mf4(...) __riscv_vlseg2e16_v_f16mf4(__VA_ARGS__)

#define	vlseg2e16_v_f16mf4_m(...) __riscv_vlseg2e16_v_f16mf4_tumu(__VA_ARGS__)

#define	vlseg2e16_v_i16m1(...) __riscv_vlseg2e16_v_i16m1(__VA_ARGS__)

#define	vlseg2e16_v_i16m1_m(...) __riscv_vlseg2e16_v_i16m1_tumu(__VA_ARGS__)

#define	vlseg2e16_v_i16m2(...) __riscv_vlseg2e16_v_i16m2(__VA_ARGS__)

#define	vlseg2e16_v_i16m2_m(...) __riscv_vlseg2e16_v_i16m2_tumu(__VA_ARGS__)

#define	vlseg2e16_v_i16m4(...) __riscv_vlseg2e16_v_i16m4(__VA_ARGS__)

#define	vlseg2e16_v_i16m4_m(...) __riscv_vlseg2e16_v_i16m4_tumu(__VA_ARGS__)

#define	vlseg2e16_v_i16mf2(...) __riscv_vlseg2e16_v_i16mf2(__VA_ARGS__)

#define	vlseg2e16_v_i16mf2_m(...) __riscv_vlseg2e16_v_i16mf2_tumu(__VA_ARGS__)

#define	vlseg2e16_v_i16mf4(...) __riscv_vlseg2e16_v_i16mf4(__VA_ARGS__)

#define	vlseg2e16_v_i16mf4_m(...) __riscv_vlseg2e16_v_i16mf4_tumu(__VA_ARGS__)

#define	vlseg2e16_v_u16m1(...) __riscv_vlseg2e16_v_u16m1(__VA_ARGS__)

#define	vlseg2e16_v_u16m1_m(...) __riscv_vlseg2e16_v_u16m1_tumu(__VA_ARGS__)

#define	vlseg2e16_v_u16m2(...) __riscv_vlseg2e16_v_u16m2(__VA_ARGS__)

#define	vlseg2e16_v_u16m2_m(...) __riscv_vlseg2e16_v_u16m2_tumu(__VA_ARGS__)

#define	vlseg2e16_v_u16m4(...) __riscv_vlseg2e16_v_u16m4(__VA_ARGS__)

#define	vlseg2e16_v_u16m4_m(...) __riscv_vlseg2e16_v_u16m4_tumu(__VA_ARGS__)

#define	vlseg2e16_v_u16mf2(...) __riscv_vlseg2e16_v_u16mf2(__VA_ARGS__)

#define	vlseg2e16_v_u16mf2_m(...) __riscv_vlseg2e16_v_u16mf2_tumu(__VA_ARGS__)

#define	vlseg2e16_v_u16mf4(...) __riscv_vlseg2e16_v_u16mf4(__VA_ARGS__)

#define	vlseg2e16_v_u16mf4_m(...) __riscv_vlseg2e16_v_u16mf4_tumu(__VA_ARGS__)

#define	vlseg2e16ff_v_f16m1(...) __riscv_vlseg2e16ff_v_f16m1(__VA_ARGS__)

#define	vlseg2e16ff_v_f16m1_m(...) __riscv_vlseg2e16ff_v_f16m1_tumu(__VA_ARGS__)

#define	vlseg2e16ff_v_f16m2(...) __riscv_vlseg2e16ff_v_f16m2(__VA_ARGS__)

#define	vlseg2e16ff_v_f16m2_m(...) __riscv_vlseg2e16ff_v_f16m2_tumu(__VA_ARGS__)

#define	vlseg2e16ff_v_f16m4(...) __riscv_vlseg2e16ff_v_f16m4(__VA_ARGS__)

#define	vlseg2e16ff_v_f16m4_m(...) __riscv_vlseg2e16ff_v_f16m4_tumu(__VA_ARGS__)

#define	vlseg2e16ff_v_f16mf2(...) __riscv_vlseg2e16ff_v_f16mf2(__VA_ARGS__)

#define	vlseg2e16ff_v_f16mf2_m(...) __riscv_vlseg2e16ff_v_f16mf2_tumu(__VA_ARGS__)

#define	vlseg2e16ff_v_f16mf4(...) __riscv_vlseg2e16ff_v_f16mf4(__VA_ARGS__)

#define	vlseg2e16ff_v_f16mf4_m(...) __riscv_vlseg2e16ff_v_f16mf4_tumu(__VA_ARGS__)

#define	vlseg2e16ff_v_i16m1(...) __riscv_vlseg2e16ff_v_i16m1(__VA_ARGS__)

#define	vlseg2e16ff_v_i16m1_m(...) __riscv_vlseg2e16ff_v_i16m1_tumu(__VA_ARGS__)

#define	vlseg2e16ff_v_i16m2(...) __riscv_vlseg2e16ff_v_i16m2(__VA_ARGS__)

#define	vlseg2e16ff_v_i16m2_m(...) __riscv_vlseg2e16ff_v_i16m2_tumu(__VA_ARGS__)

#define	vlseg2e16ff_v_i16m4(...) __riscv_vlseg2e16ff_v_i16m4(__VA_ARGS__)

#define	vlseg2e16ff_v_i16m4_m(...) __riscv_vlseg2e16ff_v_i16m4_tumu(__VA_ARGS__)

#define	vlseg2e16ff_v_i16mf2(...) __riscv_vlseg2e16ff_v_i16mf2(__VA_ARGS__)

#define	vlseg2e16ff_v_i16mf2_m(...) __riscv_vlseg2e16ff_v_i16mf2_tumu(__VA_ARGS__)

#define	vlseg2e16ff_v_i16mf4(...) __riscv_vlseg2e16ff_v_i16mf4(__VA_ARGS__)

#define	vlseg2e16ff_v_i16mf4_m(...) __riscv_vlseg2e16ff_v_i16mf4_tumu(__VA_ARGS__)

#define	vlseg2e16ff_v_u16m1(...) __riscv_vlseg2e16ff_v_u16m1(__VA_ARGS__)

#define	vlseg2e16ff_v_u16m1_m(...) __riscv_vlseg2e16ff_v_u16m1_tumu(__VA_ARGS__)

#define	vlseg2e16ff_v_u16m2(...) __riscv_vlseg2e16ff_v_u16m2(__VA_ARGS__)

#define	vlseg2e16ff_v_u16m2_m(...) __riscv_vlseg2e16ff_v_u16m2_tumu(__VA_ARGS__)

#define	vlseg2e16ff_v_u16m4(...) __riscv_vlseg2e16ff_v_u16m4(__VA_ARGS__)

#define	vlseg2e16ff_v_u16m4_m(...) __riscv_vlseg2e16ff_v_u16m4_tumu(__VA_ARGS__)

#define	vlseg2e16ff_v_u16mf2(...) __riscv_vlseg2e16ff_v_u16mf2(__VA_ARGS__)

#define	vlseg2e16ff_v_u16mf2_m(...) __riscv_vlseg2e16ff_v_u16mf2_tumu(__VA_ARGS__)

#define	vlseg2e16ff_v_u16mf4(...) __riscv_vlseg2e16ff_v_u16mf4(__VA_ARGS__)

#define	vlseg2e16ff_v_u16mf4_m(...) __riscv_vlseg2e16ff_v_u16mf4_tumu(__VA_ARGS__)

#define	vlseg2e32_v_f32m1(...) __riscv_vlseg2e32_v_f32m1(__VA_ARGS__)

#define	vlseg2e32_v_f32m1_m(...) __riscv_vlseg2e32_v_f32m1_tumu(__VA_ARGS__)

#define	vlseg2e32_v_f32m2(...) __riscv_vlseg2e32_v_f32m2(__VA_ARGS__)

#define	vlseg2e32_v_f32m2_m(...) __riscv_vlseg2e32_v_f32m2_tumu(__VA_ARGS__)

#define	vlseg2e32_v_f32m4(...) __riscv_vlseg2e32_v_f32m4(__VA_ARGS__)

#define	vlseg2e32_v_f32m4_m(...) __riscv_vlseg2e32_v_f32m4_tumu(__VA_ARGS__)

#define	vlseg2e32_v_f32mf2(...) __riscv_vlseg2e32_v_f32mf2(__VA_ARGS__)

#define	vlseg2e32_v_f32mf2_m(...) __riscv_vlseg2e32_v_f32mf2_tumu(__VA_ARGS__)

#define	vlseg2e32_v_i32m1(...) __riscv_vlseg2e32_v_i32m1(__VA_ARGS__)

#define	vlseg2e32_v_i32m1_m(...) __riscv_vlseg2e32_v_i32m1_tumu(__VA_ARGS__)

#define	vlseg2e32_v_i32m2(...) __riscv_vlseg2e32_v_i32m2(__VA_ARGS__)

#define	vlseg2e32_v_i32m2_m(...) __riscv_vlseg2e32_v_i32m2_tumu(__VA_ARGS__)

#define	vlseg2e32_v_i32m4(...) __riscv_vlseg2e32_v_i32m4(__VA_ARGS__)

#define	vlseg2e32_v_i32m4_m(...) __riscv_vlseg2e32_v_i32m4_tumu(__VA_ARGS__)

#define	vlseg2e32_v_i32mf2(...) __riscv_vlseg2e32_v_i32mf2(__VA_ARGS__)

#define	vlseg2e32_v_i32mf2_m(...) __riscv_vlseg2e32_v_i32mf2_tumu(__VA_ARGS__)

#define	vlseg2e32_v_u32m1(...) __riscv_vlseg2e32_v_u32m1(__VA_ARGS__)

#define	vlseg2e32_v_u32m1_m(...) __riscv_vlseg2e32_v_u32m1_tumu(__VA_ARGS__)

#define	vlseg2e32_v_u32m2(...) __riscv_vlseg2e32_v_u32m2(__VA_ARGS__)

#define	vlseg2e32_v_u32m2_m(...) __riscv_vlseg2e32_v_u32m2_tumu(__VA_ARGS__)

#define	vlseg2e32_v_u32m4(...) __riscv_vlseg2e32_v_u32m4(__VA_ARGS__)

#define	vlseg2e32_v_u32m4_m(...) __riscv_vlseg2e32_v_u32m4_tumu(__VA_ARGS__)

#define	vlseg2e32_v_u32mf2(...) __riscv_vlseg2e32_v_u32mf2(__VA_ARGS__)

#define	vlseg2e32_v_u32mf2_m(...) __riscv_vlseg2e32_v_u32mf2_tumu(__VA_ARGS__)

#define	vlseg2e32ff_v_f32m1(...) __riscv_vlseg2e32ff_v_f32m1(__VA_ARGS__)

#define	vlseg2e32ff_v_f32m1_m(...) __riscv_vlseg2e32ff_v_f32m1_tumu(__VA_ARGS__)

#define	vlseg2e32ff_v_f32m2(...) __riscv_vlseg2e32ff_v_f32m2(__VA_ARGS__)

#define	vlseg2e32ff_v_f32m2_m(...) __riscv_vlseg2e32ff_v_f32m2_tumu(__VA_ARGS__)

#define	vlseg2e32ff_v_f32m4(...) __riscv_vlseg2e32ff_v_f32m4(__VA_ARGS__)

#define	vlseg2e32ff_v_f32m4_m(...) __riscv_vlseg2e32ff_v_f32m4_tumu(__VA_ARGS__)

#define	vlseg2e32ff_v_f32mf2(...) __riscv_vlseg2e32ff_v_f32mf2(__VA_ARGS__)

#define	vlseg2e32ff_v_f32mf2_m(...) __riscv_vlseg2e32ff_v_f32mf2_tumu(__VA_ARGS__)

#define	vlseg2e32ff_v_i32m1(...) __riscv_vlseg2e32ff_v_i32m1(__VA_ARGS__)

#define	vlseg2e32ff_v_i32m1_m(...) __riscv_vlseg2e32ff_v_i32m1_tumu(__VA_ARGS__)

#define	vlseg2e32ff_v_i32m2(...) __riscv_vlseg2e32ff_v_i32m2(__VA_ARGS__)

#define	vlseg2e32ff_v_i32m2_m(...) __riscv_vlseg2e32ff_v_i32m2_tumu(__VA_ARGS__)

#define	vlseg2e32ff_v_i32m4(...) __riscv_vlseg2e32ff_v_i32m4(__VA_ARGS__)

#define	vlseg2e32ff_v_i32m4_m(...) __riscv_vlseg2e32ff_v_i32m4_tumu(__VA_ARGS__)

#define	vlseg2e32ff_v_i32mf2(...) __riscv_vlseg2e32ff_v_i32mf2(__VA_ARGS__)

#define	vlseg2e32ff_v_i32mf2_m(...) __riscv_vlseg2e32ff_v_i32mf2_tumu(__VA_ARGS__)

#define	vlseg2e32ff_v_u32m1(...) __riscv_vlseg2e32ff_v_u32m1(__VA_ARGS__)

#define	vlseg2e32ff_v_u32m1_m(...) __riscv_vlseg2e32ff_v_u32m1_tumu(__VA_ARGS__)

#define	vlseg2e32ff_v_u32m2(...) __riscv_vlseg2e32ff_v_u32m2(__VA_ARGS__)

#define	vlseg2e32ff_v_u32m2_m(...) __riscv_vlseg2e32ff_v_u32m2_tumu(__VA_ARGS__)

#define	vlseg2e32ff_v_u32m4(...) __riscv_vlseg2e32ff_v_u32m4(__VA_ARGS__)

#define	vlseg2e32ff_v_u32m4_m(...) __riscv_vlseg2e32ff_v_u32m4_tumu(__VA_ARGS__)

#define	vlseg2e32ff_v_u32mf2(...) __riscv_vlseg2e32ff_v_u32mf2(__VA_ARGS__)

#define	vlseg2e32ff_v_u32mf2_m(...) __riscv_vlseg2e32ff_v_u32mf2_tumu(__VA_ARGS__)

#define	vlseg2e64_v_f64m1(...) __riscv_vlseg2e64_v_f64m1(__VA_ARGS__)

#define	vlseg2e64_v_f64m1_m(...) __riscv_vlseg2e64_v_f64m1_tumu(__VA_ARGS__)

#define	vlseg2e64_v_f64m2(...) __riscv_vlseg2e64_v_f64m2(__VA_ARGS__)

#define	vlseg2e64_v_f64m2_m(...) __riscv_vlseg2e64_v_f64m2_tumu(__VA_ARGS__)

#define	vlseg2e64_v_f64m4(...) __riscv_vlseg2e64_v_f64m4(__VA_ARGS__)

#define	vlseg2e64_v_f64m4_m(...) __riscv_vlseg2e64_v_f64m4_tumu(__VA_ARGS__)

#define	vlseg2e64_v_i64m1(...) __riscv_vlseg2e64_v_i64m1(__VA_ARGS__)

#define	vlseg2e64_v_i64m1_m(...) __riscv_vlseg2e64_v_i64m1_tumu(__VA_ARGS__)

#define	vlseg2e64_v_i64m2(...) __riscv_vlseg2e64_v_i64m2(__VA_ARGS__)

#define	vlseg2e64_v_i64m2_m(...) __riscv_vlseg2e64_v_i64m2_tumu(__VA_ARGS__)

#define	vlseg2e64_v_i64m4(...) __riscv_vlseg2e64_v_i64m4(__VA_ARGS__)

#define	vlseg2e64_v_i64m4_m(...) __riscv_vlseg2e64_v_i64m4_tumu(__VA_ARGS__)

#define	vlseg2e64_v_u64m1(...) __riscv_vlseg2e64_v_u64m1(__VA_ARGS__)

#define	vlseg2e64_v_u64m1_m(...) __riscv_vlseg2e64_v_u64m1_tumu(__VA_ARGS__)

#define	vlseg2e64_v_u64m2(...) __riscv_vlseg2e64_v_u64m2(__VA_ARGS__)

#define	vlseg2e64_v_u64m2_m(...) __riscv_vlseg2e64_v_u64m2_tumu(__VA_ARGS__)

#define	vlseg2e64_v_u64m4(...) __riscv_vlseg2e64_v_u64m4(__VA_ARGS__)

#define	vlseg2e64_v_u64m4_m(...) __riscv_vlseg2e64_v_u64m4_tumu(__VA_ARGS__)

#define	vlseg2e64ff_v_f64m1(...) __riscv_vlseg2e64ff_v_f64m1(__VA_ARGS__)

#define	vlseg2e64ff_v_f64m1_m(...) __riscv_vlseg2e64ff_v_f64m1_tumu(__VA_ARGS__)

#define	vlseg2e64ff_v_f64m2(...) __riscv_vlseg2e64ff_v_f64m2(__VA_ARGS__)

#define	vlseg2e64ff_v_f64m2_m(...) __riscv_vlseg2e64ff_v_f64m2_tumu(__VA_ARGS__)

#define	vlseg2e64ff_v_f64m4(...) __riscv_vlseg2e64ff_v_f64m4(__VA_ARGS__)

#define	vlseg2e64ff_v_f64m4_m(...) __riscv_vlseg2e64ff_v_f64m4_tumu(__VA_ARGS__)

#define	vlseg2e64ff_v_i64m1(...) __riscv_vlseg2e64ff_v_i64m1(__VA_ARGS__)

#define	vlseg2e64ff_v_i64m1_m(...) __riscv_vlseg2e64ff_v_i64m1_tumu(__VA_ARGS__)

#define	vlseg2e64ff_v_i64m2(...) __riscv_vlseg2e64ff_v_i64m2(__VA_ARGS__)

#define	vlseg2e64ff_v_i64m2_m(...) __riscv_vlseg2e64ff_v_i64m2_tumu(__VA_ARGS__)

#define	vlseg2e64ff_v_i64m4(...) __riscv_vlseg2e64ff_v_i64m4(__VA_ARGS__)

#define	vlseg2e64ff_v_i64m4_m(...) __riscv_vlseg2e64ff_v_i64m4_tumu(__VA_ARGS__)

#define	vlseg2e64ff_v_u64m1(...) __riscv_vlseg2e64ff_v_u64m1(__VA_ARGS__)

#define	vlseg2e64ff_v_u64m1_m(...) __riscv_vlseg2e64ff_v_u64m1_tumu(__VA_ARGS__)

#define	vlseg2e64ff_v_u64m2(...) __riscv_vlseg2e64ff_v_u64m2(__VA_ARGS__)

#define	vlseg2e64ff_v_u64m2_m(...) __riscv_vlseg2e64ff_v_u64m2_tumu(__VA_ARGS__)

#define	vlseg2e64ff_v_u64m4(...) __riscv_vlseg2e64ff_v_u64m4(__VA_ARGS__)

#define	vlseg2e64ff_v_u64m4_m(...) __riscv_vlseg2e64ff_v_u64m4_tumu(__VA_ARGS__)

#define	vlseg2e8_v_i8m1(...) __riscv_vlseg2e8_v_i8m1(__VA_ARGS__)

#define	vlseg2e8_v_i8m1_m(...) __riscv_vlseg2e8_v_i8m1_tumu(__VA_ARGS__)

#define	vlseg2e8_v_i8m2(...) __riscv_vlseg2e8_v_i8m2(__VA_ARGS__)

#define	vlseg2e8_v_i8m2_m(...) __riscv_vlseg2e8_v_i8m2_tumu(__VA_ARGS__)

#define	vlseg2e8_v_i8m4(...) __riscv_vlseg2e8_v_i8m4(__VA_ARGS__)

#define	vlseg2e8_v_i8m4_m(...) __riscv_vlseg2e8_v_i8m4_tumu(__VA_ARGS__)

#define	vlseg2e8_v_i8mf2(...) __riscv_vlseg2e8_v_i8mf2(__VA_ARGS__)

#define	vlseg2e8_v_i8mf2_m(...) __riscv_vlseg2e8_v_i8mf2_tumu(__VA_ARGS__)

#define	vlseg2e8_v_i8mf4(...) __riscv_vlseg2e8_v_i8mf4(__VA_ARGS__)

#define	vlseg2e8_v_i8mf4_m(...) __riscv_vlseg2e8_v_i8mf4_tumu(__VA_ARGS__)

#define	vlseg2e8_v_i8mf8(...) __riscv_vlseg2e8_v_i8mf8(__VA_ARGS__)

#define	vlseg2e8_v_i8mf8_m(...) __riscv_vlseg2e8_v_i8mf8_tumu(__VA_ARGS__)

#define	vlseg2e8_v_u8m1(...) __riscv_vlseg2e8_v_u8m1(__VA_ARGS__)

#define	vlseg2e8_v_u8m1_m(...) __riscv_vlseg2e8_v_u8m1_tumu(__VA_ARGS__)

#define	vlseg2e8_v_u8m2(...) __riscv_vlseg2e8_v_u8m2(__VA_ARGS__)

#define	vlseg2e8_v_u8m2_m(...) __riscv_vlseg2e8_v_u8m2_tumu(__VA_ARGS__)

#define	vlseg2e8_v_u8m4(...) __riscv_vlseg2e8_v_u8m4(__VA_ARGS__)

#define	vlseg2e8_v_u8m4_m(...) __riscv_vlseg2e8_v_u8m4_tumu(__VA_ARGS__)

#define	vlseg2e8_v_u8mf2(...) __riscv_vlseg2e8_v_u8mf2(__VA_ARGS__)

#define	vlseg2e8_v_u8mf2_m(...) __riscv_vlseg2e8_v_u8mf2_tumu(__VA_ARGS__)

#define	vlseg2e8_v_u8mf4(...) __riscv_vlseg2e8_v_u8mf4(__VA_ARGS__)

#define	vlseg2e8_v_u8mf4_m(...) __riscv_vlseg2e8_v_u8mf4_tumu(__VA_ARGS__)

#define	vlseg2e8_v_u8mf8(...) __riscv_vlseg2e8_v_u8mf8(__VA_ARGS__)

#define	vlseg2e8_v_u8mf8_m(...) __riscv_vlseg2e8_v_u8mf8_tumu(__VA_ARGS__)

#define	vlseg2e8ff_v_i8m1(...) __riscv_vlseg2e8ff_v_i8m1(__VA_ARGS__)

#define	vlseg2e8ff_v_i8m1_m(...) __riscv_vlseg2e8ff_v_i8m1_tumu(__VA_ARGS__)

#define	vlseg2e8ff_v_i8m2(...) __riscv_vlseg2e8ff_v_i8m2(__VA_ARGS__)

#define	vlseg2e8ff_v_i8m2_m(...) __riscv_vlseg2e8ff_v_i8m2_tumu(__VA_ARGS__)

#define	vlseg2e8ff_v_i8m4(...) __riscv_vlseg2e8ff_v_i8m4(__VA_ARGS__)

#define	vlseg2e8ff_v_i8m4_m(...) __riscv_vlseg2e8ff_v_i8m4_tumu(__VA_ARGS__)

#define	vlseg2e8ff_v_i8mf2(...) __riscv_vlseg2e8ff_v_i8mf2(__VA_ARGS__)

#define	vlseg2e8ff_v_i8mf2_m(...) __riscv_vlseg2e8ff_v_i8mf2_tumu(__VA_ARGS__)

#define	vlseg2e8ff_v_i8mf4(...) __riscv_vlseg2e8ff_v_i8mf4(__VA_ARGS__)

#define	vlseg2e8ff_v_i8mf4_m(...) __riscv_vlseg2e8ff_v_i8mf4_tumu(__VA_ARGS__)

#define	vlseg2e8ff_v_i8mf8(...) __riscv_vlseg2e8ff_v_i8mf8(__VA_ARGS__)

#define	vlseg2e8ff_v_i8mf8_m(...) __riscv_vlseg2e8ff_v_i8mf8_tumu(__VA_ARGS__)

#define	vlseg2e8ff_v_u8m1(...) __riscv_vlseg2e8ff_v_u8m1(__VA_ARGS__)

#define	vlseg2e8ff_v_u8m1_m(...) __riscv_vlseg2e8ff_v_u8m1_tumu(__VA_ARGS__)

#define	vlseg2e8ff_v_u8m2(...) __riscv_vlseg2e8ff_v_u8m2(__VA_ARGS__)

#define	vlseg2e8ff_v_u8m2_m(...) __riscv_vlseg2e8ff_v_u8m2_tumu(__VA_ARGS__)

#define	vlseg2e8ff_v_u8m4(...) __riscv_vlseg2e8ff_v_u8m4(__VA_ARGS__)

#define	vlseg2e8ff_v_u8m4_m(...) __riscv_vlseg2e8ff_v_u8m4_tumu(__VA_ARGS__)

#define	vlseg2e8ff_v_u8mf2(...) __riscv_vlseg2e8ff_v_u8mf2(__VA_ARGS__)

#define	vlseg2e8ff_v_u8mf2_m(...) __riscv_vlseg2e8ff_v_u8mf2_tumu(__VA_ARGS__)

#define	vlseg2e8ff_v_u8mf4(...) __riscv_vlseg2e8ff_v_u8mf4(__VA_ARGS__)

#define	vlseg2e8ff_v_u8mf4_m(...) __riscv_vlseg2e8ff_v_u8mf4_tumu(__VA_ARGS__)

#define	vlseg2e8ff_v_u8mf8(...) __riscv_vlseg2e8ff_v_u8mf8(__VA_ARGS__)

#define	vlseg2e8ff_v_u8mf8_m(...) __riscv_vlseg2e8ff_v_u8mf8_tumu(__VA_ARGS__)

#define	vlseg3e16_v_f16m1(...) __riscv_vlseg3e16_v_f16m1(__VA_ARGS__)

#define	vlseg3e16_v_f16m1_m(...) __riscv_vlseg3e16_v_f16m1_tumu(__VA_ARGS__)

#define	vlseg3e16_v_f16m2(...) __riscv_vlseg3e16_v_f16m2(__VA_ARGS__)

#define	vlseg3e16_v_f16m2_m(...) __riscv_vlseg3e16_v_f16m2_tumu(__VA_ARGS__)

#define	vlseg3e16_v_f16mf2(...) __riscv_vlseg3e16_v_f16mf2(__VA_ARGS__)

#define	vlseg3e16_v_f16mf2_m(...) __riscv_vlseg3e16_v_f16mf2_tumu(__VA_ARGS__)

#define	vlseg3e16_v_f16mf4(...) __riscv_vlseg3e16_v_f16mf4(__VA_ARGS__)

#define	vlseg3e16_v_f16mf4_m(...) __riscv_vlseg3e16_v_f16mf4_tumu(__VA_ARGS__)

#define	vlseg3e16_v_i16m1(...) __riscv_vlseg3e16_v_i16m1(__VA_ARGS__)

#define	vlseg3e16_v_i16m1_m(...) __riscv_vlseg3e16_v_i16m1_tumu(__VA_ARGS__)

#define	vlseg3e16_v_i16m2(...) __riscv_vlseg3e16_v_i16m2(__VA_ARGS__)

#define	vlseg3e16_v_i16m2_m(...) __riscv_vlseg3e16_v_i16m2_tumu(__VA_ARGS__)

#define	vlseg3e16_v_i16mf2(...) __riscv_vlseg3e16_v_i16mf2(__VA_ARGS__)

#define	vlseg3e16_v_i16mf2_m(...) __riscv_vlseg3e16_v_i16mf2_tumu(__VA_ARGS__)

#define	vlseg3e16_v_i16mf4(...) __riscv_vlseg3e16_v_i16mf4(__VA_ARGS__)

#define	vlseg3e16_v_i16mf4_m(...) __riscv_vlseg3e16_v_i16mf4_tumu(__VA_ARGS__)

#define	vlseg3e16_v_u16m1(...) __riscv_vlseg3e16_v_u16m1(__VA_ARGS__)

#define	vlseg3e16_v_u16m1_m(...) __riscv_vlseg3e16_v_u16m1_tumu(__VA_ARGS__)

#define	vlseg3e16_v_u16m2(...) __riscv_vlseg3e16_v_u16m2(__VA_ARGS__)

#define	vlseg3e16_v_u16m2_m(...) __riscv_vlseg3e16_v_u16m2_tumu(__VA_ARGS__)

#define	vlseg3e16_v_u16mf2(...) __riscv_vlseg3e16_v_u16mf2(__VA_ARGS__)

#define	vlseg3e16_v_u16mf2_m(...) __riscv_vlseg3e16_v_u16mf2_tumu(__VA_ARGS__)

#define	vlseg3e16_v_u16mf4(...) __riscv_vlseg3e16_v_u16mf4(__VA_ARGS__)

#define	vlseg3e16_v_u16mf4_m(...) __riscv_vlseg3e16_v_u16mf4_tumu(__VA_ARGS__)

#define	vlseg3e16ff_v_f16m1(...) __riscv_vlseg3e16ff_v_f16m1(__VA_ARGS__)

#define	vlseg3e16ff_v_f16m1_m(...) __riscv_vlseg3e16ff_v_f16m1_tumu(__VA_ARGS__)

#define	vlseg3e16ff_v_f16m2(...) __riscv_vlseg3e16ff_v_f16m2(__VA_ARGS__)

#define	vlseg3e16ff_v_f16m2_m(...) __riscv_vlseg3e16ff_v_f16m2_tumu(__VA_ARGS__)

#define	vlseg3e16ff_v_f16mf2(...) __riscv_vlseg3e16ff_v_f16mf2(__VA_ARGS__)

#define	vlseg3e16ff_v_f16mf2_m(...) __riscv_vlseg3e16ff_v_f16mf2_tumu(__VA_ARGS__)

#define	vlseg3e16ff_v_f16mf4(...) __riscv_vlseg3e16ff_v_f16mf4(__VA_ARGS__)

#define	vlseg3e16ff_v_f16mf4_m(...) __riscv_vlseg3e16ff_v_f16mf4_tumu(__VA_ARGS__)

#define	vlseg3e16ff_v_i16m1(...) __riscv_vlseg3e16ff_v_i16m1(__VA_ARGS__)

#define	vlseg3e16ff_v_i16m1_m(...) __riscv_vlseg3e16ff_v_i16m1_tumu(__VA_ARGS__)

#define	vlseg3e16ff_v_i16m2(...) __riscv_vlseg3e16ff_v_i16m2(__VA_ARGS__)

#define	vlseg3e16ff_v_i16m2_m(...) __riscv_vlseg3e16ff_v_i16m2_tumu(__VA_ARGS__)

#define	vlseg3e16ff_v_i16mf2(...) __riscv_vlseg3e16ff_v_i16mf2(__VA_ARGS__)

#define	vlseg3e16ff_v_i16mf2_m(...) __riscv_vlseg3e16ff_v_i16mf2_tumu(__VA_ARGS__)

#define	vlseg3e16ff_v_i16mf4(...) __riscv_vlseg3e16ff_v_i16mf4(__VA_ARGS__)

#define	vlseg3e16ff_v_i16mf4_m(...) __riscv_vlseg3e16ff_v_i16mf4_tumu(__VA_ARGS__)

#define	vlseg3e16ff_v_u16m1(...) __riscv_vlseg3e16ff_v_u16m1(__VA_ARGS__)

#define	vlseg3e16ff_v_u16m1_m(...) __riscv_vlseg3e16ff_v_u16m1_tumu(__VA_ARGS__)

#define	vlseg3e16ff_v_u16m2(...) __riscv_vlseg3e16ff_v_u16m2(__VA_ARGS__)

#define	vlseg3e16ff_v_u16m2_m(...) __riscv_vlseg3e16ff_v_u16m2_tumu(__VA_ARGS__)

#define	vlseg3e16ff_v_u16mf2(...) __riscv_vlseg3e16ff_v_u16mf2(__VA_ARGS__)

#define	vlseg3e16ff_v_u16mf2_m(...) __riscv_vlseg3e16ff_v_u16mf2_tumu(__VA_ARGS__)

#define	vlseg3e16ff_v_u16mf4(...) __riscv_vlseg3e16ff_v_u16mf4(__VA_ARGS__)

#define	vlseg3e16ff_v_u16mf4_m(...) __riscv_vlseg3e16ff_v_u16mf4_tumu(__VA_ARGS__)

#define	vlseg3e32_v_f32m1(...) __riscv_vlseg3e32_v_f32m1(__VA_ARGS__)

#define	vlseg3e32_v_f32m1_m(...) __riscv_vlseg3e32_v_f32m1_tumu(__VA_ARGS__)

#define	vlseg3e32_v_f32m2(...) __riscv_vlseg3e32_v_f32m2(__VA_ARGS__)

#define	vlseg3e32_v_f32m2_m(...) __riscv_vlseg3e32_v_f32m2_tumu(__VA_ARGS__)

#define	vlseg3e32_v_f32mf2(...) __riscv_vlseg3e32_v_f32mf2(__VA_ARGS__)

#define	vlseg3e32_v_f32mf2_m(...) __riscv_vlseg3e32_v_f32mf2_tumu(__VA_ARGS__)

#define	vlseg3e32_v_i32m1(...) __riscv_vlseg3e32_v_i32m1(__VA_ARGS__)

#define	vlseg3e32_v_i32m1_m(...) __riscv_vlseg3e32_v_i32m1_tumu(__VA_ARGS__)

#define	vlseg3e32_v_i32m2(...) __riscv_vlseg3e32_v_i32m2(__VA_ARGS__)

#define	vlseg3e32_v_i32m2_m(...) __riscv_vlseg3e32_v_i32m2_tumu(__VA_ARGS__)

#define	vlseg3e32_v_i32mf2(...) __riscv_vlseg3e32_v_i32mf2(__VA_ARGS__)

#define	vlseg3e32_v_i32mf2_m(...) __riscv_vlseg3e32_v_i32mf2_tumu(__VA_ARGS__)

#define	vlseg3e32_v_u32m1(...) __riscv_vlseg3e32_v_u32m1(__VA_ARGS__)

#define	vlseg3e32_v_u32m1_m(...) __riscv_vlseg3e32_v_u32m1_tumu(__VA_ARGS__)

#define	vlseg3e32_v_u32m2(...) __riscv_vlseg3e32_v_u32m2(__VA_ARGS__)

#define	vlseg3e32_v_u32m2_m(...) __riscv_vlseg3e32_v_u32m2_tumu(__VA_ARGS__)

#define	vlseg3e32_v_u32mf2(...) __riscv_vlseg3e32_v_u32mf2(__VA_ARGS__)

#define	vlseg3e32_v_u32mf2_m(...) __riscv_vlseg3e32_v_u32mf2_tumu(__VA_ARGS__)

#define	vlseg3e32ff_v_f32m1(...) __riscv_vlseg3e32ff_v_f32m1(__VA_ARGS__)

#define	vlseg3e32ff_v_f32m1_m(...) __riscv_vlseg3e32ff_v_f32m1_tumu(__VA_ARGS__)

#define	vlseg3e32ff_v_f32m2(...) __riscv_vlseg3e32ff_v_f32m2(__VA_ARGS__)

#define	vlseg3e32ff_v_f32m2_m(...) __riscv_vlseg3e32ff_v_f32m2_tumu(__VA_ARGS__)

#define	vlseg3e32ff_v_f32mf2(...) __riscv_vlseg3e32ff_v_f32mf2(__VA_ARGS__)

#define	vlseg3e32ff_v_f32mf2_m(...) __riscv_vlseg3e32ff_v_f32mf2_tumu(__VA_ARGS__)

#define	vlseg3e32ff_v_i32m1(...) __riscv_vlseg3e32ff_v_i32m1(__VA_ARGS__)

#define	vlseg3e32ff_v_i32m1_m(...) __riscv_vlseg3e32ff_v_i32m1_tumu(__VA_ARGS__)

#define	vlseg3e32ff_v_i32m2(...) __riscv_vlseg3e32ff_v_i32m2(__VA_ARGS__)

#define	vlseg3e32ff_v_i32m2_m(...) __riscv_vlseg3e32ff_v_i32m2_tumu(__VA_ARGS__)

#define	vlseg3e32ff_v_i32mf2(...) __riscv_vlseg3e32ff_v_i32mf2(__VA_ARGS__)

#define	vlseg3e32ff_v_i32mf2_m(...) __riscv_vlseg3e32ff_v_i32mf2_tumu(__VA_ARGS__)

#define	vlseg3e32ff_v_u32m1(...) __riscv_vlseg3e32ff_v_u32m1(__VA_ARGS__)

#define	vlseg3e32ff_v_u32m1_m(...) __riscv_vlseg3e32ff_v_u32m1_tumu(__VA_ARGS__)

#define	vlseg3e32ff_v_u32m2(...) __riscv_vlseg3e32ff_v_u32m2(__VA_ARGS__)

#define	vlseg3e32ff_v_u32m2_m(...) __riscv_vlseg3e32ff_v_u32m2_tumu(__VA_ARGS__)

#define	vlseg3e32ff_v_u32mf2(...) __riscv_vlseg3e32ff_v_u32mf2(__VA_ARGS__)

#define	vlseg3e32ff_v_u32mf2_m(...) __riscv_vlseg3e32ff_v_u32mf2_tumu(__VA_ARGS__)

#define	vlseg3e64_v_f64m1(...) __riscv_vlseg3e64_v_f64m1(__VA_ARGS__)

#define	vlseg3e64_v_f64m1_m(...) __riscv_vlseg3e64_v_f64m1_tumu(__VA_ARGS__)

#define	vlseg3e64_v_f64m2(...) __riscv_vlseg3e64_v_f64m2(__VA_ARGS__)

#define	vlseg3e64_v_f64m2_m(...) __riscv_vlseg3e64_v_f64m2_tumu(__VA_ARGS__)

#define	vlseg3e64_v_i64m1(...) __riscv_vlseg3e64_v_i64m1(__VA_ARGS__)

#define	vlseg3e64_v_i64m1_m(...) __riscv_vlseg3e64_v_i64m1_tumu(__VA_ARGS__)

#define	vlseg3e64_v_i64m2(...) __riscv_vlseg3e64_v_i64m2(__VA_ARGS__)

#define	vlseg3e64_v_i64m2_m(...) __riscv_vlseg3e64_v_i64m2_tumu(__VA_ARGS__)

#define	vlseg3e64_v_u64m1(...) __riscv_vlseg3e64_v_u64m1(__VA_ARGS__)

#define	vlseg3e64_v_u64m1_m(...) __riscv_vlseg3e64_v_u64m1_tumu(__VA_ARGS__)

#define	vlseg3e64_v_u64m2(...) __riscv_vlseg3e64_v_u64m2(__VA_ARGS__)

#define	vlseg3e64_v_u64m2_m(...) __riscv_vlseg3e64_v_u64m2_tumu(__VA_ARGS__)

#define	vlseg3e64ff_v_f64m1(...) __riscv_vlseg3e64ff_v_f64m1(__VA_ARGS__)

#define	vlseg3e64ff_v_f64m1_m(...) __riscv_vlseg3e64ff_v_f64m1_tumu(__VA_ARGS__)

#define	vlseg3e64ff_v_f64m2(...) __riscv_vlseg3e64ff_v_f64m2(__VA_ARGS__)

#define	vlseg3e64ff_v_f64m2_m(...) __riscv_vlseg3e64ff_v_f64m2_tumu(__VA_ARGS__)

#define	vlseg3e64ff_v_i64m1(...) __riscv_vlseg3e64ff_v_i64m1(__VA_ARGS__)

#define	vlseg3e64ff_v_i64m1_m(...) __riscv_vlseg3e64ff_v_i64m1_tumu(__VA_ARGS__)

#define	vlseg3e64ff_v_i64m2(...) __riscv_vlseg3e64ff_v_i64m2(__VA_ARGS__)

#define	vlseg3e64ff_v_i64m2_m(...) __riscv_vlseg3e64ff_v_i64m2_tumu(__VA_ARGS__)

#define	vlseg3e64ff_v_u64m1(...) __riscv_vlseg3e64ff_v_u64m1(__VA_ARGS__)

#define	vlseg3e64ff_v_u64m1_m(...) __riscv_vlseg3e64ff_v_u64m1_tumu(__VA_ARGS__)

#define	vlseg3e64ff_v_u64m2(...) __riscv_vlseg3e64ff_v_u64m2(__VA_ARGS__)

#define	vlseg3e64ff_v_u64m2_m(...) __riscv_vlseg3e64ff_v_u64m2_tumu(__VA_ARGS__)

#define	vlseg3e8_v_i8m1(...) __riscv_vlseg3e8_v_i8m1(__VA_ARGS__)

#define	vlseg3e8_v_i8m1_m(...) __riscv_vlseg3e8_v_i8m1_tumu(__VA_ARGS__)

#define	vlseg3e8_v_i8m2(...) __riscv_vlseg3e8_v_i8m2(__VA_ARGS__)

#define	vlseg3e8_v_i8m2_m(...) __riscv_vlseg3e8_v_i8m2_tumu(__VA_ARGS__)

#define	vlseg3e8_v_i8mf2(...) __riscv_vlseg3e8_v_i8mf2(__VA_ARGS__)

#define	vlseg3e8_v_i8mf2_m(...) __riscv_vlseg3e8_v_i8mf2_tumu(__VA_ARGS__)

#define	vlseg3e8_v_i8mf4(...) __riscv_vlseg3e8_v_i8mf4(__VA_ARGS__)

#define	vlseg3e8_v_i8mf4_m(...) __riscv_vlseg3e8_v_i8mf4_tumu(__VA_ARGS__)

#define	vlseg3e8_v_i8mf8(...) __riscv_vlseg3e8_v_i8mf8(__VA_ARGS__)

#define	vlseg3e8_v_i8mf8_m(...) __riscv_vlseg3e8_v_i8mf8_tumu(__VA_ARGS__)

#define	vlseg3e8_v_u8m1(...) __riscv_vlseg3e8_v_u8m1(__VA_ARGS__)

#define	vlseg3e8_v_u8m1_m(...) __riscv_vlseg3e8_v_u8m1_tumu(__VA_ARGS__)

#define	vlseg3e8_v_u8m2(...) __riscv_vlseg3e8_v_u8m2(__VA_ARGS__)

#define	vlseg3e8_v_u8m2_m(...) __riscv_vlseg3e8_v_u8m2_tumu(__VA_ARGS__)

#define	vlseg3e8_v_u8mf2(...) __riscv_vlseg3e8_v_u8mf2(__VA_ARGS__)

#define	vlseg3e8_v_u8mf2_m(...) __riscv_vlseg3e8_v_u8mf2_tumu(__VA_ARGS__)

#define	vlseg3e8_v_u8mf4(...) __riscv_vlseg3e8_v_u8mf4(__VA_ARGS__)

#define	vlseg3e8_v_u8mf4_m(...) __riscv_vlseg3e8_v_u8mf4_tumu(__VA_ARGS__)

#define	vlseg3e8_v_u8mf8(...) __riscv_vlseg3e8_v_u8mf8(__VA_ARGS__)

#define	vlseg3e8_v_u8mf8_m(...) __riscv_vlseg3e8_v_u8mf8_tumu(__VA_ARGS__)

#define	vlseg3e8ff_v_i8m1(...) __riscv_vlseg3e8ff_v_i8m1(__VA_ARGS__)

#define	vlseg3e8ff_v_i8m1_m(...) __riscv_vlseg3e8ff_v_i8m1_tumu(__VA_ARGS__)

#define	vlseg3e8ff_v_i8m2(...) __riscv_vlseg3e8ff_v_i8m2(__VA_ARGS__)

#define	vlseg3e8ff_v_i8m2_m(...) __riscv_vlseg3e8ff_v_i8m2_tumu(__VA_ARGS__)

#define	vlseg3e8ff_v_i8mf2(...) __riscv_vlseg3e8ff_v_i8mf2(__VA_ARGS__)

#define	vlseg3e8ff_v_i8mf2_m(...) __riscv_vlseg3e8ff_v_i8mf2_tumu(__VA_ARGS__)

#define	vlseg3e8ff_v_i8mf4(...) __riscv_vlseg3e8ff_v_i8mf4(__VA_ARGS__)

#define	vlseg3e8ff_v_i8mf4_m(...) __riscv_vlseg3e8ff_v_i8mf4_tumu(__VA_ARGS__)

#define	vlseg3e8ff_v_i8mf8(...) __riscv_vlseg3e8ff_v_i8mf8(__VA_ARGS__)

#define	vlseg3e8ff_v_i8mf8_m(...) __riscv_vlseg3e8ff_v_i8mf8_tumu(__VA_ARGS__)

#define	vlseg3e8ff_v_u8m1(...) __riscv_vlseg3e8ff_v_u8m1(__VA_ARGS__)

#define	vlseg3e8ff_v_u8m1_m(...) __riscv_vlseg3e8ff_v_u8m1_tumu(__VA_ARGS__)

#define	vlseg3e8ff_v_u8m2(...) __riscv_vlseg3e8ff_v_u8m2(__VA_ARGS__)

#define	vlseg3e8ff_v_u8m2_m(...) __riscv_vlseg3e8ff_v_u8m2_tumu(__VA_ARGS__)

#define	vlseg3e8ff_v_u8mf2(...) __riscv_vlseg3e8ff_v_u8mf2(__VA_ARGS__)

#define	vlseg3e8ff_v_u8mf2_m(...) __riscv_vlseg3e8ff_v_u8mf2_tumu(__VA_ARGS__)

#define	vlseg3e8ff_v_u8mf4(...) __riscv_vlseg3e8ff_v_u8mf4(__VA_ARGS__)

#define	vlseg3e8ff_v_u8mf4_m(...) __riscv_vlseg3e8ff_v_u8mf4_tumu(__VA_ARGS__)

#define	vlseg3e8ff_v_u8mf8(...) __riscv_vlseg3e8ff_v_u8mf8(__VA_ARGS__)

#define	vlseg3e8ff_v_u8mf8_m(...) __riscv_vlseg3e8ff_v_u8mf8_tumu(__VA_ARGS__)

#define	vlseg4e16_v_f16m1(...) __riscv_vlseg4e16_v_f16m1(__VA_ARGS__)

#define	vlseg4e16_v_f16m1_m(...) __riscv_vlseg4e16_v_f16m1_tumu(__VA_ARGS__)

#define	vlseg4e16_v_f16m2(...) __riscv_vlseg4e16_v_f16m2(__VA_ARGS__)

#define	vlseg4e16_v_f16m2_m(...) __riscv_vlseg4e16_v_f16m2_tumu(__VA_ARGS__)

#define	vlseg4e16_v_f16mf2(...) __riscv_vlseg4e16_v_f16mf2(__VA_ARGS__)

#define	vlseg4e16_v_f16mf2_m(...) __riscv_vlseg4e16_v_f16mf2_tumu(__VA_ARGS__)

#define	vlseg4e16_v_f16mf4(...) __riscv_vlseg4e16_v_f16mf4(__VA_ARGS__)

#define	vlseg4e16_v_f16mf4_m(...) __riscv_vlseg4e16_v_f16mf4_tumu(__VA_ARGS__)

#define	vlseg4e16_v_i16m1(...) __riscv_vlseg4e16_v_i16m1(__VA_ARGS__)

#define	vlseg4e16_v_i16m1_m(...) __riscv_vlseg4e16_v_i16m1_tumu(__VA_ARGS__)

#define	vlseg4e16_v_i16m2(...) __riscv_vlseg4e16_v_i16m2(__VA_ARGS__)

#define	vlseg4e16_v_i16m2_m(...) __riscv_vlseg4e16_v_i16m2_tumu(__VA_ARGS__)

#define	vlseg4e16_v_i16mf2(...) __riscv_vlseg4e16_v_i16mf2(__VA_ARGS__)

#define	vlseg4e16_v_i16mf2_m(...) __riscv_vlseg4e16_v_i16mf2_tumu(__VA_ARGS__)

#define	vlseg4e16_v_i16mf4(...) __riscv_vlseg4e16_v_i16mf4(__VA_ARGS__)

#define	vlseg4e16_v_i16mf4_m(...) __riscv_vlseg4e16_v_i16mf4_tumu(__VA_ARGS__)

#define	vlseg4e16_v_u16m1(...) __riscv_vlseg4e16_v_u16m1(__VA_ARGS__)

#define	vlseg4e16_v_u16m1_m(...) __riscv_vlseg4e16_v_u16m1_tumu(__VA_ARGS__)

#define	vlseg4e16_v_u16m2(...) __riscv_vlseg4e16_v_u16m2(__VA_ARGS__)

#define	vlseg4e16_v_u16m2_m(...) __riscv_vlseg4e16_v_u16m2_tumu(__VA_ARGS__)

#define	vlseg4e16_v_u16mf2(...) __riscv_vlseg4e16_v_u16mf2(__VA_ARGS__)

#define	vlseg4e16_v_u16mf2_m(...) __riscv_vlseg4e16_v_u16mf2_tumu(__VA_ARGS__)

#define	vlseg4e16_v_u16mf4(...) __riscv_vlseg4e16_v_u16mf4(__VA_ARGS__)

#define	vlseg4e16_v_u16mf4_m(...) __riscv_vlseg4e16_v_u16mf4_tumu(__VA_ARGS__)

#define	vlseg4e16ff_v_f16m1(...) __riscv_vlseg4e16ff_v_f16m1(__VA_ARGS__)

#define	vlseg4e16ff_v_f16m1_m(...) __riscv_vlseg4e16ff_v_f16m1_tumu(__VA_ARGS__)

#define	vlseg4e16ff_v_f16m2(...) __riscv_vlseg4e16ff_v_f16m2(__VA_ARGS__)

#define	vlseg4e16ff_v_f16m2_m(...) __riscv_vlseg4e16ff_v_f16m2_tumu(__VA_ARGS__)

#define	vlseg4e16ff_v_f16mf2(...) __riscv_vlseg4e16ff_v_f16mf2(__VA_ARGS__)

#define	vlseg4e16ff_v_f16mf2_m(...) __riscv_vlseg4e16ff_v_f16mf2_tumu(__VA_ARGS__)

#define	vlseg4e16ff_v_f16mf4(...) __riscv_vlseg4e16ff_v_f16mf4(__VA_ARGS__)

#define	vlseg4e16ff_v_f16mf4_m(...) __riscv_vlseg4e16ff_v_f16mf4_tumu(__VA_ARGS__)

#define	vlseg4e16ff_v_i16m1(...) __riscv_vlseg4e16ff_v_i16m1(__VA_ARGS__)

#define	vlseg4e16ff_v_i16m1_m(...) __riscv_vlseg4e16ff_v_i16m1_tumu(__VA_ARGS__)

#define	vlseg4e16ff_v_i16m2(...) __riscv_vlseg4e16ff_v_i16m2(__VA_ARGS__)

#define	vlseg4e16ff_v_i16m2_m(...) __riscv_vlseg4e16ff_v_i16m2_tumu(__VA_ARGS__)

#define	vlseg4e16ff_v_i16mf2(...) __riscv_vlseg4e16ff_v_i16mf2(__VA_ARGS__)

#define	vlseg4e16ff_v_i16mf2_m(...) __riscv_vlseg4e16ff_v_i16mf2_tumu(__VA_ARGS__)

#define	vlseg4e16ff_v_i16mf4(...) __riscv_vlseg4e16ff_v_i16mf4(__VA_ARGS__)

#define	vlseg4e16ff_v_i16mf4_m(...) __riscv_vlseg4e16ff_v_i16mf4_tumu(__VA_ARGS__)

#define	vlseg4e16ff_v_u16m1(...) __riscv_vlseg4e16ff_v_u16m1(__VA_ARGS__)

#define	vlseg4e16ff_v_u16m1_m(...) __riscv_vlseg4e16ff_v_u16m1_tumu(__VA_ARGS__)

#define	vlseg4e16ff_v_u16m2(...) __riscv_vlseg4e16ff_v_u16m2(__VA_ARGS__)

#define	vlseg4e16ff_v_u16m2_m(...) __riscv_vlseg4e16ff_v_u16m2_tumu(__VA_ARGS__)

#define	vlseg4e16ff_v_u16mf2(...) __riscv_vlseg4e16ff_v_u16mf2(__VA_ARGS__)

#define	vlseg4e16ff_v_u16mf2_m(...) __riscv_vlseg4e16ff_v_u16mf2_tumu(__VA_ARGS__)

#define	vlseg4e16ff_v_u16mf4(...) __riscv_vlseg4e16ff_v_u16mf4(__VA_ARGS__)

#define	vlseg4e16ff_v_u16mf4_m(...) __riscv_vlseg4e16ff_v_u16mf4_tumu(__VA_ARGS__)

#define	vlseg4e32_v_f32m1(...) __riscv_vlseg4e32_v_f32m1(__VA_ARGS__)

#define	vlseg4e32_v_f32m1_m(...) __riscv_vlseg4e32_v_f32m1_tumu(__VA_ARGS__)

#define	vlseg4e32_v_f32m2(...) __riscv_vlseg4e32_v_f32m2(__VA_ARGS__)

#define	vlseg4e32_v_f32m2_m(...) __riscv_vlseg4e32_v_f32m2_tumu(__VA_ARGS__)

#define	vlseg4e32_v_f32mf2(...) __riscv_vlseg4e32_v_f32mf2(__VA_ARGS__)

#define	vlseg4e32_v_f32mf2_m(...) __riscv_vlseg4e32_v_f32mf2_tumu(__VA_ARGS__)

#define	vlseg4e32_v_i32m1(...) __riscv_vlseg4e32_v_i32m1(__VA_ARGS__)

#define	vlseg4e32_v_i32m1_m(...) __riscv_vlseg4e32_v_i32m1_tumu(__VA_ARGS__)

#define	vlseg4e32_v_i32m2(...) __riscv_vlseg4e32_v_i32m2(__VA_ARGS__)

#define	vlseg4e32_v_i32m2_m(...) __riscv_vlseg4e32_v_i32m2_tumu(__VA_ARGS__)

#define	vlseg4e32_v_i32mf2(...) __riscv_vlseg4e32_v_i32mf2(__VA_ARGS__)

#define	vlseg4e32_v_i32mf2_m(...) __riscv_vlseg4e32_v_i32mf2_tumu(__VA_ARGS__)

#define	vlseg4e32_v_u32m1(...) __riscv_vlseg4e32_v_u32m1(__VA_ARGS__)

#define	vlseg4e32_v_u32m1_m(...) __riscv_vlseg4e32_v_u32m1_tumu(__VA_ARGS__)

#define	vlseg4e32_v_u32m2(...) __riscv_vlseg4e32_v_u32m2(__VA_ARGS__)

#define	vlseg4e32_v_u32m2_m(...) __riscv_vlseg4e32_v_u32m2_tumu(__VA_ARGS__)

#define	vlseg4e32_v_u32mf2(...) __riscv_vlseg4e32_v_u32mf2(__VA_ARGS__)

#define	vlseg4e32_v_u32mf2_m(...) __riscv_vlseg4e32_v_u32mf2_tumu(__VA_ARGS__)

#define	vlseg4e32ff_v_f32m1(...) __riscv_vlseg4e32ff_v_f32m1(__VA_ARGS__)

#define	vlseg4e32ff_v_f32m1_m(...) __riscv_vlseg4e32ff_v_f32m1_tumu(__VA_ARGS__)

#define	vlseg4e32ff_v_f32m2(...) __riscv_vlseg4e32ff_v_f32m2(__VA_ARGS__)

#define	vlseg4e32ff_v_f32m2_m(...) __riscv_vlseg4e32ff_v_f32m2_tumu(__VA_ARGS__)

#define	vlseg4e32ff_v_f32mf2(...) __riscv_vlseg4e32ff_v_f32mf2(__VA_ARGS__)

#define	vlseg4e32ff_v_f32mf2_m(...) __riscv_vlseg4e32ff_v_f32mf2_tumu(__VA_ARGS__)

#define	vlseg4e32ff_v_i32m1(...) __riscv_vlseg4e32ff_v_i32m1(__VA_ARGS__)

#define	vlseg4e32ff_v_i32m1_m(...) __riscv_vlseg4e32ff_v_i32m1_tumu(__VA_ARGS__)

#define	vlseg4e32ff_v_i32m2(...) __riscv_vlseg4e32ff_v_i32m2(__VA_ARGS__)

#define	vlseg4e32ff_v_i32m2_m(...) __riscv_vlseg4e32ff_v_i32m2_tumu(__VA_ARGS__)

#define	vlseg4e32ff_v_i32mf2(...) __riscv_vlseg4e32ff_v_i32mf2(__VA_ARGS__)

#define	vlseg4e32ff_v_i32mf2_m(...) __riscv_vlseg4e32ff_v_i32mf2_tumu(__VA_ARGS__)

#define	vlseg4e32ff_v_u32m1(...) __riscv_vlseg4e32ff_v_u32m1(__VA_ARGS__)

#define	vlseg4e32ff_v_u32m1_m(...) __riscv_vlseg4e32ff_v_u32m1_tumu(__VA_ARGS__)

#define	vlseg4e32ff_v_u32m2(...) __riscv_vlseg4e32ff_v_u32m2(__VA_ARGS__)

#define	vlseg4e32ff_v_u32m2_m(...) __riscv_vlseg4e32ff_v_u32m2_tumu(__VA_ARGS__)

#define	vlseg4e32ff_v_u32mf2(...) __riscv_vlseg4e32ff_v_u32mf2(__VA_ARGS__)

#define	vlseg4e32ff_v_u32mf2_m(...) __riscv_vlseg4e32ff_v_u32mf2_tumu(__VA_ARGS__)

#define	vlseg4e64_v_f64m1(...) __riscv_vlseg4e64_v_f64m1(__VA_ARGS__)

#define	vlseg4e64_v_f64m1_m(...) __riscv_vlseg4e64_v_f64m1_tumu(__VA_ARGS__)

#define	vlseg4e64_v_f64m2(...) __riscv_vlseg4e64_v_f64m2(__VA_ARGS__)

#define	vlseg4e64_v_f64m2_m(...) __riscv_vlseg4e64_v_f64m2_tumu(__VA_ARGS__)

#define	vlseg4e64_v_i64m1(...) __riscv_vlseg4e64_v_i64m1(__VA_ARGS__)

#define	vlseg4e64_v_i64m1_m(...) __riscv_vlseg4e64_v_i64m1_tumu(__VA_ARGS__)

#define	vlseg4e64_v_i64m2(...) __riscv_vlseg4e64_v_i64m2(__VA_ARGS__)

#define	vlseg4e64_v_i64m2_m(...) __riscv_vlseg4e64_v_i64m2_tumu(__VA_ARGS__)

#define	vlseg4e64_v_u64m1(...) __riscv_vlseg4e64_v_u64m1(__VA_ARGS__)

#define	vlseg4e64_v_u64m1_m(...) __riscv_vlseg4e64_v_u64m1_tumu(__VA_ARGS__)

#define	vlseg4e64_v_u64m2(...) __riscv_vlseg4e64_v_u64m2(__VA_ARGS__)

#define	vlseg4e64_v_u64m2_m(...) __riscv_vlseg4e64_v_u64m2_tumu(__VA_ARGS__)

#define	vlseg4e64ff_v_f64m1(...) __riscv_vlseg4e64ff_v_f64m1(__VA_ARGS__)

#define	vlseg4e64ff_v_f64m1_m(...) __riscv_vlseg4e64ff_v_f64m1_tumu(__VA_ARGS__)

#define	vlseg4e64ff_v_f64m2(...) __riscv_vlseg4e64ff_v_f64m2(__VA_ARGS__)

#define	vlseg4e64ff_v_f64m2_m(...) __riscv_vlseg4e64ff_v_f64m2_tumu(__VA_ARGS__)

#define	vlseg4e64ff_v_i64m1(...) __riscv_vlseg4e64ff_v_i64m1(__VA_ARGS__)

#define	vlseg4e64ff_v_i64m1_m(...) __riscv_vlseg4e64ff_v_i64m1_tumu(__VA_ARGS__)

#define	vlseg4e64ff_v_i64m2(...) __riscv_vlseg4e64ff_v_i64m2(__VA_ARGS__)

#define	vlseg4e64ff_v_i64m2_m(...) __riscv_vlseg4e64ff_v_i64m2_tumu(__VA_ARGS__)

#define	vlseg4e64ff_v_u64m1(...) __riscv_vlseg4e64ff_v_u64m1(__VA_ARGS__)

#define	vlseg4e64ff_v_u64m1_m(...) __riscv_vlseg4e64ff_v_u64m1_tumu(__VA_ARGS__)

#define	vlseg4e64ff_v_u64m2(...) __riscv_vlseg4e64ff_v_u64m2(__VA_ARGS__)

#define	vlseg4e64ff_v_u64m2_m(...) __riscv_vlseg4e64ff_v_u64m2_tumu(__VA_ARGS__)

#define	vlseg4e8_v_i8m1(...) __riscv_vlseg4e8_v_i8m1(__VA_ARGS__)

#define	vlseg4e8_v_i8m1_m(...) __riscv_vlseg4e8_v_i8m1_tumu(__VA_ARGS__)

#define	vlseg4e8_v_i8m2(...) __riscv_vlseg4e8_v_i8m2(__VA_ARGS__)

#define	vlseg4e8_v_i8m2_m(...) __riscv_vlseg4e8_v_i8m2_tumu(__VA_ARGS__)

#define	vlseg4e8_v_i8mf2(...) __riscv_vlseg4e8_v_i8mf2(__VA_ARGS__)

#define	vlseg4e8_v_i8mf2_m(...) __riscv_vlseg4e8_v_i8mf2_tumu(__VA_ARGS__)

#define	vlseg4e8_v_i8mf4(...) __riscv_vlseg4e8_v_i8mf4(__VA_ARGS__)

#define	vlseg4e8_v_i8mf4_m(...) __riscv_vlseg4e8_v_i8mf4_tumu(__VA_ARGS__)

#define	vlseg4e8_v_i8mf8(...) __riscv_vlseg4e8_v_i8mf8(__VA_ARGS__)

#define	vlseg4e8_v_i8mf8_m(...) __riscv_vlseg4e8_v_i8mf8_tumu(__VA_ARGS__)

#define	vlseg4e8_v_u8m1(...) __riscv_vlseg4e8_v_u8m1(__VA_ARGS__)

#define	vlseg4e8_v_u8m1_m(...) __riscv_vlseg4e8_v_u8m1_tumu(__VA_ARGS__)

#define	vlseg4e8_v_u8m2(...) __riscv_vlseg4e8_v_u8m2(__VA_ARGS__)

#define	vlseg4e8_v_u8m2_m(...) __riscv_vlseg4e8_v_u8m2_tumu(__VA_ARGS__)

#define	vlseg4e8_v_u8mf2(...) __riscv_vlseg4e8_v_u8mf2(__VA_ARGS__)

#define	vlseg4e8_v_u8mf2_m(...) __riscv_vlseg4e8_v_u8mf2_tumu(__VA_ARGS__)

#define	vlseg4e8_v_u8mf4(...) __riscv_vlseg4e8_v_u8mf4(__VA_ARGS__)

#define	vlseg4e8_v_u8mf4_m(...) __riscv_vlseg4e8_v_u8mf4_tumu(__VA_ARGS__)

#define	vlseg4e8_v_u8mf8(...) __riscv_vlseg4e8_v_u8mf8(__VA_ARGS__)

#define	vlseg4e8_v_u8mf8_m(...) __riscv_vlseg4e8_v_u8mf8_tumu(__VA_ARGS__)

#define	vlseg4e8ff_v_i8m1(...) __riscv_vlseg4e8ff_v_i8m1(__VA_ARGS__)

#define	vlseg4e8ff_v_i8m1_m(...) __riscv_vlseg4e8ff_v_i8m1_tumu(__VA_ARGS__)

#define	vlseg4e8ff_v_i8m2(...) __riscv_vlseg4e8ff_v_i8m2(__VA_ARGS__)

#define	vlseg4e8ff_v_i8m2_m(...) __riscv_vlseg4e8ff_v_i8m2_tumu(__VA_ARGS__)

#define	vlseg4e8ff_v_i8mf2(...) __riscv_vlseg4e8ff_v_i8mf2(__VA_ARGS__)

#define	vlseg4e8ff_v_i8mf2_m(...) __riscv_vlseg4e8ff_v_i8mf2_tumu(__VA_ARGS__)

#define	vlseg4e8ff_v_i8mf4(...) __riscv_vlseg4e8ff_v_i8mf4(__VA_ARGS__)

#define	vlseg4e8ff_v_i8mf4_m(...) __riscv_vlseg4e8ff_v_i8mf4_tumu(__VA_ARGS__)

#define	vlseg4e8ff_v_i8mf8(...) __riscv_vlseg4e8ff_v_i8mf8(__VA_ARGS__)

#define	vlseg4e8ff_v_i8mf8_m(...) __riscv_vlseg4e8ff_v_i8mf8_tumu(__VA_ARGS__)

#define	vlseg4e8ff_v_u8m1(...) __riscv_vlseg4e8ff_v_u8m1(__VA_ARGS__)

#define	vlseg4e8ff_v_u8m1_m(...) __riscv_vlseg4e8ff_v_u8m1_tumu(__VA_ARGS__)

#define	vlseg4e8ff_v_u8m2(...) __riscv_vlseg4e8ff_v_u8m2(__VA_ARGS__)

#define	vlseg4e8ff_v_u8m2_m(...) __riscv_vlseg4e8ff_v_u8m2_tumu(__VA_ARGS__)

#define	vlseg4e8ff_v_u8mf2(...) __riscv_vlseg4e8ff_v_u8mf2(__VA_ARGS__)

#define	vlseg4e8ff_v_u8mf2_m(...) __riscv_vlseg4e8ff_v_u8mf2_tumu(__VA_ARGS__)

#define	vlseg4e8ff_v_u8mf4(...) __riscv_vlseg4e8ff_v_u8mf4(__VA_ARGS__)

#define	vlseg4e8ff_v_u8mf4_m(...) __riscv_vlseg4e8ff_v_u8mf4_tumu(__VA_ARGS__)

#define	vlseg4e8ff_v_u8mf8(...) __riscv_vlseg4e8ff_v_u8mf8(__VA_ARGS__)

#define	vlseg4e8ff_v_u8mf8_m(...) __riscv_vlseg4e8ff_v_u8mf8_tumu(__VA_ARGS__)

#define	vlseg5e16_v_f16m1(...) __riscv_vlseg5e16_v_f16m1(__VA_ARGS__)

#define	vlseg5e16_v_f16m1_m(...) __riscv_vlseg5e16_v_f16m1_tumu(__VA_ARGS__)

#define	vlseg5e16_v_f16mf2(...) __riscv_vlseg5e16_v_f16mf2(__VA_ARGS__)

#define	vlseg5e16_v_f16mf2_m(...) __riscv_vlseg5e16_v_f16mf2_tumu(__VA_ARGS__)

#define	vlseg5e16_v_f16mf4(...) __riscv_vlseg5e16_v_f16mf4(__VA_ARGS__)

#define	vlseg5e16_v_f16mf4_m(...) __riscv_vlseg5e16_v_f16mf4_tumu(__VA_ARGS__)

#define	vlseg5e16_v_i16m1(...) __riscv_vlseg5e16_v_i16m1(__VA_ARGS__)

#define	vlseg5e16_v_i16m1_m(...) __riscv_vlseg5e16_v_i16m1_tumu(__VA_ARGS__)

#define	vlseg5e16_v_i16mf2(...) __riscv_vlseg5e16_v_i16mf2(__VA_ARGS__)

#define	vlseg5e16_v_i16mf2_m(...) __riscv_vlseg5e16_v_i16mf2_tumu(__VA_ARGS__)

#define	vlseg5e16_v_i16mf4(...) __riscv_vlseg5e16_v_i16mf4(__VA_ARGS__)

#define	vlseg5e16_v_i16mf4_m(...) __riscv_vlseg5e16_v_i16mf4_tumu(__VA_ARGS__)

#define	vlseg5e16_v_u16m1(...) __riscv_vlseg5e16_v_u16m1(__VA_ARGS__)

#define	vlseg5e16_v_u16m1_m(...) __riscv_vlseg5e16_v_u16m1_tumu(__VA_ARGS__)

#define	vlseg5e16_v_u16mf2(...) __riscv_vlseg5e16_v_u16mf2(__VA_ARGS__)

#define	vlseg5e16_v_u16mf2_m(...) __riscv_vlseg5e16_v_u16mf2_tumu(__VA_ARGS__)

#define	vlseg5e16_v_u16mf4(...) __riscv_vlseg5e16_v_u16mf4(__VA_ARGS__)

#define	vlseg5e16_v_u16mf4_m(...) __riscv_vlseg5e16_v_u16mf4_tumu(__VA_ARGS__)

#define	vlseg5e16ff_v_f16m1(...) __riscv_vlseg5e16ff_v_f16m1(__VA_ARGS__)

#define	vlseg5e16ff_v_f16m1_m(...) __riscv_vlseg5e16ff_v_f16m1_tumu(__VA_ARGS__)

#define	vlseg5e16ff_v_f16mf2(...) __riscv_vlseg5e16ff_v_f16mf2(__VA_ARGS__)

#define	vlseg5e16ff_v_f16mf2_m(...) __riscv_vlseg5e16ff_v_f16mf2_tumu(__VA_ARGS__)

#define	vlseg5e16ff_v_f16mf4(...) __riscv_vlseg5e16ff_v_f16mf4(__VA_ARGS__)

#define	vlseg5e16ff_v_f16mf4_m(...) __riscv_vlseg5e16ff_v_f16mf4_tumu(__VA_ARGS__)

#define	vlseg5e16ff_v_i16m1(...) __riscv_vlseg5e16ff_v_i16m1(__VA_ARGS__)

#define	vlseg5e16ff_v_i16m1_m(...) __riscv_vlseg5e16ff_v_i16m1_tumu(__VA_ARGS__)

#define	vlseg5e16ff_v_i16mf2(...) __riscv_vlseg5e16ff_v_i16mf2(__VA_ARGS__)

#define	vlseg5e16ff_v_i16mf2_m(...) __riscv_vlseg5e16ff_v_i16mf2_tumu(__VA_ARGS__)

#define	vlseg5e16ff_v_i16mf4(...) __riscv_vlseg5e16ff_v_i16mf4(__VA_ARGS__)

#define	vlseg5e16ff_v_i16mf4_m(...) __riscv_vlseg5e16ff_v_i16mf4_tumu(__VA_ARGS__)

#define	vlseg5e16ff_v_u16m1(...) __riscv_vlseg5e16ff_v_u16m1(__VA_ARGS__)

#define	vlseg5e16ff_v_u16m1_m(...) __riscv_vlseg5e16ff_v_u16m1_tumu(__VA_ARGS__)

#define	vlseg5e16ff_v_u16mf2(...) __riscv_vlseg5e16ff_v_u16mf2(__VA_ARGS__)

#define	vlseg5e16ff_v_u16mf2_m(...) __riscv_vlseg5e16ff_v_u16mf2_tumu(__VA_ARGS__)

#define	vlseg5e16ff_v_u16mf4(...) __riscv_vlseg5e16ff_v_u16mf4(__VA_ARGS__)

#define	vlseg5e16ff_v_u16mf4_m(...) __riscv_vlseg5e16ff_v_u16mf4_tumu(__VA_ARGS__)

#define	vlseg5e32_v_f32m1(...) __riscv_vlseg5e32_v_f32m1(__VA_ARGS__)

#define	vlseg5e32_v_f32m1_m(...) __riscv_vlseg5e32_v_f32m1_tumu(__VA_ARGS__)

#define	vlseg5e32_v_f32mf2(...) __riscv_vlseg5e32_v_f32mf2(__VA_ARGS__)

#define	vlseg5e32_v_f32mf2_m(...) __riscv_vlseg5e32_v_f32mf2_tumu(__VA_ARGS__)

#define	vlseg5e32_v_i32m1(...) __riscv_vlseg5e32_v_i32m1(__VA_ARGS__)

#define	vlseg5e32_v_i32m1_m(...) __riscv_vlseg5e32_v_i32m1_tumu(__VA_ARGS__)

#define	vlseg5e32_v_i32mf2(...) __riscv_vlseg5e32_v_i32mf2(__VA_ARGS__)

#define	vlseg5e32_v_i32mf2_m(...) __riscv_vlseg5e32_v_i32mf2_tumu(__VA_ARGS__)

#define	vlseg5e32_v_u32m1(...) __riscv_vlseg5e32_v_u32m1(__VA_ARGS__)

#define	vlseg5e32_v_u32m1_m(...) __riscv_vlseg5e32_v_u32m1_tumu(__VA_ARGS__)

#define	vlseg5e32_v_u32mf2(...) __riscv_vlseg5e32_v_u32mf2(__VA_ARGS__)

#define	vlseg5e32_v_u32mf2_m(...) __riscv_vlseg5e32_v_u32mf2_tumu(__VA_ARGS__)

#define	vlseg5e32ff_v_f32m1(...) __riscv_vlseg5e32ff_v_f32m1(__VA_ARGS__)

#define	vlseg5e32ff_v_f32m1_m(...) __riscv_vlseg5e32ff_v_f32m1_tumu(__VA_ARGS__)

#define	vlseg5e32ff_v_f32mf2(...) __riscv_vlseg5e32ff_v_f32mf2(__VA_ARGS__)

#define	vlseg5e32ff_v_f32mf2_m(...) __riscv_vlseg5e32ff_v_f32mf2_tumu(__VA_ARGS__)

#define	vlseg5e32ff_v_i32m1(...) __riscv_vlseg5e32ff_v_i32m1(__VA_ARGS__)

#define	vlseg5e32ff_v_i32m1_m(...) __riscv_vlseg5e32ff_v_i32m1_tumu(__VA_ARGS__)

#define	vlseg5e32ff_v_i32mf2(...) __riscv_vlseg5e32ff_v_i32mf2(__VA_ARGS__)

#define	vlseg5e32ff_v_i32mf2_m(...) __riscv_vlseg5e32ff_v_i32mf2_tumu(__VA_ARGS__)

#define	vlseg5e32ff_v_u32m1(...) __riscv_vlseg5e32ff_v_u32m1(__VA_ARGS__)

#define	vlseg5e32ff_v_u32m1_m(...) __riscv_vlseg5e32ff_v_u32m1_tumu(__VA_ARGS__)

#define	vlseg5e32ff_v_u32mf2(...) __riscv_vlseg5e32ff_v_u32mf2(__VA_ARGS__)

#define	vlseg5e32ff_v_u32mf2_m(...) __riscv_vlseg5e32ff_v_u32mf2_tumu(__VA_ARGS__)

#define	vlseg5e64_v_f64m1(...) __riscv_vlseg5e64_v_f64m1(__VA_ARGS__)

#define	vlseg5e64_v_f64m1_m(...) __riscv_vlseg5e64_v_f64m1_tumu(__VA_ARGS__)

#define	vlseg5e64_v_i64m1(...) __riscv_vlseg5e64_v_i64m1(__VA_ARGS__)

#define	vlseg5e64_v_i64m1_m(...) __riscv_vlseg5e64_v_i64m1_tumu(__VA_ARGS__)

#define	vlseg5e64_v_u64m1(...) __riscv_vlseg5e64_v_u64m1(__VA_ARGS__)

#define	vlseg5e64_v_u64m1_m(...) __riscv_vlseg5e64_v_u64m1_tumu(__VA_ARGS__)

#define	vlseg5e64ff_v_f64m1(...) __riscv_vlseg5e64ff_v_f64m1(__VA_ARGS__)

#define	vlseg5e64ff_v_f64m1_m(...) __riscv_vlseg5e64ff_v_f64m1_tumu(__VA_ARGS__)

#define	vlseg5e64ff_v_i64m1(...) __riscv_vlseg5e64ff_v_i64m1(__VA_ARGS__)

#define	vlseg5e64ff_v_i64m1_m(...) __riscv_vlseg5e64ff_v_i64m1_tumu(__VA_ARGS__)

#define	vlseg5e64ff_v_u64m1(...) __riscv_vlseg5e64ff_v_u64m1(__VA_ARGS__)

#define	vlseg5e64ff_v_u64m1_m(...) __riscv_vlseg5e64ff_v_u64m1_tumu(__VA_ARGS__)

#define	vlseg5e8_v_i8m1(...) __riscv_vlseg5e8_v_i8m1(__VA_ARGS__)

#define	vlseg5e8_v_i8m1_m(...) __riscv_vlseg5e8_v_i8m1_tumu(__VA_ARGS__)

#define	vlseg5e8_v_i8mf2(...) __riscv_vlseg5e8_v_i8mf2(__VA_ARGS__)

#define	vlseg5e8_v_i8mf2_m(...) __riscv_vlseg5e8_v_i8mf2_tumu(__VA_ARGS__)

#define	vlseg5e8_v_i8mf4(...) __riscv_vlseg5e8_v_i8mf4(__VA_ARGS__)

#define	vlseg5e8_v_i8mf4_m(...) __riscv_vlseg5e8_v_i8mf4_tumu(__VA_ARGS__)

#define	vlseg5e8_v_i8mf8(...) __riscv_vlseg5e8_v_i8mf8(__VA_ARGS__)

#define	vlseg5e8_v_i8mf8_m(...) __riscv_vlseg5e8_v_i8mf8_tumu(__VA_ARGS__)

#define	vlseg5e8_v_u8m1(...) __riscv_vlseg5e8_v_u8m1(__VA_ARGS__)

#define	vlseg5e8_v_u8m1_m(...) __riscv_vlseg5e8_v_u8m1_tumu(__VA_ARGS__)

#define	vlseg5e8_v_u8mf2(...) __riscv_vlseg5e8_v_u8mf2(__VA_ARGS__)

#define	vlseg5e8_v_u8mf2_m(...) __riscv_vlseg5e8_v_u8mf2_tumu(__VA_ARGS__)

#define	vlseg5e8_v_u8mf4(...) __riscv_vlseg5e8_v_u8mf4(__VA_ARGS__)

#define	vlseg5e8_v_u8mf4_m(...) __riscv_vlseg5e8_v_u8mf4_tumu(__VA_ARGS__)

#define	vlseg5e8_v_u8mf8(...) __riscv_vlseg5e8_v_u8mf8(__VA_ARGS__)

#define	vlseg5e8_v_u8mf8_m(...) __riscv_vlseg5e8_v_u8mf8_tumu(__VA_ARGS__)

#define	vlseg5e8ff_v_i8m1(...) __riscv_vlseg5e8ff_v_i8m1(__VA_ARGS__)

#define	vlseg5e8ff_v_i8m1_m(...) __riscv_vlseg5e8ff_v_i8m1_tumu(__VA_ARGS__)

#define	vlseg5e8ff_v_i8mf2(...) __riscv_vlseg5e8ff_v_i8mf2(__VA_ARGS__)

#define	vlseg5e8ff_v_i8mf2_m(...) __riscv_vlseg5e8ff_v_i8mf2_tumu(__VA_ARGS__)

#define	vlseg5e8ff_v_i8mf4(...) __riscv_vlseg5e8ff_v_i8mf4(__VA_ARGS__)

#define	vlseg5e8ff_v_i8mf4_m(...) __riscv_vlseg5e8ff_v_i8mf4_tumu(__VA_ARGS__)

#define	vlseg5e8ff_v_i8mf8(...) __riscv_vlseg5e8ff_v_i8mf8(__VA_ARGS__)

#define	vlseg5e8ff_v_i8mf8_m(...) __riscv_vlseg5e8ff_v_i8mf8_tumu(__VA_ARGS__)

#define	vlseg5e8ff_v_u8m1(...) __riscv_vlseg5e8ff_v_u8m1(__VA_ARGS__)

#define	vlseg5e8ff_v_u8m1_m(...) __riscv_vlseg5e8ff_v_u8m1_tumu(__VA_ARGS__)

#define	vlseg5e8ff_v_u8mf2(...) __riscv_vlseg5e8ff_v_u8mf2(__VA_ARGS__)

#define	vlseg5e8ff_v_u8mf2_m(...) __riscv_vlseg5e8ff_v_u8mf2_tumu(__VA_ARGS__)

#define	vlseg5e8ff_v_u8mf4(...) __riscv_vlseg5e8ff_v_u8mf4(__VA_ARGS__)

#define	vlseg5e8ff_v_u8mf4_m(...) __riscv_vlseg5e8ff_v_u8mf4_tumu(__VA_ARGS__)

#define	vlseg5e8ff_v_u8mf8(...) __riscv_vlseg5e8ff_v_u8mf8(__VA_ARGS__)

#define	vlseg5e8ff_v_u8mf8_m(...) __riscv_vlseg5e8ff_v_u8mf8_tumu(__VA_ARGS__)

#define	vlseg6e16_v_f16m1(...) __riscv_vlseg6e16_v_f16m1(__VA_ARGS__)

#define	vlseg6e16_v_f16m1_m(...) __riscv_vlseg6e16_v_f16m1_tumu(__VA_ARGS__)

#define	vlseg6e16_v_f16mf2(...) __riscv_vlseg6e16_v_f16mf2(__VA_ARGS__)

#define	vlseg6e16_v_f16mf2_m(...) __riscv_vlseg6e16_v_f16mf2_tumu(__VA_ARGS__)

#define	vlseg6e16_v_f16mf4(...) __riscv_vlseg6e16_v_f16mf4(__VA_ARGS__)

#define	vlseg6e16_v_f16mf4_m(...) __riscv_vlseg6e16_v_f16mf4_tumu(__VA_ARGS__)

#define	vlseg6e16_v_i16m1(...) __riscv_vlseg6e16_v_i16m1(__VA_ARGS__)

#define	vlseg6e16_v_i16m1_m(...) __riscv_vlseg6e16_v_i16m1_tumu(__VA_ARGS__)

#define	vlseg6e16_v_i16mf2(...) __riscv_vlseg6e16_v_i16mf2(__VA_ARGS__)

#define	vlseg6e16_v_i16mf2_m(...) __riscv_vlseg6e16_v_i16mf2_tumu(__VA_ARGS__)

#define	vlseg6e16_v_i16mf4(...) __riscv_vlseg6e16_v_i16mf4(__VA_ARGS__)

#define	vlseg6e16_v_i16mf4_m(...) __riscv_vlseg6e16_v_i16mf4_tumu(__VA_ARGS__)

#define	vlseg6e16_v_u16m1(...) __riscv_vlseg6e16_v_u16m1(__VA_ARGS__)

#define	vlseg6e16_v_u16m1_m(...) __riscv_vlseg6e16_v_u16m1_tumu(__VA_ARGS__)

#define	vlseg6e16_v_u16mf2(...) __riscv_vlseg6e16_v_u16mf2(__VA_ARGS__)

#define	vlseg6e16_v_u16mf2_m(...) __riscv_vlseg6e16_v_u16mf2_tumu(__VA_ARGS__)

#define	vlseg6e16_v_u16mf4(...) __riscv_vlseg6e16_v_u16mf4(__VA_ARGS__)

#define	vlseg6e16_v_u16mf4_m(...) __riscv_vlseg6e16_v_u16mf4_tumu(__VA_ARGS__)

#define	vlseg6e16ff_v_f16m1(...) __riscv_vlseg6e16ff_v_f16m1(__VA_ARGS__)

#define	vlseg6e16ff_v_f16m1_m(...) __riscv_vlseg6e16ff_v_f16m1_tumu(__VA_ARGS__)

#define	vlseg6e16ff_v_f16mf2(...) __riscv_vlseg6e16ff_v_f16mf2(__VA_ARGS__)

#define	vlseg6e16ff_v_f16mf2_m(...) __riscv_vlseg6e16ff_v_f16mf2_tumu(__VA_ARGS__)

#define	vlseg6e16ff_v_f16mf4(...) __riscv_vlseg6e16ff_v_f16mf4(__VA_ARGS__)

#define	vlseg6e16ff_v_f16mf4_m(...) __riscv_vlseg6e16ff_v_f16mf4_tumu(__VA_ARGS__)

#define	vlseg6e16ff_v_i16m1(...) __riscv_vlseg6e16ff_v_i16m1(__VA_ARGS__)

#define	vlseg6e16ff_v_i16m1_m(...) __riscv_vlseg6e16ff_v_i16m1_tumu(__VA_ARGS__)

#define	vlseg6e16ff_v_i16mf2(...) __riscv_vlseg6e16ff_v_i16mf2(__VA_ARGS__)

#define	vlseg6e16ff_v_i16mf2_m(...) __riscv_vlseg6e16ff_v_i16mf2_tumu(__VA_ARGS__)

#define	vlseg6e16ff_v_i16mf4(...) __riscv_vlseg6e16ff_v_i16mf4(__VA_ARGS__)

#define	vlseg6e16ff_v_i16mf4_m(...) __riscv_vlseg6e16ff_v_i16mf4_tumu(__VA_ARGS__)

#define	vlseg6e16ff_v_u16m1(...) __riscv_vlseg6e16ff_v_u16m1(__VA_ARGS__)

#define	vlseg6e16ff_v_u16m1_m(...) __riscv_vlseg6e16ff_v_u16m1_tumu(__VA_ARGS__)

#define	vlseg6e16ff_v_u16mf2(...) __riscv_vlseg6e16ff_v_u16mf2(__VA_ARGS__)

#define	vlseg6e16ff_v_u16mf2_m(...) __riscv_vlseg6e16ff_v_u16mf2_tumu(__VA_ARGS__)

#define	vlseg6e16ff_v_u16mf4(...) __riscv_vlseg6e16ff_v_u16mf4(__VA_ARGS__)

#define	vlseg6e16ff_v_u16mf4_m(...) __riscv_vlseg6e16ff_v_u16mf4_tumu(__VA_ARGS__)

#define	vlseg6e32_v_f32m1(...) __riscv_vlseg6e32_v_f32m1(__VA_ARGS__)

#define	vlseg6e32_v_f32m1_m(...) __riscv_vlseg6e32_v_f32m1_tumu(__VA_ARGS__)

#define	vlseg6e32_v_f32mf2(...) __riscv_vlseg6e32_v_f32mf2(__VA_ARGS__)

#define	vlseg6e32_v_f32mf2_m(...) __riscv_vlseg6e32_v_f32mf2_tumu(__VA_ARGS__)

#define	vlseg6e32_v_i32m1(...) __riscv_vlseg6e32_v_i32m1(__VA_ARGS__)

#define	vlseg6e32_v_i32m1_m(...) __riscv_vlseg6e32_v_i32m1_tumu(__VA_ARGS__)

#define	vlseg6e32_v_i32mf2(...) __riscv_vlseg6e32_v_i32mf2(__VA_ARGS__)

#define	vlseg6e32_v_i32mf2_m(...) __riscv_vlseg6e32_v_i32mf2_tumu(__VA_ARGS__)

#define	vlseg6e32_v_u32m1(...) __riscv_vlseg6e32_v_u32m1(__VA_ARGS__)

#define	vlseg6e32_v_u32m1_m(...) __riscv_vlseg6e32_v_u32m1_tumu(__VA_ARGS__)

#define	vlseg6e32_v_u32mf2(...) __riscv_vlseg6e32_v_u32mf2(__VA_ARGS__)

#define	vlseg6e32_v_u32mf2_m(...) __riscv_vlseg6e32_v_u32mf2_tumu(__VA_ARGS__)

#define	vlseg6e32ff_v_f32m1(...) __riscv_vlseg6e32ff_v_f32m1(__VA_ARGS__)

#define	vlseg6e32ff_v_f32m1_m(...) __riscv_vlseg6e32ff_v_f32m1_tumu(__VA_ARGS__)

#define	vlseg6e32ff_v_f32mf2(...) __riscv_vlseg6e32ff_v_f32mf2(__VA_ARGS__)

#define	vlseg6e32ff_v_f32mf2_m(...) __riscv_vlseg6e32ff_v_f32mf2_tumu(__VA_ARGS__)

#define	vlseg6e32ff_v_i32m1(...) __riscv_vlseg6e32ff_v_i32m1(__VA_ARGS__)

#define	vlseg6e32ff_v_i32m1_m(...) __riscv_vlseg6e32ff_v_i32m1_tumu(__VA_ARGS__)

#define	vlseg6e32ff_v_i32mf2(...) __riscv_vlseg6e32ff_v_i32mf2(__VA_ARGS__)

#define	vlseg6e32ff_v_i32mf2_m(...) __riscv_vlseg6e32ff_v_i32mf2_tumu(__VA_ARGS__)

#define	vlseg6e32ff_v_u32m1(...) __riscv_vlseg6e32ff_v_u32m1(__VA_ARGS__)

#define	vlseg6e32ff_v_u32m1_m(...) __riscv_vlseg6e32ff_v_u32m1_tumu(__VA_ARGS__)

#define	vlseg6e32ff_v_u32mf2(...) __riscv_vlseg6e32ff_v_u32mf2(__VA_ARGS__)

#define	vlseg6e32ff_v_u32mf2_m(...) __riscv_vlseg6e32ff_v_u32mf2_tumu(__VA_ARGS__)

#define	vlseg6e64_v_f64m1(...) __riscv_vlseg6e64_v_f64m1(__VA_ARGS__)

#define	vlseg6e64_v_f64m1_m(...) __riscv_vlseg6e64_v_f64m1_tumu(__VA_ARGS__)

#define	vlseg6e64_v_i64m1(...) __riscv_vlseg6e64_v_i64m1(__VA_ARGS__)

#define	vlseg6e64_v_i64m1_m(...) __riscv_vlseg6e64_v_i64m1_tumu(__VA_ARGS__)

#define	vlseg6e64_v_u64m1(...) __riscv_vlseg6e64_v_u64m1(__VA_ARGS__)

#define	vlseg6e64_v_u64m1_m(...) __riscv_vlseg6e64_v_u64m1_tumu(__VA_ARGS__)

#define	vlseg6e64ff_v_f64m1(...) __riscv_vlseg6e64ff_v_f64m1(__VA_ARGS__)

#define	vlseg6e64ff_v_f64m1_m(...) __riscv_vlseg6e64ff_v_f64m1_tumu(__VA_ARGS__)

#define	vlseg6e64ff_v_i64m1(...) __riscv_vlseg6e64ff_v_i64m1(__VA_ARGS__)

#define	vlseg6e64ff_v_i64m1_m(...) __riscv_vlseg6e64ff_v_i64m1_tumu(__VA_ARGS__)

#define	vlseg6e64ff_v_u64m1(...) __riscv_vlseg6e64ff_v_u64m1(__VA_ARGS__)

#define	vlseg6e64ff_v_u64m1_m(...) __riscv_vlseg6e64ff_v_u64m1_tumu(__VA_ARGS__)

#define	vlseg6e8_v_i8m1(...) __riscv_vlseg6e8_v_i8m1(__VA_ARGS__)

#define	vlseg6e8_v_i8m1_m(...) __riscv_vlseg6e8_v_i8m1_tumu(__VA_ARGS__)

#define	vlseg6e8_v_i8mf2(...) __riscv_vlseg6e8_v_i8mf2(__VA_ARGS__)

#define	vlseg6e8_v_i8mf2_m(...) __riscv_vlseg6e8_v_i8mf2_tumu(__VA_ARGS__)

#define	vlseg6e8_v_i8mf4(...) __riscv_vlseg6e8_v_i8mf4(__VA_ARGS__)

#define	vlseg6e8_v_i8mf4_m(...) __riscv_vlseg6e8_v_i8mf4_tumu(__VA_ARGS__)

#define	vlseg6e8_v_i8mf8(...) __riscv_vlseg6e8_v_i8mf8(__VA_ARGS__)

#define	vlseg6e8_v_i8mf8_m(...) __riscv_vlseg6e8_v_i8mf8_tumu(__VA_ARGS__)

#define	vlseg6e8_v_u8m1(...) __riscv_vlseg6e8_v_u8m1(__VA_ARGS__)

#define	vlseg6e8_v_u8m1_m(...) __riscv_vlseg6e8_v_u8m1_tumu(__VA_ARGS__)

#define	vlseg6e8_v_u8mf2(...) __riscv_vlseg6e8_v_u8mf2(__VA_ARGS__)

#define	vlseg6e8_v_u8mf2_m(...) __riscv_vlseg6e8_v_u8mf2_tumu(__VA_ARGS__)

#define	vlseg6e8_v_u8mf4(...) __riscv_vlseg6e8_v_u8mf4(__VA_ARGS__)

#define	vlseg6e8_v_u8mf4_m(...) __riscv_vlseg6e8_v_u8mf4_tumu(__VA_ARGS__)

#define	vlseg6e8_v_u8mf8(...) __riscv_vlseg6e8_v_u8mf8(__VA_ARGS__)

#define	vlseg6e8_v_u8mf8_m(...) __riscv_vlseg6e8_v_u8mf8_tumu(__VA_ARGS__)

#define	vlseg6e8ff_v_i8m1(...) __riscv_vlseg6e8ff_v_i8m1(__VA_ARGS__)

#define	vlseg6e8ff_v_i8m1_m(...) __riscv_vlseg6e8ff_v_i8m1_tumu(__VA_ARGS__)

#define	vlseg6e8ff_v_i8mf2(...) __riscv_vlseg6e8ff_v_i8mf2(__VA_ARGS__)

#define	vlseg6e8ff_v_i8mf2_m(...) __riscv_vlseg6e8ff_v_i8mf2_tumu(__VA_ARGS__)

#define	vlseg6e8ff_v_i8mf4(...) __riscv_vlseg6e8ff_v_i8mf4(__VA_ARGS__)

#define	vlseg6e8ff_v_i8mf4_m(...) __riscv_vlseg6e8ff_v_i8mf4_tumu(__VA_ARGS__)

#define	vlseg6e8ff_v_i8mf8(...) __riscv_vlseg6e8ff_v_i8mf8(__VA_ARGS__)

#define	vlseg6e8ff_v_i8mf8_m(...) __riscv_vlseg6e8ff_v_i8mf8_tumu(__VA_ARGS__)

#define	vlseg6e8ff_v_u8m1(...) __riscv_vlseg6e8ff_v_u8m1(__VA_ARGS__)

#define	vlseg6e8ff_v_u8m1_m(...) __riscv_vlseg6e8ff_v_u8m1_tumu(__VA_ARGS__)

#define	vlseg6e8ff_v_u8mf2(...) __riscv_vlseg6e8ff_v_u8mf2(__VA_ARGS__)

#define	vlseg6e8ff_v_u8mf2_m(...) __riscv_vlseg6e8ff_v_u8mf2_tumu(__VA_ARGS__)

#define	vlseg6e8ff_v_u8mf4(...) __riscv_vlseg6e8ff_v_u8mf4(__VA_ARGS__)

#define	vlseg6e8ff_v_u8mf4_m(...) __riscv_vlseg6e8ff_v_u8mf4_tumu(__VA_ARGS__)

#define	vlseg6e8ff_v_u8mf8(...) __riscv_vlseg6e8ff_v_u8mf8(__VA_ARGS__)

#define	vlseg6e8ff_v_u8mf8_m(...) __riscv_vlseg6e8ff_v_u8mf8_tumu(__VA_ARGS__)

#define	vlseg7e16_v_f16m1(...) __riscv_vlseg7e16_v_f16m1(__VA_ARGS__)

#define	vlseg7e16_v_f16m1_m(...) __riscv_vlseg7e16_v_f16m1_tumu(__VA_ARGS__)

#define	vlseg7e16_v_f16mf2(...) __riscv_vlseg7e16_v_f16mf2(__VA_ARGS__)

#define	vlseg7e16_v_f16mf2_m(...) __riscv_vlseg7e16_v_f16mf2_tumu(__VA_ARGS__)

#define	vlseg7e16_v_f16mf4(...) __riscv_vlseg7e16_v_f16mf4(__VA_ARGS__)

#define	vlseg7e16_v_f16mf4_m(...) __riscv_vlseg7e16_v_f16mf4_tumu(__VA_ARGS__)

#define	vlseg7e16_v_i16m1(...) __riscv_vlseg7e16_v_i16m1(__VA_ARGS__)

#define	vlseg7e16_v_i16m1_m(...) __riscv_vlseg7e16_v_i16m1_tumu(__VA_ARGS__)

#define	vlseg7e16_v_i16mf2(...) __riscv_vlseg7e16_v_i16mf2(__VA_ARGS__)

#define	vlseg7e16_v_i16mf2_m(...) __riscv_vlseg7e16_v_i16mf2_tumu(__VA_ARGS__)

#define	vlseg7e16_v_i16mf4(...) __riscv_vlseg7e16_v_i16mf4(__VA_ARGS__)

#define	vlseg7e16_v_i16mf4_m(...) __riscv_vlseg7e16_v_i16mf4_tumu(__VA_ARGS__)

#define	vlseg7e16_v_u16m1(...) __riscv_vlseg7e16_v_u16m1(__VA_ARGS__)

#define	vlseg7e16_v_u16m1_m(...) __riscv_vlseg7e16_v_u16m1_tumu(__VA_ARGS__)

#define	vlseg7e16_v_u16mf2(...) __riscv_vlseg7e16_v_u16mf2(__VA_ARGS__)

#define	vlseg7e16_v_u16mf2_m(...) __riscv_vlseg7e16_v_u16mf2_tumu(__VA_ARGS__)

#define	vlseg7e16_v_u16mf4(...) __riscv_vlseg7e16_v_u16mf4(__VA_ARGS__)

#define	vlseg7e16_v_u16mf4_m(...) __riscv_vlseg7e16_v_u16mf4_tumu(__VA_ARGS__)

#define	vlseg7e16ff_v_f16m1(...) __riscv_vlseg7e16ff_v_f16m1(__VA_ARGS__)

#define	vlseg7e16ff_v_f16m1_m(...) __riscv_vlseg7e16ff_v_f16m1_tumu(__VA_ARGS__)

#define	vlseg7e16ff_v_f16mf2(...) __riscv_vlseg7e16ff_v_f16mf2(__VA_ARGS__)

#define	vlseg7e16ff_v_f16mf2_m(...) __riscv_vlseg7e16ff_v_f16mf2_tumu(__VA_ARGS__)

#define	vlseg7e16ff_v_f16mf4(...) __riscv_vlseg7e16ff_v_f16mf4(__VA_ARGS__)

#define	vlseg7e16ff_v_f16mf4_m(...) __riscv_vlseg7e16ff_v_f16mf4_tumu(__VA_ARGS__)

#define	vlseg7e16ff_v_i16m1(...) __riscv_vlseg7e16ff_v_i16m1(__VA_ARGS__)

#define	vlseg7e16ff_v_i16m1_m(...) __riscv_vlseg7e16ff_v_i16m1_tumu(__VA_ARGS__)

#define	vlseg7e16ff_v_i16mf2(...) __riscv_vlseg7e16ff_v_i16mf2(__VA_ARGS__)

#define	vlseg7e16ff_v_i16mf2_m(...) __riscv_vlseg7e16ff_v_i16mf2_tumu(__VA_ARGS__)

#define	vlseg7e16ff_v_i16mf4(...) __riscv_vlseg7e16ff_v_i16mf4(__VA_ARGS__)

#define	vlseg7e16ff_v_i16mf4_m(...) __riscv_vlseg7e16ff_v_i16mf4_tumu(__VA_ARGS__)

#define	vlseg7e16ff_v_u16m1(...) __riscv_vlseg7e16ff_v_u16m1(__VA_ARGS__)

#define	vlseg7e16ff_v_u16m1_m(...) __riscv_vlseg7e16ff_v_u16m1_tumu(__VA_ARGS__)

#define	vlseg7e16ff_v_u16mf2(...) __riscv_vlseg7e16ff_v_u16mf2(__VA_ARGS__)

#define	vlseg7e16ff_v_u16mf2_m(...) __riscv_vlseg7e16ff_v_u16mf2_tumu(__VA_ARGS__)

#define	vlseg7e16ff_v_u16mf4(...) __riscv_vlseg7e16ff_v_u16mf4(__VA_ARGS__)

#define	vlseg7e16ff_v_u16mf4_m(...) __riscv_vlseg7e16ff_v_u16mf4_tumu(__VA_ARGS__)

#define	vlseg7e32_v_f32m1(...) __riscv_vlseg7e32_v_f32m1(__VA_ARGS__)

#define	vlseg7e32_v_f32m1_m(...) __riscv_vlseg7e32_v_f32m1_tumu(__VA_ARGS__)

#define	vlseg7e32_v_f32mf2(...) __riscv_vlseg7e32_v_f32mf2(__VA_ARGS__)

#define	vlseg7e32_v_f32mf2_m(...) __riscv_vlseg7e32_v_f32mf2_tumu(__VA_ARGS__)

#define	vlseg7e32_v_i32m1(...) __riscv_vlseg7e32_v_i32m1(__VA_ARGS__)

#define	vlseg7e32_v_i32m1_m(...) __riscv_vlseg7e32_v_i32m1_tumu(__VA_ARGS__)

#define	vlseg7e32_v_i32mf2(...) __riscv_vlseg7e32_v_i32mf2(__VA_ARGS__)

#define	vlseg7e32_v_i32mf2_m(...) __riscv_vlseg7e32_v_i32mf2_tumu(__VA_ARGS__)

#define	vlseg7e32_v_u32m1(...) __riscv_vlseg7e32_v_u32m1(__VA_ARGS__)

#define	vlseg7e32_v_u32m1_m(...) __riscv_vlseg7e32_v_u32m1_tumu(__VA_ARGS__)

#define	vlseg7e32_v_u32mf2(...) __riscv_vlseg7e32_v_u32mf2(__VA_ARGS__)

#define	vlseg7e32_v_u32mf2_m(...) __riscv_vlseg7e32_v_u32mf2_tumu(__VA_ARGS__)

#define	vlseg7e32ff_v_f32m1(...) __riscv_vlseg7e32ff_v_f32m1(__VA_ARGS__)

#define	vlseg7e32ff_v_f32m1_m(...) __riscv_vlseg7e32ff_v_f32m1_tumu(__VA_ARGS__)

#define	vlseg7e32ff_v_f32mf2(...) __riscv_vlseg7e32ff_v_f32mf2(__VA_ARGS__)

#define	vlseg7e32ff_v_f32mf2_m(...) __riscv_vlseg7e32ff_v_f32mf2_tumu(__VA_ARGS__)

#define	vlseg7e32ff_v_i32m1(...) __riscv_vlseg7e32ff_v_i32m1(__VA_ARGS__)

#define	vlseg7e32ff_v_i32m1_m(...) __riscv_vlseg7e32ff_v_i32m1_tumu(__VA_ARGS__)

#define	vlseg7e32ff_v_i32mf2(...) __riscv_vlseg7e32ff_v_i32mf2(__VA_ARGS__)

#define	vlseg7e32ff_v_i32mf2_m(...) __riscv_vlseg7e32ff_v_i32mf2_tumu(__VA_ARGS__)

#define	vlseg7e32ff_v_u32m1(...) __riscv_vlseg7e32ff_v_u32m1(__VA_ARGS__)

#define	vlseg7e32ff_v_u32m1_m(...) __riscv_vlseg7e32ff_v_u32m1_tumu(__VA_ARGS__)

#define	vlseg7e32ff_v_u32mf2(...) __riscv_vlseg7e32ff_v_u32mf2(__VA_ARGS__)

#define	vlseg7e32ff_v_u32mf2_m(...) __riscv_vlseg7e32ff_v_u32mf2_tumu(__VA_ARGS__)

#define	vlseg7e64_v_f64m1(...) __riscv_vlseg7e64_v_f64m1(__VA_ARGS__)

#define	vlseg7e64_v_f64m1_m(...) __riscv_vlseg7e64_v_f64m1_tumu(__VA_ARGS__)

#define	vlseg7e64_v_i64m1(...) __riscv_vlseg7e64_v_i64m1(__VA_ARGS__)

#define	vlseg7e64_v_i64m1_m(...) __riscv_vlseg7e64_v_i64m1_tumu(__VA_ARGS__)

#define	vlseg7e64_v_u64m1(...) __riscv_vlseg7e64_v_u64m1(__VA_ARGS__)

#define	vlseg7e64_v_u64m1_m(...) __riscv_vlseg7e64_v_u64m1_tumu(__VA_ARGS__)

#define	vlseg7e64ff_v_f64m1(...) __riscv_vlseg7e64ff_v_f64m1(__VA_ARGS__)

#define	vlseg7e64ff_v_f64m1_m(...) __riscv_vlseg7e64ff_v_f64m1_tumu(__VA_ARGS__)

#define	vlseg7e64ff_v_i64m1(...) __riscv_vlseg7e64ff_v_i64m1(__VA_ARGS__)

#define	vlseg7e64ff_v_i64m1_m(...) __riscv_vlseg7e64ff_v_i64m1_tumu(__VA_ARGS__)

#define	vlseg7e64ff_v_u64m1(...) __riscv_vlseg7e64ff_v_u64m1(__VA_ARGS__)

#define	vlseg7e64ff_v_u64m1_m(...) __riscv_vlseg7e64ff_v_u64m1_tumu(__VA_ARGS__)

#define	vlseg7e8_v_i8m1(...) __riscv_vlseg7e8_v_i8m1(__VA_ARGS__)

#define	vlseg7e8_v_i8m1_m(...) __riscv_vlseg7e8_v_i8m1_tumu(__VA_ARGS__)

#define	vlseg7e8_v_i8mf2(...) __riscv_vlseg7e8_v_i8mf2(__VA_ARGS__)

#define	vlseg7e8_v_i8mf2_m(...) __riscv_vlseg7e8_v_i8mf2_tumu(__VA_ARGS__)

#define	vlseg7e8_v_i8mf4(...) __riscv_vlseg7e8_v_i8mf4(__VA_ARGS__)

#define	vlseg7e8_v_i8mf4_m(...) __riscv_vlseg7e8_v_i8mf4_tumu(__VA_ARGS__)

#define	vlseg7e8_v_i8mf8(...) __riscv_vlseg7e8_v_i8mf8(__VA_ARGS__)

#define	vlseg7e8_v_i8mf8_m(...) __riscv_vlseg7e8_v_i8mf8_tumu(__VA_ARGS__)

#define	vlseg7e8_v_u8m1(...) __riscv_vlseg7e8_v_u8m1(__VA_ARGS__)

#define	vlseg7e8_v_u8m1_m(...) __riscv_vlseg7e8_v_u8m1_tumu(__VA_ARGS__)

#define	vlseg7e8_v_u8mf2(...) __riscv_vlseg7e8_v_u8mf2(__VA_ARGS__)

#define	vlseg7e8_v_u8mf2_m(...) __riscv_vlseg7e8_v_u8mf2_tumu(__VA_ARGS__)

#define	vlseg7e8_v_u8mf4(...) __riscv_vlseg7e8_v_u8mf4(__VA_ARGS__)

#define	vlseg7e8_v_u8mf4_m(...) __riscv_vlseg7e8_v_u8mf4_tumu(__VA_ARGS__)

#define	vlseg7e8_v_u8mf8(...) __riscv_vlseg7e8_v_u8mf8(__VA_ARGS__)

#define	vlseg7e8_v_u8mf8_m(...) __riscv_vlseg7e8_v_u8mf8_tumu(__VA_ARGS__)

#define	vlseg7e8ff_v_i8m1(...) __riscv_vlseg7e8ff_v_i8m1(__VA_ARGS__)

#define	vlseg7e8ff_v_i8m1_m(...) __riscv_vlseg7e8ff_v_i8m1_tumu(__VA_ARGS__)

#define	vlseg7e8ff_v_i8mf2(...) __riscv_vlseg7e8ff_v_i8mf2(__VA_ARGS__)

#define	vlseg7e8ff_v_i8mf2_m(...) __riscv_vlseg7e8ff_v_i8mf2_tumu(__VA_ARGS__)

#define	vlseg7e8ff_v_i8mf4(...) __riscv_vlseg7e8ff_v_i8mf4(__VA_ARGS__)

#define	vlseg7e8ff_v_i8mf4_m(...) __riscv_vlseg7e8ff_v_i8mf4_tumu(__VA_ARGS__)

#define	vlseg7e8ff_v_i8mf8(...) __riscv_vlseg7e8ff_v_i8mf8(__VA_ARGS__)

#define	vlseg7e8ff_v_i8mf8_m(...) __riscv_vlseg7e8ff_v_i8mf8_tumu(__VA_ARGS__)

#define	vlseg7e8ff_v_u8m1(...) __riscv_vlseg7e8ff_v_u8m1(__VA_ARGS__)

#define	vlseg7e8ff_v_u8m1_m(...) __riscv_vlseg7e8ff_v_u8m1_tumu(__VA_ARGS__)

#define	vlseg7e8ff_v_u8mf2(...) __riscv_vlseg7e8ff_v_u8mf2(__VA_ARGS__)

#define	vlseg7e8ff_v_u8mf2_m(...) __riscv_vlseg7e8ff_v_u8mf2_tumu(__VA_ARGS__)

#define	vlseg7e8ff_v_u8mf4(...) __riscv_vlseg7e8ff_v_u8mf4(__VA_ARGS__)

#define	vlseg7e8ff_v_u8mf4_m(...) __riscv_vlseg7e8ff_v_u8mf4_tumu(__VA_ARGS__)

#define	vlseg7e8ff_v_u8mf8(...) __riscv_vlseg7e8ff_v_u8mf8(__VA_ARGS__)

#define	vlseg7e8ff_v_u8mf8_m(...) __riscv_vlseg7e8ff_v_u8mf8_tumu(__VA_ARGS__)

#define	vlseg8e16_v_f16m1(...) __riscv_vlseg8e16_v_f16m1(__VA_ARGS__)

#define	vlseg8e16_v_f16m1_m(...) __riscv_vlseg8e16_v_f16m1_tumu(__VA_ARGS__)

#define	vlseg8e16_v_f16mf2(...) __riscv_vlseg8e16_v_f16mf2(__VA_ARGS__)

#define	vlseg8e16_v_f16mf2_m(...) __riscv_vlseg8e16_v_f16mf2_tumu(__VA_ARGS__)

#define	vlseg8e16_v_f16mf4(...) __riscv_vlseg8e16_v_f16mf4(__VA_ARGS__)

#define	vlseg8e16_v_f16mf4_m(...) __riscv_vlseg8e16_v_f16mf4_tumu(__VA_ARGS__)

#define	vlseg8e16_v_i16m1(...) __riscv_vlseg8e16_v_i16m1(__VA_ARGS__)

#define	vlseg8e16_v_i16m1_m(...) __riscv_vlseg8e16_v_i16m1_tumu(__VA_ARGS__)

#define	vlseg8e16_v_i16mf2(...) __riscv_vlseg8e16_v_i16mf2(__VA_ARGS__)

#define	vlseg8e16_v_i16mf2_m(...) __riscv_vlseg8e16_v_i16mf2_tumu(__VA_ARGS__)

#define	vlseg8e16_v_i16mf4(...) __riscv_vlseg8e16_v_i16mf4(__VA_ARGS__)

#define	vlseg8e16_v_i16mf4_m(...) __riscv_vlseg8e16_v_i16mf4_tumu(__VA_ARGS__)

#define	vlseg8e16_v_u16m1(...) __riscv_vlseg8e16_v_u16m1(__VA_ARGS__)

#define	vlseg8e16_v_u16m1_m(...) __riscv_vlseg8e16_v_u16m1_tumu(__VA_ARGS__)

#define	vlseg8e16_v_u16mf2(...) __riscv_vlseg8e16_v_u16mf2(__VA_ARGS__)

#define	vlseg8e16_v_u16mf2_m(...) __riscv_vlseg8e16_v_u16mf2_tumu(__VA_ARGS__)

#define	vlseg8e16_v_u16mf4(...) __riscv_vlseg8e16_v_u16mf4(__VA_ARGS__)

#define	vlseg8e16_v_u16mf4_m(...) __riscv_vlseg8e16_v_u16mf4_tumu(__VA_ARGS__)

#define	vlseg8e16ff_v_f16m1(...) __riscv_vlseg8e16ff_v_f16m1(__VA_ARGS__)

#define	vlseg8e16ff_v_f16m1_m(...) __riscv_vlseg8e16ff_v_f16m1_tumu(__VA_ARGS__)

#define	vlseg8e16ff_v_f16mf2(...) __riscv_vlseg8e16ff_v_f16mf2(__VA_ARGS__)

#define	vlseg8e16ff_v_f16mf2_m(...) __riscv_vlseg8e16ff_v_f16mf2_tumu(__VA_ARGS__)

#define	vlseg8e16ff_v_f16mf4(...) __riscv_vlseg8e16ff_v_f16mf4(__VA_ARGS__)

#define	vlseg8e16ff_v_f16mf4_m(...) __riscv_vlseg8e16ff_v_f16mf4_tumu(__VA_ARGS__)

#define	vlseg8e16ff_v_i16m1(...) __riscv_vlseg8e16ff_v_i16m1(__VA_ARGS__)

#define	vlseg8e16ff_v_i16m1_m(...) __riscv_vlseg8e16ff_v_i16m1_tumu(__VA_ARGS__)

#define	vlseg8e16ff_v_i16mf2(...) __riscv_vlseg8e16ff_v_i16mf2(__VA_ARGS__)

#define	vlseg8e16ff_v_i16mf2_m(...) __riscv_vlseg8e16ff_v_i16mf2_tumu(__VA_ARGS__)

#define	vlseg8e16ff_v_i16mf4(...) __riscv_vlseg8e16ff_v_i16mf4(__VA_ARGS__)

#define	vlseg8e16ff_v_i16mf4_m(...) __riscv_vlseg8e16ff_v_i16mf4_tumu(__VA_ARGS__)

#define	vlseg8e16ff_v_u16m1(...) __riscv_vlseg8e16ff_v_u16m1(__VA_ARGS__)

#define	vlseg8e16ff_v_u16m1_m(...) __riscv_vlseg8e16ff_v_u16m1_tumu(__VA_ARGS__)

#define	vlseg8e16ff_v_u16mf2(...) __riscv_vlseg8e16ff_v_u16mf2(__VA_ARGS__)

#define	vlseg8e16ff_v_u16mf2_m(...) __riscv_vlseg8e16ff_v_u16mf2_tumu(__VA_ARGS__)

#define	vlseg8e16ff_v_u16mf4(...) __riscv_vlseg8e16ff_v_u16mf4(__VA_ARGS__)

#define	vlseg8e16ff_v_u16mf4_m(...) __riscv_vlseg8e16ff_v_u16mf4_tumu(__VA_ARGS__)

#define	vlseg8e32_v_f32m1(...) __riscv_vlseg8e32_v_f32m1(__VA_ARGS__)

#define	vlseg8e32_v_f32m1_m(...) __riscv_vlseg8e32_v_f32m1_tumu(__VA_ARGS__)

#define	vlseg8e32_v_f32mf2(...) __riscv_vlseg8e32_v_f32mf2(__VA_ARGS__)

#define	vlseg8e32_v_f32mf2_m(...) __riscv_vlseg8e32_v_f32mf2_tumu(__VA_ARGS__)

#define	vlseg8e32_v_i32m1(...) __riscv_vlseg8e32_v_i32m1(__VA_ARGS__)

#define	vlseg8e32_v_i32m1_m(...) __riscv_vlseg8e32_v_i32m1_tumu(__VA_ARGS__)

#define	vlseg8e32_v_i32mf2(...) __riscv_vlseg8e32_v_i32mf2(__VA_ARGS__)

#define	vlseg8e32_v_i32mf2_m(...) __riscv_vlseg8e32_v_i32mf2_tumu(__VA_ARGS__)

#define	vlseg8e32_v_u32m1(...) __riscv_vlseg8e32_v_u32m1(__VA_ARGS__)

#define	vlseg8e32_v_u32m1_m(...) __riscv_vlseg8e32_v_u32m1_tumu(__VA_ARGS__)

#define	vlseg8e32_v_u32mf2(...) __riscv_vlseg8e32_v_u32mf2(__VA_ARGS__)

#define	vlseg8e32_v_u32mf2_m(...) __riscv_vlseg8e32_v_u32mf2_tumu(__VA_ARGS__)

#define	vlseg8e32ff_v_f32m1(...) __riscv_vlseg8e32ff_v_f32m1(__VA_ARGS__)

#define	vlseg8e32ff_v_f32m1_m(...) __riscv_vlseg8e32ff_v_f32m1_tumu(__VA_ARGS__)

#define	vlseg8e32ff_v_f32mf2(...) __riscv_vlseg8e32ff_v_f32mf2(__VA_ARGS__)

#define	vlseg8e32ff_v_f32mf2_m(...) __riscv_vlseg8e32ff_v_f32mf2_tumu(__VA_ARGS__)

#define	vlseg8e32ff_v_i32m1(...) __riscv_vlseg8e32ff_v_i32m1(__VA_ARGS__)

#define	vlseg8e32ff_v_i32m1_m(...) __riscv_vlseg8e32ff_v_i32m1_tumu(__VA_ARGS__)

#define	vlseg8e32ff_v_i32mf2(...) __riscv_vlseg8e32ff_v_i32mf2(__VA_ARGS__)

#define	vlseg8e32ff_v_i32mf2_m(...) __riscv_vlseg8e32ff_v_i32mf2_tumu(__VA_ARGS__)

#define	vlseg8e32ff_v_u32m1(...) __riscv_vlseg8e32ff_v_u32m1(__VA_ARGS__)

#define	vlseg8e32ff_v_u32m1_m(...) __riscv_vlseg8e32ff_v_u32m1_tumu(__VA_ARGS__)

#define	vlseg8e32ff_v_u32mf2(...) __riscv_vlseg8e32ff_v_u32mf2(__VA_ARGS__)

#define	vlseg8e32ff_v_u32mf2_m(...) __riscv_vlseg8e32ff_v_u32mf2_tumu(__VA_ARGS__)

#define	vlseg8e64_v_f64m1(...) __riscv_vlseg8e64_v_f64m1(__VA_ARGS__)

#define	vlseg8e64_v_f64m1_m(...) __riscv_vlseg8e64_v_f64m1_tumu(__VA_ARGS__)

#define	vlseg8e64_v_i64m1(...) __riscv_vlseg8e64_v_i64m1(__VA_ARGS__)

#define	vlseg8e64_v_i64m1_m(...) __riscv_vlseg8e64_v_i64m1_tumu(__VA_ARGS__)

#define	vlseg8e64_v_u64m1(...) __riscv_vlseg8e64_v_u64m1(__VA_ARGS__)

#define	vlseg8e64_v_u64m1_m(...) __riscv_vlseg8e64_v_u64m1_tumu(__VA_ARGS__)

#define	vlseg8e64ff_v_f64m1(...) __riscv_vlseg8e64ff_v_f64m1(__VA_ARGS__)

#define	vlseg8e64ff_v_f64m1_m(...) __riscv_vlseg8e64ff_v_f64m1_tumu(__VA_ARGS__)

#define	vlseg8e64ff_v_i64m1(...) __riscv_vlseg8e64ff_v_i64m1(__VA_ARGS__)

#define	vlseg8e64ff_v_i64m1_m(...) __riscv_vlseg8e64ff_v_i64m1_tumu(__VA_ARGS__)

#define	vlseg8e64ff_v_u64m1(...) __riscv_vlseg8e64ff_v_u64m1(__VA_ARGS__)

#define	vlseg8e64ff_v_u64m1_m(...) __riscv_vlseg8e64ff_v_u64m1_tumu(__VA_ARGS__)

#define	vlseg8e8_v_i8m1(...) __riscv_vlseg8e8_v_i8m1(__VA_ARGS__)

#define	vlseg8e8_v_i8m1_m(...) __riscv_vlseg8e8_v_i8m1_tumu(__VA_ARGS__)

#define	vlseg8e8_v_i8mf2(...) __riscv_vlseg8e8_v_i8mf2(__VA_ARGS__)

#define	vlseg8e8_v_i8mf2_m(...) __riscv_vlseg8e8_v_i8mf2_tumu(__VA_ARGS__)

#define	vlseg8e8_v_i8mf4(...) __riscv_vlseg8e8_v_i8mf4(__VA_ARGS__)

#define	vlseg8e8_v_i8mf4_m(...) __riscv_vlseg8e8_v_i8mf4_tumu(__VA_ARGS__)

#define	vlseg8e8_v_i8mf8(...) __riscv_vlseg8e8_v_i8mf8(__VA_ARGS__)

#define	vlseg8e8_v_i8mf8_m(...) __riscv_vlseg8e8_v_i8mf8_tumu(__VA_ARGS__)

#define	vlseg8e8_v_u8m1(...) __riscv_vlseg8e8_v_u8m1(__VA_ARGS__)

#define	vlseg8e8_v_u8m1_m(...) __riscv_vlseg8e8_v_u8m1_tumu(__VA_ARGS__)

#define	vlseg8e8_v_u8mf2(...) __riscv_vlseg8e8_v_u8mf2(__VA_ARGS__)

#define	vlseg8e8_v_u8mf2_m(...) __riscv_vlseg8e8_v_u8mf2_tumu(__VA_ARGS__)

#define	vlseg8e8_v_u8mf4(...) __riscv_vlseg8e8_v_u8mf4(__VA_ARGS__)

#define	vlseg8e8_v_u8mf4_m(...) __riscv_vlseg8e8_v_u8mf4_tumu(__VA_ARGS__)

#define	vlseg8e8_v_u8mf8(...) __riscv_vlseg8e8_v_u8mf8(__VA_ARGS__)

#define	vlseg8e8_v_u8mf8_m(...) __riscv_vlseg8e8_v_u8mf8_tumu(__VA_ARGS__)

#define	vlseg8e8ff_v_i8m1(...) __riscv_vlseg8e8ff_v_i8m1(__VA_ARGS__)

#define	vlseg8e8ff_v_i8m1_m(...) __riscv_vlseg8e8ff_v_i8m1_tumu(__VA_ARGS__)

#define	vlseg8e8ff_v_i8mf2(...) __riscv_vlseg8e8ff_v_i8mf2(__VA_ARGS__)

#define	vlseg8e8ff_v_i8mf2_m(...) __riscv_vlseg8e8ff_v_i8mf2_tumu(__VA_ARGS__)

#define	vlseg8e8ff_v_i8mf4(...) __riscv_vlseg8e8ff_v_i8mf4(__VA_ARGS__)

#define	vlseg8e8ff_v_i8mf4_m(...) __riscv_vlseg8e8ff_v_i8mf4_tumu(__VA_ARGS__)

#define	vlseg8e8ff_v_i8mf8(...) __riscv_vlseg8e8ff_v_i8mf8(__VA_ARGS__)

#define	vlseg8e8ff_v_i8mf8_m(...) __riscv_vlseg8e8ff_v_i8mf8_tumu(__VA_ARGS__)

#define	vlseg8e8ff_v_u8m1(...) __riscv_vlseg8e8ff_v_u8m1(__VA_ARGS__)

#define	vlseg8e8ff_v_u8m1_m(...) __riscv_vlseg8e8ff_v_u8m1_tumu(__VA_ARGS__)

#define	vlseg8e8ff_v_u8mf2(...) __riscv_vlseg8e8ff_v_u8mf2(__VA_ARGS__)

#define	vlseg8e8ff_v_u8mf2_m(...) __riscv_vlseg8e8ff_v_u8mf2_tumu(__VA_ARGS__)

#define	vlseg8e8ff_v_u8mf4(...) __riscv_vlseg8e8ff_v_u8mf4(__VA_ARGS__)

#define	vlseg8e8ff_v_u8mf4_m(...) __riscv_vlseg8e8ff_v_u8mf4_tumu(__VA_ARGS__)

#define	vlseg8e8ff_v_u8mf8(...) __riscv_vlseg8e8ff_v_u8mf8(__VA_ARGS__)

#define	vlseg8e8ff_v_u8mf8_m(...) __riscv_vlseg8e8ff_v_u8mf8_tumu(__VA_ARGS__)

#define	vlsseg2e16_v_f16m1(...) __riscv_vlsseg2e16_v_f16m1(__VA_ARGS__)

#define	vlsseg2e16_v_f16m1_m(...) __riscv_vlsseg2e16_v_f16m1_tumu(__VA_ARGS__)

#define	vlsseg2e16_v_f16m2(...) __riscv_vlsseg2e16_v_f16m2(__VA_ARGS__)

#define	vlsseg2e16_v_f16m2_m(...) __riscv_vlsseg2e16_v_f16m2_tumu(__VA_ARGS__)

#define	vlsseg2e16_v_f16m4(...) __riscv_vlsseg2e16_v_f16m4(__VA_ARGS__)

#define	vlsseg2e16_v_f16m4_m(...) __riscv_vlsseg2e16_v_f16m4_tumu(__VA_ARGS__)

#define	vlsseg2e16_v_f16mf2(...) __riscv_vlsseg2e16_v_f16mf2(__VA_ARGS__)

#define	vlsseg2e16_v_f16mf2_m(...) __riscv_vlsseg2e16_v_f16mf2_tumu(__VA_ARGS__)

#define	vlsseg2e16_v_f16mf4(...) __riscv_vlsseg2e16_v_f16mf4(__VA_ARGS__)

#define	vlsseg2e16_v_f16mf4_m(...) __riscv_vlsseg2e16_v_f16mf4_tumu(__VA_ARGS__)

#define	vlsseg2e16_v_i16m1(...) __riscv_vlsseg2e16_v_i16m1(__VA_ARGS__)

#define	vlsseg2e16_v_i16m1_m(...) __riscv_vlsseg2e16_v_i16m1_tumu(__VA_ARGS__)

#define	vlsseg2e16_v_i16m2(...) __riscv_vlsseg2e16_v_i16m2(__VA_ARGS__)

#define	vlsseg2e16_v_i16m2_m(...) __riscv_vlsseg2e16_v_i16m2_tumu(__VA_ARGS__)

#define	vlsseg2e16_v_i16m4(...) __riscv_vlsseg2e16_v_i16m4(__VA_ARGS__)

#define	vlsseg2e16_v_i16m4_m(...) __riscv_vlsseg2e16_v_i16m4_tumu(__VA_ARGS__)

#define	vlsseg2e16_v_i16mf2(...) __riscv_vlsseg2e16_v_i16mf2(__VA_ARGS__)

#define	vlsseg2e16_v_i16mf2_m(...) __riscv_vlsseg2e16_v_i16mf2_tumu(__VA_ARGS__)

#define	vlsseg2e16_v_i16mf4(...) __riscv_vlsseg2e16_v_i16mf4(__VA_ARGS__)

#define	vlsseg2e16_v_i16mf4_m(...) __riscv_vlsseg2e16_v_i16mf4_tumu(__VA_ARGS__)

#define	vlsseg2e16_v_u16m1(...) __riscv_vlsseg2e16_v_u16m1(__VA_ARGS__)

#define	vlsseg2e16_v_u16m1_m(...) __riscv_vlsseg2e16_v_u16m1_tumu(__VA_ARGS__)

#define	vlsseg2e16_v_u16m2(...) __riscv_vlsseg2e16_v_u16m2(__VA_ARGS__)

#define	vlsseg2e16_v_u16m2_m(...) __riscv_vlsseg2e16_v_u16m2_tumu(__VA_ARGS__)

#define	vlsseg2e16_v_u16m4(...) __riscv_vlsseg2e16_v_u16m4(__VA_ARGS__)

#define	vlsseg2e16_v_u16m4_m(...) __riscv_vlsseg2e16_v_u16m4_tumu(__VA_ARGS__)

#define	vlsseg2e16_v_u16mf2(...) __riscv_vlsseg2e16_v_u16mf2(__VA_ARGS__)

#define	vlsseg2e16_v_u16mf2_m(...) __riscv_vlsseg2e16_v_u16mf2_tumu(__VA_ARGS__)

#define	vlsseg2e16_v_u16mf4(...) __riscv_vlsseg2e16_v_u16mf4(__VA_ARGS__)

#define	vlsseg2e16_v_u16mf4_m(...) __riscv_vlsseg2e16_v_u16mf4_tumu(__VA_ARGS__)

#define	vlsseg2e32_v_f32m1(...) __riscv_vlsseg2e32_v_f32m1(__VA_ARGS__)

#define	vlsseg2e32_v_f32m1_m(...) __riscv_vlsseg2e32_v_f32m1_tumu(__VA_ARGS__)

#define	vlsseg2e32_v_f32m2(...) __riscv_vlsseg2e32_v_f32m2(__VA_ARGS__)

#define	vlsseg2e32_v_f32m2_m(...) __riscv_vlsseg2e32_v_f32m2_tumu(__VA_ARGS__)

#define	vlsseg2e32_v_f32m4(...) __riscv_vlsseg2e32_v_f32m4(__VA_ARGS__)

#define	vlsseg2e32_v_f32m4_m(...) __riscv_vlsseg2e32_v_f32m4_tumu(__VA_ARGS__)

#define	vlsseg2e32_v_f32mf2(...) __riscv_vlsseg2e32_v_f32mf2(__VA_ARGS__)

#define	vlsseg2e32_v_f32mf2_m(...) __riscv_vlsseg2e32_v_f32mf2_tumu(__VA_ARGS__)

#define	vlsseg2e32_v_i32m1(...) __riscv_vlsseg2e32_v_i32m1(__VA_ARGS__)

#define	vlsseg2e32_v_i32m1_m(...) __riscv_vlsseg2e32_v_i32m1_tumu(__VA_ARGS__)

#define	vlsseg2e32_v_i32m2(...) __riscv_vlsseg2e32_v_i32m2(__VA_ARGS__)

#define	vlsseg2e32_v_i32m2_m(...) __riscv_vlsseg2e32_v_i32m2_tumu(__VA_ARGS__)

#define	vlsseg2e32_v_i32m4(...) __riscv_vlsseg2e32_v_i32m4(__VA_ARGS__)

#define	vlsseg2e32_v_i32m4_m(...) __riscv_vlsseg2e32_v_i32m4_tumu(__VA_ARGS__)

#define	vlsseg2e32_v_i32mf2(...) __riscv_vlsseg2e32_v_i32mf2(__VA_ARGS__)

#define	vlsseg2e32_v_i32mf2_m(...) __riscv_vlsseg2e32_v_i32mf2_tumu(__VA_ARGS__)

#define	vlsseg2e32_v_u32m1(...) __riscv_vlsseg2e32_v_u32m1(__VA_ARGS__)

#define	vlsseg2e32_v_u32m1_m(...) __riscv_vlsseg2e32_v_u32m1_tumu(__VA_ARGS__)

#define	vlsseg2e32_v_u32m2(...) __riscv_vlsseg2e32_v_u32m2(__VA_ARGS__)

#define	vlsseg2e32_v_u32m2_m(...) __riscv_vlsseg2e32_v_u32m2_tumu(__VA_ARGS__)

#define	vlsseg2e32_v_u32m4(...) __riscv_vlsseg2e32_v_u32m4(__VA_ARGS__)

#define	vlsseg2e32_v_u32m4_m(...) __riscv_vlsseg2e32_v_u32m4_tumu(__VA_ARGS__)

#define	vlsseg2e32_v_u32mf2(...) __riscv_vlsseg2e32_v_u32mf2(__VA_ARGS__)

#define	vlsseg2e32_v_u32mf2_m(...) __riscv_vlsseg2e32_v_u32mf2_tumu(__VA_ARGS__)

#define	vlsseg2e64_v_f64m1(...) __riscv_vlsseg2e64_v_f64m1(__VA_ARGS__)

#define	vlsseg2e64_v_f64m1_m(...) __riscv_vlsseg2e64_v_f64m1_tumu(__VA_ARGS__)

#define	vlsseg2e64_v_f64m2(...) __riscv_vlsseg2e64_v_f64m2(__VA_ARGS__)

#define	vlsseg2e64_v_f64m2_m(...) __riscv_vlsseg2e64_v_f64m2_tumu(__VA_ARGS__)

#define	vlsseg2e64_v_f64m4(...) __riscv_vlsseg2e64_v_f64m4(__VA_ARGS__)

#define	vlsseg2e64_v_f64m4_m(...) __riscv_vlsseg2e64_v_f64m4_tumu(__VA_ARGS__)

#define	vlsseg2e64_v_i64m1(...) __riscv_vlsseg2e64_v_i64m1(__VA_ARGS__)

#define	vlsseg2e64_v_i64m1_m(...) __riscv_vlsseg2e64_v_i64m1_tumu(__VA_ARGS__)

#define	vlsseg2e64_v_i64m2(...) __riscv_vlsseg2e64_v_i64m2(__VA_ARGS__)

#define	vlsseg2e64_v_i64m2_m(...) __riscv_vlsseg2e64_v_i64m2_tumu(__VA_ARGS__)

#define	vlsseg2e64_v_i64m4(...) __riscv_vlsseg2e64_v_i64m4(__VA_ARGS__)

#define	vlsseg2e64_v_i64m4_m(...) __riscv_vlsseg2e64_v_i64m4_tumu(__VA_ARGS__)

#define	vlsseg2e64_v_u64m1(...) __riscv_vlsseg2e64_v_u64m1(__VA_ARGS__)

#define	vlsseg2e64_v_u64m1_m(...) __riscv_vlsseg2e64_v_u64m1_tumu(__VA_ARGS__)

#define	vlsseg2e64_v_u64m2(...) __riscv_vlsseg2e64_v_u64m2(__VA_ARGS__)

#define	vlsseg2e64_v_u64m2_m(...) __riscv_vlsseg2e64_v_u64m2_tumu(__VA_ARGS__)

#define	vlsseg2e64_v_u64m4(...) __riscv_vlsseg2e64_v_u64m4(__VA_ARGS__)

#define	vlsseg2e64_v_u64m4_m(...) __riscv_vlsseg2e64_v_u64m4_tumu(__VA_ARGS__)

#define	vlsseg2e8_v_i8m1(...) __riscv_vlsseg2e8_v_i8m1(__VA_ARGS__)

#define	vlsseg2e8_v_i8m1_m(...) __riscv_vlsseg2e8_v_i8m1_tumu(__VA_ARGS__)

#define	vlsseg2e8_v_i8m2(...) __riscv_vlsseg2e8_v_i8m2(__VA_ARGS__)

#define	vlsseg2e8_v_i8m2_m(...) __riscv_vlsseg2e8_v_i8m2_tumu(__VA_ARGS__)

#define	vlsseg2e8_v_i8m4(...) __riscv_vlsseg2e8_v_i8m4(__VA_ARGS__)

#define	vlsseg2e8_v_i8m4_m(...) __riscv_vlsseg2e8_v_i8m4_tumu(__VA_ARGS__)

#define	vlsseg2e8_v_i8mf2(...) __riscv_vlsseg2e8_v_i8mf2(__VA_ARGS__)

#define	vlsseg2e8_v_i8mf2_m(...) __riscv_vlsseg2e8_v_i8mf2_tumu(__VA_ARGS__)

#define	vlsseg2e8_v_i8mf4(...) __riscv_vlsseg2e8_v_i8mf4(__VA_ARGS__)

#define	vlsseg2e8_v_i8mf4_m(...) __riscv_vlsseg2e8_v_i8mf4_tumu(__VA_ARGS__)

#define	vlsseg2e8_v_i8mf8(...) __riscv_vlsseg2e8_v_i8mf8(__VA_ARGS__)

#define	vlsseg2e8_v_i8mf8_m(...) __riscv_vlsseg2e8_v_i8mf8_tumu(__VA_ARGS__)

#define	vlsseg2e8_v_u8m1(...) __riscv_vlsseg2e8_v_u8m1(__VA_ARGS__)

#define	vlsseg2e8_v_u8m1_m(...) __riscv_vlsseg2e8_v_u8m1_tumu(__VA_ARGS__)

#define	vlsseg2e8_v_u8m2(...) __riscv_vlsseg2e8_v_u8m2(__VA_ARGS__)

#define	vlsseg2e8_v_u8m2_m(...) __riscv_vlsseg2e8_v_u8m2_tumu(__VA_ARGS__)

#define	vlsseg2e8_v_u8m4(...) __riscv_vlsseg2e8_v_u8m4(__VA_ARGS__)

#define	vlsseg2e8_v_u8m4_m(...) __riscv_vlsseg2e8_v_u8m4_tumu(__VA_ARGS__)

#define	vlsseg2e8_v_u8mf2(...) __riscv_vlsseg2e8_v_u8mf2(__VA_ARGS__)

#define	vlsseg2e8_v_u8mf2_m(...) __riscv_vlsseg2e8_v_u8mf2_tumu(__VA_ARGS__)

#define	vlsseg2e8_v_u8mf4(...) __riscv_vlsseg2e8_v_u8mf4(__VA_ARGS__)

#define	vlsseg2e8_v_u8mf4_m(...) __riscv_vlsseg2e8_v_u8mf4_tumu(__VA_ARGS__)

#define	vlsseg2e8_v_u8mf8(...) __riscv_vlsseg2e8_v_u8mf8(__VA_ARGS__)

#define	vlsseg2e8_v_u8mf8_m(...) __riscv_vlsseg2e8_v_u8mf8_tumu(__VA_ARGS__)

#define	vlsseg3e16_v_f16m1(...) __riscv_vlsseg3e16_v_f16m1(__VA_ARGS__)

#define	vlsseg3e16_v_f16m1_m(...) __riscv_vlsseg3e16_v_f16m1_tumu(__VA_ARGS__)

#define	vlsseg3e16_v_f16m2(...) __riscv_vlsseg3e16_v_f16m2(__VA_ARGS__)

#define	vlsseg3e16_v_f16m2_m(...) __riscv_vlsseg3e16_v_f16m2_tumu(__VA_ARGS__)

#define	vlsseg3e16_v_f16mf2(...) __riscv_vlsseg3e16_v_f16mf2(__VA_ARGS__)

#define	vlsseg3e16_v_f16mf2_m(...) __riscv_vlsseg3e16_v_f16mf2_tumu(__VA_ARGS__)

#define	vlsseg3e16_v_f16mf4(...) __riscv_vlsseg3e16_v_f16mf4(__VA_ARGS__)

#define	vlsseg3e16_v_f16mf4_m(...) __riscv_vlsseg3e16_v_f16mf4_tumu(__VA_ARGS__)

#define	vlsseg3e16_v_i16m1(...) __riscv_vlsseg3e16_v_i16m1(__VA_ARGS__)

#define	vlsseg3e16_v_i16m1_m(...) __riscv_vlsseg3e16_v_i16m1_tumu(__VA_ARGS__)

#define	vlsseg3e16_v_i16m2(...) __riscv_vlsseg3e16_v_i16m2(__VA_ARGS__)

#define	vlsseg3e16_v_i16m2_m(...) __riscv_vlsseg3e16_v_i16m2_tumu(__VA_ARGS__)

#define	vlsseg3e16_v_i16mf2(...) __riscv_vlsseg3e16_v_i16mf2(__VA_ARGS__)

#define	vlsseg3e16_v_i16mf2_m(...) __riscv_vlsseg3e16_v_i16mf2_tumu(__VA_ARGS__)

#define	vlsseg3e16_v_i16mf4(...) __riscv_vlsseg3e16_v_i16mf4(__VA_ARGS__)

#define	vlsseg3e16_v_i16mf4_m(...) __riscv_vlsseg3e16_v_i16mf4_tumu(__VA_ARGS__)

#define	vlsseg3e16_v_u16m1(...) __riscv_vlsseg3e16_v_u16m1(__VA_ARGS__)

#define	vlsseg3e16_v_u16m1_m(...) __riscv_vlsseg3e16_v_u16m1_tumu(__VA_ARGS__)

#define	vlsseg3e16_v_u16m2(...) __riscv_vlsseg3e16_v_u16m2(__VA_ARGS__)

#define	vlsseg3e16_v_u16m2_m(...) __riscv_vlsseg3e16_v_u16m2_tumu(__VA_ARGS__)

#define	vlsseg3e16_v_u16mf2(...) __riscv_vlsseg3e16_v_u16mf2(__VA_ARGS__)

#define	vlsseg3e16_v_u16mf2_m(...) __riscv_vlsseg3e16_v_u16mf2_tumu(__VA_ARGS__)

#define	vlsseg3e16_v_u16mf4(...) __riscv_vlsseg3e16_v_u16mf4(__VA_ARGS__)

#define	vlsseg3e16_v_u16mf4_m(...) __riscv_vlsseg3e16_v_u16mf4_tumu(__VA_ARGS__)

#define	vlsseg3e32_v_f32m1(...) __riscv_vlsseg3e32_v_f32m1(__VA_ARGS__)

#define	vlsseg3e32_v_f32m1_m(...) __riscv_vlsseg3e32_v_f32m1_tumu(__VA_ARGS__)

#define	vlsseg3e32_v_f32m2(...) __riscv_vlsseg3e32_v_f32m2(__VA_ARGS__)

#define	vlsseg3e32_v_f32m2_m(...) __riscv_vlsseg3e32_v_f32m2_tumu(__VA_ARGS__)

#define	vlsseg3e32_v_f32mf2(...) __riscv_vlsseg3e32_v_f32mf2(__VA_ARGS__)

#define	vlsseg3e32_v_f32mf2_m(...) __riscv_vlsseg3e32_v_f32mf2_tumu(__VA_ARGS__)

#define	vlsseg3e32_v_i32m1(...) __riscv_vlsseg3e32_v_i32m1(__VA_ARGS__)

#define	vlsseg3e32_v_i32m1_m(...) __riscv_vlsseg3e32_v_i32m1_tumu(__VA_ARGS__)

#define	vlsseg3e32_v_i32m2(...) __riscv_vlsseg3e32_v_i32m2(__VA_ARGS__)

#define	vlsseg3e32_v_i32m2_m(...) __riscv_vlsseg3e32_v_i32m2_tumu(__VA_ARGS__)

#define	vlsseg3e32_v_i32mf2(...) __riscv_vlsseg3e32_v_i32mf2(__VA_ARGS__)

#define	vlsseg3e32_v_i32mf2_m(...) __riscv_vlsseg3e32_v_i32mf2_tumu(__VA_ARGS__)

#define	vlsseg3e32_v_u32m1(...) __riscv_vlsseg3e32_v_u32m1(__VA_ARGS__)

#define	vlsseg3e32_v_u32m1_m(...) __riscv_vlsseg3e32_v_u32m1_tumu(__VA_ARGS__)

#define	vlsseg3e32_v_u32m2(...) __riscv_vlsseg3e32_v_u32m2(__VA_ARGS__)

#define	vlsseg3e32_v_u32m2_m(...) __riscv_vlsseg3e32_v_u32m2_tumu(__VA_ARGS__)

#define	vlsseg3e32_v_u32mf2(...) __riscv_vlsseg3e32_v_u32mf2(__VA_ARGS__)

#define	vlsseg3e32_v_u32mf2_m(...) __riscv_vlsseg3e32_v_u32mf2_tumu(__VA_ARGS__)

#define	vlsseg3e64_v_f64m1(...) __riscv_vlsseg3e64_v_f64m1(__VA_ARGS__)

#define	vlsseg3e64_v_f64m1_m(...) __riscv_vlsseg3e64_v_f64m1_tumu(__VA_ARGS__)

#define	vlsseg3e64_v_f64m2(...) __riscv_vlsseg3e64_v_f64m2(__VA_ARGS__)

#define	vlsseg3e64_v_f64m2_m(...) __riscv_vlsseg3e64_v_f64m2_tumu(__VA_ARGS__)

#define	vlsseg3e64_v_i64m1(...) __riscv_vlsseg3e64_v_i64m1(__VA_ARGS__)

#define	vlsseg3e64_v_i64m1_m(...) __riscv_vlsseg3e64_v_i64m1_tumu(__VA_ARGS__)

#define	vlsseg3e64_v_i64m2(...) __riscv_vlsseg3e64_v_i64m2(__VA_ARGS__)

#define	vlsseg3e64_v_i64m2_m(...) __riscv_vlsseg3e64_v_i64m2_tumu(__VA_ARGS__)

#define	vlsseg3e64_v_u64m1(...) __riscv_vlsseg3e64_v_u64m1(__VA_ARGS__)

#define	vlsseg3e64_v_u64m1_m(...) __riscv_vlsseg3e64_v_u64m1_tumu(__VA_ARGS__)

#define	vlsseg3e64_v_u64m2(...) __riscv_vlsseg3e64_v_u64m2(__VA_ARGS__)

#define	vlsseg3e64_v_u64m2_m(...) __riscv_vlsseg3e64_v_u64m2_tumu(__VA_ARGS__)

#define	vlsseg3e8_v_i8m1(...) __riscv_vlsseg3e8_v_i8m1(__VA_ARGS__)

#define	vlsseg3e8_v_i8m1_m(...) __riscv_vlsseg3e8_v_i8m1_tumu(__VA_ARGS__)

#define	vlsseg3e8_v_i8m2(...) __riscv_vlsseg3e8_v_i8m2(__VA_ARGS__)

#define	vlsseg3e8_v_i8m2_m(...) __riscv_vlsseg3e8_v_i8m2_tumu(__VA_ARGS__)

#define	vlsseg3e8_v_i8mf2(...) __riscv_vlsseg3e8_v_i8mf2(__VA_ARGS__)

#define	vlsseg3e8_v_i8mf2_m(...) __riscv_vlsseg3e8_v_i8mf2_tumu(__VA_ARGS__)

#define	vlsseg3e8_v_i8mf4(...) __riscv_vlsseg3e8_v_i8mf4(__VA_ARGS__)

#define	vlsseg3e8_v_i8mf4_m(...) __riscv_vlsseg3e8_v_i8mf4_tumu(__VA_ARGS__)

#define	vlsseg3e8_v_i8mf8(...) __riscv_vlsseg3e8_v_i8mf8(__VA_ARGS__)

#define	vlsseg3e8_v_i8mf8_m(...) __riscv_vlsseg3e8_v_i8mf8_tumu(__VA_ARGS__)

#define	vlsseg3e8_v_u8m1(...) __riscv_vlsseg3e8_v_u8m1(__VA_ARGS__)

#define	vlsseg3e8_v_u8m1_m(...) __riscv_vlsseg3e8_v_u8m1_tumu(__VA_ARGS__)

#define	vlsseg3e8_v_u8m2(...) __riscv_vlsseg3e8_v_u8m2(__VA_ARGS__)

#define	vlsseg3e8_v_u8m2_m(...) __riscv_vlsseg3e8_v_u8m2_tumu(__VA_ARGS__)

#define	vlsseg3e8_v_u8mf2(...) __riscv_vlsseg3e8_v_u8mf2(__VA_ARGS__)

#define	vlsseg3e8_v_u8mf2_m(...) __riscv_vlsseg3e8_v_u8mf2_tumu(__VA_ARGS__)

#define	vlsseg3e8_v_u8mf4(...) __riscv_vlsseg3e8_v_u8mf4(__VA_ARGS__)

#define	vlsseg3e8_v_u8mf4_m(...) __riscv_vlsseg3e8_v_u8mf4_tumu(__VA_ARGS__)

#define	vlsseg3e8_v_u8mf8(...) __riscv_vlsseg3e8_v_u8mf8(__VA_ARGS__)

#define	vlsseg3e8_v_u8mf8_m(...) __riscv_vlsseg3e8_v_u8mf8_tumu(__VA_ARGS__)

#define	vlsseg4e16_v_f16m1(...) __riscv_vlsseg4e16_v_f16m1(__VA_ARGS__)

#define	vlsseg4e16_v_f16m1_m(...) __riscv_vlsseg4e16_v_f16m1_tumu(__VA_ARGS__)

#define	vlsseg4e16_v_f16m2(...) __riscv_vlsseg4e16_v_f16m2(__VA_ARGS__)

#define	vlsseg4e16_v_f16m2_m(...) __riscv_vlsseg4e16_v_f16m2_tumu(__VA_ARGS__)

#define	vlsseg4e16_v_f16mf2(...) __riscv_vlsseg4e16_v_f16mf2(__VA_ARGS__)

#define	vlsseg4e16_v_f16mf2_m(...) __riscv_vlsseg4e16_v_f16mf2_tumu(__VA_ARGS__)

#define	vlsseg4e16_v_f16mf4(...) __riscv_vlsseg4e16_v_f16mf4(__VA_ARGS__)

#define	vlsseg4e16_v_f16mf4_m(...) __riscv_vlsseg4e16_v_f16mf4_tumu(__VA_ARGS__)

#define	vlsseg4e16_v_i16m1(...) __riscv_vlsseg4e16_v_i16m1(__VA_ARGS__)

#define	vlsseg4e16_v_i16m1_m(...) __riscv_vlsseg4e16_v_i16m1_tumu(__VA_ARGS__)

#define	vlsseg4e16_v_i16m2(...) __riscv_vlsseg4e16_v_i16m2(__VA_ARGS__)

#define	vlsseg4e16_v_i16m2_m(...) __riscv_vlsseg4e16_v_i16m2_tumu(__VA_ARGS__)

#define	vlsseg4e16_v_i16mf2(...) __riscv_vlsseg4e16_v_i16mf2(__VA_ARGS__)

#define	vlsseg4e16_v_i16mf2_m(...) __riscv_vlsseg4e16_v_i16mf2_tumu(__VA_ARGS__)

#define	vlsseg4e16_v_i16mf4(...) __riscv_vlsseg4e16_v_i16mf4(__VA_ARGS__)

#define	vlsseg4e16_v_i16mf4_m(...) __riscv_vlsseg4e16_v_i16mf4_tumu(__VA_ARGS__)

#define	vlsseg4e16_v_u16m1(...) __riscv_vlsseg4e16_v_u16m1(__VA_ARGS__)

#define	vlsseg4e16_v_u16m1_m(...) __riscv_vlsseg4e16_v_u16m1_tumu(__VA_ARGS__)

#define	vlsseg4e16_v_u16m2(...) __riscv_vlsseg4e16_v_u16m2(__VA_ARGS__)

#define	vlsseg4e16_v_u16m2_m(...) __riscv_vlsseg4e16_v_u16m2_tumu(__VA_ARGS__)

#define	vlsseg4e16_v_u16mf2(...) __riscv_vlsseg4e16_v_u16mf2(__VA_ARGS__)

#define	vlsseg4e16_v_u16mf2_m(...) __riscv_vlsseg4e16_v_u16mf2_tumu(__VA_ARGS__)

#define	vlsseg4e16_v_u16mf4(...) __riscv_vlsseg4e16_v_u16mf4(__VA_ARGS__)

#define	vlsseg4e16_v_u16mf4_m(...) __riscv_vlsseg4e16_v_u16mf4_tumu(__VA_ARGS__)

#define	vlsseg4e32_v_f32m1(...) __riscv_vlsseg4e32_v_f32m1(__VA_ARGS__)

#define	vlsseg4e32_v_f32m1_m(...) __riscv_vlsseg4e32_v_f32m1_tumu(__VA_ARGS__)

#define	vlsseg4e32_v_f32m2(...) __riscv_vlsseg4e32_v_f32m2(__VA_ARGS__)

#define	vlsseg4e32_v_f32m2_m(...) __riscv_vlsseg4e32_v_f32m2_tumu(__VA_ARGS__)

#define	vlsseg4e32_v_f32mf2(...) __riscv_vlsseg4e32_v_f32mf2(__VA_ARGS__)

#define	vlsseg4e32_v_f32mf2_m(...) __riscv_vlsseg4e32_v_f32mf2_tumu(__VA_ARGS__)

#define	vlsseg4e32_v_i32m1(...) __riscv_vlsseg4e32_v_i32m1(__VA_ARGS__)

#define	vlsseg4e32_v_i32m1_m(...) __riscv_vlsseg4e32_v_i32m1_tumu(__VA_ARGS__)

#define	vlsseg4e32_v_i32m2(...) __riscv_vlsseg4e32_v_i32m2(__VA_ARGS__)

#define	vlsseg4e32_v_i32m2_m(...) __riscv_vlsseg4e32_v_i32m2_tumu(__VA_ARGS__)

#define	vlsseg4e32_v_i32mf2(...) __riscv_vlsseg4e32_v_i32mf2(__VA_ARGS__)

#define	vlsseg4e32_v_i32mf2_m(...) __riscv_vlsseg4e32_v_i32mf2_tumu(__VA_ARGS__)

#define	vlsseg4e32_v_u32m1(...) __riscv_vlsseg4e32_v_u32m1(__VA_ARGS__)

#define	vlsseg4e32_v_u32m1_m(...) __riscv_vlsseg4e32_v_u32m1_tumu(__VA_ARGS__)

#define	vlsseg4e32_v_u32m2(...) __riscv_vlsseg4e32_v_u32m2(__VA_ARGS__)

#define	vlsseg4e32_v_u32m2_m(...) __riscv_vlsseg4e32_v_u32m2_tumu(__VA_ARGS__)

#define	vlsseg4e32_v_u32mf2(...) __riscv_vlsseg4e32_v_u32mf2(__VA_ARGS__)

#define	vlsseg4e32_v_u32mf2_m(...) __riscv_vlsseg4e32_v_u32mf2_tumu(__VA_ARGS__)

#define	vlsseg4e64_v_f64m1(...) __riscv_vlsseg4e64_v_f64m1(__VA_ARGS__)

#define	vlsseg4e64_v_f64m1_m(...) __riscv_vlsseg4e64_v_f64m1_tumu(__VA_ARGS__)

#define	vlsseg4e64_v_f64m2(...) __riscv_vlsseg4e64_v_f64m2(__VA_ARGS__)

#define	vlsseg4e64_v_f64m2_m(...) __riscv_vlsseg4e64_v_f64m2_tumu(__VA_ARGS__)

#define	vlsseg4e64_v_i64m1(...) __riscv_vlsseg4e64_v_i64m1(__VA_ARGS__)

#define	vlsseg4e64_v_i64m1_m(...) __riscv_vlsseg4e64_v_i64m1_tumu(__VA_ARGS__)

#define	vlsseg4e64_v_i64m2(...) __riscv_vlsseg4e64_v_i64m2(__VA_ARGS__)

#define	vlsseg4e64_v_i64m2_m(...) __riscv_vlsseg4e64_v_i64m2_tumu(__VA_ARGS__)

#define	vlsseg4e64_v_u64m1(...) __riscv_vlsseg4e64_v_u64m1(__VA_ARGS__)

#define	vlsseg4e64_v_u64m1_m(...) __riscv_vlsseg4e64_v_u64m1_tumu(__VA_ARGS__)

#define	vlsseg4e64_v_u64m2(...) __riscv_vlsseg4e64_v_u64m2(__VA_ARGS__)

#define	vlsseg4e64_v_u64m2_m(...) __riscv_vlsseg4e64_v_u64m2_tumu(__VA_ARGS__)

#define	vlsseg4e8_v_i8m1(...) __riscv_vlsseg4e8_v_i8m1(__VA_ARGS__)

#define	vlsseg4e8_v_i8m1_m(...) __riscv_vlsseg4e8_v_i8m1_tumu(__VA_ARGS__)

#define	vlsseg4e8_v_i8m2(...) __riscv_vlsseg4e8_v_i8m2(__VA_ARGS__)

#define	vlsseg4e8_v_i8m2_m(...) __riscv_vlsseg4e8_v_i8m2_tumu(__VA_ARGS__)

#define	vlsseg4e8_v_i8mf2(...) __riscv_vlsseg4e8_v_i8mf2(__VA_ARGS__)

#define	vlsseg4e8_v_i8mf2_m(...) __riscv_vlsseg4e8_v_i8mf2_tumu(__VA_ARGS__)

#define	vlsseg4e8_v_i8mf4(...) __riscv_vlsseg4e8_v_i8mf4(__VA_ARGS__)

#define	vlsseg4e8_v_i8mf4_m(...) __riscv_vlsseg4e8_v_i8mf4_tumu(__VA_ARGS__)

#define	vlsseg4e8_v_i8mf8(...) __riscv_vlsseg4e8_v_i8mf8(__VA_ARGS__)

#define	vlsseg4e8_v_i8mf8_m(...) __riscv_vlsseg4e8_v_i8mf8_tumu(__VA_ARGS__)

#define	vlsseg4e8_v_u8m1(...) __riscv_vlsseg4e8_v_u8m1(__VA_ARGS__)

#define	vlsseg4e8_v_u8m1_m(...) __riscv_vlsseg4e8_v_u8m1_tumu(__VA_ARGS__)

#define	vlsseg4e8_v_u8m2(...) __riscv_vlsseg4e8_v_u8m2(__VA_ARGS__)

#define	vlsseg4e8_v_u8m2_m(...) __riscv_vlsseg4e8_v_u8m2_tumu(__VA_ARGS__)

#define	vlsseg4e8_v_u8mf2(...) __riscv_vlsseg4e8_v_u8mf2(__VA_ARGS__)

#define	vlsseg4e8_v_u8mf2_m(...) __riscv_vlsseg4e8_v_u8mf2_tumu(__VA_ARGS__)

#define	vlsseg4e8_v_u8mf4(...) __riscv_vlsseg4e8_v_u8mf4(__VA_ARGS__)

#define	vlsseg4e8_v_u8mf4_m(...) __riscv_vlsseg4e8_v_u8mf4_tumu(__VA_ARGS__)

#define	vlsseg4e8_v_u8mf8(...) __riscv_vlsseg4e8_v_u8mf8(__VA_ARGS__)

#define	vlsseg4e8_v_u8mf8_m(...) __riscv_vlsseg4e8_v_u8mf8_tumu(__VA_ARGS__)

#define	vlsseg5e16_v_f16m1(...) __riscv_vlsseg5e16_v_f16m1(__VA_ARGS__)

#define	vlsseg5e16_v_f16m1_m(...) __riscv_vlsseg5e16_v_f16m1_tumu(__VA_ARGS__)

#define	vlsseg5e16_v_f16mf2(...) __riscv_vlsseg5e16_v_f16mf2(__VA_ARGS__)

#define	vlsseg5e16_v_f16mf2_m(...) __riscv_vlsseg5e16_v_f16mf2_tumu(__VA_ARGS__)

#define	vlsseg5e16_v_f16mf4(...) __riscv_vlsseg5e16_v_f16mf4(__VA_ARGS__)

#define	vlsseg5e16_v_f16mf4_m(...) __riscv_vlsseg5e16_v_f16mf4_tumu(__VA_ARGS__)

#define	vlsseg5e16_v_i16m1(...) __riscv_vlsseg5e16_v_i16m1(__VA_ARGS__)

#define	vlsseg5e16_v_i16m1_m(...) __riscv_vlsseg5e16_v_i16m1_tumu(__VA_ARGS__)

#define	vlsseg5e16_v_i16mf2(...) __riscv_vlsseg5e16_v_i16mf2(__VA_ARGS__)

#define	vlsseg5e16_v_i16mf2_m(...) __riscv_vlsseg5e16_v_i16mf2_tumu(__VA_ARGS__)

#define	vlsseg5e16_v_i16mf4(...) __riscv_vlsseg5e16_v_i16mf4(__VA_ARGS__)

#define	vlsseg5e16_v_i16mf4_m(...) __riscv_vlsseg5e16_v_i16mf4_tumu(__VA_ARGS__)

#define	vlsseg5e16_v_u16m1(...) __riscv_vlsseg5e16_v_u16m1(__VA_ARGS__)

#define	vlsseg5e16_v_u16m1_m(...) __riscv_vlsseg5e16_v_u16m1_tumu(__VA_ARGS__)

#define	vlsseg5e16_v_u16mf2(...) __riscv_vlsseg5e16_v_u16mf2(__VA_ARGS__)

#define	vlsseg5e16_v_u16mf2_m(...) __riscv_vlsseg5e16_v_u16mf2_tumu(__VA_ARGS__)

#define	vlsseg5e16_v_u16mf4(...) __riscv_vlsseg5e16_v_u16mf4(__VA_ARGS__)

#define	vlsseg5e16_v_u16mf4_m(...) __riscv_vlsseg5e16_v_u16mf4_tumu(__VA_ARGS__)

#define	vlsseg5e32_v_f32m1(...) __riscv_vlsseg5e32_v_f32m1(__VA_ARGS__)

#define	vlsseg5e32_v_f32m1_m(...) __riscv_vlsseg5e32_v_f32m1_tumu(__VA_ARGS__)

#define	vlsseg5e32_v_f32mf2(...) __riscv_vlsseg5e32_v_f32mf2(__VA_ARGS__)

#define	vlsseg5e32_v_f32mf2_m(...) __riscv_vlsseg5e32_v_f32mf2_tumu(__VA_ARGS__)

#define	vlsseg5e32_v_i32m1(...) __riscv_vlsseg5e32_v_i32m1(__VA_ARGS__)

#define	vlsseg5e32_v_i32m1_m(...) __riscv_vlsseg5e32_v_i32m1_tumu(__VA_ARGS__)

#define	vlsseg5e32_v_i32mf2(...) __riscv_vlsseg5e32_v_i32mf2(__VA_ARGS__)

#define	vlsseg5e32_v_i32mf2_m(...) __riscv_vlsseg5e32_v_i32mf2_tumu(__VA_ARGS__)

#define	vlsseg5e32_v_u32m1(...) __riscv_vlsseg5e32_v_u32m1(__VA_ARGS__)

#define	vlsseg5e32_v_u32m1_m(...) __riscv_vlsseg5e32_v_u32m1_tumu(__VA_ARGS__)

#define	vlsseg5e32_v_u32mf2(...) __riscv_vlsseg5e32_v_u32mf2(__VA_ARGS__)

#define	vlsseg5e32_v_u32mf2_m(...) __riscv_vlsseg5e32_v_u32mf2_tumu(__VA_ARGS__)

#define	vlsseg5e64_v_f64m1(...) __riscv_vlsseg5e64_v_f64m1(__VA_ARGS__)

#define	vlsseg5e64_v_f64m1_m(...) __riscv_vlsseg5e64_v_f64m1_tumu(__VA_ARGS__)

#define	vlsseg5e64_v_i64m1(...) __riscv_vlsseg5e64_v_i64m1(__VA_ARGS__)

#define	vlsseg5e64_v_i64m1_m(...) __riscv_vlsseg5e64_v_i64m1_tumu(__VA_ARGS__)

#define	vlsseg5e64_v_u64m1(...) __riscv_vlsseg5e64_v_u64m1(__VA_ARGS__)

#define	vlsseg5e64_v_u64m1_m(...) __riscv_vlsseg5e64_v_u64m1_tumu(__VA_ARGS__)

#define	vlsseg5e8_v_i8m1(...) __riscv_vlsseg5e8_v_i8m1(__VA_ARGS__)

#define	vlsseg5e8_v_i8m1_m(...) __riscv_vlsseg5e8_v_i8m1_tumu(__VA_ARGS__)

#define	vlsseg5e8_v_i8mf2(...) __riscv_vlsseg5e8_v_i8mf2(__VA_ARGS__)

#define	vlsseg5e8_v_i8mf2_m(...) __riscv_vlsseg5e8_v_i8mf2_tumu(__VA_ARGS__)

#define	vlsseg5e8_v_i8mf4(...) __riscv_vlsseg5e8_v_i8mf4(__VA_ARGS__)

#define	vlsseg5e8_v_i8mf4_m(...) __riscv_vlsseg5e8_v_i8mf4_tumu(__VA_ARGS__)

#define	vlsseg5e8_v_i8mf8(...) __riscv_vlsseg5e8_v_i8mf8(__VA_ARGS__)

#define	vlsseg5e8_v_i8mf8_m(...) __riscv_vlsseg5e8_v_i8mf8_tumu(__VA_ARGS__)

#define	vlsseg5e8_v_u8m1(...) __riscv_vlsseg5e8_v_u8m1(__VA_ARGS__)

#define	vlsseg5e8_v_u8m1_m(...) __riscv_vlsseg5e8_v_u8m1_tumu(__VA_ARGS__)

#define	vlsseg5e8_v_u8mf2(...) __riscv_vlsseg5e8_v_u8mf2(__VA_ARGS__)

#define	vlsseg5e8_v_u8mf2_m(...) __riscv_vlsseg5e8_v_u8mf2_tumu(__VA_ARGS__)

#define	vlsseg5e8_v_u8mf4(...) __riscv_vlsseg5e8_v_u8mf4(__VA_ARGS__)

#define	vlsseg5e8_v_u8mf4_m(...) __riscv_vlsseg5e8_v_u8mf4_tumu(__VA_ARGS__)

#define	vlsseg5e8_v_u8mf8(...) __riscv_vlsseg5e8_v_u8mf8(__VA_ARGS__)

#define	vlsseg5e8_v_u8mf8_m(...) __riscv_vlsseg5e8_v_u8mf8_tumu(__VA_ARGS__)

#define	vlsseg6e16_v_f16m1(...) __riscv_vlsseg6e16_v_f16m1(__VA_ARGS__)

#define	vlsseg6e16_v_f16m1_m(...) __riscv_vlsseg6e16_v_f16m1_tumu(__VA_ARGS__)

#define	vlsseg6e16_v_f16mf2(...) __riscv_vlsseg6e16_v_f16mf2(__VA_ARGS__)

#define	vlsseg6e16_v_f16mf2_m(...) __riscv_vlsseg6e16_v_f16mf2_tumu(__VA_ARGS__)

#define	vlsseg6e16_v_f16mf4(...) __riscv_vlsseg6e16_v_f16mf4(__VA_ARGS__)

#define	vlsseg6e16_v_f16mf4_m(...) __riscv_vlsseg6e16_v_f16mf4_tumu(__VA_ARGS__)

#define	vlsseg6e16_v_i16m1(...) __riscv_vlsseg6e16_v_i16m1(__VA_ARGS__)

#define	vlsseg6e16_v_i16m1_m(...) __riscv_vlsseg6e16_v_i16m1_tumu(__VA_ARGS__)

#define	vlsseg6e16_v_i16mf2(...) __riscv_vlsseg6e16_v_i16mf2(__VA_ARGS__)

#define	vlsseg6e16_v_i16mf2_m(...) __riscv_vlsseg6e16_v_i16mf2_tumu(__VA_ARGS__)

#define	vlsseg6e16_v_i16mf4(...) __riscv_vlsseg6e16_v_i16mf4(__VA_ARGS__)

#define	vlsseg6e16_v_i16mf4_m(...) __riscv_vlsseg6e16_v_i16mf4_tumu(__VA_ARGS__)

#define	vlsseg6e16_v_u16m1(...) __riscv_vlsseg6e16_v_u16m1(__VA_ARGS__)

#define	vlsseg6e16_v_u16m1_m(...) __riscv_vlsseg6e16_v_u16m1_tumu(__VA_ARGS__)

#define	vlsseg6e16_v_u16mf2(...) __riscv_vlsseg6e16_v_u16mf2(__VA_ARGS__)

#define	vlsseg6e16_v_u16mf2_m(...) __riscv_vlsseg6e16_v_u16mf2_tumu(__VA_ARGS__)

#define	vlsseg6e16_v_u16mf4(...) __riscv_vlsseg6e16_v_u16mf4(__VA_ARGS__)

#define	vlsseg6e16_v_u16mf4_m(...) __riscv_vlsseg6e16_v_u16mf4_tumu(__VA_ARGS__)

#define	vlsseg6e32_v_f32m1(...) __riscv_vlsseg6e32_v_f32m1(__VA_ARGS__)

#define	vlsseg6e32_v_f32m1_m(...) __riscv_vlsseg6e32_v_f32m1_tumu(__VA_ARGS__)

#define	vlsseg6e32_v_f32mf2(...) __riscv_vlsseg6e32_v_f32mf2(__VA_ARGS__)

#define	vlsseg6e32_v_f32mf2_m(...) __riscv_vlsseg6e32_v_f32mf2_tumu(__VA_ARGS__)

#define	vlsseg6e32_v_i32m1(...) __riscv_vlsseg6e32_v_i32m1(__VA_ARGS__)

#define	vlsseg6e32_v_i32m1_m(...) __riscv_vlsseg6e32_v_i32m1_tumu(__VA_ARGS__)

#define	vlsseg6e32_v_i32mf2(...) __riscv_vlsseg6e32_v_i32mf2(__VA_ARGS__)

#define	vlsseg6e32_v_i32mf2_m(...) __riscv_vlsseg6e32_v_i32mf2_tumu(__VA_ARGS__)

#define	vlsseg6e32_v_u32m1(...) __riscv_vlsseg6e32_v_u32m1(__VA_ARGS__)

#define	vlsseg6e32_v_u32m1_m(...) __riscv_vlsseg6e32_v_u32m1_tumu(__VA_ARGS__)

#define	vlsseg6e32_v_u32mf2(...) __riscv_vlsseg6e32_v_u32mf2(__VA_ARGS__)

#define	vlsseg6e32_v_u32mf2_m(...) __riscv_vlsseg6e32_v_u32mf2_tumu(__VA_ARGS__)

#define	vlsseg6e64_v_f64m1(...) __riscv_vlsseg6e64_v_f64m1(__VA_ARGS__)

#define	vlsseg6e64_v_f64m1_m(...) __riscv_vlsseg6e64_v_f64m1_tumu(__VA_ARGS__)

#define	vlsseg6e64_v_i64m1(...) __riscv_vlsseg6e64_v_i64m1(__VA_ARGS__)

#define	vlsseg6e64_v_i64m1_m(...) __riscv_vlsseg6e64_v_i64m1_tumu(__VA_ARGS__)

#define	vlsseg6e64_v_u64m1(...) __riscv_vlsseg6e64_v_u64m1(__VA_ARGS__)

#define	vlsseg6e64_v_u64m1_m(...) __riscv_vlsseg6e64_v_u64m1_tumu(__VA_ARGS__)

#define	vlsseg6e8_v_i8m1(...) __riscv_vlsseg6e8_v_i8m1(__VA_ARGS__)

#define	vlsseg6e8_v_i8m1_m(...) __riscv_vlsseg6e8_v_i8m1_tumu(__VA_ARGS__)

#define	vlsseg6e8_v_i8mf2(...) __riscv_vlsseg6e8_v_i8mf2(__VA_ARGS__)

#define	vlsseg6e8_v_i8mf2_m(...) __riscv_vlsseg6e8_v_i8mf2_tumu(__VA_ARGS__)

#define	vlsseg6e8_v_i8mf4(...) __riscv_vlsseg6e8_v_i8mf4(__VA_ARGS__)

#define	vlsseg6e8_v_i8mf4_m(...) __riscv_vlsseg6e8_v_i8mf4_tumu(__VA_ARGS__)

#define	vlsseg6e8_v_i8mf8(...) __riscv_vlsseg6e8_v_i8mf8(__VA_ARGS__)

#define	vlsseg6e8_v_i8mf8_m(...) __riscv_vlsseg6e8_v_i8mf8_tumu(__VA_ARGS__)

#define	vlsseg6e8_v_u8m1(...) __riscv_vlsseg6e8_v_u8m1(__VA_ARGS__)

#define	vlsseg6e8_v_u8m1_m(...) __riscv_vlsseg6e8_v_u8m1_tumu(__VA_ARGS__)

#define	vlsseg6e8_v_u8mf2(...) __riscv_vlsseg6e8_v_u8mf2(__VA_ARGS__)

#define	vlsseg6e8_v_u8mf2_m(...) __riscv_vlsseg6e8_v_u8mf2_tumu(__VA_ARGS__)

#define	vlsseg6e8_v_u8mf4(...) __riscv_vlsseg6e8_v_u8mf4(__VA_ARGS__)

#define	vlsseg6e8_v_u8mf4_m(...) __riscv_vlsseg6e8_v_u8mf4_tumu(__VA_ARGS__)

#define	vlsseg6e8_v_u8mf8(...) __riscv_vlsseg6e8_v_u8mf8(__VA_ARGS__)

#define	vlsseg6e8_v_u8mf8_m(...) __riscv_vlsseg6e8_v_u8mf8_tumu(__VA_ARGS__)

#define	vlsseg7e16_v_f16m1(...) __riscv_vlsseg7e16_v_f16m1(__VA_ARGS__)

#define	vlsseg7e16_v_f16m1_m(...) __riscv_vlsseg7e16_v_f16m1_tumu(__VA_ARGS__)

#define	vlsseg7e16_v_f16mf2(...) __riscv_vlsseg7e16_v_f16mf2(__VA_ARGS__)

#define	vlsseg7e16_v_f16mf2_m(...) __riscv_vlsseg7e16_v_f16mf2_tumu(__VA_ARGS__)

#define	vlsseg7e16_v_f16mf4(...) __riscv_vlsseg7e16_v_f16mf4(__VA_ARGS__)

#define	vlsseg7e16_v_f16mf4_m(...) __riscv_vlsseg7e16_v_f16mf4_tumu(__VA_ARGS__)

#define	vlsseg7e16_v_i16m1(...) __riscv_vlsseg7e16_v_i16m1(__VA_ARGS__)

#define	vlsseg7e16_v_i16m1_m(...) __riscv_vlsseg7e16_v_i16m1_tumu(__VA_ARGS__)

#define	vlsseg7e16_v_i16mf2(...) __riscv_vlsseg7e16_v_i16mf2(__VA_ARGS__)

#define	vlsseg7e16_v_i16mf2_m(...) __riscv_vlsseg7e16_v_i16mf2_tumu(__VA_ARGS__)

#define	vlsseg7e16_v_i16mf4(...) __riscv_vlsseg7e16_v_i16mf4(__VA_ARGS__)

#define	vlsseg7e16_v_i16mf4_m(...) __riscv_vlsseg7e16_v_i16mf4_tumu(__VA_ARGS__)

#define	vlsseg7e16_v_u16m1(...) __riscv_vlsseg7e16_v_u16m1(__VA_ARGS__)

#define	vlsseg7e16_v_u16m1_m(...) __riscv_vlsseg7e16_v_u16m1_tumu(__VA_ARGS__)

#define	vlsseg7e16_v_u16mf2(...) __riscv_vlsseg7e16_v_u16mf2(__VA_ARGS__)

#define	vlsseg7e16_v_u16mf2_m(...) __riscv_vlsseg7e16_v_u16mf2_tumu(__VA_ARGS__)

#define	vlsseg7e16_v_u16mf4(...) __riscv_vlsseg7e16_v_u16mf4(__VA_ARGS__)

#define	vlsseg7e16_v_u16mf4_m(...) __riscv_vlsseg7e16_v_u16mf4_tumu(__VA_ARGS__)

#define	vlsseg7e32_v_f32m1(...) __riscv_vlsseg7e32_v_f32m1(__VA_ARGS__)

#define	vlsseg7e32_v_f32m1_m(...) __riscv_vlsseg7e32_v_f32m1_tumu(__VA_ARGS__)

#define	vlsseg7e32_v_f32mf2(...) __riscv_vlsseg7e32_v_f32mf2(__VA_ARGS__)

#define	vlsseg7e32_v_f32mf2_m(...) __riscv_vlsseg7e32_v_f32mf2_tumu(__VA_ARGS__)

#define	vlsseg7e32_v_i32m1(...) __riscv_vlsseg7e32_v_i32m1(__VA_ARGS__)

#define	vlsseg7e32_v_i32m1_m(...) __riscv_vlsseg7e32_v_i32m1_tumu(__VA_ARGS__)

#define	vlsseg7e32_v_i32mf2(...) __riscv_vlsseg7e32_v_i32mf2(__VA_ARGS__)

#define	vlsseg7e32_v_i32mf2_m(...) __riscv_vlsseg7e32_v_i32mf2_tumu(__VA_ARGS__)

#define	vlsseg7e32_v_u32m1(...) __riscv_vlsseg7e32_v_u32m1(__VA_ARGS__)

#define	vlsseg7e32_v_u32m1_m(...) __riscv_vlsseg7e32_v_u32m1_tumu(__VA_ARGS__)

#define	vlsseg7e32_v_u32mf2(...) __riscv_vlsseg7e32_v_u32mf2(__VA_ARGS__)

#define	vlsseg7e32_v_u32mf2_m(...) __riscv_vlsseg7e32_v_u32mf2_tumu(__VA_ARGS__)

#define	vlsseg7e64_v_f64m1(...) __riscv_vlsseg7e64_v_f64m1(__VA_ARGS__)

#define	vlsseg7e64_v_f64m1_m(...) __riscv_vlsseg7e64_v_f64m1_tumu(__VA_ARGS__)

#define	vlsseg7e64_v_i64m1(...) __riscv_vlsseg7e64_v_i64m1(__VA_ARGS__)

#define	vlsseg7e64_v_i64m1_m(...) __riscv_vlsseg7e64_v_i64m1_tumu(__VA_ARGS__)

#define	vlsseg7e64_v_u64m1(...) __riscv_vlsseg7e64_v_u64m1(__VA_ARGS__)

#define	vlsseg7e64_v_u64m1_m(...) __riscv_vlsseg7e64_v_u64m1_tumu(__VA_ARGS__)

#define	vlsseg7e8_v_i8m1(...) __riscv_vlsseg7e8_v_i8m1(__VA_ARGS__)

#define	vlsseg7e8_v_i8m1_m(...) __riscv_vlsseg7e8_v_i8m1_tumu(__VA_ARGS__)

#define	vlsseg7e8_v_i8mf2(...) __riscv_vlsseg7e8_v_i8mf2(__VA_ARGS__)

#define	vlsseg7e8_v_i8mf2_m(...) __riscv_vlsseg7e8_v_i8mf2_tumu(__VA_ARGS__)

#define	vlsseg7e8_v_i8mf4(...) __riscv_vlsseg7e8_v_i8mf4(__VA_ARGS__)

#define	vlsseg7e8_v_i8mf4_m(...) __riscv_vlsseg7e8_v_i8mf4_tumu(__VA_ARGS__)

#define	vlsseg7e8_v_i8mf8(...) __riscv_vlsseg7e8_v_i8mf8(__VA_ARGS__)

#define	vlsseg7e8_v_i8mf8_m(...) __riscv_vlsseg7e8_v_i8mf8_tumu(__VA_ARGS__)

#define	vlsseg7e8_v_u8m1(...) __riscv_vlsseg7e8_v_u8m1(__VA_ARGS__)

#define	vlsseg7e8_v_u8m1_m(...) __riscv_vlsseg7e8_v_u8m1_tumu(__VA_ARGS__)

#define	vlsseg7e8_v_u8mf2(...) __riscv_vlsseg7e8_v_u8mf2(__VA_ARGS__)

#define	vlsseg7e8_v_u8mf2_m(...) __riscv_vlsseg7e8_v_u8mf2_tumu(__VA_ARGS__)

#define	vlsseg7e8_v_u8mf4(...) __riscv_vlsseg7e8_v_u8mf4(__VA_ARGS__)

#define	vlsseg7e8_v_u8mf4_m(...) __riscv_vlsseg7e8_v_u8mf4_tumu(__VA_ARGS__)

#define	vlsseg7e8_v_u8mf8(...) __riscv_vlsseg7e8_v_u8mf8(__VA_ARGS__)

#define	vlsseg7e8_v_u8mf8_m(...) __riscv_vlsseg7e8_v_u8mf8_tumu(__VA_ARGS__)

#define	vlsseg8e16_v_f16m1(...) __riscv_vlsseg8e16_v_f16m1(__VA_ARGS__)

#define	vlsseg8e16_v_f16m1_m(...) __riscv_vlsseg8e16_v_f16m1_tumu(__VA_ARGS__)

#define	vlsseg8e16_v_f16mf2(...) __riscv_vlsseg8e16_v_f16mf2(__VA_ARGS__)

#define	vlsseg8e16_v_f16mf2_m(...) __riscv_vlsseg8e16_v_f16mf2_tumu(__VA_ARGS__)

#define	vlsseg8e16_v_f16mf4(...) __riscv_vlsseg8e16_v_f16mf4(__VA_ARGS__)

#define	vlsseg8e16_v_f16mf4_m(...) __riscv_vlsseg8e16_v_f16mf4_tumu(__VA_ARGS__)

#define	vlsseg8e16_v_i16m1(...) __riscv_vlsseg8e16_v_i16m1(__VA_ARGS__)

#define	vlsseg8e16_v_i16m1_m(...) __riscv_vlsseg8e16_v_i16m1_tumu(__VA_ARGS__)

#define	vlsseg8e16_v_i16mf2(...) __riscv_vlsseg8e16_v_i16mf2(__VA_ARGS__)

#define	vlsseg8e16_v_i16mf2_m(...) __riscv_vlsseg8e16_v_i16mf2_tumu(__VA_ARGS__)

#define	vlsseg8e16_v_i16mf4(...) __riscv_vlsseg8e16_v_i16mf4(__VA_ARGS__)

#define	vlsseg8e16_v_i16mf4_m(...) __riscv_vlsseg8e16_v_i16mf4_tumu(__VA_ARGS__)

#define	vlsseg8e16_v_u16m1(...) __riscv_vlsseg8e16_v_u16m1(__VA_ARGS__)

#define	vlsseg8e16_v_u16m1_m(...) __riscv_vlsseg8e16_v_u16m1_tumu(__VA_ARGS__)

#define	vlsseg8e16_v_u16mf2(...) __riscv_vlsseg8e16_v_u16mf2(__VA_ARGS__)

#define	vlsseg8e16_v_u16mf2_m(...) __riscv_vlsseg8e16_v_u16mf2_tumu(__VA_ARGS__)

#define	vlsseg8e16_v_u16mf4(...) __riscv_vlsseg8e16_v_u16mf4(__VA_ARGS__)

#define	vlsseg8e16_v_u16mf4_m(...) __riscv_vlsseg8e16_v_u16mf4_tumu(__VA_ARGS__)

#define	vlsseg8e32_v_f32m1(...) __riscv_vlsseg8e32_v_f32m1(__VA_ARGS__)

#define	vlsseg8e32_v_f32m1_m(...) __riscv_vlsseg8e32_v_f32m1_tumu(__VA_ARGS__)

#define	vlsseg8e32_v_f32mf2(...) __riscv_vlsseg8e32_v_f32mf2(__VA_ARGS__)

#define	vlsseg8e32_v_f32mf2_m(...) __riscv_vlsseg8e32_v_f32mf2_tumu(__VA_ARGS__)

#define	vlsseg8e32_v_i32m1(...) __riscv_vlsseg8e32_v_i32m1(__VA_ARGS__)

#define	vlsseg8e32_v_i32m1_m(...) __riscv_vlsseg8e32_v_i32m1_tumu(__VA_ARGS__)

#define	vlsseg8e32_v_i32mf2(...) __riscv_vlsseg8e32_v_i32mf2(__VA_ARGS__)

#define	vlsseg8e32_v_i32mf2_m(...) __riscv_vlsseg8e32_v_i32mf2_tumu(__VA_ARGS__)

#define	vlsseg8e32_v_u32m1(...) __riscv_vlsseg8e32_v_u32m1(__VA_ARGS__)

#define	vlsseg8e32_v_u32m1_m(...) __riscv_vlsseg8e32_v_u32m1_tumu(__VA_ARGS__)

#define	vlsseg8e32_v_u32mf2(...) __riscv_vlsseg8e32_v_u32mf2(__VA_ARGS__)

#define	vlsseg8e32_v_u32mf2_m(...) __riscv_vlsseg8e32_v_u32mf2_tumu(__VA_ARGS__)

#define	vlsseg8e64_v_f64m1(...) __riscv_vlsseg8e64_v_f64m1(__VA_ARGS__)

#define	vlsseg8e64_v_f64m1_m(...) __riscv_vlsseg8e64_v_f64m1_tumu(__VA_ARGS__)

#define	vlsseg8e64_v_i64m1(...) __riscv_vlsseg8e64_v_i64m1(__VA_ARGS__)

#define	vlsseg8e64_v_i64m1_m(...) __riscv_vlsseg8e64_v_i64m1_tumu(__VA_ARGS__)

#define	vlsseg8e64_v_u64m1(...) __riscv_vlsseg8e64_v_u64m1(__VA_ARGS__)

#define	vlsseg8e64_v_u64m1_m(...) __riscv_vlsseg8e64_v_u64m1_tumu(__VA_ARGS__)

#define	vlsseg8e8_v_i8m1(...) __riscv_vlsseg8e8_v_i8m1(__VA_ARGS__)

#define	vlsseg8e8_v_i8m1_m(...) __riscv_vlsseg8e8_v_i8m1_tumu(__VA_ARGS__)

#define	vlsseg8e8_v_i8mf2(...) __riscv_vlsseg8e8_v_i8mf2(__VA_ARGS__)

#define	vlsseg8e8_v_i8mf2_m(...) __riscv_vlsseg8e8_v_i8mf2_tumu(__VA_ARGS__)

#define	vlsseg8e8_v_i8mf4(...) __riscv_vlsseg8e8_v_i8mf4(__VA_ARGS__)

#define	vlsseg8e8_v_i8mf4_m(...) __riscv_vlsseg8e8_v_i8mf4_tumu(__VA_ARGS__)

#define	vlsseg8e8_v_i8mf8(...) __riscv_vlsseg8e8_v_i8mf8(__VA_ARGS__)

#define	vlsseg8e8_v_i8mf8_m(...) __riscv_vlsseg8e8_v_i8mf8_tumu(__VA_ARGS__)

#define	vlsseg8e8_v_u8m1(...) __riscv_vlsseg8e8_v_u8m1(__VA_ARGS__)

#define	vlsseg8e8_v_u8m1_m(...) __riscv_vlsseg8e8_v_u8m1_tumu(__VA_ARGS__)

#define	vlsseg8e8_v_u8mf2(...) __riscv_vlsseg8e8_v_u8mf2(__VA_ARGS__)

#define	vlsseg8e8_v_u8mf2_m(...) __riscv_vlsseg8e8_v_u8mf2_tumu(__VA_ARGS__)

#define	vlsseg8e8_v_u8mf4(...) __riscv_vlsseg8e8_v_u8mf4(__VA_ARGS__)

#define	vlsseg8e8_v_u8mf4_m(...) __riscv_vlsseg8e8_v_u8mf4_tumu(__VA_ARGS__)

#define	vlsseg8e8_v_u8mf8(...) __riscv_vlsseg8e8_v_u8mf8(__VA_ARGS__)

#define	vlsseg8e8_v_u8mf8_m(...) __riscv_vlsseg8e8_v_u8mf8_tumu(__VA_ARGS__)

#define	vluxei16_v_f16m1(...) __riscv_vluxei16_v_f16m1(__VA_ARGS__)

#define	vluxei16_v_f16m1_m(...) __riscv_vluxei16_v_f16m1_tumu(__VA_ARGS__)

#define	vluxei16_v_f16m2(...) __riscv_vluxei16_v_f16m2(__VA_ARGS__)

#define	vluxei16_v_f16m2_m(...) __riscv_vluxei16_v_f16m2_tumu(__VA_ARGS__)

#define	vluxei16_v_f16m4(...) __riscv_vluxei16_v_f16m4(__VA_ARGS__)

#define	vluxei16_v_f16m4_m(...) __riscv_vluxei16_v_f16m4_tumu(__VA_ARGS__)

#define	vluxei16_v_f16m8(...) __riscv_vluxei16_v_f16m8(__VA_ARGS__)

#define	vluxei16_v_f16m8_m(...) __riscv_vluxei16_v_f16m8_tumu(__VA_ARGS__)

#define	vluxei16_v_f16mf2(...) __riscv_vluxei16_v_f16mf2(__VA_ARGS__)

#define	vluxei16_v_f16mf2_m(...) __riscv_vluxei16_v_f16mf2_tumu(__VA_ARGS__)

#define	vluxei16_v_f16mf4(...) __riscv_vluxei16_v_f16mf4(__VA_ARGS__)

#define	vluxei16_v_f16mf4_m(...) __riscv_vluxei16_v_f16mf4_tumu(__VA_ARGS__)

#define	vluxei16_v_f32m1(...) __riscv_vluxei16_v_f32m1(__VA_ARGS__)

#define	vluxei16_v_f32m1_m(...) __riscv_vluxei16_v_f32m1_tumu(__VA_ARGS__)

#define	vluxei16_v_f32m2(...) __riscv_vluxei16_v_f32m2(__VA_ARGS__)

#define	vluxei16_v_f32m2_m(...) __riscv_vluxei16_v_f32m2_tumu(__VA_ARGS__)

#define	vluxei16_v_f32m4(...) __riscv_vluxei16_v_f32m4(__VA_ARGS__)

#define	vluxei16_v_f32m4_m(...) __riscv_vluxei16_v_f32m4_tumu(__VA_ARGS__)

#define	vluxei16_v_f32m8(...) __riscv_vluxei16_v_f32m8(__VA_ARGS__)

#define	vluxei16_v_f32m8_m(...) __riscv_vluxei16_v_f32m8_tumu(__VA_ARGS__)

#define	vluxei16_v_f32mf2(...) __riscv_vluxei16_v_f32mf2(__VA_ARGS__)

#define	vluxei16_v_f32mf2_m(...) __riscv_vluxei16_v_f32mf2_tumu(__VA_ARGS__)

#define	vluxei16_v_f64m1(...) __riscv_vluxei16_v_f64m1(__VA_ARGS__)

#define	vluxei16_v_f64m1_m(...) __riscv_vluxei16_v_f64m1_tumu(__VA_ARGS__)

#define	vluxei16_v_f64m2(...) __riscv_vluxei16_v_f64m2(__VA_ARGS__)

#define	vluxei16_v_f64m2_m(...) __riscv_vluxei16_v_f64m2_tumu(__VA_ARGS__)

#define	vluxei16_v_f64m4(...) __riscv_vluxei16_v_f64m4(__VA_ARGS__)

#define	vluxei16_v_f64m4_m(...) __riscv_vluxei16_v_f64m4_tumu(__VA_ARGS__)

#define	vluxei16_v_f64m8(...) __riscv_vluxei16_v_f64m8(__VA_ARGS__)

#define	vluxei16_v_f64m8_m(...) __riscv_vluxei16_v_f64m8_tumu(__VA_ARGS__)

#define	vluxei16_v_i16m1(...) __riscv_vluxei16_v_i16m1(__VA_ARGS__)

#define	vluxei16_v_i16m1_m(...) __riscv_vluxei16_v_i16m1_tumu(__VA_ARGS__)

#define	vluxei16_v_i16m2(...) __riscv_vluxei16_v_i16m2(__VA_ARGS__)

#define	vluxei16_v_i16m2_m(...) __riscv_vluxei16_v_i16m2_tumu(__VA_ARGS__)

#define	vluxei16_v_i16m4(...) __riscv_vluxei16_v_i16m4(__VA_ARGS__)

#define	vluxei16_v_i16m4_m(...) __riscv_vluxei16_v_i16m4_tumu(__VA_ARGS__)

#define	vluxei16_v_i16m8(...) __riscv_vluxei16_v_i16m8(__VA_ARGS__)

#define	vluxei16_v_i16m8_m(...) __riscv_vluxei16_v_i16m8_tumu(__VA_ARGS__)

#define	vluxei16_v_i16mf2(...) __riscv_vluxei16_v_i16mf2(__VA_ARGS__)

#define	vluxei16_v_i16mf2_m(...) __riscv_vluxei16_v_i16mf2_tumu(__VA_ARGS__)

#define	vluxei16_v_i16mf4(...) __riscv_vluxei16_v_i16mf4(__VA_ARGS__)

#define	vluxei16_v_i16mf4_m(...) __riscv_vluxei16_v_i16mf4_tumu(__VA_ARGS__)

#define	vluxei16_v_i32m1(...) __riscv_vluxei16_v_i32m1(__VA_ARGS__)

#define	vluxei16_v_i32m1_m(...) __riscv_vluxei16_v_i32m1_tumu(__VA_ARGS__)

#define	vluxei16_v_i32m2(...) __riscv_vluxei16_v_i32m2(__VA_ARGS__)

#define	vluxei16_v_i32m2_m(...) __riscv_vluxei16_v_i32m2_tumu(__VA_ARGS__)

#define	vluxei16_v_i32m4(...) __riscv_vluxei16_v_i32m4(__VA_ARGS__)

#define	vluxei16_v_i32m4_m(...) __riscv_vluxei16_v_i32m4_tumu(__VA_ARGS__)

#define	vluxei16_v_i32m8(...) __riscv_vluxei16_v_i32m8(__VA_ARGS__)

#define	vluxei16_v_i32m8_m(...) __riscv_vluxei16_v_i32m8_tumu(__VA_ARGS__)

#define	vluxei16_v_i32mf2(...) __riscv_vluxei16_v_i32mf2(__VA_ARGS__)

#define	vluxei16_v_i32mf2_m(...) __riscv_vluxei16_v_i32mf2_tumu(__VA_ARGS__)

#define	vluxei16_v_i64m1(...) __riscv_vluxei16_v_i64m1(__VA_ARGS__)

#define	vluxei16_v_i64m1_m(...) __riscv_vluxei16_v_i64m1_tumu(__VA_ARGS__)

#define	vluxei16_v_i64m2(...) __riscv_vluxei16_v_i64m2(__VA_ARGS__)

#define	vluxei16_v_i64m2_m(...) __riscv_vluxei16_v_i64m2_tumu(__VA_ARGS__)

#define	vluxei16_v_i64m4(...) __riscv_vluxei16_v_i64m4(__VA_ARGS__)

#define	vluxei16_v_i64m4_m(...) __riscv_vluxei16_v_i64m4_tumu(__VA_ARGS__)

#define	vluxei16_v_i64m8(...) __riscv_vluxei16_v_i64m8(__VA_ARGS__)

#define	vluxei16_v_i64m8_m(...) __riscv_vluxei16_v_i64m8_tumu(__VA_ARGS__)

#define	vluxei16_v_i8m1(...) __riscv_vluxei16_v_i8m1(__VA_ARGS__)

#define	vluxei16_v_i8m1_m(...) __riscv_vluxei16_v_i8m1_tumu(__VA_ARGS__)

#define	vluxei16_v_i8m2(...) __riscv_vluxei16_v_i8m2(__VA_ARGS__)

#define	vluxei16_v_i8m2_m(...) __riscv_vluxei16_v_i8m2_tumu(__VA_ARGS__)

#define	vluxei16_v_i8m4(...) __riscv_vluxei16_v_i8m4(__VA_ARGS__)

#define	vluxei16_v_i8m4_m(...) __riscv_vluxei16_v_i8m4_tumu(__VA_ARGS__)

#define	vluxei16_v_i8mf2(...) __riscv_vluxei16_v_i8mf2(__VA_ARGS__)

#define	vluxei16_v_i8mf2_m(...) __riscv_vluxei16_v_i8mf2_tumu(__VA_ARGS__)

#define	vluxei16_v_i8mf4(...) __riscv_vluxei16_v_i8mf4(__VA_ARGS__)

#define	vluxei16_v_i8mf4_m(...) __riscv_vluxei16_v_i8mf4_tumu(__VA_ARGS__)

#define	vluxei16_v_i8mf8(...) __riscv_vluxei16_v_i8mf8(__VA_ARGS__)

#define	vluxei16_v_i8mf8_m(...) __riscv_vluxei16_v_i8mf8_tumu(__VA_ARGS__)

#define	vluxei16_v_u16m1(...) __riscv_vluxei16_v_u16m1(__VA_ARGS__)

#define	vluxei16_v_u16m1_m(...) __riscv_vluxei16_v_u16m1_tumu(__VA_ARGS__)

#define	vluxei16_v_u16m2(...) __riscv_vluxei16_v_u16m2(__VA_ARGS__)

#define	vluxei16_v_u16m2_m(...) __riscv_vluxei16_v_u16m2_tumu(__VA_ARGS__)

#define	vluxei16_v_u16m4(...) __riscv_vluxei16_v_u16m4(__VA_ARGS__)

#define	vluxei16_v_u16m4_m(...) __riscv_vluxei16_v_u16m4_tumu(__VA_ARGS__)

#define	vluxei16_v_u16m8(...) __riscv_vluxei16_v_u16m8(__VA_ARGS__)

#define	vluxei16_v_u16m8_m(...) __riscv_vluxei16_v_u16m8_tumu(__VA_ARGS__)

#define	vluxei16_v_u16mf2(...) __riscv_vluxei16_v_u16mf2(__VA_ARGS__)

#define	vluxei16_v_u16mf2_m(...) __riscv_vluxei16_v_u16mf2_tumu(__VA_ARGS__)

#define	vluxei16_v_u16mf4(...) __riscv_vluxei16_v_u16mf4(__VA_ARGS__)

#define	vluxei16_v_u16mf4_m(...) __riscv_vluxei16_v_u16mf4_tumu(__VA_ARGS__)

#define	vluxei16_v_u32m1(...) __riscv_vluxei16_v_u32m1(__VA_ARGS__)

#define	vluxei16_v_u32m1_m(...) __riscv_vluxei16_v_u32m1_tumu(__VA_ARGS__)

#define	vluxei16_v_u32m2(...) __riscv_vluxei16_v_u32m2(__VA_ARGS__)

#define	vluxei16_v_u32m2_m(...) __riscv_vluxei16_v_u32m2_tumu(__VA_ARGS__)

#define	vluxei16_v_u32m4(...) __riscv_vluxei16_v_u32m4(__VA_ARGS__)

#define	vluxei16_v_u32m4_m(...) __riscv_vluxei16_v_u32m4_tumu(__VA_ARGS__)

#define	vluxei16_v_u32m8(...) __riscv_vluxei16_v_u32m8(__VA_ARGS__)

#define	vluxei16_v_u32m8_m(...) __riscv_vluxei16_v_u32m8_tumu(__VA_ARGS__)

#define	vluxei16_v_u32mf2(...) __riscv_vluxei16_v_u32mf2(__VA_ARGS__)

#define	vluxei16_v_u32mf2_m(...) __riscv_vluxei16_v_u32mf2_tumu(__VA_ARGS__)

#define	vluxei16_v_u64m1(...) __riscv_vluxei16_v_u64m1(__VA_ARGS__)

#define	vluxei16_v_u64m1_m(...) __riscv_vluxei16_v_u64m1_tumu(__VA_ARGS__)

#define	vluxei16_v_u64m2(...) __riscv_vluxei16_v_u64m2(__VA_ARGS__)

#define	vluxei16_v_u64m2_m(...) __riscv_vluxei16_v_u64m2_tumu(__VA_ARGS__)

#define	vluxei16_v_u64m4(...) __riscv_vluxei16_v_u64m4(__VA_ARGS__)

#define	vluxei16_v_u64m4_m(...) __riscv_vluxei16_v_u64m4_tumu(__VA_ARGS__)

#define	vluxei16_v_u64m8(...) __riscv_vluxei16_v_u64m8(__VA_ARGS__)

#define	vluxei16_v_u64m8_m(...) __riscv_vluxei16_v_u64m8_tumu(__VA_ARGS__)

#define	vluxei16_v_u8m1(...) __riscv_vluxei16_v_u8m1(__VA_ARGS__)

#define	vluxei16_v_u8m1_m(...) __riscv_vluxei16_v_u8m1_tumu(__VA_ARGS__)

#define	vluxei16_v_u8m2(...) __riscv_vluxei16_v_u8m2(__VA_ARGS__)

#define	vluxei16_v_u8m2_m(...) __riscv_vluxei16_v_u8m2_tumu(__VA_ARGS__)

#define	vluxei16_v_u8m4(...) __riscv_vluxei16_v_u8m4(__VA_ARGS__)

#define	vluxei16_v_u8m4_m(...) __riscv_vluxei16_v_u8m4_tumu(__VA_ARGS__)

#define	vluxei16_v_u8mf2(...) __riscv_vluxei16_v_u8mf2(__VA_ARGS__)

#define	vluxei16_v_u8mf2_m(...) __riscv_vluxei16_v_u8mf2_tumu(__VA_ARGS__)

#define	vluxei16_v_u8mf4(...) __riscv_vluxei16_v_u8mf4(__VA_ARGS__)

#define	vluxei16_v_u8mf4_m(...) __riscv_vluxei16_v_u8mf4_tumu(__VA_ARGS__)

#define	vluxei16_v_u8mf8(...) __riscv_vluxei16_v_u8mf8(__VA_ARGS__)

#define	vluxei16_v_u8mf8_m(...) __riscv_vluxei16_v_u8mf8_tumu(__VA_ARGS__)

#define	vluxei32_v_f16m1(...) __riscv_vluxei32_v_f16m1(__VA_ARGS__)

#define	vluxei32_v_f16m1_m(...) __riscv_vluxei32_v_f16m1_tumu(__VA_ARGS__)

#define	vluxei32_v_f16m2(...) __riscv_vluxei32_v_f16m2(__VA_ARGS__)

#define	vluxei32_v_f16m2_m(...) __riscv_vluxei32_v_f16m2_tumu(__VA_ARGS__)

#define	vluxei32_v_f16m4(...) __riscv_vluxei32_v_f16m4(__VA_ARGS__)

#define	vluxei32_v_f16m4_m(...) __riscv_vluxei32_v_f16m4_tumu(__VA_ARGS__)

#define	vluxei32_v_f16mf2(...) __riscv_vluxei32_v_f16mf2(__VA_ARGS__)

#define	vluxei32_v_f16mf2_m(...) __riscv_vluxei32_v_f16mf2_tumu(__VA_ARGS__)

#define	vluxei32_v_f16mf4(...) __riscv_vluxei32_v_f16mf4(__VA_ARGS__)

#define	vluxei32_v_f16mf4_m(...) __riscv_vluxei32_v_f16mf4_tumu(__VA_ARGS__)

#define	vluxei32_v_f32m1(...) __riscv_vluxei32_v_f32m1(__VA_ARGS__)

#define	vluxei32_v_f32m1_m(...) __riscv_vluxei32_v_f32m1_tumu(__VA_ARGS__)

#define	vluxei32_v_f32m2(...) __riscv_vluxei32_v_f32m2(__VA_ARGS__)

#define	vluxei32_v_f32m2_m(...) __riscv_vluxei32_v_f32m2_tumu(__VA_ARGS__)

#define	vluxei32_v_f32m4(...) __riscv_vluxei32_v_f32m4(__VA_ARGS__)

#define	vluxei32_v_f32m4_m(...) __riscv_vluxei32_v_f32m4_tumu(__VA_ARGS__)

#define	vluxei32_v_f32m8(...) __riscv_vluxei32_v_f32m8(__VA_ARGS__)

#define	vluxei32_v_f32m8_m(...) __riscv_vluxei32_v_f32m8_tumu(__VA_ARGS__)

#define	vluxei32_v_f32mf2(...) __riscv_vluxei32_v_f32mf2(__VA_ARGS__)

#define	vluxei32_v_f32mf2_m(...) __riscv_vluxei32_v_f32mf2_tumu(__VA_ARGS__)

#define	vluxei32_v_f64m1(...) __riscv_vluxei32_v_f64m1(__VA_ARGS__)

#define	vluxei32_v_f64m1_m(...) __riscv_vluxei32_v_f64m1_tumu(__VA_ARGS__)

#define	vluxei32_v_f64m2(...) __riscv_vluxei32_v_f64m2(__VA_ARGS__)

#define	vluxei32_v_f64m2_m(...) __riscv_vluxei32_v_f64m2_tumu(__VA_ARGS__)

#define	vluxei32_v_f64m4(...) __riscv_vluxei32_v_f64m4(__VA_ARGS__)

#define	vluxei32_v_f64m4_m(...) __riscv_vluxei32_v_f64m4_tumu(__VA_ARGS__)

#define	vluxei32_v_f64m8(...) __riscv_vluxei32_v_f64m8(__VA_ARGS__)

#define	vluxei32_v_f64m8_m(...) __riscv_vluxei32_v_f64m8_tumu(__VA_ARGS__)

#define	vluxei32_v_i16m1(...) __riscv_vluxei32_v_i16m1(__VA_ARGS__)

#define	vluxei32_v_i16m1_m(...) __riscv_vluxei32_v_i16m1_tumu(__VA_ARGS__)

#define	vluxei32_v_i16m2(...) __riscv_vluxei32_v_i16m2(__VA_ARGS__)

#define	vluxei32_v_i16m2_m(...) __riscv_vluxei32_v_i16m2_tumu(__VA_ARGS__)

#define	vluxei32_v_i16m4(...) __riscv_vluxei32_v_i16m4(__VA_ARGS__)

#define	vluxei32_v_i16m4_m(...) __riscv_vluxei32_v_i16m4_tumu(__VA_ARGS__)

#define	vluxei32_v_i16mf2(...) __riscv_vluxei32_v_i16mf2(__VA_ARGS__)

#define	vluxei32_v_i16mf2_m(...) __riscv_vluxei32_v_i16mf2_tumu(__VA_ARGS__)

#define	vluxei32_v_i16mf4(...) __riscv_vluxei32_v_i16mf4(__VA_ARGS__)

#define	vluxei32_v_i16mf4_m(...) __riscv_vluxei32_v_i16mf4_tumu(__VA_ARGS__)

#define	vluxei32_v_i32m1(...) __riscv_vluxei32_v_i32m1(__VA_ARGS__)

#define	vluxei32_v_i32m1_m(...) __riscv_vluxei32_v_i32m1_tumu(__VA_ARGS__)

#define	vluxei32_v_i32m2(...) __riscv_vluxei32_v_i32m2(__VA_ARGS__)

#define	vluxei32_v_i32m2_m(...) __riscv_vluxei32_v_i32m2_tumu(__VA_ARGS__)

#define	vluxei32_v_i32m4(...) __riscv_vluxei32_v_i32m4(__VA_ARGS__)

#define	vluxei32_v_i32m4_m(...) __riscv_vluxei32_v_i32m4_tumu(__VA_ARGS__)

#define	vluxei32_v_i32m8(...) __riscv_vluxei32_v_i32m8(__VA_ARGS__)

#define	vluxei32_v_i32m8_m(...) __riscv_vluxei32_v_i32m8_tumu(__VA_ARGS__)

#define	vluxei32_v_i32mf2(...) __riscv_vluxei32_v_i32mf2(__VA_ARGS__)

#define	vluxei32_v_i32mf2_m(...) __riscv_vluxei32_v_i32mf2_tumu(__VA_ARGS__)

#define	vluxei32_v_i64m1(...) __riscv_vluxei32_v_i64m1(__VA_ARGS__)

#define	vluxei32_v_i64m1_m(...) __riscv_vluxei32_v_i64m1_tumu(__VA_ARGS__)

#define	vluxei32_v_i64m2(...) __riscv_vluxei32_v_i64m2(__VA_ARGS__)

#define	vluxei32_v_i64m2_m(...) __riscv_vluxei32_v_i64m2_tumu(__VA_ARGS__)

#define	vluxei32_v_i64m4(...) __riscv_vluxei32_v_i64m4(__VA_ARGS__)

#define	vluxei32_v_i64m4_m(...) __riscv_vluxei32_v_i64m4_tumu(__VA_ARGS__)

#define	vluxei32_v_i64m8(...) __riscv_vluxei32_v_i64m8(__VA_ARGS__)

#define	vluxei32_v_i64m8_m(...) __riscv_vluxei32_v_i64m8_tumu(__VA_ARGS__)

#define	vluxei32_v_i8m1(...) __riscv_vluxei32_v_i8m1(__VA_ARGS__)

#define	vluxei32_v_i8m1_m(...) __riscv_vluxei32_v_i8m1_tumu(__VA_ARGS__)

#define	vluxei32_v_i8m2(...) __riscv_vluxei32_v_i8m2(__VA_ARGS__)

#define	vluxei32_v_i8m2_m(...) __riscv_vluxei32_v_i8m2_tumu(__VA_ARGS__)

#define	vluxei32_v_i8mf2(...) __riscv_vluxei32_v_i8mf2(__VA_ARGS__)

#define	vluxei32_v_i8mf2_m(...) __riscv_vluxei32_v_i8mf2_tumu(__VA_ARGS__)

#define	vluxei32_v_i8mf4(...) __riscv_vluxei32_v_i8mf4(__VA_ARGS__)

#define	vluxei32_v_i8mf4_m(...) __riscv_vluxei32_v_i8mf4_tumu(__VA_ARGS__)

#define	vluxei32_v_i8mf8(...) __riscv_vluxei32_v_i8mf8(__VA_ARGS__)

#define	vluxei32_v_i8mf8_m(...) __riscv_vluxei32_v_i8mf8_tumu(__VA_ARGS__)

#define	vluxei32_v_u16m1(...) __riscv_vluxei32_v_u16m1(__VA_ARGS__)

#define	vluxei32_v_u16m1_m(...) __riscv_vluxei32_v_u16m1_tumu(__VA_ARGS__)

#define	vluxei32_v_u16m2(...) __riscv_vluxei32_v_u16m2(__VA_ARGS__)

#define	vluxei32_v_u16m2_m(...) __riscv_vluxei32_v_u16m2_tumu(__VA_ARGS__)

#define	vluxei32_v_u16m4(...) __riscv_vluxei32_v_u16m4(__VA_ARGS__)

#define	vluxei32_v_u16m4_m(...) __riscv_vluxei32_v_u16m4_tumu(__VA_ARGS__)

#define	vluxei32_v_u16mf2(...) __riscv_vluxei32_v_u16mf2(__VA_ARGS__)

#define	vluxei32_v_u16mf2_m(...) __riscv_vluxei32_v_u16mf2_tumu(__VA_ARGS__)

#define	vluxei32_v_u16mf4(...) __riscv_vluxei32_v_u16mf4(__VA_ARGS__)

#define	vluxei32_v_u16mf4_m(...) __riscv_vluxei32_v_u16mf4_tumu(__VA_ARGS__)

#define	vluxei32_v_u32m1(...) __riscv_vluxei32_v_u32m1(__VA_ARGS__)

#define	vluxei32_v_u32m1_m(...) __riscv_vluxei32_v_u32m1_tumu(__VA_ARGS__)

#define	vluxei32_v_u32m2(...) __riscv_vluxei32_v_u32m2(__VA_ARGS__)

#define	vluxei32_v_u32m2_m(...) __riscv_vluxei32_v_u32m2_tumu(__VA_ARGS__)

#define	vluxei32_v_u32m4(...) __riscv_vluxei32_v_u32m4(__VA_ARGS__)

#define	vluxei32_v_u32m4_m(...) __riscv_vluxei32_v_u32m4_tumu(__VA_ARGS__)

#define	vluxei32_v_u32m8(...) __riscv_vluxei32_v_u32m8(__VA_ARGS__)

#define	vluxei32_v_u32m8_m(...) __riscv_vluxei32_v_u32m8_tumu(__VA_ARGS__)

#define	vluxei32_v_u32mf2(...) __riscv_vluxei32_v_u32mf2(__VA_ARGS__)

#define	vluxei32_v_u32mf2_m(...) __riscv_vluxei32_v_u32mf2_tumu(__VA_ARGS__)

#define	vluxei32_v_u64m1(...) __riscv_vluxei32_v_u64m1(__VA_ARGS__)

#define	vluxei32_v_u64m1_m(...) __riscv_vluxei32_v_u64m1_tumu(__VA_ARGS__)

#define	vluxei32_v_u64m2(...) __riscv_vluxei32_v_u64m2(__VA_ARGS__)

#define	vluxei32_v_u64m2_m(...) __riscv_vluxei32_v_u64m2_tumu(__VA_ARGS__)

#define	vluxei32_v_u64m4(...) __riscv_vluxei32_v_u64m4(__VA_ARGS__)

#define	vluxei32_v_u64m4_m(...) __riscv_vluxei32_v_u64m4_tumu(__VA_ARGS__)

#define	vluxei32_v_u64m8(...) __riscv_vluxei32_v_u64m8(__VA_ARGS__)

#define	vluxei32_v_u64m8_m(...) __riscv_vluxei32_v_u64m8_tumu(__VA_ARGS__)

#define	vluxei32_v_u8m1(...) __riscv_vluxei32_v_u8m1(__VA_ARGS__)

#define	vluxei32_v_u8m1_m(...) __riscv_vluxei32_v_u8m1_tumu(__VA_ARGS__)

#define	vluxei32_v_u8m2(...) __riscv_vluxei32_v_u8m2(__VA_ARGS__)

#define	vluxei32_v_u8m2_m(...) __riscv_vluxei32_v_u8m2_tumu(__VA_ARGS__)

#define	vluxei32_v_u8mf2(...) __riscv_vluxei32_v_u8mf2(__VA_ARGS__)

#define	vluxei32_v_u8mf2_m(...) __riscv_vluxei32_v_u8mf2_tumu(__VA_ARGS__)

#define	vluxei32_v_u8mf4(...) __riscv_vluxei32_v_u8mf4(__VA_ARGS__)

#define	vluxei32_v_u8mf4_m(...) __riscv_vluxei32_v_u8mf4_tumu(__VA_ARGS__)

#define	vluxei32_v_u8mf8(...) __riscv_vluxei32_v_u8mf8(__VA_ARGS__)

#define	vluxei32_v_u8mf8_m(...) __riscv_vluxei32_v_u8mf8_tumu(__VA_ARGS__)

#define	vluxei64_v_f16m1(...) __riscv_vluxei64_v_f16m1(__VA_ARGS__)

#define	vluxei64_v_f16m1_m(...) __riscv_vluxei64_v_f16m1_tumu(__VA_ARGS__)

#define	vluxei64_v_f16m2(...) __riscv_vluxei64_v_f16m2(__VA_ARGS__)

#define	vluxei64_v_f16m2_m(...) __riscv_vluxei64_v_f16m2_tumu(__VA_ARGS__)

#define	vluxei64_v_f16mf2(...) __riscv_vluxei64_v_f16mf2(__VA_ARGS__)

#define	vluxei64_v_f16mf2_m(...) __riscv_vluxei64_v_f16mf2_tumu(__VA_ARGS__)

#define	vluxei64_v_f16mf4(...) __riscv_vluxei64_v_f16mf4(__VA_ARGS__)

#define	vluxei64_v_f16mf4_m(...) __riscv_vluxei64_v_f16mf4_tumu(__VA_ARGS__)

#define	vluxei64_v_f32m1(...) __riscv_vluxei64_v_f32m1(__VA_ARGS__)

#define	vluxei64_v_f32m1_m(...) __riscv_vluxei64_v_f32m1_tumu(__VA_ARGS__)

#define	vluxei64_v_f32m2(...) __riscv_vluxei64_v_f32m2(__VA_ARGS__)

#define	vluxei64_v_f32m2_m(...) __riscv_vluxei64_v_f32m2_tumu(__VA_ARGS__)

#define	vluxei64_v_f32m4(...) __riscv_vluxei64_v_f32m4(__VA_ARGS__)

#define	vluxei64_v_f32m4_m(...) __riscv_vluxei64_v_f32m4_tumu(__VA_ARGS__)

#define	vluxei64_v_f32mf2(...) __riscv_vluxei64_v_f32mf2(__VA_ARGS__)

#define	vluxei64_v_f32mf2_m(...) __riscv_vluxei64_v_f32mf2_tumu(__VA_ARGS__)

#define	vluxei64_v_f64m1(...) __riscv_vluxei64_v_f64m1(__VA_ARGS__)

#define	vluxei64_v_f64m1_m(...) __riscv_vluxei64_v_f64m1_tumu(__VA_ARGS__)

#define	vluxei64_v_f64m2(...) __riscv_vluxei64_v_f64m2(__VA_ARGS__)

#define	vluxei64_v_f64m2_m(...) __riscv_vluxei64_v_f64m2_tumu(__VA_ARGS__)

#define	vluxei64_v_f64m4(...) __riscv_vluxei64_v_f64m4(__VA_ARGS__)

#define	vluxei64_v_f64m4_m(...) __riscv_vluxei64_v_f64m4_tumu(__VA_ARGS__)

#define	vluxei64_v_f64m8(...) __riscv_vluxei64_v_f64m8(__VA_ARGS__)

#define	vluxei64_v_f64m8_m(...) __riscv_vluxei64_v_f64m8_tumu(__VA_ARGS__)

#define	vluxei64_v_i16m1(...) __riscv_vluxei64_v_i16m1(__VA_ARGS__)

#define	vluxei64_v_i16m1_m(...) __riscv_vluxei64_v_i16m1_tumu(__VA_ARGS__)

#define	vluxei64_v_i16m2(...) __riscv_vluxei64_v_i16m2(__VA_ARGS__)

#define	vluxei64_v_i16m2_m(...) __riscv_vluxei64_v_i16m2_tumu(__VA_ARGS__)

#define	vluxei64_v_i16mf2(...) __riscv_vluxei64_v_i16mf2(__VA_ARGS__)

#define	vluxei64_v_i16mf2_m(...) __riscv_vluxei64_v_i16mf2_tumu(__VA_ARGS__)

#define	vluxei64_v_i16mf4(...) __riscv_vluxei64_v_i16mf4(__VA_ARGS__)

#define	vluxei64_v_i16mf4_m(...) __riscv_vluxei64_v_i16mf4_tumu(__VA_ARGS__)

#define	vluxei64_v_i32m1(...) __riscv_vluxei64_v_i32m1(__VA_ARGS__)

#define	vluxei64_v_i32m1_m(...) __riscv_vluxei64_v_i32m1_tumu(__VA_ARGS__)

#define	vluxei64_v_i32m2(...) __riscv_vluxei64_v_i32m2(__VA_ARGS__)

#define	vluxei64_v_i32m2_m(...) __riscv_vluxei64_v_i32m2_tumu(__VA_ARGS__)

#define	vluxei64_v_i32m4(...) __riscv_vluxei64_v_i32m4(__VA_ARGS__)

#define	vluxei64_v_i32m4_m(...) __riscv_vluxei64_v_i32m4_tumu(__VA_ARGS__)

#define	vluxei64_v_i32mf2(...) __riscv_vluxei64_v_i32mf2(__VA_ARGS__)

#define	vluxei64_v_i32mf2_m(...) __riscv_vluxei64_v_i32mf2_tumu(__VA_ARGS__)

#define	vluxei64_v_i64m1(...) __riscv_vluxei64_v_i64m1(__VA_ARGS__)

#define	vluxei64_v_i64m1_m(...) __riscv_vluxei64_v_i64m1_tumu(__VA_ARGS__)

#define	vluxei64_v_i64m2(...) __riscv_vluxei64_v_i64m2(__VA_ARGS__)

#define	vluxei64_v_i64m2_m(...) __riscv_vluxei64_v_i64m2_tumu(__VA_ARGS__)

#define	vluxei64_v_i64m4(...) __riscv_vluxei64_v_i64m4(__VA_ARGS__)

#define	vluxei64_v_i64m4_m(...) __riscv_vluxei64_v_i64m4_tumu(__VA_ARGS__)

#define	vluxei64_v_i64m8(...) __riscv_vluxei64_v_i64m8(__VA_ARGS__)

#define	vluxei64_v_i64m8_m(...) __riscv_vluxei64_v_i64m8_tumu(__VA_ARGS__)

#define	vluxei64_v_i8m1(...) __riscv_vluxei64_v_i8m1(__VA_ARGS__)

#define	vluxei64_v_i8m1_m(...) __riscv_vluxei64_v_i8m1_tumu(__VA_ARGS__)

#define	vluxei64_v_i8mf2(...) __riscv_vluxei64_v_i8mf2(__VA_ARGS__)

#define	vluxei64_v_i8mf2_m(...) __riscv_vluxei64_v_i8mf2_tumu(__VA_ARGS__)

#define	vluxei64_v_i8mf4(...) __riscv_vluxei64_v_i8mf4(__VA_ARGS__)

#define	vluxei64_v_i8mf4_m(...) __riscv_vluxei64_v_i8mf4_tumu(__VA_ARGS__)

#define	vluxei64_v_i8mf8(...) __riscv_vluxei64_v_i8mf8(__VA_ARGS__)

#define	vluxei64_v_i8mf8_m(...) __riscv_vluxei64_v_i8mf8_tumu(__VA_ARGS__)

#define	vluxei64_v_u16m1(...) __riscv_vluxei64_v_u16m1(__VA_ARGS__)

#define	vluxei64_v_u16m1_m(...) __riscv_vluxei64_v_u16m1_tumu(__VA_ARGS__)

#define	vluxei64_v_u16m2(...) __riscv_vluxei64_v_u16m2(__VA_ARGS__)

#define	vluxei64_v_u16m2_m(...) __riscv_vluxei64_v_u16m2_tumu(__VA_ARGS__)

#define	vluxei64_v_u16mf2(...) __riscv_vluxei64_v_u16mf2(__VA_ARGS__)

#define	vluxei64_v_u16mf2_m(...) __riscv_vluxei64_v_u16mf2_tumu(__VA_ARGS__)

#define	vluxei64_v_u16mf4(...) __riscv_vluxei64_v_u16mf4(__VA_ARGS__)

#define	vluxei64_v_u16mf4_m(...) __riscv_vluxei64_v_u16mf4_tumu(__VA_ARGS__)

#define	vluxei64_v_u32m1(...) __riscv_vluxei64_v_u32m1(__VA_ARGS__)

#define	vluxei64_v_u32m1_m(...) __riscv_vluxei64_v_u32m1_tumu(__VA_ARGS__)

#define	vluxei64_v_u32m2(...) __riscv_vluxei64_v_u32m2(__VA_ARGS__)

#define	vluxei64_v_u32m2_m(...) __riscv_vluxei64_v_u32m2_tumu(__VA_ARGS__)

#define	vluxei64_v_u32m4(...) __riscv_vluxei64_v_u32m4(__VA_ARGS__)

#define	vluxei64_v_u32m4_m(...) __riscv_vluxei64_v_u32m4_tumu(__VA_ARGS__)

#define	vluxei64_v_u32mf2(...) __riscv_vluxei64_v_u32mf2(__VA_ARGS__)

#define	vluxei64_v_u32mf2_m(...) __riscv_vluxei64_v_u32mf2_tumu(__VA_ARGS__)

#define	vluxei64_v_u64m1(...) __riscv_vluxei64_v_u64m1(__VA_ARGS__)

#define	vluxei64_v_u64m1_m(...) __riscv_vluxei64_v_u64m1_tumu(__VA_ARGS__)

#define	vluxei64_v_u64m2(...) __riscv_vluxei64_v_u64m2(__VA_ARGS__)

#define	vluxei64_v_u64m2_m(...) __riscv_vluxei64_v_u64m2_tumu(__VA_ARGS__)

#define	vluxei64_v_u64m4(...) __riscv_vluxei64_v_u64m4(__VA_ARGS__)

#define	vluxei64_v_u64m4_m(...) __riscv_vluxei64_v_u64m4_tumu(__VA_ARGS__)

#define	vluxei64_v_u64m8(...) __riscv_vluxei64_v_u64m8(__VA_ARGS__)

#define	vluxei64_v_u64m8_m(...) __riscv_vluxei64_v_u64m8_tumu(__VA_ARGS__)

#define	vluxei64_v_u8m1(...) __riscv_vluxei64_v_u8m1(__VA_ARGS__)

#define	vluxei64_v_u8m1_m(...) __riscv_vluxei64_v_u8m1_tumu(__VA_ARGS__)

#define	vluxei64_v_u8mf2(...) __riscv_vluxei64_v_u8mf2(__VA_ARGS__)

#define	vluxei64_v_u8mf2_m(...) __riscv_vluxei64_v_u8mf2_tumu(__VA_ARGS__)

#define	vluxei64_v_u8mf4(...) __riscv_vluxei64_v_u8mf4(__VA_ARGS__)

#define	vluxei64_v_u8mf4_m(...) __riscv_vluxei64_v_u8mf4_tumu(__VA_ARGS__)

#define	vluxei64_v_u8mf8(...) __riscv_vluxei64_v_u8mf8(__VA_ARGS__)

#define	vluxei64_v_u8mf8_m(...) __riscv_vluxei64_v_u8mf8_tumu(__VA_ARGS__)

#define	vluxei8_v_f16m1(...) __riscv_vluxei8_v_f16m1(__VA_ARGS__)

#define	vluxei8_v_f16m1_m(...) __riscv_vluxei8_v_f16m1_tumu(__VA_ARGS__)

#define	vluxei8_v_f16m2(...) __riscv_vluxei8_v_f16m2(__VA_ARGS__)

#define	vluxei8_v_f16m2_m(...) __riscv_vluxei8_v_f16m2_tumu(__VA_ARGS__)

#define	vluxei8_v_f16m4(...) __riscv_vluxei8_v_f16m4(__VA_ARGS__)

#define	vluxei8_v_f16m4_m(...) __riscv_vluxei8_v_f16m4_tumu(__VA_ARGS__)

#define	vluxei8_v_f16m8(...) __riscv_vluxei8_v_f16m8(__VA_ARGS__)

#define	vluxei8_v_f16m8_m(...) __riscv_vluxei8_v_f16m8_tumu(__VA_ARGS__)

#define	vluxei8_v_f16mf2(...) __riscv_vluxei8_v_f16mf2(__VA_ARGS__)

#define	vluxei8_v_f16mf2_m(...) __riscv_vluxei8_v_f16mf2_tumu(__VA_ARGS__)

#define	vluxei8_v_f16mf4(...) __riscv_vluxei8_v_f16mf4(__VA_ARGS__)

#define	vluxei8_v_f16mf4_m(...) __riscv_vluxei8_v_f16mf4_tumu(__VA_ARGS__)

#define	vluxei8_v_f32m1(...) __riscv_vluxei8_v_f32m1(__VA_ARGS__)

#define	vluxei8_v_f32m1_m(...) __riscv_vluxei8_v_f32m1_tumu(__VA_ARGS__)

#define	vluxei8_v_f32m2(...) __riscv_vluxei8_v_f32m2(__VA_ARGS__)

#define	vluxei8_v_f32m2_m(...) __riscv_vluxei8_v_f32m2_tumu(__VA_ARGS__)

#define	vluxei8_v_f32m4(...) __riscv_vluxei8_v_f32m4(__VA_ARGS__)

#define	vluxei8_v_f32m4_m(...) __riscv_vluxei8_v_f32m4_tumu(__VA_ARGS__)

#define	vluxei8_v_f32m8(...) __riscv_vluxei8_v_f32m8(__VA_ARGS__)

#define	vluxei8_v_f32m8_m(...) __riscv_vluxei8_v_f32m8_tumu(__VA_ARGS__)

#define	vluxei8_v_f32mf2(...) __riscv_vluxei8_v_f32mf2(__VA_ARGS__)

#define	vluxei8_v_f32mf2_m(...) __riscv_vluxei8_v_f32mf2_tumu(__VA_ARGS__)

#define	vluxei8_v_f64m1(...) __riscv_vluxei8_v_f64m1(__VA_ARGS__)

#define	vluxei8_v_f64m1_m(...) __riscv_vluxei8_v_f64m1_tumu(__VA_ARGS__)

#define	vluxei8_v_f64m2(...) __riscv_vluxei8_v_f64m2(__VA_ARGS__)

#define	vluxei8_v_f64m2_m(...) __riscv_vluxei8_v_f64m2_tumu(__VA_ARGS__)

#define	vluxei8_v_f64m4(...) __riscv_vluxei8_v_f64m4(__VA_ARGS__)

#define	vluxei8_v_f64m4_m(...) __riscv_vluxei8_v_f64m4_tumu(__VA_ARGS__)

#define	vluxei8_v_f64m8(...) __riscv_vluxei8_v_f64m8(__VA_ARGS__)

#define	vluxei8_v_f64m8_m(...) __riscv_vluxei8_v_f64m8_tumu(__VA_ARGS__)

#define	vluxei8_v_i16m1(...) __riscv_vluxei8_v_i16m1(__VA_ARGS__)

#define	vluxei8_v_i16m1_m(...) __riscv_vluxei8_v_i16m1_tumu(__VA_ARGS__)

#define	vluxei8_v_i16m2(...) __riscv_vluxei8_v_i16m2(__VA_ARGS__)

#define	vluxei8_v_i16m2_m(...) __riscv_vluxei8_v_i16m2_tumu(__VA_ARGS__)

#define	vluxei8_v_i16m4(...) __riscv_vluxei8_v_i16m4(__VA_ARGS__)

#define	vluxei8_v_i16m4_m(...) __riscv_vluxei8_v_i16m4_tumu(__VA_ARGS__)

#define	vluxei8_v_i16m8(...) __riscv_vluxei8_v_i16m8(__VA_ARGS__)

#define	vluxei8_v_i16m8_m(...) __riscv_vluxei8_v_i16m8_tumu(__VA_ARGS__)

#define	vluxei8_v_i16mf2(...) __riscv_vluxei8_v_i16mf2(__VA_ARGS__)

#define	vluxei8_v_i16mf2_m(...) __riscv_vluxei8_v_i16mf2_tumu(__VA_ARGS__)

#define	vluxei8_v_i16mf4(...) __riscv_vluxei8_v_i16mf4(__VA_ARGS__)

#define	vluxei8_v_i16mf4_m(...) __riscv_vluxei8_v_i16mf4_tumu(__VA_ARGS__)

#define	vluxei8_v_i32m1(...) __riscv_vluxei8_v_i32m1(__VA_ARGS__)

#define	vluxei8_v_i32m1_m(...) __riscv_vluxei8_v_i32m1_tumu(__VA_ARGS__)

#define	vluxei8_v_i32m2(...) __riscv_vluxei8_v_i32m2(__VA_ARGS__)

#define	vluxei8_v_i32m2_m(...) __riscv_vluxei8_v_i32m2_tumu(__VA_ARGS__)

#define	vluxei8_v_i32m4(...) __riscv_vluxei8_v_i32m4(__VA_ARGS__)

#define	vluxei8_v_i32m4_m(...) __riscv_vluxei8_v_i32m4_tumu(__VA_ARGS__)

#define	vluxei8_v_i32m8(...) __riscv_vluxei8_v_i32m8(__VA_ARGS__)

#define	vluxei8_v_i32m8_m(...) __riscv_vluxei8_v_i32m8_tumu(__VA_ARGS__)

#define	vluxei8_v_i32mf2(...) __riscv_vluxei8_v_i32mf2(__VA_ARGS__)

#define	vluxei8_v_i32mf2_m(...) __riscv_vluxei8_v_i32mf2_tumu(__VA_ARGS__)

#define	vluxei8_v_i64m1(...) __riscv_vluxei8_v_i64m1(__VA_ARGS__)

#define	vluxei8_v_i64m1_m(...) __riscv_vluxei8_v_i64m1_tumu(__VA_ARGS__)

#define	vluxei8_v_i64m2(...) __riscv_vluxei8_v_i64m2(__VA_ARGS__)

#define	vluxei8_v_i64m2_m(...) __riscv_vluxei8_v_i64m2_tumu(__VA_ARGS__)

#define	vluxei8_v_i64m4(...) __riscv_vluxei8_v_i64m4(__VA_ARGS__)

#define	vluxei8_v_i64m4_m(...) __riscv_vluxei8_v_i64m4_tumu(__VA_ARGS__)

#define	vluxei8_v_i64m8(...) __riscv_vluxei8_v_i64m8(__VA_ARGS__)

#define	vluxei8_v_i64m8_m(...) __riscv_vluxei8_v_i64m8_tumu(__VA_ARGS__)

#define	vluxei8_v_i8m1(...) __riscv_vluxei8_v_i8m1(__VA_ARGS__)

#define	vluxei8_v_i8m1_m(...) __riscv_vluxei8_v_i8m1_tumu(__VA_ARGS__)

#define	vluxei8_v_i8m2(...) __riscv_vluxei8_v_i8m2(__VA_ARGS__)

#define	vluxei8_v_i8m2_m(...) __riscv_vluxei8_v_i8m2_tumu(__VA_ARGS__)

#define	vluxei8_v_i8m4(...) __riscv_vluxei8_v_i8m4(__VA_ARGS__)

#define	vluxei8_v_i8m4_m(...) __riscv_vluxei8_v_i8m4_tumu(__VA_ARGS__)

#define	vluxei8_v_i8m8(...) __riscv_vluxei8_v_i8m8(__VA_ARGS__)

#define	vluxei8_v_i8m8_m(...) __riscv_vluxei8_v_i8m8_tumu(__VA_ARGS__)

#define	vluxei8_v_i8mf2(...) __riscv_vluxei8_v_i8mf2(__VA_ARGS__)

#define	vluxei8_v_i8mf2_m(...) __riscv_vluxei8_v_i8mf2_tumu(__VA_ARGS__)

#define	vluxei8_v_i8mf4(...) __riscv_vluxei8_v_i8mf4(__VA_ARGS__)

#define	vluxei8_v_i8mf4_m(...) __riscv_vluxei8_v_i8mf4_tumu(__VA_ARGS__)

#define	vluxei8_v_i8mf8(...) __riscv_vluxei8_v_i8mf8(__VA_ARGS__)

#define	vluxei8_v_i8mf8_m(...) __riscv_vluxei8_v_i8mf8_tumu(__VA_ARGS__)

#define	vluxei8_v_u16m1(...) __riscv_vluxei8_v_u16m1(__VA_ARGS__)

#define	vluxei8_v_u16m1_m(...) __riscv_vluxei8_v_u16m1_tumu(__VA_ARGS__)

#define	vluxei8_v_u16m2(...) __riscv_vluxei8_v_u16m2(__VA_ARGS__)

#define	vluxei8_v_u16m2_m(...) __riscv_vluxei8_v_u16m2_tumu(__VA_ARGS__)

#define	vluxei8_v_u16m4(...) __riscv_vluxei8_v_u16m4(__VA_ARGS__)

#define	vluxei8_v_u16m4_m(...) __riscv_vluxei8_v_u16m4_tumu(__VA_ARGS__)

#define	vluxei8_v_u16m8(...) __riscv_vluxei8_v_u16m8(__VA_ARGS__)

#define	vluxei8_v_u16m8_m(...) __riscv_vluxei8_v_u16m8_tumu(__VA_ARGS__)

#define	vluxei8_v_u16mf2(...) __riscv_vluxei8_v_u16mf2(__VA_ARGS__)

#define	vluxei8_v_u16mf2_m(...) __riscv_vluxei8_v_u16mf2_tumu(__VA_ARGS__)

#define	vluxei8_v_u16mf4(...) __riscv_vluxei8_v_u16mf4(__VA_ARGS__)

#define	vluxei8_v_u16mf4_m(...) __riscv_vluxei8_v_u16mf4_tumu(__VA_ARGS__)

#define	vluxei8_v_u32m1(...) __riscv_vluxei8_v_u32m1(__VA_ARGS__)

#define	vluxei8_v_u32m1_m(...) __riscv_vluxei8_v_u32m1_tumu(__VA_ARGS__)

#define	vluxei8_v_u32m2(...) __riscv_vluxei8_v_u32m2(__VA_ARGS__)

#define	vluxei8_v_u32m2_m(...) __riscv_vluxei8_v_u32m2_tumu(__VA_ARGS__)

#define	vluxei8_v_u32m4(...) __riscv_vluxei8_v_u32m4(__VA_ARGS__)

#define	vluxei8_v_u32m4_m(...) __riscv_vluxei8_v_u32m4_tumu(__VA_ARGS__)

#define	vluxei8_v_u32m8(...) __riscv_vluxei8_v_u32m8(__VA_ARGS__)

#define	vluxei8_v_u32m8_m(...) __riscv_vluxei8_v_u32m8_tumu(__VA_ARGS__)

#define	vluxei8_v_u32mf2(...) __riscv_vluxei8_v_u32mf2(__VA_ARGS__)

#define	vluxei8_v_u32mf2_m(...) __riscv_vluxei8_v_u32mf2_tumu(__VA_ARGS__)

#define	vluxei8_v_u64m1(...) __riscv_vluxei8_v_u64m1(__VA_ARGS__)

#define	vluxei8_v_u64m1_m(...) __riscv_vluxei8_v_u64m1_tumu(__VA_ARGS__)

#define	vluxei8_v_u64m2(...) __riscv_vluxei8_v_u64m2(__VA_ARGS__)

#define	vluxei8_v_u64m2_m(...) __riscv_vluxei8_v_u64m2_tumu(__VA_ARGS__)

#define	vluxei8_v_u64m4(...) __riscv_vluxei8_v_u64m4(__VA_ARGS__)

#define	vluxei8_v_u64m4_m(...) __riscv_vluxei8_v_u64m4_tumu(__VA_ARGS__)

#define	vluxei8_v_u64m8(...) __riscv_vluxei8_v_u64m8(__VA_ARGS__)

#define	vluxei8_v_u64m8_m(...) __riscv_vluxei8_v_u64m8_tumu(__VA_ARGS__)

#define	vluxei8_v_u8m1(...) __riscv_vluxei8_v_u8m1(__VA_ARGS__)

#define	vluxei8_v_u8m1_m(...) __riscv_vluxei8_v_u8m1_tumu(__VA_ARGS__)

#define	vluxei8_v_u8m2(...) __riscv_vluxei8_v_u8m2(__VA_ARGS__)

#define	vluxei8_v_u8m2_m(...) __riscv_vluxei8_v_u8m2_tumu(__VA_ARGS__)

#define	vluxei8_v_u8m4(...) __riscv_vluxei8_v_u8m4(__VA_ARGS__)

#define	vluxei8_v_u8m4_m(...) __riscv_vluxei8_v_u8m4_tumu(__VA_ARGS__)

#define	vluxei8_v_u8m8(...) __riscv_vluxei8_v_u8m8(__VA_ARGS__)

#define	vluxei8_v_u8m8_m(...) __riscv_vluxei8_v_u8m8_tumu(__VA_ARGS__)

#define	vluxei8_v_u8mf2(...) __riscv_vluxei8_v_u8mf2(__VA_ARGS__)

#define	vluxei8_v_u8mf2_m(...) __riscv_vluxei8_v_u8mf2_tumu(__VA_ARGS__)

#define	vluxei8_v_u8mf4(...) __riscv_vluxei8_v_u8mf4(__VA_ARGS__)

#define	vluxei8_v_u8mf4_m(...) __riscv_vluxei8_v_u8mf4_tumu(__VA_ARGS__)

#define	vluxei8_v_u8mf8(...) __riscv_vluxei8_v_u8mf8(__VA_ARGS__)

#define	vluxei8_v_u8mf8_m(...) __riscv_vluxei8_v_u8mf8_tumu(__VA_ARGS__)

#define	vluxseg2ei16_v_f16m1(...) __riscv_vluxseg2ei16_v_f16m1(__VA_ARGS__)

#define	vluxseg2ei16_v_f16m1_m(...) __riscv_vluxseg2ei16_v_f16m1_tumu(__VA_ARGS__)

#define	vluxseg2ei16_v_f16m2(...) __riscv_vluxseg2ei16_v_f16m2(__VA_ARGS__)

#define	vluxseg2ei16_v_f16m2_m(...) __riscv_vluxseg2ei16_v_f16m2_tumu(__VA_ARGS__)

#define	vluxseg2ei16_v_f16m4(...) __riscv_vluxseg2ei16_v_f16m4(__VA_ARGS__)

#define	vluxseg2ei16_v_f16m4_m(...) __riscv_vluxseg2ei16_v_f16m4_tumu(__VA_ARGS__)

#define	vluxseg2ei16_v_f16mf2(...) __riscv_vluxseg2ei16_v_f16mf2(__VA_ARGS__)

#define	vluxseg2ei16_v_f16mf2_m(...) __riscv_vluxseg2ei16_v_f16mf2_tumu(__VA_ARGS__)

#define	vluxseg2ei16_v_f16mf4(...) __riscv_vluxseg2ei16_v_f16mf4(__VA_ARGS__)

#define	vluxseg2ei16_v_f16mf4_m(...) __riscv_vluxseg2ei16_v_f16mf4_tumu(__VA_ARGS__)

#define	vluxseg2ei16_v_f32m1(...) __riscv_vluxseg2ei16_v_f32m1(__VA_ARGS__)

#define	vluxseg2ei16_v_f32m1_m(...) __riscv_vluxseg2ei16_v_f32m1_tumu(__VA_ARGS__)

#define	vluxseg2ei16_v_f32m2(...) __riscv_vluxseg2ei16_v_f32m2(__VA_ARGS__)

#define	vluxseg2ei16_v_f32m2_m(...) __riscv_vluxseg2ei16_v_f32m2_tumu(__VA_ARGS__)

#define	vluxseg2ei16_v_f32m4(...) __riscv_vluxseg2ei16_v_f32m4(__VA_ARGS__)

#define	vluxseg2ei16_v_f32m4_m(...) __riscv_vluxseg2ei16_v_f32m4_tumu(__VA_ARGS__)

#define	vluxseg2ei16_v_f32mf2(...) __riscv_vluxseg2ei16_v_f32mf2(__VA_ARGS__)

#define	vluxseg2ei16_v_f32mf2_m(...) __riscv_vluxseg2ei16_v_f32mf2_tumu(__VA_ARGS__)

#define	vluxseg2ei16_v_f64m1(...) __riscv_vluxseg2ei16_v_f64m1(__VA_ARGS__)

#define	vluxseg2ei16_v_f64m1_m(...) __riscv_vluxseg2ei16_v_f64m1_tumu(__VA_ARGS__)

#define	vluxseg2ei16_v_f64m2(...) __riscv_vluxseg2ei16_v_f64m2(__VA_ARGS__)

#define	vluxseg2ei16_v_f64m2_m(...) __riscv_vluxseg2ei16_v_f64m2_tumu(__VA_ARGS__)

#define	vluxseg2ei16_v_f64m4(...) __riscv_vluxseg2ei16_v_f64m4(__VA_ARGS__)

#define	vluxseg2ei16_v_f64m4_m(...) __riscv_vluxseg2ei16_v_f64m4_tumu(__VA_ARGS__)

#define	vluxseg2ei16_v_i16m1(...) __riscv_vluxseg2ei16_v_i16m1(__VA_ARGS__)

#define	vluxseg2ei16_v_i16m1_m(...) __riscv_vluxseg2ei16_v_i16m1_tumu(__VA_ARGS__)

#define	vluxseg2ei16_v_i16m2(...) __riscv_vluxseg2ei16_v_i16m2(__VA_ARGS__)

#define	vluxseg2ei16_v_i16m2_m(...) __riscv_vluxseg2ei16_v_i16m2_tumu(__VA_ARGS__)

#define	vluxseg2ei16_v_i16m4(...) __riscv_vluxseg2ei16_v_i16m4(__VA_ARGS__)

#define	vluxseg2ei16_v_i16m4_m(...) __riscv_vluxseg2ei16_v_i16m4_tumu(__VA_ARGS__)

#define	vluxseg2ei16_v_i16mf2(...) __riscv_vluxseg2ei16_v_i16mf2(__VA_ARGS__)

#define	vluxseg2ei16_v_i16mf2_m(...) __riscv_vluxseg2ei16_v_i16mf2_tumu(__VA_ARGS__)

#define	vluxseg2ei16_v_i16mf4(...) __riscv_vluxseg2ei16_v_i16mf4(__VA_ARGS__)

#define	vluxseg2ei16_v_i16mf4_m(...) __riscv_vluxseg2ei16_v_i16mf4_tumu(__VA_ARGS__)

#define	vluxseg2ei16_v_i32m1(...) __riscv_vluxseg2ei16_v_i32m1(__VA_ARGS__)

#define	vluxseg2ei16_v_i32m1_m(...) __riscv_vluxseg2ei16_v_i32m1_tumu(__VA_ARGS__)

#define	vluxseg2ei16_v_i32m2(...) __riscv_vluxseg2ei16_v_i32m2(__VA_ARGS__)

#define	vluxseg2ei16_v_i32m2_m(...) __riscv_vluxseg2ei16_v_i32m2_tumu(__VA_ARGS__)

#define	vluxseg2ei16_v_i32m4(...) __riscv_vluxseg2ei16_v_i32m4(__VA_ARGS__)

#define	vluxseg2ei16_v_i32m4_m(...) __riscv_vluxseg2ei16_v_i32m4_tumu(__VA_ARGS__)

#define	vluxseg2ei16_v_i32mf2(...) __riscv_vluxseg2ei16_v_i32mf2(__VA_ARGS__)

#define	vluxseg2ei16_v_i32mf2_m(...) __riscv_vluxseg2ei16_v_i32mf2_tumu(__VA_ARGS__)

#define	vluxseg2ei16_v_i64m1(...) __riscv_vluxseg2ei16_v_i64m1(__VA_ARGS__)

#define	vluxseg2ei16_v_i64m1_m(...) __riscv_vluxseg2ei16_v_i64m1_tumu(__VA_ARGS__)

#define	vluxseg2ei16_v_i64m2(...) __riscv_vluxseg2ei16_v_i64m2(__VA_ARGS__)

#define	vluxseg2ei16_v_i64m2_m(...) __riscv_vluxseg2ei16_v_i64m2_tumu(__VA_ARGS__)

#define	vluxseg2ei16_v_i64m4(...) __riscv_vluxseg2ei16_v_i64m4(__VA_ARGS__)

#define	vluxseg2ei16_v_i64m4_m(...) __riscv_vluxseg2ei16_v_i64m4_tumu(__VA_ARGS__)

#define	vluxseg2ei16_v_i8m1(...) __riscv_vluxseg2ei16_v_i8m1(__VA_ARGS__)

#define	vluxseg2ei16_v_i8m1_m(...) __riscv_vluxseg2ei16_v_i8m1_tumu(__VA_ARGS__)

#define	vluxseg2ei16_v_i8m2(...) __riscv_vluxseg2ei16_v_i8m2(__VA_ARGS__)

#define	vluxseg2ei16_v_i8m2_m(...) __riscv_vluxseg2ei16_v_i8m2_tumu(__VA_ARGS__)

#define	vluxseg2ei16_v_i8m4(...) __riscv_vluxseg2ei16_v_i8m4(__VA_ARGS__)

#define	vluxseg2ei16_v_i8m4_m(...) __riscv_vluxseg2ei16_v_i8m4_tumu(__VA_ARGS__)

#define	vluxseg2ei16_v_i8mf2(...) __riscv_vluxseg2ei16_v_i8mf2(__VA_ARGS__)

#define	vluxseg2ei16_v_i8mf2_m(...) __riscv_vluxseg2ei16_v_i8mf2_tumu(__VA_ARGS__)

#define	vluxseg2ei16_v_i8mf4(...) __riscv_vluxseg2ei16_v_i8mf4(__VA_ARGS__)

#define	vluxseg2ei16_v_i8mf4_m(...) __riscv_vluxseg2ei16_v_i8mf4_tumu(__VA_ARGS__)

#define	vluxseg2ei16_v_i8mf8(...) __riscv_vluxseg2ei16_v_i8mf8(__VA_ARGS__)

#define	vluxseg2ei16_v_i8mf8_m(...) __riscv_vluxseg2ei16_v_i8mf8_tumu(__VA_ARGS__)

#define	vluxseg2ei16_v_u16m1(...) __riscv_vluxseg2ei16_v_u16m1(__VA_ARGS__)

#define	vluxseg2ei16_v_u16m1_m(...) __riscv_vluxseg2ei16_v_u16m1_tumu(__VA_ARGS__)

#define	vluxseg2ei16_v_u16m2(...) __riscv_vluxseg2ei16_v_u16m2(__VA_ARGS__)

#define	vluxseg2ei16_v_u16m2_m(...) __riscv_vluxseg2ei16_v_u16m2_tumu(__VA_ARGS__)

#define	vluxseg2ei16_v_u16m4(...) __riscv_vluxseg2ei16_v_u16m4(__VA_ARGS__)

#define	vluxseg2ei16_v_u16m4_m(...) __riscv_vluxseg2ei16_v_u16m4_tumu(__VA_ARGS__)

#define	vluxseg2ei16_v_u16mf2(...) __riscv_vluxseg2ei16_v_u16mf2(__VA_ARGS__)

#define	vluxseg2ei16_v_u16mf2_m(...) __riscv_vluxseg2ei16_v_u16mf2_tumu(__VA_ARGS__)

#define	vluxseg2ei16_v_u16mf4(...) __riscv_vluxseg2ei16_v_u16mf4(__VA_ARGS__)

#define	vluxseg2ei16_v_u16mf4_m(...) __riscv_vluxseg2ei16_v_u16mf4_tumu(__VA_ARGS__)

#define	vluxseg2ei16_v_u32m1(...) __riscv_vluxseg2ei16_v_u32m1(__VA_ARGS__)

#define	vluxseg2ei16_v_u32m1_m(...) __riscv_vluxseg2ei16_v_u32m1_tumu(__VA_ARGS__)

#define	vluxseg2ei16_v_u32m2(...) __riscv_vluxseg2ei16_v_u32m2(__VA_ARGS__)

#define	vluxseg2ei16_v_u32m2_m(...) __riscv_vluxseg2ei16_v_u32m2_tumu(__VA_ARGS__)

#define	vluxseg2ei16_v_u32m4(...) __riscv_vluxseg2ei16_v_u32m4(__VA_ARGS__)

#define	vluxseg2ei16_v_u32m4_m(...) __riscv_vluxseg2ei16_v_u32m4_tumu(__VA_ARGS__)

#define	vluxseg2ei16_v_u32mf2(...) __riscv_vluxseg2ei16_v_u32mf2(__VA_ARGS__)

#define	vluxseg2ei16_v_u32mf2_m(...) __riscv_vluxseg2ei16_v_u32mf2_tumu(__VA_ARGS__)

#define	vluxseg2ei16_v_u64m1(...) __riscv_vluxseg2ei16_v_u64m1(__VA_ARGS__)

#define	vluxseg2ei16_v_u64m1_m(...) __riscv_vluxseg2ei16_v_u64m1_tumu(__VA_ARGS__)

#define	vluxseg2ei16_v_u64m2(...) __riscv_vluxseg2ei16_v_u64m2(__VA_ARGS__)

#define	vluxseg2ei16_v_u64m2_m(...) __riscv_vluxseg2ei16_v_u64m2_tumu(__VA_ARGS__)

#define	vluxseg2ei16_v_u64m4(...) __riscv_vluxseg2ei16_v_u64m4(__VA_ARGS__)

#define	vluxseg2ei16_v_u64m4_m(...) __riscv_vluxseg2ei16_v_u64m4_tumu(__VA_ARGS__)

#define	vluxseg2ei16_v_u8m1(...) __riscv_vluxseg2ei16_v_u8m1(__VA_ARGS__)

#define	vluxseg2ei16_v_u8m1_m(...) __riscv_vluxseg2ei16_v_u8m1_tumu(__VA_ARGS__)

#define	vluxseg2ei16_v_u8m2(...) __riscv_vluxseg2ei16_v_u8m2(__VA_ARGS__)

#define	vluxseg2ei16_v_u8m2_m(...) __riscv_vluxseg2ei16_v_u8m2_tumu(__VA_ARGS__)

#define	vluxseg2ei16_v_u8m4(...) __riscv_vluxseg2ei16_v_u8m4(__VA_ARGS__)

#define	vluxseg2ei16_v_u8m4_m(...) __riscv_vluxseg2ei16_v_u8m4_tumu(__VA_ARGS__)

#define	vluxseg2ei16_v_u8mf2(...) __riscv_vluxseg2ei16_v_u8mf2(__VA_ARGS__)

#define	vluxseg2ei16_v_u8mf2_m(...) __riscv_vluxseg2ei16_v_u8mf2_tumu(__VA_ARGS__)

#define	vluxseg2ei16_v_u8mf4(...) __riscv_vluxseg2ei16_v_u8mf4(__VA_ARGS__)

#define	vluxseg2ei16_v_u8mf4_m(...) __riscv_vluxseg2ei16_v_u8mf4_tumu(__VA_ARGS__)

#define	vluxseg2ei16_v_u8mf8(...) __riscv_vluxseg2ei16_v_u8mf8(__VA_ARGS__)

#define	vluxseg2ei16_v_u8mf8_m(...) __riscv_vluxseg2ei16_v_u8mf8_tumu(__VA_ARGS__)

#define	vluxseg2ei32_v_f16m1(...) __riscv_vluxseg2ei32_v_f16m1(__VA_ARGS__)

#define	vluxseg2ei32_v_f16m1_m(...) __riscv_vluxseg2ei32_v_f16m1_tumu(__VA_ARGS__)

#define	vluxseg2ei32_v_f16m2(...) __riscv_vluxseg2ei32_v_f16m2(__VA_ARGS__)

#define	vluxseg2ei32_v_f16m2_m(...) __riscv_vluxseg2ei32_v_f16m2_tumu(__VA_ARGS__)

#define	vluxseg2ei32_v_f16m4(...) __riscv_vluxseg2ei32_v_f16m4(__VA_ARGS__)

#define	vluxseg2ei32_v_f16m4_m(...) __riscv_vluxseg2ei32_v_f16m4_tumu(__VA_ARGS__)

#define	vluxseg2ei32_v_f16mf2(...) __riscv_vluxseg2ei32_v_f16mf2(__VA_ARGS__)

#define	vluxseg2ei32_v_f16mf2_m(...) __riscv_vluxseg2ei32_v_f16mf2_tumu(__VA_ARGS__)

#define	vluxseg2ei32_v_f16mf4(...) __riscv_vluxseg2ei32_v_f16mf4(__VA_ARGS__)

#define	vluxseg2ei32_v_f16mf4_m(...) __riscv_vluxseg2ei32_v_f16mf4_tumu(__VA_ARGS__)

#define	vluxseg2ei32_v_f32m1(...) __riscv_vluxseg2ei32_v_f32m1(__VA_ARGS__)

#define	vluxseg2ei32_v_f32m1_m(...) __riscv_vluxseg2ei32_v_f32m1_tumu(__VA_ARGS__)

#define	vluxseg2ei32_v_f32m2(...) __riscv_vluxseg2ei32_v_f32m2(__VA_ARGS__)

#define	vluxseg2ei32_v_f32m2_m(...) __riscv_vluxseg2ei32_v_f32m2_tumu(__VA_ARGS__)

#define	vluxseg2ei32_v_f32m4(...) __riscv_vluxseg2ei32_v_f32m4(__VA_ARGS__)

#define	vluxseg2ei32_v_f32m4_m(...) __riscv_vluxseg2ei32_v_f32m4_tumu(__VA_ARGS__)

#define	vluxseg2ei32_v_f32mf2(...) __riscv_vluxseg2ei32_v_f32mf2(__VA_ARGS__)

#define	vluxseg2ei32_v_f32mf2_m(...) __riscv_vluxseg2ei32_v_f32mf2_tumu(__VA_ARGS__)

#define	vluxseg2ei32_v_f64m1(...) __riscv_vluxseg2ei32_v_f64m1(__VA_ARGS__)

#define	vluxseg2ei32_v_f64m1_m(...) __riscv_vluxseg2ei32_v_f64m1_tumu(__VA_ARGS__)

#define	vluxseg2ei32_v_f64m2(...) __riscv_vluxseg2ei32_v_f64m2(__VA_ARGS__)

#define	vluxseg2ei32_v_f64m2_m(...) __riscv_vluxseg2ei32_v_f64m2_tumu(__VA_ARGS__)

#define	vluxseg2ei32_v_f64m4(...) __riscv_vluxseg2ei32_v_f64m4(__VA_ARGS__)

#define	vluxseg2ei32_v_f64m4_m(...) __riscv_vluxseg2ei32_v_f64m4_tumu(__VA_ARGS__)

#define	vluxseg2ei32_v_i16m1(...) __riscv_vluxseg2ei32_v_i16m1(__VA_ARGS__)

#define	vluxseg2ei32_v_i16m1_m(...) __riscv_vluxseg2ei32_v_i16m1_tumu(__VA_ARGS__)

#define	vluxseg2ei32_v_i16m2(...) __riscv_vluxseg2ei32_v_i16m2(__VA_ARGS__)

#define	vluxseg2ei32_v_i16m2_m(...) __riscv_vluxseg2ei32_v_i16m2_tumu(__VA_ARGS__)

#define	vluxseg2ei32_v_i16m4(...) __riscv_vluxseg2ei32_v_i16m4(__VA_ARGS__)

#define	vluxseg2ei32_v_i16m4_m(...) __riscv_vluxseg2ei32_v_i16m4_tumu(__VA_ARGS__)

#define	vluxseg2ei32_v_i16mf2(...) __riscv_vluxseg2ei32_v_i16mf2(__VA_ARGS__)

#define	vluxseg2ei32_v_i16mf2_m(...) __riscv_vluxseg2ei32_v_i16mf2_tumu(__VA_ARGS__)

#define	vluxseg2ei32_v_i16mf4(...) __riscv_vluxseg2ei32_v_i16mf4(__VA_ARGS__)

#define	vluxseg2ei32_v_i16mf4_m(...) __riscv_vluxseg2ei32_v_i16mf4_tumu(__VA_ARGS__)

#define	vluxseg2ei32_v_i32m1(...) __riscv_vluxseg2ei32_v_i32m1(__VA_ARGS__)

#define	vluxseg2ei32_v_i32m1_m(...) __riscv_vluxseg2ei32_v_i32m1_tumu(__VA_ARGS__)

#define	vluxseg2ei32_v_i32m2(...) __riscv_vluxseg2ei32_v_i32m2(__VA_ARGS__)

#define	vluxseg2ei32_v_i32m2_m(...) __riscv_vluxseg2ei32_v_i32m2_tumu(__VA_ARGS__)

#define	vluxseg2ei32_v_i32m4(...) __riscv_vluxseg2ei32_v_i32m4(__VA_ARGS__)

#define	vluxseg2ei32_v_i32m4_m(...) __riscv_vluxseg2ei32_v_i32m4_tumu(__VA_ARGS__)

#define	vluxseg2ei32_v_i32mf2(...) __riscv_vluxseg2ei32_v_i32mf2(__VA_ARGS__)

#define	vluxseg2ei32_v_i32mf2_m(...) __riscv_vluxseg2ei32_v_i32mf2_tumu(__VA_ARGS__)

#define	vluxseg2ei32_v_i64m1(...) __riscv_vluxseg2ei32_v_i64m1(__VA_ARGS__)

#define	vluxseg2ei32_v_i64m1_m(...) __riscv_vluxseg2ei32_v_i64m1_tumu(__VA_ARGS__)

#define	vluxseg2ei32_v_i64m2(...) __riscv_vluxseg2ei32_v_i64m2(__VA_ARGS__)

#define	vluxseg2ei32_v_i64m2_m(...) __riscv_vluxseg2ei32_v_i64m2_tumu(__VA_ARGS__)

#define	vluxseg2ei32_v_i64m4(...) __riscv_vluxseg2ei32_v_i64m4(__VA_ARGS__)

#define	vluxseg2ei32_v_i64m4_m(...) __riscv_vluxseg2ei32_v_i64m4_tumu(__VA_ARGS__)

#define	vluxseg2ei32_v_i8m1(...) __riscv_vluxseg2ei32_v_i8m1(__VA_ARGS__)

#define	vluxseg2ei32_v_i8m1_m(...) __riscv_vluxseg2ei32_v_i8m1_tumu(__VA_ARGS__)

#define	vluxseg2ei32_v_i8m2(...) __riscv_vluxseg2ei32_v_i8m2(__VA_ARGS__)

#define	vluxseg2ei32_v_i8m2_m(...) __riscv_vluxseg2ei32_v_i8m2_tumu(__VA_ARGS__)

#define	vluxseg2ei32_v_i8mf2(...) __riscv_vluxseg2ei32_v_i8mf2(__VA_ARGS__)

#define	vluxseg2ei32_v_i8mf2_m(...) __riscv_vluxseg2ei32_v_i8mf2_tumu(__VA_ARGS__)

#define	vluxseg2ei32_v_i8mf4(...) __riscv_vluxseg2ei32_v_i8mf4(__VA_ARGS__)

#define	vluxseg2ei32_v_i8mf4_m(...) __riscv_vluxseg2ei32_v_i8mf4_tumu(__VA_ARGS__)

#define	vluxseg2ei32_v_i8mf8(...) __riscv_vluxseg2ei32_v_i8mf8(__VA_ARGS__)

#define	vluxseg2ei32_v_i8mf8_m(...) __riscv_vluxseg2ei32_v_i8mf8_tumu(__VA_ARGS__)

#define	vluxseg2ei32_v_u16m1(...) __riscv_vluxseg2ei32_v_u16m1(__VA_ARGS__)

#define	vluxseg2ei32_v_u16m1_m(...) __riscv_vluxseg2ei32_v_u16m1_tumu(__VA_ARGS__)

#define	vluxseg2ei32_v_u16m2(...) __riscv_vluxseg2ei32_v_u16m2(__VA_ARGS__)

#define	vluxseg2ei32_v_u16m2_m(...) __riscv_vluxseg2ei32_v_u16m2_tumu(__VA_ARGS__)

#define	vluxseg2ei32_v_u16m4(...) __riscv_vluxseg2ei32_v_u16m4(__VA_ARGS__)

#define	vluxseg2ei32_v_u16m4_m(...) __riscv_vluxseg2ei32_v_u16m4_tumu(__VA_ARGS__)

#define	vluxseg2ei32_v_u16mf2(...) __riscv_vluxseg2ei32_v_u16mf2(__VA_ARGS__)

#define	vluxseg2ei32_v_u16mf2_m(...) __riscv_vluxseg2ei32_v_u16mf2_tumu(__VA_ARGS__)

#define	vluxseg2ei32_v_u16mf4(...) __riscv_vluxseg2ei32_v_u16mf4(__VA_ARGS__)

#define	vluxseg2ei32_v_u16mf4_m(...) __riscv_vluxseg2ei32_v_u16mf4_tumu(__VA_ARGS__)

#define	vluxseg2ei32_v_u32m1(...) __riscv_vluxseg2ei32_v_u32m1(__VA_ARGS__)

#define	vluxseg2ei32_v_u32m1_m(...) __riscv_vluxseg2ei32_v_u32m1_tumu(__VA_ARGS__)

#define	vluxseg2ei32_v_u32m2(...) __riscv_vluxseg2ei32_v_u32m2(__VA_ARGS__)

#define	vluxseg2ei32_v_u32m2_m(...) __riscv_vluxseg2ei32_v_u32m2_tumu(__VA_ARGS__)

#define	vluxseg2ei32_v_u32m4(...) __riscv_vluxseg2ei32_v_u32m4(__VA_ARGS__)

#define	vluxseg2ei32_v_u32m4_m(...) __riscv_vluxseg2ei32_v_u32m4_tumu(__VA_ARGS__)

#define	vluxseg2ei32_v_u32mf2(...) __riscv_vluxseg2ei32_v_u32mf2(__VA_ARGS__)

#define	vluxseg2ei32_v_u32mf2_m(...) __riscv_vluxseg2ei32_v_u32mf2_tumu(__VA_ARGS__)

#define	vluxseg2ei32_v_u64m1(...) __riscv_vluxseg2ei32_v_u64m1(__VA_ARGS__)

#define	vluxseg2ei32_v_u64m1_m(...) __riscv_vluxseg2ei32_v_u64m1_tumu(__VA_ARGS__)

#define	vluxseg2ei32_v_u64m2(...) __riscv_vluxseg2ei32_v_u64m2(__VA_ARGS__)

#define	vluxseg2ei32_v_u64m2_m(...) __riscv_vluxseg2ei32_v_u64m2_tumu(__VA_ARGS__)

#define	vluxseg2ei32_v_u64m4(...) __riscv_vluxseg2ei32_v_u64m4(__VA_ARGS__)

#define	vluxseg2ei32_v_u64m4_m(...) __riscv_vluxseg2ei32_v_u64m4_tumu(__VA_ARGS__)

#define	vluxseg2ei32_v_u8m1(...) __riscv_vluxseg2ei32_v_u8m1(__VA_ARGS__)

#define	vluxseg2ei32_v_u8m1_m(...) __riscv_vluxseg2ei32_v_u8m1_tumu(__VA_ARGS__)

#define	vluxseg2ei32_v_u8m2(...) __riscv_vluxseg2ei32_v_u8m2(__VA_ARGS__)

#define	vluxseg2ei32_v_u8m2_m(...) __riscv_vluxseg2ei32_v_u8m2_tumu(__VA_ARGS__)

#define	vluxseg2ei32_v_u8mf2(...) __riscv_vluxseg2ei32_v_u8mf2(__VA_ARGS__)

#define	vluxseg2ei32_v_u8mf2_m(...) __riscv_vluxseg2ei32_v_u8mf2_tumu(__VA_ARGS__)

#define	vluxseg2ei32_v_u8mf4(...) __riscv_vluxseg2ei32_v_u8mf4(__VA_ARGS__)

#define	vluxseg2ei32_v_u8mf4_m(...) __riscv_vluxseg2ei32_v_u8mf4_tumu(__VA_ARGS__)

#define	vluxseg2ei32_v_u8mf8(...) __riscv_vluxseg2ei32_v_u8mf8(__VA_ARGS__)

#define	vluxseg2ei32_v_u8mf8_m(...) __riscv_vluxseg2ei32_v_u8mf8_tumu(__VA_ARGS__)

#define	vluxseg2ei64_v_f16m1(...) __riscv_vluxseg2ei64_v_f16m1(__VA_ARGS__)

#define	vluxseg2ei64_v_f16m1_m(...) __riscv_vluxseg2ei64_v_f16m1_tumu(__VA_ARGS__)

#define	vluxseg2ei64_v_f16m2(...) __riscv_vluxseg2ei64_v_f16m2(__VA_ARGS__)

#define	vluxseg2ei64_v_f16m2_m(...) __riscv_vluxseg2ei64_v_f16m2_tumu(__VA_ARGS__)

#define	vluxseg2ei64_v_f16mf2(...) __riscv_vluxseg2ei64_v_f16mf2(__VA_ARGS__)

#define	vluxseg2ei64_v_f16mf2_m(...) __riscv_vluxseg2ei64_v_f16mf2_tumu(__VA_ARGS__)

#define	vluxseg2ei64_v_f16mf4(...) __riscv_vluxseg2ei64_v_f16mf4(__VA_ARGS__)

#define	vluxseg2ei64_v_f16mf4_m(...) __riscv_vluxseg2ei64_v_f16mf4_tumu(__VA_ARGS__)

#define	vluxseg2ei64_v_f32m1(...) __riscv_vluxseg2ei64_v_f32m1(__VA_ARGS__)

#define	vluxseg2ei64_v_f32m1_m(...) __riscv_vluxseg2ei64_v_f32m1_tumu(__VA_ARGS__)

#define	vluxseg2ei64_v_f32m2(...) __riscv_vluxseg2ei64_v_f32m2(__VA_ARGS__)

#define	vluxseg2ei64_v_f32m2_m(...) __riscv_vluxseg2ei64_v_f32m2_tumu(__VA_ARGS__)

#define	vluxseg2ei64_v_f32m4(...) __riscv_vluxseg2ei64_v_f32m4(__VA_ARGS__)

#define	vluxseg2ei64_v_f32m4_m(...) __riscv_vluxseg2ei64_v_f32m4_tumu(__VA_ARGS__)

#define	vluxseg2ei64_v_f32mf2(...) __riscv_vluxseg2ei64_v_f32mf2(__VA_ARGS__)

#define	vluxseg2ei64_v_f32mf2_m(...) __riscv_vluxseg2ei64_v_f32mf2_tumu(__VA_ARGS__)

#define	vluxseg2ei64_v_f64m1(...) __riscv_vluxseg2ei64_v_f64m1(__VA_ARGS__)

#define	vluxseg2ei64_v_f64m1_m(...) __riscv_vluxseg2ei64_v_f64m1_tumu(__VA_ARGS__)

#define	vluxseg2ei64_v_f64m2(...) __riscv_vluxseg2ei64_v_f64m2(__VA_ARGS__)

#define	vluxseg2ei64_v_f64m2_m(...) __riscv_vluxseg2ei64_v_f64m2_tumu(__VA_ARGS__)

#define	vluxseg2ei64_v_f64m4(...) __riscv_vluxseg2ei64_v_f64m4(__VA_ARGS__)

#define	vluxseg2ei64_v_f64m4_m(...) __riscv_vluxseg2ei64_v_f64m4_tumu(__VA_ARGS__)

#define	vluxseg2ei64_v_i16m1(...) __riscv_vluxseg2ei64_v_i16m1(__VA_ARGS__)

#define	vluxseg2ei64_v_i16m1_m(...) __riscv_vluxseg2ei64_v_i16m1_tumu(__VA_ARGS__)

#define	vluxseg2ei64_v_i16m2(...) __riscv_vluxseg2ei64_v_i16m2(__VA_ARGS__)

#define	vluxseg2ei64_v_i16m2_m(...) __riscv_vluxseg2ei64_v_i16m2_tumu(__VA_ARGS__)

#define	vluxseg2ei64_v_i16mf2(...) __riscv_vluxseg2ei64_v_i16mf2(__VA_ARGS__)

#define	vluxseg2ei64_v_i16mf2_m(...) __riscv_vluxseg2ei64_v_i16mf2_tumu(__VA_ARGS__)

#define	vluxseg2ei64_v_i16mf4(...) __riscv_vluxseg2ei64_v_i16mf4(__VA_ARGS__)

#define	vluxseg2ei64_v_i16mf4_m(...) __riscv_vluxseg2ei64_v_i16mf4_tumu(__VA_ARGS__)

#define	vluxseg2ei64_v_i32m1(...) __riscv_vluxseg2ei64_v_i32m1(__VA_ARGS__)

#define	vluxseg2ei64_v_i32m1_m(...) __riscv_vluxseg2ei64_v_i32m1_tumu(__VA_ARGS__)

#define	vluxseg2ei64_v_i32m2(...) __riscv_vluxseg2ei64_v_i32m2(__VA_ARGS__)

#define	vluxseg2ei64_v_i32m2_m(...) __riscv_vluxseg2ei64_v_i32m2_tumu(__VA_ARGS__)

#define	vluxseg2ei64_v_i32m4(...) __riscv_vluxseg2ei64_v_i32m4(__VA_ARGS__)

#define	vluxseg2ei64_v_i32m4_m(...) __riscv_vluxseg2ei64_v_i32m4_tumu(__VA_ARGS__)

#define	vluxseg2ei64_v_i32mf2(...) __riscv_vluxseg2ei64_v_i32mf2(__VA_ARGS__)

#define	vluxseg2ei64_v_i32mf2_m(...) __riscv_vluxseg2ei64_v_i32mf2_tumu(__VA_ARGS__)

#define	vluxseg2ei64_v_i64m1(...) __riscv_vluxseg2ei64_v_i64m1(__VA_ARGS__)

#define	vluxseg2ei64_v_i64m1_m(...) __riscv_vluxseg2ei64_v_i64m1_tumu(__VA_ARGS__)

#define	vluxseg2ei64_v_i64m2(...) __riscv_vluxseg2ei64_v_i64m2(__VA_ARGS__)

#define	vluxseg2ei64_v_i64m2_m(...) __riscv_vluxseg2ei64_v_i64m2_tumu(__VA_ARGS__)

#define	vluxseg2ei64_v_i64m4(...) __riscv_vluxseg2ei64_v_i64m4(__VA_ARGS__)

#define	vluxseg2ei64_v_i64m4_m(...) __riscv_vluxseg2ei64_v_i64m4_tumu(__VA_ARGS__)

#define	vluxseg2ei64_v_i8m1(...) __riscv_vluxseg2ei64_v_i8m1(__VA_ARGS__)

#define	vluxseg2ei64_v_i8m1_m(...) __riscv_vluxseg2ei64_v_i8m1_tumu(__VA_ARGS__)

#define	vluxseg2ei64_v_i8mf2(...) __riscv_vluxseg2ei64_v_i8mf2(__VA_ARGS__)

#define	vluxseg2ei64_v_i8mf2_m(...) __riscv_vluxseg2ei64_v_i8mf2_tumu(__VA_ARGS__)

#define	vluxseg2ei64_v_i8mf4(...) __riscv_vluxseg2ei64_v_i8mf4(__VA_ARGS__)

#define	vluxseg2ei64_v_i8mf4_m(...) __riscv_vluxseg2ei64_v_i8mf4_tumu(__VA_ARGS__)

#define	vluxseg2ei64_v_i8mf8(...) __riscv_vluxseg2ei64_v_i8mf8(__VA_ARGS__)

#define	vluxseg2ei64_v_i8mf8_m(...) __riscv_vluxseg2ei64_v_i8mf8_tumu(__VA_ARGS__)

#define	vluxseg2ei64_v_u16m1(...) __riscv_vluxseg2ei64_v_u16m1(__VA_ARGS__)

#define	vluxseg2ei64_v_u16m1_m(...) __riscv_vluxseg2ei64_v_u16m1_tumu(__VA_ARGS__)

#define	vluxseg2ei64_v_u16m2(...) __riscv_vluxseg2ei64_v_u16m2(__VA_ARGS__)

#define	vluxseg2ei64_v_u16m2_m(...) __riscv_vluxseg2ei64_v_u16m2_tumu(__VA_ARGS__)

#define	vluxseg2ei64_v_u16mf2(...) __riscv_vluxseg2ei64_v_u16mf2(__VA_ARGS__)

#define	vluxseg2ei64_v_u16mf2_m(...) __riscv_vluxseg2ei64_v_u16mf2_tumu(__VA_ARGS__)

#define	vluxseg2ei64_v_u16mf4(...) __riscv_vluxseg2ei64_v_u16mf4(__VA_ARGS__)

#define	vluxseg2ei64_v_u16mf4_m(...) __riscv_vluxseg2ei64_v_u16mf4_tumu(__VA_ARGS__)

#define	vluxseg2ei64_v_u32m1(...) __riscv_vluxseg2ei64_v_u32m1(__VA_ARGS__)

#define	vluxseg2ei64_v_u32m1_m(...) __riscv_vluxseg2ei64_v_u32m1_tumu(__VA_ARGS__)

#define	vluxseg2ei64_v_u32m2(...) __riscv_vluxseg2ei64_v_u32m2(__VA_ARGS__)

#define	vluxseg2ei64_v_u32m2_m(...) __riscv_vluxseg2ei64_v_u32m2_tumu(__VA_ARGS__)

#define	vluxseg2ei64_v_u32m4(...) __riscv_vluxseg2ei64_v_u32m4(__VA_ARGS__)

#define	vluxseg2ei64_v_u32m4_m(...) __riscv_vluxseg2ei64_v_u32m4_tumu(__VA_ARGS__)

#define	vluxseg2ei64_v_u32mf2(...) __riscv_vluxseg2ei64_v_u32mf2(__VA_ARGS__)

#define	vluxseg2ei64_v_u32mf2_m(...) __riscv_vluxseg2ei64_v_u32mf2_tumu(__VA_ARGS__)

#define	vluxseg2ei64_v_u64m1(...) __riscv_vluxseg2ei64_v_u64m1(__VA_ARGS__)

#define	vluxseg2ei64_v_u64m1_m(...) __riscv_vluxseg2ei64_v_u64m1_tumu(__VA_ARGS__)

#define	vluxseg2ei64_v_u64m2(...) __riscv_vluxseg2ei64_v_u64m2(__VA_ARGS__)

#define	vluxseg2ei64_v_u64m2_m(...) __riscv_vluxseg2ei64_v_u64m2_tumu(__VA_ARGS__)

#define	vluxseg2ei64_v_u64m4(...) __riscv_vluxseg2ei64_v_u64m4(__VA_ARGS__)

#define	vluxseg2ei64_v_u64m4_m(...) __riscv_vluxseg2ei64_v_u64m4_tumu(__VA_ARGS__)

#define	vluxseg2ei64_v_u8m1(...) __riscv_vluxseg2ei64_v_u8m1(__VA_ARGS__)

#define	vluxseg2ei64_v_u8m1_m(...) __riscv_vluxseg2ei64_v_u8m1_tumu(__VA_ARGS__)

#define	vluxseg2ei64_v_u8mf2(...) __riscv_vluxseg2ei64_v_u8mf2(__VA_ARGS__)

#define	vluxseg2ei64_v_u8mf2_m(...) __riscv_vluxseg2ei64_v_u8mf2_tumu(__VA_ARGS__)

#define	vluxseg2ei64_v_u8mf4(...) __riscv_vluxseg2ei64_v_u8mf4(__VA_ARGS__)

#define	vluxseg2ei64_v_u8mf4_m(...) __riscv_vluxseg2ei64_v_u8mf4_tumu(__VA_ARGS__)

#define	vluxseg2ei64_v_u8mf8(...) __riscv_vluxseg2ei64_v_u8mf8(__VA_ARGS__)

#define	vluxseg2ei64_v_u8mf8_m(...) __riscv_vluxseg2ei64_v_u8mf8_tumu(__VA_ARGS__)

#define	vluxseg2ei8_v_f16m1(...) __riscv_vluxseg2ei8_v_f16m1(__VA_ARGS__)

#define	vluxseg2ei8_v_f16m1_m(...) __riscv_vluxseg2ei8_v_f16m1_tumu(__VA_ARGS__)

#define	vluxseg2ei8_v_f16m2(...) __riscv_vluxseg2ei8_v_f16m2(__VA_ARGS__)

#define	vluxseg2ei8_v_f16m2_m(...) __riscv_vluxseg2ei8_v_f16m2_tumu(__VA_ARGS__)

#define	vluxseg2ei8_v_f16m4(...) __riscv_vluxseg2ei8_v_f16m4(__VA_ARGS__)

#define	vluxseg2ei8_v_f16m4_m(...) __riscv_vluxseg2ei8_v_f16m4_tumu(__VA_ARGS__)

#define	vluxseg2ei8_v_f16mf2(...) __riscv_vluxseg2ei8_v_f16mf2(__VA_ARGS__)

#define	vluxseg2ei8_v_f16mf2_m(...) __riscv_vluxseg2ei8_v_f16mf2_tumu(__VA_ARGS__)

#define	vluxseg2ei8_v_f16mf4(...) __riscv_vluxseg2ei8_v_f16mf4(__VA_ARGS__)

#define	vluxseg2ei8_v_f16mf4_m(...) __riscv_vluxseg2ei8_v_f16mf4_tumu(__VA_ARGS__)

#define	vluxseg2ei8_v_f32m1(...) __riscv_vluxseg2ei8_v_f32m1(__VA_ARGS__)

#define	vluxseg2ei8_v_f32m1_m(...) __riscv_vluxseg2ei8_v_f32m1_tumu(__VA_ARGS__)

#define	vluxseg2ei8_v_f32m2(...) __riscv_vluxseg2ei8_v_f32m2(__VA_ARGS__)

#define	vluxseg2ei8_v_f32m2_m(...) __riscv_vluxseg2ei8_v_f32m2_tumu(__VA_ARGS__)

#define	vluxseg2ei8_v_f32m4(...) __riscv_vluxseg2ei8_v_f32m4(__VA_ARGS__)

#define	vluxseg2ei8_v_f32m4_m(...) __riscv_vluxseg2ei8_v_f32m4_tumu(__VA_ARGS__)

#define	vluxseg2ei8_v_f32mf2(...) __riscv_vluxseg2ei8_v_f32mf2(__VA_ARGS__)

#define	vluxseg2ei8_v_f32mf2_m(...) __riscv_vluxseg2ei8_v_f32mf2_tumu(__VA_ARGS__)

#define	vluxseg2ei8_v_f64m1(...) __riscv_vluxseg2ei8_v_f64m1(__VA_ARGS__)

#define	vluxseg2ei8_v_f64m1_m(...) __riscv_vluxseg2ei8_v_f64m1_tumu(__VA_ARGS__)

#define	vluxseg2ei8_v_f64m2(...) __riscv_vluxseg2ei8_v_f64m2(__VA_ARGS__)

#define	vluxseg2ei8_v_f64m2_m(...) __riscv_vluxseg2ei8_v_f64m2_tumu(__VA_ARGS__)

#define	vluxseg2ei8_v_f64m4(...) __riscv_vluxseg2ei8_v_f64m4(__VA_ARGS__)

#define	vluxseg2ei8_v_f64m4_m(...) __riscv_vluxseg2ei8_v_f64m4_tumu(__VA_ARGS__)

#define	vluxseg2ei8_v_i16m1(...) __riscv_vluxseg2ei8_v_i16m1(__VA_ARGS__)

#define	vluxseg2ei8_v_i16m1_m(...) __riscv_vluxseg2ei8_v_i16m1_tumu(__VA_ARGS__)

#define	vluxseg2ei8_v_i16m2(...) __riscv_vluxseg2ei8_v_i16m2(__VA_ARGS__)

#define	vluxseg2ei8_v_i16m2_m(...) __riscv_vluxseg2ei8_v_i16m2_tumu(__VA_ARGS__)

#define	vluxseg2ei8_v_i16m4(...) __riscv_vluxseg2ei8_v_i16m4(__VA_ARGS__)

#define	vluxseg2ei8_v_i16m4_m(...) __riscv_vluxseg2ei8_v_i16m4_tumu(__VA_ARGS__)

#define	vluxseg2ei8_v_i16mf2(...) __riscv_vluxseg2ei8_v_i16mf2(__VA_ARGS__)

#define	vluxseg2ei8_v_i16mf2_m(...) __riscv_vluxseg2ei8_v_i16mf2_tumu(__VA_ARGS__)

#define	vluxseg2ei8_v_i16mf4(...) __riscv_vluxseg2ei8_v_i16mf4(__VA_ARGS__)

#define	vluxseg2ei8_v_i16mf4_m(...) __riscv_vluxseg2ei8_v_i16mf4_tumu(__VA_ARGS__)

#define	vluxseg2ei8_v_i32m1(...) __riscv_vluxseg2ei8_v_i32m1(__VA_ARGS__)

#define	vluxseg2ei8_v_i32m1_m(...) __riscv_vluxseg2ei8_v_i32m1_tumu(__VA_ARGS__)

#define	vluxseg2ei8_v_i32m2(...) __riscv_vluxseg2ei8_v_i32m2(__VA_ARGS__)

#define	vluxseg2ei8_v_i32m2_m(...) __riscv_vluxseg2ei8_v_i32m2_tumu(__VA_ARGS__)

#define	vluxseg2ei8_v_i32m4(...) __riscv_vluxseg2ei8_v_i32m4(__VA_ARGS__)

#define	vluxseg2ei8_v_i32m4_m(...) __riscv_vluxseg2ei8_v_i32m4_tumu(__VA_ARGS__)

#define	vluxseg2ei8_v_i32mf2(...) __riscv_vluxseg2ei8_v_i32mf2(__VA_ARGS__)

#define	vluxseg2ei8_v_i32mf2_m(...) __riscv_vluxseg2ei8_v_i32mf2_tumu(__VA_ARGS__)

#define	vluxseg2ei8_v_i64m1(...) __riscv_vluxseg2ei8_v_i64m1(__VA_ARGS__)

#define	vluxseg2ei8_v_i64m1_m(...) __riscv_vluxseg2ei8_v_i64m1_tumu(__VA_ARGS__)

#define	vluxseg2ei8_v_i64m2(...) __riscv_vluxseg2ei8_v_i64m2(__VA_ARGS__)

#define	vluxseg2ei8_v_i64m2_m(...) __riscv_vluxseg2ei8_v_i64m2_tumu(__VA_ARGS__)

#define	vluxseg2ei8_v_i64m4(...) __riscv_vluxseg2ei8_v_i64m4(__VA_ARGS__)

#define	vluxseg2ei8_v_i64m4_m(...) __riscv_vluxseg2ei8_v_i64m4_tumu(__VA_ARGS__)

#define	vluxseg2ei8_v_i8m1(...) __riscv_vluxseg2ei8_v_i8m1(__VA_ARGS__)

#define	vluxseg2ei8_v_i8m1_m(...) __riscv_vluxseg2ei8_v_i8m1_tumu(__VA_ARGS__)

#define	vluxseg2ei8_v_i8m2(...) __riscv_vluxseg2ei8_v_i8m2(__VA_ARGS__)

#define	vluxseg2ei8_v_i8m2_m(...) __riscv_vluxseg2ei8_v_i8m2_tumu(__VA_ARGS__)

#define	vluxseg2ei8_v_i8m4(...) __riscv_vluxseg2ei8_v_i8m4(__VA_ARGS__)

#define	vluxseg2ei8_v_i8m4_m(...) __riscv_vluxseg2ei8_v_i8m4_tumu(__VA_ARGS__)

#define	vluxseg2ei8_v_i8mf2(...) __riscv_vluxseg2ei8_v_i8mf2(__VA_ARGS__)

#define	vluxseg2ei8_v_i8mf2_m(...) __riscv_vluxseg2ei8_v_i8mf2_tumu(__VA_ARGS__)

#define	vluxseg2ei8_v_i8mf4(...) __riscv_vluxseg2ei8_v_i8mf4(__VA_ARGS__)

#define	vluxseg2ei8_v_i8mf4_m(...) __riscv_vluxseg2ei8_v_i8mf4_tumu(__VA_ARGS__)

#define	vluxseg2ei8_v_i8mf8(...) __riscv_vluxseg2ei8_v_i8mf8(__VA_ARGS__)

#define	vluxseg2ei8_v_i8mf8_m(...) __riscv_vluxseg2ei8_v_i8mf8_tumu(__VA_ARGS__)

#define	vluxseg2ei8_v_u16m1(...) __riscv_vluxseg2ei8_v_u16m1(__VA_ARGS__)

#define	vluxseg2ei8_v_u16m1_m(...) __riscv_vluxseg2ei8_v_u16m1_tumu(__VA_ARGS__)

#define	vluxseg2ei8_v_u16m2(...) __riscv_vluxseg2ei8_v_u16m2(__VA_ARGS__)

#define	vluxseg2ei8_v_u16m2_m(...) __riscv_vluxseg2ei8_v_u16m2_tumu(__VA_ARGS__)

#define	vluxseg2ei8_v_u16m4(...) __riscv_vluxseg2ei8_v_u16m4(__VA_ARGS__)

#define	vluxseg2ei8_v_u16m4_m(...) __riscv_vluxseg2ei8_v_u16m4_tumu(__VA_ARGS__)

#define	vluxseg2ei8_v_u16mf2(...) __riscv_vluxseg2ei8_v_u16mf2(__VA_ARGS__)

#define	vluxseg2ei8_v_u16mf2_m(...) __riscv_vluxseg2ei8_v_u16mf2_tumu(__VA_ARGS__)

#define	vluxseg2ei8_v_u16mf4(...) __riscv_vluxseg2ei8_v_u16mf4(__VA_ARGS__)

#define	vluxseg2ei8_v_u16mf4_m(...) __riscv_vluxseg2ei8_v_u16mf4_tumu(__VA_ARGS__)

#define	vluxseg2ei8_v_u32m1(...) __riscv_vluxseg2ei8_v_u32m1(__VA_ARGS__)

#define	vluxseg2ei8_v_u32m1_m(...) __riscv_vluxseg2ei8_v_u32m1_tumu(__VA_ARGS__)

#define	vluxseg2ei8_v_u32m2(...) __riscv_vluxseg2ei8_v_u32m2(__VA_ARGS__)

#define	vluxseg2ei8_v_u32m2_m(...) __riscv_vluxseg2ei8_v_u32m2_tumu(__VA_ARGS__)

#define	vluxseg2ei8_v_u32m4(...) __riscv_vluxseg2ei8_v_u32m4(__VA_ARGS__)

#define	vluxseg2ei8_v_u32m4_m(...) __riscv_vluxseg2ei8_v_u32m4_tumu(__VA_ARGS__)

#define	vluxseg2ei8_v_u32mf2(...) __riscv_vluxseg2ei8_v_u32mf2(__VA_ARGS__)

#define	vluxseg2ei8_v_u32mf2_m(...) __riscv_vluxseg2ei8_v_u32mf2_tumu(__VA_ARGS__)

#define	vluxseg2ei8_v_u64m1(...) __riscv_vluxseg2ei8_v_u64m1(__VA_ARGS__)

#define	vluxseg2ei8_v_u64m1_m(...) __riscv_vluxseg2ei8_v_u64m1_tumu(__VA_ARGS__)

#define	vluxseg2ei8_v_u64m2(...) __riscv_vluxseg2ei8_v_u64m2(__VA_ARGS__)

#define	vluxseg2ei8_v_u64m2_m(...) __riscv_vluxseg2ei8_v_u64m2_tumu(__VA_ARGS__)

#define	vluxseg2ei8_v_u64m4(...) __riscv_vluxseg2ei8_v_u64m4(__VA_ARGS__)

#define	vluxseg2ei8_v_u64m4_m(...) __riscv_vluxseg2ei8_v_u64m4_tumu(__VA_ARGS__)

#define	vluxseg2ei8_v_u8m1(...) __riscv_vluxseg2ei8_v_u8m1(__VA_ARGS__)

#define	vluxseg2ei8_v_u8m1_m(...) __riscv_vluxseg2ei8_v_u8m1_tumu(__VA_ARGS__)

#define	vluxseg2ei8_v_u8m2(...) __riscv_vluxseg2ei8_v_u8m2(__VA_ARGS__)

#define	vluxseg2ei8_v_u8m2_m(...) __riscv_vluxseg2ei8_v_u8m2_tumu(__VA_ARGS__)

#define	vluxseg2ei8_v_u8m4(...) __riscv_vluxseg2ei8_v_u8m4(__VA_ARGS__)

#define	vluxseg2ei8_v_u8m4_m(...) __riscv_vluxseg2ei8_v_u8m4_tumu(__VA_ARGS__)

#define	vluxseg2ei8_v_u8mf2(...) __riscv_vluxseg2ei8_v_u8mf2(__VA_ARGS__)

#define	vluxseg2ei8_v_u8mf2_m(...) __riscv_vluxseg2ei8_v_u8mf2_tumu(__VA_ARGS__)

#define	vluxseg2ei8_v_u8mf4(...) __riscv_vluxseg2ei8_v_u8mf4(__VA_ARGS__)

#define	vluxseg2ei8_v_u8mf4_m(...) __riscv_vluxseg2ei8_v_u8mf4_tumu(__VA_ARGS__)

#define	vluxseg2ei8_v_u8mf8(...) __riscv_vluxseg2ei8_v_u8mf8(__VA_ARGS__)

#define	vluxseg2ei8_v_u8mf8_m(...) __riscv_vluxseg2ei8_v_u8mf8_tumu(__VA_ARGS__)

#define	vluxseg3ei16_v_f16m1(...) __riscv_vluxseg3ei16_v_f16m1(__VA_ARGS__)

#define	vluxseg3ei16_v_f16m1_m(...) __riscv_vluxseg3ei16_v_f16m1_tumu(__VA_ARGS__)

#define	vluxseg3ei16_v_f16m2(...) __riscv_vluxseg3ei16_v_f16m2(__VA_ARGS__)

#define	vluxseg3ei16_v_f16m2_m(...) __riscv_vluxseg3ei16_v_f16m2_tumu(__VA_ARGS__)

#define	vluxseg3ei16_v_f16mf2(...) __riscv_vluxseg3ei16_v_f16mf2(__VA_ARGS__)

#define	vluxseg3ei16_v_f16mf2_m(...) __riscv_vluxseg3ei16_v_f16mf2_tumu(__VA_ARGS__)

#define	vluxseg3ei16_v_f16mf4(...) __riscv_vluxseg3ei16_v_f16mf4(__VA_ARGS__)

#define	vluxseg3ei16_v_f16mf4_m(...) __riscv_vluxseg3ei16_v_f16mf4_tumu(__VA_ARGS__)

#define	vluxseg3ei16_v_f32m1(...) __riscv_vluxseg3ei16_v_f32m1(__VA_ARGS__)

#define	vluxseg3ei16_v_f32m1_m(...) __riscv_vluxseg3ei16_v_f32m1_tumu(__VA_ARGS__)

#define	vluxseg3ei16_v_f32m2(...) __riscv_vluxseg3ei16_v_f32m2(__VA_ARGS__)

#define	vluxseg3ei16_v_f32m2_m(...) __riscv_vluxseg3ei16_v_f32m2_tumu(__VA_ARGS__)

#define	vluxseg3ei16_v_f32mf2(...) __riscv_vluxseg3ei16_v_f32mf2(__VA_ARGS__)

#define	vluxseg3ei16_v_f32mf2_m(...) __riscv_vluxseg3ei16_v_f32mf2_tumu(__VA_ARGS__)

#define	vluxseg3ei16_v_f64m1(...) __riscv_vluxseg3ei16_v_f64m1(__VA_ARGS__)

#define	vluxseg3ei16_v_f64m1_m(...) __riscv_vluxseg3ei16_v_f64m1_tumu(__VA_ARGS__)

#define	vluxseg3ei16_v_f64m2(...) __riscv_vluxseg3ei16_v_f64m2(__VA_ARGS__)

#define	vluxseg3ei16_v_f64m2_m(...) __riscv_vluxseg3ei16_v_f64m2_tumu(__VA_ARGS__)

#define	vluxseg3ei16_v_i16m1(...) __riscv_vluxseg3ei16_v_i16m1(__VA_ARGS__)

#define	vluxseg3ei16_v_i16m1_m(...) __riscv_vluxseg3ei16_v_i16m1_tumu(__VA_ARGS__)

#define	vluxseg3ei16_v_i16m2(...) __riscv_vluxseg3ei16_v_i16m2(__VA_ARGS__)

#define	vluxseg3ei16_v_i16m2_m(...) __riscv_vluxseg3ei16_v_i16m2_tumu(__VA_ARGS__)

#define	vluxseg3ei16_v_i16mf2(...) __riscv_vluxseg3ei16_v_i16mf2(__VA_ARGS__)

#define	vluxseg3ei16_v_i16mf2_m(...) __riscv_vluxseg3ei16_v_i16mf2_tumu(__VA_ARGS__)

#define	vluxseg3ei16_v_i16mf4(...) __riscv_vluxseg3ei16_v_i16mf4(__VA_ARGS__)

#define	vluxseg3ei16_v_i16mf4_m(...) __riscv_vluxseg3ei16_v_i16mf4_tumu(__VA_ARGS__)

#define	vluxseg3ei16_v_i32m1(...) __riscv_vluxseg3ei16_v_i32m1(__VA_ARGS__)

#define	vluxseg3ei16_v_i32m1_m(...) __riscv_vluxseg3ei16_v_i32m1_tumu(__VA_ARGS__)

#define	vluxseg3ei16_v_i32m2(...) __riscv_vluxseg3ei16_v_i32m2(__VA_ARGS__)

#define	vluxseg3ei16_v_i32m2_m(...) __riscv_vluxseg3ei16_v_i32m2_tumu(__VA_ARGS__)

#define	vluxseg3ei16_v_i32mf2(...) __riscv_vluxseg3ei16_v_i32mf2(__VA_ARGS__)

#define	vluxseg3ei16_v_i32mf2_m(...) __riscv_vluxseg3ei16_v_i32mf2_tumu(__VA_ARGS__)

#define	vluxseg3ei16_v_i64m1(...) __riscv_vluxseg3ei16_v_i64m1(__VA_ARGS__)

#define	vluxseg3ei16_v_i64m1_m(...) __riscv_vluxseg3ei16_v_i64m1_tumu(__VA_ARGS__)

#define	vluxseg3ei16_v_i64m2(...) __riscv_vluxseg3ei16_v_i64m2(__VA_ARGS__)

#define	vluxseg3ei16_v_i64m2_m(...) __riscv_vluxseg3ei16_v_i64m2_tumu(__VA_ARGS__)

#define	vluxseg3ei16_v_i8m1(...) __riscv_vluxseg3ei16_v_i8m1(__VA_ARGS__)

#define	vluxseg3ei16_v_i8m1_m(...) __riscv_vluxseg3ei16_v_i8m1_tumu(__VA_ARGS__)

#define	vluxseg3ei16_v_i8m2(...) __riscv_vluxseg3ei16_v_i8m2(__VA_ARGS__)

#define	vluxseg3ei16_v_i8m2_m(...) __riscv_vluxseg3ei16_v_i8m2_tumu(__VA_ARGS__)

#define	vluxseg3ei16_v_i8mf2(...) __riscv_vluxseg3ei16_v_i8mf2(__VA_ARGS__)

#define	vluxseg3ei16_v_i8mf2_m(...) __riscv_vluxseg3ei16_v_i8mf2_tumu(__VA_ARGS__)

#define	vluxseg3ei16_v_i8mf4(...) __riscv_vluxseg3ei16_v_i8mf4(__VA_ARGS__)

#define	vluxseg3ei16_v_i8mf4_m(...) __riscv_vluxseg3ei16_v_i8mf4_tumu(__VA_ARGS__)

#define	vluxseg3ei16_v_i8mf8(...) __riscv_vluxseg3ei16_v_i8mf8(__VA_ARGS__)

#define	vluxseg3ei16_v_i8mf8_m(...) __riscv_vluxseg3ei16_v_i8mf8_tumu(__VA_ARGS__)

#define	vluxseg3ei16_v_u16m1(...) __riscv_vluxseg3ei16_v_u16m1(__VA_ARGS__)

#define	vluxseg3ei16_v_u16m1_m(...) __riscv_vluxseg3ei16_v_u16m1_tumu(__VA_ARGS__)

#define	vluxseg3ei16_v_u16m2(...) __riscv_vluxseg3ei16_v_u16m2(__VA_ARGS__)

#define	vluxseg3ei16_v_u16m2_m(...) __riscv_vluxseg3ei16_v_u16m2_tumu(__VA_ARGS__)

#define	vluxseg3ei16_v_u16mf2(...) __riscv_vluxseg3ei16_v_u16mf2(__VA_ARGS__)

#define	vluxseg3ei16_v_u16mf2_m(...) __riscv_vluxseg3ei16_v_u16mf2_tumu(__VA_ARGS__)

#define	vluxseg3ei16_v_u16mf4(...) __riscv_vluxseg3ei16_v_u16mf4(__VA_ARGS__)

#define	vluxseg3ei16_v_u16mf4_m(...) __riscv_vluxseg3ei16_v_u16mf4_tumu(__VA_ARGS__)

#define	vluxseg3ei16_v_u32m1(...) __riscv_vluxseg3ei16_v_u32m1(__VA_ARGS__)

#define	vluxseg3ei16_v_u32m1_m(...) __riscv_vluxseg3ei16_v_u32m1_tumu(__VA_ARGS__)

#define	vluxseg3ei16_v_u32m2(...) __riscv_vluxseg3ei16_v_u32m2(__VA_ARGS__)

#define	vluxseg3ei16_v_u32m2_m(...) __riscv_vluxseg3ei16_v_u32m2_tumu(__VA_ARGS__)

#define	vluxseg3ei16_v_u32mf2(...) __riscv_vluxseg3ei16_v_u32mf2(__VA_ARGS__)

#define	vluxseg3ei16_v_u32mf2_m(...) __riscv_vluxseg3ei16_v_u32mf2_tumu(__VA_ARGS__)

#define	vluxseg3ei16_v_u64m1(...) __riscv_vluxseg3ei16_v_u64m1(__VA_ARGS__)

#define	vluxseg3ei16_v_u64m1_m(...) __riscv_vluxseg3ei16_v_u64m1_tumu(__VA_ARGS__)

#define	vluxseg3ei16_v_u64m2(...) __riscv_vluxseg3ei16_v_u64m2(__VA_ARGS__)

#define	vluxseg3ei16_v_u64m2_m(...) __riscv_vluxseg3ei16_v_u64m2_tumu(__VA_ARGS__)

#define	vluxseg3ei16_v_u8m1(...) __riscv_vluxseg3ei16_v_u8m1(__VA_ARGS__)

#define	vluxseg3ei16_v_u8m1_m(...) __riscv_vluxseg3ei16_v_u8m1_tumu(__VA_ARGS__)

#define	vluxseg3ei16_v_u8m2(...) __riscv_vluxseg3ei16_v_u8m2(__VA_ARGS__)

#define	vluxseg3ei16_v_u8m2_m(...) __riscv_vluxseg3ei16_v_u8m2_tumu(__VA_ARGS__)

#define	vluxseg3ei16_v_u8mf2(...) __riscv_vluxseg3ei16_v_u8mf2(__VA_ARGS__)

#define	vluxseg3ei16_v_u8mf2_m(...) __riscv_vluxseg3ei16_v_u8mf2_tumu(__VA_ARGS__)

#define	vluxseg3ei16_v_u8mf4(...) __riscv_vluxseg3ei16_v_u8mf4(__VA_ARGS__)

#define	vluxseg3ei16_v_u8mf4_m(...) __riscv_vluxseg3ei16_v_u8mf4_tumu(__VA_ARGS__)

#define	vluxseg3ei16_v_u8mf8(...) __riscv_vluxseg3ei16_v_u8mf8(__VA_ARGS__)

#define	vluxseg3ei16_v_u8mf8_m(...) __riscv_vluxseg3ei16_v_u8mf8_tumu(__VA_ARGS__)

#define	vluxseg3ei32_v_f16m1(...) __riscv_vluxseg3ei32_v_f16m1(__VA_ARGS__)

#define	vluxseg3ei32_v_f16m1_m(...) __riscv_vluxseg3ei32_v_f16m1_tumu(__VA_ARGS__)

#define	vluxseg3ei32_v_f16m2(...) __riscv_vluxseg3ei32_v_f16m2(__VA_ARGS__)

#define	vluxseg3ei32_v_f16m2_m(...) __riscv_vluxseg3ei32_v_f16m2_tumu(__VA_ARGS__)

#define	vluxseg3ei32_v_f16mf2(...) __riscv_vluxseg3ei32_v_f16mf2(__VA_ARGS__)

#define	vluxseg3ei32_v_f16mf2_m(...) __riscv_vluxseg3ei32_v_f16mf2_tumu(__VA_ARGS__)

#define	vluxseg3ei32_v_f16mf4(...) __riscv_vluxseg3ei32_v_f16mf4(__VA_ARGS__)

#define	vluxseg3ei32_v_f16mf4_m(...) __riscv_vluxseg3ei32_v_f16mf4_tumu(__VA_ARGS__)

#define	vluxseg3ei32_v_f32m1(...) __riscv_vluxseg3ei32_v_f32m1(__VA_ARGS__)

#define	vluxseg3ei32_v_f32m1_m(...) __riscv_vluxseg3ei32_v_f32m1_tumu(__VA_ARGS__)

#define	vluxseg3ei32_v_f32m2(...) __riscv_vluxseg3ei32_v_f32m2(__VA_ARGS__)

#define	vluxseg3ei32_v_f32m2_m(...) __riscv_vluxseg3ei32_v_f32m2_tumu(__VA_ARGS__)

#define	vluxseg3ei32_v_f32mf2(...) __riscv_vluxseg3ei32_v_f32mf2(__VA_ARGS__)

#define	vluxseg3ei32_v_f32mf2_m(...) __riscv_vluxseg3ei32_v_f32mf2_tumu(__VA_ARGS__)

#define	vluxseg3ei32_v_f64m1(...) __riscv_vluxseg3ei32_v_f64m1(__VA_ARGS__)

#define	vluxseg3ei32_v_f64m1_m(...) __riscv_vluxseg3ei32_v_f64m1_tumu(__VA_ARGS__)

#define	vluxseg3ei32_v_f64m2(...) __riscv_vluxseg3ei32_v_f64m2(__VA_ARGS__)

#define	vluxseg3ei32_v_f64m2_m(...) __riscv_vluxseg3ei32_v_f64m2_tumu(__VA_ARGS__)

#define	vluxseg3ei32_v_i16m1(...) __riscv_vluxseg3ei32_v_i16m1(__VA_ARGS__)

#define	vluxseg3ei32_v_i16m1_m(...) __riscv_vluxseg3ei32_v_i16m1_tumu(__VA_ARGS__)

#define	vluxseg3ei32_v_i16m2(...) __riscv_vluxseg3ei32_v_i16m2(__VA_ARGS__)

#define	vluxseg3ei32_v_i16m2_m(...) __riscv_vluxseg3ei32_v_i16m2_tumu(__VA_ARGS__)

#define	vluxseg3ei32_v_i16mf2(...) __riscv_vluxseg3ei32_v_i16mf2(__VA_ARGS__)

#define	vluxseg3ei32_v_i16mf2_m(...) __riscv_vluxseg3ei32_v_i16mf2_tumu(__VA_ARGS__)

#define	vluxseg3ei32_v_i16mf4(...) __riscv_vluxseg3ei32_v_i16mf4(__VA_ARGS__)

#define	vluxseg3ei32_v_i16mf4_m(...) __riscv_vluxseg3ei32_v_i16mf4_tumu(__VA_ARGS__)

#define	vluxseg3ei32_v_i32m1(...) __riscv_vluxseg3ei32_v_i32m1(__VA_ARGS__)

#define	vluxseg3ei32_v_i32m1_m(...) __riscv_vluxseg3ei32_v_i32m1_tumu(__VA_ARGS__)

#define	vluxseg3ei32_v_i32m2(...) __riscv_vluxseg3ei32_v_i32m2(__VA_ARGS__)

#define	vluxseg3ei32_v_i32m2_m(...) __riscv_vluxseg3ei32_v_i32m2_tumu(__VA_ARGS__)

#define	vluxseg3ei32_v_i32mf2(...) __riscv_vluxseg3ei32_v_i32mf2(__VA_ARGS__)

#define	vluxseg3ei32_v_i32mf2_m(...) __riscv_vluxseg3ei32_v_i32mf2_tumu(__VA_ARGS__)

#define	vluxseg3ei32_v_i64m1(...) __riscv_vluxseg3ei32_v_i64m1(__VA_ARGS__)

#define	vluxseg3ei32_v_i64m1_m(...) __riscv_vluxseg3ei32_v_i64m1_tumu(__VA_ARGS__)

#define	vluxseg3ei32_v_i64m2(...) __riscv_vluxseg3ei32_v_i64m2(__VA_ARGS__)

#define	vluxseg3ei32_v_i64m2_m(...) __riscv_vluxseg3ei32_v_i64m2_tumu(__VA_ARGS__)

#define	vluxseg3ei32_v_i8m1(...) __riscv_vluxseg3ei32_v_i8m1(__VA_ARGS__)

#define	vluxseg3ei32_v_i8m1_m(...) __riscv_vluxseg3ei32_v_i8m1_tumu(__VA_ARGS__)

#define	vluxseg3ei32_v_i8m2(...) __riscv_vluxseg3ei32_v_i8m2(__VA_ARGS__)

#define	vluxseg3ei32_v_i8m2_m(...) __riscv_vluxseg3ei32_v_i8m2_tumu(__VA_ARGS__)

#define	vluxseg3ei32_v_i8mf2(...) __riscv_vluxseg3ei32_v_i8mf2(__VA_ARGS__)

#define	vluxseg3ei32_v_i8mf2_m(...) __riscv_vluxseg3ei32_v_i8mf2_tumu(__VA_ARGS__)

#define	vluxseg3ei32_v_i8mf4(...) __riscv_vluxseg3ei32_v_i8mf4(__VA_ARGS__)

#define	vluxseg3ei32_v_i8mf4_m(...) __riscv_vluxseg3ei32_v_i8mf4_tumu(__VA_ARGS__)

#define	vluxseg3ei32_v_i8mf8(...) __riscv_vluxseg3ei32_v_i8mf8(__VA_ARGS__)

#define	vluxseg3ei32_v_i8mf8_m(...) __riscv_vluxseg3ei32_v_i8mf8_tumu(__VA_ARGS__)

#define	vluxseg3ei32_v_u16m1(...) __riscv_vluxseg3ei32_v_u16m1(__VA_ARGS__)

#define	vluxseg3ei32_v_u16m1_m(...) __riscv_vluxseg3ei32_v_u16m1_tumu(__VA_ARGS__)

#define	vluxseg3ei32_v_u16m2(...) __riscv_vluxseg3ei32_v_u16m2(__VA_ARGS__)

#define	vluxseg3ei32_v_u16m2_m(...) __riscv_vluxseg3ei32_v_u16m2_tumu(__VA_ARGS__)

#define	vluxseg3ei32_v_u16mf2(...) __riscv_vluxseg3ei32_v_u16mf2(__VA_ARGS__)

#define	vluxseg3ei32_v_u16mf2_m(...) __riscv_vluxseg3ei32_v_u16mf2_tumu(__VA_ARGS__)

#define	vluxseg3ei32_v_u16mf4(...) __riscv_vluxseg3ei32_v_u16mf4(__VA_ARGS__)

#define	vluxseg3ei32_v_u16mf4_m(...) __riscv_vluxseg3ei32_v_u16mf4_tumu(__VA_ARGS__)

#define	vluxseg3ei32_v_u32m1(...) __riscv_vluxseg3ei32_v_u32m1(__VA_ARGS__)

#define	vluxseg3ei32_v_u32m1_m(...) __riscv_vluxseg3ei32_v_u32m1_tumu(__VA_ARGS__)

#define	vluxseg3ei32_v_u32m2(...) __riscv_vluxseg3ei32_v_u32m2(__VA_ARGS__)

#define	vluxseg3ei32_v_u32m2_m(...) __riscv_vluxseg3ei32_v_u32m2_tumu(__VA_ARGS__)

#define	vluxseg3ei32_v_u32mf2(...) __riscv_vluxseg3ei32_v_u32mf2(__VA_ARGS__)

#define	vluxseg3ei32_v_u32mf2_m(...) __riscv_vluxseg3ei32_v_u32mf2_tumu(__VA_ARGS__)

#define	vluxseg3ei32_v_u64m1(...) __riscv_vluxseg3ei32_v_u64m1(__VA_ARGS__)

#define	vluxseg3ei32_v_u64m1_m(...) __riscv_vluxseg3ei32_v_u64m1_tumu(__VA_ARGS__)

#define	vluxseg3ei32_v_u64m2(...) __riscv_vluxseg3ei32_v_u64m2(__VA_ARGS__)

#define	vluxseg3ei32_v_u64m2_m(...) __riscv_vluxseg3ei32_v_u64m2_tumu(__VA_ARGS__)

#define	vluxseg3ei32_v_u8m1(...) __riscv_vluxseg3ei32_v_u8m1(__VA_ARGS__)

#define	vluxseg3ei32_v_u8m1_m(...) __riscv_vluxseg3ei32_v_u8m1_tumu(__VA_ARGS__)

#define	vluxseg3ei32_v_u8m2(...) __riscv_vluxseg3ei32_v_u8m2(__VA_ARGS__)

#define	vluxseg3ei32_v_u8m2_m(...) __riscv_vluxseg3ei32_v_u8m2_tumu(__VA_ARGS__)

#define	vluxseg3ei32_v_u8mf2(...) __riscv_vluxseg3ei32_v_u8mf2(__VA_ARGS__)

#define	vluxseg3ei32_v_u8mf2_m(...) __riscv_vluxseg3ei32_v_u8mf2_tumu(__VA_ARGS__)

#define	vluxseg3ei32_v_u8mf4(...) __riscv_vluxseg3ei32_v_u8mf4(__VA_ARGS__)

#define	vluxseg3ei32_v_u8mf4_m(...) __riscv_vluxseg3ei32_v_u8mf4_tumu(__VA_ARGS__)

#define	vluxseg3ei32_v_u8mf8(...) __riscv_vluxseg3ei32_v_u8mf8(__VA_ARGS__)

#define	vluxseg3ei32_v_u8mf8_m(...) __riscv_vluxseg3ei32_v_u8mf8_tumu(__VA_ARGS__)

#define	vluxseg3ei64_v_f16m1(...) __riscv_vluxseg3ei64_v_f16m1(__VA_ARGS__)

#define	vluxseg3ei64_v_f16m1_m(...) __riscv_vluxseg3ei64_v_f16m1_tumu(__VA_ARGS__)

#define	vluxseg3ei64_v_f16m2(...) __riscv_vluxseg3ei64_v_f16m2(__VA_ARGS__)

#define	vluxseg3ei64_v_f16m2_m(...) __riscv_vluxseg3ei64_v_f16m2_tumu(__VA_ARGS__)

#define	vluxseg3ei64_v_f16mf2(...) __riscv_vluxseg3ei64_v_f16mf2(__VA_ARGS__)

#define	vluxseg3ei64_v_f16mf2_m(...) __riscv_vluxseg3ei64_v_f16mf2_tumu(__VA_ARGS__)

#define	vluxseg3ei64_v_f16mf4(...) __riscv_vluxseg3ei64_v_f16mf4(__VA_ARGS__)

#define	vluxseg3ei64_v_f16mf4_m(...) __riscv_vluxseg3ei64_v_f16mf4_tumu(__VA_ARGS__)

#define	vluxseg3ei64_v_f32m1(...) __riscv_vluxseg3ei64_v_f32m1(__VA_ARGS__)

#define	vluxseg3ei64_v_f32m1_m(...) __riscv_vluxseg3ei64_v_f32m1_tumu(__VA_ARGS__)

#define	vluxseg3ei64_v_f32m2(...) __riscv_vluxseg3ei64_v_f32m2(__VA_ARGS__)

#define	vluxseg3ei64_v_f32m2_m(...) __riscv_vluxseg3ei64_v_f32m2_tumu(__VA_ARGS__)

#define	vluxseg3ei64_v_f32mf2(...) __riscv_vluxseg3ei64_v_f32mf2(__VA_ARGS__)

#define	vluxseg3ei64_v_f32mf2_m(...) __riscv_vluxseg3ei64_v_f32mf2_tumu(__VA_ARGS__)

#define	vluxseg3ei64_v_f64m1(...) __riscv_vluxseg3ei64_v_f64m1(__VA_ARGS__)

#define	vluxseg3ei64_v_f64m1_m(...) __riscv_vluxseg3ei64_v_f64m1_tumu(__VA_ARGS__)

#define	vluxseg3ei64_v_f64m2(...) __riscv_vluxseg3ei64_v_f64m2(__VA_ARGS__)

#define	vluxseg3ei64_v_f64m2_m(...) __riscv_vluxseg3ei64_v_f64m2_tumu(__VA_ARGS__)

#define	vluxseg3ei64_v_i16m1(...) __riscv_vluxseg3ei64_v_i16m1(__VA_ARGS__)

#define	vluxseg3ei64_v_i16m1_m(...) __riscv_vluxseg3ei64_v_i16m1_tumu(__VA_ARGS__)

#define	vluxseg3ei64_v_i16m2(...) __riscv_vluxseg3ei64_v_i16m2(__VA_ARGS__)

#define	vluxseg3ei64_v_i16m2_m(...) __riscv_vluxseg3ei64_v_i16m2_tumu(__VA_ARGS__)

#define	vluxseg3ei64_v_i16mf2(...) __riscv_vluxseg3ei64_v_i16mf2(__VA_ARGS__)

#define	vluxseg3ei64_v_i16mf2_m(...) __riscv_vluxseg3ei64_v_i16mf2_tumu(__VA_ARGS__)

#define	vluxseg3ei64_v_i16mf4(...) __riscv_vluxseg3ei64_v_i16mf4(__VA_ARGS__)

#define	vluxseg3ei64_v_i16mf4_m(...) __riscv_vluxseg3ei64_v_i16mf4_tumu(__VA_ARGS__)

#define	vluxseg3ei64_v_i32m1(...) __riscv_vluxseg3ei64_v_i32m1(__VA_ARGS__)

#define	vluxseg3ei64_v_i32m1_m(...) __riscv_vluxseg3ei64_v_i32m1_tumu(__VA_ARGS__)

#define	vluxseg3ei64_v_i32m2(...) __riscv_vluxseg3ei64_v_i32m2(__VA_ARGS__)

#define	vluxseg3ei64_v_i32m2_m(...) __riscv_vluxseg3ei64_v_i32m2_tumu(__VA_ARGS__)

#define	vluxseg3ei64_v_i32mf2(...) __riscv_vluxseg3ei64_v_i32mf2(__VA_ARGS__)

#define	vluxseg3ei64_v_i32mf2_m(...) __riscv_vluxseg3ei64_v_i32mf2_tumu(__VA_ARGS__)

#define	vluxseg3ei64_v_i64m1(...) __riscv_vluxseg3ei64_v_i64m1(__VA_ARGS__)

#define	vluxseg3ei64_v_i64m1_m(...) __riscv_vluxseg3ei64_v_i64m1_tumu(__VA_ARGS__)

#define	vluxseg3ei64_v_i64m2(...) __riscv_vluxseg3ei64_v_i64m2(__VA_ARGS__)

#define	vluxseg3ei64_v_i64m2_m(...) __riscv_vluxseg3ei64_v_i64m2_tumu(__VA_ARGS__)

#define	vluxseg3ei64_v_i8m1(...) __riscv_vluxseg3ei64_v_i8m1(__VA_ARGS__)

#define	vluxseg3ei64_v_i8m1_m(...) __riscv_vluxseg3ei64_v_i8m1_tumu(__VA_ARGS__)

#define	vluxseg3ei64_v_i8mf2(...) __riscv_vluxseg3ei64_v_i8mf2(__VA_ARGS__)

#define	vluxseg3ei64_v_i8mf2_m(...) __riscv_vluxseg3ei64_v_i8mf2_tumu(__VA_ARGS__)

#define	vluxseg3ei64_v_i8mf4(...) __riscv_vluxseg3ei64_v_i8mf4(__VA_ARGS__)

#define	vluxseg3ei64_v_i8mf4_m(...) __riscv_vluxseg3ei64_v_i8mf4_tumu(__VA_ARGS__)

#define	vluxseg3ei64_v_i8mf8(...) __riscv_vluxseg3ei64_v_i8mf8(__VA_ARGS__)

#define	vluxseg3ei64_v_i8mf8_m(...) __riscv_vluxseg3ei64_v_i8mf8_tumu(__VA_ARGS__)

#define	vluxseg3ei64_v_u16m1(...) __riscv_vluxseg3ei64_v_u16m1(__VA_ARGS__)

#define	vluxseg3ei64_v_u16m1_m(...) __riscv_vluxseg3ei64_v_u16m1_tumu(__VA_ARGS__)

#define	vluxseg3ei64_v_u16m2(...) __riscv_vluxseg3ei64_v_u16m2(__VA_ARGS__)

#define	vluxseg3ei64_v_u16m2_m(...) __riscv_vluxseg3ei64_v_u16m2_tumu(__VA_ARGS__)

#define	vluxseg3ei64_v_u16mf2(...) __riscv_vluxseg3ei64_v_u16mf2(__VA_ARGS__)

#define	vluxseg3ei64_v_u16mf2_m(...) __riscv_vluxseg3ei64_v_u16mf2_tumu(__VA_ARGS__)

#define	vluxseg3ei64_v_u16mf4(...) __riscv_vluxseg3ei64_v_u16mf4(__VA_ARGS__)

#define	vluxseg3ei64_v_u16mf4_m(...) __riscv_vluxseg3ei64_v_u16mf4_tumu(__VA_ARGS__)

#define	vluxseg3ei64_v_u32m1(...) __riscv_vluxseg3ei64_v_u32m1(__VA_ARGS__)

#define	vluxseg3ei64_v_u32m1_m(...) __riscv_vluxseg3ei64_v_u32m1_tumu(__VA_ARGS__)

#define	vluxseg3ei64_v_u32m2(...) __riscv_vluxseg3ei64_v_u32m2(__VA_ARGS__)

#define	vluxseg3ei64_v_u32m2_m(...) __riscv_vluxseg3ei64_v_u32m2_tumu(__VA_ARGS__)

#define	vluxseg3ei64_v_u32mf2(...) __riscv_vluxseg3ei64_v_u32mf2(__VA_ARGS__)

#define	vluxseg3ei64_v_u32mf2_m(...) __riscv_vluxseg3ei64_v_u32mf2_tumu(__VA_ARGS__)

#define	vluxseg3ei64_v_u64m1(...) __riscv_vluxseg3ei64_v_u64m1(__VA_ARGS__)

#define	vluxseg3ei64_v_u64m1_m(...) __riscv_vluxseg3ei64_v_u64m1_tumu(__VA_ARGS__)

#define	vluxseg3ei64_v_u64m2(...) __riscv_vluxseg3ei64_v_u64m2(__VA_ARGS__)

#define	vluxseg3ei64_v_u64m2_m(...) __riscv_vluxseg3ei64_v_u64m2_tumu(__VA_ARGS__)

#define	vluxseg3ei64_v_u8m1(...) __riscv_vluxseg3ei64_v_u8m1(__VA_ARGS__)

#define	vluxseg3ei64_v_u8m1_m(...) __riscv_vluxseg3ei64_v_u8m1_tumu(__VA_ARGS__)

#define	vluxseg3ei64_v_u8mf2(...) __riscv_vluxseg3ei64_v_u8mf2(__VA_ARGS__)

#define	vluxseg3ei64_v_u8mf2_m(...) __riscv_vluxseg3ei64_v_u8mf2_tumu(__VA_ARGS__)

#define	vluxseg3ei64_v_u8mf4(...) __riscv_vluxseg3ei64_v_u8mf4(__VA_ARGS__)

#define	vluxseg3ei64_v_u8mf4_m(...) __riscv_vluxseg3ei64_v_u8mf4_tumu(__VA_ARGS__)

#define	vluxseg3ei64_v_u8mf8(...) __riscv_vluxseg3ei64_v_u8mf8(__VA_ARGS__)

#define	vluxseg3ei64_v_u8mf8_m(...) __riscv_vluxseg3ei64_v_u8mf8_tumu(__VA_ARGS__)

#define	vluxseg3ei8_v_f16m1(...) __riscv_vluxseg3ei8_v_f16m1(__VA_ARGS__)

#define	vluxseg3ei8_v_f16m1_m(...) __riscv_vluxseg3ei8_v_f16m1_tumu(__VA_ARGS__)

#define	vluxseg3ei8_v_f16m2(...) __riscv_vluxseg3ei8_v_f16m2(__VA_ARGS__)

#define	vluxseg3ei8_v_f16m2_m(...) __riscv_vluxseg3ei8_v_f16m2_tumu(__VA_ARGS__)

#define	vluxseg3ei8_v_f16mf2(...) __riscv_vluxseg3ei8_v_f16mf2(__VA_ARGS__)

#define	vluxseg3ei8_v_f16mf2_m(...) __riscv_vluxseg3ei8_v_f16mf2_tumu(__VA_ARGS__)

#define	vluxseg3ei8_v_f16mf4(...) __riscv_vluxseg3ei8_v_f16mf4(__VA_ARGS__)

#define	vluxseg3ei8_v_f16mf4_m(...) __riscv_vluxseg3ei8_v_f16mf4_tumu(__VA_ARGS__)

#define	vluxseg3ei8_v_f32m1(...) __riscv_vluxseg3ei8_v_f32m1(__VA_ARGS__)

#define	vluxseg3ei8_v_f32m1_m(...) __riscv_vluxseg3ei8_v_f32m1_tumu(__VA_ARGS__)

#define	vluxseg3ei8_v_f32m2(...) __riscv_vluxseg3ei8_v_f32m2(__VA_ARGS__)

#define	vluxseg3ei8_v_f32m2_m(...) __riscv_vluxseg3ei8_v_f32m2_tumu(__VA_ARGS__)

#define	vluxseg3ei8_v_f32mf2(...) __riscv_vluxseg3ei8_v_f32mf2(__VA_ARGS__)

#define	vluxseg3ei8_v_f32mf2_m(...) __riscv_vluxseg3ei8_v_f32mf2_tumu(__VA_ARGS__)

#define	vluxseg3ei8_v_f64m1(...) __riscv_vluxseg3ei8_v_f64m1(__VA_ARGS__)

#define	vluxseg3ei8_v_f64m1_m(...) __riscv_vluxseg3ei8_v_f64m1_tumu(__VA_ARGS__)

#define	vluxseg3ei8_v_f64m2(...) __riscv_vluxseg3ei8_v_f64m2(__VA_ARGS__)

#define	vluxseg3ei8_v_f64m2_m(...) __riscv_vluxseg3ei8_v_f64m2_tumu(__VA_ARGS__)

#define	vluxseg3ei8_v_i16m1(...) __riscv_vluxseg3ei8_v_i16m1(__VA_ARGS__)

#define	vluxseg3ei8_v_i16m1_m(...) __riscv_vluxseg3ei8_v_i16m1_tumu(__VA_ARGS__)

#define	vluxseg3ei8_v_i16m2(...) __riscv_vluxseg3ei8_v_i16m2(__VA_ARGS__)

#define	vluxseg3ei8_v_i16m2_m(...) __riscv_vluxseg3ei8_v_i16m2_tumu(__VA_ARGS__)

#define	vluxseg3ei8_v_i16mf2(...) __riscv_vluxseg3ei8_v_i16mf2(__VA_ARGS__)

#define	vluxseg3ei8_v_i16mf2_m(...) __riscv_vluxseg3ei8_v_i16mf2_tumu(__VA_ARGS__)

#define	vluxseg3ei8_v_i16mf4(...) __riscv_vluxseg3ei8_v_i16mf4(__VA_ARGS__)

#define	vluxseg3ei8_v_i16mf4_m(...) __riscv_vluxseg3ei8_v_i16mf4_tumu(__VA_ARGS__)

#define	vluxseg3ei8_v_i32m1(...) __riscv_vluxseg3ei8_v_i32m1(__VA_ARGS__)

#define	vluxseg3ei8_v_i32m1_m(...) __riscv_vluxseg3ei8_v_i32m1_tumu(__VA_ARGS__)

#define	vluxseg3ei8_v_i32m2(...) __riscv_vluxseg3ei8_v_i32m2(__VA_ARGS__)

#define	vluxseg3ei8_v_i32m2_m(...) __riscv_vluxseg3ei8_v_i32m2_tumu(__VA_ARGS__)

#define	vluxseg3ei8_v_i32mf2(...) __riscv_vluxseg3ei8_v_i32mf2(__VA_ARGS__)

#define	vluxseg3ei8_v_i32mf2_m(...) __riscv_vluxseg3ei8_v_i32mf2_tumu(__VA_ARGS__)

#define	vluxseg3ei8_v_i64m1(...) __riscv_vluxseg3ei8_v_i64m1(__VA_ARGS__)

#define	vluxseg3ei8_v_i64m1_m(...) __riscv_vluxseg3ei8_v_i64m1_tumu(__VA_ARGS__)

#define	vluxseg3ei8_v_i64m2(...) __riscv_vluxseg3ei8_v_i64m2(__VA_ARGS__)

#define	vluxseg3ei8_v_i64m2_m(...) __riscv_vluxseg3ei8_v_i64m2_tumu(__VA_ARGS__)

#define	vluxseg3ei8_v_i8m1(...) __riscv_vluxseg3ei8_v_i8m1(__VA_ARGS__)

#define	vluxseg3ei8_v_i8m1_m(...) __riscv_vluxseg3ei8_v_i8m1_tumu(__VA_ARGS__)

#define	vluxseg3ei8_v_i8m2(...) __riscv_vluxseg3ei8_v_i8m2(__VA_ARGS__)

#define	vluxseg3ei8_v_i8m2_m(...) __riscv_vluxseg3ei8_v_i8m2_tumu(__VA_ARGS__)

#define	vluxseg3ei8_v_i8mf2(...) __riscv_vluxseg3ei8_v_i8mf2(__VA_ARGS__)

#define	vluxseg3ei8_v_i8mf2_m(...) __riscv_vluxseg3ei8_v_i8mf2_tumu(__VA_ARGS__)

#define	vluxseg3ei8_v_i8mf4(...) __riscv_vluxseg3ei8_v_i8mf4(__VA_ARGS__)

#define	vluxseg3ei8_v_i8mf4_m(...) __riscv_vluxseg3ei8_v_i8mf4_tumu(__VA_ARGS__)

#define	vluxseg3ei8_v_i8mf8(...) __riscv_vluxseg3ei8_v_i8mf8(__VA_ARGS__)

#define	vluxseg3ei8_v_i8mf8_m(...) __riscv_vluxseg3ei8_v_i8mf8_tumu(__VA_ARGS__)

#define	vluxseg3ei8_v_u16m1(...) __riscv_vluxseg3ei8_v_u16m1(__VA_ARGS__)

#define	vluxseg3ei8_v_u16m1_m(...) __riscv_vluxseg3ei8_v_u16m1_tumu(__VA_ARGS__)

#define	vluxseg3ei8_v_u16m2(...) __riscv_vluxseg3ei8_v_u16m2(__VA_ARGS__)

#define	vluxseg3ei8_v_u16m2_m(...) __riscv_vluxseg3ei8_v_u16m2_tumu(__VA_ARGS__)

#define	vluxseg3ei8_v_u16mf2(...) __riscv_vluxseg3ei8_v_u16mf2(__VA_ARGS__)

#define	vluxseg3ei8_v_u16mf2_m(...) __riscv_vluxseg3ei8_v_u16mf2_tumu(__VA_ARGS__)

#define	vluxseg3ei8_v_u16mf4(...) __riscv_vluxseg3ei8_v_u16mf4(__VA_ARGS__)

#define	vluxseg3ei8_v_u16mf4_m(...) __riscv_vluxseg3ei8_v_u16mf4_tumu(__VA_ARGS__)

#define	vluxseg3ei8_v_u32m1(...) __riscv_vluxseg3ei8_v_u32m1(__VA_ARGS__)

#define	vluxseg3ei8_v_u32m1_m(...) __riscv_vluxseg3ei8_v_u32m1_tumu(__VA_ARGS__)

#define	vluxseg3ei8_v_u32m2(...) __riscv_vluxseg3ei8_v_u32m2(__VA_ARGS__)

#define	vluxseg3ei8_v_u32m2_m(...) __riscv_vluxseg3ei8_v_u32m2_tumu(__VA_ARGS__)

#define	vluxseg3ei8_v_u32mf2(...) __riscv_vluxseg3ei8_v_u32mf2(__VA_ARGS__)

#define	vluxseg3ei8_v_u32mf2_m(...) __riscv_vluxseg3ei8_v_u32mf2_tumu(__VA_ARGS__)

#define	vluxseg3ei8_v_u64m1(...) __riscv_vluxseg3ei8_v_u64m1(__VA_ARGS__)

#define	vluxseg3ei8_v_u64m1_m(...) __riscv_vluxseg3ei8_v_u64m1_tumu(__VA_ARGS__)

#define	vluxseg3ei8_v_u64m2(...) __riscv_vluxseg3ei8_v_u64m2(__VA_ARGS__)

#define	vluxseg3ei8_v_u64m2_m(...) __riscv_vluxseg3ei8_v_u64m2_tumu(__VA_ARGS__)

#define	vluxseg3ei8_v_u8m1(...) __riscv_vluxseg3ei8_v_u8m1(__VA_ARGS__)

#define	vluxseg3ei8_v_u8m1_m(...) __riscv_vluxseg3ei8_v_u8m1_tumu(__VA_ARGS__)

#define	vluxseg3ei8_v_u8m2(...) __riscv_vluxseg3ei8_v_u8m2(__VA_ARGS__)

#define	vluxseg3ei8_v_u8m2_m(...) __riscv_vluxseg3ei8_v_u8m2_tumu(__VA_ARGS__)

#define	vluxseg3ei8_v_u8mf2(...) __riscv_vluxseg3ei8_v_u8mf2(__VA_ARGS__)

#define	vluxseg3ei8_v_u8mf2_m(...) __riscv_vluxseg3ei8_v_u8mf2_tumu(__VA_ARGS__)

#define	vluxseg3ei8_v_u8mf4(...) __riscv_vluxseg3ei8_v_u8mf4(__VA_ARGS__)

#define	vluxseg3ei8_v_u8mf4_m(...) __riscv_vluxseg3ei8_v_u8mf4_tumu(__VA_ARGS__)

#define	vluxseg3ei8_v_u8mf8(...) __riscv_vluxseg3ei8_v_u8mf8(__VA_ARGS__)

#define	vluxseg3ei8_v_u8mf8_m(...) __riscv_vluxseg3ei8_v_u8mf8_tumu(__VA_ARGS__)

#define	vluxseg4ei16_v_f16m1(...) __riscv_vluxseg4ei16_v_f16m1(__VA_ARGS__)

#define	vluxseg4ei16_v_f16m1_m(...) __riscv_vluxseg4ei16_v_f16m1_tumu(__VA_ARGS__)

#define	vluxseg4ei16_v_f16m2(...) __riscv_vluxseg4ei16_v_f16m2(__VA_ARGS__)

#define	vluxseg4ei16_v_f16m2_m(...) __riscv_vluxseg4ei16_v_f16m2_tumu(__VA_ARGS__)

#define	vluxseg4ei16_v_f16mf2(...) __riscv_vluxseg4ei16_v_f16mf2(__VA_ARGS__)

#define	vluxseg4ei16_v_f16mf2_m(...) __riscv_vluxseg4ei16_v_f16mf2_tumu(__VA_ARGS__)

#define	vluxseg4ei16_v_f16mf4(...) __riscv_vluxseg4ei16_v_f16mf4(__VA_ARGS__)

#define	vluxseg4ei16_v_f16mf4_m(...) __riscv_vluxseg4ei16_v_f16mf4_tumu(__VA_ARGS__)

#define	vluxseg4ei16_v_f32m1(...) __riscv_vluxseg4ei16_v_f32m1(__VA_ARGS__)

#define	vluxseg4ei16_v_f32m1_m(...) __riscv_vluxseg4ei16_v_f32m1_tumu(__VA_ARGS__)

#define	vluxseg4ei16_v_f32m2(...) __riscv_vluxseg4ei16_v_f32m2(__VA_ARGS__)

#define	vluxseg4ei16_v_f32m2_m(...) __riscv_vluxseg4ei16_v_f32m2_tumu(__VA_ARGS__)

#define	vluxseg4ei16_v_f32mf2(...) __riscv_vluxseg4ei16_v_f32mf2(__VA_ARGS__)

#define	vluxseg4ei16_v_f32mf2_m(...) __riscv_vluxseg4ei16_v_f32mf2_tumu(__VA_ARGS__)

#define	vluxseg4ei16_v_f64m1(...) __riscv_vluxseg4ei16_v_f64m1(__VA_ARGS__)

#define	vluxseg4ei16_v_f64m1_m(...) __riscv_vluxseg4ei16_v_f64m1_tumu(__VA_ARGS__)

#define	vluxseg4ei16_v_f64m2(...) __riscv_vluxseg4ei16_v_f64m2(__VA_ARGS__)

#define	vluxseg4ei16_v_f64m2_m(...) __riscv_vluxseg4ei16_v_f64m2_tumu(__VA_ARGS__)

#define	vluxseg4ei16_v_i16m1(...) __riscv_vluxseg4ei16_v_i16m1(__VA_ARGS__)

#define	vluxseg4ei16_v_i16m1_m(...) __riscv_vluxseg4ei16_v_i16m1_tumu(__VA_ARGS__)

#define	vluxseg4ei16_v_i16m2(...) __riscv_vluxseg4ei16_v_i16m2(__VA_ARGS__)

#define	vluxseg4ei16_v_i16m2_m(...) __riscv_vluxseg4ei16_v_i16m2_tumu(__VA_ARGS__)

#define	vluxseg4ei16_v_i16mf2(...) __riscv_vluxseg4ei16_v_i16mf2(__VA_ARGS__)

#define	vluxseg4ei16_v_i16mf2_m(...) __riscv_vluxseg4ei16_v_i16mf2_tumu(__VA_ARGS__)

#define	vluxseg4ei16_v_i16mf4(...) __riscv_vluxseg4ei16_v_i16mf4(__VA_ARGS__)

#define	vluxseg4ei16_v_i16mf4_m(...) __riscv_vluxseg4ei16_v_i16mf4_tumu(__VA_ARGS__)

#define	vluxseg4ei16_v_i32m1(...) __riscv_vluxseg4ei16_v_i32m1(__VA_ARGS__)

#define	vluxseg4ei16_v_i32m1_m(...) __riscv_vluxseg4ei16_v_i32m1_tumu(__VA_ARGS__)

#define	vluxseg4ei16_v_i32m2(...) __riscv_vluxseg4ei16_v_i32m2(__VA_ARGS__)

#define	vluxseg4ei16_v_i32m2_m(...) __riscv_vluxseg4ei16_v_i32m2_tumu(__VA_ARGS__)

#define	vluxseg4ei16_v_i32mf2(...) __riscv_vluxseg4ei16_v_i32mf2(__VA_ARGS__)

#define	vluxseg4ei16_v_i32mf2_m(...) __riscv_vluxseg4ei16_v_i32mf2_tumu(__VA_ARGS__)

#define	vluxseg4ei16_v_i64m1(...) __riscv_vluxseg4ei16_v_i64m1(__VA_ARGS__)

#define	vluxseg4ei16_v_i64m1_m(...) __riscv_vluxseg4ei16_v_i64m1_tumu(__VA_ARGS__)

#define	vluxseg4ei16_v_i64m2(...) __riscv_vluxseg4ei16_v_i64m2(__VA_ARGS__)

#define	vluxseg4ei16_v_i64m2_m(...) __riscv_vluxseg4ei16_v_i64m2_tumu(__VA_ARGS__)

#define	vluxseg4ei16_v_i8m1(...) __riscv_vluxseg4ei16_v_i8m1(__VA_ARGS__)

#define	vluxseg4ei16_v_i8m1_m(...) __riscv_vluxseg4ei16_v_i8m1_tumu(__VA_ARGS__)

#define	vluxseg4ei16_v_i8m2(...) __riscv_vluxseg4ei16_v_i8m2(__VA_ARGS__)

#define	vluxseg4ei16_v_i8m2_m(...) __riscv_vluxseg4ei16_v_i8m2_tumu(__VA_ARGS__)

#define	vluxseg4ei16_v_i8mf2(...) __riscv_vluxseg4ei16_v_i8mf2(__VA_ARGS__)

#define	vluxseg4ei16_v_i8mf2_m(...) __riscv_vluxseg4ei16_v_i8mf2_tumu(__VA_ARGS__)

#define	vluxseg4ei16_v_i8mf4(...) __riscv_vluxseg4ei16_v_i8mf4(__VA_ARGS__)

#define	vluxseg4ei16_v_i8mf4_m(...) __riscv_vluxseg4ei16_v_i8mf4_tumu(__VA_ARGS__)

#define	vluxseg4ei16_v_i8mf8(...) __riscv_vluxseg4ei16_v_i8mf8(__VA_ARGS__)

#define	vluxseg4ei16_v_i8mf8_m(...) __riscv_vluxseg4ei16_v_i8mf8_tumu(__VA_ARGS__)

#define	vluxseg4ei16_v_u16m1(...) __riscv_vluxseg4ei16_v_u16m1(__VA_ARGS__)

#define	vluxseg4ei16_v_u16m1_m(...) __riscv_vluxseg4ei16_v_u16m1_tumu(__VA_ARGS__)

#define	vluxseg4ei16_v_u16m2(...) __riscv_vluxseg4ei16_v_u16m2(__VA_ARGS__)

#define	vluxseg4ei16_v_u16m2_m(...) __riscv_vluxseg4ei16_v_u16m2_tumu(__VA_ARGS__)

#define	vluxseg4ei16_v_u16mf2(...) __riscv_vluxseg4ei16_v_u16mf2(__VA_ARGS__)

#define	vluxseg4ei16_v_u16mf2_m(...) __riscv_vluxseg4ei16_v_u16mf2_tumu(__VA_ARGS__)

#define	vluxseg4ei16_v_u16mf4(...) __riscv_vluxseg4ei16_v_u16mf4(__VA_ARGS__)

#define	vluxseg4ei16_v_u16mf4_m(...) __riscv_vluxseg4ei16_v_u16mf4_tumu(__VA_ARGS__)

#define	vluxseg4ei16_v_u32m1(...) __riscv_vluxseg4ei16_v_u32m1(__VA_ARGS__)

#define	vluxseg4ei16_v_u32m1_m(...) __riscv_vluxseg4ei16_v_u32m1_tumu(__VA_ARGS__)

#define	vluxseg4ei16_v_u32m2(...) __riscv_vluxseg4ei16_v_u32m2(__VA_ARGS__)

#define	vluxseg4ei16_v_u32m2_m(...) __riscv_vluxseg4ei16_v_u32m2_tumu(__VA_ARGS__)

#define	vluxseg4ei16_v_u32mf2(...) __riscv_vluxseg4ei16_v_u32mf2(__VA_ARGS__)

#define	vluxseg4ei16_v_u32mf2_m(...) __riscv_vluxseg4ei16_v_u32mf2_tumu(__VA_ARGS__)

#define	vluxseg4ei16_v_u64m1(...) __riscv_vluxseg4ei16_v_u64m1(__VA_ARGS__)

#define	vluxseg4ei16_v_u64m1_m(...) __riscv_vluxseg4ei16_v_u64m1_tumu(__VA_ARGS__)

#define	vluxseg4ei16_v_u64m2(...) __riscv_vluxseg4ei16_v_u64m2(__VA_ARGS__)

#define	vluxseg4ei16_v_u64m2_m(...) __riscv_vluxseg4ei16_v_u64m2_tumu(__VA_ARGS__)

#define	vluxseg4ei16_v_u8m1(...) __riscv_vluxseg4ei16_v_u8m1(__VA_ARGS__)

#define	vluxseg4ei16_v_u8m1_m(...) __riscv_vluxseg4ei16_v_u8m1_tumu(__VA_ARGS__)

#define	vluxseg4ei16_v_u8m2(...) __riscv_vluxseg4ei16_v_u8m2(__VA_ARGS__)

#define	vluxseg4ei16_v_u8m2_m(...) __riscv_vluxseg4ei16_v_u8m2_tumu(__VA_ARGS__)

#define	vluxseg4ei16_v_u8mf2(...) __riscv_vluxseg4ei16_v_u8mf2(__VA_ARGS__)

#define	vluxseg4ei16_v_u8mf2_m(...) __riscv_vluxseg4ei16_v_u8mf2_tumu(__VA_ARGS__)

#define	vluxseg4ei16_v_u8mf4(...) __riscv_vluxseg4ei16_v_u8mf4(__VA_ARGS__)

#define	vluxseg4ei16_v_u8mf4_m(...) __riscv_vluxseg4ei16_v_u8mf4_tumu(__VA_ARGS__)

#define	vluxseg4ei16_v_u8mf8(...) __riscv_vluxseg4ei16_v_u8mf8(__VA_ARGS__)

#define	vluxseg4ei16_v_u8mf8_m(...) __riscv_vluxseg4ei16_v_u8mf8_tumu(__VA_ARGS__)

#define	vluxseg4ei32_v_f16m1(...) __riscv_vluxseg4ei32_v_f16m1(__VA_ARGS__)

#define	vluxseg4ei32_v_f16m1_m(...) __riscv_vluxseg4ei32_v_f16m1_tumu(__VA_ARGS__)

#define	vluxseg4ei32_v_f16m2(...) __riscv_vluxseg4ei32_v_f16m2(__VA_ARGS__)

#define	vluxseg4ei32_v_f16m2_m(...) __riscv_vluxseg4ei32_v_f16m2_tumu(__VA_ARGS__)

#define	vluxseg4ei32_v_f16mf2(...) __riscv_vluxseg4ei32_v_f16mf2(__VA_ARGS__)

#define	vluxseg4ei32_v_f16mf2_m(...) __riscv_vluxseg4ei32_v_f16mf2_tumu(__VA_ARGS__)

#define	vluxseg4ei32_v_f16mf4(...) __riscv_vluxseg4ei32_v_f16mf4(__VA_ARGS__)

#define	vluxseg4ei32_v_f16mf4_m(...) __riscv_vluxseg4ei32_v_f16mf4_tumu(__VA_ARGS__)

#define	vluxseg4ei32_v_f32m1(...) __riscv_vluxseg4ei32_v_f32m1(__VA_ARGS__)

#define	vluxseg4ei32_v_f32m1_m(...) __riscv_vluxseg4ei32_v_f32m1_tumu(__VA_ARGS__)

#define	vluxseg4ei32_v_f32m2(...) __riscv_vluxseg4ei32_v_f32m2(__VA_ARGS__)

#define	vluxseg4ei32_v_f32m2_m(...) __riscv_vluxseg4ei32_v_f32m2_tumu(__VA_ARGS__)

#define	vluxseg4ei32_v_f32mf2(...) __riscv_vluxseg4ei32_v_f32mf2(__VA_ARGS__)

#define	vluxseg4ei32_v_f32mf2_m(...) __riscv_vluxseg4ei32_v_f32mf2_tumu(__VA_ARGS__)

#define	vluxseg4ei32_v_f64m1(...) __riscv_vluxseg4ei32_v_f64m1(__VA_ARGS__)

#define	vluxseg4ei32_v_f64m1_m(...) __riscv_vluxseg4ei32_v_f64m1_tumu(__VA_ARGS__)

#define	vluxseg4ei32_v_f64m2(...) __riscv_vluxseg4ei32_v_f64m2(__VA_ARGS__)

#define	vluxseg4ei32_v_f64m2_m(...) __riscv_vluxseg4ei32_v_f64m2_tumu(__VA_ARGS__)

#define	vluxseg4ei32_v_i16m1(...) __riscv_vluxseg4ei32_v_i16m1(__VA_ARGS__)

#define	vluxseg4ei32_v_i16m1_m(...) __riscv_vluxseg4ei32_v_i16m1_tumu(__VA_ARGS__)

#define	vluxseg4ei32_v_i16m2(...) __riscv_vluxseg4ei32_v_i16m2(__VA_ARGS__)

#define	vluxseg4ei32_v_i16m2_m(...) __riscv_vluxseg4ei32_v_i16m2_tumu(__VA_ARGS__)

#define	vluxseg4ei32_v_i16mf2(...) __riscv_vluxseg4ei32_v_i16mf2(__VA_ARGS__)

#define	vluxseg4ei32_v_i16mf2_m(...) __riscv_vluxseg4ei32_v_i16mf2_tumu(__VA_ARGS__)

#define	vluxseg4ei32_v_i16mf4(...) __riscv_vluxseg4ei32_v_i16mf4(__VA_ARGS__)

#define	vluxseg4ei32_v_i16mf4_m(...) __riscv_vluxseg4ei32_v_i16mf4_tumu(__VA_ARGS__)

#define	vluxseg4ei32_v_i32m1(...) __riscv_vluxseg4ei32_v_i32m1(__VA_ARGS__)

#define	vluxseg4ei32_v_i32m1_m(...) __riscv_vluxseg4ei32_v_i32m1_tumu(__VA_ARGS__)

#define	vluxseg4ei32_v_i32m2(...) __riscv_vluxseg4ei32_v_i32m2(__VA_ARGS__)

#define	vluxseg4ei32_v_i32m2_m(...) __riscv_vluxseg4ei32_v_i32m2_tumu(__VA_ARGS__)

#define	vluxseg4ei32_v_i32mf2(...) __riscv_vluxseg4ei32_v_i32mf2(__VA_ARGS__)

#define	vluxseg4ei32_v_i32mf2_m(...) __riscv_vluxseg4ei32_v_i32mf2_tumu(__VA_ARGS__)

#define	vluxseg4ei32_v_i64m1(...) __riscv_vluxseg4ei32_v_i64m1(__VA_ARGS__)

#define	vluxseg4ei32_v_i64m1_m(...) __riscv_vluxseg4ei32_v_i64m1_tumu(__VA_ARGS__)

#define	vluxseg4ei32_v_i64m2(...) __riscv_vluxseg4ei32_v_i64m2(__VA_ARGS__)

#define	vluxseg4ei32_v_i64m2_m(...) __riscv_vluxseg4ei32_v_i64m2_tumu(__VA_ARGS__)

#define	vluxseg4ei32_v_i8m1(...) __riscv_vluxseg4ei32_v_i8m1(__VA_ARGS__)

#define	vluxseg4ei32_v_i8m1_m(...) __riscv_vluxseg4ei32_v_i8m1_tumu(__VA_ARGS__)

#define	vluxseg4ei32_v_i8m2(...) __riscv_vluxseg4ei32_v_i8m2(__VA_ARGS__)

#define	vluxseg4ei32_v_i8m2_m(...) __riscv_vluxseg4ei32_v_i8m2_tumu(__VA_ARGS__)

#define	vluxseg4ei32_v_i8mf2(...) __riscv_vluxseg4ei32_v_i8mf2(__VA_ARGS__)

#define	vluxseg4ei32_v_i8mf2_m(...) __riscv_vluxseg4ei32_v_i8mf2_tumu(__VA_ARGS__)

#define	vluxseg4ei32_v_i8mf4(...) __riscv_vluxseg4ei32_v_i8mf4(__VA_ARGS__)

#define	vluxseg4ei32_v_i8mf4_m(...) __riscv_vluxseg4ei32_v_i8mf4_tumu(__VA_ARGS__)

#define	vluxseg4ei32_v_i8mf8(...) __riscv_vluxseg4ei32_v_i8mf8(__VA_ARGS__)

#define	vluxseg4ei32_v_i8mf8_m(...) __riscv_vluxseg4ei32_v_i8mf8_tumu(__VA_ARGS__)

#define	vluxseg4ei32_v_u16m1(...) __riscv_vluxseg4ei32_v_u16m1(__VA_ARGS__)

#define	vluxseg4ei32_v_u16m1_m(...) __riscv_vluxseg4ei32_v_u16m1_tumu(__VA_ARGS__)

#define	vluxseg4ei32_v_u16m2(...) __riscv_vluxseg4ei32_v_u16m2(__VA_ARGS__)

#define	vluxseg4ei32_v_u16m2_m(...) __riscv_vluxseg4ei32_v_u16m2_tumu(__VA_ARGS__)

#define	vluxseg4ei32_v_u16mf2(...) __riscv_vluxseg4ei32_v_u16mf2(__VA_ARGS__)

#define	vluxseg4ei32_v_u16mf2_m(...) __riscv_vluxseg4ei32_v_u16mf2_tumu(__VA_ARGS__)

#define	vluxseg4ei32_v_u16mf4(...) __riscv_vluxseg4ei32_v_u16mf4(__VA_ARGS__)

#define	vluxseg4ei32_v_u16mf4_m(...) __riscv_vluxseg4ei32_v_u16mf4_tumu(__VA_ARGS__)

#define	vluxseg4ei32_v_u32m1(...) __riscv_vluxseg4ei32_v_u32m1(__VA_ARGS__)

#define	vluxseg4ei32_v_u32m1_m(...) __riscv_vluxseg4ei32_v_u32m1_tumu(__VA_ARGS__)

#define	vluxseg4ei32_v_u32m2(...) __riscv_vluxseg4ei32_v_u32m2(__VA_ARGS__)

#define	vluxseg4ei32_v_u32m2_m(...) __riscv_vluxseg4ei32_v_u32m2_tumu(__VA_ARGS__)

#define	vluxseg4ei32_v_u32mf2(...) __riscv_vluxseg4ei32_v_u32mf2(__VA_ARGS__)

#define	vluxseg4ei32_v_u32mf2_m(...) __riscv_vluxseg4ei32_v_u32mf2_tumu(__VA_ARGS__)

#define	vluxseg4ei32_v_u64m1(...) __riscv_vluxseg4ei32_v_u64m1(__VA_ARGS__)

#define	vluxseg4ei32_v_u64m1_m(...) __riscv_vluxseg4ei32_v_u64m1_tumu(__VA_ARGS__)

#define	vluxseg4ei32_v_u64m2(...) __riscv_vluxseg4ei32_v_u64m2(__VA_ARGS__)

#define	vluxseg4ei32_v_u64m2_m(...) __riscv_vluxseg4ei32_v_u64m2_tumu(__VA_ARGS__)

#define	vluxseg4ei32_v_u8m1(...) __riscv_vluxseg4ei32_v_u8m1(__VA_ARGS__)

#define	vluxseg4ei32_v_u8m1_m(...) __riscv_vluxseg4ei32_v_u8m1_tumu(__VA_ARGS__)

#define	vluxseg4ei32_v_u8m2(...) __riscv_vluxseg4ei32_v_u8m2(__VA_ARGS__)

#define	vluxseg4ei32_v_u8m2_m(...) __riscv_vluxseg4ei32_v_u8m2_tumu(__VA_ARGS__)

#define	vluxseg4ei32_v_u8mf2(...) __riscv_vluxseg4ei32_v_u8mf2(__VA_ARGS__)

#define	vluxseg4ei32_v_u8mf2_m(...) __riscv_vluxseg4ei32_v_u8mf2_tumu(__VA_ARGS__)

#define	vluxseg4ei32_v_u8mf4(...) __riscv_vluxseg4ei32_v_u8mf4(__VA_ARGS__)

#define	vluxseg4ei32_v_u8mf4_m(...) __riscv_vluxseg4ei32_v_u8mf4_tumu(__VA_ARGS__)

#define	vluxseg4ei32_v_u8mf8(...) __riscv_vluxseg4ei32_v_u8mf8(__VA_ARGS__)

#define	vluxseg4ei32_v_u8mf8_m(...) __riscv_vluxseg4ei32_v_u8mf8_tumu(__VA_ARGS__)

#define	vluxseg4ei64_v_f16m1(...) __riscv_vluxseg4ei64_v_f16m1(__VA_ARGS__)

#define	vluxseg4ei64_v_f16m1_m(...) __riscv_vluxseg4ei64_v_f16m1_tumu(__VA_ARGS__)

#define	vluxseg4ei64_v_f16m2(...) __riscv_vluxseg4ei64_v_f16m2(__VA_ARGS__)

#define	vluxseg4ei64_v_f16m2_m(...) __riscv_vluxseg4ei64_v_f16m2_tumu(__VA_ARGS__)

#define	vluxseg4ei64_v_f16mf2(...) __riscv_vluxseg4ei64_v_f16mf2(__VA_ARGS__)

#define	vluxseg4ei64_v_f16mf2_m(...) __riscv_vluxseg4ei64_v_f16mf2_tumu(__VA_ARGS__)

#define	vluxseg4ei64_v_f16mf4(...) __riscv_vluxseg4ei64_v_f16mf4(__VA_ARGS__)

#define	vluxseg4ei64_v_f16mf4_m(...) __riscv_vluxseg4ei64_v_f16mf4_tumu(__VA_ARGS__)

#define	vluxseg4ei64_v_f32m1(...) __riscv_vluxseg4ei64_v_f32m1(__VA_ARGS__)

#define	vluxseg4ei64_v_f32m1_m(...) __riscv_vluxseg4ei64_v_f32m1_tumu(__VA_ARGS__)

#define	vluxseg4ei64_v_f32m2(...) __riscv_vluxseg4ei64_v_f32m2(__VA_ARGS__)

#define	vluxseg4ei64_v_f32m2_m(...) __riscv_vluxseg4ei64_v_f32m2_tumu(__VA_ARGS__)

#define	vluxseg4ei64_v_f32mf2(...) __riscv_vluxseg4ei64_v_f32mf2(__VA_ARGS__)

#define	vluxseg4ei64_v_f32mf2_m(...) __riscv_vluxseg4ei64_v_f32mf2_tumu(__VA_ARGS__)

#define	vluxseg4ei64_v_f64m1(...) __riscv_vluxseg4ei64_v_f64m1(__VA_ARGS__)

#define	vluxseg4ei64_v_f64m1_m(...) __riscv_vluxseg4ei64_v_f64m1_tumu(__VA_ARGS__)

#define	vluxseg4ei64_v_f64m2(...) __riscv_vluxseg4ei64_v_f64m2(__VA_ARGS__)

#define	vluxseg4ei64_v_f64m2_m(...) __riscv_vluxseg4ei64_v_f64m2_tumu(__VA_ARGS__)

#define	vluxseg4ei64_v_i16m1(...) __riscv_vluxseg4ei64_v_i16m1(__VA_ARGS__)

#define	vluxseg4ei64_v_i16m1_m(...) __riscv_vluxseg4ei64_v_i16m1_tumu(__VA_ARGS__)

#define	vluxseg4ei64_v_i16m2(...) __riscv_vluxseg4ei64_v_i16m2(__VA_ARGS__)

#define	vluxseg4ei64_v_i16m2_m(...) __riscv_vluxseg4ei64_v_i16m2_tumu(__VA_ARGS__)

#define	vluxseg4ei64_v_i16mf2(...) __riscv_vluxseg4ei64_v_i16mf2(__VA_ARGS__)

#define	vluxseg4ei64_v_i16mf2_m(...) __riscv_vluxseg4ei64_v_i16mf2_tumu(__VA_ARGS__)

#define	vluxseg4ei64_v_i16mf4(...) __riscv_vluxseg4ei64_v_i16mf4(__VA_ARGS__)

#define	vluxseg4ei64_v_i16mf4_m(...) __riscv_vluxseg4ei64_v_i16mf4_tumu(__VA_ARGS__)

#define	vluxseg4ei64_v_i32m1(...) __riscv_vluxseg4ei64_v_i32m1(__VA_ARGS__)

#define	vluxseg4ei64_v_i32m1_m(...) __riscv_vluxseg4ei64_v_i32m1_tumu(__VA_ARGS__)

#define	vluxseg4ei64_v_i32m2(...) __riscv_vluxseg4ei64_v_i32m2(__VA_ARGS__)

#define	vluxseg4ei64_v_i32m2_m(...) __riscv_vluxseg4ei64_v_i32m2_tumu(__VA_ARGS__)

#define	vluxseg4ei64_v_i32mf2(...) __riscv_vluxseg4ei64_v_i32mf2(__VA_ARGS__)

#define	vluxseg4ei64_v_i32mf2_m(...) __riscv_vluxseg4ei64_v_i32mf2_tumu(__VA_ARGS__)

#define	vluxseg4ei64_v_i64m1(...) __riscv_vluxseg4ei64_v_i64m1(__VA_ARGS__)

#define	vluxseg4ei64_v_i64m1_m(...) __riscv_vluxseg4ei64_v_i64m1_tumu(__VA_ARGS__)

#define	vluxseg4ei64_v_i64m2(...) __riscv_vluxseg4ei64_v_i64m2(__VA_ARGS__)

#define	vluxseg4ei64_v_i64m2_m(...) __riscv_vluxseg4ei64_v_i64m2_tumu(__VA_ARGS__)

#define	vluxseg4ei64_v_i8m1(...) __riscv_vluxseg4ei64_v_i8m1(__VA_ARGS__)

#define	vluxseg4ei64_v_i8m1_m(...) __riscv_vluxseg4ei64_v_i8m1_tumu(__VA_ARGS__)

#define	vluxseg4ei64_v_i8mf2(...) __riscv_vluxseg4ei64_v_i8mf2(__VA_ARGS__)

#define	vluxseg4ei64_v_i8mf2_m(...) __riscv_vluxseg4ei64_v_i8mf2_tumu(__VA_ARGS__)

#define	vluxseg4ei64_v_i8mf4(...) __riscv_vluxseg4ei64_v_i8mf4(__VA_ARGS__)

#define	vluxseg4ei64_v_i8mf4_m(...) __riscv_vluxseg4ei64_v_i8mf4_tumu(__VA_ARGS__)

#define	vluxseg4ei64_v_i8mf8(...) __riscv_vluxseg4ei64_v_i8mf8(__VA_ARGS__)

#define	vluxseg4ei64_v_i8mf8_m(...) __riscv_vluxseg4ei64_v_i8mf8_tumu(__VA_ARGS__)

#define	vluxseg4ei64_v_u16m1(...) __riscv_vluxseg4ei64_v_u16m1(__VA_ARGS__)

#define	vluxseg4ei64_v_u16m1_m(...) __riscv_vluxseg4ei64_v_u16m1_tumu(__VA_ARGS__)

#define	vluxseg4ei64_v_u16m2(...) __riscv_vluxseg4ei64_v_u16m2(__VA_ARGS__)

#define	vluxseg4ei64_v_u16m2_m(...) __riscv_vluxseg4ei64_v_u16m2_tumu(__VA_ARGS__)

#define	vluxseg4ei64_v_u16mf2(...) __riscv_vluxseg4ei64_v_u16mf2(__VA_ARGS__)

#define	vluxseg4ei64_v_u16mf2_m(...) __riscv_vluxseg4ei64_v_u16mf2_tumu(__VA_ARGS__)

#define	vluxseg4ei64_v_u16mf4(...) __riscv_vluxseg4ei64_v_u16mf4(__VA_ARGS__)

#define	vluxseg4ei64_v_u16mf4_m(...) __riscv_vluxseg4ei64_v_u16mf4_tumu(__VA_ARGS__)

#define	vluxseg4ei64_v_u32m1(...) __riscv_vluxseg4ei64_v_u32m1(__VA_ARGS__)

#define	vluxseg4ei64_v_u32m1_m(...) __riscv_vluxseg4ei64_v_u32m1_tumu(__VA_ARGS__)

#define	vluxseg4ei64_v_u32m2(...) __riscv_vluxseg4ei64_v_u32m2(__VA_ARGS__)

#define	vluxseg4ei64_v_u32m2_m(...) __riscv_vluxseg4ei64_v_u32m2_tumu(__VA_ARGS__)

#define	vluxseg4ei64_v_u32mf2(...) __riscv_vluxseg4ei64_v_u32mf2(__VA_ARGS__)

#define	vluxseg4ei64_v_u32mf2_m(...) __riscv_vluxseg4ei64_v_u32mf2_tumu(__VA_ARGS__)

#define	vluxseg4ei64_v_u64m1(...) __riscv_vluxseg4ei64_v_u64m1(__VA_ARGS__)

#define	vluxseg4ei64_v_u64m1_m(...) __riscv_vluxseg4ei64_v_u64m1_tumu(__VA_ARGS__)

#define	vluxseg4ei64_v_u64m2(...) __riscv_vluxseg4ei64_v_u64m2(__VA_ARGS__)

#define	vluxseg4ei64_v_u64m2_m(...) __riscv_vluxseg4ei64_v_u64m2_tumu(__VA_ARGS__)

#define	vluxseg4ei64_v_u8m1(...) __riscv_vluxseg4ei64_v_u8m1(__VA_ARGS__)

#define	vluxseg4ei64_v_u8m1_m(...) __riscv_vluxseg4ei64_v_u8m1_tumu(__VA_ARGS__)

#define	vluxseg4ei64_v_u8mf2(...) __riscv_vluxseg4ei64_v_u8mf2(__VA_ARGS__)

#define	vluxseg4ei64_v_u8mf2_m(...) __riscv_vluxseg4ei64_v_u8mf2_tumu(__VA_ARGS__)

#define	vluxseg4ei64_v_u8mf4(...) __riscv_vluxseg4ei64_v_u8mf4(__VA_ARGS__)

#define	vluxseg4ei64_v_u8mf4_m(...) __riscv_vluxseg4ei64_v_u8mf4_tumu(__VA_ARGS__)

#define	vluxseg4ei64_v_u8mf8(...) __riscv_vluxseg4ei64_v_u8mf8(__VA_ARGS__)

#define	vluxseg4ei64_v_u8mf8_m(...) __riscv_vluxseg4ei64_v_u8mf8_tumu(__VA_ARGS__)

#define	vluxseg4ei8_v_f16m1(...) __riscv_vluxseg4ei8_v_f16m1(__VA_ARGS__)

#define	vluxseg4ei8_v_f16m1_m(...) __riscv_vluxseg4ei8_v_f16m1_tumu(__VA_ARGS__)

#define	vluxseg4ei8_v_f16m2(...) __riscv_vluxseg4ei8_v_f16m2(__VA_ARGS__)

#define	vluxseg4ei8_v_f16m2_m(...) __riscv_vluxseg4ei8_v_f16m2_tumu(__VA_ARGS__)

#define	vluxseg4ei8_v_f16mf2(...) __riscv_vluxseg4ei8_v_f16mf2(__VA_ARGS__)

#define	vluxseg4ei8_v_f16mf2_m(...) __riscv_vluxseg4ei8_v_f16mf2_tumu(__VA_ARGS__)

#define	vluxseg4ei8_v_f16mf4(...) __riscv_vluxseg4ei8_v_f16mf4(__VA_ARGS__)

#define	vluxseg4ei8_v_f16mf4_m(...) __riscv_vluxseg4ei8_v_f16mf4_tumu(__VA_ARGS__)

#define	vluxseg4ei8_v_f32m1(...) __riscv_vluxseg4ei8_v_f32m1(__VA_ARGS__)

#define	vluxseg4ei8_v_f32m1_m(...) __riscv_vluxseg4ei8_v_f32m1_tumu(__VA_ARGS__)

#define	vluxseg4ei8_v_f32m2(...) __riscv_vluxseg4ei8_v_f32m2(__VA_ARGS__)

#define	vluxseg4ei8_v_f32m2_m(...) __riscv_vluxseg4ei8_v_f32m2_tumu(__VA_ARGS__)

#define	vluxseg4ei8_v_f32mf2(...) __riscv_vluxseg4ei8_v_f32mf2(__VA_ARGS__)

#define	vluxseg4ei8_v_f32mf2_m(...) __riscv_vluxseg4ei8_v_f32mf2_tumu(__VA_ARGS__)

#define	vluxseg4ei8_v_f64m1(...) __riscv_vluxseg4ei8_v_f64m1(__VA_ARGS__)

#define	vluxseg4ei8_v_f64m1_m(...) __riscv_vluxseg4ei8_v_f64m1_tumu(__VA_ARGS__)

#define	vluxseg4ei8_v_f64m2(...) __riscv_vluxseg4ei8_v_f64m2(__VA_ARGS__)

#define	vluxseg4ei8_v_f64m2_m(...) __riscv_vluxseg4ei8_v_f64m2_tumu(__VA_ARGS__)

#define	vluxseg4ei8_v_i16m1(...) __riscv_vluxseg4ei8_v_i16m1(__VA_ARGS__)

#define	vluxseg4ei8_v_i16m1_m(...) __riscv_vluxseg4ei8_v_i16m1_tumu(__VA_ARGS__)

#define	vluxseg4ei8_v_i16m2(...) __riscv_vluxseg4ei8_v_i16m2(__VA_ARGS__)

#define	vluxseg4ei8_v_i16m2_m(...) __riscv_vluxseg4ei8_v_i16m2_tumu(__VA_ARGS__)

#define	vluxseg4ei8_v_i16mf2(...) __riscv_vluxseg4ei8_v_i16mf2(__VA_ARGS__)

#define	vluxseg4ei8_v_i16mf2_m(...) __riscv_vluxseg4ei8_v_i16mf2_tumu(__VA_ARGS__)

#define	vluxseg4ei8_v_i16mf4(...) __riscv_vluxseg4ei8_v_i16mf4(__VA_ARGS__)

#define	vluxseg4ei8_v_i16mf4_m(...) __riscv_vluxseg4ei8_v_i16mf4_tumu(__VA_ARGS__)

#define	vluxseg4ei8_v_i32m1(...) __riscv_vluxseg4ei8_v_i32m1(__VA_ARGS__)

#define	vluxseg4ei8_v_i32m1_m(...) __riscv_vluxseg4ei8_v_i32m1_tumu(__VA_ARGS__)

#define	vluxseg4ei8_v_i32m2(...) __riscv_vluxseg4ei8_v_i32m2(__VA_ARGS__)

#define	vluxseg4ei8_v_i32m2_m(...) __riscv_vluxseg4ei8_v_i32m2_tumu(__VA_ARGS__)

#define	vluxseg4ei8_v_i32mf2(...) __riscv_vluxseg4ei8_v_i32mf2(__VA_ARGS__)

#define	vluxseg4ei8_v_i32mf2_m(...) __riscv_vluxseg4ei8_v_i32mf2_tumu(__VA_ARGS__)

#define	vluxseg4ei8_v_i64m1(...) __riscv_vluxseg4ei8_v_i64m1(__VA_ARGS__)

#define	vluxseg4ei8_v_i64m1_m(...) __riscv_vluxseg4ei8_v_i64m1_tumu(__VA_ARGS__)

#define	vluxseg4ei8_v_i64m2(...) __riscv_vluxseg4ei8_v_i64m2(__VA_ARGS__)

#define	vluxseg4ei8_v_i64m2_m(...) __riscv_vluxseg4ei8_v_i64m2_tumu(__VA_ARGS__)

#define	vluxseg4ei8_v_i8m1(...) __riscv_vluxseg4ei8_v_i8m1(__VA_ARGS__)

#define	vluxseg4ei8_v_i8m1_m(...) __riscv_vluxseg4ei8_v_i8m1_tumu(__VA_ARGS__)

#define	vluxseg4ei8_v_i8m2(...) __riscv_vluxseg4ei8_v_i8m2(__VA_ARGS__)

#define	vluxseg4ei8_v_i8m2_m(...) __riscv_vluxseg4ei8_v_i8m2_tumu(__VA_ARGS__)

#define	vluxseg4ei8_v_i8mf2(...) __riscv_vluxseg4ei8_v_i8mf2(__VA_ARGS__)

#define	vluxseg4ei8_v_i8mf2_m(...) __riscv_vluxseg4ei8_v_i8mf2_tumu(__VA_ARGS__)

#define	vluxseg4ei8_v_i8mf4(...) __riscv_vluxseg4ei8_v_i8mf4(__VA_ARGS__)

#define	vluxseg4ei8_v_i8mf4_m(...) __riscv_vluxseg4ei8_v_i8mf4_tumu(__VA_ARGS__)

#define	vluxseg4ei8_v_i8mf8(...) __riscv_vluxseg4ei8_v_i8mf8(__VA_ARGS__)

#define	vluxseg4ei8_v_i8mf8_m(...) __riscv_vluxseg4ei8_v_i8mf8_tumu(__VA_ARGS__)

#define	vluxseg4ei8_v_u16m1(...) __riscv_vluxseg4ei8_v_u16m1(__VA_ARGS__)

#define	vluxseg4ei8_v_u16m1_m(...) __riscv_vluxseg4ei8_v_u16m1_tumu(__VA_ARGS__)

#define	vluxseg4ei8_v_u16m2(...) __riscv_vluxseg4ei8_v_u16m2(__VA_ARGS__)

#define	vluxseg4ei8_v_u16m2_m(...) __riscv_vluxseg4ei8_v_u16m2_tumu(__VA_ARGS__)

#define	vluxseg4ei8_v_u16mf2(...) __riscv_vluxseg4ei8_v_u16mf2(__VA_ARGS__)

#define	vluxseg4ei8_v_u16mf2_m(...) __riscv_vluxseg4ei8_v_u16mf2_tumu(__VA_ARGS__)

#define	vluxseg4ei8_v_u16mf4(...) __riscv_vluxseg4ei8_v_u16mf4(__VA_ARGS__)

#define	vluxseg4ei8_v_u16mf4_m(...) __riscv_vluxseg4ei8_v_u16mf4_tumu(__VA_ARGS__)

#define	vluxseg4ei8_v_u32m1(...) __riscv_vluxseg4ei8_v_u32m1(__VA_ARGS__)

#define	vluxseg4ei8_v_u32m1_m(...) __riscv_vluxseg4ei8_v_u32m1_tumu(__VA_ARGS__)

#define	vluxseg4ei8_v_u32m2(...) __riscv_vluxseg4ei8_v_u32m2(__VA_ARGS__)

#define	vluxseg4ei8_v_u32m2_m(...) __riscv_vluxseg4ei8_v_u32m2_tumu(__VA_ARGS__)

#define	vluxseg4ei8_v_u32mf2(...) __riscv_vluxseg4ei8_v_u32mf2(__VA_ARGS__)

#define	vluxseg4ei8_v_u32mf2_m(...) __riscv_vluxseg4ei8_v_u32mf2_tumu(__VA_ARGS__)

#define	vluxseg4ei8_v_u64m1(...) __riscv_vluxseg4ei8_v_u64m1(__VA_ARGS__)

#define	vluxseg4ei8_v_u64m1_m(...) __riscv_vluxseg4ei8_v_u64m1_tumu(__VA_ARGS__)

#define	vluxseg4ei8_v_u64m2(...) __riscv_vluxseg4ei8_v_u64m2(__VA_ARGS__)

#define	vluxseg4ei8_v_u64m2_m(...) __riscv_vluxseg4ei8_v_u64m2_tumu(__VA_ARGS__)

#define	vluxseg4ei8_v_u8m1(...) __riscv_vluxseg4ei8_v_u8m1(__VA_ARGS__)

#define	vluxseg4ei8_v_u8m1_m(...) __riscv_vluxseg4ei8_v_u8m1_tumu(__VA_ARGS__)

#define	vluxseg4ei8_v_u8m2(...) __riscv_vluxseg4ei8_v_u8m2(__VA_ARGS__)

#define	vluxseg4ei8_v_u8m2_m(...) __riscv_vluxseg4ei8_v_u8m2_tumu(__VA_ARGS__)

#define	vluxseg4ei8_v_u8mf2(...) __riscv_vluxseg4ei8_v_u8mf2(__VA_ARGS__)

#define	vluxseg4ei8_v_u8mf2_m(...) __riscv_vluxseg4ei8_v_u8mf2_tumu(__VA_ARGS__)

#define	vluxseg4ei8_v_u8mf4(...) __riscv_vluxseg4ei8_v_u8mf4(__VA_ARGS__)

#define	vluxseg4ei8_v_u8mf4_m(...) __riscv_vluxseg4ei8_v_u8mf4_tumu(__VA_ARGS__)

#define	vluxseg4ei8_v_u8mf8(...) __riscv_vluxseg4ei8_v_u8mf8(__VA_ARGS__)

#define	vluxseg4ei8_v_u8mf8_m(...) __riscv_vluxseg4ei8_v_u8mf8_tumu(__VA_ARGS__)

#define	vluxseg5ei16_v_f16m1(...) __riscv_vluxseg5ei16_v_f16m1(__VA_ARGS__)

#define	vluxseg5ei16_v_f16m1_m(...) __riscv_vluxseg5ei16_v_f16m1_tumu(__VA_ARGS__)

#define	vluxseg5ei16_v_f16mf2(...) __riscv_vluxseg5ei16_v_f16mf2(__VA_ARGS__)

#define	vluxseg5ei16_v_f16mf2_m(...) __riscv_vluxseg5ei16_v_f16mf2_tumu(__VA_ARGS__)

#define	vluxseg5ei16_v_f16mf4(...) __riscv_vluxseg5ei16_v_f16mf4(__VA_ARGS__)

#define	vluxseg5ei16_v_f16mf4_m(...) __riscv_vluxseg5ei16_v_f16mf4_tumu(__VA_ARGS__)

#define	vluxseg5ei16_v_f32m1(...) __riscv_vluxseg5ei16_v_f32m1(__VA_ARGS__)

#define	vluxseg5ei16_v_f32m1_m(...) __riscv_vluxseg5ei16_v_f32m1_tumu(__VA_ARGS__)

#define	vluxseg5ei16_v_f32mf2(...) __riscv_vluxseg5ei16_v_f32mf2(__VA_ARGS__)

#define	vluxseg5ei16_v_f32mf2_m(...) __riscv_vluxseg5ei16_v_f32mf2_tumu(__VA_ARGS__)

#define	vluxseg5ei16_v_f64m1(...) __riscv_vluxseg5ei16_v_f64m1(__VA_ARGS__)

#define	vluxseg5ei16_v_f64m1_m(...) __riscv_vluxseg5ei16_v_f64m1_tumu(__VA_ARGS__)

#define	vluxseg5ei16_v_i16m1(...) __riscv_vluxseg5ei16_v_i16m1(__VA_ARGS__)

#define	vluxseg5ei16_v_i16m1_m(...) __riscv_vluxseg5ei16_v_i16m1_tumu(__VA_ARGS__)

#define	vluxseg5ei16_v_i16mf2(...) __riscv_vluxseg5ei16_v_i16mf2(__VA_ARGS__)

#define	vluxseg5ei16_v_i16mf2_m(...) __riscv_vluxseg5ei16_v_i16mf2_tumu(__VA_ARGS__)

#define	vluxseg5ei16_v_i16mf4(...) __riscv_vluxseg5ei16_v_i16mf4(__VA_ARGS__)

#define	vluxseg5ei16_v_i16mf4_m(...) __riscv_vluxseg5ei16_v_i16mf4_tumu(__VA_ARGS__)

#define	vluxseg5ei16_v_i32m1(...) __riscv_vluxseg5ei16_v_i32m1(__VA_ARGS__)

#define	vluxseg5ei16_v_i32m1_m(...) __riscv_vluxseg5ei16_v_i32m1_tumu(__VA_ARGS__)

#define	vluxseg5ei16_v_i32mf2(...) __riscv_vluxseg5ei16_v_i32mf2(__VA_ARGS__)

#define	vluxseg5ei16_v_i32mf2_m(...) __riscv_vluxseg5ei16_v_i32mf2_tumu(__VA_ARGS__)

#define	vluxseg5ei16_v_i64m1(...) __riscv_vluxseg5ei16_v_i64m1(__VA_ARGS__)

#define	vluxseg5ei16_v_i64m1_m(...) __riscv_vluxseg5ei16_v_i64m1_tumu(__VA_ARGS__)

#define	vluxseg5ei16_v_i8m1(...) __riscv_vluxseg5ei16_v_i8m1(__VA_ARGS__)

#define	vluxseg5ei16_v_i8m1_m(...) __riscv_vluxseg5ei16_v_i8m1_tumu(__VA_ARGS__)

#define	vluxseg5ei16_v_i8mf2(...) __riscv_vluxseg5ei16_v_i8mf2(__VA_ARGS__)

#define	vluxseg5ei16_v_i8mf2_m(...) __riscv_vluxseg5ei16_v_i8mf2_tumu(__VA_ARGS__)

#define	vluxseg5ei16_v_i8mf4(...) __riscv_vluxseg5ei16_v_i8mf4(__VA_ARGS__)

#define	vluxseg5ei16_v_i8mf4_m(...) __riscv_vluxseg5ei16_v_i8mf4_tumu(__VA_ARGS__)

#define	vluxseg5ei16_v_i8mf8(...) __riscv_vluxseg5ei16_v_i8mf8(__VA_ARGS__)

#define	vluxseg5ei16_v_i8mf8_m(...) __riscv_vluxseg5ei16_v_i8mf8_tumu(__VA_ARGS__)

#define	vluxseg5ei16_v_u16m1(...) __riscv_vluxseg5ei16_v_u16m1(__VA_ARGS__)

#define	vluxseg5ei16_v_u16m1_m(...) __riscv_vluxseg5ei16_v_u16m1_tumu(__VA_ARGS__)

#define	vluxseg5ei16_v_u16mf2(...) __riscv_vluxseg5ei16_v_u16mf2(__VA_ARGS__)

#define	vluxseg5ei16_v_u16mf2_m(...) __riscv_vluxseg5ei16_v_u16mf2_tumu(__VA_ARGS__)

#define	vluxseg5ei16_v_u16mf4(...) __riscv_vluxseg5ei16_v_u16mf4(__VA_ARGS__)

#define	vluxseg5ei16_v_u16mf4_m(...) __riscv_vluxseg5ei16_v_u16mf4_tumu(__VA_ARGS__)

#define	vluxseg5ei16_v_u32m1(...) __riscv_vluxseg5ei16_v_u32m1(__VA_ARGS__)

#define	vluxseg5ei16_v_u32m1_m(...) __riscv_vluxseg5ei16_v_u32m1_tumu(__VA_ARGS__)

#define	vluxseg5ei16_v_u32mf2(...) __riscv_vluxseg5ei16_v_u32mf2(__VA_ARGS__)

#define	vluxseg5ei16_v_u32mf2_m(...) __riscv_vluxseg5ei16_v_u32mf2_tumu(__VA_ARGS__)

#define	vluxseg5ei16_v_u64m1(...) __riscv_vluxseg5ei16_v_u64m1(__VA_ARGS__)

#define	vluxseg5ei16_v_u64m1_m(...) __riscv_vluxseg5ei16_v_u64m1_tumu(__VA_ARGS__)

#define	vluxseg5ei16_v_u8m1(...) __riscv_vluxseg5ei16_v_u8m1(__VA_ARGS__)

#define	vluxseg5ei16_v_u8m1_m(...) __riscv_vluxseg5ei16_v_u8m1_tumu(__VA_ARGS__)

#define	vluxseg5ei16_v_u8mf2(...) __riscv_vluxseg5ei16_v_u8mf2(__VA_ARGS__)

#define	vluxseg5ei16_v_u8mf2_m(...) __riscv_vluxseg5ei16_v_u8mf2_tumu(__VA_ARGS__)

#define	vluxseg5ei16_v_u8mf4(...) __riscv_vluxseg5ei16_v_u8mf4(__VA_ARGS__)

#define	vluxseg5ei16_v_u8mf4_m(...) __riscv_vluxseg5ei16_v_u8mf4_tumu(__VA_ARGS__)

#define	vluxseg5ei16_v_u8mf8(...) __riscv_vluxseg5ei16_v_u8mf8(__VA_ARGS__)

#define	vluxseg5ei16_v_u8mf8_m(...) __riscv_vluxseg5ei16_v_u8mf8_tumu(__VA_ARGS__)

#define	vluxseg5ei32_v_f16m1(...) __riscv_vluxseg5ei32_v_f16m1(__VA_ARGS__)

#define	vluxseg5ei32_v_f16m1_m(...) __riscv_vluxseg5ei32_v_f16m1_tumu(__VA_ARGS__)

#define	vluxseg5ei32_v_f16mf2(...) __riscv_vluxseg5ei32_v_f16mf2(__VA_ARGS__)

#define	vluxseg5ei32_v_f16mf2_m(...) __riscv_vluxseg5ei32_v_f16mf2_tumu(__VA_ARGS__)

#define	vluxseg5ei32_v_f16mf4(...) __riscv_vluxseg5ei32_v_f16mf4(__VA_ARGS__)

#define	vluxseg5ei32_v_f16mf4_m(...) __riscv_vluxseg5ei32_v_f16mf4_tumu(__VA_ARGS__)

#define	vluxseg5ei32_v_f32m1(...) __riscv_vluxseg5ei32_v_f32m1(__VA_ARGS__)

#define	vluxseg5ei32_v_f32m1_m(...) __riscv_vluxseg5ei32_v_f32m1_tumu(__VA_ARGS__)

#define	vluxseg5ei32_v_f32mf2(...) __riscv_vluxseg5ei32_v_f32mf2(__VA_ARGS__)

#define	vluxseg5ei32_v_f32mf2_m(...) __riscv_vluxseg5ei32_v_f32mf2_tumu(__VA_ARGS__)

#define	vluxseg5ei32_v_f64m1(...) __riscv_vluxseg5ei32_v_f64m1(__VA_ARGS__)

#define	vluxseg5ei32_v_f64m1_m(...) __riscv_vluxseg5ei32_v_f64m1_tumu(__VA_ARGS__)

#define	vluxseg5ei32_v_i16m1(...) __riscv_vluxseg5ei32_v_i16m1(__VA_ARGS__)

#define	vluxseg5ei32_v_i16m1_m(...) __riscv_vluxseg5ei32_v_i16m1_tumu(__VA_ARGS__)

#define	vluxseg5ei32_v_i16mf2(...) __riscv_vluxseg5ei32_v_i16mf2(__VA_ARGS__)

#define	vluxseg5ei32_v_i16mf2_m(...) __riscv_vluxseg5ei32_v_i16mf2_tumu(__VA_ARGS__)

#define	vluxseg5ei32_v_i16mf4(...) __riscv_vluxseg5ei32_v_i16mf4(__VA_ARGS__)

#define	vluxseg5ei32_v_i16mf4_m(...) __riscv_vluxseg5ei32_v_i16mf4_tumu(__VA_ARGS__)

#define	vluxseg5ei32_v_i32m1(...) __riscv_vluxseg5ei32_v_i32m1(__VA_ARGS__)

#define	vluxseg5ei32_v_i32m1_m(...) __riscv_vluxseg5ei32_v_i32m1_tumu(__VA_ARGS__)

#define	vluxseg5ei32_v_i32mf2(...) __riscv_vluxseg5ei32_v_i32mf2(__VA_ARGS__)

#define	vluxseg5ei32_v_i32mf2_m(...) __riscv_vluxseg5ei32_v_i32mf2_tumu(__VA_ARGS__)

#define	vluxseg5ei32_v_i64m1(...) __riscv_vluxseg5ei32_v_i64m1(__VA_ARGS__)

#define	vluxseg5ei32_v_i64m1_m(...) __riscv_vluxseg5ei32_v_i64m1_tumu(__VA_ARGS__)

#define	vluxseg5ei32_v_i8m1(...) __riscv_vluxseg5ei32_v_i8m1(__VA_ARGS__)

#define	vluxseg5ei32_v_i8m1_m(...) __riscv_vluxseg5ei32_v_i8m1_tumu(__VA_ARGS__)

#define	vluxseg5ei32_v_i8mf2(...) __riscv_vluxseg5ei32_v_i8mf2(__VA_ARGS__)

#define	vluxseg5ei32_v_i8mf2_m(...) __riscv_vluxseg5ei32_v_i8mf2_tumu(__VA_ARGS__)

#define	vluxseg5ei32_v_i8mf4(...) __riscv_vluxseg5ei32_v_i8mf4(__VA_ARGS__)

#define	vluxseg5ei32_v_i8mf4_m(...) __riscv_vluxseg5ei32_v_i8mf4_tumu(__VA_ARGS__)

#define	vluxseg5ei32_v_i8mf8(...) __riscv_vluxseg5ei32_v_i8mf8(__VA_ARGS__)

#define	vluxseg5ei32_v_i8mf8_m(...) __riscv_vluxseg5ei32_v_i8mf8_tumu(__VA_ARGS__)

#define	vluxseg5ei32_v_u16m1(...) __riscv_vluxseg5ei32_v_u16m1(__VA_ARGS__)

#define	vluxseg5ei32_v_u16m1_m(...) __riscv_vluxseg5ei32_v_u16m1_tumu(__VA_ARGS__)

#define	vluxseg5ei32_v_u16mf2(...) __riscv_vluxseg5ei32_v_u16mf2(__VA_ARGS__)

#define	vluxseg5ei32_v_u16mf2_m(...) __riscv_vluxseg5ei32_v_u16mf2_tumu(__VA_ARGS__)

#define	vluxseg5ei32_v_u16mf4(...) __riscv_vluxseg5ei32_v_u16mf4(__VA_ARGS__)

#define	vluxseg5ei32_v_u16mf4_m(...) __riscv_vluxseg5ei32_v_u16mf4_tumu(__VA_ARGS__)

#define	vluxseg5ei32_v_u32m1(...) __riscv_vluxseg5ei32_v_u32m1(__VA_ARGS__)

#define	vluxseg5ei32_v_u32m1_m(...) __riscv_vluxseg5ei32_v_u32m1_tumu(__VA_ARGS__)

#define	vluxseg5ei32_v_u32mf2(...) __riscv_vluxseg5ei32_v_u32mf2(__VA_ARGS__)

#define	vluxseg5ei32_v_u32mf2_m(...) __riscv_vluxseg5ei32_v_u32mf2_tumu(__VA_ARGS__)

#define	vluxseg5ei32_v_u64m1(...) __riscv_vluxseg5ei32_v_u64m1(__VA_ARGS__)

#define	vluxseg5ei32_v_u64m1_m(...) __riscv_vluxseg5ei32_v_u64m1_tumu(__VA_ARGS__)

#define	vluxseg5ei32_v_u8m1(...) __riscv_vluxseg5ei32_v_u8m1(__VA_ARGS__)

#define	vluxseg5ei32_v_u8m1_m(...) __riscv_vluxseg5ei32_v_u8m1_tumu(__VA_ARGS__)

#define	vluxseg5ei32_v_u8mf2(...) __riscv_vluxseg5ei32_v_u8mf2(__VA_ARGS__)

#define	vluxseg5ei32_v_u8mf2_m(...) __riscv_vluxseg5ei32_v_u8mf2_tumu(__VA_ARGS__)

#define	vluxseg5ei32_v_u8mf4(...) __riscv_vluxseg5ei32_v_u8mf4(__VA_ARGS__)

#define	vluxseg5ei32_v_u8mf4_m(...) __riscv_vluxseg5ei32_v_u8mf4_tumu(__VA_ARGS__)

#define	vluxseg5ei32_v_u8mf8(...) __riscv_vluxseg5ei32_v_u8mf8(__VA_ARGS__)

#define	vluxseg5ei32_v_u8mf8_m(...) __riscv_vluxseg5ei32_v_u8mf8_tumu(__VA_ARGS__)

#define	vluxseg5ei64_v_f16m1(...) __riscv_vluxseg5ei64_v_f16m1(__VA_ARGS__)

#define	vluxseg5ei64_v_f16m1_m(...) __riscv_vluxseg5ei64_v_f16m1_tumu(__VA_ARGS__)

#define	vluxseg5ei64_v_f16mf2(...) __riscv_vluxseg5ei64_v_f16mf2(__VA_ARGS__)

#define	vluxseg5ei64_v_f16mf2_m(...) __riscv_vluxseg5ei64_v_f16mf2_tumu(__VA_ARGS__)

#define	vluxseg5ei64_v_f16mf4(...) __riscv_vluxseg5ei64_v_f16mf4(__VA_ARGS__)

#define	vluxseg5ei64_v_f16mf4_m(...) __riscv_vluxseg5ei64_v_f16mf4_tumu(__VA_ARGS__)

#define	vluxseg5ei64_v_f32m1(...) __riscv_vluxseg5ei64_v_f32m1(__VA_ARGS__)

#define	vluxseg5ei64_v_f32m1_m(...) __riscv_vluxseg5ei64_v_f32m1_tumu(__VA_ARGS__)

#define	vluxseg5ei64_v_f32mf2(...) __riscv_vluxseg5ei64_v_f32mf2(__VA_ARGS__)

#define	vluxseg5ei64_v_f32mf2_m(...) __riscv_vluxseg5ei64_v_f32mf2_tumu(__VA_ARGS__)

#define	vluxseg5ei64_v_f64m1(...) __riscv_vluxseg5ei64_v_f64m1(__VA_ARGS__)

#define	vluxseg5ei64_v_f64m1_m(...) __riscv_vluxseg5ei64_v_f64m1_tumu(__VA_ARGS__)

#define	vluxseg5ei64_v_i16m1(...) __riscv_vluxseg5ei64_v_i16m1(__VA_ARGS__)

#define	vluxseg5ei64_v_i16m1_m(...) __riscv_vluxseg5ei64_v_i16m1_tumu(__VA_ARGS__)

#define	vluxseg5ei64_v_i16mf2(...) __riscv_vluxseg5ei64_v_i16mf2(__VA_ARGS__)

#define	vluxseg5ei64_v_i16mf2_m(...) __riscv_vluxseg5ei64_v_i16mf2_tumu(__VA_ARGS__)

#define	vluxseg5ei64_v_i16mf4(...) __riscv_vluxseg5ei64_v_i16mf4(__VA_ARGS__)

#define	vluxseg5ei64_v_i16mf4_m(...) __riscv_vluxseg5ei64_v_i16mf4_tumu(__VA_ARGS__)

#define	vluxseg5ei64_v_i32m1(...) __riscv_vluxseg5ei64_v_i32m1(__VA_ARGS__)

#define	vluxseg5ei64_v_i32m1_m(...) __riscv_vluxseg5ei64_v_i32m1_tumu(__VA_ARGS__)

#define	vluxseg5ei64_v_i32mf2(...) __riscv_vluxseg5ei64_v_i32mf2(__VA_ARGS__)

#define	vluxseg5ei64_v_i32mf2_m(...) __riscv_vluxseg5ei64_v_i32mf2_tumu(__VA_ARGS__)

#define	vluxseg5ei64_v_i64m1(...) __riscv_vluxseg5ei64_v_i64m1(__VA_ARGS__)

#define	vluxseg5ei64_v_i64m1_m(...) __riscv_vluxseg5ei64_v_i64m1_tumu(__VA_ARGS__)

#define	vluxseg5ei64_v_i8m1(...) __riscv_vluxseg5ei64_v_i8m1(__VA_ARGS__)

#define	vluxseg5ei64_v_i8m1_m(...) __riscv_vluxseg5ei64_v_i8m1_tumu(__VA_ARGS__)

#define	vluxseg5ei64_v_i8mf2(...) __riscv_vluxseg5ei64_v_i8mf2(__VA_ARGS__)

#define	vluxseg5ei64_v_i8mf2_m(...) __riscv_vluxseg5ei64_v_i8mf2_tumu(__VA_ARGS__)

#define	vluxseg5ei64_v_i8mf4(...) __riscv_vluxseg5ei64_v_i8mf4(__VA_ARGS__)

#define	vluxseg5ei64_v_i8mf4_m(...) __riscv_vluxseg5ei64_v_i8mf4_tumu(__VA_ARGS__)

#define	vluxseg5ei64_v_i8mf8(...) __riscv_vluxseg5ei64_v_i8mf8(__VA_ARGS__)

#define	vluxseg5ei64_v_i8mf8_m(...) __riscv_vluxseg5ei64_v_i8mf8_tumu(__VA_ARGS__)

#define	vluxseg5ei64_v_u16m1(...) __riscv_vluxseg5ei64_v_u16m1(__VA_ARGS__)

#define	vluxseg5ei64_v_u16m1_m(...) __riscv_vluxseg5ei64_v_u16m1_tumu(__VA_ARGS__)

#define	vluxseg5ei64_v_u16mf2(...) __riscv_vluxseg5ei64_v_u16mf2(__VA_ARGS__)

#define	vluxseg5ei64_v_u16mf2_m(...) __riscv_vluxseg5ei64_v_u16mf2_tumu(__VA_ARGS__)

#define	vluxseg5ei64_v_u16mf4(...) __riscv_vluxseg5ei64_v_u16mf4(__VA_ARGS__)

#define	vluxseg5ei64_v_u16mf4_m(...) __riscv_vluxseg5ei64_v_u16mf4_tumu(__VA_ARGS__)

#define	vluxseg5ei64_v_u32m1(...) __riscv_vluxseg5ei64_v_u32m1(__VA_ARGS__)

#define	vluxseg5ei64_v_u32m1_m(...) __riscv_vluxseg5ei64_v_u32m1_tumu(__VA_ARGS__)

#define	vluxseg5ei64_v_u32mf2(...) __riscv_vluxseg5ei64_v_u32mf2(__VA_ARGS__)

#define	vluxseg5ei64_v_u32mf2_m(...) __riscv_vluxseg5ei64_v_u32mf2_tumu(__VA_ARGS__)

#define	vluxseg5ei64_v_u64m1(...) __riscv_vluxseg5ei64_v_u64m1(__VA_ARGS__)

#define	vluxseg5ei64_v_u64m1_m(...) __riscv_vluxseg5ei64_v_u64m1_tumu(__VA_ARGS__)

#define	vluxseg5ei64_v_u8m1(...) __riscv_vluxseg5ei64_v_u8m1(__VA_ARGS__)

#define	vluxseg5ei64_v_u8m1_m(...) __riscv_vluxseg5ei64_v_u8m1_tumu(__VA_ARGS__)

#define	vluxseg5ei64_v_u8mf2(...) __riscv_vluxseg5ei64_v_u8mf2(__VA_ARGS__)

#define	vluxseg5ei64_v_u8mf2_m(...) __riscv_vluxseg5ei64_v_u8mf2_tumu(__VA_ARGS__)

#define	vluxseg5ei64_v_u8mf4(...) __riscv_vluxseg5ei64_v_u8mf4(__VA_ARGS__)

#define	vluxseg5ei64_v_u8mf4_m(...) __riscv_vluxseg5ei64_v_u8mf4_tumu(__VA_ARGS__)

#define	vluxseg5ei64_v_u8mf8(...) __riscv_vluxseg5ei64_v_u8mf8(__VA_ARGS__)

#define	vluxseg5ei64_v_u8mf8_m(...) __riscv_vluxseg5ei64_v_u8mf8_tumu(__VA_ARGS__)

#define	vluxseg5ei8_v_f16m1(...) __riscv_vluxseg5ei8_v_f16m1(__VA_ARGS__)

#define	vluxseg5ei8_v_f16m1_m(...) __riscv_vluxseg5ei8_v_f16m1_tumu(__VA_ARGS__)

#define	vluxseg5ei8_v_f16mf2(...) __riscv_vluxseg5ei8_v_f16mf2(__VA_ARGS__)

#define	vluxseg5ei8_v_f16mf2_m(...) __riscv_vluxseg5ei8_v_f16mf2_tumu(__VA_ARGS__)

#define	vluxseg5ei8_v_f16mf4(...) __riscv_vluxseg5ei8_v_f16mf4(__VA_ARGS__)

#define	vluxseg5ei8_v_f16mf4_m(...) __riscv_vluxseg5ei8_v_f16mf4_tumu(__VA_ARGS__)

#define	vluxseg5ei8_v_f32m1(...) __riscv_vluxseg5ei8_v_f32m1(__VA_ARGS__)

#define	vluxseg5ei8_v_f32m1_m(...) __riscv_vluxseg5ei8_v_f32m1_tumu(__VA_ARGS__)

#define	vluxseg5ei8_v_f32mf2(...) __riscv_vluxseg5ei8_v_f32mf2(__VA_ARGS__)

#define	vluxseg5ei8_v_f32mf2_m(...) __riscv_vluxseg5ei8_v_f32mf2_tumu(__VA_ARGS__)

#define	vluxseg5ei8_v_f64m1(...) __riscv_vluxseg5ei8_v_f64m1(__VA_ARGS__)

#define	vluxseg5ei8_v_f64m1_m(...) __riscv_vluxseg5ei8_v_f64m1_tumu(__VA_ARGS__)

#define	vluxseg5ei8_v_i16m1(...) __riscv_vluxseg5ei8_v_i16m1(__VA_ARGS__)

#define	vluxseg5ei8_v_i16m1_m(...) __riscv_vluxseg5ei8_v_i16m1_tumu(__VA_ARGS__)

#define	vluxseg5ei8_v_i16mf2(...) __riscv_vluxseg5ei8_v_i16mf2(__VA_ARGS__)

#define	vluxseg5ei8_v_i16mf2_m(...) __riscv_vluxseg5ei8_v_i16mf2_tumu(__VA_ARGS__)

#define	vluxseg5ei8_v_i16mf4(...) __riscv_vluxseg5ei8_v_i16mf4(__VA_ARGS__)

#define	vluxseg5ei8_v_i16mf4_m(...) __riscv_vluxseg5ei8_v_i16mf4_tumu(__VA_ARGS__)

#define	vluxseg5ei8_v_i32m1(...) __riscv_vluxseg5ei8_v_i32m1(__VA_ARGS__)

#define	vluxseg5ei8_v_i32m1_m(...) __riscv_vluxseg5ei8_v_i32m1_tumu(__VA_ARGS__)

#define	vluxseg5ei8_v_i32mf2(...) __riscv_vluxseg5ei8_v_i32mf2(__VA_ARGS__)

#define	vluxseg5ei8_v_i32mf2_m(...) __riscv_vluxseg5ei8_v_i32mf2_tumu(__VA_ARGS__)

#define	vluxseg5ei8_v_i64m1(...) __riscv_vluxseg5ei8_v_i64m1(__VA_ARGS__)

#define	vluxseg5ei8_v_i64m1_m(...) __riscv_vluxseg5ei8_v_i64m1_tumu(__VA_ARGS__)

#define	vluxseg5ei8_v_i8m1(...) __riscv_vluxseg5ei8_v_i8m1(__VA_ARGS__)

#define	vluxseg5ei8_v_i8m1_m(...) __riscv_vluxseg5ei8_v_i8m1_tumu(__VA_ARGS__)

#define	vluxseg5ei8_v_i8mf2(...) __riscv_vluxseg5ei8_v_i8mf2(__VA_ARGS__)

#define	vluxseg5ei8_v_i8mf2_m(...) __riscv_vluxseg5ei8_v_i8mf2_tumu(__VA_ARGS__)

#define	vluxseg5ei8_v_i8mf4(...) __riscv_vluxseg5ei8_v_i8mf4(__VA_ARGS__)

#define	vluxseg5ei8_v_i8mf4_m(...) __riscv_vluxseg5ei8_v_i8mf4_tumu(__VA_ARGS__)

#define	vluxseg5ei8_v_i8mf8(...) __riscv_vluxseg5ei8_v_i8mf8(__VA_ARGS__)

#define	vluxseg5ei8_v_i8mf8_m(...) __riscv_vluxseg5ei8_v_i8mf8_tumu(__VA_ARGS__)

#define	vluxseg5ei8_v_u16m1(...) __riscv_vluxseg5ei8_v_u16m1(__VA_ARGS__)

#define	vluxseg5ei8_v_u16m1_m(...) __riscv_vluxseg5ei8_v_u16m1_tumu(__VA_ARGS__)

#define	vluxseg5ei8_v_u16mf2(...) __riscv_vluxseg5ei8_v_u16mf2(__VA_ARGS__)

#define	vluxseg5ei8_v_u16mf2_m(...) __riscv_vluxseg5ei8_v_u16mf2_tumu(__VA_ARGS__)

#define	vluxseg5ei8_v_u16mf4(...) __riscv_vluxseg5ei8_v_u16mf4(__VA_ARGS__)

#define	vluxseg5ei8_v_u16mf4_m(...) __riscv_vluxseg5ei8_v_u16mf4_tumu(__VA_ARGS__)

#define	vluxseg5ei8_v_u32m1(...) __riscv_vluxseg5ei8_v_u32m1(__VA_ARGS__)

#define	vluxseg5ei8_v_u32m1_m(...) __riscv_vluxseg5ei8_v_u32m1_tumu(__VA_ARGS__)

#define	vluxseg5ei8_v_u32mf2(...) __riscv_vluxseg5ei8_v_u32mf2(__VA_ARGS__)

#define	vluxseg5ei8_v_u32mf2_m(...) __riscv_vluxseg5ei8_v_u32mf2_tumu(__VA_ARGS__)

#define	vluxseg5ei8_v_u64m1(...) __riscv_vluxseg5ei8_v_u64m1(__VA_ARGS__)

#define	vluxseg5ei8_v_u64m1_m(...) __riscv_vluxseg5ei8_v_u64m1_tumu(__VA_ARGS__)

#define	vluxseg5ei8_v_u8m1(...) __riscv_vluxseg5ei8_v_u8m1(__VA_ARGS__)

#define	vluxseg5ei8_v_u8m1_m(...) __riscv_vluxseg5ei8_v_u8m1_tumu(__VA_ARGS__)

#define	vluxseg5ei8_v_u8mf2(...) __riscv_vluxseg5ei8_v_u8mf2(__VA_ARGS__)

#define	vluxseg5ei8_v_u8mf2_m(...) __riscv_vluxseg5ei8_v_u8mf2_tumu(__VA_ARGS__)

#define	vluxseg5ei8_v_u8mf4(...) __riscv_vluxseg5ei8_v_u8mf4(__VA_ARGS__)

#define	vluxseg5ei8_v_u8mf4_m(...) __riscv_vluxseg5ei8_v_u8mf4_tumu(__VA_ARGS__)

#define	vluxseg5ei8_v_u8mf8(...) __riscv_vluxseg5ei8_v_u8mf8(__VA_ARGS__)

#define	vluxseg5ei8_v_u8mf8_m(...) __riscv_vluxseg5ei8_v_u8mf8_tumu(__VA_ARGS__)

#define	vluxseg6ei16_v_f16m1(...) __riscv_vluxseg6ei16_v_f16m1(__VA_ARGS__)

#define	vluxseg6ei16_v_f16m1_m(...) __riscv_vluxseg6ei16_v_f16m1_tumu(__VA_ARGS__)

#define	vluxseg6ei16_v_f16mf2(...) __riscv_vluxseg6ei16_v_f16mf2(__VA_ARGS__)

#define	vluxseg6ei16_v_f16mf2_m(...) __riscv_vluxseg6ei16_v_f16mf2_tumu(__VA_ARGS__)

#define	vluxseg6ei16_v_f16mf4(...) __riscv_vluxseg6ei16_v_f16mf4(__VA_ARGS__)

#define	vluxseg6ei16_v_f16mf4_m(...) __riscv_vluxseg6ei16_v_f16mf4_tumu(__VA_ARGS__)

#define	vluxseg6ei16_v_f32m1(...) __riscv_vluxseg6ei16_v_f32m1(__VA_ARGS__)

#define	vluxseg6ei16_v_f32m1_m(...) __riscv_vluxseg6ei16_v_f32m1_tumu(__VA_ARGS__)

#define	vluxseg6ei16_v_f32mf2(...) __riscv_vluxseg6ei16_v_f32mf2(__VA_ARGS__)

#define	vluxseg6ei16_v_f32mf2_m(...) __riscv_vluxseg6ei16_v_f32mf2_tumu(__VA_ARGS__)

#define	vluxseg6ei16_v_f64m1(...) __riscv_vluxseg6ei16_v_f64m1(__VA_ARGS__)

#define	vluxseg6ei16_v_f64m1_m(...) __riscv_vluxseg6ei16_v_f64m1_tumu(__VA_ARGS__)

#define	vluxseg6ei16_v_i16m1(...) __riscv_vluxseg6ei16_v_i16m1(__VA_ARGS__)

#define	vluxseg6ei16_v_i16m1_m(...) __riscv_vluxseg6ei16_v_i16m1_tumu(__VA_ARGS__)

#define	vluxseg6ei16_v_i16mf2(...) __riscv_vluxseg6ei16_v_i16mf2(__VA_ARGS__)

#define	vluxseg6ei16_v_i16mf2_m(...) __riscv_vluxseg6ei16_v_i16mf2_tumu(__VA_ARGS__)

#define	vluxseg6ei16_v_i16mf4(...) __riscv_vluxseg6ei16_v_i16mf4(__VA_ARGS__)

#define	vluxseg6ei16_v_i16mf4_m(...) __riscv_vluxseg6ei16_v_i16mf4_tumu(__VA_ARGS__)

#define	vluxseg6ei16_v_i32m1(...) __riscv_vluxseg6ei16_v_i32m1(__VA_ARGS__)

#define	vluxseg6ei16_v_i32m1_m(...) __riscv_vluxseg6ei16_v_i32m1_tumu(__VA_ARGS__)

#define	vluxseg6ei16_v_i32mf2(...) __riscv_vluxseg6ei16_v_i32mf2(__VA_ARGS__)

#define	vluxseg6ei16_v_i32mf2_m(...) __riscv_vluxseg6ei16_v_i32mf2_tumu(__VA_ARGS__)

#define	vluxseg6ei16_v_i64m1(...) __riscv_vluxseg6ei16_v_i64m1(__VA_ARGS__)

#define	vluxseg6ei16_v_i64m1_m(...) __riscv_vluxseg6ei16_v_i64m1_tumu(__VA_ARGS__)

#define	vluxseg6ei16_v_i8m1(...) __riscv_vluxseg6ei16_v_i8m1(__VA_ARGS__)

#define	vluxseg6ei16_v_i8m1_m(...) __riscv_vluxseg6ei16_v_i8m1_tumu(__VA_ARGS__)

#define	vluxseg6ei16_v_i8mf2(...) __riscv_vluxseg6ei16_v_i8mf2(__VA_ARGS__)

#define	vluxseg6ei16_v_i8mf2_m(...) __riscv_vluxseg6ei16_v_i8mf2_tumu(__VA_ARGS__)

#define	vluxseg6ei16_v_i8mf4(...) __riscv_vluxseg6ei16_v_i8mf4(__VA_ARGS__)

#define	vluxseg6ei16_v_i8mf4_m(...) __riscv_vluxseg6ei16_v_i8mf4_tumu(__VA_ARGS__)

#define	vluxseg6ei16_v_i8mf8(...) __riscv_vluxseg6ei16_v_i8mf8(__VA_ARGS__)

#define	vluxseg6ei16_v_i8mf8_m(...) __riscv_vluxseg6ei16_v_i8mf8_tumu(__VA_ARGS__)

#define	vluxseg6ei16_v_u16m1(...) __riscv_vluxseg6ei16_v_u16m1(__VA_ARGS__)

#define	vluxseg6ei16_v_u16m1_m(...) __riscv_vluxseg6ei16_v_u16m1_tumu(__VA_ARGS__)

#define	vluxseg6ei16_v_u16mf2(...) __riscv_vluxseg6ei16_v_u16mf2(__VA_ARGS__)

#define	vluxseg6ei16_v_u16mf2_m(...) __riscv_vluxseg6ei16_v_u16mf2_tumu(__VA_ARGS__)

#define	vluxseg6ei16_v_u16mf4(...) __riscv_vluxseg6ei16_v_u16mf4(__VA_ARGS__)

#define	vluxseg6ei16_v_u16mf4_m(...) __riscv_vluxseg6ei16_v_u16mf4_tumu(__VA_ARGS__)

#define	vluxseg6ei16_v_u32m1(...) __riscv_vluxseg6ei16_v_u32m1(__VA_ARGS__)

#define	vluxseg6ei16_v_u32m1_m(...) __riscv_vluxseg6ei16_v_u32m1_tumu(__VA_ARGS__)

#define	vluxseg6ei16_v_u32mf2(...) __riscv_vluxseg6ei16_v_u32mf2(__VA_ARGS__)

#define	vluxseg6ei16_v_u32mf2_m(...) __riscv_vluxseg6ei16_v_u32mf2_tumu(__VA_ARGS__)

#define	vluxseg6ei16_v_u64m1(...) __riscv_vluxseg6ei16_v_u64m1(__VA_ARGS__)

#define	vluxseg6ei16_v_u64m1_m(...) __riscv_vluxseg6ei16_v_u64m1_tumu(__VA_ARGS__)

#define	vluxseg6ei16_v_u8m1(...) __riscv_vluxseg6ei16_v_u8m1(__VA_ARGS__)

#define	vluxseg6ei16_v_u8m1_m(...) __riscv_vluxseg6ei16_v_u8m1_tumu(__VA_ARGS__)

#define	vluxseg6ei16_v_u8mf2(...) __riscv_vluxseg6ei16_v_u8mf2(__VA_ARGS__)

#define	vluxseg6ei16_v_u8mf2_m(...) __riscv_vluxseg6ei16_v_u8mf2_tumu(__VA_ARGS__)

#define	vluxseg6ei16_v_u8mf4(...) __riscv_vluxseg6ei16_v_u8mf4(__VA_ARGS__)

#define	vluxseg6ei16_v_u8mf4_m(...) __riscv_vluxseg6ei16_v_u8mf4_tumu(__VA_ARGS__)

#define	vluxseg6ei16_v_u8mf8(...) __riscv_vluxseg6ei16_v_u8mf8(__VA_ARGS__)

#define	vluxseg6ei16_v_u8mf8_m(...) __riscv_vluxseg6ei16_v_u8mf8_tumu(__VA_ARGS__)

#define	vluxseg6ei32_v_f16m1(...) __riscv_vluxseg6ei32_v_f16m1(__VA_ARGS__)

#define	vluxseg6ei32_v_f16m1_m(...) __riscv_vluxseg6ei32_v_f16m1_tumu(__VA_ARGS__)

#define	vluxseg6ei32_v_f16mf2(...) __riscv_vluxseg6ei32_v_f16mf2(__VA_ARGS__)

#define	vluxseg6ei32_v_f16mf2_m(...) __riscv_vluxseg6ei32_v_f16mf2_tumu(__VA_ARGS__)

#define	vluxseg6ei32_v_f16mf4(...) __riscv_vluxseg6ei32_v_f16mf4(__VA_ARGS__)

#define	vluxseg6ei32_v_f16mf4_m(...) __riscv_vluxseg6ei32_v_f16mf4_tumu(__VA_ARGS__)

#define	vluxseg6ei32_v_f32m1(...) __riscv_vluxseg6ei32_v_f32m1(__VA_ARGS__)

#define	vluxseg6ei32_v_f32m1_m(...) __riscv_vluxseg6ei32_v_f32m1_tumu(__VA_ARGS__)

#define	vluxseg6ei32_v_f32mf2(...) __riscv_vluxseg6ei32_v_f32mf2(__VA_ARGS__)

#define	vluxseg6ei32_v_f32mf2_m(...) __riscv_vluxseg6ei32_v_f32mf2_tumu(__VA_ARGS__)

#define	vluxseg6ei32_v_f64m1(...) __riscv_vluxseg6ei32_v_f64m1(__VA_ARGS__)

#define	vluxseg6ei32_v_f64m1_m(...) __riscv_vluxseg6ei32_v_f64m1_tumu(__VA_ARGS__)

#define	vluxseg6ei32_v_i16m1(...) __riscv_vluxseg6ei32_v_i16m1(__VA_ARGS__)

#define	vluxseg6ei32_v_i16m1_m(...) __riscv_vluxseg6ei32_v_i16m1_tumu(__VA_ARGS__)

#define	vluxseg6ei32_v_i16mf2(...) __riscv_vluxseg6ei32_v_i16mf2(__VA_ARGS__)

#define	vluxseg6ei32_v_i16mf2_m(...) __riscv_vluxseg6ei32_v_i16mf2_tumu(__VA_ARGS__)

#define	vluxseg6ei32_v_i16mf4(...) __riscv_vluxseg6ei32_v_i16mf4(__VA_ARGS__)

#define	vluxseg6ei32_v_i16mf4_m(...) __riscv_vluxseg6ei32_v_i16mf4_tumu(__VA_ARGS__)

#define	vluxseg6ei32_v_i32m1(...) __riscv_vluxseg6ei32_v_i32m1(__VA_ARGS__)

#define	vluxseg6ei32_v_i32m1_m(...) __riscv_vluxseg6ei32_v_i32m1_tumu(__VA_ARGS__)

#define	vluxseg6ei32_v_i32mf2(...) __riscv_vluxseg6ei32_v_i32mf2(__VA_ARGS__)

#define	vluxseg6ei32_v_i32mf2_m(...) __riscv_vluxseg6ei32_v_i32mf2_tumu(__VA_ARGS__)

#define	vluxseg6ei32_v_i64m1(...) __riscv_vluxseg6ei32_v_i64m1(__VA_ARGS__)

#define	vluxseg6ei32_v_i64m1_m(...) __riscv_vluxseg6ei32_v_i64m1_tumu(__VA_ARGS__)

#define	vluxseg6ei32_v_i8m1(...) __riscv_vluxseg6ei32_v_i8m1(__VA_ARGS__)

#define	vluxseg6ei32_v_i8m1_m(...) __riscv_vluxseg6ei32_v_i8m1_tumu(__VA_ARGS__)

#define	vluxseg6ei32_v_i8mf2(...) __riscv_vluxseg6ei32_v_i8mf2(__VA_ARGS__)

#define	vluxseg6ei32_v_i8mf2_m(...) __riscv_vluxseg6ei32_v_i8mf2_tumu(__VA_ARGS__)

#define	vluxseg6ei32_v_i8mf4(...) __riscv_vluxseg6ei32_v_i8mf4(__VA_ARGS__)

#define	vluxseg6ei32_v_i8mf4_m(...) __riscv_vluxseg6ei32_v_i8mf4_tumu(__VA_ARGS__)

#define	vluxseg6ei32_v_i8mf8(...) __riscv_vluxseg6ei32_v_i8mf8(__VA_ARGS__)

#define	vluxseg6ei32_v_i8mf8_m(...) __riscv_vluxseg6ei32_v_i8mf8_tumu(__VA_ARGS__)

#define	vluxseg6ei32_v_u16m1(...) __riscv_vluxseg6ei32_v_u16m1(__VA_ARGS__)

#define	vluxseg6ei32_v_u16m1_m(...) __riscv_vluxseg6ei32_v_u16m1_tumu(__VA_ARGS__)

#define	vluxseg6ei32_v_u16mf2(...) __riscv_vluxseg6ei32_v_u16mf2(__VA_ARGS__)

#define	vluxseg6ei32_v_u16mf2_m(...) __riscv_vluxseg6ei32_v_u16mf2_tumu(__VA_ARGS__)

#define	vluxseg6ei32_v_u16mf4(...) __riscv_vluxseg6ei32_v_u16mf4(__VA_ARGS__)

#define	vluxseg6ei32_v_u16mf4_m(...) __riscv_vluxseg6ei32_v_u16mf4_tumu(__VA_ARGS__)

#define	vluxseg6ei32_v_u32m1(...) __riscv_vluxseg6ei32_v_u32m1(__VA_ARGS__)

#define	vluxseg6ei32_v_u32m1_m(...) __riscv_vluxseg6ei32_v_u32m1_tumu(__VA_ARGS__)

#define	vluxseg6ei32_v_u32mf2(...) __riscv_vluxseg6ei32_v_u32mf2(__VA_ARGS__)

#define	vluxseg6ei32_v_u32mf2_m(...) __riscv_vluxseg6ei32_v_u32mf2_tumu(__VA_ARGS__)

#define	vluxseg6ei32_v_u64m1(...) __riscv_vluxseg6ei32_v_u64m1(__VA_ARGS__)

#define	vluxseg6ei32_v_u64m1_m(...) __riscv_vluxseg6ei32_v_u64m1_tumu(__VA_ARGS__)

#define	vluxseg6ei32_v_u8m1(...) __riscv_vluxseg6ei32_v_u8m1(__VA_ARGS__)

#define	vluxseg6ei32_v_u8m1_m(...) __riscv_vluxseg6ei32_v_u8m1_tumu(__VA_ARGS__)

#define	vluxseg6ei32_v_u8mf2(...) __riscv_vluxseg6ei32_v_u8mf2(__VA_ARGS__)

#define	vluxseg6ei32_v_u8mf2_m(...) __riscv_vluxseg6ei32_v_u8mf2_tumu(__VA_ARGS__)

#define	vluxseg6ei32_v_u8mf4(...) __riscv_vluxseg6ei32_v_u8mf4(__VA_ARGS__)

#define	vluxseg6ei32_v_u8mf4_m(...) __riscv_vluxseg6ei32_v_u8mf4_tumu(__VA_ARGS__)

#define	vluxseg6ei32_v_u8mf8(...) __riscv_vluxseg6ei32_v_u8mf8(__VA_ARGS__)

#define	vluxseg6ei32_v_u8mf8_m(...) __riscv_vluxseg6ei32_v_u8mf8_tumu(__VA_ARGS__)

#define	vluxseg6ei64_v_f16m1(...) __riscv_vluxseg6ei64_v_f16m1(__VA_ARGS__)

#define	vluxseg6ei64_v_f16m1_m(...) __riscv_vluxseg6ei64_v_f16m1_tumu(__VA_ARGS__)

#define	vluxseg6ei64_v_f16mf2(...) __riscv_vluxseg6ei64_v_f16mf2(__VA_ARGS__)

#define	vluxseg6ei64_v_f16mf2_m(...) __riscv_vluxseg6ei64_v_f16mf2_tumu(__VA_ARGS__)

#define	vluxseg6ei64_v_f16mf4(...) __riscv_vluxseg6ei64_v_f16mf4(__VA_ARGS__)

#define	vluxseg6ei64_v_f16mf4_m(...) __riscv_vluxseg6ei64_v_f16mf4_tumu(__VA_ARGS__)

#define	vluxseg6ei64_v_f32m1(...) __riscv_vluxseg6ei64_v_f32m1(__VA_ARGS__)

#define	vluxseg6ei64_v_f32m1_m(...) __riscv_vluxseg6ei64_v_f32m1_tumu(__VA_ARGS__)

#define	vluxseg6ei64_v_f32mf2(...) __riscv_vluxseg6ei64_v_f32mf2(__VA_ARGS__)

#define	vluxseg6ei64_v_f32mf2_m(...) __riscv_vluxseg6ei64_v_f32mf2_tumu(__VA_ARGS__)

#define	vluxseg6ei64_v_f64m1(...) __riscv_vluxseg6ei64_v_f64m1(__VA_ARGS__)

#define	vluxseg6ei64_v_f64m1_m(...) __riscv_vluxseg6ei64_v_f64m1_tumu(__VA_ARGS__)

#define	vluxseg6ei64_v_i16m1(...) __riscv_vluxseg6ei64_v_i16m1(__VA_ARGS__)

#define	vluxseg6ei64_v_i16m1_m(...) __riscv_vluxseg6ei64_v_i16m1_tumu(__VA_ARGS__)

#define	vluxseg6ei64_v_i16mf2(...) __riscv_vluxseg6ei64_v_i16mf2(__VA_ARGS__)

#define	vluxseg6ei64_v_i16mf2_m(...) __riscv_vluxseg6ei64_v_i16mf2_tumu(__VA_ARGS__)

#define	vluxseg6ei64_v_i16mf4(...) __riscv_vluxseg6ei64_v_i16mf4(__VA_ARGS__)

#define	vluxseg6ei64_v_i16mf4_m(...) __riscv_vluxseg6ei64_v_i16mf4_tumu(__VA_ARGS__)

#define	vluxseg6ei64_v_i32m1(...) __riscv_vluxseg6ei64_v_i32m1(__VA_ARGS__)

#define	vluxseg6ei64_v_i32m1_m(...) __riscv_vluxseg6ei64_v_i32m1_tumu(__VA_ARGS__)

#define	vluxseg6ei64_v_i32mf2(...) __riscv_vluxseg6ei64_v_i32mf2(__VA_ARGS__)

#define	vluxseg6ei64_v_i32mf2_m(...) __riscv_vluxseg6ei64_v_i32mf2_tumu(__VA_ARGS__)

#define	vluxseg6ei64_v_i64m1(...) __riscv_vluxseg6ei64_v_i64m1(__VA_ARGS__)

#define	vluxseg6ei64_v_i64m1_m(...) __riscv_vluxseg6ei64_v_i64m1_tumu(__VA_ARGS__)

#define	vluxseg6ei64_v_i8m1(...) __riscv_vluxseg6ei64_v_i8m1(__VA_ARGS__)

#define	vluxseg6ei64_v_i8m1_m(...) __riscv_vluxseg6ei64_v_i8m1_tumu(__VA_ARGS__)

#define	vluxseg6ei64_v_i8mf2(...) __riscv_vluxseg6ei64_v_i8mf2(__VA_ARGS__)

#define	vluxseg6ei64_v_i8mf2_m(...) __riscv_vluxseg6ei64_v_i8mf2_tumu(__VA_ARGS__)

#define	vluxseg6ei64_v_i8mf4(...) __riscv_vluxseg6ei64_v_i8mf4(__VA_ARGS__)

#define	vluxseg6ei64_v_i8mf4_m(...) __riscv_vluxseg6ei64_v_i8mf4_tumu(__VA_ARGS__)

#define	vluxseg6ei64_v_i8mf8(...) __riscv_vluxseg6ei64_v_i8mf8(__VA_ARGS__)

#define	vluxseg6ei64_v_i8mf8_m(...) __riscv_vluxseg6ei64_v_i8mf8_tumu(__VA_ARGS__)

#define	vluxseg6ei64_v_u16m1(...) __riscv_vluxseg6ei64_v_u16m1(__VA_ARGS__)

#define	vluxseg6ei64_v_u16m1_m(...) __riscv_vluxseg6ei64_v_u16m1_tumu(__VA_ARGS__)

#define	vluxseg6ei64_v_u16mf2(...) __riscv_vluxseg6ei64_v_u16mf2(__VA_ARGS__)

#define	vluxseg6ei64_v_u16mf2_m(...) __riscv_vluxseg6ei64_v_u16mf2_tumu(__VA_ARGS__)

#define	vluxseg6ei64_v_u16mf4(...) __riscv_vluxseg6ei64_v_u16mf4(__VA_ARGS__)

#define	vluxseg6ei64_v_u16mf4_m(...) __riscv_vluxseg6ei64_v_u16mf4_tumu(__VA_ARGS__)

#define	vluxseg6ei64_v_u32m1(...) __riscv_vluxseg6ei64_v_u32m1(__VA_ARGS__)

#define	vluxseg6ei64_v_u32m1_m(...) __riscv_vluxseg6ei64_v_u32m1_tumu(__VA_ARGS__)

#define	vluxseg6ei64_v_u32mf2(...) __riscv_vluxseg6ei64_v_u32mf2(__VA_ARGS__)

#define	vluxseg6ei64_v_u32mf2_m(...) __riscv_vluxseg6ei64_v_u32mf2_tumu(__VA_ARGS__)

#define	vluxseg6ei64_v_u64m1(...) __riscv_vluxseg6ei64_v_u64m1(__VA_ARGS__)

#define	vluxseg6ei64_v_u64m1_m(...) __riscv_vluxseg6ei64_v_u64m1_tumu(__VA_ARGS__)

#define	vluxseg6ei64_v_u8m1(...) __riscv_vluxseg6ei64_v_u8m1(__VA_ARGS__)

#define	vluxseg6ei64_v_u8m1_m(...) __riscv_vluxseg6ei64_v_u8m1_tumu(__VA_ARGS__)

#define	vluxseg6ei64_v_u8mf2(...) __riscv_vluxseg6ei64_v_u8mf2(__VA_ARGS__)

#define	vluxseg6ei64_v_u8mf2_m(...) __riscv_vluxseg6ei64_v_u8mf2_tumu(__VA_ARGS__)

#define	vluxseg6ei64_v_u8mf4(...) __riscv_vluxseg6ei64_v_u8mf4(__VA_ARGS__)

#define	vluxseg6ei64_v_u8mf4_m(...) __riscv_vluxseg6ei64_v_u8mf4_tumu(__VA_ARGS__)

#define	vluxseg6ei64_v_u8mf8(...) __riscv_vluxseg6ei64_v_u8mf8(__VA_ARGS__)

#define	vluxseg6ei64_v_u8mf8_m(...) __riscv_vluxseg6ei64_v_u8mf8_tumu(__VA_ARGS__)

#define	vluxseg6ei8_v_f16m1(...) __riscv_vluxseg6ei8_v_f16m1(__VA_ARGS__)

#define	vluxseg6ei8_v_f16m1_m(...) __riscv_vluxseg6ei8_v_f16m1_tumu(__VA_ARGS__)

#define	vluxseg6ei8_v_f16mf2(...) __riscv_vluxseg6ei8_v_f16mf2(__VA_ARGS__)

#define	vluxseg6ei8_v_f16mf2_m(...) __riscv_vluxseg6ei8_v_f16mf2_tumu(__VA_ARGS__)

#define	vluxseg6ei8_v_f16mf4(...) __riscv_vluxseg6ei8_v_f16mf4(__VA_ARGS__)

#define	vluxseg6ei8_v_f16mf4_m(...) __riscv_vluxseg6ei8_v_f16mf4_tumu(__VA_ARGS__)

#define	vluxseg6ei8_v_f32m1(...) __riscv_vluxseg6ei8_v_f32m1(__VA_ARGS__)

#define	vluxseg6ei8_v_f32m1_m(...) __riscv_vluxseg6ei8_v_f32m1_tumu(__VA_ARGS__)

#define	vluxseg6ei8_v_f32mf2(...) __riscv_vluxseg6ei8_v_f32mf2(__VA_ARGS__)

#define	vluxseg6ei8_v_f32mf2_m(...) __riscv_vluxseg6ei8_v_f32mf2_tumu(__VA_ARGS__)

#define	vluxseg6ei8_v_f64m1(...) __riscv_vluxseg6ei8_v_f64m1(__VA_ARGS__)

#define	vluxseg6ei8_v_f64m1_m(...) __riscv_vluxseg6ei8_v_f64m1_tumu(__VA_ARGS__)

#define	vluxseg6ei8_v_i16m1(...) __riscv_vluxseg6ei8_v_i16m1(__VA_ARGS__)

#define	vluxseg6ei8_v_i16m1_m(...) __riscv_vluxseg6ei8_v_i16m1_tumu(__VA_ARGS__)

#define	vluxseg6ei8_v_i16mf2(...) __riscv_vluxseg6ei8_v_i16mf2(__VA_ARGS__)

#define	vluxseg6ei8_v_i16mf2_m(...) __riscv_vluxseg6ei8_v_i16mf2_tumu(__VA_ARGS__)

#define	vluxseg6ei8_v_i16mf4(...) __riscv_vluxseg6ei8_v_i16mf4(__VA_ARGS__)

#define	vluxseg6ei8_v_i16mf4_m(...) __riscv_vluxseg6ei8_v_i16mf4_tumu(__VA_ARGS__)

#define	vluxseg6ei8_v_i32m1(...) __riscv_vluxseg6ei8_v_i32m1(__VA_ARGS__)

#define	vluxseg6ei8_v_i32m1_m(...) __riscv_vluxseg6ei8_v_i32m1_tumu(__VA_ARGS__)

#define	vluxseg6ei8_v_i32mf2(...) __riscv_vluxseg6ei8_v_i32mf2(__VA_ARGS__)

#define	vluxseg6ei8_v_i32mf2_m(...) __riscv_vluxseg6ei8_v_i32mf2_tumu(__VA_ARGS__)

#define	vluxseg6ei8_v_i64m1(...) __riscv_vluxseg6ei8_v_i64m1(__VA_ARGS__)

#define	vluxseg6ei8_v_i64m1_m(...) __riscv_vluxseg6ei8_v_i64m1_tumu(__VA_ARGS__)

#define	vluxseg6ei8_v_i8m1(...) __riscv_vluxseg6ei8_v_i8m1(__VA_ARGS__)

#define	vluxseg6ei8_v_i8m1_m(...) __riscv_vluxseg6ei8_v_i8m1_tumu(__VA_ARGS__)

#define	vluxseg6ei8_v_i8mf2(...) __riscv_vluxseg6ei8_v_i8mf2(__VA_ARGS__)

#define	vluxseg6ei8_v_i8mf2_m(...) __riscv_vluxseg6ei8_v_i8mf2_tumu(__VA_ARGS__)

#define	vluxseg6ei8_v_i8mf4(...) __riscv_vluxseg6ei8_v_i8mf4(__VA_ARGS__)

#define	vluxseg6ei8_v_i8mf4_m(...) __riscv_vluxseg6ei8_v_i8mf4_tumu(__VA_ARGS__)

#define	vluxseg6ei8_v_i8mf8(...) __riscv_vluxseg6ei8_v_i8mf8(__VA_ARGS__)

#define	vluxseg6ei8_v_i8mf8_m(...) __riscv_vluxseg6ei8_v_i8mf8_tumu(__VA_ARGS__)

#define	vluxseg6ei8_v_u16m1(...) __riscv_vluxseg6ei8_v_u16m1(__VA_ARGS__)

#define	vluxseg6ei8_v_u16m1_m(...) __riscv_vluxseg6ei8_v_u16m1_tumu(__VA_ARGS__)

#define	vluxseg6ei8_v_u16mf2(...) __riscv_vluxseg6ei8_v_u16mf2(__VA_ARGS__)

#define	vluxseg6ei8_v_u16mf2_m(...) __riscv_vluxseg6ei8_v_u16mf2_tumu(__VA_ARGS__)

#define	vluxseg6ei8_v_u16mf4(...) __riscv_vluxseg6ei8_v_u16mf4(__VA_ARGS__)

#define	vluxseg6ei8_v_u16mf4_m(...) __riscv_vluxseg6ei8_v_u16mf4_tumu(__VA_ARGS__)

#define	vluxseg6ei8_v_u32m1(...) __riscv_vluxseg6ei8_v_u32m1(__VA_ARGS__)

#define	vluxseg6ei8_v_u32m1_m(...) __riscv_vluxseg6ei8_v_u32m1_tumu(__VA_ARGS__)

#define	vluxseg6ei8_v_u32mf2(...) __riscv_vluxseg6ei8_v_u32mf2(__VA_ARGS__)

#define	vluxseg6ei8_v_u32mf2_m(...) __riscv_vluxseg6ei8_v_u32mf2_tumu(__VA_ARGS__)

#define	vluxseg6ei8_v_u64m1(...) __riscv_vluxseg6ei8_v_u64m1(__VA_ARGS__)

#define	vluxseg6ei8_v_u64m1_m(...) __riscv_vluxseg6ei8_v_u64m1_tumu(__VA_ARGS__)

#define	vluxseg6ei8_v_u8m1(...) __riscv_vluxseg6ei8_v_u8m1(__VA_ARGS__)

#define	vluxseg6ei8_v_u8m1_m(...) __riscv_vluxseg6ei8_v_u8m1_tumu(__VA_ARGS__)

#define	vluxseg6ei8_v_u8mf2(...) __riscv_vluxseg6ei8_v_u8mf2(__VA_ARGS__)

#define	vluxseg6ei8_v_u8mf2_m(...) __riscv_vluxseg6ei8_v_u8mf2_tumu(__VA_ARGS__)

#define	vluxseg6ei8_v_u8mf4(...) __riscv_vluxseg6ei8_v_u8mf4(__VA_ARGS__)

#define	vluxseg6ei8_v_u8mf4_m(...) __riscv_vluxseg6ei8_v_u8mf4_tumu(__VA_ARGS__)

#define	vluxseg6ei8_v_u8mf8(...) __riscv_vluxseg6ei8_v_u8mf8(__VA_ARGS__)

#define	vluxseg6ei8_v_u8mf8_m(...) __riscv_vluxseg6ei8_v_u8mf8_tumu(__VA_ARGS__)

#define	vluxseg7ei16_v_f16m1(...) __riscv_vluxseg7ei16_v_f16m1(__VA_ARGS__)

#define	vluxseg7ei16_v_f16m1_m(...) __riscv_vluxseg7ei16_v_f16m1_tumu(__VA_ARGS__)

#define	vluxseg7ei16_v_f16mf2(...) __riscv_vluxseg7ei16_v_f16mf2(__VA_ARGS__)

#define	vluxseg7ei16_v_f16mf2_m(...) __riscv_vluxseg7ei16_v_f16mf2_tumu(__VA_ARGS__)

#define	vluxseg7ei16_v_f16mf4(...) __riscv_vluxseg7ei16_v_f16mf4(__VA_ARGS__)

#define	vluxseg7ei16_v_f16mf4_m(...) __riscv_vluxseg7ei16_v_f16mf4_tumu(__VA_ARGS__)

#define	vluxseg7ei16_v_f32m1(...) __riscv_vluxseg7ei16_v_f32m1(__VA_ARGS__)

#define	vluxseg7ei16_v_f32m1_m(...) __riscv_vluxseg7ei16_v_f32m1_tumu(__VA_ARGS__)

#define	vluxseg7ei16_v_f32mf2(...) __riscv_vluxseg7ei16_v_f32mf2(__VA_ARGS__)

#define	vluxseg7ei16_v_f32mf2_m(...) __riscv_vluxseg7ei16_v_f32mf2_tumu(__VA_ARGS__)

#define	vluxseg7ei16_v_f64m1(...) __riscv_vluxseg7ei16_v_f64m1(__VA_ARGS__)

#define	vluxseg7ei16_v_f64m1_m(...) __riscv_vluxseg7ei16_v_f64m1_tumu(__VA_ARGS__)

#define	vluxseg7ei16_v_i16m1(...) __riscv_vluxseg7ei16_v_i16m1(__VA_ARGS__)

#define	vluxseg7ei16_v_i16m1_m(...) __riscv_vluxseg7ei16_v_i16m1_tumu(__VA_ARGS__)

#define	vluxseg7ei16_v_i16mf2(...) __riscv_vluxseg7ei16_v_i16mf2(__VA_ARGS__)

#define	vluxseg7ei16_v_i16mf2_m(...) __riscv_vluxseg7ei16_v_i16mf2_tumu(__VA_ARGS__)

#define	vluxseg7ei16_v_i16mf4(...) __riscv_vluxseg7ei16_v_i16mf4(__VA_ARGS__)

#define	vluxseg7ei16_v_i16mf4_m(...) __riscv_vluxseg7ei16_v_i16mf4_tumu(__VA_ARGS__)

#define	vluxseg7ei16_v_i32m1(...) __riscv_vluxseg7ei16_v_i32m1(__VA_ARGS__)

#define	vluxseg7ei16_v_i32m1_m(...) __riscv_vluxseg7ei16_v_i32m1_tumu(__VA_ARGS__)

#define	vluxseg7ei16_v_i32mf2(...) __riscv_vluxseg7ei16_v_i32mf2(__VA_ARGS__)

#define	vluxseg7ei16_v_i32mf2_m(...) __riscv_vluxseg7ei16_v_i32mf2_tumu(__VA_ARGS__)

#define	vluxseg7ei16_v_i64m1(...) __riscv_vluxseg7ei16_v_i64m1(__VA_ARGS__)

#define	vluxseg7ei16_v_i64m1_m(...) __riscv_vluxseg7ei16_v_i64m1_tumu(__VA_ARGS__)

#define	vluxseg7ei16_v_i8m1(...) __riscv_vluxseg7ei16_v_i8m1(__VA_ARGS__)

#define	vluxseg7ei16_v_i8m1_m(...) __riscv_vluxseg7ei16_v_i8m1_tumu(__VA_ARGS__)

#define	vluxseg7ei16_v_i8mf2(...) __riscv_vluxseg7ei16_v_i8mf2(__VA_ARGS__)

#define	vluxseg7ei16_v_i8mf2_m(...) __riscv_vluxseg7ei16_v_i8mf2_tumu(__VA_ARGS__)

#define	vluxseg7ei16_v_i8mf4(...) __riscv_vluxseg7ei16_v_i8mf4(__VA_ARGS__)

#define	vluxseg7ei16_v_i8mf4_m(...) __riscv_vluxseg7ei16_v_i8mf4_tumu(__VA_ARGS__)

#define	vluxseg7ei16_v_i8mf8(...) __riscv_vluxseg7ei16_v_i8mf8(__VA_ARGS__)

#define	vluxseg7ei16_v_i8mf8_m(...) __riscv_vluxseg7ei16_v_i8mf8_tumu(__VA_ARGS__)

#define	vluxseg7ei16_v_u16m1(...) __riscv_vluxseg7ei16_v_u16m1(__VA_ARGS__)

#define	vluxseg7ei16_v_u16m1_m(...) __riscv_vluxseg7ei16_v_u16m1_tumu(__VA_ARGS__)

#define	vluxseg7ei16_v_u16mf2(...) __riscv_vluxseg7ei16_v_u16mf2(__VA_ARGS__)

#define	vluxseg7ei16_v_u16mf2_m(...) __riscv_vluxseg7ei16_v_u16mf2_tumu(__VA_ARGS__)

#define	vluxseg7ei16_v_u16mf4(...) __riscv_vluxseg7ei16_v_u16mf4(__VA_ARGS__)

#define	vluxseg7ei16_v_u16mf4_m(...) __riscv_vluxseg7ei16_v_u16mf4_tumu(__VA_ARGS__)

#define	vluxseg7ei16_v_u32m1(...) __riscv_vluxseg7ei16_v_u32m1(__VA_ARGS__)

#define	vluxseg7ei16_v_u32m1_m(...) __riscv_vluxseg7ei16_v_u32m1_tumu(__VA_ARGS__)

#define	vluxseg7ei16_v_u32mf2(...) __riscv_vluxseg7ei16_v_u32mf2(__VA_ARGS__)

#define	vluxseg7ei16_v_u32mf2_m(...) __riscv_vluxseg7ei16_v_u32mf2_tumu(__VA_ARGS__)

#define	vluxseg7ei16_v_u64m1(...) __riscv_vluxseg7ei16_v_u64m1(__VA_ARGS__)

#define	vluxseg7ei16_v_u64m1_m(...) __riscv_vluxseg7ei16_v_u64m1_tumu(__VA_ARGS__)

#define	vluxseg7ei16_v_u8m1(...) __riscv_vluxseg7ei16_v_u8m1(__VA_ARGS__)

#define	vluxseg7ei16_v_u8m1_m(...) __riscv_vluxseg7ei16_v_u8m1_tumu(__VA_ARGS__)

#define	vluxseg7ei16_v_u8mf2(...) __riscv_vluxseg7ei16_v_u8mf2(__VA_ARGS__)

#define	vluxseg7ei16_v_u8mf2_m(...) __riscv_vluxseg7ei16_v_u8mf2_tumu(__VA_ARGS__)

#define	vluxseg7ei16_v_u8mf4(...) __riscv_vluxseg7ei16_v_u8mf4(__VA_ARGS__)

#define	vluxseg7ei16_v_u8mf4_m(...) __riscv_vluxseg7ei16_v_u8mf4_tumu(__VA_ARGS__)

#define	vluxseg7ei16_v_u8mf8(...) __riscv_vluxseg7ei16_v_u8mf8(__VA_ARGS__)

#define	vluxseg7ei16_v_u8mf8_m(...) __riscv_vluxseg7ei16_v_u8mf8_tumu(__VA_ARGS__)

#define	vluxseg7ei32_v_f16m1(...) __riscv_vluxseg7ei32_v_f16m1(__VA_ARGS__)

#define	vluxseg7ei32_v_f16m1_m(...) __riscv_vluxseg7ei32_v_f16m1_tumu(__VA_ARGS__)

#define	vluxseg7ei32_v_f16mf2(...) __riscv_vluxseg7ei32_v_f16mf2(__VA_ARGS__)

#define	vluxseg7ei32_v_f16mf2_m(...) __riscv_vluxseg7ei32_v_f16mf2_tumu(__VA_ARGS__)

#define	vluxseg7ei32_v_f16mf4(...) __riscv_vluxseg7ei32_v_f16mf4(__VA_ARGS__)

#define	vluxseg7ei32_v_f16mf4_m(...) __riscv_vluxseg7ei32_v_f16mf4_tumu(__VA_ARGS__)

#define	vluxseg7ei32_v_f32m1(...) __riscv_vluxseg7ei32_v_f32m1(__VA_ARGS__)

#define	vluxseg7ei32_v_f32m1_m(...) __riscv_vluxseg7ei32_v_f32m1_tumu(__VA_ARGS__)

#define	vluxseg7ei32_v_f32mf2(...) __riscv_vluxseg7ei32_v_f32mf2(__VA_ARGS__)

#define	vluxseg7ei32_v_f32mf2_m(...) __riscv_vluxseg7ei32_v_f32mf2_tumu(__VA_ARGS__)

#define	vluxseg7ei32_v_f64m1(...) __riscv_vluxseg7ei32_v_f64m1(__VA_ARGS__)

#define	vluxseg7ei32_v_f64m1_m(...) __riscv_vluxseg7ei32_v_f64m1_tumu(__VA_ARGS__)

#define	vluxseg7ei32_v_i16m1(...) __riscv_vluxseg7ei32_v_i16m1(__VA_ARGS__)

#define	vluxseg7ei32_v_i16m1_m(...) __riscv_vluxseg7ei32_v_i16m1_tumu(__VA_ARGS__)

#define	vluxseg7ei32_v_i16mf2(...) __riscv_vluxseg7ei32_v_i16mf2(__VA_ARGS__)

#define	vluxseg7ei32_v_i16mf2_m(...) __riscv_vluxseg7ei32_v_i16mf2_tumu(__VA_ARGS__)

#define	vluxseg7ei32_v_i16mf4(...) __riscv_vluxseg7ei32_v_i16mf4(__VA_ARGS__)

#define	vluxseg7ei32_v_i16mf4_m(...) __riscv_vluxseg7ei32_v_i16mf4_tumu(__VA_ARGS__)

#define	vluxseg7ei32_v_i32m1(...) __riscv_vluxseg7ei32_v_i32m1(__VA_ARGS__)

#define	vluxseg7ei32_v_i32m1_m(...) __riscv_vluxseg7ei32_v_i32m1_tumu(__VA_ARGS__)

#define	vluxseg7ei32_v_i32mf2(...) __riscv_vluxseg7ei32_v_i32mf2(__VA_ARGS__)

#define	vluxseg7ei32_v_i32mf2_m(...) __riscv_vluxseg7ei32_v_i32mf2_tumu(__VA_ARGS__)

#define	vluxseg7ei32_v_i64m1(...) __riscv_vluxseg7ei32_v_i64m1(__VA_ARGS__)

#define	vluxseg7ei32_v_i64m1_m(...) __riscv_vluxseg7ei32_v_i64m1_tumu(__VA_ARGS__)

#define	vluxseg7ei32_v_i8m1(...) __riscv_vluxseg7ei32_v_i8m1(__VA_ARGS__)

#define	vluxseg7ei32_v_i8m1_m(...) __riscv_vluxseg7ei32_v_i8m1_tumu(__VA_ARGS__)

#define	vluxseg7ei32_v_i8mf2(...) __riscv_vluxseg7ei32_v_i8mf2(__VA_ARGS__)

#define	vluxseg7ei32_v_i8mf2_m(...) __riscv_vluxseg7ei32_v_i8mf2_tumu(__VA_ARGS__)

#define	vluxseg7ei32_v_i8mf4(...) __riscv_vluxseg7ei32_v_i8mf4(__VA_ARGS__)

#define	vluxseg7ei32_v_i8mf4_m(...) __riscv_vluxseg7ei32_v_i8mf4_tumu(__VA_ARGS__)

#define	vluxseg7ei32_v_i8mf8(...) __riscv_vluxseg7ei32_v_i8mf8(__VA_ARGS__)

#define	vluxseg7ei32_v_i8mf8_m(...) __riscv_vluxseg7ei32_v_i8mf8_tumu(__VA_ARGS__)

#define	vluxseg7ei32_v_u16m1(...) __riscv_vluxseg7ei32_v_u16m1(__VA_ARGS__)

#define	vluxseg7ei32_v_u16m1_m(...) __riscv_vluxseg7ei32_v_u16m1_tumu(__VA_ARGS__)

#define	vluxseg7ei32_v_u16mf2(...) __riscv_vluxseg7ei32_v_u16mf2(__VA_ARGS__)

#define	vluxseg7ei32_v_u16mf2_m(...) __riscv_vluxseg7ei32_v_u16mf2_tumu(__VA_ARGS__)

#define	vluxseg7ei32_v_u16mf4(...) __riscv_vluxseg7ei32_v_u16mf4(__VA_ARGS__)

#define	vluxseg7ei32_v_u16mf4_m(...) __riscv_vluxseg7ei32_v_u16mf4_tumu(__VA_ARGS__)

#define	vluxseg7ei32_v_u32m1(...) __riscv_vluxseg7ei32_v_u32m1(__VA_ARGS__)

#define	vluxseg7ei32_v_u32m1_m(...) __riscv_vluxseg7ei32_v_u32m1_tumu(__VA_ARGS__)

#define	vluxseg7ei32_v_u32mf2(...) __riscv_vluxseg7ei32_v_u32mf2(__VA_ARGS__)

#define	vluxseg7ei32_v_u32mf2_m(...) __riscv_vluxseg7ei32_v_u32mf2_tumu(__VA_ARGS__)

#define	vluxseg7ei32_v_u64m1(...) __riscv_vluxseg7ei32_v_u64m1(__VA_ARGS__)

#define	vluxseg7ei32_v_u64m1_m(...) __riscv_vluxseg7ei32_v_u64m1_tumu(__VA_ARGS__)

#define	vluxseg7ei32_v_u8m1(...) __riscv_vluxseg7ei32_v_u8m1(__VA_ARGS__)

#define	vluxseg7ei32_v_u8m1_m(...) __riscv_vluxseg7ei32_v_u8m1_tumu(__VA_ARGS__)

#define	vluxseg7ei32_v_u8mf2(...) __riscv_vluxseg7ei32_v_u8mf2(__VA_ARGS__)

#define	vluxseg7ei32_v_u8mf2_m(...) __riscv_vluxseg7ei32_v_u8mf2_tumu(__VA_ARGS__)

#define	vluxseg7ei32_v_u8mf4(...) __riscv_vluxseg7ei32_v_u8mf4(__VA_ARGS__)

#define	vluxseg7ei32_v_u8mf4_m(...) __riscv_vluxseg7ei32_v_u8mf4_tumu(__VA_ARGS__)

#define	vluxseg7ei32_v_u8mf8(...) __riscv_vluxseg7ei32_v_u8mf8(__VA_ARGS__)

#define	vluxseg7ei32_v_u8mf8_m(...) __riscv_vluxseg7ei32_v_u8mf8_tumu(__VA_ARGS__)

#define	vluxseg7ei64_v_f16m1(...) __riscv_vluxseg7ei64_v_f16m1(__VA_ARGS__)

#define	vluxseg7ei64_v_f16m1_m(...) __riscv_vluxseg7ei64_v_f16m1_tumu(__VA_ARGS__)

#define	vluxseg7ei64_v_f16mf2(...) __riscv_vluxseg7ei64_v_f16mf2(__VA_ARGS__)

#define	vluxseg7ei64_v_f16mf2_m(...) __riscv_vluxseg7ei64_v_f16mf2_tumu(__VA_ARGS__)

#define	vluxseg7ei64_v_f16mf4(...) __riscv_vluxseg7ei64_v_f16mf4(__VA_ARGS__)

#define	vluxseg7ei64_v_f16mf4_m(...) __riscv_vluxseg7ei64_v_f16mf4_tumu(__VA_ARGS__)

#define	vluxseg7ei64_v_f32m1(...) __riscv_vluxseg7ei64_v_f32m1(__VA_ARGS__)

#define	vluxseg7ei64_v_f32m1_m(...) __riscv_vluxseg7ei64_v_f32m1_tumu(__VA_ARGS__)

#define	vluxseg7ei64_v_f32mf2(...) __riscv_vluxseg7ei64_v_f32mf2(__VA_ARGS__)

#define	vluxseg7ei64_v_f32mf2_m(...) __riscv_vluxseg7ei64_v_f32mf2_tumu(__VA_ARGS__)

#define	vluxseg7ei64_v_f64m1(...) __riscv_vluxseg7ei64_v_f64m1(__VA_ARGS__)

#define	vluxseg7ei64_v_f64m1_m(...) __riscv_vluxseg7ei64_v_f64m1_tumu(__VA_ARGS__)

#define	vluxseg7ei64_v_i16m1(...) __riscv_vluxseg7ei64_v_i16m1(__VA_ARGS__)

#define	vluxseg7ei64_v_i16m1_m(...) __riscv_vluxseg7ei64_v_i16m1_tumu(__VA_ARGS__)

#define	vluxseg7ei64_v_i16mf2(...) __riscv_vluxseg7ei64_v_i16mf2(__VA_ARGS__)

#define	vluxseg7ei64_v_i16mf2_m(...) __riscv_vluxseg7ei64_v_i16mf2_tumu(__VA_ARGS__)

#define	vluxseg7ei64_v_i16mf4(...) __riscv_vluxseg7ei64_v_i16mf4(__VA_ARGS__)

#define	vluxseg7ei64_v_i16mf4_m(...) __riscv_vluxseg7ei64_v_i16mf4_tumu(__VA_ARGS__)

#define	vluxseg7ei64_v_i32m1(...) __riscv_vluxseg7ei64_v_i32m1(__VA_ARGS__)

#define	vluxseg7ei64_v_i32m1_m(...) __riscv_vluxseg7ei64_v_i32m1_tumu(__VA_ARGS__)

#define	vluxseg7ei64_v_i32mf2(...) __riscv_vluxseg7ei64_v_i32mf2(__VA_ARGS__)

#define	vluxseg7ei64_v_i32mf2_m(...) __riscv_vluxseg7ei64_v_i32mf2_tumu(__VA_ARGS__)

#define	vluxseg7ei64_v_i64m1(...) __riscv_vluxseg7ei64_v_i64m1(__VA_ARGS__)

#define	vluxseg7ei64_v_i64m1_m(...) __riscv_vluxseg7ei64_v_i64m1_tumu(__VA_ARGS__)

#define	vluxseg7ei64_v_i8m1(...) __riscv_vluxseg7ei64_v_i8m1(__VA_ARGS__)

#define	vluxseg7ei64_v_i8m1_m(...) __riscv_vluxseg7ei64_v_i8m1_tumu(__VA_ARGS__)

#define	vluxseg7ei64_v_i8mf2(...) __riscv_vluxseg7ei64_v_i8mf2(__VA_ARGS__)

#define	vluxseg7ei64_v_i8mf2_m(...) __riscv_vluxseg7ei64_v_i8mf2_tumu(__VA_ARGS__)

#define	vluxseg7ei64_v_i8mf4(...) __riscv_vluxseg7ei64_v_i8mf4(__VA_ARGS__)

#define	vluxseg7ei64_v_i8mf4_m(...) __riscv_vluxseg7ei64_v_i8mf4_tumu(__VA_ARGS__)

#define	vluxseg7ei64_v_i8mf8(...) __riscv_vluxseg7ei64_v_i8mf8(__VA_ARGS__)

#define	vluxseg7ei64_v_i8mf8_m(...) __riscv_vluxseg7ei64_v_i8mf8_tumu(__VA_ARGS__)

#define	vluxseg7ei64_v_u16m1(...) __riscv_vluxseg7ei64_v_u16m1(__VA_ARGS__)

#define	vluxseg7ei64_v_u16m1_m(...) __riscv_vluxseg7ei64_v_u16m1_tumu(__VA_ARGS__)

#define	vluxseg7ei64_v_u16mf2(...) __riscv_vluxseg7ei64_v_u16mf2(__VA_ARGS__)

#define	vluxseg7ei64_v_u16mf2_m(...) __riscv_vluxseg7ei64_v_u16mf2_tumu(__VA_ARGS__)

#define	vluxseg7ei64_v_u16mf4(...) __riscv_vluxseg7ei64_v_u16mf4(__VA_ARGS__)

#define	vluxseg7ei64_v_u16mf4_m(...) __riscv_vluxseg7ei64_v_u16mf4_tumu(__VA_ARGS__)

#define	vluxseg7ei64_v_u32m1(...) __riscv_vluxseg7ei64_v_u32m1(__VA_ARGS__)

#define	vluxseg7ei64_v_u32m1_m(...) __riscv_vluxseg7ei64_v_u32m1_tumu(__VA_ARGS__)

#define	vluxseg7ei64_v_u32mf2(...) __riscv_vluxseg7ei64_v_u32mf2(__VA_ARGS__)

#define	vluxseg7ei64_v_u32mf2_m(...) __riscv_vluxseg7ei64_v_u32mf2_tumu(__VA_ARGS__)

#define	vluxseg7ei64_v_u64m1(...) __riscv_vluxseg7ei64_v_u64m1(__VA_ARGS__)

#define	vluxseg7ei64_v_u64m1_m(...) __riscv_vluxseg7ei64_v_u64m1_tumu(__VA_ARGS__)

#define	vluxseg7ei64_v_u8m1(...) __riscv_vluxseg7ei64_v_u8m1(__VA_ARGS__)

#define	vluxseg7ei64_v_u8m1_m(...) __riscv_vluxseg7ei64_v_u8m1_tumu(__VA_ARGS__)

#define	vluxseg7ei64_v_u8mf2(...) __riscv_vluxseg7ei64_v_u8mf2(__VA_ARGS__)

#define	vluxseg7ei64_v_u8mf2_m(...) __riscv_vluxseg7ei64_v_u8mf2_tumu(__VA_ARGS__)

#define	vluxseg7ei64_v_u8mf4(...) __riscv_vluxseg7ei64_v_u8mf4(__VA_ARGS__)

#define	vluxseg7ei64_v_u8mf4_m(...) __riscv_vluxseg7ei64_v_u8mf4_tumu(__VA_ARGS__)

#define	vluxseg7ei64_v_u8mf8(...) __riscv_vluxseg7ei64_v_u8mf8(__VA_ARGS__)

#define	vluxseg7ei64_v_u8mf8_m(...) __riscv_vluxseg7ei64_v_u8mf8_tumu(__VA_ARGS__)

#define	vluxseg7ei8_v_f16m1(...) __riscv_vluxseg7ei8_v_f16m1(__VA_ARGS__)

#define	vluxseg7ei8_v_f16m1_m(...) __riscv_vluxseg7ei8_v_f16m1_tumu(__VA_ARGS__)

#define	vluxseg7ei8_v_f16mf2(...) __riscv_vluxseg7ei8_v_f16mf2(__VA_ARGS__)

#define	vluxseg7ei8_v_f16mf2_m(...) __riscv_vluxseg7ei8_v_f16mf2_tumu(__VA_ARGS__)

#define	vluxseg7ei8_v_f16mf4(...) __riscv_vluxseg7ei8_v_f16mf4(__VA_ARGS__)

#define	vluxseg7ei8_v_f16mf4_m(...) __riscv_vluxseg7ei8_v_f16mf4_tumu(__VA_ARGS__)

#define	vluxseg7ei8_v_f32m1(...) __riscv_vluxseg7ei8_v_f32m1(__VA_ARGS__)

#define	vluxseg7ei8_v_f32m1_m(...) __riscv_vluxseg7ei8_v_f32m1_tumu(__VA_ARGS__)

#define	vluxseg7ei8_v_f32mf2(...) __riscv_vluxseg7ei8_v_f32mf2(__VA_ARGS__)

#define	vluxseg7ei8_v_f32mf2_m(...) __riscv_vluxseg7ei8_v_f32mf2_tumu(__VA_ARGS__)

#define	vluxseg7ei8_v_f64m1(...) __riscv_vluxseg7ei8_v_f64m1(__VA_ARGS__)

#define	vluxseg7ei8_v_f64m1_m(...) __riscv_vluxseg7ei8_v_f64m1_tumu(__VA_ARGS__)

#define	vluxseg7ei8_v_i16m1(...) __riscv_vluxseg7ei8_v_i16m1(__VA_ARGS__)

#define	vluxseg7ei8_v_i16m1_m(...) __riscv_vluxseg7ei8_v_i16m1_tumu(__VA_ARGS__)

#define	vluxseg7ei8_v_i16mf2(...) __riscv_vluxseg7ei8_v_i16mf2(__VA_ARGS__)

#define	vluxseg7ei8_v_i16mf2_m(...) __riscv_vluxseg7ei8_v_i16mf2_tumu(__VA_ARGS__)

#define	vluxseg7ei8_v_i16mf4(...) __riscv_vluxseg7ei8_v_i16mf4(__VA_ARGS__)

#define	vluxseg7ei8_v_i16mf4_m(...) __riscv_vluxseg7ei8_v_i16mf4_tumu(__VA_ARGS__)

#define	vluxseg7ei8_v_i32m1(...) __riscv_vluxseg7ei8_v_i32m1(__VA_ARGS__)

#define	vluxseg7ei8_v_i32m1_m(...) __riscv_vluxseg7ei8_v_i32m1_tumu(__VA_ARGS__)

#define	vluxseg7ei8_v_i32mf2(...) __riscv_vluxseg7ei8_v_i32mf2(__VA_ARGS__)

#define	vluxseg7ei8_v_i32mf2_m(...) __riscv_vluxseg7ei8_v_i32mf2_tumu(__VA_ARGS__)

#define	vluxseg7ei8_v_i64m1(...) __riscv_vluxseg7ei8_v_i64m1(__VA_ARGS__)

#define	vluxseg7ei8_v_i64m1_m(...) __riscv_vluxseg7ei8_v_i64m1_tumu(__VA_ARGS__)

#define	vluxseg7ei8_v_i8m1(...) __riscv_vluxseg7ei8_v_i8m1(__VA_ARGS__)

#define	vluxseg7ei8_v_i8m1_m(...) __riscv_vluxseg7ei8_v_i8m1_tumu(__VA_ARGS__)

#define	vluxseg7ei8_v_i8mf2(...) __riscv_vluxseg7ei8_v_i8mf2(__VA_ARGS__)

#define	vluxseg7ei8_v_i8mf2_m(...) __riscv_vluxseg7ei8_v_i8mf2_tumu(__VA_ARGS__)

#define	vluxseg7ei8_v_i8mf4(...) __riscv_vluxseg7ei8_v_i8mf4(__VA_ARGS__)

#define	vluxseg7ei8_v_i8mf4_m(...) __riscv_vluxseg7ei8_v_i8mf4_tumu(__VA_ARGS__)

#define	vluxseg7ei8_v_i8mf8(...) __riscv_vluxseg7ei8_v_i8mf8(__VA_ARGS__)

#define	vluxseg7ei8_v_i8mf8_m(...) __riscv_vluxseg7ei8_v_i8mf8_tumu(__VA_ARGS__)

#define	vluxseg7ei8_v_u16m1(...) __riscv_vluxseg7ei8_v_u16m1(__VA_ARGS__)

#define	vluxseg7ei8_v_u16m1_m(...) __riscv_vluxseg7ei8_v_u16m1_tumu(__VA_ARGS__)

#define	vluxseg7ei8_v_u16mf2(...) __riscv_vluxseg7ei8_v_u16mf2(__VA_ARGS__)

#define	vluxseg7ei8_v_u16mf2_m(...) __riscv_vluxseg7ei8_v_u16mf2_tumu(__VA_ARGS__)

#define	vluxseg7ei8_v_u16mf4(...) __riscv_vluxseg7ei8_v_u16mf4(__VA_ARGS__)

#define	vluxseg7ei8_v_u16mf4_m(...) __riscv_vluxseg7ei8_v_u16mf4_tumu(__VA_ARGS__)

#define	vluxseg7ei8_v_u32m1(...) __riscv_vluxseg7ei8_v_u32m1(__VA_ARGS__)

#define	vluxseg7ei8_v_u32m1_m(...) __riscv_vluxseg7ei8_v_u32m1_tumu(__VA_ARGS__)

#define	vluxseg7ei8_v_u32mf2(...) __riscv_vluxseg7ei8_v_u32mf2(__VA_ARGS__)

#define	vluxseg7ei8_v_u32mf2_m(...) __riscv_vluxseg7ei8_v_u32mf2_tumu(__VA_ARGS__)

#define	vluxseg7ei8_v_u64m1(...) __riscv_vluxseg7ei8_v_u64m1(__VA_ARGS__)

#define	vluxseg7ei8_v_u64m1_m(...) __riscv_vluxseg7ei8_v_u64m1_tumu(__VA_ARGS__)

#define	vluxseg7ei8_v_u8m1(...) __riscv_vluxseg7ei8_v_u8m1(__VA_ARGS__)

#define	vluxseg7ei8_v_u8m1_m(...) __riscv_vluxseg7ei8_v_u8m1_tumu(__VA_ARGS__)

#define	vluxseg7ei8_v_u8mf2(...) __riscv_vluxseg7ei8_v_u8mf2(__VA_ARGS__)

#define	vluxseg7ei8_v_u8mf2_m(...) __riscv_vluxseg7ei8_v_u8mf2_tumu(__VA_ARGS__)

#define	vluxseg7ei8_v_u8mf4(...) __riscv_vluxseg7ei8_v_u8mf4(__VA_ARGS__)

#define	vluxseg7ei8_v_u8mf4_m(...) __riscv_vluxseg7ei8_v_u8mf4_tumu(__VA_ARGS__)

#define	vluxseg7ei8_v_u8mf8(...) __riscv_vluxseg7ei8_v_u8mf8(__VA_ARGS__)

#define	vluxseg7ei8_v_u8mf8_m(...) __riscv_vluxseg7ei8_v_u8mf8_tumu(__VA_ARGS__)

#define	vluxseg8ei16_v_f16m1(...) __riscv_vluxseg8ei16_v_f16m1(__VA_ARGS__)

#define	vluxseg8ei16_v_f16m1_m(...) __riscv_vluxseg8ei16_v_f16m1_tumu(__VA_ARGS__)

#define	vluxseg8ei16_v_f16mf2(...) __riscv_vluxseg8ei16_v_f16mf2(__VA_ARGS__)

#define	vluxseg8ei16_v_f16mf2_m(...) __riscv_vluxseg8ei16_v_f16mf2_tumu(__VA_ARGS__)

#define	vluxseg8ei16_v_f16mf4(...) __riscv_vluxseg8ei16_v_f16mf4(__VA_ARGS__)

#define	vluxseg8ei16_v_f16mf4_m(...) __riscv_vluxseg8ei16_v_f16mf4_tumu(__VA_ARGS__)

#define	vluxseg8ei16_v_f32m1(...) __riscv_vluxseg8ei16_v_f32m1(__VA_ARGS__)

#define	vluxseg8ei16_v_f32m1_m(...) __riscv_vluxseg8ei16_v_f32m1_tumu(__VA_ARGS__)

#define	vluxseg8ei16_v_f32mf2(...) __riscv_vluxseg8ei16_v_f32mf2(__VA_ARGS__)

#define	vluxseg8ei16_v_f32mf2_m(...) __riscv_vluxseg8ei16_v_f32mf2_tumu(__VA_ARGS__)

#define	vluxseg8ei16_v_f64m1(...) __riscv_vluxseg8ei16_v_f64m1(__VA_ARGS__)

#define	vluxseg8ei16_v_f64m1_m(...) __riscv_vluxseg8ei16_v_f64m1_tumu(__VA_ARGS__)

#define	vluxseg8ei16_v_i16m1(...) __riscv_vluxseg8ei16_v_i16m1(__VA_ARGS__)

#define	vluxseg8ei16_v_i16m1_m(...) __riscv_vluxseg8ei16_v_i16m1_tumu(__VA_ARGS__)

#define	vluxseg8ei16_v_i16mf2(...) __riscv_vluxseg8ei16_v_i16mf2(__VA_ARGS__)

#define	vluxseg8ei16_v_i16mf2_m(...) __riscv_vluxseg8ei16_v_i16mf2_tumu(__VA_ARGS__)

#define	vluxseg8ei16_v_i16mf4(...) __riscv_vluxseg8ei16_v_i16mf4(__VA_ARGS__)

#define	vluxseg8ei16_v_i16mf4_m(...) __riscv_vluxseg8ei16_v_i16mf4_tumu(__VA_ARGS__)

#define	vluxseg8ei16_v_i32m1(...) __riscv_vluxseg8ei16_v_i32m1(__VA_ARGS__)

#define	vluxseg8ei16_v_i32m1_m(...) __riscv_vluxseg8ei16_v_i32m1_tumu(__VA_ARGS__)

#define	vluxseg8ei16_v_i32mf2(...) __riscv_vluxseg8ei16_v_i32mf2(__VA_ARGS__)

#define	vluxseg8ei16_v_i32mf2_m(...) __riscv_vluxseg8ei16_v_i32mf2_tumu(__VA_ARGS__)

#define	vluxseg8ei16_v_i64m1(...) __riscv_vluxseg8ei16_v_i64m1(__VA_ARGS__)

#define	vluxseg8ei16_v_i64m1_m(...) __riscv_vluxseg8ei16_v_i64m1_tumu(__VA_ARGS__)

#define	vluxseg8ei16_v_i8m1(...) __riscv_vluxseg8ei16_v_i8m1(__VA_ARGS__)

#define	vluxseg8ei16_v_i8m1_m(...) __riscv_vluxseg8ei16_v_i8m1_tumu(__VA_ARGS__)

#define	vluxseg8ei16_v_i8mf2(...) __riscv_vluxseg8ei16_v_i8mf2(__VA_ARGS__)

#define	vluxseg8ei16_v_i8mf2_m(...) __riscv_vluxseg8ei16_v_i8mf2_tumu(__VA_ARGS__)

#define	vluxseg8ei16_v_i8mf4(...) __riscv_vluxseg8ei16_v_i8mf4(__VA_ARGS__)

#define	vluxseg8ei16_v_i8mf4_m(...) __riscv_vluxseg8ei16_v_i8mf4_tumu(__VA_ARGS__)

#define	vluxseg8ei16_v_i8mf8(...) __riscv_vluxseg8ei16_v_i8mf8(__VA_ARGS__)

#define	vluxseg8ei16_v_i8mf8_m(...) __riscv_vluxseg8ei16_v_i8mf8_tumu(__VA_ARGS__)

#define	vluxseg8ei16_v_u16m1(...) __riscv_vluxseg8ei16_v_u16m1(__VA_ARGS__)

#define	vluxseg8ei16_v_u16m1_m(...) __riscv_vluxseg8ei16_v_u16m1_tumu(__VA_ARGS__)

#define	vluxseg8ei16_v_u16mf2(...) __riscv_vluxseg8ei16_v_u16mf2(__VA_ARGS__)

#define	vluxseg8ei16_v_u16mf2_m(...) __riscv_vluxseg8ei16_v_u16mf2_tumu(__VA_ARGS__)

#define	vluxseg8ei16_v_u16mf4(...) __riscv_vluxseg8ei16_v_u16mf4(__VA_ARGS__)

#define	vluxseg8ei16_v_u16mf4_m(...) __riscv_vluxseg8ei16_v_u16mf4_tumu(__VA_ARGS__)

#define	vluxseg8ei16_v_u32m1(...) __riscv_vluxseg8ei16_v_u32m1(__VA_ARGS__)

#define	vluxseg8ei16_v_u32m1_m(...) __riscv_vluxseg8ei16_v_u32m1_tumu(__VA_ARGS__)

#define	vluxseg8ei16_v_u32mf2(...) __riscv_vluxseg8ei16_v_u32mf2(__VA_ARGS__)

#define	vluxseg8ei16_v_u32mf2_m(...) __riscv_vluxseg8ei16_v_u32mf2_tumu(__VA_ARGS__)

#define	vluxseg8ei16_v_u64m1(...) __riscv_vluxseg8ei16_v_u64m1(__VA_ARGS__)

#define	vluxseg8ei16_v_u64m1_m(...) __riscv_vluxseg8ei16_v_u64m1_tumu(__VA_ARGS__)

#define	vluxseg8ei16_v_u8m1(...) __riscv_vluxseg8ei16_v_u8m1(__VA_ARGS__)

#define	vluxseg8ei16_v_u8m1_m(...) __riscv_vluxseg8ei16_v_u8m1_tumu(__VA_ARGS__)

#define	vluxseg8ei16_v_u8mf2(...) __riscv_vluxseg8ei16_v_u8mf2(__VA_ARGS__)

#define	vluxseg8ei16_v_u8mf2_m(...) __riscv_vluxseg8ei16_v_u8mf2_tumu(__VA_ARGS__)

#define	vluxseg8ei16_v_u8mf4(...) __riscv_vluxseg8ei16_v_u8mf4(__VA_ARGS__)

#define	vluxseg8ei16_v_u8mf4_m(...) __riscv_vluxseg8ei16_v_u8mf4_tumu(__VA_ARGS__)

#define	vluxseg8ei16_v_u8mf8(...) __riscv_vluxseg8ei16_v_u8mf8(__VA_ARGS__)

#define	vluxseg8ei16_v_u8mf8_m(...) __riscv_vluxseg8ei16_v_u8mf8_tumu(__VA_ARGS__)

#define	vluxseg8ei32_v_f16m1(...) __riscv_vluxseg8ei32_v_f16m1(__VA_ARGS__)

#define	vluxseg8ei32_v_f16m1_m(...) __riscv_vluxseg8ei32_v_f16m1_tumu(__VA_ARGS__)

#define	vluxseg8ei32_v_f16mf2(...) __riscv_vluxseg8ei32_v_f16mf2(__VA_ARGS__)

#define	vluxseg8ei32_v_f16mf2_m(...) __riscv_vluxseg8ei32_v_f16mf2_tumu(__VA_ARGS__)

#define	vluxseg8ei32_v_f16mf4(...) __riscv_vluxseg8ei32_v_f16mf4(__VA_ARGS__)

#define	vluxseg8ei32_v_f16mf4_m(...) __riscv_vluxseg8ei32_v_f16mf4_tumu(__VA_ARGS__)

#define	vluxseg8ei32_v_f32m1(...) __riscv_vluxseg8ei32_v_f32m1(__VA_ARGS__)

#define	vluxseg8ei32_v_f32m1_m(...) __riscv_vluxseg8ei32_v_f32m1_tumu(__VA_ARGS__)

#define	vluxseg8ei32_v_f32mf2(...) __riscv_vluxseg8ei32_v_f32mf2(__VA_ARGS__)

#define	vluxseg8ei32_v_f32mf2_m(...) __riscv_vluxseg8ei32_v_f32mf2_tumu(__VA_ARGS__)

#define	vluxseg8ei32_v_f64m1(...) __riscv_vluxseg8ei32_v_f64m1(__VA_ARGS__)

#define	vluxseg8ei32_v_f64m1_m(...) __riscv_vluxseg8ei32_v_f64m1_tumu(__VA_ARGS__)

#define	vluxseg8ei32_v_i16m1(...) __riscv_vluxseg8ei32_v_i16m1(__VA_ARGS__)

#define	vluxseg8ei32_v_i16m1_m(...) __riscv_vluxseg8ei32_v_i16m1_tumu(__VA_ARGS__)

#define	vluxseg8ei32_v_i16mf2(...) __riscv_vluxseg8ei32_v_i16mf2(__VA_ARGS__)

#define	vluxseg8ei32_v_i16mf2_m(...) __riscv_vluxseg8ei32_v_i16mf2_tumu(__VA_ARGS__)

#define	vluxseg8ei32_v_i16mf4(...) __riscv_vluxseg8ei32_v_i16mf4(__VA_ARGS__)

#define	vluxseg8ei32_v_i16mf4_m(...) __riscv_vluxseg8ei32_v_i16mf4_tumu(__VA_ARGS__)

#define	vluxseg8ei32_v_i32m1(...) __riscv_vluxseg8ei32_v_i32m1(__VA_ARGS__)

#define	vluxseg8ei32_v_i32m1_m(...) __riscv_vluxseg8ei32_v_i32m1_tumu(__VA_ARGS__)

#define	vluxseg8ei32_v_i32mf2(...) __riscv_vluxseg8ei32_v_i32mf2(__VA_ARGS__)

#define	vluxseg8ei32_v_i32mf2_m(...) __riscv_vluxseg8ei32_v_i32mf2_tumu(__VA_ARGS__)

#define	vluxseg8ei32_v_i64m1(...) __riscv_vluxseg8ei32_v_i64m1(__VA_ARGS__)

#define	vluxseg8ei32_v_i64m1_m(...) __riscv_vluxseg8ei32_v_i64m1_tumu(__VA_ARGS__)

#define	vluxseg8ei32_v_i8m1(...) __riscv_vluxseg8ei32_v_i8m1(__VA_ARGS__)

#define	vluxseg8ei32_v_i8m1_m(...) __riscv_vluxseg8ei32_v_i8m1_tumu(__VA_ARGS__)

#define	vluxseg8ei32_v_i8mf2(...) __riscv_vluxseg8ei32_v_i8mf2(__VA_ARGS__)

#define	vluxseg8ei32_v_i8mf2_m(...) __riscv_vluxseg8ei32_v_i8mf2_tumu(__VA_ARGS__)

#define	vluxseg8ei32_v_i8mf4(...) __riscv_vluxseg8ei32_v_i8mf4(__VA_ARGS__)

#define	vluxseg8ei32_v_i8mf4_m(...) __riscv_vluxseg8ei32_v_i8mf4_tumu(__VA_ARGS__)

#define	vluxseg8ei32_v_i8mf8(...) __riscv_vluxseg8ei32_v_i8mf8(__VA_ARGS__)

#define	vluxseg8ei32_v_i8mf8_m(...) __riscv_vluxseg8ei32_v_i8mf8_tumu(__VA_ARGS__)

#define	vluxseg8ei32_v_u16m1(...) __riscv_vluxseg8ei32_v_u16m1(__VA_ARGS__)

#define	vluxseg8ei32_v_u16m1_m(...) __riscv_vluxseg8ei32_v_u16m1_tumu(__VA_ARGS__)

#define	vluxseg8ei32_v_u16mf2(...) __riscv_vluxseg8ei32_v_u16mf2(__VA_ARGS__)

#define	vluxseg8ei32_v_u16mf2_m(...) __riscv_vluxseg8ei32_v_u16mf2_tumu(__VA_ARGS__)

#define	vluxseg8ei32_v_u16mf4(...) __riscv_vluxseg8ei32_v_u16mf4(__VA_ARGS__)

#define	vluxseg8ei32_v_u16mf4_m(...) __riscv_vluxseg8ei32_v_u16mf4_tumu(__VA_ARGS__)

#define	vluxseg8ei32_v_u32m1(...) __riscv_vluxseg8ei32_v_u32m1(__VA_ARGS__)

#define	vluxseg8ei32_v_u32m1_m(...) __riscv_vluxseg8ei32_v_u32m1_tumu(__VA_ARGS__)

#define	vluxseg8ei32_v_u32mf2(...) __riscv_vluxseg8ei32_v_u32mf2(__VA_ARGS__)

#define	vluxseg8ei32_v_u32mf2_m(...) __riscv_vluxseg8ei32_v_u32mf2_tumu(__VA_ARGS__)

#define	vluxseg8ei32_v_u64m1(...) __riscv_vluxseg8ei32_v_u64m1(__VA_ARGS__)

#define	vluxseg8ei32_v_u64m1_m(...) __riscv_vluxseg8ei32_v_u64m1_tumu(__VA_ARGS__)

#define	vluxseg8ei32_v_u8m1(...) __riscv_vluxseg8ei32_v_u8m1(__VA_ARGS__)

#define	vluxseg8ei32_v_u8m1_m(...) __riscv_vluxseg8ei32_v_u8m1_tumu(__VA_ARGS__)

#define	vluxseg8ei32_v_u8mf2(...) __riscv_vluxseg8ei32_v_u8mf2(__VA_ARGS__)

#define	vluxseg8ei32_v_u8mf2_m(...) __riscv_vluxseg8ei32_v_u8mf2_tumu(__VA_ARGS__)

#define	vluxseg8ei32_v_u8mf4(...) __riscv_vluxseg8ei32_v_u8mf4(__VA_ARGS__)

#define	vluxseg8ei32_v_u8mf4_m(...) __riscv_vluxseg8ei32_v_u8mf4_tumu(__VA_ARGS__)

#define	vluxseg8ei32_v_u8mf8(...) __riscv_vluxseg8ei32_v_u8mf8(__VA_ARGS__)

#define	vluxseg8ei32_v_u8mf8_m(...) __riscv_vluxseg8ei32_v_u8mf8_tumu(__VA_ARGS__)

#define	vluxseg8ei64_v_f16m1(...) __riscv_vluxseg8ei64_v_f16m1(__VA_ARGS__)

#define	vluxseg8ei64_v_f16m1_m(...) __riscv_vluxseg8ei64_v_f16m1_tumu(__VA_ARGS__)

#define	vluxseg8ei64_v_f16mf2(...) __riscv_vluxseg8ei64_v_f16mf2(__VA_ARGS__)

#define	vluxseg8ei64_v_f16mf2_m(...) __riscv_vluxseg8ei64_v_f16mf2_tumu(__VA_ARGS__)

#define	vluxseg8ei64_v_f16mf4(...) __riscv_vluxseg8ei64_v_f16mf4(__VA_ARGS__)

#define	vluxseg8ei64_v_f16mf4_m(...) __riscv_vluxseg8ei64_v_f16mf4_tumu(__VA_ARGS__)

#define	vluxseg8ei64_v_f32m1(...) __riscv_vluxseg8ei64_v_f32m1(__VA_ARGS__)

#define	vluxseg8ei64_v_f32m1_m(...) __riscv_vluxseg8ei64_v_f32m1_tumu(__VA_ARGS__)

#define	vluxseg8ei64_v_f32mf2(...) __riscv_vluxseg8ei64_v_f32mf2(__VA_ARGS__)

#define	vluxseg8ei64_v_f32mf2_m(...) __riscv_vluxseg8ei64_v_f32mf2_tumu(__VA_ARGS__)

#define	vluxseg8ei64_v_f64m1(...) __riscv_vluxseg8ei64_v_f64m1(__VA_ARGS__)

#define	vluxseg8ei64_v_f64m1_m(...) __riscv_vluxseg8ei64_v_f64m1_tumu(__VA_ARGS__)

#define	vluxseg8ei64_v_i16m1(...) __riscv_vluxseg8ei64_v_i16m1(__VA_ARGS__)

#define	vluxseg8ei64_v_i16m1_m(...) __riscv_vluxseg8ei64_v_i16m1_tumu(__VA_ARGS__)

#define	vluxseg8ei64_v_i16mf2(...) __riscv_vluxseg8ei64_v_i16mf2(__VA_ARGS__)

#define	vluxseg8ei64_v_i16mf2_m(...) __riscv_vluxseg8ei64_v_i16mf2_tumu(__VA_ARGS__)

#define	vluxseg8ei64_v_i16mf4(...) __riscv_vluxseg8ei64_v_i16mf4(__VA_ARGS__)

#define	vluxseg8ei64_v_i16mf4_m(...) __riscv_vluxseg8ei64_v_i16mf4_tumu(__VA_ARGS__)

#define	vluxseg8ei64_v_i32m1(...) __riscv_vluxseg8ei64_v_i32m1(__VA_ARGS__)

#define	vluxseg8ei64_v_i32m1_m(...) __riscv_vluxseg8ei64_v_i32m1_tumu(__VA_ARGS__)

#define	vluxseg8ei64_v_i32mf2(...) __riscv_vluxseg8ei64_v_i32mf2(__VA_ARGS__)

#define	vluxseg8ei64_v_i32mf2_m(...) __riscv_vluxseg8ei64_v_i32mf2_tumu(__VA_ARGS__)

#define	vluxseg8ei64_v_i64m1(...) __riscv_vluxseg8ei64_v_i64m1(__VA_ARGS__)

#define	vluxseg8ei64_v_i64m1_m(...) __riscv_vluxseg8ei64_v_i64m1_tumu(__VA_ARGS__)

#define	vluxseg8ei64_v_i8m1(...) __riscv_vluxseg8ei64_v_i8m1(__VA_ARGS__)

#define	vluxseg8ei64_v_i8m1_m(...) __riscv_vluxseg8ei64_v_i8m1_tumu(__VA_ARGS__)

#define	vluxseg8ei64_v_i8mf2(...) __riscv_vluxseg8ei64_v_i8mf2(__VA_ARGS__)

#define	vluxseg8ei64_v_i8mf2_m(...) __riscv_vluxseg8ei64_v_i8mf2_tumu(__VA_ARGS__)

#define	vluxseg8ei64_v_i8mf4(...) __riscv_vluxseg8ei64_v_i8mf4(__VA_ARGS__)

#define	vluxseg8ei64_v_i8mf4_m(...) __riscv_vluxseg8ei64_v_i8mf4_tumu(__VA_ARGS__)

#define	vluxseg8ei64_v_i8mf8(...) __riscv_vluxseg8ei64_v_i8mf8(__VA_ARGS__)

#define	vluxseg8ei64_v_i8mf8_m(...) __riscv_vluxseg8ei64_v_i8mf8_tumu(__VA_ARGS__)

#define	vluxseg8ei64_v_u16m1(...) __riscv_vluxseg8ei64_v_u16m1(__VA_ARGS__)

#define	vluxseg8ei64_v_u16m1_m(...) __riscv_vluxseg8ei64_v_u16m1_tumu(__VA_ARGS__)

#define	vluxseg8ei64_v_u16mf2(...) __riscv_vluxseg8ei64_v_u16mf2(__VA_ARGS__)

#define	vluxseg8ei64_v_u16mf2_m(...) __riscv_vluxseg8ei64_v_u16mf2_tumu(__VA_ARGS__)

#define	vluxseg8ei64_v_u16mf4(...) __riscv_vluxseg8ei64_v_u16mf4(__VA_ARGS__)

#define	vluxseg8ei64_v_u16mf4_m(...) __riscv_vluxseg8ei64_v_u16mf4_tumu(__VA_ARGS__)

#define	vluxseg8ei64_v_u32m1(...) __riscv_vluxseg8ei64_v_u32m1(__VA_ARGS__)

#define	vluxseg8ei64_v_u32m1_m(...) __riscv_vluxseg8ei64_v_u32m1_tumu(__VA_ARGS__)

#define	vluxseg8ei64_v_u32mf2(...) __riscv_vluxseg8ei64_v_u32mf2(__VA_ARGS__)

#define	vluxseg8ei64_v_u32mf2_m(...) __riscv_vluxseg8ei64_v_u32mf2_tumu(__VA_ARGS__)

#define	vluxseg8ei64_v_u64m1(...) __riscv_vluxseg8ei64_v_u64m1(__VA_ARGS__)

#define	vluxseg8ei64_v_u64m1_m(...) __riscv_vluxseg8ei64_v_u64m1_tumu(__VA_ARGS__)

#define	vluxseg8ei64_v_u8m1(...) __riscv_vluxseg8ei64_v_u8m1(__VA_ARGS__)

#define	vluxseg8ei64_v_u8m1_m(...) __riscv_vluxseg8ei64_v_u8m1_tumu(__VA_ARGS__)

#define	vluxseg8ei64_v_u8mf2(...) __riscv_vluxseg8ei64_v_u8mf2(__VA_ARGS__)

#define	vluxseg8ei64_v_u8mf2_m(...) __riscv_vluxseg8ei64_v_u8mf2_tumu(__VA_ARGS__)

#define	vluxseg8ei64_v_u8mf4(...) __riscv_vluxseg8ei64_v_u8mf4(__VA_ARGS__)

#define	vluxseg8ei64_v_u8mf4_m(...) __riscv_vluxseg8ei64_v_u8mf4_tumu(__VA_ARGS__)

#define	vluxseg8ei64_v_u8mf8(...) __riscv_vluxseg8ei64_v_u8mf8(__VA_ARGS__)

#define	vluxseg8ei64_v_u8mf8_m(...) __riscv_vluxseg8ei64_v_u8mf8_tumu(__VA_ARGS__)

#define	vluxseg8ei8_v_f16m1(...) __riscv_vluxseg8ei8_v_f16m1(__VA_ARGS__)

#define	vluxseg8ei8_v_f16m1_m(...) __riscv_vluxseg8ei8_v_f16m1_tumu(__VA_ARGS__)

#define	vluxseg8ei8_v_f16mf2(...) __riscv_vluxseg8ei8_v_f16mf2(__VA_ARGS__)

#define	vluxseg8ei8_v_f16mf2_m(...) __riscv_vluxseg8ei8_v_f16mf2_tumu(__VA_ARGS__)

#define	vluxseg8ei8_v_f16mf4(...) __riscv_vluxseg8ei8_v_f16mf4(__VA_ARGS__)

#define	vluxseg8ei8_v_f16mf4_m(...) __riscv_vluxseg8ei8_v_f16mf4_tumu(__VA_ARGS__)

#define	vluxseg8ei8_v_f32m1(...) __riscv_vluxseg8ei8_v_f32m1(__VA_ARGS__)

#define	vluxseg8ei8_v_f32m1_m(...) __riscv_vluxseg8ei8_v_f32m1_tumu(__VA_ARGS__)

#define	vluxseg8ei8_v_f32mf2(...) __riscv_vluxseg8ei8_v_f32mf2(__VA_ARGS__)

#define	vluxseg8ei8_v_f32mf2_m(...) __riscv_vluxseg8ei8_v_f32mf2_tumu(__VA_ARGS__)

#define	vluxseg8ei8_v_f64m1(...) __riscv_vluxseg8ei8_v_f64m1(__VA_ARGS__)

#define	vluxseg8ei8_v_f64m1_m(...) __riscv_vluxseg8ei8_v_f64m1_tumu(__VA_ARGS__)

#define	vluxseg8ei8_v_i16m1(...) __riscv_vluxseg8ei8_v_i16m1(__VA_ARGS__)

#define	vluxseg8ei8_v_i16m1_m(...) __riscv_vluxseg8ei8_v_i16m1_tumu(__VA_ARGS__)

#define	vluxseg8ei8_v_i16mf2(...) __riscv_vluxseg8ei8_v_i16mf2(__VA_ARGS__)

#define	vluxseg8ei8_v_i16mf2_m(...) __riscv_vluxseg8ei8_v_i16mf2_tumu(__VA_ARGS__)

#define	vluxseg8ei8_v_i16mf4(...) __riscv_vluxseg8ei8_v_i16mf4(__VA_ARGS__)

#define	vluxseg8ei8_v_i16mf4_m(...) __riscv_vluxseg8ei8_v_i16mf4_tumu(__VA_ARGS__)

#define	vluxseg8ei8_v_i32m1(...) __riscv_vluxseg8ei8_v_i32m1(__VA_ARGS__)

#define	vluxseg8ei8_v_i32m1_m(...) __riscv_vluxseg8ei8_v_i32m1_tumu(__VA_ARGS__)

#define	vluxseg8ei8_v_i32mf2(...) __riscv_vluxseg8ei8_v_i32mf2(__VA_ARGS__)

#define	vluxseg8ei8_v_i32mf2_m(...) __riscv_vluxseg8ei8_v_i32mf2_tumu(__VA_ARGS__)

#define	vluxseg8ei8_v_i64m1(...) __riscv_vluxseg8ei8_v_i64m1(__VA_ARGS__)

#define	vluxseg8ei8_v_i64m1_m(...) __riscv_vluxseg8ei8_v_i64m1_tumu(__VA_ARGS__)

#define	vluxseg8ei8_v_i8m1(...) __riscv_vluxseg8ei8_v_i8m1(__VA_ARGS__)

#define	vluxseg8ei8_v_i8m1_m(...) __riscv_vluxseg8ei8_v_i8m1_tumu(__VA_ARGS__)

#define	vluxseg8ei8_v_i8mf2(...) __riscv_vluxseg8ei8_v_i8mf2(__VA_ARGS__)

#define	vluxseg8ei8_v_i8mf2_m(...) __riscv_vluxseg8ei8_v_i8mf2_tumu(__VA_ARGS__)

#define	vluxseg8ei8_v_i8mf4(...) __riscv_vluxseg8ei8_v_i8mf4(__VA_ARGS__)

#define	vluxseg8ei8_v_i8mf4_m(...) __riscv_vluxseg8ei8_v_i8mf4_tumu(__VA_ARGS__)

#define	vluxseg8ei8_v_i8mf8(...) __riscv_vluxseg8ei8_v_i8mf8(__VA_ARGS__)

#define	vluxseg8ei8_v_i8mf8_m(...) __riscv_vluxseg8ei8_v_i8mf8_tumu(__VA_ARGS__)

#define	vluxseg8ei8_v_u16m1(...) __riscv_vluxseg8ei8_v_u16m1(__VA_ARGS__)

#define	vluxseg8ei8_v_u16m1_m(...) __riscv_vluxseg8ei8_v_u16m1_tumu(__VA_ARGS__)

#define	vluxseg8ei8_v_u16mf2(...) __riscv_vluxseg8ei8_v_u16mf2(__VA_ARGS__)

#define	vluxseg8ei8_v_u16mf2_m(...) __riscv_vluxseg8ei8_v_u16mf2_tumu(__VA_ARGS__)

#define	vluxseg8ei8_v_u16mf4(...) __riscv_vluxseg8ei8_v_u16mf4(__VA_ARGS__)

#define	vluxseg8ei8_v_u16mf4_m(...) __riscv_vluxseg8ei8_v_u16mf4_tumu(__VA_ARGS__)

#define	vluxseg8ei8_v_u32m1(...) __riscv_vluxseg8ei8_v_u32m1(__VA_ARGS__)

#define	vluxseg8ei8_v_u32m1_m(...) __riscv_vluxseg8ei8_v_u32m1_tumu(__VA_ARGS__)

#define	vluxseg8ei8_v_u32mf2(...) __riscv_vluxseg8ei8_v_u32mf2(__VA_ARGS__)

#define	vluxseg8ei8_v_u32mf2_m(...) __riscv_vluxseg8ei8_v_u32mf2_tumu(__VA_ARGS__)

#define	vluxseg8ei8_v_u64m1(...) __riscv_vluxseg8ei8_v_u64m1(__VA_ARGS__)

#define	vluxseg8ei8_v_u64m1_m(...) __riscv_vluxseg8ei8_v_u64m1_tumu(__VA_ARGS__)

#define	vluxseg8ei8_v_u8m1(...) __riscv_vluxseg8ei8_v_u8m1(__VA_ARGS__)

#define	vluxseg8ei8_v_u8m1_m(...) __riscv_vluxseg8ei8_v_u8m1_tumu(__VA_ARGS__)

#define	vluxseg8ei8_v_u8mf2(...) __riscv_vluxseg8ei8_v_u8mf2(__VA_ARGS__)

#define	vluxseg8ei8_v_u8mf2_m(...) __riscv_vluxseg8ei8_v_u8mf2_tumu(__VA_ARGS__)

#define	vluxseg8ei8_v_u8mf4(...) __riscv_vluxseg8ei8_v_u8mf4(__VA_ARGS__)

#define	vluxseg8ei8_v_u8mf4_m(...) __riscv_vluxseg8ei8_v_u8mf4_tumu(__VA_ARGS__)

#define	vluxseg8ei8_v_u8mf8(...) __riscv_vluxseg8ei8_v_u8mf8(__VA_ARGS__)

#define	vluxseg8ei8_v_u8mf8_m(...) __riscv_vluxseg8ei8_v_u8mf8_tumu(__VA_ARGS__)

#define	vmacc_vv_i16m1(...) __riscv_vmacc_vv_i16m1_tu(__VA_ARGS__)

#define	vmacc_vv_i16m1_m(...) __riscv_vmacc_vv_i16m1_tumu(__VA_ARGS__)

#define	vmacc_vv_i16m2(...) __riscv_vmacc_vv_i16m2_tu(__VA_ARGS__)

#define	vmacc_vv_i16m2_m(...) __riscv_vmacc_vv_i16m2_tumu(__VA_ARGS__)

#define	vmacc_vv_i16m4(...) __riscv_vmacc_vv_i16m4_tu(__VA_ARGS__)

#define	vmacc_vv_i16m4_m(...) __riscv_vmacc_vv_i16m4_tumu(__VA_ARGS__)

#define	vmacc_vv_i16m8(...) __riscv_vmacc_vv_i16m8_tu(__VA_ARGS__)

#define	vmacc_vv_i16m8_m(...) __riscv_vmacc_vv_i16m8_tumu(__VA_ARGS__)

#define	vmacc_vv_i16mf2(...) __riscv_vmacc_vv_i16mf2_tu(__VA_ARGS__)

#define	vmacc_vv_i16mf2_m(...) __riscv_vmacc_vv_i16mf2_tumu(__VA_ARGS__)

#define	vmacc_vv_i16mf4(...) __riscv_vmacc_vv_i16mf4_tu(__VA_ARGS__)

#define	vmacc_vv_i16mf4_m(...) __riscv_vmacc_vv_i16mf4_tumu(__VA_ARGS__)

#define	vmacc_vv_i32m1(...) __riscv_vmacc_vv_i32m1_tu(__VA_ARGS__)

#define	vmacc_vv_i32m1_m(...) __riscv_vmacc_vv_i32m1_tumu(__VA_ARGS__)

#define	vmacc_vv_i32m2(...) __riscv_vmacc_vv_i32m2_tu(__VA_ARGS__)

#define	vmacc_vv_i32m2_m(...) __riscv_vmacc_vv_i32m2_tumu(__VA_ARGS__)

#define	vmacc_vv_i32m4(...) __riscv_vmacc_vv_i32m4_tu(__VA_ARGS__)

#define	vmacc_vv_i32m4_m(...) __riscv_vmacc_vv_i32m4_tumu(__VA_ARGS__)

#define	vmacc_vv_i32m8(...) __riscv_vmacc_vv_i32m8_tu(__VA_ARGS__)

#define	vmacc_vv_i32m8_m(...) __riscv_vmacc_vv_i32m8_tumu(__VA_ARGS__)

#define	vmacc_vv_i32mf2(...) __riscv_vmacc_vv_i32mf2_tu(__VA_ARGS__)

#define	vmacc_vv_i32mf2_m(...) __riscv_vmacc_vv_i32mf2_tumu(__VA_ARGS__)

#define	vmacc_vv_i64m1(...) __riscv_vmacc_vv_i64m1_tu(__VA_ARGS__)

#define	vmacc_vv_i64m1_m(...) __riscv_vmacc_vv_i64m1_tumu(__VA_ARGS__)

#define	vmacc_vv_i64m2(...) __riscv_vmacc_vv_i64m2_tu(__VA_ARGS__)

#define	vmacc_vv_i64m2_m(...) __riscv_vmacc_vv_i64m2_tumu(__VA_ARGS__)

#define	vmacc_vv_i64m4(...) __riscv_vmacc_vv_i64m4_tu(__VA_ARGS__)

#define	vmacc_vv_i64m4_m(...) __riscv_vmacc_vv_i64m4_tumu(__VA_ARGS__)

#define	vmacc_vv_i64m8(...) __riscv_vmacc_vv_i64m8_tu(__VA_ARGS__)

#define	vmacc_vv_i64m8_m(...) __riscv_vmacc_vv_i64m8_tumu(__VA_ARGS__)

#define	vmacc_vv_i8m1(...) __riscv_vmacc_vv_i8m1_tu(__VA_ARGS__)

#define	vmacc_vv_i8m1_m(...) __riscv_vmacc_vv_i8m1_tumu(__VA_ARGS__)

#define	vmacc_vv_i8m2(...) __riscv_vmacc_vv_i8m2_tu(__VA_ARGS__)

#define	vmacc_vv_i8m2_m(...) __riscv_vmacc_vv_i8m2_tumu(__VA_ARGS__)

#define	vmacc_vv_i8m4(...) __riscv_vmacc_vv_i8m4_tu(__VA_ARGS__)

#define	vmacc_vv_i8m4_m(...) __riscv_vmacc_vv_i8m4_tumu(__VA_ARGS__)

#define	vmacc_vv_i8m8(...) __riscv_vmacc_vv_i8m8_tu(__VA_ARGS__)

#define	vmacc_vv_i8m8_m(...) __riscv_vmacc_vv_i8m8_tumu(__VA_ARGS__)

#define	vmacc_vv_i8mf2(...) __riscv_vmacc_vv_i8mf2_tu(__VA_ARGS__)

#define	vmacc_vv_i8mf2_m(...) __riscv_vmacc_vv_i8mf2_tumu(__VA_ARGS__)

#define	vmacc_vv_i8mf4(...) __riscv_vmacc_vv_i8mf4_tu(__VA_ARGS__)

#define	vmacc_vv_i8mf4_m(...) __riscv_vmacc_vv_i8mf4_tumu(__VA_ARGS__)

#define	vmacc_vv_i8mf8(...) __riscv_vmacc_vv_i8mf8_tu(__VA_ARGS__)

#define	vmacc_vv_i8mf8_m(...) __riscv_vmacc_vv_i8mf8_tumu(__VA_ARGS__)

#define	vmacc_vv_u16m1(...) __riscv_vmacc_vv_u16m1_tu(__VA_ARGS__)

#define	vmacc_vv_u16m1_m(...) __riscv_vmacc_vv_u16m1_tumu(__VA_ARGS__)

#define	vmacc_vv_u16m2(...) __riscv_vmacc_vv_u16m2_tu(__VA_ARGS__)

#define	vmacc_vv_u16m2_m(...) __riscv_vmacc_vv_u16m2_tumu(__VA_ARGS__)

#define	vmacc_vv_u16m4(...) __riscv_vmacc_vv_u16m4_tu(__VA_ARGS__)

#define	vmacc_vv_u16m4_m(...) __riscv_vmacc_vv_u16m4_tumu(__VA_ARGS__)

#define	vmacc_vv_u16m8(...) __riscv_vmacc_vv_u16m8_tu(__VA_ARGS__)

#define	vmacc_vv_u16m8_m(...) __riscv_vmacc_vv_u16m8_tumu(__VA_ARGS__)

#define	vmacc_vv_u16mf2(...) __riscv_vmacc_vv_u16mf2_tu(__VA_ARGS__)

#define	vmacc_vv_u16mf2_m(...) __riscv_vmacc_vv_u16mf2_tumu(__VA_ARGS__)

#define	vmacc_vv_u16mf4(...) __riscv_vmacc_vv_u16mf4_tu(__VA_ARGS__)

#define	vmacc_vv_u16mf4_m(...) __riscv_vmacc_vv_u16mf4_tumu(__VA_ARGS__)

#define	vmacc_vv_u32m1(...) __riscv_vmacc_vv_u32m1_tu(__VA_ARGS__)

#define	vmacc_vv_u32m1_m(...) __riscv_vmacc_vv_u32m1_tumu(__VA_ARGS__)

#define	vmacc_vv_u32m2(...) __riscv_vmacc_vv_u32m2_tu(__VA_ARGS__)

#define	vmacc_vv_u32m2_m(...) __riscv_vmacc_vv_u32m2_tumu(__VA_ARGS__)

#define	vmacc_vv_u32m4(...) __riscv_vmacc_vv_u32m4_tu(__VA_ARGS__)

#define	vmacc_vv_u32m4_m(...) __riscv_vmacc_vv_u32m4_tumu(__VA_ARGS__)

#define	vmacc_vv_u32m8(...) __riscv_vmacc_vv_u32m8_tu(__VA_ARGS__)

#define	vmacc_vv_u32m8_m(...) __riscv_vmacc_vv_u32m8_tumu(__VA_ARGS__)

#define	vmacc_vv_u32mf2(...) __riscv_vmacc_vv_u32mf2_tu(__VA_ARGS__)

#define	vmacc_vv_u32mf2_m(...) __riscv_vmacc_vv_u32mf2_tumu(__VA_ARGS__)

#define	vmacc_vv_u64m1(...) __riscv_vmacc_vv_u64m1_tu(__VA_ARGS__)

#define	vmacc_vv_u64m1_m(...) __riscv_vmacc_vv_u64m1_tumu(__VA_ARGS__)

#define	vmacc_vv_u64m2(...) __riscv_vmacc_vv_u64m2_tu(__VA_ARGS__)

#define	vmacc_vv_u64m2_m(...) __riscv_vmacc_vv_u64m2_tumu(__VA_ARGS__)

#define	vmacc_vv_u64m4(...) __riscv_vmacc_vv_u64m4_tu(__VA_ARGS__)

#define	vmacc_vv_u64m4_m(...) __riscv_vmacc_vv_u64m4_tumu(__VA_ARGS__)

#define	vmacc_vv_u64m8(...) __riscv_vmacc_vv_u64m8_tu(__VA_ARGS__)

#define	vmacc_vv_u64m8_m(...) __riscv_vmacc_vv_u64m8_tumu(__VA_ARGS__)

#define	vmacc_vv_u8m1(...) __riscv_vmacc_vv_u8m1_tu(__VA_ARGS__)

#define	vmacc_vv_u8m1_m(...) __riscv_vmacc_vv_u8m1_tumu(__VA_ARGS__)

#define	vmacc_vv_u8m2(...) __riscv_vmacc_vv_u8m2_tu(__VA_ARGS__)

#define	vmacc_vv_u8m2_m(...) __riscv_vmacc_vv_u8m2_tumu(__VA_ARGS__)

#define	vmacc_vv_u8m4(...) __riscv_vmacc_vv_u8m4_tu(__VA_ARGS__)

#define	vmacc_vv_u8m4_m(...) __riscv_vmacc_vv_u8m4_tumu(__VA_ARGS__)

#define	vmacc_vv_u8m8(...) __riscv_vmacc_vv_u8m8_tu(__VA_ARGS__)

#define	vmacc_vv_u8m8_m(...) __riscv_vmacc_vv_u8m8_tumu(__VA_ARGS__)

#define	vmacc_vv_u8mf2(...) __riscv_vmacc_vv_u8mf2_tu(__VA_ARGS__)

#define	vmacc_vv_u8mf2_m(...) __riscv_vmacc_vv_u8mf2_tumu(__VA_ARGS__)

#define	vmacc_vv_u8mf4(...) __riscv_vmacc_vv_u8mf4_tu(__VA_ARGS__)

#define	vmacc_vv_u8mf4_m(...) __riscv_vmacc_vv_u8mf4_tumu(__VA_ARGS__)

#define	vmacc_vv_u8mf8(...) __riscv_vmacc_vv_u8mf8_tu(__VA_ARGS__)

#define	vmacc_vv_u8mf8_m(...) __riscv_vmacc_vv_u8mf8_tumu(__VA_ARGS__)

#define	vmacc_vx_i16m1(...) __riscv_vmacc_vx_i16m1_tu(__VA_ARGS__)

#define	vmacc_vx_i16m1_m(...) __riscv_vmacc_vx_i16m1_tumu(__VA_ARGS__)

#define	vmacc_vx_i16m2(...) __riscv_vmacc_vx_i16m2_tu(__VA_ARGS__)

#define	vmacc_vx_i16m2_m(...) __riscv_vmacc_vx_i16m2_tumu(__VA_ARGS__)

#define	vmacc_vx_i16m4(...) __riscv_vmacc_vx_i16m4_tu(__VA_ARGS__)

#define	vmacc_vx_i16m4_m(...) __riscv_vmacc_vx_i16m4_tumu(__VA_ARGS__)

#define	vmacc_vx_i16m8(...) __riscv_vmacc_vx_i16m8_tu(__VA_ARGS__)

#define	vmacc_vx_i16m8_m(...) __riscv_vmacc_vx_i16m8_tumu(__VA_ARGS__)

#define	vmacc_vx_i16mf2(...) __riscv_vmacc_vx_i16mf2_tu(__VA_ARGS__)

#define	vmacc_vx_i16mf2_m(...) __riscv_vmacc_vx_i16mf2_tumu(__VA_ARGS__)

#define	vmacc_vx_i16mf4(...) __riscv_vmacc_vx_i16mf4_tu(__VA_ARGS__)

#define	vmacc_vx_i16mf4_m(...) __riscv_vmacc_vx_i16mf4_tumu(__VA_ARGS__)

#define	vmacc_vx_i32m1(...) __riscv_vmacc_vx_i32m1_tu(__VA_ARGS__)

#define	vmacc_vx_i32m1_m(...) __riscv_vmacc_vx_i32m1_tumu(__VA_ARGS__)

#define	vmacc_vx_i32m2(...) __riscv_vmacc_vx_i32m2_tu(__VA_ARGS__)

#define	vmacc_vx_i32m2_m(...) __riscv_vmacc_vx_i32m2_tumu(__VA_ARGS__)

#define	vmacc_vx_i32m4(...) __riscv_vmacc_vx_i32m4_tu(__VA_ARGS__)

#define	vmacc_vx_i32m4_m(...) __riscv_vmacc_vx_i32m4_tumu(__VA_ARGS__)

#define	vmacc_vx_i32m8(...) __riscv_vmacc_vx_i32m8_tu(__VA_ARGS__)

#define	vmacc_vx_i32m8_m(...) __riscv_vmacc_vx_i32m8_tumu(__VA_ARGS__)

#define	vmacc_vx_i32mf2(...) __riscv_vmacc_vx_i32mf2_tu(__VA_ARGS__)

#define	vmacc_vx_i32mf2_m(...) __riscv_vmacc_vx_i32mf2_tumu(__VA_ARGS__)

#define	vmacc_vx_i64m1(...) __riscv_vmacc_vx_i64m1_tu(__VA_ARGS__)

#define	vmacc_vx_i64m1_m(...) __riscv_vmacc_vx_i64m1_tumu(__VA_ARGS__)

#define	vmacc_vx_i64m2(...) __riscv_vmacc_vx_i64m2_tu(__VA_ARGS__)

#define	vmacc_vx_i64m2_m(...) __riscv_vmacc_vx_i64m2_tumu(__VA_ARGS__)

#define	vmacc_vx_i64m4(...) __riscv_vmacc_vx_i64m4_tu(__VA_ARGS__)

#define	vmacc_vx_i64m4_m(...) __riscv_vmacc_vx_i64m4_tumu(__VA_ARGS__)

#define	vmacc_vx_i64m8(...) __riscv_vmacc_vx_i64m8_tu(__VA_ARGS__)

#define	vmacc_vx_i64m8_m(...) __riscv_vmacc_vx_i64m8_tumu(__VA_ARGS__)

#define	vmacc_vx_i8m1(...) __riscv_vmacc_vx_i8m1_tu(__VA_ARGS__)

#define	vmacc_vx_i8m1_m(...) __riscv_vmacc_vx_i8m1_tumu(__VA_ARGS__)

#define	vmacc_vx_i8m2(...) __riscv_vmacc_vx_i8m2_tu(__VA_ARGS__)

#define	vmacc_vx_i8m2_m(...) __riscv_vmacc_vx_i8m2_tumu(__VA_ARGS__)

#define	vmacc_vx_i8m4(...) __riscv_vmacc_vx_i8m4_tu(__VA_ARGS__)

#define	vmacc_vx_i8m4_m(...) __riscv_vmacc_vx_i8m4_tumu(__VA_ARGS__)

#define	vmacc_vx_i8m8(...) __riscv_vmacc_vx_i8m8_tu(__VA_ARGS__)

#define	vmacc_vx_i8m8_m(...) __riscv_vmacc_vx_i8m8_tumu(__VA_ARGS__)

#define	vmacc_vx_i8mf2(...) __riscv_vmacc_vx_i8mf2_tu(__VA_ARGS__)

#define	vmacc_vx_i8mf2_m(...) __riscv_vmacc_vx_i8mf2_tumu(__VA_ARGS__)

#define	vmacc_vx_i8mf4(...) __riscv_vmacc_vx_i8mf4_tu(__VA_ARGS__)

#define	vmacc_vx_i8mf4_m(...) __riscv_vmacc_vx_i8mf4_tumu(__VA_ARGS__)

#define	vmacc_vx_i8mf8(...) __riscv_vmacc_vx_i8mf8_tu(__VA_ARGS__)

#define	vmacc_vx_i8mf8_m(...) __riscv_vmacc_vx_i8mf8_tumu(__VA_ARGS__)

#define	vmacc_vx_u16m1(...) __riscv_vmacc_vx_u16m1_tu(__VA_ARGS__)

#define	vmacc_vx_u16m1_m(...) __riscv_vmacc_vx_u16m1_tumu(__VA_ARGS__)

#define	vmacc_vx_u16m2(...) __riscv_vmacc_vx_u16m2_tu(__VA_ARGS__)

#define	vmacc_vx_u16m2_m(...) __riscv_vmacc_vx_u16m2_tumu(__VA_ARGS__)

#define	vmacc_vx_u16m4(...) __riscv_vmacc_vx_u16m4_tu(__VA_ARGS__)

#define	vmacc_vx_u16m4_m(...) __riscv_vmacc_vx_u16m4_tumu(__VA_ARGS__)

#define	vmacc_vx_u16m8(...) __riscv_vmacc_vx_u16m8_tu(__VA_ARGS__)

#define	vmacc_vx_u16m8_m(...) __riscv_vmacc_vx_u16m8_tumu(__VA_ARGS__)

#define	vmacc_vx_u16mf2(...) __riscv_vmacc_vx_u16mf2_tu(__VA_ARGS__)

#define	vmacc_vx_u16mf2_m(...) __riscv_vmacc_vx_u16mf2_tumu(__VA_ARGS__)

#define	vmacc_vx_u16mf4(...) __riscv_vmacc_vx_u16mf4_tu(__VA_ARGS__)

#define	vmacc_vx_u16mf4_m(...) __riscv_vmacc_vx_u16mf4_tumu(__VA_ARGS__)

#define	vmacc_vx_u32m1(...) __riscv_vmacc_vx_u32m1_tu(__VA_ARGS__)

#define	vmacc_vx_u32m1_m(...) __riscv_vmacc_vx_u32m1_tumu(__VA_ARGS__)

#define	vmacc_vx_u32m2(...) __riscv_vmacc_vx_u32m2_tu(__VA_ARGS__)

#define	vmacc_vx_u32m2_m(...) __riscv_vmacc_vx_u32m2_tumu(__VA_ARGS__)

#define	vmacc_vx_u32m4(...) __riscv_vmacc_vx_u32m4_tu(__VA_ARGS__)

#define	vmacc_vx_u32m4_m(...) __riscv_vmacc_vx_u32m4_tumu(__VA_ARGS__)

#define	vmacc_vx_u32m8(...) __riscv_vmacc_vx_u32m8_tu(__VA_ARGS__)

#define	vmacc_vx_u32m8_m(...) __riscv_vmacc_vx_u32m8_tumu(__VA_ARGS__)

#define	vmacc_vx_u32mf2(...) __riscv_vmacc_vx_u32mf2_tu(__VA_ARGS__)

#define	vmacc_vx_u32mf2_m(...) __riscv_vmacc_vx_u32mf2_tumu(__VA_ARGS__)

#define	vmacc_vx_u64m1(...) __riscv_vmacc_vx_u64m1_tu(__VA_ARGS__)

#define	vmacc_vx_u64m1_m(...) __riscv_vmacc_vx_u64m1_tumu(__VA_ARGS__)

#define	vmacc_vx_u64m2(...) __riscv_vmacc_vx_u64m2_tu(__VA_ARGS__)

#define	vmacc_vx_u64m2_m(...) __riscv_vmacc_vx_u64m2_tumu(__VA_ARGS__)

#define	vmacc_vx_u64m4(...) __riscv_vmacc_vx_u64m4_tu(__VA_ARGS__)

#define	vmacc_vx_u64m4_m(...) __riscv_vmacc_vx_u64m4_tumu(__VA_ARGS__)

#define	vmacc_vx_u64m8(...) __riscv_vmacc_vx_u64m8_tu(__VA_ARGS__)

#define	vmacc_vx_u64m8_m(...) __riscv_vmacc_vx_u64m8_tumu(__VA_ARGS__)

#define	vmacc_vx_u8m1(...) __riscv_vmacc_vx_u8m1_tu(__VA_ARGS__)

#define	vmacc_vx_u8m1_m(...) __riscv_vmacc_vx_u8m1_tumu(__VA_ARGS__)

#define	vmacc_vx_u8m2(...) __riscv_vmacc_vx_u8m2_tu(__VA_ARGS__)

#define	vmacc_vx_u8m2_m(...) __riscv_vmacc_vx_u8m2_tumu(__VA_ARGS__)

#define	vmacc_vx_u8m4(...) __riscv_vmacc_vx_u8m4_tu(__VA_ARGS__)

#define	vmacc_vx_u8m4_m(...) __riscv_vmacc_vx_u8m4_tumu(__VA_ARGS__)

#define	vmacc_vx_u8m8(...) __riscv_vmacc_vx_u8m8_tu(__VA_ARGS__)

#define	vmacc_vx_u8m8_m(...) __riscv_vmacc_vx_u8m8_tumu(__VA_ARGS__)

#define	vmacc_vx_u8mf2(...) __riscv_vmacc_vx_u8mf2_tu(__VA_ARGS__)

#define	vmacc_vx_u8mf2_m(...) __riscv_vmacc_vx_u8mf2_tumu(__VA_ARGS__)

#define	vmacc_vx_u8mf4(...) __riscv_vmacc_vx_u8mf4_tu(__VA_ARGS__)

#define	vmacc_vx_u8mf4_m(...) __riscv_vmacc_vx_u8mf4_tumu(__VA_ARGS__)

#define	vmacc_vx_u8mf8(...) __riscv_vmacc_vx_u8mf8_tu(__VA_ARGS__)

#define	vmacc_vx_u8mf8_m(...) __riscv_vmacc_vx_u8mf8_tumu(__VA_ARGS__)

#define	vmadc_vv_i16m1_b16(...) __riscv_vmadc_vv_i16m1_b16(__VA_ARGS__)

#define	vmadc_vv_i16m2_b8(...) __riscv_vmadc_vv_i16m2_b8(__VA_ARGS__)

#define	vmadc_vv_i16m4_b4(...) __riscv_vmadc_vv_i16m4_b4(__VA_ARGS__)

#define	vmadc_vv_i16m8_b2(...) __riscv_vmadc_vv_i16m8_b2(__VA_ARGS__)

#define	vmadc_vv_i16mf2_b32(...) __riscv_vmadc_vv_i16mf2_b32(__VA_ARGS__)

#define	vmadc_vv_i16mf4_b64(...) __riscv_vmadc_vv_i16mf4_b64(__VA_ARGS__)

#define	vmadc_vv_i32m1_b32(...) __riscv_vmadc_vv_i32m1_b32(__VA_ARGS__)

#define	vmadc_vv_i32m2_b16(...) __riscv_vmadc_vv_i32m2_b16(__VA_ARGS__)

#define	vmadc_vv_i32m4_b8(...) __riscv_vmadc_vv_i32m4_b8(__VA_ARGS__)

#define	vmadc_vv_i32m8_b4(...) __riscv_vmadc_vv_i32m8_b4(__VA_ARGS__)

#define	vmadc_vv_i32mf2_b64(...) __riscv_vmadc_vv_i32mf2_b64(__VA_ARGS__)

#define	vmadc_vv_i64m1_b64(...) __riscv_vmadc_vv_i64m1_b64(__VA_ARGS__)

#define	vmadc_vv_i64m2_b32(...) __riscv_vmadc_vv_i64m2_b32(__VA_ARGS__)

#define	vmadc_vv_i64m4_b16(...) __riscv_vmadc_vv_i64m4_b16(__VA_ARGS__)

#define	vmadc_vv_i64m8_b8(...) __riscv_vmadc_vv_i64m8_b8(__VA_ARGS__)

#define	vmadc_vv_i8m1_b8(...) __riscv_vmadc_vv_i8m1_b8(__VA_ARGS__)

#define	vmadc_vv_i8m2_b4(...) __riscv_vmadc_vv_i8m2_b4(__VA_ARGS__)

#define	vmadc_vv_i8m4_b2(...) __riscv_vmadc_vv_i8m4_b2(__VA_ARGS__)

#define	vmadc_vv_i8m8_b1(...) __riscv_vmadc_vv_i8m8_b1(__VA_ARGS__)

#define	vmadc_vv_i8mf2_b16(...) __riscv_vmadc_vv_i8mf2_b16(__VA_ARGS__)

#define	vmadc_vv_i8mf4_b32(...) __riscv_vmadc_vv_i8mf4_b32(__VA_ARGS__)

#define	vmadc_vv_i8mf8_b64(...) __riscv_vmadc_vv_i8mf8_b64(__VA_ARGS__)

#define	vmadc_vv_u16m1_b16(...) __riscv_vmadc_vv_u16m1_b16(__VA_ARGS__)

#define	vmadc_vv_u16m2_b8(...) __riscv_vmadc_vv_u16m2_b8(__VA_ARGS__)

#define	vmadc_vv_u16m4_b4(...) __riscv_vmadc_vv_u16m4_b4(__VA_ARGS__)

#define	vmadc_vv_u16m8_b2(...) __riscv_vmadc_vv_u16m8_b2(__VA_ARGS__)

#define	vmadc_vv_u16mf2_b32(...) __riscv_vmadc_vv_u16mf2_b32(__VA_ARGS__)

#define	vmadc_vv_u16mf4_b64(...) __riscv_vmadc_vv_u16mf4_b64(__VA_ARGS__)

#define	vmadc_vv_u32m1_b32(...) __riscv_vmadc_vv_u32m1_b32(__VA_ARGS__)

#define	vmadc_vv_u32m2_b16(...) __riscv_vmadc_vv_u32m2_b16(__VA_ARGS__)

#define	vmadc_vv_u32m4_b8(...) __riscv_vmadc_vv_u32m4_b8(__VA_ARGS__)

#define	vmadc_vv_u32m8_b4(...) __riscv_vmadc_vv_u32m8_b4(__VA_ARGS__)

#define	vmadc_vv_u32mf2_b64(...) __riscv_vmadc_vv_u32mf2_b64(__VA_ARGS__)

#define	vmadc_vv_u64m1_b64(...) __riscv_vmadc_vv_u64m1_b64(__VA_ARGS__)

#define	vmadc_vv_u64m2_b32(...) __riscv_vmadc_vv_u64m2_b32(__VA_ARGS__)

#define	vmadc_vv_u64m4_b16(...) __riscv_vmadc_vv_u64m4_b16(__VA_ARGS__)

#define	vmadc_vv_u64m8_b8(...) __riscv_vmadc_vv_u64m8_b8(__VA_ARGS__)

#define	vmadc_vv_u8m1_b8(...) __riscv_vmadc_vv_u8m1_b8(__VA_ARGS__)

#define	vmadc_vv_u8m2_b4(...) __riscv_vmadc_vv_u8m2_b4(__VA_ARGS__)

#define	vmadc_vv_u8m4_b2(...) __riscv_vmadc_vv_u8m4_b2(__VA_ARGS__)

#define	vmadc_vv_u8m8_b1(...) __riscv_vmadc_vv_u8m8_b1(__VA_ARGS__)

#define	vmadc_vv_u8mf2_b16(...) __riscv_vmadc_vv_u8mf2_b16(__VA_ARGS__)

#define	vmadc_vv_u8mf4_b32(...) __riscv_vmadc_vv_u8mf4_b32(__VA_ARGS__)

#define	vmadc_vv_u8mf8_b64(...) __riscv_vmadc_vv_u8mf8_b64(__VA_ARGS__)

#define	vmadc_vvm_i16m1_b16(...) __riscv_vmadc_vvm_i16m1_b16(__VA_ARGS__)

#define	vmadc_vvm_i16m2_b8(...) __riscv_vmadc_vvm_i16m2_b8(__VA_ARGS__)

#define	vmadc_vvm_i16m4_b4(...) __riscv_vmadc_vvm_i16m4_b4(__VA_ARGS__)

#define	vmadc_vvm_i16m8_b2(...) __riscv_vmadc_vvm_i16m8_b2(__VA_ARGS__)

#define	vmadc_vvm_i16mf2_b32(...) __riscv_vmadc_vvm_i16mf2_b32(__VA_ARGS__)

#define	vmadc_vvm_i16mf4_b64(...) __riscv_vmadc_vvm_i16mf4_b64(__VA_ARGS__)

#define	vmadc_vvm_i32m1_b32(...) __riscv_vmadc_vvm_i32m1_b32(__VA_ARGS__)

#define	vmadc_vvm_i32m2_b16(...) __riscv_vmadc_vvm_i32m2_b16(__VA_ARGS__)

#define	vmadc_vvm_i32m4_b8(...) __riscv_vmadc_vvm_i32m4_b8(__VA_ARGS__)

#define	vmadc_vvm_i32m8_b4(...) __riscv_vmadc_vvm_i32m8_b4(__VA_ARGS__)

#define	vmadc_vvm_i32mf2_b64(...) __riscv_vmadc_vvm_i32mf2_b64(__VA_ARGS__)

#define	vmadc_vvm_i64m1_b64(...) __riscv_vmadc_vvm_i64m1_b64(__VA_ARGS__)

#define	vmadc_vvm_i64m2_b32(...) __riscv_vmadc_vvm_i64m2_b32(__VA_ARGS__)

#define	vmadc_vvm_i64m4_b16(...) __riscv_vmadc_vvm_i64m4_b16(__VA_ARGS__)

#define	vmadc_vvm_i64m8_b8(...) __riscv_vmadc_vvm_i64m8_b8(__VA_ARGS__)

#define	vmadc_vvm_i8m1_b8(...) __riscv_vmadc_vvm_i8m1_b8(__VA_ARGS__)

#define	vmadc_vvm_i8m2_b4(...) __riscv_vmadc_vvm_i8m2_b4(__VA_ARGS__)

#define	vmadc_vvm_i8m4_b2(...) __riscv_vmadc_vvm_i8m4_b2(__VA_ARGS__)

#define	vmadc_vvm_i8m8_b1(...) __riscv_vmadc_vvm_i8m8_b1(__VA_ARGS__)

#define	vmadc_vvm_i8mf2_b16(...) __riscv_vmadc_vvm_i8mf2_b16(__VA_ARGS__)

#define	vmadc_vvm_i8mf4_b32(...) __riscv_vmadc_vvm_i8mf4_b32(__VA_ARGS__)

#define	vmadc_vvm_i8mf8_b64(...) __riscv_vmadc_vvm_i8mf8_b64(__VA_ARGS__)

#define	vmadc_vvm_u16m1_b16(...) __riscv_vmadc_vvm_u16m1_b16(__VA_ARGS__)

#define	vmadc_vvm_u16m2_b8(...) __riscv_vmadc_vvm_u16m2_b8(__VA_ARGS__)

#define	vmadc_vvm_u16m4_b4(...) __riscv_vmadc_vvm_u16m4_b4(__VA_ARGS__)

#define	vmadc_vvm_u16m8_b2(...) __riscv_vmadc_vvm_u16m8_b2(__VA_ARGS__)

#define	vmadc_vvm_u16mf2_b32(...) __riscv_vmadc_vvm_u16mf2_b32(__VA_ARGS__)

#define	vmadc_vvm_u16mf4_b64(...) __riscv_vmadc_vvm_u16mf4_b64(__VA_ARGS__)

#define	vmadc_vvm_u32m1_b32(...) __riscv_vmadc_vvm_u32m1_b32(__VA_ARGS__)

#define	vmadc_vvm_u32m2_b16(...) __riscv_vmadc_vvm_u32m2_b16(__VA_ARGS__)

#define	vmadc_vvm_u32m4_b8(...) __riscv_vmadc_vvm_u32m4_b8(__VA_ARGS__)

#define	vmadc_vvm_u32m8_b4(...) __riscv_vmadc_vvm_u32m8_b4(__VA_ARGS__)

#define	vmadc_vvm_u32mf2_b64(...) __riscv_vmadc_vvm_u32mf2_b64(__VA_ARGS__)

#define	vmadc_vvm_u64m1_b64(...) __riscv_vmadc_vvm_u64m1_b64(__VA_ARGS__)

#define	vmadc_vvm_u64m2_b32(...) __riscv_vmadc_vvm_u64m2_b32(__VA_ARGS__)

#define	vmadc_vvm_u64m4_b16(...) __riscv_vmadc_vvm_u64m4_b16(__VA_ARGS__)

#define	vmadc_vvm_u64m8_b8(...) __riscv_vmadc_vvm_u64m8_b8(__VA_ARGS__)

#define	vmadc_vvm_u8m1_b8(...) __riscv_vmadc_vvm_u8m1_b8(__VA_ARGS__)

#define	vmadc_vvm_u8m2_b4(...) __riscv_vmadc_vvm_u8m2_b4(__VA_ARGS__)

#define	vmadc_vvm_u8m4_b2(...) __riscv_vmadc_vvm_u8m4_b2(__VA_ARGS__)

#define	vmadc_vvm_u8m8_b1(...) __riscv_vmadc_vvm_u8m8_b1(__VA_ARGS__)

#define	vmadc_vvm_u8mf2_b16(...) __riscv_vmadc_vvm_u8mf2_b16(__VA_ARGS__)

#define	vmadc_vvm_u8mf4_b32(...) __riscv_vmadc_vvm_u8mf4_b32(__VA_ARGS__)

#define	vmadc_vvm_u8mf8_b64(...) __riscv_vmadc_vvm_u8mf8_b64(__VA_ARGS__)

#define	vmadc_vx_i16m1_b16(...) __riscv_vmadc_vx_i16m1_b16(__VA_ARGS__)

#define	vmadc_vx_i16m2_b8(...) __riscv_vmadc_vx_i16m2_b8(__VA_ARGS__)

#define	vmadc_vx_i16m4_b4(...) __riscv_vmadc_vx_i16m4_b4(__VA_ARGS__)

#define	vmadc_vx_i16m8_b2(...) __riscv_vmadc_vx_i16m8_b2(__VA_ARGS__)

#define	vmadc_vx_i16mf2_b32(...) __riscv_vmadc_vx_i16mf2_b32(__VA_ARGS__)

#define	vmadc_vx_i16mf4_b64(...) __riscv_vmadc_vx_i16mf4_b64(__VA_ARGS__)

#define	vmadc_vx_i32m1_b32(...) __riscv_vmadc_vx_i32m1_b32(__VA_ARGS__)

#define	vmadc_vx_i32m2_b16(...) __riscv_vmadc_vx_i32m2_b16(__VA_ARGS__)

#define	vmadc_vx_i32m4_b8(...) __riscv_vmadc_vx_i32m4_b8(__VA_ARGS__)

#define	vmadc_vx_i32m8_b4(...) __riscv_vmadc_vx_i32m8_b4(__VA_ARGS__)

#define	vmadc_vx_i32mf2_b64(...) __riscv_vmadc_vx_i32mf2_b64(__VA_ARGS__)

#define	vmadc_vx_i64m1_b64(...) __riscv_vmadc_vx_i64m1_b64(__VA_ARGS__)

#define	vmadc_vx_i64m2_b32(...) __riscv_vmadc_vx_i64m2_b32(__VA_ARGS__)

#define	vmadc_vx_i64m4_b16(...) __riscv_vmadc_vx_i64m4_b16(__VA_ARGS__)

#define	vmadc_vx_i64m8_b8(...) __riscv_vmadc_vx_i64m8_b8(__VA_ARGS__)

#define	vmadc_vx_i8m1_b8(...) __riscv_vmadc_vx_i8m1_b8(__VA_ARGS__)

#define	vmadc_vx_i8m2_b4(...) __riscv_vmadc_vx_i8m2_b4(__VA_ARGS__)

#define	vmadc_vx_i8m4_b2(...) __riscv_vmadc_vx_i8m4_b2(__VA_ARGS__)

#define	vmadc_vx_i8m8_b1(...) __riscv_vmadc_vx_i8m8_b1(__VA_ARGS__)

#define	vmadc_vx_i8mf2_b16(...) __riscv_vmadc_vx_i8mf2_b16(__VA_ARGS__)

#define	vmadc_vx_i8mf4_b32(...) __riscv_vmadc_vx_i8mf4_b32(__VA_ARGS__)

#define	vmadc_vx_i8mf8_b64(...) __riscv_vmadc_vx_i8mf8_b64(__VA_ARGS__)

#define	vmadc_vx_u16m1_b16(...) __riscv_vmadc_vx_u16m1_b16(__VA_ARGS__)

#define	vmadc_vx_u16m2_b8(...) __riscv_vmadc_vx_u16m2_b8(__VA_ARGS__)

#define	vmadc_vx_u16m4_b4(...) __riscv_vmadc_vx_u16m4_b4(__VA_ARGS__)

#define	vmadc_vx_u16m8_b2(...) __riscv_vmadc_vx_u16m8_b2(__VA_ARGS__)

#define	vmadc_vx_u16mf2_b32(...) __riscv_vmadc_vx_u16mf2_b32(__VA_ARGS__)

#define	vmadc_vx_u16mf4_b64(...) __riscv_vmadc_vx_u16mf4_b64(__VA_ARGS__)

#define	vmadc_vx_u32m1_b32(...) __riscv_vmadc_vx_u32m1_b32(__VA_ARGS__)

#define	vmadc_vx_u32m2_b16(...) __riscv_vmadc_vx_u32m2_b16(__VA_ARGS__)

#define	vmadc_vx_u32m4_b8(...) __riscv_vmadc_vx_u32m4_b8(__VA_ARGS__)

#define	vmadc_vx_u32m8_b4(...) __riscv_vmadc_vx_u32m8_b4(__VA_ARGS__)

#define	vmadc_vx_u32mf2_b64(...) __riscv_vmadc_vx_u32mf2_b64(__VA_ARGS__)

#define	vmadc_vx_u64m1_b64(...) __riscv_vmadc_vx_u64m1_b64(__VA_ARGS__)

#define	vmadc_vx_u64m2_b32(...) __riscv_vmadc_vx_u64m2_b32(__VA_ARGS__)

#define	vmadc_vx_u64m4_b16(...) __riscv_vmadc_vx_u64m4_b16(__VA_ARGS__)

#define	vmadc_vx_u64m8_b8(...) __riscv_vmadc_vx_u64m8_b8(__VA_ARGS__)

#define	vmadc_vx_u8m1_b8(...) __riscv_vmadc_vx_u8m1_b8(__VA_ARGS__)

#define	vmadc_vx_u8m2_b4(...) __riscv_vmadc_vx_u8m2_b4(__VA_ARGS__)

#define	vmadc_vx_u8m4_b2(...) __riscv_vmadc_vx_u8m4_b2(__VA_ARGS__)

#define	vmadc_vx_u8m8_b1(...) __riscv_vmadc_vx_u8m8_b1(__VA_ARGS__)

#define	vmadc_vx_u8mf2_b16(...) __riscv_vmadc_vx_u8mf2_b16(__VA_ARGS__)

#define	vmadc_vx_u8mf4_b32(...) __riscv_vmadc_vx_u8mf4_b32(__VA_ARGS__)

#define	vmadc_vx_u8mf8_b64(...) __riscv_vmadc_vx_u8mf8_b64(__VA_ARGS__)

#define	vmadc_vxm_i16m1_b16(...) __riscv_vmadc_vxm_i16m1_b16(__VA_ARGS__)

#define	vmadc_vxm_i16m2_b8(...) __riscv_vmadc_vxm_i16m2_b8(__VA_ARGS__)

#define	vmadc_vxm_i16m4_b4(...) __riscv_vmadc_vxm_i16m4_b4(__VA_ARGS__)

#define	vmadc_vxm_i16m8_b2(...) __riscv_vmadc_vxm_i16m8_b2(__VA_ARGS__)

#define	vmadc_vxm_i16mf2_b32(...) __riscv_vmadc_vxm_i16mf2_b32(__VA_ARGS__)

#define	vmadc_vxm_i16mf4_b64(...) __riscv_vmadc_vxm_i16mf4_b64(__VA_ARGS__)

#define	vmadc_vxm_i32m1_b32(...) __riscv_vmadc_vxm_i32m1_b32(__VA_ARGS__)

#define	vmadc_vxm_i32m2_b16(...) __riscv_vmadc_vxm_i32m2_b16(__VA_ARGS__)

#define	vmadc_vxm_i32m4_b8(...) __riscv_vmadc_vxm_i32m4_b8(__VA_ARGS__)

#define	vmadc_vxm_i32m8_b4(...) __riscv_vmadc_vxm_i32m8_b4(__VA_ARGS__)

#define	vmadc_vxm_i32mf2_b64(...) __riscv_vmadc_vxm_i32mf2_b64(__VA_ARGS__)

#define	vmadc_vxm_i64m1_b64(...) __riscv_vmadc_vxm_i64m1_b64(__VA_ARGS__)

#define	vmadc_vxm_i64m2_b32(...) __riscv_vmadc_vxm_i64m2_b32(__VA_ARGS__)

#define	vmadc_vxm_i64m4_b16(...) __riscv_vmadc_vxm_i64m4_b16(__VA_ARGS__)

#define	vmadc_vxm_i64m8_b8(...) __riscv_vmadc_vxm_i64m8_b8(__VA_ARGS__)

#define	vmadc_vxm_i8m1_b8(...) __riscv_vmadc_vxm_i8m1_b8(__VA_ARGS__)

#define	vmadc_vxm_i8m2_b4(...) __riscv_vmadc_vxm_i8m2_b4(__VA_ARGS__)

#define	vmadc_vxm_i8m4_b2(...) __riscv_vmadc_vxm_i8m4_b2(__VA_ARGS__)

#define	vmadc_vxm_i8m8_b1(...) __riscv_vmadc_vxm_i8m8_b1(__VA_ARGS__)

#define	vmadc_vxm_i8mf2_b16(...) __riscv_vmadc_vxm_i8mf2_b16(__VA_ARGS__)

#define	vmadc_vxm_i8mf4_b32(...) __riscv_vmadc_vxm_i8mf4_b32(__VA_ARGS__)

#define	vmadc_vxm_i8mf8_b64(...) __riscv_vmadc_vxm_i8mf8_b64(__VA_ARGS__)

#define	vmadc_vxm_u16m1_b16(...) __riscv_vmadc_vxm_u16m1_b16(__VA_ARGS__)

#define	vmadc_vxm_u16m2_b8(...) __riscv_vmadc_vxm_u16m2_b8(__VA_ARGS__)

#define	vmadc_vxm_u16m4_b4(...) __riscv_vmadc_vxm_u16m4_b4(__VA_ARGS__)

#define	vmadc_vxm_u16m8_b2(...) __riscv_vmadc_vxm_u16m8_b2(__VA_ARGS__)

#define	vmadc_vxm_u16mf2_b32(...) __riscv_vmadc_vxm_u16mf2_b32(__VA_ARGS__)

#define	vmadc_vxm_u16mf4_b64(...) __riscv_vmadc_vxm_u16mf4_b64(__VA_ARGS__)

#define	vmadc_vxm_u32m1_b32(...) __riscv_vmadc_vxm_u32m1_b32(__VA_ARGS__)

#define	vmadc_vxm_u32m2_b16(...) __riscv_vmadc_vxm_u32m2_b16(__VA_ARGS__)

#define	vmadc_vxm_u32m4_b8(...) __riscv_vmadc_vxm_u32m4_b8(__VA_ARGS__)

#define	vmadc_vxm_u32m8_b4(...) __riscv_vmadc_vxm_u32m8_b4(__VA_ARGS__)

#define	vmadc_vxm_u32mf2_b64(...) __riscv_vmadc_vxm_u32mf2_b64(__VA_ARGS__)

#define	vmadc_vxm_u64m1_b64(...) __riscv_vmadc_vxm_u64m1_b64(__VA_ARGS__)

#define	vmadc_vxm_u64m2_b32(...) __riscv_vmadc_vxm_u64m2_b32(__VA_ARGS__)

#define	vmadc_vxm_u64m4_b16(...) __riscv_vmadc_vxm_u64m4_b16(__VA_ARGS__)

#define	vmadc_vxm_u64m8_b8(...) __riscv_vmadc_vxm_u64m8_b8(__VA_ARGS__)

#define	vmadc_vxm_u8m1_b8(...) __riscv_vmadc_vxm_u8m1_b8(__VA_ARGS__)

#define	vmadc_vxm_u8m2_b4(...) __riscv_vmadc_vxm_u8m2_b4(__VA_ARGS__)

#define	vmadc_vxm_u8m4_b2(...) __riscv_vmadc_vxm_u8m4_b2(__VA_ARGS__)

#define	vmadc_vxm_u8m8_b1(...) __riscv_vmadc_vxm_u8m8_b1(__VA_ARGS__)

#define	vmadc_vxm_u8mf2_b16(...) __riscv_vmadc_vxm_u8mf2_b16(__VA_ARGS__)

#define	vmadc_vxm_u8mf4_b32(...) __riscv_vmadc_vxm_u8mf4_b32(__VA_ARGS__)

#define	vmadc_vxm_u8mf8_b64(...) __riscv_vmadc_vxm_u8mf8_b64(__VA_ARGS__)

#define	vmadd_vv_i16m1(...) __riscv_vmadd_vv_i16m1_tu(__VA_ARGS__)

#define	vmadd_vv_i16m1_m(...) __riscv_vmadd_vv_i16m1_tumu(__VA_ARGS__)

#define	vmadd_vv_i16m2(...) __riscv_vmadd_vv_i16m2_tu(__VA_ARGS__)

#define	vmadd_vv_i16m2_m(...) __riscv_vmadd_vv_i16m2_tumu(__VA_ARGS__)

#define	vmadd_vv_i16m4(...) __riscv_vmadd_vv_i16m4_tu(__VA_ARGS__)

#define	vmadd_vv_i16m4_m(...) __riscv_vmadd_vv_i16m4_tumu(__VA_ARGS__)

#define	vmadd_vv_i16m8(...) __riscv_vmadd_vv_i16m8_tu(__VA_ARGS__)

#define	vmadd_vv_i16m8_m(...) __riscv_vmadd_vv_i16m8_tumu(__VA_ARGS__)

#define	vmadd_vv_i16mf2(...) __riscv_vmadd_vv_i16mf2_tu(__VA_ARGS__)

#define	vmadd_vv_i16mf2_m(...) __riscv_vmadd_vv_i16mf2_tumu(__VA_ARGS__)

#define	vmadd_vv_i16mf4(...) __riscv_vmadd_vv_i16mf4_tu(__VA_ARGS__)

#define	vmadd_vv_i16mf4_m(...) __riscv_vmadd_vv_i16mf4_tumu(__VA_ARGS__)

#define	vmadd_vv_i32m1(...) __riscv_vmadd_vv_i32m1_tu(__VA_ARGS__)

#define	vmadd_vv_i32m1_m(...) __riscv_vmadd_vv_i32m1_tumu(__VA_ARGS__)

#define	vmadd_vv_i32m2(...) __riscv_vmadd_vv_i32m2_tu(__VA_ARGS__)

#define	vmadd_vv_i32m2_m(...) __riscv_vmadd_vv_i32m2_tumu(__VA_ARGS__)

#define	vmadd_vv_i32m4(...) __riscv_vmadd_vv_i32m4_tu(__VA_ARGS__)

#define	vmadd_vv_i32m4_m(...) __riscv_vmadd_vv_i32m4_tumu(__VA_ARGS__)

#define	vmadd_vv_i32m8(...) __riscv_vmadd_vv_i32m8_tu(__VA_ARGS__)

#define	vmadd_vv_i32m8_m(...) __riscv_vmadd_vv_i32m8_tumu(__VA_ARGS__)

#define	vmadd_vv_i32mf2(...) __riscv_vmadd_vv_i32mf2_tu(__VA_ARGS__)

#define	vmadd_vv_i32mf2_m(...) __riscv_vmadd_vv_i32mf2_tumu(__VA_ARGS__)

#define	vmadd_vv_i64m1(...) __riscv_vmadd_vv_i64m1_tu(__VA_ARGS__)

#define	vmadd_vv_i64m1_m(...) __riscv_vmadd_vv_i64m1_tumu(__VA_ARGS__)

#define	vmadd_vv_i64m2(...) __riscv_vmadd_vv_i64m2_tu(__VA_ARGS__)

#define	vmadd_vv_i64m2_m(...) __riscv_vmadd_vv_i64m2_tumu(__VA_ARGS__)

#define	vmadd_vv_i64m4(...) __riscv_vmadd_vv_i64m4_tu(__VA_ARGS__)

#define	vmadd_vv_i64m4_m(...) __riscv_vmadd_vv_i64m4_tumu(__VA_ARGS__)

#define	vmadd_vv_i64m8(...) __riscv_vmadd_vv_i64m8_tu(__VA_ARGS__)

#define	vmadd_vv_i64m8_m(...) __riscv_vmadd_vv_i64m8_tumu(__VA_ARGS__)

#define	vmadd_vv_i8m1(...) __riscv_vmadd_vv_i8m1_tu(__VA_ARGS__)

#define	vmadd_vv_i8m1_m(...) __riscv_vmadd_vv_i8m1_tumu(__VA_ARGS__)

#define	vmadd_vv_i8m2(...) __riscv_vmadd_vv_i8m2_tu(__VA_ARGS__)

#define	vmadd_vv_i8m2_m(...) __riscv_vmadd_vv_i8m2_tumu(__VA_ARGS__)

#define	vmadd_vv_i8m4(...) __riscv_vmadd_vv_i8m4_tu(__VA_ARGS__)

#define	vmadd_vv_i8m4_m(...) __riscv_vmadd_vv_i8m4_tumu(__VA_ARGS__)

#define	vmadd_vv_i8m8(...) __riscv_vmadd_vv_i8m8_tu(__VA_ARGS__)

#define	vmadd_vv_i8m8_m(...) __riscv_vmadd_vv_i8m8_tumu(__VA_ARGS__)

#define	vmadd_vv_i8mf2(...) __riscv_vmadd_vv_i8mf2_tu(__VA_ARGS__)

#define	vmadd_vv_i8mf2_m(...) __riscv_vmadd_vv_i8mf2_tumu(__VA_ARGS__)

#define	vmadd_vv_i8mf4(...) __riscv_vmadd_vv_i8mf4_tu(__VA_ARGS__)

#define	vmadd_vv_i8mf4_m(...) __riscv_vmadd_vv_i8mf4_tumu(__VA_ARGS__)

#define	vmadd_vv_i8mf8(...) __riscv_vmadd_vv_i8mf8_tu(__VA_ARGS__)

#define	vmadd_vv_i8mf8_m(...) __riscv_vmadd_vv_i8mf8_tumu(__VA_ARGS__)

#define	vmadd_vv_u16m1(...) __riscv_vmadd_vv_u16m1_tu(__VA_ARGS__)

#define	vmadd_vv_u16m1_m(...) __riscv_vmadd_vv_u16m1_tumu(__VA_ARGS__)

#define	vmadd_vv_u16m2(...) __riscv_vmadd_vv_u16m2_tu(__VA_ARGS__)

#define	vmadd_vv_u16m2_m(...) __riscv_vmadd_vv_u16m2_tumu(__VA_ARGS__)

#define	vmadd_vv_u16m4(...) __riscv_vmadd_vv_u16m4_tu(__VA_ARGS__)

#define	vmadd_vv_u16m4_m(...) __riscv_vmadd_vv_u16m4_tumu(__VA_ARGS__)

#define	vmadd_vv_u16m8(...) __riscv_vmadd_vv_u16m8_tu(__VA_ARGS__)

#define	vmadd_vv_u16m8_m(...) __riscv_vmadd_vv_u16m8_tumu(__VA_ARGS__)

#define	vmadd_vv_u16mf2(...) __riscv_vmadd_vv_u16mf2_tu(__VA_ARGS__)

#define	vmadd_vv_u16mf2_m(...) __riscv_vmadd_vv_u16mf2_tumu(__VA_ARGS__)

#define	vmadd_vv_u16mf4(...) __riscv_vmadd_vv_u16mf4_tu(__VA_ARGS__)

#define	vmadd_vv_u16mf4_m(...) __riscv_vmadd_vv_u16mf4_tumu(__VA_ARGS__)

#define	vmadd_vv_u32m1(...) __riscv_vmadd_vv_u32m1_tu(__VA_ARGS__)

#define	vmadd_vv_u32m1_m(...) __riscv_vmadd_vv_u32m1_tumu(__VA_ARGS__)

#define	vmadd_vv_u32m2(...) __riscv_vmadd_vv_u32m2_tu(__VA_ARGS__)

#define	vmadd_vv_u32m2_m(...) __riscv_vmadd_vv_u32m2_tumu(__VA_ARGS__)

#define	vmadd_vv_u32m4(...) __riscv_vmadd_vv_u32m4_tu(__VA_ARGS__)

#define	vmadd_vv_u32m4_m(...) __riscv_vmadd_vv_u32m4_tumu(__VA_ARGS__)

#define	vmadd_vv_u32m8(...) __riscv_vmadd_vv_u32m8_tu(__VA_ARGS__)

#define	vmadd_vv_u32m8_m(...) __riscv_vmadd_vv_u32m8_tumu(__VA_ARGS__)

#define	vmadd_vv_u32mf2(...) __riscv_vmadd_vv_u32mf2_tu(__VA_ARGS__)

#define	vmadd_vv_u32mf2_m(...) __riscv_vmadd_vv_u32mf2_tumu(__VA_ARGS__)

#define	vmadd_vv_u64m1(...) __riscv_vmadd_vv_u64m1_tu(__VA_ARGS__)

#define	vmadd_vv_u64m1_m(...) __riscv_vmadd_vv_u64m1_tumu(__VA_ARGS__)

#define	vmadd_vv_u64m2(...) __riscv_vmadd_vv_u64m2_tu(__VA_ARGS__)

#define	vmadd_vv_u64m2_m(...) __riscv_vmadd_vv_u64m2_tumu(__VA_ARGS__)

#define	vmadd_vv_u64m4(...) __riscv_vmadd_vv_u64m4_tu(__VA_ARGS__)

#define	vmadd_vv_u64m4_m(...) __riscv_vmadd_vv_u64m4_tumu(__VA_ARGS__)

#define	vmadd_vv_u64m8(...) __riscv_vmadd_vv_u64m8_tu(__VA_ARGS__)

#define	vmadd_vv_u64m8_m(...) __riscv_vmadd_vv_u64m8_tumu(__VA_ARGS__)

#define	vmadd_vv_u8m1(...) __riscv_vmadd_vv_u8m1_tu(__VA_ARGS__)

#define	vmadd_vv_u8m1_m(...) __riscv_vmadd_vv_u8m1_tumu(__VA_ARGS__)

#define	vmadd_vv_u8m2(...) __riscv_vmadd_vv_u8m2_tu(__VA_ARGS__)

#define	vmadd_vv_u8m2_m(...) __riscv_vmadd_vv_u8m2_tumu(__VA_ARGS__)

#define	vmadd_vv_u8m4(...) __riscv_vmadd_vv_u8m4_tu(__VA_ARGS__)

#define	vmadd_vv_u8m4_m(...) __riscv_vmadd_vv_u8m4_tumu(__VA_ARGS__)

#define	vmadd_vv_u8m8(...) __riscv_vmadd_vv_u8m8_tu(__VA_ARGS__)

#define	vmadd_vv_u8m8_m(...) __riscv_vmadd_vv_u8m8_tumu(__VA_ARGS__)

#define	vmadd_vv_u8mf2(...) __riscv_vmadd_vv_u8mf2_tu(__VA_ARGS__)

#define	vmadd_vv_u8mf2_m(...) __riscv_vmadd_vv_u8mf2_tumu(__VA_ARGS__)

#define	vmadd_vv_u8mf4(...) __riscv_vmadd_vv_u8mf4_tu(__VA_ARGS__)

#define	vmadd_vv_u8mf4_m(...) __riscv_vmadd_vv_u8mf4_tumu(__VA_ARGS__)

#define	vmadd_vv_u8mf8(...) __riscv_vmadd_vv_u8mf8_tu(__VA_ARGS__)

#define	vmadd_vv_u8mf8_m(...) __riscv_vmadd_vv_u8mf8_tumu(__VA_ARGS__)

#define	vmadd_vx_i16m1(...) __riscv_vmadd_vx_i16m1_tu(__VA_ARGS__)

#define	vmadd_vx_i16m1_m(...) __riscv_vmadd_vx_i16m1_tumu(__VA_ARGS__)

#define	vmadd_vx_i16m2(...) __riscv_vmadd_vx_i16m2_tu(__VA_ARGS__)

#define	vmadd_vx_i16m2_m(...) __riscv_vmadd_vx_i16m2_tumu(__VA_ARGS__)

#define	vmadd_vx_i16m4(...) __riscv_vmadd_vx_i16m4_tu(__VA_ARGS__)

#define	vmadd_vx_i16m4_m(...) __riscv_vmadd_vx_i16m4_tumu(__VA_ARGS__)

#define	vmadd_vx_i16m8(...) __riscv_vmadd_vx_i16m8_tu(__VA_ARGS__)

#define	vmadd_vx_i16m8_m(...) __riscv_vmadd_vx_i16m8_tumu(__VA_ARGS__)

#define	vmadd_vx_i16mf2(...) __riscv_vmadd_vx_i16mf2_tu(__VA_ARGS__)

#define	vmadd_vx_i16mf2_m(...) __riscv_vmadd_vx_i16mf2_tumu(__VA_ARGS__)

#define	vmadd_vx_i16mf4(...) __riscv_vmadd_vx_i16mf4_tu(__VA_ARGS__)

#define	vmadd_vx_i16mf4_m(...) __riscv_vmadd_vx_i16mf4_tumu(__VA_ARGS__)

#define	vmadd_vx_i32m1(...) __riscv_vmadd_vx_i32m1_tu(__VA_ARGS__)

#define	vmadd_vx_i32m1_m(...) __riscv_vmadd_vx_i32m1_tumu(__VA_ARGS__)

#define	vmadd_vx_i32m2(...) __riscv_vmadd_vx_i32m2_tu(__VA_ARGS__)

#define	vmadd_vx_i32m2_m(...) __riscv_vmadd_vx_i32m2_tumu(__VA_ARGS__)

#define	vmadd_vx_i32m4(...) __riscv_vmadd_vx_i32m4_tu(__VA_ARGS__)

#define	vmadd_vx_i32m4_m(...) __riscv_vmadd_vx_i32m4_tumu(__VA_ARGS__)

#define	vmadd_vx_i32m8(...) __riscv_vmadd_vx_i32m8_tu(__VA_ARGS__)

#define	vmadd_vx_i32m8_m(...) __riscv_vmadd_vx_i32m8_tumu(__VA_ARGS__)

#define	vmadd_vx_i32mf2(...) __riscv_vmadd_vx_i32mf2_tu(__VA_ARGS__)

#define	vmadd_vx_i32mf2_m(...) __riscv_vmadd_vx_i32mf2_tumu(__VA_ARGS__)

#define	vmadd_vx_i64m1(...) __riscv_vmadd_vx_i64m1_tu(__VA_ARGS__)

#define	vmadd_vx_i64m1_m(...) __riscv_vmadd_vx_i64m1_tumu(__VA_ARGS__)

#define	vmadd_vx_i64m2(...) __riscv_vmadd_vx_i64m2_tu(__VA_ARGS__)

#define	vmadd_vx_i64m2_m(...) __riscv_vmadd_vx_i64m2_tumu(__VA_ARGS__)

#define	vmadd_vx_i64m4(...) __riscv_vmadd_vx_i64m4_tu(__VA_ARGS__)

#define	vmadd_vx_i64m4_m(...) __riscv_vmadd_vx_i64m4_tumu(__VA_ARGS__)

#define	vmadd_vx_i64m8(...) __riscv_vmadd_vx_i64m8_tu(__VA_ARGS__)

#define	vmadd_vx_i64m8_m(...) __riscv_vmadd_vx_i64m8_tumu(__VA_ARGS__)

#define	vmadd_vx_i8m1(...) __riscv_vmadd_vx_i8m1_tu(__VA_ARGS__)

#define	vmadd_vx_i8m1_m(...) __riscv_vmadd_vx_i8m1_tumu(__VA_ARGS__)

#define	vmadd_vx_i8m2(...) __riscv_vmadd_vx_i8m2_tu(__VA_ARGS__)

#define	vmadd_vx_i8m2_m(...) __riscv_vmadd_vx_i8m2_tumu(__VA_ARGS__)

#define	vmadd_vx_i8m4(...) __riscv_vmadd_vx_i8m4_tu(__VA_ARGS__)

#define	vmadd_vx_i8m4_m(...) __riscv_vmadd_vx_i8m4_tumu(__VA_ARGS__)

#define	vmadd_vx_i8m8(...) __riscv_vmadd_vx_i8m8_tu(__VA_ARGS__)

#define	vmadd_vx_i8m8_m(...) __riscv_vmadd_vx_i8m8_tumu(__VA_ARGS__)

#define	vmadd_vx_i8mf2(...) __riscv_vmadd_vx_i8mf2_tu(__VA_ARGS__)

#define	vmadd_vx_i8mf2_m(...) __riscv_vmadd_vx_i8mf2_tumu(__VA_ARGS__)

#define	vmadd_vx_i8mf4(...) __riscv_vmadd_vx_i8mf4_tu(__VA_ARGS__)

#define	vmadd_vx_i8mf4_m(...) __riscv_vmadd_vx_i8mf4_tumu(__VA_ARGS__)

#define	vmadd_vx_i8mf8(...) __riscv_vmadd_vx_i8mf8_tu(__VA_ARGS__)

#define	vmadd_vx_i8mf8_m(...) __riscv_vmadd_vx_i8mf8_tumu(__VA_ARGS__)

#define	vmadd_vx_u16m1(...) __riscv_vmadd_vx_u16m1_tu(__VA_ARGS__)

#define	vmadd_vx_u16m1_m(...) __riscv_vmadd_vx_u16m1_tumu(__VA_ARGS__)

#define	vmadd_vx_u16m2(...) __riscv_vmadd_vx_u16m2_tu(__VA_ARGS__)

#define	vmadd_vx_u16m2_m(...) __riscv_vmadd_vx_u16m2_tumu(__VA_ARGS__)

#define	vmadd_vx_u16m4(...) __riscv_vmadd_vx_u16m4_tu(__VA_ARGS__)

#define	vmadd_vx_u16m4_m(...) __riscv_vmadd_vx_u16m4_tumu(__VA_ARGS__)

#define	vmadd_vx_u16m8(...) __riscv_vmadd_vx_u16m8_tu(__VA_ARGS__)

#define	vmadd_vx_u16m8_m(...) __riscv_vmadd_vx_u16m8_tumu(__VA_ARGS__)

#define	vmadd_vx_u16mf2(...) __riscv_vmadd_vx_u16mf2_tu(__VA_ARGS__)

#define	vmadd_vx_u16mf2_m(...) __riscv_vmadd_vx_u16mf2_tumu(__VA_ARGS__)

#define	vmadd_vx_u16mf4(...) __riscv_vmadd_vx_u16mf4_tu(__VA_ARGS__)

#define	vmadd_vx_u16mf4_m(...) __riscv_vmadd_vx_u16mf4_tumu(__VA_ARGS__)

#define	vmadd_vx_u32m1(...) __riscv_vmadd_vx_u32m1_tu(__VA_ARGS__)

#define	vmadd_vx_u32m1_m(...) __riscv_vmadd_vx_u32m1_tumu(__VA_ARGS__)

#define	vmadd_vx_u32m2(...) __riscv_vmadd_vx_u32m2_tu(__VA_ARGS__)

#define	vmadd_vx_u32m2_m(...) __riscv_vmadd_vx_u32m2_tumu(__VA_ARGS__)

#define	vmadd_vx_u32m4(...) __riscv_vmadd_vx_u32m4_tu(__VA_ARGS__)

#define	vmadd_vx_u32m4_m(...) __riscv_vmadd_vx_u32m4_tumu(__VA_ARGS__)

#define	vmadd_vx_u32m8(...) __riscv_vmadd_vx_u32m8_tu(__VA_ARGS__)

#define	vmadd_vx_u32m8_m(...) __riscv_vmadd_vx_u32m8_tumu(__VA_ARGS__)

#define	vmadd_vx_u32mf2(...) __riscv_vmadd_vx_u32mf2_tu(__VA_ARGS__)

#define	vmadd_vx_u32mf2_m(...) __riscv_vmadd_vx_u32mf2_tumu(__VA_ARGS__)

#define	vmadd_vx_u64m1(...) __riscv_vmadd_vx_u64m1_tu(__VA_ARGS__)

#define	vmadd_vx_u64m1_m(...) __riscv_vmadd_vx_u64m1_tumu(__VA_ARGS__)

#define	vmadd_vx_u64m2(...) __riscv_vmadd_vx_u64m2_tu(__VA_ARGS__)

#define	vmadd_vx_u64m2_m(...) __riscv_vmadd_vx_u64m2_tumu(__VA_ARGS__)

#define	vmadd_vx_u64m4(...) __riscv_vmadd_vx_u64m4_tu(__VA_ARGS__)

#define	vmadd_vx_u64m4_m(...) __riscv_vmadd_vx_u64m4_tumu(__VA_ARGS__)

#define	vmadd_vx_u64m8(...) __riscv_vmadd_vx_u64m8_tu(__VA_ARGS__)

#define	vmadd_vx_u64m8_m(...) __riscv_vmadd_vx_u64m8_tumu(__VA_ARGS__)

#define	vmadd_vx_u8m1(...) __riscv_vmadd_vx_u8m1_tu(__VA_ARGS__)

#define	vmadd_vx_u8m1_m(...) __riscv_vmadd_vx_u8m1_tumu(__VA_ARGS__)

#define	vmadd_vx_u8m2(...) __riscv_vmadd_vx_u8m2_tu(__VA_ARGS__)

#define	vmadd_vx_u8m2_m(...) __riscv_vmadd_vx_u8m2_tumu(__VA_ARGS__)

#define	vmadd_vx_u8m4(...) __riscv_vmadd_vx_u8m4_tu(__VA_ARGS__)

#define	vmadd_vx_u8m4_m(...) __riscv_vmadd_vx_u8m4_tumu(__VA_ARGS__)

#define	vmadd_vx_u8m8(...) __riscv_vmadd_vx_u8m8_tu(__VA_ARGS__)

#define	vmadd_vx_u8m8_m(...) __riscv_vmadd_vx_u8m8_tumu(__VA_ARGS__)

#define	vmadd_vx_u8mf2(...) __riscv_vmadd_vx_u8mf2_tu(__VA_ARGS__)

#define	vmadd_vx_u8mf2_m(...) __riscv_vmadd_vx_u8mf2_tumu(__VA_ARGS__)

#define	vmadd_vx_u8mf4(...) __riscv_vmadd_vx_u8mf4_tu(__VA_ARGS__)

#define	vmadd_vx_u8mf4_m(...) __riscv_vmadd_vx_u8mf4_tumu(__VA_ARGS__)

#define	vmadd_vx_u8mf8(...) __riscv_vmadd_vx_u8mf8_tu(__VA_ARGS__)

#define	vmadd_vx_u8mf8_m(...) __riscv_vmadd_vx_u8mf8_tumu(__VA_ARGS__)

#define	vmand_mm_b1(...) __riscv_vmand_mm_b1(__VA_ARGS__)

#define	vmand_mm_b16(...) __riscv_vmand_mm_b16(__VA_ARGS__)

#define	vmand_mm_b2(...) __riscv_vmand_mm_b2(__VA_ARGS__)

#define	vmand_mm_b32(...) __riscv_vmand_mm_b32(__VA_ARGS__)

#define	vmand_mm_b4(...) __riscv_vmand_mm_b4(__VA_ARGS__)

#define	vmand_mm_b64(...) __riscv_vmand_mm_b64(__VA_ARGS__)

#define	vmand_mm_b8(...) __riscv_vmand_mm_b8(__VA_ARGS__)

#define	vmandn_mm_b1(...) __riscv_vmandn_mm_b1(__VA_ARGS__)

#define	vmandn_mm_b16(...) __riscv_vmandn_mm_b16(__VA_ARGS__)

#define	vmandn_mm_b2(...) __riscv_vmandn_mm_b2(__VA_ARGS__)

#define	vmandn_mm_b32(...) __riscv_vmandn_mm_b32(__VA_ARGS__)

#define	vmandn_mm_b4(...) __riscv_vmandn_mm_b4(__VA_ARGS__)

#define	vmandn_mm_b64(...) __riscv_vmandn_mm_b64(__VA_ARGS__)

#define	vmandn_mm_b8(...) __riscv_vmandn_mm_b8(__VA_ARGS__)

#define	vmax_vv_i16m1(...) __riscv_vmax_vv_i16m1(__VA_ARGS__)

#define	vmax_vv_i16m1_m(...) __riscv_vmax_vv_i16m1_tumu(__VA_ARGS__)

#define	vmax_vv_i16m2(...) __riscv_vmax_vv_i16m2(__VA_ARGS__)

#define	vmax_vv_i16m2_m(...) __riscv_vmax_vv_i16m2_tumu(__VA_ARGS__)

#define	vmax_vv_i16m4(...) __riscv_vmax_vv_i16m4(__VA_ARGS__)

#define	vmax_vv_i16m4_m(...) __riscv_vmax_vv_i16m4_tumu(__VA_ARGS__)

#define	vmax_vv_i16m8(...) __riscv_vmax_vv_i16m8(__VA_ARGS__)

#define	vmax_vv_i16m8_m(...) __riscv_vmax_vv_i16m8_tumu(__VA_ARGS__)

#define	vmax_vv_i16mf2(...) __riscv_vmax_vv_i16mf2(__VA_ARGS__)

#define	vmax_vv_i16mf2_m(...) __riscv_vmax_vv_i16mf2_tumu(__VA_ARGS__)

#define	vmax_vv_i16mf4(...) __riscv_vmax_vv_i16mf4(__VA_ARGS__)

#define	vmax_vv_i16mf4_m(...) __riscv_vmax_vv_i16mf4_tumu(__VA_ARGS__)

#define	vmax_vv_i32m1(...) __riscv_vmax_vv_i32m1(__VA_ARGS__)

#define	vmax_vv_i32m1_m(...) __riscv_vmax_vv_i32m1_tumu(__VA_ARGS__)

#define	vmax_vv_i32m2(...) __riscv_vmax_vv_i32m2(__VA_ARGS__)

#define	vmax_vv_i32m2_m(...) __riscv_vmax_vv_i32m2_tumu(__VA_ARGS__)

#define	vmax_vv_i32m4(...) __riscv_vmax_vv_i32m4(__VA_ARGS__)

#define	vmax_vv_i32m4_m(...) __riscv_vmax_vv_i32m4_tumu(__VA_ARGS__)

#define	vmax_vv_i32m8(...) __riscv_vmax_vv_i32m8(__VA_ARGS__)

#define	vmax_vv_i32m8_m(...) __riscv_vmax_vv_i32m8_tumu(__VA_ARGS__)

#define	vmax_vv_i32mf2(...) __riscv_vmax_vv_i32mf2(__VA_ARGS__)

#define	vmax_vv_i32mf2_m(...) __riscv_vmax_vv_i32mf2_tumu(__VA_ARGS__)

#define	vmax_vv_i64m1(...) __riscv_vmax_vv_i64m1(__VA_ARGS__)

#define	vmax_vv_i64m1_m(...) __riscv_vmax_vv_i64m1_tumu(__VA_ARGS__)

#define	vmax_vv_i64m2(...) __riscv_vmax_vv_i64m2(__VA_ARGS__)

#define	vmax_vv_i64m2_m(...) __riscv_vmax_vv_i64m2_tumu(__VA_ARGS__)

#define	vmax_vv_i64m4(...) __riscv_vmax_vv_i64m4(__VA_ARGS__)

#define	vmax_vv_i64m4_m(...) __riscv_vmax_vv_i64m4_tumu(__VA_ARGS__)

#define	vmax_vv_i64m8(...) __riscv_vmax_vv_i64m8(__VA_ARGS__)

#define	vmax_vv_i64m8_m(...) __riscv_vmax_vv_i64m8_tumu(__VA_ARGS__)

#define	vmax_vv_i8m1(...) __riscv_vmax_vv_i8m1(__VA_ARGS__)

#define	vmax_vv_i8m1_m(...) __riscv_vmax_vv_i8m1_tumu(__VA_ARGS__)

#define	vmax_vv_i8m2(...) __riscv_vmax_vv_i8m2(__VA_ARGS__)

#define	vmax_vv_i8m2_m(...) __riscv_vmax_vv_i8m2_tumu(__VA_ARGS__)

#define	vmax_vv_i8m4(...) __riscv_vmax_vv_i8m4(__VA_ARGS__)

#define	vmax_vv_i8m4_m(...) __riscv_vmax_vv_i8m4_tumu(__VA_ARGS__)

#define	vmax_vv_i8m8(...) __riscv_vmax_vv_i8m8(__VA_ARGS__)

#define	vmax_vv_i8m8_m(...) __riscv_vmax_vv_i8m8_tumu(__VA_ARGS__)

#define	vmax_vv_i8mf2(...) __riscv_vmax_vv_i8mf2(__VA_ARGS__)

#define	vmax_vv_i8mf2_m(...) __riscv_vmax_vv_i8mf2_tumu(__VA_ARGS__)

#define	vmax_vv_i8mf4(...) __riscv_vmax_vv_i8mf4(__VA_ARGS__)

#define	vmax_vv_i8mf4_m(...) __riscv_vmax_vv_i8mf4_tumu(__VA_ARGS__)

#define	vmax_vv_i8mf8(...) __riscv_vmax_vv_i8mf8(__VA_ARGS__)

#define	vmax_vv_i8mf8_m(...) __riscv_vmax_vv_i8mf8_tumu(__VA_ARGS__)

#define	vmax_vx_i16m1(...) __riscv_vmax_vx_i16m1(__VA_ARGS__)

#define	vmax_vx_i16m1_m(...) __riscv_vmax_vx_i16m1_tumu(__VA_ARGS__)

#define	vmax_vx_i16m2(...) __riscv_vmax_vx_i16m2(__VA_ARGS__)

#define	vmax_vx_i16m2_m(...) __riscv_vmax_vx_i16m2_tumu(__VA_ARGS__)

#define	vmax_vx_i16m4(...) __riscv_vmax_vx_i16m4(__VA_ARGS__)

#define	vmax_vx_i16m4_m(...) __riscv_vmax_vx_i16m4_tumu(__VA_ARGS__)

#define	vmax_vx_i16m8(...) __riscv_vmax_vx_i16m8(__VA_ARGS__)

#define	vmax_vx_i16m8_m(...) __riscv_vmax_vx_i16m8_tumu(__VA_ARGS__)

#define	vmax_vx_i16mf2(...) __riscv_vmax_vx_i16mf2(__VA_ARGS__)

#define	vmax_vx_i16mf2_m(...) __riscv_vmax_vx_i16mf2_tumu(__VA_ARGS__)

#define	vmax_vx_i16mf4(...) __riscv_vmax_vx_i16mf4(__VA_ARGS__)

#define	vmax_vx_i16mf4_m(...) __riscv_vmax_vx_i16mf4_tumu(__VA_ARGS__)

#define	vmax_vx_i32m1(...) __riscv_vmax_vx_i32m1(__VA_ARGS__)

#define	vmax_vx_i32m1_m(...) __riscv_vmax_vx_i32m1_tumu(__VA_ARGS__)

#define	vmax_vx_i32m2(...) __riscv_vmax_vx_i32m2(__VA_ARGS__)

#define	vmax_vx_i32m2_m(...) __riscv_vmax_vx_i32m2_tumu(__VA_ARGS__)

#define	vmax_vx_i32m4(...) __riscv_vmax_vx_i32m4(__VA_ARGS__)

#define	vmax_vx_i32m4_m(...) __riscv_vmax_vx_i32m4_tumu(__VA_ARGS__)

#define	vmax_vx_i32m8(...) __riscv_vmax_vx_i32m8(__VA_ARGS__)

#define	vmax_vx_i32m8_m(...) __riscv_vmax_vx_i32m8_tumu(__VA_ARGS__)

#define	vmax_vx_i32mf2(...) __riscv_vmax_vx_i32mf2(__VA_ARGS__)

#define	vmax_vx_i32mf2_m(...) __riscv_vmax_vx_i32mf2_tumu(__VA_ARGS__)

#define	vmax_vx_i64m1(...) __riscv_vmax_vx_i64m1(__VA_ARGS__)

#define	vmax_vx_i64m1_m(...) __riscv_vmax_vx_i64m1_tumu(__VA_ARGS__)

#define	vmax_vx_i64m2(...) __riscv_vmax_vx_i64m2(__VA_ARGS__)

#define	vmax_vx_i64m2_m(...) __riscv_vmax_vx_i64m2_tumu(__VA_ARGS__)

#define	vmax_vx_i64m4(...) __riscv_vmax_vx_i64m4(__VA_ARGS__)

#define	vmax_vx_i64m4_m(...) __riscv_vmax_vx_i64m4_tumu(__VA_ARGS__)

#define	vmax_vx_i64m8(...) __riscv_vmax_vx_i64m8(__VA_ARGS__)

#define	vmax_vx_i64m8_m(...) __riscv_vmax_vx_i64m8_tumu(__VA_ARGS__)

#define	vmax_vx_i8m1(...) __riscv_vmax_vx_i8m1(__VA_ARGS__)

#define	vmax_vx_i8m1_m(...) __riscv_vmax_vx_i8m1_tumu(__VA_ARGS__)

#define	vmax_vx_i8m2(...) __riscv_vmax_vx_i8m2(__VA_ARGS__)

#define	vmax_vx_i8m2_m(...) __riscv_vmax_vx_i8m2_tumu(__VA_ARGS__)

#define	vmax_vx_i8m4(...) __riscv_vmax_vx_i8m4(__VA_ARGS__)

#define	vmax_vx_i8m4_m(...) __riscv_vmax_vx_i8m4_tumu(__VA_ARGS__)

#define	vmax_vx_i8m8(...) __riscv_vmax_vx_i8m8(__VA_ARGS__)

#define	vmax_vx_i8m8_m(...) __riscv_vmax_vx_i8m8_tumu(__VA_ARGS__)

#define	vmax_vx_i8mf2(...) __riscv_vmax_vx_i8mf2(__VA_ARGS__)

#define	vmax_vx_i8mf2_m(...) __riscv_vmax_vx_i8mf2_tumu(__VA_ARGS__)

#define	vmax_vx_i8mf4(...) __riscv_vmax_vx_i8mf4(__VA_ARGS__)

#define	vmax_vx_i8mf4_m(...) __riscv_vmax_vx_i8mf4_tumu(__VA_ARGS__)

#define	vmax_vx_i8mf8(...) __riscv_vmax_vx_i8mf8(__VA_ARGS__)

#define	vmax_vx_i8mf8_m(...) __riscv_vmax_vx_i8mf8_tumu(__VA_ARGS__)

#define	vmaxu_vv_u16m1(...) __riscv_vmaxu_vv_u16m1(__VA_ARGS__)

#define	vmaxu_vv_u16m1_m(...) __riscv_vmaxu_vv_u16m1_tumu(__VA_ARGS__)

#define	vmaxu_vv_u16m2(...) __riscv_vmaxu_vv_u16m2(__VA_ARGS__)

#define	vmaxu_vv_u16m2_m(...) __riscv_vmaxu_vv_u16m2_tumu(__VA_ARGS__)

#define	vmaxu_vv_u16m4(...) __riscv_vmaxu_vv_u16m4(__VA_ARGS__)

#define	vmaxu_vv_u16m4_m(...) __riscv_vmaxu_vv_u16m4_tumu(__VA_ARGS__)

#define	vmaxu_vv_u16m8(...) __riscv_vmaxu_vv_u16m8(__VA_ARGS__)

#define	vmaxu_vv_u16m8_m(...) __riscv_vmaxu_vv_u16m8_tumu(__VA_ARGS__)

#define	vmaxu_vv_u16mf2(...) __riscv_vmaxu_vv_u16mf2(__VA_ARGS__)

#define	vmaxu_vv_u16mf2_m(...) __riscv_vmaxu_vv_u16mf2_tumu(__VA_ARGS__)

#define	vmaxu_vv_u16mf4(...) __riscv_vmaxu_vv_u16mf4(__VA_ARGS__)

#define	vmaxu_vv_u16mf4_m(...) __riscv_vmaxu_vv_u16mf4_tumu(__VA_ARGS__)

#define	vmaxu_vv_u32m1(...) __riscv_vmaxu_vv_u32m1(__VA_ARGS__)

#define	vmaxu_vv_u32m1_m(...) __riscv_vmaxu_vv_u32m1_tumu(__VA_ARGS__)

#define	vmaxu_vv_u32m2(...) __riscv_vmaxu_vv_u32m2(__VA_ARGS__)

#define	vmaxu_vv_u32m2_m(...) __riscv_vmaxu_vv_u32m2_tumu(__VA_ARGS__)

#define	vmaxu_vv_u32m4(...) __riscv_vmaxu_vv_u32m4(__VA_ARGS__)

#define	vmaxu_vv_u32m4_m(...) __riscv_vmaxu_vv_u32m4_tumu(__VA_ARGS__)

#define	vmaxu_vv_u32m8(...) __riscv_vmaxu_vv_u32m8(__VA_ARGS__)

#define	vmaxu_vv_u32m8_m(...) __riscv_vmaxu_vv_u32m8_tumu(__VA_ARGS__)

#define	vmaxu_vv_u32mf2(...) __riscv_vmaxu_vv_u32mf2(__VA_ARGS__)

#define	vmaxu_vv_u32mf2_m(...) __riscv_vmaxu_vv_u32mf2_tumu(__VA_ARGS__)

#define	vmaxu_vv_u64m1(...) __riscv_vmaxu_vv_u64m1(__VA_ARGS__)

#define	vmaxu_vv_u64m1_m(...) __riscv_vmaxu_vv_u64m1_tumu(__VA_ARGS__)

#define	vmaxu_vv_u64m2(...) __riscv_vmaxu_vv_u64m2(__VA_ARGS__)

#define	vmaxu_vv_u64m2_m(...) __riscv_vmaxu_vv_u64m2_tumu(__VA_ARGS__)

#define	vmaxu_vv_u64m4(...) __riscv_vmaxu_vv_u64m4(__VA_ARGS__)

#define	vmaxu_vv_u64m4_m(...) __riscv_vmaxu_vv_u64m4_tumu(__VA_ARGS__)

#define	vmaxu_vv_u64m8(...) __riscv_vmaxu_vv_u64m8(__VA_ARGS__)

#define	vmaxu_vv_u64m8_m(...) __riscv_vmaxu_vv_u64m8_tumu(__VA_ARGS__)

#define	vmaxu_vv_u8m1(...) __riscv_vmaxu_vv_u8m1(__VA_ARGS__)

#define	vmaxu_vv_u8m1_m(...) __riscv_vmaxu_vv_u8m1_tumu(__VA_ARGS__)

#define	vmaxu_vv_u8m2(...) __riscv_vmaxu_vv_u8m2(__VA_ARGS__)

#define	vmaxu_vv_u8m2_m(...) __riscv_vmaxu_vv_u8m2_tumu(__VA_ARGS__)

#define	vmaxu_vv_u8m4(...) __riscv_vmaxu_vv_u8m4(__VA_ARGS__)

#define	vmaxu_vv_u8m4_m(...) __riscv_vmaxu_vv_u8m4_tumu(__VA_ARGS__)

#define	vmaxu_vv_u8m8(...) __riscv_vmaxu_vv_u8m8(__VA_ARGS__)

#define	vmaxu_vv_u8m8_m(...) __riscv_vmaxu_vv_u8m8_tumu(__VA_ARGS__)

#define	vmaxu_vv_u8mf2(...) __riscv_vmaxu_vv_u8mf2(__VA_ARGS__)

#define	vmaxu_vv_u8mf2_m(...) __riscv_vmaxu_vv_u8mf2_tumu(__VA_ARGS__)

#define	vmaxu_vv_u8mf4(...) __riscv_vmaxu_vv_u8mf4(__VA_ARGS__)

#define	vmaxu_vv_u8mf4_m(...) __riscv_vmaxu_vv_u8mf4_tumu(__VA_ARGS__)

#define	vmaxu_vv_u8mf8(...) __riscv_vmaxu_vv_u8mf8(__VA_ARGS__)

#define	vmaxu_vv_u8mf8_m(...) __riscv_vmaxu_vv_u8mf8_tumu(__VA_ARGS__)

#define	vmaxu_vx_u16m1(...) __riscv_vmaxu_vx_u16m1(__VA_ARGS__)

#define	vmaxu_vx_u16m1_m(...) __riscv_vmaxu_vx_u16m1_tumu(__VA_ARGS__)

#define	vmaxu_vx_u16m2(...) __riscv_vmaxu_vx_u16m2(__VA_ARGS__)

#define	vmaxu_vx_u16m2_m(...) __riscv_vmaxu_vx_u16m2_tumu(__VA_ARGS__)

#define	vmaxu_vx_u16m4(...) __riscv_vmaxu_vx_u16m4(__VA_ARGS__)

#define	vmaxu_vx_u16m4_m(...) __riscv_vmaxu_vx_u16m4_tumu(__VA_ARGS__)

#define	vmaxu_vx_u16m8(...) __riscv_vmaxu_vx_u16m8(__VA_ARGS__)

#define	vmaxu_vx_u16m8_m(...) __riscv_vmaxu_vx_u16m8_tumu(__VA_ARGS__)

#define	vmaxu_vx_u16mf2(...) __riscv_vmaxu_vx_u16mf2(__VA_ARGS__)

#define	vmaxu_vx_u16mf2_m(...) __riscv_vmaxu_vx_u16mf2_tumu(__VA_ARGS__)

#define	vmaxu_vx_u16mf4(...) __riscv_vmaxu_vx_u16mf4(__VA_ARGS__)

#define	vmaxu_vx_u16mf4_m(...) __riscv_vmaxu_vx_u16mf4_tumu(__VA_ARGS__)

#define	vmaxu_vx_u32m1(...) __riscv_vmaxu_vx_u32m1(__VA_ARGS__)

#define	vmaxu_vx_u32m1_m(...) __riscv_vmaxu_vx_u32m1_tumu(__VA_ARGS__)

#define	vmaxu_vx_u32m2(...) __riscv_vmaxu_vx_u32m2(__VA_ARGS__)

#define	vmaxu_vx_u32m2_m(...) __riscv_vmaxu_vx_u32m2_tumu(__VA_ARGS__)

#define	vmaxu_vx_u32m4(...) __riscv_vmaxu_vx_u32m4(__VA_ARGS__)

#define	vmaxu_vx_u32m4_m(...) __riscv_vmaxu_vx_u32m4_tumu(__VA_ARGS__)

#define	vmaxu_vx_u32m8(...) __riscv_vmaxu_vx_u32m8(__VA_ARGS__)

#define	vmaxu_vx_u32m8_m(...) __riscv_vmaxu_vx_u32m8_tumu(__VA_ARGS__)

#define	vmaxu_vx_u32mf2(...) __riscv_vmaxu_vx_u32mf2(__VA_ARGS__)

#define	vmaxu_vx_u32mf2_m(...) __riscv_vmaxu_vx_u32mf2_tumu(__VA_ARGS__)

#define	vmaxu_vx_u64m1(...) __riscv_vmaxu_vx_u64m1(__VA_ARGS__)

#define	vmaxu_vx_u64m1_m(...) __riscv_vmaxu_vx_u64m1_tumu(__VA_ARGS__)

#define	vmaxu_vx_u64m2(...) __riscv_vmaxu_vx_u64m2(__VA_ARGS__)

#define	vmaxu_vx_u64m2_m(...) __riscv_vmaxu_vx_u64m2_tumu(__VA_ARGS__)

#define	vmaxu_vx_u64m4(...) __riscv_vmaxu_vx_u64m4(__VA_ARGS__)

#define	vmaxu_vx_u64m4_m(...) __riscv_vmaxu_vx_u64m4_tumu(__VA_ARGS__)

#define	vmaxu_vx_u64m8(...) __riscv_vmaxu_vx_u64m8(__VA_ARGS__)

#define	vmaxu_vx_u64m8_m(...) __riscv_vmaxu_vx_u64m8_tumu(__VA_ARGS__)

#define	vmaxu_vx_u8m1(...) __riscv_vmaxu_vx_u8m1(__VA_ARGS__)

#define	vmaxu_vx_u8m1_m(...) __riscv_vmaxu_vx_u8m1_tumu(__VA_ARGS__)

#define	vmaxu_vx_u8m2(...) __riscv_vmaxu_vx_u8m2(__VA_ARGS__)

#define	vmaxu_vx_u8m2_m(...) __riscv_vmaxu_vx_u8m2_tumu(__VA_ARGS__)

#define	vmaxu_vx_u8m4(...) __riscv_vmaxu_vx_u8m4(__VA_ARGS__)

#define	vmaxu_vx_u8m4_m(...) __riscv_vmaxu_vx_u8m4_tumu(__VA_ARGS__)

#define	vmaxu_vx_u8m8(...) __riscv_vmaxu_vx_u8m8(__VA_ARGS__)

#define	vmaxu_vx_u8m8_m(...) __riscv_vmaxu_vx_u8m8_tumu(__VA_ARGS__)

#define	vmaxu_vx_u8mf2(...) __riscv_vmaxu_vx_u8mf2(__VA_ARGS__)

#define	vmaxu_vx_u8mf2_m(...) __riscv_vmaxu_vx_u8mf2_tumu(__VA_ARGS__)

#define	vmaxu_vx_u8mf4(...) __riscv_vmaxu_vx_u8mf4(__VA_ARGS__)

#define	vmaxu_vx_u8mf4_m(...) __riscv_vmaxu_vx_u8mf4_tumu(__VA_ARGS__)

#define	vmaxu_vx_u8mf8(...) __riscv_vmaxu_vx_u8mf8(__VA_ARGS__)

#define	vmaxu_vx_u8mf8_m(...) __riscv_vmaxu_vx_u8mf8_tumu(__VA_ARGS__)

#define	vmclr_m_b1(...) __riscv_vmclr_m_b1(__VA_ARGS__)

#define	vmclr_m_b16(...) __riscv_vmclr_m_b16(__VA_ARGS__)

#define	vmclr_m_b2(...) __riscv_vmclr_m_b2(__VA_ARGS__)

#define	vmclr_m_b32(...) __riscv_vmclr_m_b32(__VA_ARGS__)

#define	vmclr_m_b4(...) __riscv_vmclr_m_b4(__VA_ARGS__)

#define	vmclr_m_b64(...) __riscv_vmclr_m_b64(__VA_ARGS__)

#define	vmclr_m_b8(...) __riscv_vmclr_m_b8(__VA_ARGS__)

#define	vmerge_vvm_f16m1(mask, op1, op2, vl) __riscv_vmerge_vvm_f16m1((op1), (op2), (mask), (vl))

#define	vmerge_vvm_f16m2(mask, op1, op2, vl) __riscv_vmerge_vvm_f16m2((op1), (op2), (mask), (vl))

#define	vmerge_vvm_f16m4(mask, op1, op2, vl) __riscv_vmerge_vvm_f16m4((op1), (op2), (mask), (vl))

#define	vmerge_vvm_f16m8(mask, op1, op2, vl) __riscv_vmerge_vvm_f16m8((op1), (op2), (mask), (vl))

#define	vmerge_vvm_f16mf2(mask, op1, op2, vl) __riscv_vmerge_vvm_f16mf2((op1), (op2), (mask), (vl))

#define	vmerge_vvm_f16mf4(mask, op1, op2, vl) __riscv_vmerge_vvm_f16mf4((op1), (op2), (mask), (vl))

#define	vmerge_vvm_f32m1(mask, op1, op2, vl) __riscv_vmerge_vvm_f32m1((op1), (op2), (mask), (vl))

#define	vmerge_vvm_f32m2(mask, op1, op2, vl) __riscv_vmerge_vvm_f32m2((op1), (op2), (mask), (vl))

#define	vmerge_vvm_f32m4(mask, op1, op2, vl) __riscv_vmerge_vvm_f32m4((op1), (op2), (mask), (vl))

#define	vmerge_vvm_f32m8(mask, op1, op2, vl) __riscv_vmerge_vvm_f32m8((op1), (op2), (mask), (vl))

#define	vmerge_vvm_f32mf2(mask, op1, op2, vl) __riscv_vmerge_vvm_f32mf2((op1), (op2), (mask), (vl))

#define	vmerge_vvm_f64m1(mask, op1, op2, vl) __riscv_vmerge_vvm_f64m1((op1), (op2), (mask), (vl))

#define	vmerge_vvm_f64m2(mask, op1, op2, vl) __riscv_vmerge_vvm_f64m2((op1), (op2), (mask), (vl))

#define	vmerge_vvm_f64m4(mask, op1, op2, vl) __riscv_vmerge_vvm_f64m4((op1), (op2), (mask), (vl))

#define	vmerge_vvm_f64m8(mask, op1, op2, vl) __riscv_vmerge_vvm_f64m8((op1), (op2), (mask), (vl))

#define	vmerge_vvm_i16m1(mask, op1, op2, vl) __riscv_vmerge_vvm_i16m1((op1), (op2), (mask), (vl))

#define	vmerge_vvm_i16m2(mask, op1, op2, vl) __riscv_vmerge_vvm_i16m2((op1), (op2), (mask), (vl))

#define	vmerge_vvm_i16m4(mask, op1, op2, vl) __riscv_vmerge_vvm_i16m4((op1), (op2), (mask), (vl))

#define	vmerge_vvm_i16m8(mask, op1, op2, vl) __riscv_vmerge_vvm_i16m8((op1), (op2), (mask), (vl))

#define	vmerge_vvm_i16mf2(mask, op1, op2, vl) __riscv_vmerge_vvm_i16mf2((op1), (op2), (mask), (vl))

#define	vmerge_vvm_i16mf4(mask, op1, op2, vl) __riscv_vmerge_vvm_i16mf4((op1), (op2), (mask), (vl))

#define	vmerge_vvm_i32m1(mask, op1, op2, vl) __riscv_vmerge_vvm_i32m1((op1), (op2), (mask), (vl))

#define	vmerge_vvm_i32m2(mask, op1, op2, vl) __riscv_vmerge_vvm_i32m2((op1), (op2), (mask), (vl))

#define	vmerge_vvm_i32m4(mask, op1, op2, vl) __riscv_vmerge_vvm_i32m4((op1), (op2), (mask), (vl))

#define	vmerge_vvm_i32m8(mask, op1, op2, vl) __riscv_vmerge_vvm_i32m8((op1), (op2), (mask), (vl))

#define	vmerge_vvm_i32mf2(mask, op1, op2, vl) __riscv_vmerge_vvm_i32mf2((op1), (op2), (mask), (vl))

#define	vmerge_vvm_i64m1(mask, op1, op2, vl) __riscv_vmerge_vvm_i64m1((op1), (op2), (mask), (vl))

#define	vmerge_vvm_i64m2(mask, op1, op2, vl) __riscv_vmerge_vvm_i64m2((op1), (op2), (mask), (vl))

#define	vmerge_vvm_i64m4(mask, op1, op2, vl) __riscv_vmerge_vvm_i64m4((op1), (op2), (mask), (vl))

#define	vmerge_vvm_i64m8(mask, op1, op2, vl) __riscv_vmerge_vvm_i64m8((op1), (op2), (mask), (vl))

#define	vmerge_vvm_i8m1(mask, op1, op2, vl) __riscv_vmerge_vvm_i8m1((op1), (op2), (mask), (vl))

#define	vmerge_vvm_i8m2(mask, op1, op2, vl) __riscv_vmerge_vvm_i8m2((op1), (op2), (mask), (vl))

#define	vmerge_vvm_i8m4(mask, op1, op2, vl) __riscv_vmerge_vvm_i8m4((op1), (op2), (mask), (vl))

#define	vmerge_vvm_i8m8(mask, op1, op2, vl) __riscv_vmerge_vvm_i8m8((op1), (op2), (mask), (vl))

#define	vmerge_vvm_i8mf2(mask, op1, op2, vl) __riscv_vmerge_vvm_i8mf2((op1), (op2), (mask), (vl))

#define	vmerge_vvm_i8mf4(mask, op1, op2, vl) __riscv_vmerge_vvm_i8mf4((op1), (op2), (mask), (vl))

#define	vmerge_vvm_i8mf8(mask, op1, op2, vl) __riscv_vmerge_vvm_i8mf8((op1), (op2), (mask), (vl))

#define	vmerge_vvm_u16m1(mask, op1, op2, vl) __riscv_vmerge_vvm_u16m1((op1), (op2), (mask), (vl))

#define	vmerge_vvm_u16m2(mask, op1, op2, vl) __riscv_vmerge_vvm_u16m2((op1), (op2), (mask), (vl))

#define	vmerge_vvm_u16m4(mask, op1, op2, vl) __riscv_vmerge_vvm_u16m4((op1), (op2), (mask), (vl))

#define	vmerge_vvm_u16m8(mask, op1, op2, vl) __riscv_vmerge_vvm_u16m8((op1), (op2), (mask), (vl))

#define	vmerge_vvm_u16mf2(mask, op1, op2, vl) __riscv_vmerge_vvm_u16mf2((op1), (op2), (mask), (vl))

#define	vmerge_vvm_u16mf4(mask, op1, op2, vl) __riscv_vmerge_vvm_u16mf4((op1), (op2), (mask), (vl))

#define	vmerge_vvm_u32m1(mask, op1, op2, vl) __riscv_vmerge_vvm_u32m1((op1), (op2), (mask), (vl))

#define	vmerge_vvm_u32m2(mask, op1, op2, vl) __riscv_vmerge_vvm_u32m2((op1), (op2), (mask), (vl))

#define	vmerge_vvm_u32m4(mask, op1, op2, vl) __riscv_vmerge_vvm_u32m4((op1), (op2), (mask), (vl))

#define	vmerge_vvm_u32m8(mask, op1, op2, vl) __riscv_vmerge_vvm_u32m8((op1), (op2), (mask), (vl))

#define	vmerge_vvm_u32mf2(mask, op1, op2, vl) __riscv_vmerge_vvm_u32mf2((op1), (op2), (mask), (vl))

#define	vmerge_vvm_u64m1(mask, op1, op2, vl) __riscv_vmerge_vvm_u64m1((op1), (op2), (mask), (vl))

#define	vmerge_vvm_u64m2(mask, op1, op2, vl) __riscv_vmerge_vvm_u64m2((op1), (op2), (mask), (vl))

#define	vmerge_vvm_u64m4(mask, op1, op2, vl) __riscv_vmerge_vvm_u64m4((op1), (op2), (mask), (vl))

#define	vmerge_vvm_u64m8(mask, op1, op2, vl) __riscv_vmerge_vvm_u64m8((op1), (op2), (mask), (vl))

#define	vmerge_vvm_u8m1(mask, op1, op2, vl) __riscv_vmerge_vvm_u8m1((op1), (op2), (mask), (vl))

#define	vmerge_vvm_u8m2(mask, op1, op2, vl) __riscv_vmerge_vvm_u8m2((op1), (op2), (mask), (vl))

#define	vmerge_vvm_u8m4(mask, op1, op2, vl) __riscv_vmerge_vvm_u8m4((op1), (op2), (mask), (vl))

#define	vmerge_vvm_u8m8(mask, op1, op2, vl) __riscv_vmerge_vvm_u8m8((op1), (op2), (mask), (vl))

#define	vmerge_vvm_u8mf2(mask, op1, op2, vl) __riscv_vmerge_vvm_u8mf2((op1), (op2), (mask), (vl))

#define	vmerge_vvm_u8mf4(mask, op1, op2, vl) __riscv_vmerge_vvm_u8mf4((op1), (op2), (mask), (vl))

#define	vmerge_vvm_u8mf8(mask, op1, op2, vl) __riscv_vmerge_vvm_u8mf8((op1), (op2), (mask), (vl))

#define	vmerge_vxm_i16m1(mask, op1, op2, vl) __riscv_vmerge_vxm_i16m1((op1), (op2), (mask), (vl))

#define	vmerge_vxm_i16m2(mask, op1, op2, vl) __riscv_vmerge_vxm_i16m2((op1), (op2), (mask), (vl))

#define	vmerge_vxm_i16m4(mask, op1, op2, vl) __riscv_vmerge_vxm_i16m4((op1), (op2), (mask), (vl))

#define	vmerge_vxm_i16m8(mask, op1, op2, vl) __riscv_vmerge_vxm_i16m8((op1), (op2), (mask), (vl))

#define	vmerge_vxm_i16mf2(mask, op1, op2, vl) __riscv_vmerge_vxm_i16mf2((op1), (op2), (mask), (vl))

#define	vmerge_vxm_i16mf4(mask, op1, op2, vl) __riscv_vmerge_vxm_i16mf4((op1), (op2), (mask), (vl))

#define	vmerge_vxm_i32m1(mask, op1, op2, vl) __riscv_vmerge_vxm_i32m1((op1), (op2), (mask), (vl))

#define	vmerge_vxm_i32m2(mask, op1, op2, vl) __riscv_vmerge_vxm_i32m2((op1), (op2), (mask), (vl))

#define	vmerge_vxm_i32m4(mask, op1, op2, vl) __riscv_vmerge_vxm_i32m4((op1), (op2), (mask), (vl))

#define	vmerge_vxm_i32m8(mask, op1, op2, vl) __riscv_vmerge_vxm_i32m8((op1), (op2), (mask), (vl))

#define	vmerge_vxm_i32mf2(mask, op1, op2, vl) __riscv_vmerge_vxm_i32mf2((op1), (op2), (mask), (vl))

#define	vmerge_vxm_i64m1(mask, op1, op2, vl) __riscv_vmerge_vxm_i64m1((op1), (op2), (mask), (vl))

#define	vmerge_vxm_i64m2(mask, op1, op2, vl) __riscv_vmerge_vxm_i64m2((op1), (op2), (mask), (vl))

#define	vmerge_vxm_i64m4(mask, op1, op2, vl) __riscv_vmerge_vxm_i64m4((op1), (op2), (mask), (vl))

#define	vmerge_vxm_i64m8(mask, op1, op2, vl) __riscv_vmerge_vxm_i64m8((op1), (op2), (mask), (vl))

#define	vmerge_vxm_i8m1(mask, op1, op2, vl) __riscv_vmerge_vxm_i8m1((op1), (op2), (mask), (vl))

#define	vmerge_vxm_i8m2(mask, op1, op2, vl) __riscv_vmerge_vxm_i8m2((op1), (op2), (mask), (vl))

#define	vmerge_vxm_i8m4(mask, op1, op2, vl) __riscv_vmerge_vxm_i8m4((op1), (op2), (mask), (vl))

#define	vmerge_vxm_i8m8(mask, op1, op2, vl) __riscv_vmerge_vxm_i8m8((op1), (op2), (mask), (vl))

#define	vmerge_vxm_i8mf2(mask, op1, op2, vl) __riscv_vmerge_vxm_i8mf2((op1), (op2), (mask), (vl))

#define	vmerge_vxm_i8mf4(mask, op1, op2, vl) __riscv_vmerge_vxm_i8mf4((op1), (op2), (mask), (vl))

#define	vmerge_vxm_i8mf8(mask, op1, op2, vl) __riscv_vmerge_vxm_i8mf8((op1), (op2), (mask), (vl))

#define	vmerge_vxm_u16m1(mask, op1, op2, vl) __riscv_vmerge_vxm_u16m1((op1), (op2), (mask), (vl))

#define	vmerge_vxm_u16m2(mask, op1, op2, vl) __riscv_vmerge_vxm_u16m2((op1), (op2), (mask), (vl))

#define	vmerge_vxm_u16m4(mask, op1, op2, vl) __riscv_vmerge_vxm_u16m4((op1), (op2), (mask), (vl))

#define	vmerge_vxm_u16m8(mask, op1, op2, vl) __riscv_vmerge_vxm_u16m8((op1), (op2), (mask), (vl))

#define	vmerge_vxm_u16mf2(mask, op1, op2, vl) __riscv_vmerge_vxm_u16mf2((op1), (op2), (mask), (vl))

#define	vmerge_vxm_u16mf4(mask, op1, op2, vl) __riscv_vmerge_vxm_u16mf4((op1), (op2), (mask), (vl))

#define	vmerge_vxm_u32m1(mask, op1, op2, vl) __riscv_vmerge_vxm_u32m1((op1), (op2), (mask), (vl))

#define	vmerge_vxm_u32m2(mask, op1, op2, vl) __riscv_vmerge_vxm_u32m2((op1), (op2), (mask), (vl))

#define	vmerge_vxm_u32m4(mask, op1, op2, vl) __riscv_vmerge_vxm_u32m4((op1), (op2), (mask), (vl))

#define	vmerge_vxm_u32m8(mask, op1, op2, vl) __riscv_vmerge_vxm_u32m8((op1), (op2), (mask), (vl))

#define	vmerge_vxm_u32mf2(mask, op1, op2, vl) __riscv_vmerge_vxm_u32mf2((op1), (op2), (mask), (vl))

#define	vmerge_vxm_u64m1(mask, op1, op2, vl) __riscv_vmerge_vxm_u64m1((op1), (op2), (mask), (vl))

#define	vmerge_vxm_u64m2(mask, op1, op2, vl) __riscv_vmerge_vxm_u64m2((op1), (op2), (mask), (vl))

#define	vmerge_vxm_u64m4(mask, op1, op2, vl) __riscv_vmerge_vxm_u64m4((op1), (op2), (mask), (vl))

#define	vmerge_vxm_u64m8(mask, op1, op2, vl) __riscv_vmerge_vxm_u64m8((op1), (op2), (mask), (vl))

#define	vmerge_vxm_u8m1(mask, op1, op2, vl) __riscv_vmerge_vxm_u8m1((op1), (op2), (mask), (vl))

#define	vmerge_vxm_u8m2(mask, op1, op2, vl) __riscv_vmerge_vxm_u8m2((op1), (op2), (mask), (vl))

#define	vmerge_vxm_u8m4(mask, op1, op2, vl) __riscv_vmerge_vxm_u8m4((op1), (op2), (mask), (vl))

#define	vmerge_vxm_u8m8(mask, op1, op2, vl) __riscv_vmerge_vxm_u8m8((op1), (op2), (mask), (vl))

#define	vmerge_vxm_u8mf2(mask, op1, op2, vl) __riscv_vmerge_vxm_u8mf2((op1), (op2), (mask), (vl))

#define	vmerge_vxm_u8mf4(mask, op1, op2, vl) __riscv_vmerge_vxm_u8mf4((op1), (op2), (mask), (vl))

#define	vmerge_vxm_u8mf8(mask, op1, op2, vl) __riscv_vmerge_vxm_u8mf8((op1), (op2), (mask), (vl))

#define	vmfeq_vf_f16m1_b16(...) __riscv_vmfeq_vf_f16m1_b16(__VA_ARGS__)

#define	vmfeq_vf_f16m1_b16_m(...) __riscv_vmfeq_vf_f16m1_b16_mu(__VA_ARGS__)

#define	vmfeq_vf_f16m2_b8(...) __riscv_vmfeq_vf_f16m2_b8(__VA_ARGS__)

#define	vmfeq_vf_f16m2_b8_m(...) __riscv_vmfeq_vf_f16m2_b8_mu(__VA_ARGS__)

#define	vmfeq_vf_f16m4_b4(...) __riscv_vmfeq_vf_f16m4_b4(__VA_ARGS__)

#define	vmfeq_vf_f16m4_b4_m(...) __riscv_vmfeq_vf_f16m4_b4_mu(__VA_ARGS__)

#define	vmfeq_vf_f16m8_b2(...) __riscv_vmfeq_vf_f16m8_b2(__VA_ARGS__)

#define	vmfeq_vf_f16m8_b2_m(...) __riscv_vmfeq_vf_f16m8_b2_mu(__VA_ARGS__)

#define	vmfeq_vf_f16mf2_b32(...) __riscv_vmfeq_vf_f16mf2_b32(__VA_ARGS__)

#define	vmfeq_vf_f16mf2_b32_m(...) __riscv_vmfeq_vf_f16mf2_b32_mu(__VA_ARGS__)

#define	vmfeq_vf_f16mf4_b64(...) __riscv_vmfeq_vf_f16mf4_b64(__VA_ARGS__)

#define	vmfeq_vf_f16mf4_b64_m(...) __riscv_vmfeq_vf_f16mf4_b64_mu(__VA_ARGS__)

#define	vmfeq_vf_f32m1_b32(...) __riscv_vmfeq_vf_f32m1_b32(__VA_ARGS__)

#define	vmfeq_vf_f32m1_b32_m(...) __riscv_vmfeq_vf_f32m1_b32_mu(__VA_ARGS__)

#define	vmfeq_vf_f32m2_b16(...) __riscv_vmfeq_vf_f32m2_b16(__VA_ARGS__)

#define	vmfeq_vf_f32m2_b16_m(...) __riscv_vmfeq_vf_f32m2_b16_mu(__VA_ARGS__)

#define	vmfeq_vf_f32m4_b8(...) __riscv_vmfeq_vf_f32m4_b8(__VA_ARGS__)

#define	vmfeq_vf_f32m4_b8_m(...) __riscv_vmfeq_vf_f32m4_b8_mu(__VA_ARGS__)

#define	vmfeq_vf_f32m8_b4(...) __riscv_vmfeq_vf_f32m8_b4(__VA_ARGS__)

#define	vmfeq_vf_f32m8_b4_m(...) __riscv_vmfeq_vf_f32m8_b4_mu(__VA_ARGS__)

#define	vmfeq_vf_f32mf2_b64(...) __riscv_vmfeq_vf_f32mf2_b64(__VA_ARGS__)

#define	vmfeq_vf_f32mf2_b64_m(...) __riscv_vmfeq_vf_f32mf2_b64_mu(__VA_ARGS__)

#define	vmfeq_vf_f64m1_b64(...) __riscv_vmfeq_vf_f64m1_b64(__VA_ARGS__)

#define	vmfeq_vf_f64m1_b64_m(...) __riscv_vmfeq_vf_f64m1_b64_mu(__VA_ARGS__)

#define	vmfeq_vf_f64m2_b32(...) __riscv_vmfeq_vf_f64m2_b32(__VA_ARGS__)

#define	vmfeq_vf_f64m2_b32_m(...) __riscv_vmfeq_vf_f64m2_b32_mu(__VA_ARGS__)

#define	vmfeq_vf_f64m4_b16(...) __riscv_vmfeq_vf_f64m4_b16(__VA_ARGS__)

#define	vmfeq_vf_f64m4_b16_m(...) __riscv_vmfeq_vf_f64m4_b16_mu(__VA_ARGS__)

#define	vmfeq_vf_f64m8_b8(...) __riscv_vmfeq_vf_f64m8_b8(__VA_ARGS__)

#define	vmfeq_vf_f64m8_b8_m(...) __riscv_vmfeq_vf_f64m8_b8_mu(__VA_ARGS__)

#define	vmfeq_vv_f16m1_b16(...) __riscv_vmfeq_vv_f16m1_b16(__VA_ARGS__)

#define	vmfeq_vv_f16m1_b16_m(...) __riscv_vmfeq_vv_f16m1_b16_mu(__VA_ARGS__)

#define	vmfeq_vv_f16m2_b8(...) __riscv_vmfeq_vv_f16m2_b8(__VA_ARGS__)

#define	vmfeq_vv_f16m2_b8_m(...) __riscv_vmfeq_vv_f16m2_b8_mu(__VA_ARGS__)

#define	vmfeq_vv_f16m4_b4(...) __riscv_vmfeq_vv_f16m4_b4(__VA_ARGS__)

#define	vmfeq_vv_f16m4_b4_m(...) __riscv_vmfeq_vv_f16m4_b4_mu(__VA_ARGS__)

#define	vmfeq_vv_f16m8_b2(...) __riscv_vmfeq_vv_f16m8_b2(__VA_ARGS__)

#define	vmfeq_vv_f16m8_b2_m(...) __riscv_vmfeq_vv_f16m8_b2_mu(__VA_ARGS__)

#define	vmfeq_vv_f16mf2_b32(...) __riscv_vmfeq_vv_f16mf2_b32(__VA_ARGS__)

#define	vmfeq_vv_f16mf2_b32_m(...) __riscv_vmfeq_vv_f16mf2_b32_mu(__VA_ARGS__)

#define	vmfeq_vv_f16mf4_b64(...) __riscv_vmfeq_vv_f16mf4_b64(__VA_ARGS__)

#define	vmfeq_vv_f16mf4_b64_m(...) __riscv_vmfeq_vv_f16mf4_b64_mu(__VA_ARGS__)

#define	vmfeq_vv_f32m1_b32(...) __riscv_vmfeq_vv_f32m1_b32(__VA_ARGS__)

#define	vmfeq_vv_f32m1_b32_m(...) __riscv_vmfeq_vv_f32m1_b32_mu(__VA_ARGS__)

#define	vmfeq_vv_f32m2_b16(...) __riscv_vmfeq_vv_f32m2_b16(__VA_ARGS__)

#define	vmfeq_vv_f32m2_b16_m(...) __riscv_vmfeq_vv_f32m2_b16_mu(__VA_ARGS__)

#define	vmfeq_vv_f32m4_b8(...) __riscv_vmfeq_vv_f32m4_b8(__VA_ARGS__)

#define	vmfeq_vv_f32m4_b8_m(...) __riscv_vmfeq_vv_f32m4_b8_mu(__VA_ARGS__)

#define	vmfeq_vv_f32m8_b4(...) __riscv_vmfeq_vv_f32m8_b4(__VA_ARGS__)

#define	vmfeq_vv_f32m8_b4_m(...) __riscv_vmfeq_vv_f32m8_b4_mu(__VA_ARGS__)

#define	vmfeq_vv_f32mf2_b64(...) __riscv_vmfeq_vv_f32mf2_b64(__VA_ARGS__)

#define	vmfeq_vv_f32mf2_b64_m(...) __riscv_vmfeq_vv_f32mf2_b64_mu(__VA_ARGS__)

#define	vmfeq_vv_f64m1_b64(...) __riscv_vmfeq_vv_f64m1_b64(__VA_ARGS__)

#define	vmfeq_vv_f64m1_b64_m(...) __riscv_vmfeq_vv_f64m1_b64_mu(__VA_ARGS__)

#define	vmfeq_vv_f64m2_b32(...) __riscv_vmfeq_vv_f64m2_b32(__VA_ARGS__)

#define	vmfeq_vv_f64m2_b32_m(...) __riscv_vmfeq_vv_f64m2_b32_mu(__VA_ARGS__)

#define	vmfeq_vv_f64m4_b16(...) __riscv_vmfeq_vv_f64m4_b16(__VA_ARGS__)

#define	vmfeq_vv_f64m4_b16_m(...) __riscv_vmfeq_vv_f64m4_b16_mu(__VA_ARGS__)

#define	vmfeq_vv_f64m8_b8(...) __riscv_vmfeq_vv_f64m8_b8(__VA_ARGS__)

#define	vmfeq_vv_f64m8_b8_m(...) __riscv_vmfeq_vv_f64m8_b8_mu(__VA_ARGS__)

#define	vmfge_vf_f16m1_b16(...) __riscv_vmfge_vf_f16m1_b16(__VA_ARGS__)

#define	vmfge_vf_f16m1_b16_m(...) __riscv_vmfge_vf_f16m1_b16_mu(__VA_ARGS__)

#define	vmfge_vf_f16m2_b8(...) __riscv_vmfge_vf_f16m2_b8(__VA_ARGS__)

#define	vmfge_vf_f16m2_b8_m(...) __riscv_vmfge_vf_f16m2_b8_mu(__VA_ARGS__)

#define	vmfge_vf_f16m4_b4(...) __riscv_vmfge_vf_f16m4_b4(__VA_ARGS__)

#define	vmfge_vf_f16m4_b4_m(...) __riscv_vmfge_vf_f16m4_b4_mu(__VA_ARGS__)

#define	vmfge_vf_f16m8_b2(...) __riscv_vmfge_vf_f16m8_b2(__VA_ARGS__)

#define	vmfge_vf_f16m8_b2_m(...) __riscv_vmfge_vf_f16m8_b2_mu(__VA_ARGS__)

#define	vmfge_vf_f16mf2_b32(...) __riscv_vmfge_vf_f16mf2_b32(__VA_ARGS__)

#define	vmfge_vf_f16mf2_b32_m(...) __riscv_vmfge_vf_f16mf2_b32_mu(__VA_ARGS__)

#define	vmfge_vf_f16mf4_b64(...) __riscv_vmfge_vf_f16mf4_b64(__VA_ARGS__)

#define	vmfge_vf_f16mf4_b64_m(...) __riscv_vmfge_vf_f16mf4_b64_mu(__VA_ARGS__)

#define	vmfge_vf_f32m1_b32(...) __riscv_vmfge_vf_f32m1_b32(__VA_ARGS__)

#define	vmfge_vf_f32m1_b32_m(...) __riscv_vmfge_vf_f32m1_b32_mu(__VA_ARGS__)

#define	vmfge_vf_f32m2_b16(...) __riscv_vmfge_vf_f32m2_b16(__VA_ARGS__)

#define	vmfge_vf_f32m2_b16_m(...) __riscv_vmfge_vf_f32m2_b16_mu(__VA_ARGS__)

#define	vmfge_vf_f32m4_b8(...) __riscv_vmfge_vf_f32m4_b8(__VA_ARGS__)

#define	vmfge_vf_f32m4_b8_m(...) __riscv_vmfge_vf_f32m4_b8_mu(__VA_ARGS__)

#define	vmfge_vf_f32m8_b4(...) __riscv_vmfge_vf_f32m8_b4(__VA_ARGS__)

#define	vmfge_vf_f32m8_b4_m(...) __riscv_vmfge_vf_f32m8_b4_mu(__VA_ARGS__)

#define	vmfge_vf_f32mf2_b64(...) __riscv_vmfge_vf_f32mf2_b64(__VA_ARGS__)

#define	vmfge_vf_f32mf2_b64_m(...) __riscv_vmfge_vf_f32mf2_b64_mu(__VA_ARGS__)

#define	vmfge_vf_f64m1_b64(...) __riscv_vmfge_vf_f64m1_b64(__VA_ARGS__)

#define	vmfge_vf_f64m1_b64_m(...) __riscv_vmfge_vf_f64m1_b64_mu(__VA_ARGS__)

#define	vmfge_vf_f64m2_b32(...) __riscv_vmfge_vf_f64m2_b32(__VA_ARGS__)

#define	vmfge_vf_f64m2_b32_m(...) __riscv_vmfge_vf_f64m2_b32_mu(__VA_ARGS__)

#define	vmfge_vf_f64m4_b16(...) __riscv_vmfge_vf_f64m4_b16(__VA_ARGS__)

#define	vmfge_vf_f64m4_b16_m(...) __riscv_vmfge_vf_f64m4_b16_mu(__VA_ARGS__)

#define	vmfge_vf_f64m8_b8(...) __riscv_vmfge_vf_f64m8_b8(__VA_ARGS__)

#define	vmfge_vf_f64m8_b8_m(...) __riscv_vmfge_vf_f64m8_b8_mu(__VA_ARGS__)

#define	vmfge_vv_f16m1_b16(...) __riscv_vmfge_vv_f16m1_b16(__VA_ARGS__)

#define	vmfge_vv_f16m1_b16_m(...) __riscv_vmfge_vv_f16m1_b16_mu(__VA_ARGS__)

#define	vmfge_vv_f16m2_b8(...) __riscv_vmfge_vv_f16m2_b8(__VA_ARGS__)

#define	vmfge_vv_f16m2_b8_m(...) __riscv_vmfge_vv_f16m2_b8_mu(__VA_ARGS__)

#define	vmfge_vv_f16m4_b4(...) __riscv_vmfge_vv_f16m4_b4(__VA_ARGS__)

#define	vmfge_vv_f16m4_b4_m(...) __riscv_vmfge_vv_f16m4_b4_mu(__VA_ARGS__)

#define	vmfge_vv_f16m8_b2(...) __riscv_vmfge_vv_f16m8_b2(__VA_ARGS__)

#define	vmfge_vv_f16m8_b2_m(...) __riscv_vmfge_vv_f16m8_b2_mu(__VA_ARGS__)

#define	vmfge_vv_f16mf2_b32(...) __riscv_vmfge_vv_f16mf2_b32(__VA_ARGS__)

#define	vmfge_vv_f16mf2_b32_m(...) __riscv_vmfge_vv_f16mf2_b32_mu(__VA_ARGS__)

#define	vmfge_vv_f16mf4_b64(...) __riscv_vmfge_vv_f16mf4_b64(__VA_ARGS__)

#define	vmfge_vv_f16mf4_b64_m(...) __riscv_vmfge_vv_f16mf4_b64_mu(__VA_ARGS__)

#define	vmfge_vv_f32m1_b32(...) __riscv_vmfge_vv_f32m1_b32(__VA_ARGS__)

#define	vmfge_vv_f32m1_b32_m(...) __riscv_vmfge_vv_f32m1_b32_mu(__VA_ARGS__)

#define	vmfge_vv_f32m2_b16(...) __riscv_vmfge_vv_f32m2_b16(__VA_ARGS__)

#define	vmfge_vv_f32m2_b16_m(...) __riscv_vmfge_vv_f32m2_b16_mu(__VA_ARGS__)

#define	vmfge_vv_f32m4_b8(...) __riscv_vmfge_vv_f32m4_b8(__VA_ARGS__)

#define	vmfge_vv_f32m4_b8_m(...) __riscv_vmfge_vv_f32m4_b8_mu(__VA_ARGS__)

#define	vmfge_vv_f32m8_b4(...) __riscv_vmfge_vv_f32m8_b4(__VA_ARGS__)

#define	vmfge_vv_f32m8_b4_m(...) __riscv_vmfge_vv_f32m8_b4_mu(__VA_ARGS__)

#define	vmfge_vv_f32mf2_b64(...) __riscv_vmfge_vv_f32mf2_b64(__VA_ARGS__)

#define	vmfge_vv_f32mf2_b64_m(...) __riscv_vmfge_vv_f32mf2_b64_mu(__VA_ARGS__)

#define	vmfge_vv_f64m1_b64(...) __riscv_vmfge_vv_f64m1_b64(__VA_ARGS__)

#define	vmfge_vv_f64m1_b64_m(...) __riscv_vmfge_vv_f64m1_b64_mu(__VA_ARGS__)

#define	vmfge_vv_f64m2_b32(...) __riscv_vmfge_vv_f64m2_b32(__VA_ARGS__)

#define	vmfge_vv_f64m2_b32_m(...) __riscv_vmfge_vv_f64m2_b32_mu(__VA_ARGS__)

#define	vmfge_vv_f64m4_b16(...) __riscv_vmfge_vv_f64m4_b16(__VA_ARGS__)

#define	vmfge_vv_f64m4_b16_m(...) __riscv_vmfge_vv_f64m4_b16_mu(__VA_ARGS__)

#define	vmfge_vv_f64m8_b8(...) __riscv_vmfge_vv_f64m8_b8(__VA_ARGS__)

#define	vmfge_vv_f64m8_b8_m(...) __riscv_vmfge_vv_f64m8_b8_mu(__VA_ARGS__)

#define	vmfgt_vf_f16m1_b16(...) __riscv_vmfgt_vf_f16m1_b16(__VA_ARGS__)

#define	vmfgt_vf_f16m1_b16_m(...) __riscv_vmfgt_vf_f16m1_b16_mu(__VA_ARGS__)

#define	vmfgt_vf_f16m2_b8(...) __riscv_vmfgt_vf_f16m2_b8(__VA_ARGS__)

#define	vmfgt_vf_f16m2_b8_m(...) __riscv_vmfgt_vf_f16m2_b8_mu(__VA_ARGS__)

#define	vmfgt_vf_f16m4_b4(...) __riscv_vmfgt_vf_f16m4_b4(__VA_ARGS__)

#define	vmfgt_vf_f16m4_b4_m(...) __riscv_vmfgt_vf_f16m4_b4_mu(__VA_ARGS__)

#define	vmfgt_vf_f16m8_b2(...) __riscv_vmfgt_vf_f16m8_b2(__VA_ARGS__)

#define	vmfgt_vf_f16m8_b2_m(...) __riscv_vmfgt_vf_f16m8_b2_mu(__VA_ARGS__)

#define	vmfgt_vf_f16mf2_b32(...) __riscv_vmfgt_vf_f16mf2_b32(__VA_ARGS__)

#define	vmfgt_vf_f16mf2_b32_m(...) __riscv_vmfgt_vf_f16mf2_b32_mu(__VA_ARGS__)

#define	vmfgt_vf_f16mf4_b64(...) __riscv_vmfgt_vf_f16mf4_b64(__VA_ARGS__)

#define	vmfgt_vf_f16mf4_b64_m(...) __riscv_vmfgt_vf_f16mf4_b64_mu(__VA_ARGS__)

#define	vmfgt_vf_f32m1_b32(...) __riscv_vmfgt_vf_f32m1_b32(__VA_ARGS__)

#define	vmfgt_vf_f32m1_b32_m(...) __riscv_vmfgt_vf_f32m1_b32_mu(__VA_ARGS__)

#define	vmfgt_vf_f32m2_b16(...) __riscv_vmfgt_vf_f32m2_b16(__VA_ARGS__)

#define	vmfgt_vf_f32m2_b16_m(...) __riscv_vmfgt_vf_f32m2_b16_mu(__VA_ARGS__)

#define	vmfgt_vf_f32m4_b8(...) __riscv_vmfgt_vf_f32m4_b8(__VA_ARGS__)

#define	vmfgt_vf_f32m4_b8_m(...) __riscv_vmfgt_vf_f32m4_b8_mu(__VA_ARGS__)

#define	vmfgt_vf_f32m8_b4(...) __riscv_vmfgt_vf_f32m8_b4(__VA_ARGS__)

#define	vmfgt_vf_f32m8_b4_m(...) __riscv_vmfgt_vf_f32m8_b4_mu(__VA_ARGS__)

#define	vmfgt_vf_f32mf2_b64(...) __riscv_vmfgt_vf_f32mf2_b64(__VA_ARGS__)

#define	vmfgt_vf_f32mf2_b64_m(...) __riscv_vmfgt_vf_f32mf2_b64_mu(__VA_ARGS__)

#define	vmfgt_vf_f64m1_b64(...) __riscv_vmfgt_vf_f64m1_b64(__VA_ARGS__)

#define	vmfgt_vf_f64m1_b64_m(...) __riscv_vmfgt_vf_f64m1_b64_mu(__VA_ARGS__)

#define	vmfgt_vf_f64m2_b32(...) __riscv_vmfgt_vf_f64m2_b32(__VA_ARGS__)

#define	vmfgt_vf_f64m2_b32_m(...) __riscv_vmfgt_vf_f64m2_b32_mu(__VA_ARGS__)

#define	vmfgt_vf_f64m4_b16(...) __riscv_vmfgt_vf_f64m4_b16(__VA_ARGS__)

#define	vmfgt_vf_f64m4_b16_m(...) __riscv_vmfgt_vf_f64m4_b16_mu(__VA_ARGS__)

#define	vmfgt_vf_f64m8_b8(...) __riscv_vmfgt_vf_f64m8_b8(__VA_ARGS__)

#define	vmfgt_vf_f64m8_b8_m(...) __riscv_vmfgt_vf_f64m8_b8_mu(__VA_ARGS__)

#define	vmfgt_vv_f16m1_b16(...) __riscv_vmfgt_vv_f16m1_b16(__VA_ARGS__)

#define	vmfgt_vv_f16m1_b16_m(...) __riscv_vmfgt_vv_f16m1_b16_mu(__VA_ARGS__)

#define	vmfgt_vv_f16m2_b8(...) __riscv_vmfgt_vv_f16m2_b8(__VA_ARGS__)

#define	vmfgt_vv_f16m2_b8_m(...) __riscv_vmfgt_vv_f16m2_b8_mu(__VA_ARGS__)

#define	vmfgt_vv_f16m4_b4(...) __riscv_vmfgt_vv_f16m4_b4(__VA_ARGS__)

#define	vmfgt_vv_f16m4_b4_m(...) __riscv_vmfgt_vv_f16m4_b4_mu(__VA_ARGS__)

#define	vmfgt_vv_f16m8_b2(...) __riscv_vmfgt_vv_f16m8_b2(__VA_ARGS__)

#define	vmfgt_vv_f16m8_b2_m(...) __riscv_vmfgt_vv_f16m8_b2_mu(__VA_ARGS__)

#define	vmfgt_vv_f16mf2_b32(...) __riscv_vmfgt_vv_f16mf2_b32(__VA_ARGS__)

#define	vmfgt_vv_f16mf2_b32_m(...) __riscv_vmfgt_vv_f16mf2_b32_mu(__VA_ARGS__)

#define	vmfgt_vv_f16mf4_b64(...) __riscv_vmfgt_vv_f16mf4_b64(__VA_ARGS__)

#define	vmfgt_vv_f16mf4_b64_m(...) __riscv_vmfgt_vv_f16mf4_b64_mu(__VA_ARGS__)

#define	vmfgt_vv_f32m1_b32(...) __riscv_vmfgt_vv_f32m1_b32(__VA_ARGS__)

#define	vmfgt_vv_f32m1_b32_m(...) __riscv_vmfgt_vv_f32m1_b32_mu(__VA_ARGS__)

#define	vmfgt_vv_f32m2_b16(...) __riscv_vmfgt_vv_f32m2_b16(__VA_ARGS__)

#define	vmfgt_vv_f32m2_b16_m(...) __riscv_vmfgt_vv_f32m2_b16_mu(__VA_ARGS__)

#define	vmfgt_vv_f32m4_b8(...) __riscv_vmfgt_vv_f32m4_b8(__VA_ARGS__)

#define	vmfgt_vv_f32m4_b8_m(...) __riscv_vmfgt_vv_f32m4_b8_mu(__VA_ARGS__)

#define	vmfgt_vv_f32m8_b4(...) __riscv_vmfgt_vv_f32m8_b4(__VA_ARGS__)

#define	vmfgt_vv_f32m8_b4_m(...) __riscv_vmfgt_vv_f32m8_b4_mu(__VA_ARGS__)

#define	vmfgt_vv_f32mf2_b64(...) __riscv_vmfgt_vv_f32mf2_b64(__VA_ARGS__)

#define	vmfgt_vv_f32mf2_b64_m(...) __riscv_vmfgt_vv_f32mf2_b64_mu(__VA_ARGS__)

#define	vmfgt_vv_f64m1_b64(...) __riscv_vmfgt_vv_f64m1_b64(__VA_ARGS__)

#define	vmfgt_vv_f64m1_b64_m(...) __riscv_vmfgt_vv_f64m1_b64_mu(__VA_ARGS__)

#define	vmfgt_vv_f64m2_b32(...) __riscv_vmfgt_vv_f64m2_b32(__VA_ARGS__)

#define	vmfgt_vv_f64m2_b32_m(...) __riscv_vmfgt_vv_f64m2_b32_mu(__VA_ARGS__)

#define	vmfgt_vv_f64m4_b16(...) __riscv_vmfgt_vv_f64m4_b16(__VA_ARGS__)

#define	vmfgt_vv_f64m4_b16_m(...) __riscv_vmfgt_vv_f64m4_b16_mu(__VA_ARGS__)

#define	vmfgt_vv_f64m8_b8(...) __riscv_vmfgt_vv_f64m8_b8(__VA_ARGS__)

#define	vmfgt_vv_f64m8_b8_m(...) __riscv_vmfgt_vv_f64m8_b8_mu(__VA_ARGS__)

#define	vmfle_vf_f16m1_b16(...) __riscv_vmfle_vf_f16m1_b16(__VA_ARGS__)

#define	vmfle_vf_f16m1_b16_m(...) __riscv_vmfle_vf_f16m1_b16_mu(__VA_ARGS__)

#define	vmfle_vf_f16m2_b8(...) __riscv_vmfle_vf_f16m2_b8(__VA_ARGS__)

#define	vmfle_vf_f16m2_b8_m(...) __riscv_vmfle_vf_f16m2_b8_mu(__VA_ARGS__)

#define	vmfle_vf_f16m4_b4(...) __riscv_vmfle_vf_f16m4_b4(__VA_ARGS__)

#define	vmfle_vf_f16m4_b4_m(...) __riscv_vmfle_vf_f16m4_b4_mu(__VA_ARGS__)

#define	vmfle_vf_f16m8_b2(...) __riscv_vmfle_vf_f16m8_b2(__VA_ARGS__)

#define	vmfle_vf_f16m8_b2_m(...) __riscv_vmfle_vf_f16m8_b2_mu(__VA_ARGS__)

#define	vmfle_vf_f16mf2_b32(...) __riscv_vmfle_vf_f16mf2_b32(__VA_ARGS__)

#define	vmfle_vf_f16mf2_b32_m(...) __riscv_vmfle_vf_f16mf2_b32_mu(__VA_ARGS__)

#define	vmfle_vf_f16mf4_b64(...) __riscv_vmfle_vf_f16mf4_b64(__VA_ARGS__)

#define	vmfle_vf_f16mf4_b64_m(...) __riscv_vmfle_vf_f16mf4_b64_mu(__VA_ARGS__)

#define	vmfle_vf_f32m1_b32(...) __riscv_vmfle_vf_f32m1_b32(__VA_ARGS__)

#define	vmfle_vf_f32m1_b32_m(...) __riscv_vmfle_vf_f32m1_b32_mu(__VA_ARGS__)

#define	vmfle_vf_f32m2_b16(...) __riscv_vmfle_vf_f32m2_b16(__VA_ARGS__)

#define	vmfle_vf_f32m2_b16_m(...) __riscv_vmfle_vf_f32m2_b16_mu(__VA_ARGS__)

#define	vmfle_vf_f32m4_b8(...) __riscv_vmfle_vf_f32m4_b8(__VA_ARGS__)

#define	vmfle_vf_f32m4_b8_m(...) __riscv_vmfle_vf_f32m4_b8_mu(__VA_ARGS__)

#define	vmfle_vf_f32m8_b4(...) __riscv_vmfle_vf_f32m8_b4(__VA_ARGS__)

#define	vmfle_vf_f32m8_b4_m(...) __riscv_vmfle_vf_f32m8_b4_mu(__VA_ARGS__)

#define	vmfle_vf_f32mf2_b64(...) __riscv_vmfle_vf_f32mf2_b64(__VA_ARGS__)

#define	vmfle_vf_f32mf2_b64_m(...) __riscv_vmfle_vf_f32mf2_b64_mu(__VA_ARGS__)

#define	vmfle_vf_f64m1_b64(...) __riscv_vmfle_vf_f64m1_b64(__VA_ARGS__)

#define	vmfle_vf_f64m1_b64_m(...) __riscv_vmfle_vf_f64m1_b64_mu(__VA_ARGS__)

#define	vmfle_vf_f64m2_b32(...) __riscv_vmfle_vf_f64m2_b32(__VA_ARGS__)

#define	vmfle_vf_f64m2_b32_m(...) __riscv_vmfle_vf_f64m2_b32_mu(__VA_ARGS__)

#define	vmfle_vf_f64m4_b16(...) __riscv_vmfle_vf_f64m4_b16(__VA_ARGS__)

#define	vmfle_vf_f64m4_b16_m(...) __riscv_vmfle_vf_f64m4_b16_mu(__VA_ARGS__)

#define	vmfle_vf_f64m8_b8(...) __riscv_vmfle_vf_f64m8_b8(__VA_ARGS__)

#define	vmfle_vf_f64m8_b8_m(...) __riscv_vmfle_vf_f64m8_b8_mu(__VA_ARGS__)

#define	vmfle_vv_f16m1_b16(...) __riscv_vmfle_vv_f16m1_b16(__VA_ARGS__)

#define	vmfle_vv_f16m1_b16_m(...) __riscv_vmfle_vv_f16m1_b16_mu(__VA_ARGS__)

#define	vmfle_vv_f16m2_b8(...) __riscv_vmfle_vv_f16m2_b8(__VA_ARGS__)

#define	vmfle_vv_f16m2_b8_m(...) __riscv_vmfle_vv_f16m2_b8_mu(__VA_ARGS__)

#define	vmfle_vv_f16m4_b4(...) __riscv_vmfle_vv_f16m4_b4(__VA_ARGS__)

#define	vmfle_vv_f16m4_b4_m(...) __riscv_vmfle_vv_f16m4_b4_mu(__VA_ARGS__)

#define	vmfle_vv_f16m8_b2(...) __riscv_vmfle_vv_f16m8_b2(__VA_ARGS__)

#define	vmfle_vv_f16m8_b2_m(...) __riscv_vmfle_vv_f16m8_b2_mu(__VA_ARGS__)

#define	vmfle_vv_f16mf2_b32(...) __riscv_vmfle_vv_f16mf2_b32(__VA_ARGS__)

#define	vmfle_vv_f16mf2_b32_m(...) __riscv_vmfle_vv_f16mf2_b32_mu(__VA_ARGS__)

#define	vmfle_vv_f16mf4_b64(...) __riscv_vmfle_vv_f16mf4_b64(__VA_ARGS__)

#define	vmfle_vv_f16mf4_b64_m(...) __riscv_vmfle_vv_f16mf4_b64_mu(__VA_ARGS__)

#define	vmfle_vv_f32m1_b32(...) __riscv_vmfle_vv_f32m1_b32(__VA_ARGS__)

#define	vmfle_vv_f32m1_b32_m(...) __riscv_vmfle_vv_f32m1_b32_mu(__VA_ARGS__)

#define	vmfle_vv_f32m2_b16(...) __riscv_vmfle_vv_f32m2_b16(__VA_ARGS__)

#define	vmfle_vv_f32m2_b16_m(...) __riscv_vmfle_vv_f32m2_b16_mu(__VA_ARGS__)

#define	vmfle_vv_f32m4_b8(...) __riscv_vmfle_vv_f32m4_b8(__VA_ARGS__)

#define	vmfle_vv_f32m4_b8_m(...) __riscv_vmfle_vv_f32m4_b8_mu(__VA_ARGS__)

#define	vmfle_vv_f32m8_b4(...) __riscv_vmfle_vv_f32m8_b4(__VA_ARGS__)

#define	vmfle_vv_f32m8_b4_m(...) __riscv_vmfle_vv_f32m8_b4_mu(__VA_ARGS__)

#define	vmfle_vv_f32mf2_b64(...) __riscv_vmfle_vv_f32mf2_b64(__VA_ARGS__)

#define	vmfle_vv_f32mf2_b64_m(...) __riscv_vmfle_vv_f32mf2_b64_mu(__VA_ARGS__)

#define	vmfle_vv_f64m1_b64(...) __riscv_vmfle_vv_f64m1_b64(__VA_ARGS__)

#define	vmfle_vv_f64m1_b64_m(...) __riscv_vmfle_vv_f64m1_b64_mu(__VA_ARGS__)

#define	vmfle_vv_f64m2_b32(...) __riscv_vmfle_vv_f64m2_b32(__VA_ARGS__)

#define	vmfle_vv_f64m2_b32_m(...) __riscv_vmfle_vv_f64m2_b32_mu(__VA_ARGS__)

#define	vmfle_vv_f64m4_b16(...) __riscv_vmfle_vv_f64m4_b16(__VA_ARGS__)

#define	vmfle_vv_f64m4_b16_m(...) __riscv_vmfle_vv_f64m4_b16_mu(__VA_ARGS__)

#define	vmfle_vv_f64m8_b8(...) __riscv_vmfle_vv_f64m8_b8(__VA_ARGS__)

#define	vmfle_vv_f64m8_b8_m(...) __riscv_vmfle_vv_f64m8_b8_mu(__VA_ARGS__)

#define	vmflt_vf_f16m1_b16(...) __riscv_vmflt_vf_f16m1_b16(__VA_ARGS__)

#define	vmflt_vf_f16m1_b16_m(...) __riscv_vmflt_vf_f16m1_b16_mu(__VA_ARGS__)

#define	vmflt_vf_f16m2_b8(...) __riscv_vmflt_vf_f16m2_b8(__VA_ARGS__)

#define	vmflt_vf_f16m2_b8_m(...) __riscv_vmflt_vf_f16m2_b8_mu(__VA_ARGS__)

#define	vmflt_vf_f16m4_b4(...) __riscv_vmflt_vf_f16m4_b4(__VA_ARGS__)

#define	vmflt_vf_f16m4_b4_m(...) __riscv_vmflt_vf_f16m4_b4_mu(__VA_ARGS__)

#define	vmflt_vf_f16m8_b2(...) __riscv_vmflt_vf_f16m8_b2(__VA_ARGS__)

#define	vmflt_vf_f16m8_b2_m(...) __riscv_vmflt_vf_f16m8_b2_mu(__VA_ARGS__)

#define	vmflt_vf_f16mf2_b32(...) __riscv_vmflt_vf_f16mf2_b32(__VA_ARGS__)

#define	vmflt_vf_f16mf2_b32_m(...) __riscv_vmflt_vf_f16mf2_b32_mu(__VA_ARGS__)

#define	vmflt_vf_f16mf4_b64(...) __riscv_vmflt_vf_f16mf4_b64(__VA_ARGS__)

#define	vmflt_vf_f16mf4_b64_m(...) __riscv_vmflt_vf_f16mf4_b64_mu(__VA_ARGS__)

#define	vmflt_vf_f32m1_b32(...) __riscv_vmflt_vf_f32m1_b32(__VA_ARGS__)

#define	vmflt_vf_f32m1_b32_m(...) __riscv_vmflt_vf_f32m1_b32_mu(__VA_ARGS__)

#define	vmflt_vf_f32m2_b16(...) __riscv_vmflt_vf_f32m2_b16(__VA_ARGS__)

#define	vmflt_vf_f32m2_b16_m(...) __riscv_vmflt_vf_f32m2_b16_mu(__VA_ARGS__)

#define	vmflt_vf_f32m4_b8(...) __riscv_vmflt_vf_f32m4_b8(__VA_ARGS__)

#define	vmflt_vf_f32m4_b8_m(...) __riscv_vmflt_vf_f32m4_b8_mu(__VA_ARGS__)

#define	vmflt_vf_f32m8_b4(...) __riscv_vmflt_vf_f32m8_b4(__VA_ARGS__)

#define	vmflt_vf_f32m8_b4_m(...) __riscv_vmflt_vf_f32m8_b4_mu(__VA_ARGS__)

#define	vmflt_vf_f32mf2_b64(...) __riscv_vmflt_vf_f32mf2_b64(__VA_ARGS__)

#define	vmflt_vf_f32mf2_b64_m(...) __riscv_vmflt_vf_f32mf2_b64_mu(__VA_ARGS__)

#define	vmflt_vf_f64m1_b64(...) __riscv_vmflt_vf_f64m1_b64(__VA_ARGS__)

#define	vmflt_vf_f64m1_b64_m(...) __riscv_vmflt_vf_f64m1_b64_mu(__VA_ARGS__)

#define	vmflt_vf_f64m2_b32(...) __riscv_vmflt_vf_f64m2_b32(__VA_ARGS__)

#define	vmflt_vf_f64m2_b32_m(...) __riscv_vmflt_vf_f64m2_b32_mu(__VA_ARGS__)

#define	vmflt_vf_f64m4_b16(...) __riscv_vmflt_vf_f64m4_b16(__VA_ARGS__)

#define	vmflt_vf_f64m4_b16_m(...) __riscv_vmflt_vf_f64m4_b16_mu(__VA_ARGS__)

#define	vmflt_vf_f64m8_b8(...) __riscv_vmflt_vf_f64m8_b8(__VA_ARGS__)

#define	vmflt_vf_f64m8_b8_m(...) __riscv_vmflt_vf_f64m8_b8_mu(__VA_ARGS__)

#define	vmflt_vv_f16m1_b16(...) __riscv_vmflt_vv_f16m1_b16(__VA_ARGS__)

#define	vmflt_vv_f16m1_b16_m(...) __riscv_vmflt_vv_f16m1_b16_mu(__VA_ARGS__)

#define	vmflt_vv_f16m2_b8(...) __riscv_vmflt_vv_f16m2_b8(__VA_ARGS__)

#define	vmflt_vv_f16m2_b8_m(...) __riscv_vmflt_vv_f16m2_b8_mu(__VA_ARGS__)

#define	vmflt_vv_f16m4_b4(...) __riscv_vmflt_vv_f16m4_b4(__VA_ARGS__)

#define	vmflt_vv_f16m4_b4_m(...) __riscv_vmflt_vv_f16m4_b4_mu(__VA_ARGS__)

#define	vmflt_vv_f16m8_b2(...) __riscv_vmflt_vv_f16m8_b2(__VA_ARGS__)

#define	vmflt_vv_f16m8_b2_m(...) __riscv_vmflt_vv_f16m8_b2_mu(__VA_ARGS__)

#define	vmflt_vv_f16mf2_b32(...) __riscv_vmflt_vv_f16mf2_b32(__VA_ARGS__)

#define	vmflt_vv_f16mf2_b32_m(...) __riscv_vmflt_vv_f16mf2_b32_mu(__VA_ARGS__)

#define	vmflt_vv_f16mf4_b64(...) __riscv_vmflt_vv_f16mf4_b64(__VA_ARGS__)

#define	vmflt_vv_f16mf4_b64_m(...) __riscv_vmflt_vv_f16mf4_b64_mu(__VA_ARGS__)

#define	vmflt_vv_f32m1_b32(...) __riscv_vmflt_vv_f32m1_b32(__VA_ARGS__)

#define	vmflt_vv_f32m1_b32_m(...) __riscv_vmflt_vv_f32m1_b32_mu(__VA_ARGS__)

#define	vmflt_vv_f32m2_b16(...) __riscv_vmflt_vv_f32m2_b16(__VA_ARGS__)

#define	vmflt_vv_f32m2_b16_m(...) __riscv_vmflt_vv_f32m2_b16_mu(__VA_ARGS__)

#define	vmflt_vv_f32m4_b8(...) __riscv_vmflt_vv_f32m4_b8(__VA_ARGS__)

#define	vmflt_vv_f32m4_b8_m(...) __riscv_vmflt_vv_f32m4_b8_mu(__VA_ARGS__)

#define	vmflt_vv_f32m8_b4(...) __riscv_vmflt_vv_f32m8_b4(__VA_ARGS__)

#define	vmflt_vv_f32m8_b4_m(...) __riscv_vmflt_vv_f32m8_b4_mu(__VA_ARGS__)

#define	vmflt_vv_f32mf2_b64(...) __riscv_vmflt_vv_f32mf2_b64(__VA_ARGS__)

#define	vmflt_vv_f32mf2_b64_m(...) __riscv_vmflt_vv_f32mf2_b64_mu(__VA_ARGS__)

#define	vmflt_vv_f64m1_b64(...) __riscv_vmflt_vv_f64m1_b64(__VA_ARGS__)

#define	vmflt_vv_f64m1_b64_m(...) __riscv_vmflt_vv_f64m1_b64_mu(__VA_ARGS__)

#define	vmflt_vv_f64m2_b32(...) __riscv_vmflt_vv_f64m2_b32(__VA_ARGS__)

#define	vmflt_vv_f64m2_b32_m(...) __riscv_vmflt_vv_f64m2_b32_mu(__VA_ARGS__)

#define	vmflt_vv_f64m4_b16(...) __riscv_vmflt_vv_f64m4_b16(__VA_ARGS__)

#define	vmflt_vv_f64m4_b16_m(...) __riscv_vmflt_vv_f64m4_b16_mu(__VA_ARGS__)

#define	vmflt_vv_f64m8_b8(...) __riscv_vmflt_vv_f64m8_b8(__VA_ARGS__)

#define	vmflt_vv_f64m8_b8_m(...) __riscv_vmflt_vv_f64m8_b8_mu(__VA_ARGS__)

#define	vmfne_vf_f16m1_b16(...) __riscv_vmfne_vf_f16m1_b16(__VA_ARGS__)

#define	vmfne_vf_f16m1_b16_m(...) __riscv_vmfne_vf_f16m1_b16_mu(__VA_ARGS__)

#define	vmfne_vf_f16m2_b8(...) __riscv_vmfne_vf_f16m2_b8(__VA_ARGS__)

#define	vmfne_vf_f16m2_b8_m(...) __riscv_vmfne_vf_f16m2_b8_mu(__VA_ARGS__)

#define	vmfne_vf_f16m4_b4(...) __riscv_vmfne_vf_f16m4_b4(__VA_ARGS__)

#define	vmfne_vf_f16m4_b4_m(...) __riscv_vmfne_vf_f16m4_b4_mu(__VA_ARGS__)

#define	vmfne_vf_f16m8_b2(...) __riscv_vmfne_vf_f16m8_b2(__VA_ARGS__)

#define	vmfne_vf_f16m8_b2_m(...) __riscv_vmfne_vf_f16m8_b2_mu(__VA_ARGS__)

#define	vmfne_vf_f16mf2_b32(...) __riscv_vmfne_vf_f16mf2_b32(__VA_ARGS__)

#define	vmfne_vf_f16mf2_b32_m(...) __riscv_vmfne_vf_f16mf2_b32_mu(__VA_ARGS__)

#define	vmfne_vf_f16mf4_b64(...) __riscv_vmfne_vf_f16mf4_b64(__VA_ARGS__)

#define	vmfne_vf_f16mf4_b64_m(...) __riscv_vmfne_vf_f16mf4_b64_mu(__VA_ARGS__)

#define	vmfne_vf_f32m1_b32(...) __riscv_vmfne_vf_f32m1_b32(__VA_ARGS__)

#define	vmfne_vf_f32m1_b32_m(...) __riscv_vmfne_vf_f32m1_b32_mu(__VA_ARGS__)

#define	vmfne_vf_f32m2_b16(...) __riscv_vmfne_vf_f32m2_b16(__VA_ARGS__)

#define	vmfne_vf_f32m2_b16_m(...) __riscv_vmfne_vf_f32m2_b16_mu(__VA_ARGS__)

#define	vmfne_vf_f32m4_b8(...) __riscv_vmfne_vf_f32m4_b8(__VA_ARGS__)

#define	vmfne_vf_f32m4_b8_m(...) __riscv_vmfne_vf_f32m4_b8_mu(__VA_ARGS__)

#define	vmfne_vf_f32m8_b4(...) __riscv_vmfne_vf_f32m8_b4(__VA_ARGS__)

#define	vmfne_vf_f32m8_b4_m(...) __riscv_vmfne_vf_f32m8_b4_mu(__VA_ARGS__)

#define	vmfne_vf_f32mf2_b64(...) __riscv_vmfne_vf_f32mf2_b64(__VA_ARGS__)

#define	vmfne_vf_f32mf2_b64_m(...) __riscv_vmfne_vf_f32mf2_b64_mu(__VA_ARGS__)

#define	vmfne_vf_f64m1_b64(...) __riscv_vmfne_vf_f64m1_b64(__VA_ARGS__)

#define	vmfne_vf_f64m1_b64_m(...) __riscv_vmfne_vf_f64m1_b64_mu(__VA_ARGS__)

#define	vmfne_vf_f64m2_b32(...) __riscv_vmfne_vf_f64m2_b32(__VA_ARGS__)

#define	vmfne_vf_f64m2_b32_m(...) __riscv_vmfne_vf_f64m2_b32_mu(__VA_ARGS__)

#define	vmfne_vf_f64m4_b16(...) __riscv_vmfne_vf_f64m4_b16(__VA_ARGS__)

#define	vmfne_vf_f64m4_b16_m(...) __riscv_vmfne_vf_f64m4_b16_mu(__VA_ARGS__)

#define	vmfne_vf_f64m8_b8(...) __riscv_vmfne_vf_f64m8_b8(__VA_ARGS__)

#define	vmfne_vf_f64m8_b8_m(...) __riscv_vmfne_vf_f64m8_b8_mu(__VA_ARGS__)

#define	vmfne_vv_f16m1_b16(...) __riscv_vmfne_vv_f16m1_b16(__VA_ARGS__)

#define	vmfne_vv_f16m1_b16_m(...) __riscv_vmfne_vv_f16m1_b16_mu(__VA_ARGS__)

#define	vmfne_vv_f16m2_b8(...) __riscv_vmfne_vv_f16m2_b8(__VA_ARGS__)

#define	vmfne_vv_f16m2_b8_m(...) __riscv_vmfne_vv_f16m2_b8_mu(__VA_ARGS__)

#define	vmfne_vv_f16m4_b4(...) __riscv_vmfne_vv_f16m4_b4(__VA_ARGS__)

#define	vmfne_vv_f16m4_b4_m(...) __riscv_vmfne_vv_f16m4_b4_mu(__VA_ARGS__)

#define	vmfne_vv_f16m8_b2(...) __riscv_vmfne_vv_f16m8_b2(__VA_ARGS__)

#define	vmfne_vv_f16m8_b2_m(...) __riscv_vmfne_vv_f16m8_b2_mu(__VA_ARGS__)

#define	vmfne_vv_f16mf2_b32(...) __riscv_vmfne_vv_f16mf2_b32(__VA_ARGS__)

#define	vmfne_vv_f16mf2_b32_m(...) __riscv_vmfne_vv_f16mf2_b32_mu(__VA_ARGS__)

#define	vmfne_vv_f16mf4_b64(...) __riscv_vmfne_vv_f16mf4_b64(__VA_ARGS__)

#define	vmfne_vv_f16mf4_b64_m(...) __riscv_vmfne_vv_f16mf4_b64_mu(__VA_ARGS__)

#define	vmfne_vv_f32m1_b32(...) __riscv_vmfne_vv_f32m1_b32(__VA_ARGS__)

#define	vmfne_vv_f32m1_b32_m(...) __riscv_vmfne_vv_f32m1_b32_mu(__VA_ARGS__)

#define	vmfne_vv_f32m2_b16(...) __riscv_vmfne_vv_f32m2_b16(__VA_ARGS__)

#define	vmfne_vv_f32m2_b16_m(...) __riscv_vmfne_vv_f32m2_b16_mu(__VA_ARGS__)

#define	vmfne_vv_f32m4_b8(...) __riscv_vmfne_vv_f32m4_b8(__VA_ARGS__)

#define	vmfne_vv_f32m4_b8_m(...) __riscv_vmfne_vv_f32m4_b8_mu(__VA_ARGS__)

#define	vmfne_vv_f32m8_b4(...) __riscv_vmfne_vv_f32m8_b4(__VA_ARGS__)

#define	vmfne_vv_f32m8_b4_m(...) __riscv_vmfne_vv_f32m8_b4_mu(__VA_ARGS__)

#define	vmfne_vv_f32mf2_b64(...) __riscv_vmfne_vv_f32mf2_b64(__VA_ARGS__)

#define	vmfne_vv_f32mf2_b64_m(...) __riscv_vmfne_vv_f32mf2_b64_mu(__VA_ARGS__)

#define	vmfne_vv_f64m1_b64(...) __riscv_vmfne_vv_f64m1_b64(__VA_ARGS__)

#define	vmfne_vv_f64m1_b64_m(...) __riscv_vmfne_vv_f64m1_b64_mu(__VA_ARGS__)

#define	vmfne_vv_f64m2_b32(...) __riscv_vmfne_vv_f64m2_b32(__VA_ARGS__)

#define	vmfne_vv_f64m2_b32_m(...) __riscv_vmfne_vv_f64m2_b32_mu(__VA_ARGS__)

#define	vmfne_vv_f64m4_b16(...) __riscv_vmfne_vv_f64m4_b16(__VA_ARGS__)

#define	vmfne_vv_f64m4_b16_m(...) __riscv_vmfne_vv_f64m4_b16_mu(__VA_ARGS__)

#define	vmfne_vv_f64m8_b8(...) __riscv_vmfne_vv_f64m8_b8(__VA_ARGS__)

#define	vmfne_vv_f64m8_b8_m(...) __riscv_vmfne_vv_f64m8_b8_mu(__VA_ARGS__)

#define	vmin_vv_i16m1(...) __riscv_vmin_vv_i16m1(__VA_ARGS__)

#define	vmin_vv_i16m1_m(...) __riscv_vmin_vv_i16m1_tumu(__VA_ARGS__)

#define	vmin_vv_i16m2(...) __riscv_vmin_vv_i16m2(__VA_ARGS__)

#define	vmin_vv_i16m2_m(...) __riscv_vmin_vv_i16m2_tumu(__VA_ARGS__)

#define	vmin_vv_i16m4(...) __riscv_vmin_vv_i16m4(__VA_ARGS__)

#define	vmin_vv_i16m4_m(...) __riscv_vmin_vv_i16m4_tumu(__VA_ARGS__)

#define	vmin_vv_i16m8(...) __riscv_vmin_vv_i16m8(__VA_ARGS__)

#define	vmin_vv_i16m8_m(...) __riscv_vmin_vv_i16m8_tumu(__VA_ARGS__)

#define	vmin_vv_i16mf2(...) __riscv_vmin_vv_i16mf2(__VA_ARGS__)

#define	vmin_vv_i16mf2_m(...) __riscv_vmin_vv_i16mf2_tumu(__VA_ARGS__)

#define	vmin_vv_i16mf4(...) __riscv_vmin_vv_i16mf4(__VA_ARGS__)

#define	vmin_vv_i16mf4_m(...) __riscv_vmin_vv_i16mf4_tumu(__VA_ARGS__)

#define	vmin_vv_i32m1(...) __riscv_vmin_vv_i32m1(__VA_ARGS__)

#define	vmin_vv_i32m1_m(...) __riscv_vmin_vv_i32m1_tumu(__VA_ARGS__)

#define	vmin_vv_i32m2(...) __riscv_vmin_vv_i32m2(__VA_ARGS__)

#define	vmin_vv_i32m2_m(...) __riscv_vmin_vv_i32m2_tumu(__VA_ARGS__)

#define	vmin_vv_i32m4(...) __riscv_vmin_vv_i32m4(__VA_ARGS__)

#define	vmin_vv_i32m4_m(...) __riscv_vmin_vv_i32m4_tumu(__VA_ARGS__)

#define	vmin_vv_i32m8(...) __riscv_vmin_vv_i32m8(__VA_ARGS__)

#define	vmin_vv_i32m8_m(...) __riscv_vmin_vv_i32m8_tumu(__VA_ARGS__)

#define	vmin_vv_i32mf2(...) __riscv_vmin_vv_i32mf2(__VA_ARGS__)

#define	vmin_vv_i32mf2_m(...) __riscv_vmin_vv_i32mf2_tumu(__VA_ARGS__)

#define	vmin_vv_i64m1(...) __riscv_vmin_vv_i64m1(__VA_ARGS__)

#define	vmin_vv_i64m1_m(...) __riscv_vmin_vv_i64m1_tumu(__VA_ARGS__)

#define	vmin_vv_i64m2(...) __riscv_vmin_vv_i64m2(__VA_ARGS__)

#define	vmin_vv_i64m2_m(...) __riscv_vmin_vv_i64m2_tumu(__VA_ARGS__)

#define	vmin_vv_i64m4(...) __riscv_vmin_vv_i64m4(__VA_ARGS__)

#define	vmin_vv_i64m4_m(...) __riscv_vmin_vv_i64m4_tumu(__VA_ARGS__)

#define	vmin_vv_i64m8(...) __riscv_vmin_vv_i64m8(__VA_ARGS__)

#define	vmin_vv_i64m8_m(...) __riscv_vmin_vv_i64m8_tumu(__VA_ARGS__)

#define	vmin_vv_i8m1(...) __riscv_vmin_vv_i8m1(__VA_ARGS__)

#define	vmin_vv_i8m1_m(...) __riscv_vmin_vv_i8m1_tumu(__VA_ARGS__)

#define	vmin_vv_i8m2(...) __riscv_vmin_vv_i8m2(__VA_ARGS__)

#define	vmin_vv_i8m2_m(...) __riscv_vmin_vv_i8m2_tumu(__VA_ARGS__)

#define	vmin_vv_i8m4(...) __riscv_vmin_vv_i8m4(__VA_ARGS__)

#define	vmin_vv_i8m4_m(...) __riscv_vmin_vv_i8m4_tumu(__VA_ARGS__)

#define	vmin_vv_i8m8(...) __riscv_vmin_vv_i8m8(__VA_ARGS__)

#define	vmin_vv_i8m8_m(...) __riscv_vmin_vv_i8m8_tumu(__VA_ARGS__)

#define	vmin_vv_i8mf2(...) __riscv_vmin_vv_i8mf2(__VA_ARGS__)

#define	vmin_vv_i8mf2_m(...) __riscv_vmin_vv_i8mf2_tumu(__VA_ARGS__)

#define	vmin_vv_i8mf4(...) __riscv_vmin_vv_i8mf4(__VA_ARGS__)

#define	vmin_vv_i8mf4_m(...) __riscv_vmin_vv_i8mf4_tumu(__VA_ARGS__)

#define	vmin_vv_i8mf8(...) __riscv_vmin_vv_i8mf8(__VA_ARGS__)

#define	vmin_vv_i8mf8_m(...) __riscv_vmin_vv_i8mf8_tumu(__VA_ARGS__)

#define	vmin_vx_i16m1(...) __riscv_vmin_vx_i16m1(__VA_ARGS__)

#define	vmin_vx_i16m1_m(...) __riscv_vmin_vx_i16m1_tumu(__VA_ARGS__)

#define	vmin_vx_i16m2(...) __riscv_vmin_vx_i16m2(__VA_ARGS__)

#define	vmin_vx_i16m2_m(...) __riscv_vmin_vx_i16m2_tumu(__VA_ARGS__)

#define	vmin_vx_i16m4(...) __riscv_vmin_vx_i16m4(__VA_ARGS__)

#define	vmin_vx_i16m4_m(...) __riscv_vmin_vx_i16m4_tumu(__VA_ARGS__)

#define	vmin_vx_i16m8(...) __riscv_vmin_vx_i16m8(__VA_ARGS__)

#define	vmin_vx_i16m8_m(...) __riscv_vmin_vx_i16m8_tumu(__VA_ARGS__)

#define	vmin_vx_i16mf2(...) __riscv_vmin_vx_i16mf2(__VA_ARGS__)

#define	vmin_vx_i16mf2_m(...) __riscv_vmin_vx_i16mf2_tumu(__VA_ARGS__)

#define	vmin_vx_i16mf4(...) __riscv_vmin_vx_i16mf4(__VA_ARGS__)

#define	vmin_vx_i16mf4_m(...) __riscv_vmin_vx_i16mf4_tumu(__VA_ARGS__)

#define	vmin_vx_i32m1(...) __riscv_vmin_vx_i32m1(__VA_ARGS__)

#define	vmin_vx_i32m1_m(...) __riscv_vmin_vx_i32m1_tumu(__VA_ARGS__)

#define	vmin_vx_i32m2(...) __riscv_vmin_vx_i32m2(__VA_ARGS__)

#define	vmin_vx_i32m2_m(...) __riscv_vmin_vx_i32m2_tumu(__VA_ARGS__)

#define	vmin_vx_i32m4(...) __riscv_vmin_vx_i32m4(__VA_ARGS__)

#define	vmin_vx_i32m4_m(...) __riscv_vmin_vx_i32m4_tumu(__VA_ARGS__)

#define	vmin_vx_i32m8(...) __riscv_vmin_vx_i32m8(__VA_ARGS__)

#define	vmin_vx_i32m8_m(...) __riscv_vmin_vx_i32m8_tumu(__VA_ARGS__)

#define	vmin_vx_i32mf2(...) __riscv_vmin_vx_i32mf2(__VA_ARGS__)

#define	vmin_vx_i32mf2_m(...) __riscv_vmin_vx_i32mf2_tumu(__VA_ARGS__)

#define	vmin_vx_i64m1(...) __riscv_vmin_vx_i64m1(__VA_ARGS__)

#define	vmin_vx_i64m1_m(...) __riscv_vmin_vx_i64m1_tumu(__VA_ARGS__)

#define	vmin_vx_i64m2(...) __riscv_vmin_vx_i64m2(__VA_ARGS__)

#define	vmin_vx_i64m2_m(...) __riscv_vmin_vx_i64m2_tumu(__VA_ARGS__)

#define	vmin_vx_i64m4(...) __riscv_vmin_vx_i64m4(__VA_ARGS__)

#define	vmin_vx_i64m4_m(...) __riscv_vmin_vx_i64m4_tumu(__VA_ARGS__)

#define	vmin_vx_i64m8(...) __riscv_vmin_vx_i64m8(__VA_ARGS__)

#define	vmin_vx_i64m8_m(...) __riscv_vmin_vx_i64m8_tumu(__VA_ARGS__)

#define	vmin_vx_i8m1(...) __riscv_vmin_vx_i8m1(__VA_ARGS__)

#define	vmin_vx_i8m1_m(...) __riscv_vmin_vx_i8m1_tumu(__VA_ARGS__)

#define	vmin_vx_i8m2(...) __riscv_vmin_vx_i8m2(__VA_ARGS__)

#define	vmin_vx_i8m2_m(...) __riscv_vmin_vx_i8m2_tumu(__VA_ARGS__)

#define	vmin_vx_i8m4(...) __riscv_vmin_vx_i8m4(__VA_ARGS__)

#define	vmin_vx_i8m4_m(...) __riscv_vmin_vx_i8m4_tumu(__VA_ARGS__)

#define	vmin_vx_i8m8(...) __riscv_vmin_vx_i8m8(__VA_ARGS__)

#define	vmin_vx_i8m8_m(...) __riscv_vmin_vx_i8m8_tumu(__VA_ARGS__)

#define	vmin_vx_i8mf2(...) __riscv_vmin_vx_i8mf2(__VA_ARGS__)

#define	vmin_vx_i8mf2_m(...) __riscv_vmin_vx_i8mf2_tumu(__VA_ARGS__)

#define	vmin_vx_i8mf4(...) __riscv_vmin_vx_i8mf4(__VA_ARGS__)

#define	vmin_vx_i8mf4_m(...) __riscv_vmin_vx_i8mf4_tumu(__VA_ARGS__)

#define	vmin_vx_i8mf8(...) __riscv_vmin_vx_i8mf8(__VA_ARGS__)

#define	vmin_vx_i8mf8_m(...) __riscv_vmin_vx_i8mf8_tumu(__VA_ARGS__)

#define	vminu_vv_u16m1(...) __riscv_vminu_vv_u16m1(__VA_ARGS__)

#define	vminu_vv_u16m1_m(...) __riscv_vminu_vv_u16m1_tumu(__VA_ARGS__)

#define	vminu_vv_u16m2(...) __riscv_vminu_vv_u16m2(__VA_ARGS__)

#define	vminu_vv_u16m2_m(...) __riscv_vminu_vv_u16m2_tumu(__VA_ARGS__)

#define	vminu_vv_u16m4(...) __riscv_vminu_vv_u16m4(__VA_ARGS__)

#define	vminu_vv_u16m4_m(...) __riscv_vminu_vv_u16m4_tumu(__VA_ARGS__)

#define	vminu_vv_u16m8(...) __riscv_vminu_vv_u16m8(__VA_ARGS__)

#define	vminu_vv_u16m8_m(...) __riscv_vminu_vv_u16m8_tumu(__VA_ARGS__)

#define	vminu_vv_u16mf2(...) __riscv_vminu_vv_u16mf2(__VA_ARGS__)

#define	vminu_vv_u16mf2_m(...) __riscv_vminu_vv_u16mf2_tumu(__VA_ARGS__)

#define	vminu_vv_u16mf4(...) __riscv_vminu_vv_u16mf4(__VA_ARGS__)

#define	vminu_vv_u16mf4_m(...) __riscv_vminu_vv_u16mf4_tumu(__VA_ARGS__)

#define	vminu_vv_u32m1(...) __riscv_vminu_vv_u32m1(__VA_ARGS__)

#define	vminu_vv_u32m1_m(...) __riscv_vminu_vv_u32m1_tumu(__VA_ARGS__)

#define	vminu_vv_u32m2(...) __riscv_vminu_vv_u32m2(__VA_ARGS__)

#define	vminu_vv_u32m2_m(...) __riscv_vminu_vv_u32m2_tumu(__VA_ARGS__)

#define	vminu_vv_u32m4(...) __riscv_vminu_vv_u32m4(__VA_ARGS__)

#define	vminu_vv_u32m4_m(...) __riscv_vminu_vv_u32m4_tumu(__VA_ARGS__)

#define	vminu_vv_u32m8(...) __riscv_vminu_vv_u32m8(__VA_ARGS__)

#define	vminu_vv_u32m8_m(...) __riscv_vminu_vv_u32m8_tumu(__VA_ARGS__)

#define	vminu_vv_u32mf2(...) __riscv_vminu_vv_u32mf2(__VA_ARGS__)

#define	vminu_vv_u32mf2_m(...) __riscv_vminu_vv_u32mf2_tumu(__VA_ARGS__)

#define	vminu_vv_u64m1(...) __riscv_vminu_vv_u64m1(__VA_ARGS__)

#define	vminu_vv_u64m1_m(...) __riscv_vminu_vv_u64m1_tumu(__VA_ARGS__)

#define	vminu_vv_u64m2(...) __riscv_vminu_vv_u64m2(__VA_ARGS__)

#define	vminu_vv_u64m2_m(...) __riscv_vminu_vv_u64m2_tumu(__VA_ARGS__)

#define	vminu_vv_u64m4(...) __riscv_vminu_vv_u64m4(__VA_ARGS__)

#define	vminu_vv_u64m4_m(...) __riscv_vminu_vv_u64m4_tumu(__VA_ARGS__)

#define	vminu_vv_u64m8(...) __riscv_vminu_vv_u64m8(__VA_ARGS__)

#define	vminu_vv_u64m8_m(...) __riscv_vminu_vv_u64m8_tumu(__VA_ARGS__)

#define	vminu_vv_u8m1(...) __riscv_vminu_vv_u8m1(__VA_ARGS__)

#define	vminu_vv_u8m1_m(...) __riscv_vminu_vv_u8m1_tumu(__VA_ARGS__)

#define	vminu_vv_u8m2(...) __riscv_vminu_vv_u8m2(__VA_ARGS__)

#define	vminu_vv_u8m2_m(...) __riscv_vminu_vv_u8m2_tumu(__VA_ARGS__)

#define	vminu_vv_u8m4(...) __riscv_vminu_vv_u8m4(__VA_ARGS__)

#define	vminu_vv_u8m4_m(...) __riscv_vminu_vv_u8m4_tumu(__VA_ARGS__)

#define	vminu_vv_u8m8(...) __riscv_vminu_vv_u8m8(__VA_ARGS__)

#define	vminu_vv_u8m8_m(...) __riscv_vminu_vv_u8m8_tumu(__VA_ARGS__)

#define	vminu_vv_u8mf2(...) __riscv_vminu_vv_u8mf2(__VA_ARGS__)

#define	vminu_vv_u8mf2_m(...) __riscv_vminu_vv_u8mf2_tumu(__VA_ARGS__)

#define	vminu_vv_u8mf4(...) __riscv_vminu_vv_u8mf4(__VA_ARGS__)

#define	vminu_vv_u8mf4_m(...) __riscv_vminu_vv_u8mf4_tumu(__VA_ARGS__)

#define	vminu_vv_u8mf8(...) __riscv_vminu_vv_u8mf8(__VA_ARGS__)

#define	vminu_vv_u8mf8_m(...) __riscv_vminu_vv_u8mf8_tumu(__VA_ARGS__)

#define	vminu_vx_u16m1(...) __riscv_vminu_vx_u16m1(__VA_ARGS__)

#define	vminu_vx_u16m1_m(...) __riscv_vminu_vx_u16m1_tumu(__VA_ARGS__)

#define	vminu_vx_u16m2(...) __riscv_vminu_vx_u16m2(__VA_ARGS__)

#define	vminu_vx_u16m2_m(...) __riscv_vminu_vx_u16m2_tumu(__VA_ARGS__)

#define	vminu_vx_u16m4(...) __riscv_vminu_vx_u16m4(__VA_ARGS__)

#define	vminu_vx_u16m4_m(...) __riscv_vminu_vx_u16m4_tumu(__VA_ARGS__)

#define	vminu_vx_u16m8(...) __riscv_vminu_vx_u16m8(__VA_ARGS__)

#define	vminu_vx_u16m8_m(...) __riscv_vminu_vx_u16m8_tumu(__VA_ARGS__)

#define	vminu_vx_u16mf2(...) __riscv_vminu_vx_u16mf2(__VA_ARGS__)

#define	vminu_vx_u16mf2_m(...) __riscv_vminu_vx_u16mf2_tumu(__VA_ARGS__)

#define	vminu_vx_u16mf4(...) __riscv_vminu_vx_u16mf4(__VA_ARGS__)

#define	vminu_vx_u16mf4_m(...) __riscv_vminu_vx_u16mf4_tumu(__VA_ARGS__)

#define	vminu_vx_u32m1(...) __riscv_vminu_vx_u32m1(__VA_ARGS__)

#define	vminu_vx_u32m1_m(...) __riscv_vminu_vx_u32m1_tumu(__VA_ARGS__)

#define	vminu_vx_u32m2(...) __riscv_vminu_vx_u32m2(__VA_ARGS__)

#define	vminu_vx_u32m2_m(...) __riscv_vminu_vx_u32m2_tumu(__VA_ARGS__)

#define	vminu_vx_u32m4(...) __riscv_vminu_vx_u32m4(__VA_ARGS__)

#define	vminu_vx_u32m4_m(...) __riscv_vminu_vx_u32m4_tumu(__VA_ARGS__)

#define	vminu_vx_u32m8(...) __riscv_vminu_vx_u32m8(__VA_ARGS__)

#define	vminu_vx_u32m8_m(...) __riscv_vminu_vx_u32m8_tumu(__VA_ARGS__)

#define	vminu_vx_u32mf2(...) __riscv_vminu_vx_u32mf2(__VA_ARGS__)

#define	vminu_vx_u32mf2_m(...) __riscv_vminu_vx_u32mf2_tumu(__VA_ARGS__)

#define	vminu_vx_u64m1(...) __riscv_vminu_vx_u64m1(__VA_ARGS__)

#define	vminu_vx_u64m1_m(...) __riscv_vminu_vx_u64m1_tumu(__VA_ARGS__)

#define	vminu_vx_u64m2(...) __riscv_vminu_vx_u64m2(__VA_ARGS__)

#define	vminu_vx_u64m2_m(...) __riscv_vminu_vx_u64m2_tumu(__VA_ARGS__)

#define	vminu_vx_u64m4(...) __riscv_vminu_vx_u64m4(__VA_ARGS__)

#define	vminu_vx_u64m4_m(...) __riscv_vminu_vx_u64m4_tumu(__VA_ARGS__)

#define	vminu_vx_u64m8(...) __riscv_vminu_vx_u64m8(__VA_ARGS__)

#define	vminu_vx_u64m8_m(...) __riscv_vminu_vx_u64m8_tumu(__VA_ARGS__)

#define	vminu_vx_u8m1(...) __riscv_vminu_vx_u8m1(__VA_ARGS__)

#define	vminu_vx_u8m1_m(...) __riscv_vminu_vx_u8m1_tumu(__VA_ARGS__)

#define	vminu_vx_u8m2(...) __riscv_vminu_vx_u8m2(__VA_ARGS__)

#define	vminu_vx_u8m2_m(...) __riscv_vminu_vx_u8m2_tumu(__VA_ARGS__)

#define	vminu_vx_u8m4(...) __riscv_vminu_vx_u8m4(__VA_ARGS__)

#define	vminu_vx_u8m4_m(...) __riscv_vminu_vx_u8m4_tumu(__VA_ARGS__)

#define	vminu_vx_u8m8(...) __riscv_vminu_vx_u8m8(__VA_ARGS__)

#define	vminu_vx_u8m8_m(...) __riscv_vminu_vx_u8m8_tumu(__VA_ARGS__)

#define	vminu_vx_u8mf2(...) __riscv_vminu_vx_u8mf2(__VA_ARGS__)

#define	vminu_vx_u8mf2_m(...) __riscv_vminu_vx_u8mf2_tumu(__VA_ARGS__)

#define	vminu_vx_u8mf4(...) __riscv_vminu_vx_u8mf4(__VA_ARGS__)

#define	vminu_vx_u8mf4_m(...) __riscv_vminu_vx_u8mf4_tumu(__VA_ARGS__)

#define	vminu_vx_u8mf8(...) __riscv_vminu_vx_u8mf8(__VA_ARGS__)

#define	vminu_vx_u8mf8_m(...) __riscv_vminu_vx_u8mf8_tumu(__VA_ARGS__)

#define	vmmv_m_b1(...) __riscv_vmmv_m_b1(__VA_ARGS__)

#define	vmmv_m_b16(...) __riscv_vmmv_m_b16(__VA_ARGS__)

#define	vmmv_m_b2(...) __riscv_vmmv_m_b2(__VA_ARGS__)

#define	vmmv_m_b32(...) __riscv_vmmv_m_b32(__VA_ARGS__)

#define	vmmv_m_b4(...) __riscv_vmmv_m_b4(__VA_ARGS__)

#define	vmmv_m_b64(...) __riscv_vmmv_m_b64(__VA_ARGS__)

#define	vmmv_m_b8(...) __riscv_vmmv_m_b8(__VA_ARGS__)

#define	vmnand_mm_b1(...) __riscv_vmnand_mm_b1(__VA_ARGS__)

#define	vmnand_mm_b16(...) __riscv_vmnand_mm_b16(__VA_ARGS__)

#define	vmnand_mm_b2(...) __riscv_vmnand_mm_b2(__VA_ARGS__)

#define	vmnand_mm_b32(...) __riscv_vmnand_mm_b32(__VA_ARGS__)

#define	vmnand_mm_b4(...) __riscv_vmnand_mm_b4(__VA_ARGS__)

#define	vmnand_mm_b64(...) __riscv_vmnand_mm_b64(__VA_ARGS__)

#define	vmnand_mm_b8(...) __riscv_vmnand_mm_b8(__VA_ARGS__)

#define	vmnor_mm_b1(...) __riscv_vmnor_mm_b1(__VA_ARGS__)

#define	vmnor_mm_b16(...) __riscv_vmnor_mm_b16(__VA_ARGS__)

#define	vmnor_mm_b2(...) __riscv_vmnor_mm_b2(__VA_ARGS__)

#define	vmnor_mm_b32(...) __riscv_vmnor_mm_b32(__VA_ARGS__)

#define	vmnor_mm_b4(...) __riscv_vmnor_mm_b4(__VA_ARGS__)

#define	vmnor_mm_b64(...) __riscv_vmnor_mm_b64(__VA_ARGS__)

#define	vmnor_mm_b8(...) __riscv_vmnor_mm_b8(__VA_ARGS__)

#define	vmnot_m_b1(...) __riscv_vmnot_m_b1(__VA_ARGS__)

#define	vmnot_m_b16(...) __riscv_vmnot_m_b16(__VA_ARGS__)

#define	vmnot_m_b2(...) __riscv_vmnot_m_b2(__VA_ARGS__)

#define	vmnot_m_b32(...) __riscv_vmnot_m_b32(__VA_ARGS__)

#define	vmnot_m_b4(...) __riscv_vmnot_m_b4(__VA_ARGS__)

#define	vmnot_m_b64(...) __riscv_vmnot_m_b64(__VA_ARGS__)

#define	vmnot_m_b8(...) __riscv_vmnot_m_b8(__VA_ARGS__)

#define	vmor_mm_b1(...) __riscv_vmor_mm_b1(__VA_ARGS__)

#define	vmor_mm_b16(...) __riscv_vmor_mm_b16(__VA_ARGS__)

#define	vmor_mm_b2(...) __riscv_vmor_mm_b2(__VA_ARGS__)

#define	vmor_mm_b32(...) __riscv_vmor_mm_b32(__VA_ARGS__)

#define	vmor_mm_b4(...) __riscv_vmor_mm_b4(__VA_ARGS__)

#define	vmor_mm_b64(...) __riscv_vmor_mm_b64(__VA_ARGS__)

#define	vmor_mm_b8(...) __riscv_vmor_mm_b8(__VA_ARGS__)

#define	vmorn_mm_b1(...) __riscv_vmorn_mm_b1(__VA_ARGS__)

#define	vmorn_mm_b16(...) __riscv_vmorn_mm_b16(__VA_ARGS__)

#define	vmorn_mm_b2(...) __riscv_vmorn_mm_b2(__VA_ARGS__)

#define	vmorn_mm_b32(...) __riscv_vmorn_mm_b32(__VA_ARGS__)

#define	vmorn_mm_b4(...) __riscv_vmorn_mm_b4(__VA_ARGS__)

#define	vmorn_mm_b64(...) __riscv_vmorn_mm_b64(__VA_ARGS__)

#define	vmorn_mm_b8(...) __riscv_vmorn_mm_b8(__VA_ARGS__)

#define	vmsbc_vv_i16m1_b16(...) __riscv_vmsbc_vv_i16m1_b16(__VA_ARGS__)

#define	vmsbc_vv_i16m2_b8(...) __riscv_vmsbc_vv_i16m2_b8(__VA_ARGS__)

#define	vmsbc_vv_i16m4_b4(...) __riscv_vmsbc_vv_i16m4_b4(__VA_ARGS__)

#define	vmsbc_vv_i16m8_b2(...) __riscv_vmsbc_vv_i16m8_b2(__VA_ARGS__)

#define	vmsbc_vv_i16mf2_b32(...) __riscv_vmsbc_vv_i16mf2_b32(__VA_ARGS__)

#define	vmsbc_vv_i16mf4_b64(...) __riscv_vmsbc_vv_i16mf4_b64(__VA_ARGS__)

#define	vmsbc_vv_i32m1_b32(...) __riscv_vmsbc_vv_i32m1_b32(__VA_ARGS__)

#define	vmsbc_vv_i32m2_b16(...) __riscv_vmsbc_vv_i32m2_b16(__VA_ARGS__)

#define	vmsbc_vv_i32m4_b8(...) __riscv_vmsbc_vv_i32m4_b8(__VA_ARGS__)

#define	vmsbc_vv_i32m8_b4(...) __riscv_vmsbc_vv_i32m8_b4(__VA_ARGS__)

#define	vmsbc_vv_i32mf2_b64(...) __riscv_vmsbc_vv_i32mf2_b64(__VA_ARGS__)

#define	vmsbc_vv_i64m1_b64(...) __riscv_vmsbc_vv_i64m1_b64(__VA_ARGS__)

#define	vmsbc_vv_i64m2_b32(...) __riscv_vmsbc_vv_i64m2_b32(__VA_ARGS__)

#define	vmsbc_vv_i64m4_b16(...) __riscv_vmsbc_vv_i64m4_b16(__VA_ARGS__)

#define	vmsbc_vv_i64m8_b8(...) __riscv_vmsbc_vv_i64m8_b8(__VA_ARGS__)

#define	vmsbc_vv_i8m1_b8(...) __riscv_vmsbc_vv_i8m1_b8(__VA_ARGS__)

#define	vmsbc_vv_i8m2_b4(...) __riscv_vmsbc_vv_i8m2_b4(__VA_ARGS__)

#define	vmsbc_vv_i8m4_b2(...) __riscv_vmsbc_vv_i8m4_b2(__VA_ARGS__)

#define	vmsbc_vv_i8m8_b1(...) __riscv_vmsbc_vv_i8m8_b1(__VA_ARGS__)

#define	vmsbc_vv_i8mf2_b16(...) __riscv_vmsbc_vv_i8mf2_b16(__VA_ARGS__)

#define	vmsbc_vv_i8mf4_b32(...) __riscv_vmsbc_vv_i8mf4_b32(__VA_ARGS__)

#define	vmsbc_vv_i8mf8_b64(...) __riscv_vmsbc_vv_i8mf8_b64(__VA_ARGS__)

#define	vmsbc_vv_u16m1_b16(...) __riscv_vmsbc_vv_u16m1_b16(__VA_ARGS__)

#define	vmsbc_vv_u16m2_b8(...) __riscv_vmsbc_vv_u16m2_b8(__VA_ARGS__)

#define	vmsbc_vv_u16m4_b4(...) __riscv_vmsbc_vv_u16m4_b4(__VA_ARGS__)

#define	vmsbc_vv_u16m8_b2(...) __riscv_vmsbc_vv_u16m8_b2(__VA_ARGS__)

#define	vmsbc_vv_u16mf2_b32(...) __riscv_vmsbc_vv_u16mf2_b32(__VA_ARGS__)

#define	vmsbc_vv_u16mf4_b64(...) __riscv_vmsbc_vv_u16mf4_b64(__VA_ARGS__)

#define	vmsbc_vv_u32m1_b32(...) __riscv_vmsbc_vv_u32m1_b32(__VA_ARGS__)

#define	vmsbc_vv_u32m2_b16(...) __riscv_vmsbc_vv_u32m2_b16(__VA_ARGS__)

#define	vmsbc_vv_u32m4_b8(...) __riscv_vmsbc_vv_u32m4_b8(__VA_ARGS__)

#define	vmsbc_vv_u32m8_b4(...) __riscv_vmsbc_vv_u32m8_b4(__VA_ARGS__)

#define	vmsbc_vv_u32mf2_b64(...) __riscv_vmsbc_vv_u32mf2_b64(__VA_ARGS__)

#define	vmsbc_vv_u64m1_b64(...) __riscv_vmsbc_vv_u64m1_b64(__VA_ARGS__)

#define	vmsbc_vv_u64m2_b32(...) __riscv_vmsbc_vv_u64m2_b32(__VA_ARGS__)

#define	vmsbc_vv_u64m4_b16(...) __riscv_vmsbc_vv_u64m4_b16(__VA_ARGS__)

#define	vmsbc_vv_u64m8_b8(...) __riscv_vmsbc_vv_u64m8_b8(__VA_ARGS__)

#define	vmsbc_vv_u8m1_b8(...) __riscv_vmsbc_vv_u8m1_b8(__VA_ARGS__)

#define	vmsbc_vv_u8m2_b4(...) __riscv_vmsbc_vv_u8m2_b4(__VA_ARGS__)

#define	vmsbc_vv_u8m4_b2(...) __riscv_vmsbc_vv_u8m4_b2(__VA_ARGS__)

#define	vmsbc_vv_u8m8_b1(...) __riscv_vmsbc_vv_u8m8_b1(__VA_ARGS__)

#define	vmsbc_vv_u8mf2_b16(...) __riscv_vmsbc_vv_u8mf2_b16(__VA_ARGS__)

#define	vmsbc_vv_u8mf4_b32(...) __riscv_vmsbc_vv_u8mf4_b32(__VA_ARGS__)

#define	vmsbc_vv_u8mf8_b64(...) __riscv_vmsbc_vv_u8mf8_b64(__VA_ARGS__)

#define	vmsbc_vvm_i16m1_b16(...) __riscv_vmsbc_vvm_i16m1_b16(__VA_ARGS__)

#define	vmsbc_vvm_i16m2_b8(...) __riscv_vmsbc_vvm_i16m2_b8(__VA_ARGS__)

#define	vmsbc_vvm_i16m4_b4(...) __riscv_vmsbc_vvm_i16m4_b4(__VA_ARGS__)

#define	vmsbc_vvm_i16m8_b2(...) __riscv_vmsbc_vvm_i16m8_b2(__VA_ARGS__)

#define	vmsbc_vvm_i16mf2_b32(...) __riscv_vmsbc_vvm_i16mf2_b32(__VA_ARGS__)

#define	vmsbc_vvm_i16mf4_b64(...) __riscv_vmsbc_vvm_i16mf4_b64(__VA_ARGS__)

#define	vmsbc_vvm_i32m1_b32(...) __riscv_vmsbc_vvm_i32m1_b32(__VA_ARGS__)

#define	vmsbc_vvm_i32m2_b16(...) __riscv_vmsbc_vvm_i32m2_b16(__VA_ARGS__)

#define	vmsbc_vvm_i32m4_b8(...) __riscv_vmsbc_vvm_i32m4_b8(__VA_ARGS__)

#define	vmsbc_vvm_i32m8_b4(...) __riscv_vmsbc_vvm_i32m8_b4(__VA_ARGS__)

#define	vmsbc_vvm_i32mf2_b64(...) __riscv_vmsbc_vvm_i32mf2_b64(__VA_ARGS__)

#define	vmsbc_vvm_i64m1_b64(...) __riscv_vmsbc_vvm_i64m1_b64(__VA_ARGS__)

#define	vmsbc_vvm_i64m2_b32(...) __riscv_vmsbc_vvm_i64m2_b32(__VA_ARGS__)

#define	vmsbc_vvm_i64m4_b16(...) __riscv_vmsbc_vvm_i64m4_b16(__VA_ARGS__)

#define	vmsbc_vvm_i64m8_b8(...) __riscv_vmsbc_vvm_i64m8_b8(__VA_ARGS__)

#define	vmsbc_vvm_i8m1_b8(...) __riscv_vmsbc_vvm_i8m1_b8(__VA_ARGS__)

#define	vmsbc_vvm_i8m2_b4(...) __riscv_vmsbc_vvm_i8m2_b4(__VA_ARGS__)

#define	vmsbc_vvm_i8m4_b2(...) __riscv_vmsbc_vvm_i8m4_b2(__VA_ARGS__)

#define	vmsbc_vvm_i8m8_b1(...) __riscv_vmsbc_vvm_i8m8_b1(__VA_ARGS__)

#define	vmsbc_vvm_i8mf2_b16(...) __riscv_vmsbc_vvm_i8mf2_b16(__VA_ARGS__)

#define	vmsbc_vvm_i8mf4_b32(...) __riscv_vmsbc_vvm_i8mf4_b32(__VA_ARGS__)

#define	vmsbc_vvm_i8mf8_b64(...) __riscv_vmsbc_vvm_i8mf8_b64(__VA_ARGS__)

#define	vmsbc_vvm_u16m1_b16(...) __riscv_vmsbc_vvm_u16m1_b16(__VA_ARGS__)

#define	vmsbc_vvm_u16m2_b8(...) __riscv_vmsbc_vvm_u16m2_b8(__VA_ARGS__)

#define	vmsbc_vvm_u16m4_b4(...) __riscv_vmsbc_vvm_u16m4_b4(__VA_ARGS__)

#define	vmsbc_vvm_u16m8_b2(...) __riscv_vmsbc_vvm_u16m8_b2(__VA_ARGS__)

#define	vmsbc_vvm_u16mf2_b32(...) __riscv_vmsbc_vvm_u16mf2_b32(__VA_ARGS__)

#define	vmsbc_vvm_u16mf4_b64(...) __riscv_vmsbc_vvm_u16mf4_b64(__VA_ARGS__)

#define	vmsbc_vvm_u32m1_b32(...) __riscv_vmsbc_vvm_u32m1_b32(__VA_ARGS__)

#define	vmsbc_vvm_u32m2_b16(...) __riscv_vmsbc_vvm_u32m2_b16(__VA_ARGS__)

#define	vmsbc_vvm_u32m4_b8(...) __riscv_vmsbc_vvm_u32m4_b8(__VA_ARGS__)

#define	vmsbc_vvm_u32m8_b4(...) __riscv_vmsbc_vvm_u32m8_b4(__VA_ARGS__)

#define	vmsbc_vvm_u32mf2_b64(...) __riscv_vmsbc_vvm_u32mf2_b64(__VA_ARGS__)

#define	vmsbc_vvm_u64m1_b64(...) __riscv_vmsbc_vvm_u64m1_b64(__VA_ARGS__)

#define	vmsbc_vvm_u64m2_b32(...) __riscv_vmsbc_vvm_u64m2_b32(__VA_ARGS__)

#define	vmsbc_vvm_u64m4_b16(...) __riscv_vmsbc_vvm_u64m4_b16(__VA_ARGS__)

#define	vmsbc_vvm_u64m8_b8(...) __riscv_vmsbc_vvm_u64m8_b8(__VA_ARGS__)

#define	vmsbc_vvm_u8m1_b8(...) __riscv_vmsbc_vvm_u8m1_b8(__VA_ARGS__)

#define	vmsbc_vvm_u8m2_b4(...) __riscv_vmsbc_vvm_u8m2_b4(__VA_ARGS__)

#define	vmsbc_vvm_u8m4_b2(...) __riscv_vmsbc_vvm_u8m4_b2(__VA_ARGS__)

#define	vmsbc_vvm_u8m8_b1(...) __riscv_vmsbc_vvm_u8m8_b1(__VA_ARGS__)

#define	vmsbc_vvm_u8mf2_b16(...) __riscv_vmsbc_vvm_u8mf2_b16(__VA_ARGS__)

#define	vmsbc_vvm_u8mf4_b32(...) __riscv_vmsbc_vvm_u8mf4_b32(__VA_ARGS__)

#define	vmsbc_vvm_u8mf8_b64(...) __riscv_vmsbc_vvm_u8mf8_b64(__VA_ARGS__)

#define	vmsbc_vx_i16m1_b16(...) __riscv_vmsbc_vx_i16m1_b16(__VA_ARGS__)

#define	vmsbc_vx_i16m2_b8(...) __riscv_vmsbc_vx_i16m2_b8(__VA_ARGS__)

#define	vmsbc_vx_i16m4_b4(...) __riscv_vmsbc_vx_i16m4_b4(__VA_ARGS__)

#define	vmsbc_vx_i16m8_b2(...) __riscv_vmsbc_vx_i16m8_b2(__VA_ARGS__)

#define	vmsbc_vx_i16mf2_b32(...) __riscv_vmsbc_vx_i16mf2_b32(__VA_ARGS__)

#define	vmsbc_vx_i16mf4_b64(...) __riscv_vmsbc_vx_i16mf4_b64(__VA_ARGS__)

#define	vmsbc_vx_i32m1_b32(...) __riscv_vmsbc_vx_i32m1_b32(__VA_ARGS__)

#define	vmsbc_vx_i32m2_b16(...) __riscv_vmsbc_vx_i32m2_b16(__VA_ARGS__)

#define	vmsbc_vx_i32m4_b8(...) __riscv_vmsbc_vx_i32m4_b8(__VA_ARGS__)

#define	vmsbc_vx_i32m8_b4(...) __riscv_vmsbc_vx_i32m8_b4(__VA_ARGS__)

#define	vmsbc_vx_i32mf2_b64(...) __riscv_vmsbc_vx_i32mf2_b64(__VA_ARGS__)

#define	vmsbc_vx_i64m1_b64(...) __riscv_vmsbc_vx_i64m1_b64(__VA_ARGS__)

#define	vmsbc_vx_i64m2_b32(...) __riscv_vmsbc_vx_i64m2_b32(__VA_ARGS__)

#define	vmsbc_vx_i64m4_b16(...) __riscv_vmsbc_vx_i64m4_b16(__VA_ARGS__)

#define	vmsbc_vx_i64m8_b8(...) __riscv_vmsbc_vx_i64m8_b8(__VA_ARGS__)

#define	vmsbc_vx_i8m1_b8(...) __riscv_vmsbc_vx_i8m1_b8(__VA_ARGS__)

#define	vmsbc_vx_i8m2_b4(...) __riscv_vmsbc_vx_i8m2_b4(__VA_ARGS__)

#define	vmsbc_vx_i8m4_b2(...) __riscv_vmsbc_vx_i8m4_b2(__VA_ARGS__)

#define	vmsbc_vx_i8m8_b1(...) __riscv_vmsbc_vx_i8m8_b1(__VA_ARGS__)

#define	vmsbc_vx_i8mf2_b16(...) __riscv_vmsbc_vx_i8mf2_b16(__VA_ARGS__)

#define	vmsbc_vx_i8mf4_b32(...) __riscv_vmsbc_vx_i8mf4_b32(__VA_ARGS__)

#define	vmsbc_vx_i8mf8_b64(...) __riscv_vmsbc_vx_i8mf8_b64(__VA_ARGS__)

#define	vmsbc_vx_u16m1_b16(...) __riscv_vmsbc_vx_u16m1_b16(__VA_ARGS__)

#define	vmsbc_vx_u16m2_b8(...) __riscv_vmsbc_vx_u16m2_b8(__VA_ARGS__)

#define	vmsbc_vx_u16m4_b4(...) __riscv_vmsbc_vx_u16m4_b4(__VA_ARGS__)

#define	vmsbc_vx_u16m8_b2(...) __riscv_vmsbc_vx_u16m8_b2(__VA_ARGS__)

#define	vmsbc_vx_u16mf2_b32(...) __riscv_vmsbc_vx_u16mf2_b32(__VA_ARGS__)

#define	vmsbc_vx_u16mf4_b64(...) __riscv_vmsbc_vx_u16mf4_b64(__VA_ARGS__)

#define	vmsbc_vx_u32m1_b32(...) __riscv_vmsbc_vx_u32m1_b32(__VA_ARGS__)

#define	vmsbc_vx_u32m2_b16(...) __riscv_vmsbc_vx_u32m2_b16(__VA_ARGS__)

#define	vmsbc_vx_u32m4_b8(...) __riscv_vmsbc_vx_u32m4_b8(__VA_ARGS__)

#define	vmsbc_vx_u32m8_b4(...) __riscv_vmsbc_vx_u32m8_b4(__VA_ARGS__)

#define	vmsbc_vx_u32mf2_b64(...) __riscv_vmsbc_vx_u32mf2_b64(__VA_ARGS__)

#define	vmsbc_vx_u64m1_b64(...) __riscv_vmsbc_vx_u64m1_b64(__VA_ARGS__)

#define	vmsbc_vx_u64m2_b32(...) __riscv_vmsbc_vx_u64m2_b32(__VA_ARGS__)

#define	vmsbc_vx_u64m4_b16(...) __riscv_vmsbc_vx_u64m4_b16(__VA_ARGS__)

#define	vmsbc_vx_u64m8_b8(...) __riscv_vmsbc_vx_u64m8_b8(__VA_ARGS__)

#define	vmsbc_vx_u8m1_b8(...) __riscv_vmsbc_vx_u8m1_b8(__VA_ARGS__)

#define	vmsbc_vx_u8m2_b4(...) __riscv_vmsbc_vx_u8m2_b4(__VA_ARGS__)

#define	vmsbc_vx_u8m4_b2(...) __riscv_vmsbc_vx_u8m4_b2(__VA_ARGS__)

#define	vmsbc_vx_u8m8_b1(...) __riscv_vmsbc_vx_u8m8_b1(__VA_ARGS__)

#define	vmsbc_vx_u8mf2_b16(...) __riscv_vmsbc_vx_u8mf2_b16(__VA_ARGS__)

#define	vmsbc_vx_u8mf4_b32(...) __riscv_vmsbc_vx_u8mf4_b32(__VA_ARGS__)

#define	vmsbc_vx_u8mf8_b64(...) __riscv_vmsbc_vx_u8mf8_b64(__VA_ARGS__)

#define	vmsbc_vxm_i16m1_b16(...) __riscv_vmsbc_vxm_i16m1_b16(__VA_ARGS__)

#define	vmsbc_vxm_i16m2_b8(...) __riscv_vmsbc_vxm_i16m2_b8(__VA_ARGS__)

#define	vmsbc_vxm_i16m4_b4(...) __riscv_vmsbc_vxm_i16m4_b4(__VA_ARGS__)

#define	vmsbc_vxm_i16m8_b2(...) __riscv_vmsbc_vxm_i16m8_b2(__VA_ARGS__)

#define	vmsbc_vxm_i16mf2_b32(...) __riscv_vmsbc_vxm_i16mf2_b32(__VA_ARGS__)

#define	vmsbc_vxm_i16mf4_b64(...) __riscv_vmsbc_vxm_i16mf4_b64(__VA_ARGS__)

#define	vmsbc_vxm_i32m1_b32(...) __riscv_vmsbc_vxm_i32m1_b32(__VA_ARGS__)

#define	vmsbc_vxm_i32m2_b16(...) __riscv_vmsbc_vxm_i32m2_b16(__VA_ARGS__)

#define	vmsbc_vxm_i32m4_b8(...) __riscv_vmsbc_vxm_i32m4_b8(__VA_ARGS__)

#define	vmsbc_vxm_i32m8_b4(...) __riscv_vmsbc_vxm_i32m8_b4(__VA_ARGS__)

#define	vmsbc_vxm_i32mf2_b64(...) __riscv_vmsbc_vxm_i32mf2_b64(__VA_ARGS__)

#define	vmsbc_vxm_i64m1_b64(...) __riscv_vmsbc_vxm_i64m1_b64(__VA_ARGS__)

#define	vmsbc_vxm_i64m2_b32(...) __riscv_vmsbc_vxm_i64m2_b32(__VA_ARGS__)

#define	vmsbc_vxm_i64m4_b16(...) __riscv_vmsbc_vxm_i64m4_b16(__VA_ARGS__)

#define	vmsbc_vxm_i64m8_b8(...) __riscv_vmsbc_vxm_i64m8_b8(__VA_ARGS__)

#define	vmsbc_vxm_i8m1_b8(...) __riscv_vmsbc_vxm_i8m1_b8(__VA_ARGS__)

#define	vmsbc_vxm_i8m2_b4(...) __riscv_vmsbc_vxm_i8m2_b4(__VA_ARGS__)

#define	vmsbc_vxm_i8m4_b2(...) __riscv_vmsbc_vxm_i8m4_b2(__VA_ARGS__)

#define	vmsbc_vxm_i8m8_b1(...) __riscv_vmsbc_vxm_i8m8_b1(__VA_ARGS__)

#define	vmsbc_vxm_i8mf2_b16(...) __riscv_vmsbc_vxm_i8mf2_b16(__VA_ARGS__)

#define	vmsbc_vxm_i8mf4_b32(...) __riscv_vmsbc_vxm_i8mf4_b32(__VA_ARGS__)

#define	vmsbc_vxm_i8mf8_b64(...) __riscv_vmsbc_vxm_i8mf8_b64(__VA_ARGS__)

#define	vmsbc_vxm_u16m1_b16(...) __riscv_vmsbc_vxm_u16m1_b16(__VA_ARGS__)

#define	vmsbc_vxm_u16m2_b8(...) __riscv_vmsbc_vxm_u16m2_b8(__VA_ARGS__)

#define	vmsbc_vxm_u16m4_b4(...) __riscv_vmsbc_vxm_u16m4_b4(__VA_ARGS__)

#define	vmsbc_vxm_u16m8_b2(...) __riscv_vmsbc_vxm_u16m8_b2(__VA_ARGS__)

#define	vmsbc_vxm_u16mf2_b32(...) __riscv_vmsbc_vxm_u16mf2_b32(__VA_ARGS__)

#define	vmsbc_vxm_u16mf4_b64(...) __riscv_vmsbc_vxm_u16mf4_b64(__VA_ARGS__)

#define	vmsbc_vxm_u32m1_b32(...) __riscv_vmsbc_vxm_u32m1_b32(__VA_ARGS__)

#define	vmsbc_vxm_u32m2_b16(...) __riscv_vmsbc_vxm_u32m2_b16(__VA_ARGS__)

#define	vmsbc_vxm_u32m4_b8(...) __riscv_vmsbc_vxm_u32m4_b8(__VA_ARGS__)

#define	vmsbc_vxm_u32m8_b4(...) __riscv_vmsbc_vxm_u32m8_b4(__VA_ARGS__)

#define	vmsbc_vxm_u32mf2_b64(...) __riscv_vmsbc_vxm_u32mf2_b64(__VA_ARGS__)

#define	vmsbc_vxm_u64m1_b64(...) __riscv_vmsbc_vxm_u64m1_b64(__VA_ARGS__)

#define	vmsbc_vxm_u64m2_b32(...) __riscv_vmsbc_vxm_u64m2_b32(__VA_ARGS__)

#define	vmsbc_vxm_u64m4_b16(...) __riscv_vmsbc_vxm_u64m4_b16(__VA_ARGS__)

#define	vmsbc_vxm_u64m8_b8(...) __riscv_vmsbc_vxm_u64m8_b8(__VA_ARGS__)

#define	vmsbc_vxm_u8m1_b8(...) __riscv_vmsbc_vxm_u8m1_b8(__VA_ARGS__)

#define	vmsbc_vxm_u8m2_b4(...) __riscv_vmsbc_vxm_u8m2_b4(__VA_ARGS__)

#define	vmsbc_vxm_u8m4_b2(...) __riscv_vmsbc_vxm_u8m4_b2(__VA_ARGS__)

#define	vmsbc_vxm_u8m8_b1(...) __riscv_vmsbc_vxm_u8m8_b1(__VA_ARGS__)

#define	vmsbc_vxm_u8mf2_b16(...) __riscv_vmsbc_vxm_u8mf2_b16(__VA_ARGS__)

#define	vmsbc_vxm_u8mf4_b32(...) __riscv_vmsbc_vxm_u8mf4_b32(__VA_ARGS__)

#define	vmsbc_vxm_u8mf8_b64(...) __riscv_vmsbc_vxm_u8mf8_b64(__VA_ARGS__)

#define	vmsbf_m_b1(...) __riscv_vmsbf_m_b1(__VA_ARGS__)

#define	vmsbf_m_b16(...) __riscv_vmsbf_m_b16(__VA_ARGS__)

#define	vmsbf_m_b16_m(...) __riscv_vmsbf_m_b16_mu(__VA_ARGS__)

#define	vmsbf_m_b1_m(...) __riscv_vmsbf_m_b1_mu(__VA_ARGS__)

#define	vmsbf_m_b2(...) __riscv_vmsbf_m_b2(__VA_ARGS__)

#define	vmsbf_m_b2_m(...) __riscv_vmsbf_m_b2_mu(__VA_ARGS__)

#define	vmsbf_m_b32(...) __riscv_vmsbf_m_b32(__VA_ARGS__)

#define	vmsbf_m_b32_m(...) __riscv_vmsbf_m_b32_mu(__VA_ARGS__)

#define	vmsbf_m_b4(...) __riscv_vmsbf_m_b4(__VA_ARGS__)

#define	vmsbf_m_b4_m(...) __riscv_vmsbf_m_b4_mu(__VA_ARGS__)

#define	vmsbf_m_b64(...) __riscv_vmsbf_m_b64(__VA_ARGS__)

#define	vmsbf_m_b64_m(...) __riscv_vmsbf_m_b64_mu(__VA_ARGS__)

#define	vmsbf_m_b8(...) __riscv_vmsbf_m_b8(__VA_ARGS__)

#define	vmsbf_m_b8_m(...) __riscv_vmsbf_m_b8_mu(__VA_ARGS__)

#define	vmseq_vv_i16m1_b16(...) __riscv_vmseq_vv_i16m1_b16(__VA_ARGS__)

#define	vmseq_vv_i16m1_b16_m(...) __riscv_vmseq_vv_i16m1_b16_mu(__VA_ARGS__)

#define	vmseq_vv_i16m2_b8(...) __riscv_vmseq_vv_i16m2_b8(__VA_ARGS__)

#define	vmseq_vv_i16m2_b8_m(...) __riscv_vmseq_vv_i16m2_b8_mu(__VA_ARGS__)

#define	vmseq_vv_i16m4_b4(...) __riscv_vmseq_vv_i16m4_b4(__VA_ARGS__)

#define	vmseq_vv_i16m4_b4_m(...) __riscv_vmseq_vv_i16m4_b4_mu(__VA_ARGS__)

#define	vmseq_vv_i16m8_b2(...) __riscv_vmseq_vv_i16m8_b2(__VA_ARGS__)

#define	vmseq_vv_i16m8_b2_m(...) __riscv_vmseq_vv_i16m8_b2_mu(__VA_ARGS__)

#define	vmseq_vv_i16mf2_b32(...) __riscv_vmseq_vv_i16mf2_b32(__VA_ARGS__)

#define	vmseq_vv_i16mf2_b32_m(...) __riscv_vmseq_vv_i16mf2_b32_mu(__VA_ARGS__)

#define	vmseq_vv_i16mf4_b64(...) __riscv_vmseq_vv_i16mf4_b64(__VA_ARGS__)

#define	vmseq_vv_i16mf4_b64_m(...) __riscv_vmseq_vv_i16mf4_b64_mu(__VA_ARGS__)

#define	vmseq_vv_i32m1_b32(...) __riscv_vmseq_vv_i32m1_b32(__VA_ARGS__)

#define	vmseq_vv_i32m1_b32_m(...) __riscv_vmseq_vv_i32m1_b32_mu(__VA_ARGS__)

#define	vmseq_vv_i32m2_b16(...) __riscv_vmseq_vv_i32m2_b16(__VA_ARGS__)

#define	vmseq_vv_i32m2_b16_m(...) __riscv_vmseq_vv_i32m2_b16_mu(__VA_ARGS__)

#define	vmseq_vv_i32m4_b8(...) __riscv_vmseq_vv_i32m4_b8(__VA_ARGS__)

#define	vmseq_vv_i32m4_b8_m(...) __riscv_vmseq_vv_i32m4_b8_mu(__VA_ARGS__)

#define	vmseq_vv_i32m8_b4(...) __riscv_vmseq_vv_i32m8_b4(__VA_ARGS__)

#define	vmseq_vv_i32m8_b4_m(...) __riscv_vmseq_vv_i32m8_b4_mu(__VA_ARGS__)

#define	vmseq_vv_i32mf2_b64(...) __riscv_vmseq_vv_i32mf2_b64(__VA_ARGS__)

#define	vmseq_vv_i32mf2_b64_m(...) __riscv_vmseq_vv_i32mf2_b64_mu(__VA_ARGS__)

#define	vmseq_vv_i64m1_b64(...) __riscv_vmseq_vv_i64m1_b64(__VA_ARGS__)

#define	vmseq_vv_i64m1_b64_m(...) __riscv_vmseq_vv_i64m1_b64_mu(__VA_ARGS__)

#define	vmseq_vv_i64m2_b32(...) __riscv_vmseq_vv_i64m2_b32(__VA_ARGS__)

#define	vmseq_vv_i64m2_b32_m(...) __riscv_vmseq_vv_i64m2_b32_mu(__VA_ARGS__)

#define	vmseq_vv_i64m4_b16(...) __riscv_vmseq_vv_i64m4_b16(__VA_ARGS__)

#define	vmseq_vv_i64m4_b16_m(...) __riscv_vmseq_vv_i64m4_b16_mu(__VA_ARGS__)

#define	vmseq_vv_i64m8_b8(...) __riscv_vmseq_vv_i64m8_b8(__VA_ARGS__)

#define	vmseq_vv_i64m8_b8_m(...) __riscv_vmseq_vv_i64m8_b8_mu(__VA_ARGS__)

#define	vmseq_vv_i8m1_b8(...) __riscv_vmseq_vv_i8m1_b8(__VA_ARGS__)

#define	vmseq_vv_i8m1_b8_m(...) __riscv_vmseq_vv_i8m1_b8_mu(__VA_ARGS__)

#define	vmseq_vv_i8m2_b4(...) __riscv_vmseq_vv_i8m2_b4(__VA_ARGS__)

#define	vmseq_vv_i8m2_b4_m(...) __riscv_vmseq_vv_i8m2_b4_mu(__VA_ARGS__)

#define	vmseq_vv_i8m4_b2(...) __riscv_vmseq_vv_i8m4_b2(__VA_ARGS__)

#define	vmseq_vv_i8m4_b2_m(...) __riscv_vmseq_vv_i8m4_b2_mu(__VA_ARGS__)

#define	vmseq_vv_i8m8_b1(...) __riscv_vmseq_vv_i8m8_b1(__VA_ARGS__)

#define	vmseq_vv_i8m8_b1_m(...) __riscv_vmseq_vv_i8m8_b1_mu(__VA_ARGS__)

#define	vmseq_vv_i8mf2_b16(...) __riscv_vmseq_vv_i8mf2_b16(__VA_ARGS__)

#define	vmseq_vv_i8mf2_b16_m(...) __riscv_vmseq_vv_i8mf2_b16_mu(__VA_ARGS__)

#define	vmseq_vv_i8mf4_b32(...) __riscv_vmseq_vv_i8mf4_b32(__VA_ARGS__)

#define	vmseq_vv_i8mf4_b32_m(...) __riscv_vmseq_vv_i8mf4_b32_mu(__VA_ARGS__)

#define	vmseq_vv_i8mf8_b64(...) __riscv_vmseq_vv_i8mf8_b64(__VA_ARGS__)

#define	vmseq_vv_i8mf8_b64_m(...) __riscv_vmseq_vv_i8mf8_b64_mu(__VA_ARGS__)

#define	vmseq_vv_u16m1_b16(...) __riscv_vmseq_vv_u16m1_b16(__VA_ARGS__)

#define	vmseq_vv_u16m1_b16_m(...) __riscv_vmseq_vv_u16m1_b16_mu(__VA_ARGS__)

#define	vmseq_vv_u16m2_b8(...) __riscv_vmseq_vv_u16m2_b8(__VA_ARGS__)

#define	vmseq_vv_u16m2_b8_m(...) __riscv_vmseq_vv_u16m2_b8_mu(__VA_ARGS__)

#define	vmseq_vv_u16m4_b4(...) __riscv_vmseq_vv_u16m4_b4(__VA_ARGS__)

#define	vmseq_vv_u16m4_b4_m(...) __riscv_vmseq_vv_u16m4_b4_mu(__VA_ARGS__)

#define	vmseq_vv_u16m8_b2(...) __riscv_vmseq_vv_u16m8_b2(__VA_ARGS__)

#define	vmseq_vv_u16m8_b2_m(...) __riscv_vmseq_vv_u16m8_b2_mu(__VA_ARGS__)

#define	vmseq_vv_u16mf2_b32(...) __riscv_vmseq_vv_u16mf2_b32(__VA_ARGS__)

#define	vmseq_vv_u16mf2_b32_m(...) __riscv_vmseq_vv_u16mf2_b32_mu(__VA_ARGS__)

#define	vmseq_vv_u16mf4_b64(...) __riscv_vmseq_vv_u16mf4_b64(__VA_ARGS__)

#define	vmseq_vv_u16mf4_b64_m(...) __riscv_vmseq_vv_u16mf4_b64_mu(__VA_ARGS__)

#define	vmseq_vv_u32m1_b32(...) __riscv_vmseq_vv_u32m1_b32(__VA_ARGS__)

#define	vmseq_vv_u32m1_b32_m(...) __riscv_vmseq_vv_u32m1_b32_mu(__VA_ARGS__)

#define	vmseq_vv_u32m2_b16(...) __riscv_vmseq_vv_u32m2_b16(__VA_ARGS__)

#define	vmseq_vv_u32m2_b16_m(...) __riscv_vmseq_vv_u32m2_b16_mu(__VA_ARGS__)

#define	vmseq_vv_u32m4_b8(...) __riscv_vmseq_vv_u32m4_b8(__VA_ARGS__)

#define	vmseq_vv_u32m4_b8_m(...) __riscv_vmseq_vv_u32m4_b8_mu(__VA_ARGS__)

#define	vmseq_vv_u32m8_b4(...) __riscv_vmseq_vv_u32m8_b4(__VA_ARGS__)

#define	vmseq_vv_u32m8_b4_m(...) __riscv_vmseq_vv_u32m8_b4_mu(__VA_ARGS__)

#define	vmseq_vv_u32mf2_b64(...) __riscv_vmseq_vv_u32mf2_b64(__VA_ARGS__)

#define	vmseq_vv_u32mf2_b64_m(...) __riscv_vmseq_vv_u32mf2_b64_mu(__VA_ARGS__)

#define	vmseq_vv_u64m1_b64(...) __riscv_vmseq_vv_u64m1_b64(__VA_ARGS__)

#define	vmseq_vv_u64m1_b64_m(...) __riscv_vmseq_vv_u64m1_b64_mu(__VA_ARGS__)

#define	vmseq_vv_u64m2_b32(...) __riscv_vmseq_vv_u64m2_b32(__VA_ARGS__)

#define	vmseq_vv_u64m2_b32_m(...) __riscv_vmseq_vv_u64m2_b32_mu(__VA_ARGS__)

#define	vmseq_vv_u64m4_b16(...) __riscv_vmseq_vv_u64m4_b16(__VA_ARGS__)

#define	vmseq_vv_u64m4_b16_m(...) __riscv_vmseq_vv_u64m4_b16_mu(__VA_ARGS__)

#define	vmseq_vv_u64m8_b8(...) __riscv_vmseq_vv_u64m8_b8(__VA_ARGS__)

#define	vmseq_vv_u64m8_b8_m(...) __riscv_vmseq_vv_u64m8_b8_mu(__VA_ARGS__)

#define	vmseq_vv_u8m1_b8(...) __riscv_vmseq_vv_u8m1_b8(__VA_ARGS__)

#define	vmseq_vv_u8m1_b8_m(...) __riscv_vmseq_vv_u8m1_b8_mu(__VA_ARGS__)

#define	vmseq_vv_u8m2_b4(...) __riscv_vmseq_vv_u8m2_b4(__VA_ARGS__)

#define	vmseq_vv_u8m2_b4_m(...) __riscv_vmseq_vv_u8m2_b4_mu(__VA_ARGS__)

#define	vmseq_vv_u8m4_b2(...) __riscv_vmseq_vv_u8m4_b2(__VA_ARGS__)

#define	vmseq_vv_u8m4_b2_m(...) __riscv_vmseq_vv_u8m4_b2_mu(__VA_ARGS__)

#define	vmseq_vv_u8m8_b1(...) __riscv_vmseq_vv_u8m8_b1(__VA_ARGS__)

#define	vmseq_vv_u8m8_b1_m(...) __riscv_vmseq_vv_u8m8_b1_mu(__VA_ARGS__)

#define	vmseq_vv_u8mf2_b16(...) __riscv_vmseq_vv_u8mf2_b16(__VA_ARGS__)

#define	vmseq_vv_u8mf2_b16_m(...) __riscv_vmseq_vv_u8mf2_b16_mu(__VA_ARGS__)

#define	vmseq_vv_u8mf4_b32(...) __riscv_vmseq_vv_u8mf4_b32(__VA_ARGS__)

#define	vmseq_vv_u8mf4_b32_m(...) __riscv_vmseq_vv_u8mf4_b32_mu(__VA_ARGS__)

#define	vmseq_vv_u8mf8_b64(...) __riscv_vmseq_vv_u8mf8_b64(__VA_ARGS__)

#define	vmseq_vv_u8mf8_b64_m(...) __riscv_vmseq_vv_u8mf8_b64_mu(__VA_ARGS__)

#define	vmseq_vx_i16m1_b16(...) __riscv_vmseq_vx_i16m1_b16(__VA_ARGS__)

#define	vmseq_vx_i16m1_b16_m(...) __riscv_vmseq_vx_i16m1_b16_mu(__VA_ARGS__)

#define	vmseq_vx_i16m2_b8(...) __riscv_vmseq_vx_i16m2_b8(__VA_ARGS__)

#define	vmseq_vx_i16m2_b8_m(...) __riscv_vmseq_vx_i16m2_b8_mu(__VA_ARGS__)

#define	vmseq_vx_i16m4_b4(...) __riscv_vmseq_vx_i16m4_b4(__VA_ARGS__)

#define	vmseq_vx_i16m4_b4_m(...) __riscv_vmseq_vx_i16m4_b4_mu(__VA_ARGS__)

#define	vmseq_vx_i16m8_b2(...) __riscv_vmseq_vx_i16m8_b2(__VA_ARGS__)

#define	vmseq_vx_i16m8_b2_m(...) __riscv_vmseq_vx_i16m8_b2_mu(__VA_ARGS__)

#define	vmseq_vx_i16mf2_b32(...) __riscv_vmseq_vx_i16mf2_b32(__VA_ARGS__)

#define	vmseq_vx_i16mf2_b32_m(...) __riscv_vmseq_vx_i16mf2_b32_mu(__VA_ARGS__)

#define	vmseq_vx_i16mf4_b64(...) __riscv_vmseq_vx_i16mf4_b64(__VA_ARGS__)

#define	vmseq_vx_i16mf4_b64_m(...) __riscv_vmseq_vx_i16mf4_b64_mu(__VA_ARGS__)

#define	vmseq_vx_i32m1_b32(...) __riscv_vmseq_vx_i32m1_b32(__VA_ARGS__)

#define	vmseq_vx_i32m1_b32_m(...) __riscv_vmseq_vx_i32m1_b32_mu(__VA_ARGS__)

#define	vmseq_vx_i32m2_b16(...) __riscv_vmseq_vx_i32m2_b16(__VA_ARGS__)

#define	vmseq_vx_i32m2_b16_m(...) __riscv_vmseq_vx_i32m2_b16_mu(__VA_ARGS__)

#define	vmseq_vx_i32m4_b8(...) __riscv_vmseq_vx_i32m4_b8(__VA_ARGS__)

#define	vmseq_vx_i32m4_b8_m(...) __riscv_vmseq_vx_i32m4_b8_mu(__VA_ARGS__)

#define	vmseq_vx_i32m8_b4(...) __riscv_vmseq_vx_i32m8_b4(__VA_ARGS__)

#define	vmseq_vx_i32m8_b4_m(...) __riscv_vmseq_vx_i32m8_b4_mu(__VA_ARGS__)

#define	vmseq_vx_i32mf2_b64(...) __riscv_vmseq_vx_i32mf2_b64(__VA_ARGS__)

#define	vmseq_vx_i32mf2_b64_m(...) __riscv_vmseq_vx_i32mf2_b64_mu(__VA_ARGS__)

#define	vmseq_vx_i64m1_b64(...) __riscv_vmseq_vx_i64m1_b64(__VA_ARGS__)

#define	vmseq_vx_i64m1_b64_m(...) __riscv_vmseq_vx_i64m1_b64_mu(__VA_ARGS__)

#define	vmseq_vx_i64m2_b32(...) __riscv_vmseq_vx_i64m2_b32(__VA_ARGS__)

#define	vmseq_vx_i64m2_b32_m(...) __riscv_vmseq_vx_i64m2_b32_mu(__VA_ARGS__)

#define	vmseq_vx_i64m4_b16(...) __riscv_vmseq_vx_i64m4_b16(__VA_ARGS__)

#define	vmseq_vx_i64m4_b16_m(...) __riscv_vmseq_vx_i64m4_b16_mu(__VA_ARGS__)

#define	vmseq_vx_i64m8_b8(...) __riscv_vmseq_vx_i64m8_b8(__VA_ARGS__)

#define	vmseq_vx_i64m8_b8_m(...) __riscv_vmseq_vx_i64m8_b8_mu(__VA_ARGS__)

#define	vmseq_vx_i8m1_b8(...) __riscv_vmseq_vx_i8m1_b8(__VA_ARGS__)

#define	vmseq_vx_i8m1_b8_m(...) __riscv_vmseq_vx_i8m1_b8_mu(__VA_ARGS__)

#define	vmseq_vx_i8m2_b4(...) __riscv_vmseq_vx_i8m2_b4(__VA_ARGS__)

#define	vmseq_vx_i8m2_b4_m(...) __riscv_vmseq_vx_i8m2_b4_mu(__VA_ARGS__)

#define	vmseq_vx_i8m4_b2(...) __riscv_vmseq_vx_i8m4_b2(__VA_ARGS__)

#define	vmseq_vx_i8m4_b2_m(...) __riscv_vmseq_vx_i8m4_b2_mu(__VA_ARGS__)

#define	vmseq_vx_i8m8_b1(...) __riscv_vmseq_vx_i8m8_b1(__VA_ARGS__)

#define	vmseq_vx_i8m8_b1_m(...) __riscv_vmseq_vx_i8m8_b1_mu(__VA_ARGS__)

#define	vmseq_vx_i8mf2_b16(...) __riscv_vmseq_vx_i8mf2_b16(__VA_ARGS__)

#define	vmseq_vx_i8mf2_b16_m(...) __riscv_vmseq_vx_i8mf2_b16_mu(__VA_ARGS__)

#define	vmseq_vx_i8mf4_b32(...) __riscv_vmseq_vx_i8mf4_b32(__VA_ARGS__)

#define	vmseq_vx_i8mf4_b32_m(...) __riscv_vmseq_vx_i8mf4_b32_mu(__VA_ARGS__)

#define	vmseq_vx_i8mf8_b64(...) __riscv_vmseq_vx_i8mf8_b64(__VA_ARGS__)

#define	vmseq_vx_i8mf8_b64_m(...) __riscv_vmseq_vx_i8mf8_b64_mu(__VA_ARGS__)

#define	vmseq_vx_u16m1_b16(...) __riscv_vmseq_vx_u16m1_b16(__VA_ARGS__)

#define	vmseq_vx_u16m1_b16_m(...) __riscv_vmseq_vx_u16m1_b16_mu(__VA_ARGS__)

#define	vmseq_vx_u16m2_b8(...) __riscv_vmseq_vx_u16m2_b8(__VA_ARGS__)

#define	vmseq_vx_u16m2_b8_m(...) __riscv_vmseq_vx_u16m2_b8_mu(__VA_ARGS__)

#define	vmseq_vx_u16m4_b4(...) __riscv_vmseq_vx_u16m4_b4(__VA_ARGS__)

#define	vmseq_vx_u16m4_b4_m(...) __riscv_vmseq_vx_u16m4_b4_mu(__VA_ARGS__)

#define	vmseq_vx_u16m8_b2(...) __riscv_vmseq_vx_u16m8_b2(__VA_ARGS__)

#define	vmseq_vx_u16m8_b2_m(...) __riscv_vmseq_vx_u16m8_b2_mu(__VA_ARGS__)

#define	vmseq_vx_u16mf2_b32(...) __riscv_vmseq_vx_u16mf2_b32(__VA_ARGS__)

#define	vmseq_vx_u16mf2_b32_m(...) __riscv_vmseq_vx_u16mf2_b32_mu(__VA_ARGS__)

#define	vmseq_vx_u16mf4_b64(...) __riscv_vmseq_vx_u16mf4_b64(__VA_ARGS__)

#define	vmseq_vx_u16mf4_b64_m(...) __riscv_vmseq_vx_u16mf4_b64_mu(__VA_ARGS__)

#define	vmseq_vx_u32m1_b32(...) __riscv_vmseq_vx_u32m1_b32(__VA_ARGS__)

#define	vmseq_vx_u32m1_b32_m(...) __riscv_vmseq_vx_u32m1_b32_mu(__VA_ARGS__)

#define	vmseq_vx_u32m2_b16(...) __riscv_vmseq_vx_u32m2_b16(__VA_ARGS__)

#define	vmseq_vx_u32m2_b16_m(...) __riscv_vmseq_vx_u32m2_b16_mu(__VA_ARGS__)

#define	vmseq_vx_u32m4_b8(...) __riscv_vmseq_vx_u32m4_b8(__VA_ARGS__)

#define	vmseq_vx_u32m4_b8_m(...) __riscv_vmseq_vx_u32m4_b8_mu(__VA_ARGS__)

#define	vmseq_vx_u32m8_b4(...) __riscv_vmseq_vx_u32m8_b4(__VA_ARGS__)

#define	vmseq_vx_u32m8_b4_m(...) __riscv_vmseq_vx_u32m8_b4_mu(__VA_ARGS__)

#define	vmseq_vx_u32mf2_b64(...) __riscv_vmseq_vx_u32mf2_b64(__VA_ARGS__)

#define	vmseq_vx_u32mf2_b64_m(...) __riscv_vmseq_vx_u32mf2_b64_mu(__VA_ARGS__)

#define	vmseq_vx_u64m1_b64(...) __riscv_vmseq_vx_u64m1_b64(__VA_ARGS__)

#define	vmseq_vx_u64m1_b64_m(...) __riscv_vmseq_vx_u64m1_b64_mu(__VA_ARGS__)

#define	vmseq_vx_u64m2_b32(...) __riscv_vmseq_vx_u64m2_b32(__VA_ARGS__)

#define	vmseq_vx_u64m2_b32_m(...) __riscv_vmseq_vx_u64m2_b32_mu(__VA_ARGS__)

#define	vmseq_vx_u64m4_b16(...) __riscv_vmseq_vx_u64m4_b16(__VA_ARGS__)

#define	vmseq_vx_u64m4_b16_m(...) __riscv_vmseq_vx_u64m4_b16_mu(__VA_ARGS__)

#define	vmseq_vx_u64m8_b8(...) __riscv_vmseq_vx_u64m8_b8(__VA_ARGS__)

#define	vmseq_vx_u64m8_b8_m(...) __riscv_vmseq_vx_u64m8_b8_mu(__VA_ARGS__)

#define	vmseq_vx_u8m1_b8(...) __riscv_vmseq_vx_u8m1_b8(__VA_ARGS__)

#define	vmseq_vx_u8m1_b8_m(...) __riscv_vmseq_vx_u8m1_b8_mu(__VA_ARGS__)

#define	vmseq_vx_u8m2_b4(...) __riscv_vmseq_vx_u8m2_b4(__VA_ARGS__)

#define	vmseq_vx_u8m2_b4_m(...) __riscv_vmseq_vx_u8m2_b4_mu(__VA_ARGS__)

#define	vmseq_vx_u8m4_b2(...) __riscv_vmseq_vx_u8m4_b2(__VA_ARGS__)

#define	vmseq_vx_u8m4_b2_m(...) __riscv_vmseq_vx_u8m4_b2_mu(__VA_ARGS__)

#define	vmseq_vx_u8m8_b1(...) __riscv_vmseq_vx_u8m8_b1(__VA_ARGS__)

#define	vmseq_vx_u8m8_b1_m(...) __riscv_vmseq_vx_u8m8_b1_mu(__VA_ARGS__)

#define	vmseq_vx_u8mf2_b16(...) __riscv_vmseq_vx_u8mf2_b16(__VA_ARGS__)

#define	vmseq_vx_u8mf2_b16_m(...) __riscv_vmseq_vx_u8mf2_b16_mu(__VA_ARGS__)

#define	vmseq_vx_u8mf4_b32(...) __riscv_vmseq_vx_u8mf4_b32(__VA_ARGS__)

#define	vmseq_vx_u8mf4_b32_m(...) __riscv_vmseq_vx_u8mf4_b32_mu(__VA_ARGS__)

#define	vmseq_vx_u8mf8_b64(...) __riscv_vmseq_vx_u8mf8_b64(__VA_ARGS__)

#define	vmseq_vx_u8mf8_b64_m(...) __riscv_vmseq_vx_u8mf8_b64_mu(__VA_ARGS__)

#define	vmset_m_b1(...) __riscv_vmset_m_b1(__VA_ARGS__)

#define	vmset_m_b16(...) __riscv_vmset_m_b16(__VA_ARGS__)

#define	vmset_m_b2(...) __riscv_vmset_m_b2(__VA_ARGS__)

#define	vmset_m_b32(...) __riscv_vmset_m_b32(__VA_ARGS__)

#define	vmset_m_b4(...) __riscv_vmset_m_b4(__VA_ARGS__)

#define	vmset_m_b64(...) __riscv_vmset_m_b64(__VA_ARGS__)

#define	vmset_m_b8(...) __riscv_vmset_m_b8(__VA_ARGS__)

#define	vmsge_vv_i16m1_b16(...) __riscv_vmsge_vv_i16m1_b16(__VA_ARGS__)

#define	vmsge_vv_i16m1_b16_m(...) __riscv_vmsge_vv_i16m1_b16_mu(__VA_ARGS__)

#define	vmsge_vv_i16m2_b8(...) __riscv_vmsge_vv_i16m2_b8(__VA_ARGS__)

#define	vmsge_vv_i16m2_b8_m(...) __riscv_vmsge_vv_i16m2_b8_mu(__VA_ARGS__)

#define	vmsge_vv_i16m4_b4(...) __riscv_vmsge_vv_i16m4_b4(__VA_ARGS__)

#define	vmsge_vv_i16m4_b4_m(...) __riscv_vmsge_vv_i16m4_b4_mu(__VA_ARGS__)

#define	vmsge_vv_i16m8_b2(...) __riscv_vmsge_vv_i16m8_b2(__VA_ARGS__)

#define	vmsge_vv_i16m8_b2_m(...) __riscv_vmsge_vv_i16m8_b2_mu(__VA_ARGS__)

#define	vmsge_vv_i16mf2_b32(...) __riscv_vmsge_vv_i16mf2_b32(__VA_ARGS__)

#define	vmsge_vv_i16mf2_b32_m(...) __riscv_vmsge_vv_i16mf2_b32_mu(__VA_ARGS__)

#define	vmsge_vv_i16mf4_b64(...) __riscv_vmsge_vv_i16mf4_b64(__VA_ARGS__)

#define	vmsge_vv_i16mf4_b64_m(...) __riscv_vmsge_vv_i16mf4_b64_mu(__VA_ARGS__)

#define	vmsge_vv_i32m1_b32(...) __riscv_vmsge_vv_i32m1_b32(__VA_ARGS__)

#define	vmsge_vv_i32m1_b32_m(...) __riscv_vmsge_vv_i32m1_b32_mu(__VA_ARGS__)

#define	vmsge_vv_i32m2_b16(...) __riscv_vmsge_vv_i32m2_b16(__VA_ARGS__)

#define	vmsge_vv_i32m2_b16_m(...) __riscv_vmsge_vv_i32m2_b16_mu(__VA_ARGS__)

#define	vmsge_vv_i32m4_b8(...) __riscv_vmsge_vv_i32m4_b8(__VA_ARGS__)

#define	vmsge_vv_i32m4_b8_m(...) __riscv_vmsge_vv_i32m4_b8_mu(__VA_ARGS__)

#define	vmsge_vv_i32m8_b4(...) __riscv_vmsge_vv_i32m8_b4(__VA_ARGS__)

#define	vmsge_vv_i32m8_b4_m(...) __riscv_vmsge_vv_i32m8_b4_mu(__VA_ARGS__)

#define	vmsge_vv_i32mf2_b64(...) __riscv_vmsge_vv_i32mf2_b64(__VA_ARGS__)

#define	vmsge_vv_i32mf2_b64_m(...) __riscv_vmsge_vv_i32mf2_b64_mu(__VA_ARGS__)

#define	vmsge_vv_i64m1_b64(...) __riscv_vmsge_vv_i64m1_b64(__VA_ARGS__)

#define	vmsge_vv_i64m1_b64_m(...) __riscv_vmsge_vv_i64m1_b64_mu(__VA_ARGS__)

#define	vmsge_vv_i64m2_b32(...) __riscv_vmsge_vv_i64m2_b32(__VA_ARGS__)

#define	vmsge_vv_i64m2_b32_m(...) __riscv_vmsge_vv_i64m2_b32_mu(__VA_ARGS__)

#define	vmsge_vv_i64m4_b16(...) __riscv_vmsge_vv_i64m4_b16(__VA_ARGS__)

#define	vmsge_vv_i64m4_b16_m(...) __riscv_vmsge_vv_i64m4_b16_mu(__VA_ARGS__)

#define	vmsge_vv_i64m8_b8(...) __riscv_vmsge_vv_i64m8_b8(__VA_ARGS__)

#define	vmsge_vv_i64m8_b8_m(...) __riscv_vmsge_vv_i64m8_b8_mu(__VA_ARGS__)

#define	vmsge_vv_i8m1_b8(...) __riscv_vmsge_vv_i8m1_b8(__VA_ARGS__)

#define	vmsge_vv_i8m1_b8_m(...) __riscv_vmsge_vv_i8m1_b8_mu(__VA_ARGS__)

#define	vmsge_vv_i8m2_b4(...) __riscv_vmsge_vv_i8m2_b4(__VA_ARGS__)

#define	vmsge_vv_i8m2_b4_m(...) __riscv_vmsge_vv_i8m2_b4_mu(__VA_ARGS__)

#define	vmsge_vv_i8m4_b2(...) __riscv_vmsge_vv_i8m4_b2(__VA_ARGS__)

#define	vmsge_vv_i8m4_b2_m(...) __riscv_vmsge_vv_i8m4_b2_mu(__VA_ARGS__)

#define	vmsge_vv_i8m8_b1(...) __riscv_vmsge_vv_i8m8_b1(__VA_ARGS__)

#define	vmsge_vv_i8m8_b1_m(...) __riscv_vmsge_vv_i8m8_b1_mu(__VA_ARGS__)

#define	vmsge_vv_i8mf2_b16(...) __riscv_vmsge_vv_i8mf2_b16(__VA_ARGS__)

#define	vmsge_vv_i8mf2_b16_m(...) __riscv_vmsge_vv_i8mf2_b16_mu(__VA_ARGS__)

#define	vmsge_vv_i8mf4_b32(...) __riscv_vmsge_vv_i8mf4_b32(__VA_ARGS__)

#define	vmsge_vv_i8mf4_b32_m(...) __riscv_vmsge_vv_i8mf4_b32_mu(__VA_ARGS__)

#define	vmsge_vv_i8mf8_b64(...) __riscv_vmsge_vv_i8mf8_b64(__VA_ARGS__)

#define	vmsge_vv_i8mf8_b64_m(...) __riscv_vmsge_vv_i8mf8_b64_mu(__VA_ARGS__)

#define	vmsge_vx_i16m1_b16(...) __riscv_vmsge_vx_i16m1_b16(__VA_ARGS__)

#define	vmsge_vx_i16m1_b16_m(...) __riscv_vmsge_vx_i16m1_b16_mu(__VA_ARGS__)

#define	vmsge_vx_i16m2_b8(...) __riscv_vmsge_vx_i16m2_b8(__VA_ARGS__)

#define	vmsge_vx_i16m2_b8_m(...) __riscv_vmsge_vx_i16m2_b8_mu(__VA_ARGS__)

#define	vmsge_vx_i16m4_b4(...) __riscv_vmsge_vx_i16m4_b4(__VA_ARGS__)

#define	vmsge_vx_i16m4_b4_m(...) __riscv_vmsge_vx_i16m4_b4_mu(__VA_ARGS__)

#define	vmsge_vx_i16m8_b2(...) __riscv_vmsge_vx_i16m8_b2(__VA_ARGS__)

#define	vmsge_vx_i16m8_b2_m(...) __riscv_vmsge_vx_i16m8_b2_mu(__VA_ARGS__)

#define	vmsge_vx_i16mf2_b32(...) __riscv_vmsge_vx_i16mf2_b32(__VA_ARGS__)

#define	vmsge_vx_i16mf2_b32_m(...) __riscv_vmsge_vx_i16mf2_b32_mu(__VA_ARGS__)

#define	vmsge_vx_i16mf4_b64(...) __riscv_vmsge_vx_i16mf4_b64(__VA_ARGS__)

#define	vmsge_vx_i16mf4_b64_m(...) __riscv_vmsge_vx_i16mf4_b64_mu(__VA_ARGS__)

#define	vmsge_vx_i32m1_b32(...) __riscv_vmsge_vx_i32m1_b32(__VA_ARGS__)

#define	vmsge_vx_i32m1_b32_m(...) __riscv_vmsge_vx_i32m1_b32_mu(__VA_ARGS__)

#define	vmsge_vx_i32m2_b16(...) __riscv_vmsge_vx_i32m2_b16(__VA_ARGS__)

#define	vmsge_vx_i32m2_b16_m(...) __riscv_vmsge_vx_i32m2_b16_mu(__VA_ARGS__)

#define	vmsge_vx_i32m4_b8(...) __riscv_vmsge_vx_i32m4_b8(__VA_ARGS__)

#define	vmsge_vx_i32m4_b8_m(...) __riscv_vmsge_vx_i32m4_b8_mu(__VA_ARGS__)

#define	vmsge_vx_i32m8_b4(...) __riscv_vmsge_vx_i32m8_b4(__VA_ARGS__)

#define	vmsge_vx_i32m8_b4_m(...) __riscv_vmsge_vx_i32m8_b4_mu(__VA_ARGS__)

#define	vmsge_vx_i32mf2_b64(...) __riscv_vmsge_vx_i32mf2_b64(__VA_ARGS__)

#define	vmsge_vx_i32mf2_b64_m(...) __riscv_vmsge_vx_i32mf2_b64_mu(__VA_ARGS__)

#define	vmsge_vx_i64m1_b64(...) __riscv_vmsge_vx_i64m1_b64(__VA_ARGS__)

#define	vmsge_vx_i64m1_b64_m(...) __riscv_vmsge_vx_i64m1_b64_mu(__VA_ARGS__)

#define	vmsge_vx_i64m2_b32(...) __riscv_vmsge_vx_i64m2_b32(__VA_ARGS__)

#define	vmsge_vx_i64m2_b32_m(...) __riscv_vmsge_vx_i64m2_b32_mu(__VA_ARGS__)

#define	vmsge_vx_i64m4_b16(...) __riscv_vmsge_vx_i64m4_b16(__VA_ARGS__)

#define	vmsge_vx_i64m4_b16_m(...) __riscv_vmsge_vx_i64m4_b16_mu(__VA_ARGS__)

#define	vmsge_vx_i64m8_b8(...) __riscv_vmsge_vx_i64m8_b8(__VA_ARGS__)

#define	vmsge_vx_i64m8_b8_m(...) __riscv_vmsge_vx_i64m8_b8_mu(__VA_ARGS__)

#define	vmsge_vx_i8m1_b8(...) __riscv_vmsge_vx_i8m1_b8(__VA_ARGS__)

#define	vmsge_vx_i8m1_b8_m(...) __riscv_vmsge_vx_i8m1_b8_mu(__VA_ARGS__)

#define	vmsge_vx_i8m2_b4(...) __riscv_vmsge_vx_i8m2_b4(__VA_ARGS__)

#define	vmsge_vx_i8m2_b4_m(...) __riscv_vmsge_vx_i8m2_b4_mu(__VA_ARGS__)

#define	vmsge_vx_i8m4_b2(...) __riscv_vmsge_vx_i8m4_b2(__VA_ARGS__)

#define	vmsge_vx_i8m4_b2_m(...) __riscv_vmsge_vx_i8m4_b2_mu(__VA_ARGS__)

#define	vmsge_vx_i8m8_b1(...) __riscv_vmsge_vx_i8m8_b1(__VA_ARGS__)

#define	vmsge_vx_i8m8_b1_m(...) __riscv_vmsge_vx_i8m8_b1_mu(__VA_ARGS__)

#define	vmsge_vx_i8mf2_b16(...) __riscv_vmsge_vx_i8mf2_b16(__VA_ARGS__)

#define	vmsge_vx_i8mf2_b16_m(...) __riscv_vmsge_vx_i8mf2_b16_mu(__VA_ARGS__)

#define	vmsge_vx_i8mf4_b32(...) __riscv_vmsge_vx_i8mf4_b32(__VA_ARGS__)

#define	vmsge_vx_i8mf4_b32_m(...) __riscv_vmsge_vx_i8mf4_b32_mu(__VA_ARGS__)

#define	vmsge_vx_i8mf8_b64(...) __riscv_vmsge_vx_i8mf8_b64(__VA_ARGS__)

#define	vmsge_vx_i8mf8_b64_m(...) __riscv_vmsge_vx_i8mf8_b64_mu(__VA_ARGS__)

#define	vmsgeu_vv_u16m1_b16(...) __riscv_vmsgeu_vv_u16m1_b16(__VA_ARGS__)

#define	vmsgeu_vv_u16m1_b16_m(...) __riscv_vmsgeu_vv_u16m1_b16_mu(__VA_ARGS__)

#define	vmsgeu_vv_u16m2_b8(...) __riscv_vmsgeu_vv_u16m2_b8(__VA_ARGS__)

#define	vmsgeu_vv_u16m2_b8_m(...) __riscv_vmsgeu_vv_u16m2_b8_mu(__VA_ARGS__)

#define	vmsgeu_vv_u16m4_b4(...) __riscv_vmsgeu_vv_u16m4_b4(__VA_ARGS__)

#define	vmsgeu_vv_u16m4_b4_m(...) __riscv_vmsgeu_vv_u16m4_b4_mu(__VA_ARGS__)

#define	vmsgeu_vv_u16m8_b2(...) __riscv_vmsgeu_vv_u16m8_b2(__VA_ARGS__)

#define	vmsgeu_vv_u16m8_b2_m(...) __riscv_vmsgeu_vv_u16m8_b2_mu(__VA_ARGS__)

#define	vmsgeu_vv_u16mf2_b32(...) __riscv_vmsgeu_vv_u16mf2_b32(__VA_ARGS__)

#define	vmsgeu_vv_u16mf2_b32_m(...) __riscv_vmsgeu_vv_u16mf2_b32_mu(__VA_ARGS__)

#define	vmsgeu_vv_u16mf4_b64(...) __riscv_vmsgeu_vv_u16mf4_b64(__VA_ARGS__)

#define	vmsgeu_vv_u16mf4_b64_m(...) __riscv_vmsgeu_vv_u16mf4_b64_mu(__VA_ARGS__)

#define	vmsgeu_vv_u32m1_b32(...) __riscv_vmsgeu_vv_u32m1_b32(__VA_ARGS__)

#define	vmsgeu_vv_u32m1_b32_m(...) __riscv_vmsgeu_vv_u32m1_b32_mu(__VA_ARGS__)

#define	vmsgeu_vv_u32m2_b16(...) __riscv_vmsgeu_vv_u32m2_b16(__VA_ARGS__)

#define	vmsgeu_vv_u32m2_b16_m(...) __riscv_vmsgeu_vv_u32m2_b16_mu(__VA_ARGS__)

#define	vmsgeu_vv_u32m4_b8(...) __riscv_vmsgeu_vv_u32m4_b8(__VA_ARGS__)

#define	vmsgeu_vv_u32m4_b8_m(...) __riscv_vmsgeu_vv_u32m4_b8_mu(__VA_ARGS__)

#define	vmsgeu_vv_u32m8_b4(...) __riscv_vmsgeu_vv_u32m8_b4(__VA_ARGS__)

#define	vmsgeu_vv_u32m8_b4_m(...) __riscv_vmsgeu_vv_u32m8_b4_mu(__VA_ARGS__)

#define	vmsgeu_vv_u32mf2_b64(...) __riscv_vmsgeu_vv_u32mf2_b64(__VA_ARGS__)

#define	vmsgeu_vv_u32mf2_b64_m(...) __riscv_vmsgeu_vv_u32mf2_b64_mu(__VA_ARGS__)

#define	vmsgeu_vv_u64m1_b64(...) __riscv_vmsgeu_vv_u64m1_b64(__VA_ARGS__)

#define	vmsgeu_vv_u64m1_b64_m(...) __riscv_vmsgeu_vv_u64m1_b64_mu(__VA_ARGS__)

#define	vmsgeu_vv_u64m2_b32(...) __riscv_vmsgeu_vv_u64m2_b32(__VA_ARGS__)

#define	vmsgeu_vv_u64m2_b32_m(...) __riscv_vmsgeu_vv_u64m2_b32_mu(__VA_ARGS__)

#define	vmsgeu_vv_u64m4_b16(...) __riscv_vmsgeu_vv_u64m4_b16(__VA_ARGS__)

#define	vmsgeu_vv_u64m4_b16_m(...) __riscv_vmsgeu_vv_u64m4_b16_mu(__VA_ARGS__)

#define	vmsgeu_vv_u64m8_b8(...) __riscv_vmsgeu_vv_u64m8_b8(__VA_ARGS__)

#define	vmsgeu_vv_u64m8_b8_m(...) __riscv_vmsgeu_vv_u64m8_b8_mu(__VA_ARGS__)

#define	vmsgeu_vv_u8m1_b8(...) __riscv_vmsgeu_vv_u8m1_b8(__VA_ARGS__)

#define	vmsgeu_vv_u8m1_b8_m(...) __riscv_vmsgeu_vv_u8m1_b8_mu(__VA_ARGS__)

#define	vmsgeu_vv_u8m2_b4(...) __riscv_vmsgeu_vv_u8m2_b4(__VA_ARGS__)

#define	vmsgeu_vv_u8m2_b4_m(...) __riscv_vmsgeu_vv_u8m2_b4_mu(__VA_ARGS__)

#define	vmsgeu_vv_u8m4_b2(...) __riscv_vmsgeu_vv_u8m4_b2(__VA_ARGS__)

#define	vmsgeu_vv_u8m4_b2_m(...) __riscv_vmsgeu_vv_u8m4_b2_mu(__VA_ARGS__)

#define	vmsgeu_vv_u8m8_b1(...) __riscv_vmsgeu_vv_u8m8_b1(__VA_ARGS__)

#define	vmsgeu_vv_u8m8_b1_m(...) __riscv_vmsgeu_vv_u8m8_b1_mu(__VA_ARGS__)

#define	vmsgeu_vv_u8mf2_b16(...) __riscv_vmsgeu_vv_u8mf2_b16(__VA_ARGS__)

#define	vmsgeu_vv_u8mf2_b16_m(...) __riscv_vmsgeu_vv_u8mf2_b16_mu(__VA_ARGS__)

#define	vmsgeu_vv_u8mf4_b32(...) __riscv_vmsgeu_vv_u8mf4_b32(__VA_ARGS__)

#define	vmsgeu_vv_u8mf4_b32_m(...) __riscv_vmsgeu_vv_u8mf4_b32_mu(__VA_ARGS__)

#define	vmsgeu_vv_u8mf8_b64(...) __riscv_vmsgeu_vv_u8mf8_b64(__VA_ARGS__)

#define	vmsgeu_vv_u8mf8_b64_m(...) __riscv_vmsgeu_vv_u8mf8_b64_mu(__VA_ARGS__)

#define	vmsgeu_vx_u16m1_b16(...) __riscv_vmsgeu_vx_u16m1_b16(__VA_ARGS__)

#define	vmsgeu_vx_u16m1_b16_m(...) __riscv_vmsgeu_vx_u16m1_b16_mu(__VA_ARGS__)

#define	vmsgeu_vx_u16m2_b8(...) __riscv_vmsgeu_vx_u16m2_b8(__VA_ARGS__)

#define	vmsgeu_vx_u16m2_b8_m(...) __riscv_vmsgeu_vx_u16m2_b8_mu(__VA_ARGS__)

#define	vmsgeu_vx_u16m4_b4(...) __riscv_vmsgeu_vx_u16m4_b4(__VA_ARGS__)

#define	vmsgeu_vx_u16m4_b4_m(...) __riscv_vmsgeu_vx_u16m4_b4_mu(__VA_ARGS__)

#define	vmsgeu_vx_u16m8_b2(...) __riscv_vmsgeu_vx_u16m8_b2(__VA_ARGS__)

#define	vmsgeu_vx_u16m8_b2_m(...) __riscv_vmsgeu_vx_u16m8_b2_mu(__VA_ARGS__)

#define	vmsgeu_vx_u16mf2_b32(...) __riscv_vmsgeu_vx_u16mf2_b32(__VA_ARGS__)

#define	vmsgeu_vx_u16mf2_b32_m(...) __riscv_vmsgeu_vx_u16mf2_b32_mu(__VA_ARGS__)

#define	vmsgeu_vx_u16mf4_b64(...) __riscv_vmsgeu_vx_u16mf4_b64(__VA_ARGS__)

#define	vmsgeu_vx_u16mf4_b64_m(...) __riscv_vmsgeu_vx_u16mf4_b64_mu(__VA_ARGS__)

#define	vmsgeu_vx_u32m1_b32(...) __riscv_vmsgeu_vx_u32m1_b32(__VA_ARGS__)

#define	vmsgeu_vx_u32m1_b32_m(...) __riscv_vmsgeu_vx_u32m1_b32_mu(__VA_ARGS__)

#define	vmsgeu_vx_u32m2_b16(...) __riscv_vmsgeu_vx_u32m2_b16(__VA_ARGS__)

#define	vmsgeu_vx_u32m2_b16_m(...) __riscv_vmsgeu_vx_u32m2_b16_mu(__VA_ARGS__)

#define	vmsgeu_vx_u32m4_b8(...) __riscv_vmsgeu_vx_u32m4_b8(__VA_ARGS__)

#define	vmsgeu_vx_u32m4_b8_m(...) __riscv_vmsgeu_vx_u32m4_b8_mu(__VA_ARGS__)

#define	vmsgeu_vx_u32m8_b4(...) __riscv_vmsgeu_vx_u32m8_b4(__VA_ARGS__)

#define	vmsgeu_vx_u32m8_b4_m(...) __riscv_vmsgeu_vx_u32m8_b4_mu(__VA_ARGS__)

#define	vmsgeu_vx_u32mf2_b64(...) __riscv_vmsgeu_vx_u32mf2_b64(__VA_ARGS__)

#define	vmsgeu_vx_u32mf2_b64_m(...) __riscv_vmsgeu_vx_u32mf2_b64_mu(__VA_ARGS__)

#define	vmsgeu_vx_u64m1_b64(...) __riscv_vmsgeu_vx_u64m1_b64(__VA_ARGS__)

#define	vmsgeu_vx_u64m1_b64_m(...) __riscv_vmsgeu_vx_u64m1_b64_mu(__VA_ARGS__)

#define	vmsgeu_vx_u64m2_b32(...) __riscv_vmsgeu_vx_u64m2_b32(__VA_ARGS__)

#define	vmsgeu_vx_u64m2_b32_m(...) __riscv_vmsgeu_vx_u64m2_b32_mu(__VA_ARGS__)

#define	vmsgeu_vx_u64m4_b16(...) __riscv_vmsgeu_vx_u64m4_b16(__VA_ARGS__)

#define	vmsgeu_vx_u64m4_b16_m(...) __riscv_vmsgeu_vx_u64m4_b16_mu(__VA_ARGS__)

#define	vmsgeu_vx_u64m8_b8(...) __riscv_vmsgeu_vx_u64m8_b8(__VA_ARGS__)

#define	vmsgeu_vx_u64m8_b8_m(...) __riscv_vmsgeu_vx_u64m8_b8_mu(__VA_ARGS__)

#define	vmsgeu_vx_u8m1_b8(...) __riscv_vmsgeu_vx_u8m1_b8(__VA_ARGS__)

#define	vmsgeu_vx_u8m1_b8_m(...) __riscv_vmsgeu_vx_u8m1_b8_mu(__VA_ARGS__)

#define	vmsgeu_vx_u8m2_b4(...) __riscv_vmsgeu_vx_u8m2_b4(__VA_ARGS__)

#define	vmsgeu_vx_u8m2_b4_m(...) __riscv_vmsgeu_vx_u8m2_b4_mu(__VA_ARGS__)

#define	vmsgeu_vx_u8m4_b2(...) __riscv_vmsgeu_vx_u8m4_b2(__VA_ARGS__)

#define	vmsgeu_vx_u8m4_b2_m(...) __riscv_vmsgeu_vx_u8m4_b2_mu(__VA_ARGS__)

#define	vmsgeu_vx_u8m8_b1(...) __riscv_vmsgeu_vx_u8m8_b1(__VA_ARGS__)

#define	vmsgeu_vx_u8m8_b1_m(...) __riscv_vmsgeu_vx_u8m8_b1_mu(__VA_ARGS__)

#define	vmsgeu_vx_u8mf2_b16(...) __riscv_vmsgeu_vx_u8mf2_b16(__VA_ARGS__)

#define	vmsgeu_vx_u8mf2_b16_m(...) __riscv_vmsgeu_vx_u8mf2_b16_mu(__VA_ARGS__)

#define	vmsgeu_vx_u8mf4_b32(...) __riscv_vmsgeu_vx_u8mf4_b32(__VA_ARGS__)

#define	vmsgeu_vx_u8mf4_b32_m(...) __riscv_vmsgeu_vx_u8mf4_b32_mu(__VA_ARGS__)

#define	vmsgeu_vx_u8mf8_b64(...) __riscv_vmsgeu_vx_u8mf8_b64(__VA_ARGS__)

#define	vmsgeu_vx_u8mf8_b64_m(...) __riscv_vmsgeu_vx_u8mf8_b64_mu(__VA_ARGS__)

#define	vmsgt_vv_i16m1_b16(...) __riscv_vmsgt_vv_i16m1_b16(__VA_ARGS__)

#define	vmsgt_vv_i16m1_b16_m(...) __riscv_vmsgt_vv_i16m1_b16_mu(__VA_ARGS__)

#define	vmsgt_vv_i16m2_b8(...) __riscv_vmsgt_vv_i16m2_b8(__VA_ARGS__)

#define	vmsgt_vv_i16m2_b8_m(...) __riscv_vmsgt_vv_i16m2_b8_mu(__VA_ARGS__)

#define	vmsgt_vv_i16m4_b4(...) __riscv_vmsgt_vv_i16m4_b4(__VA_ARGS__)

#define	vmsgt_vv_i16m4_b4_m(...) __riscv_vmsgt_vv_i16m4_b4_mu(__VA_ARGS__)

#define	vmsgt_vv_i16m8_b2(...) __riscv_vmsgt_vv_i16m8_b2(__VA_ARGS__)

#define	vmsgt_vv_i16m8_b2_m(...) __riscv_vmsgt_vv_i16m8_b2_mu(__VA_ARGS__)

#define	vmsgt_vv_i16mf2_b32(...) __riscv_vmsgt_vv_i16mf2_b32(__VA_ARGS__)

#define	vmsgt_vv_i16mf2_b32_m(...) __riscv_vmsgt_vv_i16mf2_b32_mu(__VA_ARGS__)

#define	vmsgt_vv_i16mf4_b64(...) __riscv_vmsgt_vv_i16mf4_b64(__VA_ARGS__)

#define	vmsgt_vv_i16mf4_b64_m(...) __riscv_vmsgt_vv_i16mf4_b64_mu(__VA_ARGS__)

#define	vmsgt_vv_i32m1_b32(...) __riscv_vmsgt_vv_i32m1_b32(__VA_ARGS__)

#define	vmsgt_vv_i32m1_b32_m(...) __riscv_vmsgt_vv_i32m1_b32_mu(__VA_ARGS__)

#define	vmsgt_vv_i32m2_b16(...) __riscv_vmsgt_vv_i32m2_b16(__VA_ARGS__)

#define	vmsgt_vv_i32m2_b16_m(...) __riscv_vmsgt_vv_i32m2_b16_mu(__VA_ARGS__)

#define	vmsgt_vv_i32m4_b8(...) __riscv_vmsgt_vv_i32m4_b8(__VA_ARGS__)

#define	vmsgt_vv_i32m4_b8_m(...) __riscv_vmsgt_vv_i32m4_b8_mu(__VA_ARGS__)

#define	vmsgt_vv_i32m8_b4(...) __riscv_vmsgt_vv_i32m8_b4(__VA_ARGS__)

#define	vmsgt_vv_i32m8_b4_m(...) __riscv_vmsgt_vv_i32m8_b4_mu(__VA_ARGS__)

#define	vmsgt_vv_i32mf2_b64(...) __riscv_vmsgt_vv_i32mf2_b64(__VA_ARGS__)

#define	vmsgt_vv_i32mf2_b64_m(...) __riscv_vmsgt_vv_i32mf2_b64_mu(__VA_ARGS__)

#define	vmsgt_vv_i64m1_b64(...) __riscv_vmsgt_vv_i64m1_b64(__VA_ARGS__)

#define	vmsgt_vv_i64m1_b64_m(...) __riscv_vmsgt_vv_i64m1_b64_mu(__VA_ARGS__)

#define	vmsgt_vv_i64m2_b32(...) __riscv_vmsgt_vv_i64m2_b32(__VA_ARGS__)

#define	vmsgt_vv_i64m2_b32_m(...) __riscv_vmsgt_vv_i64m2_b32_mu(__VA_ARGS__)

#define	vmsgt_vv_i64m4_b16(...) __riscv_vmsgt_vv_i64m4_b16(__VA_ARGS__)

#define	vmsgt_vv_i64m4_b16_m(...) __riscv_vmsgt_vv_i64m4_b16_mu(__VA_ARGS__)

#define	vmsgt_vv_i64m8_b8(...) __riscv_vmsgt_vv_i64m8_b8(__VA_ARGS__)

#define	vmsgt_vv_i64m8_b8_m(...) __riscv_vmsgt_vv_i64m8_b8_mu(__VA_ARGS__)

#define	vmsgt_vv_i8m1_b8(...) __riscv_vmsgt_vv_i8m1_b8(__VA_ARGS__)

#define	vmsgt_vv_i8m1_b8_m(...) __riscv_vmsgt_vv_i8m1_b8_mu(__VA_ARGS__)

#define	vmsgt_vv_i8m2_b4(...) __riscv_vmsgt_vv_i8m2_b4(__VA_ARGS__)

#define	vmsgt_vv_i8m2_b4_m(...) __riscv_vmsgt_vv_i8m2_b4_mu(__VA_ARGS__)

#define	vmsgt_vv_i8m4_b2(...) __riscv_vmsgt_vv_i8m4_b2(__VA_ARGS__)

#define	vmsgt_vv_i8m4_b2_m(...) __riscv_vmsgt_vv_i8m4_b2_mu(__VA_ARGS__)

#define	vmsgt_vv_i8m8_b1(...) __riscv_vmsgt_vv_i8m8_b1(__VA_ARGS__)

#define	vmsgt_vv_i8m8_b1_m(...) __riscv_vmsgt_vv_i8m8_b1_mu(__VA_ARGS__)

#define	vmsgt_vv_i8mf2_b16(...) __riscv_vmsgt_vv_i8mf2_b16(__VA_ARGS__)

#define	vmsgt_vv_i8mf2_b16_m(...) __riscv_vmsgt_vv_i8mf2_b16_mu(__VA_ARGS__)

#define	vmsgt_vv_i8mf4_b32(...) __riscv_vmsgt_vv_i8mf4_b32(__VA_ARGS__)

#define	vmsgt_vv_i8mf4_b32_m(...) __riscv_vmsgt_vv_i8mf4_b32_mu(__VA_ARGS__)

#define	vmsgt_vv_i8mf8_b64(...) __riscv_vmsgt_vv_i8mf8_b64(__VA_ARGS__)

#define	vmsgt_vv_i8mf8_b64_m(...) __riscv_vmsgt_vv_i8mf8_b64_mu(__VA_ARGS__)

#define	vmsgt_vx_i16m1_b16(...) __riscv_vmsgt_vx_i16m1_b16(__VA_ARGS__)

#define	vmsgt_vx_i16m1_b16_m(...) __riscv_vmsgt_vx_i16m1_b16_mu(__VA_ARGS__)

#define	vmsgt_vx_i16m2_b8(...) __riscv_vmsgt_vx_i16m2_b8(__VA_ARGS__)

#define	vmsgt_vx_i16m2_b8_m(...) __riscv_vmsgt_vx_i16m2_b8_mu(__VA_ARGS__)

#define	vmsgt_vx_i16m4_b4(...) __riscv_vmsgt_vx_i16m4_b4(__VA_ARGS__)

#define	vmsgt_vx_i16m4_b4_m(...) __riscv_vmsgt_vx_i16m4_b4_mu(__VA_ARGS__)

#define	vmsgt_vx_i16m8_b2(...) __riscv_vmsgt_vx_i16m8_b2(__VA_ARGS__)

#define	vmsgt_vx_i16m8_b2_m(...) __riscv_vmsgt_vx_i16m8_b2_mu(__VA_ARGS__)

#define	vmsgt_vx_i16mf2_b32(...) __riscv_vmsgt_vx_i16mf2_b32(__VA_ARGS__)

#define	vmsgt_vx_i16mf2_b32_m(...) __riscv_vmsgt_vx_i16mf2_b32_mu(__VA_ARGS__)

#define	vmsgt_vx_i16mf4_b64(...) __riscv_vmsgt_vx_i16mf4_b64(__VA_ARGS__)

#define	vmsgt_vx_i16mf4_b64_m(...) __riscv_vmsgt_vx_i16mf4_b64_mu(__VA_ARGS__)

#define	vmsgt_vx_i32m1_b32(...) __riscv_vmsgt_vx_i32m1_b32(__VA_ARGS__)

#define	vmsgt_vx_i32m1_b32_m(...) __riscv_vmsgt_vx_i32m1_b32_mu(__VA_ARGS__)

#define	vmsgt_vx_i32m2_b16(...) __riscv_vmsgt_vx_i32m2_b16(__VA_ARGS__)

#define	vmsgt_vx_i32m2_b16_m(...) __riscv_vmsgt_vx_i32m2_b16_mu(__VA_ARGS__)

#define	vmsgt_vx_i32m4_b8(...) __riscv_vmsgt_vx_i32m4_b8(__VA_ARGS__)

#define	vmsgt_vx_i32m4_b8_m(...) __riscv_vmsgt_vx_i32m4_b8_mu(__VA_ARGS__)

#define	vmsgt_vx_i32m8_b4(...) __riscv_vmsgt_vx_i32m8_b4(__VA_ARGS__)

#define	vmsgt_vx_i32m8_b4_m(...) __riscv_vmsgt_vx_i32m8_b4_mu(__VA_ARGS__)

#define	vmsgt_vx_i32mf2_b64(...) __riscv_vmsgt_vx_i32mf2_b64(__VA_ARGS__)

#define	vmsgt_vx_i32mf2_b64_m(...) __riscv_vmsgt_vx_i32mf2_b64_mu(__VA_ARGS__)

#define	vmsgt_vx_i64m1_b64(...) __riscv_vmsgt_vx_i64m1_b64(__VA_ARGS__)

#define	vmsgt_vx_i64m1_b64_m(...) __riscv_vmsgt_vx_i64m1_b64_mu(__VA_ARGS__)

#define	vmsgt_vx_i64m2_b32(...) __riscv_vmsgt_vx_i64m2_b32(__VA_ARGS__)

#define	vmsgt_vx_i64m2_b32_m(...) __riscv_vmsgt_vx_i64m2_b32_mu(__VA_ARGS__)

#define	vmsgt_vx_i64m4_b16(...) __riscv_vmsgt_vx_i64m4_b16(__VA_ARGS__)

#define	vmsgt_vx_i64m4_b16_m(...) __riscv_vmsgt_vx_i64m4_b16_mu(__VA_ARGS__)

#define	vmsgt_vx_i64m8_b8(...) __riscv_vmsgt_vx_i64m8_b8(__VA_ARGS__)

#define	vmsgt_vx_i64m8_b8_m(...) __riscv_vmsgt_vx_i64m8_b8_mu(__VA_ARGS__)

#define	vmsgt_vx_i8m1_b8(...) __riscv_vmsgt_vx_i8m1_b8(__VA_ARGS__)

#define	vmsgt_vx_i8m1_b8_m(...) __riscv_vmsgt_vx_i8m1_b8_mu(__VA_ARGS__)

#define	vmsgt_vx_i8m2_b4(...) __riscv_vmsgt_vx_i8m2_b4(__VA_ARGS__)

#define	vmsgt_vx_i8m2_b4_m(...) __riscv_vmsgt_vx_i8m2_b4_mu(__VA_ARGS__)

#define	vmsgt_vx_i8m4_b2(...) __riscv_vmsgt_vx_i8m4_b2(__VA_ARGS__)

#define	vmsgt_vx_i8m4_b2_m(...) __riscv_vmsgt_vx_i8m4_b2_mu(__VA_ARGS__)

#define	vmsgt_vx_i8m8_b1(...) __riscv_vmsgt_vx_i8m8_b1(__VA_ARGS__)

#define	vmsgt_vx_i8m8_b1_m(...) __riscv_vmsgt_vx_i8m8_b1_mu(__VA_ARGS__)

#define	vmsgt_vx_i8mf2_b16(...) __riscv_vmsgt_vx_i8mf2_b16(__VA_ARGS__)

#define	vmsgt_vx_i8mf2_b16_m(...) __riscv_vmsgt_vx_i8mf2_b16_mu(__VA_ARGS__)

#define	vmsgt_vx_i8mf4_b32(...) __riscv_vmsgt_vx_i8mf4_b32(__VA_ARGS__)

#define	vmsgt_vx_i8mf4_b32_m(...) __riscv_vmsgt_vx_i8mf4_b32_mu(__VA_ARGS__)

#define	vmsgt_vx_i8mf8_b64(...) __riscv_vmsgt_vx_i8mf8_b64(__VA_ARGS__)

#define	vmsgt_vx_i8mf8_b64_m(...) __riscv_vmsgt_vx_i8mf8_b64_mu(__VA_ARGS__)

#define	vmsgtu_vv_u16m1_b16(...) __riscv_vmsgtu_vv_u16m1_b16(__VA_ARGS__)

#define	vmsgtu_vv_u16m1_b16_m(...) __riscv_vmsgtu_vv_u16m1_b16_mu(__VA_ARGS__)

#define	vmsgtu_vv_u16m2_b8(...) __riscv_vmsgtu_vv_u16m2_b8(__VA_ARGS__)

#define	vmsgtu_vv_u16m2_b8_m(...) __riscv_vmsgtu_vv_u16m2_b8_mu(__VA_ARGS__)

#define	vmsgtu_vv_u16m4_b4(...) __riscv_vmsgtu_vv_u16m4_b4(__VA_ARGS__)

#define	vmsgtu_vv_u16m4_b4_m(...) __riscv_vmsgtu_vv_u16m4_b4_mu(__VA_ARGS__)

#define	vmsgtu_vv_u16m8_b2(...) __riscv_vmsgtu_vv_u16m8_b2(__VA_ARGS__)

#define	vmsgtu_vv_u16m8_b2_m(...) __riscv_vmsgtu_vv_u16m8_b2_mu(__VA_ARGS__)

#define	vmsgtu_vv_u16mf2_b32(...) __riscv_vmsgtu_vv_u16mf2_b32(__VA_ARGS__)

#define	vmsgtu_vv_u16mf2_b32_m(...) __riscv_vmsgtu_vv_u16mf2_b32_mu(__VA_ARGS__)

#define	vmsgtu_vv_u16mf4_b64(...) __riscv_vmsgtu_vv_u16mf4_b64(__VA_ARGS__)

#define	vmsgtu_vv_u16mf4_b64_m(...) __riscv_vmsgtu_vv_u16mf4_b64_mu(__VA_ARGS__)

#define	vmsgtu_vv_u32m1_b32(...) __riscv_vmsgtu_vv_u32m1_b32(__VA_ARGS__)

#define	vmsgtu_vv_u32m1_b32_m(...) __riscv_vmsgtu_vv_u32m1_b32_mu(__VA_ARGS__)

#define	vmsgtu_vv_u32m2_b16(...) __riscv_vmsgtu_vv_u32m2_b16(__VA_ARGS__)

#define	vmsgtu_vv_u32m2_b16_m(...) __riscv_vmsgtu_vv_u32m2_b16_mu(__VA_ARGS__)

#define	vmsgtu_vv_u32m4_b8(...) __riscv_vmsgtu_vv_u32m4_b8(__VA_ARGS__)

#define	vmsgtu_vv_u32m4_b8_m(...) __riscv_vmsgtu_vv_u32m4_b8_mu(__VA_ARGS__)

#define	vmsgtu_vv_u32m8_b4(...) __riscv_vmsgtu_vv_u32m8_b4(__VA_ARGS__)

#define	vmsgtu_vv_u32m8_b4_m(...) __riscv_vmsgtu_vv_u32m8_b4_mu(__VA_ARGS__)

#define	vmsgtu_vv_u32mf2_b64(...) __riscv_vmsgtu_vv_u32mf2_b64(__VA_ARGS__)

#define	vmsgtu_vv_u32mf2_b64_m(...) __riscv_vmsgtu_vv_u32mf2_b64_mu(__VA_ARGS__)

#define	vmsgtu_vv_u64m1_b64(...) __riscv_vmsgtu_vv_u64m1_b64(__VA_ARGS__)

#define	vmsgtu_vv_u64m1_b64_m(...) __riscv_vmsgtu_vv_u64m1_b64_mu(__VA_ARGS__)

#define	vmsgtu_vv_u64m2_b32(...) __riscv_vmsgtu_vv_u64m2_b32(__VA_ARGS__)

#define	vmsgtu_vv_u64m2_b32_m(...) __riscv_vmsgtu_vv_u64m2_b32_mu(__VA_ARGS__)

#define	vmsgtu_vv_u64m4_b16(...) __riscv_vmsgtu_vv_u64m4_b16(__VA_ARGS__)

#define	vmsgtu_vv_u64m4_b16_m(...) __riscv_vmsgtu_vv_u64m4_b16_mu(__VA_ARGS__)

#define	vmsgtu_vv_u64m8_b8(...) __riscv_vmsgtu_vv_u64m8_b8(__VA_ARGS__)

#define	vmsgtu_vv_u64m8_b8_m(...) __riscv_vmsgtu_vv_u64m8_b8_mu(__VA_ARGS__)

#define	vmsgtu_vv_u8m1_b8(...) __riscv_vmsgtu_vv_u8m1_b8(__VA_ARGS__)

#define	vmsgtu_vv_u8m1_b8_m(...) __riscv_vmsgtu_vv_u8m1_b8_mu(__VA_ARGS__)

#define	vmsgtu_vv_u8m2_b4(...) __riscv_vmsgtu_vv_u8m2_b4(__VA_ARGS__)

#define	vmsgtu_vv_u8m2_b4_m(...) __riscv_vmsgtu_vv_u8m2_b4_mu(__VA_ARGS__)

#define	vmsgtu_vv_u8m4_b2(...) __riscv_vmsgtu_vv_u8m4_b2(__VA_ARGS__)

#define	vmsgtu_vv_u8m4_b2_m(...) __riscv_vmsgtu_vv_u8m4_b2_mu(__VA_ARGS__)

#define	vmsgtu_vv_u8m8_b1(...) __riscv_vmsgtu_vv_u8m8_b1(__VA_ARGS__)

#define	vmsgtu_vv_u8m8_b1_m(...) __riscv_vmsgtu_vv_u8m8_b1_mu(__VA_ARGS__)

#define	vmsgtu_vv_u8mf2_b16(...) __riscv_vmsgtu_vv_u8mf2_b16(__VA_ARGS__)

#define	vmsgtu_vv_u8mf2_b16_m(...) __riscv_vmsgtu_vv_u8mf2_b16_mu(__VA_ARGS__)

#define	vmsgtu_vv_u8mf4_b32(...) __riscv_vmsgtu_vv_u8mf4_b32(__VA_ARGS__)

#define	vmsgtu_vv_u8mf4_b32_m(...) __riscv_vmsgtu_vv_u8mf4_b32_mu(__VA_ARGS__)

#define	vmsgtu_vv_u8mf8_b64(...) __riscv_vmsgtu_vv_u8mf8_b64(__VA_ARGS__)

#define	vmsgtu_vv_u8mf8_b64_m(...) __riscv_vmsgtu_vv_u8mf8_b64_mu(__VA_ARGS__)

#define	vmsgtu_vx_u16m1_b16(...) __riscv_vmsgtu_vx_u16m1_b16(__VA_ARGS__)

#define	vmsgtu_vx_u16m1_b16_m(...) __riscv_vmsgtu_vx_u16m1_b16_mu(__VA_ARGS__)

#define	vmsgtu_vx_u16m2_b8(...) __riscv_vmsgtu_vx_u16m2_b8(__VA_ARGS__)

#define	vmsgtu_vx_u16m2_b8_m(...) __riscv_vmsgtu_vx_u16m2_b8_mu(__VA_ARGS__)

#define	vmsgtu_vx_u16m4_b4(...) __riscv_vmsgtu_vx_u16m4_b4(__VA_ARGS__)

#define	vmsgtu_vx_u16m4_b4_m(...) __riscv_vmsgtu_vx_u16m4_b4_mu(__VA_ARGS__)

#define	vmsgtu_vx_u16m8_b2(...) __riscv_vmsgtu_vx_u16m8_b2(__VA_ARGS__)

#define	vmsgtu_vx_u16m8_b2_m(...) __riscv_vmsgtu_vx_u16m8_b2_mu(__VA_ARGS__)

#define	vmsgtu_vx_u16mf2_b32(...) __riscv_vmsgtu_vx_u16mf2_b32(__VA_ARGS__)

#define	vmsgtu_vx_u16mf2_b32_m(...) __riscv_vmsgtu_vx_u16mf2_b32_mu(__VA_ARGS__)

#define	vmsgtu_vx_u16mf4_b64(...) __riscv_vmsgtu_vx_u16mf4_b64(__VA_ARGS__)

#define	vmsgtu_vx_u16mf4_b64_m(...) __riscv_vmsgtu_vx_u16mf4_b64_mu(__VA_ARGS__)

#define	vmsgtu_vx_u32m1_b32(...) __riscv_vmsgtu_vx_u32m1_b32(__VA_ARGS__)

#define	vmsgtu_vx_u32m1_b32_m(...) __riscv_vmsgtu_vx_u32m1_b32_mu(__VA_ARGS__)

#define	vmsgtu_vx_u32m2_b16(...) __riscv_vmsgtu_vx_u32m2_b16(__VA_ARGS__)

#define	vmsgtu_vx_u32m2_b16_m(...) __riscv_vmsgtu_vx_u32m2_b16_mu(__VA_ARGS__)

#define	vmsgtu_vx_u32m4_b8(...) __riscv_vmsgtu_vx_u32m4_b8(__VA_ARGS__)

#define	vmsgtu_vx_u32m4_b8_m(...) __riscv_vmsgtu_vx_u32m4_b8_mu(__VA_ARGS__)

#define	vmsgtu_vx_u32m8_b4(...) __riscv_vmsgtu_vx_u32m8_b4(__VA_ARGS__)

#define	vmsgtu_vx_u32m8_b4_m(...) __riscv_vmsgtu_vx_u32m8_b4_mu(__VA_ARGS__)

#define	vmsgtu_vx_u32mf2_b64(...) __riscv_vmsgtu_vx_u32mf2_b64(__VA_ARGS__)

#define	vmsgtu_vx_u32mf2_b64_m(...) __riscv_vmsgtu_vx_u32mf2_b64_mu(__VA_ARGS__)

#define	vmsgtu_vx_u64m1_b64(...) __riscv_vmsgtu_vx_u64m1_b64(__VA_ARGS__)

#define	vmsgtu_vx_u64m1_b64_m(...) __riscv_vmsgtu_vx_u64m1_b64_mu(__VA_ARGS__)

#define	vmsgtu_vx_u64m2_b32(...) __riscv_vmsgtu_vx_u64m2_b32(__VA_ARGS__)

#define	vmsgtu_vx_u64m2_b32_m(...) __riscv_vmsgtu_vx_u64m2_b32_mu(__VA_ARGS__)

#define	vmsgtu_vx_u64m4_b16(...) __riscv_vmsgtu_vx_u64m4_b16(__VA_ARGS__)

#define	vmsgtu_vx_u64m4_b16_m(...) __riscv_vmsgtu_vx_u64m4_b16_mu(__VA_ARGS__)

#define	vmsgtu_vx_u64m8_b8(...) __riscv_vmsgtu_vx_u64m8_b8(__VA_ARGS__)

#define	vmsgtu_vx_u64m8_b8_m(...) __riscv_vmsgtu_vx_u64m8_b8_mu(__VA_ARGS__)

#define	vmsgtu_vx_u8m1_b8(...) __riscv_vmsgtu_vx_u8m1_b8(__VA_ARGS__)

#define	vmsgtu_vx_u8m1_b8_m(...) __riscv_vmsgtu_vx_u8m1_b8_mu(__VA_ARGS__)

#define	vmsgtu_vx_u8m2_b4(...) __riscv_vmsgtu_vx_u8m2_b4(__VA_ARGS__)

#define	vmsgtu_vx_u8m2_b4_m(...) __riscv_vmsgtu_vx_u8m2_b4_mu(__VA_ARGS__)

#define	vmsgtu_vx_u8m4_b2(...) __riscv_vmsgtu_vx_u8m4_b2(__VA_ARGS__)

#define	vmsgtu_vx_u8m4_b2_m(...) __riscv_vmsgtu_vx_u8m4_b2_mu(__VA_ARGS__)

#define	vmsgtu_vx_u8m8_b1(...) __riscv_vmsgtu_vx_u8m8_b1(__VA_ARGS__)

#define	vmsgtu_vx_u8m8_b1_m(...) __riscv_vmsgtu_vx_u8m8_b1_mu(__VA_ARGS__)

#define	vmsgtu_vx_u8mf2_b16(...) __riscv_vmsgtu_vx_u8mf2_b16(__VA_ARGS__)

#define	vmsgtu_vx_u8mf2_b16_m(...) __riscv_vmsgtu_vx_u8mf2_b16_mu(__VA_ARGS__)

#define	vmsgtu_vx_u8mf4_b32(...) __riscv_vmsgtu_vx_u8mf4_b32(__VA_ARGS__)

#define	vmsgtu_vx_u8mf4_b32_m(...) __riscv_vmsgtu_vx_u8mf4_b32_mu(__VA_ARGS__)

#define	vmsgtu_vx_u8mf8_b64(...) __riscv_vmsgtu_vx_u8mf8_b64(__VA_ARGS__)

#define	vmsgtu_vx_u8mf8_b64_m(...) __riscv_vmsgtu_vx_u8mf8_b64_mu(__VA_ARGS__)

#define	vmsif_m_b1(...) __riscv_vmsif_m_b1(__VA_ARGS__)

#define	vmsif_m_b16(...) __riscv_vmsif_m_b16(__VA_ARGS__)

#define	vmsif_m_b16_m(...) __riscv_vmsif_m_b16_mu(__VA_ARGS__)

#define	vmsif_m_b1_m(...) __riscv_vmsif_m_b1_mu(__VA_ARGS__)

#define	vmsif_m_b2(...) __riscv_vmsif_m_b2(__VA_ARGS__)

#define	vmsif_m_b2_m(...) __riscv_vmsif_m_b2_mu(__VA_ARGS__)

#define	vmsif_m_b32(...) __riscv_vmsif_m_b32(__VA_ARGS__)

#define	vmsif_m_b32_m(...) __riscv_vmsif_m_b32_mu(__VA_ARGS__)

#define	vmsif_m_b4(...) __riscv_vmsif_m_b4(__VA_ARGS__)

#define	vmsif_m_b4_m(...) __riscv_vmsif_m_b4_mu(__VA_ARGS__)

#define	vmsif_m_b64(...) __riscv_vmsif_m_b64(__VA_ARGS__)

#define	vmsif_m_b64_m(...) __riscv_vmsif_m_b64_mu(__VA_ARGS__)

#define	vmsif_m_b8(...) __riscv_vmsif_m_b8(__VA_ARGS__)

#define	vmsif_m_b8_m(...) __riscv_vmsif_m_b8_mu(__VA_ARGS__)

#define	vmsle_vv_i16m1_b16(...) __riscv_vmsle_vv_i16m1_b16(__VA_ARGS__)

#define	vmsle_vv_i16m1_b16_m(...) __riscv_vmsle_vv_i16m1_b16_mu(__VA_ARGS__)

#define	vmsle_vv_i16m2_b8(...) __riscv_vmsle_vv_i16m2_b8(__VA_ARGS__)

#define	vmsle_vv_i16m2_b8_m(...) __riscv_vmsle_vv_i16m2_b8_mu(__VA_ARGS__)

#define	vmsle_vv_i16m4_b4(...) __riscv_vmsle_vv_i16m4_b4(__VA_ARGS__)

#define	vmsle_vv_i16m4_b4_m(...) __riscv_vmsle_vv_i16m4_b4_mu(__VA_ARGS__)

#define	vmsle_vv_i16m8_b2(...) __riscv_vmsle_vv_i16m8_b2(__VA_ARGS__)

#define	vmsle_vv_i16m8_b2_m(...) __riscv_vmsle_vv_i16m8_b2_mu(__VA_ARGS__)

#define	vmsle_vv_i16mf2_b32(...) __riscv_vmsle_vv_i16mf2_b32(__VA_ARGS__)

#define	vmsle_vv_i16mf2_b32_m(...) __riscv_vmsle_vv_i16mf2_b32_mu(__VA_ARGS__)

#define	vmsle_vv_i16mf4_b64(...) __riscv_vmsle_vv_i16mf4_b64(__VA_ARGS__)

#define	vmsle_vv_i16mf4_b64_m(...) __riscv_vmsle_vv_i16mf4_b64_mu(__VA_ARGS__)

#define	vmsle_vv_i32m1_b32(...) __riscv_vmsle_vv_i32m1_b32(__VA_ARGS__)

#define	vmsle_vv_i32m1_b32_m(...) __riscv_vmsle_vv_i32m1_b32_mu(__VA_ARGS__)

#define	vmsle_vv_i32m2_b16(...) __riscv_vmsle_vv_i32m2_b16(__VA_ARGS__)

#define	vmsle_vv_i32m2_b16_m(...) __riscv_vmsle_vv_i32m2_b16_mu(__VA_ARGS__)

#define	vmsle_vv_i32m4_b8(...) __riscv_vmsle_vv_i32m4_b8(__VA_ARGS__)

#define	vmsle_vv_i32m4_b8_m(...) __riscv_vmsle_vv_i32m4_b8_mu(__VA_ARGS__)

#define	vmsle_vv_i32m8_b4(...) __riscv_vmsle_vv_i32m8_b4(__VA_ARGS__)

#define	vmsle_vv_i32m8_b4_m(...) __riscv_vmsle_vv_i32m8_b4_mu(__VA_ARGS__)

#define	vmsle_vv_i32mf2_b64(...) __riscv_vmsle_vv_i32mf2_b64(__VA_ARGS__)

#define	vmsle_vv_i32mf2_b64_m(...) __riscv_vmsle_vv_i32mf2_b64_mu(__VA_ARGS__)

#define	vmsle_vv_i64m1_b64(...) __riscv_vmsle_vv_i64m1_b64(__VA_ARGS__)

#define	vmsle_vv_i64m1_b64_m(...) __riscv_vmsle_vv_i64m1_b64_mu(__VA_ARGS__)

#define	vmsle_vv_i64m2_b32(...) __riscv_vmsle_vv_i64m2_b32(__VA_ARGS__)

#define	vmsle_vv_i64m2_b32_m(...) __riscv_vmsle_vv_i64m2_b32_mu(__VA_ARGS__)

#define	vmsle_vv_i64m4_b16(...) __riscv_vmsle_vv_i64m4_b16(__VA_ARGS__)

#define	vmsle_vv_i64m4_b16_m(...) __riscv_vmsle_vv_i64m4_b16_mu(__VA_ARGS__)

#define	vmsle_vv_i64m8_b8(...) __riscv_vmsle_vv_i64m8_b8(__VA_ARGS__)

#define	vmsle_vv_i64m8_b8_m(...) __riscv_vmsle_vv_i64m8_b8_mu(__VA_ARGS__)

#define	vmsle_vv_i8m1_b8(...) __riscv_vmsle_vv_i8m1_b8(__VA_ARGS__)

#define	vmsle_vv_i8m1_b8_m(...) __riscv_vmsle_vv_i8m1_b8_mu(__VA_ARGS__)

#define	vmsle_vv_i8m2_b4(...) __riscv_vmsle_vv_i8m2_b4(__VA_ARGS__)

#define	vmsle_vv_i8m2_b4_m(...) __riscv_vmsle_vv_i8m2_b4_mu(__VA_ARGS__)

#define	vmsle_vv_i8m4_b2(...) __riscv_vmsle_vv_i8m4_b2(__VA_ARGS__)

#define	vmsle_vv_i8m4_b2_m(...) __riscv_vmsle_vv_i8m4_b2_mu(__VA_ARGS__)

#define	vmsle_vv_i8m8_b1(...) __riscv_vmsle_vv_i8m8_b1(__VA_ARGS__)

#define	vmsle_vv_i8m8_b1_m(...) __riscv_vmsle_vv_i8m8_b1_mu(__VA_ARGS__)

#define	vmsle_vv_i8mf2_b16(...) __riscv_vmsle_vv_i8mf2_b16(__VA_ARGS__)

#define	vmsle_vv_i8mf2_b16_m(...) __riscv_vmsle_vv_i8mf2_b16_mu(__VA_ARGS__)

#define	vmsle_vv_i8mf4_b32(...) __riscv_vmsle_vv_i8mf4_b32(__VA_ARGS__)

#define	vmsle_vv_i8mf4_b32_m(...) __riscv_vmsle_vv_i8mf4_b32_mu(__VA_ARGS__)

#define	vmsle_vv_i8mf8_b64(...) __riscv_vmsle_vv_i8mf8_b64(__VA_ARGS__)

#define	vmsle_vv_i8mf8_b64_m(...) __riscv_vmsle_vv_i8mf8_b64_mu(__VA_ARGS__)

#define	vmsle_vx_i16m1_b16(...) __riscv_vmsle_vx_i16m1_b16(__VA_ARGS__)

#define	vmsle_vx_i16m1_b16_m(...) __riscv_vmsle_vx_i16m1_b16_mu(__VA_ARGS__)

#define	vmsle_vx_i16m2_b8(...) __riscv_vmsle_vx_i16m2_b8(__VA_ARGS__)

#define	vmsle_vx_i16m2_b8_m(...) __riscv_vmsle_vx_i16m2_b8_mu(__VA_ARGS__)

#define	vmsle_vx_i16m4_b4(...) __riscv_vmsle_vx_i16m4_b4(__VA_ARGS__)

#define	vmsle_vx_i16m4_b4_m(...) __riscv_vmsle_vx_i16m4_b4_mu(__VA_ARGS__)

#define	vmsle_vx_i16m8_b2(...) __riscv_vmsle_vx_i16m8_b2(__VA_ARGS__)

#define	vmsle_vx_i16m8_b2_m(...) __riscv_vmsle_vx_i16m8_b2_mu(__VA_ARGS__)

#define	vmsle_vx_i16mf2_b32(...) __riscv_vmsle_vx_i16mf2_b32(__VA_ARGS__)

#define	vmsle_vx_i16mf2_b32_m(...) __riscv_vmsle_vx_i16mf2_b32_mu(__VA_ARGS__)

#define	vmsle_vx_i16mf4_b64(...) __riscv_vmsle_vx_i16mf4_b64(__VA_ARGS__)

#define	vmsle_vx_i16mf4_b64_m(...) __riscv_vmsle_vx_i16mf4_b64_mu(__VA_ARGS__)

#define	vmsle_vx_i32m1_b32(...) __riscv_vmsle_vx_i32m1_b32(__VA_ARGS__)

#define	vmsle_vx_i32m1_b32_m(...) __riscv_vmsle_vx_i32m1_b32_mu(__VA_ARGS__)

#define	vmsle_vx_i32m2_b16(...) __riscv_vmsle_vx_i32m2_b16(__VA_ARGS__)

#define	vmsle_vx_i32m2_b16_m(...) __riscv_vmsle_vx_i32m2_b16_mu(__VA_ARGS__)

#define	vmsle_vx_i32m4_b8(...) __riscv_vmsle_vx_i32m4_b8(__VA_ARGS__)

#define	vmsle_vx_i32m4_b8_m(...) __riscv_vmsle_vx_i32m4_b8_mu(__VA_ARGS__)

#define	vmsle_vx_i32m8_b4(...) __riscv_vmsle_vx_i32m8_b4(__VA_ARGS__)

#define	vmsle_vx_i32m8_b4_m(...) __riscv_vmsle_vx_i32m8_b4_mu(__VA_ARGS__)

#define	vmsle_vx_i32mf2_b64(...) __riscv_vmsle_vx_i32mf2_b64(__VA_ARGS__)

#define	vmsle_vx_i32mf2_b64_m(...) __riscv_vmsle_vx_i32mf2_b64_mu(__VA_ARGS__)

#define	vmsle_vx_i64m1_b64(...) __riscv_vmsle_vx_i64m1_b64(__VA_ARGS__)

#define	vmsle_vx_i64m1_b64_m(...) __riscv_vmsle_vx_i64m1_b64_mu(__VA_ARGS__)

#define	vmsle_vx_i64m2_b32(...) __riscv_vmsle_vx_i64m2_b32(__VA_ARGS__)

#define	vmsle_vx_i64m2_b32_m(...) __riscv_vmsle_vx_i64m2_b32_mu(__VA_ARGS__)

#define	vmsle_vx_i64m4_b16(...) __riscv_vmsle_vx_i64m4_b16(__VA_ARGS__)

#define	vmsle_vx_i64m4_b16_m(...) __riscv_vmsle_vx_i64m4_b16_mu(__VA_ARGS__)

#define	vmsle_vx_i64m8_b8(...) __riscv_vmsle_vx_i64m8_b8(__VA_ARGS__)

#define	vmsle_vx_i64m8_b8_m(...) __riscv_vmsle_vx_i64m8_b8_mu(__VA_ARGS__)

#define	vmsle_vx_i8m1_b8(...) __riscv_vmsle_vx_i8m1_b8(__VA_ARGS__)

#define	vmsle_vx_i8m1_b8_m(...) __riscv_vmsle_vx_i8m1_b8_mu(__VA_ARGS__)

#define	vmsle_vx_i8m2_b4(...) __riscv_vmsle_vx_i8m2_b4(__VA_ARGS__)

#define	vmsle_vx_i8m2_b4_m(...) __riscv_vmsle_vx_i8m2_b4_mu(__VA_ARGS__)

#define	vmsle_vx_i8m4_b2(...) __riscv_vmsle_vx_i8m4_b2(__VA_ARGS__)

#define	vmsle_vx_i8m4_b2_m(...) __riscv_vmsle_vx_i8m4_b2_mu(__VA_ARGS__)

#define	vmsle_vx_i8m8_b1(...) __riscv_vmsle_vx_i8m8_b1(__VA_ARGS__)

#define	vmsle_vx_i8m8_b1_m(...) __riscv_vmsle_vx_i8m8_b1_mu(__VA_ARGS__)

#define	vmsle_vx_i8mf2_b16(...) __riscv_vmsle_vx_i8mf2_b16(__VA_ARGS__)

#define	vmsle_vx_i8mf2_b16_m(...) __riscv_vmsle_vx_i8mf2_b16_mu(__VA_ARGS__)

#define	vmsle_vx_i8mf4_b32(...) __riscv_vmsle_vx_i8mf4_b32(__VA_ARGS__)

#define	vmsle_vx_i8mf4_b32_m(...) __riscv_vmsle_vx_i8mf4_b32_mu(__VA_ARGS__)

#define	vmsle_vx_i8mf8_b64(...) __riscv_vmsle_vx_i8mf8_b64(__VA_ARGS__)

#define	vmsle_vx_i8mf8_b64_m(...) __riscv_vmsle_vx_i8mf8_b64_mu(__VA_ARGS__)

#define	vmsleu_vv_u16m1_b16(...) __riscv_vmsleu_vv_u16m1_b16(__VA_ARGS__)

#define	vmsleu_vv_u16m1_b16_m(...) __riscv_vmsleu_vv_u16m1_b16_mu(__VA_ARGS__)

#define	vmsleu_vv_u16m2_b8(...) __riscv_vmsleu_vv_u16m2_b8(__VA_ARGS__)

#define	vmsleu_vv_u16m2_b8_m(...) __riscv_vmsleu_vv_u16m2_b8_mu(__VA_ARGS__)

#define	vmsleu_vv_u16m4_b4(...) __riscv_vmsleu_vv_u16m4_b4(__VA_ARGS__)

#define	vmsleu_vv_u16m4_b4_m(...) __riscv_vmsleu_vv_u16m4_b4_mu(__VA_ARGS__)

#define	vmsleu_vv_u16m8_b2(...) __riscv_vmsleu_vv_u16m8_b2(__VA_ARGS__)

#define	vmsleu_vv_u16m8_b2_m(...) __riscv_vmsleu_vv_u16m8_b2_mu(__VA_ARGS__)

#define	vmsleu_vv_u16mf2_b32(...) __riscv_vmsleu_vv_u16mf2_b32(__VA_ARGS__)

#define	vmsleu_vv_u16mf2_b32_m(...) __riscv_vmsleu_vv_u16mf2_b32_mu(__VA_ARGS__)

#define	vmsleu_vv_u16mf4_b64(...) __riscv_vmsleu_vv_u16mf4_b64(__VA_ARGS__)

#define	vmsleu_vv_u16mf4_b64_m(...) __riscv_vmsleu_vv_u16mf4_b64_mu(__VA_ARGS__)

#define	vmsleu_vv_u32m1_b32(...) __riscv_vmsleu_vv_u32m1_b32(__VA_ARGS__)

#define	vmsleu_vv_u32m1_b32_m(...) __riscv_vmsleu_vv_u32m1_b32_mu(__VA_ARGS__)

#define	vmsleu_vv_u32m2_b16(...) __riscv_vmsleu_vv_u32m2_b16(__VA_ARGS__)

#define	vmsleu_vv_u32m2_b16_m(...) __riscv_vmsleu_vv_u32m2_b16_mu(__VA_ARGS__)

#define	vmsleu_vv_u32m4_b8(...) __riscv_vmsleu_vv_u32m4_b8(__VA_ARGS__)

#define	vmsleu_vv_u32m4_b8_m(...) __riscv_vmsleu_vv_u32m4_b8_mu(__VA_ARGS__)

#define	vmsleu_vv_u32m8_b4(...) __riscv_vmsleu_vv_u32m8_b4(__VA_ARGS__)

#define	vmsleu_vv_u32m8_b4_m(...) __riscv_vmsleu_vv_u32m8_b4_mu(__VA_ARGS__)

#define	vmsleu_vv_u32mf2_b64(...) __riscv_vmsleu_vv_u32mf2_b64(__VA_ARGS__)

#define	vmsleu_vv_u32mf2_b64_m(...) __riscv_vmsleu_vv_u32mf2_b64_mu(__VA_ARGS__)

#define	vmsleu_vv_u64m1_b64(...) __riscv_vmsleu_vv_u64m1_b64(__VA_ARGS__)

#define	vmsleu_vv_u64m1_b64_m(...) __riscv_vmsleu_vv_u64m1_b64_mu(__VA_ARGS__)

#define	vmsleu_vv_u64m2_b32(...) __riscv_vmsleu_vv_u64m2_b32(__VA_ARGS__)

#define	vmsleu_vv_u64m2_b32_m(...) __riscv_vmsleu_vv_u64m2_b32_mu(__VA_ARGS__)

#define	vmsleu_vv_u64m4_b16(...) __riscv_vmsleu_vv_u64m4_b16(__VA_ARGS__)

#define	vmsleu_vv_u64m4_b16_m(...) __riscv_vmsleu_vv_u64m4_b16_mu(__VA_ARGS__)

#define	vmsleu_vv_u64m8_b8(...) __riscv_vmsleu_vv_u64m8_b8(__VA_ARGS__)

#define	vmsleu_vv_u64m8_b8_m(...) __riscv_vmsleu_vv_u64m8_b8_mu(__VA_ARGS__)

#define	vmsleu_vv_u8m1_b8(...) __riscv_vmsleu_vv_u8m1_b8(__VA_ARGS__)

#define	vmsleu_vv_u8m1_b8_m(...) __riscv_vmsleu_vv_u8m1_b8_mu(__VA_ARGS__)

#define	vmsleu_vv_u8m2_b4(...) __riscv_vmsleu_vv_u8m2_b4(__VA_ARGS__)

#define	vmsleu_vv_u8m2_b4_m(...) __riscv_vmsleu_vv_u8m2_b4_mu(__VA_ARGS__)

#define	vmsleu_vv_u8m4_b2(...) __riscv_vmsleu_vv_u8m4_b2(__VA_ARGS__)

#define	vmsleu_vv_u8m4_b2_m(...) __riscv_vmsleu_vv_u8m4_b2_mu(__VA_ARGS__)

#define	vmsleu_vv_u8m8_b1(...) __riscv_vmsleu_vv_u8m8_b1(__VA_ARGS__)

#define	vmsleu_vv_u8m8_b1_m(...) __riscv_vmsleu_vv_u8m8_b1_mu(__VA_ARGS__)

#define	vmsleu_vv_u8mf2_b16(...) __riscv_vmsleu_vv_u8mf2_b16(__VA_ARGS__)

#define	vmsleu_vv_u8mf2_b16_m(...) __riscv_vmsleu_vv_u8mf2_b16_mu(__VA_ARGS__)

#define	vmsleu_vv_u8mf4_b32(...) __riscv_vmsleu_vv_u8mf4_b32(__VA_ARGS__)

#define	vmsleu_vv_u8mf4_b32_m(...) __riscv_vmsleu_vv_u8mf4_b32_mu(__VA_ARGS__)

#define	vmsleu_vv_u8mf8_b64(...) __riscv_vmsleu_vv_u8mf8_b64(__VA_ARGS__)

#define	vmsleu_vv_u8mf8_b64_m(...) __riscv_vmsleu_vv_u8mf8_b64_mu(__VA_ARGS__)

#define	vmsleu_vx_u16m1_b16(...) __riscv_vmsleu_vx_u16m1_b16(__VA_ARGS__)

#define	vmsleu_vx_u16m1_b16_m(...) __riscv_vmsleu_vx_u16m1_b16_mu(__VA_ARGS__)

#define	vmsleu_vx_u16m2_b8(...) __riscv_vmsleu_vx_u16m2_b8(__VA_ARGS__)

#define	vmsleu_vx_u16m2_b8_m(...) __riscv_vmsleu_vx_u16m2_b8_mu(__VA_ARGS__)

#define	vmsleu_vx_u16m4_b4(...) __riscv_vmsleu_vx_u16m4_b4(__VA_ARGS__)

#define	vmsleu_vx_u16m4_b4_m(...) __riscv_vmsleu_vx_u16m4_b4_mu(__VA_ARGS__)

#define	vmsleu_vx_u16m8_b2(...) __riscv_vmsleu_vx_u16m8_b2(__VA_ARGS__)

#define	vmsleu_vx_u16m8_b2_m(...) __riscv_vmsleu_vx_u16m8_b2_mu(__VA_ARGS__)

#define	vmsleu_vx_u16mf2_b32(...) __riscv_vmsleu_vx_u16mf2_b32(__VA_ARGS__)

#define	vmsleu_vx_u16mf2_b32_m(...) __riscv_vmsleu_vx_u16mf2_b32_mu(__VA_ARGS__)

#define	vmsleu_vx_u16mf4_b64(...) __riscv_vmsleu_vx_u16mf4_b64(__VA_ARGS__)

#define	vmsleu_vx_u16mf4_b64_m(...) __riscv_vmsleu_vx_u16mf4_b64_mu(__VA_ARGS__)

#define	vmsleu_vx_u32m1_b32(...) __riscv_vmsleu_vx_u32m1_b32(__VA_ARGS__)

#define	vmsleu_vx_u32m1_b32_m(...) __riscv_vmsleu_vx_u32m1_b32_mu(__VA_ARGS__)

#define	vmsleu_vx_u32m2_b16(...) __riscv_vmsleu_vx_u32m2_b16(__VA_ARGS__)

#define	vmsleu_vx_u32m2_b16_m(...) __riscv_vmsleu_vx_u32m2_b16_mu(__VA_ARGS__)

#define	vmsleu_vx_u32m4_b8(...) __riscv_vmsleu_vx_u32m4_b8(__VA_ARGS__)

#define	vmsleu_vx_u32m4_b8_m(...) __riscv_vmsleu_vx_u32m4_b8_mu(__VA_ARGS__)

#define	vmsleu_vx_u32m8_b4(...) __riscv_vmsleu_vx_u32m8_b4(__VA_ARGS__)

#define	vmsleu_vx_u32m8_b4_m(...) __riscv_vmsleu_vx_u32m8_b4_mu(__VA_ARGS__)

#define	vmsleu_vx_u32mf2_b64(...) __riscv_vmsleu_vx_u32mf2_b64(__VA_ARGS__)

#define	vmsleu_vx_u32mf2_b64_m(...) __riscv_vmsleu_vx_u32mf2_b64_mu(__VA_ARGS__)

#define	vmsleu_vx_u64m1_b64(...) __riscv_vmsleu_vx_u64m1_b64(__VA_ARGS__)

#define	vmsleu_vx_u64m1_b64_m(...) __riscv_vmsleu_vx_u64m1_b64_mu(__VA_ARGS__)

#define	vmsleu_vx_u64m2_b32(...) __riscv_vmsleu_vx_u64m2_b32(__VA_ARGS__)

#define	vmsleu_vx_u64m2_b32_m(...) __riscv_vmsleu_vx_u64m2_b32_mu(__VA_ARGS__)

#define	vmsleu_vx_u64m4_b16(...) __riscv_vmsleu_vx_u64m4_b16(__VA_ARGS__)

#define	vmsleu_vx_u64m4_b16_m(...) __riscv_vmsleu_vx_u64m4_b16_mu(__VA_ARGS__)

#define	vmsleu_vx_u64m8_b8(...) __riscv_vmsleu_vx_u64m8_b8(__VA_ARGS__)

#define	vmsleu_vx_u64m8_b8_m(...) __riscv_vmsleu_vx_u64m8_b8_mu(__VA_ARGS__)

#define	vmsleu_vx_u8m1_b8(...) __riscv_vmsleu_vx_u8m1_b8(__VA_ARGS__)

#define	vmsleu_vx_u8m1_b8_m(...) __riscv_vmsleu_vx_u8m1_b8_mu(__VA_ARGS__)

#define	vmsleu_vx_u8m2_b4(...) __riscv_vmsleu_vx_u8m2_b4(__VA_ARGS__)

#define	vmsleu_vx_u8m2_b4_m(...) __riscv_vmsleu_vx_u8m2_b4_mu(__VA_ARGS__)

#define	vmsleu_vx_u8m4_b2(...) __riscv_vmsleu_vx_u8m4_b2(__VA_ARGS__)

#define	vmsleu_vx_u8m4_b2_m(...) __riscv_vmsleu_vx_u8m4_b2_mu(__VA_ARGS__)

#define	vmsleu_vx_u8m8_b1(...) __riscv_vmsleu_vx_u8m8_b1(__VA_ARGS__)

#define	vmsleu_vx_u8m8_b1_m(...) __riscv_vmsleu_vx_u8m8_b1_mu(__VA_ARGS__)

#define	vmsleu_vx_u8mf2_b16(...) __riscv_vmsleu_vx_u8mf2_b16(__VA_ARGS__)

#define	vmsleu_vx_u8mf2_b16_m(...) __riscv_vmsleu_vx_u8mf2_b16_mu(__VA_ARGS__)

#define	vmsleu_vx_u8mf4_b32(...) __riscv_vmsleu_vx_u8mf4_b32(__VA_ARGS__)

#define	vmsleu_vx_u8mf4_b32_m(...) __riscv_vmsleu_vx_u8mf4_b32_mu(__VA_ARGS__)

#define	vmsleu_vx_u8mf8_b64(...) __riscv_vmsleu_vx_u8mf8_b64(__VA_ARGS__)

#define	vmsleu_vx_u8mf8_b64_m(...) __riscv_vmsleu_vx_u8mf8_b64_mu(__VA_ARGS__)

#define	vmslt_vv_i16m1_b16(...) __riscv_vmslt_vv_i16m1_b16(__VA_ARGS__)

#define	vmslt_vv_i16m1_b16_m(...) __riscv_vmslt_vv_i16m1_b16_mu(__VA_ARGS__)

#define	vmslt_vv_i16m2_b8(...) __riscv_vmslt_vv_i16m2_b8(__VA_ARGS__)

#define	vmslt_vv_i16m2_b8_m(...) __riscv_vmslt_vv_i16m2_b8_mu(__VA_ARGS__)

#define	vmslt_vv_i16m4_b4(...) __riscv_vmslt_vv_i16m4_b4(__VA_ARGS__)

#define	vmslt_vv_i16m4_b4_m(...) __riscv_vmslt_vv_i16m4_b4_mu(__VA_ARGS__)

#define	vmslt_vv_i16m8_b2(...) __riscv_vmslt_vv_i16m8_b2(__VA_ARGS__)

#define	vmslt_vv_i16m8_b2_m(...) __riscv_vmslt_vv_i16m8_b2_mu(__VA_ARGS__)

#define	vmslt_vv_i16mf2_b32(...) __riscv_vmslt_vv_i16mf2_b32(__VA_ARGS__)

#define	vmslt_vv_i16mf2_b32_m(...) __riscv_vmslt_vv_i16mf2_b32_mu(__VA_ARGS__)

#define	vmslt_vv_i16mf4_b64(...) __riscv_vmslt_vv_i16mf4_b64(__VA_ARGS__)

#define	vmslt_vv_i16mf4_b64_m(...) __riscv_vmslt_vv_i16mf4_b64_mu(__VA_ARGS__)

#define	vmslt_vv_i32m1_b32(...) __riscv_vmslt_vv_i32m1_b32(__VA_ARGS__)

#define	vmslt_vv_i32m1_b32_m(...) __riscv_vmslt_vv_i32m1_b32_mu(__VA_ARGS__)

#define	vmslt_vv_i32m2_b16(...) __riscv_vmslt_vv_i32m2_b16(__VA_ARGS__)

#define	vmslt_vv_i32m2_b16_m(...) __riscv_vmslt_vv_i32m2_b16_mu(__VA_ARGS__)

#define	vmslt_vv_i32m4_b8(...) __riscv_vmslt_vv_i32m4_b8(__VA_ARGS__)

#define	vmslt_vv_i32m4_b8_m(...) __riscv_vmslt_vv_i32m4_b8_mu(__VA_ARGS__)

#define	vmslt_vv_i32m8_b4(...) __riscv_vmslt_vv_i32m8_b4(__VA_ARGS__)

#define	vmslt_vv_i32m8_b4_m(...) __riscv_vmslt_vv_i32m8_b4_mu(__VA_ARGS__)

#define	vmslt_vv_i32mf2_b64(...) __riscv_vmslt_vv_i32mf2_b64(__VA_ARGS__)

#define	vmslt_vv_i32mf2_b64_m(...) __riscv_vmslt_vv_i32mf2_b64_mu(__VA_ARGS__)

#define	vmslt_vv_i64m1_b64(...) __riscv_vmslt_vv_i64m1_b64(__VA_ARGS__)

#define	vmslt_vv_i64m1_b64_m(...) __riscv_vmslt_vv_i64m1_b64_mu(__VA_ARGS__)

#define	vmslt_vv_i64m2_b32(...) __riscv_vmslt_vv_i64m2_b32(__VA_ARGS__)

#define	vmslt_vv_i64m2_b32_m(...) __riscv_vmslt_vv_i64m2_b32_mu(__VA_ARGS__)

#define	vmslt_vv_i64m4_b16(...) __riscv_vmslt_vv_i64m4_b16(__VA_ARGS__)

#define	vmslt_vv_i64m4_b16_m(...) __riscv_vmslt_vv_i64m4_b16_mu(__VA_ARGS__)

#define	vmslt_vv_i64m8_b8(...) __riscv_vmslt_vv_i64m8_b8(__VA_ARGS__)

#define	vmslt_vv_i64m8_b8_m(...) __riscv_vmslt_vv_i64m8_b8_mu(__VA_ARGS__)

#define	vmslt_vv_i8m1_b8(...) __riscv_vmslt_vv_i8m1_b8(__VA_ARGS__)

#define	vmslt_vv_i8m1_b8_m(...) __riscv_vmslt_vv_i8m1_b8_mu(__VA_ARGS__)

#define	vmslt_vv_i8m2_b4(...) __riscv_vmslt_vv_i8m2_b4(__VA_ARGS__)

#define	vmslt_vv_i8m2_b4_m(...) __riscv_vmslt_vv_i8m2_b4_mu(__VA_ARGS__)

#define	vmslt_vv_i8m4_b2(...) __riscv_vmslt_vv_i8m4_b2(__VA_ARGS__)

#define	vmslt_vv_i8m4_b2_m(...) __riscv_vmslt_vv_i8m4_b2_mu(__VA_ARGS__)

#define	vmslt_vv_i8m8_b1(...) __riscv_vmslt_vv_i8m8_b1(__VA_ARGS__)

#define	vmslt_vv_i8m8_b1_m(...) __riscv_vmslt_vv_i8m8_b1_mu(__VA_ARGS__)

#define	vmslt_vv_i8mf2_b16(...) __riscv_vmslt_vv_i8mf2_b16(__VA_ARGS__)

#define	vmslt_vv_i8mf2_b16_m(...) __riscv_vmslt_vv_i8mf2_b16_mu(__VA_ARGS__)

#define	vmslt_vv_i8mf4_b32(...) __riscv_vmslt_vv_i8mf4_b32(__VA_ARGS__)

#define	vmslt_vv_i8mf4_b32_m(...) __riscv_vmslt_vv_i8mf4_b32_mu(__VA_ARGS__)

#define	vmslt_vv_i8mf8_b64(...) __riscv_vmslt_vv_i8mf8_b64(__VA_ARGS__)

#define	vmslt_vv_i8mf8_b64_m(...) __riscv_vmslt_vv_i8mf8_b64_mu(__VA_ARGS__)

#define	vmslt_vx_i16m1_b16(...) __riscv_vmslt_vx_i16m1_b16(__VA_ARGS__)

#define	vmslt_vx_i16m1_b16_m(...) __riscv_vmslt_vx_i16m1_b16_mu(__VA_ARGS__)

#define	vmslt_vx_i16m2_b8(...) __riscv_vmslt_vx_i16m2_b8(__VA_ARGS__)

#define	vmslt_vx_i16m2_b8_m(...) __riscv_vmslt_vx_i16m2_b8_mu(__VA_ARGS__)

#define	vmslt_vx_i16m4_b4(...) __riscv_vmslt_vx_i16m4_b4(__VA_ARGS__)

#define	vmslt_vx_i16m4_b4_m(...) __riscv_vmslt_vx_i16m4_b4_mu(__VA_ARGS__)

#define	vmslt_vx_i16m8_b2(...) __riscv_vmslt_vx_i16m8_b2(__VA_ARGS__)

#define	vmslt_vx_i16m8_b2_m(...) __riscv_vmslt_vx_i16m8_b2_mu(__VA_ARGS__)

#define	vmslt_vx_i16mf2_b32(...) __riscv_vmslt_vx_i16mf2_b32(__VA_ARGS__)

#define	vmslt_vx_i16mf2_b32_m(...) __riscv_vmslt_vx_i16mf2_b32_mu(__VA_ARGS__)

#define	vmslt_vx_i16mf4_b64(...) __riscv_vmslt_vx_i16mf4_b64(__VA_ARGS__)

#define	vmslt_vx_i16mf4_b64_m(...) __riscv_vmslt_vx_i16mf4_b64_mu(__VA_ARGS__)

#define	vmslt_vx_i32m1_b32(...) __riscv_vmslt_vx_i32m1_b32(__VA_ARGS__)

#define	vmslt_vx_i32m1_b32_m(...) __riscv_vmslt_vx_i32m1_b32_mu(__VA_ARGS__)

#define	vmslt_vx_i32m2_b16(...) __riscv_vmslt_vx_i32m2_b16(__VA_ARGS__)

#define	vmslt_vx_i32m2_b16_m(...) __riscv_vmslt_vx_i32m2_b16_mu(__VA_ARGS__)

#define	vmslt_vx_i32m4_b8(...) __riscv_vmslt_vx_i32m4_b8(__VA_ARGS__)

#define	vmslt_vx_i32m4_b8_m(...) __riscv_vmslt_vx_i32m4_b8_mu(__VA_ARGS__)

#define	vmslt_vx_i32m8_b4(...) __riscv_vmslt_vx_i32m8_b4(__VA_ARGS__)

#define	vmslt_vx_i32m8_b4_m(...) __riscv_vmslt_vx_i32m8_b4_mu(__VA_ARGS__)

#define	vmslt_vx_i32mf2_b64(...) __riscv_vmslt_vx_i32mf2_b64(__VA_ARGS__)

#define	vmslt_vx_i32mf2_b64_m(...) __riscv_vmslt_vx_i32mf2_b64_mu(__VA_ARGS__)

#define	vmslt_vx_i64m1_b64(...) __riscv_vmslt_vx_i64m1_b64(__VA_ARGS__)

#define	vmslt_vx_i64m1_b64_m(...) __riscv_vmslt_vx_i64m1_b64_mu(__VA_ARGS__)

#define	vmslt_vx_i64m2_b32(...) __riscv_vmslt_vx_i64m2_b32(__VA_ARGS__)

#define	vmslt_vx_i64m2_b32_m(...) __riscv_vmslt_vx_i64m2_b32_mu(__VA_ARGS__)

#define	vmslt_vx_i64m4_b16(...) __riscv_vmslt_vx_i64m4_b16(__VA_ARGS__)

#define	vmslt_vx_i64m4_b16_m(...) __riscv_vmslt_vx_i64m4_b16_mu(__VA_ARGS__)

#define	vmslt_vx_i64m8_b8(...) __riscv_vmslt_vx_i64m8_b8(__VA_ARGS__)

#define	vmslt_vx_i64m8_b8_m(...) __riscv_vmslt_vx_i64m8_b8_mu(__VA_ARGS__)

#define	vmslt_vx_i8m1_b8(...) __riscv_vmslt_vx_i8m1_b8(__VA_ARGS__)

#define	vmslt_vx_i8m1_b8_m(...) __riscv_vmslt_vx_i8m1_b8_mu(__VA_ARGS__)

#define	vmslt_vx_i8m2_b4(...) __riscv_vmslt_vx_i8m2_b4(__VA_ARGS__)

#define	vmslt_vx_i8m2_b4_m(...) __riscv_vmslt_vx_i8m2_b4_mu(__VA_ARGS__)

#define	vmslt_vx_i8m4_b2(...) __riscv_vmslt_vx_i8m4_b2(__VA_ARGS__)

#define	vmslt_vx_i8m4_b2_m(...) __riscv_vmslt_vx_i8m4_b2_mu(__VA_ARGS__)

#define	vmslt_vx_i8m8_b1(...) __riscv_vmslt_vx_i8m8_b1(__VA_ARGS__)

#define	vmslt_vx_i8m8_b1_m(...) __riscv_vmslt_vx_i8m8_b1_mu(__VA_ARGS__)

#define	vmslt_vx_i8mf2_b16(...) __riscv_vmslt_vx_i8mf2_b16(__VA_ARGS__)

#define	vmslt_vx_i8mf2_b16_m(...) __riscv_vmslt_vx_i8mf2_b16_mu(__VA_ARGS__)

#define	vmslt_vx_i8mf4_b32(...) __riscv_vmslt_vx_i8mf4_b32(__VA_ARGS__)

#define	vmslt_vx_i8mf4_b32_m(...) __riscv_vmslt_vx_i8mf4_b32_mu(__VA_ARGS__)

#define	vmslt_vx_i8mf8_b64(...) __riscv_vmslt_vx_i8mf8_b64(__VA_ARGS__)

#define	vmslt_vx_i8mf8_b64_m(...) __riscv_vmslt_vx_i8mf8_b64_mu(__VA_ARGS__)

#define	vmsltu_vv_u16m1_b16(...) __riscv_vmsltu_vv_u16m1_b16(__VA_ARGS__)

#define	vmsltu_vv_u16m1_b16_m(...) __riscv_vmsltu_vv_u16m1_b16_mu(__VA_ARGS__)

#define	vmsltu_vv_u16m2_b8(...) __riscv_vmsltu_vv_u16m2_b8(__VA_ARGS__)

#define	vmsltu_vv_u16m2_b8_m(...) __riscv_vmsltu_vv_u16m2_b8_mu(__VA_ARGS__)

#define	vmsltu_vv_u16m4_b4(...) __riscv_vmsltu_vv_u16m4_b4(__VA_ARGS__)

#define	vmsltu_vv_u16m4_b4_m(...) __riscv_vmsltu_vv_u16m4_b4_mu(__VA_ARGS__)

#define	vmsltu_vv_u16m8_b2(...) __riscv_vmsltu_vv_u16m8_b2(__VA_ARGS__)

#define	vmsltu_vv_u16m8_b2_m(...) __riscv_vmsltu_vv_u16m8_b2_mu(__VA_ARGS__)

#define	vmsltu_vv_u16mf2_b32(...) __riscv_vmsltu_vv_u16mf2_b32(__VA_ARGS__)

#define	vmsltu_vv_u16mf2_b32_m(...) __riscv_vmsltu_vv_u16mf2_b32_mu(__VA_ARGS__)

#define	vmsltu_vv_u16mf4_b64(...) __riscv_vmsltu_vv_u16mf4_b64(__VA_ARGS__)

#define	vmsltu_vv_u16mf4_b64_m(...) __riscv_vmsltu_vv_u16mf4_b64_mu(__VA_ARGS__)

#define	vmsltu_vv_u32m1_b32(...) __riscv_vmsltu_vv_u32m1_b32(__VA_ARGS__)

#define	vmsltu_vv_u32m1_b32_m(...) __riscv_vmsltu_vv_u32m1_b32_mu(__VA_ARGS__)

#define	vmsltu_vv_u32m2_b16(...) __riscv_vmsltu_vv_u32m2_b16(__VA_ARGS__)

#define	vmsltu_vv_u32m2_b16_m(...) __riscv_vmsltu_vv_u32m2_b16_mu(__VA_ARGS__)

#define	vmsltu_vv_u32m4_b8(...) __riscv_vmsltu_vv_u32m4_b8(__VA_ARGS__)

#define	vmsltu_vv_u32m4_b8_m(...) __riscv_vmsltu_vv_u32m4_b8_mu(__VA_ARGS__)

#define	vmsltu_vv_u32m8_b4(...) __riscv_vmsltu_vv_u32m8_b4(__VA_ARGS__)

#define	vmsltu_vv_u32m8_b4_m(...) __riscv_vmsltu_vv_u32m8_b4_mu(__VA_ARGS__)

#define	vmsltu_vv_u32mf2_b64(...) __riscv_vmsltu_vv_u32mf2_b64(__VA_ARGS__)

#define	vmsltu_vv_u32mf2_b64_m(...) __riscv_vmsltu_vv_u32mf2_b64_mu(__VA_ARGS__)

#define	vmsltu_vv_u64m1_b64(...) __riscv_vmsltu_vv_u64m1_b64(__VA_ARGS__)

#define	vmsltu_vv_u64m1_b64_m(...) __riscv_vmsltu_vv_u64m1_b64_mu(__VA_ARGS__)

#define	vmsltu_vv_u64m2_b32(...) __riscv_vmsltu_vv_u64m2_b32(__VA_ARGS__)

#define	vmsltu_vv_u64m2_b32_m(...) __riscv_vmsltu_vv_u64m2_b32_mu(__VA_ARGS__)

#define	vmsltu_vv_u64m4_b16(...) __riscv_vmsltu_vv_u64m4_b16(__VA_ARGS__)

#define	vmsltu_vv_u64m4_b16_m(...) __riscv_vmsltu_vv_u64m4_b16_mu(__VA_ARGS__)

#define	vmsltu_vv_u64m8_b8(...) __riscv_vmsltu_vv_u64m8_b8(__VA_ARGS__)

#define	vmsltu_vv_u64m8_b8_m(...) __riscv_vmsltu_vv_u64m8_b8_mu(__VA_ARGS__)

#define	vmsltu_vv_u8m1_b8(...) __riscv_vmsltu_vv_u8m1_b8(__VA_ARGS__)

#define	vmsltu_vv_u8m1_b8_m(...) __riscv_vmsltu_vv_u8m1_b8_mu(__VA_ARGS__)

#define	vmsltu_vv_u8m2_b4(...) __riscv_vmsltu_vv_u8m2_b4(__VA_ARGS__)

#define	vmsltu_vv_u8m2_b4_m(...) __riscv_vmsltu_vv_u8m2_b4_mu(__VA_ARGS__)

#define	vmsltu_vv_u8m4_b2(...) __riscv_vmsltu_vv_u8m4_b2(__VA_ARGS__)

#define	vmsltu_vv_u8m4_b2_m(...) __riscv_vmsltu_vv_u8m4_b2_mu(__VA_ARGS__)

#define	vmsltu_vv_u8m8_b1(...) __riscv_vmsltu_vv_u8m8_b1(__VA_ARGS__)

#define	vmsltu_vv_u8m8_b1_m(...) __riscv_vmsltu_vv_u8m8_b1_mu(__VA_ARGS__)

#define	vmsltu_vv_u8mf2_b16(...) __riscv_vmsltu_vv_u8mf2_b16(__VA_ARGS__)

#define	vmsltu_vv_u8mf2_b16_m(...) __riscv_vmsltu_vv_u8mf2_b16_mu(__VA_ARGS__)

#define	vmsltu_vv_u8mf4_b32(...) __riscv_vmsltu_vv_u8mf4_b32(__VA_ARGS__)

#define	vmsltu_vv_u8mf4_b32_m(...) __riscv_vmsltu_vv_u8mf4_b32_mu(__VA_ARGS__)

#define	vmsltu_vv_u8mf8_b64(...) __riscv_vmsltu_vv_u8mf8_b64(__VA_ARGS__)

#define	vmsltu_vv_u8mf8_b64_m(...) __riscv_vmsltu_vv_u8mf8_b64_mu(__VA_ARGS__)

#define	vmsltu_vx_u16m1_b16(...) __riscv_vmsltu_vx_u16m1_b16(__VA_ARGS__)

#define	vmsltu_vx_u16m1_b16_m(...) __riscv_vmsltu_vx_u16m1_b16_mu(__VA_ARGS__)

#define	vmsltu_vx_u16m2_b8(...) __riscv_vmsltu_vx_u16m2_b8(__VA_ARGS__)

#define	vmsltu_vx_u16m2_b8_m(...) __riscv_vmsltu_vx_u16m2_b8_mu(__VA_ARGS__)

#define	vmsltu_vx_u16m4_b4(...) __riscv_vmsltu_vx_u16m4_b4(__VA_ARGS__)

#define	vmsltu_vx_u16m4_b4_m(...) __riscv_vmsltu_vx_u16m4_b4_mu(__VA_ARGS__)

#define	vmsltu_vx_u16m8_b2(...) __riscv_vmsltu_vx_u16m8_b2(__VA_ARGS__)

#define	vmsltu_vx_u16m8_b2_m(...) __riscv_vmsltu_vx_u16m8_b2_mu(__VA_ARGS__)

#define	vmsltu_vx_u16mf2_b32(...) __riscv_vmsltu_vx_u16mf2_b32(__VA_ARGS__)

#define	vmsltu_vx_u16mf2_b32_m(...) __riscv_vmsltu_vx_u16mf2_b32_mu(__VA_ARGS__)

#define	vmsltu_vx_u16mf4_b64(...) __riscv_vmsltu_vx_u16mf4_b64(__VA_ARGS__)

#define	vmsltu_vx_u16mf4_b64_m(...) __riscv_vmsltu_vx_u16mf4_b64_mu(__VA_ARGS__)

#define	vmsltu_vx_u32m1_b32(...) __riscv_vmsltu_vx_u32m1_b32(__VA_ARGS__)

#define	vmsltu_vx_u32m1_b32_m(...) __riscv_vmsltu_vx_u32m1_b32_mu(__VA_ARGS__)

#define	vmsltu_vx_u32m2_b16(...) __riscv_vmsltu_vx_u32m2_b16(__VA_ARGS__)

#define	vmsltu_vx_u32m2_b16_m(...) __riscv_vmsltu_vx_u32m2_b16_mu(__VA_ARGS__)

#define	vmsltu_vx_u32m4_b8(...) __riscv_vmsltu_vx_u32m4_b8(__VA_ARGS__)

#define	vmsltu_vx_u32m4_b8_m(...) __riscv_vmsltu_vx_u32m4_b8_mu(__VA_ARGS__)

#define	vmsltu_vx_u32m8_b4(...) __riscv_vmsltu_vx_u32m8_b4(__VA_ARGS__)

#define	vmsltu_vx_u32m8_b4_m(...) __riscv_vmsltu_vx_u32m8_b4_mu(__VA_ARGS__)

#define	vmsltu_vx_u32mf2_b64(...) __riscv_vmsltu_vx_u32mf2_b64(__VA_ARGS__)

#define	vmsltu_vx_u32mf2_b64_m(...) __riscv_vmsltu_vx_u32mf2_b64_mu(__VA_ARGS__)

#define	vmsltu_vx_u64m1_b64(...) __riscv_vmsltu_vx_u64m1_b64(__VA_ARGS__)

#define	vmsltu_vx_u64m1_b64_m(...) __riscv_vmsltu_vx_u64m1_b64_mu(__VA_ARGS__)

#define	vmsltu_vx_u64m2_b32(...) __riscv_vmsltu_vx_u64m2_b32(__VA_ARGS__)

#define	vmsltu_vx_u64m2_b32_m(...) __riscv_vmsltu_vx_u64m2_b32_mu(__VA_ARGS__)

#define	vmsltu_vx_u64m4_b16(...) __riscv_vmsltu_vx_u64m4_b16(__VA_ARGS__)

#define	vmsltu_vx_u64m4_b16_m(...) __riscv_vmsltu_vx_u64m4_b16_mu(__VA_ARGS__)

#define	vmsltu_vx_u64m8_b8(...) __riscv_vmsltu_vx_u64m8_b8(__VA_ARGS__)

#define	vmsltu_vx_u64m8_b8_m(...) __riscv_vmsltu_vx_u64m8_b8_mu(__VA_ARGS__)

#define	vmsltu_vx_u8m1_b8(...) __riscv_vmsltu_vx_u8m1_b8(__VA_ARGS__)

#define	vmsltu_vx_u8m1_b8_m(...) __riscv_vmsltu_vx_u8m1_b8_mu(__VA_ARGS__)

#define	vmsltu_vx_u8m2_b4(...) __riscv_vmsltu_vx_u8m2_b4(__VA_ARGS__)

#define	vmsltu_vx_u8m2_b4_m(...) __riscv_vmsltu_vx_u8m2_b4_mu(__VA_ARGS__)

#define	vmsltu_vx_u8m4_b2(...) __riscv_vmsltu_vx_u8m4_b2(__VA_ARGS__)

#define	vmsltu_vx_u8m4_b2_m(...) __riscv_vmsltu_vx_u8m4_b2_mu(__VA_ARGS__)

#define	vmsltu_vx_u8m8_b1(...) __riscv_vmsltu_vx_u8m8_b1(__VA_ARGS__)

#define	vmsltu_vx_u8m8_b1_m(...) __riscv_vmsltu_vx_u8m8_b1_mu(__VA_ARGS__)

#define	vmsltu_vx_u8mf2_b16(...) __riscv_vmsltu_vx_u8mf2_b16(__VA_ARGS__)

#define	vmsltu_vx_u8mf2_b16_m(...) __riscv_vmsltu_vx_u8mf2_b16_mu(__VA_ARGS__)

#define	vmsltu_vx_u8mf4_b32(...) __riscv_vmsltu_vx_u8mf4_b32(__VA_ARGS__)

#define	vmsltu_vx_u8mf4_b32_m(...) __riscv_vmsltu_vx_u8mf4_b32_mu(__VA_ARGS__)

#define	vmsltu_vx_u8mf8_b64(...) __riscv_vmsltu_vx_u8mf8_b64(__VA_ARGS__)

#define	vmsltu_vx_u8mf8_b64_m(...) __riscv_vmsltu_vx_u8mf8_b64_mu(__VA_ARGS__)

#define	vmsne_vv_i16m1_b16(...) __riscv_vmsne_vv_i16m1_b16(__VA_ARGS__)

#define	vmsne_vv_i16m1_b16_m(...) __riscv_vmsne_vv_i16m1_b16_mu(__VA_ARGS__)

#define	vmsne_vv_i16m2_b8(...) __riscv_vmsne_vv_i16m2_b8(__VA_ARGS__)

#define	vmsne_vv_i16m2_b8_m(...) __riscv_vmsne_vv_i16m2_b8_mu(__VA_ARGS__)

#define	vmsne_vv_i16m4_b4(...) __riscv_vmsne_vv_i16m4_b4(__VA_ARGS__)

#define	vmsne_vv_i16m4_b4_m(...) __riscv_vmsne_vv_i16m4_b4_mu(__VA_ARGS__)

#define	vmsne_vv_i16m8_b2(...) __riscv_vmsne_vv_i16m8_b2(__VA_ARGS__)

#define	vmsne_vv_i16m8_b2_m(...) __riscv_vmsne_vv_i16m8_b2_mu(__VA_ARGS__)

#define	vmsne_vv_i16mf2_b32(...) __riscv_vmsne_vv_i16mf2_b32(__VA_ARGS__)

#define	vmsne_vv_i16mf2_b32_m(...) __riscv_vmsne_vv_i16mf2_b32_mu(__VA_ARGS__)

#define	vmsne_vv_i16mf4_b64(...) __riscv_vmsne_vv_i16mf4_b64(__VA_ARGS__)

#define	vmsne_vv_i16mf4_b64_m(...) __riscv_vmsne_vv_i16mf4_b64_mu(__VA_ARGS__)

#define	vmsne_vv_i32m1_b32(...) __riscv_vmsne_vv_i32m1_b32(__VA_ARGS__)

#define	vmsne_vv_i32m1_b32_m(...) __riscv_vmsne_vv_i32m1_b32_mu(__VA_ARGS__)

#define	vmsne_vv_i32m2_b16(...) __riscv_vmsne_vv_i32m2_b16(__VA_ARGS__)

#define	vmsne_vv_i32m2_b16_m(...) __riscv_vmsne_vv_i32m2_b16_mu(__VA_ARGS__)

#define	vmsne_vv_i32m4_b8(...) __riscv_vmsne_vv_i32m4_b8(__VA_ARGS__)

#define	vmsne_vv_i32m4_b8_m(...) __riscv_vmsne_vv_i32m4_b8_mu(__VA_ARGS__)

#define	vmsne_vv_i32m8_b4(...) __riscv_vmsne_vv_i32m8_b4(__VA_ARGS__)

#define	vmsne_vv_i32m8_b4_m(...) __riscv_vmsne_vv_i32m8_b4_mu(__VA_ARGS__)

#define	vmsne_vv_i32mf2_b64(...) __riscv_vmsne_vv_i32mf2_b64(__VA_ARGS__)

#define	vmsne_vv_i32mf2_b64_m(...) __riscv_vmsne_vv_i32mf2_b64_mu(__VA_ARGS__)

#define	vmsne_vv_i64m1_b64(...) __riscv_vmsne_vv_i64m1_b64(__VA_ARGS__)

#define	vmsne_vv_i64m1_b64_m(...) __riscv_vmsne_vv_i64m1_b64_mu(__VA_ARGS__)

#define	vmsne_vv_i64m2_b32(...) __riscv_vmsne_vv_i64m2_b32(__VA_ARGS__)

#define	vmsne_vv_i64m2_b32_m(...) __riscv_vmsne_vv_i64m2_b32_mu(__VA_ARGS__)

#define	vmsne_vv_i64m4_b16(...) __riscv_vmsne_vv_i64m4_b16(__VA_ARGS__)

#define	vmsne_vv_i64m4_b16_m(...) __riscv_vmsne_vv_i64m4_b16_mu(__VA_ARGS__)

#define	vmsne_vv_i64m8_b8(...) __riscv_vmsne_vv_i64m8_b8(__VA_ARGS__)

#define	vmsne_vv_i64m8_b8_m(...) __riscv_vmsne_vv_i64m8_b8_mu(__VA_ARGS__)

#define	vmsne_vv_i8m1_b8(...) __riscv_vmsne_vv_i8m1_b8(__VA_ARGS__)

#define	vmsne_vv_i8m1_b8_m(...) __riscv_vmsne_vv_i8m1_b8_mu(__VA_ARGS__)

#define	vmsne_vv_i8m2_b4(...) __riscv_vmsne_vv_i8m2_b4(__VA_ARGS__)

#define	vmsne_vv_i8m2_b4_m(...) __riscv_vmsne_vv_i8m2_b4_mu(__VA_ARGS__)

#define	vmsne_vv_i8m4_b2(...) __riscv_vmsne_vv_i8m4_b2(__VA_ARGS__)

#define	vmsne_vv_i8m4_b2_m(...) __riscv_vmsne_vv_i8m4_b2_mu(__VA_ARGS__)

#define	vmsne_vv_i8m8_b1(...) __riscv_vmsne_vv_i8m8_b1(__VA_ARGS__)

#define	vmsne_vv_i8m8_b1_m(...) __riscv_vmsne_vv_i8m8_b1_mu(__VA_ARGS__)

#define	vmsne_vv_i8mf2_b16(...) __riscv_vmsne_vv_i8mf2_b16(__VA_ARGS__)

#define	vmsne_vv_i8mf2_b16_m(...) __riscv_vmsne_vv_i8mf2_b16_mu(__VA_ARGS__)

#define	vmsne_vv_i8mf4_b32(...) __riscv_vmsne_vv_i8mf4_b32(__VA_ARGS__)

#define	vmsne_vv_i8mf4_b32_m(...) __riscv_vmsne_vv_i8mf4_b32_mu(__VA_ARGS__)

#define	vmsne_vv_i8mf8_b64(...) __riscv_vmsne_vv_i8mf8_b64(__VA_ARGS__)

#define	vmsne_vv_i8mf8_b64_m(...) __riscv_vmsne_vv_i8mf8_b64_mu(__VA_ARGS__)

#define	vmsne_vv_u16m1_b16(...) __riscv_vmsne_vv_u16m1_b16(__VA_ARGS__)

#define	vmsne_vv_u16m1_b16_m(...) __riscv_vmsne_vv_u16m1_b16_mu(__VA_ARGS__)

#define	vmsne_vv_u16m2_b8(...) __riscv_vmsne_vv_u16m2_b8(__VA_ARGS__)

#define	vmsne_vv_u16m2_b8_m(...) __riscv_vmsne_vv_u16m2_b8_mu(__VA_ARGS__)

#define	vmsne_vv_u16m4_b4(...) __riscv_vmsne_vv_u16m4_b4(__VA_ARGS__)

#define	vmsne_vv_u16m4_b4_m(...) __riscv_vmsne_vv_u16m4_b4_mu(__VA_ARGS__)

#define	vmsne_vv_u16m8_b2(...) __riscv_vmsne_vv_u16m8_b2(__VA_ARGS__)

#define	vmsne_vv_u16m8_b2_m(...) __riscv_vmsne_vv_u16m8_b2_mu(__VA_ARGS__)

#define	vmsne_vv_u16mf2_b32(...) __riscv_vmsne_vv_u16mf2_b32(__VA_ARGS__)

#define	vmsne_vv_u16mf2_b32_m(...) __riscv_vmsne_vv_u16mf2_b32_mu(__VA_ARGS__)

#define	vmsne_vv_u16mf4_b64(...) __riscv_vmsne_vv_u16mf4_b64(__VA_ARGS__)

#define	vmsne_vv_u16mf4_b64_m(...) __riscv_vmsne_vv_u16mf4_b64_mu(__VA_ARGS__)

#define	vmsne_vv_u32m1_b32(...) __riscv_vmsne_vv_u32m1_b32(__VA_ARGS__)

#define	vmsne_vv_u32m1_b32_m(...) __riscv_vmsne_vv_u32m1_b32_mu(__VA_ARGS__)

#define	vmsne_vv_u32m2_b16(...) __riscv_vmsne_vv_u32m2_b16(__VA_ARGS__)

#define	vmsne_vv_u32m2_b16_m(...) __riscv_vmsne_vv_u32m2_b16_mu(__VA_ARGS__)

#define	vmsne_vv_u32m4_b8(...) __riscv_vmsne_vv_u32m4_b8(__VA_ARGS__)

#define	vmsne_vv_u32m4_b8_m(...) __riscv_vmsne_vv_u32m4_b8_mu(__VA_ARGS__)

#define	vmsne_vv_u32m8_b4(...) __riscv_vmsne_vv_u32m8_b4(__VA_ARGS__)

#define	vmsne_vv_u32m8_b4_m(...) __riscv_vmsne_vv_u32m8_b4_mu(__VA_ARGS__)

#define	vmsne_vv_u32mf2_b64(...) __riscv_vmsne_vv_u32mf2_b64(__VA_ARGS__)

#define	vmsne_vv_u32mf2_b64_m(...) __riscv_vmsne_vv_u32mf2_b64_mu(__VA_ARGS__)

#define	vmsne_vv_u64m1_b64(...) __riscv_vmsne_vv_u64m1_b64(__VA_ARGS__)

#define	vmsne_vv_u64m1_b64_m(...) __riscv_vmsne_vv_u64m1_b64_mu(__VA_ARGS__)

#define	vmsne_vv_u64m2_b32(...) __riscv_vmsne_vv_u64m2_b32(__VA_ARGS__)

#define	vmsne_vv_u64m2_b32_m(...) __riscv_vmsne_vv_u64m2_b32_mu(__VA_ARGS__)

#define	vmsne_vv_u64m4_b16(...) __riscv_vmsne_vv_u64m4_b16(__VA_ARGS__)

#define	vmsne_vv_u64m4_b16_m(...) __riscv_vmsne_vv_u64m4_b16_mu(__VA_ARGS__)

#define	vmsne_vv_u64m8_b8(...) __riscv_vmsne_vv_u64m8_b8(__VA_ARGS__)

#define	vmsne_vv_u64m8_b8_m(...) __riscv_vmsne_vv_u64m8_b8_mu(__VA_ARGS__)

#define	vmsne_vv_u8m1_b8(...) __riscv_vmsne_vv_u8m1_b8(__VA_ARGS__)

#define	vmsne_vv_u8m1_b8_m(...) __riscv_vmsne_vv_u8m1_b8_mu(__VA_ARGS__)

#define	vmsne_vv_u8m2_b4(...) __riscv_vmsne_vv_u8m2_b4(__VA_ARGS__)

#define	vmsne_vv_u8m2_b4_m(...) __riscv_vmsne_vv_u8m2_b4_mu(__VA_ARGS__)

#define	vmsne_vv_u8m4_b2(...) __riscv_vmsne_vv_u8m4_b2(__VA_ARGS__)

#define	vmsne_vv_u8m4_b2_m(...) __riscv_vmsne_vv_u8m4_b2_mu(__VA_ARGS__)

#define	vmsne_vv_u8m8_b1(...) __riscv_vmsne_vv_u8m8_b1(__VA_ARGS__)

#define	vmsne_vv_u8m8_b1_m(...) __riscv_vmsne_vv_u8m8_b1_mu(__VA_ARGS__)

#define	vmsne_vv_u8mf2_b16(...) __riscv_vmsne_vv_u8mf2_b16(__VA_ARGS__)

#define	vmsne_vv_u8mf2_b16_m(...) __riscv_vmsne_vv_u8mf2_b16_mu(__VA_ARGS__)

#define	vmsne_vv_u8mf4_b32(...) __riscv_vmsne_vv_u8mf4_b32(__VA_ARGS__)

#define	vmsne_vv_u8mf4_b32_m(...) __riscv_vmsne_vv_u8mf4_b32_mu(__VA_ARGS__)

#define	vmsne_vv_u8mf8_b64(...) __riscv_vmsne_vv_u8mf8_b64(__VA_ARGS__)

#define	vmsne_vv_u8mf8_b64_m(...) __riscv_vmsne_vv_u8mf8_b64_mu(__VA_ARGS__)

#define	vmsne_vx_i16m1_b16(...) __riscv_vmsne_vx_i16m1_b16(__VA_ARGS__)

#define	vmsne_vx_i16m1_b16_m(...) __riscv_vmsne_vx_i16m1_b16_mu(__VA_ARGS__)

#define	vmsne_vx_i16m2_b8(...) __riscv_vmsne_vx_i16m2_b8(__VA_ARGS__)

#define	vmsne_vx_i16m2_b8_m(...) __riscv_vmsne_vx_i16m2_b8_mu(__VA_ARGS__)

#define	vmsne_vx_i16m4_b4(...) __riscv_vmsne_vx_i16m4_b4(__VA_ARGS__)

#define	vmsne_vx_i16m4_b4_m(...) __riscv_vmsne_vx_i16m4_b4_mu(__VA_ARGS__)

#define	vmsne_vx_i16m8_b2(...) __riscv_vmsne_vx_i16m8_b2(__VA_ARGS__)

#define	vmsne_vx_i16m8_b2_m(...) __riscv_vmsne_vx_i16m8_b2_mu(__VA_ARGS__)

#define	vmsne_vx_i16mf2_b32(...) __riscv_vmsne_vx_i16mf2_b32(__VA_ARGS__)

#define	vmsne_vx_i16mf2_b32_m(...) __riscv_vmsne_vx_i16mf2_b32_mu(__VA_ARGS__)

#define	vmsne_vx_i16mf4_b64(...) __riscv_vmsne_vx_i16mf4_b64(__VA_ARGS__)

#define	vmsne_vx_i16mf4_b64_m(...) __riscv_vmsne_vx_i16mf4_b64_mu(__VA_ARGS__)

#define	vmsne_vx_i32m1_b32(...) __riscv_vmsne_vx_i32m1_b32(__VA_ARGS__)

#define	vmsne_vx_i32m1_b32_m(...) __riscv_vmsne_vx_i32m1_b32_mu(__VA_ARGS__)

#define	vmsne_vx_i32m2_b16(...) __riscv_vmsne_vx_i32m2_b16(__VA_ARGS__)

#define	vmsne_vx_i32m2_b16_m(...) __riscv_vmsne_vx_i32m2_b16_mu(__VA_ARGS__)

#define	vmsne_vx_i32m4_b8(...) __riscv_vmsne_vx_i32m4_b8(__VA_ARGS__)

#define	vmsne_vx_i32m4_b8_m(...) __riscv_vmsne_vx_i32m4_b8_mu(__VA_ARGS__)

#define	vmsne_vx_i32m8_b4(...) __riscv_vmsne_vx_i32m8_b4(__VA_ARGS__)

#define	vmsne_vx_i32m8_b4_m(...) __riscv_vmsne_vx_i32m8_b4_mu(__VA_ARGS__)

#define	vmsne_vx_i32mf2_b64(...) __riscv_vmsne_vx_i32mf2_b64(__VA_ARGS__)

#define	vmsne_vx_i32mf2_b64_m(...) __riscv_vmsne_vx_i32mf2_b64_mu(__VA_ARGS__)

#define	vmsne_vx_i64m1_b64(...) __riscv_vmsne_vx_i64m1_b64(__VA_ARGS__)

#define	vmsne_vx_i64m1_b64_m(...) __riscv_vmsne_vx_i64m1_b64_mu(__VA_ARGS__)

#define	vmsne_vx_i64m2_b32(...) __riscv_vmsne_vx_i64m2_b32(__VA_ARGS__)

#define	vmsne_vx_i64m2_b32_m(...) __riscv_vmsne_vx_i64m2_b32_mu(__VA_ARGS__)

#define	vmsne_vx_i64m4_b16(...) __riscv_vmsne_vx_i64m4_b16(__VA_ARGS__)

#define	vmsne_vx_i64m4_b16_m(...) __riscv_vmsne_vx_i64m4_b16_mu(__VA_ARGS__)

#define	vmsne_vx_i64m8_b8(...) __riscv_vmsne_vx_i64m8_b8(__VA_ARGS__)

#define	vmsne_vx_i64m8_b8_m(...) __riscv_vmsne_vx_i64m8_b8_mu(__VA_ARGS__)

#define	vmsne_vx_i8m1_b8(...) __riscv_vmsne_vx_i8m1_b8(__VA_ARGS__)

#define	vmsne_vx_i8m1_b8_m(...) __riscv_vmsne_vx_i8m1_b8_mu(__VA_ARGS__)

#define	vmsne_vx_i8m2_b4(...) __riscv_vmsne_vx_i8m2_b4(__VA_ARGS__)

#define	vmsne_vx_i8m2_b4_m(...) __riscv_vmsne_vx_i8m2_b4_mu(__VA_ARGS__)

#define	vmsne_vx_i8m4_b2(...) __riscv_vmsne_vx_i8m4_b2(__VA_ARGS__)

#define	vmsne_vx_i8m4_b2_m(...) __riscv_vmsne_vx_i8m4_b2_mu(__VA_ARGS__)

#define	vmsne_vx_i8m8_b1(...) __riscv_vmsne_vx_i8m8_b1(__VA_ARGS__)

#define	vmsne_vx_i8m8_b1_m(...) __riscv_vmsne_vx_i8m8_b1_mu(__VA_ARGS__)

#define	vmsne_vx_i8mf2_b16(...) __riscv_vmsne_vx_i8mf2_b16(__VA_ARGS__)

#define	vmsne_vx_i8mf2_b16_m(...) __riscv_vmsne_vx_i8mf2_b16_mu(__VA_ARGS__)

#define	vmsne_vx_i8mf4_b32(...) __riscv_vmsne_vx_i8mf4_b32(__VA_ARGS__)

#define	vmsne_vx_i8mf4_b32_m(...) __riscv_vmsne_vx_i8mf4_b32_mu(__VA_ARGS__)

#define	vmsne_vx_i8mf8_b64(...) __riscv_vmsne_vx_i8mf8_b64(__VA_ARGS__)

#define	vmsne_vx_i8mf8_b64_m(...) __riscv_vmsne_vx_i8mf8_b64_mu(__VA_ARGS__)

#define	vmsne_vx_u16m1_b16(...) __riscv_vmsne_vx_u16m1_b16(__VA_ARGS__)

#define	vmsne_vx_u16m1_b16_m(...) __riscv_vmsne_vx_u16m1_b16_mu(__VA_ARGS__)

#define	vmsne_vx_u16m2_b8(...) __riscv_vmsne_vx_u16m2_b8(__VA_ARGS__)

#define	vmsne_vx_u16m2_b8_m(...) __riscv_vmsne_vx_u16m2_b8_mu(__VA_ARGS__)

#define	vmsne_vx_u16m4_b4(...) __riscv_vmsne_vx_u16m4_b4(__VA_ARGS__)

#define	vmsne_vx_u16m4_b4_m(...) __riscv_vmsne_vx_u16m4_b4_mu(__VA_ARGS__)

#define	vmsne_vx_u16m8_b2(...) __riscv_vmsne_vx_u16m8_b2(__VA_ARGS__)

#define	vmsne_vx_u16m8_b2_m(...) __riscv_vmsne_vx_u16m8_b2_mu(__VA_ARGS__)

#define	vmsne_vx_u16mf2_b32(...) __riscv_vmsne_vx_u16mf2_b32(__VA_ARGS__)

#define	vmsne_vx_u16mf2_b32_m(...) __riscv_vmsne_vx_u16mf2_b32_mu(__VA_ARGS__)

#define	vmsne_vx_u16mf4_b64(...) __riscv_vmsne_vx_u16mf4_b64(__VA_ARGS__)

#define	vmsne_vx_u16mf4_b64_m(...) __riscv_vmsne_vx_u16mf4_b64_mu(__VA_ARGS__)

#define	vmsne_vx_u32m1_b32(...) __riscv_vmsne_vx_u32m1_b32(__VA_ARGS__)

#define	vmsne_vx_u32m1_b32_m(...) __riscv_vmsne_vx_u32m1_b32_mu(__VA_ARGS__)

#define	vmsne_vx_u32m2_b16(...) __riscv_vmsne_vx_u32m2_b16(__VA_ARGS__)

#define	vmsne_vx_u32m2_b16_m(...) __riscv_vmsne_vx_u32m2_b16_mu(__VA_ARGS__)

#define	vmsne_vx_u32m4_b8(...) __riscv_vmsne_vx_u32m4_b8(__VA_ARGS__)

#define	vmsne_vx_u32m4_b8_m(...) __riscv_vmsne_vx_u32m4_b8_mu(__VA_ARGS__)

#define	vmsne_vx_u32m8_b4(...) __riscv_vmsne_vx_u32m8_b4(__VA_ARGS__)

#define	vmsne_vx_u32m8_b4_m(...) __riscv_vmsne_vx_u32m8_b4_mu(__VA_ARGS__)

#define	vmsne_vx_u32mf2_b64(...) __riscv_vmsne_vx_u32mf2_b64(__VA_ARGS__)

#define	vmsne_vx_u32mf2_b64_m(...) __riscv_vmsne_vx_u32mf2_b64_mu(__VA_ARGS__)

#define	vmsne_vx_u64m1_b64(...) __riscv_vmsne_vx_u64m1_b64(__VA_ARGS__)

#define	vmsne_vx_u64m1_b64_m(...) __riscv_vmsne_vx_u64m1_b64_mu(__VA_ARGS__)

#define	vmsne_vx_u64m2_b32(...) __riscv_vmsne_vx_u64m2_b32(__VA_ARGS__)

#define	vmsne_vx_u64m2_b32_m(...) __riscv_vmsne_vx_u64m2_b32_mu(__VA_ARGS__)

#define	vmsne_vx_u64m4_b16(...) __riscv_vmsne_vx_u64m4_b16(__VA_ARGS__)

#define	vmsne_vx_u64m4_b16_m(...) __riscv_vmsne_vx_u64m4_b16_mu(__VA_ARGS__)

#define	vmsne_vx_u64m8_b8(...) __riscv_vmsne_vx_u64m8_b8(__VA_ARGS__)

#define	vmsne_vx_u64m8_b8_m(...) __riscv_vmsne_vx_u64m8_b8_mu(__VA_ARGS__)

#define	vmsne_vx_u8m1_b8(...) __riscv_vmsne_vx_u8m1_b8(__VA_ARGS__)

#define	vmsne_vx_u8m1_b8_m(...) __riscv_vmsne_vx_u8m1_b8_mu(__VA_ARGS__)

#define	vmsne_vx_u8m2_b4(...) __riscv_vmsne_vx_u8m2_b4(__VA_ARGS__)

#define	vmsne_vx_u8m2_b4_m(...) __riscv_vmsne_vx_u8m2_b4_mu(__VA_ARGS__)

#define	vmsne_vx_u8m4_b2(...) __riscv_vmsne_vx_u8m4_b2(__VA_ARGS__)

#define	vmsne_vx_u8m4_b2_m(...) __riscv_vmsne_vx_u8m4_b2_mu(__VA_ARGS__)

#define	vmsne_vx_u8m8_b1(...) __riscv_vmsne_vx_u8m8_b1(__VA_ARGS__)

#define	vmsne_vx_u8m8_b1_m(...) __riscv_vmsne_vx_u8m8_b1_mu(__VA_ARGS__)

#define	vmsne_vx_u8mf2_b16(...) __riscv_vmsne_vx_u8mf2_b16(__VA_ARGS__)

#define	vmsne_vx_u8mf2_b16_m(...) __riscv_vmsne_vx_u8mf2_b16_mu(__VA_ARGS__)

#define	vmsne_vx_u8mf4_b32(...) __riscv_vmsne_vx_u8mf4_b32(__VA_ARGS__)

#define	vmsne_vx_u8mf4_b32_m(...) __riscv_vmsne_vx_u8mf4_b32_mu(__VA_ARGS__)

#define	vmsne_vx_u8mf8_b64(...) __riscv_vmsne_vx_u8mf8_b64(__VA_ARGS__)

#define	vmsne_vx_u8mf8_b64_m(...) __riscv_vmsne_vx_u8mf8_b64_mu(__VA_ARGS__)

#define	vmsof_m_b1(...) __riscv_vmsof_m_b1(__VA_ARGS__)

#define	vmsof_m_b16(...) __riscv_vmsof_m_b16(__VA_ARGS__)

#define	vmsof_m_b16_m(...) __riscv_vmsof_m_b16_mu(__VA_ARGS__)

#define	vmsof_m_b1_m(...) __riscv_vmsof_m_b1_mu(__VA_ARGS__)

#define	vmsof_m_b2(...) __riscv_vmsof_m_b2(__VA_ARGS__)

#define	vmsof_m_b2_m(...) __riscv_vmsof_m_b2_mu(__VA_ARGS__)

#define	vmsof_m_b32(...) __riscv_vmsof_m_b32(__VA_ARGS__)

#define	vmsof_m_b32_m(...) __riscv_vmsof_m_b32_mu(__VA_ARGS__)

#define	vmsof_m_b4(...) __riscv_vmsof_m_b4(__VA_ARGS__)

#define	vmsof_m_b4_m(...) __riscv_vmsof_m_b4_mu(__VA_ARGS__)

#define	vmsof_m_b64(...) __riscv_vmsof_m_b64(__VA_ARGS__)

#define	vmsof_m_b64_m(...) __riscv_vmsof_m_b64_mu(__VA_ARGS__)

#define	vmsof_m_b8(...) __riscv_vmsof_m_b8(__VA_ARGS__)

#define	vmsof_m_b8_m(...) __riscv_vmsof_m_b8_mu(__VA_ARGS__)

#define	vmul_vv_i16m1(...) __riscv_vmul_vv_i16m1(__VA_ARGS__)

#define	vmul_vv_i16m1_m(...) __riscv_vmul_vv_i16m1_tumu(__VA_ARGS__)

#define	vmul_vv_i16m2(...) __riscv_vmul_vv_i16m2(__VA_ARGS__)

#define	vmul_vv_i16m2_m(...) __riscv_vmul_vv_i16m2_tumu(__VA_ARGS__)

#define	vmul_vv_i16m4(...) __riscv_vmul_vv_i16m4(__VA_ARGS__)

#define	vmul_vv_i16m4_m(...) __riscv_vmul_vv_i16m4_tumu(__VA_ARGS__)

#define	vmul_vv_i16m8(...) __riscv_vmul_vv_i16m8(__VA_ARGS__)

#define	vmul_vv_i16m8_m(...) __riscv_vmul_vv_i16m8_tumu(__VA_ARGS__)

#define	vmul_vv_i16mf2(...) __riscv_vmul_vv_i16mf2(__VA_ARGS__)

#define	vmul_vv_i16mf2_m(...) __riscv_vmul_vv_i16mf2_tumu(__VA_ARGS__)

#define	vmul_vv_i16mf4(...) __riscv_vmul_vv_i16mf4(__VA_ARGS__)

#define	vmul_vv_i16mf4_m(...) __riscv_vmul_vv_i16mf4_tumu(__VA_ARGS__)

#define	vmul_vv_i32m1(...) __riscv_vmul_vv_i32m1(__VA_ARGS__)

#define	vmul_vv_i32m1_m(...) __riscv_vmul_vv_i32m1_tumu(__VA_ARGS__)

#define	vmul_vv_i32m2(...) __riscv_vmul_vv_i32m2(__VA_ARGS__)

#define	vmul_vv_i32m2_m(...) __riscv_vmul_vv_i32m2_tumu(__VA_ARGS__)

#define	vmul_vv_i32m4(...) __riscv_vmul_vv_i32m4(__VA_ARGS__)

#define	vmul_vv_i32m4_m(...) __riscv_vmul_vv_i32m4_tumu(__VA_ARGS__)

#define	vmul_vv_i32m8(...) __riscv_vmul_vv_i32m8(__VA_ARGS__)

#define	vmul_vv_i32m8_m(...) __riscv_vmul_vv_i32m8_tumu(__VA_ARGS__)

#define	vmul_vv_i32mf2(...) __riscv_vmul_vv_i32mf2(__VA_ARGS__)

#define	vmul_vv_i32mf2_m(...) __riscv_vmul_vv_i32mf2_tumu(__VA_ARGS__)

#define	vmul_vv_i64m1(...) __riscv_vmul_vv_i64m1(__VA_ARGS__)

#define	vmul_vv_i64m1_m(...) __riscv_vmul_vv_i64m1_tumu(__VA_ARGS__)

#define	vmul_vv_i64m2(...) __riscv_vmul_vv_i64m2(__VA_ARGS__)

#define	vmul_vv_i64m2_m(...) __riscv_vmul_vv_i64m2_tumu(__VA_ARGS__)

#define	vmul_vv_i64m4(...) __riscv_vmul_vv_i64m4(__VA_ARGS__)

#define	vmul_vv_i64m4_m(...) __riscv_vmul_vv_i64m4_tumu(__VA_ARGS__)

#define	vmul_vv_i64m8(...) __riscv_vmul_vv_i64m8(__VA_ARGS__)

#define	vmul_vv_i64m8_m(...) __riscv_vmul_vv_i64m8_tumu(__VA_ARGS__)

#define	vmul_vv_i8m1(...) __riscv_vmul_vv_i8m1(__VA_ARGS__)

#define	vmul_vv_i8m1_m(...) __riscv_vmul_vv_i8m1_tumu(__VA_ARGS__)

#define	vmul_vv_i8m2(...) __riscv_vmul_vv_i8m2(__VA_ARGS__)

#define	vmul_vv_i8m2_m(...) __riscv_vmul_vv_i8m2_tumu(__VA_ARGS__)

#define	vmul_vv_i8m4(...) __riscv_vmul_vv_i8m4(__VA_ARGS__)

#define	vmul_vv_i8m4_m(...) __riscv_vmul_vv_i8m4_tumu(__VA_ARGS__)

#define	vmul_vv_i8m8(...) __riscv_vmul_vv_i8m8(__VA_ARGS__)

#define	vmul_vv_i8m8_m(...) __riscv_vmul_vv_i8m8_tumu(__VA_ARGS__)

#define	vmul_vv_i8mf2(...) __riscv_vmul_vv_i8mf2(__VA_ARGS__)

#define	vmul_vv_i8mf2_m(...) __riscv_vmul_vv_i8mf2_tumu(__VA_ARGS__)

#define	vmul_vv_i8mf4(...) __riscv_vmul_vv_i8mf4(__VA_ARGS__)

#define	vmul_vv_i8mf4_m(...) __riscv_vmul_vv_i8mf4_tumu(__VA_ARGS__)

#define	vmul_vv_i8mf8(...) __riscv_vmul_vv_i8mf8(__VA_ARGS__)

#define	vmul_vv_i8mf8_m(...) __riscv_vmul_vv_i8mf8_tumu(__VA_ARGS__)

#define	vmul_vv_u16m1(...) __riscv_vmul_vv_u16m1(__VA_ARGS__)

#define	vmul_vv_u16m1_m(...) __riscv_vmul_vv_u16m1_tumu(__VA_ARGS__)

#define	vmul_vv_u16m2(...) __riscv_vmul_vv_u16m2(__VA_ARGS__)

#define	vmul_vv_u16m2_m(...) __riscv_vmul_vv_u16m2_tumu(__VA_ARGS__)

#define	vmul_vv_u16m4(...) __riscv_vmul_vv_u16m4(__VA_ARGS__)

#define	vmul_vv_u16m4_m(...) __riscv_vmul_vv_u16m4_tumu(__VA_ARGS__)

#define	vmul_vv_u16m8(...) __riscv_vmul_vv_u16m8(__VA_ARGS__)

#define	vmul_vv_u16m8_m(...) __riscv_vmul_vv_u16m8_tumu(__VA_ARGS__)

#define	vmul_vv_u16mf2(...) __riscv_vmul_vv_u16mf2(__VA_ARGS__)

#define	vmul_vv_u16mf2_m(...) __riscv_vmul_vv_u16mf2_tumu(__VA_ARGS__)

#define	vmul_vv_u16mf4(...) __riscv_vmul_vv_u16mf4(__VA_ARGS__)

#define	vmul_vv_u16mf4_m(...) __riscv_vmul_vv_u16mf4_tumu(__VA_ARGS__)

#define	vmul_vv_u32m1(...) __riscv_vmul_vv_u32m1(__VA_ARGS__)

#define	vmul_vv_u32m1_m(...) __riscv_vmul_vv_u32m1_tumu(__VA_ARGS__)

#define	vmul_vv_u32m2(...) __riscv_vmul_vv_u32m2(__VA_ARGS__)

#define	vmul_vv_u32m2_m(...) __riscv_vmul_vv_u32m2_tumu(__VA_ARGS__)

#define	vmul_vv_u32m4(...) __riscv_vmul_vv_u32m4(__VA_ARGS__)

#define	vmul_vv_u32m4_m(...) __riscv_vmul_vv_u32m4_tumu(__VA_ARGS__)

#define	vmul_vv_u32m8(...) __riscv_vmul_vv_u32m8(__VA_ARGS__)

#define	vmul_vv_u32m8_m(...) __riscv_vmul_vv_u32m8_tumu(__VA_ARGS__)

#define	vmul_vv_u32mf2(...) __riscv_vmul_vv_u32mf2(__VA_ARGS__)

#define	vmul_vv_u32mf2_m(...) __riscv_vmul_vv_u32mf2_tumu(__VA_ARGS__)

#define	vmul_vv_u64m1(...) __riscv_vmul_vv_u64m1(__VA_ARGS__)

#define	vmul_vv_u64m1_m(...) __riscv_vmul_vv_u64m1_tumu(__VA_ARGS__)

#define	vmul_vv_u64m2(...) __riscv_vmul_vv_u64m2(__VA_ARGS__)

#define	vmul_vv_u64m2_m(...) __riscv_vmul_vv_u64m2_tumu(__VA_ARGS__)

#define	vmul_vv_u64m4(...) __riscv_vmul_vv_u64m4(__VA_ARGS__)

#define	vmul_vv_u64m4_m(...) __riscv_vmul_vv_u64m4_tumu(__VA_ARGS__)

#define	vmul_vv_u64m8(...) __riscv_vmul_vv_u64m8(__VA_ARGS__)

#define	vmul_vv_u64m8_m(...) __riscv_vmul_vv_u64m8_tumu(__VA_ARGS__)

#define	vmul_vv_u8m1(...) __riscv_vmul_vv_u8m1(__VA_ARGS__)

#define	vmul_vv_u8m1_m(...) __riscv_vmul_vv_u8m1_tumu(__VA_ARGS__)

#define	vmul_vv_u8m2(...) __riscv_vmul_vv_u8m2(__VA_ARGS__)

#define	vmul_vv_u8m2_m(...) __riscv_vmul_vv_u8m2_tumu(__VA_ARGS__)

#define	vmul_vv_u8m4(...) __riscv_vmul_vv_u8m4(__VA_ARGS__)

#define	vmul_vv_u8m4_m(...) __riscv_vmul_vv_u8m4_tumu(__VA_ARGS__)

#define	vmul_vv_u8m8(...) __riscv_vmul_vv_u8m8(__VA_ARGS__)

#define	vmul_vv_u8m8_m(...) __riscv_vmul_vv_u8m8_tumu(__VA_ARGS__)

#define	vmul_vv_u8mf2(...) __riscv_vmul_vv_u8mf2(__VA_ARGS__)

#define	vmul_vv_u8mf2_m(...) __riscv_vmul_vv_u8mf2_tumu(__VA_ARGS__)

#define	vmul_vv_u8mf4(...) __riscv_vmul_vv_u8mf4(__VA_ARGS__)

#define	vmul_vv_u8mf4_m(...) __riscv_vmul_vv_u8mf4_tumu(__VA_ARGS__)

#define	vmul_vv_u8mf8(...) __riscv_vmul_vv_u8mf8(__VA_ARGS__)

#define	vmul_vv_u8mf8_m(...) __riscv_vmul_vv_u8mf8_tumu(__VA_ARGS__)

#define	vmul_vx_i16m1(...) __riscv_vmul_vx_i16m1(__VA_ARGS__)

#define	vmul_vx_i16m1_m(...) __riscv_vmul_vx_i16m1_tumu(__VA_ARGS__)

#define	vmul_vx_i16m2(...) __riscv_vmul_vx_i16m2(__VA_ARGS__)

#define	vmul_vx_i16m2_m(...) __riscv_vmul_vx_i16m2_tumu(__VA_ARGS__)

#define	vmul_vx_i16m4(...) __riscv_vmul_vx_i16m4(__VA_ARGS__)

#define	vmul_vx_i16m4_m(...) __riscv_vmul_vx_i16m4_tumu(__VA_ARGS__)

#define	vmul_vx_i16m8(...) __riscv_vmul_vx_i16m8(__VA_ARGS__)

#define	vmul_vx_i16m8_m(...) __riscv_vmul_vx_i16m8_tumu(__VA_ARGS__)

#define	vmul_vx_i16mf2(...) __riscv_vmul_vx_i16mf2(__VA_ARGS__)

#define	vmul_vx_i16mf2_m(...) __riscv_vmul_vx_i16mf2_tumu(__VA_ARGS__)

#define	vmul_vx_i16mf4(...) __riscv_vmul_vx_i16mf4(__VA_ARGS__)

#define	vmul_vx_i16mf4_m(...) __riscv_vmul_vx_i16mf4_tumu(__VA_ARGS__)

#define	vmul_vx_i32m1(...) __riscv_vmul_vx_i32m1(__VA_ARGS__)

#define	vmul_vx_i32m1_m(...) __riscv_vmul_vx_i32m1_tumu(__VA_ARGS__)

#define	vmul_vx_i32m2(...) __riscv_vmul_vx_i32m2(__VA_ARGS__)

#define	vmul_vx_i32m2_m(...) __riscv_vmul_vx_i32m2_tumu(__VA_ARGS__)

#define	vmul_vx_i32m4(...) __riscv_vmul_vx_i32m4(__VA_ARGS__)

#define	vmul_vx_i32m4_m(...) __riscv_vmul_vx_i32m4_tumu(__VA_ARGS__)

#define	vmul_vx_i32m8(...) __riscv_vmul_vx_i32m8(__VA_ARGS__)

#define	vmul_vx_i32m8_m(...) __riscv_vmul_vx_i32m8_tumu(__VA_ARGS__)

#define	vmul_vx_i32mf2(...) __riscv_vmul_vx_i32mf2(__VA_ARGS__)

#define	vmul_vx_i32mf2_m(...) __riscv_vmul_vx_i32mf2_tumu(__VA_ARGS__)

#define	vmul_vx_i64m1(...) __riscv_vmul_vx_i64m1(__VA_ARGS__)

#define	vmul_vx_i64m1_m(...) __riscv_vmul_vx_i64m1_tumu(__VA_ARGS__)

#define	vmul_vx_i64m2(...) __riscv_vmul_vx_i64m2(__VA_ARGS__)

#define	vmul_vx_i64m2_m(...) __riscv_vmul_vx_i64m2_tumu(__VA_ARGS__)

#define	vmul_vx_i64m4(...) __riscv_vmul_vx_i64m4(__VA_ARGS__)

#define	vmul_vx_i64m4_m(...) __riscv_vmul_vx_i64m4_tumu(__VA_ARGS__)

#define	vmul_vx_i64m8(...) __riscv_vmul_vx_i64m8(__VA_ARGS__)

#define	vmul_vx_i64m8_m(...) __riscv_vmul_vx_i64m8_tumu(__VA_ARGS__)

#define	vmul_vx_i8m1(...) __riscv_vmul_vx_i8m1(__VA_ARGS__)

#define	vmul_vx_i8m1_m(...) __riscv_vmul_vx_i8m1_tumu(__VA_ARGS__)

#define	vmul_vx_i8m2(...) __riscv_vmul_vx_i8m2(__VA_ARGS__)

#define	vmul_vx_i8m2_m(...) __riscv_vmul_vx_i8m2_tumu(__VA_ARGS__)

#define	vmul_vx_i8m4(...) __riscv_vmul_vx_i8m4(__VA_ARGS__)

#define	vmul_vx_i8m4_m(...) __riscv_vmul_vx_i8m4_tumu(__VA_ARGS__)

#define	vmul_vx_i8m8(...) __riscv_vmul_vx_i8m8(__VA_ARGS__)

#define	vmul_vx_i8m8_m(...) __riscv_vmul_vx_i8m8_tumu(__VA_ARGS__)

#define	vmul_vx_i8mf2(...) __riscv_vmul_vx_i8mf2(__VA_ARGS__)

#define	vmul_vx_i8mf2_m(...) __riscv_vmul_vx_i8mf2_tumu(__VA_ARGS__)

#define	vmul_vx_i8mf4(...) __riscv_vmul_vx_i8mf4(__VA_ARGS__)

#define	vmul_vx_i8mf4_m(...) __riscv_vmul_vx_i8mf4_tumu(__VA_ARGS__)

#define	vmul_vx_i8mf8(...) __riscv_vmul_vx_i8mf8(__VA_ARGS__)

#define	vmul_vx_i8mf8_m(...) __riscv_vmul_vx_i8mf8_tumu(__VA_ARGS__)

#define	vmul_vx_u16m1(...) __riscv_vmul_vx_u16m1(__VA_ARGS__)

#define	vmul_vx_u16m1_m(...) __riscv_vmul_vx_u16m1_tumu(__VA_ARGS__)

#define	vmul_vx_u16m2(...) __riscv_vmul_vx_u16m2(__VA_ARGS__)

#define	vmul_vx_u16m2_m(...) __riscv_vmul_vx_u16m2_tumu(__VA_ARGS__)

#define	vmul_vx_u16m4(...) __riscv_vmul_vx_u16m4(__VA_ARGS__)

#define	vmul_vx_u16m4_m(...) __riscv_vmul_vx_u16m4_tumu(__VA_ARGS__)

#define	vmul_vx_u16m8(...) __riscv_vmul_vx_u16m8(__VA_ARGS__)

#define	vmul_vx_u16m8_m(...) __riscv_vmul_vx_u16m8_tumu(__VA_ARGS__)

#define	vmul_vx_u16mf2(...) __riscv_vmul_vx_u16mf2(__VA_ARGS__)

#define	vmul_vx_u16mf2_m(...) __riscv_vmul_vx_u16mf2_tumu(__VA_ARGS__)

#define	vmul_vx_u16mf4(...) __riscv_vmul_vx_u16mf4(__VA_ARGS__)

#define	vmul_vx_u16mf4_m(...) __riscv_vmul_vx_u16mf4_tumu(__VA_ARGS__)

#define	vmul_vx_u32m1(...) __riscv_vmul_vx_u32m1(__VA_ARGS__)

#define	vmul_vx_u32m1_m(...) __riscv_vmul_vx_u32m1_tumu(__VA_ARGS__)

#define	vmul_vx_u32m2(...) __riscv_vmul_vx_u32m2(__VA_ARGS__)

#define	vmul_vx_u32m2_m(...) __riscv_vmul_vx_u32m2_tumu(__VA_ARGS__)

#define	vmul_vx_u32m4(...) __riscv_vmul_vx_u32m4(__VA_ARGS__)

#define	vmul_vx_u32m4_m(...) __riscv_vmul_vx_u32m4_tumu(__VA_ARGS__)

#define	vmul_vx_u32m8(...) __riscv_vmul_vx_u32m8(__VA_ARGS__)

#define	vmul_vx_u32m8_m(...) __riscv_vmul_vx_u32m8_tumu(__VA_ARGS__)

#define	vmul_vx_u32mf2(...) __riscv_vmul_vx_u32mf2(__VA_ARGS__)

#define	vmul_vx_u32mf2_m(...) __riscv_vmul_vx_u32mf2_tumu(__VA_ARGS__)

#define	vmul_vx_u64m1(...) __riscv_vmul_vx_u64m1(__VA_ARGS__)

#define	vmul_vx_u64m1_m(...) __riscv_vmul_vx_u64m1_tumu(__VA_ARGS__)

#define	vmul_vx_u64m2(...) __riscv_vmul_vx_u64m2(__VA_ARGS__)

#define	vmul_vx_u64m2_m(...) __riscv_vmul_vx_u64m2_tumu(__VA_ARGS__)

#define	vmul_vx_u64m4(...) __riscv_vmul_vx_u64m4(__VA_ARGS__)

#define	vmul_vx_u64m4_m(...) __riscv_vmul_vx_u64m4_tumu(__VA_ARGS__)

#define	vmul_vx_u64m8(...) __riscv_vmul_vx_u64m8(__VA_ARGS__)

#define	vmul_vx_u64m8_m(...) __riscv_vmul_vx_u64m8_tumu(__VA_ARGS__)

#define	vmul_vx_u8m1(...) __riscv_vmul_vx_u8m1(__VA_ARGS__)

#define	vmul_vx_u8m1_m(...) __riscv_vmul_vx_u8m1_tumu(__VA_ARGS__)

#define	vmul_vx_u8m2(...) __riscv_vmul_vx_u8m2(__VA_ARGS__)

#define	vmul_vx_u8m2_m(...) __riscv_vmul_vx_u8m2_tumu(__VA_ARGS__)

#define	vmul_vx_u8m4(...) __riscv_vmul_vx_u8m4(__VA_ARGS__)

#define	vmul_vx_u8m4_m(...) __riscv_vmul_vx_u8m4_tumu(__VA_ARGS__)

#define	vmul_vx_u8m8(...) __riscv_vmul_vx_u8m8(__VA_ARGS__)

#define	vmul_vx_u8m8_m(...) __riscv_vmul_vx_u8m8_tumu(__VA_ARGS__)

#define	vmul_vx_u8mf2(...) __riscv_vmul_vx_u8mf2(__VA_ARGS__)

#define	vmul_vx_u8mf2_m(...) __riscv_vmul_vx_u8mf2_tumu(__VA_ARGS__)

#define	vmul_vx_u8mf4(...) __riscv_vmul_vx_u8mf4(__VA_ARGS__)

#define	vmul_vx_u8mf4_m(...) __riscv_vmul_vx_u8mf4_tumu(__VA_ARGS__)

#define	vmul_vx_u8mf8(...) __riscv_vmul_vx_u8mf8(__VA_ARGS__)

#define	vmul_vx_u8mf8_m(...) __riscv_vmul_vx_u8mf8_tumu(__VA_ARGS__)

#define	vmulh_vv_i16m1(...) __riscv_vmulh_vv_i16m1(__VA_ARGS__)

#define	vmulh_vv_i16m1_m(...) __riscv_vmulh_vv_i16m1_tumu(__VA_ARGS__)

#define	vmulh_vv_i16m2(...) __riscv_vmulh_vv_i16m2(__VA_ARGS__)

#define	vmulh_vv_i16m2_m(...) __riscv_vmulh_vv_i16m2_tumu(__VA_ARGS__)

#define	vmulh_vv_i16m4(...) __riscv_vmulh_vv_i16m4(__VA_ARGS__)

#define	vmulh_vv_i16m4_m(...) __riscv_vmulh_vv_i16m4_tumu(__VA_ARGS__)

#define	vmulh_vv_i16m8(...) __riscv_vmulh_vv_i16m8(__VA_ARGS__)

#define	vmulh_vv_i16m8_m(...) __riscv_vmulh_vv_i16m8_tumu(__VA_ARGS__)

#define	vmulh_vv_i16mf2(...) __riscv_vmulh_vv_i16mf2(__VA_ARGS__)

#define	vmulh_vv_i16mf2_m(...) __riscv_vmulh_vv_i16mf2_tumu(__VA_ARGS__)

#define	vmulh_vv_i16mf4(...) __riscv_vmulh_vv_i16mf4(__VA_ARGS__)

#define	vmulh_vv_i16mf4_m(...) __riscv_vmulh_vv_i16mf4_tumu(__VA_ARGS__)

#define	vmulh_vv_i32m1(...) __riscv_vmulh_vv_i32m1(__VA_ARGS__)

#define	vmulh_vv_i32m1_m(...) __riscv_vmulh_vv_i32m1_tumu(__VA_ARGS__)

#define	vmulh_vv_i32m2(...) __riscv_vmulh_vv_i32m2(__VA_ARGS__)

#define	vmulh_vv_i32m2_m(...) __riscv_vmulh_vv_i32m2_tumu(__VA_ARGS__)

#define	vmulh_vv_i32m4(...) __riscv_vmulh_vv_i32m4(__VA_ARGS__)

#define	vmulh_vv_i32m4_m(...) __riscv_vmulh_vv_i32m4_tumu(__VA_ARGS__)

#define	vmulh_vv_i32m8(...) __riscv_vmulh_vv_i32m8(__VA_ARGS__)

#define	vmulh_vv_i32m8_m(...) __riscv_vmulh_vv_i32m8_tumu(__VA_ARGS__)

#define	vmulh_vv_i32mf2(...) __riscv_vmulh_vv_i32mf2(__VA_ARGS__)

#define	vmulh_vv_i32mf2_m(...) __riscv_vmulh_vv_i32mf2_tumu(__VA_ARGS__)

#define	vmulh_vv_i64m1(...) __riscv_vmulh_vv_i64m1(__VA_ARGS__)

#define	vmulh_vv_i64m1_m(...) __riscv_vmulh_vv_i64m1_tumu(__VA_ARGS__)

#define	vmulh_vv_i64m2(...) __riscv_vmulh_vv_i64m2(__VA_ARGS__)

#define	vmulh_vv_i64m2_m(...) __riscv_vmulh_vv_i64m2_tumu(__VA_ARGS__)

#define	vmulh_vv_i64m4(...) __riscv_vmulh_vv_i64m4(__VA_ARGS__)

#define	vmulh_vv_i64m4_m(...) __riscv_vmulh_vv_i64m4_tumu(__VA_ARGS__)

#define	vmulh_vv_i64m8(...) __riscv_vmulh_vv_i64m8(__VA_ARGS__)

#define	vmulh_vv_i64m8_m(...) __riscv_vmulh_vv_i64m8_tumu(__VA_ARGS__)

#define	vmulh_vv_i8m1(...) __riscv_vmulh_vv_i8m1(__VA_ARGS__)

#define	vmulh_vv_i8m1_m(...) __riscv_vmulh_vv_i8m1_tumu(__VA_ARGS__)

#define	vmulh_vv_i8m2(...) __riscv_vmulh_vv_i8m2(__VA_ARGS__)

#define	vmulh_vv_i8m2_m(...) __riscv_vmulh_vv_i8m2_tumu(__VA_ARGS__)

#define	vmulh_vv_i8m4(...) __riscv_vmulh_vv_i8m4(__VA_ARGS__)

#define	vmulh_vv_i8m4_m(...) __riscv_vmulh_vv_i8m4_tumu(__VA_ARGS__)

#define	vmulh_vv_i8m8(...) __riscv_vmulh_vv_i8m8(__VA_ARGS__)

#define	vmulh_vv_i8m8_m(...) __riscv_vmulh_vv_i8m8_tumu(__VA_ARGS__)

#define	vmulh_vv_i8mf2(...) __riscv_vmulh_vv_i8mf2(__VA_ARGS__)

#define	vmulh_vv_i8mf2_m(...) __riscv_vmulh_vv_i8mf2_tumu(__VA_ARGS__)

#define	vmulh_vv_i8mf4(...) __riscv_vmulh_vv_i8mf4(__VA_ARGS__)

#define	vmulh_vv_i8mf4_m(...) __riscv_vmulh_vv_i8mf4_tumu(__VA_ARGS__)

#define	vmulh_vv_i8mf8(...) __riscv_vmulh_vv_i8mf8(__VA_ARGS__)

#define	vmulh_vv_i8mf8_m(...) __riscv_vmulh_vv_i8mf8_tumu(__VA_ARGS__)

#define	vmulh_vx_i16m1(...) __riscv_vmulh_vx_i16m1(__VA_ARGS__)

#define	vmulh_vx_i16m1_m(...) __riscv_vmulh_vx_i16m1_tumu(__VA_ARGS__)

#define	vmulh_vx_i16m2(...) __riscv_vmulh_vx_i16m2(__VA_ARGS__)

#define	vmulh_vx_i16m2_m(...) __riscv_vmulh_vx_i16m2_tumu(__VA_ARGS__)

#define	vmulh_vx_i16m4(...) __riscv_vmulh_vx_i16m4(__VA_ARGS__)

#define	vmulh_vx_i16m4_m(...) __riscv_vmulh_vx_i16m4_tumu(__VA_ARGS__)

#define	vmulh_vx_i16m8(...) __riscv_vmulh_vx_i16m8(__VA_ARGS__)

#define	vmulh_vx_i16m8_m(...) __riscv_vmulh_vx_i16m8_tumu(__VA_ARGS__)

#define	vmulh_vx_i16mf2(...) __riscv_vmulh_vx_i16mf2(__VA_ARGS__)

#define	vmulh_vx_i16mf2_m(...) __riscv_vmulh_vx_i16mf2_tumu(__VA_ARGS__)

#define	vmulh_vx_i16mf4(...) __riscv_vmulh_vx_i16mf4(__VA_ARGS__)

#define	vmulh_vx_i16mf4_m(...) __riscv_vmulh_vx_i16mf4_tumu(__VA_ARGS__)

#define	vmulh_vx_i32m1(...) __riscv_vmulh_vx_i32m1(__VA_ARGS__)

#define	vmulh_vx_i32m1_m(...) __riscv_vmulh_vx_i32m1_tumu(__VA_ARGS__)

#define	vmulh_vx_i32m2(...) __riscv_vmulh_vx_i32m2(__VA_ARGS__)

#define	vmulh_vx_i32m2_m(...) __riscv_vmulh_vx_i32m2_tumu(__VA_ARGS__)

#define	vmulh_vx_i32m4(...) __riscv_vmulh_vx_i32m4(__VA_ARGS__)

#define	vmulh_vx_i32m4_m(...) __riscv_vmulh_vx_i32m4_tumu(__VA_ARGS__)

#define	vmulh_vx_i32m8(...) __riscv_vmulh_vx_i32m8(__VA_ARGS__)

#define	vmulh_vx_i32m8_m(...) __riscv_vmulh_vx_i32m8_tumu(__VA_ARGS__)

#define	vmulh_vx_i32mf2(...) __riscv_vmulh_vx_i32mf2(__VA_ARGS__)

#define	vmulh_vx_i32mf2_m(...) __riscv_vmulh_vx_i32mf2_tumu(__VA_ARGS__)

#define	vmulh_vx_i64m1(...) __riscv_vmulh_vx_i64m1(__VA_ARGS__)

#define	vmulh_vx_i64m1_m(...) __riscv_vmulh_vx_i64m1_tumu(__VA_ARGS__)

#define	vmulh_vx_i64m2(...) __riscv_vmulh_vx_i64m2(__VA_ARGS__)

#define	vmulh_vx_i64m2_m(...) __riscv_vmulh_vx_i64m2_tumu(__VA_ARGS__)

#define	vmulh_vx_i64m4(...) __riscv_vmulh_vx_i64m4(__VA_ARGS__)

#define	vmulh_vx_i64m4_m(...) __riscv_vmulh_vx_i64m4_tumu(__VA_ARGS__)

#define	vmulh_vx_i64m8(...) __riscv_vmulh_vx_i64m8(__VA_ARGS__)

#define	vmulh_vx_i64m8_m(...) __riscv_vmulh_vx_i64m8_tumu(__VA_ARGS__)

#define	vmulh_vx_i8m1(...) __riscv_vmulh_vx_i8m1(__VA_ARGS__)

#define	vmulh_vx_i8m1_m(...) __riscv_vmulh_vx_i8m1_tumu(__VA_ARGS__)

#define	vmulh_vx_i8m2(...) __riscv_vmulh_vx_i8m2(__VA_ARGS__)

#define	vmulh_vx_i8m2_m(...) __riscv_vmulh_vx_i8m2_tumu(__VA_ARGS__)

#define	vmulh_vx_i8m4(...) __riscv_vmulh_vx_i8m4(__VA_ARGS__)

#define	vmulh_vx_i8m4_m(...) __riscv_vmulh_vx_i8m4_tumu(__VA_ARGS__)

#define	vmulh_vx_i8m8(...) __riscv_vmulh_vx_i8m8(__VA_ARGS__)

#define	vmulh_vx_i8m8_m(...) __riscv_vmulh_vx_i8m8_tumu(__VA_ARGS__)

#define	vmulh_vx_i8mf2(...) __riscv_vmulh_vx_i8mf2(__VA_ARGS__)

#define	vmulh_vx_i8mf2_m(...) __riscv_vmulh_vx_i8mf2_tumu(__VA_ARGS__)

#define	vmulh_vx_i8mf4(...) __riscv_vmulh_vx_i8mf4(__VA_ARGS__)

#define	vmulh_vx_i8mf4_m(...) __riscv_vmulh_vx_i8mf4_tumu(__VA_ARGS__)

#define	vmulh_vx_i8mf8(...) __riscv_vmulh_vx_i8mf8(__VA_ARGS__)

#define	vmulh_vx_i8mf8_m(...) __riscv_vmulh_vx_i8mf8_tumu(__VA_ARGS__)

#define	vmulhsu_vv_i16m1(...) __riscv_vmulhsu_vv_i16m1(__VA_ARGS__)

#define	vmulhsu_vv_i16m1_m(...) __riscv_vmulhsu_vv_i16m1_tumu(__VA_ARGS__)

#define	vmulhsu_vv_i16m2(...) __riscv_vmulhsu_vv_i16m2(__VA_ARGS__)

#define	vmulhsu_vv_i16m2_m(...) __riscv_vmulhsu_vv_i16m2_tumu(__VA_ARGS__)

#define	vmulhsu_vv_i16m4(...) __riscv_vmulhsu_vv_i16m4(__VA_ARGS__)

#define	vmulhsu_vv_i16m4_m(...) __riscv_vmulhsu_vv_i16m4_tumu(__VA_ARGS__)

#define	vmulhsu_vv_i16m8(...) __riscv_vmulhsu_vv_i16m8(__VA_ARGS__)

#define	vmulhsu_vv_i16m8_m(...) __riscv_vmulhsu_vv_i16m8_tumu(__VA_ARGS__)

#define	vmulhsu_vv_i16mf2(...) __riscv_vmulhsu_vv_i16mf2(__VA_ARGS__)

#define	vmulhsu_vv_i16mf2_m(...) __riscv_vmulhsu_vv_i16mf2_tumu(__VA_ARGS__)

#define	vmulhsu_vv_i16mf4(...) __riscv_vmulhsu_vv_i16mf4(__VA_ARGS__)

#define	vmulhsu_vv_i16mf4_m(...) __riscv_vmulhsu_vv_i16mf4_tumu(__VA_ARGS__)

#define	vmulhsu_vv_i32m1(...) __riscv_vmulhsu_vv_i32m1(__VA_ARGS__)

#define	vmulhsu_vv_i32m1_m(...) __riscv_vmulhsu_vv_i32m1_tumu(__VA_ARGS__)

#define	vmulhsu_vv_i32m2(...) __riscv_vmulhsu_vv_i32m2(__VA_ARGS__)

#define	vmulhsu_vv_i32m2_m(...) __riscv_vmulhsu_vv_i32m2_tumu(__VA_ARGS__)

#define	vmulhsu_vv_i32m4(...) __riscv_vmulhsu_vv_i32m4(__VA_ARGS__)

#define	vmulhsu_vv_i32m4_m(...) __riscv_vmulhsu_vv_i32m4_tumu(__VA_ARGS__)

#define	vmulhsu_vv_i32m8(...) __riscv_vmulhsu_vv_i32m8(__VA_ARGS__)

#define	vmulhsu_vv_i32m8_m(...) __riscv_vmulhsu_vv_i32m8_tumu(__VA_ARGS__)

#define	vmulhsu_vv_i32mf2(...) __riscv_vmulhsu_vv_i32mf2(__VA_ARGS__)

#define	vmulhsu_vv_i32mf2_m(...) __riscv_vmulhsu_vv_i32mf2_tumu(__VA_ARGS__)

#define	vmulhsu_vv_i64m1(...) __riscv_vmulhsu_vv_i64m1(__VA_ARGS__)

#define	vmulhsu_vv_i64m1_m(...) __riscv_vmulhsu_vv_i64m1_tumu(__VA_ARGS__)

#define	vmulhsu_vv_i64m2(...) __riscv_vmulhsu_vv_i64m2(__VA_ARGS__)

#define	vmulhsu_vv_i64m2_m(...) __riscv_vmulhsu_vv_i64m2_tumu(__VA_ARGS__)

#define	vmulhsu_vv_i64m4(...) __riscv_vmulhsu_vv_i64m4(__VA_ARGS__)

#define	vmulhsu_vv_i64m4_m(...) __riscv_vmulhsu_vv_i64m4_tumu(__VA_ARGS__)

#define	vmulhsu_vv_i64m8(...) __riscv_vmulhsu_vv_i64m8(__VA_ARGS__)

#define	vmulhsu_vv_i64m8_m(...) __riscv_vmulhsu_vv_i64m8_tumu(__VA_ARGS__)

#define	vmulhsu_vv_i8m1(...) __riscv_vmulhsu_vv_i8m1(__VA_ARGS__)

#define	vmulhsu_vv_i8m1_m(...) __riscv_vmulhsu_vv_i8m1_tumu(__VA_ARGS__)

#define	vmulhsu_vv_i8m2(...) __riscv_vmulhsu_vv_i8m2(__VA_ARGS__)

#define	vmulhsu_vv_i8m2_m(...) __riscv_vmulhsu_vv_i8m2_tumu(__VA_ARGS__)

#define	vmulhsu_vv_i8m4(...) __riscv_vmulhsu_vv_i8m4(__VA_ARGS__)

#define	vmulhsu_vv_i8m4_m(...) __riscv_vmulhsu_vv_i8m4_tumu(__VA_ARGS__)

#define	vmulhsu_vv_i8m8(...) __riscv_vmulhsu_vv_i8m8(__VA_ARGS__)

#define	vmulhsu_vv_i8m8_m(...) __riscv_vmulhsu_vv_i8m8_tumu(__VA_ARGS__)

#define	vmulhsu_vv_i8mf2(...) __riscv_vmulhsu_vv_i8mf2(__VA_ARGS__)

#define	vmulhsu_vv_i8mf2_m(...) __riscv_vmulhsu_vv_i8mf2_tumu(__VA_ARGS__)

#define	vmulhsu_vv_i8mf4(...) __riscv_vmulhsu_vv_i8mf4(__VA_ARGS__)

#define	vmulhsu_vv_i8mf4_m(...) __riscv_vmulhsu_vv_i8mf4_tumu(__VA_ARGS__)

#define	vmulhsu_vv_i8mf8(...) __riscv_vmulhsu_vv_i8mf8(__VA_ARGS__)

#define	vmulhsu_vv_i8mf8_m(...) __riscv_vmulhsu_vv_i8mf8_tumu(__VA_ARGS__)

#define	vmulhsu_vx_i16m1(...) __riscv_vmulhsu_vx_i16m1(__VA_ARGS__)

#define	vmulhsu_vx_i16m1_m(...) __riscv_vmulhsu_vx_i16m1_tumu(__VA_ARGS__)

#define	vmulhsu_vx_i16m2(...) __riscv_vmulhsu_vx_i16m2(__VA_ARGS__)

#define	vmulhsu_vx_i16m2_m(...) __riscv_vmulhsu_vx_i16m2_tumu(__VA_ARGS__)

#define	vmulhsu_vx_i16m4(...) __riscv_vmulhsu_vx_i16m4(__VA_ARGS__)

#define	vmulhsu_vx_i16m4_m(...) __riscv_vmulhsu_vx_i16m4_tumu(__VA_ARGS__)

#define	vmulhsu_vx_i16m8(...) __riscv_vmulhsu_vx_i16m8(__VA_ARGS__)

#define	vmulhsu_vx_i16m8_m(...) __riscv_vmulhsu_vx_i16m8_tumu(__VA_ARGS__)

#define	vmulhsu_vx_i16mf2(...) __riscv_vmulhsu_vx_i16mf2(__VA_ARGS__)

#define	vmulhsu_vx_i16mf2_m(...) __riscv_vmulhsu_vx_i16mf2_tumu(__VA_ARGS__)

#define	vmulhsu_vx_i16mf4(...) __riscv_vmulhsu_vx_i16mf4(__VA_ARGS__)

#define	vmulhsu_vx_i16mf4_m(...) __riscv_vmulhsu_vx_i16mf4_tumu(__VA_ARGS__)

#define	vmulhsu_vx_i32m1(...) __riscv_vmulhsu_vx_i32m1(__VA_ARGS__)

#define	vmulhsu_vx_i32m1_m(...) __riscv_vmulhsu_vx_i32m1_tumu(__VA_ARGS__)

#define	vmulhsu_vx_i32m2(...) __riscv_vmulhsu_vx_i32m2(__VA_ARGS__)

#define	vmulhsu_vx_i32m2_m(...) __riscv_vmulhsu_vx_i32m2_tumu(__VA_ARGS__)

#define	vmulhsu_vx_i32m4(...) __riscv_vmulhsu_vx_i32m4(__VA_ARGS__)

#define	vmulhsu_vx_i32m4_m(...) __riscv_vmulhsu_vx_i32m4_tumu(__VA_ARGS__)

#define	vmulhsu_vx_i32m8(...) __riscv_vmulhsu_vx_i32m8(__VA_ARGS__)

#define	vmulhsu_vx_i32m8_m(...) __riscv_vmulhsu_vx_i32m8_tumu(__VA_ARGS__)

#define	vmulhsu_vx_i32mf2(...) __riscv_vmulhsu_vx_i32mf2(__VA_ARGS__)

#define	vmulhsu_vx_i32mf2_m(...) __riscv_vmulhsu_vx_i32mf2_tumu(__VA_ARGS__)

#define	vmulhsu_vx_i64m1(...) __riscv_vmulhsu_vx_i64m1(__VA_ARGS__)

#define	vmulhsu_vx_i64m1_m(...) __riscv_vmulhsu_vx_i64m1_tumu(__VA_ARGS__)

#define	vmulhsu_vx_i64m2(...) __riscv_vmulhsu_vx_i64m2(__VA_ARGS__)

#define	vmulhsu_vx_i64m2_m(...) __riscv_vmulhsu_vx_i64m2_tumu(__VA_ARGS__)

#define	vmulhsu_vx_i64m4(...) __riscv_vmulhsu_vx_i64m4(__VA_ARGS__)

#define	vmulhsu_vx_i64m4_m(...) __riscv_vmulhsu_vx_i64m4_tumu(__VA_ARGS__)

#define	vmulhsu_vx_i64m8(...) __riscv_vmulhsu_vx_i64m8(__VA_ARGS__)

#define	vmulhsu_vx_i64m8_m(...) __riscv_vmulhsu_vx_i64m8_tumu(__VA_ARGS__)

#define	vmulhsu_vx_i8m1(...) __riscv_vmulhsu_vx_i8m1(__VA_ARGS__)

#define	vmulhsu_vx_i8m1_m(...) __riscv_vmulhsu_vx_i8m1_tumu(__VA_ARGS__)

#define	vmulhsu_vx_i8m2(...) __riscv_vmulhsu_vx_i8m2(__VA_ARGS__)

#define	vmulhsu_vx_i8m2_m(...) __riscv_vmulhsu_vx_i8m2_tumu(__VA_ARGS__)

#define	vmulhsu_vx_i8m4(...) __riscv_vmulhsu_vx_i8m4(__VA_ARGS__)

#define	vmulhsu_vx_i8m4_m(...) __riscv_vmulhsu_vx_i8m4_tumu(__VA_ARGS__)

#define	vmulhsu_vx_i8m8(...) __riscv_vmulhsu_vx_i8m8(__VA_ARGS__)

#define	vmulhsu_vx_i8m8_m(...) __riscv_vmulhsu_vx_i8m8_tumu(__VA_ARGS__)

#define	vmulhsu_vx_i8mf2(...) __riscv_vmulhsu_vx_i8mf2(__VA_ARGS__)

#define	vmulhsu_vx_i8mf2_m(...) __riscv_vmulhsu_vx_i8mf2_tumu(__VA_ARGS__)

#define	vmulhsu_vx_i8mf4(...) __riscv_vmulhsu_vx_i8mf4(__VA_ARGS__)

#define	vmulhsu_vx_i8mf4_m(...) __riscv_vmulhsu_vx_i8mf4_tumu(__VA_ARGS__)

#define	vmulhsu_vx_i8mf8(...) __riscv_vmulhsu_vx_i8mf8(__VA_ARGS__)

#define	vmulhsu_vx_i8mf8_m(...) __riscv_vmulhsu_vx_i8mf8_tumu(__VA_ARGS__)

#define	vmulhu_vv_u16m1(...) __riscv_vmulhu_vv_u16m1(__VA_ARGS__)

#define	vmulhu_vv_u16m1_m(...) __riscv_vmulhu_vv_u16m1_tumu(__VA_ARGS__)

#define	vmulhu_vv_u16m2(...) __riscv_vmulhu_vv_u16m2(__VA_ARGS__)

#define	vmulhu_vv_u16m2_m(...) __riscv_vmulhu_vv_u16m2_tumu(__VA_ARGS__)

#define	vmulhu_vv_u16m4(...) __riscv_vmulhu_vv_u16m4(__VA_ARGS__)

#define	vmulhu_vv_u16m4_m(...) __riscv_vmulhu_vv_u16m4_tumu(__VA_ARGS__)

#define	vmulhu_vv_u16m8(...) __riscv_vmulhu_vv_u16m8(__VA_ARGS__)

#define	vmulhu_vv_u16m8_m(...) __riscv_vmulhu_vv_u16m8_tumu(__VA_ARGS__)

#define	vmulhu_vv_u16mf2(...) __riscv_vmulhu_vv_u16mf2(__VA_ARGS__)

#define	vmulhu_vv_u16mf2_m(...) __riscv_vmulhu_vv_u16mf2_tumu(__VA_ARGS__)

#define	vmulhu_vv_u16mf4(...) __riscv_vmulhu_vv_u16mf4(__VA_ARGS__)

#define	vmulhu_vv_u16mf4_m(...) __riscv_vmulhu_vv_u16mf4_tumu(__VA_ARGS__)

#define	vmulhu_vv_u32m1(...) __riscv_vmulhu_vv_u32m1(__VA_ARGS__)

#define	vmulhu_vv_u32m1_m(...) __riscv_vmulhu_vv_u32m1_tumu(__VA_ARGS__)

#define	vmulhu_vv_u32m2(...) __riscv_vmulhu_vv_u32m2(__VA_ARGS__)

#define	vmulhu_vv_u32m2_m(...) __riscv_vmulhu_vv_u32m2_tumu(__VA_ARGS__)

#define	vmulhu_vv_u32m4(...) __riscv_vmulhu_vv_u32m4(__VA_ARGS__)

#define	vmulhu_vv_u32m4_m(...) __riscv_vmulhu_vv_u32m4_tumu(__VA_ARGS__)

#define	vmulhu_vv_u32m8(...) __riscv_vmulhu_vv_u32m8(__VA_ARGS__)

#define	vmulhu_vv_u32m8_m(...) __riscv_vmulhu_vv_u32m8_tumu(__VA_ARGS__)

#define	vmulhu_vv_u32mf2(...) __riscv_vmulhu_vv_u32mf2(__VA_ARGS__)

#define	vmulhu_vv_u32mf2_m(...) __riscv_vmulhu_vv_u32mf2_tumu(__VA_ARGS__)

#define	vmulhu_vv_u64m1(...) __riscv_vmulhu_vv_u64m1(__VA_ARGS__)

#define	vmulhu_vv_u64m1_m(...) __riscv_vmulhu_vv_u64m1_tumu(__VA_ARGS__)

#define	vmulhu_vv_u64m2(...) __riscv_vmulhu_vv_u64m2(__VA_ARGS__)

#define	vmulhu_vv_u64m2_m(...) __riscv_vmulhu_vv_u64m2_tumu(__VA_ARGS__)

#define	vmulhu_vv_u64m4(...) __riscv_vmulhu_vv_u64m4(__VA_ARGS__)

#define	vmulhu_vv_u64m4_m(...) __riscv_vmulhu_vv_u64m4_tumu(__VA_ARGS__)

#define	vmulhu_vv_u64m8(...) __riscv_vmulhu_vv_u64m8(__VA_ARGS__)

#define	vmulhu_vv_u64m8_m(...) __riscv_vmulhu_vv_u64m8_tumu(__VA_ARGS__)

#define	vmulhu_vv_u8m1(...) __riscv_vmulhu_vv_u8m1(__VA_ARGS__)

#define	vmulhu_vv_u8m1_m(...) __riscv_vmulhu_vv_u8m1_tumu(__VA_ARGS__)

#define	vmulhu_vv_u8m2(...) __riscv_vmulhu_vv_u8m2(__VA_ARGS__)

#define	vmulhu_vv_u8m2_m(...) __riscv_vmulhu_vv_u8m2_tumu(__VA_ARGS__)

#define	vmulhu_vv_u8m4(...) __riscv_vmulhu_vv_u8m4(__VA_ARGS__)

#define	vmulhu_vv_u8m4_m(...) __riscv_vmulhu_vv_u8m4_tumu(__VA_ARGS__)

#define	vmulhu_vv_u8m8(...) __riscv_vmulhu_vv_u8m8(__VA_ARGS__)

#define	vmulhu_vv_u8m8_m(...) __riscv_vmulhu_vv_u8m8_tumu(__VA_ARGS__)

#define	vmulhu_vv_u8mf2(...) __riscv_vmulhu_vv_u8mf2(__VA_ARGS__)

#define	vmulhu_vv_u8mf2_m(...) __riscv_vmulhu_vv_u8mf2_tumu(__VA_ARGS__)

#define	vmulhu_vv_u8mf4(...) __riscv_vmulhu_vv_u8mf4(__VA_ARGS__)

#define	vmulhu_vv_u8mf4_m(...) __riscv_vmulhu_vv_u8mf4_tumu(__VA_ARGS__)

#define	vmulhu_vv_u8mf8(...) __riscv_vmulhu_vv_u8mf8(__VA_ARGS__)

#define	vmulhu_vv_u8mf8_m(...) __riscv_vmulhu_vv_u8mf8_tumu(__VA_ARGS__)

#define	vmulhu_vx_u16m1(...) __riscv_vmulhu_vx_u16m1(__VA_ARGS__)

#define	vmulhu_vx_u16m1_m(...) __riscv_vmulhu_vx_u16m1_tumu(__VA_ARGS__)

#define	vmulhu_vx_u16m2(...) __riscv_vmulhu_vx_u16m2(__VA_ARGS__)

#define	vmulhu_vx_u16m2_m(...) __riscv_vmulhu_vx_u16m2_tumu(__VA_ARGS__)

#define	vmulhu_vx_u16m4(...) __riscv_vmulhu_vx_u16m4(__VA_ARGS__)

#define	vmulhu_vx_u16m4_m(...) __riscv_vmulhu_vx_u16m4_tumu(__VA_ARGS__)

#define	vmulhu_vx_u16m8(...) __riscv_vmulhu_vx_u16m8(__VA_ARGS__)

#define	vmulhu_vx_u16m8_m(...) __riscv_vmulhu_vx_u16m8_tumu(__VA_ARGS__)

#define	vmulhu_vx_u16mf2(...) __riscv_vmulhu_vx_u16mf2(__VA_ARGS__)

#define	vmulhu_vx_u16mf2_m(...) __riscv_vmulhu_vx_u16mf2_tumu(__VA_ARGS__)

#define	vmulhu_vx_u16mf4(...) __riscv_vmulhu_vx_u16mf4(__VA_ARGS__)

#define	vmulhu_vx_u16mf4_m(...) __riscv_vmulhu_vx_u16mf4_tumu(__VA_ARGS__)

#define	vmulhu_vx_u32m1(...) __riscv_vmulhu_vx_u32m1(__VA_ARGS__)

#define	vmulhu_vx_u32m1_m(...) __riscv_vmulhu_vx_u32m1_tumu(__VA_ARGS__)

#define	vmulhu_vx_u32m2(...) __riscv_vmulhu_vx_u32m2(__VA_ARGS__)

#define	vmulhu_vx_u32m2_m(...) __riscv_vmulhu_vx_u32m2_tumu(__VA_ARGS__)

#define	vmulhu_vx_u32m4(...) __riscv_vmulhu_vx_u32m4(__VA_ARGS__)

#define	vmulhu_vx_u32m4_m(...) __riscv_vmulhu_vx_u32m4_tumu(__VA_ARGS__)

#define	vmulhu_vx_u32m8(...) __riscv_vmulhu_vx_u32m8(__VA_ARGS__)

#define	vmulhu_vx_u32m8_m(...) __riscv_vmulhu_vx_u32m8_tumu(__VA_ARGS__)

#define	vmulhu_vx_u32mf2(...) __riscv_vmulhu_vx_u32mf2(__VA_ARGS__)

#define	vmulhu_vx_u32mf2_m(...) __riscv_vmulhu_vx_u32mf2_tumu(__VA_ARGS__)

#define	vmulhu_vx_u64m1(...) __riscv_vmulhu_vx_u64m1(__VA_ARGS__)

#define	vmulhu_vx_u64m1_m(...) __riscv_vmulhu_vx_u64m1_tumu(__VA_ARGS__)

#define	vmulhu_vx_u64m2(...) __riscv_vmulhu_vx_u64m2(__VA_ARGS__)

#define	vmulhu_vx_u64m2_m(...) __riscv_vmulhu_vx_u64m2_tumu(__VA_ARGS__)

#define	vmulhu_vx_u64m4(...) __riscv_vmulhu_vx_u64m4(__VA_ARGS__)

#define	vmulhu_vx_u64m4_m(...) __riscv_vmulhu_vx_u64m4_tumu(__VA_ARGS__)

#define	vmulhu_vx_u64m8(...) __riscv_vmulhu_vx_u64m8(__VA_ARGS__)

#define	vmulhu_vx_u64m8_m(...) __riscv_vmulhu_vx_u64m8_tumu(__VA_ARGS__)

#define	vmulhu_vx_u8m1(...) __riscv_vmulhu_vx_u8m1(__VA_ARGS__)

#define	vmulhu_vx_u8m1_m(...) __riscv_vmulhu_vx_u8m1_tumu(__VA_ARGS__)

#define	vmulhu_vx_u8m2(...) __riscv_vmulhu_vx_u8m2(__VA_ARGS__)

#define	vmulhu_vx_u8m2_m(...) __riscv_vmulhu_vx_u8m2_tumu(__VA_ARGS__)

#define	vmulhu_vx_u8m4(...) __riscv_vmulhu_vx_u8m4(__VA_ARGS__)

#define	vmulhu_vx_u8m4_m(...) __riscv_vmulhu_vx_u8m4_tumu(__VA_ARGS__)

#define	vmulhu_vx_u8m8(...) __riscv_vmulhu_vx_u8m8(__VA_ARGS__)

#define	vmulhu_vx_u8m8_m(...) __riscv_vmulhu_vx_u8m8_tumu(__VA_ARGS__)

#define	vmulhu_vx_u8mf2(...) __riscv_vmulhu_vx_u8mf2(__VA_ARGS__)

#define	vmulhu_vx_u8mf2_m(...) __riscv_vmulhu_vx_u8mf2_tumu(__VA_ARGS__)

#define	vmulhu_vx_u8mf4(...) __riscv_vmulhu_vx_u8mf4(__VA_ARGS__)

#define	vmulhu_vx_u8mf4_m(...) __riscv_vmulhu_vx_u8mf4_tumu(__VA_ARGS__)

#define	vmulhu_vx_u8mf8(...) __riscv_vmulhu_vx_u8mf8(__VA_ARGS__)

#define	vmulhu_vx_u8mf8_m(...) __riscv_vmulhu_vx_u8mf8_tumu(__VA_ARGS__)

#define	vmv_s_x_i16m1(...) __riscv_vmv_s_x_i16m1_tu(__VA_ARGS__)

#define	vmv_s_x_i16m2(...) __riscv_vmv_s_x_i16m2_tu(__VA_ARGS__)

#define	vmv_s_x_i16m4(...) __riscv_vmv_s_x_i16m4_tu(__VA_ARGS__)

#define	vmv_s_x_i16m8(...) __riscv_vmv_s_x_i16m8_tu(__VA_ARGS__)

#define	vmv_s_x_i16mf2(...) __riscv_vmv_s_x_i16mf2_tu(__VA_ARGS__)

#define	vmv_s_x_i16mf4(...) __riscv_vmv_s_x_i16mf4_tu(__VA_ARGS__)

#define	vmv_s_x_i32m1(...) __riscv_vmv_s_x_i32m1_tu(__VA_ARGS__)

#define	vmv_s_x_i32m2(...) __riscv_vmv_s_x_i32m2_tu(__VA_ARGS__)

#define	vmv_s_x_i32m4(...) __riscv_vmv_s_x_i32m4_tu(__VA_ARGS__)

#define	vmv_s_x_i32m8(...) __riscv_vmv_s_x_i32m8_tu(__VA_ARGS__)

#define	vmv_s_x_i32mf2(...) __riscv_vmv_s_x_i32mf2_tu(__VA_ARGS__)

#define	vmv_s_x_i64m1(...) __riscv_vmv_s_x_i64m1_tu(__VA_ARGS__)

#define	vmv_s_x_i64m2(...) __riscv_vmv_s_x_i64m2_tu(__VA_ARGS__)

#define	vmv_s_x_i64m4(...) __riscv_vmv_s_x_i64m4_tu(__VA_ARGS__)

#define	vmv_s_x_i64m8(...) __riscv_vmv_s_x_i64m8_tu(__VA_ARGS__)

#define	vmv_s_x_i8m1(...) __riscv_vmv_s_x_i8m1_tu(__VA_ARGS__)

#define	vmv_s_x_i8m2(...) __riscv_vmv_s_x_i8m2_tu(__VA_ARGS__)

#define	vmv_s_x_i8m4(...) __riscv_vmv_s_x_i8m4_tu(__VA_ARGS__)

#define	vmv_s_x_i8m8(...) __riscv_vmv_s_x_i8m8_tu(__VA_ARGS__)

#define	vmv_s_x_i8mf2(...) __riscv_vmv_s_x_i8mf2_tu(__VA_ARGS__)

#define	vmv_s_x_i8mf4(...) __riscv_vmv_s_x_i8mf4_tu(__VA_ARGS__)

#define	vmv_s_x_i8mf8(...) __riscv_vmv_s_x_i8mf8_tu(__VA_ARGS__)

#define	vmv_s_x_u16m1(...) __riscv_vmv_s_x_u16m1_tu(__VA_ARGS__)

#define	vmv_s_x_u16m2(...) __riscv_vmv_s_x_u16m2_tu(__VA_ARGS__)

#define	vmv_s_x_u16m4(...) __riscv_vmv_s_x_u16m4_tu(__VA_ARGS__)

#define	vmv_s_x_u16m8(...) __riscv_vmv_s_x_u16m8_tu(__VA_ARGS__)

#define	vmv_s_x_u16mf2(...) __riscv_vmv_s_x_u16mf2_tu(__VA_ARGS__)

#define	vmv_s_x_u16mf4(...) __riscv_vmv_s_x_u16mf4_tu(__VA_ARGS__)

#define	vmv_s_x_u32m1(...) __riscv_vmv_s_x_u32m1_tu(__VA_ARGS__)

#define	vmv_s_x_u32m2(...) __riscv_vmv_s_x_u32m2_tu(__VA_ARGS__)

#define	vmv_s_x_u32m4(...) __riscv_vmv_s_x_u32m4_tu(__VA_ARGS__)

#define	vmv_s_x_u32m8(...) __riscv_vmv_s_x_u32m8_tu(__VA_ARGS__)

#define	vmv_s_x_u32mf2(...) __riscv_vmv_s_x_u32mf2_tu(__VA_ARGS__)

#define	vmv_s_x_u64m1(...) __riscv_vmv_s_x_u64m1_tu(__VA_ARGS__)

#define	vmv_s_x_u64m2(...) __riscv_vmv_s_x_u64m2_tu(__VA_ARGS__)

#define	vmv_s_x_u64m4(...) __riscv_vmv_s_x_u64m4_tu(__VA_ARGS__)

#define	vmv_s_x_u64m8(...) __riscv_vmv_s_x_u64m8_tu(__VA_ARGS__)

#define	vmv_s_x_u8m1(...) __riscv_vmv_s_x_u8m1_tu(__VA_ARGS__)

#define	vmv_s_x_u8m2(...) __riscv_vmv_s_x_u8m2_tu(__VA_ARGS__)

#define	vmv_s_x_u8m4(...) __riscv_vmv_s_x_u8m4_tu(__VA_ARGS__)

#define	vmv_s_x_u8m8(...) __riscv_vmv_s_x_u8m8_tu(__VA_ARGS__)

#define	vmv_s_x_u8mf2(...) __riscv_vmv_s_x_u8mf2_tu(__VA_ARGS__)

#define	vmv_s_x_u8mf4(...) __riscv_vmv_s_x_u8mf4_tu(__VA_ARGS__)

#define	vmv_s_x_u8mf8(...) __riscv_vmv_s_x_u8mf8_tu(__VA_ARGS__)

#define	vmv_v_v_f16m1(...) __riscv_vmv_v_v_f16m1(__VA_ARGS__)

#define	vmv_v_v_f16m2(...) __riscv_vmv_v_v_f16m2(__VA_ARGS__)

#define	vmv_v_v_f16m4(...) __riscv_vmv_v_v_f16m4(__VA_ARGS__)

#define	vmv_v_v_f16m8(...) __riscv_vmv_v_v_f16m8(__VA_ARGS__)

#define	vmv_v_v_f16mf2(...) __riscv_vmv_v_v_f16mf2(__VA_ARGS__)

#define	vmv_v_v_f16mf4(...) __riscv_vmv_v_v_f16mf4(__VA_ARGS__)

#define	vmv_v_v_f32m1(...) __riscv_vmv_v_v_f32m1(__VA_ARGS__)

#define	vmv_v_v_f32m2(...) __riscv_vmv_v_v_f32m2(__VA_ARGS__)

#define	vmv_v_v_f32m4(...) __riscv_vmv_v_v_f32m4(__VA_ARGS__)

#define	vmv_v_v_f32m8(...) __riscv_vmv_v_v_f32m8(__VA_ARGS__)

#define	vmv_v_v_f32mf2(...) __riscv_vmv_v_v_f32mf2(__VA_ARGS__)

#define	vmv_v_v_f64m1(...) __riscv_vmv_v_v_f64m1(__VA_ARGS__)

#define	vmv_v_v_f64m2(...) __riscv_vmv_v_v_f64m2(__VA_ARGS__)

#define	vmv_v_v_f64m4(...) __riscv_vmv_v_v_f64m4(__VA_ARGS__)

#define	vmv_v_v_f64m8(...) __riscv_vmv_v_v_f64m8(__VA_ARGS__)

#define	vmv_v_v_i16m1(...) __riscv_vmv_v_v_i16m1(__VA_ARGS__)

#define	vmv_v_v_i16m2(...) __riscv_vmv_v_v_i16m2(__VA_ARGS__)

#define	vmv_v_v_i16m4(...) __riscv_vmv_v_v_i16m4(__VA_ARGS__)

#define	vmv_v_v_i16m8(...) __riscv_vmv_v_v_i16m8(__VA_ARGS__)

#define	vmv_v_v_i16mf2(...) __riscv_vmv_v_v_i16mf2(__VA_ARGS__)

#define	vmv_v_v_i16mf4(...) __riscv_vmv_v_v_i16mf4(__VA_ARGS__)

#define	vmv_v_v_i32m1(...) __riscv_vmv_v_v_i32m1(__VA_ARGS__)

#define	vmv_v_v_i32m2(...) __riscv_vmv_v_v_i32m2(__VA_ARGS__)

#define	vmv_v_v_i32m4(...) __riscv_vmv_v_v_i32m4(__VA_ARGS__)

#define	vmv_v_v_i32m8(...) __riscv_vmv_v_v_i32m8(__VA_ARGS__)

#define	vmv_v_v_i32mf2(...) __riscv_vmv_v_v_i32mf2(__VA_ARGS__)

#define	vmv_v_v_i64m1(...) __riscv_vmv_v_v_i64m1(__VA_ARGS__)

#define	vmv_v_v_i64m2(...) __riscv_vmv_v_v_i64m2(__VA_ARGS__)

#define	vmv_v_v_i64m4(...) __riscv_vmv_v_v_i64m4(__VA_ARGS__)

#define	vmv_v_v_i64m8(...) __riscv_vmv_v_v_i64m8(__VA_ARGS__)

#define	vmv_v_v_i8m1(...) __riscv_vmv_v_v_i8m1(__VA_ARGS__)

#define	vmv_v_v_i8m2(...) __riscv_vmv_v_v_i8m2(__VA_ARGS__)

#define	vmv_v_v_i8m4(...) __riscv_vmv_v_v_i8m4(__VA_ARGS__)

#define	vmv_v_v_i8m8(...) __riscv_vmv_v_v_i8m8(__VA_ARGS__)

#define	vmv_v_v_i8mf2(...) __riscv_vmv_v_v_i8mf2(__VA_ARGS__)

#define	vmv_v_v_i8mf4(...) __riscv_vmv_v_v_i8mf4(__VA_ARGS__)

#define	vmv_v_v_i8mf8(...) __riscv_vmv_v_v_i8mf8(__VA_ARGS__)

#define	vmv_v_v_u16m1(...) __riscv_vmv_v_v_u16m1(__VA_ARGS__)

#define	vmv_v_v_u16m2(...) __riscv_vmv_v_v_u16m2(__VA_ARGS__)

#define	vmv_v_v_u16m4(...) __riscv_vmv_v_v_u16m4(__VA_ARGS__)

#define	vmv_v_v_u16m8(...) __riscv_vmv_v_v_u16m8(__VA_ARGS__)

#define	vmv_v_v_u16mf2(...) __riscv_vmv_v_v_u16mf2(__VA_ARGS__)

#define	vmv_v_v_u16mf4(...) __riscv_vmv_v_v_u16mf4(__VA_ARGS__)

#define	vmv_v_v_u32m1(...) __riscv_vmv_v_v_u32m1(__VA_ARGS__)

#define	vmv_v_v_u32m2(...) __riscv_vmv_v_v_u32m2(__VA_ARGS__)

#define	vmv_v_v_u32m4(...) __riscv_vmv_v_v_u32m4(__VA_ARGS__)

#define	vmv_v_v_u32m8(...) __riscv_vmv_v_v_u32m8(__VA_ARGS__)

#define	vmv_v_v_u32mf2(...) __riscv_vmv_v_v_u32mf2(__VA_ARGS__)

#define	vmv_v_v_u64m1(...) __riscv_vmv_v_v_u64m1(__VA_ARGS__)

#define	vmv_v_v_u64m2(...) __riscv_vmv_v_v_u64m2(__VA_ARGS__)

#define	vmv_v_v_u64m4(...) __riscv_vmv_v_v_u64m4(__VA_ARGS__)

#define	vmv_v_v_u64m8(...) __riscv_vmv_v_v_u64m8(__VA_ARGS__)

#define	vmv_v_v_u8m1(...) __riscv_vmv_v_v_u8m1(__VA_ARGS__)

#define	vmv_v_v_u8m2(...) __riscv_vmv_v_v_u8m2(__VA_ARGS__)

#define	vmv_v_v_u8m4(...) __riscv_vmv_v_v_u8m4(__VA_ARGS__)

#define	vmv_v_v_u8m8(...) __riscv_vmv_v_v_u8m8(__VA_ARGS__)

#define	vmv_v_v_u8mf2(...) __riscv_vmv_v_v_u8mf2(__VA_ARGS__)

#define	vmv_v_v_u8mf4(...) __riscv_vmv_v_v_u8mf4(__VA_ARGS__)

#define	vmv_v_v_u8mf8(...) __riscv_vmv_v_v_u8mf8(__VA_ARGS__)

#define	vmv_v_x_i16m1(...) __riscv_vmv_v_x_i16m1(__VA_ARGS__)

#define	vmv_v_x_i16m2(...) __riscv_vmv_v_x_i16m2(__VA_ARGS__)

#define	vmv_v_x_i16m4(...) __riscv_vmv_v_x_i16m4(__VA_ARGS__)

#define	vmv_v_x_i16m8(...) __riscv_vmv_v_x_i16m8(__VA_ARGS__)

#define	vmv_v_x_i16mf2(...) __riscv_vmv_v_x_i16mf2(__VA_ARGS__)

#define	vmv_v_x_i16mf4(...) __riscv_vmv_v_x_i16mf4(__VA_ARGS__)

#define	vmv_v_x_i32m1(...) __riscv_vmv_v_x_i32m1(__VA_ARGS__)

#define	vmv_v_x_i32m2(...) __riscv_vmv_v_x_i32m2(__VA_ARGS__)

#define	vmv_v_x_i32m4(...) __riscv_vmv_v_x_i32m4(__VA_ARGS__)

#define	vmv_v_x_i32m8(...) __riscv_vmv_v_x_i32m8(__VA_ARGS__)

#define	vmv_v_x_i32mf2(...) __riscv_vmv_v_x_i32mf2(__VA_ARGS__)

#define	vmv_v_x_i64m1(...) __riscv_vmv_v_x_i64m1(__VA_ARGS__)

#define	vmv_v_x_i64m2(...) __riscv_vmv_v_x_i64m2(__VA_ARGS__)

#define	vmv_v_x_i64m4(...) __riscv_vmv_v_x_i64m4(__VA_ARGS__)

#define	vmv_v_x_i64m8(...) __riscv_vmv_v_x_i64m8(__VA_ARGS__)

#define	vmv_v_x_i8m1(...) __riscv_vmv_v_x_i8m1(__VA_ARGS__)

#define	vmv_v_x_i8m2(...) __riscv_vmv_v_x_i8m2(__VA_ARGS__)

#define	vmv_v_x_i8m4(...) __riscv_vmv_v_x_i8m4(__VA_ARGS__)

#define	vmv_v_x_i8m8(...) __riscv_vmv_v_x_i8m8(__VA_ARGS__)

#define	vmv_v_x_i8mf2(...) __riscv_vmv_v_x_i8mf2(__VA_ARGS__)

#define	vmv_v_x_i8mf4(...) __riscv_vmv_v_x_i8mf4(__VA_ARGS__)

#define	vmv_v_x_i8mf8(...) __riscv_vmv_v_x_i8mf8(__VA_ARGS__)

#define	vmv_v_x_u16m1(...) __riscv_vmv_v_x_u16m1(__VA_ARGS__)

#define	vmv_v_x_u16m2(...) __riscv_vmv_v_x_u16m2(__VA_ARGS__)

#define	vmv_v_x_u16m4(...) __riscv_vmv_v_x_u16m4(__VA_ARGS__)

#define	vmv_v_x_u16m8(...) __riscv_vmv_v_x_u16m8(__VA_ARGS__)

#define	vmv_v_x_u16mf2(...) __riscv_vmv_v_x_u16mf2(__VA_ARGS__)

#define	vmv_v_x_u16mf4(...) __riscv_vmv_v_x_u16mf4(__VA_ARGS__)

#define	vmv_v_x_u32m1(...) __riscv_vmv_v_x_u32m1(__VA_ARGS__)

#define	vmv_v_x_u32m2(...) __riscv_vmv_v_x_u32m2(__VA_ARGS__)

#define	vmv_v_x_u32m4(...) __riscv_vmv_v_x_u32m4(__VA_ARGS__)

#define	vmv_v_x_u32m8(...) __riscv_vmv_v_x_u32m8(__VA_ARGS__)

#define	vmv_v_x_u32mf2(...) __riscv_vmv_v_x_u32mf2(__VA_ARGS__)

#define	vmv_v_x_u64m1(...) __riscv_vmv_v_x_u64m1(__VA_ARGS__)

#define	vmv_v_x_u64m2(...) __riscv_vmv_v_x_u64m2(__VA_ARGS__)

#define	vmv_v_x_u64m4(...) __riscv_vmv_v_x_u64m4(__VA_ARGS__)

#define	vmv_v_x_u64m8(...) __riscv_vmv_v_x_u64m8(__VA_ARGS__)

#define	vmv_v_x_u8m1(...) __riscv_vmv_v_x_u8m1(__VA_ARGS__)

#define	vmv_v_x_u8m2(...) __riscv_vmv_v_x_u8m2(__VA_ARGS__)

#define	vmv_v_x_u8m4(...) __riscv_vmv_v_x_u8m4(__VA_ARGS__)

#define	vmv_v_x_u8m8(...) __riscv_vmv_v_x_u8m8(__VA_ARGS__)

#define	vmv_v_x_u8mf2(...) __riscv_vmv_v_x_u8mf2(__VA_ARGS__)

#define	vmv_v_x_u8mf4(...) __riscv_vmv_v_x_u8mf4(__VA_ARGS__)

#define	vmv_v_x_u8mf8(...) __riscv_vmv_v_x_u8mf8(__VA_ARGS__)

#define	vmv_x_s_i16m1_i16(...) __riscv_vmv_x_s_i16m1_i16(__VA_ARGS__)

#define	vmv_x_s_i16m2_i16(...) __riscv_vmv_x_s_i16m2_i16(__VA_ARGS__)

#define	vmv_x_s_i16m4_i16(...) __riscv_vmv_x_s_i16m4_i16(__VA_ARGS__)

#define	vmv_x_s_i16m8_i16(...) __riscv_vmv_x_s_i16m8_i16(__VA_ARGS__)

#define	vmv_x_s_i16mf2_i16(...) __riscv_vmv_x_s_i16mf2_i16(__VA_ARGS__)

#define	vmv_x_s_i16mf4_i16(...) __riscv_vmv_x_s_i16mf4_i16(__VA_ARGS__)

#define	vmv_x_s_i32m1_i32(...) __riscv_vmv_x_s_i32m1_i32(__VA_ARGS__)

#define	vmv_x_s_i32m2_i32(...) __riscv_vmv_x_s_i32m2_i32(__VA_ARGS__)

#define	vmv_x_s_i32m4_i32(...) __riscv_vmv_x_s_i32m4_i32(__VA_ARGS__)

#define	vmv_x_s_i32m8_i32(...) __riscv_vmv_x_s_i32m8_i32(__VA_ARGS__)

#define	vmv_x_s_i32mf2_i32(...) __riscv_vmv_x_s_i32mf2_i32(__VA_ARGS__)

#define	vmv_x_s_i64m1_i64(...) __riscv_vmv_x_s_i64m1_i64(__VA_ARGS__)

#define	vmv_x_s_i64m2_i64(...) __riscv_vmv_x_s_i64m2_i64(__VA_ARGS__)

#define	vmv_x_s_i64m4_i64(...) __riscv_vmv_x_s_i64m4_i64(__VA_ARGS__)

#define	vmv_x_s_i64m8_i64(...) __riscv_vmv_x_s_i64m8_i64(__VA_ARGS__)

#define	vmv_x_s_i8m1_i8(...) __riscv_vmv_x_s_i8m1_i8(__VA_ARGS__)

#define	vmv_x_s_i8m2_i8(...) __riscv_vmv_x_s_i8m2_i8(__VA_ARGS__)

#define	vmv_x_s_i8m4_i8(...) __riscv_vmv_x_s_i8m4_i8(__VA_ARGS__)

#define	vmv_x_s_i8m8_i8(...) __riscv_vmv_x_s_i8m8_i8(__VA_ARGS__)

#define	vmv_x_s_i8mf2_i8(...) __riscv_vmv_x_s_i8mf2_i8(__VA_ARGS__)

#define	vmv_x_s_i8mf4_i8(...) __riscv_vmv_x_s_i8mf4_i8(__VA_ARGS__)

#define	vmv_x_s_i8mf8_i8(...) __riscv_vmv_x_s_i8mf8_i8(__VA_ARGS__)

#define	vmv_x_s_u16m1_u16(...) __riscv_vmv_x_s_u16m1_u16(__VA_ARGS__)

#define	vmv_x_s_u16m2_u16(...) __riscv_vmv_x_s_u16m2_u16(__VA_ARGS__)

#define	vmv_x_s_u16m4_u16(...) __riscv_vmv_x_s_u16m4_u16(__VA_ARGS__)

#define	vmv_x_s_u16m8_u16(...) __riscv_vmv_x_s_u16m8_u16(__VA_ARGS__)

#define	vmv_x_s_u16mf2_u16(...) __riscv_vmv_x_s_u16mf2_u16(__VA_ARGS__)

#define	vmv_x_s_u16mf4_u16(...) __riscv_vmv_x_s_u16mf4_u16(__VA_ARGS__)

#define	vmv_x_s_u32m1_u32(...) __riscv_vmv_x_s_u32m1_u32(__VA_ARGS__)

#define	vmv_x_s_u32m2_u32(...) __riscv_vmv_x_s_u32m2_u32(__VA_ARGS__)

#define	vmv_x_s_u32m4_u32(...) __riscv_vmv_x_s_u32m4_u32(__VA_ARGS__)

#define	vmv_x_s_u32m8_u32(...) __riscv_vmv_x_s_u32m8_u32(__VA_ARGS__)

#define	vmv_x_s_u32mf2_u32(...) __riscv_vmv_x_s_u32mf2_u32(__VA_ARGS__)

#define	vmv_x_s_u64m1_u64(...) __riscv_vmv_x_s_u64m1_u64(__VA_ARGS__)

#define	vmv_x_s_u64m2_u64(...) __riscv_vmv_x_s_u64m2_u64(__VA_ARGS__)

#define	vmv_x_s_u64m4_u64(...) __riscv_vmv_x_s_u64m4_u64(__VA_ARGS__)

#define	vmv_x_s_u64m8_u64(...) __riscv_vmv_x_s_u64m8_u64(__VA_ARGS__)

#define	vmv_x_s_u8m1_u8(...) __riscv_vmv_x_s_u8m1_u8(__VA_ARGS__)

#define	vmv_x_s_u8m2_u8(...) __riscv_vmv_x_s_u8m2_u8(__VA_ARGS__)

#define	vmv_x_s_u8m4_u8(...) __riscv_vmv_x_s_u8m4_u8(__VA_ARGS__)

#define	vmv_x_s_u8m8_u8(...) __riscv_vmv_x_s_u8m8_u8(__VA_ARGS__)

#define	vmv_x_s_u8mf2_u8(...) __riscv_vmv_x_s_u8mf2_u8(__VA_ARGS__)

#define	vmv_x_s_u8mf4_u8(...) __riscv_vmv_x_s_u8mf4_u8(__VA_ARGS__)

#define	vmv_x_s_u8mf8_u8(...) __riscv_vmv_x_s_u8mf8_u8(__VA_ARGS__)

#define	vmxnor_mm_b1(...) __riscv_vmxnor_mm_b1(__VA_ARGS__)

#define	vmxnor_mm_b16(...) __riscv_vmxnor_mm_b16(__VA_ARGS__)

#define	vmxnor_mm_b2(...) __riscv_vmxnor_mm_b2(__VA_ARGS__)

#define	vmxnor_mm_b32(...) __riscv_vmxnor_mm_b32(__VA_ARGS__)

#define	vmxnor_mm_b4(...) __riscv_vmxnor_mm_b4(__VA_ARGS__)

#define	vmxnor_mm_b64(...) __riscv_vmxnor_mm_b64(__VA_ARGS__)

#define	vmxnor_mm_b8(...) __riscv_vmxnor_mm_b8(__VA_ARGS__)

#define	vmxor_mm_b1(...) __riscv_vmxor_mm_b1(__VA_ARGS__)

#define	vmxor_mm_b16(...) __riscv_vmxor_mm_b16(__VA_ARGS__)

#define	vmxor_mm_b2(...) __riscv_vmxor_mm_b2(__VA_ARGS__)

#define	vmxor_mm_b32(...) __riscv_vmxor_mm_b32(__VA_ARGS__)

#define	vmxor_mm_b4(...) __riscv_vmxor_mm_b4(__VA_ARGS__)

#define	vmxor_mm_b64(...) __riscv_vmxor_mm_b64(__VA_ARGS__)

#define	vmxor_mm_b8(...) __riscv_vmxor_mm_b8(__VA_ARGS__)

#define	vnclip_wv_i16m1(...) __riscv_vnclip_wv_i16m1(__VA_ARGS__)

#define	vnclip_wv_i16m1_m(...) __riscv_vnclip_wv_i16m1_tumu(__VA_ARGS__)

#define	vnclip_wv_i16m2(...) __riscv_vnclip_wv_i16m2(__VA_ARGS__)

#define	vnclip_wv_i16m2_m(...) __riscv_vnclip_wv_i16m2_tumu(__VA_ARGS__)

#define	vnclip_wv_i16m4(...) __riscv_vnclip_wv_i16m4(__VA_ARGS__)

#define	vnclip_wv_i16m4_m(...) __riscv_vnclip_wv_i16m4_tumu(__VA_ARGS__)

#define	vnclip_wv_i16mf2(...) __riscv_vnclip_wv_i16mf2(__VA_ARGS__)

#define	vnclip_wv_i16mf2_m(...) __riscv_vnclip_wv_i16mf2_tumu(__VA_ARGS__)

#define	vnclip_wv_i16mf4(...) __riscv_vnclip_wv_i16mf4(__VA_ARGS__)

#define	vnclip_wv_i16mf4_m(...) __riscv_vnclip_wv_i16mf4_tumu(__VA_ARGS__)

#define	vnclip_wv_i32m1(...) __riscv_vnclip_wv_i32m1(__VA_ARGS__)

#define	vnclip_wv_i32m1_m(...) __riscv_vnclip_wv_i32m1_tumu(__VA_ARGS__)

#define	vnclip_wv_i32m2(...) __riscv_vnclip_wv_i32m2(__VA_ARGS__)

#define	vnclip_wv_i32m2_m(...) __riscv_vnclip_wv_i32m2_tumu(__VA_ARGS__)

#define	vnclip_wv_i32m4(...) __riscv_vnclip_wv_i32m4(__VA_ARGS__)

#define	vnclip_wv_i32m4_m(...) __riscv_vnclip_wv_i32m4_tumu(__VA_ARGS__)

#define	vnclip_wv_i32mf2(...) __riscv_vnclip_wv_i32mf2(__VA_ARGS__)

#define	vnclip_wv_i32mf2_m(...) __riscv_vnclip_wv_i32mf2_tumu(__VA_ARGS__)

#define	vnclip_wv_i8m1(...) __riscv_vnclip_wv_i8m1(__VA_ARGS__)

#define	vnclip_wv_i8m1_m(...) __riscv_vnclip_wv_i8m1_tumu(__VA_ARGS__)

#define	vnclip_wv_i8m2(...) __riscv_vnclip_wv_i8m2(__VA_ARGS__)

#define	vnclip_wv_i8m2_m(...) __riscv_vnclip_wv_i8m2_tumu(__VA_ARGS__)

#define	vnclip_wv_i8m4(...) __riscv_vnclip_wv_i8m4(__VA_ARGS__)

#define	vnclip_wv_i8m4_m(...) __riscv_vnclip_wv_i8m4_tumu(__VA_ARGS__)

#define	vnclip_wv_i8mf2(...) __riscv_vnclip_wv_i8mf2(__VA_ARGS__)

#define	vnclip_wv_i8mf2_m(...) __riscv_vnclip_wv_i8mf2_tumu(__VA_ARGS__)

#define	vnclip_wv_i8mf4(...) __riscv_vnclip_wv_i8mf4(__VA_ARGS__)

#define	vnclip_wv_i8mf4_m(...) __riscv_vnclip_wv_i8mf4_tumu(__VA_ARGS__)

#define	vnclip_wv_i8mf8(...) __riscv_vnclip_wv_i8mf8(__VA_ARGS__)

#define	vnclip_wv_i8mf8_m(...) __riscv_vnclip_wv_i8mf8_tumu(__VA_ARGS__)

#define	vnclip_wx_i16m1(...) __riscv_vnclip_wx_i16m1(__VA_ARGS__)

#define	vnclip_wx_i16m1_m(...) __riscv_vnclip_wx_i16m1_tumu(__VA_ARGS__)

#define	vnclip_wx_i16m2(...) __riscv_vnclip_wx_i16m2(__VA_ARGS__)

#define	vnclip_wx_i16m2_m(...) __riscv_vnclip_wx_i16m2_tumu(__VA_ARGS__)

#define	vnclip_wx_i16m4(...) __riscv_vnclip_wx_i16m4(__VA_ARGS__)

#define	vnclip_wx_i16m4_m(...) __riscv_vnclip_wx_i16m4_tumu(__VA_ARGS__)

#define	vnclip_wx_i16mf2(...) __riscv_vnclip_wx_i16mf2(__VA_ARGS__)

#define	vnclip_wx_i16mf2_m(...) __riscv_vnclip_wx_i16mf2_tumu(__VA_ARGS__)

#define	vnclip_wx_i16mf4(...) __riscv_vnclip_wx_i16mf4(__VA_ARGS__)

#define	vnclip_wx_i16mf4_m(...) __riscv_vnclip_wx_i16mf4_tumu(__VA_ARGS__)

#define	vnclip_wx_i32m1(...) __riscv_vnclip_wx_i32m1(__VA_ARGS__)

#define	vnclip_wx_i32m1_m(...) __riscv_vnclip_wx_i32m1_tumu(__VA_ARGS__)

#define	vnclip_wx_i32m2(...) __riscv_vnclip_wx_i32m2(__VA_ARGS__)

#define	vnclip_wx_i32m2_m(...) __riscv_vnclip_wx_i32m2_tumu(__VA_ARGS__)

#define	vnclip_wx_i32m4(...) __riscv_vnclip_wx_i32m4(__VA_ARGS__)

#define	vnclip_wx_i32m4_m(...) __riscv_vnclip_wx_i32m4_tumu(__VA_ARGS__)

#define	vnclip_wx_i32mf2(...) __riscv_vnclip_wx_i32mf2(__VA_ARGS__)

#define	vnclip_wx_i32mf2_m(...) __riscv_vnclip_wx_i32mf2_tumu(__VA_ARGS__)

#define	vnclip_wx_i8m1(...) __riscv_vnclip_wx_i8m1(__VA_ARGS__)

#define	vnclip_wx_i8m1_m(...) __riscv_vnclip_wx_i8m1_tumu(__VA_ARGS__)

#define	vnclip_wx_i8m2(...) __riscv_vnclip_wx_i8m2(__VA_ARGS__)

#define	vnclip_wx_i8m2_m(...) __riscv_vnclip_wx_i8m2_tumu(__VA_ARGS__)

#define	vnclip_wx_i8m4(...) __riscv_vnclip_wx_i8m4(__VA_ARGS__)

#define	vnclip_wx_i8m4_m(...) __riscv_vnclip_wx_i8m4_tumu(__VA_ARGS__)

#define	vnclip_wx_i8mf2(...) __riscv_vnclip_wx_i8mf2(__VA_ARGS__)

#define	vnclip_wx_i8mf2_m(...) __riscv_vnclip_wx_i8mf2_tumu(__VA_ARGS__)

#define	vnclip_wx_i8mf4(...) __riscv_vnclip_wx_i8mf4(__VA_ARGS__)

#define	vnclip_wx_i8mf4_m(...) __riscv_vnclip_wx_i8mf4_tumu(__VA_ARGS__)

#define	vnclip_wx_i8mf8(...) __riscv_vnclip_wx_i8mf8(__VA_ARGS__)

#define	vnclip_wx_i8mf8_m(...) __riscv_vnclip_wx_i8mf8_tumu(__VA_ARGS__)

#define	vnclipu_wv_u16m1(...) __riscv_vnclipu_wv_u16m1(__VA_ARGS__)

#define	vnclipu_wv_u16m1_m(...) __riscv_vnclipu_wv_u16m1_tumu(__VA_ARGS__)

#define	vnclipu_wv_u16m2(...) __riscv_vnclipu_wv_u16m2(__VA_ARGS__)

#define	vnclipu_wv_u16m2_m(...) __riscv_vnclipu_wv_u16m2_tumu(__VA_ARGS__)

#define	vnclipu_wv_u16m4(...) __riscv_vnclipu_wv_u16m4(__VA_ARGS__)

#define	vnclipu_wv_u16m4_m(...) __riscv_vnclipu_wv_u16m4_tumu(__VA_ARGS__)

#define	vnclipu_wv_u16mf2(...) __riscv_vnclipu_wv_u16mf2(__VA_ARGS__)

#define	vnclipu_wv_u16mf2_m(...) __riscv_vnclipu_wv_u16mf2_tumu(__VA_ARGS__)

#define	vnclipu_wv_u16mf4(...) __riscv_vnclipu_wv_u16mf4(__VA_ARGS__)

#define	vnclipu_wv_u16mf4_m(...) __riscv_vnclipu_wv_u16mf4_tumu(__VA_ARGS__)

#define	vnclipu_wv_u32m1(...) __riscv_vnclipu_wv_u32m1(__VA_ARGS__)

#define	vnclipu_wv_u32m1_m(...) __riscv_vnclipu_wv_u32m1_tumu(__VA_ARGS__)

#define	vnclipu_wv_u32m2(...) __riscv_vnclipu_wv_u32m2(__VA_ARGS__)

#define	vnclipu_wv_u32m2_m(...) __riscv_vnclipu_wv_u32m2_tumu(__VA_ARGS__)

#define	vnclipu_wv_u32m4(...) __riscv_vnclipu_wv_u32m4(__VA_ARGS__)

#define	vnclipu_wv_u32m4_m(...) __riscv_vnclipu_wv_u32m4_tumu(__VA_ARGS__)

#define	vnclipu_wv_u32mf2(...) __riscv_vnclipu_wv_u32mf2(__VA_ARGS__)

#define	vnclipu_wv_u32mf2_m(...) __riscv_vnclipu_wv_u32mf2_tumu(__VA_ARGS__)

#define	vnclipu_wv_u8m1(...) __riscv_vnclipu_wv_u8m1(__VA_ARGS__)

#define	vnclipu_wv_u8m1_m(...) __riscv_vnclipu_wv_u8m1_tumu(__VA_ARGS__)

#define	vnclipu_wv_u8m2(...) __riscv_vnclipu_wv_u8m2(__VA_ARGS__)

#define	vnclipu_wv_u8m2_m(...) __riscv_vnclipu_wv_u8m2_tumu(__VA_ARGS__)

#define	vnclipu_wv_u8m4(...) __riscv_vnclipu_wv_u8m4(__VA_ARGS__)

#define	vnclipu_wv_u8m4_m(...) __riscv_vnclipu_wv_u8m4_tumu(__VA_ARGS__)

#define	vnclipu_wv_u8mf2(...) __riscv_vnclipu_wv_u8mf2(__VA_ARGS__)

#define	vnclipu_wv_u8mf2_m(...) __riscv_vnclipu_wv_u8mf2_tumu(__VA_ARGS__)

#define	vnclipu_wv_u8mf4(...) __riscv_vnclipu_wv_u8mf4(__VA_ARGS__)

#define	vnclipu_wv_u8mf4_m(...) __riscv_vnclipu_wv_u8mf4_tumu(__VA_ARGS__)

#define	vnclipu_wv_u8mf8(...) __riscv_vnclipu_wv_u8mf8(__VA_ARGS__)

#define	vnclipu_wv_u8mf8_m(...) __riscv_vnclipu_wv_u8mf8_tumu(__VA_ARGS__)

#define	vnclipu_wx_u16m1(...) __riscv_vnclipu_wx_u16m1(__VA_ARGS__)

#define	vnclipu_wx_u16m1_m(...) __riscv_vnclipu_wx_u16m1_tumu(__VA_ARGS__)

#define	vnclipu_wx_u16m2(...) __riscv_vnclipu_wx_u16m2(__VA_ARGS__)

#define	vnclipu_wx_u16m2_m(...) __riscv_vnclipu_wx_u16m2_tumu(__VA_ARGS__)

#define	vnclipu_wx_u16m4(...) __riscv_vnclipu_wx_u16m4(__VA_ARGS__)

#define	vnclipu_wx_u16m4_m(...) __riscv_vnclipu_wx_u16m4_tumu(__VA_ARGS__)

#define	vnclipu_wx_u16mf2(...) __riscv_vnclipu_wx_u16mf2(__VA_ARGS__)

#define	vnclipu_wx_u16mf2_m(...) __riscv_vnclipu_wx_u16mf2_tumu(__VA_ARGS__)

#define	vnclipu_wx_u16mf4(...) __riscv_vnclipu_wx_u16mf4(__VA_ARGS__)

#define	vnclipu_wx_u16mf4_m(...) __riscv_vnclipu_wx_u16mf4_tumu(__VA_ARGS__)

#define	vnclipu_wx_u32m1(...) __riscv_vnclipu_wx_u32m1(__VA_ARGS__)

#define	vnclipu_wx_u32m1_m(...) __riscv_vnclipu_wx_u32m1_tumu(__VA_ARGS__)

#define	vnclipu_wx_u32m2(...) __riscv_vnclipu_wx_u32m2(__VA_ARGS__)

#define	vnclipu_wx_u32m2_m(...) __riscv_vnclipu_wx_u32m2_tumu(__VA_ARGS__)

#define	vnclipu_wx_u32m4(...) __riscv_vnclipu_wx_u32m4(__VA_ARGS__)

#define	vnclipu_wx_u32m4_m(...) __riscv_vnclipu_wx_u32m4_tumu(__VA_ARGS__)

#define	vnclipu_wx_u32mf2(...) __riscv_vnclipu_wx_u32mf2(__VA_ARGS__)

#define	vnclipu_wx_u32mf2_m(...) __riscv_vnclipu_wx_u32mf2_tumu(__VA_ARGS__)

#define	vnclipu_wx_u8m1(...) __riscv_vnclipu_wx_u8m1(__VA_ARGS__)

#define	vnclipu_wx_u8m1_m(...) __riscv_vnclipu_wx_u8m1_tumu(__VA_ARGS__)

#define	vnclipu_wx_u8m2(...) __riscv_vnclipu_wx_u8m2(__VA_ARGS__)

#define	vnclipu_wx_u8m2_m(...) __riscv_vnclipu_wx_u8m2_tumu(__VA_ARGS__)

#define	vnclipu_wx_u8m4(...) __riscv_vnclipu_wx_u8m4(__VA_ARGS__)

#define	vnclipu_wx_u8m4_m(...) __riscv_vnclipu_wx_u8m4_tumu(__VA_ARGS__)

#define	vnclipu_wx_u8mf2(...) __riscv_vnclipu_wx_u8mf2(__VA_ARGS__)

#define	vnclipu_wx_u8mf2_m(...) __riscv_vnclipu_wx_u8mf2_tumu(__VA_ARGS__)

#define	vnclipu_wx_u8mf4(...) __riscv_vnclipu_wx_u8mf4(__VA_ARGS__)

#define	vnclipu_wx_u8mf4_m(...) __riscv_vnclipu_wx_u8mf4_tumu(__VA_ARGS__)

#define	vnclipu_wx_u8mf8(...) __riscv_vnclipu_wx_u8mf8(__VA_ARGS__)

#define	vnclipu_wx_u8mf8_m(...) __riscv_vnclipu_wx_u8mf8_tumu(__VA_ARGS__)

#define	vncvt_x_x_w_i16m1(...) __riscv_vncvt_x_x_w_i16m1(__VA_ARGS__)

#define	vncvt_x_x_w_i16m1_m(...) __riscv_vncvt_x_x_w_i16m1_tumu(__VA_ARGS__)

#define	vncvt_x_x_w_i16m2(...) __riscv_vncvt_x_x_w_i16m2(__VA_ARGS__)

#define	vncvt_x_x_w_i16m2_m(...) __riscv_vncvt_x_x_w_i16m2_tumu(__VA_ARGS__)

#define	vncvt_x_x_w_i16m4(...) __riscv_vncvt_x_x_w_i16m4(__VA_ARGS__)

#define	vncvt_x_x_w_i16m4_m(...) __riscv_vncvt_x_x_w_i16m4_tumu(__VA_ARGS__)

#define	vncvt_x_x_w_i16mf2(...) __riscv_vncvt_x_x_w_i16mf2(__VA_ARGS__)

#define	vncvt_x_x_w_i16mf2_m(...) __riscv_vncvt_x_x_w_i16mf2_tumu(__VA_ARGS__)

#define	vncvt_x_x_w_i16mf4(...) __riscv_vncvt_x_x_w_i16mf4(__VA_ARGS__)

#define	vncvt_x_x_w_i16mf4_m(...) __riscv_vncvt_x_x_w_i16mf4_tumu(__VA_ARGS__)

#define	vncvt_x_x_w_i32m1(...) __riscv_vncvt_x_x_w_i32m1(__VA_ARGS__)

#define	vncvt_x_x_w_i32m1_m(...) __riscv_vncvt_x_x_w_i32m1_tumu(__VA_ARGS__)

#define	vncvt_x_x_w_i32m2(...) __riscv_vncvt_x_x_w_i32m2(__VA_ARGS__)

#define	vncvt_x_x_w_i32m2_m(...) __riscv_vncvt_x_x_w_i32m2_tumu(__VA_ARGS__)

#define	vncvt_x_x_w_i32m4(...) __riscv_vncvt_x_x_w_i32m4(__VA_ARGS__)

#define	vncvt_x_x_w_i32m4_m(...) __riscv_vncvt_x_x_w_i32m4_tumu(__VA_ARGS__)

#define	vncvt_x_x_w_i32mf2(...) __riscv_vncvt_x_x_w_i32mf2(__VA_ARGS__)

#define	vncvt_x_x_w_i32mf2_m(...) __riscv_vncvt_x_x_w_i32mf2_tumu(__VA_ARGS__)

#define	vncvt_x_x_w_i8m1(...) __riscv_vncvt_x_x_w_i8m1(__VA_ARGS__)

#define	vncvt_x_x_w_i8m1_m(...) __riscv_vncvt_x_x_w_i8m1_tumu(__VA_ARGS__)

#define	vncvt_x_x_w_i8m2(...) __riscv_vncvt_x_x_w_i8m2(__VA_ARGS__)

#define	vncvt_x_x_w_i8m2_m(...) __riscv_vncvt_x_x_w_i8m2_tumu(__VA_ARGS__)

#define	vncvt_x_x_w_i8m4(...) __riscv_vncvt_x_x_w_i8m4(__VA_ARGS__)

#define	vncvt_x_x_w_i8m4_m(...) __riscv_vncvt_x_x_w_i8m4_tumu(__VA_ARGS__)

#define	vncvt_x_x_w_i8mf2(...) __riscv_vncvt_x_x_w_i8mf2(__VA_ARGS__)

#define	vncvt_x_x_w_i8mf2_m(...) __riscv_vncvt_x_x_w_i8mf2_tumu(__VA_ARGS__)

#define	vncvt_x_x_w_i8mf4(...) __riscv_vncvt_x_x_w_i8mf4(__VA_ARGS__)

#define	vncvt_x_x_w_i8mf4_m(...) __riscv_vncvt_x_x_w_i8mf4_tumu(__VA_ARGS__)

#define	vncvt_x_x_w_i8mf8(...) __riscv_vncvt_x_x_w_i8mf8(__VA_ARGS__)

#define	vncvt_x_x_w_i8mf8_m(...) __riscv_vncvt_x_x_w_i8mf8_tumu(__VA_ARGS__)

#define	vncvt_x_x_w_u16m1(...) __riscv_vncvt_x_x_w_u16m1(__VA_ARGS__)

#define	vncvt_x_x_w_u16m1_m(...) __riscv_vncvt_x_x_w_u16m1_tumu(__VA_ARGS__)

#define	vncvt_x_x_w_u16m2(...) __riscv_vncvt_x_x_w_u16m2(__VA_ARGS__)

#define	vncvt_x_x_w_u16m2_m(...) __riscv_vncvt_x_x_w_u16m2_tumu(__VA_ARGS__)

#define	vncvt_x_x_w_u16m4(...) __riscv_vncvt_x_x_w_u16m4(__VA_ARGS__)

#define	vncvt_x_x_w_u16m4_m(...) __riscv_vncvt_x_x_w_u16m4_tumu(__VA_ARGS__)

#define	vncvt_x_x_w_u16mf2(...) __riscv_vncvt_x_x_w_u16mf2(__VA_ARGS__)

#define	vncvt_x_x_w_u16mf2_m(...) __riscv_vncvt_x_x_w_u16mf2_tumu(__VA_ARGS__)

#define	vncvt_x_x_w_u16mf4(...) __riscv_vncvt_x_x_w_u16mf4(__VA_ARGS__)

#define	vncvt_x_x_w_u16mf4_m(...) __riscv_vncvt_x_x_w_u16mf4_tumu(__VA_ARGS__)

#define	vncvt_x_x_w_u32m1(...) __riscv_vncvt_x_x_w_u32m1(__VA_ARGS__)

#define	vncvt_x_x_w_u32m1_m(...) __riscv_vncvt_x_x_w_u32m1_tumu(__VA_ARGS__)

#define	vncvt_x_x_w_u32m2(...) __riscv_vncvt_x_x_w_u32m2(__VA_ARGS__)

#define	vncvt_x_x_w_u32m2_m(...) __riscv_vncvt_x_x_w_u32m2_tumu(__VA_ARGS__)

#define	vncvt_x_x_w_u32m4(...) __riscv_vncvt_x_x_w_u32m4(__VA_ARGS__)

#define	vncvt_x_x_w_u32m4_m(...) __riscv_vncvt_x_x_w_u32m4_tumu(__VA_ARGS__)

#define	vncvt_x_x_w_u32mf2(...) __riscv_vncvt_x_x_w_u32mf2(__VA_ARGS__)

#define	vncvt_x_x_w_u32mf2_m(...) __riscv_vncvt_x_x_w_u32mf2_tumu(__VA_ARGS__)

#define	vncvt_x_x_w_u8m1(...) __riscv_vncvt_x_x_w_u8m1(__VA_ARGS__)

#define	vncvt_x_x_w_u8m1_m(...) __riscv_vncvt_x_x_w_u8m1_tumu(__VA_ARGS__)

#define	vncvt_x_x_w_u8m2(...) __riscv_vncvt_x_x_w_u8m2(__VA_ARGS__)

#define	vncvt_x_x_w_u8m2_m(...) __riscv_vncvt_x_x_w_u8m2_tumu(__VA_ARGS__)

#define	vncvt_x_x_w_u8m4(...) __riscv_vncvt_x_x_w_u8m4(__VA_ARGS__)

#define	vncvt_x_x_w_u8m4_m(...) __riscv_vncvt_x_x_w_u8m4_tumu(__VA_ARGS__)

#define	vncvt_x_x_w_u8mf2(...) __riscv_vncvt_x_x_w_u8mf2(__VA_ARGS__)

#define	vncvt_x_x_w_u8mf2_m(...) __riscv_vncvt_x_x_w_u8mf2_tumu(__VA_ARGS__)

#define	vncvt_x_x_w_u8mf4(...) __riscv_vncvt_x_x_w_u8mf4(__VA_ARGS__)

#define	vncvt_x_x_w_u8mf4_m(...) __riscv_vncvt_x_x_w_u8mf4_tumu(__VA_ARGS__)

#define	vncvt_x_x_w_u8mf8(...) __riscv_vncvt_x_x_w_u8mf8(__VA_ARGS__)

#define	vncvt_x_x_w_u8mf8_m(...) __riscv_vncvt_x_x_w_u8mf8_tumu(__VA_ARGS__)

#define	vneg_v_i16m1(...) __riscv_vneg_v_i16m1(__VA_ARGS__)

#define	vneg_v_i16m1_m(...) __riscv_vneg_v_i16m1_tumu(__VA_ARGS__)

#define	vneg_v_i16m2(...) __riscv_vneg_v_i16m2(__VA_ARGS__)

#define	vneg_v_i16m2_m(...) __riscv_vneg_v_i16m2_tumu(__VA_ARGS__)

#define	vneg_v_i16m4(...) __riscv_vneg_v_i16m4(__VA_ARGS__)

#define	vneg_v_i16m4_m(...) __riscv_vneg_v_i16m4_tumu(__VA_ARGS__)

#define	vneg_v_i16m8(...) __riscv_vneg_v_i16m8(__VA_ARGS__)

#define	vneg_v_i16m8_m(...) __riscv_vneg_v_i16m8_tumu(__VA_ARGS__)

#define	vneg_v_i16mf2(...) __riscv_vneg_v_i16mf2(__VA_ARGS__)

#define	vneg_v_i16mf2_m(...) __riscv_vneg_v_i16mf2_tumu(__VA_ARGS__)

#define	vneg_v_i16mf4(...) __riscv_vneg_v_i16mf4(__VA_ARGS__)

#define	vneg_v_i16mf4_m(...) __riscv_vneg_v_i16mf4_tumu(__VA_ARGS__)

#define	vneg_v_i32m1(...) __riscv_vneg_v_i32m1(__VA_ARGS__)

#define	vneg_v_i32m1_m(...) __riscv_vneg_v_i32m1_tumu(__VA_ARGS__)

#define	vneg_v_i32m2(...) __riscv_vneg_v_i32m2(__VA_ARGS__)

#define	vneg_v_i32m2_m(...) __riscv_vneg_v_i32m2_tumu(__VA_ARGS__)

#define	vneg_v_i32m4(...) __riscv_vneg_v_i32m4(__VA_ARGS__)

#define	vneg_v_i32m4_m(...) __riscv_vneg_v_i32m4_tumu(__VA_ARGS__)

#define	vneg_v_i32m8(...) __riscv_vneg_v_i32m8(__VA_ARGS__)

#define	vneg_v_i32m8_m(...) __riscv_vneg_v_i32m8_tumu(__VA_ARGS__)

#define	vneg_v_i32mf2(...) __riscv_vneg_v_i32mf2(__VA_ARGS__)

#define	vneg_v_i32mf2_m(...) __riscv_vneg_v_i32mf2_tumu(__VA_ARGS__)

#define	vneg_v_i64m1(...) __riscv_vneg_v_i64m1(__VA_ARGS__)

#define	vneg_v_i64m1_m(...) __riscv_vneg_v_i64m1_tumu(__VA_ARGS__)

#define	vneg_v_i64m2(...) __riscv_vneg_v_i64m2(__VA_ARGS__)

#define	vneg_v_i64m2_m(...) __riscv_vneg_v_i64m2_tumu(__VA_ARGS__)

#define	vneg_v_i64m4(...) __riscv_vneg_v_i64m4(__VA_ARGS__)

#define	vneg_v_i64m4_m(...) __riscv_vneg_v_i64m4_tumu(__VA_ARGS__)

#define	vneg_v_i64m8(...) __riscv_vneg_v_i64m8(__VA_ARGS__)

#define	vneg_v_i64m8_m(...) __riscv_vneg_v_i64m8_tumu(__VA_ARGS__)

#define	vneg_v_i8m1(...) __riscv_vneg_v_i8m1(__VA_ARGS__)

#define	vneg_v_i8m1_m(...) __riscv_vneg_v_i8m1_tumu(__VA_ARGS__)

#define	vneg_v_i8m2(...) __riscv_vneg_v_i8m2(__VA_ARGS__)

#define	vneg_v_i8m2_m(...) __riscv_vneg_v_i8m2_tumu(__VA_ARGS__)

#define	vneg_v_i8m4(...) __riscv_vneg_v_i8m4(__VA_ARGS__)

#define	vneg_v_i8m4_m(...) __riscv_vneg_v_i8m4_tumu(__VA_ARGS__)

#define	vneg_v_i8m8(...) __riscv_vneg_v_i8m8(__VA_ARGS__)

#define	vneg_v_i8m8_m(...) __riscv_vneg_v_i8m8_tumu(__VA_ARGS__)

#define	vneg_v_i8mf2(...) __riscv_vneg_v_i8mf2(__VA_ARGS__)

#define	vneg_v_i8mf2_m(...) __riscv_vneg_v_i8mf2_tumu(__VA_ARGS__)

#define	vneg_v_i8mf4(...) __riscv_vneg_v_i8mf4(__VA_ARGS__)

#define	vneg_v_i8mf4_m(...) __riscv_vneg_v_i8mf4_tumu(__VA_ARGS__)

#define	vneg_v_i8mf8(...) __riscv_vneg_v_i8mf8(__VA_ARGS__)

#define	vneg_v_i8mf8_m(...) __riscv_vneg_v_i8mf8_tumu(__VA_ARGS__)

#define	vnmsac_vv_i16m1(...) __riscv_vnmsac_vv_i16m1_tu(__VA_ARGS__)

#define	vnmsac_vv_i16m1_m(...) __riscv_vnmsac_vv_i16m1_tumu(__VA_ARGS__)

#define	vnmsac_vv_i16m2(...) __riscv_vnmsac_vv_i16m2_tu(__VA_ARGS__)

#define	vnmsac_vv_i16m2_m(...) __riscv_vnmsac_vv_i16m2_tumu(__VA_ARGS__)

#define	vnmsac_vv_i16m4(...) __riscv_vnmsac_vv_i16m4_tu(__VA_ARGS__)

#define	vnmsac_vv_i16m4_m(...) __riscv_vnmsac_vv_i16m4_tumu(__VA_ARGS__)

#define	vnmsac_vv_i16m8(...) __riscv_vnmsac_vv_i16m8_tu(__VA_ARGS__)

#define	vnmsac_vv_i16m8_m(...) __riscv_vnmsac_vv_i16m8_tumu(__VA_ARGS__)

#define	vnmsac_vv_i16mf2(...) __riscv_vnmsac_vv_i16mf2_tu(__VA_ARGS__)

#define	vnmsac_vv_i16mf2_m(...) __riscv_vnmsac_vv_i16mf2_tumu(__VA_ARGS__)

#define	vnmsac_vv_i16mf4(...) __riscv_vnmsac_vv_i16mf4_tu(__VA_ARGS__)

#define	vnmsac_vv_i16mf4_m(...) __riscv_vnmsac_vv_i16mf4_tumu(__VA_ARGS__)

#define	vnmsac_vv_i32m1(...) __riscv_vnmsac_vv_i32m1_tu(__VA_ARGS__)

#define	vnmsac_vv_i32m1_m(...) __riscv_vnmsac_vv_i32m1_tumu(__VA_ARGS__)

#define	vnmsac_vv_i32m2(...) __riscv_vnmsac_vv_i32m2_tu(__VA_ARGS__)

#define	vnmsac_vv_i32m2_m(...) __riscv_vnmsac_vv_i32m2_tumu(__VA_ARGS__)

#define	vnmsac_vv_i32m4(...) __riscv_vnmsac_vv_i32m4_tu(__VA_ARGS__)

#define	vnmsac_vv_i32m4_m(...) __riscv_vnmsac_vv_i32m4_tumu(__VA_ARGS__)

#define	vnmsac_vv_i32m8(...) __riscv_vnmsac_vv_i32m8_tu(__VA_ARGS__)

#define	vnmsac_vv_i32m8_m(...) __riscv_vnmsac_vv_i32m8_tumu(__VA_ARGS__)

#define	vnmsac_vv_i32mf2(...) __riscv_vnmsac_vv_i32mf2_tu(__VA_ARGS__)

#define	vnmsac_vv_i32mf2_m(...) __riscv_vnmsac_vv_i32mf2_tumu(__VA_ARGS__)

#define	vnmsac_vv_i64m1(...) __riscv_vnmsac_vv_i64m1_tu(__VA_ARGS__)

#define	vnmsac_vv_i64m1_m(...) __riscv_vnmsac_vv_i64m1_tumu(__VA_ARGS__)

#define	vnmsac_vv_i64m2(...) __riscv_vnmsac_vv_i64m2_tu(__VA_ARGS__)

#define	vnmsac_vv_i64m2_m(...) __riscv_vnmsac_vv_i64m2_tumu(__VA_ARGS__)

#define	vnmsac_vv_i64m4(...) __riscv_vnmsac_vv_i64m4_tu(__VA_ARGS__)

#define	vnmsac_vv_i64m4_m(...) __riscv_vnmsac_vv_i64m4_tumu(__VA_ARGS__)

#define	vnmsac_vv_i64m8(...) __riscv_vnmsac_vv_i64m8_tu(__VA_ARGS__)

#define	vnmsac_vv_i64m8_m(...) __riscv_vnmsac_vv_i64m8_tumu(__VA_ARGS__)

#define	vnmsac_vv_i8m1(...) __riscv_vnmsac_vv_i8m1_tu(__VA_ARGS__)

#define	vnmsac_vv_i8m1_m(...) __riscv_vnmsac_vv_i8m1_tumu(__VA_ARGS__)

#define	vnmsac_vv_i8m2(...) __riscv_vnmsac_vv_i8m2_tu(__VA_ARGS__)

#define	vnmsac_vv_i8m2_m(...) __riscv_vnmsac_vv_i8m2_tumu(__VA_ARGS__)

#define	vnmsac_vv_i8m4(...) __riscv_vnmsac_vv_i8m4_tu(__VA_ARGS__)

#define	vnmsac_vv_i8m4_m(...) __riscv_vnmsac_vv_i8m4_tumu(__VA_ARGS__)

#define	vnmsac_vv_i8m8(...) __riscv_vnmsac_vv_i8m8_tu(__VA_ARGS__)

#define	vnmsac_vv_i8m8_m(...) __riscv_vnmsac_vv_i8m8_tumu(__VA_ARGS__)

#define	vnmsac_vv_i8mf2(...) __riscv_vnmsac_vv_i8mf2_tu(__VA_ARGS__)

#define	vnmsac_vv_i8mf2_m(...) __riscv_vnmsac_vv_i8mf2_tumu(__VA_ARGS__)

#define	vnmsac_vv_i8mf4(...) __riscv_vnmsac_vv_i8mf4_tu(__VA_ARGS__)

#define	vnmsac_vv_i8mf4_m(...) __riscv_vnmsac_vv_i8mf4_tumu(__VA_ARGS__)

#define	vnmsac_vv_i8mf8(...) __riscv_vnmsac_vv_i8mf8_tu(__VA_ARGS__)

#define	vnmsac_vv_i8mf8_m(...) __riscv_vnmsac_vv_i8mf8_tumu(__VA_ARGS__)

#define	vnmsac_vv_u16m1(...) __riscv_vnmsac_vv_u16m1_tu(__VA_ARGS__)

#define	vnmsac_vv_u16m1_m(...) __riscv_vnmsac_vv_u16m1_tumu(__VA_ARGS__)

#define	vnmsac_vv_u16m2(...) __riscv_vnmsac_vv_u16m2_tu(__VA_ARGS__)

#define	vnmsac_vv_u16m2_m(...) __riscv_vnmsac_vv_u16m2_tumu(__VA_ARGS__)

#define	vnmsac_vv_u16m4(...) __riscv_vnmsac_vv_u16m4_tu(__VA_ARGS__)

#define	vnmsac_vv_u16m4_m(...) __riscv_vnmsac_vv_u16m4_tumu(__VA_ARGS__)

#define	vnmsac_vv_u16m8(...) __riscv_vnmsac_vv_u16m8_tu(__VA_ARGS__)

#define	vnmsac_vv_u16m8_m(...) __riscv_vnmsac_vv_u16m8_tumu(__VA_ARGS__)

#define	vnmsac_vv_u16mf2(...) __riscv_vnmsac_vv_u16mf2_tu(__VA_ARGS__)

#define	vnmsac_vv_u16mf2_m(...) __riscv_vnmsac_vv_u16mf2_tumu(__VA_ARGS__)

#define	vnmsac_vv_u16mf4(...) __riscv_vnmsac_vv_u16mf4_tu(__VA_ARGS__)

#define	vnmsac_vv_u16mf4_m(...) __riscv_vnmsac_vv_u16mf4_tumu(__VA_ARGS__)

#define	vnmsac_vv_u32m1(...) __riscv_vnmsac_vv_u32m1_tu(__VA_ARGS__)

#define	vnmsac_vv_u32m1_m(...) __riscv_vnmsac_vv_u32m1_tumu(__VA_ARGS__)

#define	vnmsac_vv_u32m2(...) __riscv_vnmsac_vv_u32m2_tu(__VA_ARGS__)

#define	vnmsac_vv_u32m2_m(...) __riscv_vnmsac_vv_u32m2_tumu(__VA_ARGS__)

#define	vnmsac_vv_u32m4(...) __riscv_vnmsac_vv_u32m4_tu(__VA_ARGS__)

#define	vnmsac_vv_u32m4_m(...) __riscv_vnmsac_vv_u32m4_tumu(__VA_ARGS__)

#define	vnmsac_vv_u32m8(...) __riscv_vnmsac_vv_u32m8_tu(__VA_ARGS__)

#define	vnmsac_vv_u32m8_m(...) __riscv_vnmsac_vv_u32m8_tumu(__VA_ARGS__)

#define	vnmsac_vv_u32mf2(...) __riscv_vnmsac_vv_u32mf2_tu(__VA_ARGS__)

#define	vnmsac_vv_u32mf2_m(...) __riscv_vnmsac_vv_u32mf2_tumu(__VA_ARGS__)

#define	vnmsac_vv_u64m1(...) __riscv_vnmsac_vv_u64m1_tu(__VA_ARGS__)

#define	vnmsac_vv_u64m1_m(...) __riscv_vnmsac_vv_u64m1_tumu(__VA_ARGS__)

#define	vnmsac_vv_u64m2(...) __riscv_vnmsac_vv_u64m2_tu(__VA_ARGS__)

#define	vnmsac_vv_u64m2_m(...) __riscv_vnmsac_vv_u64m2_tumu(__VA_ARGS__)

#define	vnmsac_vv_u64m4(...) __riscv_vnmsac_vv_u64m4_tu(__VA_ARGS__)

#define	vnmsac_vv_u64m4_m(...) __riscv_vnmsac_vv_u64m4_tumu(__VA_ARGS__)

#define	vnmsac_vv_u64m8(...) __riscv_vnmsac_vv_u64m8_tu(__VA_ARGS__)

#define	vnmsac_vv_u64m8_m(...) __riscv_vnmsac_vv_u64m8_tumu(__VA_ARGS__)

#define	vnmsac_vv_u8m1(...) __riscv_vnmsac_vv_u8m1_tu(__VA_ARGS__)

#define	vnmsac_vv_u8m1_m(...) __riscv_vnmsac_vv_u8m1_tumu(__VA_ARGS__)

#define	vnmsac_vv_u8m2(...) __riscv_vnmsac_vv_u8m2_tu(__VA_ARGS__)

#define	vnmsac_vv_u8m2_m(...) __riscv_vnmsac_vv_u8m2_tumu(__VA_ARGS__)

#define	vnmsac_vv_u8m4(...) __riscv_vnmsac_vv_u8m4_tu(__VA_ARGS__)

#define	vnmsac_vv_u8m4_m(...) __riscv_vnmsac_vv_u8m4_tumu(__VA_ARGS__)

#define	vnmsac_vv_u8m8(...) __riscv_vnmsac_vv_u8m8_tu(__VA_ARGS__)

#define	vnmsac_vv_u8m8_m(...) __riscv_vnmsac_vv_u8m8_tumu(__VA_ARGS__)

#define	vnmsac_vv_u8mf2(...) __riscv_vnmsac_vv_u8mf2_tu(__VA_ARGS__)

#define	vnmsac_vv_u8mf2_m(...) __riscv_vnmsac_vv_u8mf2_tumu(__VA_ARGS__)

#define	vnmsac_vv_u8mf4(...) __riscv_vnmsac_vv_u8mf4_tu(__VA_ARGS__)

#define	vnmsac_vv_u8mf4_m(...) __riscv_vnmsac_vv_u8mf4_tumu(__VA_ARGS__)

#define	vnmsac_vv_u8mf8(...) __riscv_vnmsac_vv_u8mf8_tu(__VA_ARGS__)

#define	vnmsac_vv_u8mf8_m(...) __riscv_vnmsac_vv_u8mf8_tumu(__VA_ARGS__)

#define	vnmsac_vx_i16m1(...) __riscv_vnmsac_vx_i16m1_tu(__VA_ARGS__)

#define	vnmsac_vx_i16m1_m(...) __riscv_vnmsac_vx_i16m1_tumu(__VA_ARGS__)

#define	vnmsac_vx_i16m2(...) __riscv_vnmsac_vx_i16m2_tu(__VA_ARGS__)

#define	vnmsac_vx_i16m2_m(...) __riscv_vnmsac_vx_i16m2_tumu(__VA_ARGS__)

#define	vnmsac_vx_i16m4(...) __riscv_vnmsac_vx_i16m4_tu(__VA_ARGS__)

#define	vnmsac_vx_i16m4_m(...) __riscv_vnmsac_vx_i16m4_tumu(__VA_ARGS__)

#define	vnmsac_vx_i16m8(...) __riscv_vnmsac_vx_i16m8_tu(__VA_ARGS__)

#define	vnmsac_vx_i16m8_m(...) __riscv_vnmsac_vx_i16m8_tumu(__VA_ARGS__)

#define	vnmsac_vx_i16mf2(...) __riscv_vnmsac_vx_i16mf2_tu(__VA_ARGS__)

#define	vnmsac_vx_i16mf2_m(...) __riscv_vnmsac_vx_i16mf2_tumu(__VA_ARGS__)

#define	vnmsac_vx_i16mf4(...) __riscv_vnmsac_vx_i16mf4_tu(__VA_ARGS__)

#define	vnmsac_vx_i16mf4_m(...) __riscv_vnmsac_vx_i16mf4_tumu(__VA_ARGS__)

#define	vnmsac_vx_i32m1(...) __riscv_vnmsac_vx_i32m1_tu(__VA_ARGS__)

#define	vnmsac_vx_i32m1_m(...) __riscv_vnmsac_vx_i32m1_tumu(__VA_ARGS__)

#define	vnmsac_vx_i32m2(...) __riscv_vnmsac_vx_i32m2_tu(__VA_ARGS__)

#define	vnmsac_vx_i32m2_m(...) __riscv_vnmsac_vx_i32m2_tumu(__VA_ARGS__)

#define	vnmsac_vx_i32m4(...) __riscv_vnmsac_vx_i32m4_tu(__VA_ARGS__)

#define	vnmsac_vx_i32m4_m(...) __riscv_vnmsac_vx_i32m4_tumu(__VA_ARGS__)

#define	vnmsac_vx_i32m8(...) __riscv_vnmsac_vx_i32m8_tu(__VA_ARGS__)

#define	vnmsac_vx_i32m8_m(...) __riscv_vnmsac_vx_i32m8_tumu(__VA_ARGS__)

#define	vnmsac_vx_i32mf2(...) __riscv_vnmsac_vx_i32mf2_tu(__VA_ARGS__)

#define	vnmsac_vx_i32mf2_m(...) __riscv_vnmsac_vx_i32mf2_tumu(__VA_ARGS__)

#define	vnmsac_vx_i64m1(...) __riscv_vnmsac_vx_i64m1_tu(__VA_ARGS__)

#define	vnmsac_vx_i64m1_m(...) __riscv_vnmsac_vx_i64m1_tumu(__VA_ARGS__)

#define	vnmsac_vx_i64m2(...) __riscv_vnmsac_vx_i64m2_tu(__VA_ARGS__)

#define	vnmsac_vx_i64m2_m(...) __riscv_vnmsac_vx_i64m2_tumu(__VA_ARGS__)

#define	vnmsac_vx_i64m4(...) __riscv_vnmsac_vx_i64m4_tu(__VA_ARGS__)

#define	vnmsac_vx_i64m4_m(...) __riscv_vnmsac_vx_i64m4_tumu(__VA_ARGS__)

#define	vnmsac_vx_i64m8(...) __riscv_vnmsac_vx_i64m8_tu(__VA_ARGS__)

#define	vnmsac_vx_i64m8_m(...) __riscv_vnmsac_vx_i64m8_tumu(__VA_ARGS__)

#define	vnmsac_vx_i8m1(...) __riscv_vnmsac_vx_i8m1_tu(__VA_ARGS__)

#define	vnmsac_vx_i8m1_m(...) __riscv_vnmsac_vx_i8m1_tumu(__VA_ARGS__)

#define	vnmsac_vx_i8m2(...) __riscv_vnmsac_vx_i8m2_tu(__VA_ARGS__)

#define	vnmsac_vx_i8m2_m(...) __riscv_vnmsac_vx_i8m2_tumu(__VA_ARGS__)

#define	vnmsac_vx_i8m4(...) __riscv_vnmsac_vx_i8m4_tu(__VA_ARGS__)

#define	vnmsac_vx_i8m4_m(...) __riscv_vnmsac_vx_i8m4_tumu(__VA_ARGS__)

#define	vnmsac_vx_i8m8(...) __riscv_vnmsac_vx_i8m8_tu(__VA_ARGS__)

#define	vnmsac_vx_i8m8_m(...) __riscv_vnmsac_vx_i8m8_tumu(__VA_ARGS__)

#define	vnmsac_vx_i8mf2(...) __riscv_vnmsac_vx_i8mf2_tu(__VA_ARGS__)

#define	vnmsac_vx_i8mf2_m(...) __riscv_vnmsac_vx_i8mf2_tumu(__VA_ARGS__)

#define	vnmsac_vx_i8mf4(...) __riscv_vnmsac_vx_i8mf4_tu(__VA_ARGS__)

#define	vnmsac_vx_i8mf4_m(...) __riscv_vnmsac_vx_i8mf4_tumu(__VA_ARGS__)

#define	vnmsac_vx_i8mf8(...) __riscv_vnmsac_vx_i8mf8_tu(__VA_ARGS__)

#define	vnmsac_vx_i8mf8_m(...) __riscv_vnmsac_vx_i8mf8_tumu(__VA_ARGS__)

#define	vnmsac_vx_u16m1(...) __riscv_vnmsac_vx_u16m1_tu(__VA_ARGS__)

#define	vnmsac_vx_u16m1_m(...) __riscv_vnmsac_vx_u16m1_tumu(__VA_ARGS__)

#define	vnmsac_vx_u16m2(...) __riscv_vnmsac_vx_u16m2_tu(__VA_ARGS__)

#define	vnmsac_vx_u16m2_m(...) __riscv_vnmsac_vx_u16m2_tumu(__VA_ARGS__)

#define	vnmsac_vx_u16m4(...) __riscv_vnmsac_vx_u16m4_tu(__VA_ARGS__)

#define	vnmsac_vx_u16m4_m(...) __riscv_vnmsac_vx_u16m4_tumu(__VA_ARGS__)

#define	vnmsac_vx_u16m8(...) __riscv_vnmsac_vx_u16m8_tu(__VA_ARGS__)

#define	vnmsac_vx_u16m8_m(...) __riscv_vnmsac_vx_u16m8_tumu(__VA_ARGS__)

#define	vnmsac_vx_u16mf2(...) __riscv_vnmsac_vx_u16mf2_tu(__VA_ARGS__)

#define	vnmsac_vx_u16mf2_m(...) __riscv_vnmsac_vx_u16mf2_tumu(__VA_ARGS__)

#define	vnmsac_vx_u16mf4(...) __riscv_vnmsac_vx_u16mf4_tu(__VA_ARGS__)

#define	vnmsac_vx_u16mf4_m(...) __riscv_vnmsac_vx_u16mf4_tumu(__VA_ARGS__)

#define	vnmsac_vx_u32m1(...) __riscv_vnmsac_vx_u32m1_tu(__VA_ARGS__)

#define	vnmsac_vx_u32m1_m(...) __riscv_vnmsac_vx_u32m1_tumu(__VA_ARGS__)

#define	vnmsac_vx_u32m2(...) __riscv_vnmsac_vx_u32m2_tu(__VA_ARGS__)

#define	vnmsac_vx_u32m2_m(...) __riscv_vnmsac_vx_u32m2_tumu(__VA_ARGS__)

#define	vnmsac_vx_u32m4(...) __riscv_vnmsac_vx_u32m4_tu(__VA_ARGS__)

#define	vnmsac_vx_u32m4_m(...) __riscv_vnmsac_vx_u32m4_tumu(__VA_ARGS__)

#define	vnmsac_vx_u32m8(...) __riscv_vnmsac_vx_u32m8_tu(__VA_ARGS__)

#define	vnmsac_vx_u32m8_m(...) __riscv_vnmsac_vx_u32m8_tumu(__VA_ARGS__)

#define	vnmsac_vx_u32mf2(...) __riscv_vnmsac_vx_u32mf2_tu(__VA_ARGS__)

#define	vnmsac_vx_u32mf2_m(...) __riscv_vnmsac_vx_u32mf2_tumu(__VA_ARGS__)

#define	vnmsac_vx_u64m1(...) __riscv_vnmsac_vx_u64m1_tu(__VA_ARGS__)

#define	vnmsac_vx_u64m1_m(...) __riscv_vnmsac_vx_u64m1_tumu(__VA_ARGS__)

#define	vnmsac_vx_u64m2(...) __riscv_vnmsac_vx_u64m2_tu(__VA_ARGS__)

#define	vnmsac_vx_u64m2_m(...) __riscv_vnmsac_vx_u64m2_tumu(__VA_ARGS__)

#define	vnmsac_vx_u64m4(...) __riscv_vnmsac_vx_u64m4_tu(__VA_ARGS__)

#define	vnmsac_vx_u64m4_m(...) __riscv_vnmsac_vx_u64m4_tumu(__VA_ARGS__)

#define	vnmsac_vx_u64m8(...) __riscv_vnmsac_vx_u64m8_tu(__VA_ARGS__)

#define	vnmsac_vx_u64m8_m(...) __riscv_vnmsac_vx_u64m8_tumu(__VA_ARGS__)

#define	vnmsac_vx_u8m1(...) __riscv_vnmsac_vx_u8m1_tu(__VA_ARGS__)

#define	vnmsac_vx_u8m1_m(...) __riscv_vnmsac_vx_u8m1_tumu(__VA_ARGS__)

#define	vnmsac_vx_u8m2(...) __riscv_vnmsac_vx_u8m2_tu(__VA_ARGS__)

#define	vnmsac_vx_u8m2_m(...) __riscv_vnmsac_vx_u8m2_tumu(__VA_ARGS__)

#define	vnmsac_vx_u8m4(...) __riscv_vnmsac_vx_u8m4_tu(__VA_ARGS__)

#define	vnmsac_vx_u8m4_m(...) __riscv_vnmsac_vx_u8m4_tumu(__VA_ARGS__)

#define	vnmsac_vx_u8m8(...) __riscv_vnmsac_vx_u8m8_tu(__VA_ARGS__)

#define	vnmsac_vx_u8m8_m(...) __riscv_vnmsac_vx_u8m8_tumu(__VA_ARGS__)

#define	vnmsac_vx_u8mf2(...) __riscv_vnmsac_vx_u8mf2_tu(__VA_ARGS__)

#define	vnmsac_vx_u8mf2_m(...) __riscv_vnmsac_vx_u8mf2_tumu(__VA_ARGS__)

#define	vnmsac_vx_u8mf4(...) __riscv_vnmsac_vx_u8mf4_tu(__VA_ARGS__)

#define	vnmsac_vx_u8mf4_m(...) __riscv_vnmsac_vx_u8mf4_tumu(__VA_ARGS__)

#define	vnmsac_vx_u8mf8(...) __riscv_vnmsac_vx_u8mf8_tu(__VA_ARGS__)

#define	vnmsac_vx_u8mf8_m(...) __riscv_vnmsac_vx_u8mf8_tumu(__VA_ARGS__)

#define	vnmsub_vv_i16m1(...) __riscv_vnmsub_vv_i16m1_tu(__VA_ARGS__)

#define	vnmsub_vv_i16m1_m(...) __riscv_vnmsub_vv_i16m1_tumu(__VA_ARGS__)

#define	vnmsub_vv_i16m2(...) __riscv_vnmsub_vv_i16m2_tu(__VA_ARGS__)

#define	vnmsub_vv_i16m2_m(...) __riscv_vnmsub_vv_i16m2_tumu(__VA_ARGS__)

#define	vnmsub_vv_i16m4(...) __riscv_vnmsub_vv_i16m4_tu(__VA_ARGS__)

#define	vnmsub_vv_i16m4_m(...) __riscv_vnmsub_vv_i16m4_tumu(__VA_ARGS__)

#define	vnmsub_vv_i16m8(...) __riscv_vnmsub_vv_i16m8_tu(__VA_ARGS__)

#define	vnmsub_vv_i16m8_m(...) __riscv_vnmsub_vv_i16m8_tumu(__VA_ARGS__)

#define	vnmsub_vv_i16mf2(...) __riscv_vnmsub_vv_i16mf2_tu(__VA_ARGS__)

#define	vnmsub_vv_i16mf2_m(...) __riscv_vnmsub_vv_i16mf2_tumu(__VA_ARGS__)

#define	vnmsub_vv_i16mf4(...) __riscv_vnmsub_vv_i16mf4_tu(__VA_ARGS__)

#define	vnmsub_vv_i16mf4_m(...) __riscv_vnmsub_vv_i16mf4_tumu(__VA_ARGS__)

#define	vnmsub_vv_i32m1(...) __riscv_vnmsub_vv_i32m1_tu(__VA_ARGS__)

#define	vnmsub_vv_i32m1_m(...) __riscv_vnmsub_vv_i32m1_tumu(__VA_ARGS__)

#define	vnmsub_vv_i32m2(...) __riscv_vnmsub_vv_i32m2_tu(__VA_ARGS__)

#define	vnmsub_vv_i32m2_m(...) __riscv_vnmsub_vv_i32m2_tumu(__VA_ARGS__)

#define	vnmsub_vv_i32m4(...) __riscv_vnmsub_vv_i32m4_tu(__VA_ARGS__)

#define	vnmsub_vv_i32m4_m(...) __riscv_vnmsub_vv_i32m4_tumu(__VA_ARGS__)

#define	vnmsub_vv_i32m8(...) __riscv_vnmsub_vv_i32m8_tu(__VA_ARGS__)

#define	vnmsub_vv_i32m8_m(...) __riscv_vnmsub_vv_i32m8_tumu(__VA_ARGS__)

#define	vnmsub_vv_i32mf2(...) __riscv_vnmsub_vv_i32mf2_tu(__VA_ARGS__)

#define	vnmsub_vv_i32mf2_m(...) __riscv_vnmsub_vv_i32mf2_tumu(__VA_ARGS__)

#define	vnmsub_vv_i64m1(...) __riscv_vnmsub_vv_i64m1_tu(__VA_ARGS__)

#define	vnmsub_vv_i64m1_m(...) __riscv_vnmsub_vv_i64m1_tumu(__VA_ARGS__)

#define	vnmsub_vv_i64m2(...) __riscv_vnmsub_vv_i64m2_tu(__VA_ARGS__)

#define	vnmsub_vv_i64m2_m(...) __riscv_vnmsub_vv_i64m2_tumu(__VA_ARGS__)

#define	vnmsub_vv_i64m4(...) __riscv_vnmsub_vv_i64m4_tu(__VA_ARGS__)

#define	vnmsub_vv_i64m4_m(...) __riscv_vnmsub_vv_i64m4_tumu(__VA_ARGS__)

#define	vnmsub_vv_i64m8(...) __riscv_vnmsub_vv_i64m8_tu(__VA_ARGS__)

#define	vnmsub_vv_i64m8_m(...) __riscv_vnmsub_vv_i64m8_tumu(__VA_ARGS__)

#define	vnmsub_vv_i8m1(...) __riscv_vnmsub_vv_i8m1_tu(__VA_ARGS__)

#define	vnmsub_vv_i8m1_m(...) __riscv_vnmsub_vv_i8m1_tumu(__VA_ARGS__)

#define	vnmsub_vv_i8m2(...) __riscv_vnmsub_vv_i8m2_tu(__VA_ARGS__)

#define	vnmsub_vv_i8m2_m(...) __riscv_vnmsub_vv_i8m2_tumu(__VA_ARGS__)

#define	vnmsub_vv_i8m4(...) __riscv_vnmsub_vv_i8m4_tu(__VA_ARGS__)

#define	vnmsub_vv_i8m4_m(...) __riscv_vnmsub_vv_i8m4_tumu(__VA_ARGS__)

#define	vnmsub_vv_i8m8(...) __riscv_vnmsub_vv_i8m8_tu(__VA_ARGS__)

#define	vnmsub_vv_i8m8_m(...) __riscv_vnmsub_vv_i8m8_tumu(__VA_ARGS__)

#define	vnmsub_vv_i8mf2(...) __riscv_vnmsub_vv_i8mf2_tu(__VA_ARGS__)

#define	vnmsub_vv_i8mf2_m(...) __riscv_vnmsub_vv_i8mf2_tumu(__VA_ARGS__)

#define	vnmsub_vv_i8mf4(...) __riscv_vnmsub_vv_i8mf4_tu(__VA_ARGS__)

#define	vnmsub_vv_i8mf4_m(...) __riscv_vnmsub_vv_i8mf4_tumu(__VA_ARGS__)

#define	vnmsub_vv_i8mf8(...) __riscv_vnmsub_vv_i8mf8_tu(__VA_ARGS__)

#define	vnmsub_vv_i8mf8_m(...) __riscv_vnmsub_vv_i8mf8_tumu(__VA_ARGS__)

#define	vnmsub_vv_u16m1(...) __riscv_vnmsub_vv_u16m1_tu(__VA_ARGS__)

#define	vnmsub_vv_u16m1_m(...) __riscv_vnmsub_vv_u16m1_tumu(__VA_ARGS__)

#define	vnmsub_vv_u16m2(...) __riscv_vnmsub_vv_u16m2_tu(__VA_ARGS__)

#define	vnmsub_vv_u16m2_m(...) __riscv_vnmsub_vv_u16m2_tumu(__VA_ARGS__)

#define	vnmsub_vv_u16m4(...) __riscv_vnmsub_vv_u16m4_tu(__VA_ARGS__)

#define	vnmsub_vv_u16m4_m(...) __riscv_vnmsub_vv_u16m4_tumu(__VA_ARGS__)

#define	vnmsub_vv_u16m8(...) __riscv_vnmsub_vv_u16m8_tu(__VA_ARGS__)

#define	vnmsub_vv_u16m8_m(...) __riscv_vnmsub_vv_u16m8_tumu(__VA_ARGS__)

#define	vnmsub_vv_u16mf2(...) __riscv_vnmsub_vv_u16mf2_tu(__VA_ARGS__)

#define	vnmsub_vv_u16mf2_m(...) __riscv_vnmsub_vv_u16mf2_tumu(__VA_ARGS__)

#define	vnmsub_vv_u16mf4(...) __riscv_vnmsub_vv_u16mf4_tu(__VA_ARGS__)

#define	vnmsub_vv_u16mf4_m(...) __riscv_vnmsub_vv_u16mf4_tumu(__VA_ARGS__)

#define	vnmsub_vv_u32m1(...) __riscv_vnmsub_vv_u32m1_tu(__VA_ARGS__)

#define	vnmsub_vv_u32m1_m(...) __riscv_vnmsub_vv_u32m1_tumu(__VA_ARGS__)

#define	vnmsub_vv_u32m2(...) __riscv_vnmsub_vv_u32m2_tu(__VA_ARGS__)

#define	vnmsub_vv_u32m2_m(...) __riscv_vnmsub_vv_u32m2_tumu(__VA_ARGS__)

#define	vnmsub_vv_u32m4(...) __riscv_vnmsub_vv_u32m4_tu(__VA_ARGS__)

#define	vnmsub_vv_u32m4_m(...) __riscv_vnmsub_vv_u32m4_tumu(__VA_ARGS__)

#define	vnmsub_vv_u32m8(...) __riscv_vnmsub_vv_u32m8_tu(__VA_ARGS__)

#define	vnmsub_vv_u32m8_m(...) __riscv_vnmsub_vv_u32m8_tumu(__VA_ARGS__)

#define	vnmsub_vv_u32mf2(...) __riscv_vnmsub_vv_u32mf2_tu(__VA_ARGS__)

#define	vnmsub_vv_u32mf2_m(...) __riscv_vnmsub_vv_u32mf2_tumu(__VA_ARGS__)

#define	vnmsub_vv_u64m1(...) __riscv_vnmsub_vv_u64m1_tu(__VA_ARGS__)

#define	vnmsub_vv_u64m1_m(...) __riscv_vnmsub_vv_u64m1_tumu(__VA_ARGS__)

#define	vnmsub_vv_u64m2(...) __riscv_vnmsub_vv_u64m2_tu(__VA_ARGS__)

#define	vnmsub_vv_u64m2_m(...) __riscv_vnmsub_vv_u64m2_tumu(__VA_ARGS__)

#define	vnmsub_vv_u64m4(...) __riscv_vnmsub_vv_u64m4_tu(__VA_ARGS__)

#define	vnmsub_vv_u64m4_m(...) __riscv_vnmsub_vv_u64m4_tumu(__VA_ARGS__)

#define	vnmsub_vv_u64m8(...) __riscv_vnmsub_vv_u64m8_tu(__VA_ARGS__)

#define	vnmsub_vv_u64m8_m(...) __riscv_vnmsub_vv_u64m8_tumu(__VA_ARGS__)

#define	vnmsub_vv_u8m1(...) __riscv_vnmsub_vv_u8m1_tu(__VA_ARGS__)

#define	vnmsub_vv_u8m1_m(...) __riscv_vnmsub_vv_u8m1_tumu(__VA_ARGS__)

#define	vnmsub_vv_u8m2(...) __riscv_vnmsub_vv_u8m2_tu(__VA_ARGS__)

#define	vnmsub_vv_u8m2_m(...) __riscv_vnmsub_vv_u8m2_tumu(__VA_ARGS__)

#define	vnmsub_vv_u8m4(...) __riscv_vnmsub_vv_u8m4_tu(__VA_ARGS__)

#define	vnmsub_vv_u8m4_m(...) __riscv_vnmsub_vv_u8m4_tumu(__VA_ARGS__)

#define	vnmsub_vv_u8m8(...) __riscv_vnmsub_vv_u8m8_tu(__VA_ARGS__)

#define	vnmsub_vv_u8m8_m(...) __riscv_vnmsub_vv_u8m8_tumu(__VA_ARGS__)

#define	vnmsub_vv_u8mf2(...) __riscv_vnmsub_vv_u8mf2_tu(__VA_ARGS__)

#define	vnmsub_vv_u8mf2_m(...) __riscv_vnmsub_vv_u8mf2_tumu(__VA_ARGS__)

#define	vnmsub_vv_u8mf4(...) __riscv_vnmsub_vv_u8mf4_tu(__VA_ARGS__)

#define	vnmsub_vv_u8mf4_m(...) __riscv_vnmsub_vv_u8mf4_tumu(__VA_ARGS__)

#define	vnmsub_vv_u8mf8(...) __riscv_vnmsub_vv_u8mf8_tu(__VA_ARGS__)

#define	vnmsub_vv_u8mf8_m(...) __riscv_vnmsub_vv_u8mf8_tumu(__VA_ARGS__)

#define	vnmsub_vx_i16m1(...) __riscv_vnmsub_vx_i16m1_tu(__VA_ARGS__)

#define	vnmsub_vx_i16m1_m(...) __riscv_vnmsub_vx_i16m1_tumu(__VA_ARGS__)

#define	vnmsub_vx_i16m2(...) __riscv_vnmsub_vx_i16m2_tu(__VA_ARGS__)

#define	vnmsub_vx_i16m2_m(...) __riscv_vnmsub_vx_i16m2_tumu(__VA_ARGS__)

#define	vnmsub_vx_i16m4(...) __riscv_vnmsub_vx_i16m4_tu(__VA_ARGS__)

#define	vnmsub_vx_i16m4_m(...) __riscv_vnmsub_vx_i16m4_tumu(__VA_ARGS__)

#define	vnmsub_vx_i16m8(...) __riscv_vnmsub_vx_i16m8_tu(__VA_ARGS__)

#define	vnmsub_vx_i16m8_m(...) __riscv_vnmsub_vx_i16m8_tumu(__VA_ARGS__)

#define	vnmsub_vx_i16mf2(...) __riscv_vnmsub_vx_i16mf2_tu(__VA_ARGS__)

#define	vnmsub_vx_i16mf2_m(...) __riscv_vnmsub_vx_i16mf2_tumu(__VA_ARGS__)

#define	vnmsub_vx_i16mf4(...) __riscv_vnmsub_vx_i16mf4_tu(__VA_ARGS__)

#define	vnmsub_vx_i16mf4_m(...) __riscv_vnmsub_vx_i16mf4_tumu(__VA_ARGS__)

#define	vnmsub_vx_i32m1(...) __riscv_vnmsub_vx_i32m1_tu(__VA_ARGS__)

#define	vnmsub_vx_i32m1_m(...) __riscv_vnmsub_vx_i32m1_tumu(__VA_ARGS__)

#define	vnmsub_vx_i32m2(...) __riscv_vnmsub_vx_i32m2_tu(__VA_ARGS__)

#define	vnmsub_vx_i32m2_m(...) __riscv_vnmsub_vx_i32m2_tumu(__VA_ARGS__)

#define	vnmsub_vx_i32m4(...) __riscv_vnmsub_vx_i32m4_tu(__VA_ARGS__)

#define	vnmsub_vx_i32m4_m(...) __riscv_vnmsub_vx_i32m4_tumu(__VA_ARGS__)

#define	vnmsub_vx_i32m8(...) __riscv_vnmsub_vx_i32m8_tu(__VA_ARGS__)

#define	vnmsub_vx_i32m8_m(...) __riscv_vnmsub_vx_i32m8_tumu(__VA_ARGS__)

#define	vnmsub_vx_i32mf2(...) __riscv_vnmsub_vx_i32mf2_tu(__VA_ARGS__)

#define	vnmsub_vx_i32mf2_m(...) __riscv_vnmsub_vx_i32mf2_tumu(__VA_ARGS__)

#define	vnmsub_vx_i64m1(...) __riscv_vnmsub_vx_i64m1_tu(__VA_ARGS__)

#define	vnmsub_vx_i64m1_m(...) __riscv_vnmsub_vx_i64m1_tumu(__VA_ARGS__)

#define	vnmsub_vx_i64m2(...) __riscv_vnmsub_vx_i64m2_tu(__VA_ARGS__)

#define	vnmsub_vx_i64m2_m(...) __riscv_vnmsub_vx_i64m2_tumu(__VA_ARGS__)

#define	vnmsub_vx_i64m4(...) __riscv_vnmsub_vx_i64m4_tu(__VA_ARGS__)

#define	vnmsub_vx_i64m4_m(...) __riscv_vnmsub_vx_i64m4_tumu(__VA_ARGS__)

#define	vnmsub_vx_i64m8(...) __riscv_vnmsub_vx_i64m8_tu(__VA_ARGS__)

#define	vnmsub_vx_i64m8_m(...) __riscv_vnmsub_vx_i64m8_tumu(__VA_ARGS__)

#define	vnmsub_vx_i8m1(...) __riscv_vnmsub_vx_i8m1_tu(__VA_ARGS__)

#define	vnmsub_vx_i8m1_m(...) __riscv_vnmsub_vx_i8m1_tumu(__VA_ARGS__)

#define	vnmsub_vx_i8m2(...) __riscv_vnmsub_vx_i8m2_tu(__VA_ARGS__)

#define	vnmsub_vx_i8m2_m(...) __riscv_vnmsub_vx_i8m2_tumu(__VA_ARGS__)

#define	vnmsub_vx_i8m4(...) __riscv_vnmsub_vx_i8m4_tu(__VA_ARGS__)

#define	vnmsub_vx_i8m4_m(...) __riscv_vnmsub_vx_i8m4_tumu(__VA_ARGS__)

#define	vnmsub_vx_i8m8(...) __riscv_vnmsub_vx_i8m8_tu(__VA_ARGS__)

#define	vnmsub_vx_i8m8_m(...) __riscv_vnmsub_vx_i8m8_tumu(__VA_ARGS__)

#define	vnmsub_vx_i8mf2(...) __riscv_vnmsub_vx_i8mf2_tu(__VA_ARGS__)

#define	vnmsub_vx_i8mf2_m(...) __riscv_vnmsub_vx_i8mf2_tumu(__VA_ARGS__)

#define	vnmsub_vx_i8mf4(...) __riscv_vnmsub_vx_i8mf4_tu(__VA_ARGS__)

#define	vnmsub_vx_i8mf4_m(...) __riscv_vnmsub_vx_i8mf4_tumu(__VA_ARGS__)

#define	vnmsub_vx_i8mf8(...) __riscv_vnmsub_vx_i8mf8_tu(__VA_ARGS__)

#define	vnmsub_vx_i8mf8_m(...) __riscv_vnmsub_vx_i8mf8_tumu(__VA_ARGS__)

#define	vnmsub_vx_u16m1(...) __riscv_vnmsub_vx_u16m1_tu(__VA_ARGS__)

#define	vnmsub_vx_u16m1_m(...) __riscv_vnmsub_vx_u16m1_tumu(__VA_ARGS__)

#define	vnmsub_vx_u16m2(...) __riscv_vnmsub_vx_u16m2_tu(__VA_ARGS__)

#define	vnmsub_vx_u16m2_m(...) __riscv_vnmsub_vx_u16m2_tumu(__VA_ARGS__)

#define	vnmsub_vx_u16m4(...) __riscv_vnmsub_vx_u16m4_tu(__VA_ARGS__)

#define	vnmsub_vx_u16m4_m(...) __riscv_vnmsub_vx_u16m4_tumu(__VA_ARGS__)

#define	vnmsub_vx_u16m8(...) __riscv_vnmsub_vx_u16m8_tu(__VA_ARGS__)

#define	vnmsub_vx_u16m8_m(...) __riscv_vnmsub_vx_u16m8_tumu(__VA_ARGS__)

#define	vnmsub_vx_u16mf2(...) __riscv_vnmsub_vx_u16mf2_tu(__VA_ARGS__)

#define	vnmsub_vx_u16mf2_m(...) __riscv_vnmsub_vx_u16mf2_tumu(__VA_ARGS__)

#define	vnmsub_vx_u16mf4(...) __riscv_vnmsub_vx_u16mf4_tu(__VA_ARGS__)

#define	vnmsub_vx_u16mf4_m(...) __riscv_vnmsub_vx_u16mf4_tumu(__VA_ARGS__)

#define	vnmsub_vx_u32m1(...) __riscv_vnmsub_vx_u32m1_tu(__VA_ARGS__)

#define	vnmsub_vx_u32m1_m(...) __riscv_vnmsub_vx_u32m1_tumu(__VA_ARGS__)

#define	vnmsub_vx_u32m2(...) __riscv_vnmsub_vx_u32m2_tu(__VA_ARGS__)

#define	vnmsub_vx_u32m2_m(...) __riscv_vnmsub_vx_u32m2_tumu(__VA_ARGS__)

#define	vnmsub_vx_u32m4(...) __riscv_vnmsub_vx_u32m4_tu(__VA_ARGS__)

#define	vnmsub_vx_u32m4_m(...) __riscv_vnmsub_vx_u32m4_tumu(__VA_ARGS__)

#define	vnmsub_vx_u32m8(...) __riscv_vnmsub_vx_u32m8_tu(__VA_ARGS__)

#define	vnmsub_vx_u32m8_m(...) __riscv_vnmsub_vx_u32m8_tumu(__VA_ARGS__)

#define	vnmsub_vx_u32mf2(...) __riscv_vnmsub_vx_u32mf2_tu(__VA_ARGS__)

#define	vnmsub_vx_u32mf2_m(...) __riscv_vnmsub_vx_u32mf2_tumu(__VA_ARGS__)

#define	vnmsub_vx_u64m1(...) __riscv_vnmsub_vx_u64m1_tu(__VA_ARGS__)

#define	vnmsub_vx_u64m1_m(...) __riscv_vnmsub_vx_u64m1_tumu(__VA_ARGS__)

#define	vnmsub_vx_u64m2(...) __riscv_vnmsub_vx_u64m2_tu(__VA_ARGS__)

#define	vnmsub_vx_u64m2_m(...) __riscv_vnmsub_vx_u64m2_tumu(__VA_ARGS__)

#define	vnmsub_vx_u64m4(...) __riscv_vnmsub_vx_u64m4_tu(__VA_ARGS__)

#define	vnmsub_vx_u64m4_m(...) __riscv_vnmsub_vx_u64m4_tumu(__VA_ARGS__)

#define	vnmsub_vx_u64m8(...) __riscv_vnmsub_vx_u64m8_tu(__VA_ARGS__)

#define	vnmsub_vx_u64m8_m(...) __riscv_vnmsub_vx_u64m8_tumu(__VA_ARGS__)

#define	vnmsub_vx_u8m1(...) __riscv_vnmsub_vx_u8m1_tu(__VA_ARGS__)

#define	vnmsub_vx_u8m1_m(...) __riscv_vnmsub_vx_u8m1_tumu(__VA_ARGS__)

#define	vnmsub_vx_u8m2(...) __riscv_vnmsub_vx_u8m2_tu(__VA_ARGS__)

#define	vnmsub_vx_u8m2_m(...) __riscv_vnmsub_vx_u8m2_tumu(__VA_ARGS__)

#define	vnmsub_vx_u8m4(...) __riscv_vnmsub_vx_u8m4_tu(__VA_ARGS__)

#define	vnmsub_vx_u8m4_m(...) __riscv_vnmsub_vx_u8m4_tumu(__VA_ARGS__)

#define	vnmsub_vx_u8m8(...) __riscv_vnmsub_vx_u8m8_tu(__VA_ARGS__)

#define	vnmsub_vx_u8m8_m(...) __riscv_vnmsub_vx_u8m8_tumu(__VA_ARGS__)

#define	vnmsub_vx_u8mf2(...) __riscv_vnmsub_vx_u8mf2_tu(__VA_ARGS__)

#define	vnmsub_vx_u8mf2_m(...) __riscv_vnmsub_vx_u8mf2_tumu(__VA_ARGS__)

#define	vnmsub_vx_u8mf4(...) __riscv_vnmsub_vx_u8mf4_tu(__VA_ARGS__)

#define	vnmsub_vx_u8mf4_m(...) __riscv_vnmsub_vx_u8mf4_tumu(__VA_ARGS__)

#define	vnmsub_vx_u8mf8(...) __riscv_vnmsub_vx_u8mf8_tu(__VA_ARGS__)

#define	vnmsub_vx_u8mf8_m(...) __riscv_vnmsub_vx_u8mf8_tumu(__VA_ARGS__)

#define	vnot_v_i16m1(...) __riscv_vnot_v_i16m1(__VA_ARGS__)

#define	vnot_v_i16m1_m(...) __riscv_vnot_v_i16m1_tumu(__VA_ARGS__)

#define	vnot_v_i16m2(...) __riscv_vnot_v_i16m2(__VA_ARGS__)

#define	vnot_v_i16m2_m(...) __riscv_vnot_v_i16m2_tumu(__VA_ARGS__)

#define	vnot_v_i16m4(...) __riscv_vnot_v_i16m4(__VA_ARGS__)

#define	vnot_v_i16m4_m(...) __riscv_vnot_v_i16m4_tumu(__VA_ARGS__)

#define	vnot_v_i16m8(...) __riscv_vnot_v_i16m8(__VA_ARGS__)

#define	vnot_v_i16m8_m(...) __riscv_vnot_v_i16m8_tumu(__VA_ARGS__)

#define	vnot_v_i16mf2(...) __riscv_vnot_v_i16mf2(__VA_ARGS__)

#define	vnot_v_i16mf2_m(...) __riscv_vnot_v_i16mf2_tumu(__VA_ARGS__)

#define	vnot_v_i16mf4(...) __riscv_vnot_v_i16mf4(__VA_ARGS__)

#define	vnot_v_i16mf4_m(...) __riscv_vnot_v_i16mf4_tumu(__VA_ARGS__)

#define	vnot_v_i32m1(...) __riscv_vnot_v_i32m1(__VA_ARGS__)

#define	vnot_v_i32m1_m(...) __riscv_vnot_v_i32m1_tumu(__VA_ARGS__)

#define	vnot_v_i32m2(...) __riscv_vnot_v_i32m2(__VA_ARGS__)

#define	vnot_v_i32m2_m(...) __riscv_vnot_v_i32m2_tumu(__VA_ARGS__)

#define	vnot_v_i32m4(...) __riscv_vnot_v_i32m4(__VA_ARGS__)

#define	vnot_v_i32m4_m(...) __riscv_vnot_v_i32m4_tumu(__VA_ARGS__)

#define	vnot_v_i32m8(...) __riscv_vnot_v_i32m8(__VA_ARGS__)

#define	vnot_v_i32m8_m(...) __riscv_vnot_v_i32m8_tumu(__VA_ARGS__)

#define	vnot_v_i32mf2(...) __riscv_vnot_v_i32mf2(__VA_ARGS__)

#define	vnot_v_i32mf2_m(...) __riscv_vnot_v_i32mf2_tumu(__VA_ARGS__)

#define	vnot_v_i64m1(...) __riscv_vnot_v_i64m1(__VA_ARGS__)

#define	vnot_v_i64m1_m(...) __riscv_vnot_v_i64m1_tumu(__VA_ARGS__)

#define	vnot_v_i64m2(...) __riscv_vnot_v_i64m2(__VA_ARGS__)

#define	vnot_v_i64m2_m(...) __riscv_vnot_v_i64m2_tumu(__VA_ARGS__)

#define	vnot_v_i64m4(...) __riscv_vnot_v_i64m4(__VA_ARGS__)

#define	vnot_v_i64m4_m(...) __riscv_vnot_v_i64m4_tumu(__VA_ARGS__)

#define	vnot_v_i64m8(...) __riscv_vnot_v_i64m8(__VA_ARGS__)

#define	vnot_v_i64m8_m(...) __riscv_vnot_v_i64m8_tumu(__VA_ARGS__)

#define	vnot_v_i8m1(...) __riscv_vnot_v_i8m1(__VA_ARGS__)

#define	vnot_v_i8m1_m(...) __riscv_vnot_v_i8m1_tumu(__VA_ARGS__)

#define	vnot_v_i8m2(...) __riscv_vnot_v_i8m2(__VA_ARGS__)

#define	vnot_v_i8m2_m(...) __riscv_vnot_v_i8m2_tumu(__VA_ARGS__)

#define	vnot_v_i8m4(...) __riscv_vnot_v_i8m4(__VA_ARGS__)

#define	vnot_v_i8m4_m(...) __riscv_vnot_v_i8m4_tumu(__VA_ARGS__)

#define	vnot_v_i8m8(...) __riscv_vnot_v_i8m8(__VA_ARGS__)

#define	vnot_v_i8m8_m(...) __riscv_vnot_v_i8m8_tumu(__VA_ARGS__)

#define	vnot_v_i8mf2(...) __riscv_vnot_v_i8mf2(__VA_ARGS__)

#define	vnot_v_i8mf2_m(...) __riscv_vnot_v_i8mf2_tumu(__VA_ARGS__)

#define	vnot_v_i8mf4(...) __riscv_vnot_v_i8mf4(__VA_ARGS__)

#define	vnot_v_i8mf4_m(...) __riscv_vnot_v_i8mf4_tumu(__VA_ARGS__)

#define	vnot_v_i8mf8(...) __riscv_vnot_v_i8mf8(__VA_ARGS__)

#define	vnot_v_i8mf8_m(...) __riscv_vnot_v_i8mf8_tumu(__VA_ARGS__)

#define	vnot_v_u16m1(...) __riscv_vnot_v_u16m1(__VA_ARGS__)

#define	vnot_v_u16m1_m(...) __riscv_vnot_v_u16m1_tumu(__VA_ARGS__)

#define	vnot_v_u16m2(...) __riscv_vnot_v_u16m2(__VA_ARGS__)

#define	vnot_v_u16m2_m(...) __riscv_vnot_v_u16m2_tumu(__VA_ARGS__)

#define	vnot_v_u16m4(...) __riscv_vnot_v_u16m4(__VA_ARGS__)

#define	vnot_v_u16m4_m(...) __riscv_vnot_v_u16m4_tumu(__VA_ARGS__)

#define	vnot_v_u16m8(...) __riscv_vnot_v_u16m8(__VA_ARGS__)

#define	vnot_v_u16m8_m(...) __riscv_vnot_v_u16m8_tumu(__VA_ARGS__)

#define	vnot_v_u16mf2(...) __riscv_vnot_v_u16mf2(__VA_ARGS__)

#define	vnot_v_u16mf2_m(...) __riscv_vnot_v_u16mf2_tumu(__VA_ARGS__)

#define	vnot_v_u16mf4(...) __riscv_vnot_v_u16mf4(__VA_ARGS__)

#define	vnot_v_u16mf4_m(...) __riscv_vnot_v_u16mf4_tumu(__VA_ARGS__)

#define	vnot_v_u32m1(...) __riscv_vnot_v_u32m1(__VA_ARGS__)

#define	vnot_v_u32m1_m(...) __riscv_vnot_v_u32m1_tumu(__VA_ARGS__)

#define	vnot_v_u32m2(...) __riscv_vnot_v_u32m2(__VA_ARGS__)

#define	vnot_v_u32m2_m(...) __riscv_vnot_v_u32m2_tumu(__VA_ARGS__)

#define	vnot_v_u32m4(...) __riscv_vnot_v_u32m4(__VA_ARGS__)

#define	vnot_v_u32m4_m(...) __riscv_vnot_v_u32m4_tumu(__VA_ARGS__)

#define	vnot_v_u32m8(...) __riscv_vnot_v_u32m8(__VA_ARGS__)

#define	vnot_v_u32m8_m(...) __riscv_vnot_v_u32m8_tumu(__VA_ARGS__)

#define	vnot_v_u32mf2(...) __riscv_vnot_v_u32mf2(__VA_ARGS__)

#define	vnot_v_u32mf2_m(...) __riscv_vnot_v_u32mf2_tumu(__VA_ARGS__)

#define	vnot_v_u64m1(...) __riscv_vnot_v_u64m1(__VA_ARGS__)

#define	vnot_v_u64m1_m(...) __riscv_vnot_v_u64m1_tumu(__VA_ARGS__)

#define	vnot_v_u64m2(...) __riscv_vnot_v_u64m2(__VA_ARGS__)

#define	vnot_v_u64m2_m(...) __riscv_vnot_v_u64m2_tumu(__VA_ARGS__)

#define	vnot_v_u64m4(...) __riscv_vnot_v_u64m4(__VA_ARGS__)

#define	vnot_v_u64m4_m(...) __riscv_vnot_v_u64m4_tumu(__VA_ARGS__)

#define	vnot_v_u64m8(...) __riscv_vnot_v_u64m8(__VA_ARGS__)

#define	vnot_v_u64m8_m(...) __riscv_vnot_v_u64m8_tumu(__VA_ARGS__)

#define	vnot_v_u8m1(...) __riscv_vnot_v_u8m1(__VA_ARGS__)

#define	vnot_v_u8m1_m(...) __riscv_vnot_v_u8m1_tumu(__VA_ARGS__)

#define	vnot_v_u8m2(...) __riscv_vnot_v_u8m2(__VA_ARGS__)

#define	vnot_v_u8m2_m(...) __riscv_vnot_v_u8m2_tumu(__VA_ARGS__)

#define	vnot_v_u8m4(...) __riscv_vnot_v_u8m4(__VA_ARGS__)

#define	vnot_v_u8m4_m(...) __riscv_vnot_v_u8m4_tumu(__VA_ARGS__)

#define	vnot_v_u8m8(...) __riscv_vnot_v_u8m8(__VA_ARGS__)

#define	vnot_v_u8m8_m(...) __riscv_vnot_v_u8m8_tumu(__VA_ARGS__)

#define	vnot_v_u8mf2(...) __riscv_vnot_v_u8mf2(__VA_ARGS__)

#define	vnot_v_u8mf2_m(...) __riscv_vnot_v_u8mf2_tumu(__VA_ARGS__)

#define	vnot_v_u8mf4(...) __riscv_vnot_v_u8mf4(__VA_ARGS__)

#define	vnot_v_u8mf4_m(...) __riscv_vnot_v_u8mf4_tumu(__VA_ARGS__)

#define	vnot_v_u8mf8(...) __riscv_vnot_v_u8mf8(__VA_ARGS__)

#define	vnot_v_u8mf8_m(...) __riscv_vnot_v_u8mf8_tumu(__VA_ARGS__)

#define	vnsra_wv_i16m1(...) __riscv_vnsra_wv_i16m1(__VA_ARGS__)

#define	vnsra_wv_i16m1_m(...) __riscv_vnsra_wv_i16m1_tumu(__VA_ARGS__)

#define	vnsra_wv_i16m2(...) __riscv_vnsra_wv_i16m2(__VA_ARGS__)

#define	vnsra_wv_i16m2_m(...) __riscv_vnsra_wv_i16m2_tumu(__VA_ARGS__)

#define	vnsra_wv_i16m4(...) __riscv_vnsra_wv_i16m4(__VA_ARGS__)

#define	vnsra_wv_i16m4_m(...) __riscv_vnsra_wv_i16m4_tumu(__VA_ARGS__)

#define	vnsra_wv_i16mf2(...) __riscv_vnsra_wv_i16mf2(__VA_ARGS__)

#define	vnsra_wv_i16mf2_m(...) __riscv_vnsra_wv_i16mf2_tumu(__VA_ARGS__)

#define	vnsra_wv_i16mf4(...) __riscv_vnsra_wv_i16mf4(__VA_ARGS__)

#define	vnsra_wv_i16mf4_m(...) __riscv_vnsra_wv_i16mf4_tumu(__VA_ARGS__)

#define	vnsra_wv_i32m1(...) __riscv_vnsra_wv_i32m1(__VA_ARGS__)

#define	vnsra_wv_i32m1_m(...) __riscv_vnsra_wv_i32m1_tumu(__VA_ARGS__)

#define	vnsra_wv_i32m2(...) __riscv_vnsra_wv_i32m2(__VA_ARGS__)

#define	vnsra_wv_i32m2_m(...) __riscv_vnsra_wv_i32m2_tumu(__VA_ARGS__)

#define	vnsra_wv_i32m4(...) __riscv_vnsra_wv_i32m4(__VA_ARGS__)

#define	vnsra_wv_i32m4_m(...) __riscv_vnsra_wv_i32m4_tumu(__VA_ARGS__)

#define	vnsra_wv_i32mf2(...) __riscv_vnsra_wv_i32mf2(__VA_ARGS__)

#define	vnsra_wv_i32mf2_m(...) __riscv_vnsra_wv_i32mf2_tumu(__VA_ARGS__)

#define	vnsra_wv_i8m1(...) __riscv_vnsra_wv_i8m1(__VA_ARGS__)

#define	vnsra_wv_i8m1_m(...) __riscv_vnsra_wv_i8m1_tumu(__VA_ARGS__)

#define	vnsra_wv_i8m2(...) __riscv_vnsra_wv_i8m2(__VA_ARGS__)

#define	vnsra_wv_i8m2_m(...) __riscv_vnsra_wv_i8m2_tumu(__VA_ARGS__)

#define	vnsra_wv_i8m4(...) __riscv_vnsra_wv_i8m4(__VA_ARGS__)

#define	vnsra_wv_i8m4_m(...) __riscv_vnsra_wv_i8m4_tumu(__VA_ARGS__)

#define	vnsra_wv_i8mf2(...) __riscv_vnsra_wv_i8mf2(__VA_ARGS__)

#define	vnsra_wv_i8mf2_m(...) __riscv_vnsra_wv_i8mf2_tumu(__VA_ARGS__)

#define	vnsra_wv_i8mf4(...) __riscv_vnsra_wv_i8mf4(__VA_ARGS__)

#define	vnsra_wv_i8mf4_m(...) __riscv_vnsra_wv_i8mf4_tumu(__VA_ARGS__)

#define	vnsra_wv_i8mf8(...) __riscv_vnsra_wv_i8mf8(__VA_ARGS__)

#define	vnsra_wv_i8mf8_m(...) __riscv_vnsra_wv_i8mf8_tumu(__VA_ARGS__)

#define	vnsra_wx_i16m1(...) __riscv_vnsra_wx_i16m1(__VA_ARGS__)

#define	vnsra_wx_i16m1_m(...) __riscv_vnsra_wx_i16m1_tumu(__VA_ARGS__)

#define	vnsra_wx_i16m2(...) __riscv_vnsra_wx_i16m2(__VA_ARGS__)

#define	vnsra_wx_i16m2_m(...) __riscv_vnsra_wx_i16m2_tumu(__VA_ARGS__)

#define	vnsra_wx_i16m4(...) __riscv_vnsra_wx_i16m4(__VA_ARGS__)

#define	vnsra_wx_i16m4_m(...) __riscv_vnsra_wx_i16m4_tumu(__VA_ARGS__)

#define	vnsra_wx_i16mf2(...) __riscv_vnsra_wx_i16mf2(__VA_ARGS__)

#define	vnsra_wx_i16mf2_m(...) __riscv_vnsra_wx_i16mf2_tumu(__VA_ARGS__)

#define	vnsra_wx_i16mf4(...) __riscv_vnsra_wx_i16mf4(__VA_ARGS__)

#define	vnsra_wx_i16mf4_m(...) __riscv_vnsra_wx_i16mf4_tumu(__VA_ARGS__)

#define	vnsra_wx_i32m1(...) __riscv_vnsra_wx_i32m1(__VA_ARGS__)

#define	vnsra_wx_i32m1_m(...) __riscv_vnsra_wx_i32m1_tumu(__VA_ARGS__)

#define	vnsra_wx_i32m2(...) __riscv_vnsra_wx_i32m2(__VA_ARGS__)

#define	vnsra_wx_i32m2_m(...) __riscv_vnsra_wx_i32m2_tumu(__VA_ARGS__)

#define	vnsra_wx_i32m4(...) __riscv_vnsra_wx_i32m4(__VA_ARGS__)

#define	vnsra_wx_i32m4_m(...) __riscv_vnsra_wx_i32m4_tumu(__VA_ARGS__)

#define	vnsra_wx_i32mf2(...) __riscv_vnsra_wx_i32mf2(__VA_ARGS__)

#define	vnsra_wx_i32mf2_m(...) __riscv_vnsra_wx_i32mf2_tumu(__VA_ARGS__)

#define	vnsra_wx_i8m1(...) __riscv_vnsra_wx_i8m1(__VA_ARGS__)

#define	vnsra_wx_i8m1_m(...) __riscv_vnsra_wx_i8m1_tumu(__VA_ARGS__)

#define	vnsra_wx_i8m2(...) __riscv_vnsra_wx_i8m2(__VA_ARGS__)

#define	vnsra_wx_i8m2_m(...) __riscv_vnsra_wx_i8m2_tumu(__VA_ARGS__)

#define	vnsra_wx_i8m4(...) __riscv_vnsra_wx_i8m4(__VA_ARGS__)

#define	vnsra_wx_i8m4_m(...) __riscv_vnsra_wx_i8m4_tumu(__VA_ARGS__)

#define	vnsra_wx_i8mf2(...) __riscv_vnsra_wx_i8mf2(__VA_ARGS__)

#define	vnsra_wx_i8mf2_m(...) __riscv_vnsra_wx_i8mf2_tumu(__VA_ARGS__)

#define	vnsra_wx_i8mf4(...) __riscv_vnsra_wx_i8mf4(__VA_ARGS__)

#define	vnsra_wx_i8mf4_m(...) __riscv_vnsra_wx_i8mf4_tumu(__VA_ARGS__)

#define	vnsra_wx_i8mf8(...) __riscv_vnsra_wx_i8mf8(__VA_ARGS__)

#define	vnsra_wx_i8mf8_m(...) __riscv_vnsra_wx_i8mf8_tumu(__VA_ARGS__)

#define	vnsrl_wv_u16m1(...) __riscv_vnsrl_wv_u16m1(__VA_ARGS__)

#define	vnsrl_wv_u16m1_m(...) __riscv_vnsrl_wv_u16m1_tumu(__VA_ARGS__)

#define	vnsrl_wv_u16m2(...) __riscv_vnsrl_wv_u16m2(__VA_ARGS__)

#define	vnsrl_wv_u16m2_m(...) __riscv_vnsrl_wv_u16m2_tumu(__VA_ARGS__)

#define	vnsrl_wv_u16m4(...) __riscv_vnsrl_wv_u16m4(__VA_ARGS__)

#define	vnsrl_wv_u16m4_m(...) __riscv_vnsrl_wv_u16m4_tumu(__VA_ARGS__)

#define	vnsrl_wv_u16mf2(...) __riscv_vnsrl_wv_u16mf2(__VA_ARGS__)

#define	vnsrl_wv_u16mf2_m(...) __riscv_vnsrl_wv_u16mf2_tumu(__VA_ARGS__)

#define	vnsrl_wv_u16mf4(...) __riscv_vnsrl_wv_u16mf4(__VA_ARGS__)

#define	vnsrl_wv_u16mf4_m(...) __riscv_vnsrl_wv_u16mf4_tumu(__VA_ARGS__)

#define	vnsrl_wv_u32m1(...) __riscv_vnsrl_wv_u32m1(__VA_ARGS__)

#define	vnsrl_wv_u32m1_m(...) __riscv_vnsrl_wv_u32m1_tumu(__VA_ARGS__)

#define	vnsrl_wv_u32m2(...) __riscv_vnsrl_wv_u32m2(__VA_ARGS__)

#define	vnsrl_wv_u32m2_m(...) __riscv_vnsrl_wv_u32m2_tumu(__VA_ARGS__)

#define	vnsrl_wv_u32m4(...) __riscv_vnsrl_wv_u32m4(__VA_ARGS__)

#define	vnsrl_wv_u32m4_m(...) __riscv_vnsrl_wv_u32m4_tumu(__VA_ARGS__)

#define	vnsrl_wv_u32mf2(...) __riscv_vnsrl_wv_u32mf2(__VA_ARGS__)

#define	vnsrl_wv_u32mf2_m(...) __riscv_vnsrl_wv_u32mf2_tumu(__VA_ARGS__)

#define	vnsrl_wv_u8m1(...) __riscv_vnsrl_wv_u8m1(__VA_ARGS__)

#define	vnsrl_wv_u8m1_m(...) __riscv_vnsrl_wv_u8m1_tumu(__VA_ARGS__)

#define	vnsrl_wv_u8m2(...) __riscv_vnsrl_wv_u8m2(__VA_ARGS__)

#define	vnsrl_wv_u8m2_m(...) __riscv_vnsrl_wv_u8m2_tumu(__VA_ARGS__)

#define	vnsrl_wv_u8m4(...) __riscv_vnsrl_wv_u8m4(__VA_ARGS__)

#define	vnsrl_wv_u8m4_m(...) __riscv_vnsrl_wv_u8m4_tumu(__VA_ARGS__)

#define	vnsrl_wv_u8mf2(...) __riscv_vnsrl_wv_u8mf2(__VA_ARGS__)

#define	vnsrl_wv_u8mf2_m(...) __riscv_vnsrl_wv_u8mf2_tumu(__VA_ARGS__)

#define	vnsrl_wv_u8mf4(...) __riscv_vnsrl_wv_u8mf4(__VA_ARGS__)

#define	vnsrl_wv_u8mf4_m(...) __riscv_vnsrl_wv_u8mf4_tumu(__VA_ARGS__)

#define	vnsrl_wv_u8mf8(...) __riscv_vnsrl_wv_u8mf8(__VA_ARGS__)

#define	vnsrl_wv_u8mf8_m(...) __riscv_vnsrl_wv_u8mf8_tumu(__VA_ARGS__)

#define	vnsrl_wx_u16m1(...) __riscv_vnsrl_wx_u16m1(__VA_ARGS__)

#define	vnsrl_wx_u16m1_m(...) __riscv_vnsrl_wx_u16m1_tumu(__VA_ARGS__)

#define	vnsrl_wx_u16m2(...) __riscv_vnsrl_wx_u16m2(__VA_ARGS__)

#define	vnsrl_wx_u16m2_m(...) __riscv_vnsrl_wx_u16m2_tumu(__VA_ARGS__)

#define	vnsrl_wx_u16m4(...) __riscv_vnsrl_wx_u16m4(__VA_ARGS__)

#define	vnsrl_wx_u16m4_m(...) __riscv_vnsrl_wx_u16m4_tumu(__VA_ARGS__)

#define	vnsrl_wx_u16mf2(...) __riscv_vnsrl_wx_u16mf2(__VA_ARGS__)

#define	vnsrl_wx_u16mf2_m(...) __riscv_vnsrl_wx_u16mf2_tumu(__VA_ARGS__)

#define	vnsrl_wx_u16mf4(...) __riscv_vnsrl_wx_u16mf4(__VA_ARGS__)

#define	vnsrl_wx_u16mf4_m(...) __riscv_vnsrl_wx_u16mf4_tumu(__VA_ARGS__)

#define	vnsrl_wx_u32m1(...) __riscv_vnsrl_wx_u32m1(__VA_ARGS__)

#define	vnsrl_wx_u32m1_m(...) __riscv_vnsrl_wx_u32m1_tumu(__VA_ARGS__)

#define	vnsrl_wx_u32m2(...) __riscv_vnsrl_wx_u32m2(__VA_ARGS__)

#define	vnsrl_wx_u32m2_m(...) __riscv_vnsrl_wx_u32m2_tumu(__VA_ARGS__)

#define	vnsrl_wx_u32m4(...) __riscv_vnsrl_wx_u32m4(__VA_ARGS__)

#define	vnsrl_wx_u32m4_m(...) __riscv_vnsrl_wx_u32m4_tumu(__VA_ARGS__)

#define	vnsrl_wx_u32mf2(...) __riscv_vnsrl_wx_u32mf2(__VA_ARGS__)

#define	vnsrl_wx_u32mf2_m(...) __riscv_vnsrl_wx_u32mf2_tumu(__VA_ARGS__)

#define	vnsrl_wx_u8m1(...) __riscv_vnsrl_wx_u8m1(__VA_ARGS__)

#define	vnsrl_wx_u8m1_m(...) __riscv_vnsrl_wx_u8m1_tumu(__VA_ARGS__)

#define	vnsrl_wx_u8m2(...) __riscv_vnsrl_wx_u8m2(__VA_ARGS__)

#define	vnsrl_wx_u8m2_m(...) __riscv_vnsrl_wx_u8m2_tumu(__VA_ARGS__)

#define	vnsrl_wx_u8m4(...) __riscv_vnsrl_wx_u8m4(__VA_ARGS__)

#define	vnsrl_wx_u8m4_m(...) __riscv_vnsrl_wx_u8m4_tumu(__VA_ARGS__)

#define	vnsrl_wx_u8mf2(...) __riscv_vnsrl_wx_u8mf2(__VA_ARGS__)

#define	vnsrl_wx_u8mf2_m(...) __riscv_vnsrl_wx_u8mf2_tumu(__VA_ARGS__)

#define	vnsrl_wx_u8mf4(...) __riscv_vnsrl_wx_u8mf4(__VA_ARGS__)

#define	vnsrl_wx_u8mf4_m(...) __riscv_vnsrl_wx_u8mf4_tumu(__VA_ARGS__)

#define	vnsrl_wx_u8mf8(...) __riscv_vnsrl_wx_u8mf8(__VA_ARGS__)

#define	vnsrl_wx_u8mf8_m(...) __riscv_vnsrl_wx_u8mf8_tumu(__VA_ARGS__)

#define	vor_vv_i16m1(...) __riscv_vor_vv_i16m1(__VA_ARGS__)

#define	vor_vv_i16m1_m(...) __riscv_vor_vv_i16m1_tumu(__VA_ARGS__)

#define	vor_vv_i16m2(...) __riscv_vor_vv_i16m2(__VA_ARGS__)

#define	vor_vv_i16m2_m(...) __riscv_vor_vv_i16m2_tumu(__VA_ARGS__)

#define	vor_vv_i16m4(...) __riscv_vor_vv_i16m4(__VA_ARGS__)

#define	vor_vv_i16m4_m(...) __riscv_vor_vv_i16m4_tumu(__VA_ARGS__)

#define	vor_vv_i16m8(...) __riscv_vor_vv_i16m8(__VA_ARGS__)

#define	vor_vv_i16m8_m(...) __riscv_vor_vv_i16m8_tumu(__VA_ARGS__)

#define	vor_vv_i16mf2(...) __riscv_vor_vv_i16mf2(__VA_ARGS__)

#define	vor_vv_i16mf2_m(...) __riscv_vor_vv_i16mf2_tumu(__VA_ARGS__)

#define	vor_vv_i16mf4(...) __riscv_vor_vv_i16mf4(__VA_ARGS__)

#define	vor_vv_i16mf4_m(...) __riscv_vor_vv_i16mf4_tumu(__VA_ARGS__)

#define	vor_vv_i32m1(...) __riscv_vor_vv_i32m1(__VA_ARGS__)

#define	vor_vv_i32m1_m(...) __riscv_vor_vv_i32m1_tumu(__VA_ARGS__)

#define	vor_vv_i32m2(...) __riscv_vor_vv_i32m2(__VA_ARGS__)

#define	vor_vv_i32m2_m(...) __riscv_vor_vv_i32m2_tumu(__VA_ARGS__)

#define	vor_vv_i32m4(...) __riscv_vor_vv_i32m4(__VA_ARGS__)

#define	vor_vv_i32m4_m(...) __riscv_vor_vv_i32m4_tumu(__VA_ARGS__)

#define	vor_vv_i32m8(...) __riscv_vor_vv_i32m8(__VA_ARGS__)

#define	vor_vv_i32m8_m(...) __riscv_vor_vv_i32m8_tumu(__VA_ARGS__)

#define	vor_vv_i32mf2(...) __riscv_vor_vv_i32mf2(__VA_ARGS__)

#define	vor_vv_i32mf2_m(...) __riscv_vor_vv_i32mf2_tumu(__VA_ARGS__)

#define	vor_vv_i64m1(...) __riscv_vor_vv_i64m1(__VA_ARGS__)

#define	vor_vv_i64m1_m(...) __riscv_vor_vv_i64m1_tumu(__VA_ARGS__)

#define	vor_vv_i64m2(...) __riscv_vor_vv_i64m2(__VA_ARGS__)

#define	vor_vv_i64m2_m(...) __riscv_vor_vv_i64m2_tumu(__VA_ARGS__)

#define	vor_vv_i64m4(...) __riscv_vor_vv_i64m4(__VA_ARGS__)

#define	vor_vv_i64m4_m(...) __riscv_vor_vv_i64m4_tumu(__VA_ARGS__)

#define	vor_vv_i64m8(...) __riscv_vor_vv_i64m8(__VA_ARGS__)

#define	vor_vv_i64m8_m(...) __riscv_vor_vv_i64m8_tumu(__VA_ARGS__)

#define	vor_vv_i8m1(...) __riscv_vor_vv_i8m1(__VA_ARGS__)

#define	vor_vv_i8m1_m(...) __riscv_vor_vv_i8m1_tumu(__VA_ARGS__)

#define	vor_vv_i8m2(...) __riscv_vor_vv_i8m2(__VA_ARGS__)

#define	vor_vv_i8m2_m(...) __riscv_vor_vv_i8m2_tumu(__VA_ARGS__)

#define	vor_vv_i8m4(...) __riscv_vor_vv_i8m4(__VA_ARGS__)

#define	vor_vv_i8m4_m(...) __riscv_vor_vv_i8m4_tumu(__VA_ARGS__)

#define	vor_vv_i8m8(...) __riscv_vor_vv_i8m8(__VA_ARGS__)

#define	vor_vv_i8m8_m(...) __riscv_vor_vv_i8m8_tumu(__VA_ARGS__)

#define	vor_vv_i8mf2(...) __riscv_vor_vv_i8mf2(__VA_ARGS__)

#define	vor_vv_i8mf2_m(...) __riscv_vor_vv_i8mf2_tumu(__VA_ARGS__)

#define	vor_vv_i8mf4(...) __riscv_vor_vv_i8mf4(__VA_ARGS__)

#define	vor_vv_i8mf4_m(...) __riscv_vor_vv_i8mf4_tumu(__VA_ARGS__)

#define	vor_vv_i8mf8(...) __riscv_vor_vv_i8mf8(__VA_ARGS__)

#define	vor_vv_i8mf8_m(...) __riscv_vor_vv_i8mf8_tumu(__VA_ARGS__)

#define	vor_vv_u16m1(...) __riscv_vor_vv_u16m1(__VA_ARGS__)

#define	vor_vv_u16m1_m(...) __riscv_vor_vv_u16m1_tumu(__VA_ARGS__)

#define	vor_vv_u16m2(...) __riscv_vor_vv_u16m2(__VA_ARGS__)

#define	vor_vv_u16m2_m(...) __riscv_vor_vv_u16m2_tumu(__VA_ARGS__)

#define	vor_vv_u16m4(...) __riscv_vor_vv_u16m4(__VA_ARGS__)

#define	vor_vv_u16m4_m(...) __riscv_vor_vv_u16m4_tumu(__VA_ARGS__)

#define	vor_vv_u16m8(...) __riscv_vor_vv_u16m8(__VA_ARGS__)

#define	vor_vv_u16m8_m(...) __riscv_vor_vv_u16m8_tumu(__VA_ARGS__)

#define	vor_vv_u16mf2(...) __riscv_vor_vv_u16mf2(__VA_ARGS__)

#define	vor_vv_u16mf2_m(...) __riscv_vor_vv_u16mf2_tumu(__VA_ARGS__)

#define	vor_vv_u16mf4(...) __riscv_vor_vv_u16mf4(__VA_ARGS__)

#define	vor_vv_u16mf4_m(...) __riscv_vor_vv_u16mf4_tumu(__VA_ARGS__)

#define	vor_vv_u32m1(...) __riscv_vor_vv_u32m1(__VA_ARGS__)

#define	vor_vv_u32m1_m(...) __riscv_vor_vv_u32m1_tumu(__VA_ARGS__)

#define	vor_vv_u32m2(...) __riscv_vor_vv_u32m2(__VA_ARGS__)

#define	vor_vv_u32m2_m(...) __riscv_vor_vv_u32m2_tumu(__VA_ARGS__)

#define	vor_vv_u32m4(...) __riscv_vor_vv_u32m4(__VA_ARGS__)

#define	vor_vv_u32m4_m(...) __riscv_vor_vv_u32m4_tumu(__VA_ARGS__)

#define	vor_vv_u32m8(...) __riscv_vor_vv_u32m8(__VA_ARGS__)

#define	vor_vv_u32m8_m(...) __riscv_vor_vv_u32m8_tumu(__VA_ARGS__)

#define	vor_vv_u32mf2(...) __riscv_vor_vv_u32mf2(__VA_ARGS__)

#define	vor_vv_u32mf2_m(...) __riscv_vor_vv_u32mf2_tumu(__VA_ARGS__)

#define	vor_vv_u64m1(...) __riscv_vor_vv_u64m1(__VA_ARGS__)

#define	vor_vv_u64m1_m(...) __riscv_vor_vv_u64m1_tumu(__VA_ARGS__)

#define	vor_vv_u64m2(...) __riscv_vor_vv_u64m2(__VA_ARGS__)

#define	vor_vv_u64m2_m(...) __riscv_vor_vv_u64m2_tumu(__VA_ARGS__)

#define	vor_vv_u64m4(...) __riscv_vor_vv_u64m4(__VA_ARGS__)

#define	vor_vv_u64m4_m(...) __riscv_vor_vv_u64m4_tumu(__VA_ARGS__)

#define	vor_vv_u64m8(...) __riscv_vor_vv_u64m8(__VA_ARGS__)

#define	vor_vv_u64m8_m(...) __riscv_vor_vv_u64m8_tumu(__VA_ARGS__)

#define	vor_vv_u8m1(...) __riscv_vor_vv_u8m1(__VA_ARGS__)

#define	vor_vv_u8m1_m(...) __riscv_vor_vv_u8m1_tumu(__VA_ARGS__)

#define	vor_vv_u8m2(...) __riscv_vor_vv_u8m2(__VA_ARGS__)

#define	vor_vv_u8m2_m(...) __riscv_vor_vv_u8m2_tumu(__VA_ARGS__)

#define	vor_vv_u8m4(...) __riscv_vor_vv_u8m4(__VA_ARGS__)

#define	vor_vv_u8m4_m(...) __riscv_vor_vv_u8m4_tumu(__VA_ARGS__)

#define	vor_vv_u8m8(...) __riscv_vor_vv_u8m8(__VA_ARGS__)

#define	vor_vv_u8m8_m(...) __riscv_vor_vv_u8m8_tumu(__VA_ARGS__)

#define	vor_vv_u8mf2(...) __riscv_vor_vv_u8mf2(__VA_ARGS__)

#define	vor_vv_u8mf2_m(...) __riscv_vor_vv_u8mf2_tumu(__VA_ARGS__)

#define	vor_vv_u8mf4(...) __riscv_vor_vv_u8mf4(__VA_ARGS__)

#define	vor_vv_u8mf4_m(...) __riscv_vor_vv_u8mf4_tumu(__VA_ARGS__)

#define	vor_vv_u8mf8(...) __riscv_vor_vv_u8mf8(__VA_ARGS__)

#define	vor_vv_u8mf8_m(...) __riscv_vor_vv_u8mf8_tumu(__VA_ARGS__)

#define	vor_vx_i16m1(...) __riscv_vor_vx_i16m1(__VA_ARGS__)

#define	vor_vx_i16m1_m(...) __riscv_vor_vx_i16m1_tumu(__VA_ARGS__)

#define	vor_vx_i16m2(...) __riscv_vor_vx_i16m2(__VA_ARGS__)

#define	vor_vx_i16m2_m(...) __riscv_vor_vx_i16m2_tumu(__VA_ARGS__)

#define	vor_vx_i16m4(...) __riscv_vor_vx_i16m4(__VA_ARGS__)

#define	vor_vx_i16m4_m(...) __riscv_vor_vx_i16m4_tumu(__VA_ARGS__)

#define	vor_vx_i16m8(...) __riscv_vor_vx_i16m8(__VA_ARGS__)

#define	vor_vx_i16m8_m(...) __riscv_vor_vx_i16m8_tumu(__VA_ARGS__)

#define	vor_vx_i16mf2(...) __riscv_vor_vx_i16mf2(__VA_ARGS__)

#define	vor_vx_i16mf2_m(...) __riscv_vor_vx_i16mf2_tumu(__VA_ARGS__)

#define	vor_vx_i16mf4(...) __riscv_vor_vx_i16mf4(__VA_ARGS__)

#define	vor_vx_i16mf4_m(...) __riscv_vor_vx_i16mf4_tumu(__VA_ARGS__)

#define	vor_vx_i32m1(...) __riscv_vor_vx_i32m1(__VA_ARGS__)

#define	vor_vx_i32m1_m(...) __riscv_vor_vx_i32m1_tumu(__VA_ARGS__)

#define	vor_vx_i32m2(...) __riscv_vor_vx_i32m2(__VA_ARGS__)

#define	vor_vx_i32m2_m(...) __riscv_vor_vx_i32m2_tumu(__VA_ARGS__)

#define	vor_vx_i32m4(...) __riscv_vor_vx_i32m4(__VA_ARGS__)

#define	vor_vx_i32m4_m(...) __riscv_vor_vx_i32m4_tumu(__VA_ARGS__)

#define	vor_vx_i32m8(...) __riscv_vor_vx_i32m8(__VA_ARGS__)

#define	vor_vx_i32m8_m(...) __riscv_vor_vx_i32m8_tumu(__VA_ARGS__)

#define	vor_vx_i32mf2(...) __riscv_vor_vx_i32mf2(__VA_ARGS__)

#define	vor_vx_i32mf2_m(...) __riscv_vor_vx_i32mf2_tumu(__VA_ARGS__)

#define	vor_vx_i64m1(...) __riscv_vor_vx_i64m1(__VA_ARGS__)

#define	vor_vx_i64m1_m(...) __riscv_vor_vx_i64m1_tumu(__VA_ARGS__)

#define	vor_vx_i64m2(...) __riscv_vor_vx_i64m2(__VA_ARGS__)

#define	vor_vx_i64m2_m(...) __riscv_vor_vx_i64m2_tumu(__VA_ARGS__)

#define	vor_vx_i64m4(...) __riscv_vor_vx_i64m4(__VA_ARGS__)

#define	vor_vx_i64m4_m(...) __riscv_vor_vx_i64m4_tumu(__VA_ARGS__)

#define	vor_vx_i64m8(...) __riscv_vor_vx_i64m8(__VA_ARGS__)

#define	vor_vx_i64m8_m(...) __riscv_vor_vx_i64m8_tumu(__VA_ARGS__)

#define	vor_vx_i8m1(...) __riscv_vor_vx_i8m1(__VA_ARGS__)

#define	vor_vx_i8m1_m(...) __riscv_vor_vx_i8m1_tumu(__VA_ARGS__)

#define	vor_vx_i8m2(...) __riscv_vor_vx_i8m2(__VA_ARGS__)

#define	vor_vx_i8m2_m(...) __riscv_vor_vx_i8m2_tumu(__VA_ARGS__)

#define	vor_vx_i8m4(...) __riscv_vor_vx_i8m4(__VA_ARGS__)

#define	vor_vx_i8m4_m(...) __riscv_vor_vx_i8m4_tumu(__VA_ARGS__)

#define	vor_vx_i8m8(...) __riscv_vor_vx_i8m8(__VA_ARGS__)

#define	vor_vx_i8m8_m(...) __riscv_vor_vx_i8m8_tumu(__VA_ARGS__)

#define	vor_vx_i8mf2(...) __riscv_vor_vx_i8mf2(__VA_ARGS__)

#define	vor_vx_i8mf2_m(...) __riscv_vor_vx_i8mf2_tumu(__VA_ARGS__)

#define	vor_vx_i8mf4(...) __riscv_vor_vx_i8mf4(__VA_ARGS__)

#define	vor_vx_i8mf4_m(...) __riscv_vor_vx_i8mf4_tumu(__VA_ARGS__)

#define	vor_vx_i8mf8(...) __riscv_vor_vx_i8mf8(__VA_ARGS__)

#define	vor_vx_i8mf8_m(...) __riscv_vor_vx_i8mf8_tumu(__VA_ARGS__)

#define	vor_vx_u16m1(...) __riscv_vor_vx_u16m1(__VA_ARGS__)

#define	vor_vx_u16m1_m(...) __riscv_vor_vx_u16m1_tumu(__VA_ARGS__)

#define	vor_vx_u16m2(...) __riscv_vor_vx_u16m2(__VA_ARGS__)

#define	vor_vx_u16m2_m(...) __riscv_vor_vx_u16m2_tumu(__VA_ARGS__)

#define	vor_vx_u16m4(...) __riscv_vor_vx_u16m4(__VA_ARGS__)

#define	vor_vx_u16m4_m(...) __riscv_vor_vx_u16m4_tumu(__VA_ARGS__)

#define	vor_vx_u16m8(...) __riscv_vor_vx_u16m8(__VA_ARGS__)

#define	vor_vx_u16m8_m(...) __riscv_vor_vx_u16m8_tumu(__VA_ARGS__)

#define	vor_vx_u16mf2(...) __riscv_vor_vx_u16mf2(__VA_ARGS__)

#define	vor_vx_u16mf2_m(...) __riscv_vor_vx_u16mf2_tumu(__VA_ARGS__)

#define	vor_vx_u16mf4(...) __riscv_vor_vx_u16mf4(__VA_ARGS__)

#define	vor_vx_u16mf4_m(...) __riscv_vor_vx_u16mf4_tumu(__VA_ARGS__)

#define	vor_vx_u32m1(...) __riscv_vor_vx_u32m1(__VA_ARGS__)

#define	vor_vx_u32m1_m(...) __riscv_vor_vx_u32m1_tumu(__VA_ARGS__)

#define	vor_vx_u32m2(...) __riscv_vor_vx_u32m2(__VA_ARGS__)

#define	vor_vx_u32m2_m(...) __riscv_vor_vx_u32m2_tumu(__VA_ARGS__)

#define	vor_vx_u32m4(...) __riscv_vor_vx_u32m4(__VA_ARGS__)

#define	vor_vx_u32m4_m(...) __riscv_vor_vx_u32m4_tumu(__VA_ARGS__)

#define	vor_vx_u32m8(...) __riscv_vor_vx_u32m8(__VA_ARGS__)

#define	vor_vx_u32m8_m(...) __riscv_vor_vx_u32m8_tumu(__VA_ARGS__)

#define	vor_vx_u32mf2(...) __riscv_vor_vx_u32mf2(__VA_ARGS__)

#define	vor_vx_u32mf2_m(...) __riscv_vor_vx_u32mf2_tumu(__VA_ARGS__)

#define	vor_vx_u64m1(...) __riscv_vor_vx_u64m1(__VA_ARGS__)

#define	vor_vx_u64m1_m(...) __riscv_vor_vx_u64m1_tumu(__VA_ARGS__)

#define	vor_vx_u64m2(...) __riscv_vor_vx_u64m2(__VA_ARGS__)

#define	vor_vx_u64m2_m(...) __riscv_vor_vx_u64m2_tumu(__VA_ARGS__)

#define	vor_vx_u64m4(...) __riscv_vor_vx_u64m4(__VA_ARGS__)

#define	vor_vx_u64m4_m(...) __riscv_vor_vx_u64m4_tumu(__VA_ARGS__)

#define	vor_vx_u64m8(...) __riscv_vor_vx_u64m8(__VA_ARGS__)

#define	vor_vx_u64m8_m(...) __riscv_vor_vx_u64m8_tumu(__VA_ARGS__)

#define	vor_vx_u8m1(...) __riscv_vor_vx_u8m1(__VA_ARGS__)

#define	vor_vx_u8m1_m(...) __riscv_vor_vx_u8m1_tumu(__VA_ARGS__)

#define	vor_vx_u8m2(...) __riscv_vor_vx_u8m2(__VA_ARGS__)

#define	vor_vx_u8m2_m(...) __riscv_vor_vx_u8m2_tumu(__VA_ARGS__)

#define	vor_vx_u8m4(...) __riscv_vor_vx_u8m4(__VA_ARGS__)

#define	vor_vx_u8m4_m(...) __riscv_vor_vx_u8m4_tumu(__VA_ARGS__)

#define	vor_vx_u8m8(...) __riscv_vor_vx_u8m8(__VA_ARGS__)

#define	vor_vx_u8m8_m(...) __riscv_vor_vx_u8m8_tumu(__VA_ARGS__)

#define	vor_vx_u8mf2(...) __riscv_vor_vx_u8mf2(__VA_ARGS__)

#define	vor_vx_u8mf2_m(...) __riscv_vor_vx_u8mf2_tumu(__VA_ARGS__)

#define	vor_vx_u8mf4(...) __riscv_vor_vx_u8mf4(__VA_ARGS__)

#define	vor_vx_u8mf4_m(...) __riscv_vor_vx_u8mf4_tumu(__VA_ARGS__)

#define	vor_vx_u8mf8(...) __riscv_vor_vx_u8mf8(__VA_ARGS__)

#define	vor_vx_u8mf8_m(...) __riscv_vor_vx_u8mf8_tumu(__VA_ARGS__)

#define	vredand_vs_i16m1_i16m1(...) __riscv_vredand_vs_i16m1_i16m1_tu(__VA_ARGS__)

#define	vredand_vs_i16m1_i16m1_m(...) __riscv_vredand_vs_i16m1_i16m1_tum(__VA_ARGS__)

#define	vredand_vs_i16m2_i16m1(...) __riscv_vredand_vs_i16m2_i16m1_tu(__VA_ARGS__)

#define	vredand_vs_i16m2_i16m1_m(...) __riscv_vredand_vs_i16m2_i16m1_tum(__VA_ARGS__)

#define	vredand_vs_i16m4_i16m1(...) __riscv_vredand_vs_i16m4_i16m1_tu(__VA_ARGS__)

#define	vredand_vs_i16m4_i16m1_m(...) __riscv_vredand_vs_i16m4_i16m1_tum(__VA_ARGS__)

#define	vredand_vs_i16m8_i16m1(...) __riscv_vredand_vs_i16m8_i16m1_tu(__VA_ARGS__)

#define	vredand_vs_i16m8_i16m1_m(...) __riscv_vredand_vs_i16m8_i16m1_tum(__VA_ARGS__)

#define	vredand_vs_i16mf2_i16m1(...) __riscv_vredand_vs_i16mf2_i16m1_tu(__VA_ARGS__)

#define	vredand_vs_i16mf2_i16m1_m(...) __riscv_vredand_vs_i16mf2_i16m1_tum(__VA_ARGS__)

#define	vredand_vs_i16mf4_i16m1(...) __riscv_vredand_vs_i16mf4_i16m1_tu(__VA_ARGS__)

#define	vredand_vs_i16mf4_i16m1_m(...) __riscv_vredand_vs_i16mf4_i16m1_tum(__VA_ARGS__)

#define	vredand_vs_i32m1_i32m1(...) __riscv_vredand_vs_i32m1_i32m1_tu(__VA_ARGS__)

#define	vredand_vs_i32m1_i32m1_m(...) __riscv_vredand_vs_i32m1_i32m1_tum(__VA_ARGS__)

#define	vredand_vs_i32m2_i32m1(...) __riscv_vredand_vs_i32m2_i32m1_tu(__VA_ARGS__)

#define	vredand_vs_i32m2_i32m1_m(...) __riscv_vredand_vs_i32m2_i32m1_tum(__VA_ARGS__)

#define	vredand_vs_i32m4_i32m1(...) __riscv_vredand_vs_i32m4_i32m1_tu(__VA_ARGS__)

#define	vredand_vs_i32m4_i32m1_m(...) __riscv_vredand_vs_i32m4_i32m1_tum(__VA_ARGS__)

#define	vredand_vs_i32m8_i32m1(...) __riscv_vredand_vs_i32m8_i32m1_tu(__VA_ARGS__)

#define	vredand_vs_i32m8_i32m1_m(...) __riscv_vredand_vs_i32m8_i32m1_tum(__VA_ARGS__)

#define	vredand_vs_i32mf2_i32m1(...) __riscv_vredand_vs_i32mf2_i32m1_tu(__VA_ARGS__)

#define	vredand_vs_i32mf2_i32m1_m(...) __riscv_vredand_vs_i32mf2_i32m1_tum(__VA_ARGS__)

#define	vredand_vs_i64m1_i64m1(...) __riscv_vredand_vs_i64m1_i64m1_tu(__VA_ARGS__)

#define	vredand_vs_i64m1_i64m1_m(...) __riscv_vredand_vs_i64m1_i64m1_tum(__VA_ARGS__)

#define	vredand_vs_i64m2_i64m1(...) __riscv_vredand_vs_i64m2_i64m1_tu(__VA_ARGS__)

#define	vredand_vs_i64m2_i64m1_m(...) __riscv_vredand_vs_i64m2_i64m1_tum(__VA_ARGS__)

#define	vredand_vs_i64m4_i64m1(...) __riscv_vredand_vs_i64m4_i64m1_tu(__VA_ARGS__)

#define	vredand_vs_i64m4_i64m1_m(...) __riscv_vredand_vs_i64m4_i64m1_tum(__VA_ARGS__)

#define	vredand_vs_i64m8_i64m1(...) __riscv_vredand_vs_i64m8_i64m1_tu(__VA_ARGS__)

#define	vredand_vs_i64m8_i64m1_m(...) __riscv_vredand_vs_i64m8_i64m1_tum(__VA_ARGS__)

#define	vredand_vs_i8m1_i8m1(...) __riscv_vredand_vs_i8m1_i8m1_tu(__VA_ARGS__)

#define	vredand_vs_i8m1_i8m1_m(...) __riscv_vredand_vs_i8m1_i8m1_tum(__VA_ARGS__)

#define	vredand_vs_i8m2_i8m1(...) __riscv_vredand_vs_i8m2_i8m1_tu(__VA_ARGS__)

#define	vredand_vs_i8m2_i8m1_m(...) __riscv_vredand_vs_i8m2_i8m1_tum(__VA_ARGS__)

#define	vredand_vs_i8m4_i8m1(...) __riscv_vredand_vs_i8m4_i8m1_tu(__VA_ARGS__)

#define	vredand_vs_i8m4_i8m1_m(...) __riscv_vredand_vs_i8m4_i8m1_tum(__VA_ARGS__)

#define	vredand_vs_i8m8_i8m1(...) __riscv_vredand_vs_i8m8_i8m1_tu(__VA_ARGS__)

#define	vredand_vs_i8m8_i8m1_m(...) __riscv_vredand_vs_i8m8_i8m1_tum(__VA_ARGS__)

#define	vredand_vs_i8mf2_i8m1(...) __riscv_vredand_vs_i8mf2_i8m1_tu(__VA_ARGS__)

#define	vredand_vs_i8mf2_i8m1_m(...) __riscv_vredand_vs_i8mf2_i8m1_tum(__VA_ARGS__)

#define	vredand_vs_i8mf4_i8m1(...) __riscv_vredand_vs_i8mf4_i8m1_tu(__VA_ARGS__)

#define	vredand_vs_i8mf4_i8m1_m(...) __riscv_vredand_vs_i8mf4_i8m1_tum(__VA_ARGS__)

#define	vredand_vs_i8mf8_i8m1(...) __riscv_vredand_vs_i8mf8_i8m1_tu(__VA_ARGS__)

#define	vredand_vs_i8mf8_i8m1_m(...) __riscv_vredand_vs_i8mf8_i8m1_tum(__VA_ARGS__)

#define	vredand_vs_u16m1_u16m1(...) __riscv_vredand_vs_u16m1_u16m1_tu(__VA_ARGS__)

#define	vredand_vs_u16m1_u16m1_m(...) __riscv_vredand_vs_u16m1_u16m1_tum(__VA_ARGS__)

#define	vredand_vs_u16m2_u16m1(...) __riscv_vredand_vs_u16m2_u16m1_tu(__VA_ARGS__)

#define	vredand_vs_u16m2_u16m1_m(...) __riscv_vredand_vs_u16m2_u16m1_tum(__VA_ARGS__)

#define	vredand_vs_u16m4_u16m1(...) __riscv_vredand_vs_u16m4_u16m1_tu(__VA_ARGS__)

#define	vredand_vs_u16m4_u16m1_m(...) __riscv_vredand_vs_u16m4_u16m1_tum(__VA_ARGS__)

#define	vredand_vs_u16m8_u16m1(...) __riscv_vredand_vs_u16m8_u16m1_tu(__VA_ARGS__)

#define	vredand_vs_u16m8_u16m1_m(...) __riscv_vredand_vs_u16m8_u16m1_tum(__VA_ARGS__)

#define	vredand_vs_u16mf2_u16m1(...) __riscv_vredand_vs_u16mf2_u16m1_tu(__VA_ARGS__)

#define	vredand_vs_u16mf2_u16m1_m(...) __riscv_vredand_vs_u16mf2_u16m1_tum(__VA_ARGS__)

#define	vredand_vs_u16mf4_u16m1(...) __riscv_vredand_vs_u16mf4_u16m1_tu(__VA_ARGS__)

#define	vredand_vs_u16mf4_u16m1_m(...) __riscv_vredand_vs_u16mf4_u16m1_tum(__VA_ARGS__)

#define	vredand_vs_u32m1_u32m1(...) __riscv_vredand_vs_u32m1_u32m1_tu(__VA_ARGS__)

#define	vredand_vs_u32m1_u32m1_m(...) __riscv_vredand_vs_u32m1_u32m1_tum(__VA_ARGS__)

#define	vredand_vs_u32m2_u32m1(...) __riscv_vredand_vs_u32m2_u32m1_tu(__VA_ARGS__)

#define	vredand_vs_u32m2_u32m1_m(...) __riscv_vredand_vs_u32m2_u32m1_tum(__VA_ARGS__)

#define	vredand_vs_u32m4_u32m1(...) __riscv_vredand_vs_u32m4_u32m1_tu(__VA_ARGS__)

#define	vredand_vs_u32m4_u32m1_m(...) __riscv_vredand_vs_u32m4_u32m1_tum(__VA_ARGS__)

#define	vredand_vs_u32m8_u32m1(...) __riscv_vredand_vs_u32m8_u32m1_tu(__VA_ARGS__)

#define	vredand_vs_u32m8_u32m1_m(...) __riscv_vredand_vs_u32m8_u32m1_tum(__VA_ARGS__)

#define	vredand_vs_u32mf2_u32m1(...) __riscv_vredand_vs_u32mf2_u32m1_tu(__VA_ARGS__)

#define	vredand_vs_u32mf2_u32m1_m(...) __riscv_vredand_vs_u32mf2_u32m1_tum(__VA_ARGS__)

#define	vredand_vs_u64m1_u64m1(...) __riscv_vredand_vs_u64m1_u64m1_tu(__VA_ARGS__)

#define	vredand_vs_u64m1_u64m1_m(...) __riscv_vredand_vs_u64m1_u64m1_tum(__VA_ARGS__)

#define	vredand_vs_u64m2_u64m1(...) __riscv_vredand_vs_u64m2_u64m1_tu(__VA_ARGS__)

#define	vredand_vs_u64m2_u64m1_m(...) __riscv_vredand_vs_u64m2_u64m1_tum(__VA_ARGS__)

#define	vredand_vs_u64m4_u64m1(...) __riscv_vredand_vs_u64m4_u64m1_tu(__VA_ARGS__)

#define	vredand_vs_u64m4_u64m1_m(...) __riscv_vredand_vs_u64m4_u64m1_tum(__VA_ARGS__)

#define	vredand_vs_u64m8_u64m1(...) __riscv_vredand_vs_u64m8_u64m1_tu(__VA_ARGS__)

#define	vredand_vs_u64m8_u64m1_m(...) __riscv_vredand_vs_u64m8_u64m1_tum(__VA_ARGS__)

#define	vredand_vs_u8m1_u8m1(...) __riscv_vredand_vs_u8m1_u8m1_tu(__VA_ARGS__)

#define	vredand_vs_u8m1_u8m1_m(...) __riscv_vredand_vs_u8m1_u8m1_tum(__VA_ARGS__)

#define	vredand_vs_u8m2_u8m1(...) __riscv_vredand_vs_u8m2_u8m1_tu(__VA_ARGS__)

#define	vredand_vs_u8m2_u8m1_m(...) __riscv_vredand_vs_u8m2_u8m1_tum(__VA_ARGS__)

#define	vredand_vs_u8m4_u8m1(...) __riscv_vredand_vs_u8m4_u8m1_tu(__VA_ARGS__)

#define	vredand_vs_u8m4_u8m1_m(...) __riscv_vredand_vs_u8m4_u8m1_tum(__VA_ARGS__)

#define	vredand_vs_u8m8_u8m1(...) __riscv_vredand_vs_u8m8_u8m1_tu(__VA_ARGS__)

#define	vredand_vs_u8m8_u8m1_m(...) __riscv_vredand_vs_u8m8_u8m1_tum(__VA_ARGS__)

#define	vredand_vs_u8mf2_u8m1(...) __riscv_vredand_vs_u8mf2_u8m1_tu(__VA_ARGS__)

#define	vredand_vs_u8mf2_u8m1_m(...) __riscv_vredand_vs_u8mf2_u8m1_tum(__VA_ARGS__)

#define	vredand_vs_u8mf4_u8m1(...) __riscv_vredand_vs_u8mf4_u8m1_tu(__VA_ARGS__)

#define	vredand_vs_u8mf4_u8m1_m(...) __riscv_vredand_vs_u8mf4_u8m1_tum(__VA_ARGS__)

#define	vredand_vs_u8mf8_u8m1(...) __riscv_vredand_vs_u8mf8_u8m1_tu(__VA_ARGS__)

#define	vredand_vs_u8mf8_u8m1_m(...) __riscv_vredand_vs_u8mf8_u8m1_tum(__VA_ARGS__)

#define	vredmax_vs_i16m1_i16m1(...) __riscv_vredmax_vs_i16m1_i16m1_tu(__VA_ARGS__)

#define	vredmax_vs_i16m1_i16m1_m(...) __riscv_vredmax_vs_i16m1_i16m1_tum(__VA_ARGS__)

#define	vredmax_vs_i16m2_i16m1(...) __riscv_vredmax_vs_i16m2_i16m1_tu(__VA_ARGS__)

#define	vredmax_vs_i16m2_i16m1_m(...) __riscv_vredmax_vs_i16m2_i16m1_tum(__VA_ARGS__)

#define	vredmax_vs_i16m4_i16m1(...) __riscv_vredmax_vs_i16m4_i16m1_tu(__VA_ARGS__)

#define	vredmax_vs_i16m4_i16m1_m(...) __riscv_vredmax_vs_i16m4_i16m1_tum(__VA_ARGS__)

#define	vredmax_vs_i16m8_i16m1(...) __riscv_vredmax_vs_i16m8_i16m1_tu(__VA_ARGS__)

#define	vredmax_vs_i16m8_i16m1_m(...) __riscv_vredmax_vs_i16m8_i16m1_tum(__VA_ARGS__)

#define	vredmax_vs_i16mf2_i16m1(...) __riscv_vredmax_vs_i16mf2_i16m1_tu(__VA_ARGS__)

#define	vredmax_vs_i16mf2_i16m1_m(...) __riscv_vredmax_vs_i16mf2_i16m1_tum(__VA_ARGS__)

#define	vredmax_vs_i16mf4_i16m1(...) __riscv_vredmax_vs_i16mf4_i16m1_tu(__VA_ARGS__)

#define	vredmax_vs_i16mf4_i16m1_m(...) __riscv_vredmax_vs_i16mf4_i16m1_tum(__VA_ARGS__)

#define	vredmax_vs_i32m1_i32m1(...) __riscv_vredmax_vs_i32m1_i32m1_tu(__VA_ARGS__)

#define	vredmax_vs_i32m1_i32m1_m(...) __riscv_vredmax_vs_i32m1_i32m1_tum(__VA_ARGS__)

#define	vredmax_vs_i32m2_i32m1(...) __riscv_vredmax_vs_i32m2_i32m1_tu(__VA_ARGS__)

#define	vredmax_vs_i32m2_i32m1_m(...) __riscv_vredmax_vs_i32m2_i32m1_tum(__VA_ARGS__)

#define	vredmax_vs_i32m4_i32m1(...) __riscv_vredmax_vs_i32m4_i32m1_tu(__VA_ARGS__)

#define	vredmax_vs_i32m4_i32m1_m(...) __riscv_vredmax_vs_i32m4_i32m1_tum(__VA_ARGS__)

#define	vredmax_vs_i32m8_i32m1(...) __riscv_vredmax_vs_i32m8_i32m1_tu(__VA_ARGS__)

#define	vredmax_vs_i32m8_i32m1_m(...) __riscv_vredmax_vs_i32m8_i32m1_tum(__VA_ARGS__)

#define	vredmax_vs_i32mf2_i32m1(...) __riscv_vredmax_vs_i32mf2_i32m1_tu(__VA_ARGS__)

#define	vredmax_vs_i32mf2_i32m1_m(...) __riscv_vredmax_vs_i32mf2_i32m1_tum(__VA_ARGS__)

#define	vredmax_vs_i64m1_i64m1(...) __riscv_vredmax_vs_i64m1_i64m1_tu(__VA_ARGS__)

#define	vredmax_vs_i64m1_i64m1_m(...) __riscv_vredmax_vs_i64m1_i64m1_tum(__VA_ARGS__)

#define	vredmax_vs_i64m2_i64m1(...) __riscv_vredmax_vs_i64m2_i64m1_tu(__VA_ARGS__)

#define	vredmax_vs_i64m2_i64m1_m(...) __riscv_vredmax_vs_i64m2_i64m1_tum(__VA_ARGS__)

#define	vredmax_vs_i64m4_i64m1(...) __riscv_vredmax_vs_i64m4_i64m1_tu(__VA_ARGS__)

#define	vredmax_vs_i64m4_i64m1_m(...) __riscv_vredmax_vs_i64m4_i64m1_tum(__VA_ARGS__)

#define	vredmax_vs_i64m8_i64m1(...) __riscv_vredmax_vs_i64m8_i64m1_tu(__VA_ARGS__)

#define	vredmax_vs_i64m8_i64m1_m(...) __riscv_vredmax_vs_i64m8_i64m1_tum(__VA_ARGS__)

#define	vredmax_vs_i8m1_i8m1(...) __riscv_vredmax_vs_i8m1_i8m1_tu(__VA_ARGS__)

#define	vredmax_vs_i8m1_i8m1_m(...) __riscv_vredmax_vs_i8m1_i8m1_tum(__VA_ARGS__)

#define	vredmax_vs_i8m2_i8m1(...) __riscv_vredmax_vs_i8m2_i8m1_tu(__VA_ARGS__)

#define	vredmax_vs_i8m2_i8m1_m(...) __riscv_vredmax_vs_i8m2_i8m1_tum(__VA_ARGS__)

#define	vredmax_vs_i8m4_i8m1(...) __riscv_vredmax_vs_i8m4_i8m1_tu(__VA_ARGS__)

#define	vredmax_vs_i8m4_i8m1_m(...) __riscv_vredmax_vs_i8m4_i8m1_tum(__VA_ARGS__)

#define	vredmax_vs_i8m8_i8m1(...) __riscv_vredmax_vs_i8m8_i8m1_tu(__VA_ARGS__)

#define	vredmax_vs_i8m8_i8m1_m(...) __riscv_vredmax_vs_i8m8_i8m1_tum(__VA_ARGS__)

#define	vredmax_vs_i8mf2_i8m1(...) __riscv_vredmax_vs_i8mf2_i8m1_tu(__VA_ARGS__)

#define	vredmax_vs_i8mf2_i8m1_m(...) __riscv_vredmax_vs_i8mf2_i8m1_tum(__VA_ARGS__)

#define	vredmax_vs_i8mf4_i8m1(...) __riscv_vredmax_vs_i8mf4_i8m1_tu(__VA_ARGS__)

#define	vredmax_vs_i8mf4_i8m1_m(...) __riscv_vredmax_vs_i8mf4_i8m1_tum(__VA_ARGS__)

#define	vredmax_vs_i8mf8_i8m1(...) __riscv_vredmax_vs_i8mf8_i8m1_tu(__VA_ARGS__)

#define	vredmax_vs_i8mf8_i8m1_m(...) __riscv_vredmax_vs_i8mf8_i8m1_tum(__VA_ARGS__)

#define	vredmaxu_vs_u16m1_u16m1(...) __riscv_vredmaxu_vs_u16m1_u16m1_tu(__VA_ARGS__)

#define	vredmaxu_vs_u16m1_u16m1_m(...) __riscv_vredmaxu_vs_u16m1_u16m1_tum(__VA_ARGS__)

#define	vredmaxu_vs_u16m2_u16m1(...) __riscv_vredmaxu_vs_u16m2_u16m1_tu(__VA_ARGS__)

#define	vredmaxu_vs_u16m2_u16m1_m(...) __riscv_vredmaxu_vs_u16m2_u16m1_tum(__VA_ARGS__)

#define	vredmaxu_vs_u16m4_u16m1(...) __riscv_vredmaxu_vs_u16m4_u16m1_tu(__VA_ARGS__)

#define	vredmaxu_vs_u16m4_u16m1_m(...) __riscv_vredmaxu_vs_u16m4_u16m1_tum(__VA_ARGS__)

#define	vredmaxu_vs_u16m8_u16m1(...) __riscv_vredmaxu_vs_u16m8_u16m1_tu(__VA_ARGS__)

#define	vredmaxu_vs_u16m8_u16m1_m(...) __riscv_vredmaxu_vs_u16m8_u16m1_tum(__VA_ARGS__)

#define	vredmaxu_vs_u16mf2_u16m1(...) __riscv_vredmaxu_vs_u16mf2_u16m1_tu(__VA_ARGS__)

#define	vredmaxu_vs_u16mf2_u16m1_m(...) __riscv_vredmaxu_vs_u16mf2_u16m1_tum(__VA_ARGS__)

#define	vredmaxu_vs_u16mf4_u16m1(...) __riscv_vredmaxu_vs_u16mf4_u16m1_tu(__VA_ARGS__)

#define	vredmaxu_vs_u16mf4_u16m1_m(...) __riscv_vredmaxu_vs_u16mf4_u16m1_tum(__VA_ARGS__)

#define	vredmaxu_vs_u32m1_u32m1(...) __riscv_vredmaxu_vs_u32m1_u32m1_tu(__VA_ARGS__)

#define	vredmaxu_vs_u32m1_u32m1_m(...) __riscv_vredmaxu_vs_u32m1_u32m1_tum(__VA_ARGS__)

#define	vredmaxu_vs_u32m2_u32m1(...) __riscv_vredmaxu_vs_u32m2_u32m1_tu(__VA_ARGS__)

#define	vredmaxu_vs_u32m2_u32m1_m(...) __riscv_vredmaxu_vs_u32m2_u32m1_tum(__VA_ARGS__)

#define	vredmaxu_vs_u32m4_u32m1(...) __riscv_vredmaxu_vs_u32m4_u32m1_tu(__VA_ARGS__)

#define	vredmaxu_vs_u32m4_u32m1_m(...) __riscv_vredmaxu_vs_u32m4_u32m1_tum(__VA_ARGS__)

#define	vredmaxu_vs_u32m8_u32m1(...) __riscv_vredmaxu_vs_u32m8_u32m1_tu(__VA_ARGS__)

#define	vredmaxu_vs_u32m8_u32m1_m(...) __riscv_vredmaxu_vs_u32m8_u32m1_tum(__VA_ARGS__)

#define	vredmaxu_vs_u32mf2_u32m1(...) __riscv_vredmaxu_vs_u32mf2_u32m1_tu(__VA_ARGS__)

#define	vredmaxu_vs_u32mf2_u32m1_m(...) __riscv_vredmaxu_vs_u32mf2_u32m1_tum(__VA_ARGS__)

#define	vredmaxu_vs_u64m1_u64m1(...) __riscv_vredmaxu_vs_u64m1_u64m1_tu(__VA_ARGS__)

#define	vredmaxu_vs_u64m1_u64m1_m(...) __riscv_vredmaxu_vs_u64m1_u64m1_tum(__VA_ARGS__)

#define	vredmaxu_vs_u64m2_u64m1(...) __riscv_vredmaxu_vs_u64m2_u64m1_tu(__VA_ARGS__)

#define	vredmaxu_vs_u64m2_u64m1_m(...) __riscv_vredmaxu_vs_u64m2_u64m1_tum(__VA_ARGS__)

#define	vredmaxu_vs_u64m4_u64m1(...) __riscv_vredmaxu_vs_u64m4_u64m1_tu(__VA_ARGS__)

#define	vredmaxu_vs_u64m4_u64m1_m(...) __riscv_vredmaxu_vs_u64m4_u64m1_tum(__VA_ARGS__)

#define	vredmaxu_vs_u64m8_u64m1(...) __riscv_vredmaxu_vs_u64m8_u64m1_tu(__VA_ARGS__)

#define	vredmaxu_vs_u64m8_u64m1_m(...) __riscv_vredmaxu_vs_u64m8_u64m1_tum(__VA_ARGS__)

#define	vredmaxu_vs_u8m1_u8m1(...) __riscv_vredmaxu_vs_u8m1_u8m1_tu(__VA_ARGS__)

#define	vredmaxu_vs_u8m1_u8m1_m(...) __riscv_vredmaxu_vs_u8m1_u8m1_tum(__VA_ARGS__)

#define	vredmaxu_vs_u8m2_u8m1(...) __riscv_vredmaxu_vs_u8m2_u8m1_tu(__VA_ARGS__)

#define	vredmaxu_vs_u8m2_u8m1_m(...) __riscv_vredmaxu_vs_u8m2_u8m1_tum(__VA_ARGS__)

#define	vredmaxu_vs_u8m4_u8m1(...) __riscv_vredmaxu_vs_u8m4_u8m1_tu(__VA_ARGS__)

#define	vredmaxu_vs_u8m4_u8m1_m(...) __riscv_vredmaxu_vs_u8m4_u8m1_tum(__VA_ARGS__)

#define	vredmaxu_vs_u8m8_u8m1(...) __riscv_vredmaxu_vs_u8m8_u8m1_tu(__VA_ARGS__)

#define	vredmaxu_vs_u8m8_u8m1_m(...) __riscv_vredmaxu_vs_u8m8_u8m1_tum(__VA_ARGS__)

#define	vredmaxu_vs_u8mf2_u8m1(...) __riscv_vredmaxu_vs_u8mf2_u8m1_tu(__VA_ARGS__)

#define	vredmaxu_vs_u8mf2_u8m1_m(...) __riscv_vredmaxu_vs_u8mf2_u8m1_tum(__VA_ARGS__)

#define	vredmaxu_vs_u8mf4_u8m1(...) __riscv_vredmaxu_vs_u8mf4_u8m1_tu(__VA_ARGS__)

#define	vredmaxu_vs_u8mf4_u8m1_m(...) __riscv_vredmaxu_vs_u8mf4_u8m1_tum(__VA_ARGS__)

#define	vredmaxu_vs_u8mf8_u8m1(...) __riscv_vredmaxu_vs_u8mf8_u8m1_tu(__VA_ARGS__)

#define	vredmaxu_vs_u8mf8_u8m1_m(...) __riscv_vredmaxu_vs_u8mf8_u8m1_tum(__VA_ARGS__)

#define	vredmin_vs_i16m1_i16m1(...) __riscv_vredmin_vs_i16m1_i16m1_tu(__VA_ARGS__)

#define	vredmin_vs_i16m1_i16m1_m(...) __riscv_vredmin_vs_i16m1_i16m1_tum(__VA_ARGS__)

#define	vredmin_vs_i16m2_i16m1(...) __riscv_vredmin_vs_i16m2_i16m1_tu(__VA_ARGS__)

#define	vredmin_vs_i16m2_i16m1_m(...) __riscv_vredmin_vs_i16m2_i16m1_tum(__VA_ARGS__)

#define	vredmin_vs_i16m4_i16m1(...) __riscv_vredmin_vs_i16m4_i16m1_tu(__VA_ARGS__)

#define	vredmin_vs_i16m4_i16m1_m(...) __riscv_vredmin_vs_i16m4_i16m1_tum(__VA_ARGS__)

#define	vredmin_vs_i16m8_i16m1(...) __riscv_vredmin_vs_i16m8_i16m1_tu(__VA_ARGS__)

#define	vredmin_vs_i16m8_i16m1_m(...) __riscv_vredmin_vs_i16m8_i16m1_tum(__VA_ARGS__)

#define	vredmin_vs_i16mf2_i16m1(...) __riscv_vredmin_vs_i16mf2_i16m1_tu(__VA_ARGS__)

#define	vredmin_vs_i16mf2_i16m1_m(...) __riscv_vredmin_vs_i16mf2_i16m1_tum(__VA_ARGS__)

#define	vredmin_vs_i16mf4_i16m1(...) __riscv_vredmin_vs_i16mf4_i16m1_tu(__VA_ARGS__)

#define	vredmin_vs_i16mf4_i16m1_m(...) __riscv_vredmin_vs_i16mf4_i16m1_tum(__VA_ARGS__)

#define	vredmin_vs_i32m1_i32m1(...) __riscv_vredmin_vs_i32m1_i32m1_tu(__VA_ARGS__)

#define	vredmin_vs_i32m1_i32m1_m(...) __riscv_vredmin_vs_i32m1_i32m1_tum(__VA_ARGS__)

#define	vredmin_vs_i32m2_i32m1(...) __riscv_vredmin_vs_i32m2_i32m1_tu(__VA_ARGS__)

#define	vredmin_vs_i32m2_i32m1_m(...) __riscv_vredmin_vs_i32m2_i32m1_tum(__VA_ARGS__)

#define	vredmin_vs_i32m4_i32m1(...) __riscv_vredmin_vs_i32m4_i32m1_tu(__VA_ARGS__)

#define	vredmin_vs_i32m4_i32m1_m(...) __riscv_vredmin_vs_i32m4_i32m1_tum(__VA_ARGS__)

#define	vredmin_vs_i32m8_i32m1(...) __riscv_vredmin_vs_i32m8_i32m1_tu(__VA_ARGS__)

#define	vredmin_vs_i32m8_i32m1_m(...) __riscv_vredmin_vs_i32m8_i32m1_tum(__VA_ARGS__)

#define	vredmin_vs_i32mf2_i32m1(...) __riscv_vredmin_vs_i32mf2_i32m1_tu(__VA_ARGS__)

#define	vredmin_vs_i32mf2_i32m1_m(...) __riscv_vredmin_vs_i32mf2_i32m1_tum(__VA_ARGS__)

#define	vredmin_vs_i64m1_i64m1(...) __riscv_vredmin_vs_i64m1_i64m1_tu(__VA_ARGS__)

#define	vredmin_vs_i64m1_i64m1_m(...) __riscv_vredmin_vs_i64m1_i64m1_tum(__VA_ARGS__)

#define	vredmin_vs_i64m2_i64m1(...) __riscv_vredmin_vs_i64m2_i64m1_tu(__VA_ARGS__)

#define	vredmin_vs_i64m2_i64m1_m(...) __riscv_vredmin_vs_i64m2_i64m1_tum(__VA_ARGS__)

#define	vredmin_vs_i64m4_i64m1(...) __riscv_vredmin_vs_i64m4_i64m1_tu(__VA_ARGS__)

#define	vredmin_vs_i64m4_i64m1_m(...) __riscv_vredmin_vs_i64m4_i64m1_tum(__VA_ARGS__)

#define	vredmin_vs_i64m8_i64m1(...) __riscv_vredmin_vs_i64m8_i64m1_tu(__VA_ARGS__)

#define	vredmin_vs_i64m8_i64m1_m(...) __riscv_vredmin_vs_i64m8_i64m1_tum(__VA_ARGS__)

#define	vredmin_vs_i8m1_i8m1(...) __riscv_vredmin_vs_i8m1_i8m1_tu(__VA_ARGS__)

#define	vredmin_vs_i8m1_i8m1_m(...) __riscv_vredmin_vs_i8m1_i8m1_tum(__VA_ARGS__)

#define	vredmin_vs_i8m2_i8m1(...) __riscv_vredmin_vs_i8m2_i8m1_tu(__VA_ARGS__)

#define	vredmin_vs_i8m2_i8m1_m(...) __riscv_vredmin_vs_i8m2_i8m1_tum(__VA_ARGS__)

#define	vredmin_vs_i8m4_i8m1(...) __riscv_vredmin_vs_i8m4_i8m1_tu(__VA_ARGS__)

#define	vredmin_vs_i8m4_i8m1_m(...) __riscv_vredmin_vs_i8m4_i8m1_tum(__VA_ARGS__)

#define	vredmin_vs_i8m8_i8m1(...) __riscv_vredmin_vs_i8m8_i8m1_tu(__VA_ARGS__)

#define	vredmin_vs_i8m8_i8m1_m(...) __riscv_vredmin_vs_i8m8_i8m1_tum(__VA_ARGS__)

#define	vredmin_vs_i8mf2_i8m1(...) __riscv_vredmin_vs_i8mf2_i8m1_tu(__VA_ARGS__)

#define	vredmin_vs_i8mf2_i8m1_m(...) __riscv_vredmin_vs_i8mf2_i8m1_tum(__VA_ARGS__)

#define	vredmin_vs_i8mf4_i8m1(...) __riscv_vredmin_vs_i8mf4_i8m1_tu(__VA_ARGS__)

#define	vredmin_vs_i8mf4_i8m1_m(...) __riscv_vredmin_vs_i8mf4_i8m1_tum(__VA_ARGS__)

#define	vredmin_vs_i8mf8_i8m1(...) __riscv_vredmin_vs_i8mf8_i8m1_tu(__VA_ARGS__)

#define	vredmin_vs_i8mf8_i8m1_m(...) __riscv_vredmin_vs_i8mf8_i8m1_tum(__VA_ARGS__)

#define	vredminu_vs_u16m1_u16m1(...) __riscv_vredminu_vs_u16m1_u16m1_tu(__VA_ARGS__)

#define	vredminu_vs_u16m1_u16m1_m(...) __riscv_vredminu_vs_u16m1_u16m1_tum(__VA_ARGS__)

#define	vredminu_vs_u16m2_u16m1(...) __riscv_vredminu_vs_u16m2_u16m1_tu(__VA_ARGS__)

#define	vredminu_vs_u16m2_u16m1_m(...) __riscv_vredminu_vs_u16m2_u16m1_tum(__VA_ARGS__)

#define	vredminu_vs_u16m4_u16m1(...) __riscv_vredminu_vs_u16m4_u16m1_tu(__VA_ARGS__)

#define	vredminu_vs_u16m4_u16m1_m(...) __riscv_vredminu_vs_u16m4_u16m1_tum(__VA_ARGS__)

#define	vredminu_vs_u16m8_u16m1(...) __riscv_vredminu_vs_u16m8_u16m1_tu(__VA_ARGS__)

#define	vredminu_vs_u16m8_u16m1_m(...) __riscv_vredminu_vs_u16m8_u16m1_tum(__VA_ARGS__)

#define	vredminu_vs_u16mf2_u16m1(...) __riscv_vredminu_vs_u16mf2_u16m1_tu(__VA_ARGS__)

#define	vredminu_vs_u16mf2_u16m1_m(...) __riscv_vredminu_vs_u16mf2_u16m1_tum(__VA_ARGS__)

#define	vredminu_vs_u16mf4_u16m1(...) __riscv_vredminu_vs_u16mf4_u16m1_tu(__VA_ARGS__)

#define	vredminu_vs_u16mf4_u16m1_m(...) __riscv_vredminu_vs_u16mf4_u16m1_tum(__VA_ARGS__)

#define	vredminu_vs_u32m1_u32m1(...) __riscv_vredminu_vs_u32m1_u32m1_tu(__VA_ARGS__)

#define	vredminu_vs_u32m1_u32m1_m(...) __riscv_vredminu_vs_u32m1_u32m1_tum(__VA_ARGS__)

#define	vredminu_vs_u32m2_u32m1(...) __riscv_vredminu_vs_u32m2_u32m1_tu(__VA_ARGS__)

#define	vredminu_vs_u32m2_u32m1_m(...) __riscv_vredminu_vs_u32m2_u32m1_tum(__VA_ARGS__)

#define	vredminu_vs_u32m4_u32m1(...) __riscv_vredminu_vs_u32m4_u32m1_tu(__VA_ARGS__)

#define	vredminu_vs_u32m4_u32m1_m(...) __riscv_vredminu_vs_u32m4_u32m1_tum(__VA_ARGS__)

#define	vredminu_vs_u32m8_u32m1(...) __riscv_vredminu_vs_u32m8_u32m1_tu(__VA_ARGS__)

#define	vredminu_vs_u32m8_u32m1_m(...) __riscv_vredminu_vs_u32m8_u32m1_tum(__VA_ARGS__)

#define	vredminu_vs_u32mf2_u32m1(...) __riscv_vredminu_vs_u32mf2_u32m1_tu(__VA_ARGS__)

#define	vredminu_vs_u32mf2_u32m1_m(...) __riscv_vredminu_vs_u32mf2_u32m1_tum(__VA_ARGS__)

#define	vredminu_vs_u64m1_u64m1(...) __riscv_vredminu_vs_u64m1_u64m1_tu(__VA_ARGS__)

#define	vredminu_vs_u64m1_u64m1_m(...) __riscv_vredminu_vs_u64m1_u64m1_tum(__VA_ARGS__)

#define	vredminu_vs_u64m2_u64m1(...) __riscv_vredminu_vs_u64m2_u64m1_tu(__VA_ARGS__)

#define	vredminu_vs_u64m2_u64m1_m(...) __riscv_vredminu_vs_u64m2_u64m1_tum(__VA_ARGS__)

#define	vredminu_vs_u64m4_u64m1(...) __riscv_vredminu_vs_u64m4_u64m1_tu(__VA_ARGS__)

#define	vredminu_vs_u64m4_u64m1_m(...) __riscv_vredminu_vs_u64m4_u64m1_tum(__VA_ARGS__)

#define	vredminu_vs_u64m8_u64m1(...) __riscv_vredminu_vs_u64m8_u64m1_tu(__VA_ARGS__)

#define	vredminu_vs_u64m8_u64m1_m(...) __riscv_vredminu_vs_u64m8_u64m1_tum(__VA_ARGS__)

#define	vredminu_vs_u8m1_u8m1(...) __riscv_vredminu_vs_u8m1_u8m1_tu(__VA_ARGS__)

#define	vredminu_vs_u8m1_u8m1_m(...) __riscv_vredminu_vs_u8m1_u8m1_tum(__VA_ARGS__)

#define	vredminu_vs_u8m2_u8m1(...) __riscv_vredminu_vs_u8m2_u8m1_tu(__VA_ARGS__)

#define	vredminu_vs_u8m2_u8m1_m(...) __riscv_vredminu_vs_u8m2_u8m1_tum(__VA_ARGS__)

#define	vredminu_vs_u8m4_u8m1(...) __riscv_vredminu_vs_u8m4_u8m1_tu(__VA_ARGS__)

#define	vredminu_vs_u8m4_u8m1_m(...) __riscv_vredminu_vs_u8m4_u8m1_tum(__VA_ARGS__)

#define	vredminu_vs_u8m8_u8m1(...) __riscv_vredminu_vs_u8m8_u8m1_tu(__VA_ARGS__)

#define	vredminu_vs_u8m8_u8m1_m(...) __riscv_vredminu_vs_u8m8_u8m1_tum(__VA_ARGS__)

#define	vredminu_vs_u8mf2_u8m1(...) __riscv_vredminu_vs_u8mf2_u8m1_tu(__VA_ARGS__)

#define	vredminu_vs_u8mf2_u8m1_m(...) __riscv_vredminu_vs_u8mf2_u8m1_tum(__VA_ARGS__)

#define	vredminu_vs_u8mf4_u8m1(...) __riscv_vredminu_vs_u8mf4_u8m1_tu(__VA_ARGS__)

#define	vredminu_vs_u8mf4_u8m1_m(...) __riscv_vredminu_vs_u8mf4_u8m1_tum(__VA_ARGS__)

#define	vredminu_vs_u8mf8_u8m1(...) __riscv_vredminu_vs_u8mf8_u8m1_tu(__VA_ARGS__)

#define	vredminu_vs_u8mf8_u8m1_m(...) __riscv_vredminu_vs_u8mf8_u8m1_tum(__VA_ARGS__)

#define	vredor_vs_i16m1_i16m1(...) __riscv_vredor_vs_i16m1_i16m1_tu(__VA_ARGS__)

#define	vredor_vs_i16m1_i16m1_m(...) __riscv_vredor_vs_i16m1_i16m1_tum(__VA_ARGS__)

#define	vredor_vs_i16m2_i16m1(...) __riscv_vredor_vs_i16m2_i16m1_tu(__VA_ARGS__)

#define	vredor_vs_i16m2_i16m1_m(...) __riscv_vredor_vs_i16m2_i16m1_tum(__VA_ARGS__)

#define	vredor_vs_i16m4_i16m1(...) __riscv_vredor_vs_i16m4_i16m1_tu(__VA_ARGS__)

#define	vredor_vs_i16m4_i16m1_m(...) __riscv_vredor_vs_i16m4_i16m1_tum(__VA_ARGS__)

#define	vredor_vs_i16m8_i16m1(...) __riscv_vredor_vs_i16m8_i16m1_tu(__VA_ARGS__)

#define	vredor_vs_i16m8_i16m1_m(...) __riscv_vredor_vs_i16m8_i16m1_tum(__VA_ARGS__)

#define	vredor_vs_i16mf2_i16m1(...) __riscv_vredor_vs_i16mf2_i16m1_tu(__VA_ARGS__)

#define	vredor_vs_i16mf2_i16m1_m(...) __riscv_vredor_vs_i16mf2_i16m1_tum(__VA_ARGS__)

#define	vredor_vs_i16mf4_i16m1(...) __riscv_vredor_vs_i16mf4_i16m1_tu(__VA_ARGS__)

#define	vredor_vs_i16mf4_i16m1_m(...) __riscv_vredor_vs_i16mf4_i16m1_tum(__VA_ARGS__)

#define	vredor_vs_i32m1_i32m1(...) __riscv_vredor_vs_i32m1_i32m1_tu(__VA_ARGS__)

#define	vredor_vs_i32m1_i32m1_m(...) __riscv_vredor_vs_i32m1_i32m1_tum(__VA_ARGS__)

#define	vredor_vs_i32m2_i32m1(...) __riscv_vredor_vs_i32m2_i32m1_tu(__VA_ARGS__)

#define	vredor_vs_i32m2_i32m1_m(...) __riscv_vredor_vs_i32m2_i32m1_tum(__VA_ARGS__)

#define	vredor_vs_i32m4_i32m1(...) __riscv_vredor_vs_i32m4_i32m1_tu(__VA_ARGS__)

#define	vredor_vs_i32m4_i32m1_m(...) __riscv_vredor_vs_i32m4_i32m1_tum(__VA_ARGS__)

#define	vredor_vs_i32m8_i32m1(...) __riscv_vredor_vs_i32m8_i32m1_tu(__VA_ARGS__)

#define	vredor_vs_i32m8_i32m1_m(...) __riscv_vredor_vs_i32m8_i32m1_tum(__VA_ARGS__)

#define	vredor_vs_i32mf2_i32m1(...) __riscv_vredor_vs_i32mf2_i32m1_tu(__VA_ARGS__)

#define	vredor_vs_i32mf2_i32m1_m(...) __riscv_vredor_vs_i32mf2_i32m1_tum(__VA_ARGS__)

#define	vredor_vs_i64m1_i64m1(...) __riscv_vredor_vs_i64m1_i64m1_tu(__VA_ARGS__)

#define	vredor_vs_i64m1_i64m1_m(...) __riscv_vredor_vs_i64m1_i64m1_tum(__VA_ARGS__)

#define	vredor_vs_i64m2_i64m1(...) __riscv_vredor_vs_i64m2_i64m1_tu(__VA_ARGS__)

#define	vredor_vs_i64m2_i64m1_m(...) __riscv_vredor_vs_i64m2_i64m1_tum(__VA_ARGS__)

#define	vredor_vs_i64m4_i64m1(...) __riscv_vredor_vs_i64m4_i64m1_tu(__VA_ARGS__)

#define	vredor_vs_i64m4_i64m1_m(...) __riscv_vredor_vs_i64m4_i64m1_tum(__VA_ARGS__)

#define	vredor_vs_i64m8_i64m1(...) __riscv_vredor_vs_i64m8_i64m1_tu(__VA_ARGS__)

#define	vredor_vs_i64m8_i64m1_m(...) __riscv_vredor_vs_i64m8_i64m1_tum(__VA_ARGS__)

#define	vredor_vs_i8m1_i8m1(...) __riscv_vredor_vs_i8m1_i8m1_tu(__VA_ARGS__)

#define	vredor_vs_i8m1_i8m1_m(...) __riscv_vredor_vs_i8m1_i8m1_tum(__VA_ARGS__)

#define	vredor_vs_i8m2_i8m1(...) __riscv_vredor_vs_i8m2_i8m1_tu(__VA_ARGS__)

#define	vredor_vs_i8m2_i8m1_m(...) __riscv_vredor_vs_i8m2_i8m1_tum(__VA_ARGS__)

#define	vredor_vs_i8m4_i8m1(...) __riscv_vredor_vs_i8m4_i8m1_tu(__VA_ARGS__)

#define	vredor_vs_i8m4_i8m1_m(...) __riscv_vredor_vs_i8m4_i8m1_tum(__VA_ARGS__)

#define	vredor_vs_i8m8_i8m1(...) __riscv_vredor_vs_i8m8_i8m1_tu(__VA_ARGS__)

#define	vredor_vs_i8m8_i8m1_m(...) __riscv_vredor_vs_i8m8_i8m1_tum(__VA_ARGS__)

#define	vredor_vs_i8mf2_i8m1(...) __riscv_vredor_vs_i8mf2_i8m1_tu(__VA_ARGS__)

#define	vredor_vs_i8mf2_i8m1_m(...) __riscv_vredor_vs_i8mf2_i8m1_tum(__VA_ARGS__)

#define	vredor_vs_i8mf4_i8m1(...) __riscv_vredor_vs_i8mf4_i8m1_tu(__VA_ARGS__)

#define	vredor_vs_i8mf4_i8m1_m(...) __riscv_vredor_vs_i8mf4_i8m1_tum(__VA_ARGS__)

#define	vredor_vs_i8mf8_i8m1(...) __riscv_vredor_vs_i8mf8_i8m1_tu(__VA_ARGS__)

#define	vredor_vs_i8mf8_i8m1_m(...) __riscv_vredor_vs_i8mf8_i8m1_tum(__VA_ARGS__)

#define	vredor_vs_u16m1_u16m1(...) __riscv_vredor_vs_u16m1_u16m1_tu(__VA_ARGS__)

#define	vredor_vs_u16m1_u16m1_m(...) __riscv_vredor_vs_u16m1_u16m1_tum(__VA_ARGS__)

#define	vredor_vs_u16m2_u16m1(...) __riscv_vredor_vs_u16m2_u16m1_tu(__VA_ARGS__)

#define	vredor_vs_u16m2_u16m1_m(...) __riscv_vredor_vs_u16m2_u16m1_tum(__VA_ARGS__)

#define	vredor_vs_u16m4_u16m1(...) __riscv_vredor_vs_u16m4_u16m1_tu(__VA_ARGS__)

#define	vredor_vs_u16m4_u16m1_m(...) __riscv_vredor_vs_u16m4_u16m1_tum(__VA_ARGS__)

#define	vredor_vs_u16m8_u16m1(...) __riscv_vredor_vs_u16m8_u16m1_tu(__VA_ARGS__)

#define	vredor_vs_u16m8_u16m1_m(...) __riscv_vredor_vs_u16m8_u16m1_tum(__VA_ARGS__)

#define	vredor_vs_u16mf2_u16m1(...) __riscv_vredor_vs_u16mf2_u16m1_tu(__VA_ARGS__)

#define	vredor_vs_u16mf2_u16m1_m(...) __riscv_vredor_vs_u16mf2_u16m1_tum(__VA_ARGS__)

#define	vredor_vs_u16mf4_u16m1(...) __riscv_vredor_vs_u16mf4_u16m1_tu(__VA_ARGS__)

#define	vredor_vs_u16mf4_u16m1_m(...) __riscv_vredor_vs_u16mf4_u16m1_tum(__VA_ARGS__)

#define	vredor_vs_u32m1_u32m1(...) __riscv_vredor_vs_u32m1_u32m1_tu(__VA_ARGS__)

#define	vredor_vs_u32m1_u32m1_m(...) __riscv_vredor_vs_u32m1_u32m1_tum(__VA_ARGS__)

#define	vredor_vs_u32m2_u32m1(...) __riscv_vredor_vs_u32m2_u32m1_tu(__VA_ARGS__)

#define	vredor_vs_u32m2_u32m1_m(...) __riscv_vredor_vs_u32m2_u32m1_tum(__VA_ARGS__)

#define	vredor_vs_u32m4_u32m1(...) __riscv_vredor_vs_u32m4_u32m1_tu(__VA_ARGS__)

#define	vredor_vs_u32m4_u32m1_m(...) __riscv_vredor_vs_u32m4_u32m1_tum(__VA_ARGS__)

#define	vredor_vs_u32m8_u32m1(...) __riscv_vredor_vs_u32m8_u32m1_tu(__VA_ARGS__)

#define	vredor_vs_u32m8_u32m1_m(...) __riscv_vredor_vs_u32m8_u32m1_tum(__VA_ARGS__)

#define	vredor_vs_u32mf2_u32m1(...) __riscv_vredor_vs_u32mf2_u32m1_tu(__VA_ARGS__)

#define	vredor_vs_u32mf2_u32m1_m(...) __riscv_vredor_vs_u32mf2_u32m1_tum(__VA_ARGS__)

#define	vredor_vs_u64m1_u64m1(...) __riscv_vredor_vs_u64m1_u64m1_tu(__VA_ARGS__)

#define	vredor_vs_u64m1_u64m1_m(...) __riscv_vredor_vs_u64m1_u64m1_tum(__VA_ARGS__)

#define	vredor_vs_u64m2_u64m1(...) __riscv_vredor_vs_u64m2_u64m1_tu(__VA_ARGS__)

#define	vredor_vs_u64m2_u64m1_m(...) __riscv_vredor_vs_u64m2_u64m1_tum(__VA_ARGS__)

#define	vredor_vs_u64m4_u64m1(...) __riscv_vredor_vs_u64m4_u64m1_tu(__VA_ARGS__)

#define	vredor_vs_u64m4_u64m1_m(...) __riscv_vredor_vs_u64m4_u64m1_tum(__VA_ARGS__)

#define	vredor_vs_u64m8_u64m1(...) __riscv_vredor_vs_u64m8_u64m1_tu(__VA_ARGS__)

#define	vredor_vs_u64m8_u64m1_m(...) __riscv_vredor_vs_u64m8_u64m1_tum(__VA_ARGS__)

#define	vredor_vs_u8m1_u8m1(...) __riscv_vredor_vs_u8m1_u8m1_tu(__VA_ARGS__)

#define	vredor_vs_u8m1_u8m1_m(...) __riscv_vredor_vs_u8m1_u8m1_tum(__VA_ARGS__)

#define	vredor_vs_u8m2_u8m1(...) __riscv_vredor_vs_u8m2_u8m1_tu(__VA_ARGS__)

#define	vredor_vs_u8m2_u8m1_m(...) __riscv_vredor_vs_u8m2_u8m1_tum(__VA_ARGS__)

#define	vredor_vs_u8m4_u8m1(...) __riscv_vredor_vs_u8m4_u8m1_tu(__VA_ARGS__)

#define	vredor_vs_u8m4_u8m1_m(...) __riscv_vredor_vs_u8m4_u8m1_tum(__VA_ARGS__)

#define	vredor_vs_u8m8_u8m1(...) __riscv_vredor_vs_u8m8_u8m1_tu(__VA_ARGS__)

#define	vredor_vs_u8m8_u8m1_m(...) __riscv_vredor_vs_u8m8_u8m1_tum(__VA_ARGS__)

#define	vredor_vs_u8mf2_u8m1(...) __riscv_vredor_vs_u8mf2_u8m1_tu(__VA_ARGS__)

#define	vredor_vs_u8mf2_u8m1_m(...) __riscv_vredor_vs_u8mf2_u8m1_tum(__VA_ARGS__)

#define	vredor_vs_u8mf4_u8m1(...) __riscv_vredor_vs_u8mf4_u8m1_tu(__VA_ARGS__)

#define	vredor_vs_u8mf4_u8m1_m(...) __riscv_vredor_vs_u8mf4_u8m1_tum(__VA_ARGS__)

#define	vredor_vs_u8mf8_u8m1(...) __riscv_vredor_vs_u8mf8_u8m1_tu(__VA_ARGS__)

#define	vredor_vs_u8mf8_u8m1_m(...) __riscv_vredor_vs_u8mf8_u8m1_tum(__VA_ARGS__)

#define	vredsum_vs_i16m1_i16m1(...) __riscv_vredsum_vs_i16m1_i16m1_tu(__VA_ARGS__)

#define	vredsum_vs_i16m1_i16m1_m(...) __riscv_vredsum_vs_i16m1_i16m1_tum(__VA_ARGS__)

#define	vredsum_vs_i16m2_i16m1(...) __riscv_vredsum_vs_i16m2_i16m1_tu(__VA_ARGS__)

#define	vredsum_vs_i16m2_i16m1_m(...) __riscv_vredsum_vs_i16m2_i16m1_tum(__VA_ARGS__)

#define	vredsum_vs_i16m4_i16m1(...) __riscv_vredsum_vs_i16m4_i16m1_tu(__VA_ARGS__)

#define	vredsum_vs_i16m4_i16m1_m(...) __riscv_vredsum_vs_i16m4_i16m1_tum(__VA_ARGS__)

#define	vredsum_vs_i16m8_i16m1(...) __riscv_vredsum_vs_i16m8_i16m1_tu(__VA_ARGS__)

#define	vredsum_vs_i16m8_i16m1_m(...) __riscv_vredsum_vs_i16m8_i16m1_tum(__VA_ARGS__)

#define	vredsum_vs_i16mf2_i16m1(...) __riscv_vredsum_vs_i16mf2_i16m1_tu(__VA_ARGS__)

#define	vredsum_vs_i16mf2_i16m1_m(...) __riscv_vredsum_vs_i16mf2_i16m1_tum(__VA_ARGS__)

#define	vredsum_vs_i16mf4_i16m1(...) __riscv_vredsum_vs_i16mf4_i16m1_tu(__VA_ARGS__)

#define	vredsum_vs_i16mf4_i16m1_m(...) __riscv_vredsum_vs_i16mf4_i16m1_tum(__VA_ARGS__)

#define	vredsum_vs_i32m1_i32m1(...) __riscv_vredsum_vs_i32m1_i32m1_tu(__VA_ARGS__)

#define	vredsum_vs_i32m1_i32m1_m(...) __riscv_vredsum_vs_i32m1_i32m1_tum(__VA_ARGS__)

#define	vredsum_vs_i32m2_i32m1(...) __riscv_vredsum_vs_i32m2_i32m1_tu(__VA_ARGS__)

#define	vredsum_vs_i32m2_i32m1_m(...) __riscv_vredsum_vs_i32m2_i32m1_tum(__VA_ARGS__)

#define	vredsum_vs_i32m4_i32m1(...) __riscv_vredsum_vs_i32m4_i32m1_tu(__VA_ARGS__)

#define	vredsum_vs_i32m4_i32m1_m(...) __riscv_vredsum_vs_i32m4_i32m1_tum(__VA_ARGS__)

#define	vredsum_vs_i32m8_i32m1(...) __riscv_vredsum_vs_i32m8_i32m1_tu(__VA_ARGS__)

#define	vredsum_vs_i32m8_i32m1_m(...) __riscv_vredsum_vs_i32m8_i32m1_tum(__VA_ARGS__)

#define	vredsum_vs_i32mf2_i32m1(...) __riscv_vredsum_vs_i32mf2_i32m1_tu(__VA_ARGS__)

#define	vredsum_vs_i32mf2_i32m1_m(...) __riscv_vredsum_vs_i32mf2_i32m1_tum(__VA_ARGS__)

#define	vredsum_vs_i64m1_i64m1(...) __riscv_vredsum_vs_i64m1_i64m1_tu(__VA_ARGS__)

#define	vredsum_vs_i64m1_i64m1_m(...) __riscv_vredsum_vs_i64m1_i64m1_tum(__VA_ARGS__)

#define	vredsum_vs_i64m2_i64m1(...) __riscv_vredsum_vs_i64m2_i64m1_tu(__VA_ARGS__)

#define	vredsum_vs_i64m2_i64m1_m(...) __riscv_vredsum_vs_i64m2_i64m1_tum(__VA_ARGS__)

#define	vredsum_vs_i64m4_i64m1(...) __riscv_vredsum_vs_i64m4_i64m1_tu(__VA_ARGS__)

#define	vredsum_vs_i64m4_i64m1_m(...) __riscv_vredsum_vs_i64m4_i64m1_tum(__VA_ARGS__)

#define	vredsum_vs_i64m8_i64m1(...) __riscv_vredsum_vs_i64m8_i64m1_tu(__VA_ARGS__)

#define	vredsum_vs_i64m8_i64m1_m(...) __riscv_vredsum_vs_i64m8_i64m1_tum(__VA_ARGS__)

#define	vredsum_vs_i8m1_i8m1(...) __riscv_vredsum_vs_i8m1_i8m1_tu(__VA_ARGS__)

#define	vredsum_vs_i8m1_i8m1_m(...) __riscv_vredsum_vs_i8m1_i8m1_tum(__VA_ARGS__)

#define	vredsum_vs_i8m2_i8m1(...) __riscv_vredsum_vs_i8m2_i8m1_tu(__VA_ARGS__)

#define	vredsum_vs_i8m2_i8m1_m(...) __riscv_vredsum_vs_i8m2_i8m1_tum(__VA_ARGS__)

#define	vredsum_vs_i8m4_i8m1(...) __riscv_vredsum_vs_i8m4_i8m1_tu(__VA_ARGS__)

#define	vredsum_vs_i8m4_i8m1_m(...) __riscv_vredsum_vs_i8m4_i8m1_tum(__VA_ARGS__)

#define	vredsum_vs_i8m8_i8m1(...) __riscv_vredsum_vs_i8m8_i8m1_tu(__VA_ARGS__)

#define	vredsum_vs_i8m8_i8m1_m(...) __riscv_vredsum_vs_i8m8_i8m1_tum(__VA_ARGS__)

#define	vredsum_vs_i8mf2_i8m1(...) __riscv_vredsum_vs_i8mf2_i8m1_tu(__VA_ARGS__)

#define	vredsum_vs_i8mf2_i8m1_m(...) __riscv_vredsum_vs_i8mf2_i8m1_tum(__VA_ARGS__)

#define	vredsum_vs_i8mf4_i8m1(...) __riscv_vredsum_vs_i8mf4_i8m1_tu(__VA_ARGS__)

#define	vredsum_vs_i8mf4_i8m1_m(...) __riscv_vredsum_vs_i8mf4_i8m1_tum(__VA_ARGS__)

#define	vredsum_vs_i8mf8_i8m1(...) __riscv_vredsum_vs_i8mf8_i8m1_tu(__VA_ARGS__)

#define	vredsum_vs_i8mf8_i8m1_m(...) __riscv_vredsum_vs_i8mf8_i8m1_tum(__VA_ARGS__)

#define	vredsum_vs_u16m1_u16m1(...) __riscv_vredsum_vs_u16m1_u16m1_tu(__VA_ARGS__)

#define	vredsum_vs_u16m1_u16m1_m(...) __riscv_vredsum_vs_u16m1_u16m1_tum(__VA_ARGS__)

#define	vredsum_vs_u16m2_u16m1(...) __riscv_vredsum_vs_u16m2_u16m1_tu(__VA_ARGS__)

#define	vredsum_vs_u16m2_u16m1_m(...) __riscv_vredsum_vs_u16m2_u16m1_tum(__VA_ARGS__)

#define	vredsum_vs_u16m4_u16m1(...) __riscv_vredsum_vs_u16m4_u16m1_tu(__VA_ARGS__)

#define	vredsum_vs_u16m4_u16m1_m(...) __riscv_vredsum_vs_u16m4_u16m1_tum(__VA_ARGS__)

#define	vredsum_vs_u16m8_u16m1(...) __riscv_vredsum_vs_u16m8_u16m1_tu(__VA_ARGS__)

#define	vredsum_vs_u16m8_u16m1_m(...) __riscv_vredsum_vs_u16m8_u16m1_tum(__VA_ARGS__)

#define	vredsum_vs_u16mf2_u16m1(...) __riscv_vredsum_vs_u16mf2_u16m1_tu(__VA_ARGS__)

#define	vredsum_vs_u16mf2_u16m1_m(...) __riscv_vredsum_vs_u16mf2_u16m1_tum(__VA_ARGS__)

#define	vredsum_vs_u16mf4_u16m1(...) __riscv_vredsum_vs_u16mf4_u16m1_tu(__VA_ARGS__)

#define	vredsum_vs_u16mf4_u16m1_m(...) __riscv_vredsum_vs_u16mf4_u16m1_tum(__VA_ARGS__)

#define	vredsum_vs_u32m1_u32m1(...) __riscv_vredsum_vs_u32m1_u32m1_tu(__VA_ARGS__)

#define	vredsum_vs_u32m1_u32m1_m(...) __riscv_vredsum_vs_u32m1_u32m1_tum(__VA_ARGS__)

#define	vredsum_vs_u32m2_u32m1(...) __riscv_vredsum_vs_u32m2_u32m1_tu(__VA_ARGS__)

#define	vredsum_vs_u32m2_u32m1_m(...) __riscv_vredsum_vs_u32m2_u32m1_tum(__VA_ARGS__)

#define	vredsum_vs_u32m4_u32m1(...) __riscv_vredsum_vs_u32m4_u32m1_tu(__VA_ARGS__)

#define	vredsum_vs_u32m4_u32m1_m(...) __riscv_vredsum_vs_u32m4_u32m1_tum(__VA_ARGS__)

#define	vredsum_vs_u32m8_u32m1(...) __riscv_vredsum_vs_u32m8_u32m1_tu(__VA_ARGS__)

#define	vredsum_vs_u32m8_u32m1_m(...) __riscv_vredsum_vs_u32m8_u32m1_tum(__VA_ARGS__)

#define	vredsum_vs_u32mf2_u32m1(...) __riscv_vredsum_vs_u32mf2_u32m1_tu(__VA_ARGS__)

#define	vredsum_vs_u32mf2_u32m1_m(...) __riscv_vredsum_vs_u32mf2_u32m1_tum(__VA_ARGS__)

#define	vredsum_vs_u64m1_u64m1(...) __riscv_vredsum_vs_u64m1_u64m1_tu(__VA_ARGS__)

#define	vredsum_vs_u64m1_u64m1_m(...) __riscv_vredsum_vs_u64m1_u64m1_tum(__VA_ARGS__)

#define	vredsum_vs_u64m2_u64m1(...) __riscv_vredsum_vs_u64m2_u64m1_tu(__VA_ARGS__)

#define	vredsum_vs_u64m2_u64m1_m(...) __riscv_vredsum_vs_u64m2_u64m1_tum(__VA_ARGS__)

#define	vredsum_vs_u64m4_u64m1(...) __riscv_vredsum_vs_u64m4_u64m1_tu(__VA_ARGS__)

#define	vredsum_vs_u64m4_u64m1_m(...) __riscv_vredsum_vs_u64m4_u64m1_tum(__VA_ARGS__)

#define	vredsum_vs_u64m8_u64m1(...) __riscv_vredsum_vs_u64m8_u64m1_tu(__VA_ARGS__)

#define	vredsum_vs_u64m8_u64m1_m(...) __riscv_vredsum_vs_u64m8_u64m1_tum(__VA_ARGS__)

#define	vredsum_vs_u8m1_u8m1(...) __riscv_vredsum_vs_u8m1_u8m1_tu(__VA_ARGS__)

#define	vredsum_vs_u8m1_u8m1_m(...) __riscv_vredsum_vs_u8m1_u8m1_tum(__VA_ARGS__)

#define	vredsum_vs_u8m2_u8m1(...) __riscv_vredsum_vs_u8m2_u8m1_tu(__VA_ARGS__)

#define	vredsum_vs_u8m2_u8m1_m(...) __riscv_vredsum_vs_u8m2_u8m1_tum(__VA_ARGS__)

#define	vredsum_vs_u8m4_u8m1(...) __riscv_vredsum_vs_u8m4_u8m1_tu(__VA_ARGS__)

#define	vredsum_vs_u8m4_u8m1_m(...) __riscv_vredsum_vs_u8m4_u8m1_tum(__VA_ARGS__)

#define	vredsum_vs_u8m8_u8m1(...) __riscv_vredsum_vs_u8m8_u8m1_tu(__VA_ARGS__)

#define	vredsum_vs_u8m8_u8m1_m(...) __riscv_vredsum_vs_u8m8_u8m1_tum(__VA_ARGS__)

#define	vredsum_vs_u8mf2_u8m1(...) __riscv_vredsum_vs_u8mf2_u8m1_tu(__VA_ARGS__)

#define	vredsum_vs_u8mf2_u8m1_m(...) __riscv_vredsum_vs_u8mf2_u8m1_tum(__VA_ARGS__)

#define	vredsum_vs_u8mf4_u8m1(...) __riscv_vredsum_vs_u8mf4_u8m1_tu(__VA_ARGS__)

#define	vredsum_vs_u8mf4_u8m1_m(...) __riscv_vredsum_vs_u8mf4_u8m1_tum(__VA_ARGS__)

#define	vredsum_vs_u8mf8_u8m1(...) __riscv_vredsum_vs_u8mf8_u8m1_tu(__VA_ARGS__)

#define	vredsum_vs_u8mf8_u8m1_m(...) __riscv_vredsum_vs_u8mf8_u8m1_tum(__VA_ARGS__)

#define	vredxor_vs_i16m1_i16m1(...) __riscv_vredxor_vs_i16m1_i16m1_tu(__VA_ARGS__)

#define	vredxor_vs_i16m1_i16m1_m(...) __riscv_vredxor_vs_i16m1_i16m1_tum(__VA_ARGS__)

#define	vredxor_vs_i16m2_i16m1(...) __riscv_vredxor_vs_i16m2_i16m1_tu(__VA_ARGS__)

#define	vredxor_vs_i16m2_i16m1_m(...) __riscv_vredxor_vs_i16m2_i16m1_tum(__VA_ARGS__)

#define	vredxor_vs_i16m4_i16m1(...) __riscv_vredxor_vs_i16m4_i16m1_tu(__VA_ARGS__)

#define	vredxor_vs_i16m4_i16m1_m(...) __riscv_vredxor_vs_i16m4_i16m1_tum(__VA_ARGS__)

#define	vredxor_vs_i16m8_i16m1(...) __riscv_vredxor_vs_i16m8_i16m1_tu(__VA_ARGS__)

#define	vredxor_vs_i16m8_i16m1_m(...) __riscv_vredxor_vs_i16m8_i16m1_tum(__VA_ARGS__)

#define	vredxor_vs_i16mf2_i16m1(...) __riscv_vredxor_vs_i16mf2_i16m1_tu(__VA_ARGS__)

#define	vredxor_vs_i16mf2_i16m1_m(...) __riscv_vredxor_vs_i16mf2_i16m1_tum(__VA_ARGS__)

#define	vredxor_vs_i16mf4_i16m1(...) __riscv_vredxor_vs_i16mf4_i16m1_tu(__VA_ARGS__)

#define	vredxor_vs_i16mf4_i16m1_m(...) __riscv_vredxor_vs_i16mf4_i16m1_tum(__VA_ARGS__)

#define	vredxor_vs_i32m1_i32m1(...) __riscv_vredxor_vs_i32m1_i32m1_tu(__VA_ARGS__)

#define	vredxor_vs_i32m1_i32m1_m(...) __riscv_vredxor_vs_i32m1_i32m1_tum(__VA_ARGS__)

#define	vredxor_vs_i32m2_i32m1(...) __riscv_vredxor_vs_i32m2_i32m1_tu(__VA_ARGS__)

#define	vredxor_vs_i32m2_i32m1_m(...) __riscv_vredxor_vs_i32m2_i32m1_tum(__VA_ARGS__)

#define	vredxor_vs_i32m4_i32m1(...) __riscv_vredxor_vs_i32m4_i32m1_tu(__VA_ARGS__)

#define	vredxor_vs_i32m4_i32m1_m(...) __riscv_vredxor_vs_i32m4_i32m1_tum(__VA_ARGS__)

#define	vredxor_vs_i32m8_i32m1(...) __riscv_vredxor_vs_i32m8_i32m1_tu(__VA_ARGS__)

#define	vredxor_vs_i32m8_i32m1_m(...) __riscv_vredxor_vs_i32m8_i32m1_tum(__VA_ARGS__)

#define	vredxor_vs_i32mf2_i32m1(...) __riscv_vredxor_vs_i32mf2_i32m1_tu(__VA_ARGS__)

#define	vredxor_vs_i32mf2_i32m1_m(...) __riscv_vredxor_vs_i32mf2_i32m1_tum(__VA_ARGS__)

#define	vredxor_vs_i64m1_i64m1(...) __riscv_vredxor_vs_i64m1_i64m1_tu(__VA_ARGS__)

#define	vredxor_vs_i64m1_i64m1_m(...) __riscv_vredxor_vs_i64m1_i64m1_tum(__VA_ARGS__)

#define	vredxor_vs_i64m2_i64m1(...) __riscv_vredxor_vs_i64m2_i64m1_tu(__VA_ARGS__)

#define	vredxor_vs_i64m2_i64m1_m(...) __riscv_vredxor_vs_i64m2_i64m1_tum(__VA_ARGS__)

#define	vredxor_vs_i64m4_i64m1(...) __riscv_vredxor_vs_i64m4_i64m1_tu(__VA_ARGS__)

#define	vredxor_vs_i64m4_i64m1_m(...) __riscv_vredxor_vs_i64m4_i64m1_tum(__VA_ARGS__)

#define	vredxor_vs_i64m8_i64m1(...) __riscv_vredxor_vs_i64m8_i64m1_tu(__VA_ARGS__)

#define	vredxor_vs_i64m8_i64m1_m(...) __riscv_vredxor_vs_i64m8_i64m1_tum(__VA_ARGS__)

#define	vredxor_vs_i8m1_i8m1(...) __riscv_vredxor_vs_i8m1_i8m1_tu(__VA_ARGS__)

#define	vredxor_vs_i8m1_i8m1_m(...) __riscv_vredxor_vs_i8m1_i8m1_tum(__VA_ARGS__)

#define	vredxor_vs_i8m2_i8m1(...) __riscv_vredxor_vs_i8m2_i8m1_tu(__VA_ARGS__)

#define	vredxor_vs_i8m2_i8m1_m(...) __riscv_vredxor_vs_i8m2_i8m1_tum(__VA_ARGS__)

#define	vredxor_vs_i8m4_i8m1(...) __riscv_vredxor_vs_i8m4_i8m1_tu(__VA_ARGS__)

#define	vredxor_vs_i8m4_i8m1_m(...) __riscv_vredxor_vs_i8m4_i8m1_tum(__VA_ARGS__)

#define	vredxor_vs_i8m8_i8m1(...) __riscv_vredxor_vs_i8m8_i8m1_tu(__VA_ARGS__)

#define	vredxor_vs_i8m8_i8m1_m(...) __riscv_vredxor_vs_i8m8_i8m1_tum(__VA_ARGS__)

#define	vredxor_vs_i8mf2_i8m1(...) __riscv_vredxor_vs_i8mf2_i8m1_tu(__VA_ARGS__)

#define	vredxor_vs_i8mf2_i8m1_m(...) __riscv_vredxor_vs_i8mf2_i8m1_tum(__VA_ARGS__)

#define	vredxor_vs_i8mf4_i8m1(...) __riscv_vredxor_vs_i8mf4_i8m1_tu(__VA_ARGS__)

#define	vredxor_vs_i8mf4_i8m1_m(...) __riscv_vredxor_vs_i8mf4_i8m1_tum(__VA_ARGS__)

#define	vredxor_vs_i8mf8_i8m1(...) __riscv_vredxor_vs_i8mf8_i8m1_tu(__VA_ARGS__)

#define	vredxor_vs_i8mf8_i8m1_m(...) __riscv_vredxor_vs_i8mf8_i8m1_tum(__VA_ARGS__)

#define	vredxor_vs_u16m1_u16m1(...) __riscv_vredxor_vs_u16m1_u16m1_tu(__VA_ARGS__)

#define	vredxor_vs_u16m1_u16m1_m(...) __riscv_vredxor_vs_u16m1_u16m1_tum(__VA_ARGS__)

#define	vredxor_vs_u16m2_u16m1(...) __riscv_vredxor_vs_u16m2_u16m1_tu(__VA_ARGS__)

#define	vredxor_vs_u16m2_u16m1_m(...) __riscv_vredxor_vs_u16m2_u16m1_tum(__VA_ARGS__)

#define	vredxor_vs_u16m4_u16m1(...) __riscv_vredxor_vs_u16m4_u16m1_tu(__VA_ARGS__)

#define	vredxor_vs_u16m4_u16m1_m(...) __riscv_vredxor_vs_u16m4_u16m1_tum(__VA_ARGS__)

#define	vredxor_vs_u16m8_u16m1(...) __riscv_vredxor_vs_u16m8_u16m1_tu(__VA_ARGS__)

#define	vredxor_vs_u16m8_u16m1_m(...) __riscv_vredxor_vs_u16m8_u16m1_tum(__VA_ARGS__)

#define	vredxor_vs_u16mf2_u16m1(...) __riscv_vredxor_vs_u16mf2_u16m1_tu(__VA_ARGS__)

#define	vredxor_vs_u16mf2_u16m1_m(...) __riscv_vredxor_vs_u16mf2_u16m1_tum(__VA_ARGS__)

#define	vredxor_vs_u16mf4_u16m1(...) __riscv_vredxor_vs_u16mf4_u16m1_tu(__VA_ARGS__)

#define	vredxor_vs_u16mf4_u16m1_m(...) __riscv_vredxor_vs_u16mf4_u16m1_tum(__VA_ARGS__)

#define	vredxor_vs_u32m1_u32m1(...) __riscv_vredxor_vs_u32m1_u32m1_tu(__VA_ARGS__)

#define	vredxor_vs_u32m1_u32m1_m(...) __riscv_vredxor_vs_u32m1_u32m1_tum(__VA_ARGS__)

#define	vredxor_vs_u32m2_u32m1(...) __riscv_vredxor_vs_u32m2_u32m1_tu(__VA_ARGS__)

#define	vredxor_vs_u32m2_u32m1_m(...) __riscv_vredxor_vs_u32m2_u32m1_tum(__VA_ARGS__)

#define	vredxor_vs_u32m4_u32m1(...) __riscv_vredxor_vs_u32m4_u32m1_tu(__VA_ARGS__)

#define	vredxor_vs_u32m4_u32m1_m(...) __riscv_vredxor_vs_u32m4_u32m1_tum(__VA_ARGS__)

#define	vredxor_vs_u32m8_u32m1(...) __riscv_vredxor_vs_u32m8_u32m1_tu(__VA_ARGS__)

#define	vredxor_vs_u32m8_u32m1_m(...) __riscv_vredxor_vs_u32m8_u32m1_tum(__VA_ARGS__)

#define	vredxor_vs_u32mf2_u32m1(...) __riscv_vredxor_vs_u32mf2_u32m1_tu(__VA_ARGS__)

#define	vredxor_vs_u32mf2_u32m1_m(...) __riscv_vredxor_vs_u32mf2_u32m1_tum(__VA_ARGS__)

#define	vredxor_vs_u64m1_u64m1(...) __riscv_vredxor_vs_u64m1_u64m1_tu(__VA_ARGS__)

#define	vredxor_vs_u64m1_u64m1_m(...) __riscv_vredxor_vs_u64m1_u64m1_tum(__VA_ARGS__)

#define	vredxor_vs_u64m2_u64m1(...) __riscv_vredxor_vs_u64m2_u64m1_tu(__VA_ARGS__)

#define	vredxor_vs_u64m2_u64m1_m(...) __riscv_vredxor_vs_u64m2_u64m1_tum(__VA_ARGS__)

#define	vredxor_vs_u64m4_u64m1(...) __riscv_vredxor_vs_u64m4_u64m1_tu(__VA_ARGS__)

#define	vredxor_vs_u64m4_u64m1_m(...) __riscv_vredxor_vs_u64m4_u64m1_tum(__VA_ARGS__)

#define	vredxor_vs_u64m8_u64m1(...) __riscv_vredxor_vs_u64m8_u64m1_tu(__VA_ARGS__)

#define	vredxor_vs_u64m8_u64m1_m(...) __riscv_vredxor_vs_u64m8_u64m1_tum(__VA_ARGS__)

#define	vredxor_vs_u8m1_u8m1(...) __riscv_vredxor_vs_u8m1_u8m1_tu(__VA_ARGS__)

#define	vredxor_vs_u8m1_u8m1_m(...) __riscv_vredxor_vs_u8m1_u8m1_tum(__VA_ARGS__)

#define	vredxor_vs_u8m2_u8m1(...) __riscv_vredxor_vs_u8m2_u8m1_tu(__VA_ARGS__)

#define	vredxor_vs_u8m2_u8m1_m(...) __riscv_vredxor_vs_u8m2_u8m1_tum(__VA_ARGS__)

#define	vredxor_vs_u8m4_u8m1(...) __riscv_vredxor_vs_u8m4_u8m1_tu(__VA_ARGS__)

#define	vredxor_vs_u8m4_u8m1_m(...) __riscv_vredxor_vs_u8m4_u8m1_tum(__VA_ARGS__)

#define	vredxor_vs_u8m8_u8m1(...) __riscv_vredxor_vs_u8m8_u8m1_tu(__VA_ARGS__)

#define	vredxor_vs_u8m8_u8m1_m(...) __riscv_vredxor_vs_u8m8_u8m1_tum(__VA_ARGS__)

#define	vredxor_vs_u8mf2_u8m1(...) __riscv_vredxor_vs_u8mf2_u8m1_tu(__VA_ARGS__)

#define	vredxor_vs_u8mf2_u8m1_m(...) __riscv_vredxor_vs_u8mf2_u8m1_tum(__VA_ARGS__)

#define	vredxor_vs_u8mf4_u8m1(...) __riscv_vredxor_vs_u8mf4_u8m1_tu(__VA_ARGS__)

#define	vredxor_vs_u8mf4_u8m1_m(...) __riscv_vredxor_vs_u8mf4_u8m1_tum(__VA_ARGS__)

#define	vredxor_vs_u8mf8_u8m1(...) __riscv_vredxor_vs_u8mf8_u8m1_tu(__VA_ARGS__)

#define	vredxor_vs_u8mf8_u8m1_m(...) __riscv_vredxor_vs_u8mf8_u8m1_tum(__VA_ARGS__)

#define	vreinterpret_v_f16m1_i16m1(...) __riscv_vreinterpret_v_f16m1_i16m1(__VA_ARGS__)

#define	vreinterpret_v_f16m1_u16m1(...) __riscv_vreinterpret_v_f16m1_u16m1(__VA_ARGS__)

#define	vreinterpret_v_f16m2_i16m2(...) __riscv_vreinterpret_v_f16m2_i16m2(__VA_ARGS__)

#define	vreinterpret_v_f16m2_u16m2(...) __riscv_vreinterpret_v_f16m2_u16m2(__VA_ARGS__)

#define	vreinterpret_v_f16m4_i16m4(...) __riscv_vreinterpret_v_f16m4_i16m4(__VA_ARGS__)

#define	vreinterpret_v_f16m4_u16m4(...) __riscv_vreinterpret_v_f16m4_u16m4(__VA_ARGS__)

#define	vreinterpret_v_f16m8_i16m8(...) __riscv_vreinterpret_v_f16m8_i16m8(__VA_ARGS__)

#define	vreinterpret_v_f16m8_u16m8(...) __riscv_vreinterpret_v_f16m8_u16m8(__VA_ARGS__)

#define	vreinterpret_v_f16mf2_i16mf2(...) __riscv_vreinterpret_v_f16mf2_i16mf2(__VA_ARGS__)

#define	vreinterpret_v_f16mf2_u16mf2(...) __riscv_vreinterpret_v_f16mf2_u16mf2(__VA_ARGS__)

#define	vreinterpret_v_f16mf4_i16mf4(...) __riscv_vreinterpret_v_f16mf4_i16mf4(__VA_ARGS__)

#define	vreinterpret_v_f16mf4_u16mf4(...) __riscv_vreinterpret_v_f16mf4_u16mf4(__VA_ARGS__)

#define	vreinterpret_v_f32m1_i32m1(...) __riscv_vreinterpret_v_f32m1_i32m1(__VA_ARGS__)

#define	vreinterpret_v_f32m1_u32m1(...) __riscv_vreinterpret_v_f32m1_u32m1(__VA_ARGS__)

#define	vreinterpret_v_f32m2_i32m2(...) __riscv_vreinterpret_v_f32m2_i32m2(__VA_ARGS__)

#define	vreinterpret_v_f32m2_u32m2(...) __riscv_vreinterpret_v_f32m2_u32m2(__VA_ARGS__)

#define	vreinterpret_v_f32m4_i32m4(...) __riscv_vreinterpret_v_f32m4_i32m4(__VA_ARGS__)

#define	vreinterpret_v_f32m4_u32m4(...) __riscv_vreinterpret_v_f32m4_u32m4(__VA_ARGS__)

#define	vreinterpret_v_f32m8_i32m8(...) __riscv_vreinterpret_v_f32m8_i32m8(__VA_ARGS__)

#define	vreinterpret_v_f32m8_u32m8(...) __riscv_vreinterpret_v_f32m8_u32m8(__VA_ARGS__)

#define	vreinterpret_v_f32mf2_i32mf2(...) __riscv_vreinterpret_v_f32mf2_i32mf2(__VA_ARGS__)

#define	vreinterpret_v_f32mf2_u32mf2(...) __riscv_vreinterpret_v_f32mf2_u32mf2(__VA_ARGS__)

#define	vreinterpret_v_f64m1_i64m1(...) __riscv_vreinterpret_v_f64m1_i64m1(__VA_ARGS__)

#define	vreinterpret_v_f64m1_u64m1(...) __riscv_vreinterpret_v_f64m1_u64m1(__VA_ARGS__)

#define	vreinterpret_v_f64m2_i64m2(...) __riscv_vreinterpret_v_f64m2_i64m2(__VA_ARGS__)

#define	vreinterpret_v_f64m2_u64m2(...) __riscv_vreinterpret_v_f64m2_u64m2(__VA_ARGS__)

#define	vreinterpret_v_f64m4_i64m4(...) __riscv_vreinterpret_v_f64m4_i64m4(__VA_ARGS__)

#define	vreinterpret_v_f64m4_u64m4(...) __riscv_vreinterpret_v_f64m4_u64m4(__VA_ARGS__)

#define	vreinterpret_v_f64m8_i64m8(...) __riscv_vreinterpret_v_f64m8_i64m8(__VA_ARGS__)

#define	vreinterpret_v_f64m8_u64m8(...) __riscv_vreinterpret_v_f64m8_u64m8(__VA_ARGS__)

#define	vreinterpret_v_i16m1_f16m1(...) __riscv_vreinterpret_v_i16m1_f16m1(__VA_ARGS__)

#define	vreinterpret_v_i16m1_i32m1(...) __riscv_vreinterpret_v_i16m1_i32m1(__VA_ARGS__)

#define	vreinterpret_v_i16m1_i64m1(...) __riscv_vreinterpret_v_i16m1_i64m1(__VA_ARGS__)

#define	vreinterpret_v_i16m1_i8m1(...) __riscv_vreinterpret_v_i16m1_i8m1(__VA_ARGS__)

#define	vreinterpret_v_i16m1_u16m1(...) __riscv_vreinterpret_v_i16m1_u16m1(__VA_ARGS__)

#define	vreinterpret_v_i16m2_f16m2(...) __riscv_vreinterpret_v_i16m2_f16m2(__VA_ARGS__)

#define	vreinterpret_v_i16m2_i32m2(...) __riscv_vreinterpret_v_i16m2_i32m2(__VA_ARGS__)

#define	vreinterpret_v_i16m2_i64m2(...) __riscv_vreinterpret_v_i16m2_i64m2(__VA_ARGS__)

#define	vreinterpret_v_i16m2_i8m2(...) __riscv_vreinterpret_v_i16m2_i8m2(__VA_ARGS__)

#define	vreinterpret_v_i16m2_u16m2(...) __riscv_vreinterpret_v_i16m2_u16m2(__VA_ARGS__)

#define	vreinterpret_v_i16m4_f16m4(...) __riscv_vreinterpret_v_i16m4_f16m4(__VA_ARGS__)

#define	vreinterpret_v_i16m4_i32m4(...) __riscv_vreinterpret_v_i16m4_i32m4(__VA_ARGS__)

#define	vreinterpret_v_i16m4_i64m4(...) __riscv_vreinterpret_v_i16m4_i64m4(__VA_ARGS__)

#define	vreinterpret_v_i16m4_i8m4(...) __riscv_vreinterpret_v_i16m4_i8m4(__VA_ARGS__)

#define	vreinterpret_v_i16m4_u16m4(...) __riscv_vreinterpret_v_i16m4_u16m4(__VA_ARGS__)

#define	vreinterpret_v_i16m8_f16m8(...) __riscv_vreinterpret_v_i16m8_f16m8(__VA_ARGS__)

#define	vreinterpret_v_i16m8_i32m8(...) __riscv_vreinterpret_v_i16m8_i32m8(__VA_ARGS__)

#define	vreinterpret_v_i16m8_i64m8(...) __riscv_vreinterpret_v_i16m8_i64m8(__VA_ARGS__)

#define	vreinterpret_v_i16m8_i8m8(...) __riscv_vreinterpret_v_i16m8_i8m8(__VA_ARGS__)

#define	vreinterpret_v_i16m8_u16m8(...) __riscv_vreinterpret_v_i16m8_u16m8(__VA_ARGS__)

#define	vreinterpret_v_i16mf2_f16mf2(...) __riscv_vreinterpret_v_i16mf2_f16mf2(__VA_ARGS__)

#define	vreinterpret_v_i16mf2_i32mf2(...) __riscv_vreinterpret_v_i16mf2_i32mf2(__VA_ARGS__)

#define	vreinterpret_v_i16mf2_i8mf2(...) __riscv_vreinterpret_v_i16mf2_i8mf2(__VA_ARGS__)

#define	vreinterpret_v_i16mf2_u16mf2(...) __riscv_vreinterpret_v_i16mf2_u16mf2(__VA_ARGS__)

#define	vreinterpret_v_i16mf4_f16mf4(...) __riscv_vreinterpret_v_i16mf4_f16mf4(__VA_ARGS__)

#define	vreinterpret_v_i16mf4_i8mf4(...) __riscv_vreinterpret_v_i16mf4_i8mf4(__VA_ARGS__)

#define	vreinterpret_v_i16mf4_u16mf4(...) __riscv_vreinterpret_v_i16mf4_u16mf4(__VA_ARGS__)

#define	vreinterpret_v_i32m1_f32m1(...) __riscv_vreinterpret_v_i32m1_f32m1(__VA_ARGS__)

#define	vreinterpret_v_i32m1_i16m1(...) __riscv_vreinterpret_v_i32m1_i16m1(__VA_ARGS__)

#define	vreinterpret_v_i32m1_i64m1(...) __riscv_vreinterpret_v_i32m1_i64m1(__VA_ARGS__)

#define	vreinterpret_v_i32m1_i8m1(...) __riscv_vreinterpret_v_i32m1_i8m1(__VA_ARGS__)

#define	vreinterpret_v_i32m1_u32m1(...) __riscv_vreinterpret_v_i32m1_u32m1(__VA_ARGS__)

#define	vreinterpret_v_i32m2_f32m2(...) __riscv_vreinterpret_v_i32m2_f32m2(__VA_ARGS__)

#define	vreinterpret_v_i32m2_i16m2(...) __riscv_vreinterpret_v_i32m2_i16m2(__VA_ARGS__)

#define	vreinterpret_v_i32m2_i64m2(...) __riscv_vreinterpret_v_i32m2_i64m2(__VA_ARGS__)

#define	vreinterpret_v_i32m2_i8m2(...) __riscv_vreinterpret_v_i32m2_i8m2(__VA_ARGS__)

#define	vreinterpret_v_i32m2_u32m2(...) __riscv_vreinterpret_v_i32m2_u32m2(__VA_ARGS__)

#define	vreinterpret_v_i32m4_f32m4(...) __riscv_vreinterpret_v_i32m4_f32m4(__VA_ARGS__)

#define	vreinterpret_v_i32m4_i16m4(...) __riscv_vreinterpret_v_i32m4_i16m4(__VA_ARGS__)

#define	vreinterpret_v_i32m4_i64m4(...) __riscv_vreinterpret_v_i32m4_i64m4(__VA_ARGS__)

#define	vreinterpret_v_i32m4_i8m4(...) __riscv_vreinterpret_v_i32m4_i8m4(__VA_ARGS__)

#define	vreinterpret_v_i32m4_u32m4(...) __riscv_vreinterpret_v_i32m4_u32m4(__VA_ARGS__)

#define	vreinterpret_v_i32m8_f32m8(...) __riscv_vreinterpret_v_i32m8_f32m8(__VA_ARGS__)

#define	vreinterpret_v_i32m8_i16m8(...) __riscv_vreinterpret_v_i32m8_i16m8(__VA_ARGS__)

#define	vreinterpret_v_i32m8_i64m8(...) __riscv_vreinterpret_v_i32m8_i64m8(__VA_ARGS__)

#define	vreinterpret_v_i32m8_i8m8(...) __riscv_vreinterpret_v_i32m8_i8m8(__VA_ARGS__)

#define	vreinterpret_v_i32m8_u32m8(...) __riscv_vreinterpret_v_i32m8_u32m8(__VA_ARGS__)

#define	vreinterpret_v_i32mf2_f32mf2(...) __riscv_vreinterpret_v_i32mf2_f32mf2(__VA_ARGS__)

#define	vreinterpret_v_i32mf2_i16mf2(...) __riscv_vreinterpret_v_i32mf2_i16mf2(__VA_ARGS__)

#define	vreinterpret_v_i32mf2_i8mf2(...) __riscv_vreinterpret_v_i32mf2_i8mf2(__VA_ARGS__)

#define	vreinterpret_v_i32mf2_u32mf2(...) __riscv_vreinterpret_v_i32mf2_u32mf2(__VA_ARGS__)

#define	vreinterpret_v_i64m1_f64m1(...) __riscv_vreinterpret_v_i64m1_f64m1(__VA_ARGS__)

#define	vreinterpret_v_i64m1_i16m1(...) __riscv_vreinterpret_v_i64m1_i16m1(__VA_ARGS__)

#define	vreinterpret_v_i64m1_i32m1(...) __riscv_vreinterpret_v_i64m1_i32m1(__VA_ARGS__)

#define	vreinterpret_v_i64m1_i8m1(...) __riscv_vreinterpret_v_i64m1_i8m1(__VA_ARGS__)

#define	vreinterpret_v_i64m1_u64m1(...) __riscv_vreinterpret_v_i64m1_u64m1(__VA_ARGS__)

#define	vreinterpret_v_i64m2_f64m2(...) __riscv_vreinterpret_v_i64m2_f64m2(__VA_ARGS__)

#define	vreinterpret_v_i64m2_i16m2(...) __riscv_vreinterpret_v_i64m2_i16m2(__VA_ARGS__)

#define	vreinterpret_v_i64m2_i32m2(...) __riscv_vreinterpret_v_i64m2_i32m2(__VA_ARGS__)

#define	vreinterpret_v_i64m2_i8m2(...) __riscv_vreinterpret_v_i64m2_i8m2(__VA_ARGS__)

#define	vreinterpret_v_i64m2_u64m2(...) __riscv_vreinterpret_v_i64m2_u64m2(__VA_ARGS__)

#define	vreinterpret_v_i64m4_f64m4(...) __riscv_vreinterpret_v_i64m4_f64m4(__VA_ARGS__)

#define	vreinterpret_v_i64m4_i16m4(...) __riscv_vreinterpret_v_i64m4_i16m4(__VA_ARGS__)

#define	vreinterpret_v_i64m4_i32m4(...) __riscv_vreinterpret_v_i64m4_i32m4(__VA_ARGS__)

#define	vreinterpret_v_i64m4_i8m4(...) __riscv_vreinterpret_v_i64m4_i8m4(__VA_ARGS__)

#define	vreinterpret_v_i64m4_u64m4(...) __riscv_vreinterpret_v_i64m4_u64m4(__VA_ARGS__)

#define	vreinterpret_v_i64m8_f64m8(...) __riscv_vreinterpret_v_i64m8_f64m8(__VA_ARGS__)

#define	vreinterpret_v_i64m8_i16m8(...) __riscv_vreinterpret_v_i64m8_i16m8(__VA_ARGS__)

#define	vreinterpret_v_i64m8_i32m8(...) __riscv_vreinterpret_v_i64m8_i32m8(__VA_ARGS__)

#define	vreinterpret_v_i64m8_i8m8(...) __riscv_vreinterpret_v_i64m8_i8m8(__VA_ARGS__)

#define	vreinterpret_v_i64m8_u64m8(...) __riscv_vreinterpret_v_i64m8_u64m8(__VA_ARGS__)

#define	vreinterpret_v_i8m1_i16m1(...) __riscv_vreinterpret_v_i8m1_i16m1(__VA_ARGS__)

#define	vreinterpret_v_i8m1_i32m1(...) __riscv_vreinterpret_v_i8m1_i32m1(__VA_ARGS__)

#define	vreinterpret_v_i8m1_i64m1(...) __riscv_vreinterpret_v_i8m1_i64m1(__VA_ARGS__)

#define	vreinterpret_v_i8m1_u8m1(...) __riscv_vreinterpret_v_i8m1_u8m1(__VA_ARGS__)

#define	vreinterpret_v_i8m2_i16m2(...) __riscv_vreinterpret_v_i8m2_i16m2(__VA_ARGS__)

#define	vreinterpret_v_i8m2_i32m2(...) __riscv_vreinterpret_v_i8m2_i32m2(__VA_ARGS__)

#define	vreinterpret_v_i8m2_i64m2(...) __riscv_vreinterpret_v_i8m2_i64m2(__VA_ARGS__)

#define	vreinterpret_v_i8m2_u8m2(...) __riscv_vreinterpret_v_i8m2_u8m2(__VA_ARGS__)

#define	vreinterpret_v_i8m4_i16m4(...) __riscv_vreinterpret_v_i8m4_i16m4(__VA_ARGS__)

#define	vreinterpret_v_i8m4_i32m4(...) __riscv_vreinterpret_v_i8m4_i32m4(__VA_ARGS__)

#define	vreinterpret_v_i8m4_i64m4(...) __riscv_vreinterpret_v_i8m4_i64m4(__VA_ARGS__)

#define	vreinterpret_v_i8m4_u8m4(...) __riscv_vreinterpret_v_i8m4_u8m4(__VA_ARGS__)

#define	vreinterpret_v_i8m8_i16m8(...) __riscv_vreinterpret_v_i8m8_i16m8(__VA_ARGS__)

#define	vreinterpret_v_i8m8_i32m8(...) __riscv_vreinterpret_v_i8m8_i32m8(__VA_ARGS__)

#define	vreinterpret_v_i8m8_i64m8(...) __riscv_vreinterpret_v_i8m8_i64m8(__VA_ARGS__)

#define	vreinterpret_v_i8m8_u8m8(...) __riscv_vreinterpret_v_i8m8_u8m8(__VA_ARGS__)

#define	vreinterpret_v_i8mf2_i16mf2(...) __riscv_vreinterpret_v_i8mf2_i16mf2(__VA_ARGS__)

#define	vreinterpret_v_i8mf2_i32mf2(...) __riscv_vreinterpret_v_i8mf2_i32mf2(__VA_ARGS__)

#define	vreinterpret_v_i8mf2_u8mf2(...) __riscv_vreinterpret_v_i8mf2_u8mf2(__VA_ARGS__)

#define	vreinterpret_v_i8mf4_i16mf4(...) __riscv_vreinterpret_v_i8mf4_i16mf4(__VA_ARGS__)

#define	vreinterpret_v_i8mf4_u8mf4(...) __riscv_vreinterpret_v_i8mf4_u8mf4(__VA_ARGS__)

#define	vreinterpret_v_i8mf8_u8mf8(...) __riscv_vreinterpret_v_i8mf8_u8mf8(__VA_ARGS__)

#define	vreinterpret_v_u16m1_f16m1(...) __riscv_vreinterpret_v_u16m1_f16m1(__VA_ARGS__)

#define	vreinterpret_v_u16m1_i16m1(...) __riscv_vreinterpret_v_u16m1_i16m1(__VA_ARGS__)

#define	vreinterpret_v_u16m1_u32m1(...) __riscv_vreinterpret_v_u16m1_u32m1(__VA_ARGS__)

#define	vreinterpret_v_u16m1_u64m1(...) __riscv_vreinterpret_v_u16m1_u64m1(__VA_ARGS__)

#define	vreinterpret_v_u16m1_u8m1(...) __riscv_vreinterpret_v_u16m1_u8m1(__VA_ARGS__)

#define	vreinterpret_v_u16m2_f16m2(...) __riscv_vreinterpret_v_u16m2_f16m2(__VA_ARGS__)

#define	vreinterpret_v_u16m2_i16m2(...) __riscv_vreinterpret_v_u16m2_i16m2(__VA_ARGS__)

#define	vreinterpret_v_u16m2_u32m2(...) __riscv_vreinterpret_v_u16m2_u32m2(__VA_ARGS__)

#define	vreinterpret_v_u16m2_u64m2(...) __riscv_vreinterpret_v_u16m2_u64m2(__VA_ARGS__)

#define	vreinterpret_v_u16m2_u8m2(...) __riscv_vreinterpret_v_u16m2_u8m2(__VA_ARGS__)

#define	vreinterpret_v_u16m4_f16m4(...) __riscv_vreinterpret_v_u16m4_f16m4(__VA_ARGS__)

#define	vreinterpret_v_u16m4_i16m4(...) __riscv_vreinterpret_v_u16m4_i16m4(__VA_ARGS__)

#define	vreinterpret_v_u16m4_u32m4(...) __riscv_vreinterpret_v_u16m4_u32m4(__VA_ARGS__)

#define	vreinterpret_v_u16m4_u64m4(...) __riscv_vreinterpret_v_u16m4_u64m4(__VA_ARGS__)

#define	vreinterpret_v_u16m4_u8m4(...) __riscv_vreinterpret_v_u16m4_u8m4(__VA_ARGS__)

#define	vreinterpret_v_u16m8_f16m8(...) __riscv_vreinterpret_v_u16m8_f16m8(__VA_ARGS__)

#define	vreinterpret_v_u16m8_i16m8(...) __riscv_vreinterpret_v_u16m8_i16m8(__VA_ARGS__)

#define	vreinterpret_v_u16m8_u32m8(...) __riscv_vreinterpret_v_u16m8_u32m8(__VA_ARGS__)

#define	vreinterpret_v_u16m8_u64m8(...) __riscv_vreinterpret_v_u16m8_u64m8(__VA_ARGS__)

#define	vreinterpret_v_u16m8_u8m8(...) __riscv_vreinterpret_v_u16m8_u8m8(__VA_ARGS__)

#define	vreinterpret_v_u16mf2_f16mf2(...) __riscv_vreinterpret_v_u16mf2_f16mf2(__VA_ARGS__)

#define	vreinterpret_v_u16mf2_i16mf2(...) __riscv_vreinterpret_v_u16mf2_i16mf2(__VA_ARGS__)

#define	vreinterpret_v_u16mf2_u32mf2(...) __riscv_vreinterpret_v_u16mf2_u32mf2(__VA_ARGS__)

#define	vreinterpret_v_u16mf2_u8mf2(...) __riscv_vreinterpret_v_u16mf2_u8mf2(__VA_ARGS__)

#define	vreinterpret_v_u16mf4_f16mf4(...) __riscv_vreinterpret_v_u16mf4_f16mf4(__VA_ARGS__)

#define	vreinterpret_v_u16mf4_i16mf4(...) __riscv_vreinterpret_v_u16mf4_i16mf4(__VA_ARGS__)

#define	vreinterpret_v_u16mf4_u8mf4(...) __riscv_vreinterpret_v_u16mf4_u8mf4(__VA_ARGS__)

#define	vreinterpret_v_u32m1_f32m1(...) __riscv_vreinterpret_v_u32m1_f32m1(__VA_ARGS__)

#define	vreinterpret_v_u32m1_i32m1(...) __riscv_vreinterpret_v_u32m1_i32m1(__VA_ARGS__)

#define	vreinterpret_v_u32m1_u16m1(...) __riscv_vreinterpret_v_u32m1_u16m1(__VA_ARGS__)

#define	vreinterpret_v_u32m1_u64m1(...) __riscv_vreinterpret_v_u32m1_u64m1(__VA_ARGS__)

#define	vreinterpret_v_u32m1_u8m1(...) __riscv_vreinterpret_v_u32m1_u8m1(__VA_ARGS__)

#define	vreinterpret_v_u32m2_f32m2(...) __riscv_vreinterpret_v_u32m2_f32m2(__VA_ARGS__)

#define	vreinterpret_v_u32m2_i32m2(...) __riscv_vreinterpret_v_u32m2_i32m2(__VA_ARGS__)

#define	vreinterpret_v_u32m2_u16m2(...) __riscv_vreinterpret_v_u32m2_u16m2(__VA_ARGS__)

#define	vreinterpret_v_u32m2_u64m2(...) __riscv_vreinterpret_v_u32m2_u64m2(__VA_ARGS__)

#define	vreinterpret_v_u32m2_u8m2(...) __riscv_vreinterpret_v_u32m2_u8m2(__VA_ARGS__)

#define	vreinterpret_v_u32m4_f32m4(...) __riscv_vreinterpret_v_u32m4_f32m4(__VA_ARGS__)

#define	vreinterpret_v_u32m4_i32m4(...) __riscv_vreinterpret_v_u32m4_i32m4(__VA_ARGS__)

#define	vreinterpret_v_u32m4_u16m4(...) __riscv_vreinterpret_v_u32m4_u16m4(__VA_ARGS__)

#define	vreinterpret_v_u32m4_u64m4(...) __riscv_vreinterpret_v_u32m4_u64m4(__VA_ARGS__)

#define	vreinterpret_v_u32m4_u8m4(...) __riscv_vreinterpret_v_u32m4_u8m4(__VA_ARGS__)

#define	vreinterpret_v_u32m8_f32m8(...) __riscv_vreinterpret_v_u32m8_f32m8(__VA_ARGS__)

#define	vreinterpret_v_u32m8_i32m8(...) __riscv_vreinterpret_v_u32m8_i32m8(__VA_ARGS__)

#define	vreinterpret_v_u32m8_u16m8(...) __riscv_vreinterpret_v_u32m8_u16m8(__VA_ARGS__)

#define	vreinterpret_v_u32m8_u64m8(...) __riscv_vreinterpret_v_u32m8_u64m8(__VA_ARGS__)

#define	vreinterpret_v_u32m8_u8m8(...) __riscv_vreinterpret_v_u32m8_u8m8(__VA_ARGS__)

#define	vreinterpret_v_u32mf2_f32mf2(...) __riscv_vreinterpret_v_u32mf2_f32mf2(__VA_ARGS__)

#define	vreinterpret_v_u32mf2_i32mf2(...) __riscv_vreinterpret_v_u32mf2_i32mf2(__VA_ARGS__)

#define	vreinterpret_v_u32mf2_u16mf2(...) __riscv_vreinterpret_v_u32mf2_u16mf2(__VA_ARGS__)

#define	vreinterpret_v_u32mf2_u8mf2(...) __riscv_vreinterpret_v_u32mf2_u8mf2(__VA_ARGS__)

#define	vreinterpret_v_u64m1_f64m1(...) __riscv_vreinterpret_v_u64m1_f64m1(__VA_ARGS__)

#define	vreinterpret_v_u64m1_i64m1(...) __riscv_vreinterpret_v_u64m1_i64m1(__VA_ARGS__)

#define	vreinterpret_v_u64m1_u16m1(...) __riscv_vreinterpret_v_u64m1_u16m1(__VA_ARGS__)

#define	vreinterpret_v_u64m1_u32m1(...) __riscv_vreinterpret_v_u64m1_u32m1(__VA_ARGS__)

#define	vreinterpret_v_u64m1_u8m1(...) __riscv_vreinterpret_v_u64m1_u8m1(__VA_ARGS__)

#define	vreinterpret_v_u64m2_f64m2(...) __riscv_vreinterpret_v_u64m2_f64m2(__VA_ARGS__)

#define	vreinterpret_v_u64m2_i64m2(...) __riscv_vreinterpret_v_u64m2_i64m2(__VA_ARGS__)

#define	vreinterpret_v_u64m2_u16m2(...) __riscv_vreinterpret_v_u64m2_u16m2(__VA_ARGS__)

#define	vreinterpret_v_u64m2_u32m2(...) __riscv_vreinterpret_v_u64m2_u32m2(__VA_ARGS__)

#define	vreinterpret_v_u64m2_u8m2(...) __riscv_vreinterpret_v_u64m2_u8m2(__VA_ARGS__)

#define	vreinterpret_v_u64m4_f64m4(...) __riscv_vreinterpret_v_u64m4_f64m4(__VA_ARGS__)

#define	vreinterpret_v_u64m4_i64m4(...) __riscv_vreinterpret_v_u64m4_i64m4(__VA_ARGS__)

#define	vreinterpret_v_u64m4_u16m4(...) __riscv_vreinterpret_v_u64m4_u16m4(__VA_ARGS__)

#define	vreinterpret_v_u64m4_u32m4(...) __riscv_vreinterpret_v_u64m4_u32m4(__VA_ARGS__)

#define	vreinterpret_v_u64m4_u8m4(...) __riscv_vreinterpret_v_u64m4_u8m4(__VA_ARGS__)

#define	vreinterpret_v_u64m8_f64m8(...) __riscv_vreinterpret_v_u64m8_f64m8(__VA_ARGS__)

#define	vreinterpret_v_u64m8_i64m8(...) __riscv_vreinterpret_v_u64m8_i64m8(__VA_ARGS__)

#define	vreinterpret_v_u64m8_u16m8(...) __riscv_vreinterpret_v_u64m8_u16m8(__VA_ARGS__)

#define	vreinterpret_v_u64m8_u32m8(...) __riscv_vreinterpret_v_u64m8_u32m8(__VA_ARGS__)

#define	vreinterpret_v_u64m8_u8m8(...) __riscv_vreinterpret_v_u64m8_u8m8(__VA_ARGS__)

#define	vreinterpret_v_u8m1_i8m1(...) __riscv_vreinterpret_v_u8m1_i8m1(__VA_ARGS__)

#define	vreinterpret_v_u8m1_u16m1(...) __riscv_vreinterpret_v_u8m1_u16m1(__VA_ARGS__)

#define	vreinterpret_v_u8m1_u32m1(...) __riscv_vreinterpret_v_u8m1_u32m1(__VA_ARGS__)

#define	vreinterpret_v_u8m1_u64m1(...) __riscv_vreinterpret_v_u8m1_u64m1(__VA_ARGS__)

#define	vreinterpret_v_u8m2_i8m2(...) __riscv_vreinterpret_v_u8m2_i8m2(__VA_ARGS__)

#define	vreinterpret_v_u8m2_u16m2(...) __riscv_vreinterpret_v_u8m2_u16m2(__VA_ARGS__)

#define	vreinterpret_v_u8m2_u32m2(...) __riscv_vreinterpret_v_u8m2_u32m2(__VA_ARGS__)

#define	vreinterpret_v_u8m2_u64m2(...) __riscv_vreinterpret_v_u8m2_u64m2(__VA_ARGS__)

#define	vreinterpret_v_u8m4_i8m4(...) __riscv_vreinterpret_v_u8m4_i8m4(__VA_ARGS__)

#define	vreinterpret_v_u8m4_u16m4(...) __riscv_vreinterpret_v_u8m4_u16m4(__VA_ARGS__)

#define	vreinterpret_v_u8m4_u32m4(...) __riscv_vreinterpret_v_u8m4_u32m4(__VA_ARGS__)

#define	vreinterpret_v_u8m4_u64m4(...) __riscv_vreinterpret_v_u8m4_u64m4(__VA_ARGS__)

#define	vreinterpret_v_u8m8_i8m8(...) __riscv_vreinterpret_v_u8m8_i8m8(__VA_ARGS__)

#define	vreinterpret_v_u8m8_u16m8(...) __riscv_vreinterpret_v_u8m8_u16m8(__VA_ARGS__)

#define	vreinterpret_v_u8m8_u32m8(...) __riscv_vreinterpret_v_u8m8_u32m8(__VA_ARGS__)

#define	vreinterpret_v_u8m8_u64m8(...) __riscv_vreinterpret_v_u8m8_u64m8(__VA_ARGS__)

#define	vreinterpret_v_u8mf2_i8mf2(...) __riscv_vreinterpret_v_u8mf2_i8mf2(__VA_ARGS__)

#define	vreinterpret_v_u8mf2_u16mf2(...) __riscv_vreinterpret_v_u8mf2_u16mf2(__VA_ARGS__)

#define	vreinterpret_v_u8mf2_u32mf2(...) __riscv_vreinterpret_v_u8mf2_u32mf2(__VA_ARGS__)

#define	vreinterpret_v_u8mf4_i8mf4(...) __riscv_vreinterpret_v_u8mf4_i8mf4(__VA_ARGS__)

#define	vreinterpret_v_u8mf4_u16mf4(...) __riscv_vreinterpret_v_u8mf4_u16mf4(__VA_ARGS__)

#define	vreinterpret_v_u8mf8_i8mf8(...) __riscv_vreinterpret_v_u8mf8_i8mf8(__VA_ARGS__)

#define	vrem_vv_i16m1(...) __riscv_vrem_vv_i16m1(__VA_ARGS__)

#define	vrem_vv_i16m1_m(...) __riscv_vrem_vv_i16m1_tumu(__VA_ARGS__)

#define	vrem_vv_i16m2(...) __riscv_vrem_vv_i16m2(__VA_ARGS__)

#define	vrem_vv_i16m2_m(...) __riscv_vrem_vv_i16m2_tumu(__VA_ARGS__)

#define	vrem_vv_i16m4(...) __riscv_vrem_vv_i16m4(__VA_ARGS__)

#define	vrem_vv_i16m4_m(...) __riscv_vrem_vv_i16m4_tumu(__VA_ARGS__)

#define	vrem_vv_i16m8(...) __riscv_vrem_vv_i16m8(__VA_ARGS__)

#define	vrem_vv_i16m8_m(...) __riscv_vrem_vv_i16m8_tumu(__VA_ARGS__)

#define	vrem_vv_i16mf2(...) __riscv_vrem_vv_i16mf2(__VA_ARGS__)

#define	vrem_vv_i16mf2_m(...) __riscv_vrem_vv_i16mf2_tumu(__VA_ARGS__)

#define	vrem_vv_i16mf4(...) __riscv_vrem_vv_i16mf4(__VA_ARGS__)

#define	vrem_vv_i16mf4_m(...) __riscv_vrem_vv_i16mf4_tumu(__VA_ARGS__)

#define	vrem_vv_i32m1(...) __riscv_vrem_vv_i32m1(__VA_ARGS__)

#define	vrem_vv_i32m1_m(...) __riscv_vrem_vv_i32m1_tumu(__VA_ARGS__)

#define	vrem_vv_i32m2(...) __riscv_vrem_vv_i32m2(__VA_ARGS__)

#define	vrem_vv_i32m2_m(...) __riscv_vrem_vv_i32m2_tumu(__VA_ARGS__)

#define	vrem_vv_i32m4(...) __riscv_vrem_vv_i32m4(__VA_ARGS__)

#define	vrem_vv_i32m4_m(...) __riscv_vrem_vv_i32m4_tumu(__VA_ARGS__)

#define	vrem_vv_i32m8(...) __riscv_vrem_vv_i32m8(__VA_ARGS__)

#define	vrem_vv_i32m8_m(...) __riscv_vrem_vv_i32m8_tumu(__VA_ARGS__)

#define	vrem_vv_i32mf2(...) __riscv_vrem_vv_i32mf2(__VA_ARGS__)

#define	vrem_vv_i32mf2_m(...) __riscv_vrem_vv_i32mf2_tumu(__VA_ARGS__)

#define	vrem_vv_i64m1(...) __riscv_vrem_vv_i64m1(__VA_ARGS__)

#define	vrem_vv_i64m1_m(...) __riscv_vrem_vv_i64m1_tumu(__VA_ARGS__)

#define	vrem_vv_i64m2(...) __riscv_vrem_vv_i64m2(__VA_ARGS__)

#define	vrem_vv_i64m2_m(...) __riscv_vrem_vv_i64m2_tumu(__VA_ARGS__)

#define	vrem_vv_i64m4(...) __riscv_vrem_vv_i64m4(__VA_ARGS__)

#define	vrem_vv_i64m4_m(...) __riscv_vrem_vv_i64m4_tumu(__VA_ARGS__)

#define	vrem_vv_i64m8(...) __riscv_vrem_vv_i64m8(__VA_ARGS__)

#define	vrem_vv_i64m8_m(...) __riscv_vrem_vv_i64m8_tumu(__VA_ARGS__)

#define	vrem_vv_i8m1(...) __riscv_vrem_vv_i8m1(__VA_ARGS__)

#define	vrem_vv_i8m1_m(...) __riscv_vrem_vv_i8m1_tumu(__VA_ARGS__)

#define	vrem_vv_i8m2(...) __riscv_vrem_vv_i8m2(__VA_ARGS__)

#define	vrem_vv_i8m2_m(...) __riscv_vrem_vv_i8m2_tumu(__VA_ARGS__)

#define	vrem_vv_i8m4(...) __riscv_vrem_vv_i8m4(__VA_ARGS__)

#define	vrem_vv_i8m4_m(...) __riscv_vrem_vv_i8m4_tumu(__VA_ARGS__)

#define	vrem_vv_i8m8(...) __riscv_vrem_vv_i8m8(__VA_ARGS__)

#define	vrem_vv_i8m8_m(...) __riscv_vrem_vv_i8m8_tumu(__VA_ARGS__)

#define	vrem_vv_i8mf2(...) __riscv_vrem_vv_i8mf2(__VA_ARGS__)

#define	vrem_vv_i8mf2_m(...) __riscv_vrem_vv_i8mf2_tumu(__VA_ARGS__)

#define	vrem_vv_i8mf4(...) __riscv_vrem_vv_i8mf4(__VA_ARGS__)

#define	vrem_vv_i8mf4_m(...) __riscv_vrem_vv_i8mf4_tumu(__VA_ARGS__)

#define	vrem_vv_i8mf8(...) __riscv_vrem_vv_i8mf8(__VA_ARGS__)

#define	vrem_vv_i8mf8_m(...) __riscv_vrem_vv_i8mf8_tumu(__VA_ARGS__)

#define	vrem_vx_i16m1(...) __riscv_vrem_vx_i16m1(__VA_ARGS__)

#define	vrem_vx_i16m1_m(...) __riscv_vrem_vx_i16m1_tumu(__VA_ARGS__)

#define	vrem_vx_i16m2(...) __riscv_vrem_vx_i16m2(__VA_ARGS__)

#define	vrem_vx_i16m2_m(...) __riscv_vrem_vx_i16m2_tumu(__VA_ARGS__)

#define	vrem_vx_i16m4(...) __riscv_vrem_vx_i16m4(__VA_ARGS__)

#define	vrem_vx_i16m4_m(...) __riscv_vrem_vx_i16m4_tumu(__VA_ARGS__)

#define	vrem_vx_i16m8(...) __riscv_vrem_vx_i16m8(__VA_ARGS__)

#define	vrem_vx_i16m8_m(...) __riscv_vrem_vx_i16m8_tumu(__VA_ARGS__)

#define	vrem_vx_i16mf2(...) __riscv_vrem_vx_i16mf2(__VA_ARGS__)

#define	vrem_vx_i16mf2_m(...) __riscv_vrem_vx_i16mf2_tumu(__VA_ARGS__)

#define	vrem_vx_i16mf4(...) __riscv_vrem_vx_i16mf4(__VA_ARGS__)

#define	vrem_vx_i16mf4_m(...) __riscv_vrem_vx_i16mf4_tumu(__VA_ARGS__)

#define	vrem_vx_i32m1(...) __riscv_vrem_vx_i32m1(__VA_ARGS__)

#define	vrem_vx_i32m1_m(...) __riscv_vrem_vx_i32m1_tumu(__VA_ARGS__)

#define	vrem_vx_i32m2(...) __riscv_vrem_vx_i32m2(__VA_ARGS__)

#define	vrem_vx_i32m2_m(...) __riscv_vrem_vx_i32m2_tumu(__VA_ARGS__)

#define	vrem_vx_i32m4(...) __riscv_vrem_vx_i32m4(__VA_ARGS__)

#define	vrem_vx_i32m4_m(...) __riscv_vrem_vx_i32m4_tumu(__VA_ARGS__)

#define	vrem_vx_i32m8(...) __riscv_vrem_vx_i32m8(__VA_ARGS__)

#define	vrem_vx_i32m8_m(...) __riscv_vrem_vx_i32m8_tumu(__VA_ARGS__)

#define	vrem_vx_i32mf2(...) __riscv_vrem_vx_i32mf2(__VA_ARGS__)

#define	vrem_vx_i32mf2_m(...) __riscv_vrem_vx_i32mf2_tumu(__VA_ARGS__)

#define	vrem_vx_i64m1(...) __riscv_vrem_vx_i64m1(__VA_ARGS__)

#define	vrem_vx_i64m1_m(...) __riscv_vrem_vx_i64m1_tumu(__VA_ARGS__)

#define	vrem_vx_i64m2(...) __riscv_vrem_vx_i64m2(__VA_ARGS__)

#define	vrem_vx_i64m2_m(...) __riscv_vrem_vx_i64m2_tumu(__VA_ARGS__)

#define	vrem_vx_i64m4(...) __riscv_vrem_vx_i64m4(__VA_ARGS__)

#define	vrem_vx_i64m4_m(...) __riscv_vrem_vx_i64m4_tumu(__VA_ARGS__)

#define	vrem_vx_i64m8(...) __riscv_vrem_vx_i64m8(__VA_ARGS__)

#define	vrem_vx_i64m8_m(...) __riscv_vrem_vx_i64m8_tumu(__VA_ARGS__)

#define	vrem_vx_i8m1(...) __riscv_vrem_vx_i8m1(__VA_ARGS__)

#define	vrem_vx_i8m1_m(...) __riscv_vrem_vx_i8m1_tumu(__VA_ARGS__)

#define	vrem_vx_i8m2(...) __riscv_vrem_vx_i8m2(__VA_ARGS__)

#define	vrem_vx_i8m2_m(...) __riscv_vrem_vx_i8m2_tumu(__VA_ARGS__)

#define	vrem_vx_i8m4(...) __riscv_vrem_vx_i8m4(__VA_ARGS__)

#define	vrem_vx_i8m4_m(...) __riscv_vrem_vx_i8m4_tumu(__VA_ARGS__)

#define	vrem_vx_i8m8(...) __riscv_vrem_vx_i8m8(__VA_ARGS__)

#define	vrem_vx_i8m8_m(...) __riscv_vrem_vx_i8m8_tumu(__VA_ARGS__)

#define	vrem_vx_i8mf2(...) __riscv_vrem_vx_i8mf2(__VA_ARGS__)

#define	vrem_vx_i8mf2_m(...) __riscv_vrem_vx_i8mf2_tumu(__VA_ARGS__)

#define	vrem_vx_i8mf4(...) __riscv_vrem_vx_i8mf4(__VA_ARGS__)

#define	vrem_vx_i8mf4_m(...) __riscv_vrem_vx_i8mf4_tumu(__VA_ARGS__)

#define	vrem_vx_i8mf8(...) __riscv_vrem_vx_i8mf8(__VA_ARGS__)

#define	vrem_vx_i8mf8_m(...) __riscv_vrem_vx_i8mf8_tumu(__VA_ARGS__)

#define	vremu_vv_u16m1(...) __riscv_vremu_vv_u16m1(__VA_ARGS__)

#define	vremu_vv_u16m1_m(...) __riscv_vremu_vv_u16m1_tumu(__VA_ARGS__)

#define	vremu_vv_u16m2(...) __riscv_vremu_vv_u16m2(__VA_ARGS__)

#define	vremu_vv_u16m2_m(...) __riscv_vremu_vv_u16m2_tumu(__VA_ARGS__)

#define	vremu_vv_u16m4(...) __riscv_vremu_vv_u16m4(__VA_ARGS__)

#define	vremu_vv_u16m4_m(...) __riscv_vremu_vv_u16m4_tumu(__VA_ARGS__)

#define	vremu_vv_u16m8(...) __riscv_vremu_vv_u16m8(__VA_ARGS__)

#define	vremu_vv_u16m8_m(...) __riscv_vremu_vv_u16m8_tumu(__VA_ARGS__)

#define	vremu_vv_u16mf2(...) __riscv_vremu_vv_u16mf2(__VA_ARGS__)

#define	vremu_vv_u16mf2_m(...) __riscv_vremu_vv_u16mf2_tumu(__VA_ARGS__)

#define	vremu_vv_u16mf4(...) __riscv_vremu_vv_u16mf4(__VA_ARGS__)

#define	vremu_vv_u16mf4_m(...) __riscv_vremu_vv_u16mf4_tumu(__VA_ARGS__)

#define	vremu_vv_u32m1(...) __riscv_vremu_vv_u32m1(__VA_ARGS__)

#define	vremu_vv_u32m1_m(...) __riscv_vremu_vv_u32m1_tumu(__VA_ARGS__)

#define	vremu_vv_u32m2(...) __riscv_vremu_vv_u32m2(__VA_ARGS__)

#define	vremu_vv_u32m2_m(...) __riscv_vremu_vv_u32m2_tumu(__VA_ARGS__)

#define	vremu_vv_u32m4(...) __riscv_vremu_vv_u32m4(__VA_ARGS__)

#define	vremu_vv_u32m4_m(...) __riscv_vremu_vv_u32m4_tumu(__VA_ARGS__)

#define	vremu_vv_u32m8(...) __riscv_vremu_vv_u32m8(__VA_ARGS__)

#define	vremu_vv_u32m8_m(...) __riscv_vremu_vv_u32m8_tumu(__VA_ARGS__)

#define	vremu_vv_u32mf2(...) __riscv_vremu_vv_u32mf2(__VA_ARGS__)

#define	vremu_vv_u32mf2_m(...) __riscv_vremu_vv_u32mf2_tumu(__VA_ARGS__)

#define	vremu_vv_u64m1(...) __riscv_vremu_vv_u64m1(__VA_ARGS__)

#define	vremu_vv_u64m1_m(...) __riscv_vremu_vv_u64m1_tumu(__VA_ARGS__)

#define	vremu_vv_u64m2(...) __riscv_vremu_vv_u64m2(__VA_ARGS__)

#define	vremu_vv_u64m2_m(...) __riscv_vremu_vv_u64m2_tumu(__VA_ARGS__)

#define	vremu_vv_u64m4(...) __riscv_vremu_vv_u64m4(__VA_ARGS__)

#define	vremu_vv_u64m4_m(...) __riscv_vremu_vv_u64m4_tumu(__VA_ARGS__)

#define	vremu_vv_u64m8(...) __riscv_vremu_vv_u64m8(__VA_ARGS__)

#define	vremu_vv_u64m8_m(...) __riscv_vremu_vv_u64m8_tumu(__VA_ARGS__)

#define	vremu_vv_u8m1(...) __riscv_vremu_vv_u8m1(__VA_ARGS__)

#define	vremu_vv_u8m1_m(...) __riscv_vremu_vv_u8m1_tumu(__VA_ARGS__)

#define	vremu_vv_u8m2(...) __riscv_vremu_vv_u8m2(__VA_ARGS__)

#define	vremu_vv_u8m2_m(...) __riscv_vremu_vv_u8m2_tumu(__VA_ARGS__)

#define	vremu_vv_u8m4(...) __riscv_vremu_vv_u8m4(__VA_ARGS__)

#define	vremu_vv_u8m4_m(...) __riscv_vremu_vv_u8m4_tumu(__VA_ARGS__)

#define	vremu_vv_u8m8(...) __riscv_vremu_vv_u8m8(__VA_ARGS__)

#define	vremu_vv_u8m8_m(...) __riscv_vremu_vv_u8m8_tumu(__VA_ARGS__)

#define	vremu_vv_u8mf2(...) __riscv_vremu_vv_u8mf2(__VA_ARGS__)

#define	vremu_vv_u8mf2_m(...) __riscv_vremu_vv_u8mf2_tumu(__VA_ARGS__)

#define	vremu_vv_u8mf4(...) __riscv_vremu_vv_u8mf4(__VA_ARGS__)

#define	vremu_vv_u8mf4_m(...) __riscv_vremu_vv_u8mf4_tumu(__VA_ARGS__)

#define	vremu_vv_u8mf8(...) __riscv_vremu_vv_u8mf8(__VA_ARGS__)

#define	vremu_vv_u8mf8_m(...) __riscv_vremu_vv_u8mf8_tumu(__VA_ARGS__)

#define	vremu_vx_u16m1(...) __riscv_vremu_vx_u16m1(__VA_ARGS__)

#define	vremu_vx_u16m1_m(...) __riscv_vremu_vx_u16m1_tumu(__VA_ARGS__)

#define	vremu_vx_u16m2(...) __riscv_vremu_vx_u16m2(__VA_ARGS__)

#define	vremu_vx_u16m2_m(...) __riscv_vremu_vx_u16m2_tumu(__VA_ARGS__)

#define	vremu_vx_u16m4(...) __riscv_vremu_vx_u16m4(__VA_ARGS__)

#define	vremu_vx_u16m4_m(...) __riscv_vremu_vx_u16m4_tumu(__VA_ARGS__)

#define	vremu_vx_u16m8(...) __riscv_vremu_vx_u16m8(__VA_ARGS__)

#define	vremu_vx_u16m8_m(...) __riscv_vremu_vx_u16m8_tumu(__VA_ARGS__)

#define	vremu_vx_u16mf2(...) __riscv_vremu_vx_u16mf2(__VA_ARGS__)

#define	vremu_vx_u16mf2_m(...) __riscv_vremu_vx_u16mf2_tumu(__VA_ARGS__)

#define	vremu_vx_u16mf4(...) __riscv_vremu_vx_u16mf4(__VA_ARGS__)

#define	vremu_vx_u16mf4_m(...) __riscv_vremu_vx_u16mf4_tumu(__VA_ARGS__)

#define	vremu_vx_u32m1(...) __riscv_vremu_vx_u32m1(__VA_ARGS__)

#define	vremu_vx_u32m1_m(...) __riscv_vremu_vx_u32m1_tumu(__VA_ARGS__)

#define	vremu_vx_u32m2(...) __riscv_vremu_vx_u32m2(__VA_ARGS__)

#define	vremu_vx_u32m2_m(...) __riscv_vremu_vx_u32m2_tumu(__VA_ARGS__)

#define	vremu_vx_u32m4(...) __riscv_vremu_vx_u32m4(__VA_ARGS__)

#define	vremu_vx_u32m4_m(...) __riscv_vremu_vx_u32m4_tumu(__VA_ARGS__)

#define	vremu_vx_u32m8(...) __riscv_vremu_vx_u32m8(__VA_ARGS__)

#define	vremu_vx_u32m8_m(...) __riscv_vremu_vx_u32m8_tumu(__VA_ARGS__)

#define	vremu_vx_u32mf2(...) __riscv_vremu_vx_u32mf2(__VA_ARGS__)

#define	vremu_vx_u32mf2_m(...) __riscv_vremu_vx_u32mf2_tumu(__VA_ARGS__)

#define	vremu_vx_u64m1(...) __riscv_vremu_vx_u64m1(__VA_ARGS__)

#define	vremu_vx_u64m1_m(...) __riscv_vremu_vx_u64m1_tumu(__VA_ARGS__)

#define	vremu_vx_u64m2(...) __riscv_vremu_vx_u64m2(__VA_ARGS__)

#define	vremu_vx_u64m2_m(...) __riscv_vremu_vx_u64m2_tumu(__VA_ARGS__)

#define	vremu_vx_u64m4(...) __riscv_vremu_vx_u64m4(__VA_ARGS__)

#define	vremu_vx_u64m4_m(...) __riscv_vremu_vx_u64m4_tumu(__VA_ARGS__)

#define	vremu_vx_u64m8(...) __riscv_vremu_vx_u64m8(__VA_ARGS__)

#define	vremu_vx_u64m8_m(...) __riscv_vremu_vx_u64m8_tumu(__VA_ARGS__)

#define	vremu_vx_u8m1(...) __riscv_vremu_vx_u8m1(__VA_ARGS__)

#define	vremu_vx_u8m1_m(...) __riscv_vremu_vx_u8m1_tumu(__VA_ARGS__)

#define	vremu_vx_u8m2(...) __riscv_vremu_vx_u8m2(__VA_ARGS__)

#define	vremu_vx_u8m2_m(...) __riscv_vremu_vx_u8m2_tumu(__VA_ARGS__)

#define	vremu_vx_u8m4(...) __riscv_vremu_vx_u8m4(__VA_ARGS__)

#define	vremu_vx_u8m4_m(...) __riscv_vremu_vx_u8m4_tumu(__VA_ARGS__)

#define	vremu_vx_u8m8(...) __riscv_vremu_vx_u8m8(__VA_ARGS__)

#define	vremu_vx_u8m8_m(...) __riscv_vremu_vx_u8m8_tumu(__VA_ARGS__)

#define	vremu_vx_u8mf2(...) __riscv_vremu_vx_u8mf2(__VA_ARGS__)

#define	vremu_vx_u8mf2_m(...) __riscv_vremu_vx_u8mf2_tumu(__VA_ARGS__)

#define	vremu_vx_u8mf4(...) __riscv_vremu_vx_u8mf4(__VA_ARGS__)

#define	vremu_vx_u8mf4_m(...) __riscv_vremu_vx_u8mf4_tumu(__VA_ARGS__)

#define	vremu_vx_u8mf8(...) __riscv_vremu_vx_u8mf8(__VA_ARGS__)

#define	vremu_vx_u8mf8_m(...) __riscv_vremu_vx_u8mf8_tumu(__VA_ARGS__)

#define	vrgather_vv_f16m1(...) __riscv_vrgather_vv_f16m1(__VA_ARGS__)

#define	vrgather_vv_f16m1_m(...) __riscv_vrgather_vv_f16m1_tumu(__VA_ARGS__)

#define	vrgather_vv_f16m2(...) __riscv_vrgather_vv_f16m2(__VA_ARGS__)

#define	vrgather_vv_f16m2_m(...) __riscv_vrgather_vv_f16m2_tumu(__VA_ARGS__)

#define	vrgather_vv_f16m4(...) __riscv_vrgather_vv_f16m4(__VA_ARGS__)

#define	vrgather_vv_f16m4_m(...) __riscv_vrgather_vv_f16m4_tumu(__VA_ARGS__)

#define	vrgather_vv_f16m8(...) __riscv_vrgather_vv_f16m8(__VA_ARGS__)

#define	vrgather_vv_f16m8_m(...) __riscv_vrgather_vv_f16m8_tumu(__VA_ARGS__)

#define	vrgather_vv_f16mf2(...) __riscv_vrgather_vv_f16mf2(__VA_ARGS__)

#define	vrgather_vv_f16mf2_m(...) __riscv_vrgather_vv_f16mf2_tumu(__VA_ARGS__)

#define	vrgather_vv_f16mf4(...) __riscv_vrgather_vv_f16mf4(__VA_ARGS__)

#define	vrgather_vv_f16mf4_m(...) __riscv_vrgather_vv_f16mf4_tumu(__VA_ARGS__)

#define	vrgather_vv_f32m1(...) __riscv_vrgather_vv_f32m1(__VA_ARGS__)

#define	vrgather_vv_f32m1_m(...) __riscv_vrgather_vv_f32m1_tumu(__VA_ARGS__)

#define	vrgather_vv_f32m2(...) __riscv_vrgather_vv_f32m2(__VA_ARGS__)

#define	vrgather_vv_f32m2_m(...) __riscv_vrgather_vv_f32m2_tumu(__VA_ARGS__)

#define	vrgather_vv_f32m4(...) __riscv_vrgather_vv_f32m4(__VA_ARGS__)

#define	vrgather_vv_f32m4_m(...) __riscv_vrgather_vv_f32m4_tumu(__VA_ARGS__)

#define	vrgather_vv_f32m8(...) __riscv_vrgather_vv_f32m8(__VA_ARGS__)

#define	vrgather_vv_f32m8_m(...) __riscv_vrgather_vv_f32m8_tumu(__VA_ARGS__)

#define	vrgather_vv_f32mf2(...) __riscv_vrgather_vv_f32mf2(__VA_ARGS__)

#define	vrgather_vv_f32mf2_m(...) __riscv_vrgather_vv_f32mf2_tumu(__VA_ARGS__)

#define	vrgather_vv_f64m1(...) __riscv_vrgather_vv_f64m1(__VA_ARGS__)

#define	vrgather_vv_f64m1_m(...) __riscv_vrgather_vv_f64m1_tumu(__VA_ARGS__)

#define	vrgather_vv_f64m2(...) __riscv_vrgather_vv_f64m2(__VA_ARGS__)

#define	vrgather_vv_f64m2_m(...) __riscv_vrgather_vv_f64m2_tumu(__VA_ARGS__)

#define	vrgather_vv_f64m4(...) __riscv_vrgather_vv_f64m4(__VA_ARGS__)

#define	vrgather_vv_f64m4_m(...) __riscv_vrgather_vv_f64m4_tumu(__VA_ARGS__)

#define	vrgather_vv_f64m8(...) __riscv_vrgather_vv_f64m8(__VA_ARGS__)

#define	vrgather_vv_f64m8_m(...) __riscv_vrgather_vv_f64m8_tumu(__VA_ARGS__)

#define	vrgather_vv_i16m1(...) __riscv_vrgather_vv_i16m1(__VA_ARGS__)

#define	vrgather_vv_i16m1_m(...) __riscv_vrgather_vv_i16m1_tumu(__VA_ARGS__)

#define	vrgather_vv_i16m2(...) __riscv_vrgather_vv_i16m2(__VA_ARGS__)

#define	vrgather_vv_i16m2_m(...) __riscv_vrgather_vv_i16m2_tumu(__VA_ARGS__)

#define	vrgather_vv_i16m4(...) __riscv_vrgather_vv_i16m4(__VA_ARGS__)

#define	vrgather_vv_i16m4_m(...) __riscv_vrgather_vv_i16m4_tumu(__VA_ARGS__)

#define	vrgather_vv_i16m8(...) __riscv_vrgather_vv_i16m8(__VA_ARGS__)

#define	vrgather_vv_i16m8_m(...) __riscv_vrgather_vv_i16m8_tumu(__VA_ARGS__)

#define	vrgather_vv_i16mf2(...) __riscv_vrgather_vv_i16mf2(__VA_ARGS__)

#define	vrgather_vv_i16mf2_m(...) __riscv_vrgather_vv_i16mf2_tumu(__VA_ARGS__)

#define	vrgather_vv_i16mf4(...) __riscv_vrgather_vv_i16mf4(__VA_ARGS__)

#define	vrgather_vv_i16mf4_m(...) __riscv_vrgather_vv_i16mf4_tumu(__VA_ARGS__)

#define	vrgather_vv_i32m1(...) __riscv_vrgather_vv_i32m1(__VA_ARGS__)

#define	vrgather_vv_i32m1_m(...) __riscv_vrgather_vv_i32m1_tumu(__VA_ARGS__)

#define	vrgather_vv_i32m2(...) __riscv_vrgather_vv_i32m2(__VA_ARGS__)

#define	vrgather_vv_i32m2_m(...) __riscv_vrgather_vv_i32m2_tumu(__VA_ARGS__)

#define	vrgather_vv_i32m4(...) __riscv_vrgather_vv_i32m4(__VA_ARGS__)

#define	vrgather_vv_i32m4_m(...) __riscv_vrgather_vv_i32m4_tumu(__VA_ARGS__)

#define	vrgather_vv_i32m8(...) __riscv_vrgather_vv_i32m8(__VA_ARGS__)

#define	vrgather_vv_i32m8_m(...) __riscv_vrgather_vv_i32m8_tumu(__VA_ARGS__)

#define	vrgather_vv_i32mf2(...) __riscv_vrgather_vv_i32mf2(__VA_ARGS__)

#define	vrgather_vv_i32mf2_m(...) __riscv_vrgather_vv_i32mf2_tumu(__VA_ARGS__)

#define	vrgather_vv_i64m1(...) __riscv_vrgather_vv_i64m1(__VA_ARGS__)

#define	vrgather_vv_i64m1_m(...) __riscv_vrgather_vv_i64m1_tumu(__VA_ARGS__)

#define	vrgather_vv_i64m2(...) __riscv_vrgather_vv_i64m2(__VA_ARGS__)

#define	vrgather_vv_i64m2_m(...) __riscv_vrgather_vv_i64m2_tumu(__VA_ARGS__)

#define	vrgather_vv_i64m4(...) __riscv_vrgather_vv_i64m4(__VA_ARGS__)

#define	vrgather_vv_i64m4_m(...) __riscv_vrgather_vv_i64m4_tumu(__VA_ARGS__)

#define	vrgather_vv_i64m8(...) __riscv_vrgather_vv_i64m8(__VA_ARGS__)

#define	vrgather_vv_i64m8_m(...) __riscv_vrgather_vv_i64m8_tumu(__VA_ARGS__)

#define	vrgather_vv_i8m1(...) __riscv_vrgather_vv_i8m1(__VA_ARGS__)

#define	vrgather_vv_i8m1_m(...) __riscv_vrgather_vv_i8m1_tumu(__VA_ARGS__)

#define	vrgather_vv_i8m2(...) __riscv_vrgather_vv_i8m2(__VA_ARGS__)

#define	vrgather_vv_i8m2_m(...) __riscv_vrgather_vv_i8m2_tumu(__VA_ARGS__)

#define	vrgather_vv_i8m4(...) __riscv_vrgather_vv_i8m4(__VA_ARGS__)

#define	vrgather_vv_i8m4_m(...) __riscv_vrgather_vv_i8m4_tumu(__VA_ARGS__)

#define	vrgather_vv_i8m8(...) __riscv_vrgather_vv_i8m8(__VA_ARGS__)

#define	vrgather_vv_i8m8_m(...) __riscv_vrgather_vv_i8m8_tumu(__VA_ARGS__)

#define	vrgather_vv_i8mf2(...) __riscv_vrgather_vv_i8mf2(__VA_ARGS__)

#define	vrgather_vv_i8mf2_m(...) __riscv_vrgather_vv_i8mf2_tumu(__VA_ARGS__)

#define	vrgather_vv_i8mf4(...) __riscv_vrgather_vv_i8mf4(__VA_ARGS__)

#define	vrgather_vv_i8mf4_m(...) __riscv_vrgather_vv_i8mf4_tumu(__VA_ARGS__)

#define	vrgather_vv_i8mf8(...) __riscv_vrgather_vv_i8mf8(__VA_ARGS__)

#define	vrgather_vv_i8mf8_m(...) __riscv_vrgather_vv_i8mf8_tumu(__VA_ARGS__)

#define	vrgather_vv_u16m1(...) __riscv_vrgather_vv_u16m1(__VA_ARGS__)

#define	vrgather_vv_u16m1_m(...) __riscv_vrgather_vv_u16m1_tumu(__VA_ARGS__)

#define	vrgather_vv_u16m2(...) __riscv_vrgather_vv_u16m2(__VA_ARGS__)

#define	vrgather_vv_u16m2_m(...) __riscv_vrgather_vv_u16m2_tumu(__VA_ARGS__)

#define	vrgather_vv_u16m4(...) __riscv_vrgather_vv_u16m4(__VA_ARGS__)

#define	vrgather_vv_u16m4_m(...) __riscv_vrgather_vv_u16m4_tumu(__VA_ARGS__)

#define	vrgather_vv_u16m8(...) __riscv_vrgather_vv_u16m8(__VA_ARGS__)

#define	vrgather_vv_u16m8_m(...) __riscv_vrgather_vv_u16m8_tumu(__VA_ARGS__)

#define	vrgather_vv_u16mf2(...) __riscv_vrgather_vv_u16mf2(__VA_ARGS__)

#define	vrgather_vv_u16mf2_m(...) __riscv_vrgather_vv_u16mf2_tumu(__VA_ARGS__)

#define	vrgather_vv_u16mf4(...) __riscv_vrgather_vv_u16mf4(__VA_ARGS__)

#define	vrgather_vv_u16mf4_m(...) __riscv_vrgather_vv_u16mf4_tumu(__VA_ARGS__)

#define	vrgather_vv_u32m1(...) __riscv_vrgather_vv_u32m1(__VA_ARGS__)

#define	vrgather_vv_u32m1_m(...) __riscv_vrgather_vv_u32m1_tumu(__VA_ARGS__)

#define	vrgather_vv_u32m2(...) __riscv_vrgather_vv_u32m2(__VA_ARGS__)

#define	vrgather_vv_u32m2_m(...) __riscv_vrgather_vv_u32m2_tumu(__VA_ARGS__)

#define	vrgather_vv_u32m4(...) __riscv_vrgather_vv_u32m4(__VA_ARGS__)

#define	vrgather_vv_u32m4_m(...) __riscv_vrgather_vv_u32m4_tumu(__VA_ARGS__)

#define	vrgather_vv_u32m8(...) __riscv_vrgather_vv_u32m8(__VA_ARGS__)

#define	vrgather_vv_u32m8_m(...) __riscv_vrgather_vv_u32m8_tumu(__VA_ARGS__)

#define	vrgather_vv_u32mf2(...) __riscv_vrgather_vv_u32mf2(__VA_ARGS__)

#define	vrgather_vv_u32mf2_m(...) __riscv_vrgather_vv_u32mf2_tumu(__VA_ARGS__)

#define	vrgather_vv_u64m1(...) __riscv_vrgather_vv_u64m1(__VA_ARGS__)

#define	vrgather_vv_u64m1_m(...) __riscv_vrgather_vv_u64m1_tumu(__VA_ARGS__)

#define	vrgather_vv_u64m2(...) __riscv_vrgather_vv_u64m2(__VA_ARGS__)

#define	vrgather_vv_u64m2_m(...) __riscv_vrgather_vv_u64m2_tumu(__VA_ARGS__)

#define	vrgather_vv_u64m4(...) __riscv_vrgather_vv_u64m4(__VA_ARGS__)

#define	vrgather_vv_u64m4_m(...) __riscv_vrgather_vv_u64m4_tumu(__VA_ARGS__)

#define	vrgather_vv_u64m8(...) __riscv_vrgather_vv_u64m8(__VA_ARGS__)

#define	vrgather_vv_u64m8_m(...) __riscv_vrgather_vv_u64m8_tumu(__VA_ARGS__)

#define	vrgather_vv_u8m1(...) __riscv_vrgather_vv_u8m1(__VA_ARGS__)

#define	vrgather_vv_u8m1_m(...) __riscv_vrgather_vv_u8m1_tumu(__VA_ARGS__)

#define	vrgather_vv_u8m2(...) __riscv_vrgather_vv_u8m2(__VA_ARGS__)

#define	vrgather_vv_u8m2_m(...) __riscv_vrgather_vv_u8m2_tumu(__VA_ARGS__)

#define	vrgather_vv_u8m4(...) __riscv_vrgather_vv_u8m4(__VA_ARGS__)

#define	vrgather_vv_u8m4_m(...) __riscv_vrgather_vv_u8m4_tumu(__VA_ARGS__)

#define	vrgather_vv_u8m8(...) __riscv_vrgather_vv_u8m8(__VA_ARGS__)

#define	vrgather_vv_u8m8_m(...) __riscv_vrgather_vv_u8m8_tumu(__VA_ARGS__)

#define	vrgather_vv_u8mf2(...) __riscv_vrgather_vv_u8mf2(__VA_ARGS__)

#define	vrgather_vv_u8mf2_m(...) __riscv_vrgather_vv_u8mf2_tumu(__VA_ARGS__)

#define	vrgather_vv_u8mf4(...) __riscv_vrgather_vv_u8mf4(__VA_ARGS__)

#define	vrgather_vv_u8mf4_m(...) __riscv_vrgather_vv_u8mf4_tumu(__VA_ARGS__)

#define	vrgather_vv_u8mf8(...) __riscv_vrgather_vv_u8mf8(__VA_ARGS__)

#define	vrgather_vv_u8mf8_m(...) __riscv_vrgather_vv_u8mf8_tumu(__VA_ARGS__)

#define	vrgather_vx_f16m1(...) __riscv_vrgather_vx_f16m1(__VA_ARGS__)

#define	vrgather_vx_f16m1_m(...) __riscv_vrgather_vx_f16m1_tumu(__VA_ARGS__)

#define	vrgather_vx_f16m2(...) __riscv_vrgather_vx_f16m2(__VA_ARGS__)

#define	vrgather_vx_f16m2_m(...) __riscv_vrgather_vx_f16m2_tumu(__VA_ARGS__)

#define	vrgather_vx_f16m4(...) __riscv_vrgather_vx_f16m4(__VA_ARGS__)

#define	vrgather_vx_f16m4_m(...) __riscv_vrgather_vx_f16m4_tumu(__VA_ARGS__)

#define	vrgather_vx_f16m8(...) __riscv_vrgather_vx_f16m8(__VA_ARGS__)

#define	vrgather_vx_f16m8_m(...) __riscv_vrgather_vx_f16m8_tumu(__VA_ARGS__)

#define	vrgather_vx_f16mf2(...) __riscv_vrgather_vx_f16mf2(__VA_ARGS__)

#define	vrgather_vx_f16mf2_m(...) __riscv_vrgather_vx_f16mf2_tumu(__VA_ARGS__)

#define	vrgather_vx_f16mf4(...) __riscv_vrgather_vx_f16mf4(__VA_ARGS__)

#define	vrgather_vx_f16mf4_m(...) __riscv_vrgather_vx_f16mf4_tumu(__VA_ARGS__)

#define	vrgather_vx_f32m1(...) __riscv_vrgather_vx_f32m1(__VA_ARGS__)

#define	vrgather_vx_f32m1_m(...) __riscv_vrgather_vx_f32m1_tumu(__VA_ARGS__)

#define	vrgather_vx_f32m2(...) __riscv_vrgather_vx_f32m2(__VA_ARGS__)

#define	vrgather_vx_f32m2_m(...) __riscv_vrgather_vx_f32m2_tumu(__VA_ARGS__)

#define	vrgather_vx_f32m4(...) __riscv_vrgather_vx_f32m4(__VA_ARGS__)

#define	vrgather_vx_f32m4_m(...) __riscv_vrgather_vx_f32m4_tumu(__VA_ARGS__)

#define	vrgather_vx_f32m8(...) __riscv_vrgather_vx_f32m8(__VA_ARGS__)

#define	vrgather_vx_f32m8_m(...) __riscv_vrgather_vx_f32m8_tumu(__VA_ARGS__)

#define	vrgather_vx_f32mf2(...) __riscv_vrgather_vx_f32mf2(__VA_ARGS__)

#define	vrgather_vx_f32mf2_m(...) __riscv_vrgather_vx_f32mf2_tumu(__VA_ARGS__)

#define	vrgather_vx_f64m1(...) __riscv_vrgather_vx_f64m1(__VA_ARGS__)

#define	vrgather_vx_f64m1_m(...) __riscv_vrgather_vx_f64m1_tumu(__VA_ARGS__)

#define	vrgather_vx_f64m2(...) __riscv_vrgather_vx_f64m2(__VA_ARGS__)

#define	vrgather_vx_f64m2_m(...) __riscv_vrgather_vx_f64m2_tumu(__VA_ARGS__)

#define	vrgather_vx_f64m4(...) __riscv_vrgather_vx_f64m4(__VA_ARGS__)

#define	vrgather_vx_f64m4_m(...) __riscv_vrgather_vx_f64m4_tumu(__VA_ARGS__)

#define	vrgather_vx_f64m8(...) __riscv_vrgather_vx_f64m8(__VA_ARGS__)

#define	vrgather_vx_f64m8_m(...) __riscv_vrgather_vx_f64m8_tumu(__VA_ARGS__)

#define	vrgather_vx_i16m1(...) __riscv_vrgather_vx_i16m1(__VA_ARGS__)

#define	vrgather_vx_i16m1_m(...) __riscv_vrgather_vx_i16m1_tumu(__VA_ARGS__)

#define	vrgather_vx_i16m2(...) __riscv_vrgather_vx_i16m2(__VA_ARGS__)

#define	vrgather_vx_i16m2_m(...) __riscv_vrgather_vx_i16m2_tumu(__VA_ARGS__)

#define	vrgather_vx_i16m4(...) __riscv_vrgather_vx_i16m4(__VA_ARGS__)

#define	vrgather_vx_i16m4_m(...) __riscv_vrgather_vx_i16m4_tumu(__VA_ARGS__)

#define	vrgather_vx_i16m8(...) __riscv_vrgather_vx_i16m8(__VA_ARGS__)

#define	vrgather_vx_i16m8_m(...) __riscv_vrgather_vx_i16m8_tumu(__VA_ARGS__)

#define	vrgather_vx_i16mf2(...) __riscv_vrgather_vx_i16mf2(__VA_ARGS__)

#define	vrgather_vx_i16mf2_m(...) __riscv_vrgather_vx_i16mf2_tumu(__VA_ARGS__)

#define	vrgather_vx_i16mf4(...) __riscv_vrgather_vx_i16mf4(__VA_ARGS__)

#define	vrgather_vx_i16mf4_m(...) __riscv_vrgather_vx_i16mf4_tumu(__VA_ARGS__)

#define	vrgather_vx_i32m1(...) __riscv_vrgather_vx_i32m1(__VA_ARGS__)

#define	vrgather_vx_i32m1_m(...) __riscv_vrgather_vx_i32m1_tumu(__VA_ARGS__)

#define	vrgather_vx_i32m2(...) __riscv_vrgather_vx_i32m2(__VA_ARGS__)

#define	vrgather_vx_i32m2_m(...) __riscv_vrgather_vx_i32m2_tumu(__VA_ARGS__)

#define	vrgather_vx_i32m4(...) __riscv_vrgather_vx_i32m4(__VA_ARGS__)

#define	vrgather_vx_i32m4_m(...) __riscv_vrgather_vx_i32m4_tumu(__VA_ARGS__)

#define	vrgather_vx_i32m8(...) __riscv_vrgather_vx_i32m8(__VA_ARGS__)

#define	vrgather_vx_i32m8_m(...) __riscv_vrgather_vx_i32m8_tumu(__VA_ARGS__)

#define	vrgather_vx_i32mf2(...) __riscv_vrgather_vx_i32mf2(__VA_ARGS__)

#define	vrgather_vx_i32mf2_m(...) __riscv_vrgather_vx_i32mf2_tumu(__VA_ARGS__)

#define	vrgather_vx_i64m1(...) __riscv_vrgather_vx_i64m1(__VA_ARGS__)

#define	vrgather_vx_i64m1_m(...) __riscv_vrgather_vx_i64m1_tumu(__VA_ARGS__)

#define	vrgather_vx_i64m2(...) __riscv_vrgather_vx_i64m2(__VA_ARGS__)

#define	vrgather_vx_i64m2_m(...) __riscv_vrgather_vx_i64m2_tumu(__VA_ARGS__)

#define	vrgather_vx_i64m4(...) __riscv_vrgather_vx_i64m4(__VA_ARGS__)

#define	vrgather_vx_i64m4_m(...) __riscv_vrgather_vx_i64m4_tumu(__VA_ARGS__)

#define	vrgather_vx_i64m8(...) __riscv_vrgather_vx_i64m8(__VA_ARGS__)

#define	vrgather_vx_i64m8_m(...) __riscv_vrgather_vx_i64m8_tumu(__VA_ARGS__)

#define	vrgather_vx_i8m1(...) __riscv_vrgather_vx_i8m1(__VA_ARGS__)

#define	vrgather_vx_i8m1_m(...) __riscv_vrgather_vx_i8m1_tumu(__VA_ARGS__)

#define	vrgather_vx_i8m2(...) __riscv_vrgather_vx_i8m2(__VA_ARGS__)

#define	vrgather_vx_i8m2_m(...) __riscv_vrgather_vx_i8m2_tumu(__VA_ARGS__)

#define	vrgather_vx_i8m4(...) __riscv_vrgather_vx_i8m4(__VA_ARGS__)

#define	vrgather_vx_i8m4_m(...) __riscv_vrgather_vx_i8m4_tumu(__VA_ARGS__)

#define	vrgather_vx_i8m8(...) __riscv_vrgather_vx_i8m8(__VA_ARGS__)

#define	vrgather_vx_i8m8_m(...) __riscv_vrgather_vx_i8m8_tumu(__VA_ARGS__)

#define	vrgather_vx_i8mf2(...) __riscv_vrgather_vx_i8mf2(__VA_ARGS__)

#define	vrgather_vx_i8mf2_m(...) __riscv_vrgather_vx_i8mf2_tumu(__VA_ARGS__)

#define	vrgather_vx_i8mf4(...) __riscv_vrgather_vx_i8mf4(__VA_ARGS__)

#define	vrgather_vx_i8mf4_m(...) __riscv_vrgather_vx_i8mf4_tumu(__VA_ARGS__)

#define	vrgather_vx_i8mf8(...) __riscv_vrgather_vx_i8mf8(__VA_ARGS__)

#define	vrgather_vx_i8mf8_m(...) __riscv_vrgather_vx_i8mf8_tumu(__VA_ARGS__)

#define	vrgather_vx_u16m1(...) __riscv_vrgather_vx_u16m1(__VA_ARGS__)

#define	vrgather_vx_u16m1_m(...) __riscv_vrgather_vx_u16m1_tumu(__VA_ARGS__)

#define	vrgather_vx_u16m2(...) __riscv_vrgather_vx_u16m2(__VA_ARGS__)

#define	vrgather_vx_u16m2_m(...) __riscv_vrgather_vx_u16m2_tumu(__VA_ARGS__)

#define	vrgather_vx_u16m4(...) __riscv_vrgather_vx_u16m4(__VA_ARGS__)

#define	vrgather_vx_u16m4_m(...) __riscv_vrgather_vx_u16m4_tumu(__VA_ARGS__)

#define	vrgather_vx_u16m8(...) __riscv_vrgather_vx_u16m8(__VA_ARGS__)

#define	vrgather_vx_u16m8_m(...) __riscv_vrgather_vx_u16m8_tumu(__VA_ARGS__)

#define	vrgather_vx_u16mf2(...) __riscv_vrgather_vx_u16mf2(__VA_ARGS__)

#define	vrgather_vx_u16mf2_m(...) __riscv_vrgather_vx_u16mf2_tumu(__VA_ARGS__)

#define	vrgather_vx_u16mf4(...) __riscv_vrgather_vx_u16mf4(__VA_ARGS__)

#define	vrgather_vx_u16mf4_m(...) __riscv_vrgather_vx_u16mf4_tumu(__VA_ARGS__)

#define	vrgather_vx_u32m1(...) __riscv_vrgather_vx_u32m1(__VA_ARGS__)

#define	vrgather_vx_u32m1_m(...) __riscv_vrgather_vx_u32m1_tumu(__VA_ARGS__)

#define	vrgather_vx_u32m2(...) __riscv_vrgather_vx_u32m2(__VA_ARGS__)

#define	vrgather_vx_u32m2_m(...) __riscv_vrgather_vx_u32m2_tumu(__VA_ARGS__)

#define	vrgather_vx_u32m4(...) __riscv_vrgather_vx_u32m4(__VA_ARGS__)

#define	vrgather_vx_u32m4_m(...) __riscv_vrgather_vx_u32m4_tumu(__VA_ARGS__)

#define	vrgather_vx_u32m8(...) __riscv_vrgather_vx_u32m8(__VA_ARGS__)

#define	vrgather_vx_u32m8_m(...) __riscv_vrgather_vx_u32m8_tumu(__VA_ARGS__)

#define	vrgather_vx_u32mf2(...) __riscv_vrgather_vx_u32mf2(__VA_ARGS__)

#define	vrgather_vx_u32mf2_m(...) __riscv_vrgather_vx_u32mf2_tumu(__VA_ARGS__)

#define	vrgather_vx_u64m1(...) __riscv_vrgather_vx_u64m1(__VA_ARGS__)

#define	vrgather_vx_u64m1_m(...) __riscv_vrgather_vx_u64m1_tumu(__VA_ARGS__)

#define	vrgather_vx_u64m2(...) __riscv_vrgather_vx_u64m2(__VA_ARGS__)

#define	vrgather_vx_u64m2_m(...) __riscv_vrgather_vx_u64m2_tumu(__VA_ARGS__)

#define	vrgather_vx_u64m4(...) __riscv_vrgather_vx_u64m4(__VA_ARGS__)

#define	vrgather_vx_u64m4_m(...) __riscv_vrgather_vx_u64m4_tumu(__VA_ARGS__)

#define	vrgather_vx_u64m8(...) __riscv_vrgather_vx_u64m8(__VA_ARGS__)

#define	vrgather_vx_u64m8_m(...) __riscv_vrgather_vx_u64m8_tumu(__VA_ARGS__)

#define	vrgather_vx_u8m1(...) __riscv_vrgather_vx_u8m1(__VA_ARGS__)

#define	vrgather_vx_u8m1_m(...) __riscv_vrgather_vx_u8m1_tumu(__VA_ARGS__)

#define	vrgather_vx_u8m2(...) __riscv_vrgather_vx_u8m2(__VA_ARGS__)

#define	vrgather_vx_u8m2_m(...) __riscv_vrgather_vx_u8m2_tumu(__VA_ARGS__)

#define	vrgather_vx_u8m4(...) __riscv_vrgather_vx_u8m4(__VA_ARGS__)

#define	vrgather_vx_u8m4_m(...) __riscv_vrgather_vx_u8m4_tumu(__VA_ARGS__)

#define	vrgather_vx_u8m8(...) __riscv_vrgather_vx_u8m8(__VA_ARGS__)

#define	vrgather_vx_u8m8_m(...) __riscv_vrgather_vx_u8m8_tumu(__VA_ARGS__)

#define	vrgather_vx_u8mf2(...) __riscv_vrgather_vx_u8mf2(__VA_ARGS__)

#define	vrgather_vx_u8mf2_m(...) __riscv_vrgather_vx_u8mf2_tumu(__VA_ARGS__)

#define	vrgather_vx_u8mf4(...) __riscv_vrgather_vx_u8mf4(__VA_ARGS__)

#define	vrgather_vx_u8mf4_m(...) __riscv_vrgather_vx_u8mf4_tumu(__VA_ARGS__)

#define	vrgather_vx_u8mf8(...) __riscv_vrgather_vx_u8mf8(__VA_ARGS__)

#define	vrgather_vx_u8mf8_m(...) __riscv_vrgather_vx_u8mf8_tumu(__VA_ARGS__)

#define	vrgatherei16_vv_f16m1(...) __riscv_vrgatherei16_vv_f16m1(__VA_ARGS__)

#define	vrgatherei16_vv_f16m1_m(...) __riscv_vrgatherei16_vv_f16m1_tumu(__VA_ARGS__)

#define	vrgatherei16_vv_f16m2(...) __riscv_vrgatherei16_vv_f16m2(__VA_ARGS__)

#define	vrgatherei16_vv_f16m2_m(...) __riscv_vrgatherei16_vv_f16m2_tumu(__VA_ARGS__)

#define	vrgatherei16_vv_f16m4(...) __riscv_vrgatherei16_vv_f16m4(__VA_ARGS__)

#define	vrgatherei16_vv_f16m4_m(...) __riscv_vrgatherei16_vv_f16m4_tumu(__VA_ARGS__)

#define	vrgatherei16_vv_f16m8(...) __riscv_vrgatherei16_vv_f16m8(__VA_ARGS__)

#define	vrgatherei16_vv_f16m8_m(...) __riscv_vrgatherei16_vv_f16m8_tumu(__VA_ARGS__)

#define	vrgatherei16_vv_f16mf2(...) __riscv_vrgatherei16_vv_f16mf2(__VA_ARGS__)

#define	vrgatherei16_vv_f16mf2_m(...) __riscv_vrgatherei16_vv_f16mf2_tumu(__VA_ARGS__)

#define	vrgatherei16_vv_f16mf4(...) __riscv_vrgatherei16_vv_f16mf4(__VA_ARGS__)

#define	vrgatherei16_vv_f16mf4_m(...) __riscv_vrgatherei16_vv_f16mf4_tumu(__VA_ARGS__)

#define	vrgatherei16_vv_f32m1(...) __riscv_vrgatherei16_vv_f32m1(__VA_ARGS__)

#define	vrgatherei16_vv_f32m1_m(...) __riscv_vrgatherei16_vv_f32m1_tumu(__VA_ARGS__)

#define	vrgatherei16_vv_f32m2(...) __riscv_vrgatherei16_vv_f32m2(__VA_ARGS__)

#define	vrgatherei16_vv_f32m2_m(...) __riscv_vrgatherei16_vv_f32m2_tumu(__VA_ARGS__)

#define	vrgatherei16_vv_f32m4(...) __riscv_vrgatherei16_vv_f32m4(__VA_ARGS__)

#define	vrgatherei16_vv_f32m4_m(...) __riscv_vrgatherei16_vv_f32m4_tumu(__VA_ARGS__)

#define	vrgatherei16_vv_f32m8(...) __riscv_vrgatherei16_vv_f32m8(__VA_ARGS__)

#define	vrgatherei16_vv_f32m8_m(...) __riscv_vrgatherei16_vv_f32m8_tumu(__VA_ARGS__)

#define	vrgatherei16_vv_f32mf2(...) __riscv_vrgatherei16_vv_f32mf2(__VA_ARGS__)

#define	vrgatherei16_vv_f32mf2_m(...) __riscv_vrgatherei16_vv_f32mf2_tumu(__VA_ARGS__)

#define	vrgatherei16_vv_f64m1(...) __riscv_vrgatherei16_vv_f64m1(__VA_ARGS__)

#define	vrgatherei16_vv_f64m1_m(...) __riscv_vrgatherei16_vv_f64m1_tumu(__VA_ARGS__)

#define	vrgatherei16_vv_f64m2(...) __riscv_vrgatherei16_vv_f64m2(__VA_ARGS__)

#define	vrgatherei16_vv_f64m2_m(...) __riscv_vrgatherei16_vv_f64m2_tumu(__VA_ARGS__)

#define	vrgatherei16_vv_f64m4(...) __riscv_vrgatherei16_vv_f64m4(__VA_ARGS__)

#define	vrgatherei16_vv_f64m4_m(...) __riscv_vrgatherei16_vv_f64m4_tumu(__VA_ARGS__)

#define	vrgatherei16_vv_f64m8(...) __riscv_vrgatherei16_vv_f64m8(__VA_ARGS__)

#define	vrgatherei16_vv_f64m8_m(...) __riscv_vrgatherei16_vv_f64m8_tumu(__VA_ARGS__)

#define	vrgatherei16_vv_i16m1(...) __riscv_vrgatherei16_vv_i16m1(__VA_ARGS__)

#define	vrgatherei16_vv_i16m1_m(...) __riscv_vrgatherei16_vv_i16m1_tumu(__VA_ARGS__)

#define	vrgatherei16_vv_i16m2(...) __riscv_vrgatherei16_vv_i16m2(__VA_ARGS__)

#define	vrgatherei16_vv_i16m2_m(...) __riscv_vrgatherei16_vv_i16m2_tumu(__VA_ARGS__)

#define	vrgatherei16_vv_i16m4(...) __riscv_vrgatherei16_vv_i16m4(__VA_ARGS__)

#define	vrgatherei16_vv_i16m4_m(...) __riscv_vrgatherei16_vv_i16m4_tumu(__VA_ARGS__)

#define	vrgatherei16_vv_i16m8(...) __riscv_vrgatherei16_vv_i16m8(__VA_ARGS__)

#define	vrgatherei16_vv_i16m8_m(...) __riscv_vrgatherei16_vv_i16m8_tumu(__VA_ARGS__)

#define	vrgatherei16_vv_i16mf2(...) __riscv_vrgatherei16_vv_i16mf2(__VA_ARGS__)

#define	vrgatherei16_vv_i16mf2_m(...) __riscv_vrgatherei16_vv_i16mf2_tumu(__VA_ARGS__)

#define	vrgatherei16_vv_i16mf4(...) __riscv_vrgatherei16_vv_i16mf4(__VA_ARGS__)

#define	vrgatherei16_vv_i16mf4_m(...) __riscv_vrgatherei16_vv_i16mf4_tumu(__VA_ARGS__)

#define	vrgatherei16_vv_i32m1(...) __riscv_vrgatherei16_vv_i32m1(__VA_ARGS__)

#define	vrgatherei16_vv_i32m1_m(...) __riscv_vrgatherei16_vv_i32m1_tumu(__VA_ARGS__)

#define	vrgatherei16_vv_i32m2(...) __riscv_vrgatherei16_vv_i32m2(__VA_ARGS__)

#define	vrgatherei16_vv_i32m2_m(...) __riscv_vrgatherei16_vv_i32m2_tumu(__VA_ARGS__)

#define	vrgatherei16_vv_i32m4(...) __riscv_vrgatherei16_vv_i32m4(__VA_ARGS__)

#define	vrgatherei16_vv_i32m4_m(...) __riscv_vrgatherei16_vv_i32m4_tumu(__VA_ARGS__)

#define	vrgatherei16_vv_i32m8(...) __riscv_vrgatherei16_vv_i32m8(__VA_ARGS__)

#define	vrgatherei16_vv_i32m8_m(...) __riscv_vrgatherei16_vv_i32m8_tumu(__VA_ARGS__)

#define	vrgatherei16_vv_i32mf2(...) __riscv_vrgatherei16_vv_i32mf2(__VA_ARGS__)

#define	vrgatherei16_vv_i32mf2_m(...) __riscv_vrgatherei16_vv_i32mf2_tumu(__VA_ARGS__)

#define	vrgatherei16_vv_i64m1(...) __riscv_vrgatherei16_vv_i64m1(__VA_ARGS__)

#define	vrgatherei16_vv_i64m1_m(...) __riscv_vrgatherei16_vv_i64m1_tumu(__VA_ARGS__)

#define	vrgatherei16_vv_i64m2(...) __riscv_vrgatherei16_vv_i64m2(__VA_ARGS__)

#define	vrgatherei16_vv_i64m2_m(...) __riscv_vrgatherei16_vv_i64m2_tumu(__VA_ARGS__)

#define	vrgatherei16_vv_i64m4(...) __riscv_vrgatherei16_vv_i64m4(__VA_ARGS__)

#define	vrgatherei16_vv_i64m4_m(...) __riscv_vrgatherei16_vv_i64m4_tumu(__VA_ARGS__)

#define	vrgatherei16_vv_i64m8(...) __riscv_vrgatherei16_vv_i64m8(__VA_ARGS__)

#define	vrgatherei16_vv_i64m8_m(...) __riscv_vrgatherei16_vv_i64m8_tumu(__VA_ARGS__)

#define	vrgatherei16_vv_i8m1(...) __riscv_vrgatherei16_vv_i8m1(__VA_ARGS__)

#define	vrgatherei16_vv_i8m1_m(...) __riscv_vrgatherei16_vv_i8m1_tumu(__VA_ARGS__)

#define	vrgatherei16_vv_i8m2(...) __riscv_vrgatherei16_vv_i8m2(__VA_ARGS__)

#define	vrgatherei16_vv_i8m2_m(...) __riscv_vrgatherei16_vv_i8m2_tumu(__VA_ARGS__)

#define	vrgatherei16_vv_i8m4(...) __riscv_vrgatherei16_vv_i8m4(__VA_ARGS__)

#define	vrgatherei16_vv_i8m4_m(...) __riscv_vrgatherei16_vv_i8m4_tumu(__VA_ARGS__)

#define	vrgatherei16_vv_i8mf2(...) __riscv_vrgatherei16_vv_i8mf2(__VA_ARGS__)

#define	vrgatherei16_vv_i8mf2_m(...) __riscv_vrgatherei16_vv_i8mf2_tumu(__VA_ARGS__)

#define	vrgatherei16_vv_i8mf4(...) __riscv_vrgatherei16_vv_i8mf4(__VA_ARGS__)

#define	vrgatherei16_vv_i8mf4_m(...) __riscv_vrgatherei16_vv_i8mf4_tumu(__VA_ARGS__)

#define	vrgatherei16_vv_i8mf8(...) __riscv_vrgatherei16_vv_i8mf8(__VA_ARGS__)

#define	vrgatherei16_vv_i8mf8_m(...) __riscv_vrgatherei16_vv_i8mf8_tumu(__VA_ARGS__)

#define	vrgatherei16_vv_u16m1(...) __riscv_vrgatherei16_vv_u16m1(__VA_ARGS__)

#define	vrgatherei16_vv_u16m1_m(...) __riscv_vrgatherei16_vv_u16m1_tumu(__VA_ARGS__)

#define	vrgatherei16_vv_u16m2(...) __riscv_vrgatherei16_vv_u16m2(__VA_ARGS__)

#define	vrgatherei16_vv_u16m2_m(...) __riscv_vrgatherei16_vv_u16m2_tumu(__VA_ARGS__)

#define	vrgatherei16_vv_u16m4(...) __riscv_vrgatherei16_vv_u16m4(__VA_ARGS__)

#define	vrgatherei16_vv_u16m4_m(...) __riscv_vrgatherei16_vv_u16m4_tumu(__VA_ARGS__)

#define	vrgatherei16_vv_u16m8(...) __riscv_vrgatherei16_vv_u16m8(__VA_ARGS__)

#define	vrgatherei16_vv_u16m8_m(...) __riscv_vrgatherei16_vv_u16m8_tumu(__VA_ARGS__)

#define	vrgatherei16_vv_u16mf2(...) __riscv_vrgatherei16_vv_u16mf2(__VA_ARGS__)

#define	vrgatherei16_vv_u16mf2_m(...) __riscv_vrgatherei16_vv_u16mf2_tumu(__VA_ARGS__)

#define	vrgatherei16_vv_u16mf4(...) __riscv_vrgatherei16_vv_u16mf4(__VA_ARGS__)

#define	vrgatherei16_vv_u16mf4_m(...) __riscv_vrgatherei16_vv_u16mf4_tumu(__VA_ARGS__)

#define	vrgatherei16_vv_u32m1(...) __riscv_vrgatherei16_vv_u32m1(__VA_ARGS__)

#define	vrgatherei16_vv_u32m1_m(...) __riscv_vrgatherei16_vv_u32m1_tumu(__VA_ARGS__)

#define	vrgatherei16_vv_u32m2(...) __riscv_vrgatherei16_vv_u32m2(__VA_ARGS__)

#define	vrgatherei16_vv_u32m2_m(...) __riscv_vrgatherei16_vv_u32m2_tumu(__VA_ARGS__)

#define	vrgatherei16_vv_u32m4(...) __riscv_vrgatherei16_vv_u32m4(__VA_ARGS__)

#define	vrgatherei16_vv_u32m4_m(...) __riscv_vrgatherei16_vv_u32m4_tumu(__VA_ARGS__)

#define	vrgatherei16_vv_u32m8(...) __riscv_vrgatherei16_vv_u32m8(__VA_ARGS__)

#define	vrgatherei16_vv_u32m8_m(...) __riscv_vrgatherei16_vv_u32m8_tumu(__VA_ARGS__)

#define	vrgatherei16_vv_u32mf2(...) __riscv_vrgatherei16_vv_u32mf2(__VA_ARGS__)

#define	vrgatherei16_vv_u32mf2_m(...) __riscv_vrgatherei16_vv_u32mf2_tumu(__VA_ARGS__)

#define	vrgatherei16_vv_u64m1(...) __riscv_vrgatherei16_vv_u64m1(__VA_ARGS__)

#define	vrgatherei16_vv_u64m1_m(...) __riscv_vrgatherei16_vv_u64m1_tumu(__VA_ARGS__)

#define	vrgatherei16_vv_u64m2(...) __riscv_vrgatherei16_vv_u64m2(__VA_ARGS__)

#define	vrgatherei16_vv_u64m2_m(...) __riscv_vrgatherei16_vv_u64m2_tumu(__VA_ARGS__)

#define	vrgatherei16_vv_u64m4(...) __riscv_vrgatherei16_vv_u64m4(__VA_ARGS__)

#define	vrgatherei16_vv_u64m4_m(...) __riscv_vrgatherei16_vv_u64m4_tumu(__VA_ARGS__)

#define	vrgatherei16_vv_u64m8(...) __riscv_vrgatherei16_vv_u64m8(__VA_ARGS__)

#define	vrgatherei16_vv_u64m8_m(...) __riscv_vrgatherei16_vv_u64m8_tumu(__VA_ARGS__)

#define	vrgatherei16_vv_u8m1(...) __riscv_vrgatherei16_vv_u8m1(__VA_ARGS__)

#define	vrgatherei16_vv_u8m1_m(...) __riscv_vrgatherei16_vv_u8m1_tumu(__VA_ARGS__)

#define	vrgatherei16_vv_u8m2(...) __riscv_vrgatherei16_vv_u8m2(__VA_ARGS__)

#define	vrgatherei16_vv_u8m2_m(...) __riscv_vrgatherei16_vv_u8m2_tumu(__VA_ARGS__)

#define	vrgatherei16_vv_u8m4(...) __riscv_vrgatherei16_vv_u8m4(__VA_ARGS__)

#define	vrgatherei16_vv_u8m4_m(...) __riscv_vrgatherei16_vv_u8m4_tumu(__VA_ARGS__)

#define	vrgatherei16_vv_u8mf2(...) __riscv_vrgatherei16_vv_u8mf2(__VA_ARGS__)

#define	vrgatherei16_vv_u8mf2_m(...) __riscv_vrgatherei16_vv_u8mf2_tumu(__VA_ARGS__)

#define	vrgatherei16_vv_u8mf4(...) __riscv_vrgatherei16_vv_u8mf4(__VA_ARGS__)

#define	vrgatherei16_vv_u8mf4_m(...) __riscv_vrgatherei16_vv_u8mf4_tumu(__VA_ARGS__)

#define	vrgatherei16_vv_u8mf8(...) __riscv_vrgatherei16_vv_u8mf8(__VA_ARGS__)

#define	vrgatherei16_vv_u8mf8_m(...) __riscv_vrgatherei16_vv_u8mf8_tumu(__VA_ARGS__)

#define	vrsub_vx_i16m1(...) __riscv_vrsub_vx_i16m1(__VA_ARGS__)

#define	vrsub_vx_i16m1_m(...) __riscv_vrsub_vx_i16m1_tumu(__VA_ARGS__)

#define	vrsub_vx_i16m2(...) __riscv_vrsub_vx_i16m2(__VA_ARGS__)

#define	vrsub_vx_i16m2_m(...) __riscv_vrsub_vx_i16m2_tumu(__VA_ARGS__)

#define	vrsub_vx_i16m4(...) __riscv_vrsub_vx_i16m4(__VA_ARGS__)

#define	vrsub_vx_i16m4_m(...) __riscv_vrsub_vx_i16m4_tumu(__VA_ARGS__)

#define	vrsub_vx_i16m8(...) __riscv_vrsub_vx_i16m8(__VA_ARGS__)

#define	vrsub_vx_i16m8_m(...) __riscv_vrsub_vx_i16m8_tumu(__VA_ARGS__)

#define	vrsub_vx_i16mf2(...) __riscv_vrsub_vx_i16mf2(__VA_ARGS__)

#define	vrsub_vx_i16mf2_m(...) __riscv_vrsub_vx_i16mf2_tumu(__VA_ARGS__)

#define	vrsub_vx_i16mf4(...) __riscv_vrsub_vx_i16mf4(__VA_ARGS__)

#define	vrsub_vx_i16mf4_m(...) __riscv_vrsub_vx_i16mf4_tumu(__VA_ARGS__)

#define	vrsub_vx_i32m1(...) __riscv_vrsub_vx_i32m1(__VA_ARGS__)

#define	vrsub_vx_i32m1_m(...) __riscv_vrsub_vx_i32m1_tumu(__VA_ARGS__)

#define	vrsub_vx_i32m2(...) __riscv_vrsub_vx_i32m2(__VA_ARGS__)

#define	vrsub_vx_i32m2_m(...) __riscv_vrsub_vx_i32m2_tumu(__VA_ARGS__)

#define	vrsub_vx_i32m4(...) __riscv_vrsub_vx_i32m4(__VA_ARGS__)

#define	vrsub_vx_i32m4_m(...) __riscv_vrsub_vx_i32m4_tumu(__VA_ARGS__)

#define	vrsub_vx_i32m8(...) __riscv_vrsub_vx_i32m8(__VA_ARGS__)

#define	vrsub_vx_i32m8_m(...) __riscv_vrsub_vx_i32m8_tumu(__VA_ARGS__)

#define	vrsub_vx_i32mf2(...) __riscv_vrsub_vx_i32mf2(__VA_ARGS__)

#define	vrsub_vx_i32mf2_m(...) __riscv_vrsub_vx_i32mf2_tumu(__VA_ARGS__)

#define	vrsub_vx_i64m1(...) __riscv_vrsub_vx_i64m1(__VA_ARGS__)

#define	vrsub_vx_i64m1_m(...) __riscv_vrsub_vx_i64m1_tumu(__VA_ARGS__)

#define	vrsub_vx_i64m2(...) __riscv_vrsub_vx_i64m2(__VA_ARGS__)

#define	vrsub_vx_i64m2_m(...) __riscv_vrsub_vx_i64m2_tumu(__VA_ARGS__)

#define	vrsub_vx_i64m4(...) __riscv_vrsub_vx_i64m4(__VA_ARGS__)

#define	vrsub_vx_i64m4_m(...) __riscv_vrsub_vx_i64m4_tumu(__VA_ARGS__)

#define	vrsub_vx_i64m8(...) __riscv_vrsub_vx_i64m8(__VA_ARGS__)

#define	vrsub_vx_i64m8_m(...) __riscv_vrsub_vx_i64m8_tumu(__VA_ARGS__)

#define	vrsub_vx_i8m1(...) __riscv_vrsub_vx_i8m1(__VA_ARGS__)

#define	vrsub_vx_i8m1_m(...) __riscv_vrsub_vx_i8m1_tumu(__VA_ARGS__)

#define	vrsub_vx_i8m2(...) __riscv_vrsub_vx_i8m2(__VA_ARGS__)

#define	vrsub_vx_i8m2_m(...) __riscv_vrsub_vx_i8m2_tumu(__VA_ARGS__)

#define	vrsub_vx_i8m4(...) __riscv_vrsub_vx_i8m4(__VA_ARGS__)

#define	vrsub_vx_i8m4_m(...) __riscv_vrsub_vx_i8m4_tumu(__VA_ARGS__)

#define	vrsub_vx_i8m8(...) __riscv_vrsub_vx_i8m8(__VA_ARGS__)

#define	vrsub_vx_i8m8_m(...) __riscv_vrsub_vx_i8m8_tumu(__VA_ARGS__)

#define	vrsub_vx_i8mf2(...) __riscv_vrsub_vx_i8mf2(__VA_ARGS__)

#define	vrsub_vx_i8mf2_m(...) __riscv_vrsub_vx_i8mf2_tumu(__VA_ARGS__)

#define	vrsub_vx_i8mf4(...) __riscv_vrsub_vx_i8mf4(__VA_ARGS__)

#define	vrsub_vx_i8mf4_m(...) __riscv_vrsub_vx_i8mf4_tumu(__VA_ARGS__)

#define	vrsub_vx_i8mf8(...) __riscv_vrsub_vx_i8mf8(__VA_ARGS__)

#define	vrsub_vx_i8mf8_m(...) __riscv_vrsub_vx_i8mf8_tumu(__VA_ARGS__)

#define	vrsub_vx_u16m1(...) __riscv_vrsub_vx_u16m1(__VA_ARGS__)

#define	vrsub_vx_u16m1_m(...) __riscv_vrsub_vx_u16m1_tumu(__VA_ARGS__)

#define	vrsub_vx_u16m2(...) __riscv_vrsub_vx_u16m2(__VA_ARGS__)

#define	vrsub_vx_u16m2_m(...) __riscv_vrsub_vx_u16m2_tumu(__VA_ARGS__)

#define	vrsub_vx_u16m4(...) __riscv_vrsub_vx_u16m4(__VA_ARGS__)

#define	vrsub_vx_u16m4_m(...) __riscv_vrsub_vx_u16m4_tumu(__VA_ARGS__)

#define	vrsub_vx_u16m8(...) __riscv_vrsub_vx_u16m8(__VA_ARGS__)

#define	vrsub_vx_u16m8_m(...) __riscv_vrsub_vx_u16m8_tumu(__VA_ARGS__)

#define	vrsub_vx_u16mf2(...) __riscv_vrsub_vx_u16mf2(__VA_ARGS__)

#define	vrsub_vx_u16mf2_m(...) __riscv_vrsub_vx_u16mf2_tumu(__VA_ARGS__)

#define	vrsub_vx_u16mf4(...) __riscv_vrsub_vx_u16mf4(__VA_ARGS__)

#define	vrsub_vx_u16mf4_m(...) __riscv_vrsub_vx_u16mf4_tumu(__VA_ARGS__)

#define	vrsub_vx_u32m1(...) __riscv_vrsub_vx_u32m1(__VA_ARGS__)

#define	vrsub_vx_u32m1_m(...) __riscv_vrsub_vx_u32m1_tumu(__VA_ARGS__)

#define	vrsub_vx_u32m2(...) __riscv_vrsub_vx_u32m2(__VA_ARGS__)

#define	vrsub_vx_u32m2_m(...) __riscv_vrsub_vx_u32m2_tumu(__VA_ARGS__)

#define	vrsub_vx_u32m4(...) __riscv_vrsub_vx_u32m4(__VA_ARGS__)

#define	vrsub_vx_u32m4_m(...) __riscv_vrsub_vx_u32m4_tumu(__VA_ARGS__)

#define	vrsub_vx_u32m8(...) __riscv_vrsub_vx_u32m8(__VA_ARGS__)

#define	vrsub_vx_u32m8_m(...) __riscv_vrsub_vx_u32m8_tumu(__VA_ARGS__)

#define	vrsub_vx_u32mf2(...) __riscv_vrsub_vx_u32mf2(__VA_ARGS__)

#define	vrsub_vx_u32mf2_m(...) __riscv_vrsub_vx_u32mf2_tumu(__VA_ARGS__)

#define	vrsub_vx_u64m1(...) __riscv_vrsub_vx_u64m1(__VA_ARGS__)

#define	vrsub_vx_u64m1_m(...) __riscv_vrsub_vx_u64m1_tumu(__VA_ARGS__)

#define	vrsub_vx_u64m2(...) __riscv_vrsub_vx_u64m2(__VA_ARGS__)

#define	vrsub_vx_u64m2_m(...) __riscv_vrsub_vx_u64m2_tumu(__VA_ARGS__)

#define	vrsub_vx_u64m4(...) __riscv_vrsub_vx_u64m4(__VA_ARGS__)

#define	vrsub_vx_u64m4_m(...) __riscv_vrsub_vx_u64m4_tumu(__VA_ARGS__)

#define	vrsub_vx_u64m8(...) __riscv_vrsub_vx_u64m8(__VA_ARGS__)

#define	vrsub_vx_u64m8_m(...) __riscv_vrsub_vx_u64m8_tumu(__VA_ARGS__)

#define	vrsub_vx_u8m1(...) __riscv_vrsub_vx_u8m1(__VA_ARGS__)

#define	vrsub_vx_u8m1_m(...) __riscv_vrsub_vx_u8m1_tumu(__VA_ARGS__)

#define	vrsub_vx_u8m2(...) __riscv_vrsub_vx_u8m2(__VA_ARGS__)

#define	vrsub_vx_u8m2_m(...) __riscv_vrsub_vx_u8m2_tumu(__VA_ARGS__)

#define	vrsub_vx_u8m4(...) __riscv_vrsub_vx_u8m4(__VA_ARGS__)

#define	vrsub_vx_u8m4_m(...) __riscv_vrsub_vx_u8m4_tumu(__VA_ARGS__)

#define	vrsub_vx_u8m8(...) __riscv_vrsub_vx_u8m8(__VA_ARGS__)

#define	vrsub_vx_u8m8_m(...) __riscv_vrsub_vx_u8m8_tumu(__VA_ARGS__)

#define	vrsub_vx_u8mf2(...) __riscv_vrsub_vx_u8mf2(__VA_ARGS__)

#define	vrsub_vx_u8mf2_m(...) __riscv_vrsub_vx_u8mf2_tumu(__VA_ARGS__)

#define	vrsub_vx_u8mf4(...) __riscv_vrsub_vx_u8mf4(__VA_ARGS__)

#define	vrsub_vx_u8mf4_m(...) __riscv_vrsub_vx_u8mf4_tumu(__VA_ARGS__)

#define	vrsub_vx_u8mf8(...) __riscv_vrsub_vx_u8mf8(__VA_ARGS__)

#define	vrsub_vx_u8mf8_m(...) __riscv_vrsub_vx_u8mf8_tumu(__VA_ARGS__)

#define	vsadd_vv_i16m1(...) __riscv_vsadd_vv_i16m1(__VA_ARGS__)

#define	vsadd_vv_i16m1_m(...) __riscv_vsadd_vv_i16m1_tumu(__VA_ARGS__)

#define	vsadd_vv_i16m2(...) __riscv_vsadd_vv_i16m2(__VA_ARGS__)

#define	vsadd_vv_i16m2_m(...) __riscv_vsadd_vv_i16m2_tumu(__VA_ARGS__)

#define	vsadd_vv_i16m4(...) __riscv_vsadd_vv_i16m4(__VA_ARGS__)

#define	vsadd_vv_i16m4_m(...) __riscv_vsadd_vv_i16m4_tumu(__VA_ARGS__)

#define	vsadd_vv_i16m8(...) __riscv_vsadd_vv_i16m8(__VA_ARGS__)

#define	vsadd_vv_i16m8_m(...) __riscv_vsadd_vv_i16m8_tumu(__VA_ARGS__)

#define	vsadd_vv_i16mf2(...) __riscv_vsadd_vv_i16mf2(__VA_ARGS__)

#define	vsadd_vv_i16mf2_m(...) __riscv_vsadd_vv_i16mf2_tumu(__VA_ARGS__)

#define	vsadd_vv_i16mf4(...) __riscv_vsadd_vv_i16mf4(__VA_ARGS__)

#define	vsadd_vv_i16mf4_m(...) __riscv_vsadd_vv_i16mf4_tumu(__VA_ARGS__)

#define	vsadd_vv_i32m1(...) __riscv_vsadd_vv_i32m1(__VA_ARGS__)

#define	vsadd_vv_i32m1_m(...) __riscv_vsadd_vv_i32m1_tumu(__VA_ARGS__)

#define	vsadd_vv_i32m2(...) __riscv_vsadd_vv_i32m2(__VA_ARGS__)

#define	vsadd_vv_i32m2_m(...) __riscv_vsadd_vv_i32m2_tumu(__VA_ARGS__)

#define	vsadd_vv_i32m4(...) __riscv_vsadd_vv_i32m4(__VA_ARGS__)

#define	vsadd_vv_i32m4_m(...) __riscv_vsadd_vv_i32m4_tumu(__VA_ARGS__)

#define	vsadd_vv_i32m8(...) __riscv_vsadd_vv_i32m8(__VA_ARGS__)

#define	vsadd_vv_i32m8_m(...) __riscv_vsadd_vv_i32m8_tumu(__VA_ARGS__)

#define	vsadd_vv_i32mf2(...) __riscv_vsadd_vv_i32mf2(__VA_ARGS__)

#define	vsadd_vv_i32mf2_m(...) __riscv_vsadd_vv_i32mf2_tumu(__VA_ARGS__)

#define	vsadd_vv_i64m1(...) __riscv_vsadd_vv_i64m1(__VA_ARGS__)

#define	vsadd_vv_i64m1_m(...) __riscv_vsadd_vv_i64m1_tumu(__VA_ARGS__)

#define	vsadd_vv_i64m2(...) __riscv_vsadd_vv_i64m2(__VA_ARGS__)

#define	vsadd_vv_i64m2_m(...) __riscv_vsadd_vv_i64m2_tumu(__VA_ARGS__)

#define	vsadd_vv_i64m4(...) __riscv_vsadd_vv_i64m4(__VA_ARGS__)

#define	vsadd_vv_i64m4_m(...) __riscv_vsadd_vv_i64m4_tumu(__VA_ARGS__)

#define	vsadd_vv_i64m8(...) __riscv_vsadd_vv_i64m8(__VA_ARGS__)

#define	vsadd_vv_i64m8_m(...) __riscv_vsadd_vv_i64m8_tumu(__VA_ARGS__)

#define	vsadd_vv_i8m1(...) __riscv_vsadd_vv_i8m1(__VA_ARGS__)

#define	vsadd_vv_i8m1_m(...) __riscv_vsadd_vv_i8m1_tumu(__VA_ARGS__)

#define	vsadd_vv_i8m2(...) __riscv_vsadd_vv_i8m2(__VA_ARGS__)

#define	vsadd_vv_i8m2_m(...) __riscv_vsadd_vv_i8m2_tumu(__VA_ARGS__)

#define	vsadd_vv_i8m4(...) __riscv_vsadd_vv_i8m4(__VA_ARGS__)

#define	vsadd_vv_i8m4_m(...) __riscv_vsadd_vv_i8m4_tumu(__VA_ARGS__)

#define	vsadd_vv_i8m8(...) __riscv_vsadd_vv_i8m8(__VA_ARGS__)

#define	vsadd_vv_i8m8_m(...) __riscv_vsadd_vv_i8m8_tumu(__VA_ARGS__)

#define	vsadd_vv_i8mf2(...) __riscv_vsadd_vv_i8mf2(__VA_ARGS__)

#define	vsadd_vv_i8mf2_m(...) __riscv_vsadd_vv_i8mf2_tumu(__VA_ARGS__)

#define	vsadd_vv_i8mf4(...) __riscv_vsadd_vv_i8mf4(__VA_ARGS__)

#define	vsadd_vv_i8mf4_m(...) __riscv_vsadd_vv_i8mf4_tumu(__VA_ARGS__)

#define	vsadd_vv_i8mf8(...) __riscv_vsadd_vv_i8mf8(__VA_ARGS__)

#define	vsadd_vv_i8mf8_m(...) __riscv_vsadd_vv_i8mf8_tumu(__VA_ARGS__)

#define	vsadd_vx_i16m1(...) __riscv_vsadd_vx_i16m1(__VA_ARGS__)

#define	vsadd_vx_i16m1_m(...) __riscv_vsadd_vx_i16m1_tumu(__VA_ARGS__)

#define	vsadd_vx_i16m2(...) __riscv_vsadd_vx_i16m2(__VA_ARGS__)

#define	vsadd_vx_i16m2_m(...) __riscv_vsadd_vx_i16m2_tumu(__VA_ARGS__)

#define	vsadd_vx_i16m4(...) __riscv_vsadd_vx_i16m4(__VA_ARGS__)

#define	vsadd_vx_i16m4_m(...) __riscv_vsadd_vx_i16m4_tumu(__VA_ARGS__)

#define	vsadd_vx_i16m8(...) __riscv_vsadd_vx_i16m8(__VA_ARGS__)

#define	vsadd_vx_i16m8_m(...) __riscv_vsadd_vx_i16m8_tumu(__VA_ARGS__)

#define	vsadd_vx_i16mf2(...) __riscv_vsadd_vx_i16mf2(__VA_ARGS__)

#define	vsadd_vx_i16mf2_m(...) __riscv_vsadd_vx_i16mf2_tumu(__VA_ARGS__)

#define	vsadd_vx_i16mf4(...) __riscv_vsadd_vx_i16mf4(__VA_ARGS__)

#define	vsadd_vx_i16mf4_m(...) __riscv_vsadd_vx_i16mf4_tumu(__VA_ARGS__)

#define	vsadd_vx_i32m1(...) __riscv_vsadd_vx_i32m1(__VA_ARGS__)

#define	vsadd_vx_i32m1_m(...) __riscv_vsadd_vx_i32m1_tumu(__VA_ARGS__)

#define	vsadd_vx_i32m2(...) __riscv_vsadd_vx_i32m2(__VA_ARGS__)

#define	vsadd_vx_i32m2_m(...) __riscv_vsadd_vx_i32m2_tumu(__VA_ARGS__)

#define	vsadd_vx_i32m4(...) __riscv_vsadd_vx_i32m4(__VA_ARGS__)

#define	vsadd_vx_i32m4_m(...) __riscv_vsadd_vx_i32m4_tumu(__VA_ARGS__)

#define	vsadd_vx_i32m8(...) __riscv_vsadd_vx_i32m8(__VA_ARGS__)

#define	vsadd_vx_i32m8_m(...) __riscv_vsadd_vx_i32m8_tumu(__VA_ARGS__)

#define	vsadd_vx_i32mf2(...) __riscv_vsadd_vx_i32mf2(__VA_ARGS__)

#define	vsadd_vx_i32mf2_m(...) __riscv_vsadd_vx_i32mf2_tumu(__VA_ARGS__)

#define	vsadd_vx_i64m1(...) __riscv_vsadd_vx_i64m1(__VA_ARGS__)

#define	vsadd_vx_i64m1_m(...) __riscv_vsadd_vx_i64m1_tumu(__VA_ARGS__)

#define	vsadd_vx_i64m2(...) __riscv_vsadd_vx_i64m2(__VA_ARGS__)

#define	vsadd_vx_i64m2_m(...) __riscv_vsadd_vx_i64m2_tumu(__VA_ARGS__)

#define	vsadd_vx_i64m4(...) __riscv_vsadd_vx_i64m4(__VA_ARGS__)

#define	vsadd_vx_i64m4_m(...) __riscv_vsadd_vx_i64m4_tumu(__VA_ARGS__)

#define	vsadd_vx_i64m8(...) __riscv_vsadd_vx_i64m8(__VA_ARGS__)

#define	vsadd_vx_i64m8_m(...) __riscv_vsadd_vx_i64m8_tumu(__VA_ARGS__)

#define	vsadd_vx_i8m1(...) __riscv_vsadd_vx_i8m1(__VA_ARGS__)

#define	vsadd_vx_i8m1_m(...) __riscv_vsadd_vx_i8m1_tumu(__VA_ARGS__)

#define	vsadd_vx_i8m2(...) __riscv_vsadd_vx_i8m2(__VA_ARGS__)

#define	vsadd_vx_i8m2_m(...) __riscv_vsadd_vx_i8m2_tumu(__VA_ARGS__)

#define	vsadd_vx_i8m4(...) __riscv_vsadd_vx_i8m4(__VA_ARGS__)

#define	vsadd_vx_i8m4_m(...) __riscv_vsadd_vx_i8m4_tumu(__VA_ARGS__)

#define	vsadd_vx_i8m8(...) __riscv_vsadd_vx_i8m8(__VA_ARGS__)

#define	vsadd_vx_i8m8_m(...) __riscv_vsadd_vx_i8m8_tumu(__VA_ARGS__)

#define	vsadd_vx_i8mf2(...) __riscv_vsadd_vx_i8mf2(__VA_ARGS__)

#define	vsadd_vx_i8mf2_m(...) __riscv_vsadd_vx_i8mf2_tumu(__VA_ARGS__)

#define	vsadd_vx_i8mf4(...) __riscv_vsadd_vx_i8mf4(__VA_ARGS__)

#define	vsadd_vx_i8mf4_m(...) __riscv_vsadd_vx_i8mf4_tumu(__VA_ARGS__)

#define	vsadd_vx_i8mf8(...) __riscv_vsadd_vx_i8mf8(__VA_ARGS__)

#define	vsadd_vx_i8mf8_m(...) __riscv_vsadd_vx_i8mf8_tumu(__VA_ARGS__)

#define	vsaddu_vv_u16m1(...) __riscv_vsaddu_vv_u16m1(__VA_ARGS__)

#define	vsaddu_vv_u16m1_m(...) __riscv_vsaddu_vv_u16m1_tumu(__VA_ARGS__)

#define	vsaddu_vv_u16m2(...) __riscv_vsaddu_vv_u16m2(__VA_ARGS__)

#define	vsaddu_vv_u16m2_m(...) __riscv_vsaddu_vv_u16m2_tumu(__VA_ARGS__)

#define	vsaddu_vv_u16m4(...) __riscv_vsaddu_vv_u16m4(__VA_ARGS__)

#define	vsaddu_vv_u16m4_m(...) __riscv_vsaddu_vv_u16m4_tumu(__VA_ARGS__)

#define	vsaddu_vv_u16m8(...) __riscv_vsaddu_vv_u16m8(__VA_ARGS__)

#define	vsaddu_vv_u16m8_m(...) __riscv_vsaddu_vv_u16m8_tumu(__VA_ARGS__)

#define	vsaddu_vv_u16mf2(...) __riscv_vsaddu_vv_u16mf2(__VA_ARGS__)

#define	vsaddu_vv_u16mf2_m(...) __riscv_vsaddu_vv_u16mf2_tumu(__VA_ARGS__)

#define	vsaddu_vv_u16mf4(...) __riscv_vsaddu_vv_u16mf4(__VA_ARGS__)

#define	vsaddu_vv_u16mf4_m(...) __riscv_vsaddu_vv_u16mf4_tumu(__VA_ARGS__)

#define	vsaddu_vv_u32m1(...) __riscv_vsaddu_vv_u32m1(__VA_ARGS__)

#define	vsaddu_vv_u32m1_m(...) __riscv_vsaddu_vv_u32m1_tumu(__VA_ARGS__)

#define	vsaddu_vv_u32m2(...) __riscv_vsaddu_vv_u32m2(__VA_ARGS__)

#define	vsaddu_vv_u32m2_m(...) __riscv_vsaddu_vv_u32m2_tumu(__VA_ARGS__)

#define	vsaddu_vv_u32m4(...) __riscv_vsaddu_vv_u32m4(__VA_ARGS__)

#define	vsaddu_vv_u32m4_m(...) __riscv_vsaddu_vv_u32m4_tumu(__VA_ARGS__)

#define	vsaddu_vv_u32m8(...) __riscv_vsaddu_vv_u32m8(__VA_ARGS__)

#define	vsaddu_vv_u32m8_m(...) __riscv_vsaddu_vv_u32m8_tumu(__VA_ARGS__)

#define	vsaddu_vv_u32mf2(...) __riscv_vsaddu_vv_u32mf2(__VA_ARGS__)

#define	vsaddu_vv_u32mf2_m(...) __riscv_vsaddu_vv_u32mf2_tumu(__VA_ARGS__)

#define	vsaddu_vv_u64m1(...) __riscv_vsaddu_vv_u64m1(__VA_ARGS__)

#define	vsaddu_vv_u64m1_m(...) __riscv_vsaddu_vv_u64m1_tumu(__VA_ARGS__)

#define	vsaddu_vv_u64m2(...) __riscv_vsaddu_vv_u64m2(__VA_ARGS__)

#define	vsaddu_vv_u64m2_m(...) __riscv_vsaddu_vv_u64m2_tumu(__VA_ARGS__)

#define	vsaddu_vv_u64m4(...) __riscv_vsaddu_vv_u64m4(__VA_ARGS__)

#define	vsaddu_vv_u64m4_m(...) __riscv_vsaddu_vv_u64m4_tumu(__VA_ARGS__)

#define	vsaddu_vv_u64m8(...) __riscv_vsaddu_vv_u64m8(__VA_ARGS__)

#define	vsaddu_vv_u64m8_m(...) __riscv_vsaddu_vv_u64m8_tumu(__VA_ARGS__)

#define	vsaddu_vv_u8m1(...) __riscv_vsaddu_vv_u8m1(__VA_ARGS__)

#define	vsaddu_vv_u8m1_m(...) __riscv_vsaddu_vv_u8m1_tumu(__VA_ARGS__)

#define	vsaddu_vv_u8m2(...) __riscv_vsaddu_vv_u8m2(__VA_ARGS__)

#define	vsaddu_vv_u8m2_m(...) __riscv_vsaddu_vv_u8m2_tumu(__VA_ARGS__)

#define	vsaddu_vv_u8m4(...) __riscv_vsaddu_vv_u8m4(__VA_ARGS__)

#define	vsaddu_vv_u8m4_m(...) __riscv_vsaddu_vv_u8m4_tumu(__VA_ARGS__)

#define	vsaddu_vv_u8m8(...) __riscv_vsaddu_vv_u8m8(__VA_ARGS__)

#define	vsaddu_vv_u8m8_m(...) __riscv_vsaddu_vv_u8m8_tumu(__VA_ARGS__)

#define	vsaddu_vv_u8mf2(...) __riscv_vsaddu_vv_u8mf2(__VA_ARGS__)

#define	vsaddu_vv_u8mf2_m(...) __riscv_vsaddu_vv_u8mf2_tumu(__VA_ARGS__)

#define	vsaddu_vv_u8mf4(...) __riscv_vsaddu_vv_u8mf4(__VA_ARGS__)

#define	vsaddu_vv_u8mf4_m(...) __riscv_vsaddu_vv_u8mf4_tumu(__VA_ARGS__)

#define	vsaddu_vv_u8mf8(...) __riscv_vsaddu_vv_u8mf8(__VA_ARGS__)

#define	vsaddu_vv_u8mf8_m(...) __riscv_vsaddu_vv_u8mf8_tumu(__VA_ARGS__)

#define	vsaddu_vx_u16m1(...) __riscv_vsaddu_vx_u16m1(__VA_ARGS__)

#define	vsaddu_vx_u16m1_m(...) __riscv_vsaddu_vx_u16m1_tumu(__VA_ARGS__)

#define	vsaddu_vx_u16m2(...) __riscv_vsaddu_vx_u16m2(__VA_ARGS__)

#define	vsaddu_vx_u16m2_m(...) __riscv_vsaddu_vx_u16m2_tumu(__VA_ARGS__)

#define	vsaddu_vx_u16m4(...) __riscv_vsaddu_vx_u16m4(__VA_ARGS__)

#define	vsaddu_vx_u16m4_m(...) __riscv_vsaddu_vx_u16m4_tumu(__VA_ARGS__)

#define	vsaddu_vx_u16m8(...) __riscv_vsaddu_vx_u16m8(__VA_ARGS__)

#define	vsaddu_vx_u16m8_m(...) __riscv_vsaddu_vx_u16m8_tumu(__VA_ARGS__)

#define	vsaddu_vx_u16mf2(...) __riscv_vsaddu_vx_u16mf2(__VA_ARGS__)

#define	vsaddu_vx_u16mf2_m(...) __riscv_vsaddu_vx_u16mf2_tumu(__VA_ARGS__)

#define	vsaddu_vx_u16mf4(...) __riscv_vsaddu_vx_u16mf4(__VA_ARGS__)

#define	vsaddu_vx_u16mf4_m(...) __riscv_vsaddu_vx_u16mf4_tumu(__VA_ARGS__)

#define	vsaddu_vx_u32m1(...) __riscv_vsaddu_vx_u32m1(__VA_ARGS__)

#define	vsaddu_vx_u32m1_m(...) __riscv_vsaddu_vx_u32m1_tumu(__VA_ARGS__)

#define	vsaddu_vx_u32m2(...) __riscv_vsaddu_vx_u32m2(__VA_ARGS__)

#define	vsaddu_vx_u32m2_m(...) __riscv_vsaddu_vx_u32m2_tumu(__VA_ARGS__)

#define	vsaddu_vx_u32m4(...) __riscv_vsaddu_vx_u32m4(__VA_ARGS__)

#define	vsaddu_vx_u32m4_m(...) __riscv_vsaddu_vx_u32m4_tumu(__VA_ARGS__)

#define	vsaddu_vx_u32m8(...) __riscv_vsaddu_vx_u32m8(__VA_ARGS__)

#define	vsaddu_vx_u32m8_m(...) __riscv_vsaddu_vx_u32m8_tumu(__VA_ARGS__)

#define	vsaddu_vx_u32mf2(...) __riscv_vsaddu_vx_u32mf2(__VA_ARGS__)

#define	vsaddu_vx_u32mf2_m(...) __riscv_vsaddu_vx_u32mf2_tumu(__VA_ARGS__)

#define	vsaddu_vx_u64m1(...) __riscv_vsaddu_vx_u64m1(__VA_ARGS__)

#define	vsaddu_vx_u64m1_m(...) __riscv_vsaddu_vx_u64m1_tumu(__VA_ARGS__)

#define	vsaddu_vx_u64m2(...) __riscv_vsaddu_vx_u64m2(__VA_ARGS__)

#define	vsaddu_vx_u64m2_m(...) __riscv_vsaddu_vx_u64m2_tumu(__VA_ARGS__)

#define	vsaddu_vx_u64m4(...) __riscv_vsaddu_vx_u64m4(__VA_ARGS__)

#define	vsaddu_vx_u64m4_m(...) __riscv_vsaddu_vx_u64m4_tumu(__VA_ARGS__)

#define	vsaddu_vx_u64m8(...) __riscv_vsaddu_vx_u64m8(__VA_ARGS__)

#define	vsaddu_vx_u64m8_m(...) __riscv_vsaddu_vx_u64m8_tumu(__VA_ARGS__)

#define	vsaddu_vx_u8m1(...) __riscv_vsaddu_vx_u8m1(__VA_ARGS__)

#define	vsaddu_vx_u8m1_m(...) __riscv_vsaddu_vx_u8m1_tumu(__VA_ARGS__)

#define	vsaddu_vx_u8m2(...) __riscv_vsaddu_vx_u8m2(__VA_ARGS__)

#define	vsaddu_vx_u8m2_m(...) __riscv_vsaddu_vx_u8m2_tumu(__VA_ARGS__)

#define	vsaddu_vx_u8m4(...) __riscv_vsaddu_vx_u8m4(__VA_ARGS__)

#define	vsaddu_vx_u8m4_m(...) __riscv_vsaddu_vx_u8m4_tumu(__VA_ARGS__)

#define	vsaddu_vx_u8m8(...) __riscv_vsaddu_vx_u8m8(__VA_ARGS__)

#define	vsaddu_vx_u8m8_m(...) __riscv_vsaddu_vx_u8m8_tumu(__VA_ARGS__)

#define	vsaddu_vx_u8mf2(...) __riscv_vsaddu_vx_u8mf2(__VA_ARGS__)

#define	vsaddu_vx_u8mf2_m(...) __riscv_vsaddu_vx_u8mf2_tumu(__VA_ARGS__)

#define	vsaddu_vx_u8mf4(...) __riscv_vsaddu_vx_u8mf4(__VA_ARGS__)

#define	vsaddu_vx_u8mf4_m(...) __riscv_vsaddu_vx_u8mf4_tumu(__VA_ARGS__)

#define	vsaddu_vx_u8mf8(...) __riscv_vsaddu_vx_u8mf8(__VA_ARGS__)

#define	vsaddu_vx_u8mf8_m(...) __riscv_vsaddu_vx_u8mf8_tumu(__VA_ARGS__)

#define	vsbc_vvm_i16m1(...) __riscv_vsbc_vvm_i16m1(__VA_ARGS__)

#define	vsbc_vvm_i16m2(...) __riscv_vsbc_vvm_i16m2(__VA_ARGS__)

#define	vsbc_vvm_i16m4(...) __riscv_vsbc_vvm_i16m4(__VA_ARGS__)

#define	vsbc_vvm_i16m8(...) __riscv_vsbc_vvm_i16m8(__VA_ARGS__)

#define	vsbc_vvm_i16mf2(...) __riscv_vsbc_vvm_i16mf2(__VA_ARGS__)

#define	vsbc_vvm_i16mf4(...) __riscv_vsbc_vvm_i16mf4(__VA_ARGS__)

#define	vsbc_vvm_i32m1(...) __riscv_vsbc_vvm_i32m1(__VA_ARGS__)

#define	vsbc_vvm_i32m2(...) __riscv_vsbc_vvm_i32m2(__VA_ARGS__)

#define	vsbc_vvm_i32m4(...) __riscv_vsbc_vvm_i32m4(__VA_ARGS__)

#define	vsbc_vvm_i32m8(...) __riscv_vsbc_vvm_i32m8(__VA_ARGS__)

#define	vsbc_vvm_i32mf2(...) __riscv_vsbc_vvm_i32mf2(__VA_ARGS__)

#define	vsbc_vvm_i64m1(...) __riscv_vsbc_vvm_i64m1(__VA_ARGS__)

#define	vsbc_vvm_i64m2(...) __riscv_vsbc_vvm_i64m2(__VA_ARGS__)

#define	vsbc_vvm_i64m4(...) __riscv_vsbc_vvm_i64m4(__VA_ARGS__)

#define	vsbc_vvm_i64m8(...) __riscv_vsbc_vvm_i64m8(__VA_ARGS__)

#define	vsbc_vvm_i8m1(...) __riscv_vsbc_vvm_i8m1(__VA_ARGS__)

#define	vsbc_vvm_i8m2(...) __riscv_vsbc_vvm_i8m2(__VA_ARGS__)

#define	vsbc_vvm_i8m4(...) __riscv_vsbc_vvm_i8m4(__VA_ARGS__)

#define	vsbc_vvm_i8m8(...) __riscv_vsbc_vvm_i8m8(__VA_ARGS__)

#define	vsbc_vvm_i8mf2(...) __riscv_vsbc_vvm_i8mf2(__VA_ARGS__)

#define	vsbc_vvm_i8mf4(...) __riscv_vsbc_vvm_i8mf4(__VA_ARGS__)

#define	vsbc_vvm_i8mf8(...) __riscv_vsbc_vvm_i8mf8(__VA_ARGS__)

#define	vsbc_vvm_u16m1(...) __riscv_vsbc_vvm_u16m1(__VA_ARGS__)

#define	vsbc_vvm_u16m2(...) __riscv_vsbc_vvm_u16m2(__VA_ARGS__)

#define	vsbc_vvm_u16m4(...) __riscv_vsbc_vvm_u16m4(__VA_ARGS__)

#define	vsbc_vvm_u16m8(...) __riscv_vsbc_vvm_u16m8(__VA_ARGS__)

#define	vsbc_vvm_u16mf2(...) __riscv_vsbc_vvm_u16mf2(__VA_ARGS__)

#define	vsbc_vvm_u16mf4(...) __riscv_vsbc_vvm_u16mf4(__VA_ARGS__)

#define	vsbc_vvm_u32m1(...) __riscv_vsbc_vvm_u32m1(__VA_ARGS__)

#define	vsbc_vvm_u32m2(...) __riscv_vsbc_vvm_u32m2(__VA_ARGS__)

#define	vsbc_vvm_u32m4(...) __riscv_vsbc_vvm_u32m4(__VA_ARGS__)

#define	vsbc_vvm_u32m8(...) __riscv_vsbc_vvm_u32m8(__VA_ARGS__)

#define	vsbc_vvm_u32mf2(...) __riscv_vsbc_vvm_u32mf2(__VA_ARGS__)

#define	vsbc_vvm_u64m1(...) __riscv_vsbc_vvm_u64m1(__VA_ARGS__)

#define	vsbc_vvm_u64m2(...) __riscv_vsbc_vvm_u64m2(__VA_ARGS__)

#define	vsbc_vvm_u64m4(...) __riscv_vsbc_vvm_u64m4(__VA_ARGS__)

#define	vsbc_vvm_u64m8(...) __riscv_vsbc_vvm_u64m8(__VA_ARGS__)

#define	vsbc_vvm_u8m1(...) __riscv_vsbc_vvm_u8m1(__VA_ARGS__)

#define	vsbc_vvm_u8m2(...) __riscv_vsbc_vvm_u8m2(__VA_ARGS__)

#define	vsbc_vvm_u8m4(...) __riscv_vsbc_vvm_u8m4(__VA_ARGS__)

#define	vsbc_vvm_u8m8(...) __riscv_vsbc_vvm_u8m8(__VA_ARGS__)

#define	vsbc_vvm_u8mf2(...) __riscv_vsbc_vvm_u8mf2(__VA_ARGS__)

#define	vsbc_vvm_u8mf4(...) __riscv_vsbc_vvm_u8mf4(__VA_ARGS__)

#define	vsbc_vvm_u8mf8(...) __riscv_vsbc_vvm_u8mf8(__VA_ARGS__)

#define	vsbc_vxm_i16m1(...) __riscv_vsbc_vxm_i16m1(__VA_ARGS__)

#define	vsbc_vxm_i16m2(...) __riscv_vsbc_vxm_i16m2(__VA_ARGS__)

#define	vsbc_vxm_i16m4(...) __riscv_vsbc_vxm_i16m4(__VA_ARGS__)

#define	vsbc_vxm_i16m8(...) __riscv_vsbc_vxm_i16m8(__VA_ARGS__)

#define	vsbc_vxm_i16mf2(...) __riscv_vsbc_vxm_i16mf2(__VA_ARGS__)

#define	vsbc_vxm_i16mf4(...) __riscv_vsbc_vxm_i16mf4(__VA_ARGS__)

#define	vsbc_vxm_i32m1(...) __riscv_vsbc_vxm_i32m1(__VA_ARGS__)

#define	vsbc_vxm_i32m2(...) __riscv_vsbc_vxm_i32m2(__VA_ARGS__)

#define	vsbc_vxm_i32m4(...) __riscv_vsbc_vxm_i32m4(__VA_ARGS__)

#define	vsbc_vxm_i32m8(...) __riscv_vsbc_vxm_i32m8(__VA_ARGS__)

#define	vsbc_vxm_i32mf2(...) __riscv_vsbc_vxm_i32mf2(__VA_ARGS__)

#define	vsbc_vxm_i64m1(...) __riscv_vsbc_vxm_i64m1(__VA_ARGS__)

#define	vsbc_vxm_i64m2(...) __riscv_vsbc_vxm_i64m2(__VA_ARGS__)

#define	vsbc_vxm_i64m4(...) __riscv_vsbc_vxm_i64m4(__VA_ARGS__)

#define	vsbc_vxm_i64m8(...) __riscv_vsbc_vxm_i64m8(__VA_ARGS__)

#define	vsbc_vxm_i8m1(...) __riscv_vsbc_vxm_i8m1(__VA_ARGS__)

#define	vsbc_vxm_i8m2(...) __riscv_vsbc_vxm_i8m2(__VA_ARGS__)

#define	vsbc_vxm_i8m4(...) __riscv_vsbc_vxm_i8m4(__VA_ARGS__)

#define	vsbc_vxm_i8m8(...) __riscv_vsbc_vxm_i8m8(__VA_ARGS__)

#define	vsbc_vxm_i8mf2(...) __riscv_vsbc_vxm_i8mf2(__VA_ARGS__)

#define	vsbc_vxm_i8mf4(...) __riscv_vsbc_vxm_i8mf4(__VA_ARGS__)

#define	vsbc_vxm_i8mf8(...) __riscv_vsbc_vxm_i8mf8(__VA_ARGS__)

#define	vsbc_vxm_u16m1(...) __riscv_vsbc_vxm_u16m1(__VA_ARGS__)

#define	vsbc_vxm_u16m2(...) __riscv_vsbc_vxm_u16m2(__VA_ARGS__)

#define	vsbc_vxm_u16m4(...) __riscv_vsbc_vxm_u16m4(__VA_ARGS__)

#define	vsbc_vxm_u16m8(...) __riscv_vsbc_vxm_u16m8(__VA_ARGS__)

#define	vsbc_vxm_u16mf2(...) __riscv_vsbc_vxm_u16mf2(__VA_ARGS__)

#define	vsbc_vxm_u16mf4(...) __riscv_vsbc_vxm_u16mf4(__VA_ARGS__)

#define	vsbc_vxm_u32m1(...) __riscv_vsbc_vxm_u32m1(__VA_ARGS__)

#define	vsbc_vxm_u32m2(...) __riscv_vsbc_vxm_u32m2(__VA_ARGS__)

#define	vsbc_vxm_u32m4(...) __riscv_vsbc_vxm_u32m4(__VA_ARGS__)

#define	vsbc_vxm_u32m8(...) __riscv_vsbc_vxm_u32m8(__VA_ARGS__)

#define	vsbc_vxm_u32mf2(...) __riscv_vsbc_vxm_u32mf2(__VA_ARGS__)

#define	vsbc_vxm_u64m1(...) __riscv_vsbc_vxm_u64m1(__VA_ARGS__)

#define	vsbc_vxm_u64m2(...) __riscv_vsbc_vxm_u64m2(__VA_ARGS__)

#define	vsbc_vxm_u64m4(...) __riscv_vsbc_vxm_u64m4(__VA_ARGS__)

#define	vsbc_vxm_u64m8(...) __riscv_vsbc_vxm_u64m8(__VA_ARGS__)

#define	vsbc_vxm_u8m1(...) __riscv_vsbc_vxm_u8m1(__VA_ARGS__)

#define	vsbc_vxm_u8m2(...) __riscv_vsbc_vxm_u8m2(__VA_ARGS__)

#define	vsbc_vxm_u8m4(...) __riscv_vsbc_vxm_u8m4(__VA_ARGS__)

#define	vsbc_vxm_u8m8(...) __riscv_vsbc_vxm_u8m8(__VA_ARGS__)

#define	vsbc_vxm_u8mf2(...) __riscv_vsbc_vxm_u8mf2(__VA_ARGS__)

#define	vsbc_vxm_u8mf4(...) __riscv_vsbc_vxm_u8mf4(__VA_ARGS__)

#define	vsbc_vxm_u8mf8(...) __riscv_vsbc_vxm_u8mf8(__VA_ARGS__)

#define	vse16_v_f16m1(...) __riscv_vse16_v_f16m1(__VA_ARGS__)

#define	vse16_v_f16m1_m(...) __riscv_vse16_v_f16m1_m(__VA_ARGS__)

#define	vse16_v_f16m2(...) __riscv_vse16_v_f16m2(__VA_ARGS__)

#define	vse16_v_f16m2_m(...) __riscv_vse16_v_f16m2_m(__VA_ARGS__)

#define	vse16_v_f16m4(...) __riscv_vse16_v_f16m4(__VA_ARGS__)

#define	vse16_v_f16m4_m(...) __riscv_vse16_v_f16m4_m(__VA_ARGS__)

#define	vse16_v_f16m8(...) __riscv_vse16_v_f16m8(__VA_ARGS__)

#define	vse16_v_f16m8_m(...) __riscv_vse16_v_f16m8_m(__VA_ARGS__)

#define	vse16_v_f16mf2(...) __riscv_vse16_v_f16mf2(__VA_ARGS__)

#define	vse16_v_f16mf2_m(...) __riscv_vse16_v_f16mf2_m(__VA_ARGS__)

#define	vse16_v_f16mf4(...) __riscv_vse16_v_f16mf4(__VA_ARGS__)

#define	vse16_v_f16mf4_m(...) __riscv_vse16_v_f16mf4_m(__VA_ARGS__)

#define	vse16_v_i16m1(...) __riscv_vse16_v_i16m1(__VA_ARGS__)

#define	vse16_v_i16m1_m(...) __riscv_vse16_v_i16m1_m(__VA_ARGS__)

#define	vse16_v_i16m2(...) __riscv_vse16_v_i16m2(__VA_ARGS__)

#define	vse16_v_i16m2_m(...) __riscv_vse16_v_i16m2_m(__VA_ARGS__)

#define	vse16_v_i16m4(...) __riscv_vse16_v_i16m4(__VA_ARGS__)

#define	vse16_v_i16m4_m(...) __riscv_vse16_v_i16m4_m(__VA_ARGS__)

#define	vse16_v_i16m8(...) __riscv_vse16_v_i16m8(__VA_ARGS__)

#define	vse16_v_i16m8_m(...) __riscv_vse16_v_i16m8_m(__VA_ARGS__)

#define	vse16_v_i16mf2(...) __riscv_vse16_v_i16mf2(__VA_ARGS__)

#define	vse16_v_i16mf2_m(...) __riscv_vse16_v_i16mf2_m(__VA_ARGS__)

#define	vse16_v_i16mf4(...) __riscv_vse16_v_i16mf4(__VA_ARGS__)

#define	vse16_v_i16mf4_m(...) __riscv_vse16_v_i16mf4_m(__VA_ARGS__)

#define	vse16_v_u16m1(...) __riscv_vse16_v_u16m1(__VA_ARGS__)

#define	vse16_v_u16m1_m(...) __riscv_vse16_v_u16m1_m(__VA_ARGS__)

#define	vse16_v_u16m2(...) __riscv_vse16_v_u16m2(__VA_ARGS__)

#define	vse16_v_u16m2_m(...) __riscv_vse16_v_u16m2_m(__VA_ARGS__)

#define	vse16_v_u16m4(...) __riscv_vse16_v_u16m4(__VA_ARGS__)

#define	vse16_v_u16m4_m(...) __riscv_vse16_v_u16m4_m(__VA_ARGS__)

#define	vse16_v_u16m8(...) __riscv_vse16_v_u16m8(__VA_ARGS__)

#define	vse16_v_u16m8_m(...) __riscv_vse16_v_u16m8_m(__VA_ARGS__)

#define	vse16_v_u16mf2(...) __riscv_vse16_v_u16mf2(__VA_ARGS__)

#define	vse16_v_u16mf2_m(...) __riscv_vse16_v_u16mf2_m(__VA_ARGS__)

#define	vse16_v_u16mf4(...) __riscv_vse16_v_u16mf4(__VA_ARGS__)

#define	vse16_v_u16mf4_m(...) __riscv_vse16_v_u16mf4_m(__VA_ARGS__)

#define	vse32_v_f32m1(...) __riscv_vse32_v_f32m1(__VA_ARGS__)

#define	vse32_v_f32m1_m(...) __riscv_vse32_v_f32m1_m(__VA_ARGS__)

#define	vse32_v_f32m2(...) __riscv_vse32_v_f32m2(__VA_ARGS__)

#define	vse32_v_f32m2_m(...) __riscv_vse32_v_f32m2_m(__VA_ARGS__)

#define	vse32_v_f32m4(...) __riscv_vse32_v_f32m4(__VA_ARGS__)

#define	vse32_v_f32m4_m(...) __riscv_vse32_v_f32m4_m(__VA_ARGS__)

#define	vse32_v_f32m8(...) __riscv_vse32_v_f32m8(__VA_ARGS__)

#define	vse32_v_f32m8_m(...) __riscv_vse32_v_f32m8_m(__VA_ARGS__)

#define	vse32_v_f32mf2(...) __riscv_vse32_v_f32mf2(__VA_ARGS__)

#define	vse32_v_f32mf2_m(...) __riscv_vse32_v_f32mf2_m(__VA_ARGS__)

#define	vse32_v_i32m1(...) __riscv_vse32_v_i32m1(__VA_ARGS__)

#define	vse32_v_i32m1_m(...) __riscv_vse32_v_i32m1_m(__VA_ARGS__)

#define	vse32_v_i32m2(...) __riscv_vse32_v_i32m2(__VA_ARGS__)

#define	vse32_v_i32m2_m(...) __riscv_vse32_v_i32m2_m(__VA_ARGS__)

#define	vse32_v_i32m4(...) __riscv_vse32_v_i32m4(__VA_ARGS__)

#define	vse32_v_i32m4_m(...) __riscv_vse32_v_i32m4_m(__VA_ARGS__)

#define	vse32_v_i32m8(...) __riscv_vse32_v_i32m8(__VA_ARGS__)

#define	vse32_v_i32m8_m(...) __riscv_vse32_v_i32m8_m(__VA_ARGS__)

#define	vse32_v_i32mf2(...) __riscv_vse32_v_i32mf2(__VA_ARGS__)

#define	vse32_v_i32mf2_m(...) __riscv_vse32_v_i32mf2_m(__VA_ARGS__)

#define	vse32_v_u32m1(...) __riscv_vse32_v_u32m1(__VA_ARGS__)

#define	vse32_v_u32m1_m(...) __riscv_vse32_v_u32m1_m(__VA_ARGS__)

#define	vse32_v_u32m2(...) __riscv_vse32_v_u32m2(__VA_ARGS__)

#define	vse32_v_u32m2_m(...) __riscv_vse32_v_u32m2_m(__VA_ARGS__)

#define	vse32_v_u32m4(...) __riscv_vse32_v_u32m4(__VA_ARGS__)

#define	vse32_v_u32m4_m(...) __riscv_vse32_v_u32m4_m(__VA_ARGS__)

#define	vse32_v_u32m8(...) __riscv_vse32_v_u32m8(__VA_ARGS__)

#define	vse32_v_u32m8_m(...) __riscv_vse32_v_u32m8_m(__VA_ARGS__)

#define	vse32_v_u32mf2(...) __riscv_vse32_v_u32mf2(__VA_ARGS__)

#define	vse32_v_u32mf2_m(...) __riscv_vse32_v_u32mf2_m(__VA_ARGS__)

#define	vse64_v_f64m1(...) __riscv_vse64_v_f64m1(__VA_ARGS__)

#define	vse64_v_f64m1_m(...) __riscv_vse64_v_f64m1_m(__VA_ARGS__)

#define	vse64_v_f64m2(...) __riscv_vse64_v_f64m2(__VA_ARGS__)

#define	vse64_v_f64m2_m(...) __riscv_vse64_v_f64m2_m(__VA_ARGS__)

#define	vse64_v_f64m4(...) __riscv_vse64_v_f64m4(__VA_ARGS__)

#define	vse64_v_f64m4_m(...) __riscv_vse64_v_f64m4_m(__VA_ARGS__)

#define	vse64_v_f64m8(...) __riscv_vse64_v_f64m8(__VA_ARGS__)

#define	vse64_v_f64m8_m(...) __riscv_vse64_v_f64m8_m(__VA_ARGS__)

#define	vse64_v_i64m1(...) __riscv_vse64_v_i64m1(__VA_ARGS__)

#define	vse64_v_i64m1_m(...) __riscv_vse64_v_i64m1_m(__VA_ARGS__)

#define	vse64_v_i64m2(...) __riscv_vse64_v_i64m2(__VA_ARGS__)

#define	vse64_v_i64m2_m(...) __riscv_vse64_v_i64m2_m(__VA_ARGS__)

#define	vse64_v_i64m4(...) __riscv_vse64_v_i64m4(__VA_ARGS__)

#define	vse64_v_i64m4_m(...) __riscv_vse64_v_i64m4_m(__VA_ARGS__)

#define	vse64_v_i64m8(...) __riscv_vse64_v_i64m8(__VA_ARGS__)

#define	vse64_v_i64m8_m(...) __riscv_vse64_v_i64m8_m(__VA_ARGS__)

#define	vse64_v_u64m1(...) __riscv_vse64_v_u64m1(__VA_ARGS__)

#define	vse64_v_u64m1_m(...) __riscv_vse64_v_u64m1_m(__VA_ARGS__)

#define	vse64_v_u64m2(...) __riscv_vse64_v_u64m2(__VA_ARGS__)

#define	vse64_v_u64m2_m(...) __riscv_vse64_v_u64m2_m(__VA_ARGS__)

#define	vse64_v_u64m4(...) __riscv_vse64_v_u64m4(__VA_ARGS__)

#define	vse64_v_u64m4_m(...) __riscv_vse64_v_u64m4_m(__VA_ARGS__)

#define	vse64_v_u64m8(...) __riscv_vse64_v_u64m8(__VA_ARGS__)

#define	vse64_v_u64m8_m(...) __riscv_vse64_v_u64m8_m(__VA_ARGS__)

#define	vse8_v_i8m1(...) __riscv_vse8_v_i8m1(__VA_ARGS__)

#define	vse8_v_i8m1_m(...) __riscv_vse8_v_i8m1_m(__VA_ARGS__)

#define	vse8_v_i8m2(...) __riscv_vse8_v_i8m2(__VA_ARGS__)

#define	vse8_v_i8m2_m(...) __riscv_vse8_v_i8m2_m(__VA_ARGS__)

#define	vse8_v_i8m4(...) __riscv_vse8_v_i8m4(__VA_ARGS__)

#define	vse8_v_i8m4_m(...) __riscv_vse8_v_i8m4_m(__VA_ARGS__)

#define	vse8_v_i8m8(...) __riscv_vse8_v_i8m8(__VA_ARGS__)

#define	vse8_v_i8m8_m(...) __riscv_vse8_v_i8m8_m(__VA_ARGS__)

#define	vse8_v_i8mf2(...) __riscv_vse8_v_i8mf2(__VA_ARGS__)

#define	vse8_v_i8mf2_m(...) __riscv_vse8_v_i8mf2_m(__VA_ARGS__)

#define	vse8_v_i8mf4(...) __riscv_vse8_v_i8mf4(__VA_ARGS__)

#define	vse8_v_i8mf4_m(...) __riscv_vse8_v_i8mf4_m(__VA_ARGS__)

#define	vse8_v_i8mf8(...) __riscv_vse8_v_i8mf8(__VA_ARGS__)

#define	vse8_v_i8mf8_m(...) __riscv_vse8_v_i8mf8_m(__VA_ARGS__)

#define	vse8_v_u8m1(...) __riscv_vse8_v_u8m1(__VA_ARGS__)

#define	vse8_v_u8m1_m(...) __riscv_vse8_v_u8m1_m(__VA_ARGS__)

#define	vse8_v_u8m2(...) __riscv_vse8_v_u8m2(__VA_ARGS__)

#define	vse8_v_u8m2_m(...) __riscv_vse8_v_u8m2_m(__VA_ARGS__)

#define	vse8_v_u8m4(...) __riscv_vse8_v_u8m4(__VA_ARGS__)

#define	vse8_v_u8m4_m(...) __riscv_vse8_v_u8m4_m(__VA_ARGS__)

#define	vse8_v_u8m8(...) __riscv_vse8_v_u8m8(__VA_ARGS__)

#define	vse8_v_u8m8_m(...) __riscv_vse8_v_u8m8_m(__VA_ARGS__)

#define	vse8_v_u8mf2(...) __riscv_vse8_v_u8mf2(__VA_ARGS__)

#define	vse8_v_u8mf2_m(...) __riscv_vse8_v_u8mf2_m(__VA_ARGS__)

#define	vse8_v_u8mf4(...) __riscv_vse8_v_u8mf4(__VA_ARGS__)

#define	vse8_v_u8mf4_m(...) __riscv_vse8_v_u8mf4_m(__VA_ARGS__)

#define	vse8_v_u8mf8(...) __riscv_vse8_v_u8mf8(__VA_ARGS__)

#define	vse8_v_u8mf8_m(...) __riscv_vse8_v_u8mf8_m(__VA_ARGS__)

#define	vset_v_f16m1_f16m2(...) __riscv_vset_v_f16m1_f16m2(__VA_ARGS__)

#define	vset_v_f16m1_f16m4(...) __riscv_vset_v_f16m1_f16m4(__VA_ARGS__)

#define	vset_v_f16m1_f16m8(...) __riscv_vset_v_f16m1_f16m8(__VA_ARGS__)

#define	vset_v_f16m2_f16m4(...) __riscv_vset_v_f16m2_f16m4(__VA_ARGS__)

#define	vset_v_f16m2_f16m8(...) __riscv_vset_v_f16m2_f16m8(__VA_ARGS__)

#define	vset_v_f16m4_f16m8(...) __riscv_vset_v_f16m4_f16m8(__VA_ARGS__)

#define	vset_v_f32m1_f32m2(...) __riscv_vset_v_f32m1_f32m2(__VA_ARGS__)

#define	vset_v_f32m1_f32m4(...) __riscv_vset_v_f32m1_f32m4(__VA_ARGS__)

#define	vset_v_f32m1_f32m8(...) __riscv_vset_v_f32m1_f32m8(__VA_ARGS__)

#define	vset_v_f32m2_f32m4(...) __riscv_vset_v_f32m2_f32m4(__VA_ARGS__)

#define	vset_v_f32m2_f32m8(...) __riscv_vset_v_f32m2_f32m8(__VA_ARGS__)

#define	vset_v_f32m4_f32m8(...) __riscv_vset_v_f32m4_f32m8(__VA_ARGS__)

#define	vset_v_f64m1_f64m2(...) __riscv_vset_v_f64m1_f64m2(__VA_ARGS__)

#define	vset_v_f64m1_f64m4(...) __riscv_vset_v_f64m1_f64m4(__VA_ARGS__)

#define	vset_v_f64m1_f64m8(...) __riscv_vset_v_f64m1_f64m8(__VA_ARGS__)

#define	vset_v_f64m2_f64m4(...) __riscv_vset_v_f64m2_f64m4(__VA_ARGS__)

#define	vset_v_f64m2_f64m8(...) __riscv_vset_v_f64m2_f64m8(__VA_ARGS__)

#define	vset_v_f64m4_f64m8(...) __riscv_vset_v_f64m4_f64m8(__VA_ARGS__)

#define	vset_v_i16m1_i16m2(...) __riscv_vset_v_i16m1_i16m2(__VA_ARGS__)

#define	vset_v_i16m1_i16m4(...) __riscv_vset_v_i16m1_i16m4(__VA_ARGS__)

#define	vset_v_i16m1_i16m8(...) __riscv_vset_v_i16m1_i16m8(__VA_ARGS__)

#define	vset_v_i16m2_i16m4(...) __riscv_vset_v_i16m2_i16m4(__VA_ARGS__)

#define	vset_v_i16m2_i16m8(...) __riscv_vset_v_i16m2_i16m8(__VA_ARGS__)

#define	vset_v_i16m4_i16m8(...) __riscv_vset_v_i16m4_i16m8(__VA_ARGS__)

#define	vset_v_i32m1_i32m2(...) __riscv_vset_v_i32m1_i32m2(__VA_ARGS__)

#define	vset_v_i32m1_i32m4(...) __riscv_vset_v_i32m1_i32m4(__VA_ARGS__)

#define	vset_v_i32m1_i32m8(...) __riscv_vset_v_i32m1_i32m8(__VA_ARGS__)

#define	vset_v_i32m2_i32m4(...) __riscv_vset_v_i32m2_i32m4(__VA_ARGS__)

#define	vset_v_i32m2_i32m8(...) __riscv_vset_v_i32m2_i32m8(__VA_ARGS__)

#define	vset_v_i32m4_i32m8(...) __riscv_vset_v_i32m4_i32m8(__VA_ARGS__)

#define	vset_v_i64m1_i64m2(...) __riscv_vset_v_i64m1_i64m2(__VA_ARGS__)

#define	vset_v_i64m1_i64m4(...) __riscv_vset_v_i64m1_i64m4(__VA_ARGS__)

#define	vset_v_i64m1_i64m8(...) __riscv_vset_v_i64m1_i64m8(__VA_ARGS__)

#define	vset_v_i64m2_i64m4(...) __riscv_vset_v_i64m2_i64m4(__VA_ARGS__)

#define	vset_v_i64m2_i64m8(...) __riscv_vset_v_i64m2_i64m8(__VA_ARGS__)

#define	vset_v_i64m4_i64m8(...) __riscv_vset_v_i64m4_i64m8(__VA_ARGS__)

#define	vset_v_i8m1_i8m2(...) __riscv_vset_v_i8m1_i8m2(__VA_ARGS__)

#define	vset_v_i8m1_i8m4(...) __riscv_vset_v_i8m1_i8m4(__VA_ARGS__)

#define	vset_v_i8m1_i8m8(...) __riscv_vset_v_i8m1_i8m8(__VA_ARGS__)

#define	vset_v_i8m2_i8m4(...) __riscv_vset_v_i8m2_i8m4(__VA_ARGS__)

#define	vset_v_i8m2_i8m8(...) __riscv_vset_v_i8m2_i8m8(__VA_ARGS__)

#define	vset_v_i8m4_i8m8(...) __riscv_vset_v_i8m4_i8m8(__VA_ARGS__)

#define	vset_v_u16m1_u16m2(...) __riscv_vset_v_u16m1_u16m2(__VA_ARGS__)

#define	vset_v_u16m1_u16m4(...) __riscv_vset_v_u16m1_u16m4(__VA_ARGS__)

#define	vset_v_u16m1_u16m8(...) __riscv_vset_v_u16m1_u16m8(__VA_ARGS__)

#define	vset_v_u16m2_u16m4(...) __riscv_vset_v_u16m2_u16m4(__VA_ARGS__)

#define	vset_v_u16m2_u16m8(...) __riscv_vset_v_u16m2_u16m8(__VA_ARGS__)

#define	vset_v_u16m4_u16m8(...) __riscv_vset_v_u16m4_u16m8(__VA_ARGS__)

#define	vset_v_u32m1_u32m2(...) __riscv_vset_v_u32m1_u32m2(__VA_ARGS__)

#define	vset_v_u32m1_u32m4(...) __riscv_vset_v_u32m1_u32m4(__VA_ARGS__)

#define	vset_v_u32m1_u32m8(...) __riscv_vset_v_u32m1_u32m8(__VA_ARGS__)

#define	vset_v_u32m2_u32m4(...) __riscv_vset_v_u32m2_u32m4(__VA_ARGS__)

#define	vset_v_u32m2_u32m8(...) __riscv_vset_v_u32m2_u32m8(__VA_ARGS__)

#define	vset_v_u32m4_u32m8(...) __riscv_vset_v_u32m4_u32m8(__VA_ARGS__)

#define	vset_v_u64m1_u64m2(...) __riscv_vset_v_u64m1_u64m2(__VA_ARGS__)

#define	vset_v_u64m1_u64m4(...) __riscv_vset_v_u64m1_u64m4(__VA_ARGS__)

#define	vset_v_u64m1_u64m8(...) __riscv_vset_v_u64m1_u64m8(__VA_ARGS__)

#define	vset_v_u64m2_u64m4(...) __riscv_vset_v_u64m2_u64m4(__VA_ARGS__)

#define	vset_v_u64m2_u64m8(...) __riscv_vset_v_u64m2_u64m8(__VA_ARGS__)

#define	vset_v_u64m4_u64m8(...) __riscv_vset_v_u64m4_u64m8(__VA_ARGS__)

#define	vset_v_u8m1_u8m2(...) __riscv_vset_v_u8m1_u8m2(__VA_ARGS__)

#define	vset_v_u8m1_u8m4(...) __riscv_vset_v_u8m1_u8m4(__VA_ARGS__)

#define	vset_v_u8m1_u8m8(...) __riscv_vset_v_u8m1_u8m8(__VA_ARGS__)

#define	vset_v_u8m2_u8m4(...) __riscv_vset_v_u8m2_u8m4(__VA_ARGS__)

#define	vset_v_u8m2_u8m8(...) __riscv_vset_v_u8m2_u8m8(__VA_ARGS__)

#define	vset_v_u8m4_u8m8(...) __riscv_vset_v_u8m4_u8m8(__VA_ARGS__)

#define	vsetvl_e16m1(...) __riscv_vsetvl_e16m1(__VA_ARGS__)

#define	vsetvl_e16m2(...) __riscv_vsetvl_e16m2(__VA_ARGS__)

#define	vsetvl_e16m4(...) __riscv_vsetvl_e16m4(__VA_ARGS__)

#define	vsetvl_e16m8(...) __riscv_vsetvl_e16m8(__VA_ARGS__)

#define	vsetvl_e16mf2(...) __riscv_vsetvl_e16mf2(__VA_ARGS__)

#define	vsetvl_e16mf4(...) __riscv_vsetvl_e16mf4(__VA_ARGS__)

#define	vsetvl_e32m1(...) __riscv_vsetvl_e32m1(__VA_ARGS__)

#define	vsetvl_e32m2(...) __riscv_vsetvl_e32m2(__VA_ARGS__)

#define	vsetvl_e32m4(...) __riscv_vsetvl_e32m4(__VA_ARGS__)

#define	vsetvl_e32m8(...) __riscv_vsetvl_e32m8(__VA_ARGS__)

#define	vsetvl_e32mf2(...) __riscv_vsetvl_e32mf2(__VA_ARGS__)

#define	vsetvl_e64m1(...) __riscv_vsetvl_e64m1(__VA_ARGS__)

#define	vsetvl_e64m2(...) __riscv_vsetvl_e64m2(__VA_ARGS__)

#define	vsetvl_e64m4(...) __riscv_vsetvl_e64m4(__VA_ARGS__)

#define	vsetvl_e64m8(...) __riscv_vsetvl_e64m8(__VA_ARGS__)

#define	vsetvl_e8m1(...) __riscv_vsetvl_e8m1(__VA_ARGS__)

#define	vsetvl_e8m2(...) __riscv_vsetvl_e8m2(__VA_ARGS__)

#define	vsetvl_e8m4(...) __riscv_vsetvl_e8m4(__VA_ARGS__)

#define	vsetvl_e8m8(...) __riscv_vsetvl_e8m8(__VA_ARGS__)

#define	vsetvl_e8mf2(...) __riscv_vsetvl_e8mf2(__VA_ARGS__)

#define	vsetvl_e8mf4(...) __riscv_vsetvl_e8mf4(__VA_ARGS__)

#define	vsetvl_e8mf8(...) __riscv_vsetvl_e8mf8(__VA_ARGS__)

#define	vsetvlmax_e16m1(...) __riscv_vsetvlmax_e16m1(__VA_ARGS__)

#define	vsetvlmax_e16m2(...) __riscv_vsetvlmax_e16m2(__VA_ARGS__)

#define	vsetvlmax_e16m4(...) __riscv_vsetvlmax_e16m4(__VA_ARGS__)

#define	vsetvlmax_e16m8(...) __riscv_vsetvlmax_e16m8(__VA_ARGS__)

#define	vsetvlmax_e16mf2(...) __riscv_vsetvlmax_e16mf2(__VA_ARGS__)

#define	vsetvlmax_e16mf4(...) __riscv_vsetvlmax_e16mf4(__VA_ARGS__)

#define	vsetvlmax_e32m1(...) __riscv_vsetvlmax_e32m1(__VA_ARGS__)

#define	vsetvlmax_e32m2(...) __riscv_vsetvlmax_e32m2(__VA_ARGS__)

#define	vsetvlmax_e32m4(...) __riscv_vsetvlmax_e32m4(__VA_ARGS__)

#define	vsetvlmax_e32m8(...) __riscv_vsetvlmax_e32m8(__VA_ARGS__)

#define	vsetvlmax_e32mf2(...) __riscv_vsetvlmax_e32mf2(__VA_ARGS__)

#define	vsetvlmax_e64m1(...) __riscv_vsetvlmax_e64m1(__VA_ARGS__)

#define	vsetvlmax_e64m2(...) __riscv_vsetvlmax_e64m2(__VA_ARGS__)

#define	vsetvlmax_e64m4(...) __riscv_vsetvlmax_e64m4(__VA_ARGS__)

#define	vsetvlmax_e64m8(...) __riscv_vsetvlmax_e64m8(__VA_ARGS__)

#define	vsetvlmax_e8m1(...) __riscv_vsetvlmax_e8m1(__VA_ARGS__)

#define	vsetvlmax_e8m2(...) __riscv_vsetvlmax_e8m2(__VA_ARGS__)

#define	vsetvlmax_e8m4(...) __riscv_vsetvlmax_e8m4(__VA_ARGS__)

#define	vsetvlmax_e8m8(...) __riscv_vsetvlmax_e8m8(__VA_ARGS__)

#define	vsetvlmax_e8mf2(...) __riscv_vsetvlmax_e8mf2(__VA_ARGS__)

#define	vsetvlmax_e8mf4(...) __riscv_vsetvlmax_e8mf4(__VA_ARGS__)

#define	vsetvlmax_e8mf8(...) __riscv_vsetvlmax_e8mf8(__VA_ARGS__)

#define	vsext_vf2_i16m1(...) __riscv_vsext_vf2_i16m1(__VA_ARGS__)

#define	vsext_vf2_i16m1_m(...) __riscv_vsext_vf2_i16m1_tumu(__VA_ARGS__)

#define	vsext_vf2_i16m2(...) __riscv_vsext_vf2_i16m2(__VA_ARGS__)

#define	vsext_vf2_i16m2_m(...) __riscv_vsext_vf2_i16m2_tumu(__VA_ARGS__)

#define	vsext_vf2_i16m4(...) __riscv_vsext_vf2_i16m4(__VA_ARGS__)

#define	vsext_vf2_i16m4_m(...) __riscv_vsext_vf2_i16m4_tumu(__VA_ARGS__)

#define	vsext_vf2_i16m8(...) __riscv_vsext_vf2_i16m8(__VA_ARGS__)

#define	vsext_vf2_i16m8_m(...) __riscv_vsext_vf2_i16m8_tumu(__VA_ARGS__)

#define	vsext_vf2_i16mf2(...) __riscv_vsext_vf2_i16mf2(__VA_ARGS__)

#define	vsext_vf2_i16mf2_m(...) __riscv_vsext_vf2_i16mf2_tumu(__VA_ARGS__)

#define	vsext_vf2_i16mf4(...) __riscv_vsext_vf2_i16mf4(__VA_ARGS__)

#define	vsext_vf2_i16mf4_m(...) __riscv_vsext_vf2_i16mf4_tumu(__VA_ARGS__)

#define	vsext_vf2_i32m1(...) __riscv_vsext_vf2_i32m1(__VA_ARGS__)

#define	vsext_vf2_i32m1_m(...) __riscv_vsext_vf2_i32m1_tumu(__VA_ARGS__)

#define	vsext_vf2_i32m2(...) __riscv_vsext_vf2_i32m2(__VA_ARGS__)

#define	vsext_vf2_i32m2_m(...) __riscv_vsext_vf2_i32m2_tumu(__VA_ARGS__)

#define	vsext_vf2_i32m4(...) __riscv_vsext_vf2_i32m4(__VA_ARGS__)

#define	vsext_vf2_i32m4_m(...) __riscv_vsext_vf2_i32m4_tumu(__VA_ARGS__)

#define	vsext_vf2_i32m8(...) __riscv_vsext_vf2_i32m8(__VA_ARGS__)

#define	vsext_vf2_i32m8_m(...) __riscv_vsext_vf2_i32m8_tumu(__VA_ARGS__)

#define	vsext_vf2_i32mf2(...) __riscv_vsext_vf2_i32mf2(__VA_ARGS__)

#define	vsext_vf2_i32mf2_m(...) __riscv_vsext_vf2_i32mf2_tumu(__VA_ARGS__)

#define	vsext_vf2_i64m1(...) __riscv_vsext_vf2_i64m1(__VA_ARGS__)

#define	vsext_vf2_i64m1_m(...) __riscv_vsext_vf2_i64m1_tumu(__VA_ARGS__)

#define	vsext_vf2_i64m2(...) __riscv_vsext_vf2_i64m2(__VA_ARGS__)

#define	vsext_vf2_i64m2_m(...) __riscv_vsext_vf2_i64m2_tumu(__VA_ARGS__)

#define	vsext_vf2_i64m4(...) __riscv_vsext_vf2_i64m4(__VA_ARGS__)

#define	vsext_vf2_i64m4_m(...) __riscv_vsext_vf2_i64m4_tumu(__VA_ARGS__)

#define	vsext_vf2_i64m8(...) __riscv_vsext_vf2_i64m8(__VA_ARGS__)

#define	vsext_vf2_i64m8_m(...) __riscv_vsext_vf2_i64m8_tumu(__VA_ARGS__)

#define	vsext_vf4_i32m1(...) __riscv_vsext_vf4_i32m1(__VA_ARGS__)

#define	vsext_vf4_i32m1_m(...) __riscv_vsext_vf4_i32m1_tumu(__VA_ARGS__)

#define	vsext_vf4_i32m2(...) __riscv_vsext_vf4_i32m2(__VA_ARGS__)

#define	vsext_vf4_i32m2_m(...) __riscv_vsext_vf4_i32m2_tumu(__VA_ARGS__)

#define	vsext_vf4_i32m4(...) __riscv_vsext_vf4_i32m4(__VA_ARGS__)

#define	vsext_vf4_i32m4_m(...) __riscv_vsext_vf4_i32m4_tumu(__VA_ARGS__)

#define	vsext_vf4_i32m8(...) __riscv_vsext_vf4_i32m8(__VA_ARGS__)

#define	vsext_vf4_i32m8_m(...) __riscv_vsext_vf4_i32m8_tumu(__VA_ARGS__)

#define	vsext_vf4_i32mf2(...) __riscv_vsext_vf4_i32mf2(__VA_ARGS__)

#define	vsext_vf4_i32mf2_m(...) __riscv_vsext_vf4_i32mf2_tumu(__VA_ARGS__)

#define	vsext_vf4_i64m1(...) __riscv_vsext_vf4_i64m1(__VA_ARGS__)

#define	vsext_vf4_i64m1_m(...) __riscv_vsext_vf4_i64m1_tumu(__VA_ARGS__)

#define	vsext_vf4_i64m2(...) __riscv_vsext_vf4_i64m2(__VA_ARGS__)

#define	vsext_vf4_i64m2_m(...) __riscv_vsext_vf4_i64m2_tumu(__VA_ARGS__)

#define	vsext_vf4_i64m4(...) __riscv_vsext_vf4_i64m4(__VA_ARGS__)

#define	vsext_vf4_i64m4_m(...) __riscv_vsext_vf4_i64m4_tumu(__VA_ARGS__)

#define	vsext_vf4_i64m8(...) __riscv_vsext_vf4_i64m8(__VA_ARGS__)

#define	vsext_vf4_i64m8_m(...) __riscv_vsext_vf4_i64m8_tumu(__VA_ARGS__)

#define	vsext_vf8_i64m1(...) __riscv_vsext_vf8_i64m1(__VA_ARGS__)

#define	vsext_vf8_i64m1_m(...) __riscv_vsext_vf8_i64m1_tumu(__VA_ARGS__)

#define	vsext_vf8_i64m2(...) __riscv_vsext_vf8_i64m2(__VA_ARGS__)

#define	vsext_vf8_i64m2_m(...) __riscv_vsext_vf8_i64m2_tumu(__VA_ARGS__)

#define	vsext_vf8_i64m4(...) __riscv_vsext_vf8_i64m4(__VA_ARGS__)

#define	vsext_vf8_i64m4_m(...) __riscv_vsext_vf8_i64m4_tumu(__VA_ARGS__)

#define	vsext_vf8_i64m8(...) __riscv_vsext_vf8_i64m8(__VA_ARGS__)

#define	vsext_vf8_i64m8_m(...) __riscv_vsext_vf8_i64m8_tumu(__VA_ARGS__)

#define	vslide1down_vx_i16m1(...) __riscv_vslide1down_vx_i16m1(__VA_ARGS__)

#define	vslide1down_vx_i16m1_m(...) __riscv_vslide1down_vx_i16m1_tumu(__VA_ARGS__)

#define	vslide1down_vx_i16m2(...) __riscv_vslide1down_vx_i16m2(__VA_ARGS__)

#define	vslide1down_vx_i16m2_m(...) __riscv_vslide1down_vx_i16m2_tumu(__VA_ARGS__)

#define	vslide1down_vx_i16m4(...) __riscv_vslide1down_vx_i16m4(__VA_ARGS__)

#define	vslide1down_vx_i16m4_m(...) __riscv_vslide1down_vx_i16m4_tumu(__VA_ARGS__)

#define	vslide1down_vx_i16m8(...) __riscv_vslide1down_vx_i16m8(__VA_ARGS__)

#define	vslide1down_vx_i16m8_m(...) __riscv_vslide1down_vx_i16m8_tumu(__VA_ARGS__)

#define	vslide1down_vx_i16mf2(...) __riscv_vslide1down_vx_i16mf2(__VA_ARGS__)

#define	vslide1down_vx_i16mf2_m(...) __riscv_vslide1down_vx_i16mf2_tumu(__VA_ARGS__)

#define	vslide1down_vx_i16mf4(...) __riscv_vslide1down_vx_i16mf4(__VA_ARGS__)

#define	vslide1down_vx_i16mf4_m(...) __riscv_vslide1down_vx_i16mf4_tumu(__VA_ARGS__)

#define	vslide1down_vx_i32m1(...) __riscv_vslide1down_vx_i32m1(__VA_ARGS__)

#define	vslide1down_vx_i32m1_m(...) __riscv_vslide1down_vx_i32m1_tumu(__VA_ARGS__)

#define	vslide1down_vx_i32m2(...) __riscv_vslide1down_vx_i32m2(__VA_ARGS__)

#define	vslide1down_vx_i32m2_m(...) __riscv_vslide1down_vx_i32m2_tumu(__VA_ARGS__)

#define	vslide1down_vx_i32m4(...) __riscv_vslide1down_vx_i32m4(__VA_ARGS__)

#define	vslide1down_vx_i32m4_m(...) __riscv_vslide1down_vx_i32m4_tumu(__VA_ARGS__)

#define	vslide1down_vx_i32m8(...) __riscv_vslide1down_vx_i32m8(__VA_ARGS__)

#define	vslide1down_vx_i32m8_m(...) __riscv_vslide1down_vx_i32m8_tumu(__VA_ARGS__)

#define	vslide1down_vx_i32mf2(...) __riscv_vslide1down_vx_i32mf2(__VA_ARGS__)

#define	vslide1down_vx_i32mf2_m(...) __riscv_vslide1down_vx_i32mf2_tumu(__VA_ARGS__)

#define	vslide1down_vx_i64m1(...) __riscv_vslide1down_vx_i64m1(__VA_ARGS__)

#define	vslide1down_vx_i64m1_m(...) __riscv_vslide1down_vx_i64m1_tumu(__VA_ARGS__)

#define	vslide1down_vx_i64m2(...) __riscv_vslide1down_vx_i64m2(__VA_ARGS__)

#define	vslide1down_vx_i64m2_m(...) __riscv_vslide1down_vx_i64m2_tumu(__VA_ARGS__)

#define	vslide1down_vx_i64m4(...) __riscv_vslide1down_vx_i64m4(__VA_ARGS__)

#define	vslide1down_vx_i64m4_m(...) __riscv_vslide1down_vx_i64m4_tumu(__VA_ARGS__)

#define	vslide1down_vx_i64m8(...) __riscv_vslide1down_vx_i64m8(__VA_ARGS__)

#define	vslide1down_vx_i64m8_m(...) __riscv_vslide1down_vx_i64m8_tumu(__VA_ARGS__)

#define	vslide1down_vx_i8m1(...) __riscv_vslide1down_vx_i8m1(__VA_ARGS__)

#define	vslide1down_vx_i8m1_m(...) __riscv_vslide1down_vx_i8m1_tumu(__VA_ARGS__)

#define	vslide1down_vx_i8m2(...) __riscv_vslide1down_vx_i8m2(__VA_ARGS__)

#define	vslide1down_vx_i8m2_m(...) __riscv_vslide1down_vx_i8m2_tumu(__VA_ARGS__)

#define	vslide1down_vx_i8m4(...) __riscv_vslide1down_vx_i8m4(__VA_ARGS__)

#define	vslide1down_vx_i8m4_m(...) __riscv_vslide1down_vx_i8m4_tumu(__VA_ARGS__)

#define	vslide1down_vx_i8m8(...) __riscv_vslide1down_vx_i8m8(__VA_ARGS__)

#define	vslide1down_vx_i8m8_m(...) __riscv_vslide1down_vx_i8m8_tumu(__VA_ARGS__)

#define	vslide1down_vx_i8mf2(...) __riscv_vslide1down_vx_i8mf2(__VA_ARGS__)

#define	vslide1down_vx_i8mf2_m(...) __riscv_vslide1down_vx_i8mf2_tumu(__VA_ARGS__)

#define	vslide1down_vx_i8mf4(...) __riscv_vslide1down_vx_i8mf4(__VA_ARGS__)

#define	vslide1down_vx_i8mf4_m(...) __riscv_vslide1down_vx_i8mf4_tumu(__VA_ARGS__)

#define	vslide1down_vx_i8mf8(...) __riscv_vslide1down_vx_i8mf8(__VA_ARGS__)

#define	vslide1down_vx_i8mf8_m(...) __riscv_vslide1down_vx_i8mf8_tumu(__VA_ARGS__)

#define	vslide1down_vx_u16m1(...) __riscv_vslide1down_vx_u16m1(__VA_ARGS__)

#define	vslide1down_vx_u16m1_m(...) __riscv_vslide1down_vx_u16m1_tumu(__VA_ARGS__)

#define	vslide1down_vx_u16m2(...) __riscv_vslide1down_vx_u16m2(__VA_ARGS__)

#define	vslide1down_vx_u16m2_m(...) __riscv_vslide1down_vx_u16m2_tumu(__VA_ARGS__)

#define	vslide1down_vx_u16m4(...) __riscv_vslide1down_vx_u16m4(__VA_ARGS__)

#define	vslide1down_vx_u16m4_m(...) __riscv_vslide1down_vx_u16m4_tumu(__VA_ARGS__)

#define	vslide1down_vx_u16m8(...) __riscv_vslide1down_vx_u16m8(__VA_ARGS__)

#define	vslide1down_vx_u16m8_m(...) __riscv_vslide1down_vx_u16m8_tumu(__VA_ARGS__)

#define	vslide1down_vx_u16mf2(...) __riscv_vslide1down_vx_u16mf2(__VA_ARGS__)

#define	vslide1down_vx_u16mf2_m(...) __riscv_vslide1down_vx_u16mf2_tumu(__VA_ARGS__)

#define	vslide1down_vx_u16mf4(...) __riscv_vslide1down_vx_u16mf4(__VA_ARGS__)

#define	vslide1down_vx_u16mf4_m(...) __riscv_vslide1down_vx_u16mf4_tumu(__VA_ARGS__)

#define	vslide1down_vx_u32m1(...) __riscv_vslide1down_vx_u32m1(__VA_ARGS__)

#define	vslide1down_vx_u32m1_m(...) __riscv_vslide1down_vx_u32m1_tumu(__VA_ARGS__)

#define	vslide1down_vx_u32m2(...) __riscv_vslide1down_vx_u32m2(__VA_ARGS__)

#define	vslide1down_vx_u32m2_m(...) __riscv_vslide1down_vx_u32m2_tumu(__VA_ARGS__)

#define	vslide1down_vx_u32m4(...) __riscv_vslide1down_vx_u32m4(__VA_ARGS__)

#define	vslide1down_vx_u32m4_m(...) __riscv_vslide1down_vx_u32m4_tumu(__VA_ARGS__)

#define	vslide1down_vx_u32m8(...) __riscv_vslide1down_vx_u32m8(__VA_ARGS__)

#define	vslide1down_vx_u32m8_m(...) __riscv_vslide1down_vx_u32m8_tumu(__VA_ARGS__)

#define	vslide1down_vx_u32mf2(...) __riscv_vslide1down_vx_u32mf2(__VA_ARGS__)

#define	vslide1down_vx_u32mf2_m(...) __riscv_vslide1down_vx_u32mf2_tumu(__VA_ARGS__)

#define	vslide1down_vx_u64m1(...) __riscv_vslide1down_vx_u64m1(__VA_ARGS__)

#define	vslide1down_vx_u64m1_m(...) __riscv_vslide1down_vx_u64m1_tumu(__VA_ARGS__)

#define	vslide1down_vx_u64m2(...) __riscv_vslide1down_vx_u64m2(__VA_ARGS__)

#define	vslide1down_vx_u64m2_m(...) __riscv_vslide1down_vx_u64m2_tumu(__VA_ARGS__)

#define	vslide1down_vx_u64m4(...) __riscv_vslide1down_vx_u64m4(__VA_ARGS__)

#define	vslide1down_vx_u64m4_m(...) __riscv_vslide1down_vx_u64m4_tumu(__VA_ARGS__)

#define	vslide1down_vx_u64m8(...) __riscv_vslide1down_vx_u64m8(__VA_ARGS__)

#define	vslide1down_vx_u64m8_m(...) __riscv_vslide1down_vx_u64m8_tumu(__VA_ARGS__)

#define	vslide1down_vx_u8m1(...) __riscv_vslide1down_vx_u8m1(__VA_ARGS__)

#define	vslide1down_vx_u8m1_m(...) __riscv_vslide1down_vx_u8m1_tumu(__VA_ARGS__)

#define	vslide1down_vx_u8m2(...) __riscv_vslide1down_vx_u8m2(__VA_ARGS__)

#define	vslide1down_vx_u8m2_m(...) __riscv_vslide1down_vx_u8m2_tumu(__VA_ARGS__)

#define	vslide1down_vx_u8m4(...) __riscv_vslide1down_vx_u8m4(__VA_ARGS__)

#define	vslide1down_vx_u8m4_m(...) __riscv_vslide1down_vx_u8m4_tumu(__VA_ARGS__)

#define	vslide1down_vx_u8m8(...) __riscv_vslide1down_vx_u8m8(__VA_ARGS__)

#define	vslide1down_vx_u8m8_m(...) __riscv_vslide1down_vx_u8m8_tumu(__VA_ARGS__)

#define	vslide1down_vx_u8mf2(...) __riscv_vslide1down_vx_u8mf2(__VA_ARGS__)

#define	vslide1down_vx_u8mf2_m(...) __riscv_vslide1down_vx_u8mf2_tumu(__VA_ARGS__)

#define	vslide1down_vx_u8mf4(...) __riscv_vslide1down_vx_u8mf4(__VA_ARGS__)

#define	vslide1down_vx_u8mf4_m(...) __riscv_vslide1down_vx_u8mf4_tumu(__VA_ARGS__)

#define	vslide1down_vx_u8mf8(...) __riscv_vslide1down_vx_u8mf8(__VA_ARGS__)

#define	vslide1down_vx_u8mf8_m(...) __riscv_vslide1down_vx_u8mf8_tumu(__VA_ARGS__)

#define	vslide1up_vx_i16m1(...) __riscv_vslide1up_vx_i16m1(__VA_ARGS__)

#define	vslide1up_vx_i16m1_m(...) __riscv_vslide1up_vx_i16m1_tumu(__VA_ARGS__)

#define	vslide1up_vx_i16m2(...) __riscv_vslide1up_vx_i16m2(__VA_ARGS__)

#define	vslide1up_vx_i16m2_m(...) __riscv_vslide1up_vx_i16m2_tumu(__VA_ARGS__)

#define	vslide1up_vx_i16m4(...) __riscv_vslide1up_vx_i16m4(__VA_ARGS__)

#define	vslide1up_vx_i16m4_m(...) __riscv_vslide1up_vx_i16m4_tumu(__VA_ARGS__)

#define	vslide1up_vx_i16m8(...) __riscv_vslide1up_vx_i16m8(__VA_ARGS__)

#define	vslide1up_vx_i16m8_m(...) __riscv_vslide1up_vx_i16m8_tumu(__VA_ARGS__)

#define	vslide1up_vx_i16mf2(...) __riscv_vslide1up_vx_i16mf2(__VA_ARGS__)

#define	vslide1up_vx_i16mf2_m(...) __riscv_vslide1up_vx_i16mf2_tumu(__VA_ARGS__)

#define	vslide1up_vx_i16mf4(...) __riscv_vslide1up_vx_i16mf4(__VA_ARGS__)

#define	vslide1up_vx_i16mf4_m(...) __riscv_vslide1up_vx_i16mf4_tumu(__VA_ARGS__)

#define	vslide1up_vx_i32m1(...) __riscv_vslide1up_vx_i32m1(__VA_ARGS__)

#define	vslide1up_vx_i32m1_m(...) __riscv_vslide1up_vx_i32m1_tumu(__VA_ARGS__)

#define	vslide1up_vx_i32m2(...) __riscv_vslide1up_vx_i32m2(__VA_ARGS__)

#define	vslide1up_vx_i32m2_m(...) __riscv_vslide1up_vx_i32m2_tumu(__VA_ARGS__)

#define	vslide1up_vx_i32m4(...) __riscv_vslide1up_vx_i32m4(__VA_ARGS__)

#define	vslide1up_vx_i32m4_m(...) __riscv_vslide1up_vx_i32m4_tumu(__VA_ARGS__)

#define	vslide1up_vx_i32m8(...) __riscv_vslide1up_vx_i32m8(__VA_ARGS__)

#define	vslide1up_vx_i32m8_m(...) __riscv_vslide1up_vx_i32m8_tumu(__VA_ARGS__)

#define	vslide1up_vx_i32mf2(...) __riscv_vslide1up_vx_i32mf2(__VA_ARGS__)

#define	vslide1up_vx_i32mf2_m(...) __riscv_vslide1up_vx_i32mf2_tumu(__VA_ARGS__)

#define	vslide1up_vx_i64m1(...) __riscv_vslide1up_vx_i64m1(__VA_ARGS__)

#define	vslide1up_vx_i64m1_m(...) __riscv_vslide1up_vx_i64m1_tumu(__VA_ARGS__)

#define	vslide1up_vx_i64m2(...) __riscv_vslide1up_vx_i64m2(__VA_ARGS__)

#define	vslide1up_vx_i64m2_m(...) __riscv_vslide1up_vx_i64m2_tumu(__VA_ARGS__)

#define	vslide1up_vx_i64m4(...) __riscv_vslide1up_vx_i64m4(__VA_ARGS__)

#define	vslide1up_vx_i64m4_m(...) __riscv_vslide1up_vx_i64m4_tumu(__VA_ARGS__)

#define	vslide1up_vx_i64m8(...) __riscv_vslide1up_vx_i64m8(__VA_ARGS__)

#define	vslide1up_vx_i64m8_m(...) __riscv_vslide1up_vx_i64m8_tumu(__VA_ARGS__)

#define	vslide1up_vx_i8m1(...) __riscv_vslide1up_vx_i8m1(__VA_ARGS__)

#define	vslide1up_vx_i8m1_m(...) __riscv_vslide1up_vx_i8m1_tumu(__VA_ARGS__)

#define	vslide1up_vx_i8m2(...) __riscv_vslide1up_vx_i8m2(__VA_ARGS__)

#define	vslide1up_vx_i8m2_m(...) __riscv_vslide1up_vx_i8m2_tumu(__VA_ARGS__)

#define	vslide1up_vx_i8m4(...) __riscv_vslide1up_vx_i8m4(__VA_ARGS__)

#define	vslide1up_vx_i8m4_m(...) __riscv_vslide1up_vx_i8m4_tumu(__VA_ARGS__)

#define	vslide1up_vx_i8m8(...) __riscv_vslide1up_vx_i8m8(__VA_ARGS__)

#define	vslide1up_vx_i8m8_m(...) __riscv_vslide1up_vx_i8m8_tumu(__VA_ARGS__)

#define	vslide1up_vx_i8mf2(...) __riscv_vslide1up_vx_i8mf2(__VA_ARGS__)

#define	vslide1up_vx_i8mf2_m(...) __riscv_vslide1up_vx_i8mf2_tumu(__VA_ARGS__)

#define	vslide1up_vx_i8mf4(...) __riscv_vslide1up_vx_i8mf4(__VA_ARGS__)

#define	vslide1up_vx_i8mf4_m(...) __riscv_vslide1up_vx_i8mf4_tumu(__VA_ARGS__)

#define	vslide1up_vx_i8mf8(...) __riscv_vslide1up_vx_i8mf8(__VA_ARGS__)

#define	vslide1up_vx_i8mf8_m(...) __riscv_vslide1up_vx_i8mf8_tumu(__VA_ARGS__)

#define	vslide1up_vx_u16m1(...) __riscv_vslide1up_vx_u16m1(__VA_ARGS__)

#define	vslide1up_vx_u16m1_m(...) __riscv_vslide1up_vx_u16m1_tumu(__VA_ARGS__)

#define	vslide1up_vx_u16m2(...) __riscv_vslide1up_vx_u16m2(__VA_ARGS__)

#define	vslide1up_vx_u16m2_m(...) __riscv_vslide1up_vx_u16m2_tumu(__VA_ARGS__)

#define	vslide1up_vx_u16m4(...) __riscv_vslide1up_vx_u16m4(__VA_ARGS__)

#define	vslide1up_vx_u16m4_m(...) __riscv_vslide1up_vx_u16m4_tumu(__VA_ARGS__)

#define	vslide1up_vx_u16m8(...) __riscv_vslide1up_vx_u16m8(__VA_ARGS__)

#define	vslide1up_vx_u16m8_m(...) __riscv_vslide1up_vx_u16m8_tumu(__VA_ARGS__)

#define	vslide1up_vx_u16mf2(...) __riscv_vslide1up_vx_u16mf2(__VA_ARGS__)

#define	vslide1up_vx_u16mf2_m(...) __riscv_vslide1up_vx_u16mf2_tumu(__VA_ARGS__)

#define	vslide1up_vx_u16mf4(...) __riscv_vslide1up_vx_u16mf4(__VA_ARGS__)

#define	vslide1up_vx_u16mf4_m(...) __riscv_vslide1up_vx_u16mf4_tumu(__VA_ARGS__)

#define	vslide1up_vx_u32m1(...) __riscv_vslide1up_vx_u32m1(__VA_ARGS__)

#define	vslide1up_vx_u32m1_m(...) __riscv_vslide1up_vx_u32m1_tumu(__VA_ARGS__)

#define	vslide1up_vx_u32m2(...) __riscv_vslide1up_vx_u32m2(__VA_ARGS__)

#define	vslide1up_vx_u32m2_m(...) __riscv_vslide1up_vx_u32m2_tumu(__VA_ARGS__)

#define	vslide1up_vx_u32m4(...) __riscv_vslide1up_vx_u32m4(__VA_ARGS__)

#define	vslide1up_vx_u32m4_m(...) __riscv_vslide1up_vx_u32m4_tumu(__VA_ARGS__)

#define	vslide1up_vx_u32m8(...) __riscv_vslide1up_vx_u32m8(__VA_ARGS__)

#define	vslide1up_vx_u32m8_m(...) __riscv_vslide1up_vx_u32m8_tumu(__VA_ARGS__)

#define	vslide1up_vx_u32mf2(...) __riscv_vslide1up_vx_u32mf2(__VA_ARGS__)

#define	vslide1up_vx_u32mf2_m(...) __riscv_vslide1up_vx_u32mf2_tumu(__VA_ARGS__)

#define	vslide1up_vx_u64m1(...) __riscv_vslide1up_vx_u64m1(__VA_ARGS__)

#define	vslide1up_vx_u64m1_m(...) __riscv_vslide1up_vx_u64m1_tumu(__VA_ARGS__)

#define	vslide1up_vx_u64m2(...) __riscv_vslide1up_vx_u64m2(__VA_ARGS__)

#define	vslide1up_vx_u64m2_m(...) __riscv_vslide1up_vx_u64m2_tumu(__VA_ARGS__)

#define	vslide1up_vx_u64m4(...) __riscv_vslide1up_vx_u64m4(__VA_ARGS__)

#define	vslide1up_vx_u64m4_m(...) __riscv_vslide1up_vx_u64m4_tumu(__VA_ARGS__)

#define	vslide1up_vx_u64m8(...) __riscv_vslide1up_vx_u64m8(__VA_ARGS__)

#define	vslide1up_vx_u64m8_m(...) __riscv_vslide1up_vx_u64m8_tumu(__VA_ARGS__)

#define	vslide1up_vx_u8m1(...) __riscv_vslide1up_vx_u8m1(__VA_ARGS__)

#define	vslide1up_vx_u8m1_m(...) __riscv_vslide1up_vx_u8m1_tumu(__VA_ARGS__)

#define	vslide1up_vx_u8m2(...) __riscv_vslide1up_vx_u8m2(__VA_ARGS__)

#define	vslide1up_vx_u8m2_m(...) __riscv_vslide1up_vx_u8m2_tumu(__VA_ARGS__)

#define	vslide1up_vx_u8m4(...) __riscv_vslide1up_vx_u8m4(__VA_ARGS__)

#define	vslide1up_vx_u8m4_m(...) __riscv_vslide1up_vx_u8m4_tumu(__VA_ARGS__)

#define	vslide1up_vx_u8m8(...) __riscv_vslide1up_vx_u8m8(__VA_ARGS__)

#define	vslide1up_vx_u8m8_m(...) __riscv_vslide1up_vx_u8m8_tumu(__VA_ARGS__)

#define	vslide1up_vx_u8mf2(...) __riscv_vslide1up_vx_u8mf2(__VA_ARGS__)

#define	vslide1up_vx_u8mf2_m(...) __riscv_vslide1up_vx_u8mf2_tumu(__VA_ARGS__)

#define	vslide1up_vx_u8mf4(...) __riscv_vslide1up_vx_u8mf4(__VA_ARGS__)

#define	vslide1up_vx_u8mf4_m(...) __riscv_vslide1up_vx_u8mf4_tumu(__VA_ARGS__)

#define	vslide1up_vx_u8mf8(...) __riscv_vslide1up_vx_u8mf8(__VA_ARGS__)

#define	vslide1up_vx_u8mf8_m(...) __riscv_vslide1up_vx_u8mf8_tumu(__VA_ARGS__)

#define	vslidedown_vx_f16m1(...) __riscv_vslidedown_vx_f16m1_tu(__VA_ARGS__)

#define	vslidedown_vx_f16m1_m(...) __riscv_vslidedown_vx_f16m1_tumu(__VA_ARGS__)

#define	vslidedown_vx_f16m2(...) __riscv_vslidedown_vx_f16m2_tu(__VA_ARGS__)

#define	vslidedown_vx_f16m2_m(...) __riscv_vslidedown_vx_f16m2_tumu(__VA_ARGS__)

#define	vslidedown_vx_f16m4(...) __riscv_vslidedown_vx_f16m4_tu(__VA_ARGS__)

#define	vslidedown_vx_f16m4_m(...) __riscv_vslidedown_vx_f16m4_tumu(__VA_ARGS__)

#define	vslidedown_vx_f16m8(...) __riscv_vslidedown_vx_f16m8_tu(__VA_ARGS__)

#define	vslidedown_vx_f16m8_m(...) __riscv_vslidedown_vx_f16m8_tumu(__VA_ARGS__)

#define	vslidedown_vx_f16mf2(...) __riscv_vslidedown_vx_f16mf2_tu(__VA_ARGS__)

#define	vslidedown_vx_f16mf2_m(...) __riscv_vslidedown_vx_f16mf2_tumu(__VA_ARGS__)

#define	vslidedown_vx_f16mf4(...) __riscv_vslidedown_vx_f16mf4_tu(__VA_ARGS__)

#define	vslidedown_vx_f16mf4_m(...) __riscv_vslidedown_vx_f16mf4_tumu(__VA_ARGS__)

#define	vslidedown_vx_f32m1(...) __riscv_vslidedown_vx_f32m1_tu(__VA_ARGS__)

#define	vslidedown_vx_f32m1_m(...) __riscv_vslidedown_vx_f32m1_tumu(__VA_ARGS__)

#define	vslidedown_vx_f32m2(...) __riscv_vslidedown_vx_f32m2_tu(__VA_ARGS__)

#define	vslidedown_vx_f32m2_m(...) __riscv_vslidedown_vx_f32m2_tumu(__VA_ARGS__)

#define	vslidedown_vx_f32m4(...) __riscv_vslidedown_vx_f32m4_tu(__VA_ARGS__)

#define	vslidedown_vx_f32m4_m(...) __riscv_vslidedown_vx_f32m4_tumu(__VA_ARGS__)

#define	vslidedown_vx_f32m8(...) __riscv_vslidedown_vx_f32m8_tu(__VA_ARGS__)

#define	vslidedown_vx_f32m8_m(...) __riscv_vslidedown_vx_f32m8_tumu(__VA_ARGS__)

#define	vslidedown_vx_f32mf2(...) __riscv_vslidedown_vx_f32mf2_tu(__VA_ARGS__)

#define	vslidedown_vx_f32mf2_m(...) __riscv_vslidedown_vx_f32mf2_tumu(__VA_ARGS__)

#define	vslidedown_vx_f64m1(...) __riscv_vslidedown_vx_f64m1_tu(__VA_ARGS__)

#define	vslidedown_vx_f64m1_m(...) __riscv_vslidedown_vx_f64m1_tumu(__VA_ARGS__)

#define	vslidedown_vx_f64m2(...) __riscv_vslidedown_vx_f64m2_tu(__VA_ARGS__)

#define	vslidedown_vx_f64m2_m(...) __riscv_vslidedown_vx_f64m2_tumu(__VA_ARGS__)

#define	vslidedown_vx_f64m4(...) __riscv_vslidedown_vx_f64m4_tu(__VA_ARGS__)

#define	vslidedown_vx_f64m4_m(...) __riscv_vslidedown_vx_f64m4_tumu(__VA_ARGS__)

#define	vslidedown_vx_f64m8(...) __riscv_vslidedown_vx_f64m8_tu(__VA_ARGS__)

#define	vslidedown_vx_f64m8_m(...) __riscv_vslidedown_vx_f64m8_tumu(__VA_ARGS__)

#define	vslidedown_vx_i16m1(...) __riscv_vslidedown_vx_i16m1_tu(__VA_ARGS__)

#define	vslidedown_vx_i16m1_m(...) __riscv_vslidedown_vx_i16m1_tumu(__VA_ARGS__)

#define	vslidedown_vx_i16m2(...) __riscv_vslidedown_vx_i16m2_tu(__VA_ARGS__)

#define	vslidedown_vx_i16m2_m(...) __riscv_vslidedown_vx_i16m2_tumu(__VA_ARGS__)

#define	vslidedown_vx_i16m4(...) __riscv_vslidedown_vx_i16m4_tu(__VA_ARGS__)

#define	vslidedown_vx_i16m4_m(...) __riscv_vslidedown_vx_i16m4_tumu(__VA_ARGS__)

#define	vslidedown_vx_i16m8(...) __riscv_vslidedown_vx_i16m8_tu(__VA_ARGS__)

#define	vslidedown_vx_i16m8_m(...) __riscv_vslidedown_vx_i16m8_tumu(__VA_ARGS__)

#define	vslidedown_vx_i16mf2(...) __riscv_vslidedown_vx_i16mf2_tu(__VA_ARGS__)

#define	vslidedown_vx_i16mf2_m(...) __riscv_vslidedown_vx_i16mf2_tumu(__VA_ARGS__)

#define	vslidedown_vx_i16mf4(...) __riscv_vslidedown_vx_i16mf4_tu(__VA_ARGS__)

#define	vslidedown_vx_i16mf4_m(...) __riscv_vslidedown_vx_i16mf4_tumu(__VA_ARGS__)

#define	vslidedown_vx_i32m1(...) __riscv_vslidedown_vx_i32m1_tu(__VA_ARGS__)

#define	vslidedown_vx_i32m1_m(...) __riscv_vslidedown_vx_i32m1_tumu(__VA_ARGS__)

#define	vslidedown_vx_i32m2(...) __riscv_vslidedown_vx_i32m2_tu(__VA_ARGS__)

#define	vslidedown_vx_i32m2_m(...) __riscv_vslidedown_vx_i32m2_tumu(__VA_ARGS__)

#define	vslidedown_vx_i32m4(...) __riscv_vslidedown_vx_i32m4_tu(__VA_ARGS__)

#define	vslidedown_vx_i32m4_m(...) __riscv_vslidedown_vx_i32m4_tumu(__VA_ARGS__)

#define	vslidedown_vx_i32m8(...) __riscv_vslidedown_vx_i32m8_tu(__VA_ARGS__)

#define	vslidedown_vx_i32m8_m(...) __riscv_vslidedown_vx_i32m8_tumu(__VA_ARGS__)

#define	vslidedown_vx_i32mf2(...) __riscv_vslidedown_vx_i32mf2_tu(__VA_ARGS__)

#define	vslidedown_vx_i32mf2_m(...) __riscv_vslidedown_vx_i32mf2_tumu(__VA_ARGS__)

#define	vslidedown_vx_i64m1(...) __riscv_vslidedown_vx_i64m1_tu(__VA_ARGS__)

#define	vslidedown_vx_i64m1_m(...) __riscv_vslidedown_vx_i64m1_tumu(__VA_ARGS__)

#define	vslidedown_vx_i64m2(...) __riscv_vslidedown_vx_i64m2_tu(__VA_ARGS__)

#define	vslidedown_vx_i64m2_m(...) __riscv_vslidedown_vx_i64m2_tumu(__VA_ARGS__)

#define	vslidedown_vx_i64m4(...) __riscv_vslidedown_vx_i64m4_tu(__VA_ARGS__)

#define	vslidedown_vx_i64m4_m(...) __riscv_vslidedown_vx_i64m4_tumu(__VA_ARGS__)

#define	vslidedown_vx_i64m8(...) __riscv_vslidedown_vx_i64m8_tu(__VA_ARGS__)

#define	vslidedown_vx_i64m8_m(...) __riscv_vslidedown_vx_i64m8_tumu(__VA_ARGS__)

#define	vslidedown_vx_i8m1(...) __riscv_vslidedown_vx_i8m1_tu(__VA_ARGS__)

#define	vslidedown_vx_i8m1_m(...) __riscv_vslidedown_vx_i8m1_tumu(__VA_ARGS__)

#define	vslidedown_vx_i8m2(...) __riscv_vslidedown_vx_i8m2_tu(__VA_ARGS__)

#define	vslidedown_vx_i8m2_m(...) __riscv_vslidedown_vx_i8m2_tumu(__VA_ARGS__)

#define	vslidedown_vx_i8m4(...) __riscv_vslidedown_vx_i8m4_tu(__VA_ARGS__)

#define	vslidedown_vx_i8m4_m(...) __riscv_vslidedown_vx_i8m4_tumu(__VA_ARGS__)

#define	vslidedown_vx_i8m8(...) __riscv_vslidedown_vx_i8m8_tu(__VA_ARGS__)

#define	vslidedown_vx_i8m8_m(...) __riscv_vslidedown_vx_i8m8_tumu(__VA_ARGS__)

#define	vslidedown_vx_i8mf2(...) __riscv_vslidedown_vx_i8mf2_tu(__VA_ARGS__)

#define	vslidedown_vx_i8mf2_m(...) __riscv_vslidedown_vx_i8mf2_tumu(__VA_ARGS__)

#define	vslidedown_vx_i8mf4(...) __riscv_vslidedown_vx_i8mf4_tu(__VA_ARGS__)

#define	vslidedown_vx_i8mf4_m(...) __riscv_vslidedown_vx_i8mf4_tumu(__VA_ARGS__)

#define	vslidedown_vx_i8mf8(...) __riscv_vslidedown_vx_i8mf8_tu(__VA_ARGS__)

#define	vslidedown_vx_i8mf8_m(...) __riscv_vslidedown_vx_i8mf8_tumu(__VA_ARGS__)

#define	vslidedown_vx_u16m1(...) __riscv_vslidedown_vx_u16m1_tu(__VA_ARGS__)

#define	vslidedown_vx_u16m1_m(...) __riscv_vslidedown_vx_u16m1_tumu(__VA_ARGS__)

#define	vslidedown_vx_u16m2(...) __riscv_vslidedown_vx_u16m2_tu(__VA_ARGS__)

#define	vslidedown_vx_u16m2_m(...) __riscv_vslidedown_vx_u16m2_tumu(__VA_ARGS__)

#define	vslidedown_vx_u16m4(...) __riscv_vslidedown_vx_u16m4_tu(__VA_ARGS__)

#define	vslidedown_vx_u16m4_m(...) __riscv_vslidedown_vx_u16m4_tumu(__VA_ARGS__)

#define	vslidedown_vx_u16m8(...) __riscv_vslidedown_vx_u16m8_tu(__VA_ARGS__)

#define	vslidedown_vx_u16m8_m(...) __riscv_vslidedown_vx_u16m8_tumu(__VA_ARGS__)

#define	vslidedown_vx_u16mf2(...) __riscv_vslidedown_vx_u16mf2_tu(__VA_ARGS__)

#define	vslidedown_vx_u16mf2_m(...) __riscv_vslidedown_vx_u16mf2_tumu(__VA_ARGS__)

#define	vslidedown_vx_u16mf4(...) __riscv_vslidedown_vx_u16mf4_tu(__VA_ARGS__)

#define	vslidedown_vx_u16mf4_m(...) __riscv_vslidedown_vx_u16mf4_tumu(__VA_ARGS__)

#define	vslidedown_vx_u32m1(...) __riscv_vslidedown_vx_u32m1_tu(__VA_ARGS__)

#define	vslidedown_vx_u32m1_m(...) __riscv_vslidedown_vx_u32m1_tumu(__VA_ARGS__)

#define	vslidedown_vx_u32m2(...) __riscv_vslidedown_vx_u32m2_tu(__VA_ARGS__)

#define	vslidedown_vx_u32m2_m(...) __riscv_vslidedown_vx_u32m2_tumu(__VA_ARGS__)

#define	vslidedown_vx_u32m4(...) __riscv_vslidedown_vx_u32m4_tu(__VA_ARGS__)

#define	vslidedown_vx_u32m4_m(...) __riscv_vslidedown_vx_u32m4_tumu(__VA_ARGS__)

#define	vslidedown_vx_u32m8(...) __riscv_vslidedown_vx_u32m8_tu(__VA_ARGS__)

#define	vslidedown_vx_u32m8_m(...) __riscv_vslidedown_vx_u32m8_tumu(__VA_ARGS__)

#define	vslidedown_vx_u32mf2(...) __riscv_vslidedown_vx_u32mf2_tu(__VA_ARGS__)

#define	vslidedown_vx_u32mf2_m(...) __riscv_vslidedown_vx_u32mf2_tumu(__VA_ARGS__)

#define	vslidedown_vx_u64m1(...) __riscv_vslidedown_vx_u64m1_tu(__VA_ARGS__)

#define	vslidedown_vx_u64m1_m(...) __riscv_vslidedown_vx_u64m1_tumu(__VA_ARGS__)

#define	vslidedown_vx_u64m2(...) __riscv_vslidedown_vx_u64m2_tu(__VA_ARGS__)

#define	vslidedown_vx_u64m2_m(...) __riscv_vslidedown_vx_u64m2_tumu(__VA_ARGS__)

#define	vslidedown_vx_u64m4(...) __riscv_vslidedown_vx_u64m4_tu(__VA_ARGS__)

#define	vslidedown_vx_u64m4_m(...) __riscv_vslidedown_vx_u64m4_tumu(__VA_ARGS__)

#define	vslidedown_vx_u64m8(...) __riscv_vslidedown_vx_u64m8_tu(__VA_ARGS__)

#define	vslidedown_vx_u64m8_m(...) __riscv_vslidedown_vx_u64m8_tumu(__VA_ARGS__)

#define	vslidedown_vx_u8m1(...) __riscv_vslidedown_vx_u8m1_tu(__VA_ARGS__)

#define	vslidedown_vx_u8m1_m(...) __riscv_vslidedown_vx_u8m1_tumu(__VA_ARGS__)

#define	vslidedown_vx_u8m2(...) __riscv_vslidedown_vx_u8m2_tu(__VA_ARGS__)

#define	vslidedown_vx_u8m2_m(...) __riscv_vslidedown_vx_u8m2_tumu(__VA_ARGS__)

#define	vslidedown_vx_u8m4(...) __riscv_vslidedown_vx_u8m4_tu(__VA_ARGS__)

#define	vslidedown_vx_u8m4_m(...) __riscv_vslidedown_vx_u8m4_tumu(__VA_ARGS__)

#define	vslidedown_vx_u8m8(...) __riscv_vslidedown_vx_u8m8_tu(__VA_ARGS__)

#define	vslidedown_vx_u8m8_m(...) __riscv_vslidedown_vx_u8m8_tumu(__VA_ARGS__)

#define	vslidedown_vx_u8mf2(...) __riscv_vslidedown_vx_u8mf2_tu(__VA_ARGS__)

#define	vslidedown_vx_u8mf2_m(...) __riscv_vslidedown_vx_u8mf2_tumu(__VA_ARGS__)

#define	vslidedown_vx_u8mf4(...) __riscv_vslidedown_vx_u8mf4_tu(__VA_ARGS__)

#define	vslidedown_vx_u8mf4_m(...) __riscv_vslidedown_vx_u8mf4_tumu(__VA_ARGS__)

#define	vslidedown_vx_u8mf8(...) __riscv_vslidedown_vx_u8mf8_tu(__VA_ARGS__)

#define	vslidedown_vx_u8mf8_m(...) __riscv_vslidedown_vx_u8mf8_tumu(__VA_ARGS__)

#define	vslideup_vx_f16m1(...) __riscv_vslideup_vx_f16m1_tu(__VA_ARGS__)

#define	vslideup_vx_f16m1_m(...) __riscv_vslideup_vx_f16m1_tumu(__VA_ARGS__)

#define	vslideup_vx_f16m2(...) __riscv_vslideup_vx_f16m2_tu(__VA_ARGS__)

#define	vslideup_vx_f16m2_m(...) __riscv_vslideup_vx_f16m2_tumu(__VA_ARGS__)

#define	vslideup_vx_f16m4(...) __riscv_vslideup_vx_f16m4_tu(__VA_ARGS__)

#define	vslideup_vx_f16m4_m(...) __riscv_vslideup_vx_f16m4_tumu(__VA_ARGS__)

#define	vslideup_vx_f16m8(...) __riscv_vslideup_vx_f16m8_tu(__VA_ARGS__)

#define	vslideup_vx_f16m8_m(...) __riscv_vslideup_vx_f16m8_tumu(__VA_ARGS__)

#define	vslideup_vx_f16mf2(...) __riscv_vslideup_vx_f16mf2_tu(__VA_ARGS__)

#define	vslideup_vx_f16mf2_m(...) __riscv_vslideup_vx_f16mf2_tumu(__VA_ARGS__)

#define	vslideup_vx_f16mf4(...) __riscv_vslideup_vx_f16mf4_tu(__VA_ARGS__)

#define	vslideup_vx_f16mf4_m(...) __riscv_vslideup_vx_f16mf4_tumu(__VA_ARGS__)

#define	vslideup_vx_f32m1(...) __riscv_vslideup_vx_f32m1_tu(__VA_ARGS__)

#define	vslideup_vx_f32m1_m(...) __riscv_vslideup_vx_f32m1_tumu(__VA_ARGS__)

#define	vslideup_vx_f32m2(...) __riscv_vslideup_vx_f32m2_tu(__VA_ARGS__)

#define	vslideup_vx_f32m2_m(...) __riscv_vslideup_vx_f32m2_tumu(__VA_ARGS__)

#define	vslideup_vx_f32m4(...) __riscv_vslideup_vx_f32m4_tu(__VA_ARGS__)

#define	vslideup_vx_f32m4_m(...) __riscv_vslideup_vx_f32m4_tumu(__VA_ARGS__)

#define	vslideup_vx_f32m8(...) __riscv_vslideup_vx_f32m8_tu(__VA_ARGS__)

#define	vslideup_vx_f32m8_m(...) __riscv_vslideup_vx_f32m8_tumu(__VA_ARGS__)

#define	vslideup_vx_f32mf2(...) __riscv_vslideup_vx_f32mf2_tu(__VA_ARGS__)

#define	vslideup_vx_f32mf2_m(...) __riscv_vslideup_vx_f32mf2_tumu(__VA_ARGS__)

#define	vslideup_vx_f64m1(...) __riscv_vslideup_vx_f64m1_tu(__VA_ARGS__)

#define	vslideup_vx_f64m1_m(...) __riscv_vslideup_vx_f64m1_tumu(__VA_ARGS__)

#define	vslideup_vx_f64m2(...) __riscv_vslideup_vx_f64m2_tu(__VA_ARGS__)

#define	vslideup_vx_f64m2_m(...) __riscv_vslideup_vx_f64m2_tumu(__VA_ARGS__)

#define	vslideup_vx_f64m4(...) __riscv_vslideup_vx_f64m4_tu(__VA_ARGS__)

#define	vslideup_vx_f64m4_m(...) __riscv_vslideup_vx_f64m4_tumu(__VA_ARGS__)

#define	vslideup_vx_f64m8(...) __riscv_vslideup_vx_f64m8_tu(__VA_ARGS__)

#define	vslideup_vx_f64m8_m(...) __riscv_vslideup_vx_f64m8_tumu(__VA_ARGS__)

#define	vslideup_vx_i16m1(...) __riscv_vslideup_vx_i16m1_tu(__VA_ARGS__)

#define	vslideup_vx_i16m1_m(...) __riscv_vslideup_vx_i16m1_tumu(__VA_ARGS__)

#define	vslideup_vx_i16m2(...) __riscv_vslideup_vx_i16m2_tu(__VA_ARGS__)

#define	vslideup_vx_i16m2_m(...) __riscv_vslideup_vx_i16m2_tumu(__VA_ARGS__)

#define	vslideup_vx_i16m4(...) __riscv_vslideup_vx_i16m4_tu(__VA_ARGS__)

#define	vslideup_vx_i16m4_m(...) __riscv_vslideup_vx_i16m4_tumu(__VA_ARGS__)

#define	vslideup_vx_i16m8(...) __riscv_vslideup_vx_i16m8_tu(__VA_ARGS__)

#define	vslideup_vx_i16m8_m(...) __riscv_vslideup_vx_i16m8_tumu(__VA_ARGS__)

#define	vslideup_vx_i16mf2(...) __riscv_vslideup_vx_i16mf2_tu(__VA_ARGS__)

#define	vslideup_vx_i16mf2_m(...) __riscv_vslideup_vx_i16mf2_tumu(__VA_ARGS__)

#define	vslideup_vx_i16mf4(...) __riscv_vslideup_vx_i16mf4_tu(__VA_ARGS__)

#define	vslideup_vx_i16mf4_m(...) __riscv_vslideup_vx_i16mf4_tumu(__VA_ARGS__)

#define	vslideup_vx_i32m1(...) __riscv_vslideup_vx_i32m1_tu(__VA_ARGS__)

#define	vslideup_vx_i32m1_m(...) __riscv_vslideup_vx_i32m1_tumu(__VA_ARGS__)

#define	vslideup_vx_i32m2(...) __riscv_vslideup_vx_i32m2_tu(__VA_ARGS__)

#define	vslideup_vx_i32m2_m(...) __riscv_vslideup_vx_i32m2_tumu(__VA_ARGS__)

#define	vslideup_vx_i32m4(...) __riscv_vslideup_vx_i32m4_tu(__VA_ARGS__)

#define	vslideup_vx_i32m4_m(...) __riscv_vslideup_vx_i32m4_tumu(__VA_ARGS__)

#define	vslideup_vx_i32m8(...) __riscv_vslideup_vx_i32m8_tu(__VA_ARGS__)

#define	vslideup_vx_i32m8_m(...) __riscv_vslideup_vx_i32m8_tumu(__VA_ARGS__)

#define	vslideup_vx_i32mf2(...) __riscv_vslideup_vx_i32mf2_tu(__VA_ARGS__)

#define	vslideup_vx_i32mf2_m(...) __riscv_vslideup_vx_i32mf2_tumu(__VA_ARGS__)

#define	vslideup_vx_i64m1(...) __riscv_vslideup_vx_i64m1_tu(__VA_ARGS__)

#define	vslideup_vx_i64m1_m(...) __riscv_vslideup_vx_i64m1_tumu(__VA_ARGS__)

#define	vslideup_vx_i64m2(...) __riscv_vslideup_vx_i64m2_tu(__VA_ARGS__)

#define	vslideup_vx_i64m2_m(...) __riscv_vslideup_vx_i64m2_tumu(__VA_ARGS__)

#define	vslideup_vx_i64m4(...) __riscv_vslideup_vx_i64m4_tu(__VA_ARGS__)

#define	vslideup_vx_i64m4_m(...) __riscv_vslideup_vx_i64m4_tumu(__VA_ARGS__)

#define	vslideup_vx_i64m8(...) __riscv_vslideup_vx_i64m8_tu(__VA_ARGS__)

#define	vslideup_vx_i64m8_m(...) __riscv_vslideup_vx_i64m8_tumu(__VA_ARGS__)

#define	vslideup_vx_i8m1(...) __riscv_vslideup_vx_i8m1_tu(__VA_ARGS__)

#define	vslideup_vx_i8m1_m(...) __riscv_vslideup_vx_i8m1_tumu(__VA_ARGS__)

#define	vslideup_vx_i8m2(...) __riscv_vslideup_vx_i8m2_tu(__VA_ARGS__)

#define	vslideup_vx_i8m2_m(...) __riscv_vslideup_vx_i8m2_tumu(__VA_ARGS__)

#define	vslideup_vx_i8m4(...) __riscv_vslideup_vx_i8m4_tu(__VA_ARGS__)

#define	vslideup_vx_i8m4_m(...) __riscv_vslideup_vx_i8m4_tumu(__VA_ARGS__)

#define	vslideup_vx_i8m8(...) __riscv_vslideup_vx_i8m8_tu(__VA_ARGS__)

#define	vslideup_vx_i8m8_m(...) __riscv_vslideup_vx_i8m8_tumu(__VA_ARGS__)

#define	vslideup_vx_i8mf2(...) __riscv_vslideup_vx_i8mf2_tu(__VA_ARGS__)

#define	vslideup_vx_i8mf2_m(...) __riscv_vslideup_vx_i8mf2_tumu(__VA_ARGS__)

#define	vslideup_vx_i8mf4(...) __riscv_vslideup_vx_i8mf4_tu(__VA_ARGS__)

#define	vslideup_vx_i8mf4_m(...) __riscv_vslideup_vx_i8mf4_tumu(__VA_ARGS__)

#define	vslideup_vx_i8mf8(...) __riscv_vslideup_vx_i8mf8_tu(__VA_ARGS__)

#define	vslideup_vx_i8mf8_m(...) __riscv_vslideup_vx_i8mf8_tumu(__VA_ARGS__)

#define	vslideup_vx_u16m1(...) __riscv_vslideup_vx_u16m1_tu(__VA_ARGS__)

#define	vslideup_vx_u16m1_m(...) __riscv_vslideup_vx_u16m1_tumu(__VA_ARGS__)

#define	vslideup_vx_u16m2(...) __riscv_vslideup_vx_u16m2_tu(__VA_ARGS__)

#define	vslideup_vx_u16m2_m(...) __riscv_vslideup_vx_u16m2_tumu(__VA_ARGS__)

#define	vslideup_vx_u16m4(...) __riscv_vslideup_vx_u16m4_tu(__VA_ARGS__)

#define	vslideup_vx_u16m4_m(...) __riscv_vslideup_vx_u16m4_tumu(__VA_ARGS__)

#define	vslideup_vx_u16m8(...) __riscv_vslideup_vx_u16m8_tu(__VA_ARGS__)

#define	vslideup_vx_u16m8_m(...) __riscv_vslideup_vx_u16m8_tumu(__VA_ARGS__)

#define	vslideup_vx_u16mf2(...) __riscv_vslideup_vx_u16mf2_tu(__VA_ARGS__)

#define	vslideup_vx_u16mf2_m(...) __riscv_vslideup_vx_u16mf2_tumu(__VA_ARGS__)

#define	vslideup_vx_u16mf4(...) __riscv_vslideup_vx_u16mf4_tu(__VA_ARGS__)

#define	vslideup_vx_u16mf4_m(...) __riscv_vslideup_vx_u16mf4_tumu(__VA_ARGS__)

#define	vslideup_vx_u32m1(...) __riscv_vslideup_vx_u32m1_tu(__VA_ARGS__)

#define	vslideup_vx_u32m1_m(...) __riscv_vslideup_vx_u32m1_tumu(__VA_ARGS__)

#define	vslideup_vx_u32m2(...) __riscv_vslideup_vx_u32m2_tu(__VA_ARGS__)

#define	vslideup_vx_u32m2_m(...) __riscv_vslideup_vx_u32m2_tumu(__VA_ARGS__)

#define	vslideup_vx_u32m4(...) __riscv_vslideup_vx_u32m4_tu(__VA_ARGS__)

#define	vslideup_vx_u32m4_m(...) __riscv_vslideup_vx_u32m4_tumu(__VA_ARGS__)

#define	vslideup_vx_u32m8(...) __riscv_vslideup_vx_u32m8_tu(__VA_ARGS__)

#define	vslideup_vx_u32m8_m(...) __riscv_vslideup_vx_u32m8_tumu(__VA_ARGS__)

#define	vslideup_vx_u32mf2(...) __riscv_vslideup_vx_u32mf2_tu(__VA_ARGS__)

#define	vslideup_vx_u32mf2_m(...) __riscv_vslideup_vx_u32mf2_tumu(__VA_ARGS__)

#define	vslideup_vx_u64m1(...) __riscv_vslideup_vx_u64m1_tu(__VA_ARGS__)

#define	vslideup_vx_u64m1_m(...) __riscv_vslideup_vx_u64m1_tumu(__VA_ARGS__)

#define	vslideup_vx_u64m2(...) __riscv_vslideup_vx_u64m2_tu(__VA_ARGS__)

#define	vslideup_vx_u64m2_m(...) __riscv_vslideup_vx_u64m2_tumu(__VA_ARGS__)

#define	vslideup_vx_u64m4(...) __riscv_vslideup_vx_u64m4_tu(__VA_ARGS__)

#define	vslideup_vx_u64m4_m(...) __riscv_vslideup_vx_u64m4_tumu(__VA_ARGS__)

#define	vslideup_vx_u64m8(...) __riscv_vslideup_vx_u64m8_tu(__VA_ARGS__)

#define	vslideup_vx_u64m8_m(...) __riscv_vslideup_vx_u64m8_tumu(__VA_ARGS__)

#define	vslideup_vx_u8m1(...) __riscv_vslideup_vx_u8m1_tu(__VA_ARGS__)

#define	vslideup_vx_u8m1_m(...) __riscv_vslideup_vx_u8m1_tumu(__VA_ARGS__)

#define	vslideup_vx_u8m2(...) __riscv_vslideup_vx_u8m2_tu(__VA_ARGS__)

#define	vslideup_vx_u8m2_m(...) __riscv_vslideup_vx_u8m2_tumu(__VA_ARGS__)

#define	vslideup_vx_u8m4(...) __riscv_vslideup_vx_u8m4_tu(__VA_ARGS__)

#define	vslideup_vx_u8m4_m(...) __riscv_vslideup_vx_u8m4_tumu(__VA_ARGS__)

#define	vslideup_vx_u8m8(...) __riscv_vslideup_vx_u8m8_tu(__VA_ARGS__)

#define	vslideup_vx_u8m8_m(...) __riscv_vslideup_vx_u8m8_tumu(__VA_ARGS__)

#define	vslideup_vx_u8mf2(...) __riscv_vslideup_vx_u8mf2_tu(__VA_ARGS__)

#define	vslideup_vx_u8mf2_m(...) __riscv_vslideup_vx_u8mf2_tumu(__VA_ARGS__)

#define	vslideup_vx_u8mf4(...) __riscv_vslideup_vx_u8mf4_tu(__VA_ARGS__)

#define	vslideup_vx_u8mf4_m(...) __riscv_vslideup_vx_u8mf4_tumu(__VA_ARGS__)

#define	vslideup_vx_u8mf8(...) __riscv_vslideup_vx_u8mf8_tu(__VA_ARGS__)

#define	vslideup_vx_u8mf8_m(...) __riscv_vslideup_vx_u8mf8_tumu(__VA_ARGS__)

#define	vsll_vv_i16m1(...) __riscv_vsll_vv_i16m1(__VA_ARGS__)

#define	vsll_vv_i16m1_m(...) __riscv_vsll_vv_i16m1_tumu(__VA_ARGS__)

#define	vsll_vv_i16m2(...) __riscv_vsll_vv_i16m2(__VA_ARGS__)

#define	vsll_vv_i16m2_m(...) __riscv_vsll_vv_i16m2_tumu(__VA_ARGS__)

#define	vsll_vv_i16m4(...) __riscv_vsll_vv_i16m4(__VA_ARGS__)

#define	vsll_vv_i16m4_m(...) __riscv_vsll_vv_i16m4_tumu(__VA_ARGS__)

#define	vsll_vv_i16m8(...) __riscv_vsll_vv_i16m8(__VA_ARGS__)

#define	vsll_vv_i16m8_m(...) __riscv_vsll_vv_i16m8_tumu(__VA_ARGS__)

#define	vsll_vv_i16mf2(...) __riscv_vsll_vv_i16mf2(__VA_ARGS__)

#define	vsll_vv_i16mf2_m(...) __riscv_vsll_vv_i16mf2_tumu(__VA_ARGS__)

#define	vsll_vv_i16mf4(...) __riscv_vsll_vv_i16mf4(__VA_ARGS__)

#define	vsll_vv_i16mf4_m(...) __riscv_vsll_vv_i16mf4_tumu(__VA_ARGS__)

#define	vsll_vv_i32m1(...) __riscv_vsll_vv_i32m1(__VA_ARGS__)

#define	vsll_vv_i32m1_m(...) __riscv_vsll_vv_i32m1_tumu(__VA_ARGS__)

#define	vsll_vv_i32m2(...) __riscv_vsll_vv_i32m2(__VA_ARGS__)

#define	vsll_vv_i32m2_m(...) __riscv_vsll_vv_i32m2_tumu(__VA_ARGS__)

#define	vsll_vv_i32m4(...) __riscv_vsll_vv_i32m4(__VA_ARGS__)

#define	vsll_vv_i32m4_m(...) __riscv_vsll_vv_i32m4_tumu(__VA_ARGS__)

#define	vsll_vv_i32m8(...) __riscv_vsll_vv_i32m8(__VA_ARGS__)

#define	vsll_vv_i32m8_m(...) __riscv_vsll_vv_i32m8_tumu(__VA_ARGS__)

#define	vsll_vv_i32mf2(...) __riscv_vsll_vv_i32mf2(__VA_ARGS__)

#define	vsll_vv_i32mf2_m(...) __riscv_vsll_vv_i32mf2_tumu(__VA_ARGS__)

#define	vsll_vv_i64m1(...) __riscv_vsll_vv_i64m1(__VA_ARGS__)

#define	vsll_vv_i64m1_m(...) __riscv_vsll_vv_i64m1_tumu(__VA_ARGS__)

#define	vsll_vv_i64m2(...) __riscv_vsll_vv_i64m2(__VA_ARGS__)

#define	vsll_vv_i64m2_m(...) __riscv_vsll_vv_i64m2_tumu(__VA_ARGS__)

#define	vsll_vv_i64m4(...) __riscv_vsll_vv_i64m4(__VA_ARGS__)

#define	vsll_vv_i64m4_m(...) __riscv_vsll_vv_i64m4_tumu(__VA_ARGS__)

#define	vsll_vv_i64m8(...) __riscv_vsll_vv_i64m8(__VA_ARGS__)

#define	vsll_vv_i64m8_m(...) __riscv_vsll_vv_i64m8_tumu(__VA_ARGS__)

#define	vsll_vv_i8m1(...) __riscv_vsll_vv_i8m1(__VA_ARGS__)

#define	vsll_vv_i8m1_m(...) __riscv_vsll_vv_i8m1_tumu(__VA_ARGS__)

#define	vsll_vv_i8m2(...) __riscv_vsll_vv_i8m2(__VA_ARGS__)

#define	vsll_vv_i8m2_m(...) __riscv_vsll_vv_i8m2_tumu(__VA_ARGS__)

#define	vsll_vv_i8m4(...) __riscv_vsll_vv_i8m4(__VA_ARGS__)

#define	vsll_vv_i8m4_m(...) __riscv_vsll_vv_i8m4_tumu(__VA_ARGS__)

#define	vsll_vv_i8m8(...) __riscv_vsll_vv_i8m8(__VA_ARGS__)

#define	vsll_vv_i8m8_m(...) __riscv_vsll_vv_i8m8_tumu(__VA_ARGS__)

#define	vsll_vv_i8mf2(...) __riscv_vsll_vv_i8mf2(__VA_ARGS__)

#define	vsll_vv_i8mf2_m(...) __riscv_vsll_vv_i8mf2_tumu(__VA_ARGS__)

#define	vsll_vv_i8mf4(...) __riscv_vsll_vv_i8mf4(__VA_ARGS__)

#define	vsll_vv_i8mf4_m(...) __riscv_vsll_vv_i8mf4_tumu(__VA_ARGS__)

#define	vsll_vv_i8mf8(...) __riscv_vsll_vv_i8mf8(__VA_ARGS__)

#define	vsll_vv_i8mf8_m(...) __riscv_vsll_vv_i8mf8_tumu(__VA_ARGS__)

#define	vsll_vv_u16m1(...) __riscv_vsll_vv_u16m1(__VA_ARGS__)

#define	vsll_vv_u16m1_m(...) __riscv_vsll_vv_u16m1_tumu(__VA_ARGS__)

#define	vsll_vv_u16m2(...) __riscv_vsll_vv_u16m2(__VA_ARGS__)

#define	vsll_vv_u16m2_m(...) __riscv_vsll_vv_u16m2_tumu(__VA_ARGS__)

#define	vsll_vv_u16m4(...) __riscv_vsll_vv_u16m4(__VA_ARGS__)

#define	vsll_vv_u16m4_m(...) __riscv_vsll_vv_u16m4_tumu(__VA_ARGS__)

#define	vsll_vv_u16m8(...) __riscv_vsll_vv_u16m8(__VA_ARGS__)

#define	vsll_vv_u16m8_m(...) __riscv_vsll_vv_u16m8_tumu(__VA_ARGS__)

#define	vsll_vv_u16mf2(...) __riscv_vsll_vv_u16mf2(__VA_ARGS__)

#define	vsll_vv_u16mf2_m(...) __riscv_vsll_vv_u16mf2_tumu(__VA_ARGS__)

#define	vsll_vv_u16mf4(...) __riscv_vsll_vv_u16mf4(__VA_ARGS__)

#define	vsll_vv_u16mf4_m(...) __riscv_vsll_vv_u16mf4_tumu(__VA_ARGS__)

#define	vsll_vv_u32m1(...) __riscv_vsll_vv_u32m1(__VA_ARGS__)

#define	vsll_vv_u32m1_m(...) __riscv_vsll_vv_u32m1_tumu(__VA_ARGS__)

#define	vsll_vv_u32m2(...) __riscv_vsll_vv_u32m2(__VA_ARGS__)

#define	vsll_vv_u32m2_m(...) __riscv_vsll_vv_u32m2_tumu(__VA_ARGS__)

#define	vsll_vv_u32m4(...) __riscv_vsll_vv_u32m4(__VA_ARGS__)

#define	vsll_vv_u32m4_m(...) __riscv_vsll_vv_u32m4_tumu(__VA_ARGS__)

#define	vsll_vv_u32m8(...) __riscv_vsll_vv_u32m8(__VA_ARGS__)

#define	vsll_vv_u32m8_m(...) __riscv_vsll_vv_u32m8_tumu(__VA_ARGS__)

#define	vsll_vv_u32mf2(...) __riscv_vsll_vv_u32mf2(__VA_ARGS__)

#define	vsll_vv_u32mf2_m(...) __riscv_vsll_vv_u32mf2_tumu(__VA_ARGS__)

#define	vsll_vv_u64m1(...) __riscv_vsll_vv_u64m1(__VA_ARGS__)

#define	vsll_vv_u64m1_m(...) __riscv_vsll_vv_u64m1_tumu(__VA_ARGS__)

#define	vsll_vv_u64m2(...) __riscv_vsll_vv_u64m2(__VA_ARGS__)

#define	vsll_vv_u64m2_m(...) __riscv_vsll_vv_u64m2_tumu(__VA_ARGS__)

#define	vsll_vv_u64m4(...) __riscv_vsll_vv_u64m4(__VA_ARGS__)

#define	vsll_vv_u64m4_m(...) __riscv_vsll_vv_u64m4_tumu(__VA_ARGS__)

#define	vsll_vv_u64m8(...) __riscv_vsll_vv_u64m8(__VA_ARGS__)

#define	vsll_vv_u64m8_m(...) __riscv_vsll_vv_u64m8_tumu(__VA_ARGS__)

#define	vsll_vv_u8m1(...) __riscv_vsll_vv_u8m1(__VA_ARGS__)

#define	vsll_vv_u8m1_m(...) __riscv_vsll_vv_u8m1_tumu(__VA_ARGS__)

#define	vsll_vv_u8m2(...) __riscv_vsll_vv_u8m2(__VA_ARGS__)

#define	vsll_vv_u8m2_m(...) __riscv_vsll_vv_u8m2_tumu(__VA_ARGS__)

#define	vsll_vv_u8m4(...) __riscv_vsll_vv_u8m4(__VA_ARGS__)

#define	vsll_vv_u8m4_m(...) __riscv_vsll_vv_u8m4_tumu(__VA_ARGS__)

#define	vsll_vv_u8m8(...) __riscv_vsll_vv_u8m8(__VA_ARGS__)

#define	vsll_vv_u8m8_m(...) __riscv_vsll_vv_u8m8_tumu(__VA_ARGS__)

#define	vsll_vv_u8mf2(...) __riscv_vsll_vv_u8mf2(__VA_ARGS__)

#define	vsll_vv_u8mf2_m(...) __riscv_vsll_vv_u8mf2_tumu(__VA_ARGS__)

#define	vsll_vv_u8mf4(...) __riscv_vsll_vv_u8mf4(__VA_ARGS__)

#define	vsll_vv_u8mf4_m(...) __riscv_vsll_vv_u8mf4_tumu(__VA_ARGS__)

#define	vsll_vv_u8mf8(...) __riscv_vsll_vv_u8mf8(__VA_ARGS__)

#define	vsll_vv_u8mf8_m(...) __riscv_vsll_vv_u8mf8_tumu(__VA_ARGS__)

#define	vsll_vx_i16m1(...) __riscv_vsll_vx_i16m1(__VA_ARGS__)

#define	vsll_vx_i16m1_m(...) __riscv_vsll_vx_i16m1_tumu(__VA_ARGS__)

#define	vsll_vx_i16m2(...) __riscv_vsll_vx_i16m2(__VA_ARGS__)

#define	vsll_vx_i16m2_m(...) __riscv_vsll_vx_i16m2_tumu(__VA_ARGS__)

#define	vsll_vx_i16m4(...) __riscv_vsll_vx_i16m4(__VA_ARGS__)

#define	vsll_vx_i16m4_m(...) __riscv_vsll_vx_i16m4_tumu(__VA_ARGS__)

#define	vsll_vx_i16m8(...) __riscv_vsll_vx_i16m8(__VA_ARGS__)

#define	vsll_vx_i16m8_m(...) __riscv_vsll_vx_i16m8_tumu(__VA_ARGS__)

#define	vsll_vx_i16mf2(...) __riscv_vsll_vx_i16mf2(__VA_ARGS__)

#define	vsll_vx_i16mf2_m(...) __riscv_vsll_vx_i16mf2_tumu(__VA_ARGS__)

#define	vsll_vx_i16mf4(...) __riscv_vsll_vx_i16mf4(__VA_ARGS__)

#define	vsll_vx_i16mf4_m(...) __riscv_vsll_vx_i16mf4_tumu(__VA_ARGS__)

#define	vsll_vx_i32m1(...) __riscv_vsll_vx_i32m1(__VA_ARGS__)

#define	vsll_vx_i32m1_m(...) __riscv_vsll_vx_i32m1_tumu(__VA_ARGS__)

#define	vsll_vx_i32m2(...) __riscv_vsll_vx_i32m2(__VA_ARGS__)

#define	vsll_vx_i32m2_m(...) __riscv_vsll_vx_i32m2_tumu(__VA_ARGS__)

#define	vsll_vx_i32m4(...) __riscv_vsll_vx_i32m4(__VA_ARGS__)

#define	vsll_vx_i32m4_m(...) __riscv_vsll_vx_i32m4_tumu(__VA_ARGS__)

#define	vsll_vx_i32m8(...) __riscv_vsll_vx_i32m8(__VA_ARGS__)

#define	vsll_vx_i32m8_m(...) __riscv_vsll_vx_i32m8_tumu(__VA_ARGS__)

#define	vsll_vx_i32mf2(...) __riscv_vsll_vx_i32mf2(__VA_ARGS__)

#define	vsll_vx_i32mf2_m(...) __riscv_vsll_vx_i32mf2_tumu(__VA_ARGS__)

#define	vsll_vx_i64m1(...) __riscv_vsll_vx_i64m1(__VA_ARGS__)

#define	vsll_vx_i64m1_m(...) __riscv_vsll_vx_i64m1_tumu(__VA_ARGS__)

#define	vsll_vx_i64m2(...) __riscv_vsll_vx_i64m2(__VA_ARGS__)

#define	vsll_vx_i64m2_m(...) __riscv_vsll_vx_i64m2_tumu(__VA_ARGS__)

#define	vsll_vx_i64m4(...) __riscv_vsll_vx_i64m4(__VA_ARGS__)

#define	vsll_vx_i64m4_m(...) __riscv_vsll_vx_i64m4_tumu(__VA_ARGS__)

#define	vsll_vx_i64m8(...) __riscv_vsll_vx_i64m8(__VA_ARGS__)

#define	vsll_vx_i64m8_m(...) __riscv_vsll_vx_i64m8_tumu(__VA_ARGS__)

#define	vsll_vx_i8m1(...) __riscv_vsll_vx_i8m1(__VA_ARGS__)

#define	vsll_vx_i8m1_m(...) __riscv_vsll_vx_i8m1_tumu(__VA_ARGS__)

#define	vsll_vx_i8m2(...) __riscv_vsll_vx_i8m2(__VA_ARGS__)

#define	vsll_vx_i8m2_m(...) __riscv_vsll_vx_i8m2_tumu(__VA_ARGS__)

#define	vsll_vx_i8m4(...) __riscv_vsll_vx_i8m4(__VA_ARGS__)

#define	vsll_vx_i8m4_m(...) __riscv_vsll_vx_i8m4_tumu(__VA_ARGS__)

#define	vsll_vx_i8m8(...) __riscv_vsll_vx_i8m8(__VA_ARGS__)

#define	vsll_vx_i8m8_m(...) __riscv_vsll_vx_i8m8_tumu(__VA_ARGS__)

#define	vsll_vx_i8mf2(...) __riscv_vsll_vx_i8mf2(__VA_ARGS__)

#define	vsll_vx_i8mf2_m(...) __riscv_vsll_vx_i8mf2_tumu(__VA_ARGS__)

#define	vsll_vx_i8mf4(...) __riscv_vsll_vx_i8mf4(__VA_ARGS__)

#define	vsll_vx_i8mf4_m(...) __riscv_vsll_vx_i8mf4_tumu(__VA_ARGS__)

#define	vsll_vx_i8mf8(...) __riscv_vsll_vx_i8mf8(__VA_ARGS__)

#define	vsll_vx_i8mf8_m(...) __riscv_vsll_vx_i8mf8_tumu(__VA_ARGS__)

#define	vsll_vx_u16m1(...) __riscv_vsll_vx_u16m1(__VA_ARGS__)

#define	vsll_vx_u16m1_m(...) __riscv_vsll_vx_u16m1_tumu(__VA_ARGS__)

#define	vsll_vx_u16m2(...) __riscv_vsll_vx_u16m2(__VA_ARGS__)

#define	vsll_vx_u16m2_m(...) __riscv_vsll_vx_u16m2_tumu(__VA_ARGS__)

#define	vsll_vx_u16m4(...) __riscv_vsll_vx_u16m4(__VA_ARGS__)

#define	vsll_vx_u16m4_m(...) __riscv_vsll_vx_u16m4_tumu(__VA_ARGS__)

#define	vsll_vx_u16m8(...) __riscv_vsll_vx_u16m8(__VA_ARGS__)

#define	vsll_vx_u16m8_m(...) __riscv_vsll_vx_u16m8_tumu(__VA_ARGS__)

#define	vsll_vx_u16mf2(...) __riscv_vsll_vx_u16mf2(__VA_ARGS__)

#define	vsll_vx_u16mf2_m(...) __riscv_vsll_vx_u16mf2_tumu(__VA_ARGS__)

#define	vsll_vx_u16mf4(...) __riscv_vsll_vx_u16mf4(__VA_ARGS__)

#define	vsll_vx_u16mf4_m(...) __riscv_vsll_vx_u16mf4_tumu(__VA_ARGS__)

#define	vsll_vx_u32m1(...) __riscv_vsll_vx_u32m1(__VA_ARGS__)

#define	vsll_vx_u32m1_m(...) __riscv_vsll_vx_u32m1_tumu(__VA_ARGS__)

#define	vsll_vx_u32m2(...) __riscv_vsll_vx_u32m2(__VA_ARGS__)

#define	vsll_vx_u32m2_m(...) __riscv_vsll_vx_u32m2_tumu(__VA_ARGS__)

#define	vsll_vx_u32m4(...) __riscv_vsll_vx_u32m4(__VA_ARGS__)

#define	vsll_vx_u32m4_m(...) __riscv_vsll_vx_u32m4_tumu(__VA_ARGS__)

#define	vsll_vx_u32m8(...) __riscv_vsll_vx_u32m8(__VA_ARGS__)

#define	vsll_vx_u32m8_m(...) __riscv_vsll_vx_u32m8_tumu(__VA_ARGS__)

#define	vsll_vx_u32mf2(...) __riscv_vsll_vx_u32mf2(__VA_ARGS__)

#define	vsll_vx_u32mf2_m(...) __riscv_vsll_vx_u32mf2_tumu(__VA_ARGS__)

#define	vsll_vx_u64m1(...) __riscv_vsll_vx_u64m1(__VA_ARGS__)

#define	vsll_vx_u64m1_m(...) __riscv_vsll_vx_u64m1_tumu(__VA_ARGS__)

#define	vsll_vx_u64m2(...) __riscv_vsll_vx_u64m2(__VA_ARGS__)

#define	vsll_vx_u64m2_m(...) __riscv_vsll_vx_u64m2_tumu(__VA_ARGS__)

#define	vsll_vx_u64m4(...) __riscv_vsll_vx_u64m4(__VA_ARGS__)

#define	vsll_vx_u64m4_m(...) __riscv_vsll_vx_u64m4_tumu(__VA_ARGS__)

#define	vsll_vx_u64m8(...) __riscv_vsll_vx_u64m8(__VA_ARGS__)

#define	vsll_vx_u64m8_m(...) __riscv_vsll_vx_u64m8_tumu(__VA_ARGS__)

#define	vsll_vx_u8m1(...) __riscv_vsll_vx_u8m1(__VA_ARGS__)

#define	vsll_vx_u8m1_m(...) __riscv_vsll_vx_u8m1_tumu(__VA_ARGS__)

#define	vsll_vx_u8m2(...) __riscv_vsll_vx_u8m2(__VA_ARGS__)

#define	vsll_vx_u8m2_m(...) __riscv_vsll_vx_u8m2_tumu(__VA_ARGS__)

#define	vsll_vx_u8m4(...) __riscv_vsll_vx_u8m4(__VA_ARGS__)

#define	vsll_vx_u8m4_m(...) __riscv_vsll_vx_u8m4_tumu(__VA_ARGS__)

#define	vsll_vx_u8m8(...) __riscv_vsll_vx_u8m8(__VA_ARGS__)

#define	vsll_vx_u8m8_m(...) __riscv_vsll_vx_u8m8_tumu(__VA_ARGS__)

#define	vsll_vx_u8mf2(...) __riscv_vsll_vx_u8mf2(__VA_ARGS__)

#define	vsll_vx_u8mf2_m(...) __riscv_vsll_vx_u8mf2_tumu(__VA_ARGS__)

#define	vsll_vx_u8mf4(...) __riscv_vsll_vx_u8mf4(__VA_ARGS__)

#define	vsll_vx_u8mf4_m(...) __riscv_vsll_vx_u8mf4_tumu(__VA_ARGS__)

#define	vsll_vx_u8mf8(...) __riscv_vsll_vx_u8mf8(__VA_ARGS__)

#define	vsll_vx_u8mf8_m(...) __riscv_vsll_vx_u8mf8_tumu(__VA_ARGS__)

#define	vsm_v_b1(...) __riscv_vsm_v_b1(__VA_ARGS__)

#define	vsm_v_b16(...) __riscv_vsm_v_b16(__VA_ARGS__)

#define	vsm_v_b2(...) __riscv_vsm_v_b2(__VA_ARGS__)

#define	vsm_v_b32(...) __riscv_vsm_v_b32(__VA_ARGS__)

#define	vsm_v_b4(...) __riscv_vsm_v_b4(__VA_ARGS__)

#define	vsm_v_b64(...) __riscv_vsm_v_b64(__VA_ARGS__)

#define	vsm_v_b8(...) __riscv_vsm_v_b8(__VA_ARGS__)

#define	vsmul_vv_i16m1(...) __riscv_vsmul_vv_i16m1(__VA_ARGS__)

#define	vsmul_vv_i16m1_m(...) __riscv_vsmul_vv_i16m1_mu(__VA_ARGS__)

#define	vsmul_vv_i16m2(...) __riscv_vsmul_vv_i16m2(__VA_ARGS__)

#define	vsmul_vv_i16m2_m(...) __riscv_vsmul_vv_i16m2_mu(__VA_ARGS__)

#define	vsmul_vv_i16m4(...) __riscv_vsmul_vv_i16m4(__VA_ARGS__)

#define	vsmul_vv_i16m4_m(...) __riscv_vsmul_vv_i16m4_mu(__VA_ARGS__)

#define	vsmul_vv_i16m8(...) __riscv_vsmul_vv_i16m8(__VA_ARGS__)

#define	vsmul_vv_i16m8_m(...) __riscv_vsmul_vv_i16m8_mu(__VA_ARGS__)

#define	vsmul_vv_i16mf2(...) __riscv_vsmul_vv_i16mf2(__VA_ARGS__)

#define	vsmul_vv_i16mf2_m(...) __riscv_vsmul_vv_i16mf2_mu(__VA_ARGS__)

#define	vsmul_vv_i16mf4(...) __riscv_vsmul_vv_i16mf4(__VA_ARGS__)

#define	vsmul_vv_i16mf4_m(...) __riscv_vsmul_vv_i16mf4_mu(__VA_ARGS__)

#define	vsmul_vv_i32m1(...) __riscv_vsmul_vv_i32m1(__VA_ARGS__)

#define	vsmul_vv_i32m1_m(...) __riscv_vsmul_vv_i32m1_mu(__VA_ARGS__)

#define	vsmul_vv_i32m2(...) __riscv_vsmul_vv_i32m2(__VA_ARGS__)

#define	vsmul_vv_i32m2_m(...) __riscv_vsmul_vv_i32m2_mu(__VA_ARGS__)

#define	vsmul_vv_i32m4(...) __riscv_vsmul_vv_i32m4(__VA_ARGS__)

#define	vsmul_vv_i32m4_m(...) __riscv_vsmul_vv_i32m4_mu(__VA_ARGS__)

#define	vsmul_vv_i32m8(...) __riscv_vsmul_vv_i32m8(__VA_ARGS__)

#define	vsmul_vv_i32m8_m(...) __riscv_vsmul_vv_i32m8_mu(__VA_ARGS__)

#define	vsmul_vv_i32mf2(...) __riscv_vsmul_vv_i32mf2(__VA_ARGS__)

#define	vsmul_vv_i32mf2_m(...) __riscv_vsmul_vv_i32mf2_mu(__VA_ARGS__)

#define	vsmul_vv_i64m1(...) __riscv_vsmul_vv_i64m1(__VA_ARGS__)

#define	vsmul_vv_i64m1_m(...) __riscv_vsmul_vv_i64m1_mu(__VA_ARGS__)

#define	vsmul_vv_i64m2(...) __riscv_vsmul_vv_i64m2(__VA_ARGS__)

#define	vsmul_vv_i64m2_m(...) __riscv_vsmul_vv_i64m2_mu(__VA_ARGS__)

#define	vsmul_vv_i64m4(...) __riscv_vsmul_vv_i64m4(__VA_ARGS__)

#define	vsmul_vv_i64m4_m(...) __riscv_vsmul_vv_i64m4_mu(__VA_ARGS__)

#define	vsmul_vv_i64m8(...) __riscv_vsmul_vv_i64m8(__VA_ARGS__)

#define	vsmul_vv_i64m8_m(...) __riscv_vsmul_vv_i64m8_mu(__VA_ARGS__)

#define	vsmul_vv_i8m1(...) __riscv_vsmul_vv_i8m1(__VA_ARGS__)

#define	vsmul_vv_i8m1_m(...) __riscv_vsmul_vv_i8m1_mu(__VA_ARGS__)

#define	vsmul_vv_i8m2(...) __riscv_vsmul_vv_i8m2(__VA_ARGS__)

#define	vsmul_vv_i8m2_m(...) __riscv_vsmul_vv_i8m2_mu(__VA_ARGS__)

#define	vsmul_vv_i8m4(...) __riscv_vsmul_vv_i8m4(__VA_ARGS__)

#define	vsmul_vv_i8m4_m(...) __riscv_vsmul_vv_i8m4_mu(__VA_ARGS__)

#define	vsmul_vv_i8m8(...) __riscv_vsmul_vv_i8m8(__VA_ARGS__)

#define	vsmul_vv_i8m8_m(...) __riscv_vsmul_vv_i8m8_mu(__VA_ARGS__)

#define	vsmul_vv_i8mf2(...) __riscv_vsmul_vv_i8mf2(__VA_ARGS__)

#define	vsmul_vv_i8mf2_m(...) __riscv_vsmul_vv_i8mf2_mu(__VA_ARGS__)

#define	vsmul_vv_i8mf4(...) __riscv_vsmul_vv_i8mf4(__VA_ARGS__)

#define	vsmul_vv_i8mf4_m(...) __riscv_vsmul_vv_i8mf4_mu(__VA_ARGS__)

#define	vsmul_vv_i8mf8(...) __riscv_vsmul_vv_i8mf8(__VA_ARGS__)

#define	vsmul_vv_i8mf8_m(...) __riscv_vsmul_vv_i8mf8_mu(__VA_ARGS__)

#define	vsmul_vx_i16m1(...) __riscv_vsmul_vx_i16m1(__VA_ARGS__)

#define	vsmul_vx_i16m1_m(...) __riscv_vsmul_vx_i16m1_mu(__VA_ARGS__)

#define	vsmul_vx_i16m2(...) __riscv_vsmul_vx_i16m2(__VA_ARGS__)

#define	vsmul_vx_i16m2_m(...) __riscv_vsmul_vx_i16m2_mu(__VA_ARGS__)

#define	vsmul_vx_i16m4(...) __riscv_vsmul_vx_i16m4(__VA_ARGS__)

#define	vsmul_vx_i16m4_m(...) __riscv_vsmul_vx_i16m4_mu(__VA_ARGS__)

#define	vsmul_vx_i16m8(...) __riscv_vsmul_vx_i16m8(__VA_ARGS__)

#define	vsmul_vx_i16m8_m(...) __riscv_vsmul_vx_i16m8_mu(__VA_ARGS__)

#define	vsmul_vx_i16mf2(...) __riscv_vsmul_vx_i16mf2(__VA_ARGS__)

#define	vsmul_vx_i16mf2_m(...) __riscv_vsmul_vx_i16mf2_mu(__VA_ARGS__)

#define	vsmul_vx_i16mf4(...) __riscv_vsmul_vx_i16mf4(__VA_ARGS__)

#define	vsmul_vx_i16mf4_m(...) __riscv_vsmul_vx_i16mf4_mu(__VA_ARGS__)

#define	vsmul_vx_i32m1(...) __riscv_vsmul_vx_i32m1(__VA_ARGS__)

#define	vsmul_vx_i32m1_m(...) __riscv_vsmul_vx_i32m1_mu(__VA_ARGS__)

#define	vsmul_vx_i32m2(...) __riscv_vsmul_vx_i32m2(__VA_ARGS__)

#define	vsmul_vx_i32m2_m(...) __riscv_vsmul_vx_i32m2_mu(__VA_ARGS__)

#define	vsmul_vx_i32m4(...) __riscv_vsmul_vx_i32m4(__VA_ARGS__)

#define	vsmul_vx_i32m4_m(...) __riscv_vsmul_vx_i32m4_mu(__VA_ARGS__)

#define	vsmul_vx_i32m8(...) __riscv_vsmul_vx_i32m8(__VA_ARGS__)

#define	vsmul_vx_i32m8_m(...) __riscv_vsmul_vx_i32m8_mu(__VA_ARGS__)

#define	vsmul_vx_i32mf2(...) __riscv_vsmul_vx_i32mf2(__VA_ARGS__)

#define	vsmul_vx_i32mf2_m(...) __riscv_vsmul_vx_i32mf2_mu(__VA_ARGS__)

#define	vsmul_vx_i64m1(...) __riscv_vsmul_vx_i64m1(__VA_ARGS__)

#define	vsmul_vx_i64m1_m(...) __riscv_vsmul_vx_i64m1_mu(__VA_ARGS__)

#define	vsmul_vx_i64m2(...) __riscv_vsmul_vx_i64m2(__VA_ARGS__)

#define	vsmul_vx_i64m2_m(...) __riscv_vsmul_vx_i64m2_mu(__VA_ARGS__)

#define	vsmul_vx_i64m4(...) __riscv_vsmul_vx_i64m4(__VA_ARGS__)

#define	vsmul_vx_i64m4_m(...) __riscv_vsmul_vx_i64m4_mu(__VA_ARGS__)

#define	vsmul_vx_i64m8(...) __riscv_vsmul_vx_i64m8(__VA_ARGS__)

#define	vsmul_vx_i64m8_m(...) __riscv_vsmul_vx_i64m8_mu(__VA_ARGS__)

#define	vsmul_vx_i8m1(...) __riscv_vsmul_vx_i8m1(__VA_ARGS__)

#define	vsmul_vx_i8m1_m(...) __riscv_vsmul_vx_i8m1_mu(__VA_ARGS__)

#define	vsmul_vx_i8m2(...) __riscv_vsmul_vx_i8m2(__VA_ARGS__)

#define	vsmul_vx_i8m2_m(...) __riscv_vsmul_vx_i8m2_mu(__VA_ARGS__)

#define	vsmul_vx_i8m4(...) __riscv_vsmul_vx_i8m4(__VA_ARGS__)

#define	vsmul_vx_i8m4_m(...) __riscv_vsmul_vx_i8m4_mu(__VA_ARGS__)

#define	vsmul_vx_i8m8(...) __riscv_vsmul_vx_i8m8(__VA_ARGS__)

#define	vsmul_vx_i8m8_m(...) __riscv_vsmul_vx_i8m8_mu(__VA_ARGS__)

#define	vsmul_vx_i8mf2(...) __riscv_vsmul_vx_i8mf2(__VA_ARGS__)

#define	vsmul_vx_i8mf2_m(...) __riscv_vsmul_vx_i8mf2_mu(__VA_ARGS__)

#define	vsmul_vx_i8mf4(...) __riscv_vsmul_vx_i8mf4(__VA_ARGS__)

#define	vsmul_vx_i8mf4_m(...) __riscv_vsmul_vx_i8mf4_mu(__VA_ARGS__)

#define	vsmul_vx_i8mf8(...) __riscv_vsmul_vx_i8mf8(__VA_ARGS__)

#define	vsmul_vx_i8mf8_m(...) __riscv_vsmul_vx_i8mf8_mu(__VA_ARGS__)

#define	vsoxei16_v_f16m1(...) __riscv_vsoxei16_v_f16m1(__VA_ARGS__)

#define	vsoxei16_v_f16m1_m(...) __riscv_vsoxei16_v_f16m1_m(__VA_ARGS__)

#define	vsoxei16_v_f16m2(...) __riscv_vsoxei16_v_f16m2(__VA_ARGS__)

#define	vsoxei16_v_f16m2_m(...) __riscv_vsoxei16_v_f16m2_m(__VA_ARGS__)

#define	vsoxei16_v_f16m4(...) __riscv_vsoxei16_v_f16m4(__VA_ARGS__)

#define	vsoxei16_v_f16m4_m(...) __riscv_vsoxei16_v_f16m4_m(__VA_ARGS__)

#define	vsoxei16_v_f16m8(...) __riscv_vsoxei16_v_f16m8(__VA_ARGS__)

#define	vsoxei16_v_f16m8_m(...) __riscv_vsoxei16_v_f16m8_m(__VA_ARGS__)

#define	vsoxei16_v_f16mf2(...) __riscv_vsoxei16_v_f16mf2(__VA_ARGS__)

#define	vsoxei16_v_f16mf2_m(...) __riscv_vsoxei16_v_f16mf2_m(__VA_ARGS__)

#define	vsoxei16_v_f16mf4(...) __riscv_vsoxei16_v_f16mf4(__VA_ARGS__)

#define	vsoxei16_v_f16mf4_m(...) __riscv_vsoxei16_v_f16mf4_m(__VA_ARGS__)

#define	vsoxei16_v_f32m1(...) __riscv_vsoxei16_v_f32m1(__VA_ARGS__)

#define	vsoxei16_v_f32m1_m(...) __riscv_vsoxei16_v_f32m1_m(__VA_ARGS__)

#define	vsoxei16_v_f32m2(...) __riscv_vsoxei16_v_f32m2(__VA_ARGS__)

#define	vsoxei16_v_f32m2_m(...) __riscv_vsoxei16_v_f32m2_m(__VA_ARGS__)

#define	vsoxei16_v_f32m4(...) __riscv_vsoxei16_v_f32m4(__VA_ARGS__)

#define	vsoxei16_v_f32m4_m(...) __riscv_vsoxei16_v_f32m4_m(__VA_ARGS__)

#define	vsoxei16_v_f32m8(...) __riscv_vsoxei16_v_f32m8(__VA_ARGS__)

#define	vsoxei16_v_f32m8_m(...) __riscv_vsoxei16_v_f32m8_m(__VA_ARGS__)

#define	vsoxei16_v_f32mf2(...) __riscv_vsoxei16_v_f32mf2(__VA_ARGS__)

#define	vsoxei16_v_f32mf2_m(...) __riscv_vsoxei16_v_f32mf2_m(__VA_ARGS__)

#define	vsoxei16_v_f64m1(...) __riscv_vsoxei16_v_f64m1(__VA_ARGS__)

#define	vsoxei16_v_f64m1_m(...) __riscv_vsoxei16_v_f64m1_m(__VA_ARGS__)

#define	vsoxei16_v_f64m2(...) __riscv_vsoxei16_v_f64m2(__VA_ARGS__)

#define	vsoxei16_v_f64m2_m(...) __riscv_vsoxei16_v_f64m2_m(__VA_ARGS__)

#define	vsoxei16_v_f64m4(...) __riscv_vsoxei16_v_f64m4(__VA_ARGS__)

#define	vsoxei16_v_f64m4_m(...) __riscv_vsoxei16_v_f64m4_m(__VA_ARGS__)

#define	vsoxei16_v_f64m8(...) __riscv_vsoxei16_v_f64m8(__VA_ARGS__)

#define	vsoxei16_v_f64m8_m(...) __riscv_vsoxei16_v_f64m8_m(__VA_ARGS__)

#define	vsoxei16_v_i16m1(...) __riscv_vsoxei16_v_i16m1(__VA_ARGS__)

#define	vsoxei16_v_i16m1_m(...) __riscv_vsoxei16_v_i16m1_m(__VA_ARGS__)

#define	vsoxei16_v_i16m2(...) __riscv_vsoxei16_v_i16m2(__VA_ARGS__)

#define	vsoxei16_v_i16m2_m(...) __riscv_vsoxei16_v_i16m2_m(__VA_ARGS__)

#define	vsoxei16_v_i16m4(...) __riscv_vsoxei16_v_i16m4(__VA_ARGS__)

#define	vsoxei16_v_i16m4_m(...) __riscv_vsoxei16_v_i16m4_m(__VA_ARGS__)

#define	vsoxei16_v_i16m8(...) __riscv_vsoxei16_v_i16m8(__VA_ARGS__)

#define	vsoxei16_v_i16m8_m(...) __riscv_vsoxei16_v_i16m8_m(__VA_ARGS__)

#define	vsoxei16_v_i16mf2(...) __riscv_vsoxei16_v_i16mf2(__VA_ARGS__)

#define	vsoxei16_v_i16mf2_m(...) __riscv_vsoxei16_v_i16mf2_m(__VA_ARGS__)

#define	vsoxei16_v_i16mf4(...) __riscv_vsoxei16_v_i16mf4(__VA_ARGS__)

#define	vsoxei16_v_i16mf4_m(...) __riscv_vsoxei16_v_i16mf4_m(__VA_ARGS__)

#define	vsoxei16_v_i32m1(...) __riscv_vsoxei16_v_i32m1(__VA_ARGS__)

#define	vsoxei16_v_i32m1_m(...) __riscv_vsoxei16_v_i32m1_m(__VA_ARGS__)

#define	vsoxei16_v_i32m2(...) __riscv_vsoxei16_v_i32m2(__VA_ARGS__)

#define	vsoxei16_v_i32m2_m(...) __riscv_vsoxei16_v_i32m2_m(__VA_ARGS__)

#define	vsoxei16_v_i32m4(...) __riscv_vsoxei16_v_i32m4(__VA_ARGS__)

#define	vsoxei16_v_i32m4_m(...) __riscv_vsoxei16_v_i32m4_m(__VA_ARGS__)

#define	vsoxei16_v_i32m8(...) __riscv_vsoxei16_v_i32m8(__VA_ARGS__)

#define	vsoxei16_v_i32m8_m(...) __riscv_vsoxei16_v_i32m8_m(__VA_ARGS__)

#define	vsoxei16_v_i32mf2(...) __riscv_vsoxei16_v_i32mf2(__VA_ARGS__)

#define	vsoxei16_v_i32mf2_m(...) __riscv_vsoxei16_v_i32mf2_m(__VA_ARGS__)

#define	vsoxei16_v_i64m1(...) __riscv_vsoxei16_v_i64m1(__VA_ARGS__)

#define	vsoxei16_v_i64m1_m(...) __riscv_vsoxei16_v_i64m1_m(__VA_ARGS__)

#define	vsoxei16_v_i64m2(...) __riscv_vsoxei16_v_i64m2(__VA_ARGS__)

#define	vsoxei16_v_i64m2_m(...) __riscv_vsoxei16_v_i64m2_m(__VA_ARGS__)

#define	vsoxei16_v_i64m4(...) __riscv_vsoxei16_v_i64m4(__VA_ARGS__)

#define	vsoxei16_v_i64m4_m(...) __riscv_vsoxei16_v_i64m4_m(__VA_ARGS__)

#define	vsoxei16_v_i64m8(...) __riscv_vsoxei16_v_i64m8(__VA_ARGS__)

#define	vsoxei16_v_i64m8_m(...) __riscv_vsoxei16_v_i64m8_m(__VA_ARGS__)

#define	vsoxei16_v_i8m1(...) __riscv_vsoxei16_v_i8m1(__VA_ARGS__)

#define	vsoxei16_v_i8m1_m(...) __riscv_vsoxei16_v_i8m1_m(__VA_ARGS__)

#define	vsoxei16_v_i8m2(...) __riscv_vsoxei16_v_i8m2(__VA_ARGS__)

#define	vsoxei16_v_i8m2_m(...) __riscv_vsoxei16_v_i8m2_m(__VA_ARGS__)

#define	vsoxei16_v_i8m4(...) __riscv_vsoxei16_v_i8m4(__VA_ARGS__)

#define	vsoxei16_v_i8m4_m(...) __riscv_vsoxei16_v_i8m4_m(__VA_ARGS__)

#define	vsoxei16_v_i8mf2(...) __riscv_vsoxei16_v_i8mf2(__VA_ARGS__)

#define	vsoxei16_v_i8mf2_m(...) __riscv_vsoxei16_v_i8mf2_m(__VA_ARGS__)

#define	vsoxei16_v_i8mf4(...) __riscv_vsoxei16_v_i8mf4(__VA_ARGS__)

#define	vsoxei16_v_i8mf4_m(...) __riscv_vsoxei16_v_i8mf4_m(__VA_ARGS__)

#define	vsoxei16_v_i8mf8(...) __riscv_vsoxei16_v_i8mf8(__VA_ARGS__)

#define	vsoxei16_v_i8mf8_m(...) __riscv_vsoxei16_v_i8mf8_m(__VA_ARGS__)

#define	vsoxei16_v_u16m1(...) __riscv_vsoxei16_v_u16m1(__VA_ARGS__)

#define	vsoxei16_v_u16m1_m(...) __riscv_vsoxei16_v_u16m1_m(__VA_ARGS__)

#define	vsoxei16_v_u16m2(...) __riscv_vsoxei16_v_u16m2(__VA_ARGS__)

#define	vsoxei16_v_u16m2_m(...) __riscv_vsoxei16_v_u16m2_m(__VA_ARGS__)

#define	vsoxei16_v_u16m4(...) __riscv_vsoxei16_v_u16m4(__VA_ARGS__)

#define	vsoxei16_v_u16m4_m(...) __riscv_vsoxei16_v_u16m4_m(__VA_ARGS__)

#define	vsoxei16_v_u16m8(...) __riscv_vsoxei16_v_u16m8(__VA_ARGS__)

#define	vsoxei16_v_u16m8_m(...) __riscv_vsoxei16_v_u16m8_m(__VA_ARGS__)

#define	vsoxei16_v_u16mf2(...) __riscv_vsoxei16_v_u16mf2(__VA_ARGS__)

#define	vsoxei16_v_u16mf2_m(...) __riscv_vsoxei16_v_u16mf2_m(__VA_ARGS__)

#define	vsoxei16_v_u16mf4(...) __riscv_vsoxei16_v_u16mf4(__VA_ARGS__)

#define	vsoxei16_v_u16mf4_m(...) __riscv_vsoxei16_v_u16mf4_m(__VA_ARGS__)

#define	vsoxei16_v_u32m1(...) __riscv_vsoxei16_v_u32m1(__VA_ARGS__)

#define	vsoxei16_v_u32m1_m(...) __riscv_vsoxei16_v_u32m1_m(__VA_ARGS__)

#define	vsoxei16_v_u32m2(...) __riscv_vsoxei16_v_u32m2(__VA_ARGS__)

#define	vsoxei16_v_u32m2_m(...) __riscv_vsoxei16_v_u32m2_m(__VA_ARGS__)

#define	vsoxei16_v_u32m4(...) __riscv_vsoxei16_v_u32m4(__VA_ARGS__)

#define	vsoxei16_v_u32m4_m(...) __riscv_vsoxei16_v_u32m4_m(__VA_ARGS__)

#define	vsoxei16_v_u32m8(...) __riscv_vsoxei16_v_u32m8(__VA_ARGS__)

#define	vsoxei16_v_u32m8_m(...) __riscv_vsoxei16_v_u32m8_m(__VA_ARGS__)

#define	vsoxei16_v_u32mf2(...) __riscv_vsoxei16_v_u32mf2(__VA_ARGS__)

#define	vsoxei16_v_u32mf2_m(...) __riscv_vsoxei16_v_u32mf2_m(__VA_ARGS__)

#define	vsoxei16_v_u64m1(...) __riscv_vsoxei16_v_u64m1(__VA_ARGS__)

#define	vsoxei16_v_u64m1_m(...) __riscv_vsoxei16_v_u64m1_m(__VA_ARGS__)

#define	vsoxei16_v_u64m2(...) __riscv_vsoxei16_v_u64m2(__VA_ARGS__)

#define	vsoxei16_v_u64m2_m(...) __riscv_vsoxei16_v_u64m2_m(__VA_ARGS__)

#define	vsoxei16_v_u64m4(...) __riscv_vsoxei16_v_u64m4(__VA_ARGS__)

#define	vsoxei16_v_u64m4_m(...) __riscv_vsoxei16_v_u64m4_m(__VA_ARGS__)

#define	vsoxei16_v_u64m8(...) __riscv_vsoxei16_v_u64m8(__VA_ARGS__)

#define	vsoxei16_v_u64m8_m(...) __riscv_vsoxei16_v_u64m8_m(__VA_ARGS__)

#define	vsoxei16_v_u8m1(...) __riscv_vsoxei16_v_u8m1(__VA_ARGS__)

#define	vsoxei16_v_u8m1_m(...) __riscv_vsoxei16_v_u8m1_m(__VA_ARGS__)

#define	vsoxei16_v_u8m2(...) __riscv_vsoxei16_v_u8m2(__VA_ARGS__)

#define	vsoxei16_v_u8m2_m(...) __riscv_vsoxei16_v_u8m2_m(__VA_ARGS__)

#define	vsoxei16_v_u8m4(...) __riscv_vsoxei16_v_u8m4(__VA_ARGS__)

#define	vsoxei16_v_u8m4_m(...) __riscv_vsoxei16_v_u8m4_m(__VA_ARGS__)

#define	vsoxei16_v_u8mf2(...) __riscv_vsoxei16_v_u8mf2(__VA_ARGS__)

#define	vsoxei16_v_u8mf2_m(...) __riscv_vsoxei16_v_u8mf2_m(__VA_ARGS__)

#define	vsoxei16_v_u8mf4(...) __riscv_vsoxei16_v_u8mf4(__VA_ARGS__)

#define	vsoxei16_v_u8mf4_m(...) __riscv_vsoxei16_v_u8mf4_m(__VA_ARGS__)

#define	vsoxei16_v_u8mf8(...) __riscv_vsoxei16_v_u8mf8(__VA_ARGS__)

#define	vsoxei16_v_u8mf8_m(...) __riscv_vsoxei16_v_u8mf8_m(__VA_ARGS__)

#define	vsoxei32_v_f16m1(...) __riscv_vsoxei32_v_f16m1(__VA_ARGS__)

#define	vsoxei32_v_f16m1_m(...) __riscv_vsoxei32_v_f16m1_m(__VA_ARGS__)

#define	vsoxei32_v_f16m2(...) __riscv_vsoxei32_v_f16m2(__VA_ARGS__)

#define	vsoxei32_v_f16m2_m(...) __riscv_vsoxei32_v_f16m2_m(__VA_ARGS__)

#define	vsoxei32_v_f16m4(...) __riscv_vsoxei32_v_f16m4(__VA_ARGS__)

#define	vsoxei32_v_f16m4_m(...) __riscv_vsoxei32_v_f16m4_m(__VA_ARGS__)

#define	vsoxei32_v_f16mf2(...) __riscv_vsoxei32_v_f16mf2(__VA_ARGS__)

#define	vsoxei32_v_f16mf2_m(...) __riscv_vsoxei32_v_f16mf2_m(__VA_ARGS__)

#define	vsoxei32_v_f16mf4(...) __riscv_vsoxei32_v_f16mf4(__VA_ARGS__)

#define	vsoxei32_v_f16mf4_m(...) __riscv_vsoxei32_v_f16mf4_m(__VA_ARGS__)

#define	vsoxei32_v_f32m1(...) __riscv_vsoxei32_v_f32m1(__VA_ARGS__)

#define	vsoxei32_v_f32m1_m(...) __riscv_vsoxei32_v_f32m1_m(__VA_ARGS__)

#define	vsoxei32_v_f32m2(...) __riscv_vsoxei32_v_f32m2(__VA_ARGS__)

#define	vsoxei32_v_f32m2_m(...) __riscv_vsoxei32_v_f32m2_m(__VA_ARGS__)

#define	vsoxei32_v_f32m4(...) __riscv_vsoxei32_v_f32m4(__VA_ARGS__)

#define	vsoxei32_v_f32m4_m(...) __riscv_vsoxei32_v_f32m4_m(__VA_ARGS__)

#define	vsoxei32_v_f32m8(...) __riscv_vsoxei32_v_f32m8(__VA_ARGS__)

#define	vsoxei32_v_f32m8_m(...) __riscv_vsoxei32_v_f32m8_m(__VA_ARGS__)

#define	vsoxei32_v_f32mf2(...) __riscv_vsoxei32_v_f32mf2(__VA_ARGS__)

#define	vsoxei32_v_f32mf2_m(...) __riscv_vsoxei32_v_f32mf2_m(__VA_ARGS__)

#define	vsoxei32_v_f64m1(...) __riscv_vsoxei32_v_f64m1(__VA_ARGS__)

#define	vsoxei32_v_f64m1_m(...) __riscv_vsoxei32_v_f64m1_m(__VA_ARGS__)

#define	vsoxei32_v_f64m2(...) __riscv_vsoxei32_v_f64m2(__VA_ARGS__)

#define	vsoxei32_v_f64m2_m(...) __riscv_vsoxei32_v_f64m2_m(__VA_ARGS__)

#define	vsoxei32_v_f64m4(...) __riscv_vsoxei32_v_f64m4(__VA_ARGS__)

#define	vsoxei32_v_f64m4_m(...) __riscv_vsoxei32_v_f64m4_m(__VA_ARGS__)

#define	vsoxei32_v_f64m8(...) __riscv_vsoxei32_v_f64m8(__VA_ARGS__)

#define	vsoxei32_v_f64m8_m(...) __riscv_vsoxei32_v_f64m8_m(__VA_ARGS__)

#define	vsoxei32_v_i16m1(...) __riscv_vsoxei32_v_i16m1(__VA_ARGS__)

#define	vsoxei32_v_i16m1_m(...) __riscv_vsoxei32_v_i16m1_m(__VA_ARGS__)

#define	vsoxei32_v_i16m2(...) __riscv_vsoxei32_v_i16m2(__VA_ARGS__)

#define	vsoxei32_v_i16m2_m(...) __riscv_vsoxei32_v_i16m2_m(__VA_ARGS__)

#define	vsoxei32_v_i16m4(...) __riscv_vsoxei32_v_i16m4(__VA_ARGS__)

#define	vsoxei32_v_i16m4_m(...) __riscv_vsoxei32_v_i16m4_m(__VA_ARGS__)

#define	vsoxei32_v_i16mf2(...) __riscv_vsoxei32_v_i16mf2(__VA_ARGS__)

#define	vsoxei32_v_i16mf2_m(...) __riscv_vsoxei32_v_i16mf2_m(__VA_ARGS__)

#define	vsoxei32_v_i16mf4(...) __riscv_vsoxei32_v_i16mf4(__VA_ARGS__)

#define	vsoxei32_v_i16mf4_m(...) __riscv_vsoxei32_v_i16mf4_m(__VA_ARGS__)

#define	vsoxei32_v_i32m1(...) __riscv_vsoxei32_v_i32m1(__VA_ARGS__)

#define	vsoxei32_v_i32m1_m(...) __riscv_vsoxei32_v_i32m1_m(__VA_ARGS__)

#define	vsoxei32_v_i32m2(...) __riscv_vsoxei32_v_i32m2(__VA_ARGS__)

#define	vsoxei32_v_i32m2_m(...) __riscv_vsoxei32_v_i32m2_m(__VA_ARGS__)

#define	vsoxei32_v_i32m4(...) __riscv_vsoxei32_v_i32m4(__VA_ARGS__)

#define	vsoxei32_v_i32m4_m(...) __riscv_vsoxei32_v_i32m4_m(__VA_ARGS__)

#define	vsoxei32_v_i32m8(...) __riscv_vsoxei32_v_i32m8(__VA_ARGS__)

#define	vsoxei32_v_i32m8_m(...) __riscv_vsoxei32_v_i32m8_m(__VA_ARGS__)

#define	vsoxei32_v_i32mf2(...) __riscv_vsoxei32_v_i32mf2(__VA_ARGS__)

#define	vsoxei32_v_i32mf2_m(...) __riscv_vsoxei32_v_i32mf2_m(__VA_ARGS__)

#define	vsoxei32_v_i64m1(...) __riscv_vsoxei32_v_i64m1(__VA_ARGS__)

#define	vsoxei32_v_i64m1_m(...) __riscv_vsoxei32_v_i64m1_m(__VA_ARGS__)

#define	vsoxei32_v_i64m2(...) __riscv_vsoxei32_v_i64m2(__VA_ARGS__)

#define	vsoxei32_v_i64m2_m(...) __riscv_vsoxei32_v_i64m2_m(__VA_ARGS__)

#define	vsoxei32_v_i64m4(...) __riscv_vsoxei32_v_i64m4(__VA_ARGS__)

#define	vsoxei32_v_i64m4_m(...) __riscv_vsoxei32_v_i64m4_m(__VA_ARGS__)

#define	vsoxei32_v_i64m8(...) __riscv_vsoxei32_v_i64m8(__VA_ARGS__)

#define	vsoxei32_v_i64m8_m(...) __riscv_vsoxei32_v_i64m8_m(__VA_ARGS__)

#define	vsoxei32_v_i8m1(...) __riscv_vsoxei32_v_i8m1(__VA_ARGS__)

#define	vsoxei32_v_i8m1_m(...) __riscv_vsoxei32_v_i8m1_m(__VA_ARGS__)

#define	vsoxei32_v_i8m2(...) __riscv_vsoxei32_v_i8m2(__VA_ARGS__)

#define	vsoxei32_v_i8m2_m(...) __riscv_vsoxei32_v_i8m2_m(__VA_ARGS__)

#define	vsoxei32_v_i8mf2(...) __riscv_vsoxei32_v_i8mf2(__VA_ARGS__)

#define	vsoxei32_v_i8mf2_m(...) __riscv_vsoxei32_v_i8mf2_m(__VA_ARGS__)

#define	vsoxei32_v_i8mf4(...) __riscv_vsoxei32_v_i8mf4(__VA_ARGS__)

#define	vsoxei32_v_i8mf4_m(...) __riscv_vsoxei32_v_i8mf4_m(__VA_ARGS__)

#define	vsoxei32_v_i8mf8(...) __riscv_vsoxei32_v_i8mf8(__VA_ARGS__)

#define	vsoxei32_v_i8mf8_m(...) __riscv_vsoxei32_v_i8mf8_m(__VA_ARGS__)

#define	vsoxei32_v_u16m1(...) __riscv_vsoxei32_v_u16m1(__VA_ARGS__)

#define	vsoxei32_v_u16m1_m(...) __riscv_vsoxei32_v_u16m1_m(__VA_ARGS__)

#define	vsoxei32_v_u16m2(...) __riscv_vsoxei32_v_u16m2(__VA_ARGS__)

#define	vsoxei32_v_u16m2_m(...) __riscv_vsoxei32_v_u16m2_m(__VA_ARGS__)

#define	vsoxei32_v_u16m4(...) __riscv_vsoxei32_v_u16m4(__VA_ARGS__)

#define	vsoxei32_v_u16m4_m(...) __riscv_vsoxei32_v_u16m4_m(__VA_ARGS__)

#define	vsoxei32_v_u16mf2(...) __riscv_vsoxei32_v_u16mf2(__VA_ARGS__)

#define	vsoxei32_v_u16mf2_m(...) __riscv_vsoxei32_v_u16mf2_m(__VA_ARGS__)

#define	vsoxei32_v_u16mf4(...) __riscv_vsoxei32_v_u16mf4(__VA_ARGS__)

#define	vsoxei32_v_u16mf4_m(...) __riscv_vsoxei32_v_u16mf4_m(__VA_ARGS__)

#define	vsoxei32_v_u32m1(...) __riscv_vsoxei32_v_u32m1(__VA_ARGS__)

#define	vsoxei32_v_u32m1_m(...) __riscv_vsoxei32_v_u32m1_m(__VA_ARGS__)

#define	vsoxei32_v_u32m2(...) __riscv_vsoxei32_v_u32m2(__VA_ARGS__)

#define	vsoxei32_v_u32m2_m(...) __riscv_vsoxei32_v_u32m2_m(__VA_ARGS__)

#define	vsoxei32_v_u32m4(...) __riscv_vsoxei32_v_u32m4(__VA_ARGS__)

#define	vsoxei32_v_u32m4_m(...) __riscv_vsoxei32_v_u32m4_m(__VA_ARGS__)

#define	vsoxei32_v_u32m8(...) __riscv_vsoxei32_v_u32m8(__VA_ARGS__)

#define	vsoxei32_v_u32m8_m(...) __riscv_vsoxei32_v_u32m8_m(__VA_ARGS__)

#define	vsoxei32_v_u32mf2(...) __riscv_vsoxei32_v_u32mf2(__VA_ARGS__)

#define	vsoxei32_v_u32mf2_m(...) __riscv_vsoxei32_v_u32mf2_m(__VA_ARGS__)

#define	vsoxei32_v_u64m1(...) __riscv_vsoxei32_v_u64m1(__VA_ARGS__)

#define	vsoxei32_v_u64m1_m(...) __riscv_vsoxei32_v_u64m1_m(__VA_ARGS__)

#define	vsoxei32_v_u64m2(...) __riscv_vsoxei32_v_u64m2(__VA_ARGS__)

#define	vsoxei32_v_u64m2_m(...) __riscv_vsoxei32_v_u64m2_m(__VA_ARGS__)

#define	vsoxei32_v_u64m4(...) __riscv_vsoxei32_v_u64m4(__VA_ARGS__)

#define	vsoxei32_v_u64m4_m(...) __riscv_vsoxei32_v_u64m4_m(__VA_ARGS__)

#define	vsoxei32_v_u64m8(...) __riscv_vsoxei32_v_u64m8(__VA_ARGS__)

#define	vsoxei32_v_u64m8_m(...) __riscv_vsoxei32_v_u64m8_m(__VA_ARGS__)

#define	vsoxei32_v_u8m1(...) __riscv_vsoxei32_v_u8m1(__VA_ARGS__)

#define	vsoxei32_v_u8m1_m(...) __riscv_vsoxei32_v_u8m1_m(__VA_ARGS__)

#define	vsoxei32_v_u8m2(...) __riscv_vsoxei32_v_u8m2(__VA_ARGS__)

#define	vsoxei32_v_u8m2_m(...) __riscv_vsoxei32_v_u8m2_m(__VA_ARGS__)

#define	vsoxei32_v_u8mf2(...) __riscv_vsoxei32_v_u8mf2(__VA_ARGS__)

#define	vsoxei32_v_u8mf2_m(...) __riscv_vsoxei32_v_u8mf2_m(__VA_ARGS__)

#define	vsoxei32_v_u8mf4(...) __riscv_vsoxei32_v_u8mf4(__VA_ARGS__)

#define	vsoxei32_v_u8mf4_m(...) __riscv_vsoxei32_v_u8mf4_m(__VA_ARGS__)

#define	vsoxei32_v_u8mf8(...) __riscv_vsoxei32_v_u8mf8(__VA_ARGS__)

#define	vsoxei32_v_u8mf8_m(...) __riscv_vsoxei32_v_u8mf8_m(__VA_ARGS__)

#define	vsoxei64_v_f16m1(...) __riscv_vsoxei64_v_f16m1(__VA_ARGS__)

#define	vsoxei64_v_f16m1_m(...) __riscv_vsoxei64_v_f16m1_m(__VA_ARGS__)

#define	vsoxei64_v_f16m2(...) __riscv_vsoxei64_v_f16m2(__VA_ARGS__)

#define	vsoxei64_v_f16m2_m(...) __riscv_vsoxei64_v_f16m2_m(__VA_ARGS__)

#define	vsoxei64_v_f16mf2(...) __riscv_vsoxei64_v_f16mf2(__VA_ARGS__)

#define	vsoxei64_v_f16mf2_m(...) __riscv_vsoxei64_v_f16mf2_m(__VA_ARGS__)

#define	vsoxei64_v_f16mf4(...) __riscv_vsoxei64_v_f16mf4(__VA_ARGS__)

#define	vsoxei64_v_f16mf4_m(...) __riscv_vsoxei64_v_f16mf4_m(__VA_ARGS__)

#define	vsoxei64_v_f32m1(...) __riscv_vsoxei64_v_f32m1(__VA_ARGS__)

#define	vsoxei64_v_f32m1_m(...) __riscv_vsoxei64_v_f32m1_m(__VA_ARGS__)

#define	vsoxei64_v_f32m2(...) __riscv_vsoxei64_v_f32m2(__VA_ARGS__)

#define	vsoxei64_v_f32m2_m(...) __riscv_vsoxei64_v_f32m2_m(__VA_ARGS__)

#define	vsoxei64_v_f32m4(...) __riscv_vsoxei64_v_f32m4(__VA_ARGS__)

#define	vsoxei64_v_f32m4_m(...) __riscv_vsoxei64_v_f32m4_m(__VA_ARGS__)

#define	vsoxei64_v_f32mf2(...) __riscv_vsoxei64_v_f32mf2(__VA_ARGS__)

#define	vsoxei64_v_f32mf2_m(...) __riscv_vsoxei64_v_f32mf2_m(__VA_ARGS__)

#define	vsoxei64_v_f64m1(...) __riscv_vsoxei64_v_f64m1(__VA_ARGS__)

#define	vsoxei64_v_f64m1_m(...) __riscv_vsoxei64_v_f64m1_m(__VA_ARGS__)

#define	vsoxei64_v_f64m2(...) __riscv_vsoxei64_v_f64m2(__VA_ARGS__)

#define	vsoxei64_v_f64m2_m(...) __riscv_vsoxei64_v_f64m2_m(__VA_ARGS__)

#define	vsoxei64_v_f64m4(...) __riscv_vsoxei64_v_f64m4(__VA_ARGS__)

#define	vsoxei64_v_f64m4_m(...) __riscv_vsoxei64_v_f64m4_m(__VA_ARGS__)

#define	vsoxei64_v_f64m8(...) __riscv_vsoxei64_v_f64m8(__VA_ARGS__)

#define	vsoxei64_v_f64m8_m(...) __riscv_vsoxei64_v_f64m8_m(__VA_ARGS__)

#define	vsoxei64_v_i16m1(...) __riscv_vsoxei64_v_i16m1(__VA_ARGS__)

#define	vsoxei64_v_i16m1_m(...) __riscv_vsoxei64_v_i16m1_m(__VA_ARGS__)

#define	vsoxei64_v_i16m2(...) __riscv_vsoxei64_v_i16m2(__VA_ARGS__)

#define	vsoxei64_v_i16m2_m(...) __riscv_vsoxei64_v_i16m2_m(__VA_ARGS__)

#define	vsoxei64_v_i16mf2(...) __riscv_vsoxei64_v_i16mf2(__VA_ARGS__)

#define	vsoxei64_v_i16mf2_m(...) __riscv_vsoxei64_v_i16mf2_m(__VA_ARGS__)

#define	vsoxei64_v_i16mf4(...) __riscv_vsoxei64_v_i16mf4(__VA_ARGS__)

#define	vsoxei64_v_i16mf4_m(...) __riscv_vsoxei64_v_i16mf4_m(__VA_ARGS__)

#define	vsoxei64_v_i32m1(...) __riscv_vsoxei64_v_i32m1(__VA_ARGS__)

#define	vsoxei64_v_i32m1_m(...) __riscv_vsoxei64_v_i32m1_m(__VA_ARGS__)

#define	vsoxei64_v_i32m2(...) __riscv_vsoxei64_v_i32m2(__VA_ARGS__)

#define	vsoxei64_v_i32m2_m(...) __riscv_vsoxei64_v_i32m2_m(__VA_ARGS__)

#define	vsoxei64_v_i32m4(...) __riscv_vsoxei64_v_i32m4(__VA_ARGS__)

#define	vsoxei64_v_i32m4_m(...) __riscv_vsoxei64_v_i32m4_m(__VA_ARGS__)

#define	vsoxei64_v_i32mf2(...) __riscv_vsoxei64_v_i32mf2(__VA_ARGS__)

#define	vsoxei64_v_i32mf2_m(...) __riscv_vsoxei64_v_i32mf2_m(__VA_ARGS__)

#define	vsoxei64_v_i64m1(...) __riscv_vsoxei64_v_i64m1(__VA_ARGS__)

#define	vsoxei64_v_i64m1_m(...) __riscv_vsoxei64_v_i64m1_m(__VA_ARGS__)

#define	vsoxei64_v_i64m2(...) __riscv_vsoxei64_v_i64m2(__VA_ARGS__)

#define	vsoxei64_v_i64m2_m(...) __riscv_vsoxei64_v_i64m2_m(__VA_ARGS__)

#define	vsoxei64_v_i64m4(...) __riscv_vsoxei64_v_i64m4(__VA_ARGS__)

#define	vsoxei64_v_i64m4_m(...) __riscv_vsoxei64_v_i64m4_m(__VA_ARGS__)

#define	vsoxei64_v_i64m8(...) __riscv_vsoxei64_v_i64m8(__VA_ARGS__)

#define	vsoxei64_v_i64m8_m(...) __riscv_vsoxei64_v_i64m8_m(__VA_ARGS__)

#define	vsoxei64_v_i8m1(...) __riscv_vsoxei64_v_i8m1(__VA_ARGS__)

#define	vsoxei64_v_i8m1_m(...) __riscv_vsoxei64_v_i8m1_m(__VA_ARGS__)

#define	vsoxei64_v_i8mf2(...) __riscv_vsoxei64_v_i8mf2(__VA_ARGS__)

#define	vsoxei64_v_i8mf2_m(...) __riscv_vsoxei64_v_i8mf2_m(__VA_ARGS__)

#define	vsoxei64_v_i8mf4(...) __riscv_vsoxei64_v_i8mf4(__VA_ARGS__)

#define	vsoxei64_v_i8mf4_m(...) __riscv_vsoxei64_v_i8mf4_m(__VA_ARGS__)

#define	vsoxei64_v_i8mf8(...) __riscv_vsoxei64_v_i8mf8(__VA_ARGS__)

#define	vsoxei64_v_i8mf8_m(...) __riscv_vsoxei64_v_i8mf8_m(__VA_ARGS__)

#define	vsoxei64_v_u16m1(...) __riscv_vsoxei64_v_u16m1(__VA_ARGS__)

#define	vsoxei64_v_u16m1_m(...) __riscv_vsoxei64_v_u16m1_m(__VA_ARGS__)

#define	vsoxei64_v_u16m2(...) __riscv_vsoxei64_v_u16m2(__VA_ARGS__)

#define	vsoxei64_v_u16m2_m(...) __riscv_vsoxei64_v_u16m2_m(__VA_ARGS__)

#define	vsoxei64_v_u16mf2(...) __riscv_vsoxei64_v_u16mf2(__VA_ARGS__)

#define	vsoxei64_v_u16mf2_m(...) __riscv_vsoxei64_v_u16mf2_m(__VA_ARGS__)

#define	vsoxei64_v_u16mf4(...) __riscv_vsoxei64_v_u16mf4(__VA_ARGS__)

#define	vsoxei64_v_u16mf4_m(...) __riscv_vsoxei64_v_u16mf4_m(__VA_ARGS__)

#define	vsoxei64_v_u32m1(...) __riscv_vsoxei64_v_u32m1(__VA_ARGS__)

#define	vsoxei64_v_u32m1_m(...) __riscv_vsoxei64_v_u32m1_m(__VA_ARGS__)

#define	vsoxei64_v_u32m2(...) __riscv_vsoxei64_v_u32m2(__VA_ARGS__)

#define	vsoxei64_v_u32m2_m(...) __riscv_vsoxei64_v_u32m2_m(__VA_ARGS__)

#define	vsoxei64_v_u32m4(...) __riscv_vsoxei64_v_u32m4(__VA_ARGS__)

#define	vsoxei64_v_u32m4_m(...) __riscv_vsoxei64_v_u32m4_m(__VA_ARGS__)

#define	vsoxei64_v_u32mf2(...) __riscv_vsoxei64_v_u32mf2(__VA_ARGS__)

#define	vsoxei64_v_u32mf2_m(...) __riscv_vsoxei64_v_u32mf2_m(__VA_ARGS__)

#define	vsoxei64_v_u64m1(...) __riscv_vsoxei64_v_u64m1(__VA_ARGS__)

#define	vsoxei64_v_u64m1_m(...) __riscv_vsoxei64_v_u64m1_m(__VA_ARGS__)

#define	vsoxei64_v_u64m2(...) __riscv_vsoxei64_v_u64m2(__VA_ARGS__)

#define	vsoxei64_v_u64m2_m(...) __riscv_vsoxei64_v_u64m2_m(__VA_ARGS__)

#define	vsoxei64_v_u64m4(...) __riscv_vsoxei64_v_u64m4(__VA_ARGS__)

#define	vsoxei64_v_u64m4_m(...) __riscv_vsoxei64_v_u64m4_m(__VA_ARGS__)

#define	vsoxei64_v_u64m8(...) __riscv_vsoxei64_v_u64m8(__VA_ARGS__)

#define	vsoxei64_v_u64m8_m(...) __riscv_vsoxei64_v_u64m8_m(__VA_ARGS__)

#define	vsoxei64_v_u8m1(...) __riscv_vsoxei64_v_u8m1(__VA_ARGS__)

#define	vsoxei64_v_u8m1_m(...) __riscv_vsoxei64_v_u8m1_m(__VA_ARGS__)

#define	vsoxei64_v_u8mf2(...) __riscv_vsoxei64_v_u8mf2(__VA_ARGS__)

#define	vsoxei64_v_u8mf2_m(...) __riscv_vsoxei64_v_u8mf2_m(__VA_ARGS__)

#define	vsoxei64_v_u8mf4(...) __riscv_vsoxei64_v_u8mf4(__VA_ARGS__)

#define	vsoxei64_v_u8mf4_m(...) __riscv_vsoxei64_v_u8mf4_m(__VA_ARGS__)

#define	vsoxei64_v_u8mf8(...) __riscv_vsoxei64_v_u8mf8(__VA_ARGS__)

#define	vsoxei64_v_u8mf8_m(...) __riscv_vsoxei64_v_u8mf8_m(__VA_ARGS__)

#define	vsoxei8_v_f16m1(...) __riscv_vsoxei8_v_f16m1(__VA_ARGS__)

#define	vsoxei8_v_f16m1_m(...) __riscv_vsoxei8_v_f16m1_m(__VA_ARGS__)

#define	vsoxei8_v_f16m2(...) __riscv_vsoxei8_v_f16m2(__VA_ARGS__)

#define	vsoxei8_v_f16m2_m(...) __riscv_vsoxei8_v_f16m2_m(__VA_ARGS__)

#define	vsoxei8_v_f16m4(...) __riscv_vsoxei8_v_f16m4(__VA_ARGS__)

#define	vsoxei8_v_f16m4_m(...) __riscv_vsoxei8_v_f16m4_m(__VA_ARGS__)

#define	vsoxei8_v_f16m8(...) __riscv_vsoxei8_v_f16m8(__VA_ARGS__)

#define	vsoxei8_v_f16m8_m(...) __riscv_vsoxei8_v_f16m8_m(__VA_ARGS__)

#define	vsoxei8_v_f16mf2(...) __riscv_vsoxei8_v_f16mf2(__VA_ARGS__)

#define	vsoxei8_v_f16mf2_m(...) __riscv_vsoxei8_v_f16mf2_m(__VA_ARGS__)

#define	vsoxei8_v_f16mf4(...) __riscv_vsoxei8_v_f16mf4(__VA_ARGS__)

#define	vsoxei8_v_f16mf4_m(...) __riscv_vsoxei8_v_f16mf4_m(__VA_ARGS__)

#define	vsoxei8_v_f32m1(...) __riscv_vsoxei8_v_f32m1(__VA_ARGS__)

#define	vsoxei8_v_f32m1_m(...) __riscv_vsoxei8_v_f32m1_m(__VA_ARGS__)

#define	vsoxei8_v_f32m2(...) __riscv_vsoxei8_v_f32m2(__VA_ARGS__)

#define	vsoxei8_v_f32m2_m(...) __riscv_vsoxei8_v_f32m2_m(__VA_ARGS__)

#define	vsoxei8_v_f32m4(...) __riscv_vsoxei8_v_f32m4(__VA_ARGS__)

#define	vsoxei8_v_f32m4_m(...) __riscv_vsoxei8_v_f32m4_m(__VA_ARGS__)

#define	vsoxei8_v_f32m8(...) __riscv_vsoxei8_v_f32m8(__VA_ARGS__)

#define	vsoxei8_v_f32m8_m(...) __riscv_vsoxei8_v_f32m8_m(__VA_ARGS__)

#define	vsoxei8_v_f32mf2(...) __riscv_vsoxei8_v_f32mf2(__VA_ARGS__)

#define	vsoxei8_v_f32mf2_m(...) __riscv_vsoxei8_v_f32mf2_m(__VA_ARGS__)

#define	vsoxei8_v_f64m1(...) __riscv_vsoxei8_v_f64m1(__VA_ARGS__)

#define	vsoxei8_v_f64m1_m(...) __riscv_vsoxei8_v_f64m1_m(__VA_ARGS__)

#define	vsoxei8_v_f64m2(...) __riscv_vsoxei8_v_f64m2(__VA_ARGS__)

#define	vsoxei8_v_f64m2_m(...) __riscv_vsoxei8_v_f64m2_m(__VA_ARGS__)

#define	vsoxei8_v_f64m4(...) __riscv_vsoxei8_v_f64m4(__VA_ARGS__)

#define	vsoxei8_v_f64m4_m(...) __riscv_vsoxei8_v_f64m4_m(__VA_ARGS__)

#define	vsoxei8_v_f64m8(...) __riscv_vsoxei8_v_f64m8(__VA_ARGS__)

#define	vsoxei8_v_f64m8_m(...) __riscv_vsoxei8_v_f64m8_m(__VA_ARGS__)

#define	vsoxei8_v_i16m1(...) __riscv_vsoxei8_v_i16m1(__VA_ARGS__)

#define	vsoxei8_v_i16m1_m(...) __riscv_vsoxei8_v_i16m1_m(__VA_ARGS__)

#define	vsoxei8_v_i16m2(...) __riscv_vsoxei8_v_i16m2(__VA_ARGS__)

#define	vsoxei8_v_i16m2_m(...) __riscv_vsoxei8_v_i16m2_m(__VA_ARGS__)

#define	vsoxei8_v_i16m4(...) __riscv_vsoxei8_v_i16m4(__VA_ARGS__)

#define	vsoxei8_v_i16m4_m(...) __riscv_vsoxei8_v_i16m4_m(__VA_ARGS__)

#define	vsoxei8_v_i16m8(...) __riscv_vsoxei8_v_i16m8(__VA_ARGS__)

#define	vsoxei8_v_i16m8_m(...) __riscv_vsoxei8_v_i16m8_m(__VA_ARGS__)

#define	vsoxei8_v_i16mf2(...) __riscv_vsoxei8_v_i16mf2(__VA_ARGS__)

#define	vsoxei8_v_i16mf2_m(...) __riscv_vsoxei8_v_i16mf2_m(__VA_ARGS__)

#define	vsoxei8_v_i16mf4(...) __riscv_vsoxei8_v_i16mf4(__VA_ARGS__)

#define	vsoxei8_v_i16mf4_m(...) __riscv_vsoxei8_v_i16mf4_m(__VA_ARGS__)

#define	vsoxei8_v_i32m1(...) __riscv_vsoxei8_v_i32m1(__VA_ARGS__)

#define	vsoxei8_v_i32m1_m(...) __riscv_vsoxei8_v_i32m1_m(__VA_ARGS__)

#define	vsoxei8_v_i32m2(...) __riscv_vsoxei8_v_i32m2(__VA_ARGS__)

#define	vsoxei8_v_i32m2_m(...) __riscv_vsoxei8_v_i32m2_m(__VA_ARGS__)

#define	vsoxei8_v_i32m4(...) __riscv_vsoxei8_v_i32m4(__VA_ARGS__)

#define	vsoxei8_v_i32m4_m(...) __riscv_vsoxei8_v_i32m4_m(__VA_ARGS__)

#define	vsoxei8_v_i32m8(...) __riscv_vsoxei8_v_i32m8(__VA_ARGS__)

#define	vsoxei8_v_i32m8_m(...) __riscv_vsoxei8_v_i32m8_m(__VA_ARGS__)

#define	vsoxei8_v_i32mf2(...) __riscv_vsoxei8_v_i32mf2(__VA_ARGS__)

#define	vsoxei8_v_i32mf2_m(...) __riscv_vsoxei8_v_i32mf2_m(__VA_ARGS__)

#define	vsoxei8_v_i64m1(...) __riscv_vsoxei8_v_i64m1(__VA_ARGS__)

#define	vsoxei8_v_i64m1_m(...) __riscv_vsoxei8_v_i64m1_m(__VA_ARGS__)

#define	vsoxei8_v_i64m2(...) __riscv_vsoxei8_v_i64m2(__VA_ARGS__)

#define	vsoxei8_v_i64m2_m(...) __riscv_vsoxei8_v_i64m2_m(__VA_ARGS__)

#define	vsoxei8_v_i64m4(...) __riscv_vsoxei8_v_i64m4(__VA_ARGS__)

#define	vsoxei8_v_i64m4_m(...) __riscv_vsoxei8_v_i64m4_m(__VA_ARGS__)

#define	vsoxei8_v_i64m8(...) __riscv_vsoxei8_v_i64m8(__VA_ARGS__)

#define	vsoxei8_v_i64m8_m(...) __riscv_vsoxei8_v_i64m8_m(__VA_ARGS__)

#define	vsoxei8_v_i8m1(...) __riscv_vsoxei8_v_i8m1(__VA_ARGS__)

#define	vsoxei8_v_i8m1_m(...) __riscv_vsoxei8_v_i8m1_m(__VA_ARGS__)

#define	vsoxei8_v_i8m2(...) __riscv_vsoxei8_v_i8m2(__VA_ARGS__)

#define	vsoxei8_v_i8m2_m(...) __riscv_vsoxei8_v_i8m2_m(__VA_ARGS__)

#define	vsoxei8_v_i8m4(...) __riscv_vsoxei8_v_i8m4(__VA_ARGS__)

#define	vsoxei8_v_i8m4_m(...) __riscv_vsoxei8_v_i8m4_m(__VA_ARGS__)

#define	vsoxei8_v_i8m8(...) __riscv_vsoxei8_v_i8m8(__VA_ARGS__)

#define	vsoxei8_v_i8m8_m(...) __riscv_vsoxei8_v_i8m8_m(__VA_ARGS__)

#define	vsoxei8_v_i8mf2(...) __riscv_vsoxei8_v_i8mf2(__VA_ARGS__)

#define	vsoxei8_v_i8mf2_m(...) __riscv_vsoxei8_v_i8mf2_m(__VA_ARGS__)

#define	vsoxei8_v_i8mf4(...) __riscv_vsoxei8_v_i8mf4(__VA_ARGS__)

#define	vsoxei8_v_i8mf4_m(...) __riscv_vsoxei8_v_i8mf4_m(__VA_ARGS__)

#define	vsoxei8_v_i8mf8(...) __riscv_vsoxei8_v_i8mf8(__VA_ARGS__)

#define	vsoxei8_v_i8mf8_m(...) __riscv_vsoxei8_v_i8mf8_m(__VA_ARGS__)

#define	vsoxei8_v_u16m1(...) __riscv_vsoxei8_v_u16m1(__VA_ARGS__)

#define	vsoxei8_v_u16m1_m(...) __riscv_vsoxei8_v_u16m1_m(__VA_ARGS__)

#define	vsoxei8_v_u16m2(...) __riscv_vsoxei8_v_u16m2(__VA_ARGS__)

#define	vsoxei8_v_u16m2_m(...) __riscv_vsoxei8_v_u16m2_m(__VA_ARGS__)

#define	vsoxei8_v_u16m4(...) __riscv_vsoxei8_v_u16m4(__VA_ARGS__)

#define	vsoxei8_v_u16m4_m(...) __riscv_vsoxei8_v_u16m4_m(__VA_ARGS__)

#define	vsoxei8_v_u16m8(...) __riscv_vsoxei8_v_u16m8(__VA_ARGS__)

#define	vsoxei8_v_u16m8_m(...) __riscv_vsoxei8_v_u16m8_m(__VA_ARGS__)

#define	vsoxei8_v_u16mf2(...) __riscv_vsoxei8_v_u16mf2(__VA_ARGS__)

#define	vsoxei8_v_u16mf2_m(...) __riscv_vsoxei8_v_u16mf2_m(__VA_ARGS__)

#define	vsoxei8_v_u16mf4(...) __riscv_vsoxei8_v_u16mf4(__VA_ARGS__)

#define	vsoxei8_v_u16mf4_m(...) __riscv_vsoxei8_v_u16mf4_m(__VA_ARGS__)

#define	vsoxei8_v_u32m1(...) __riscv_vsoxei8_v_u32m1(__VA_ARGS__)

#define	vsoxei8_v_u32m1_m(...) __riscv_vsoxei8_v_u32m1_m(__VA_ARGS__)

#define	vsoxei8_v_u32m2(...) __riscv_vsoxei8_v_u32m2(__VA_ARGS__)

#define	vsoxei8_v_u32m2_m(...) __riscv_vsoxei8_v_u32m2_m(__VA_ARGS__)

#define	vsoxei8_v_u32m4(...) __riscv_vsoxei8_v_u32m4(__VA_ARGS__)

#define	vsoxei8_v_u32m4_m(...) __riscv_vsoxei8_v_u32m4_m(__VA_ARGS__)

#define	vsoxei8_v_u32m8(...) __riscv_vsoxei8_v_u32m8(__VA_ARGS__)

#define	vsoxei8_v_u32m8_m(...) __riscv_vsoxei8_v_u32m8_m(__VA_ARGS__)

#define	vsoxei8_v_u32mf2(...) __riscv_vsoxei8_v_u32mf2(__VA_ARGS__)

#define	vsoxei8_v_u32mf2_m(...) __riscv_vsoxei8_v_u32mf2_m(__VA_ARGS__)

#define	vsoxei8_v_u64m1(...) __riscv_vsoxei8_v_u64m1(__VA_ARGS__)

#define	vsoxei8_v_u64m1_m(...) __riscv_vsoxei8_v_u64m1_m(__VA_ARGS__)

#define	vsoxei8_v_u64m2(...) __riscv_vsoxei8_v_u64m2(__VA_ARGS__)

#define	vsoxei8_v_u64m2_m(...) __riscv_vsoxei8_v_u64m2_m(__VA_ARGS__)

#define	vsoxei8_v_u64m4(...) __riscv_vsoxei8_v_u64m4(__VA_ARGS__)

#define	vsoxei8_v_u64m4_m(...) __riscv_vsoxei8_v_u64m4_m(__VA_ARGS__)

#define	vsoxei8_v_u64m8(...) __riscv_vsoxei8_v_u64m8(__VA_ARGS__)

#define	vsoxei8_v_u64m8_m(...) __riscv_vsoxei8_v_u64m8_m(__VA_ARGS__)

#define	vsoxei8_v_u8m1(...) __riscv_vsoxei8_v_u8m1(__VA_ARGS__)

#define	vsoxei8_v_u8m1_m(...) __riscv_vsoxei8_v_u8m1_m(__VA_ARGS__)

#define	vsoxei8_v_u8m2(...) __riscv_vsoxei8_v_u8m2(__VA_ARGS__)

#define	vsoxei8_v_u8m2_m(...) __riscv_vsoxei8_v_u8m2_m(__VA_ARGS__)

#define	vsoxei8_v_u8m4(...) __riscv_vsoxei8_v_u8m4(__VA_ARGS__)

#define	vsoxei8_v_u8m4_m(...) __riscv_vsoxei8_v_u8m4_m(__VA_ARGS__)

#define	vsoxei8_v_u8m8(...) __riscv_vsoxei8_v_u8m8(__VA_ARGS__)

#define	vsoxei8_v_u8m8_m(...) __riscv_vsoxei8_v_u8m8_m(__VA_ARGS__)

#define	vsoxei8_v_u8mf2(...) __riscv_vsoxei8_v_u8mf2(__VA_ARGS__)

#define	vsoxei8_v_u8mf2_m(...) __riscv_vsoxei8_v_u8mf2_m(__VA_ARGS__)

#define	vsoxei8_v_u8mf4(...) __riscv_vsoxei8_v_u8mf4(__VA_ARGS__)

#define	vsoxei8_v_u8mf4_m(...) __riscv_vsoxei8_v_u8mf4_m(__VA_ARGS__)

#define	vsoxei8_v_u8mf8(...) __riscv_vsoxei8_v_u8mf8(__VA_ARGS__)

#define	vsoxei8_v_u8mf8_m(...) __riscv_vsoxei8_v_u8mf8_m(__VA_ARGS__)

#define	vsoxseg2ei16_v_f16m1(...) __riscv_vsoxseg2ei16_v_f16m1(__VA_ARGS__)

#define	vsoxseg2ei16_v_f16m1_m(...) __riscv_vsoxseg2ei16_v_f16m1_m(__VA_ARGS__)

#define	vsoxseg2ei16_v_f16m2(...) __riscv_vsoxseg2ei16_v_f16m2(__VA_ARGS__)

#define	vsoxseg2ei16_v_f16m2_m(...) __riscv_vsoxseg2ei16_v_f16m2_m(__VA_ARGS__)

#define	vsoxseg2ei16_v_f16m4(...) __riscv_vsoxseg2ei16_v_f16m4(__VA_ARGS__)

#define	vsoxseg2ei16_v_f16m4_m(...) __riscv_vsoxseg2ei16_v_f16m4_m(__VA_ARGS__)

#define	vsoxseg2ei16_v_f16mf2(...) __riscv_vsoxseg2ei16_v_f16mf2(__VA_ARGS__)

#define	vsoxseg2ei16_v_f16mf2_m(...) __riscv_vsoxseg2ei16_v_f16mf2_m(__VA_ARGS__)

#define	vsoxseg2ei16_v_f16mf4(...) __riscv_vsoxseg2ei16_v_f16mf4(__VA_ARGS__)

#define	vsoxseg2ei16_v_f16mf4_m(...) __riscv_vsoxseg2ei16_v_f16mf4_m(__VA_ARGS__)

#define	vsoxseg2ei16_v_f32m1(...) __riscv_vsoxseg2ei16_v_f32m1(__VA_ARGS__)

#define	vsoxseg2ei16_v_f32m1_m(...) __riscv_vsoxseg2ei16_v_f32m1_m(__VA_ARGS__)

#define	vsoxseg2ei16_v_f32m2(...) __riscv_vsoxseg2ei16_v_f32m2(__VA_ARGS__)

#define	vsoxseg2ei16_v_f32m2_m(...) __riscv_vsoxseg2ei16_v_f32m2_m(__VA_ARGS__)

#define	vsoxseg2ei16_v_f32m4(...) __riscv_vsoxseg2ei16_v_f32m4(__VA_ARGS__)

#define	vsoxseg2ei16_v_f32m4_m(...) __riscv_vsoxseg2ei16_v_f32m4_m(__VA_ARGS__)

#define	vsoxseg2ei16_v_f32mf2(...) __riscv_vsoxseg2ei16_v_f32mf2(__VA_ARGS__)

#define	vsoxseg2ei16_v_f32mf2_m(...) __riscv_vsoxseg2ei16_v_f32mf2_m(__VA_ARGS__)

#define	vsoxseg2ei16_v_f64m1(...) __riscv_vsoxseg2ei16_v_f64m1(__VA_ARGS__)

#define	vsoxseg2ei16_v_f64m1_m(...) __riscv_vsoxseg2ei16_v_f64m1_m(__VA_ARGS__)

#define	vsoxseg2ei16_v_f64m2(...) __riscv_vsoxseg2ei16_v_f64m2(__VA_ARGS__)

#define	vsoxseg2ei16_v_f64m2_m(...) __riscv_vsoxseg2ei16_v_f64m2_m(__VA_ARGS__)

#define	vsoxseg2ei16_v_f64m4(...) __riscv_vsoxseg2ei16_v_f64m4(__VA_ARGS__)

#define	vsoxseg2ei16_v_f64m4_m(...) __riscv_vsoxseg2ei16_v_f64m4_m(__VA_ARGS__)

#define	vsoxseg2ei16_v_i16m1(...) __riscv_vsoxseg2ei16_v_i16m1(__VA_ARGS__)

#define	vsoxseg2ei16_v_i16m1_m(...) __riscv_vsoxseg2ei16_v_i16m1_m(__VA_ARGS__)

#define	vsoxseg2ei16_v_i16m2(...) __riscv_vsoxseg2ei16_v_i16m2(__VA_ARGS__)

#define	vsoxseg2ei16_v_i16m2_m(...) __riscv_vsoxseg2ei16_v_i16m2_m(__VA_ARGS__)

#define	vsoxseg2ei16_v_i16m4(...) __riscv_vsoxseg2ei16_v_i16m4(__VA_ARGS__)

#define	vsoxseg2ei16_v_i16m4_m(...) __riscv_vsoxseg2ei16_v_i16m4_m(__VA_ARGS__)

#define	vsoxseg2ei16_v_i16mf2(...) __riscv_vsoxseg2ei16_v_i16mf2(__VA_ARGS__)

#define	vsoxseg2ei16_v_i16mf2_m(...) __riscv_vsoxseg2ei16_v_i16mf2_m(__VA_ARGS__)

#define	vsoxseg2ei16_v_i16mf4(...) __riscv_vsoxseg2ei16_v_i16mf4(__VA_ARGS__)

#define	vsoxseg2ei16_v_i16mf4_m(...) __riscv_vsoxseg2ei16_v_i16mf4_m(__VA_ARGS__)

#define	vsoxseg2ei16_v_i32m1(...) __riscv_vsoxseg2ei16_v_i32m1(__VA_ARGS__)

#define	vsoxseg2ei16_v_i32m1_m(...) __riscv_vsoxseg2ei16_v_i32m1_m(__VA_ARGS__)

#define	vsoxseg2ei16_v_i32m2(...) __riscv_vsoxseg2ei16_v_i32m2(__VA_ARGS__)

#define	vsoxseg2ei16_v_i32m2_m(...) __riscv_vsoxseg2ei16_v_i32m2_m(__VA_ARGS__)

#define	vsoxseg2ei16_v_i32m4(...) __riscv_vsoxseg2ei16_v_i32m4(__VA_ARGS__)

#define	vsoxseg2ei16_v_i32m4_m(...) __riscv_vsoxseg2ei16_v_i32m4_m(__VA_ARGS__)

#define	vsoxseg2ei16_v_i32mf2(...) __riscv_vsoxseg2ei16_v_i32mf2(__VA_ARGS__)

#define	vsoxseg2ei16_v_i32mf2_m(...) __riscv_vsoxseg2ei16_v_i32mf2_m(__VA_ARGS__)

#define	vsoxseg2ei16_v_i64m1(...) __riscv_vsoxseg2ei16_v_i64m1(__VA_ARGS__)

#define	vsoxseg2ei16_v_i64m1_m(...) __riscv_vsoxseg2ei16_v_i64m1_m(__VA_ARGS__)

#define	vsoxseg2ei16_v_i64m2(...) __riscv_vsoxseg2ei16_v_i64m2(__VA_ARGS__)

#define	vsoxseg2ei16_v_i64m2_m(...) __riscv_vsoxseg2ei16_v_i64m2_m(__VA_ARGS__)

#define	vsoxseg2ei16_v_i64m4(...) __riscv_vsoxseg2ei16_v_i64m4(__VA_ARGS__)

#define	vsoxseg2ei16_v_i64m4_m(...) __riscv_vsoxseg2ei16_v_i64m4_m(__VA_ARGS__)

#define	vsoxseg2ei16_v_i8m1(...) __riscv_vsoxseg2ei16_v_i8m1(__VA_ARGS__)

#define	vsoxseg2ei16_v_i8m1_m(...) __riscv_vsoxseg2ei16_v_i8m1_m(__VA_ARGS__)

#define	vsoxseg2ei16_v_i8m2(...) __riscv_vsoxseg2ei16_v_i8m2(__VA_ARGS__)

#define	vsoxseg2ei16_v_i8m2_m(...) __riscv_vsoxseg2ei16_v_i8m2_m(__VA_ARGS__)

#define	vsoxseg2ei16_v_i8m4(...) __riscv_vsoxseg2ei16_v_i8m4(__VA_ARGS__)

#define	vsoxseg2ei16_v_i8m4_m(...) __riscv_vsoxseg2ei16_v_i8m4_m(__VA_ARGS__)

#define	vsoxseg2ei16_v_i8mf2(...) __riscv_vsoxseg2ei16_v_i8mf2(__VA_ARGS__)

#define	vsoxseg2ei16_v_i8mf2_m(...) __riscv_vsoxseg2ei16_v_i8mf2_m(__VA_ARGS__)

#define	vsoxseg2ei16_v_i8mf4(...) __riscv_vsoxseg2ei16_v_i8mf4(__VA_ARGS__)

#define	vsoxseg2ei16_v_i8mf4_m(...) __riscv_vsoxseg2ei16_v_i8mf4_m(__VA_ARGS__)

#define	vsoxseg2ei16_v_i8mf8(...) __riscv_vsoxseg2ei16_v_i8mf8(__VA_ARGS__)

#define	vsoxseg2ei16_v_i8mf8_m(...) __riscv_vsoxseg2ei16_v_i8mf8_m(__VA_ARGS__)

#define	vsoxseg2ei16_v_u16m1(...) __riscv_vsoxseg2ei16_v_u16m1(__VA_ARGS__)

#define	vsoxseg2ei16_v_u16m1_m(...) __riscv_vsoxseg2ei16_v_u16m1_m(__VA_ARGS__)

#define	vsoxseg2ei16_v_u16m2(...) __riscv_vsoxseg2ei16_v_u16m2(__VA_ARGS__)

#define	vsoxseg2ei16_v_u16m2_m(...) __riscv_vsoxseg2ei16_v_u16m2_m(__VA_ARGS__)

#define	vsoxseg2ei16_v_u16m4(...) __riscv_vsoxseg2ei16_v_u16m4(__VA_ARGS__)

#define	vsoxseg2ei16_v_u16m4_m(...) __riscv_vsoxseg2ei16_v_u16m4_m(__VA_ARGS__)

#define	vsoxseg2ei16_v_u16mf2(...) __riscv_vsoxseg2ei16_v_u16mf2(__VA_ARGS__)

#define	vsoxseg2ei16_v_u16mf2_m(...) __riscv_vsoxseg2ei16_v_u16mf2_m(__VA_ARGS__)

#define	vsoxseg2ei16_v_u16mf4(...) __riscv_vsoxseg2ei16_v_u16mf4(__VA_ARGS__)

#define	vsoxseg2ei16_v_u16mf4_m(...) __riscv_vsoxseg2ei16_v_u16mf4_m(__VA_ARGS__)

#define	vsoxseg2ei16_v_u32m1(...) __riscv_vsoxseg2ei16_v_u32m1(__VA_ARGS__)

#define	vsoxseg2ei16_v_u32m1_m(...) __riscv_vsoxseg2ei16_v_u32m1_m(__VA_ARGS__)

#define	vsoxseg2ei16_v_u32m2(...) __riscv_vsoxseg2ei16_v_u32m2(__VA_ARGS__)

#define	vsoxseg2ei16_v_u32m2_m(...) __riscv_vsoxseg2ei16_v_u32m2_m(__VA_ARGS__)

#define	vsoxseg2ei16_v_u32m4(...) __riscv_vsoxseg2ei16_v_u32m4(__VA_ARGS__)

#define	vsoxseg2ei16_v_u32m4_m(...) __riscv_vsoxseg2ei16_v_u32m4_m(__VA_ARGS__)

#define	vsoxseg2ei16_v_u32mf2(...) __riscv_vsoxseg2ei16_v_u32mf2(__VA_ARGS__)

#define	vsoxseg2ei16_v_u32mf2_m(...) __riscv_vsoxseg2ei16_v_u32mf2_m(__VA_ARGS__)

#define	vsoxseg2ei16_v_u64m1(...) __riscv_vsoxseg2ei16_v_u64m1(__VA_ARGS__)

#define	vsoxseg2ei16_v_u64m1_m(...) __riscv_vsoxseg2ei16_v_u64m1_m(__VA_ARGS__)

#define	vsoxseg2ei16_v_u64m2(...) __riscv_vsoxseg2ei16_v_u64m2(__VA_ARGS__)

#define	vsoxseg2ei16_v_u64m2_m(...) __riscv_vsoxseg2ei16_v_u64m2_m(__VA_ARGS__)

#define	vsoxseg2ei16_v_u64m4(...) __riscv_vsoxseg2ei16_v_u64m4(__VA_ARGS__)

#define	vsoxseg2ei16_v_u64m4_m(...) __riscv_vsoxseg2ei16_v_u64m4_m(__VA_ARGS__)

#define	vsoxseg2ei16_v_u8m1(...) __riscv_vsoxseg2ei16_v_u8m1(__VA_ARGS__)

#define	vsoxseg2ei16_v_u8m1_m(...) __riscv_vsoxseg2ei16_v_u8m1_m(__VA_ARGS__)

#define	vsoxseg2ei16_v_u8m2(...) __riscv_vsoxseg2ei16_v_u8m2(__VA_ARGS__)

#define	vsoxseg2ei16_v_u8m2_m(...) __riscv_vsoxseg2ei16_v_u8m2_m(__VA_ARGS__)

#define	vsoxseg2ei16_v_u8m4(...) __riscv_vsoxseg2ei16_v_u8m4(__VA_ARGS__)

#define	vsoxseg2ei16_v_u8m4_m(...) __riscv_vsoxseg2ei16_v_u8m4_m(__VA_ARGS__)

#define	vsoxseg2ei16_v_u8mf2(...) __riscv_vsoxseg2ei16_v_u8mf2(__VA_ARGS__)

#define	vsoxseg2ei16_v_u8mf2_m(...) __riscv_vsoxseg2ei16_v_u8mf2_m(__VA_ARGS__)

#define	vsoxseg2ei16_v_u8mf4(...) __riscv_vsoxseg2ei16_v_u8mf4(__VA_ARGS__)

#define	vsoxseg2ei16_v_u8mf4_m(...) __riscv_vsoxseg2ei16_v_u8mf4_m(__VA_ARGS__)

#define	vsoxseg2ei16_v_u8mf8(...) __riscv_vsoxseg2ei16_v_u8mf8(__VA_ARGS__)

#define	vsoxseg2ei16_v_u8mf8_m(...) __riscv_vsoxseg2ei16_v_u8mf8_m(__VA_ARGS__)

#define	vsoxseg2ei32_v_f16m1(...) __riscv_vsoxseg2ei32_v_f16m1(__VA_ARGS__)

#define	vsoxseg2ei32_v_f16m1_m(...) __riscv_vsoxseg2ei32_v_f16m1_m(__VA_ARGS__)

#define	vsoxseg2ei32_v_f16m2(...) __riscv_vsoxseg2ei32_v_f16m2(__VA_ARGS__)

#define	vsoxseg2ei32_v_f16m2_m(...) __riscv_vsoxseg2ei32_v_f16m2_m(__VA_ARGS__)

#define	vsoxseg2ei32_v_f16m4(...) __riscv_vsoxseg2ei32_v_f16m4(__VA_ARGS__)

#define	vsoxseg2ei32_v_f16m4_m(...) __riscv_vsoxseg2ei32_v_f16m4_m(__VA_ARGS__)

#define	vsoxseg2ei32_v_f16mf2(...) __riscv_vsoxseg2ei32_v_f16mf2(__VA_ARGS__)

#define	vsoxseg2ei32_v_f16mf2_m(...) __riscv_vsoxseg2ei32_v_f16mf2_m(__VA_ARGS__)

#define	vsoxseg2ei32_v_f16mf4(...) __riscv_vsoxseg2ei32_v_f16mf4(__VA_ARGS__)

#define	vsoxseg2ei32_v_f16mf4_m(...) __riscv_vsoxseg2ei32_v_f16mf4_m(__VA_ARGS__)

#define	vsoxseg2ei32_v_f32m1(...) __riscv_vsoxseg2ei32_v_f32m1(__VA_ARGS__)

#define	vsoxseg2ei32_v_f32m1_m(...) __riscv_vsoxseg2ei32_v_f32m1_m(__VA_ARGS__)

#define	vsoxseg2ei32_v_f32m2(...) __riscv_vsoxseg2ei32_v_f32m2(__VA_ARGS__)

#define	vsoxseg2ei32_v_f32m2_m(...) __riscv_vsoxseg2ei32_v_f32m2_m(__VA_ARGS__)

#define	vsoxseg2ei32_v_f32m4(...) __riscv_vsoxseg2ei32_v_f32m4(__VA_ARGS__)

#define	vsoxseg2ei32_v_f32m4_m(...) __riscv_vsoxseg2ei32_v_f32m4_m(__VA_ARGS__)

#define	vsoxseg2ei32_v_f32mf2(...) __riscv_vsoxseg2ei32_v_f32mf2(__VA_ARGS__)

#define	vsoxseg2ei32_v_f32mf2_m(...) __riscv_vsoxseg2ei32_v_f32mf2_m(__VA_ARGS__)

#define	vsoxseg2ei32_v_f64m1(...) __riscv_vsoxseg2ei32_v_f64m1(__VA_ARGS__)

#define	vsoxseg2ei32_v_f64m1_m(...) __riscv_vsoxseg2ei32_v_f64m1_m(__VA_ARGS__)

#define	vsoxseg2ei32_v_f64m2(...) __riscv_vsoxseg2ei32_v_f64m2(__VA_ARGS__)

#define	vsoxseg2ei32_v_f64m2_m(...) __riscv_vsoxseg2ei32_v_f64m2_m(__VA_ARGS__)

#define	vsoxseg2ei32_v_f64m4(...) __riscv_vsoxseg2ei32_v_f64m4(__VA_ARGS__)

#define	vsoxseg2ei32_v_f64m4_m(...) __riscv_vsoxseg2ei32_v_f64m4_m(__VA_ARGS__)

#define	vsoxseg2ei32_v_i16m1(...) __riscv_vsoxseg2ei32_v_i16m1(__VA_ARGS__)

#define	vsoxseg2ei32_v_i16m1_m(...) __riscv_vsoxseg2ei32_v_i16m1_m(__VA_ARGS__)

#define	vsoxseg2ei32_v_i16m2(...) __riscv_vsoxseg2ei32_v_i16m2(__VA_ARGS__)

#define	vsoxseg2ei32_v_i16m2_m(...) __riscv_vsoxseg2ei32_v_i16m2_m(__VA_ARGS__)

#define	vsoxseg2ei32_v_i16m4(...) __riscv_vsoxseg2ei32_v_i16m4(__VA_ARGS__)

#define	vsoxseg2ei32_v_i16m4_m(...) __riscv_vsoxseg2ei32_v_i16m4_m(__VA_ARGS__)

#define	vsoxseg2ei32_v_i16mf2(...) __riscv_vsoxseg2ei32_v_i16mf2(__VA_ARGS__)

#define	vsoxseg2ei32_v_i16mf2_m(...) __riscv_vsoxseg2ei32_v_i16mf2_m(__VA_ARGS__)

#define	vsoxseg2ei32_v_i16mf4(...) __riscv_vsoxseg2ei32_v_i16mf4(__VA_ARGS__)

#define	vsoxseg2ei32_v_i16mf4_m(...) __riscv_vsoxseg2ei32_v_i16mf4_m(__VA_ARGS__)

#define	vsoxseg2ei32_v_i32m1(...) __riscv_vsoxseg2ei32_v_i32m1(__VA_ARGS__)

#define	vsoxseg2ei32_v_i32m1_m(...) __riscv_vsoxseg2ei32_v_i32m1_m(__VA_ARGS__)

#define	vsoxseg2ei32_v_i32m2(...) __riscv_vsoxseg2ei32_v_i32m2(__VA_ARGS__)

#define	vsoxseg2ei32_v_i32m2_m(...) __riscv_vsoxseg2ei32_v_i32m2_m(__VA_ARGS__)

#define	vsoxseg2ei32_v_i32m4(...) __riscv_vsoxseg2ei32_v_i32m4(__VA_ARGS__)

#define	vsoxseg2ei32_v_i32m4_m(...) __riscv_vsoxseg2ei32_v_i32m4_m(__VA_ARGS__)

#define	vsoxseg2ei32_v_i32mf2(...) __riscv_vsoxseg2ei32_v_i32mf2(__VA_ARGS__)

#define	vsoxseg2ei32_v_i32mf2_m(...) __riscv_vsoxseg2ei32_v_i32mf2_m(__VA_ARGS__)

#define	vsoxseg2ei32_v_i64m1(...) __riscv_vsoxseg2ei32_v_i64m1(__VA_ARGS__)

#define	vsoxseg2ei32_v_i64m1_m(...) __riscv_vsoxseg2ei32_v_i64m1_m(__VA_ARGS__)

#define	vsoxseg2ei32_v_i64m2(...) __riscv_vsoxseg2ei32_v_i64m2(__VA_ARGS__)

#define	vsoxseg2ei32_v_i64m2_m(...) __riscv_vsoxseg2ei32_v_i64m2_m(__VA_ARGS__)

#define	vsoxseg2ei32_v_i64m4(...) __riscv_vsoxseg2ei32_v_i64m4(__VA_ARGS__)

#define	vsoxseg2ei32_v_i64m4_m(...) __riscv_vsoxseg2ei32_v_i64m4_m(__VA_ARGS__)

#define	vsoxseg2ei32_v_i8m1(...) __riscv_vsoxseg2ei32_v_i8m1(__VA_ARGS__)

#define	vsoxseg2ei32_v_i8m1_m(...) __riscv_vsoxseg2ei32_v_i8m1_m(__VA_ARGS__)

#define	vsoxseg2ei32_v_i8m2(...) __riscv_vsoxseg2ei32_v_i8m2(__VA_ARGS__)

#define	vsoxseg2ei32_v_i8m2_m(...) __riscv_vsoxseg2ei32_v_i8m2_m(__VA_ARGS__)

#define	vsoxseg2ei32_v_i8mf2(...) __riscv_vsoxseg2ei32_v_i8mf2(__VA_ARGS__)

#define	vsoxseg2ei32_v_i8mf2_m(...) __riscv_vsoxseg2ei32_v_i8mf2_m(__VA_ARGS__)

#define	vsoxseg2ei32_v_i8mf4(...) __riscv_vsoxseg2ei32_v_i8mf4(__VA_ARGS__)

#define	vsoxseg2ei32_v_i8mf4_m(...) __riscv_vsoxseg2ei32_v_i8mf4_m(__VA_ARGS__)

#define	vsoxseg2ei32_v_i8mf8(...) __riscv_vsoxseg2ei32_v_i8mf8(__VA_ARGS__)

#define	vsoxseg2ei32_v_i8mf8_m(...) __riscv_vsoxseg2ei32_v_i8mf8_m(__VA_ARGS__)

#define	vsoxseg2ei32_v_u16m1(...) __riscv_vsoxseg2ei32_v_u16m1(__VA_ARGS__)

#define	vsoxseg2ei32_v_u16m1_m(...) __riscv_vsoxseg2ei32_v_u16m1_m(__VA_ARGS__)

#define	vsoxseg2ei32_v_u16m2(...) __riscv_vsoxseg2ei32_v_u16m2(__VA_ARGS__)

#define	vsoxseg2ei32_v_u16m2_m(...) __riscv_vsoxseg2ei32_v_u16m2_m(__VA_ARGS__)

#define	vsoxseg2ei32_v_u16m4(...) __riscv_vsoxseg2ei32_v_u16m4(__VA_ARGS__)

#define	vsoxseg2ei32_v_u16m4_m(...) __riscv_vsoxseg2ei32_v_u16m4_m(__VA_ARGS__)

#define	vsoxseg2ei32_v_u16mf2(...) __riscv_vsoxseg2ei32_v_u16mf2(__VA_ARGS__)

#define	vsoxseg2ei32_v_u16mf2_m(...) __riscv_vsoxseg2ei32_v_u16mf2_m(__VA_ARGS__)

#define	vsoxseg2ei32_v_u16mf4(...) __riscv_vsoxseg2ei32_v_u16mf4(__VA_ARGS__)

#define	vsoxseg2ei32_v_u16mf4_m(...) __riscv_vsoxseg2ei32_v_u16mf4_m(__VA_ARGS__)

#define	vsoxseg2ei32_v_u32m1(...) __riscv_vsoxseg2ei32_v_u32m1(__VA_ARGS__)

#define	vsoxseg2ei32_v_u32m1_m(...) __riscv_vsoxseg2ei32_v_u32m1_m(__VA_ARGS__)

#define	vsoxseg2ei32_v_u32m2(...) __riscv_vsoxseg2ei32_v_u32m2(__VA_ARGS__)

#define	vsoxseg2ei32_v_u32m2_m(...) __riscv_vsoxseg2ei32_v_u32m2_m(__VA_ARGS__)

#define	vsoxseg2ei32_v_u32m4(...) __riscv_vsoxseg2ei32_v_u32m4(__VA_ARGS__)

#define	vsoxseg2ei32_v_u32m4_m(...) __riscv_vsoxseg2ei32_v_u32m4_m(__VA_ARGS__)

#define	vsoxseg2ei32_v_u32mf2(...) __riscv_vsoxseg2ei32_v_u32mf2(__VA_ARGS__)

#define	vsoxseg2ei32_v_u32mf2_m(...) __riscv_vsoxseg2ei32_v_u32mf2_m(__VA_ARGS__)

#define	vsoxseg2ei32_v_u64m1(...) __riscv_vsoxseg2ei32_v_u64m1(__VA_ARGS__)

#define	vsoxseg2ei32_v_u64m1_m(...) __riscv_vsoxseg2ei32_v_u64m1_m(__VA_ARGS__)

#define	vsoxseg2ei32_v_u64m2(...) __riscv_vsoxseg2ei32_v_u64m2(__VA_ARGS__)

#define	vsoxseg2ei32_v_u64m2_m(...) __riscv_vsoxseg2ei32_v_u64m2_m(__VA_ARGS__)

#define	vsoxseg2ei32_v_u64m4(...) __riscv_vsoxseg2ei32_v_u64m4(__VA_ARGS__)

#define	vsoxseg2ei32_v_u64m4_m(...) __riscv_vsoxseg2ei32_v_u64m4_m(__VA_ARGS__)

#define	vsoxseg2ei32_v_u8m1(...) __riscv_vsoxseg2ei32_v_u8m1(__VA_ARGS__)

#define	vsoxseg2ei32_v_u8m1_m(...) __riscv_vsoxseg2ei32_v_u8m1_m(__VA_ARGS__)

#define	vsoxseg2ei32_v_u8m2(...) __riscv_vsoxseg2ei32_v_u8m2(__VA_ARGS__)

#define	vsoxseg2ei32_v_u8m2_m(...) __riscv_vsoxseg2ei32_v_u8m2_m(__VA_ARGS__)

#define	vsoxseg2ei32_v_u8mf2(...) __riscv_vsoxseg2ei32_v_u8mf2(__VA_ARGS__)

#define	vsoxseg2ei32_v_u8mf2_m(...) __riscv_vsoxseg2ei32_v_u8mf2_m(__VA_ARGS__)

#define	vsoxseg2ei32_v_u8mf4(...) __riscv_vsoxseg2ei32_v_u8mf4(__VA_ARGS__)

#define	vsoxseg2ei32_v_u8mf4_m(...) __riscv_vsoxseg2ei32_v_u8mf4_m(__VA_ARGS__)

#define	vsoxseg2ei32_v_u8mf8(...) __riscv_vsoxseg2ei32_v_u8mf8(__VA_ARGS__)

#define	vsoxseg2ei32_v_u8mf8_m(...) __riscv_vsoxseg2ei32_v_u8mf8_m(__VA_ARGS__)

#define	vsoxseg2ei64_v_f16m1(...) __riscv_vsoxseg2ei64_v_f16m1(__VA_ARGS__)

#define	vsoxseg2ei64_v_f16m1_m(...) __riscv_vsoxseg2ei64_v_f16m1_m(__VA_ARGS__)

#define	vsoxseg2ei64_v_f16m2(...) __riscv_vsoxseg2ei64_v_f16m2(__VA_ARGS__)

#define	vsoxseg2ei64_v_f16m2_m(...) __riscv_vsoxseg2ei64_v_f16m2_m(__VA_ARGS__)

#define	vsoxseg2ei64_v_f16mf2(...) __riscv_vsoxseg2ei64_v_f16mf2(__VA_ARGS__)

#define	vsoxseg2ei64_v_f16mf2_m(...) __riscv_vsoxseg2ei64_v_f16mf2_m(__VA_ARGS__)

#define	vsoxseg2ei64_v_f16mf4(...) __riscv_vsoxseg2ei64_v_f16mf4(__VA_ARGS__)

#define	vsoxseg2ei64_v_f16mf4_m(...) __riscv_vsoxseg2ei64_v_f16mf4_m(__VA_ARGS__)

#define	vsoxseg2ei64_v_f32m1(...) __riscv_vsoxseg2ei64_v_f32m1(__VA_ARGS__)

#define	vsoxseg2ei64_v_f32m1_m(...) __riscv_vsoxseg2ei64_v_f32m1_m(__VA_ARGS__)

#define	vsoxseg2ei64_v_f32m2(...) __riscv_vsoxseg2ei64_v_f32m2(__VA_ARGS__)

#define	vsoxseg2ei64_v_f32m2_m(...) __riscv_vsoxseg2ei64_v_f32m2_m(__VA_ARGS__)

#define	vsoxseg2ei64_v_f32m4(...) __riscv_vsoxseg2ei64_v_f32m4(__VA_ARGS__)

#define	vsoxseg2ei64_v_f32m4_m(...) __riscv_vsoxseg2ei64_v_f32m4_m(__VA_ARGS__)

#define	vsoxseg2ei64_v_f32mf2(...) __riscv_vsoxseg2ei64_v_f32mf2(__VA_ARGS__)

#define	vsoxseg2ei64_v_f32mf2_m(...) __riscv_vsoxseg2ei64_v_f32mf2_m(__VA_ARGS__)

#define	vsoxseg2ei64_v_f64m1(...) __riscv_vsoxseg2ei64_v_f64m1(__VA_ARGS__)

#define	vsoxseg2ei64_v_f64m1_m(...) __riscv_vsoxseg2ei64_v_f64m1_m(__VA_ARGS__)

#define	vsoxseg2ei64_v_f64m2(...) __riscv_vsoxseg2ei64_v_f64m2(__VA_ARGS__)

#define	vsoxseg2ei64_v_f64m2_m(...) __riscv_vsoxseg2ei64_v_f64m2_m(__VA_ARGS__)

#define	vsoxseg2ei64_v_f64m4(...) __riscv_vsoxseg2ei64_v_f64m4(__VA_ARGS__)

#define	vsoxseg2ei64_v_f64m4_m(...) __riscv_vsoxseg2ei64_v_f64m4_m(__VA_ARGS__)

#define	vsoxseg2ei64_v_i16m1(...) __riscv_vsoxseg2ei64_v_i16m1(__VA_ARGS__)

#define	vsoxseg2ei64_v_i16m1_m(...) __riscv_vsoxseg2ei64_v_i16m1_m(__VA_ARGS__)

#define	vsoxseg2ei64_v_i16m2(...) __riscv_vsoxseg2ei64_v_i16m2(__VA_ARGS__)

#define	vsoxseg2ei64_v_i16m2_m(...) __riscv_vsoxseg2ei64_v_i16m2_m(__VA_ARGS__)

#define	vsoxseg2ei64_v_i16mf2(...) __riscv_vsoxseg2ei64_v_i16mf2(__VA_ARGS__)

#define	vsoxseg2ei64_v_i16mf2_m(...) __riscv_vsoxseg2ei64_v_i16mf2_m(__VA_ARGS__)

#define	vsoxseg2ei64_v_i16mf4(...) __riscv_vsoxseg2ei64_v_i16mf4(__VA_ARGS__)

#define	vsoxseg2ei64_v_i16mf4_m(...) __riscv_vsoxseg2ei64_v_i16mf4_m(__VA_ARGS__)

#define	vsoxseg2ei64_v_i32m1(...) __riscv_vsoxseg2ei64_v_i32m1(__VA_ARGS__)

#define	vsoxseg2ei64_v_i32m1_m(...) __riscv_vsoxseg2ei64_v_i32m1_m(__VA_ARGS__)

#define	vsoxseg2ei64_v_i32m2(...) __riscv_vsoxseg2ei64_v_i32m2(__VA_ARGS__)

#define	vsoxseg2ei64_v_i32m2_m(...) __riscv_vsoxseg2ei64_v_i32m2_m(__VA_ARGS__)

#define	vsoxseg2ei64_v_i32m4(...) __riscv_vsoxseg2ei64_v_i32m4(__VA_ARGS__)

#define	vsoxseg2ei64_v_i32m4_m(...) __riscv_vsoxseg2ei64_v_i32m4_m(__VA_ARGS__)

#define	vsoxseg2ei64_v_i32mf2(...) __riscv_vsoxseg2ei64_v_i32mf2(__VA_ARGS__)

#define	vsoxseg2ei64_v_i32mf2_m(...) __riscv_vsoxseg2ei64_v_i32mf2_m(__VA_ARGS__)

#define	vsoxseg2ei64_v_i64m1(...) __riscv_vsoxseg2ei64_v_i64m1(__VA_ARGS__)

#define	vsoxseg2ei64_v_i64m1_m(...) __riscv_vsoxseg2ei64_v_i64m1_m(__VA_ARGS__)

#define	vsoxseg2ei64_v_i64m2(...) __riscv_vsoxseg2ei64_v_i64m2(__VA_ARGS__)

#define	vsoxseg2ei64_v_i64m2_m(...) __riscv_vsoxseg2ei64_v_i64m2_m(__VA_ARGS__)

#define	vsoxseg2ei64_v_i64m4(...) __riscv_vsoxseg2ei64_v_i64m4(__VA_ARGS__)

#define	vsoxseg2ei64_v_i64m4_m(...) __riscv_vsoxseg2ei64_v_i64m4_m(__VA_ARGS__)

#define	vsoxseg2ei64_v_i8m1(...) __riscv_vsoxseg2ei64_v_i8m1(__VA_ARGS__)

#define	vsoxseg2ei64_v_i8m1_m(...) __riscv_vsoxseg2ei64_v_i8m1_m(__VA_ARGS__)

#define	vsoxseg2ei64_v_i8mf2(...) __riscv_vsoxseg2ei64_v_i8mf2(__VA_ARGS__)

#define	vsoxseg2ei64_v_i8mf2_m(...) __riscv_vsoxseg2ei64_v_i8mf2_m(__VA_ARGS__)

#define	vsoxseg2ei64_v_i8mf4(...) __riscv_vsoxseg2ei64_v_i8mf4(__VA_ARGS__)

#define	vsoxseg2ei64_v_i8mf4_m(...) __riscv_vsoxseg2ei64_v_i8mf4_m(__VA_ARGS__)

#define	vsoxseg2ei64_v_i8mf8(...) __riscv_vsoxseg2ei64_v_i8mf8(__VA_ARGS__)

#define	vsoxseg2ei64_v_i8mf8_m(...) __riscv_vsoxseg2ei64_v_i8mf8_m(__VA_ARGS__)

#define	vsoxseg2ei64_v_u16m1(...) __riscv_vsoxseg2ei64_v_u16m1(__VA_ARGS__)

#define	vsoxseg2ei64_v_u16m1_m(...) __riscv_vsoxseg2ei64_v_u16m1_m(__VA_ARGS__)

#define	vsoxseg2ei64_v_u16m2(...) __riscv_vsoxseg2ei64_v_u16m2(__VA_ARGS__)

#define	vsoxseg2ei64_v_u16m2_m(...) __riscv_vsoxseg2ei64_v_u16m2_m(__VA_ARGS__)

#define	vsoxseg2ei64_v_u16mf2(...) __riscv_vsoxseg2ei64_v_u16mf2(__VA_ARGS__)

#define	vsoxseg2ei64_v_u16mf2_m(...) __riscv_vsoxseg2ei64_v_u16mf2_m(__VA_ARGS__)

#define	vsoxseg2ei64_v_u16mf4(...) __riscv_vsoxseg2ei64_v_u16mf4(__VA_ARGS__)

#define	vsoxseg2ei64_v_u16mf4_m(...) __riscv_vsoxseg2ei64_v_u16mf4_m(__VA_ARGS__)

#define	vsoxseg2ei64_v_u32m1(...) __riscv_vsoxseg2ei64_v_u32m1(__VA_ARGS__)

#define	vsoxseg2ei64_v_u32m1_m(...) __riscv_vsoxseg2ei64_v_u32m1_m(__VA_ARGS__)

#define	vsoxseg2ei64_v_u32m2(...) __riscv_vsoxseg2ei64_v_u32m2(__VA_ARGS__)

#define	vsoxseg2ei64_v_u32m2_m(...) __riscv_vsoxseg2ei64_v_u32m2_m(__VA_ARGS__)

#define	vsoxseg2ei64_v_u32m4(...) __riscv_vsoxseg2ei64_v_u32m4(__VA_ARGS__)

#define	vsoxseg2ei64_v_u32m4_m(...) __riscv_vsoxseg2ei64_v_u32m4_m(__VA_ARGS__)

#define	vsoxseg2ei64_v_u32mf2(...) __riscv_vsoxseg2ei64_v_u32mf2(__VA_ARGS__)

#define	vsoxseg2ei64_v_u32mf2_m(...) __riscv_vsoxseg2ei64_v_u32mf2_m(__VA_ARGS__)

#define	vsoxseg2ei64_v_u64m1(...) __riscv_vsoxseg2ei64_v_u64m1(__VA_ARGS__)

#define	vsoxseg2ei64_v_u64m1_m(...) __riscv_vsoxseg2ei64_v_u64m1_m(__VA_ARGS__)

#define	vsoxseg2ei64_v_u64m2(...) __riscv_vsoxseg2ei64_v_u64m2(__VA_ARGS__)

#define	vsoxseg2ei64_v_u64m2_m(...) __riscv_vsoxseg2ei64_v_u64m2_m(__VA_ARGS__)

#define	vsoxseg2ei64_v_u64m4(...) __riscv_vsoxseg2ei64_v_u64m4(__VA_ARGS__)

#define	vsoxseg2ei64_v_u64m4_m(...) __riscv_vsoxseg2ei64_v_u64m4_m(__VA_ARGS__)

#define	vsoxseg2ei64_v_u8m1(...) __riscv_vsoxseg2ei64_v_u8m1(__VA_ARGS__)

#define	vsoxseg2ei64_v_u8m1_m(...) __riscv_vsoxseg2ei64_v_u8m1_m(__VA_ARGS__)

#define	vsoxseg2ei64_v_u8mf2(...) __riscv_vsoxseg2ei64_v_u8mf2(__VA_ARGS__)

#define	vsoxseg2ei64_v_u8mf2_m(...) __riscv_vsoxseg2ei64_v_u8mf2_m(__VA_ARGS__)

#define	vsoxseg2ei64_v_u8mf4(...) __riscv_vsoxseg2ei64_v_u8mf4(__VA_ARGS__)

#define	vsoxseg2ei64_v_u8mf4_m(...) __riscv_vsoxseg2ei64_v_u8mf4_m(__VA_ARGS__)

#define	vsoxseg2ei64_v_u8mf8(...) __riscv_vsoxseg2ei64_v_u8mf8(__VA_ARGS__)

#define	vsoxseg2ei64_v_u8mf8_m(...) __riscv_vsoxseg2ei64_v_u8mf8_m(__VA_ARGS__)

#define	vsoxseg2ei8_v_f16m1(...) __riscv_vsoxseg2ei8_v_f16m1(__VA_ARGS__)

#define	vsoxseg2ei8_v_f16m1_m(...) __riscv_vsoxseg2ei8_v_f16m1_m(__VA_ARGS__)

#define	vsoxseg2ei8_v_f16m2(...) __riscv_vsoxseg2ei8_v_f16m2(__VA_ARGS__)

#define	vsoxseg2ei8_v_f16m2_m(...) __riscv_vsoxseg2ei8_v_f16m2_m(__VA_ARGS__)

#define	vsoxseg2ei8_v_f16m4(...) __riscv_vsoxseg2ei8_v_f16m4(__VA_ARGS__)

#define	vsoxseg2ei8_v_f16m4_m(...) __riscv_vsoxseg2ei8_v_f16m4_m(__VA_ARGS__)

#define	vsoxseg2ei8_v_f16mf2(...) __riscv_vsoxseg2ei8_v_f16mf2(__VA_ARGS__)

#define	vsoxseg2ei8_v_f16mf2_m(...) __riscv_vsoxseg2ei8_v_f16mf2_m(__VA_ARGS__)

#define	vsoxseg2ei8_v_f16mf4(...) __riscv_vsoxseg2ei8_v_f16mf4(__VA_ARGS__)

#define	vsoxseg2ei8_v_f16mf4_m(...) __riscv_vsoxseg2ei8_v_f16mf4_m(__VA_ARGS__)

#define	vsoxseg2ei8_v_f32m1(...) __riscv_vsoxseg2ei8_v_f32m1(__VA_ARGS__)

#define	vsoxseg2ei8_v_f32m1_m(...) __riscv_vsoxseg2ei8_v_f32m1_m(__VA_ARGS__)

#define	vsoxseg2ei8_v_f32m2(...) __riscv_vsoxseg2ei8_v_f32m2(__VA_ARGS__)

#define	vsoxseg2ei8_v_f32m2_m(...) __riscv_vsoxseg2ei8_v_f32m2_m(__VA_ARGS__)

#define	vsoxseg2ei8_v_f32m4(...) __riscv_vsoxseg2ei8_v_f32m4(__VA_ARGS__)

#define	vsoxseg2ei8_v_f32m4_m(...) __riscv_vsoxseg2ei8_v_f32m4_m(__VA_ARGS__)

#define	vsoxseg2ei8_v_f32mf2(...) __riscv_vsoxseg2ei8_v_f32mf2(__VA_ARGS__)

#define	vsoxseg2ei8_v_f32mf2_m(...) __riscv_vsoxseg2ei8_v_f32mf2_m(__VA_ARGS__)

#define	vsoxseg2ei8_v_f64m1(...) __riscv_vsoxseg2ei8_v_f64m1(__VA_ARGS__)

#define	vsoxseg2ei8_v_f64m1_m(...) __riscv_vsoxseg2ei8_v_f64m1_m(__VA_ARGS__)

#define	vsoxseg2ei8_v_f64m2(...) __riscv_vsoxseg2ei8_v_f64m2(__VA_ARGS__)

#define	vsoxseg2ei8_v_f64m2_m(...) __riscv_vsoxseg2ei8_v_f64m2_m(__VA_ARGS__)

#define	vsoxseg2ei8_v_f64m4(...) __riscv_vsoxseg2ei8_v_f64m4(__VA_ARGS__)

#define	vsoxseg2ei8_v_f64m4_m(...) __riscv_vsoxseg2ei8_v_f64m4_m(__VA_ARGS__)

#define	vsoxseg2ei8_v_i16m1(...) __riscv_vsoxseg2ei8_v_i16m1(__VA_ARGS__)

#define	vsoxseg2ei8_v_i16m1_m(...) __riscv_vsoxseg2ei8_v_i16m1_m(__VA_ARGS__)

#define	vsoxseg2ei8_v_i16m2(...) __riscv_vsoxseg2ei8_v_i16m2(__VA_ARGS__)

#define	vsoxseg2ei8_v_i16m2_m(...) __riscv_vsoxseg2ei8_v_i16m2_m(__VA_ARGS__)

#define	vsoxseg2ei8_v_i16m4(...) __riscv_vsoxseg2ei8_v_i16m4(__VA_ARGS__)

#define	vsoxseg2ei8_v_i16m4_m(...) __riscv_vsoxseg2ei8_v_i16m4_m(__VA_ARGS__)

#define	vsoxseg2ei8_v_i16mf2(...) __riscv_vsoxseg2ei8_v_i16mf2(__VA_ARGS__)

#define	vsoxseg2ei8_v_i16mf2_m(...) __riscv_vsoxseg2ei8_v_i16mf2_m(__VA_ARGS__)

#define	vsoxseg2ei8_v_i16mf4(...) __riscv_vsoxseg2ei8_v_i16mf4(__VA_ARGS__)

#define	vsoxseg2ei8_v_i16mf4_m(...) __riscv_vsoxseg2ei8_v_i16mf4_m(__VA_ARGS__)

#define	vsoxseg2ei8_v_i32m1(...) __riscv_vsoxseg2ei8_v_i32m1(__VA_ARGS__)

#define	vsoxseg2ei8_v_i32m1_m(...) __riscv_vsoxseg2ei8_v_i32m1_m(__VA_ARGS__)

#define	vsoxseg2ei8_v_i32m2(...) __riscv_vsoxseg2ei8_v_i32m2(__VA_ARGS__)

#define	vsoxseg2ei8_v_i32m2_m(...) __riscv_vsoxseg2ei8_v_i32m2_m(__VA_ARGS__)

#define	vsoxseg2ei8_v_i32m4(...) __riscv_vsoxseg2ei8_v_i32m4(__VA_ARGS__)

#define	vsoxseg2ei8_v_i32m4_m(...) __riscv_vsoxseg2ei8_v_i32m4_m(__VA_ARGS__)

#define	vsoxseg2ei8_v_i32mf2(...) __riscv_vsoxseg2ei8_v_i32mf2(__VA_ARGS__)

#define	vsoxseg2ei8_v_i32mf2_m(...) __riscv_vsoxseg2ei8_v_i32mf2_m(__VA_ARGS__)

#define	vsoxseg2ei8_v_i64m1(...) __riscv_vsoxseg2ei8_v_i64m1(__VA_ARGS__)

#define	vsoxseg2ei8_v_i64m1_m(...) __riscv_vsoxseg2ei8_v_i64m1_m(__VA_ARGS__)

#define	vsoxseg2ei8_v_i64m2(...) __riscv_vsoxseg2ei8_v_i64m2(__VA_ARGS__)

#define	vsoxseg2ei8_v_i64m2_m(...) __riscv_vsoxseg2ei8_v_i64m2_m(__VA_ARGS__)

#define	vsoxseg2ei8_v_i64m4(...) __riscv_vsoxseg2ei8_v_i64m4(__VA_ARGS__)

#define	vsoxseg2ei8_v_i64m4_m(...) __riscv_vsoxseg2ei8_v_i64m4_m(__VA_ARGS__)

#define	vsoxseg2ei8_v_i8m1(...) __riscv_vsoxseg2ei8_v_i8m1(__VA_ARGS__)

#define	vsoxseg2ei8_v_i8m1_m(...) __riscv_vsoxseg2ei8_v_i8m1_m(__VA_ARGS__)

#define	vsoxseg2ei8_v_i8m2(...) __riscv_vsoxseg2ei8_v_i8m2(__VA_ARGS__)

#define	vsoxseg2ei8_v_i8m2_m(...) __riscv_vsoxseg2ei8_v_i8m2_m(__VA_ARGS__)

#define	vsoxseg2ei8_v_i8m4(...) __riscv_vsoxseg2ei8_v_i8m4(__VA_ARGS__)

#define	vsoxseg2ei8_v_i8m4_m(...) __riscv_vsoxseg2ei8_v_i8m4_m(__VA_ARGS__)

#define	vsoxseg2ei8_v_i8mf2(...) __riscv_vsoxseg2ei8_v_i8mf2(__VA_ARGS__)

#define	vsoxseg2ei8_v_i8mf2_m(...) __riscv_vsoxseg2ei8_v_i8mf2_m(__VA_ARGS__)

#define	vsoxseg2ei8_v_i8mf4(...) __riscv_vsoxseg2ei8_v_i8mf4(__VA_ARGS__)

#define	vsoxseg2ei8_v_i8mf4_m(...) __riscv_vsoxseg2ei8_v_i8mf4_m(__VA_ARGS__)

#define	vsoxseg2ei8_v_i8mf8(...) __riscv_vsoxseg2ei8_v_i8mf8(__VA_ARGS__)

#define	vsoxseg2ei8_v_i8mf8_m(...) __riscv_vsoxseg2ei8_v_i8mf8_m(__VA_ARGS__)

#define	vsoxseg2ei8_v_u16m1(...) __riscv_vsoxseg2ei8_v_u16m1(__VA_ARGS__)

#define	vsoxseg2ei8_v_u16m1_m(...) __riscv_vsoxseg2ei8_v_u16m1_m(__VA_ARGS__)

#define	vsoxseg2ei8_v_u16m2(...) __riscv_vsoxseg2ei8_v_u16m2(__VA_ARGS__)

#define	vsoxseg2ei8_v_u16m2_m(...) __riscv_vsoxseg2ei8_v_u16m2_m(__VA_ARGS__)

#define	vsoxseg2ei8_v_u16m4(...) __riscv_vsoxseg2ei8_v_u16m4(__VA_ARGS__)

#define	vsoxseg2ei8_v_u16m4_m(...) __riscv_vsoxseg2ei8_v_u16m4_m(__VA_ARGS__)

#define	vsoxseg2ei8_v_u16mf2(...) __riscv_vsoxseg2ei8_v_u16mf2(__VA_ARGS__)

#define	vsoxseg2ei8_v_u16mf2_m(...) __riscv_vsoxseg2ei8_v_u16mf2_m(__VA_ARGS__)

#define	vsoxseg2ei8_v_u16mf4(...) __riscv_vsoxseg2ei8_v_u16mf4(__VA_ARGS__)

#define	vsoxseg2ei8_v_u16mf4_m(...) __riscv_vsoxseg2ei8_v_u16mf4_m(__VA_ARGS__)

#define	vsoxseg2ei8_v_u32m1(...) __riscv_vsoxseg2ei8_v_u32m1(__VA_ARGS__)

#define	vsoxseg2ei8_v_u32m1_m(...) __riscv_vsoxseg2ei8_v_u32m1_m(__VA_ARGS__)

#define	vsoxseg2ei8_v_u32m2(...) __riscv_vsoxseg2ei8_v_u32m2(__VA_ARGS__)

#define	vsoxseg2ei8_v_u32m2_m(...) __riscv_vsoxseg2ei8_v_u32m2_m(__VA_ARGS__)

#define	vsoxseg2ei8_v_u32m4(...) __riscv_vsoxseg2ei8_v_u32m4(__VA_ARGS__)

#define	vsoxseg2ei8_v_u32m4_m(...) __riscv_vsoxseg2ei8_v_u32m4_m(__VA_ARGS__)

#define	vsoxseg2ei8_v_u32mf2(...) __riscv_vsoxseg2ei8_v_u32mf2(__VA_ARGS__)

#define	vsoxseg2ei8_v_u32mf2_m(...) __riscv_vsoxseg2ei8_v_u32mf2_m(__VA_ARGS__)

#define	vsoxseg2ei8_v_u64m1(...) __riscv_vsoxseg2ei8_v_u64m1(__VA_ARGS__)

#define	vsoxseg2ei8_v_u64m1_m(...) __riscv_vsoxseg2ei8_v_u64m1_m(__VA_ARGS__)

#define	vsoxseg2ei8_v_u64m2(...) __riscv_vsoxseg2ei8_v_u64m2(__VA_ARGS__)

#define	vsoxseg2ei8_v_u64m2_m(...) __riscv_vsoxseg2ei8_v_u64m2_m(__VA_ARGS__)

#define	vsoxseg2ei8_v_u64m4(...) __riscv_vsoxseg2ei8_v_u64m4(__VA_ARGS__)

#define	vsoxseg2ei8_v_u64m4_m(...) __riscv_vsoxseg2ei8_v_u64m4_m(__VA_ARGS__)

#define	vsoxseg2ei8_v_u8m1(...) __riscv_vsoxseg2ei8_v_u8m1(__VA_ARGS__)

#define	vsoxseg2ei8_v_u8m1_m(...) __riscv_vsoxseg2ei8_v_u8m1_m(__VA_ARGS__)

#define	vsoxseg2ei8_v_u8m2(...) __riscv_vsoxseg2ei8_v_u8m2(__VA_ARGS__)

#define	vsoxseg2ei8_v_u8m2_m(...) __riscv_vsoxseg2ei8_v_u8m2_m(__VA_ARGS__)

#define	vsoxseg2ei8_v_u8m4(...) __riscv_vsoxseg2ei8_v_u8m4(__VA_ARGS__)

#define	vsoxseg2ei8_v_u8m4_m(...) __riscv_vsoxseg2ei8_v_u8m4_m(__VA_ARGS__)

#define	vsoxseg2ei8_v_u8mf2(...) __riscv_vsoxseg2ei8_v_u8mf2(__VA_ARGS__)

#define	vsoxseg2ei8_v_u8mf2_m(...) __riscv_vsoxseg2ei8_v_u8mf2_m(__VA_ARGS__)

#define	vsoxseg2ei8_v_u8mf4(...) __riscv_vsoxseg2ei8_v_u8mf4(__VA_ARGS__)

#define	vsoxseg2ei8_v_u8mf4_m(...) __riscv_vsoxseg2ei8_v_u8mf4_m(__VA_ARGS__)

#define	vsoxseg2ei8_v_u8mf8(...) __riscv_vsoxseg2ei8_v_u8mf8(__VA_ARGS__)

#define	vsoxseg2ei8_v_u8mf8_m(...) __riscv_vsoxseg2ei8_v_u8mf8_m(__VA_ARGS__)

#define	vsoxseg3ei16_v_f16m1(...) __riscv_vsoxseg3ei16_v_f16m1(__VA_ARGS__)

#define	vsoxseg3ei16_v_f16m1_m(...) __riscv_vsoxseg3ei16_v_f16m1_m(__VA_ARGS__)

#define	vsoxseg3ei16_v_f16m2(...) __riscv_vsoxseg3ei16_v_f16m2(__VA_ARGS__)

#define	vsoxseg3ei16_v_f16m2_m(...) __riscv_vsoxseg3ei16_v_f16m2_m(__VA_ARGS__)

#define	vsoxseg3ei16_v_f16mf2(...) __riscv_vsoxseg3ei16_v_f16mf2(__VA_ARGS__)

#define	vsoxseg3ei16_v_f16mf2_m(...) __riscv_vsoxseg3ei16_v_f16mf2_m(__VA_ARGS__)

#define	vsoxseg3ei16_v_f16mf4(...) __riscv_vsoxseg3ei16_v_f16mf4(__VA_ARGS__)

#define	vsoxseg3ei16_v_f16mf4_m(...) __riscv_vsoxseg3ei16_v_f16mf4_m(__VA_ARGS__)

#define	vsoxseg3ei16_v_f32m1(...) __riscv_vsoxseg3ei16_v_f32m1(__VA_ARGS__)

#define	vsoxseg3ei16_v_f32m1_m(...) __riscv_vsoxseg3ei16_v_f32m1_m(__VA_ARGS__)

#define	vsoxseg3ei16_v_f32m2(...) __riscv_vsoxseg3ei16_v_f32m2(__VA_ARGS__)

#define	vsoxseg3ei16_v_f32m2_m(...) __riscv_vsoxseg3ei16_v_f32m2_m(__VA_ARGS__)

#define	vsoxseg3ei16_v_f32mf2(...) __riscv_vsoxseg3ei16_v_f32mf2(__VA_ARGS__)

#define	vsoxseg3ei16_v_f32mf2_m(...) __riscv_vsoxseg3ei16_v_f32mf2_m(__VA_ARGS__)

#define	vsoxseg3ei16_v_f64m1(...) __riscv_vsoxseg3ei16_v_f64m1(__VA_ARGS__)

#define	vsoxseg3ei16_v_f64m1_m(...) __riscv_vsoxseg3ei16_v_f64m1_m(__VA_ARGS__)

#define	vsoxseg3ei16_v_f64m2(...) __riscv_vsoxseg3ei16_v_f64m2(__VA_ARGS__)

#define	vsoxseg3ei16_v_f64m2_m(...) __riscv_vsoxseg3ei16_v_f64m2_m(__VA_ARGS__)

#define	vsoxseg3ei16_v_i16m1(...) __riscv_vsoxseg3ei16_v_i16m1(__VA_ARGS__)

#define	vsoxseg3ei16_v_i16m1_m(...) __riscv_vsoxseg3ei16_v_i16m1_m(__VA_ARGS__)

#define	vsoxseg3ei16_v_i16m2(...) __riscv_vsoxseg3ei16_v_i16m2(__VA_ARGS__)

#define	vsoxseg3ei16_v_i16m2_m(...) __riscv_vsoxseg3ei16_v_i16m2_m(__VA_ARGS__)

#define	vsoxseg3ei16_v_i16mf2(...) __riscv_vsoxseg3ei16_v_i16mf2(__VA_ARGS__)

#define	vsoxseg3ei16_v_i16mf2_m(...) __riscv_vsoxseg3ei16_v_i16mf2_m(__VA_ARGS__)

#define	vsoxseg3ei16_v_i16mf4(...) __riscv_vsoxseg3ei16_v_i16mf4(__VA_ARGS__)

#define	vsoxseg3ei16_v_i16mf4_m(...) __riscv_vsoxseg3ei16_v_i16mf4_m(__VA_ARGS__)

#define	vsoxseg3ei16_v_i32m1(...) __riscv_vsoxseg3ei16_v_i32m1(__VA_ARGS__)

#define	vsoxseg3ei16_v_i32m1_m(...) __riscv_vsoxseg3ei16_v_i32m1_m(__VA_ARGS__)

#define	vsoxseg3ei16_v_i32m2(...) __riscv_vsoxseg3ei16_v_i32m2(__VA_ARGS__)

#define	vsoxseg3ei16_v_i32m2_m(...) __riscv_vsoxseg3ei16_v_i32m2_m(__VA_ARGS__)

#define	vsoxseg3ei16_v_i32mf2(...) __riscv_vsoxseg3ei16_v_i32mf2(__VA_ARGS__)

#define	vsoxseg3ei16_v_i32mf2_m(...) __riscv_vsoxseg3ei16_v_i32mf2_m(__VA_ARGS__)

#define	vsoxseg3ei16_v_i64m1(...) __riscv_vsoxseg3ei16_v_i64m1(__VA_ARGS__)

#define	vsoxseg3ei16_v_i64m1_m(...) __riscv_vsoxseg3ei16_v_i64m1_m(__VA_ARGS__)

#define	vsoxseg3ei16_v_i64m2(...) __riscv_vsoxseg3ei16_v_i64m2(__VA_ARGS__)

#define	vsoxseg3ei16_v_i64m2_m(...) __riscv_vsoxseg3ei16_v_i64m2_m(__VA_ARGS__)

#define	vsoxseg3ei16_v_i8m1(...) __riscv_vsoxseg3ei16_v_i8m1(__VA_ARGS__)

#define	vsoxseg3ei16_v_i8m1_m(...) __riscv_vsoxseg3ei16_v_i8m1_m(__VA_ARGS__)

#define	vsoxseg3ei16_v_i8m2(...) __riscv_vsoxseg3ei16_v_i8m2(__VA_ARGS__)

#define	vsoxseg3ei16_v_i8m2_m(...) __riscv_vsoxseg3ei16_v_i8m2_m(__VA_ARGS__)

#define	vsoxseg3ei16_v_i8mf2(...) __riscv_vsoxseg3ei16_v_i8mf2(__VA_ARGS__)

#define	vsoxseg3ei16_v_i8mf2_m(...) __riscv_vsoxseg3ei16_v_i8mf2_m(__VA_ARGS__)

#define	vsoxseg3ei16_v_i8mf4(...) __riscv_vsoxseg3ei16_v_i8mf4(__VA_ARGS__)

#define	vsoxseg3ei16_v_i8mf4_m(...) __riscv_vsoxseg3ei16_v_i8mf4_m(__VA_ARGS__)

#define	vsoxseg3ei16_v_i8mf8(...) __riscv_vsoxseg3ei16_v_i8mf8(__VA_ARGS__)

#define	vsoxseg3ei16_v_i8mf8_m(...) __riscv_vsoxseg3ei16_v_i8mf8_m(__VA_ARGS__)

#define	vsoxseg3ei16_v_u16m1(...) __riscv_vsoxseg3ei16_v_u16m1(__VA_ARGS__)

#define	vsoxseg3ei16_v_u16m1_m(...) __riscv_vsoxseg3ei16_v_u16m1_m(__VA_ARGS__)

#define	vsoxseg3ei16_v_u16m2(...) __riscv_vsoxseg3ei16_v_u16m2(__VA_ARGS__)

#define	vsoxseg3ei16_v_u16m2_m(...) __riscv_vsoxseg3ei16_v_u16m2_m(__VA_ARGS__)

#define	vsoxseg3ei16_v_u16mf2(...) __riscv_vsoxseg3ei16_v_u16mf2(__VA_ARGS__)

#define	vsoxseg3ei16_v_u16mf2_m(...) __riscv_vsoxseg3ei16_v_u16mf2_m(__VA_ARGS__)

#define	vsoxseg3ei16_v_u16mf4(...) __riscv_vsoxseg3ei16_v_u16mf4(__VA_ARGS__)

#define	vsoxseg3ei16_v_u16mf4_m(...) __riscv_vsoxseg3ei16_v_u16mf4_m(__VA_ARGS__)

#define	vsoxseg3ei16_v_u32m1(...) __riscv_vsoxseg3ei16_v_u32m1(__VA_ARGS__)

#define	vsoxseg3ei16_v_u32m1_m(...) __riscv_vsoxseg3ei16_v_u32m1_m(__VA_ARGS__)

#define	vsoxseg3ei16_v_u32m2(...) __riscv_vsoxseg3ei16_v_u32m2(__VA_ARGS__)

#define	vsoxseg3ei16_v_u32m2_m(...) __riscv_vsoxseg3ei16_v_u32m2_m(__VA_ARGS__)

#define	vsoxseg3ei16_v_u32mf2(...) __riscv_vsoxseg3ei16_v_u32mf2(__VA_ARGS__)

#define	vsoxseg3ei16_v_u32mf2_m(...) __riscv_vsoxseg3ei16_v_u32mf2_m(__VA_ARGS__)

#define	vsoxseg3ei16_v_u64m1(...) __riscv_vsoxseg3ei16_v_u64m1(__VA_ARGS__)

#define	vsoxseg3ei16_v_u64m1_m(...) __riscv_vsoxseg3ei16_v_u64m1_m(__VA_ARGS__)

#define	vsoxseg3ei16_v_u64m2(...) __riscv_vsoxseg3ei16_v_u64m2(__VA_ARGS__)

#define	vsoxseg3ei16_v_u64m2_m(...) __riscv_vsoxseg3ei16_v_u64m2_m(__VA_ARGS__)

#define	vsoxseg3ei16_v_u8m1(...) __riscv_vsoxseg3ei16_v_u8m1(__VA_ARGS__)

#define	vsoxseg3ei16_v_u8m1_m(...) __riscv_vsoxseg3ei16_v_u8m1_m(__VA_ARGS__)

#define	vsoxseg3ei16_v_u8m2(...) __riscv_vsoxseg3ei16_v_u8m2(__VA_ARGS__)

#define	vsoxseg3ei16_v_u8m2_m(...) __riscv_vsoxseg3ei16_v_u8m2_m(__VA_ARGS__)

#define	vsoxseg3ei16_v_u8mf2(...) __riscv_vsoxseg3ei16_v_u8mf2(__VA_ARGS__)

#define	vsoxseg3ei16_v_u8mf2_m(...) __riscv_vsoxseg3ei16_v_u8mf2_m(__VA_ARGS__)

#define	vsoxseg3ei16_v_u8mf4(...) __riscv_vsoxseg3ei16_v_u8mf4(__VA_ARGS__)

#define	vsoxseg3ei16_v_u8mf4_m(...) __riscv_vsoxseg3ei16_v_u8mf4_m(__VA_ARGS__)

#define	vsoxseg3ei16_v_u8mf8(...) __riscv_vsoxseg3ei16_v_u8mf8(__VA_ARGS__)

#define	vsoxseg3ei16_v_u8mf8_m(...) __riscv_vsoxseg3ei16_v_u8mf8_m(__VA_ARGS__)

#define	vsoxseg3ei32_v_f16m1(...) __riscv_vsoxseg3ei32_v_f16m1(__VA_ARGS__)

#define	vsoxseg3ei32_v_f16m1_m(...) __riscv_vsoxseg3ei32_v_f16m1_m(__VA_ARGS__)

#define	vsoxseg3ei32_v_f16m2(...) __riscv_vsoxseg3ei32_v_f16m2(__VA_ARGS__)

#define	vsoxseg3ei32_v_f16m2_m(...) __riscv_vsoxseg3ei32_v_f16m2_m(__VA_ARGS__)

#define	vsoxseg3ei32_v_f16mf2(...) __riscv_vsoxseg3ei32_v_f16mf2(__VA_ARGS__)

#define	vsoxseg3ei32_v_f16mf2_m(...) __riscv_vsoxseg3ei32_v_f16mf2_m(__VA_ARGS__)

#define	vsoxseg3ei32_v_f16mf4(...) __riscv_vsoxseg3ei32_v_f16mf4(__VA_ARGS__)

#define	vsoxseg3ei32_v_f16mf4_m(...) __riscv_vsoxseg3ei32_v_f16mf4_m(__VA_ARGS__)

#define	vsoxseg3ei32_v_f32m1(...) __riscv_vsoxseg3ei32_v_f32m1(__VA_ARGS__)

#define	vsoxseg3ei32_v_f32m1_m(...) __riscv_vsoxseg3ei32_v_f32m1_m(__VA_ARGS__)

#define	vsoxseg3ei32_v_f32m2(...) __riscv_vsoxseg3ei32_v_f32m2(__VA_ARGS__)

#define	vsoxseg3ei32_v_f32m2_m(...) __riscv_vsoxseg3ei32_v_f32m2_m(__VA_ARGS__)

#define	vsoxseg3ei32_v_f32mf2(...) __riscv_vsoxseg3ei32_v_f32mf2(__VA_ARGS__)

#define	vsoxseg3ei32_v_f32mf2_m(...) __riscv_vsoxseg3ei32_v_f32mf2_m(__VA_ARGS__)

#define	vsoxseg3ei32_v_f64m1(...) __riscv_vsoxseg3ei32_v_f64m1(__VA_ARGS__)

#define	vsoxseg3ei32_v_f64m1_m(...) __riscv_vsoxseg3ei32_v_f64m1_m(__VA_ARGS__)

#define	vsoxseg3ei32_v_f64m2(...) __riscv_vsoxseg3ei32_v_f64m2(__VA_ARGS__)

#define	vsoxseg3ei32_v_f64m2_m(...) __riscv_vsoxseg3ei32_v_f64m2_m(__VA_ARGS__)

#define	vsoxseg3ei32_v_i16m1(...) __riscv_vsoxseg3ei32_v_i16m1(__VA_ARGS__)

#define	vsoxseg3ei32_v_i16m1_m(...) __riscv_vsoxseg3ei32_v_i16m1_m(__VA_ARGS__)

#define	vsoxseg3ei32_v_i16m2(...) __riscv_vsoxseg3ei32_v_i16m2(__VA_ARGS__)

#define	vsoxseg3ei32_v_i16m2_m(...) __riscv_vsoxseg3ei32_v_i16m2_m(__VA_ARGS__)

#define	vsoxseg3ei32_v_i16mf2(...) __riscv_vsoxseg3ei32_v_i16mf2(__VA_ARGS__)

#define	vsoxseg3ei32_v_i16mf2_m(...) __riscv_vsoxseg3ei32_v_i16mf2_m(__VA_ARGS__)

#define	vsoxseg3ei32_v_i16mf4(...) __riscv_vsoxseg3ei32_v_i16mf4(__VA_ARGS__)

#define	vsoxseg3ei32_v_i16mf4_m(...) __riscv_vsoxseg3ei32_v_i16mf4_m(__VA_ARGS__)

#define	vsoxseg3ei32_v_i32m1(...) __riscv_vsoxseg3ei32_v_i32m1(__VA_ARGS__)

#define	vsoxseg3ei32_v_i32m1_m(...) __riscv_vsoxseg3ei32_v_i32m1_m(__VA_ARGS__)

#define	vsoxseg3ei32_v_i32m2(...) __riscv_vsoxseg3ei32_v_i32m2(__VA_ARGS__)

#define	vsoxseg3ei32_v_i32m2_m(...) __riscv_vsoxseg3ei32_v_i32m2_m(__VA_ARGS__)

#define	vsoxseg3ei32_v_i32mf2(...) __riscv_vsoxseg3ei32_v_i32mf2(__VA_ARGS__)

#define	vsoxseg3ei32_v_i32mf2_m(...) __riscv_vsoxseg3ei32_v_i32mf2_m(__VA_ARGS__)

#define	vsoxseg3ei32_v_i64m1(...) __riscv_vsoxseg3ei32_v_i64m1(__VA_ARGS__)

#define	vsoxseg3ei32_v_i64m1_m(...) __riscv_vsoxseg3ei32_v_i64m1_m(__VA_ARGS__)

#define	vsoxseg3ei32_v_i64m2(...) __riscv_vsoxseg3ei32_v_i64m2(__VA_ARGS__)

#define	vsoxseg3ei32_v_i64m2_m(...) __riscv_vsoxseg3ei32_v_i64m2_m(__VA_ARGS__)

#define	vsoxseg3ei32_v_i8m1(...) __riscv_vsoxseg3ei32_v_i8m1(__VA_ARGS__)

#define	vsoxseg3ei32_v_i8m1_m(...) __riscv_vsoxseg3ei32_v_i8m1_m(__VA_ARGS__)

#define	vsoxseg3ei32_v_i8m2(...) __riscv_vsoxseg3ei32_v_i8m2(__VA_ARGS__)

#define	vsoxseg3ei32_v_i8m2_m(...) __riscv_vsoxseg3ei32_v_i8m2_m(__VA_ARGS__)

#define	vsoxseg3ei32_v_i8mf2(...) __riscv_vsoxseg3ei32_v_i8mf2(__VA_ARGS__)

#define	vsoxseg3ei32_v_i8mf2_m(...) __riscv_vsoxseg3ei32_v_i8mf2_m(__VA_ARGS__)

#define	vsoxseg3ei32_v_i8mf4(...) __riscv_vsoxseg3ei32_v_i8mf4(__VA_ARGS__)

#define	vsoxseg3ei32_v_i8mf4_m(...) __riscv_vsoxseg3ei32_v_i8mf4_m(__VA_ARGS__)

#define	vsoxseg3ei32_v_i8mf8(...) __riscv_vsoxseg3ei32_v_i8mf8(__VA_ARGS__)

#define	vsoxseg3ei32_v_i8mf8_m(...) __riscv_vsoxseg3ei32_v_i8mf8_m(__VA_ARGS__)

#define	vsoxseg3ei32_v_u16m1(...) __riscv_vsoxseg3ei32_v_u16m1(__VA_ARGS__)

#define	vsoxseg3ei32_v_u16m1_m(...) __riscv_vsoxseg3ei32_v_u16m1_m(__VA_ARGS__)

#define	vsoxseg3ei32_v_u16m2(...) __riscv_vsoxseg3ei32_v_u16m2(__VA_ARGS__)

#define	vsoxseg3ei32_v_u16m2_m(...) __riscv_vsoxseg3ei32_v_u16m2_m(__VA_ARGS__)

#define	vsoxseg3ei32_v_u16mf2(...) __riscv_vsoxseg3ei32_v_u16mf2(__VA_ARGS__)

#define	vsoxseg3ei32_v_u16mf2_m(...) __riscv_vsoxseg3ei32_v_u16mf2_m(__VA_ARGS__)

#define	vsoxseg3ei32_v_u16mf4(...) __riscv_vsoxseg3ei32_v_u16mf4(__VA_ARGS__)

#define	vsoxseg3ei32_v_u16mf4_m(...) __riscv_vsoxseg3ei32_v_u16mf4_m(__VA_ARGS__)

#define	vsoxseg3ei32_v_u32m1(...) __riscv_vsoxseg3ei32_v_u32m1(__VA_ARGS__)

#define	vsoxseg3ei32_v_u32m1_m(...) __riscv_vsoxseg3ei32_v_u32m1_m(__VA_ARGS__)

#define	vsoxseg3ei32_v_u32m2(...) __riscv_vsoxseg3ei32_v_u32m2(__VA_ARGS__)

#define	vsoxseg3ei32_v_u32m2_m(...) __riscv_vsoxseg3ei32_v_u32m2_m(__VA_ARGS__)

#define	vsoxseg3ei32_v_u32mf2(...) __riscv_vsoxseg3ei32_v_u32mf2(__VA_ARGS__)

#define	vsoxseg3ei32_v_u32mf2_m(...) __riscv_vsoxseg3ei32_v_u32mf2_m(__VA_ARGS__)

#define	vsoxseg3ei32_v_u64m1(...) __riscv_vsoxseg3ei32_v_u64m1(__VA_ARGS__)

#define	vsoxseg3ei32_v_u64m1_m(...) __riscv_vsoxseg3ei32_v_u64m1_m(__VA_ARGS__)

#define	vsoxseg3ei32_v_u64m2(...) __riscv_vsoxseg3ei32_v_u64m2(__VA_ARGS__)

#define	vsoxseg3ei32_v_u64m2_m(...) __riscv_vsoxseg3ei32_v_u64m2_m(__VA_ARGS__)

#define	vsoxseg3ei32_v_u8m1(...) __riscv_vsoxseg3ei32_v_u8m1(__VA_ARGS__)

#define	vsoxseg3ei32_v_u8m1_m(...) __riscv_vsoxseg3ei32_v_u8m1_m(__VA_ARGS__)

#define	vsoxseg3ei32_v_u8m2(...) __riscv_vsoxseg3ei32_v_u8m2(__VA_ARGS__)

#define	vsoxseg3ei32_v_u8m2_m(...) __riscv_vsoxseg3ei32_v_u8m2_m(__VA_ARGS__)

#define	vsoxseg3ei32_v_u8mf2(...) __riscv_vsoxseg3ei32_v_u8mf2(__VA_ARGS__)

#define	vsoxseg3ei32_v_u8mf2_m(...) __riscv_vsoxseg3ei32_v_u8mf2_m(__VA_ARGS__)

#define	vsoxseg3ei32_v_u8mf4(...) __riscv_vsoxseg3ei32_v_u8mf4(__VA_ARGS__)

#define	vsoxseg3ei32_v_u8mf4_m(...) __riscv_vsoxseg3ei32_v_u8mf4_m(__VA_ARGS__)

#define	vsoxseg3ei32_v_u8mf8(...) __riscv_vsoxseg3ei32_v_u8mf8(__VA_ARGS__)

#define	vsoxseg3ei32_v_u8mf8_m(...) __riscv_vsoxseg3ei32_v_u8mf8_m(__VA_ARGS__)

#define	vsoxseg3ei64_v_f16m1(...) __riscv_vsoxseg3ei64_v_f16m1(__VA_ARGS__)

#define	vsoxseg3ei64_v_f16m1_m(...) __riscv_vsoxseg3ei64_v_f16m1_m(__VA_ARGS__)

#define	vsoxseg3ei64_v_f16m2(...) __riscv_vsoxseg3ei64_v_f16m2(__VA_ARGS__)

#define	vsoxseg3ei64_v_f16m2_m(...) __riscv_vsoxseg3ei64_v_f16m2_m(__VA_ARGS__)

#define	vsoxseg3ei64_v_f16mf2(...) __riscv_vsoxseg3ei64_v_f16mf2(__VA_ARGS__)

#define	vsoxseg3ei64_v_f16mf2_m(...) __riscv_vsoxseg3ei64_v_f16mf2_m(__VA_ARGS__)

#define	vsoxseg3ei64_v_f16mf4(...) __riscv_vsoxseg3ei64_v_f16mf4(__VA_ARGS__)

#define	vsoxseg3ei64_v_f16mf4_m(...) __riscv_vsoxseg3ei64_v_f16mf4_m(__VA_ARGS__)

#define	vsoxseg3ei64_v_f32m1(...) __riscv_vsoxseg3ei64_v_f32m1(__VA_ARGS__)

#define	vsoxseg3ei64_v_f32m1_m(...) __riscv_vsoxseg3ei64_v_f32m1_m(__VA_ARGS__)

#define	vsoxseg3ei64_v_f32m2(...) __riscv_vsoxseg3ei64_v_f32m2(__VA_ARGS__)

#define	vsoxseg3ei64_v_f32m2_m(...) __riscv_vsoxseg3ei64_v_f32m2_m(__VA_ARGS__)

#define	vsoxseg3ei64_v_f32mf2(...) __riscv_vsoxseg3ei64_v_f32mf2(__VA_ARGS__)

#define	vsoxseg3ei64_v_f32mf2_m(...) __riscv_vsoxseg3ei64_v_f32mf2_m(__VA_ARGS__)

#define	vsoxseg3ei64_v_f64m1(...) __riscv_vsoxseg3ei64_v_f64m1(__VA_ARGS__)

#define	vsoxseg3ei64_v_f64m1_m(...) __riscv_vsoxseg3ei64_v_f64m1_m(__VA_ARGS__)

#define	vsoxseg3ei64_v_f64m2(...) __riscv_vsoxseg3ei64_v_f64m2(__VA_ARGS__)

#define	vsoxseg3ei64_v_f64m2_m(...) __riscv_vsoxseg3ei64_v_f64m2_m(__VA_ARGS__)

#define	vsoxseg3ei64_v_i16m1(...) __riscv_vsoxseg3ei64_v_i16m1(__VA_ARGS__)

#define	vsoxseg3ei64_v_i16m1_m(...) __riscv_vsoxseg3ei64_v_i16m1_m(__VA_ARGS__)

#define	vsoxseg3ei64_v_i16m2(...) __riscv_vsoxseg3ei64_v_i16m2(__VA_ARGS__)

#define	vsoxseg3ei64_v_i16m2_m(...) __riscv_vsoxseg3ei64_v_i16m2_m(__VA_ARGS__)

#define	vsoxseg3ei64_v_i16mf2(...) __riscv_vsoxseg3ei64_v_i16mf2(__VA_ARGS__)

#define	vsoxseg3ei64_v_i16mf2_m(...) __riscv_vsoxseg3ei64_v_i16mf2_m(__VA_ARGS__)

#define	vsoxseg3ei64_v_i16mf4(...) __riscv_vsoxseg3ei64_v_i16mf4(__VA_ARGS__)

#define	vsoxseg3ei64_v_i16mf4_m(...) __riscv_vsoxseg3ei64_v_i16mf4_m(__VA_ARGS__)

#define	vsoxseg3ei64_v_i32m1(...) __riscv_vsoxseg3ei64_v_i32m1(__VA_ARGS__)

#define	vsoxseg3ei64_v_i32m1_m(...) __riscv_vsoxseg3ei64_v_i32m1_m(__VA_ARGS__)

#define	vsoxseg3ei64_v_i32m2(...) __riscv_vsoxseg3ei64_v_i32m2(__VA_ARGS__)

#define	vsoxseg3ei64_v_i32m2_m(...) __riscv_vsoxseg3ei64_v_i32m2_m(__VA_ARGS__)

#define	vsoxseg3ei64_v_i32mf2(...) __riscv_vsoxseg3ei64_v_i32mf2(__VA_ARGS__)

#define	vsoxseg3ei64_v_i32mf2_m(...) __riscv_vsoxseg3ei64_v_i32mf2_m(__VA_ARGS__)

#define	vsoxseg3ei64_v_i64m1(...) __riscv_vsoxseg3ei64_v_i64m1(__VA_ARGS__)

#define	vsoxseg3ei64_v_i64m1_m(...) __riscv_vsoxseg3ei64_v_i64m1_m(__VA_ARGS__)

#define	vsoxseg3ei64_v_i64m2(...) __riscv_vsoxseg3ei64_v_i64m2(__VA_ARGS__)

#define	vsoxseg3ei64_v_i64m2_m(...) __riscv_vsoxseg3ei64_v_i64m2_m(__VA_ARGS__)

#define	vsoxseg3ei64_v_i8m1(...) __riscv_vsoxseg3ei64_v_i8m1(__VA_ARGS__)

#define	vsoxseg3ei64_v_i8m1_m(...) __riscv_vsoxseg3ei64_v_i8m1_m(__VA_ARGS__)

#define	vsoxseg3ei64_v_i8mf2(...) __riscv_vsoxseg3ei64_v_i8mf2(__VA_ARGS__)

#define	vsoxseg3ei64_v_i8mf2_m(...) __riscv_vsoxseg3ei64_v_i8mf2_m(__VA_ARGS__)

#define	vsoxseg3ei64_v_i8mf4(...) __riscv_vsoxseg3ei64_v_i8mf4(__VA_ARGS__)

#define	vsoxseg3ei64_v_i8mf4_m(...) __riscv_vsoxseg3ei64_v_i8mf4_m(__VA_ARGS__)

#define	vsoxseg3ei64_v_i8mf8(...) __riscv_vsoxseg3ei64_v_i8mf8(__VA_ARGS__)

#define	vsoxseg3ei64_v_i8mf8_m(...) __riscv_vsoxseg3ei64_v_i8mf8_m(__VA_ARGS__)

#define	vsoxseg3ei64_v_u16m1(...) __riscv_vsoxseg3ei64_v_u16m1(__VA_ARGS__)

#define	vsoxseg3ei64_v_u16m1_m(...) __riscv_vsoxseg3ei64_v_u16m1_m(__VA_ARGS__)

#define	vsoxseg3ei64_v_u16m2(...) __riscv_vsoxseg3ei64_v_u16m2(__VA_ARGS__)

#define	vsoxseg3ei64_v_u16m2_m(...) __riscv_vsoxseg3ei64_v_u16m2_m(__VA_ARGS__)

#define	vsoxseg3ei64_v_u16mf2(...) __riscv_vsoxseg3ei64_v_u16mf2(__VA_ARGS__)

#define	vsoxseg3ei64_v_u16mf2_m(...) __riscv_vsoxseg3ei64_v_u16mf2_m(__VA_ARGS__)

#define	vsoxseg3ei64_v_u16mf4(...) __riscv_vsoxseg3ei64_v_u16mf4(__VA_ARGS__)

#define	vsoxseg3ei64_v_u16mf4_m(...) __riscv_vsoxseg3ei64_v_u16mf4_m(__VA_ARGS__)

#define	vsoxseg3ei64_v_u32m1(...) __riscv_vsoxseg3ei64_v_u32m1(__VA_ARGS__)

#define	vsoxseg3ei64_v_u32m1_m(...) __riscv_vsoxseg3ei64_v_u32m1_m(__VA_ARGS__)

#define	vsoxseg3ei64_v_u32m2(...) __riscv_vsoxseg3ei64_v_u32m2(__VA_ARGS__)

#define	vsoxseg3ei64_v_u32m2_m(...) __riscv_vsoxseg3ei64_v_u32m2_m(__VA_ARGS__)

#define	vsoxseg3ei64_v_u32mf2(...) __riscv_vsoxseg3ei64_v_u32mf2(__VA_ARGS__)

#define	vsoxseg3ei64_v_u32mf2_m(...) __riscv_vsoxseg3ei64_v_u32mf2_m(__VA_ARGS__)

#define	vsoxseg3ei64_v_u64m1(...) __riscv_vsoxseg3ei64_v_u64m1(__VA_ARGS__)

#define	vsoxseg3ei64_v_u64m1_m(...) __riscv_vsoxseg3ei64_v_u64m1_m(__VA_ARGS__)

#define	vsoxseg3ei64_v_u64m2(...) __riscv_vsoxseg3ei64_v_u64m2(__VA_ARGS__)

#define	vsoxseg3ei64_v_u64m2_m(...) __riscv_vsoxseg3ei64_v_u64m2_m(__VA_ARGS__)

#define	vsoxseg3ei64_v_u8m1(...) __riscv_vsoxseg3ei64_v_u8m1(__VA_ARGS__)

#define	vsoxseg3ei64_v_u8m1_m(...) __riscv_vsoxseg3ei64_v_u8m1_m(__VA_ARGS__)

#define	vsoxseg3ei64_v_u8mf2(...) __riscv_vsoxseg3ei64_v_u8mf2(__VA_ARGS__)

#define	vsoxseg3ei64_v_u8mf2_m(...) __riscv_vsoxseg3ei64_v_u8mf2_m(__VA_ARGS__)

#define	vsoxseg3ei64_v_u8mf4(...) __riscv_vsoxseg3ei64_v_u8mf4(__VA_ARGS__)

#define	vsoxseg3ei64_v_u8mf4_m(...) __riscv_vsoxseg3ei64_v_u8mf4_m(__VA_ARGS__)

#define	vsoxseg3ei64_v_u8mf8(...) __riscv_vsoxseg3ei64_v_u8mf8(__VA_ARGS__)

#define	vsoxseg3ei64_v_u8mf8_m(...) __riscv_vsoxseg3ei64_v_u8mf8_m(__VA_ARGS__)

#define	vsoxseg3ei8_v_f16m1(...) __riscv_vsoxseg3ei8_v_f16m1(__VA_ARGS__)

#define	vsoxseg3ei8_v_f16m1_m(...) __riscv_vsoxseg3ei8_v_f16m1_m(__VA_ARGS__)

#define	vsoxseg3ei8_v_f16m2(...) __riscv_vsoxseg3ei8_v_f16m2(__VA_ARGS__)

#define	vsoxseg3ei8_v_f16m2_m(...) __riscv_vsoxseg3ei8_v_f16m2_m(__VA_ARGS__)

#define	vsoxseg3ei8_v_f16mf2(...) __riscv_vsoxseg3ei8_v_f16mf2(__VA_ARGS__)

#define	vsoxseg3ei8_v_f16mf2_m(...) __riscv_vsoxseg3ei8_v_f16mf2_m(__VA_ARGS__)

#define	vsoxseg3ei8_v_f16mf4(...) __riscv_vsoxseg3ei8_v_f16mf4(__VA_ARGS__)

#define	vsoxseg3ei8_v_f16mf4_m(...) __riscv_vsoxseg3ei8_v_f16mf4_m(__VA_ARGS__)

#define	vsoxseg3ei8_v_f32m1(...) __riscv_vsoxseg3ei8_v_f32m1(__VA_ARGS__)

#define	vsoxseg3ei8_v_f32m1_m(...) __riscv_vsoxseg3ei8_v_f32m1_m(__VA_ARGS__)

#define	vsoxseg3ei8_v_f32m2(...) __riscv_vsoxseg3ei8_v_f32m2(__VA_ARGS__)

#define	vsoxseg3ei8_v_f32m2_m(...) __riscv_vsoxseg3ei8_v_f32m2_m(__VA_ARGS__)

#define	vsoxseg3ei8_v_f32mf2(...) __riscv_vsoxseg3ei8_v_f32mf2(__VA_ARGS__)

#define	vsoxseg3ei8_v_f32mf2_m(...) __riscv_vsoxseg3ei8_v_f32mf2_m(__VA_ARGS__)

#define	vsoxseg3ei8_v_f64m1(...) __riscv_vsoxseg3ei8_v_f64m1(__VA_ARGS__)

#define	vsoxseg3ei8_v_f64m1_m(...) __riscv_vsoxseg3ei8_v_f64m1_m(__VA_ARGS__)

#define	vsoxseg3ei8_v_f64m2(...) __riscv_vsoxseg3ei8_v_f64m2(__VA_ARGS__)

#define	vsoxseg3ei8_v_f64m2_m(...) __riscv_vsoxseg3ei8_v_f64m2_m(__VA_ARGS__)

#define	vsoxseg3ei8_v_i16m1(...) __riscv_vsoxseg3ei8_v_i16m1(__VA_ARGS__)

#define	vsoxseg3ei8_v_i16m1_m(...) __riscv_vsoxseg3ei8_v_i16m1_m(__VA_ARGS__)

#define	vsoxseg3ei8_v_i16m2(...) __riscv_vsoxseg3ei8_v_i16m2(__VA_ARGS__)

#define	vsoxseg3ei8_v_i16m2_m(...) __riscv_vsoxseg3ei8_v_i16m2_m(__VA_ARGS__)

#define	vsoxseg3ei8_v_i16mf2(...) __riscv_vsoxseg3ei8_v_i16mf2(__VA_ARGS__)

#define	vsoxseg3ei8_v_i16mf2_m(...) __riscv_vsoxseg3ei8_v_i16mf2_m(__VA_ARGS__)

#define	vsoxseg3ei8_v_i16mf4(...) __riscv_vsoxseg3ei8_v_i16mf4(__VA_ARGS__)

#define	vsoxseg3ei8_v_i16mf4_m(...) __riscv_vsoxseg3ei8_v_i16mf4_m(__VA_ARGS__)

#define	vsoxseg3ei8_v_i32m1(...) __riscv_vsoxseg3ei8_v_i32m1(__VA_ARGS__)

#define	vsoxseg3ei8_v_i32m1_m(...) __riscv_vsoxseg3ei8_v_i32m1_m(__VA_ARGS__)

#define	vsoxseg3ei8_v_i32m2(...) __riscv_vsoxseg3ei8_v_i32m2(__VA_ARGS__)

#define	vsoxseg3ei8_v_i32m2_m(...) __riscv_vsoxseg3ei8_v_i32m2_m(__VA_ARGS__)

#define	vsoxseg3ei8_v_i32mf2(...) __riscv_vsoxseg3ei8_v_i32mf2(__VA_ARGS__)

#define	vsoxseg3ei8_v_i32mf2_m(...) __riscv_vsoxseg3ei8_v_i32mf2_m(__VA_ARGS__)

#define	vsoxseg3ei8_v_i64m1(...) __riscv_vsoxseg3ei8_v_i64m1(__VA_ARGS__)

#define	vsoxseg3ei8_v_i64m1_m(...) __riscv_vsoxseg3ei8_v_i64m1_m(__VA_ARGS__)

#define	vsoxseg3ei8_v_i64m2(...) __riscv_vsoxseg3ei8_v_i64m2(__VA_ARGS__)

#define	vsoxseg3ei8_v_i64m2_m(...) __riscv_vsoxseg3ei8_v_i64m2_m(__VA_ARGS__)

#define	vsoxseg3ei8_v_i8m1(...) __riscv_vsoxseg3ei8_v_i8m1(__VA_ARGS__)

#define	vsoxseg3ei8_v_i8m1_m(...) __riscv_vsoxseg3ei8_v_i8m1_m(__VA_ARGS__)

#define	vsoxseg3ei8_v_i8m2(...) __riscv_vsoxseg3ei8_v_i8m2(__VA_ARGS__)

#define	vsoxseg3ei8_v_i8m2_m(...) __riscv_vsoxseg3ei8_v_i8m2_m(__VA_ARGS__)

#define	vsoxseg3ei8_v_i8mf2(...) __riscv_vsoxseg3ei8_v_i8mf2(__VA_ARGS__)

#define	vsoxseg3ei8_v_i8mf2_m(...) __riscv_vsoxseg3ei8_v_i8mf2_m(__VA_ARGS__)

#define	vsoxseg3ei8_v_i8mf4(...) __riscv_vsoxseg3ei8_v_i8mf4(__VA_ARGS__)

#define	vsoxseg3ei8_v_i8mf4_m(...) __riscv_vsoxseg3ei8_v_i8mf4_m(__VA_ARGS__)

#define	vsoxseg3ei8_v_i8mf8(...) __riscv_vsoxseg3ei8_v_i8mf8(__VA_ARGS__)

#define	vsoxseg3ei8_v_i8mf8_m(...) __riscv_vsoxseg3ei8_v_i8mf8_m(__VA_ARGS__)

#define	vsoxseg3ei8_v_u16m1(...) __riscv_vsoxseg3ei8_v_u16m1(__VA_ARGS__)

#define	vsoxseg3ei8_v_u16m1_m(...) __riscv_vsoxseg3ei8_v_u16m1_m(__VA_ARGS__)

#define	vsoxseg3ei8_v_u16m2(...) __riscv_vsoxseg3ei8_v_u16m2(__VA_ARGS__)

#define	vsoxseg3ei8_v_u16m2_m(...) __riscv_vsoxseg3ei8_v_u16m2_m(__VA_ARGS__)

#define	vsoxseg3ei8_v_u16mf2(...) __riscv_vsoxseg3ei8_v_u16mf2(__VA_ARGS__)

#define	vsoxseg3ei8_v_u16mf2_m(...) __riscv_vsoxseg3ei8_v_u16mf2_m(__VA_ARGS__)

#define	vsoxseg3ei8_v_u16mf4(...) __riscv_vsoxseg3ei8_v_u16mf4(__VA_ARGS__)

#define	vsoxseg3ei8_v_u16mf4_m(...) __riscv_vsoxseg3ei8_v_u16mf4_m(__VA_ARGS__)

#define	vsoxseg3ei8_v_u32m1(...) __riscv_vsoxseg3ei8_v_u32m1(__VA_ARGS__)

#define	vsoxseg3ei8_v_u32m1_m(...) __riscv_vsoxseg3ei8_v_u32m1_m(__VA_ARGS__)

#define	vsoxseg3ei8_v_u32m2(...) __riscv_vsoxseg3ei8_v_u32m2(__VA_ARGS__)

#define	vsoxseg3ei8_v_u32m2_m(...) __riscv_vsoxseg3ei8_v_u32m2_m(__VA_ARGS__)

#define	vsoxseg3ei8_v_u32mf2(...) __riscv_vsoxseg3ei8_v_u32mf2(__VA_ARGS__)

#define	vsoxseg3ei8_v_u32mf2_m(...) __riscv_vsoxseg3ei8_v_u32mf2_m(__VA_ARGS__)

#define	vsoxseg3ei8_v_u64m1(...) __riscv_vsoxseg3ei8_v_u64m1(__VA_ARGS__)

#define	vsoxseg3ei8_v_u64m1_m(...) __riscv_vsoxseg3ei8_v_u64m1_m(__VA_ARGS__)

#define	vsoxseg3ei8_v_u64m2(...) __riscv_vsoxseg3ei8_v_u64m2(__VA_ARGS__)

#define	vsoxseg3ei8_v_u64m2_m(...) __riscv_vsoxseg3ei8_v_u64m2_m(__VA_ARGS__)

#define	vsoxseg3ei8_v_u8m1(...) __riscv_vsoxseg3ei8_v_u8m1(__VA_ARGS__)

#define	vsoxseg3ei8_v_u8m1_m(...) __riscv_vsoxseg3ei8_v_u8m1_m(__VA_ARGS__)

#define	vsoxseg3ei8_v_u8m2(...) __riscv_vsoxseg3ei8_v_u8m2(__VA_ARGS__)

#define	vsoxseg3ei8_v_u8m2_m(...) __riscv_vsoxseg3ei8_v_u8m2_m(__VA_ARGS__)

#define	vsoxseg3ei8_v_u8mf2(...) __riscv_vsoxseg3ei8_v_u8mf2(__VA_ARGS__)

#define	vsoxseg3ei8_v_u8mf2_m(...) __riscv_vsoxseg3ei8_v_u8mf2_m(__VA_ARGS__)

#define	vsoxseg3ei8_v_u8mf4(...) __riscv_vsoxseg3ei8_v_u8mf4(__VA_ARGS__)

#define	vsoxseg3ei8_v_u8mf4_m(...) __riscv_vsoxseg3ei8_v_u8mf4_m(__VA_ARGS__)

#define	vsoxseg3ei8_v_u8mf8(...) __riscv_vsoxseg3ei8_v_u8mf8(__VA_ARGS__)

#define	vsoxseg3ei8_v_u8mf8_m(...) __riscv_vsoxseg3ei8_v_u8mf8_m(__VA_ARGS__)

#define	vsoxseg4ei16_v_f16m1(...) __riscv_vsoxseg4ei16_v_f16m1(__VA_ARGS__)

#define	vsoxseg4ei16_v_f16m1_m(...) __riscv_vsoxseg4ei16_v_f16m1_m(__VA_ARGS__)

#define	vsoxseg4ei16_v_f16m2(...) __riscv_vsoxseg4ei16_v_f16m2(__VA_ARGS__)

#define	vsoxseg4ei16_v_f16m2_m(...) __riscv_vsoxseg4ei16_v_f16m2_m(__VA_ARGS__)

#define	vsoxseg4ei16_v_f16mf2(...) __riscv_vsoxseg4ei16_v_f16mf2(__VA_ARGS__)

#define	vsoxseg4ei16_v_f16mf2_m(...) __riscv_vsoxseg4ei16_v_f16mf2_m(__VA_ARGS__)

#define	vsoxseg4ei16_v_f16mf4(...) __riscv_vsoxseg4ei16_v_f16mf4(__VA_ARGS__)

#define	vsoxseg4ei16_v_f16mf4_m(...) __riscv_vsoxseg4ei16_v_f16mf4_m(__VA_ARGS__)

#define	vsoxseg4ei16_v_f32m1(...) __riscv_vsoxseg4ei16_v_f32m1(__VA_ARGS__)

#define	vsoxseg4ei16_v_f32m1_m(...) __riscv_vsoxseg4ei16_v_f32m1_m(__VA_ARGS__)

#define	vsoxseg4ei16_v_f32m2(...) __riscv_vsoxseg4ei16_v_f32m2(__VA_ARGS__)

#define	vsoxseg4ei16_v_f32m2_m(...) __riscv_vsoxseg4ei16_v_f32m2_m(__VA_ARGS__)

#define	vsoxseg4ei16_v_f32mf2(...) __riscv_vsoxseg4ei16_v_f32mf2(__VA_ARGS__)

#define	vsoxseg4ei16_v_f32mf2_m(...) __riscv_vsoxseg4ei16_v_f32mf2_m(__VA_ARGS__)

#define	vsoxseg4ei16_v_f64m1(...) __riscv_vsoxseg4ei16_v_f64m1(__VA_ARGS__)

#define	vsoxseg4ei16_v_f64m1_m(...) __riscv_vsoxseg4ei16_v_f64m1_m(__VA_ARGS__)

#define	vsoxseg4ei16_v_f64m2(...) __riscv_vsoxseg4ei16_v_f64m2(__VA_ARGS__)

#define	vsoxseg4ei16_v_f64m2_m(...) __riscv_vsoxseg4ei16_v_f64m2_m(__VA_ARGS__)

#define	vsoxseg4ei16_v_i16m1(...) __riscv_vsoxseg4ei16_v_i16m1(__VA_ARGS__)

#define	vsoxseg4ei16_v_i16m1_m(...) __riscv_vsoxseg4ei16_v_i16m1_m(__VA_ARGS__)

#define	vsoxseg4ei16_v_i16m2(...) __riscv_vsoxseg4ei16_v_i16m2(__VA_ARGS__)

#define	vsoxseg4ei16_v_i16m2_m(...) __riscv_vsoxseg4ei16_v_i16m2_m(__VA_ARGS__)

#define	vsoxseg4ei16_v_i16mf2(...) __riscv_vsoxseg4ei16_v_i16mf2(__VA_ARGS__)

#define	vsoxseg4ei16_v_i16mf2_m(...) __riscv_vsoxseg4ei16_v_i16mf2_m(__VA_ARGS__)

#define	vsoxseg4ei16_v_i16mf4(...) __riscv_vsoxseg4ei16_v_i16mf4(__VA_ARGS__)

#define	vsoxseg4ei16_v_i16mf4_m(...) __riscv_vsoxseg4ei16_v_i16mf4_m(__VA_ARGS__)

#define	vsoxseg4ei16_v_i32m1(...) __riscv_vsoxseg4ei16_v_i32m1(__VA_ARGS__)

#define	vsoxseg4ei16_v_i32m1_m(...) __riscv_vsoxseg4ei16_v_i32m1_m(__VA_ARGS__)

#define	vsoxseg4ei16_v_i32m2(...) __riscv_vsoxseg4ei16_v_i32m2(__VA_ARGS__)

#define	vsoxseg4ei16_v_i32m2_m(...) __riscv_vsoxseg4ei16_v_i32m2_m(__VA_ARGS__)

#define	vsoxseg4ei16_v_i32mf2(...) __riscv_vsoxseg4ei16_v_i32mf2(__VA_ARGS__)

#define	vsoxseg4ei16_v_i32mf2_m(...) __riscv_vsoxseg4ei16_v_i32mf2_m(__VA_ARGS__)

#define	vsoxseg4ei16_v_i64m1(...) __riscv_vsoxseg4ei16_v_i64m1(__VA_ARGS__)

#define	vsoxseg4ei16_v_i64m1_m(...) __riscv_vsoxseg4ei16_v_i64m1_m(__VA_ARGS__)

#define	vsoxseg4ei16_v_i64m2(...) __riscv_vsoxseg4ei16_v_i64m2(__VA_ARGS__)

#define	vsoxseg4ei16_v_i64m2_m(...) __riscv_vsoxseg4ei16_v_i64m2_m(__VA_ARGS__)

#define	vsoxseg4ei16_v_i8m1(...) __riscv_vsoxseg4ei16_v_i8m1(__VA_ARGS__)

#define	vsoxseg4ei16_v_i8m1_m(...) __riscv_vsoxseg4ei16_v_i8m1_m(__VA_ARGS__)

#define	vsoxseg4ei16_v_i8m2(...) __riscv_vsoxseg4ei16_v_i8m2(__VA_ARGS__)

#define	vsoxseg4ei16_v_i8m2_m(...) __riscv_vsoxseg4ei16_v_i8m2_m(__VA_ARGS__)

#define	vsoxseg4ei16_v_i8mf2(...) __riscv_vsoxseg4ei16_v_i8mf2(__VA_ARGS__)

#define	vsoxseg4ei16_v_i8mf2_m(...) __riscv_vsoxseg4ei16_v_i8mf2_m(__VA_ARGS__)

#define	vsoxseg4ei16_v_i8mf4(...) __riscv_vsoxseg4ei16_v_i8mf4(__VA_ARGS__)

#define	vsoxseg4ei16_v_i8mf4_m(...) __riscv_vsoxseg4ei16_v_i8mf4_m(__VA_ARGS__)

#define	vsoxseg4ei16_v_i8mf8(...) __riscv_vsoxseg4ei16_v_i8mf8(__VA_ARGS__)

#define	vsoxseg4ei16_v_i8mf8_m(...) __riscv_vsoxseg4ei16_v_i8mf8_m(__VA_ARGS__)

#define	vsoxseg4ei16_v_u16m1(...) __riscv_vsoxseg4ei16_v_u16m1(__VA_ARGS__)

#define	vsoxseg4ei16_v_u16m1_m(...) __riscv_vsoxseg4ei16_v_u16m1_m(__VA_ARGS__)

#define	vsoxseg4ei16_v_u16m2(...) __riscv_vsoxseg4ei16_v_u16m2(__VA_ARGS__)

#define	vsoxseg4ei16_v_u16m2_m(...) __riscv_vsoxseg4ei16_v_u16m2_m(__VA_ARGS__)

#define	vsoxseg4ei16_v_u16mf2(...) __riscv_vsoxseg4ei16_v_u16mf2(__VA_ARGS__)

#define	vsoxseg4ei16_v_u16mf2_m(...) __riscv_vsoxseg4ei16_v_u16mf2_m(__VA_ARGS__)

#define	vsoxseg4ei16_v_u16mf4(...) __riscv_vsoxseg4ei16_v_u16mf4(__VA_ARGS__)

#define	vsoxseg4ei16_v_u16mf4_m(...) __riscv_vsoxseg4ei16_v_u16mf4_m(__VA_ARGS__)

#define	vsoxseg4ei16_v_u32m1(...) __riscv_vsoxseg4ei16_v_u32m1(__VA_ARGS__)

#define	vsoxseg4ei16_v_u32m1_m(...) __riscv_vsoxseg4ei16_v_u32m1_m(__VA_ARGS__)

#define	vsoxseg4ei16_v_u32m2(...) __riscv_vsoxseg4ei16_v_u32m2(__VA_ARGS__)

#define	vsoxseg4ei16_v_u32m2_m(...) __riscv_vsoxseg4ei16_v_u32m2_m(__VA_ARGS__)

#define	vsoxseg4ei16_v_u32mf2(...) __riscv_vsoxseg4ei16_v_u32mf2(__VA_ARGS__)

#define	vsoxseg4ei16_v_u32mf2_m(...) __riscv_vsoxseg4ei16_v_u32mf2_m(__VA_ARGS__)

#define	vsoxseg4ei16_v_u64m1(...) __riscv_vsoxseg4ei16_v_u64m1(__VA_ARGS__)

#define	vsoxseg4ei16_v_u64m1_m(...) __riscv_vsoxseg4ei16_v_u64m1_m(__VA_ARGS__)

#define	vsoxseg4ei16_v_u64m2(...) __riscv_vsoxseg4ei16_v_u64m2(__VA_ARGS__)

#define	vsoxseg4ei16_v_u64m2_m(...) __riscv_vsoxseg4ei16_v_u64m2_m(__VA_ARGS__)

#define	vsoxseg4ei16_v_u8m1(...) __riscv_vsoxseg4ei16_v_u8m1(__VA_ARGS__)

#define	vsoxseg4ei16_v_u8m1_m(...) __riscv_vsoxseg4ei16_v_u8m1_m(__VA_ARGS__)

#define	vsoxseg4ei16_v_u8m2(...) __riscv_vsoxseg4ei16_v_u8m2(__VA_ARGS__)

#define	vsoxseg4ei16_v_u8m2_m(...) __riscv_vsoxseg4ei16_v_u8m2_m(__VA_ARGS__)

#define	vsoxseg4ei16_v_u8mf2(...) __riscv_vsoxseg4ei16_v_u8mf2(__VA_ARGS__)

#define	vsoxseg4ei16_v_u8mf2_m(...) __riscv_vsoxseg4ei16_v_u8mf2_m(__VA_ARGS__)

#define	vsoxseg4ei16_v_u8mf4(...) __riscv_vsoxseg4ei16_v_u8mf4(__VA_ARGS__)

#define	vsoxseg4ei16_v_u8mf4_m(...) __riscv_vsoxseg4ei16_v_u8mf4_m(__VA_ARGS__)

#define	vsoxseg4ei16_v_u8mf8(...) __riscv_vsoxseg4ei16_v_u8mf8(__VA_ARGS__)

#define	vsoxseg4ei16_v_u8mf8_m(...) __riscv_vsoxseg4ei16_v_u8mf8_m(__VA_ARGS__)

#define	vsoxseg4ei32_v_f16m1(...) __riscv_vsoxseg4ei32_v_f16m1(__VA_ARGS__)

#define	vsoxseg4ei32_v_f16m1_m(...) __riscv_vsoxseg4ei32_v_f16m1_m(__VA_ARGS__)

#define	vsoxseg4ei32_v_f16m2(...) __riscv_vsoxseg4ei32_v_f16m2(__VA_ARGS__)

#define	vsoxseg4ei32_v_f16m2_m(...) __riscv_vsoxseg4ei32_v_f16m2_m(__VA_ARGS__)

#define	vsoxseg4ei32_v_f16mf2(...) __riscv_vsoxseg4ei32_v_f16mf2(__VA_ARGS__)

#define	vsoxseg4ei32_v_f16mf2_m(...) __riscv_vsoxseg4ei32_v_f16mf2_m(__VA_ARGS__)

#define	vsoxseg4ei32_v_f16mf4(...) __riscv_vsoxseg4ei32_v_f16mf4(__VA_ARGS__)

#define	vsoxseg4ei32_v_f16mf4_m(...) __riscv_vsoxseg4ei32_v_f16mf4_m(__VA_ARGS__)

#define	vsoxseg4ei32_v_f32m1(...) __riscv_vsoxseg4ei32_v_f32m1(__VA_ARGS__)

#define	vsoxseg4ei32_v_f32m1_m(...) __riscv_vsoxseg4ei32_v_f32m1_m(__VA_ARGS__)

#define	vsoxseg4ei32_v_f32m2(...) __riscv_vsoxseg4ei32_v_f32m2(__VA_ARGS__)

#define	vsoxseg4ei32_v_f32m2_m(...) __riscv_vsoxseg4ei32_v_f32m2_m(__VA_ARGS__)

#define	vsoxseg4ei32_v_f32mf2(...) __riscv_vsoxseg4ei32_v_f32mf2(__VA_ARGS__)

#define	vsoxseg4ei32_v_f32mf2_m(...) __riscv_vsoxseg4ei32_v_f32mf2_m(__VA_ARGS__)

#define	vsoxseg4ei32_v_f64m1(...) __riscv_vsoxseg4ei32_v_f64m1(__VA_ARGS__)

#define	vsoxseg4ei32_v_f64m1_m(...) __riscv_vsoxseg4ei32_v_f64m1_m(__VA_ARGS__)

#define	vsoxseg4ei32_v_f64m2(...) __riscv_vsoxseg4ei32_v_f64m2(__VA_ARGS__)

#define	vsoxseg4ei32_v_f64m2_m(...) __riscv_vsoxseg4ei32_v_f64m2_m(__VA_ARGS__)

#define	vsoxseg4ei32_v_i16m1(...) __riscv_vsoxseg4ei32_v_i16m1(__VA_ARGS__)

#define	vsoxseg4ei32_v_i16m1_m(...) __riscv_vsoxseg4ei32_v_i16m1_m(__VA_ARGS__)

#define	vsoxseg4ei32_v_i16m2(...) __riscv_vsoxseg4ei32_v_i16m2(__VA_ARGS__)

#define	vsoxseg4ei32_v_i16m2_m(...) __riscv_vsoxseg4ei32_v_i16m2_m(__VA_ARGS__)

#define	vsoxseg4ei32_v_i16mf2(...) __riscv_vsoxseg4ei32_v_i16mf2(__VA_ARGS__)

#define	vsoxseg4ei32_v_i16mf2_m(...) __riscv_vsoxseg4ei32_v_i16mf2_m(__VA_ARGS__)

#define	vsoxseg4ei32_v_i16mf4(...) __riscv_vsoxseg4ei32_v_i16mf4(__VA_ARGS__)

#define	vsoxseg4ei32_v_i16mf4_m(...) __riscv_vsoxseg4ei32_v_i16mf4_m(__VA_ARGS__)

#define	vsoxseg4ei32_v_i32m1(...) __riscv_vsoxseg4ei32_v_i32m1(__VA_ARGS__)

#define	vsoxseg4ei32_v_i32m1_m(...) __riscv_vsoxseg4ei32_v_i32m1_m(__VA_ARGS__)

#define	vsoxseg4ei32_v_i32m2(...) __riscv_vsoxseg4ei32_v_i32m2(__VA_ARGS__)

#define	vsoxseg4ei32_v_i32m2_m(...) __riscv_vsoxseg4ei32_v_i32m2_m(__VA_ARGS__)

#define	vsoxseg4ei32_v_i32mf2(...) __riscv_vsoxseg4ei32_v_i32mf2(__VA_ARGS__)

#define	vsoxseg4ei32_v_i32mf2_m(...) __riscv_vsoxseg4ei32_v_i32mf2_m(__VA_ARGS__)

#define	vsoxseg4ei32_v_i64m1(...) __riscv_vsoxseg4ei32_v_i64m1(__VA_ARGS__)

#define	vsoxseg4ei32_v_i64m1_m(...) __riscv_vsoxseg4ei32_v_i64m1_m(__VA_ARGS__)

#define	vsoxseg4ei32_v_i64m2(...) __riscv_vsoxseg4ei32_v_i64m2(__VA_ARGS__)

#define	vsoxseg4ei32_v_i64m2_m(...) __riscv_vsoxseg4ei32_v_i64m2_m(__VA_ARGS__)

#define	vsoxseg4ei32_v_i8m1(...) __riscv_vsoxseg4ei32_v_i8m1(__VA_ARGS__)

#define	vsoxseg4ei32_v_i8m1_m(...) __riscv_vsoxseg4ei32_v_i8m1_m(__VA_ARGS__)

#define	vsoxseg4ei32_v_i8m2(...) __riscv_vsoxseg4ei32_v_i8m2(__VA_ARGS__)

#define	vsoxseg4ei32_v_i8m2_m(...) __riscv_vsoxseg4ei32_v_i8m2_m(__VA_ARGS__)

#define	vsoxseg4ei32_v_i8mf2(...) __riscv_vsoxseg4ei32_v_i8mf2(__VA_ARGS__)

#define	vsoxseg4ei32_v_i8mf2_m(...) __riscv_vsoxseg4ei32_v_i8mf2_m(__VA_ARGS__)

#define	vsoxseg4ei32_v_i8mf4(...) __riscv_vsoxseg4ei32_v_i8mf4(__VA_ARGS__)

#define	vsoxseg4ei32_v_i8mf4_m(...) __riscv_vsoxseg4ei32_v_i8mf4_m(__VA_ARGS__)

#define	vsoxseg4ei32_v_i8mf8(...) __riscv_vsoxseg4ei32_v_i8mf8(__VA_ARGS__)

#define	vsoxseg4ei32_v_i8mf8_m(...) __riscv_vsoxseg4ei32_v_i8mf8_m(__VA_ARGS__)

#define	vsoxseg4ei32_v_u16m1(...) __riscv_vsoxseg4ei32_v_u16m1(__VA_ARGS__)

#define	vsoxseg4ei32_v_u16m1_m(...) __riscv_vsoxseg4ei32_v_u16m1_m(__VA_ARGS__)

#define	vsoxseg4ei32_v_u16m2(...) __riscv_vsoxseg4ei32_v_u16m2(__VA_ARGS__)

#define	vsoxseg4ei32_v_u16m2_m(...) __riscv_vsoxseg4ei32_v_u16m2_m(__VA_ARGS__)

#define	vsoxseg4ei32_v_u16mf2(...) __riscv_vsoxseg4ei32_v_u16mf2(__VA_ARGS__)

#define	vsoxseg4ei32_v_u16mf2_m(...) __riscv_vsoxseg4ei32_v_u16mf2_m(__VA_ARGS__)

#define	vsoxseg4ei32_v_u16mf4(...) __riscv_vsoxseg4ei32_v_u16mf4(__VA_ARGS__)

#define	vsoxseg4ei32_v_u16mf4_m(...) __riscv_vsoxseg4ei32_v_u16mf4_m(__VA_ARGS__)

#define	vsoxseg4ei32_v_u32m1(...) __riscv_vsoxseg4ei32_v_u32m1(__VA_ARGS__)

#define	vsoxseg4ei32_v_u32m1_m(...) __riscv_vsoxseg4ei32_v_u32m1_m(__VA_ARGS__)

#define	vsoxseg4ei32_v_u32m2(...) __riscv_vsoxseg4ei32_v_u32m2(__VA_ARGS__)

#define	vsoxseg4ei32_v_u32m2_m(...) __riscv_vsoxseg4ei32_v_u32m2_m(__VA_ARGS__)

#define	vsoxseg4ei32_v_u32mf2(...) __riscv_vsoxseg4ei32_v_u32mf2(__VA_ARGS__)

#define	vsoxseg4ei32_v_u32mf2_m(...) __riscv_vsoxseg4ei32_v_u32mf2_m(__VA_ARGS__)

#define	vsoxseg4ei32_v_u64m1(...) __riscv_vsoxseg4ei32_v_u64m1(__VA_ARGS__)

#define	vsoxseg4ei32_v_u64m1_m(...) __riscv_vsoxseg4ei32_v_u64m1_m(__VA_ARGS__)

#define	vsoxseg4ei32_v_u64m2(...) __riscv_vsoxseg4ei32_v_u64m2(__VA_ARGS__)

#define	vsoxseg4ei32_v_u64m2_m(...) __riscv_vsoxseg4ei32_v_u64m2_m(__VA_ARGS__)

#define	vsoxseg4ei32_v_u8m1(...) __riscv_vsoxseg4ei32_v_u8m1(__VA_ARGS__)

#define	vsoxseg4ei32_v_u8m1_m(...) __riscv_vsoxseg4ei32_v_u8m1_m(__VA_ARGS__)

#define	vsoxseg4ei32_v_u8m2(...) __riscv_vsoxseg4ei32_v_u8m2(__VA_ARGS__)

#define	vsoxseg4ei32_v_u8m2_m(...) __riscv_vsoxseg4ei32_v_u8m2_m(__VA_ARGS__)

#define	vsoxseg4ei32_v_u8mf2(...) __riscv_vsoxseg4ei32_v_u8mf2(__VA_ARGS__)

#define	vsoxseg4ei32_v_u8mf2_m(...) __riscv_vsoxseg4ei32_v_u8mf2_m(__VA_ARGS__)

#define	vsoxseg4ei32_v_u8mf4(...) __riscv_vsoxseg4ei32_v_u8mf4(__VA_ARGS__)

#define	vsoxseg4ei32_v_u8mf4_m(...) __riscv_vsoxseg4ei32_v_u8mf4_m(__VA_ARGS__)

#define	vsoxseg4ei32_v_u8mf8(...) __riscv_vsoxseg4ei32_v_u8mf8(__VA_ARGS__)

#define	vsoxseg4ei32_v_u8mf8_m(...) __riscv_vsoxseg4ei32_v_u8mf8_m(__VA_ARGS__)

#define	vsoxseg4ei64_v_f16m1(...) __riscv_vsoxseg4ei64_v_f16m1(__VA_ARGS__)

#define	vsoxseg4ei64_v_f16m1_m(...) __riscv_vsoxseg4ei64_v_f16m1_m(__VA_ARGS__)

#define	vsoxseg4ei64_v_f16m2(...) __riscv_vsoxseg4ei64_v_f16m2(__VA_ARGS__)

#define	vsoxseg4ei64_v_f16m2_m(...) __riscv_vsoxseg4ei64_v_f16m2_m(__VA_ARGS__)

#define	vsoxseg4ei64_v_f16mf2(...) __riscv_vsoxseg4ei64_v_f16mf2(__VA_ARGS__)

#define	vsoxseg4ei64_v_f16mf2_m(...) __riscv_vsoxseg4ei64_v_f16mf2_m(__VA_ARGS__)

#define	vsoxseg4ei64_v_f16mf4(...) __riscv_vsoxseg4ei64_v_f16mf4(__VA_ARGS__)

#define	vsoxseg4ei64_v_f16mf4_m(...) __riscv_vsoxseg4ei64_v_f16mf4_m(__VA_ARGS__)

#define	vsoxseg4ei64_v_f32m1(...) __riscv_vsoxseg4ei64_v_f32m1(__VA_ARGS__)

#define	vsoxseg4ei64_v_f32m1_m(...) __riscv_vsoxseg4ei64_v_f32m1_m(__VA_ARGS__)

#define	vsoxseg4ei64_v_f32m2(...) __riscv_vsoxseg4ei64_v_f32m2(__VA_ARGS__)

#define	vsoxseg4ei64_v_f32m2_m(...) __riscv_vsoxseg4ei64_v_f32m2_m(__VA_ARGS__)

#define	vsoxseg4ei64_v_f32mf2(...) __riscv_vsoxseg4ei64_v_f32mf2(__VA_ARGS__)

#define	vsoxseg4ei64_v_f32mf2_m(...) __riscv_vsoxseg4ei64_v_f32mf2_m(__VA_ARGS__)

#define	vsoxseg4ei64_v_f64m1(...) __riscv_vsoxseg4ei64_v_f64m1(__VA_ARGS__)

#define	vsoxseg4ei64_v_f64m1_m(...) __riscv_vsoxseg4ei64_v_f64m1_m(__VA_ARGS__)

#define	vsoxseg4ei64_v_f64m2(...) __riscv_vsoxseg4ei64_v_f64m2(__VA_ARGS__)

#define	vsoxseg4ei64_v_f64m2_m(...) __riscv_vsoxseg4ei64_v_f64m2_m(__VA_ARGS__)

#define	vsoxseg4ei64_v_i16m1(...) __riscv_vsoxseg4ei64_v_i16m1(__VA_ARGS__)

#define	vsoxseg4ei64_v_i16m1_m(...) __riscv_vsoxseg4ei64_v_i16m1_m(__VA_ARGS__)

#define	vsoxseg4ei64_v_i16m2(...) __riscv_vsoxseg4ei64_v_i16m2(__VA_ARGS__)

#define	vsoxseg4ei64_v_i16m2_m(...) __riscv_vsoxseg4ei64_v_i16m2_m(__VA_ARGS__)

#define	vsoxseg4ei64_v_i16mf2(...) __riscv_vsoxseg4ei64_v_i16mf2(__VA_ARGS__)

#define	vsoxseg4ei64_v_i16mf2_m(...) __riscv_vsoxseg4ei64_v_i16mf2_m(__VA_ARGS__)

#define	vsoxseg4ei64_v_i16mf4(...) __riscv_vsoxseg4ei64_v_i16mf4(__VA_ARGS__)

#define	vsoxseg4ei64_v_i16mf4_m(...) __riscv_vsoxseg4ei64_v_i16mf4_m(__VA_ARGS__)

#define	vsoxseg4ei64_v_i32m1(...) __riscv_vsoxseg4ei64_v_i32m1(__VA_ARGS__)

#define	vsoxseg4ei64_v_i32m1_m(...) __riscv_vsoxseg4ei64_v_i32m1_m(__VA_ARGS__)

#define	vsoxseg4ei64_v_i32m2(...) __riscv_vsoxseg4ei64_v_i32m2(__VA_ARGS__)

#define	vsoxseg4ei64_v_i32m2_m(...) __riscv_vsoxseg4ei64_v_i32m2_m(__VA_ARGS__)

#define	vsoxseg4ei64_v_i32mf2(...) __riscv_vsoxseg4ei64_v_i32mf2(__VA_ARGS__)

#define	vsoxseg4ei64_v_i32mf2_m(...) __riscv_vsoxseg4ei64_v_i32mf2_m(__VA_ARGS__)

#define	vsoxseg4ei64_v_i64m1(...) __riscv_vsoxseg4ei64_v_i64m1(__VA_ARGS__)

#define	vsoxseg4ei64_v_i64m1_m(...) __riscv_vsoxseg4ei64_v_i64m1_m(__VA_ARGS__)

#define	vsoxseg4ei64_v_i64m2(...) __riscv_vsoxseg4ei64_v_i64m2(__VA_ARGS__)

#define	vsoxseg4ei64_v_i64m2_m(...) __riscv_vsoxseg4ei64_v_i64m2_m(__VA_ARGS__)

#define	vsoxseg4ei64_v_i8m1(...) __riscv_vsoxseg4ei64_v_i8m1(__VA_ARGS__)

#define	vsoxseg4ei64_v_i8m1_m(...) __riscv_vsoxseg4ei64_v_i8m1_m(__VA_ARGS__)

#define	vsoxseg4ei64_v_i8mf2(...) __riscv_vsoxseg4ei64_v_i8mf2(__VA_ARGS__)

#define	vsoxseg4ei64_v_i8mf2_m(...) __riscv_vsoxseg4ei64_v_i8mf2_m(__VA_ARGS__)

#define	vsoxseg4ei64_v_i8mf4(...) __riscv_vsoxseg4ei64_v_i8mf4(__VA_ARGS__)

#define	vsoxseg4ei64_v_i8mf4_m(...) __riscv_vsoxseg4ei64_v_i8mf4_m(__VA_ARGS__)

#define	vsoxseg4ei64_v_i8mf8(...) __riscv_vsoxseg4ei64_v_i8mf8(__VA_ARGS__)

#define	vsoxseg4ei64_v_i8mf8_m(...) __riscv_vsoxseg4ei64_v_i8mf8_m(__VA_ARGS__)

#define	vsoxseg4ei64_v_u16m1(...) __riscv_vsoxseg4ei64_v_u16m1(__VA_ARGS__)

#define	vsoxseg4ei64_v_u16m1_m(...) __riscv_vsoxseg4ei64_v_u16m1_m(__VA_ARGS__)

#define	vsoxseg4ei64_v_u16m2(...) __riscv_vsoxseg4ei64_v_u16m2(__VA_ARGS__)

#define	vsoxseg4ei64_v_u16m2_m(...) __riscv_vsoxseg4ei64_v_u16m2_m(__VA_ARGS__)

#define	vsoxseg4ei64_v_u16mf2(...) __riscv_vsoxseg4ei64_v_u16mf2(__VA_ARGS__)

#define	vsoxseg4ei64_v_u16mf2_m(...) __riscv_vsoxseg4ei64_v_u16mf2_m(__VA_ARGS__)

#define	vsoxseg4ei64_v_u16mf4(...) __riscv_vsoxseg4ei64_v_u16mf4(__VA_ARGS__)

#define	vsoxseg4ei64_v_u16mf4_m(...) __riscv_vsoxseg4ei64_v_u16mf4_m(__VA_ARGS__)

#define	vsoxseg4ei64_v_u32m1(...) __riscv_vsoxseg4ei64_v_u32m1(__VA_ARGS__)

#define	vsoxseg4ei64_v_u32m1_m(...) __riscv_vsoxseg4ei64_v_u32m1_m(__VA_ARGS__)

#define	vsoxseg4ei64_v_u32m2(...) __riscv_vsoxseg4ei64_v_u32m2(__VA_ARGS__)

#define	vsoxseg4ei64_v_u32m2_m(...) __riscv_vsoxseg4ei64_v_u32m2_m(__VA_ARGS__)

#define	vsoxseg4ei64_v_u32mf2(...) __riscv_vsoxseg4ei64_v_u32mf2(__VA_ARGS__)

#define	vsoxseg4ei64_v_u32mf2_m(...) __riscv_vsoxseg4ei64_v_u32mf2_m(__VA_ARGS__)

#define	vsoxseg4ei64_v_u64m1(...) __riscv_vsoxseg4ei64_v_u64m1(__VA_ARGS__)

#define	vsoxseg4ei64_v_u64m1_m(...) __riscv_vsoxseg4ei64_v_u64m1_m(__VA_ARGS__)

#define	vsoxseg4ei64_v_u64m2(...) __riscv_vsoxseg4ei64_v_u64m2(__VA_ARGS__)

#define	vsoxseg4ei64_v_u64m2_m(...) __riscv_vsoxseg4ei64_v_u64m2_m(__VA_ARGS__)

#define	vsoxseg4ei64_v_u8m1(...) __riscv_vsoxseg4ei64_v_u8m1(__VA_ARGS__)

#define	vsoxseg4ei64_v_u8m1_m(...) __riscv_vsoxseg4ei64_v_u8m1_m(__VA_ARGS__)

#define	vsoxseg4ei64_v_u8mf2(...) __riscv_vsoxseg4ei64_v_u8mf2(__VA_ARGS__)

#define	vsoxseg4ei64_v_u8mf2_m(...) __riscv_vsoxseg4ei64_v_u8mf2_m(__VA_ARGS__)

#define	vsoxseg4ei64_v_u8mf4(...) __riscv_vsoxseg4ei64_v_u8mf4(__VA_ARGS__)

#define	vsoxseg4ei64_v_u8mf4_m(...) __riscv_vsoxseg4ei64_v_u8mf4_m(__VA_ARGS__)

#define	vsoxseg4ei64_v_u8mf8(...) __riscv_vsoxseg4ei64_v_u8mf8(__VA_ARGS__)

#define	vsoxseg4ei64_v_u8mf8_m(...) __riscv_vsoxseg4ei64_v_u8mf8_m(__VA_ARGS__)

#define	vsoxseg4ei8_v_f16m1(...) __riscv_vsoxseg4ei8_v_f16m1(__VA_ARGS__)

#define	vsoxseg4ei8_v_f16m1_m(...) __riscv_vsoxseg4ei8_v_f16m1_m(__VA_ARGS__)

#define	vsoxseg4ei8_v_f16m2(...) __riscv_vsoxseg4ei8_v_f16m2(__VA_ARGS__)

#define	vsoxseg4ei8_v_f16m2_m(...) __riscv_vsoxseg4ei8_v_f16m2_m(__VA_ARGS__)

#define	vsoxseg4ei8_v_f16mf2(...) __riscv_vsoxseg4ei8_v_f16mf2(__VA_ARGS__)

#define	vsoxseg4ei8_v_f16mf2_m(...) __riscv_vsoxseg4ei8_v_f16mf2_m(__VA_ARGS__)

#define	vsoxseg4ei8_v_f16mf4(...) __riscv_vsoxseg4ei8_v_f16mf4(__VA_ARGS__)

#define	vsoxseg4ei8_v_f16mf4_m(...) __riscv_vsoxseg4ei8_v_f16mf4_m(__VA_ARGS__)

#define	vsoxseg4ei8_v_f32m1(...) __riscv_vsoxseg4ei8_v_f32m1(__VA_ARGS__)

#define	vsoxseg4ei8_v_f32m1_m(...) __riscv_vsoxseg4ei8_v_f32m1_m(__VA_ARGS__)

#define	vsoxseg4ei8_v_f32m2(...) __riscv_vsoxseg4ei8_v_f32m2(__VA_ARGS__)

#define	vsoxseg4ei8_v_f32m2_m(...) __riscv_vsoxseg4ei8_v_f32m2_m(__VA_ARGS__)

#define	vsoxseg4ei8_v_f32mf2(...) __riscv_vsoxseg4ei8_v_f32mf2(__VA_ARGS__)

#define	vsoxseg4ei8_v_f32mf2_m(...) __riscv_vsoxseg4ei8_v_f32mf2_m(__VA_ARGS__)

#define	vsoxseg4ei8_v_f64m1(...) __riscv_vsoxseg4ei8_v_f64m1(__VA_ARGS__)

#define	vsoxseg4ei8_v_f64m1_m(...) __riscv_vsoxseg4ei8_v_f64m1_m(__VA_ARGS__)

#define	vsoxseg4ei8_v_f64m2(...) __riscv_vsoxseg4ei8_v_f64m2(__VA_ARGS__)

#define	vsoxseg4ei8_v_f64m2_m(...) __riscv_vsoxseg4ei8_v_f64m2_m(__VA_ARGS__)

#define	vsoxseg4ei8_v_i16m1(...) __riscv_vsoxseg4ei8_v_i16m1(__VA_ARGS__)

#define	vsoxseg4ei8_v_i16m1_m(...) __riscv_vsoxseg4ei8_v_i16m1_m(__VA_ARGS__)

#define	vsoxseg4ei8_v_i16m2(...) __riscv_vsoxseg4ei8_v_i16m2(__VA_ARGS__)

#define	vsoxseg4ei8_v_i16m2_m(...) __riscv_vsoxseg4ei8_v_i16m2_m(__VA_ARGS__)

#define	vsoxseg4ei8_v_i16mf2(...) __riscv_vsoxseg4ei8_v_i16mf2(__VA_ARGS__)

#define	vsoxseg4ei8_v_i16mf2_m(...) __riscv_vsoxseg4ei8_v_i16mf2_m(__VA_ARGS__)

#define	vsoxseg4ei8_v_i16mf4(...) __riscv_vsoxseg4ei8_v_i16mf4(__VA_ARGS__)

#define	vsoxseg4ei8_v_i16mf4_m(...) __riscv_vsoxseg4ei8_v_i16mf4_m(__VA_ARGS__)

#define	vsoxseg4ei8_v_i32m1(...) __riscv_vsoxseg4ei8_v_i32m1(__VA_ARGS__)

#define	vsoxseg4ei8_v_i32m1_m(...) __riscv_vsoxseg4ei8_v_i32m1_m(__VA_ARGS__)

#define	vsoxseg4ei8_v_i32m2(...) __riscv_vsoxseg4ei8_v_i32m2(__VA_ARGS__)

#define	vsoxseg4ei8_v_i32m2_m(...) __riscv_vsoxseg4ei8_v_i32m2_m(__VA_ARGS__)

#define	vsoxseg4ei8_v_i32mf2(...) __riscv_vsoxseg4ei8_v_i32mf2(__VA_ARGS__)

#define	vsoxseg4ei8_v_i32mf2_m(...) __riscv_vsoxseg4ei8_v_i32mf2_m(__VA_ARGS__)

#define	vsoxseg4ei8_v_i64m1(...) __riscv_vsoxseg4ei8_v_i64m1(__VA_ARGS__)

#define	vsoxseg4ei8_v_i64m1_m(...) __riscv_vsoxseg4ei8_v_i64m1_m(__VA_ARGS__)

#define	vsoxseg4ei8_v_i64m2(...) __riscv_vsoxseg4ei8_v_i64m2(__VA_ARGS__)

#define	vsoxseg4ei8_v_i64m2_m(...) __riscv_vsoxseg4ei8_v_i64m2_m(__VA_ARGS__)

#define	vsoxseg4ei8_v_i8m1(...) __riscv_vsoxseg4ei8_v_i8m1(__VA_ARGS__)

#define	vsoxseg4ei8_v_i8m1_m(...) __riscv_vsoxseg4ei8_v_i8m1_m(__VA_ARGS__)

#define	vsoxseg4ei8_v_i8m2(...) __riscv_vsoxseg4ei8_v_i8m2(__VA_ARGS__)

#define	vsoxseg4ei8_v_i8m2_m(...) __riscv_vsoxseg4ei8_v_i8m2_m(__VA_ARGS__)

#define	vsoxseg4ei8_v_i8mf2(...) __riscv_vsoxseg4ei8_v_i8mf2(__VA_ARGS__)

#define	vsoxseg4ei8_v_i8mf2_m(...) __riscv_vsoxseg4ei8_v_i8mf2_m(__VA_ARGS__)

#define	vsoxseg4ei8_v_i8mf4(...) __riscv_vsoxseg4ei8_v_i8mf4(__VA_ARGS__)

#define	vsoxseg4ei8_v_i8mf4_m(...) __riscv_vsoxseg4ei8_v_i8mf4_m(__VA_ARGS__)

#define	vsoxseg4ei8_v_i8mf8(...) __riscv_vsoxseg4ei8_v_i8mf8(__VA_ARGS__)

#define	vsoxseg4ei8_v_i8mf8_m(...) __riscv_vsoxseg4ei8_v_i8mf8_m(__VA_ARGS__)

#define	vsoxseg4ei8_v_u16m1(...) __riscv_vsoxseg4ei8_v_u16m1(__VA_ARGS__)

#define	vsoxseg4ei8_v_u16m1_m(...) __riscv_vsoxseg4ei8_v_u16m1_m(__VA_ARGS__)

#define	vsoxseg4ei8_v_u16m2(...) __riscv_vsoxseg4ei8_v_u16m2(__VA_ARGS__)

#define	vsoxseg4ei8_v_u16m2_m(...) __riscv_vsoxseg4ei8_v_u16m2_m(__VA_ARGS__)

#define	vsoxseg4ei8_v_u16mf2(...) __riscv_vsoxseg4ei8_v_u16mf2(__VA_ARGS__)

#define	vsoxseg4ei8_v_u16mf2_m(...) __riscv_vsoxseg4ei8_v_u16mf2_m(__VA_ARGS__)

#define	vsoxseg4ei8_v_u16mf4(...) __riscv_vsoxseg4ei8_v_u16mf4(__VA_ARGS__)

#define	vsoxseg4ei8_v_u16mf4_m(...) __riscv_vsoxseg4ei8_v_u16mf4_m(__VA_ARGS__)

#define	vsoxseg4ei8_v_u32m1(...) __riscv_vsoxseg4ei8_v_u32m1(__VA_ARGS__)

#define	vsoxseg4ei8_v_u32m1_m(...) __riscv_vsoxseg4ei8_v_u32m1_m(__VA_ARGS__)

#define	vsoxseg4ei8_v_u32m2(...) __riscv_vsoxseg4ei8_v_u32m2(__VA_ARGS__)

#define	vsoxseg4ei8_v_u32m2_m(...) __riscv_vsoxseg4ei8_v_u32m2_m(__VA_ARGS__)

#define	vsoxseg4ei8_v_u32mf2(...) __riscv_vsoxseg4ei8_v_u32mf2(__VA_ARGS__)

#define	vsoxseg4ei8_v_u32mf2_m(...) __riscv_vsoxseg4ei8_v_u32mf2_m(__VA_ARGS__)

#define	vsoxseg4ei8_v_u64m1(...) __riscv_vsoxseg4ei8_v_u64m1(__VA_ARGS__)

#define	vsoxseg4ei8_v_u64m1_m(...) __riscv_vsoxseg4ei8_v_u64m1_m(__VA_ARGS__)

#define	vsoxseg4ei8_v_u64m2(...) __riscv_vsoxseg4ei8_v_u64m2(__VA_ARGS__)

#define	vsoxseg4ei8_v_u64m2_m(...) __riscv_vsoxseg4ei8_v_u64m2_m(__VA_ARGS__)

#define	vsoxseg4ei8_v_u8m1(...) __riscv_vsoxseg4ei8_v_u8m1(__VA_ARGS__)

#define	vsoxseg4ei8_v_u8m1_m(...) __riscv_vsoxseg4ei8_v_u8m1_m(__VA_ARGS__)

#define	vsoxseg4ei8_v_u8m2(...) __riscv_vsoxseg4ei8_v_u8m2(__VA_ARGS__)

#define	vsoxseg4ei8_v_u8m2_m(...) __riscv_vsoxseg4ei8_v_u8m2_m(__VA_ARGS__)

#define	vsoxseg4ei8_v_u8mf2(...) __riscv_vsoxseg4ei8_v_u8mf2(__VA_ARGS__)

#define	vsoxseg4ei8_v_u8mf2_m(...) __riscv_vsoxseg4ei8_v_u8mf2_m(__VA_ARGS__)

#define	vsoxseg4ei8_v_u8mf4(...) __riscv_vsoxseg4ei8_v_u8mf4(__VA_ARGS__)

#define	vsoxseg4ei8_v_u8mf4_m(...) __riscv_vsoxseg4ei8_v_u8mf4_m(__VA_ARGS__)

#define	vsoxseg4ei8_v_u8mf8(...) __riscv_vsoxseg4ei8_v_u8mf8(__VA_ARGS__)

#define	vsoxseg4ei8_v_u8mf8_m(...) __riscv_vsoxseg4ei8_v_u8mf8_m(__VA_ARGS__)

#define	vsoxseg5ei16_v_f16m1(...) __riscv_vsoxseg5ei16_v_f16m1(__VA_ARGS__)

#define	vsoxseg5ei16_v_f16m1_m(...) __riscv_vsoxseg5ei16_v_f16m1_m(__VA_ARGS__)

#define	vsoxseg5ei16_v_f16mf2(...) __riscv_vsoxseg5ei16_v_f16mf2(__VA_ARGS__)

#define	vsoxseg5ei16_v_f16mf2_m(...) __riscv_vsoxseg5ei16_v_f16mf2_m(__VA_ARGS__)

#define	vsoxseg5ei16_v_f16mf4(...) __riscv_vsoxseg5ei16_v_f16mf4(__VA_ARGS__)

#define	vsoxseg5ei16_v_f16mf4_m(...) __riscv_vsoxseg5ei16_v_f16mf4_m(__VA_ARGS__)

#define	vsoxseg5ei16_v_f32m1(...) __riscv_vsoxseg5ei16_v_f32m1(__VA_ARGS__)

#define	vsoxseg5ei16_v_f32m1_m(...) __riscv_vsoxseg5ei16_v_f32m1_m(__VA_ARGS__)

#define	vsoxseg5ei16_v_f32mf2(...) __riscv_vsoxseg5ei16_v_f32mf2(__VA_ARGS__)

#define	vsoxseg5ei16_v_f32mf2_m(...) __riscv_vsoxseg5ei16_v_f32mf2_m(__VA_ARGS__)

#define	vsoxseg5ei16_v_f64m1(...) __riscv_vsoxseg5ei16_v_f64m1(__VA_ARGS__)

#define	vsoxseg5ei16_v_f64m1_m(...) __riscv_vsoxseg5ei16_v_f64m1_m(__VA_ARGS__)

#define	vsoxseg5ei16_v_i16m1(...) __riscv_vsoxseg5ei16_v_i16m1(__VA_ARGS__)

#define	vsoxseg5ei16_v_i16m1_m(...) __riscv_vsoxseg5ei16_v_i16m1_m(__VA_ARGS__)

#define	vsoxseg5ei16_v_i16mf2(...) __riscv_vsoxseg5ei16_v_i16mf2(__VA_ARGS__)

#define	vsoxseg5ei16_v_i16mf2_m(...) __riscv_vsoxseg5ei16_v_i16mf2_m(__VA_ARGS__)

#define	vsoxseg5ei16_v_i16mf4(...) __riscv_vsoxseg5ei16_v_i16mf4(__VA_ARGS__)

#define	vsoxseg5ei16_v_i16mf4_m(...) __riscv_vsoxseg5ei16_v_i16mf4_m(__VA_ARGS__)

#define	vsoxseg5ei16_v_i32m1(...) __riscv_vsoxseg5ei16_v_i32m1(__VA_ARGS__)

#define	vsoxseg5ei16_v_i32m1_m(...) __riscv_vsoxseg5ei16_v_i32m1_m(__VA_ARGS__)

#define	vsoxseg5ei16_v_i32mf2(...) __riscv_vsoxseg5ei16_v_i32mf2(__VA_ARGS__)

#define	vsoxseg5ei16_v_i32mf2_m(...) __riscv_vsoxseg5ei16_v_i32mf2_m(__VA_ARGS__)

#define	vsoxseg5ei16_v_i64m1(...) __riscv_vsoxseg5ei16_v_i64m1(__VA_ARGS__)

#define	vsoxseg5ei16_v_i64m1_m(...) __riscv_vsoxseg5ei16_v_i64m1_m(__VA_ARGS__)

#define	vsoxseg5ei16_v_i8m1(...) __riscv_vsoxseg5ei16_v_i8m1(__VA_ARGS__)

#define	vsoxseg5ei16_v_i8m1_m(...) __riscv_vsoxseg5ei16_v_i8m1_m(__VA_ARGS__)

#define	vsoxseg5ei16_v_i8mf2(...) __riscv_vsoxseg5ei16_v_i8mf2(__VA_ARGS__)

#define	vsoxseg5ei16_v_i8mf2_m(...) __riscv_vsoxseg5ei16_v_i8mf2_m(__VA_ARGS__)

#define	vsoxseg5ei16_v_i8mf4(...) __riscv_vsoxseg5ei16_v_i8mf4(__VA_ARGS__)

#define	vsoxseg5ei16_v_i8mf4_m(...) __riscv_vsoxseg5ei16_v_i8mf4_m(__VA_ARGS__)

#define	vsoxseg5ei16_v_i8mf8(...) __riscv_vsoxseg5ei16_v_i8mf8(__VA_ARGS__)

#define	vsoxseg5ei16_v_i8mf8_m(...) __riscv_vsoxseg5ei16_v_i8mf8_m(__VA_ARGS__)

#define	vsoxseg5ei16_v_u16m1(...) __riscv_vsoxseg5ei16_v_u16m1(__VA_ARGS__)

#define	vsoxseg5ei16_v_u16m1_m(...) __riscv_vsoxseg5ei16_v_u16m1_m(__VA_ARGS__)

#define	vsoxseg5ei16_v_u16mf2(...) __riscv_vsoxseg5ei16_v_u16mf2(__VA_ARGS__)

#define	vsoxseg5ei16_v_u16mf2_m(...) __riscv_vsoxseg5ei16_v_u16mf2_m(__VA_ARGS__)

#define	vsoxseg5ei16_v_u16mf4(...) __riscv_vsoxseg5ei16_v_u16mf4(__VA_ARGS__)

#define	vsoxseg5ei16_v_u16mf4_m(...) __riscv_vsoxseg5ei16_v_u16mf4_m(__VA_ARGS__)

#define	vsoxseg5ei16_v_u32m1(...) __riscv_vsoxseg5ei16_v_u32m1(__VA_ARGS__)

#define	vsoxseg5ei16_v_u32m1_m(...) __riscv_vsoxseg5ei16_v_u32m1_m(__VA_ARGS__)

#define	vsoxseg5ei16_v_u32mf2(...) __riscv_vsoxseg5ei16_v_u32mf2(__VA_ARGS__)

#define	vsoxseg5ei16_v_u32mf2_m(...) __riscv_vsoxseg5ei16_v_u32mf2_m(__VA_ARGS__)

#define	vsoxseg5ei16_v_u64m1(...) __riscv_vsoxseg5ei16_v_u64m1(__VA_ARGS__)

#define	vsoxseg5ei16_v_u64m1_m(...) __riscv_vsoxseg5ei16_v_u64m1_m(__VA_ARGS__)

#define	vsoxseg5ei16_v_u8m1(...) __riscv_vsoxseg5ei16_v_u8m1(__VA_ARGS__)

#define	vsoxseg5ei16_v_u8m1_m(...) __riscv_vsoxseg5ei16_v_u8m1_m(__VA_ARGS__)

#define	vsoxseg5ei16_v_u8mf2(...) __riscv_vsoxseg5ei16_v_u8mf2(__VA_ARGS__)

#define	vsoxseg5ei16_v_u8mf2_m(...) __riscv_vsoxseg5ei16_v_u8mf2_m(__VA_ARGS__)

#define	vsoxseg5ei16_v_u8mf4(...) __riscv_vsoxseg5ei16_v_u8mf4(__VA_ARGS__)

#define	vsoxseg5ei16_v_u8mf4_m(...) __riscv_vsoxseg5ei16_v_u8mf4_m(__VA_ARGS__)

#define	vsoxseg5ei16_v_u8mf8(...) __riscv_vsoxseg5ei16_v_u8mf8(__VA_ARGS__)

#define	vsoxseg5ei16_v_u8mf8_m(...) __riscv_vsoxseg5ei16_v_u8mf8_m(__VA_ARGS__)

#define	vsoxseg5ei32_v_f16m1(...) __riscv_vsoxseg5ei32_v_f16m1(__VA_ARGS__)

#define	vsoxseg5ei32_v_f16m1_m(...) __riscv_vsoxseg5ei32_v_f16m1_m(__VA_ARGS__)

#define	vsoxseg5ei32_v_f16mf2(...) __riscv_vsoxseg5ei32_v_f16mf2(__VA_ARGS__)

#define	vsoxseg5ei32_v_f16mf2_m(...) __riscv_vsoxseg5ei32_v_f16mf2_m(__VA_ARGS__)

#define	vsoxseg5ei32_v_f16mf4(...) __riscv_vsoxseg5ei32_v_f16mf4(__VA_ARGS__)

#define	vsoxseg5ei32_v_f16mf4_m(...) __riscv_vsoxseg5ei32_v_f16mf4_m(__VA_ARGS__)

#define	vsoxseg5ei32_v_f32m1(...) __riscv_vsoxseg5ei32_v_f32m1(__VA_ARGS__)

#define	vsoxseg5ei32_v_f32m1_m(...) __riscv_vsoxseg5ei32_v_f32m1_m(__VA_ARGS__)

#define	vsoxseg5ei32_v_f32mf2(...) __riscv_vsoxseg5ei32_v_f32mf2(__VA_ARGS__)

#define	vsoxseg5ei32_v_f32mf2_m(...) __riscv_vsoxseg5ei32_v_f32mf2_m(__VA_ARGS__)

#define	vsoxseg5ei32_v_f64m1(...) __riscv_vsoxseg5ei32_v_f64m1(__VA_ARGS__)

#define	vsoxseg5ei32_v_f64m1_m(...) __riscv_vsoxseg5ei32_v_f64m1_m(__VA_ARGS__)

#define	vsoxseg5ei32_v_i16m1(...) __riscv_vsoxseg5ei32_v_i16m1(__VA_ARGS__)

#define	vsoxseg5ei32_v_i16m1_m(...) __riscv_vsoxseg5ei32_v_i16m1_m(__VA_ARGS__)

#define	vsoxseg5ei32_v_i16mf2(...) __riscv_vsoxseg5ei32_v_i16mf2(__VA_ARGS__)

#define	vsoxseg5ei32_v_i16mf2_m(...) __riscv_vsoxseg5ei32_v_i16mf2_m(__VA_ARGS__)

#define	vsoxseg5ei32_v_i16mf4(...) __riscv_vsoxseg5ei32_v_i16mf4(__VA_ARGS__)

#define	vsoxseg5ei32_v_i16mf4_m(...) __riscv_vsoxseg5ei32_v_i16mf4_m(__VA_ARGS__)

#define	vsoxseg5ei32_v_i32m1(...) __riscv_vsoxseg5ei32_v_i32m1(__VA_ARGS__)

#define	vsoxseg5ei32_v_i32m1_m(...) __riscv_vsoxseg5ei32_v_i32m1_m(__VA_ARGS__)

#define	vsoxseg5ei32_v_i32mf2(...) __riscv_vsoxseg5ei32_v_i32mf2(__VA_ARGS__)

#define	vsoxseg5ei32_v_i32mf2_m(...) __riscv_vsoxseg5ei32_v_i32mf2_m(__VA_ARGS__)

#define	vsoxseg5ei32_v_i64m1(...) __riscv_vsoxseg5ei32_v_i64m1(__VA_ARGS__)

#define	vsoxseg5ei32_v_i64m1_m(...) __riscv_vsoxseg5ei32_v_i64m1_m(__VA_ARGS__)

#define	vsoxseg5ei32_v_i8m1(...) __riscv_vsoxseg5ei32_v_i8m1(__VA_ARGS__)

#define	vsoxseg5ei32_v_i8m1_m(...) __riscv_vsoxseg5ei32_v_i8m1_m(__VA_ARGS__)

#define	vsoxseg5ei32_v_i8mf2(...) __riscv_vsoxseg5ei32_v_i8mf2(__VA_ARGS__)

#define	vsoxseg5ei32_v_i8mf2_m(...) __riscv_vsoxseg5ei32_v_i8mf2_m(__VA_ARGS__)

#define	vsoxseg5ei32_v_i8mf4(...) __riscv_vsoxseg5ei32_v_i8mf4(__VA_ARGS__)

#define	vsoxseg5ei32_v_i8mf4_m(...) __riscv_vsoxseg5ei32_v_i8mf4_m(__VA_ARGS__)

#define	vsoxseg5ei32_v_i8mf8(...) __riscv_vsoxseg5ei32_v_i8mf8(__VA_ARGS__)

#define	vsoxseg5ei32_v_i8mf8_m(...) __riscv_vsoxseg5ei32_v_i8mf8_m(__VA_ARGS__)

#define	vsoxseg5ei32_v_u16m1(...) __riscv_vsoxseg5ei32_v_u16m1(__VA_ARGS__)

#define	vsoxseg5ei32_v_u16m1_m(...) __riscv_vsoxseg5ei32_v_u16m1_m(__VA_ARGS__)

#define	vsoxseg5ei32_v_u16mf2(...) __riscv_vsoxseg5ei32_v_u16mf2(__VA_ARGS__)

#define	vsoxseg5ei32_v_u16mf2_m(...) __riscv_vsoxseg5ei32_v_u16mf2_m(__VA_ARGS__)

#define	vsoxseg5ei32_v_u16mf4(...) __riscv_vsoxseg5ei32_v_u16mf4(__VA_ARGS__)

#define	vsoxseg5ei32_v_u16mf4_m(...) __riscv_vsoxseg5ei32_v_u16mf4_m(__VA_ARGS__)

#define	vsoxseg5ei32_v_u32m1(...) __riscv_vsoxseg5ei32_v_u32m1(__VA_ARGS__)

#define	vsoxseg5ei32_v_u32m1_m(...) __riscv_vsoxseg5ei32_v_u32m1_m(__VA_ARGS__)

#define	vsoxseg5ei32_v_u32mf2(...) __riscv_vsoxseg5ei32_v_u32mf2(__VA_ARGS__)

#define	vsoxseg5ei32_v_u32mf2_m(...) __riscv_vsoxseg5ei32_v_u32mf2_m(__VA_ARGS__)

#define	vsoxseg5ei32_v_u64m1(...) __riscv_vsoxseg5ei32_v_u64m1(__VA_ARGS__)

#define	vsoxseg5ei32_v_u64m1_m(...) __riscv_vsoxseg5ei32_v_u64m1_m(__VA_ARGS__)

#define	vsoxseg5ei32_v_u8m1(...) __riscv_vsoxseg5ei32_v_u8m1(__VA_ARGS__)

#define	vsoxseg5ei32_v_u8m1_m(...) __riscv_vsoxseg5ei32_v_u8m1_m(__VA_ARGS__)

#define	vsoxseg5ei32_v_u8mf2(...) __riscv_vsoxseg5ei32_v_u8mf2(__VA_ARGS__)

#define	vsoxseg5ei32_v_u8mf2_m(...) __riscv_vsoxseg5ei32_v_u8mf2_m(__VA_ARGS__)

#define	vsoxseg5ei32_v_u8mf4(...) __riscv_vsoxseg5ei32_v_u8mf4(__VA_ARGS__)

#define	vsoxseg5ei32_v_u8mf4_m(...) __riscv_vsoxseg5ei32_v_u8mf4_m(__VA_ARGS__)

#define	vsoxseg5ei32_v_u8mf8(...) __riscv_vsoxseg5ei32_v_u8mf8(__VA_ARGS__)

#define	vsoxseg5ei32_v_u8mf8_m(...) __riscv_vsoxseg5ei32_v_u8mf8_m(__VA_ARGS__)

#define	vsoxseg5ei64_v_f16m1(...) __riscv_vsoxseg5ei64_v_f16m1(__VA_ARGS__)

#define	vsoxseg5ei64_v_f16m1_m(...) __riscv_vsoxseg5ei64_v_f16m1_m(__VA_ARGS__)

#define	vsoxseg5ei64_v_f16mf2(...) __riscv_vsoxseg5ei64_v_f16mf2(__VA_ARGS__)

#define	vsoxseg5ei64_v_f16mf2_m(...) __riscv_vsoxseg5ei64_v_f16mf2_m(__VA_ARGS__)

#define	vsoxseg5ei64_v_f16mf4(...) __riscv_vsoxseg5ei64_v_f16mf4(__VA_ARGS__)

#define	vsoxseg5ei64_v_f16mf4_m(...) __riscv_vsoxseg5ei64_v_f16mf4_m(__VA_ARGS__)

#define	vsoxseg5ei64_v_f32m1(...) __riscv_vsoxseg5ei64_v_f32m1(__VA_ARGS__)

#define	vsoxseg5ei64_v_f32m1_m(...) __riscv_vsoxseg5ei64_v_f32m1_m(__VA_ARGS__)

#define	vsoxseg5ei64_v_f32mf2(...) __riscv_vsoxseg5ei64_v_f32mf2(__VA_ARGS__)

#define	vsoxseg5ei64_v_f32mf2_m(...) __riscv_vsoxseg5ei64_v_f32mf2_m(__VA_ARGS__)

#define	vsoxseg5ei64_v_f64m1(...) __riscv_vsoxseg5ei64_v_f64m1(__VA_ARGS__)

#define	vsoxseg5ei64_v_f64m1_m(...) __riscv_vsoxseg5ei64_v_f64m1_m(__VA_ARGS__)

#define	vsoxseg5ei64_v_i16m1(...) __riscv_vsoxseg5ei64_v_i16m1(__VA_ARGS__)

#define	vsoxseg5ei64_v_i16m1_m(...) __riscv_vsoxseg5ei64_v_i16m1_m(__VA_ARGS__)

#define	vsoxseg5ei64_v_i16mf2(...) __riscv_vsoxseg5ei64_v_i16mf2(__VA_ARGS__)

#define	vsoxseg5ei64_v_i16mf2_m(...) __riscv_vsoxseg5ei64_v_i16mf2_m(__VA_ARGS__)

#define	vsoxseg5ei64_v_i16mf4(...) __riscv_vsoxseg5ei64_v_i16mf4(__VA_ARGS__)

#define	vsoxseg5ei64_v_i16mf4_m(...) __riscv_vsoxseg5ei64_v_i16mf4_m(__VA_ARGS__)

#define	vsoxseg5ei64_v_i32m1(...) __riscv_vsoxseg5ei64_v_i32m1(__VA_ARGS__)

#define	vsoxseg5ei64_v_i32m1_m(...) __riscv_vsoxseg5ei64_v_i32m1_m(__VA_ARGS__)

#define	vsoxseg5ei64_v_i32mf2(...) __riscv_vsoxseg5ei64_v_i32mf2(__VA_ARGS__)

#define	vsoxseg5ei64_v_i32mf2_m(...) __riscv_vsoxseg5ei64_v_i32mf2_m(__VA_ARGS__)

#define	vsoxseg5ei64_v_i64m1(...) __riscv_vsoxseg5ei64_v_i64m1(__VA_ARGS__)

#define	vsoxseg5ei64_v_i64m1_m(...) __riscv_vsoxseg5ei64_v_i64m1_m(__VA_ARGS__)

#define	vsoxseg5ei64_v_i8m1(...) __riscv_vsoxseg5ei64_v_i8m1(__VA_ARGS__)

#define	vsoxseg5ei64_v_i8m1_m(...) __riscv_vsoxseg5ei64_v_i8m1_m(__VA_ARGS__)

#define	vsoxseg5ei64_v_i8mf2(...) __riscv_vsoxseg5ei64_v_i8mf2(__VA_ARGS__)

#define	vsoxseg5ei64_v_i8mf2_m(...) __riscv_vsoxseg5ei64_v_i8mf2_m(__VA_ARGS__)

#define	vsoxseg5ei64_v_i8mf4(...) __riscv_vsoxseg5ei64_v_i8mf4(__VA_ARGS__)

#define	vsoxseg5ei64_v_i8mf4_m(...) __riscv_vsoxseg5ei64_v_i8mf4_m(__VA_ARGS__)

#define	vsoxseg5ei64_v_i8mf8(...) __riscv_vsoxseg5ei64_v_i8mf8(__VA_ARGS__)

#define	vsoxseg5ei64_v_i8mf8_m(...) __riscv_vsoxseg5ei64_v_i8mf8_m(__VA_ARGS__)

#define	vsoxseg5ei64_v_u16m1(...) __riscv_vsoxseg5ei64_v_u16m1(__VA_ARGS__)

#define	vsoxseg5ei64_v_u16m1_m(...) __riscv_vsoxseg5ei64_v_u16m1_m(__VA_ARGS__)

#define	vsoxseg5ei64_v_u16mf2(...) __riscv_vsoxseg5ei64_v_u16mf2(__VA_ARGS__)

#define	vsoxseg5ei64_v_u16mf2_m(...) __riscv_vsoxseg5ei64_v_u16mf2_m(__VA_ARGS__)

#define	vsoxseg5ei64_v_u16mf4(...) __riscv_vsoxseg5ei64_v_u16mf4(__VA_ARGS__)

#define	vsoxseg5ei64_v_u16mf4_m(...) __riscv_vsoxseg5ei64_v_u16mf4_m(__VA_ARGS__)

#define	vsoxseg5ei64_v_u32m1(...) __riscv_vsoxseg5ei64_v_u32m1(__VA_ARGS__)

#define	vsoxseg5ei64_v_u32m1_m(...) __riscv_vsoxseg5ei64_v_u32m1_m(__VA_ARGS__)

#define	vsoxseg5ei64_v_u32mf2(...) __riscv_vsoxseg5ei64_v_u32mf2(__VA_ARGS__)

#define	vsoxseg5ei64_v_u32mf2_m(...) __riscv_vsoxseg5ei64_v_u32mf2_m(__VA_ARGS__)

#define	vsoxseg5ei64_v_u64m1(...) __riscv_vsoxseg5ei64_v_u64m1(__VA_ARGS__)

#define	vsoxseg5ei64_v_u64m1_m(...) __riscv_vsoxseg5ei64_v_u64m1_m(__VA_ARGS__)

#define	vsoxseg5ei64_v_u8m1(...) __riscv_vsoxseg5ei64_v_u8m1(__VA_ARGS__)

#define	vsoxseg5ei64_v_u8m1_m(...) __riscv_vsoxseg5ei64_v_u8m1_m(__VA_ARGS__)

#define	vsoxseg5ei64_v_u8mf2(...) __riscv_vsoxseg5ei64_v_u8mf2(__VA_ARGS__)

#define	vsoxseg5ei64_v_u8mf2_m(...) __riscv_vsoxseg5ei64_v_u8mf2_m(__VA_ARGS__)

#define	vsoxseg5ei64_v_u8mf4(...) __riscv_vsoxseg5ei64_v_u8mf4(__VA_ARGS__)

#define	vsoxseg5ei64_v_u8mf4_m(...) __riscv_vsoxseg5ei64_v_u8mf4_m(__VA_ARGS__)

#define	vsoxseg5ei64_v_u8mf8(...) __riscv_vsoxseg5ei64_v_u8mf8(__VA_ARGS__)

#define	vsoxseg5ei64_v_u8mf8_m(...) __riscv_vsoxseg5ei64_v_u8mf8_m(__VA_ARGS__)

#define	vsoxseg5ei8_v_f16m1(...) __riscv_vsoxseg5ei8_v_f16m1(__VA_ARGS__)

#define	vsoxseg5ei8_v_f16m1_m(...) __riscv_vsoxseg5ei8_v_f16m1_m(__VA_ARGS__)

#define	vsoxseg5ei8_v_f16mf2(...) __riscv_vsoxseg5ei8_v_f16mf2(__VA_ARGS__)

#define	vsoxseg5ei8_v_f16mf2_m(...) __riscv_vsoxseg5ei8_v_f16mf2_m(__VA_ARGS__)

#define	vsoxseg5ei8_v_f16mf4(...) __riscv_vsoxseg5ei8_v_f16mf4(__VA_ARGS__)

#define	vsoxseg5ei8_v_f16mf4_m(...) __riscv_vsoxseg5ei8_v_f16mf4_m(__VA_ARGS__)

#define	vsoxseg5ei8_v_f32m1(...) __riscv_vsoxseg5ei8_v_f32m1(__VA_ARGS__)

#define	vsoxseg5ei8_v_f32m1_m(...) __riscv_vsoxseg5ei8_v_f32m1_m(__VA_ARGS__)

#define	vsoxseg5ei8_v_f32mf2(...) __riscv_vsoxseg5ei8_v_f32mf2(__VA_ARGS__)

#define	vsoxseg5ei8_v_f32mf2_m(...) __riscv_vsoxseg5ei8_v_f32mf2_m(__VA_ARGS__)

#define	vsoxseg5ei8_v_f64m1(...) __riscv_vsoxseg5ei8_v_f64m1(__VA_ARGS__)

#define	vsoxseg5ei8_v_f64m1_m(...) __riscv_vsoxseg5ei8_v_f64m1_m(__VA_ARGS__)

#define	vsoxseg5ei8_v_i16m1(...) __riscv_vsoxseg5ei8_v_i16m1(__VA_ARGS__)

#define	vsoxseg5ei8_v_i16m1_m(...) __riscv_vsoxseg5ei8_v_i16m1_m(__VA_ARGS__)

#define	vsoxseg5ei8_v_i16mf2(...) __riscv_vsoxseg5ei8_v_i16mf2(__VA_ARGS__)

#define	vsoxseg5ei8_v_i16mf2_m(...) __riscv_vsoxseg5ei8_v_i16mf2_m(__VA_ARGS__)

#define	vsoxseg5ei8_v_i16mf4(...) __riscv_vsoxseg5ei8_v_i16mf4(__VA_ARGS__)

#define	vsoxseg5ei8_v_i16mf4_m(...) __riscv_vsoxseg5ei8_v_i16mf4_m(__VA_ARGS__)

#define	vsoxseg5ei8_v_i32m1(...) __riscv_vsoxseg5ei8_v_i32m1(__VA_ARGS__)

#define	vsoxseg5ei8_v_i32m1_m(...) __riscv_vsoxseg5ei8_v_i32m1_m(__VA_ARGS__)

#define	vsoxseg5ei8_v_i32mf2(...) __riscv_vsoxseg5ei8_v_i32mf2(__VA_ARGS__)

#define	vsoxseg5ei8_v_i32mf2_m(...) __riscv_vsoxseg5ei8_v_i32mf2_m(__VA_ARGS__)

#define	vsoxseg5ei8_v_i64m1(...) __riscv_vsoxseg5ei8_v_i64m1(__VA_ARGS__)

#define	vsoxseg5ei8_v_i64m1_m(...) __riscv_vsoxseg5ei8_v_i64m1_m(__VA_ARGS__)

#define	vsoxseg5ei8_v_i8m1(...) __riscv_vsoxseg5ei8_v_i8m1(__VA_ARGS__)

#define	vsoxseg5ei8_v_i8m1_m(...) __riscv_vsoxseg5ei8_v_i8m1_m(__VA_ARGS__)

#define	vsoxseg5ei8_v_i8mf2(...) __riscv_vsoxseg5ei8_v_i8mf2(__VA_ARGS__)

#define	vsoxseg5ei8_v_i8mf2_m(...) __riscv_vsoxseg5ei8_v_i8mf2_m(__VA_ARGS__)

#define	vsoxseg5ei8_v_i8mf4(...) __riscv_vsoxseg5ei8_v_i8mf4(__VA_ARGS__)

#define	vsoxseg5ei8_v_i8mf4_m(...) __riscv_vsoxseg5ei8_v_i8mf4_m(__VA_ARGS__)

#define	vsoxseg5ei8_v_i8mf8(...) __riscv_vsoxseg5ei8_v_i8mf8(__VA_ARGS__)

#define	vsoxseg5ei8_v_i8mf8_m(...) __riscv_vsoxseg5ei8_v_i8mf8_m(__VA_ARGS__)

#define	vsoxseg5ei8_v_u16m1(...) __riscv_vsoxseg5ei8_v_u16m1(__VA_ARGS__)

#define	vsoxseg5ei8_v_u16m1_m(...) __riscv_vsoxseg5ei8_v_u16m1_m(__VA_ARGS__)

#define	vsoxseg5ei8_v_u16mf2(...) __riscv_vsoxseg5ei8_v_u16mf2(__VA_ARGS__)

#define	vsoxseg5ei8_v_u16mf2_m(...) __riscv_vsoxseg5ei8_v_u16mf2_m(__VA_ARGS__)

#define	vsoxseg5ei8_v_u16mf4(...) __riscv_vsoxseg5ei8_v_u16mf4(__VA_ARGS__)

#define	vsoxseg5ei8_v_u16mf4_m(...) __riscv_vsoxseg5ei8_v_u16mf4_m(__VA_ARGS__)

#define	vsoxseg5ei8_v_u32m1(...) __riscv_vsoxseg5ei8_v_u32m1(__VA_ARGS__)

#define	vsoxseg5ei8_v_u32m1_m(...) __riscv_vsoxseg5ei8_v_u32m1_m(__VA_ARGS__)

#define	vsoxseg5ei8_v_u32mf2(...) __riscv_vsoxseg5ei8_v_u32mf2(__VA_ARGS__)

#define	vsoxseg5ei8_v_u32mf2_m(...) __riscv_vsoxseg5ei8_v_u32mf2_m(__VA_ARGS__)

#define	vsoxseg5ei8_v_u64m1(...) __riscv_vsoxseg5ei8_v_u64m1(__VA_ARGS__)

#define	vsoxseg5ei8_v_u64m1_m(...) __riscv_vsoxseg5ei8_v_u64m1_m(__VA_ARGS__)

#define	vsoxseg5ei8_v_u8m1(...) __riscv_vsoxseg5ei8_v_u8m1(__VA_ARGS__)

#define	vsoxseg5ei8_v_u8m1_m(...) __riscv_vsoxseg5ei8_v_u8m1_m(__VA_ARGS__)

#define	vsoxseg5ei8_v_u8mf2(...) __riscv_vsoxseg5ei8_v_u8mf2(__VA_ARGS__)

#define	vsoxseg5ei8_v_u8mf2_m(...) __riscv_vsoxseg5ei8_v_u8mf2_m(__VA_ARGS__)

#define	vsoxseg5ei8_v_u8mf4(...) __riscv_vsoxseg5ei8_v_u8mf4(__VA_ARGS__)

#define	vsoxseg5ei8_v_u8mf4_m(...) __riscv_vsoxseg5ei8_v_u8mf4_m(__VA_ARGS__)

#define	vsoxseg5ei8_v_u8mf8(...) __riscv_vsoxseg5ei8_v_u8mf8(__VA_ARGS__)

#define	vsoxseg5ei8_v_u8mf8_m(...) __riscv_vsoxseg5ei8_v_u8mf8_m(__VA_ARGS__)

#define	vsoxseg6ei16_v_f16m1(...) __riscv_vsoxseg6ei16_v_f16m1(__VA_ARGS__)

#define	vsoxseg6ei16_v_f16m1_m(...) __riscv_vsoxseg6ei16_v_f16m1_m(__VA_ARGS__)

#define	vsoxseg6ei16_v_f16mf2(...) __riscv_vsoxseg6ei16_v_f16mf2(__VA_ARGS__)

#define	vsoxseg6ei16_v_f16mf2_m(...) __riscv_vsoxseg6ei16_v_f16mf2_m(__VA_ARGS__)

#define	vsoxseg6ei16_v_f16mf4(...) __riscv_vsoxseg6ei16_v_f16mf4(__VA_ARGS__)

#define	vsoxseg6ei16_v_f16mf4_m(...) __riscv_vsoxseg6ei16_v_f16mf4_m(__VA_ARGS__)

#define	vsoxseg6ei16_v_f32m1(...) __riscv_vsoxseg6ei16_v_f32m1(__VA_ARGS__)

#define	vsoxseg6ei16_v_f32m1_m(...) __riscv_vsoxseg6ei16_v_f32m1_m(__VA_ARGS__)

#define	vsoxseg6ei16_v_f32mf2(...) __riscv_vsoxseg6ei16_v_f32mf2(__VA_ARGS__)

#define	vsoxseg6ei16_v_f32mf2_m(...) __riscv_vsoxseg6ei16_v_f32mf2_m(__VA_ARGS__)

#define	vsoxseg6ei16_v_f64m1(...) __riscv_vsoxseg6ei16_v_f64m1(__VA_ARGS__)

#define	vsoxseg6ei16_v_f64m1_m(...) __riscv_vsoxseg6ei16_v_f64m1_m(__VA_ARGS__)

#define	vsoxseg6ei16_v_i16m1(...) __riscv_vsoxseg6ei16_v_i16m1(__VA_ARGS__)

#define	vsoxseg6ei16_v_i16m1_m(...) __riscv_vsoxseg6ei16_v_i16m1_m(__VA_ARGS__)

#define	vsoxseg6ei16_v_i16mf2(...) __riscv_vsoxseg6ei16_v_i16mf2(__VA_ARGS__)

#define	vsoxseg6ei16_v_i16mf2_m(...) __riscv_vsoxseg6ei16_v_i16mf2_m(__VA_ARGS__)

#define	vsoxseg6ei16_v_i16mf4(...) __riscv_vsoxseg6ei16_v_i16mf4(__VA_ARGS__)

#define	vsoxseg6ei16_v_i16mf4_m(...) __riscv_vsoxseg6ei16_v_i16mf4_m(__VA_ARGS__)

#define	vsoxseg6ei16_v_i32m1(...) __riscv_vsoxseg6ei16_v_i32m1(__VA_ARGS__)

#define	vsoxseg6ei16_v_i32m1_m(...) __riscv_vsoxseg6ei16_v_i32m1_m(__VA_ARGS__)

#define	vsoxseg6ei16_v_i32mf2(...) __riscv_vsoxseg6ei16_v_i32mf2(__VA_ARGS__)

#define	vsoxseg6ei16_v_i32mf2_m(...) __riscv_vsoxseg6ei16_v_i32mf2_m(__VA_ARGS__)

#define	vsoxseg6ei16_v_i64m1(...) __riscv_vsoxseg6ei16_v_i64m1(__VA_ARGS__)

#define	vsoxseg6ei16_v_i64m1_m(...) __riscv_vsoxseg6ei16_v_i64m1_m(__VA_ARGS__)

#define	vsoxseg6ei16_v_i8m1(...) __riscv_vsoxseg6ei16_v_i8m1(__VA_ARGS__)

#define	vsoxseg6ei16_v_i8m1_m(...) __riscv_vsoxseg6ei16_v_i8m1_m(__VA_ARGS__)

#define	vsoxseg6ei16_v_i8mf2(...) __riscv_vsoxseg6ei16_v_i8mf2(__VA_ARGS__)

#define	vsoxseg6ei16_v_i8mf2_m(...) __riscv_vsoxseg6ei16_v_i8mf2_m(__VA_ARGS__)

#define	vsoxseg6ei16_v_i8mf4(...) __riscv_vsoxseg6ei16_v_i8mf4(__VA_ARGS__)

#define	vsoxseg6ei16_v_i8mf4_m(...) __riscv_vsoxseg6ei16_v_i8mf4_m(__VA_ARGS__)

#define	vsoxseg6ei16_v_i8mf8(...) __riscv_vsoxseg6ei16_v_i8mf8(__VA_ARGS__)

#define	vsoxseg6ei16_v_i8mf8_m(...) __riscv_vsoxseg6ei16_v_i8mf8_m(__VA_ARGS__)

#define	vsoxseg6ei16_v_u16m1(...) __riscv_vsoxseg6ei16_v_u16m1(__VA_ARGS__)

#define	vsoxseg6ei16_v_u16m1_m(...) __riscv_vsoxseg6ei16_v_u16m1_m(__VA_ARGS__)

#define	vsoxseg6ei16_v_u16mf2(...) __riscv_vsoxseg6ei16_v_u16mf2(__VA_ARGS__)

#define	vsoxseg6ei16_v_u16mf2_m(...) __riscv_vsoxseg6ei16_v_u16mf2_m(__VA_ARGS__)

#define	vsoxseg6ei16_v_u16mf4(...) __riscv_vsoxseg6ei16_v_u16mf4(__VA_ARGS__)

#define	vsoxseg6ei16_v_u16mf4_m(...) __riscv_vsoxseg6ei16_v_u16mf4_m(__VA_ARGS__)

#define	vsoxseg6ei16_v_u32m1(...) __riscv_vsoxseg6ei16_v_u32m1(__VA_ARGS__)

#define	vsoxseg6ei16_v_u32m1_m(...) __riscv_vsoxseg6ei16_v_u32m1_m(__VA_ARGS__)

#define	vsoxseg6ei16_v_u32mf2(...) __riscv_vsoxseg6ei16_v_u32mf2(__VA_ARGS__)

#define	vsoxseg6ei16_v_u32mf2_m(...) __riscv_vsoxseg6ei16_v_u32mf2_m(__VA_ARGS__)

#define	vsoxseg6ei16_v_u64m1(...) __riscv_vsoxseg6ei16_v_u64m1(__VA_ARGS__)

#define	vsoxseg6ei16_v_u64m1_m(...) __riscv_vsoxseg6ei16_v_u64m1_m(__VA_ARGS__)

#define	vsoxseg6ei16_v_u8m1(...) __riscv_vsoxseg6ei16_v_u8m1(__VA_ARGS__)

#define	vsoxseg6ei16_v_u8m1_m(...) __riscv_vsoxseg6ei16_v_u8m1_m(__VA_ARGS__)

#define	vsoxseg6ei16_v_u8mf2(...) __riscv_vsoxseg6ei16_v_u8mf2(__VA_ARGS__)

#define	vsoxseg6ei16_v_u8mf2_m(...) __riscv_vsoxseg6ei16_v_u8mf2_m(__VA_ARGS__)

#define	vsoxseg6ei16_v_u8mf4(...) __riscv_vsoxseg6ei16_v_u8mf4(__VA_ARGS__)

#define	vsoxseg6ei16_v_u8mf4_m(...) __riscv_vsoxseg6ei16_v_u8mf4_m(__VA_ARGS__)

#define	vsoxseg6ei16_v_u8mf8(...) __riscv_vsoxseg6ei16_v_u8mf8(__VA_ARGS__)

#define	vsoxseg6ei16_v_u8mf8_m(...) __riscv_vsoxseg6ei16_v_u8mf8_m(__VA_ARGS__)

#define	vsoxseg6ei32_v_f16m1(...) __riscv_vsoxseg6ei32_v_f16m1(__VA_ARGS__)

#define	vsoxseg6ei32_v_f16m1_m(...) __riscv_vsoxseg6ei32_v_f16m1_m(__VA_ARGS__)

#define	vsoxseg6ei32_v_f16mf2(...) __riscv_vsoxseg6ei32_v_f16mf2(__VA_ARGS__)

#define	vsoxseg6ei32_v_f16mf2_m(...) __riscv_vsoxseg6ei32_v_f16mf2_m(__VA_ARGS__)

#define	vsoxseg6ei32_v_f16mf4(...) __riscv_vsoxseg6ei32_v_f16mf4(__VA_ARGS__)

#define	vsoxseg6ei32_v_f16mf4_m(...) __riscv_vsoxseg6ei32_v_f16mf4_m(__VA_ARGS__)

#define	vsoxseg6ei32_v_f32m1(...) __riscv_vsoxseg6ei32_v_f32m1(__VA_ARGS__)

#define	vsoxseg6ei32_v_f32m1_m(...) __riscv_vsoxseg6ei32_v_f32m1_m(__VA_ARGS__)

#define	vsoxseg6ei32_v_f32mf2(...) __riscv_vsoxseg6ei32_v_f32mf2(__VA_ARGS__)

#define	vsoxseg6ei32_v_f32mf2_m(...) __riscv_vsoxseg6ei32_v_f32mf2_m(__VA_ARGS__)

#define	vsoxseg6ei32_v_f64m1(...) __riscv_vsoxseg6ei32_v_f64m1(__VA_ARGS__)

#define	vsoxseg6ei32_v_f64m1_m(...) __riscv_vsoxseg6ei32_v_f64m1_m(__VA_ARGS__)

#define	vsoxseg6ei32_v_i16m1(...) __riscv_vsoxseg6ei32_v_i16m1(__VA_ARGS__)

#define	vsoxseg6ei32_v_i16m1_m(...) __riscv_vsoxseg6ei32_v_i16m1_m(__VA_ARGS__)

#define	vsoxseg6ei32_v_i16mf2(...) __riscv_vsoxseg6ei32_v_i16mf2(__VA_ARGS__)

#define	vsoxseg6ei32_v_i16mf2_m(...) __riscv_vsoxseg6ei32_v_i16mf2_m(__VA_ARGS__)

#define	vsoxseg6ei32_v_i16mf4(...) __riscv_vsoxseg6ei32_v_i16mf4(__VA_ARGS__)

#define	vsoxseg6ei32_v_i16mf4_m(...) __riscv_vsoxseg6ei32_v_i16mf4_m(__VA_ARGS__)

#define	vsoxseg6ei32_v_i32m1(...) __riscv_vsoxseg6ei32_v_i32m1(__VA_ARGS__)

#define	vsoxseg6ei32_v_i32m1_m(...) __riscv_vsoxseg6ei32_v_i32m1_m(__VA_ARGS__)

#define	vsoxseg6ei32_v_i32mf2(...) __riscv_vsoxseg6ei32_v_i32mf2(__VA_ARGS__)

#define	vsoxseg6ei32_v_i32mf2_m(...) __riscv_vsoxseg6ei32_v_i32mf2_m(__VA_ARGS__)

#define	vsoxseg6ei32_v_i64m1(...) __riscv_vsoxseg6ei32_v_i64m1(__VA_ARGS__)

#define	vsoxseg6ei32_v_i64m1_m(...) __riscv_vsoxseg6ei32_v_i64m1_m(__VA_ARGS__)

#define	vsoxseg6ei32_v_i8m1(...) __riscv_vsoxseg6ei32_v_i8m1(__VA_ARGS__)

#define	vsoxseg6ei32_v_i8m1_m(...) __riscv_vsoxseg6ei32_v_i8m1_m(__VA_ARGS__)

#define	vsoxseg6ei32_v_i8mf2(...) __riscv_vsoxseg6ei32_v_i8mf2(__VA_ARGS__)

#define	vsoxseg6ei32_v_i8mf2_m(...) __riscv_vsoxseg6ei32_v_i8mf2_m(__VA_ARGS__)

#define	vsoxseg6ei32_v_i8mf4(...) __riscv_vsoxseg6ei32_v_i8mf4(__VA_ARGS__)

#define	vsoxseg6ei32_v_i8mf4_m(...) __riscv_vsoxseg6ei32_v_i8mf4_m(__VA_ARGS__)

#define	vsoxseg6ei32_v_i8mf8(...) __riscv_vsoxseg6ei32_v_i8mf8(__VA_ARGS__)

#define	vsoxseg6ei32_v_i8mf8_m(...) __riscv_vsoxseg6ei32_v_i8mf8_m(__VA_ARGS__)

#define	vsoxseg6ei32_v_u16m1(...) __riscv_vsoxseg6ei32_v_u16m1(__VA_ARGS__)

#define	vsoxseg6ei32_v_u16m1_m(...) __riscv_vsoxseg6ei32_v_u16m1_m(__VA_ARGS__)

#define	vsoxseg6ei32_v_u16mf2(...) __riscv_vsoxseg6ei32_v_u16mf2(__VA_ARGS__)

#define	vsoxseg6ei32_v_u16mf2_m(...) __riscv_vsoxseg6ei32_v_u16mf2_m(__VA_ARGS__)

#define	vsoxseg6ei32_v_u16mf4(...) __riscv_vsoxseg6ei32_v_u16mf4(__VA_ARGS__)

#define	vsoxseg6ei32_v_u16mf4_m(...) __riscv_vsoxseg6ei32_v_u16mf4_m(__VA_ARGS__)

#define	vsoxseg6ei32_v_u32m1(...) __riscv_vsoxseg6ei32_v_u32m1(__VA_ARGS__)

#define	vsoxseg6ei32_v_u32m1_m(...) __riscv_vsoxseg6ei32_v_u32m1_m(__VA_ARGS__)

#define	vsoxseg6ei32_v_u32mf2(...) __riscv_vsoxseg6ei32_v_u32mf2(__VA_ARGS__)

#define	vsoxseg6ei32_v_u32mf2_m(...) __riscv_vsoxseg6ei32_v_u32mf2_m(__VA_ARGS__)

#define	vsoxseg6ei32_v_u64m1(...) __riscv_vsoxseg6ei32_v_u64m1(__VA_ARGS__)

#define	vsoxseg6ei32_v_u64m1_m(...) __riscv_vsoxseg6ei32_v_u64m1_m(__VA_ARGS__)

#define	vsoxseg6ei32_v_u8m1(...) __riscv_vsoxseg6ei32_v_u8m1(__VA_ARGS__)

#define	vsoxseg6ei32_v_u8m1_m(...) __riscv_vsoxseg6ei32_v_u8m1_m(__VA_ARGS__)

#define	vsoxseg6ei32_v_u8mf2(...) __riscv_vsoxseg6ei32_v_u8mf2(__VA_ARGS__)

#define	vsoxseg6ei32_v_u8mf2_m(...) __riscv_vsoxseg6ei32_v_u8mf2_m(__VA_ARGS__)

#define	vsoxseg6ei32_v_u8mf4(...) __riscv_vsoxseg6ei32_v_u8mf4(__VA_ARGS__)

#define	vsoxseg6ei32_v_u8mf4_m(...) __riscv_vsoxseg6ei32_v_u8mf4_m(__VA_ARGS__)

#define	vsoxseg6ei32_v_u8mf8(...) __riscv_vsoxseg6ei32_v_u8mf8(__VA_ARGS__)

#define	vsoxseg6ei32_v_u8mf8_m(...) __riscv_vsoxseg6ei32_v_u8mf8_m(__VA_ARGS__)

#define	vsoxseg6ei64_v_f16m1(...) __riscv_vsoxseg6ei64_v_f16m1(__VA_ARGS__)

#define	vsoxseg6ei64_v_f16m1_m(...) __riscv_vsoxseg6ei64_v_f16m1_m(__VA_ARGS__)

#define	vsoxseg6ei64_v_f16mf2(...) __riscv_vsoxseg6ei64_v_f16mf2(__VA_ARGS__)

#define	vsoxseg6ei64_v_f16mf2_m(...) __riscv_vsoxseg6ei64_v_f16mf2_m(__VA_ARGS__)

#define	vsoxseg6ei64_v_f16mf4(...) __riscv_vsoxseg6ei64_v_f16mf4(__VA_ARGS__)

#define	vsoxseg6ei64_v_f16mf4_m(...) __riscv_vsoxseg6ei64_v_f16mf4_m(__VA_ARGS__)

#define	vsoxseg6ei64_v_f32m1(...) __riscv_vsoxseg6ei64_v_f32m1(__VA_ARGS__)

#define	vsoxseg6ei64_v_f32m1_m(...) __riscv_vsoxseg6ei64_v_f32m1_m(__VA_ARGS__)

#define	vsoxseg6ei64_v_f32mf2(...) __riscv_vsoxseg6ei64_v_f32mf2(__VA_ARGS__)

#define	vsoxseg6ei64_v_f32mf2_m(...) __riscv_vsoxseg6ei64_v_f32mf2_m(__VA_ARGS__)

#define	vsoxseg6ei64_v_f64m1(...) __riscv_vsoxseg6ei64_v_f64m1(__VA_ARGS__)

#define	vsoxseg6ei64_v_f64m1_m(...) __riscv_vsoxseg6ei64_v_f64m1_m(__VA_ARGS__)

#define	vsoxseg6ei64_v_i16m1(...) __riscv_vsoxseg6ei64_v_i16m1(__VA_ARGS__)

#define	vsoxseg6ei64_v_i16m1_m(...) __riscv_vsoxseg6ei64_v_i16m1_m(__VA_ARGS__)

#define	vsoxseg6ei64_v_i16mf2(...) __riscv_vsoxseg6ei64_v_i16mf2(__VA_ARGS__)

#define	vsoxseg6ei64_v_i16mf2_m(...) __riscv_vsoxseg6ei64_v_i16mf2_m(__VA_ARGS__)

#define	vsoxseg6ei64_v_i16mf4(...) __riscv_vsoxseg6ei64_v_i16mf4(__VA_ARGS__)

#define	vsoxseg6ei64_v_i16mf4_m(...) __riscv_vsoxseg6ei64_v_i16mf4_m(__VA_ARGS__)

#define	vsoxseg6ei64_v_i32m1(...) __riscv_vsoxseg6ei64_v_i32m1(__VA_ARGS__)

#define	vsoxseg6ei64_v_i32m1_m(...) __riscv_vsoxseg6ei64_v_i32m1_m(__VA_ARGS__)

#define	vsoxseg6ei64_v_i32mf2(...) __riscv_vsoxseg6ei64_v_i32mf2(__VA_ARGS__)

#define	vsoxseg6ei64_v_i32mf2_m(...) __riscv_vsoxseg6ei64_v_i32mf2_m(__VA_ARGS__)

#define	vsoxseg6ei64_v_i64m1(...) __riscv_vsoxseg6ei64_v_i64m1(__VA_ARGS__)

#define	vsoxseg6ei64_v_i64m1_m(...) __riscv_vsoxseg6ei64_v_i64m1_m(__VA_ARGS__)

#define	vsoxseg6ei64_v_i8m1(...) __riscv_vsoxseg6ei64_v_i8m1(__VA_ARGS__)

#define	vsoxseg6ei64_v_i8m1_m(...) __riscv_vsoxseg6ei64_v_i8m1_m(__VA_ARGS__)

#define	vsoxseg6ei64_v_i8mf2(...) __riscv_vsoxseg6ei64_v_i8mf2(__VA_ARGS__)

#define	vsoxseg6ei64_v_i8mf2_m(...) __riscv_vsoxseg6ei64_v_i8mf2_m(__VA_ARGS__)

#define	vsoxseg6ei64_v_i8mf4(...) __riscv_vsoxseg6ei64_v_i8mf4(__VA_ARGS__)

#define	vsoxseg6ei64_v_i8mf4_m(...) __riscv_vsoxseg6ei64_v_i8mf4_m(__VA_ARGS__)

#define	vsoxseg6ei64_v_i8mf8(...) __riscv_vsoxseg6ei64_v_i8mf8(__VA_ARGS__)

#define	vsoxseg6ei64_v_i8mf8_m(...) __riscv_vsoxseg6ei64_v_i8mf8_m(__VA_ARGS__)

#define	vsoxseg6ei64_v_u16m1(...) __riscv_vsoxseg6ei64_v_u16m1(__VA_ARGS__)

#define	vsoxseg6ei64_v_u16m1_m(...) __riscv_vsoxseg6ei64_v_u16m1_m(__VA_ARGS__)

#define	vsoxseg6ei64_v_u16mf2(...) __riscv_vsoxseg6ei64_v_u16mf2(__VA_ARGS__)

#define	vsoxseg6ei64_v_u16mf2_m(...) __riscv_vsoxseg6ei64_v_u16mf2_m(__VA_ARGS__)

#define	vsoxseg6ei64_v_u16mf4(...) __riscv_vsoxseg6ei64_v_u16mf4(__VA_ARGS__)

#define	vsoxseg6ei64_v_u16mf4_m(...) __riscv_vsoxseg6ei64_v_u16mf4_m(__VA_ARGS__)

#define	vsoxseg6ei64_v_u32m1(...) __riscv_vsoxseg6ei64_v_u32m1(__VA_ARGS__)

#define	vsoxseg6ei64_v_u32m1_m(...) __riscv_vsoxseg6ei64_v_u32m1_m(__VA_ARGS__)

#define	vsoxseg6ei64_v_u32mf2(...) __riscv_vsoxseg6ei64_v_u32mf2(__VA_ARGS__)

#define	vsoxseg6ei64_v_u32mf2_m(...) __riscv_vsoxseg6ei64_v_u32mf2_m(__VA_ARGS__)

#define	vsoxseg6ei64_v_u64m1(...) __riscv_vsoxseg6ei64_v_u64m1(__VA_ARGS__)

#define	vsoxseg6ei64_v_u64m1_m(...) __riscv_vsoxseg6ei64_v_u64m1_m(__VA_ARGS__)

#define	vsoxseg6ei64_v_u8m1(...) __riscv_vsoxseg6ei64_v_u8m1(__VA_ARGS__)

#define	vsoxseg6ei64_v_u8m1_m(...) __riscv_vsoxseg6ei64_v_u8m1_m(__VA_ARGS__)

#define	vsoxseg6ei64_v_u8mf2(...) __riscv_vsoxseg6ei64_v_u8mf2(__VA_ARGS__)

#define	vsoxseg6ei64_v_u8mf2_m(...) __riscv_vsoxseg6ei64_v_u8mf2_m(__VA_ARGS__)

#define	vsoxseg6ei64_v_u8mf4(...) __riscv_vsoxseg6ei64_v_u8mf4(__VA_ARGS__)

#define	vsoxseg6ei64_v_u8mf4_m(...) __riscv_vsoxseg6ei64_v_u8mf4_m(__VA_ARGS__)

#define	vsoxseg6ei64_v_u8mf8(...) __riscv_vsoxseg6ei64_v_u8mf8(__VA_ARGS__)

#define	vsoxseg6ei64_v_u8mf8_m(...) __riscv_vsoxseg6ei64_v_u8mf8_m(__VA_ARGS__)

#define	vsoxseg6ei8_v_f16m1(...) __riscv_vsoxseg6ei8_v_f16m1(__VA_ARGS__)

#define	vsoxseg6ei8_v_f16m1_m(...) __riscv_vsoxseg6ei8_v_f16m1_m(__VA_ARGS__)

#define	vsoxseg6ei8_v_f16mf2(...) __riscv_vsoxseg6ei8_v_f16mf2(__VA_ARGS__)

#define	vsoxseg6ei8_v_f16mf2_m(...) __riscv_vsoxseg6ei8_v_f16mf2_m(__VA_ARGS__)

#define	vsoxseg6ei8_v_f16mf4(...) __riscv_vsoxseg6ei8_v_f16mf4(__VA_ARGS__)

#define	vsoxseg6ei8_v_f16mf4_m(...) __riscv_vsoxseg6ei8_v_f16mf4_m(__VA_ARGS__)

#define	vsoxseg6ei8_v_f32m1(...) __riscv_vsoxseg6ei8_v_f32m1(__VA_ARGS__)

#define	vsoxseg6ei8_v_f32m1_m(...) __riscv_vsoxseg6ei8_v_f32m1_m(__VA_ARGS__)

#define	vsoxseg6ei8_v_f32mf2(...) __riscv_vsoxseg6ei8_v_f32mf2(__VA_ARGS__)

#define	vsoxseg6ei8_v_f32mf2_m(...) __riscv_vsoxseg6ei8_v_f32mf2_m(__VA_ARGS__)

#define	vsoxseg6ei8_v_f64m1(...) __riscv_vsoxseg6ei8_v_f64m1(__VA_ARGS__)

#define	vsoxseg6ei8_v_f64m1_m(...) __riscv_vsoxseg6ei8_v_f64m1_m(__VA_ARGS__)

#define	vsoxseg6ei8_v_i16m1(...) __riscv_vsoxseg6ei8_v_i16m1(__VA_ARGS__)

#define	vsoxseg6ei8_v_i16m1_m(...) __riscv_vsoxseg6ei8_v_i16m1_m(__VA_ARGS__)

#define	vsoxseg6ei8_v_i16mf2(...) __riscv_vsoxseg6ei8_v_i16mf2(__VA_ARGS__)

#define	vsoxseg6ei8_v_i16mf2_m(...) __riscv_vsoxseg6ei8_v_i16mf2_m(__VA_ARGS__)

#define	vsoxseg6ei8_v_i16mf4(...) __riscv_vsoxseg6ei8_v_i16mf4(__VA_ARGS__)

#define	vsoxseg6ei8_v_i16mf4_m(...) __riscv_vsoxseg6ei8_v_i16mf4_m(__VA_ARGS__)

#define	vsoxseg6ei8_v_i32m1(...) __riscv_vsoxseg6ei8_v_i32m1(__VA_ARGS__)

#define	vsoxseg6ei8_v_i32m1_m(...) __riscv_vsoxseg6ei8_v_i32m1_m(__VA_ARGS__)

#define	vsoxseg6ei8_v_i32mf2(...) __riscv_vsoxseg6ei8_v_i32mf2(__VA_ARGS__)

#define	vsoxseg6ei8_v_i32mf2_m(...) __riscv_vsoxseg6ei8_v_i32mf2_m(__VA_ARGS__)

#define	vsoxseg6ei8_v_i64m1(...) __riscv_vsoxseg6ei8_v_i64m1(__VA_ARGS__)

#define	vsoxseg6ei8_v_i64m1_m(...) __riscv_vsoxseg6ei8_v_i64m1_m(__VA_ARGS__)

#define	vsoxseg6ei8_v_i8m1(...) __riscv_vsoxseg6ei8_v_i8m1(__VA_ARGS__)

#define	vsoxseg6ei8_v_i8m1_m(...) __riscv_vsoxseg6ei8_v_i8m1_m(__VA_ARGS__)

#define	vsoxseg6ei8_v_i8mf2(...) __riscv_vsoxseg6ei8_v_i8mf2(__VA_ARGS__)

#define	vsoxseg6ei8_v_i8mf2_m(...) __riscv_vsoxseg6ei8_v_i8mf2_m(__VA_ARGS__)

#define	vsoxseg6ei8_v_i8mf4(...) __riscv_vsoxseg6ei8_v_i8mf4(__VA_ARGS__)

#define	vsoxseg6ei8_v_i8mf4_m(...) __riscv_vsoxseg6ei8_v_i8mf4_m(__VA_ARGS__)

#define	vsoxseg6ei8_v_i8mf8(...) __riscv_vsoxseg6ei8_v_i8mf8(__VA_ARGS__)

#define	vsoxseg6ei8_v_i8mf8_m(...) __riscv_vsoxseg6ei8_v_i8mf8_m(__VA_ARGS__)

#define	vsoxseg6ei8_v_u16m1(...) __riscv_vsoxseg6ei8_v_u16m1(__VA_ARGS__)

#define	vsoxseg6ei8_v_u16m1_m(...) __riscv_vsoxseg6ei8_v_u16m1_m(__VA_ARGS__)

#define	vsoxseg6ei8_v_u16mf2(...) __riscv_vsoxseg6ei8_v_u16mf2(__VA_ARGS__)

#define	vsoxseg6ei8_v_u16mf2_m(...) __riscv_vsoxseg6ei8_v_u16mf2_m(__VA_ARGS__)

#define	vsoxseg6ei8_v_u16mf4(...) __riscv_vsoxseg6ei8_v_u16mf4(__VA_ARGS__)

#define	vsoxseg6ei8_v_u16mf4_m(...) __riscv_vsoxseg6ei8_v_u16mf4_m(__VA_ARGS__)

#define	vsoxseg6ei8_v_u32m1(...) __riscv_vsoxseg6ei8_v_u32m1(__VA_ARGS__)

#define	vsoxseg6ei8_v_u32m1_m(...) __riscv_vsoxseg6ei8_v_u32m1_m(__VA_ARGS__)

#define	vsoxseg6ei8_v_u32mf2(...) __riscv_vsoxseg6ei8_v_u32mf2(__VA_ARGS__)

#define	vsoxseg6ei8_v_u32mf2_m(...) __riscv_vsoxseg6ei8_v_u32mf2_m(__VA_ARGS__)

#define	vsoxseg6ei8_v_u64m1(...) __riscv_vsoxseg6ei8_v_u64m1(__VA_ARGS__)

#define	vsoxseg6ei8_v_u64m1_m(...) __riscv_vsoxseg6ei8_v_u64m1_m(__VA_ARGS__)

#define	vsoxseg6ei8_v_u8m1(...) __riscv_vsoxseg6ei8_v_u8m1(__VA_ARGS__)

#define	vsoxseg6ei8_v_u8m1_m(...) __riscv_vsoxseg6ei8_v_u8m1_m(__VA_ARGS__)

#define	vsoxseg6ei8_v_u8mf2(...) __riscv_vsoxseg6ei8_v_u8mf2(__VA_ARGS__)

#define	vsoxseg6ei8_v_u8mf2_m(...) __riscv_vsoxseg6ei8_v_u8mf2_m(__VA_ARGS__)

#define	vsoxseg6ei8_v_u8mf4(...) __riscv_vsoxseg6ei8_v_u8mf4(__VA_ARGS__)

#define	vsoxseg6ei8_v_u8mf4_m(...) __riscv_vsoxseg6ei8_v_u8mf4_m(__VA_ARGS__)

#define	vsoxseg6ei8_v_u8mf8(...) __riscv_vsoxseg6ei8_v_u8mf8(__VA_ARGS__)

#define	vsoxseg6ei8_v_u8mf8_m(...) __riscv_vsoxseg6ei8_v_u8mf8_m(__VA_ARGS__)

#define	vsoxseg7ei16_v_f16m1(...) __riscv_vsoxseg7ei16_v_f16m1(__VA_ARGS__)

#define	vsoxseg7ei16_v_f16m1_m(...) __riscv_vsoxseg7ei16_v_f16m1_m(__VA_ARGS__)

#define	vsoxseg7ei16_v_f16mf2(...) __riscv_vsoxseg7ei16_v_f16mf2(__VA_ARGS__)

#define	vsoxseg7ei16_v_f16mf2_m(...) __riscv_vsoxseg7ei16_v_f16mf2_m(__VA_ARGS__)

#define	vsoxseg7ei16_v_f16mf4(...) __riscv_vsoxseg7ei16_v_f16mf4(__VA_ARGS__)

#define	vsoxseg7ei16_v_f16mf4_m(...) __riscv_vsoxseg7ei16_v_f16mf4_m(__VA_ARGS__)

#define	vsoxseg7ei16_v_f32m1(...) __riscv_vsoxseg7ei16_v_f32m1(__VA_ARGS__)

#define	vsoxseg7ei16_v_f32m1_m(...) __riscv_vsoxseg7ei16_v_f32m1_m(__VA_ARGS__)

#define	vsoxseg7ei16_v_f32mf2(...) __riscv_vsoxseg7ei16_v_f32mf2(__VA_ARGS__)

#define	vsoxseg7ei16_v_f32mf2_m(...) __riscv_vsoxseg7ei16_v_f32mf2_m(__VA_ARGS__)

#define	vsoxseg7ei16_v_f64m1(...) __riscv_vsoxseg7ei16_v_f64m1(__VA_ARGS__)

#define	vsoxseg7ei16_v_f64m1_m(...) __riscv_vsoxseg7ei16_v_f64m1_m(__VA_ARGS__)

#define	vsoxseg7ei16_v_i16m1(...) __riscv_vsoxseg7ei16_v_i16m1(__VA_ARGS__)

#define	vsoxseg7ei16_v_i16m1_m(...) __riscv_vsoxseg7ei16_v_i16m1_m(__VA_ARGS__)

#define	vsoxseg7ei16_v_i16mf2(...) __riscv_vsoxseg7ei16_v_i16mf2(__VA_ARGS__)

#define	vsoxseg7ei16_v_i16mf2_m(...) __riscv_vsoxseg7ei16_v_i16mf2_m(__VA_ARGS__)

#define	vsoxseg7ei16_v_i16mf4(...) __riscv_vsoxseg7ei16_v_i16mf4(__VA_ARGS__)

#define	vsoxseg7ei16_v_i16mf4_m(...) __riscv_vsoxseg7ei16_v_i16mf4_m(__VA_ARGS__)

#define	vsoxseg7ei16_v_i32m1(...) __riscv_vsoxseg7ei16_v_i32m1(__VA_ARGS__)

#define	vsoxseg7ei16_v_i32m1_m(...) __riscv_vsoxseg7ei16_v_i32m1_m(__VA_ARGS__)

#define	vsoxseg7ei16_v_i32mf2(...) __riscv_vsoxseg7ei16_v_i32mf2(__VA_ARGS__)

#define	vsoxseg7ei16_v_i32mf2_m(...) __riscv_vsoxseg7ei16_v_i32mf2_m(__VA_ARGS__)

#define	vsoxseg7ei16_v_i64m1(...) __riscv_vsoxseg7ei16_v_i64m1(__VA_ARGS__)

#define	vsoxseg7ei16_v_i64m1_m(...) __riscv_vsoxseg7ei16_v_i64m1_m(__VA_ARGS__)

#define	vsoxseg7ei16_v_i8m1(...) __riscv_vsoxseg7ei16_v_i8m1(__VA_ARGS__)

#define	vsoxseg7ei16_v_i8m1_m(...) __riscv_vsoxseg7ei16_v_i8m1_m(__VA_ARGS__)

#define	vsoxseg7ei16_v_i8mf2(...) __riscv_vsoxseg7ei16_v_i8mf2(__VA_ARGS__)

#define	vsoxseg7ei16_v_i8mf2_m(...) __riscv_vsoxseg7ei16_v_i8mf2_m(__VA_ARGS__)

#define	vsoxseg7ei16_v_i8mf4(...) __riscv_vsoxseg7ei16_v_i8mf4(__VA_ARGS__)

#define	vsoxseg7ei16_v_i8mf4_m(...) __riscv_vsoxseg7ei16_v_i8mf4_m(__VA_ARGS__)

#define	vsoxseg7ei16_v_i8mf8(...) __riscv_vsoxseg7ei16_v_i8mf8(__VA_ARGS__)

#define	vsoxseg7ei16_v_i8mf8_m(...) __riscv_vsoxseg7ei16_v_i8mf8_m(__VA_ARGS__)

#define	vsoxseg7ei16_v_u16m1(...) __riscv_vsoxseg7ei16_v_u16m1(__VA_ARGS__)

#define	vsoxseg7ei16_v_u16m1_m(...) __riscv_vsoxseg7ei16_v_u16m1_m(__VA_ARGS__)

#define	vsoxseg7ei16_v_u16mf2(...) __riscv_vsoxseg7ei16_v_u16mf2(__VA_ARGS__)

#define	vsoxseg7ei16_v_u16mf2_m(...) __riscv_vsoxseg7ei16_v_u16mf2_m(__VA_ARGS__)

#define	vsoxseg7ei16_v_u16mf4(...) __riscv_vsoxseg7ei16_v_u16mf4(__VA_ARGS__)

#define	vsoxseg7ei16_v_u16mf4_m(...) __riscv_vsoxseg7ei16_v_u16mf4_m(__VA_ARGS__)

#define	vsoxseg7ei16_v_u32m1(...) __riscv_vsoxseg7ei16_v_u32m1(__VA_ARGS__)

#define	vsoxseg7ei16_v_u32m1_m(...) __riscv_vsoxseg7ei16_v_u32m1_m(__VA_ARGS__)

#define	vsoxseg7ei16_v_u32mf2(...) __riscv_vsoxseg7ei16_v_u32mf2(__VA_ARGS__)

#define	vsoxseg7ei16_v_u32mf2_m(...) __riscv_vsoxseg7ei16_v_u32mf2_m(__VA_ARGS__)

#define	vsoxseg7ei16_v_u64m1(...) __riscv_vsoxseg7ei16_v_u64m1(__VA_ARGS__)

#define	vsoxseg7ei16_v_u64m1_m(...) __riscv_vsoxseg7ei16_v_u64m1_m(__VA_ARGS__)

#define	vsoxseg7ei16_v_u8m1(...) __riscv_vsoxseg7ei16_v_u8m1(__VA_ARGS__)

#define	vsoxseg7ei16_v_u8m1_m(...) __riscv_vsoxseg7ei16_v_u8m1_m(__VA_ARGS__)

#define	vsoxseg7ei16_v_u8mf2(...) __riscv_vsoxseg7ei16_v_u8mf2(__VA_ARGS__)

#define	vsoxseg7ei16_v_u8mf2_m(...) __riscv_vsoxseg7ei16_v_u8mf2_m(__VA_ARGS__)

#define	vsoxseg7ei16_v_u8mf4(...) __riscv_vsoxseg7ei16_v_u8mf4(__VA_ARGS__)

#define	vsoxseg7ei16_v_u8mf4_m(...) __riscv_vsoxseg7ei16_v_u8mf4_m(__VA_ARGS__)

#define	vsoxseg7ei16_v_u8mf8(...) __riscv_vsoxseg7ei16_v_u8mf8(__VA_ARGS__)

#define	vsoxseg7ei16_v_u8mf8_m(...) __riscv_vsoxseg7ei16_v_u8mf8_m(__VA_ARGS__)

#define	vsoxseg7ei32_v_f16m1(...) __riscv_vsoxseg7ei32_v_f16m1(__VA_ARGS__)

#define	vsoxseg7ei32_v_f16m1_m(...) __riscv_vsoxseg7ei32_v_f16m1_m(__VA_ARGS__)

#define	vsoxseg7ei32_v_f16mf2(...) __riscv_vsoxseg7ei32_v_f16mf2(__VA_ARGS__)

#define	vsoxseg7ei32_v_f16mf2_m(...) __riscv_vsoxseg7ei32_v_f16mf2_m(__VA_ARGS__)

#define	vsoxseg7ei32_v_f16mf4(...) __riscv_vsoxseg7ei32_v_f16mf4(__VA_ARGS__)

#define	vsoxseg7ei32_v_f16mf4_m(...) __riscv_vsoxseg7ei32_v_f16mf4_m(__VA_ARGS__)

#define	vsoxseg7ei32_v_f32m1(...) __riscv_vsoxseg7ei32_v_f32m1(__VA_ARGS__)

#define	vsoxseg7ei32_v_f32m1_m(...) __riscv_vsoxseg7ei32_v_f32m1_m(__VA_ARGS__)

#define	vsoxseg7ei32_v_f32mf2(...) __riscv_vsoxseg7ei32_v_f32mf2(__VA_ARGS__)

#define	vsoxseg7ei32_v_f32mf2_m(...) __riscv_vsoxseg7ei32_v_f32mf2_m(__VA_ARGS__)

#define	vsoxseg7ei32_v_f64m1(...) __riscv_vsoxseg7ei32_v_f64m1(__VA_ARGS__)

#define	vsoxseg7ei32_v_f64m1_m(...) __riscv_vsoxseg7ei32_v_f64m1_m(__VA_ARGS__)

#define	vsoxseg7ei32_v_i16m1(...) __riscv_vsoxseg7ei32_v_i16m1(__VA_ARGS__)

#define	vsoxseg7ei32_v_i16m1_m(...) __riscv_vsoxseg7ei32_v_i16m1_m(__VA_ARGS__)

#define	vsoxseg7ei32_v_i16mf2(...) __riscv_vsoxseg7ei32_v_i16mf2(__VA_ARGS__)

#define	vsoxseg7ei32_v_i16mf2_m(...) __riscv_vsoxseg7ei32_v_i16mf2_m(__VA_ARGS__)

#define	vsoxseg7ei32_v_i16mf4(...) __riscv_vsoxseg7ei32_v_i16mf4(__VA_ARGS__)

#define	vsoxseg7ei32_v_i16mf4_m(...) __riscv_vsoxseg7ei32_v_i16mf4_m(__VA_ARGS__)

#define	vsoxseg7ei32_v_i32m1(...) __riscv_vsoxseg7ei32_v_i32m1(__VA_ARGS__)

#define	vsoxseg7ei32_v_i32m1_m(...) __riscv_vsoxseg7ei32_v_i32m1_m(__VA_ARGS__)

#define	vsoxseg7ei32_v_i32mf2(...) __riscv_vsoxseg7ei32_v_i32mf2(__VA_ARGS__)

#define	vsoxseg7ei32_v_i32mf2_m(...) __riscv_vsoxseg7ei32_v_i32mf2_m(__VA_ARGS__)

#define	vsoxseg7ei32_v_i64m1(...) __riscv_vsoxseg7ei32_v_i64m1(__VA_ARGS__)

#define	vsoxseg7ei32_v_i64m1_m(...) __riscv_vsoxseg7ei32_v_i64m1_m(__VA_ARGS__)

#define	vsoxseg7ei32_v_i8m1(...) __riscv_vsoxseg7ei32_v_i8m1(__VA_ARGS__)

#define	vsoxseg7ei32_v_i8m1_m(...) __riscv_vsoxseg7ei32_v_i8m1_m(__VA_ARGS__)

#define	vsoxseg7ei32_v_i8mf2(...) __riscv_vsoxseg7ei32_v_i8mf2(__VA_ARGS__)

#define	vsoxseg7ei32_v_i8mf2_m(...) __riscv_vsoxseg7ei32_v_i8mf2_m(__VA_ARGS__)

#define	vsoxseg7ei32_v_i8mf4(...) __riscv_vsoxseg7ei32_v_i8mf4(__VA_ARGS__)

#define	vsoxseg7ei32_v_i8mf4_m(...) __riscv_vsoxseg7ei32_v_i8mf4_m(__VA_ARGS__)

#define	vsoxseg7ei32_v_i8mf8(...) __riscv_vsoxseg7ei32_v_i8mf8(__VA_ARGS__)

#define	vsoxseg7ei32_v_i8mf8_m(...) __riscv_vsoxseg7ei32_v_i8mf8_m(__VA_ARGS__)

#define	vsoxseg7ei32_v_u16m1(...) __riscv_vsoxseg7ei32_v_u16m1(__VA_ARGS__)

#define	vsoxseg7ei32_v_u16m1_m(...) __riscv_vsoxseg7ei32_v_u16m1_m(__VA_ARGS__)

#define	vsoxseg7ei32_v_u16mf2(...) __riscv_vsoxseg7ei32_v_u16mf2(__VA_ARGS__)

#define	vsoxseg7ei32_v_u16mf2_m(...) __riscv_vsoxseg7ei32_v_u16mf2_m(__VA_ARGS__)

#define	vsoxseg7ei32_v_u16mf4(...) __riscv_vsoxseg7ei32_v_u16mf4(__VA_ARGS__)

#define	vsoxseg7ei32_v_u16mf4_m(...) __riscv_vsoxseg7ei32_v_u16mf4_m(__VA_ARGS__)

#define	vsoxseg7ei32_v_u32m1(...) __riscv_vsoxseg7ei32_v_u32m1(__VA_ARGS__)

#define	vsoxseg7ei32_v_u32m1_m(...) __riscv_vsoxseg7ei32_v_u32m1_m(__VA_ARGS__)

#define	vsoxseg7ei32_v_u32mf2(...) __riscv_vsoxseg7ei32_v_u32mf2(__VA_ARGS__)

#define	vsoxseg7ei32_v_u32mf2_m(...) __riscv_vsoxseg7ei32_v_u32mf2_m(__VA_ARGS__)

#define	vsoxseg7ei32_v_u64m1(...) __riscv_vsoxseg7ei32_v_u64m1(__VA_ARGS__)

#define	vsoxseg7ei32_v_u64m1_m(...) __riscv_vsoxseg7ei32_v_u64m1_m(__VA_ARGS__)

#define	vsoxseg7ei32_v_u8m1(...) __riscv_vsoxseg7ei32_v_u8m1(__VA_ARGS__)

#define	vsoxseg7ei32_v_u8m1_m(...) __riscv_vsoxseg7ei32_v_u8m1_m(__VA_ARGS__)

#define	vsoxseg7ei32_v_u8mf2(...) __riscv_vsoxseg7ei32_v_u8mf2(__VA_ARGS__)

#define	vsoxseg7ei32_v_u8mf2_m(...) __riscv_vsoxseg7ei32_v_u8mf2_m(__VA_ARGS__)

#define	vsoxseg7ei32_v_u8mf4(...) __riscv_vsoxseg7ei32_v_u8mf4(__VA_ARGS__)

#define	vsoxseg7ei32_v_u8mf4_m(...) __riscv_vsoxseg7ei32_v_u8mf4_m(__VA_ARGS__)

#define	vsoxseg7ei32_v_u8mf8(...) __riscv_vsoxseg7ei32_v_u8mf8(__VA_ARGS__)

#define	vsoxseg7ei32_v_u8mf8_m(...) __riscv_vsoxseg7ei32_v_u8mf8_m(__VA_ARGS__)

#define	vsoxseg7ei64_v_f16m1(...) __riscv_vsoxseg7ei64_v_f16m1(__VA_ARGS__)

#define	vsoxseg7ei64_v_f16m1_m(...) __riscv_vsoxseg7ei64_v_f16m1_m(__VA_ARGS__)

#define	vsoxseg7ei64_v_f16mf2(...) __riscv_vsoxseg7ei64_v_f16mf2(__VA_ARGS__)

#define	vsoxseg7ei64_v_f16mf2_m(...) __riscv_vsoxseg7ei64_v_f16mf2_m(__VA_ARGS__)

#define	vsoxseg7ei64_v_f16mf4(...) __riscv_vsoxseg7ei64_v_f16mf4(__VA_ARGS__)

#define	vsoxseg7ei64_v_f16mf4_m(...) __riscv_vsoxseg7ei64_v_f16mf4_m(__VA_ARGS__)

#define	vsoxseg7ei64_v_f32m1(...) __riscv_vsoxseg7ei64_v_f32m1(__VA_ARGS__)

#define	vsoxseg7ei64_v_f32m1_m(...) __riscv_vsoxseg7ei64_v_f32m1_m(__VA_ARGS__)

#define	vsoxseg7ei64_v_f32mf2(...) __riscv_vsoxseg7ei64_v_f32mf2(__VA_ARGS__)

#define	vsoxseg7ei64_v_f32mf2_m(...) __riscv_vsoxseg7ei64_v_f32mf2_m(__VA_ARGS__)

#define	vsoxseg7ei64_v_f64m1(...) __riscv_vsoxseg7ei64_v_f64m1(__VA_ARGS__)

#define	vsoxseg7ei64_v_f64m1_m(...) __riscv_vsoxseg7ei64_v_f64m1_m(__VA_ARGS__)

#define	vsoxseg7ei64_v_i16m1(...) __riscv_vsoxseg7ei64_v_i16m1(__VA_ARGS__)

#define	vsoxseg7ei64_v_i16m1_m(...) __riscv_vsoxseg7ei64_v_i16m1_m(__VA_ARGS__)

#define	vsoxseg7ei64_v_i16mf2(...) __riscv_vsoxseg7ei64_v_i16mf2(__VA_ARGS__)

#define	vsoxseg7ei64_v_i16mf2_m(...) __riscv_vsoxseg7ei64_v_i16mf2_m(__VA_ARGS__)

#define	vsoxseg7ei64_v_i16mf4(...) __riscv_vsoxseg7ei64_v_i16mf4(__VA_ARGS__)

#define	vsoxseg7ei64_v_i16mf4_m(...) __riscv_vsoxseg7ei64_v_i16mf4_m(__VA_ARGS__)

#define	vsoxseg7ei64_v_i32m1(...) __riscv_vsoxseg7ei64_v_i32m1(__VA_ARGS__)

#define	vsoxseg7ei64_v_i32m1_m(...) __riscv_vsoxseg7ei64_v_i32m1_m(__VA_ARGS__)

#define	vsoxseg7ei64_v_i32mf2(...) __riscv_vsoxseg7ei64_v_i32mf2(__VA_ARGS__)

#define	vsoxseg7ei64_v_i32mf2_m(...) __riscv_vsoxseg7ei64_v_i32mf2_m(__VA_ARGS__)

#define	vsoxseg7ei64_v_i64m1(...) __riscv_vsoxseg7ei64_v_i64m1(__VA_ARGS__)

#define	vsoxseg7ei64_v_i64m1_m(...) __riscv_vsoxseg7ei64_v_i64m1_m(__VA_ARGS__)

#define	vsoxseg7ei64_v_i8m1(...) __riscv_vsoxseg7ei64_v_i8m1(__VA_ARGS__)

#define	vsoxseg7ei64_v_i8m1_m(...) __riscv_vsoxseg7ei64_v_i8m1_m(__VA_ARGS__)

#define	vsoxseg7ei64_v_i8mf2(...) __riscv_vsoxseg7ei64_v_i8mf2(__VA_ARGS__)

#define	vsoxseg7ei64_v_i8mf2_m(...) __riscv_vsoxseg7ei64_v_i8mf2_m(__VA_ARGS__)

#define	vsoxseg7ei64_v_i8mf4(...) __riscv_vsoxseg7ei64_v_i8mf4(__VA_ARGS__)

#define	vsoxseg7ei64_v_i8mf4_m(...) __riscv_vsoxseg7ei64_v_i8mf4_m(__VA_ARGS__)

#define	vsoxseg7ei64_v_i8mf8(...) __riscv_vsoxseg7ei64_v_i8mf8(__VA_ARGS__)

#define	vsoxseg7ei64_v_i8mf8_m(...) __riscv_vsoxseg7ei64_v_i8mf8_m(__VA_ARGS__)

#define	vsoxseg7ei64_v_u16m1(...) __riscv_vsoxseg7ei64_v_u16m1(__VA_ARGS__)

#define	vsoxseg7ei64_v_u16m1_m(...) __riscv_vsoxseg7ei64_v_u16m1_m(__VA_ARGS__)

#define	vsoxseg7ei64_v_u16mf2(...) __riscv_vsoxseg7ei64_v_u16mf2(__VA_ARGS__)

#define	vsoxseg7ei64_v_u16mf2_m(...) __riscv_vsoxseg7ei64_v_u16mf2_m(__VA_ARGS__)

#define	vsoxseg7ei64_v_u16mf4(...) __riscv_vsoxseg7ei64_v_u16mf4(__VA_ARGS__)

#define	vsoxseg7ei64_v_u16mf4_m(...) __riscv_vsoxseg7ei64_v_u16mf4_m(__VA_ARGS__)

#define	vsoxseg7ei64_v_u32m1(...) __riscv_vsoxseg7ei64_v_u32m1(__VA_ARGS__)

#define	vsoxseg7ei64_v_u32m1_m(...) __riscv_vsoxseg7ei64_v_u32m1_m(__VA_ARGS__)

#define	vsoxseg7ei64_v_u32mf2(...) __riscv_vsoxseg7ei64_v_u32mf2(__VA_ARGS__)

#define	vsoxseg7ei64_v_u32mf2_m(...) __riscv_vsoxseg7ei64_v_u32mf2_m(__VA_ARGS__)

#define	vsoxseg7ei64_v_u64m1(...) __riscv_vsoxseg7ei64_v_u64m1(__VA_ARGS__)

#define	vsoxseg7ei64_v_u64m1_m(...) __riscv_vsoxseg7ei64_v_u64m1_m(__VA_ARGS__)

#define	vsoxseg7ei64_v_u8m1(...) __riscv_vsoxseg7ei64_v_u8m1(__VA_ARGS__)

#define	vsoxseg7ei64_v_u8m1_m(...) __riscv_vsoxseg7ei64_v_u8m1_m(__VA_ARGS__)

#define	vsoxseg7ei64_v_u8mf2(...) __riscv_vsoxseg7ei64_v_u8mf2(__VA_ARGS__)

#define	vsoxseg7ei64_v_u8mf2_m(...) __riscv_vsoxseg7ei64_v_u8mf2_m(__VA_ARGS__)

#define	vsoxseg7ei64_v_u8mf4(...) __riscv_vsoxseg7ei64_v_u8mf4(__VA_ARGS__)

#define	vsoxseg7ei64_v_u8mf4_m(...) __riscv_vsoxseg7ei64_v_u8mf4_m(__VA_ARGS__)

#define	vsoxseg7ei64_v_u8mf8(...) __riscv_vsoxseg7ei64_v_u8mf8(__VA_ARGS__)

#define	vsoxseg7ei64_v_u8mf8_m(...) __riscv_vsoxseg7ei64_v_u8mf8_m(__VA_ARGS__)

#define	vsoxseg7ei8_v_f16m1(...) __riscv_vsoxseg7ei8_v_f16m1(__VA_ARGS__)

#define	vsoxseg7ei8_v_f16m1_m(...) __riscv_vsoxseg7ei8_v_f16m1_m(__VA_ARGS__)

#define	vsoxseg7ei8_v_f16mf2(...) __riscv_vsoxseg7ei8_v_f16mf2(__VA_ARGS__)

#define	vsoxseg7ei8_v_f16mf2_m(...) __riscv_vsoxseg7ei8_v_f16mf2_m(__VA_ARGS__)

#define	vsoxseg7ei8_v_f16mf4(...) __riscv_vsoxseg7ei8_v_f16mf4(__VA_ARGS__)

#define	vsoxseg7ei8_v_f16mf4_m(...) __riscv_vsoxseg7ei8_v_f16mf4_m(__VA_ARGS__)

#define	vsoxseg7ei8_v_f32m1(...) __riscv_vsoxseg7ei8_v_f32m1(__VA_ARGS__)

#define	vsoxseg7ei8_v_f32m1_m(...) __riscv_vsoxseg7ei8_v_f32m1_m(__VA_ARGS__)

#define	vsoxseg7ei8_v_f32mf2(...) __riscv_vsoxseg7ei8_v_f32mf2(__VA_ARGS__)

#define	vsoxseg7ei8_v_f32mf2_m(...) __riscv_vsoxseg7ei8_v_f32mf2_m(__VA_ARGS__)

#define	vsoxseg7ei8_v_f64m1(...) __riscv_vsoxseg7ei8_v_f64m1(__VA_ARGS__)

#define	vsoxseg7ei8_v_f64m1_m(...) __riscv_vsoxseg7ei8_v_f64m1_m(__VA_ARGS__)

#define	vsoxseg7ei8_v_i16m1(...) __riscv_vsoxseg7ei8_v_i16m1(__VA_ARGS__)

#define	vsoxseg7ei8_v_i16m1_m(...) __riscv_vsoxseg7ei8_v_i16m1_m(__VA_ARGS__)

#define	vsoxseg7ei8_v_i16mf2(...) __riscv_vsoxseg7ei8_v_i16mf2(__VA_ARGS__)

#define	vsoxseg7ei8_v_i16mf2_m(...) __riscv_vsoxseg7ei8_v_i16mf2_m(__VA_ARGS__)

#define	vsoxseg7ei8_v_i16mf4(...) __riscv_vsoxseg7ei8_v_i16mf4(__VA_ARGS__)

#define	vsoxseg7ei8_v_i16mf4_m(...) __riscv_vsoxseg7ei8_v_i16mf4_m(__VA_ARGS__)

#define	vsoxseg7ei8_v_i32m1(...) __riscv_vsoxseg7ei8_v_i32m1(__VA_ARGS__)

#define	vsoxseg7ei8_v_i32m1_m(...) __riscv_vsoxseg7ei8_v_i32m1_m(__VA_ARGS__)

#define	vsoxseg7ei8_v_i32mf2(...) __riscv_vsoxseg7ei8_v_i32mf2(__VA_ARGS__)

#define	vsoxseg7ei8_v_i32mf2_m(...) __riscv_vsoxseg7ei8_v_i32mf2_m(__VA_ARGS__)

#define	vsoxseg7ei8_v_i64m1(...) __riscv_vsoxseg7ei8_v_i64m1(__VA_ARGS__)

#define	vsoxseg7ei8_v_i64m1_m(...) __riscv_vsoxseg7ei8_v_i64m1_m(__VA_ARGS__)

#define	vsoxseg7ei8_v_i8m1(...) __riscv_vsoxseg7ei8_v_i8m1(__VA_ARGS__)

#define	vsoxseg7ei8_v_i8m1_m(...) __riscv_vsoxseg7ei8_v_i8m1_m(__VA_ARGS__)

#define	vsoxseg7ei8_v_i8mf2(...) __riscv_vsoxseg7ei8_v_i8mf2(__VA_ARGS__)

#define	vsoxseg7ei8_v_i8mf2_m(...) __riscv_vsoxseg7ei8_v_i8mf2_m(__VA_ARGS__)

#define	vsoxseg7ei8_v_i8mf4(...) __riscv_vsoxseg7ei8_v_i8mf4(__VA_ARGS__)

#define	vsoxseg7ei8_v_i8mf4_m(...) __riscv_vsoxseg7ei8_v_i8mf4_m(__VA_ARGS__)

#define	vsoxseg7ei8_v_i8mf8(...) __riscv_vsoxseg7ei8_v_i8mf8(__VA_ARGS__)

#define	vsoxseg7ei8_v_i8mf8_m(...) __riscv_vsoxseg7ei8_v_i8mf8_m(__VA_ARGS__)

#define	vsoxseg7ei8_v_u16m1(...) __riscv_vsoxseg7ei8_v_u16m1(__VA_ARGS__)

#define	vsoxseg7ei8_v_u16m1_m(...) __riscv_vsoxseg7ei8_v_u16m1_m(__VA_ARGS__)

#define	vsoxseg7ei8_v_u16mf2(...) __riscv_vsoxseg7ei8_v_u16mf2(__VA_ARGS__)

#define	vsoxseg7ei8_v_u16mf2_m(...) __riscv_vsoxseg7ei8_v_u16mf2_m(__VA_ARGS__)

#define	vsoxseg7ei8_v_u16mf4(...) __riscv_vsoxseg7ei8_v_u16mf4(__VA_ARGS__)

#define	vsoxseg7ei8_v_u16mf4_m(...) __riscv_vsoxseg7ei8_v_u16mf4_m(__VA_ARGS__)

#define	vsoxseg7ei8_v_u32m1(...) __riscv_vsoxseg7ei8_v_u32m1(__VA_ARGS__)

#define	vsoxseg7ei8_v_u32m1_m(...) __riscv_vsoxseg7ei8_v_u32m1_m(__VA_ARGS__)

#define	vsoxseg7ei8_v_u32mf2(...) __riscv_vsoxseg7ei8_v_u32mf2(__VA_ARGS__)

#define	vsoxseg7ei8_v_u32mf2_m(...) __riscv_vsoxseg7ei8_v_u32mf2_m(__VA_ARGS__)

#define	vsoxseg7ei8_v_u64m1(...) __riscv_vsoxseg7ei8_v_u64m1(__VA_ARGS__)

#define	vsoxseg7ei8_v_u64m1_m(...) __riscv_vsoxseg7ei8_v_u64m1_m(__VA_ARGS__)

#define	vsoxseg7ei8_v_u8m1(...) __riscv_vsoxseg7ei8_v_u8m1(__VA_ARGS__)

#define	vsoxseg7ei8_v_u8m1_m(...) __riscv_vsoxseg7ei8_v_u8m1_m(__VA_ARGS__)

#define	vsoxseg7ei8_v_u8mf2(...) __riscv_vsoxseg7ei8_v_u8mf2(__VA_ARGS__)

#define	vsoxseg7ei8_v_u8mf2_m(...) __riscv_vsoxseg7ei8_v_u8mf2_m(__VA_ARGS__)

#define	vsoxseg7ei8_v_u8mf4(...) __riscv_vsoxseg7ei8_v_u8mf4(__VA_ARGS__)

#define	vsoxseg7ei8_v_u8mf4_m(...) __riscv_vsoxseg7ei8_v_u8mf4_m(__VA_ARGS__)

#define	vsoxseg7ei8_v_u8mf8(...) __riscv_vsoxseg7ei8_v_u8mf8(__VA_ARGS__)

#define	vsoxseg7ei8_v_u8mf8_m(...) __riscv_vsoxseg7ei8_v_u8mf8_m(__VA_ARGS__)

#define	vsoxseg8ei16_v_f16m1(...) __riscv_vsoxseg8ei16_v_f16m1(__VA_ARGS__)

#define	vsoxseg8ei16_v_f16m1_m(...) __riscv_vsoxseg8ei16_v_f16m1_m(__VA_ARGS__)

#define	vsoxseg8ei16_v_f16mf2(...) __riscv_vsoxseg8ei16_v_f16mf2(__VA_ARGS__)

#define	vsoxseg8ei16_v_f16mf2_m(...) __riscv_vsoxseg8ei16_v_f16mf2_m(__VA_ARGS__)

#define	vsoxseg8ei16_v_f16mf4(...) __riscv_vsoxseg8ei16_v_f16mf4(__VA_ARGS__)

#define	vsoxseg8ei16_v_f16mf4_m(...) __riscv_vsoxseg8ei16_v_f16mf4_m(__VA_ARGS__)

#define	vsoxseg8ei16_v_f32m1(...) __riscv_vsoxseg8ei16_v_f32m1(__VA_ARGS__)

#define	vsoxseg8ei16_v_f32m1_m(...) __riscv_vsoxseg8ei16_v_f32m1_m(__VA_ARGS__)

#define	vsoxseg8ei16_v_f32mf2(...) __riscv_vsoxseg8ei16_v_f32mf2(__VA_ARGS__)

#define	vsoxseg8ei16_v_f32mf2_m(...) __riscv_vsoxseg8ei16_v_f32mf2_m(__VA_ARGS__)

#define	vsoxseg8ei16_v_f64m1(...) __riscv_vsoxseg8ei16_v_f64m1(__VA_ARGS__)

#define	vsoxseg8ei16_v_f64m1_m(...) __riscv_vsoxseg8ei16_v_f64m1_m(__VA_ARGS__)

#define	vsoxseg8ei16_v_i16m1(...) __riscv_vsoxseg8ei16_v_i16m1(__VA_ARGS__)

#define	vsoxseg8ei16_v_i16m1_m(...) __riscv_vsoxseg8ei16_v_i16m1_m(__VA_ARGS__)

#define	vsoxseg8ei16_v_i16mf2(...) __riscv_vsoxseg8ei16_v_i16mf2(__VA_ARGS__)

#define	vsoxseg8ei16_v_i16mf2_m(...) __riscv_vsoxseg8ei16_v_i16mf2_m(__VA_ARGS__)

#define	vsoxseg8ei16_v_i16mf4(...) __riscv_vsoxseg8ei16_v_i16mf4(__VA_ARGS__)

#define	vsoxseg8ei16_v_i16mf4_m(...) __riscv_vsoxseg8ei16_v_i16mf4_m(__VA_ARGS__)

#define	vsoxseg8ei16_v_i32m1(...) __riscv_vsoxseg8ei16_v_i32m1(__VA_ARGS__)

#define	vsoxseg8ei16_v_i32m1_m(...) __riscv_vsoxseg8ei16_v_i32m1_m(__VA_ARGS__)

#define	vsoxseg8ei16_v_i32mf2(...) __riscv_vsoxseg8ei16_v_i32mf2(__VA_ARGS__)

#define	vsoxseg8ei16_v_i32mf2_m(...) __riscv_vsoxseg8ei16_v_i32mf2_m(__VA_ARGS__)

#define	vsoxseg8ei16_v_i64m1(...) __riscv_vsoxseg8ei16_v_i64m1(__VA_ARGS__)

#define	vsoxseg8ei16_v_i64m1_m(...) __riscv_vsoxseg8ei16_v_i64m1_m(__VA_ARGS__)

#define	vsoxseg8ei16_v_i8m1(...) __riscv_vsoxseg8ei16_v_i8m1(__VA_ARGS__)

#define	vsoxseg8ei16_v_i8m1_m(...) __riscv_vsoxseg8ei16_v_i8m1_m(__VA_ARGS__)

#define	vsoxseg8ei16_v_i8mf2(...) __riscv_vsoxseg8ei16_v_i8mf2(__VA_ARGS__)

#define	vsoxseg8ei16_v_i8mf2_m(...) __riscv_vsoxseg8ei16_v_i8mf2_m(__VA_ARGS__)

#define	vsoxseg8ei16_v_i8mf4(...) __riscv_vsoxseg8ei16_v_i8mf4(__VA_ARGS__)

#define	vsoxseg8ei16_v_i8mf4_m(...) __riscv_vsoxseg8ei16_v_i8mf4_m(__VA_ARGS__)

#define	vsoxseg8ei16_v_i8mf8(...) __riscv_vsoxseg8ei16_v_i8mf8(__VA_ARGS__)

#define	vsoxseg8ei16_v_i8mf8_m(...) __riscv_vsoxseg8ei16_v_i8mf8_m(__VA_ARGS__)

#define	vsoxseg8ei16_v_u16m1(...) __riscv_vsoxseg8ei16_v_u16m1(__VA_ARGS__)

#define	vsoxseg8ei16_v_u16m1_m(...) __riscv_vsoxseg8ei16_v_u16m1_m(__VA_ARGS__)

#define	vsoxseg8ei16_v_u16mf2(...) __riscv_vsoxseg8ei16_v_u16mf2(__VA_ARGS__)

#define	vsoxseg8ei16_v_u16mf2_m(...) __riscv_vsoxseg8ei16_v_u16mf2_m(__VA_ARGS__)

#define	vsoxseg8ei16_v_u16mf4(...) __riscv_vsoxseg8ei16_v_u16mf4(__VA_ARGS__)

#define	vsoxseg8ei16_v_u16mf4_m(...) __riscv_vsoxseg8ei16_v_u16mf4_m(__VA_ARGS__)

#define	vsoxseg8ei16_v_u32m1(...) __riscv_vsoxseg8ei16_v_u32m1(__VA_ARGS__)

#define	vsoxseg8ei16_v_u32m1_m(...) __riscv_vsoxseg8ei16_v_u32m1_m(__VA_ARGS__)

#define	vsoxseg8ei16_v_u32mf2(...) __riscv_vsoxseg8ei16_v_u32mf2(__VA_ARGS__)

#define	vsoxseg8ei16_v_u32mf2_m(...) __riscv_vsoxseg8ei16_v_u32mf2_m(__VA_ARGS__)

#define	vsoxseg8ei16_v_u64m1(...) __riscv_vsoxseg8ei16_v_u64m1(__VA_ARGS__)

#define	vsoxseg8ei16_v_u64m1_m(...) __riscv_vsoxseg8ei16_v_u64m1_m(__VA_ARGS__)

#define	vsoxseg8ei16_v_u8m1(...) __riscv_vsoxseg8ei16_v_u8m1(__VA_ARGS__)

#define	vsoxseg8ei16_v_u8m1_m(...) __riscv_vsoxseg8ei16_v_u8m1_m(__VA_ARGS__)

#define	vsoxseg8ei16_v_u8mf2(...) __riscv_vsoxseg8ei16_v_u8mf2(__VA_ARGS__)

#define	vsoxseg8ei16_v_u8mf2_m(...) __riscv_vsoxseg8ei16_v_u8mf2_m(__VA_ARGS__)

#define	vsoxseg8ei16_v_u8mf4(...) __riscv_vsoxseg8ei16_v_u8mf4(__VA_ARGS__)

#define	vsoxseg8ei16_v_u8mf4_m(...) __riscv_vsoxseg8ei16_v_u8mf4_m(__VA_ARGS__)

#define	vsoxseg8ei16_v_u8mf8(...) __riscv_vsoxseg8ei16_v_u8mf8(__VA_ARGS__)

#define	vsoxseg8ei16_v_u8mf8_m(...) __riscv_vsoxseg8ei16_v_u8mf8_m(__VA_ARGS__)

#define	vsoxseg8ei32_v_f16m1(...) __riscv_vsoxseg8ei32_v_f16m1(__VA_ARGS__)

#define	vsoxseg8ei32_v_f16m1_m(...) __riscv_vsoxseg8ei32_v_f16m1_m(__VA_ARGS__)

#define	vsoxseg8ei32_v_f16mf2(...) __riscv_vsoxseg8ei32_v_f16mf2(__VA_ARGS__)

#define	vsoxseg8ei32_v_f16mf2_m(...) __riscv_vsoxseg8ei32_v_f16mf2_m(__VA_ARGS__)

#define	vsoxseg8ei32_v_f16mf4(...) __riscv_vsoxseg8ei32_v_f16mf4(__VA_ARGS__)

#define	vsoxseg8ei32_v_f16mf4_m(...) __riscv_vsoxseg8ei32_v_f16mf4_m(__VA_ARGS__)

#define	vsoxseg8ei32_v_f32m1(...) __riscv_vsoxseg8ei32_v_f32m1(__VA_ARGS__)

#define	vsoxseg8ei32_v_f32m1_m(...) __riscv_vsoxseg8ei32_v_f32m1_m(__VA_ARGS__)

#define	vsoxseg8ei32_v_f32mf2(...) __riscv_vsoxseg8ei32_v_f32mf2(__VA_ARGS__)

#define	vsoxseg8ei32_v_f32mf2_m(...) __riscv_vsoxseg8ei32_v_f32mf2_m(__VA_ARGS__)

#define	vsoxseg8ei32_v_f64m1(...) __riscv_vsoxseg8ei32_v_f64m1(__VA_ARGS__)

#define	vsoxseg8ei32_v_f64m1_m(...) __riscv_vsoxseg8ei32_v_f64m1_m(__VA_ARGS__)

#define	vsoxseg8ei32_v_i16m1(...) __riscv_vsoxseg8ei32_v_i16m1(__VA_ARGS__)

#define	vsoxseg8ei32_v_i16m1_m(...) __riscv_vsoxseg8ei32_v_i16m1_m(__VA_ARGS__)

#define	vsoxseg8ei32_v_i16mf2(...) __riscv_vsoxseg8ei32_v_i16mf2(__VA_ARGS__)

#define	vsoxseg8ei32_v_i16mf2_m(...) __riscv_vsoxseg8ei32_v_i16mf2_m(__VA_ARGS__)

#define	vsoxseg8ei32_v_i16mf4(...) __riscv_vsoxseg8ei32_v_i16mf4(__VA_ARGS__)

#define	vsoxseg8ei32_v_i16mf4_m(...) __riscv_vsoxseg8ei32_v_i16mf4_m(__VA_ARGS__)

#define	vsoxseg8ei32_v_i32m1(...) __riscv_vsoxseg8ei32_v_i32m1(__VA_ARGS__)

#define	vsoxseg8ei32_v_i32m1_m(...) __riscv_vsoxseg8ei32_v_i32m1_m(__VA_ARGS__)

#define	vsoxseg8ei32_v_i32mf2(...) __riscv_vsoxseg8ei32_v_i32mf2(__VA_ARGS__)

#define	vsoxseg8ei32_v_i32mf2_m(...) __riscv_vsoxseg8ei32_v_i32mf2_m(__VA_ARGS__)

#define	vsoxseg8ei32_v_i64m1(...) __riscv_vsoxseg8ei32_v_i64m1(__VA_ARGS__)

#define	vsoxseg8ei32_v_i64m1_m(...) __riscv_vsoxseg8ei32_v_i64m1_m(__VA_ARGS__)

#define	vsoxseg8ei32_v_i8m1(...) __riscv_vsoxseg8ei32_v_i8m1(__VA_ARGS__)

#define	vsoxseg8ei32_v_i8m1_m(...) __riscv_vsoxseg8ei32_v_i8m1_m(__VA_ARGS__)

#define	vsoxseg8ei32_v_i8mf2(...) __riscv_vsoxseg8ei32_v_i8mf2(__VA_ARGS__)

#define	vsoxseg8ei32_v_i8mf2_m(...) __riscv_vsoxseg8ei32_v_i8mf2_m(__VA_ARGS__)

#define	vsoxseg8ei32_v_i8mf4(...) __riscv_vsoxseg8ei32_v_i8mf4(__VA_ARGS__)

#define	vsoxseg8ei32_v_i8mf4_m(...) __riscv_vsoxseg8ei32_v_i8mf4_m(__VA_ARGS__)

#define	vsoxseg8ei32_v_i8mf8(...) __riscv_vsoxseg8ei32_v_i8mf8(__VA_ARGS__)

#define	vsoxseg8ei32_v_i8mf8_m(...) __riscv_vsoxseg8ei32_v_i8mf8_m(__VA_ARGS__)

#define	vsoxseg8ei32_v_u16m1(...) __riscv_vsoxseg8ei32_v_u16m1(__VA_ARGS__)

#define	vsoxseg8ei32_v_u16m1_m(...) __riscv_vsoxseg8ei32_v_u16m1_m(__VA_ARGS__)

#define	vsoxseg8ei32_v_u16mf2(...) __riscv_vsoxseg8ei32_v_u16mf2(__VA_ARGS__)

#define	vsoxseg8ei32_v_u16mf2_m(...) __riscv_vsoxseg8ei32_v_u16mf2_m(__VA_ARGS__)

#define	vsoxseg8ei32_v_u16mf4(...) __riscv_vsoxseg8ei32_v_u16mf4(__VA_ARGS__)

#define	vsoxseg8ei32_v_u16mf4_m(...) __riscv_vsoxseg8ei32_v_u16mf4_m(__VA_ARGS__)

#define	vsoxseg8ei32_v_u32m1(...) __riscv_vsoxseg8ei32_v_u32m1(__VA_ARGS__)

#define	vsoxseg8ei32_v_u32m1_m(...) __riscv_vsoxseg8ei32_v_u32m1_m(__VA_ARGS__)

#define	vsoxseg8ei32_v_u32mf2(...) __riscv_vsoxseg8ei32_v_u32mf2(__VA_ARGS__)

#define	vsoxseg8ei32_v_u32mf2_m(...) __riscv_vsoxseg8ei32_v_u32mf2_m(__VA_ARGS__)

#define	vsoxseg8ei32_v_u64m1(...) __riscv_vsoxseg8ei32_v_u64m1(__VA_ARGS__)

#define	vsoxseg8ei32_v_u64m1_m(...) __riscv_vsoxseg8ei32_v_u64m1_m(__VA_ARGS__)

#define	vsoxseg8ei32_v_u8m1(...) __riscv_vsoxseg8ei32_v_u8m1(__VA_ARGS__)

#define	vsoxseg8ei32_v_u8m1_m(...) __riscv_vsoxseg8ei32_v_u8m1_m(__VA_ARGS__)

#define	vsoxseg8ei32_v_u8mf2(...) __riscv_vsoxseg8ei32_v_u8mf2(__VA_ARGS__)

#define	vsoxseg8ei32_v_u8mf2_m(...) __riscv_vsoxseg8ei32_v_u8mf2_m(__VA_ARGS__)

#define	vsoxseg8ei32_v_u8mf4(...) __riscv_vsoxseg8ei32_v_u8mf4(__VA_ARGS__)

#define	vsoxseg8ei32_v_u8mf4_m(...) __riscv_vsoxseg8ei32_v_u8mf4_m(__VA_ARGS__)

#define	vsoxseg8ei32_v_u8mf8(...) __riscv_vsoxseg8ei32_v_u8mf8(__VA_ARGS__)

#define	vsoxseg8ei32_v_u8mf8_m(...) __riscv_vsoxseg8ei32_v_u8mf8_m(__VA_ARGS__)

#define	vsoxseg8ei64_v_f16m1(...) __riscv_vsoxseg8ei64_v_f16m1(__VA_ARGS__)

#define	vsoxseg8ei64_v_f16m1_m(...) __riscv_vsoxseg8ei64_v_f16m1_m(__VA_ARGS__)

#define	vsoxseg8ei64_v_f16mf2(...) __riscv_vsoxseg8ei64_v_f16mf2(__VA_ARGS__)

#define	vsoxseg8ei64_v_f16mf2_m(...) __riscv_vsoxseg8ei64_v_f16mf2_m(__VA_ARGS__)

#define	vsoxseg8ei64_v_f16mf4(...) __riscv_vsoxseg8ei64_v_f16mf4(__VA_ARGS__)

#define	vsoxseg8ei64_v_f16mf4_m(...) __riscv_vsoxseg8ei64_v_f16mf4_m(__VA_ARGS__)

#define	vsoxseg8ei64_v_f32m1(...) __riscv_vsoxseg8ei64_v_f32m1(__VA_ARGS__)

#define	vsoxseg8ei64_v_f32m1_m(...) __riscv_vsoxseg8ei64_v_f32m1_m(__VA_ARGS__)

#define	vsoxseg8ei64_v_f32mf2(...) __riscv_vsoxseg8ei64_v_f32mf2(__VA_ARGS__)

#define	vsoxseg8ei64_v_f32mf2_m(...) __riscv_vsoxseg8ei64_v_f32mf2_m(__VA_ARGS__)

#define	vsoxseg8ei64_v_f64m1(...) __riscv_vsoxseg8ei64_v_f64m1(__VA_ARGS__)

#define	vsoxseg8ei64_v_f64m1_m(...) __riscv_vsoxseg8ei64_v_f64m1_m(__VA_ARGS__)

#define	vsoxseg8ei64_v_i16m1(...) __riscv_vsoxseg8ei64_v_i16m1(__VA_ARGS__)

#define	vsoxseg8ei64_v_i16m1_m(...) __riscv_vsoxseg8ei64_v_i16m1_m(__VA_ARGS__)

#define	vsoxseg8ei64_v_i16mf2(...) __riscv_vsoxseg8ei64_v_i16mf2(__VA_ARGS__)

#define	vsoxseg8ei64_v_i16mf2_m(...) __riscv_vsoxseg8ei64_v_i16mf2_m(__VA_ARGS__)

#define	vsoxseg8ei64_v_i16mf4(...) __riscv_vsoxseg8ei64_v_i16mf4(__VA_ARGS__)

#define	vsoxseg8ei64_v_i16mf4_m(...) __riscv_vsoxseg8ei64_v_i16mf4_m(__VA_ARGS__)

#define	vsoxseg8ei64_v_i32m1(...) __riscv_vsoxseg8ei64_v_i32m1(__VA_ARGS__)

#define	vsoxseg8ei64_v_i32m1_m(...) __riscv_vsoxseg8ei64_v_i32m1_m(__VA_ARGS__)

#define	vsoxseg8ei64_v_i32mf2(...) __riscv_vsoxseg8ei64_v_i32mf2(__VA_ARGS__)

#define	vsoxseg8ei64_v_i32mf2_m(...) __riscv_vsoxseg8ei64_v_i32mf2_m(__VA_ARGS__)

#define	vsoxseg8ei64_v_i64m1(...) __riscv_vsoxseg8ei64_v_i64m1(__VA_ARGS__)

#define	vsoxseg8ei64_v_i64m1_m(...) __riscv_vsoxseg8ei64_v_i64m1_m(__VA_ARGS__)

#define	vsoxseg8ei64_v_i8m1(...) __riscv_vsoxseg8ei64_v_i8m1(__VA_ARGS__)

#define	vsoxseg8ei64_v_i8m1_m(...) __riscv_vsoxseg8ei64_v_i8m1_m(__VA_ARGS__)

#define	vsoxseg8ei64_v_i8mf2(...) __riscv_vsoxseg8ei64_v_i8mf2(__VA_ARGS__)

#define	vsoxseg8ei64_v_i8mf2_m(...) __riscv_vsoxseg8ei64_v_i8mf2_m(__VA_ARGS__)

#define	vsoxseg8ei64_v_i8mf4(...) __riscv_vsoxseg8ei64_v_i8mf4(__VA_ARGS__)

#define	vsoxseg8ei64_v_i8mf4_m(...) __riscv_vsoxseg8ei64_v_i8mf4_m(__VA_ARGS__)

#define	vsoxseg8ei64_v_i8mf8(...) __riscv_vsoxseg8ei64_v_i8mf8(__VA_ARGS__)

#define	vsoxseg8ei64_v_i8mf8_m(...) __riscv_vsoxseg8ei64_v_i8mf8_m(__VA_ARGS__)

#define	vsoxseg8ei64_v_u16m1(...) __riscv_vsoxseg8ei64_v_u16m1(__VA_ARGS__)

#define	vsoxseg8ei64_v_u16m1_m(...) __riscv_vsoxseg8ei64_v_u16m1_m(__VA_ARGS__)

#define	vsoxseg8ei64_v_u16mf2(...) __riscv_vsoxseg8ei64_v_u16mf2(__VA_ARGS__)

#define	vsoxseg8ei64_v_u16mf2_m(...) __riscv_vsoxseg8ei64_v_u16mf2_m(__VA_ARGS__)

#define	vsoxseg8ei64_v_u16mf4(...) __riscv_vsoxseg8ei64_v_u16mf4(__VA_ARGS__)

#define	vsoxseg8ei64_v_u16mf4_m(...) __riscv_vsoxseg8ei64_v_u16mf4_m(__VA_ARGS__)

#define	vsoxseg8ei64_v_u32m1(...) __riscv_vsoxseg8ei64_v_u32m1(__VA_ARGS__)

#define	vsoxseg8ei64_v_u32m1_m(...) __riscv_vsoxseg8ei64_v_u32m1_m(__VA_ARGS__)

#define	vsoxseg8ei64_v_u32mf2(...) __riscv_vsoxseg8ei64_v_u32mf2(__VA_ARGS__)

#define	vsoxseg8ei64_v_u32mf2_m(...) __riscv_vsoxseg8ei64_v_u32mf2_m(__VA_ARGS__)

#define	vsoxseg8ei64_v_u64m1(...) __riscv_vsoxseg8ei64_v_u64m1(__VA_ARGS__)

#define	vsoxseg8ei64_v_u64m1_m(...) __riscv_vsoxseg8ei64_v_u64m1_m(__VA_ARGS__)

#define	vsoxseg8ei64_v_u8m1(...) __riscv_vsoxseg8ei64_v_u8m1(__VA_ARGS__)

#define	vsoxseg8ei64_v_u8m1_m(...) __riscv_vsoxseg8ei64_v_u8m1_m(__VA_ARGS__)

#define	vsoxseg8ei64_v_u8mf2(...) __riscv_vsoxseg8ei64_v_u8mf2(__VA_ARGS__)

#define	vsoxseg8ei64_v_u8mf2_m(...) __riscv_vsoxseg8ei64_v_u8mf2_m(__VA_ARGS__)

#define	vsoxseg8ei64_v_u8mf4(...) __riscv_vsoxseg8ei64_v_u8mf4(__VA_ARGS__)

#define	vsoxseg8ei64_v_u8mf4_m(...) __riscv_vsoxseg8ei64_v_u8mf4_m(__VA_ARGS__)

#define	vsoxseg8ei64_v_u8mf8(...) __riscv_vsoxseg8ei64_v_u8mf8(__VA_ARGS__)

#define	vsoxseg8ei64_v_u8mf8_m(...) __riscv_vsoxseg8ei64_v_u8mf8_m(__VA_ARGS__)

#define	vsoxseg8ei8_v_f16m1(...) __riscv_vsoxseg8ei8_v_f16m1(__VA_ARGS__)

#define	vsoxseg8ei8_v_f16m1_m(...) __riscv_vsoxseg8ei8_v_f16m1_m(__VA_ARGS__)

#define	vsoxseg8ei8_v_f16mf2(...) __riscv_vsoxseg8ei8_v_f16mf2(__VA_ARGS__)

#define	vsoxseg8ei8_v_f16mf2_m(...) __riscv_vsoxseg8ei8_v_f16mf2_m(__VA_ARGS__)

#define	vsoxseg8ei8_v_f16mf4(...) __riscv_vsoxseg8ei8_v_f16mf4(__VA_ARGS__)

#define	vsoxseg8ei8_v_f16mf4_m(...) __riscv_vsoxseg8ei8_v_f16mf4_m(__VA_ARGS__)

#define	vsoxseg8ei8_v_f32m1(...) __riscv_vsoxseg8ei8_v_f32m1(__VA_ARGS__)

#define	vsoxseg8ei8_v_f32m1_m(...) __riscv_vsoxseg8ei8_v_f32m1_m(__VA_ARGS__)

#define	vsoxseg8ei8_v_f32mf2(...) __riscv_vsoxseg8ei8_v_f32mf2(__VA_ARGS__)

#define	vsoxseg8ei8_v_f32mf2_m(...) __riscv_vsoxseg8ei8_v_f32mf2_m(__VA_ARGS__)

#define	vsoxseg8ei8_v_f64m1(...) __riscv_vsoxseg8ei8_v_f64m1(__VA_ARGS__)

#define	vsoxseg8ei8_v_f64m1_m(...) __riscv_vsoxseg8ei8_v_f64m1_m(__VA_ARGS__)

#define	vsoxseg8ei8_v_i16m1(...) __riscv_vsoxseg8ei8_v_i16m1(__VA_ARGS__)

#define	vsoxseg8ei8_v_i16m1_m(...) __riscv_vsoxseg8ei8_v_i16m1_m(__VA_ARGS__)

#define	vsoxseg8ei8_v_i16mf2(...) __riscv_vsoxseg8ei8_v_i16mf2(__VA_ARGS__)

#define	vsoxseg8ei8_v_i16mf2_m(...) __riscv_vsoxseg8ei8_v_i16mf2_m(__VA_ARGS__)

#define	vsoxseg8ei8_v_i16mf4(...) __riscv_vsoxseg8ei8_v_i16mf4(__VA_ARGS__)

#define	vsoxseg8ei8_v_i16mf4_m(...) __riscv_vsoxseg8ei8_v_i16mf4_m(__VA_ARGS__)

#define	vsoxseg8ei8_v_i32m1(...) __riscv_vsoxseg8ei8_v_i32m1(__VA_ARGS__)

#define	vsoxseg8ei8_v_i32m1_m(...) __riscv_vsoxseg8ei8_v_i32m1_m(__VA_ARGS__)

#define	vsoxseg8ei8_v_i32mf2(...) __riscv_vsoxseg8ei8_v_i32mf2(__VA_ARGS__)

#define	vsoxseg8ei8_v_i32mf2_m(...) __riscv_vsoxseg8ei8_v_i32mf2_m(__VA_ARGS__)

#define	vsoxseg8ei8_v_i64m1(...) __riscv_vsoxseg8ei8_v_i64m1(__VA_ARGS__)

#define	vsoxseg8ei8_v_i64m1_m(...) __riscv_vsoxseg8ei8_v_i64m1_m(__VA_ARGS__)

#define	vsoxseg8ei8_v_i8m1(...) __riscv_vsoxseg8ei8_v_i8m1(__VA_ARGS__)

#define	vsoxseg8ei8_v_i8m1_m(...) __riscv_vsoxseg8ei8_v_i8m1_m(__VA_ARGS__)

#define	vsoxseg8ei8_v_i8mf2(...) __riscv_vsoxseg8ei8_v_i8mf2(__VA_ARGS__)

#define	vsoxseg8ei8_v_i8mf2_m(...) __riscv_vsoxseg8ei8_v_i8mf2_m(__VA_ARGS__)

#define	vsoxseg8ei8_v_i8mf4(...) __riscv_vsoxseg8ei8_v_i8mf4(__VA_ARGS__)

#define	vsoxseg8ei8_v_i8mf4_m(...) __riscv_vsoxseg8ei8_v_i8mf4_m(__VA_ARGS__)

#define	vsoxseg8ei8_v_i8mf8(...) __riscv_vsoxseg8ei8_v_i8mf8(__VA_ARGS__)

#define	vsoxseg8ei8_v_i8mf8_m(...) __riscv_vsoxseg8ei8_v_i8mf8_m(__VA_ARGS__)

#define	vsoxseg8ei8_v_u16m1(...) __riscv_vsoxseg8ei8_v_u16m1(__VA_ARGS__)

#define	vsoxseg8ei8_v_u16m1_m(...) __riscv_vsoxseg8ei8_v_u16m1_m(__VA_ARGS__)

#define	vsoxseg8ei8_v_u16mf2(...) __riscv_vsoxseg8ei8_v_u16mf2(__VA_ARGS__)

#define	vsoxseg8ei8_v_u16mf2_m(...) __riscv_vsoxseg8ei8_v_u16mf2_m(__VA_ARGS__)

#define	vsoxseg8ei8_v_u16mf4(...) __riscv_vsoxseg8ei8_v_u16mf4(__VA_ARGS__)

#define	vsoxseg8ei8_v_u16mf4_m(...) __riscv_vsoxseg8ei8_v_u16mf4_m(__VA_ARGS__)

#define	vsoxseg8ei8_v_u32m1(...) __riscv_vsoxseg8ei8_v_u32m1(__VA_ARGS__)

#define	vsoxseg8ei8_v_u32m1_m(...) __riscv_vsoxseg8ei8_v_u32m1_m(__VA_ARGS__)

#define	vsoxseg8ei8_v_u32mf2(...) __riscv_vsoxseg8ei8_v_u32mf2(__VA_ARGS__)

#define	vsoxseg8ei8_v_u32mf2_m(...) __riscv_vsoxseg8ei8_v_u32mf2_m(__VA_ARGS__)

#define	vsoxseg8ei8_v_u64m1(...) __riscv_vsoxseg8ei8_v_u64m1(__VA_ARGS__)

#define	vsoxseg8ei8_v_u64m1_m(...) __riscv_vsoxseg8ei8_v_u64m1_m(__VA_ARGS__)

#define	vsoxseg8ei8_v_u8m1(...) __riscv_vsoxseg8ei8_v_u8m1(__VA_ARGS__)

#define	vsoxseg8ei8_v_u8m1_m(...) __riscv_vsoxseg8ei8_v_u8m1_m(__VA_ARGS__)

#define	vsoxseg8ei8_v_u8mf2(...) __riscv_vsoxseg8ei8_v_u8mf2(__VA_ARGS__)

#define	vsoxseg8ei8_v_u8mf2_m(...) __riscv_vsoxseg8ei8_v_u8mf2_m(__VA_ARGS__)

#define	vsoxseg8ei8_v_u8mf4(...) __riscv_vsoxseg8ei8_v_u8mf4(__VA_ARGS__)

#define	vsoxseg8ei8_v_u8mf4_m(...) __riscv_vsoxseg8ei8_v_u8mf4_m(__VA_ARGS__)

#define	vsoxseg8ei8_v_u8mf8(...) __riscv_vsoxseg8ei8_v_u8mf8(__VA_ARGS__)

#define	vsoxseg8ei8_v_u8mf8_m(...) __riscv_vsoxseg8ei8_v_u8mf8_m(__VA_ARGS__)

#define	vsra_vv_i16m1(...) __riscv_vsra_vv_i16m1(__VA_ARGS__)

#define	vsra_vv_i16m1_m(...) __riscv_vsra_vv_i16m1_tumu(__VA_ARGS__)

#define	vsra_vv_i16m2(...) __riscv_vsra_vv_i16m2(__VA_ARGS__)

#define	vsra_vv_i16m2_m(...) __riscv_vsra_vv_i16m2_tumu(__VA_ARGS__)

#define	vsra_vv_i16m4(...) __riscv_vsra_vv_i16m4(__VA_ARGS__)

#define	vsra_vv_i16m4_m(...) __riscv_vsra_vv_i16m4_tumu(__VA_ARGS__)

#define	vsra_vv_i16m8(...) __riscv_vsra_vv_i16m8(__VA_ARGS__)

#define	vsra_vv_i16m8_m(...) __riscv_vsra_vv_i16m8_tumu(__VA_ARGS__)

#define	vsra_vv_i16mf2(...) __riscv_vsra_vv_i16mf2(__VA_ARGS__)

#define	vsra_vv_i16mf2_m(...) __riscv_vsra_vv_i16mf2_tumu(__VA_ARGS__)

#define	vsra_vv_i16mf4(...) __riscv_vsra_vv_i16mf4(__VA_ARGS__)

#define	vsra_vv_i16mf4_m(...) __riscv_vsra_vv_i16mf4_tumu(__VA_ARGS__)

#define	vsra_vv_i32m1(...) __riscv_vsra_vv_i32m1(__VA_ARGS__)

#define	vsra_vv_i32m1_m(...) __riscv_vsra_vv_i32m1_tumu(__VA_ARGS__)

#define	vsra_vv_i32m2(...) __riscv_vsra_vv_i32m2(__VA_ARGS__)

#define	vsra_vv_i32m2_m(...) __riscv_vsra_vv_i32m2_tumu(__VA_ARGS__)

#define	vsra_vv_i32m4(...) __riscv_vsra_vv_i32m4(__VA_ARGS__)

#define	vsra_vv_i32m4_m(...) __riscv_vsra_vv_i32m4_tumu(__VA_ARGS__)

#define	vsra_vv_i32m8(...) __riscv_vsra_vv_i32m8(__VA_ARGS__)

#define	vsra_vv_i32m8_m(...) __riscv_vsra_vv_i32m8_tumu(__VA_ARGS__)

#define	vsra_vv_i32mf2(...) __riscv_vsra_vv_i32mf2(__VA_ARGS__)

#define	vsra_vv_i32mf2_m(...) __riscv_vsra_vv_i32mf2_tumu(__VA_ARGS__)

#define	vsra_vv_i64m1(...) __riscv_vsra_vv_i64m1(__VA_ARGS__)

#define	vsra_vv_i64m1_m(...) __riscv_vsra_vv_i64m1_tumu(__VA_ARGS__)

#define	vsra_vv_i64m2(...) __riscv_vsra_vv_i64m2(__VA_ARGS__)

#define	vsra_vv_i64m2_m(...) __riscv_vsra_vv_i64m2_tumu(__VA_ARGS__)

#define	vsra_vv_i64m4(...) __riscv_vsra_vv_i64m4(__VA_ARGS__)

#define	vsra_vv_i64m4_m(...) __riscv_vsra_vv_i64m4_tumu(__VA_ARGS__)

#define	vsra_vv_i64m8(...) __riscv_vsra_vv_i64m8(__VA_ARGS__)

#define	vsra_vv_i64m8_m(...) __riscv_vsra_vv_i64m8_tumu(__VA_ARGS__)

#define	vsra_vv_i8m1(...) __riscv_vsra_vv_i8m1(__VA_ARGS__)

#define	vsra_vv_i8m1_m(...) __riscv_vsra_vv_i8m1_tumu(__VA_ARGS__)

#define	vsra_vv_i8m2(...) __riscv_vsra_vv_i8m2(__VA_ARGS__)

#define	vsra_vv_i8m2_m(...) __riscv_vsra_vv_i8m2_tumu(__VA_ARGS__)

#define	vsra_vv_i8m4(...) __riscv_vsra_vv_i8m4(__VA_ARGS__)

#define	vsra_vv_i8m4_m(...) __riscv_vsra_vv_i8m4_tumu(__VA_ARGS__)

#define	vsra_vv_i8m8(...) __riscv_vsra_vv_i8m8(__VA_ARGS__)

#define	vsra_vv_i8m8_m(...) __riscv_vsra_vv_i8m8_tumu(__VA_ARGS__)

#define	vsra_vv_i8mf2(...) __riscv_vsra_vv_i8mf2(__VA_ARGS__)

#define	vsra_vv_i8mf2_m(...) __riscv_vsra_vv_i8mf2_tumu(__VA_ARGS__)

#define	vsra_vv_i8mf4(...) __riscv_vsra_vv_i8mf4(__VA_ARGS__)

#define	vsra_vv_i8mf4_m(...) __riscv_vsra_vv_i8mf4_tumu(__VA_ARGS__)

#define	vsra_vv_i8mf8(...) __riscv_vsra_vv_i8mf8(__VA_ARGS__)

#define	vsra_vv_i8mf8_m(...) __riscv_vsra_vv_i8mf8_tumu(__VA_ARGS__)

#define	vsra_vx_i16m1(...) __riscv_vsra_vx_i16m1(__VA_ARGS__)

#define	vsra_vx_i16m1_m(...) __riscv_vsra_vx_i16m1_tumu(__VA_ARGS__)

#define	vsra_vx_i16m2(...) __riscv_vsra_vx_i16m2(__VA_ARGS__)

#define	vsra_vx_i16m2_m(...) __riscv_vsra_vx_i16m2_tumu(__VA_ARGS__)

#define	vsra_vx_i16m4(...) __riscv_vsra_vx_i16m4(__VA_ARGS__)

#define	vsra_vx_i16m4_m(...) __riscv_vsra_vx_i16m4_tumu(__VA_ARGS__)

#define	vsra_vx_i16m8(...) __riscv_vsra_vx_i16m8(__VA_ARGS__)

#define	vsra_vx_i16m8_m(...) __riscv_vsra_vx_i16m8_tumu(__VA_ARGS__)

#define	vsra_vx_i16mf2(...) __riscv_vsra_vx_i16mf2(__VA_ARGS__)

#define	vsra_vx_i16mf2_m(...) __riscv_vsra_vx_i16mf2_tumu(__VA_ARGS__)

#define	vsra_vx_i16mf4(...) __riscv_vsra_vx_i16mf4(__VA_ARGS__)

#define	vsra_vx_i16mf4_m(...) __riscv_vsra_vx_i16mf4_tumu(__VA_ARGS__)

#define	vsra_vx_i32m1(...) __riscv_vsra_vx_i32m1(__VA_ARGS__)

#define	vsra_vx_i32m1_m(...) __riscv_vsra_vx_i32m1_tumu(__VA_ARGS__)

#define	vsra_vx_i32m2(...) __riscv_vsra_vx_i32m2(__VA_ARGS__)

#define	vsra_vx_i32m2_m(...) __riscv_vsra_vx_i32m2_tumu(__VA_ARGS__)

#define	vsra_vx_i32m4(...) __riscv_vsra_vx_i32m4(__VA_ARGS__)

#define	vsra_vx_i32m4_m(...) __riscv_vsra_vx_i32m4_tumu(__VA_ARGS__)

#define	vsra_vx_i32m8(...) __riscv_vsra_vx_i32m8(__VA_ARGS__)

#define	vsra_vx_i32m8_m(...) __riscv_vsra_vx_i32m8_tumu(__VA_ARGS__)

#define	vsra_vx_i32mf2(...) __riscv_vsra_vx_i32mf2(__VA_ARGS__)

#define	vsra_vx_i32mf2_m(...) __riscv_vsra_vx_i32mf2_tumu(__VA_ARGS__)

#define	vsra_vx_i64m1(...) __riscv_vsra_vx_i64m1(__VA_ARGS__)

#define	vsra_vx_i64m1_m(...) __riscv_vsra_vx_i64m1_tumu(__VA_ARGS__)

#define	vsra_vx_i64m2(...) __riscv_vsra_vx_i64m2(__VA_ARGS__)

#define	vsra_vx_i64m2_m(...) __riscv_vsra_vx_i64m2_tumu(__VA_ARGS__)

#define	vsra_vx_i64m4(...) __riscv_vsra_vx_i64m4(__VA_ARGS__)

#define	vsra_vx_i64m4_m(...) __riscv_vsra_vx_i64m4_tumu(__VA_ARGS__)

#define	vsra_vx_i64m8(...) __riscv_vsra_vx_i64m8(__VA_ARGS__)

#define	vsra_vx_i64m8_m(...) __riscv_vsra_vx_i64m8_tumu(__VA_ARGS__)

#define	vsra_vx_i8m1(...) __riscv_vsra_vx_i8m1(__VA_ARGS__)

#define	vsra_vx_i8m1_m(...) __riscv_vsra_vx_i8m1_tumu(__VA_ARGS__)

#define	vsra_vx_i8m2(...) __riscv_vsra_vx_i8m2(__VA_ARGS__)

#define	vsra_vx_i8m2_m(...) __riscv_vsra_vx_i8m2_tumu(__VA_ARGS__)

#define	vsra_vx_i8m4(...) __riscv_vsra_vx_i8m4(__VA_ARGS__)

#define	vsra_vx_i8m4_m(...) __riscv_vsra_vx_i8m4_tumu(__VA_ARGS__)

#define	vsra_vx_i8m8(...) __riscv_vsra_vx_i8m8(__VA_ARGS__)

#define	vsra_vx_i8m8_m(...) __riscv_vsra_vx_i8m8_tumu(__VA_ARGS__)

#define	vsra_vx_i8mf2(...) __riscv_vsra_vx_i8mf2(__VA_ARGS__)

#define	vsra_vx_i8mf2_m(...) __riscv_vsra_vx_i8mf2_tumu(__VA_ARGS__)

#define	vsra_vx_i8mf4(...) __riscv_vsra_vx_i8mf4(__VA_ARGS__)

#define	vsra_vx_i8mf4_m(...) __riscv_vsra_vx_i8mf4_tumu(__VA_ARGS__)

#define	vsra_vx_i8mf8(...) __riscv_vsra_vx_i8mf8(__VA_ARGS__)

#define	vsra_vx_i8mf8_m(...) __riscv_vsra_vx_i8mf8_tumu(__VA_ARGS__)

#define	vsrl_vv_u16m1(...) __riscv_vsrl_vv_u16m1(__VA_ARGS__)

#define	vsrl_vv_u16m1_m(...) __riscv_vsrl_vv_u16m1_tumu(__VA_ARGS__)

#define	vsrl_vv_u16m2(...) __riscv_vsrl_vv_u16m2(__VA_ARGS__)

#define	vsrl_vv_u16m2_m(...) __riscv_vsrl_vv_u16m2_tumu(__VA_ARGS__)

#define	vsrl_vv_u16m4(...) __riscv_vsrl_vv_u16m4(__VA_ARGS__)

#define	vsrl_vv_u16m4_m(...) __riscv_vsrl_vv_u16m4_tumu(__VA_ARGS__)

#define	vsrl_vv_u16m8(...) __riscv_vsrl_vv_u16m8(__VA_ARGS__)

#define	vsrl_vv_u16m8_m(...) __riscv_vsrl_vv_u16m8_tumu(__VA_ARGS__)

#define	vsrl_vv_u16mf2(...) __riscv_vsrl_vv_u16mf2(__VA_ARGS__)

#define	vsrl_vv_u16mf2_m(...) __riscv_vsrl_vv_u16mf2_tumu(__VA_ARGS__)

#define	vsrl_vv_u16mf4(...) __riscv_vsrl_vv_u16mf4(__VA_ARGS__)

#define	vsrl_vv_u16mf4_m(...) __riscv_vsrl_vv_u16mf4_tumu(__VA_ARGS__)

#define	vsrl_vv_u32m1(...) __riscv_vsrl_vv_u32m1(__VA_ARGS__)

#define	vsrl_vv_u32m1_m(...) __riscv_vsrl_vv_u32m1_tumu(__VA_ARGS__)

#define	vsrl_vv_u32m2(...) __riscv_vsrl_vv_u32m2(__VA_ARGS__)

#define	vsrl_vv_u32m2_m(...) __riscv_vsrl_vv_u32m2_tumu(__VA_ARGS__)

#define	vsrl_vv_u32m4(...) __riscv_vsrl_vv_u32m4(__VA_ARGS__)

#define	vsrl_vv_u32m4_m(...) __riscv_vsrl_vv_u32m4_tumu(__VA_ARGS__)

#define	vsrl_vv_u32m8(...) __riscv_vsrl_vv_u32m8(__VA_ARGS__)

#define	vsrl_vv_u32m8_m(...) __riscv_vsrl_vv_u32m8_tumu(__VA_ARGS__)

#define	vsrl_vv_u32mf2(...) __riscv_vsrl_vv_u32mf2(__VA_ARGS__)

#define	vsrl_vv_u32mf2_m(...) __riscv_vsrl_vv_u32mf2_tumu(__VA_ARGS__)

#define	vsrl_vv_u64m1(...) __riscv_vsrl_vv_u64m1(__VA_ARGS__)

#define	vsrl_vv_u64m1_m(...) __riscv_vsrl_vv_u64m1_tumu(__VA_ARGS__)

#define	vsrl_vv_u64m2(...) __riscv_vsrl_vv_u64m2(__VA_ARGS__)

#define	vsrl_vv_u64m2_m(...) __riscv_vsrl_vv_u64m2_tumu(__VA_ARGS__)

#define	vsrl_vv_u64m4(...) __riscv_vsrl_vv_u64m4(__VA_ARGS__)

#define	vsrl_vv_u64m4_m(...) __riscv_vsrl_vv_u64m4_tumu(__VA_ARGS__)

#define	vsrl_vv_u64m8(...) __riscv_vsrl_vv_u64m8(__VA_ARGS__)

#define	vsrl_vv_u64m8_m(...) __riscv_vsrl_vv_u64m8_tumu(__VA_ARGS__)

#define	vsrl_vv_u8m1(...) __riscv_vsrl_vv_u8m1(__VA_ARGS__)

#define	vsrl_vv_u8m1_m(...) __riscv_vsrl_vv_u8m1_tumu(__VA_ARGS__)

#define	vsrl_vv_u8m2(...) __riscv_vsrl_vv_u8m2(__VA_ARGS__)

#define	vsrl_vv_u8m2_m(...) __riscv_vsrl_vv_u8m2_tumu(__VA_ARGS__)

#define	vsrl_vv_u8m4(...) __riscv_vsrl_vv_u8m4(__VA_ARGS__)

#define	vsrl_vv_u8m4_m(...) __riscv_vsrl_vv_u8m4_tumu(__VA_ARGS__)

#define	vsrl_vv_u8m8(...) __riscv_vsrl_vv_u8m8(__VA_ARGS__)

#define	vsrl_vv_u8m8_m(...) __riscv_vsrl_vv_u8m8_tumu(__VA_ARGS__)

#define	vsrl_vv_u8mf2(...) __riscv_vsrl_vv_u8mf2(__VA_ARGS__)

#define	vsrl_vv_u8mf2_m(...) __riscv_vsrl_vv_u8mf2_tumu(__VA_ARGS__)

#define	vsrl_vv_u8mf4(...) __riscv_vsrl_vv_u8mf4(__VA_ARGS__)

#define	vsrl_vv_u8mf4_m(...) __riscv_vsrl_vv_u8mf4_tumu(__VA_ARGS__)

#define	vsrl_vv_u8mf8(...) __riscv_vsrl_vv_u8mf8(__VA_ARGS__)

#define	vsrl_vv_u8mf8_m(...) __riscv_vsrl_vv_u8mf8_tumu(__VA_ARGS__)

#define	vsrl_vx_u16m1(...) __riscv_vsrl_vx_u16m1(__VA_ARGS__)

#define	vsrl_vx_u16m1_m(...) __riscv_vsrl_vx_u16m1_tumu(__VA_ARGS__)

#define	vsrl_vx_u16m2(...) __riscv_vsrl_vx_u16m2(__VA_ARGS__)

#define	vsrl_vx_u16m2_m(...) __riscv_vsrl_vx_u16m2_tumu(__VA_ARGS__)

#define	vsrl_vx_u16m4(...) __riscv_vsrl_vx_u16m4(__VA_ARGS__)

#define	vsrl_vx_u16m4_m(...) __riscv_vsrl_vx_u16m4_tumu(__VA_ARGS__)

#define	vsrl_vx_u16m8(...) __riscv_vsrl_vx_u16m8(__VA_ARGS__)

#define	vsrl_vx_u16m8_m(...) __riscv_vsrl_vx_u16m8_tumu(__VA_ARGS__)

#define	vsrl_vx_u16mf2(...) __riscv_vsrl_vx_u16mf2(__VA_ARGS__)

#define	vsrl_vx_u16mf2_m(...) __riscv_vsrl_vx_u16mf2_tumu(__VA_ARGS__)

#define	vsrl_vx_u16mf4(...) __riscv_vsrl_vx_u16mf4(__VA_ARGS__)

#define	vsrl_vx_u16mf4_m(...) __riscv_vsrl_vx_u16mf4_tumu(__VA_ARGS__)

#define	vsrl_vx_u32m1(...) __riscv_vsrl_vx_u32m1(__VA_ARGS__)

#define	vsrl_vx_u32m1_m(...) __riscv_vsrl_vx_u32m1_tumu(__VA_ARGS__)

#define	vsrl_vx_u32m2(...) __riscv_vsrl_vx_u32m2(__VA_ARGS__)

#define	vsrl_vx_u32m2_m(...) __riscv_vsrl_vx_u32m2_tumu(__VA_ARGS__)

#define	vsrl_vx_u32m4(...) __riscv_vsrl_vx_u32m4(__VA_ARGS__)

#define	vsrl_vx_u32m4_m(...) __riscv_vsrl_vx_u32m4_tumu(__VA_ARGS__)

#define	vsrl_vx_u32m8(...) __riscv_vsrl_vx_u32m8(__VA_ARGS__)

#define	vsrl_vx_u32m8_m(...) __riscv_vsrl_vx_u32m8_tumu(__VA_ARGS__)

#define	vsrl_vx_u32mf2(...) __riscv_vsrl_vx_u32mf2(__VA_ARGS__)

#define	vsrl_vx_u32mf2_m(...) __riscv_vsrl_vx_u32mf2_tumu(__VA_ARGS__)

#define	vsrl_vx_u64m1(...) __riscv_vsrl_vx_u64m1(__VA_ARGS__)

#define	vsrl_vx_u64m1_m(...) __riscv_vsrl_vx_u64m1_tumu(__VA_ARGS__)

#define	vsrl_vx_u64m2(...) __riscv_vsrl_vx_u64m2(__VA_ARGS__)

#define	vsrl_vx_u64m2_m(...) __riscv_vsrl_vx_u64m2_tumu(__VA_ARGS__)

#define	vsrl_vx_u64m4(...) __riscv_vsrl_vx_u64m4(__VA_ARGS__)

#define	vsrl_vx_u64m4_m(...) __riscv_vsrl_vx_u64m4_tumu(__VA_ARGS__)

#define	vsrl_vx_u64m8(...) __riscv_vsrl_vx_u64m8(__VA_ARGS__)

#define	vsrl_vx_u64m8_m(...) __riscv_vsrl_vx_u64m8_tumu(__VA_ARGS__)

#define	vsrl_vx_u8m1(...) __riscv_vsrl_vx_u8m1(__VA_ARGS__)

#define	vsrl_vx_u8m1_m(...) __riscv_vsrl_vx_u8m1_tumu(__VA_ARGS__)

#define	vsrl_vx_u8m2(...) __riscv_vsrl_vx_u8m2(__VA_ARGS__)

#define	vsrl_vx_u8m2_m(...) __riscv_vsrl_vx_u8m2_tumu(__VA_ARGS__)

#define	vsrl_vx_u8m4(...) __riscv_vsrl_vx_u8m4(__VA_ARGS__)

#define	vsrl_vx_u8m4_m(...) __riscv_vsrl_vx_u8m4_tumu(__VA_ARGS__)

#define	vsrl_vx_u8m8(...) __riscv_vsrl_vx_u8m8(__VA_ARGS__)

#define	vsrl_vx_u8m8_m(...) __riscv_vsrl_vx_u8m8_tumu(__VA_ARGS__)

#define	vsrl_vx_u8mf2(...) __riscv_vsrl_vx_u8mf2(__VA_ARGS__)

#define	vsrl_vx_u8mf2_m(...) __riscv_vsrl_vx_u8mf2_tumu(__VA_ARGS__)

#define	vsrl_vx_u8mf4(...) __riscv_vsrl_vx_u8mf4(__VA_ARGS__)

#define	vsrl_vx_u8mf4_m(...) __riscv_vsrl_vx_u8mf4_tumu(__VA_ARGS__)

#define	vsrl_vx_u8mf8(...) __riscv_vsrl_vx_u8mf8(__VA_ARGS__)

#define	vsrl_vx_u8mf8_m(...) __riscv_vsrl_vx_u8mf8_tumu(__VA_ARGS__)

#define	vsse16_v_f16m1(...) __riscv_vsse16_v_f16m1(__VA_ARGS__)

#define	vsse16_v_f16m1_m(...) __riscv_vsse16_v_f16m1_m(__VA_ARGS__)

#define	vsse16_v_f16m2(...) __riscv_vsse16_v_f16m2(__VA_ARGS__)

#define	vsse16_v_f16m2_m(...) __riscv_vsse16_v_f16m2_m(__VA_ARGS__)

#define	vsse16_v_f16m4(...) __riscv_vsse16_v_f16m4(__VA_ARGS__)

#define	vsse16_v_f16m4_m(...) __riscv_vsse16_v_f16m4_m(__VA_ARGS__)

#define	vsse16_v_f16m8(...) __riscv_vsse16_v_f16m8(__VA_ARGS__)

#define	vsse16_v_f16m8_m(...) __riscv_vsse16_v_f16m8_m(__VA_ARGS__)

#define	vsse16_v_f16mf2(...) __riscv_vsse16_v_f16mf2(__VA_ARGS__)

#define	vsse16_v_f16mf2_m(...) __riscv_vsse16_v_f16mf2_m(__VA_ARGS__)

#define	vsse16_v_f16mf4(...) __riscv_vsse16_v_f16mf4(__VA_ARGS__)

#define	vsse16_v_f16mf4_m(...) __riscv_vsse16_v_f16mf4_m(__VA_ARGS__)

#define	vsse16_v_i16m1(...) __riscv_vsse16_v_i16m1(__VA_ARGS__)

#define	vsse16_v_i16m1_m(...) __riscv_vsse16_v_i16m1_m(__VA_ARGS__)

#define	vsse16_v_i16m2(...) __riscv_vsse16_v_i16m2(__VA_ARGS__)

#define	vsse16_v_i16m2_m(...) __riscv_vsse16_v_i16m2_m(__VA_ARGS__)

#define	vsse16_v_i16m4(...) __riscv_vsse16_v_i16m4(__VA_ARGS__)

#define	vsse16_v_i16m4_m(...) __riscv_vsse16_v_i16m4_m(__VA_ARGS__)

#define	vsse16_v_i16m8(...) __riscv_vsse16_v_i16m8(__VA_ARGS__)

#define	vsse16_v_i16m8_m(...) __riscv_vsse16_v_i16m8_m(__VA_ARGS__)

#define	vsse16_v_i16mf2(...) __riscv_vsse16_v_i16mf2(__VA_ARGS__)

#define	vsse16_v_i16mf2_m(...) __riscv_vsse16_v_i16mf2_m(__VA_ARGS__)

#define	vsse16_v_i16mf4(...) __riscv_vsse16_v_i16mf4(__VA_ARGS__)

#define	vsse16_v_i16mf4_m(...) __riscv_vsse16_v_i16mf4_m(__VA_ARGS__)

#define	vsse16_v_u16m1(...) __riscv_vsse16_v_u16m1(__VA_ARGS__)

#define	vsse16_v_u16m1_m(...) __riscv_vsse16_v_u16m1_m(__VA_ARGS__)

#define	vsse16_v_u16m2(...) __riscv_vsse16_v_u16m2(__VA_ARGS__)

#define	vsse16_v_u16m2_m(...) __riscv_vsse16_v_u16m2_m(__VA_ARGS__)

#define	vsse16_v_u16m4(...) __riscv_vsse16_v_u16m4(__VA_ARGS__)

#define	vsse16_v_u16m4_m(...) __riscv_vsse16_v_u16m4_m(__VA_ARGS__)

#define	vsse16_v_u16m8(...) __riscv_vsse16_v_u16m8(__VA_ARGS__)

#define	vsse16_v_u16m8_m(...) __riscv_vsse16_v_u16m8_m(__VA_ARGS__)

#define	vsse16_v_u16mf2(...) __riscv_vsse16_v_u16mf2(__VA_ARGS__)

#define	vsse16_v_u16mf2_m(...) __riscv_vsse16_v_u16mf2_m(__VA_ARGS__)

#define	vsse16_v_u16mf4(...) __riscv_vsse16_v_u16mf4(__VA_ARGS__)

#define	vsse16_v_u16mf4_m(...) __riscv_vsse16_v_u16mf4_m(__VA_ARGS__)

#define	vsse32_v_f32m1(...) __riscv_vsse32_v_f32m1(__VA_ARGS__)

#define	vsse32_v_f32m1_m(...) __riscv_vsse32_v_f32m1_m(__VA_ARGS__)

#define	vsse32_v_f32m2(...) __riscv_vsse32_v_f32m2(__VA_ARGS__)

#define	vsse32_v_f32m2_m(...) __riscv_vsse32_v_f32m2_m(__VA_ARGS__)

#define	vsse32_v_f32m4(...) __riscv_vsse32_v_f32m4(__VA_ARGS__)

#define	vsse32_v_f32m4_m(...) __riscv_vsse32_v_f32m4_m(__VA_ARGS__)

#define	vsse32_v_f32m8(...) __riscv_vsse32_v_f32m8(__VA_ARGS__)

#define	vsse32_v_f32m8_m(...) __riscv_vsse32_v_f32m8_m(__VA_ARGS__)

#define	vsse32_v_f32mf2(...) __riscv_vsse32_v_f32mf2(__VA_ARGS__)

#define	vsse32_v_f32mf2_m(...) __riscv_vsse32_v_f32mf2_m(__VA_ARGS__)

#define	vsse32_v_i32m1(...) __riscv_vsse32_v_i32m1(__VA_ARGS__)

#define	vsse32_v_i32m1_m(...) __riscv_vsse32_v_i32m1_m(__VA_ARGS__)

#define	vsse32_v_i32m2(...) __riscv_vsse32_v_i32m2(__VA_ARGS__)

#define	vsse32_v_i32m2_m(...) __riscv_vsse32_v_i32m2_m(__VA_ARGS__)

#define	vsse32_v_i32m4(...) __riscv_vsse32_v_i32m4(__VA_ARGS__)

#define	vsse32_v_i32m4_m(...) __riscv_vsse32_v_i32m4_m(__VA_ARGS__)

#define	vsse32_v_i32m8(...) __riscv_vsse32_v_i32m8(__VA_ARGS__)

#define	vsse32_v_i32m8_m(...) __riscv_vsse32_v_i32m8_m(__VA_ARGS__)

#define	vsse32_v_i32mf2(...) __riscv_vsse32_v_i32mf2(__VA_ARGS__)

#define	vsse32_v_i32mf2_m(...) __riscv_vsse32_v_i32mf2_m(__VA_ARGS__)

#define	vsse32_v_u32m1(...) __riscv_vsse32_v_u32m1(__VA_ARGS__)

#define	vsse32_v_u32m1_m(...) __riscv_vsse32_v_u32m1_m(__VA_ARGS__)

#define	vsse32_v_u32m2(...) __riscv_vsse32_v_u32m2(__VA_ARGS__)

#define	vsse32_v_u32m2_m(...) __riscv_vsse32_v_u32m2_m(__VA_ARGS__)

#define	vsse32_v_u32m4(...) __riscv_vsse32_v_u32m4(__VA_ARGS__)

#define	vsse32_v_u32m4_m(...) __riscv_vsse32_v_u32m4_m(__VA_ARGS__)

#define	vsse32_v_u32m8(...) __riscv_vsse32_v_u32m8(__VA_ARGS__)

#define	vsse32_v_u32m8_m(...) __riscv_vsse32_v_u32m8_m(__VA_ARGS__)

#define	vsse32_v_u32mf2(...) __riscv_vsse32_v_u32mf2(__VA_ARGS__)

#define	vsse32_v_u32mf2_m(...) __riscv_vsse32_v_u32mf2_m(__VA_ARGS__)

#define	vsse64_v_f64m1(...) __riscv_vsse64_v_f64m1(__VA_ARGS__)

#define	vsse64_v_f64m1_m(...) __riscv_vsse64_v_f64m1_m(__VA_ARGS__)

#define	vsse64_v_f64m2(...) __riscv_vsse64_v_f64m2(__VA_ARGS__)

#define	vsse64_v_f64m2_m(...) __riscv_vsse64_v_f64m2_m(__VA_ARGS__)

#define	vsse64_v_f64m4(...) __riscv_vsse64_v_f64m4(__VA_ARGS__)

#define	vsse64_v_f64m4_m(...) __riscv_vsse64_v_f64m4_m(__VA_ARGS__)

#define	vsse64_v_f64m8(...) __riscv_vsse64_v_f64m8(__VA_ARGS__)

#define	vsse64_v_f64m8_m(...) __riscv_vsse64_v_f64m8_m(__VA_ARGS__)

#define	vsse64_v_i64m1(...) __riscv_vsse64_v_i64m1(__VA_ARGS__)

#define	vsse64_v_i64m1_m(...) __riscv_vsse64_v_i64m1_m(__VA_ARGS__)

#define	vsse64_v_i64m2(...) __riscv_vsse64_v_i64m2(__VA_ARGS__)

#define	vsse64_v_i64m2_m(...) __riscv_vsse64_v_i64m2_m(__VA_ARGS__)

#define	vsse64_v_i64m4(...) __riscv_vsse64_v_i64m4(__VA_ARGS__)

#define	vsse64_v_i64m4_m(...) __riscv_vsse64_v_i64m4_m(__VA_ARGS__)

#define	vsse64_v_i64m8(...) __riscv_vsse64_v_i64m8(__VA_ARGS__)

#define	vsse64_v_i64m8_m(...) __riscv_vsse64_v_i64m8_m(__VA_ARGS__)

#define	vsse64_v_u64m1(...) __riscv_vsse64_v_u64m1(__VA_ARGS__)

#define	vsse64_v_u64m1_m(...) __riscv_vsse64_v_u64m1_m(__VA_ARGS__)

#define	vsse64_v_u64m2(...) __riscv_vsse64_v_u64m2(__VA_ARGS__)

#define	vsse64_v_u64m2_m(...) __riscv_vsse64_v_u64m2_m(__VA_ARGS__)

#define	vsse64_v_u64m4(...) __riscv_vsse64_v_u64m4(__VA_ARGS__)

#define	vsse64_v_u64m4_m(...) __riscv_vsse64_v_u64m4_m(__VA_ARGS__)

#define	vsse64_v_u64m8(...) __riscv_vsse64_v_u64m8(__VA_ARGS__)

#define	vsse64_v_u64m8_m(...) __riscv_vsse64_v_u64m8_m(__VA_ARGS__)

#define	vsse8_v_i8m1(...) __riscv_vsse8_v_i8m1(__VA_ARGS__)

#define	vsse8_v_i8m1_m(...) __riscv_vsse8_v_i8m1_m(__VA_ARGS__)

#define	vsse8_v_i8m2(...) __riscv_vsse8_v_i8m2(__VA_ARGS__)

#define	vsse8_v_i8m2_m(...) __riscv_vsse8_v_i8m2_m(__VA_ARGS__)

#define	vsse8_v_i8m4(...) __riscv_vsse8_v_i8m4(__VA_ARGS__)

#define	vsse8_v_i8m4_m(...) __riscv_vsse8_v_i8m4_m(__VA_ARGS__)

#define	vsse8_v_i8m8(...) __riscv_vsse8_v_i8m8(__VA_ARGS__)

#define	vsse8_v_i8m8_m(...) __riscv_vsse8_v_i8m8_m(__VA_ARGS__)

#define	vsse8_v_i8mf2(...) __riscv_vsse8_v_i8mf2(__VA_ARGS__)

#define	vsse8_v_i8mf2_m(...) __riscv_vsse8_v_i8mf2_m(__VA_ARGS__)

#define	vsse8_v_i8mf4(...) __riscv_vsse8_v_i8mf4(__VA_ARGS__)

#define	vsse8_v_i8mf4_m(...) __riscv_vsse8_v_i8mf4_m(__VA_ARGS__)

#define	vsse8_v_i8mf8(...) __riscv_vsse8_v_i8mf8(__VA_ARGS__)

#define	vsse8_v_i8mf8_m(...) __riscv_vsse8_v_i8mf8_m(__VA_ARGS__)

#define	vsse8_v_u8m1(...) __riscv_vsse8_v_u8m1(__VA_ARGS__)

#define	vsse8_v_u8m1_m(...) __riscv_vsse8_v_u8m1_m(__VA_ARGS__)

#define	vsse8_v_u8m2(...) __riscv_vsse8_v_u8m2(__VA_ARGS__)

#define	vsse8_v_u8m2_m(...) __riscv_vsse8_v_u8m2_m(__VA_ARGS__)

#define	vsse8_v_u8m4(...) __riscv_vsse8_v_u8m4(__VA_ARGS__)

#define	vsse8_v_u8m4_m(...) __riscv_vsse8_v_u8m4_m(__VA_ARGS__)

#define	vsse8_v_u8m8(...) __riscv_vsse8_v_u8m8(__VA_ARGS__)

#define	vsse8_v_u8m8_m(...) __riscv_vsse8_v_u8m8_m(__VA_ARGS__)

#define	vsse8_v_u8mf2(...) __riscv_vsse8_v_u8mf2(__VA_ARGS__)

#define	vsse8_v_u8mf2_m(...) __riscv_vsse8_v_u8mf2_m(__VA_ARGS__)

#define	vsse8_v_u8mf4(...) __riscv_vsse8_v_u8mf4(__VA_ARGS__)

#define	vsse8_v_u8mf4_m(...) __riscv_vsse8_v_u8mf4_m(__VA_ARGS__)

#define	vsse8_v_u8mf8(...) __riscv_vsse8_v_u8mf8(__VA_ARGS__)

#define	vsse8_v_u8mf8_m(...) __riscv_vsse8_v_u8mf8_m(__VA_ARGS__)

#define	vsseg2e16_v_f16m1(...) __riscv_vsseg2e16_v_f16m1(__VA_ARGS__)

#define	vsseg2e16_v_f16m1_m(...) __riscv_vsseg2e16_v_f16m1_m(__VA_ARGS__)

#define	vsseg2e16_v_f16m2(...) __riscv_vsseg2e16_v_f16m2(__VA_ARGS__)

#define	vsseg2e16_v_f16m2_m(...) __riscv_vsseg2e16_v_f16m2_m(__VA_ARGS__)

#define	vsseg2e16_v_f16m4(...) __riscv_vsseg2e16_v_f16m4(__VA_ARGS__)

#define	vsseg2e16_v_f16m4_m(...) __riscv_vsseg2e16_v_f16m4_m(__VA_ARGS__)

#define	vsseg2e16_v_f16mf2(...) __riscv_vsseg2e16_v_f16mf2(__VA_ARGS__)

#define	vsseg2e16_v_f16mf2_m(...) __riscv_vsseg2e16_v_f16mf2_m(__VA_ARGS__)

#define	vsseg2e16_v_f16mf4(...) __riscv_vsseg2e16_v_f16mf4(__VA_ARGS__)

#define	vsseg2e16_v_f16mf4_m(...) __riscv_vsseg2e16_v_f16mf4_m(__VA_ARGS__)

#define	vsseg2e16_v_i16m1(...) __riscv_vsseg2e16_v_i16m1(__VA_ARGS__)

#define	vsseg2e16_v_i16m1_m(...) __riscv_vsseg2e16_v_i16m1_m(__VA_ARGS__)

#define	vsseg2e16_v_i16m2(...) __riscv_vsseg2e16_v_i16m2(__VA_ARGS__)

#define	vsseg2e16_v_i16m2_m(...) __riscv_vsseg2e16_v_i16m2_m(__VA_ARGS__)

#define	vsseg2e16_v_i16m4(...) __riscv_vsseg2e16_v_i16m4(__VA_ARGS__)

#define	vsseg2e16_v_i16m4_m(...) __riscv_vsseg2e16_v_i16m4_m(__VA_ARGS__)

#define	vsseg2e16_v_i16mf2(...) __riscv_vsseg2e16_v_i16mf2(__VA_ARGS__)

#define	vsseg2e16_v_i16mf2_m(...) __riscv_vsseg2e16_v_i16mf2_m(__VA_ARGS__)

#define	vsseg2e16_v_i16mf4(...) __riscv_vsseg2e16_v_i16mf4(__VA_ARGS__)

#define	vsseg2e16_v_i16mf4_m(...) __riscv_vsseg2e16_v_i16mf4_m(__VA_ARGS__)

#define	vsseg2e16_v_u16m1(...) __riscv_vsseg2e16_v_u16m1(__VA_ARGS__)

#define	vsseg2e16_v_u16m1_m(...) __riscv_vsseg2e16_v_u16m1_m(__VA_ARGS__)

#define	vsseg2e16_v_u16m2(...) __riscv_vsseg2e16_v_u16m2(__VA_ARGS__)

#define	vsseg2e16_v_u16m2_m(...) __riscv_vsseg2e16_v_u16m2_m(__VA_ARGS__)

#define	vsseg2e16_v_u16m4(...) __riscv_vsseg2e16_v_u16m4(__VA_ARGS__)

#define	vsseg2e16_v_u16m4_m(...) __riscv_vsseg2e16_v_u16m4_m(__VA_ARGS__)

#define	vsseg2e16_v_u16mf2(...) __riscv_vsseg2e16_v_u16mf2(__VA_ARGS__)

#define	vsseg2e16_v_u16mf2_m(...) __riscv_vsseg2e16_v_u16mf2_m(__VA_ARGS__)

#define	vsseg2e16_v_u16mf4(...) __riscv_vsseg2e16_v_u16mf4(__VA_ARGS__)

#define	vsseg2e16_v_u16mf4_m(...) __riscv_vsseg2e16_v_u16mf4_m(__VA_ARGS__)

#define	vsseg2e32_v_f32m1(...) __riscv_vsseg2e32_v_f32m1(__VA_ARGS__)

#define	vsseg2e32_v_f32m1_m(...) __riscv_vsseg2e32_v_f32m1_m(__VA_ARGS__)

#define	vsseg2e32_v_f32m2(...) __riscv_vsseg2e32_v_f32m2(__VA_ARGS__)

#define	vsseg2e32_v_f32m2_m(...) __riscv_vsseg2e32_v_f32m2_m(__VA_ARGS__)

#define	vsseg2e32_v_f32m4(...) __riscv_vsseg2e32_v_f32m4(__VA_ARGS__)

#define	vsseg2e32_v_f32m4_m(...) __riscv_vsseg2e32_v_f32m4_m(__VA_ARGS__)

#define	vsseg2e32_v_f32mf2(...) __riscv_vsseg2e32_v_f32mf2(__VA_ARGS__)

#define	vsseg2e32_v_f32mf2_m(...) __riscv_vsseg2e32_v_f32mf2_m(__VA_ARGS__)

#define	vsseg2e32_v_i32m1(...) __riscv_vsseg2e32_v_i32m1(__VA_ARGS__)

#define	vsseg2e32_v_i32m1_m(...) __riscv_vsseg2e32_v_i32m1_m(__VA_ARGS__)

#define	vsseg2e32_v_i32m2(...) __riscv_vsseg2e32_v_i32m2(__VA_ARGS__)

#define	vsseg2e32_v_i32m2_m(...) __riscv_vsseg2e32_v_i32m2_m(__VA_ARGS__)

#define	vsseg2e32_v_i32m4(...) __riscv_vsseg2e32_v_i32m4(__VA_ARGS__)

#define	vsseg2e32_v_i32m4_m(...) __riscv_vsseg2e32_v_i32m4_m(__VA_ARGS__)

#define	vsseg2e32_v_i32mf2(...) __riscv_vsseg2e32_v_i32mf2(__VA_ARGS__)

#define	vsseg2e32_v_i32mf2_m(...) __riscv_vsseg2e32_v_i32mf2_m(__VA_ARGS__)

#define	vsseg2e32_v_u32m1(...) __riscv_vsseg2e32_v_u32m1(__VA_ARGS__)

#define	vsseg2e32_v_u32m1_m(...) __riscv_vsseg2e32_v_u32m1_m(__VA_ARGS__)

#define	vsseg2e32_v_u32m2(...) __riscv_vsseg2e32_v_u32m2(__VA_ARGS__)

#define	vsseg2e32_v_u32m2_m(...) __riscv_vsseg2e32_v_u32m2_m(__VA_ARGS__)

#define	vsseg2e32_v_u32m4(...) __riscv_vsseg2e32_v_u32m4(__VA_ARGS__)

#define	vsseg2e32_v_u32m4_m(...) __riscv_vsseg2e32_v_u32m4_m(__VA_ARGS__)

#define	vsseg2e32_v_u32mf2(...) __riscv_vsseg2e32_v_u32mf2(__VA_ARGS__)

#define	vsseg2e32_v_u32mf2_m(...) __riscv_vsseg2e32_v_u32mf2_m(__VA_ARGS__)

#define	vsseg2e64_v_f64m1(...) __riscv_vsseg2e64_v_f64m1(__VA_ARGS__)

#define	vsseg2e64_v_f64m1_m(...) __riscv_vsseg2e64_v_f64m1_m(__VA_ARGS__)

#define	vsseg2e64_v_f64m2(...) __riscv_vsseg2e64_v_f64m2(__VA_ARGS__)

#define	vsseg2e64_v_f64m2_m(...) __riscv_vsseg2e64_v_f64m2_m(__VA_ARGS__)

#define	vsseg2e64_v_f64m4(...) __riscv_vsseg2e64_v_f64m4(__VA_ARGS__)

#define	vsseg2e64_v_f64m4_m(...) __riscv_vsseg2e64_v_f64m4_m(__VA_ARGS__)

#define	vsseg2e64_v_i64m1(...) __riscv_vsseg2e64_v_i64m1(__VA_ARGS__)

#define	vsseg2e64_v_i64m1_m(...) __riscv_vsseg2e64_v_i64m1_m(__VA_ARGS__)

#define	vsseg2e64_v_i64m2(...) __riscv_vsseg2e64_v_i64m2(__VA_ARGS__)

#define	vsseg2e64_v_i64m2_m(...) __riscv_vsseg2e64_v_i64m2_m(__VA_ARGS__)

#define	vsseg2e64_v_i64m4(...) __riscv_vsseg2e64_v_i64m4(__VA_ARGS__)

#define	vsseg2e64_v_i64m4_m(...) __riscv_vsseg2e64_v_i64m4_m(__VA_ARGS__)

#define	vsseg2e64_v_u64m1(...) __riscv_vsseg2e64_v_u64m1(__VA_ARGS__)

#define	vsseg2e64_v_u64m1_m(...) __riscv_vsseg2e64_v_u64m1_m(__VA_ARGS__)

#define	vsseg2e64_v_u64m2(...) __riscv_vsseg2e64_v_u64m2(__VA_ARGS__)

#define	vsseg2e64_v_u64m2_m(...) __riscv_vsseg2e64_v_u64m2_m(__VA_ARGS__)

#define	vsseg2e64_v_u64m4(...) __riscv_vsseg2e64_v_u64m4(__VA_ARGS__)

#define	vsseg2e64_v_u64m4_m(...) __riscv_vsseg2e64_v_u64m4_m(__VA_ARGS__)

#define	vsseg2e8_v_i8m1(...) __riscv_vsseg2e8_v_i8m1(__VA_ARGS__)

#define	vsseg2e8_v_i8m1_m(...) __riscv_vsseg2e8_v_i8m1_m(__VA_ARGS__)

#define	vsseg2e8_v_i8m2(...) __riscv_vsseg2e8_v_i8m2(__VA_ARGS__)

#define	vsseg2e8_v_i8m2_m(...) __riscv_vsseg2e8_v_i8m2_m(__VA_ARGS__)

#define	vsseg2e8_v_i8m4(...) __riscv_vsseg2e8_v_i8m4(__VA_ARGS__)

#define	vsseg2e8_v_i8m4_m(...) __riscv_vsseg2e8_v_i8m4_m(__VA_ARGS__)

#define	vsseg2e8_v_i8mf2(...) __riscv_vsseg2e8_v_i8mf2(__VA_ARGS__)

#define	vsseg2e8_v_i8mf2_m(...) __riscv_vsseg2e8_v_i8mf2_m(__VA_ARGS__)

#define	vsseg2e8_v_i8mf4(...) __riscv_vsseg2e8_v_i8mf4(__VA_ARGS__)

#define	vsseg2e8_v_i8mf4_m(...) __riscv_vsseg2e8_v_i8mf4_m(__VA_ARGS__)

#define	vsseg2e8_v_i8mf8(...) __riscv_vsseg2e8_v_i8mf8(__VA_ARGS__)

#define	vsseg2e8_v_i8mf8_m(...) __riscv_vsseg2e8_v_i8mf8_m(__VA_ARGS__)

#define	vsseg2e8_v_u8m1(...) __riscv_vsseg2e8_v_u8m1(__VA_ARGS__)

#define	vsseg2e8_v_u8m1_m(...) __riscv_vsseg2e8_v_u8m1_m(__VA_ARGS__)

#define	vsseg2e8_v_u8m2(...) __riscv_vsseg2e8_v_u8m2(__VA_ARGS__)

#define	vsseg2e8_v_u8m2_m(...) __riscv_vsseg2e8_v_u8m2_m(__VA_ARGS__)

#define	vsseg2e8_v_u8m4(...) __riscv_vsseg2e8_v_u8m4(__VA_ARGS__)

#define	vsseg2e8_v_u8m4_m(...) __riscv_vsseg2e8_v_u8m4_m(__VA_ARGS__)

#define	vsseg2e8_v_u8mf2(...) __riscv_vsseg2e8_v_u8mf2(__VA_ARGS__)

#define	vsseg2e8_v_u8mf2_m(...) __riscv_vsseg2e8_v_u8mf2_m(__VA_ARGS__)

#define	vsseg2e8_v_u8mf4(...) __riscv_vsseg2e8_v_u8mf4(__VA_ARGS__)

#define	vsseg2e8_v_u8mf4_m(...) __riscv_vsseg2e8_v_u8mf4_m(__VA_ARGS__)

#define	vsseg2e8_v_u8mf8(...) __riscv_vsseg2e8_v_u8mf8(__VA_ARGS__)

#define	vsseg2e8_v_u8mf8_m(...) __riscv_vsseg2e8_v_u8mf8_m(__VA_ARGS__)

#define	vsseg3e16_v_f16m1(...) __riscv_vsseg3e16_v_f16m1(__VA_ARGS__)

#define	vsseg3e16_v_f16m1_m(...) __riscv_vsseg3e16_v_f16m1_m(__VA_ARGS__)

#define	vsseg3e16_v_f16m2(...) __riscv_vsseg3e16_v_f16m2(__VA_ARGS__)

#define	vsseg3e16_v_f16m2_m(...) __riscv_vsseg3e16_v_f16m2_m(__VA_ARGS__)

#define	vsseg3e16_v_f16mf2(...) __riscv_vsseg3e16_v_f16mf2(__VA_ARGS__)

#define	vsseg3e16_v_f16mf2_m(...) __riscv_vsseg3e16_v_f16mf2_m(__VA_ARGS__)

#define	vsseg3e16_v_f16mf4(...) __riscv_vsseg3e16_v_f16mf4(__VA_ARGS__)

#define	vsseg3e16_v_f16mf4_m(...) __riscv_vsseg3e16_v_f16mf4_m(__VA_ARGS__)

#define	vsseg3e16_v_i16m1(...) __riscv_vsseg3e16_v_i16m1(__VA_ARGS__)

#define	vsseg3e16_v_i16m1_m(...) __riscv_vsseg3e16_v_i16m1_m(__VA_ARGS__)

#define	vsseg3e16_v_i16m2(...) __riscv_vsseg3e16_v_i16m2(__VA_ARGS__)

#define	vsseg3e16_v_i16m2_m(...) __riscv_vsseg3e16_v_i16m2_m(__VA_ARGS__)

#define	vsseg3e16_v_i16mf2(...) __riscv_vsseg3e16_v_i16mf2(__VA_ARGS__)

#define	vsseg3e16_v_i16mf2_m(...) __riscv_vsseg3e16_v_i16mf2_m(__VA_ARGS__)

#define	vsseg3e16_v_i16mf4(...) __riscv_vsseg3e16_v_i16mf4(__VA_ARGS__)

#define	vsseg3e16_v_i16mf4_m(...) __riscv_vsseg3e16_v_i16mf4_m(__VA_ARGS__)

#define	vsseg3e16_v_u16m1(...) __riscv_vsseg3e16_v_u16m1(__VA_ARGS__)

#define	vsseg3e16_v_u16m1_m(...) __riscv_vsseg3e16_v_u16m1_m(__VA_ARGS__)

#define	vsseg3e16_v_u16m2(...) __riscv_vsseg3e16_v_u16m2(__VA_ARGS__)

#define	vsseg3e16_v_u16m2_m(...) __riscv_vsseg3e16_v_u16m2_m(__VA_ARGS__)

#define	vsseg3e16_v_u16mf2(...) __riscv_vsseg3e16_v_u16mf2(__VA_ARGS__)

#define	vsseg3e16_v_u16mf2_m(...) __riscv_vsseg3e16_v_u16mf2_m(__VA_ARGS__)

#define	vsseg3e16_v_u16mf4(...) __riscv_vsseg3e16_v_u16mf4(__VA_ARGS__)

#define	vsseg3e16_v_u16mf4_m(...) __riscv_vsseg3e16_v_u16mf4_m(__VA_ARGS__)

#define	vsseg3e32_v_f32m1(...) __riscv_vsseg3e32_v_f32m1(__VA_ARGS__)

#define	vsseg3e32_v_f32m1_m(...) __riscv_vsseg3e32_v_f32m1_m(__VA_ARGS__)

#define	vsseg3e32_v_f32m2(...) __riscv_vsseg3e32_v_f32m2(__VA_ARGS__)

#define	vsseg3e32_v_f32m2_m(...) __riscv_vsseg3e32_v_f32m2_m(__VA_ARGS__)

#define	vsseg3e32_v_f32mf2(...) __riscv_vsseg3e32_v_f32mf2(__VA_ARGS__)

#define	vsseg3e32_v_f32mf2_m(...) __riscv_vsseg3e32_v_f32mf2_m(__VA_ARGS__)

#define	vsseg3e32_v_i32m1(...) __riscv_vsseg3e32_v_i32m1(__VA_ARGS__)

#define	vsseg3e32_v_i32m1_m(...) __riscv_vsseg3e32_v_i32m1_m(__VA_ARGS__)

#define	vsseg3e32_v_i32m2(...) __riscv_vsseg3e32_v_i32m2(__VA_ARGS__)

#define	vsseg3e32_v_i32m2_m(...) __riscv_vsseg3e32_v_i32m2_m(__VA_ARGS__)

#define	vsseg3e32_v_i32mf2(...) __riscv_vsseg3e32_v_i32mf2(__VA_ARGS__)

#define	vsseg3e32_v_i32mf2_m(...) __riscv_vsseg3e32_v_i32mf2_m(__VA_ARGS__)

#define	vsseg3e32_v_u32m1(...) __riscv_vsseg3e32_v_u32m1(__VA_ARGS__)

#define	vsseg3e32_v_u32m1_m(...) __riscv_vsseg3e32_v_u32m1_m(__VA_ARGS__)

#define	vsseg3e32_v_u32m2(...) __riscv_vsseg3e32_v_u32m2(__VA_ARGS__)

#define	vsseg3e32_v_u32m2_m(...) __riscv_vsseg3e32_v_u32m2_m(__VA_ARGS__)

#define	vsseg3e32_v_u32mf2(...) __riscv_vsseg3e32_v_u32mf2(__VA_ARGS__)

#define	vsseg3e32_v_u32mf2_m(...) __riscv_vsseg3e32_v_u32mf2_m(__VA_ARGS__)

#define	vsseg3e64_v_f64m1(...) __riscv_vsseg3e64_v_f64m1(__VA_ARGS__)

#define	vsseg3e64_v_f64m1_m(...) __riscv_vsseg3e64_v_f64m1_m(__VA_ARGS__)

#define	vsseg3e64_v_f64m2(...) __riscv_vsseg3e64_v_f64m2(__VA_ARGS__)

#define	vsseg3e64_v_f64m2_m(...) __riscv_vsseg3e64_v_f64m2_m(__VA_ARGS__)

#define	vsseg3e64_v_i64m1(...) __riscv_vsseg3e64_v_i64m1(__VA_ARGS__)

#define	vsseg3e64_v_i64m1_m(...) __riscv_vsseg3e64_v_i64m1_m(__VA_ARGS__)

#define	vsseg3e64_v_i64m2(...) __riscv_vsseg3e64_v_i64m2(__VA_ARGS__)

#define	vsseg3e64_v_i64m2_m(...) __riscv_vsseg3e64_v_i64m2_m(__VA_ARGS__)

#define	vsseg3e64_v_u64m1(...) __riscv_vsseg3e64_v_u64m1(__VA_ARGS__)

#define	vsseg3e64_v_u64m1_m(...) __riscv_vsseg3e64_v_u64m1_m(__VA_ARGS__)

#define	vsseg3e64_v_u64m2(...) __riscv_vsseg3e64_v_u64m2(__VA_ARGS__)

#define	vsseg3e64_v_u64m2_m(...) __riscv_vsseg3e64_v_u64m2_m(__VA_ARGS__)

#define	vsseg3e8_v_i8m1(...) __riscv_vsseg3e8_v_i8m1(__VA_ARGS__)

#define	vsseg3e8_v_i8m1_m(...) __riscv_vsseg3e8_v_i8m1_m(__VA_ARGS__)

#define	vsseg3e8_v_i8m2(...) __riscv_vsseg3e8_v_i8m2(__VA_ARGS__)

#define	vsseg3e8_v_i8m2_m(...) __riscv_vsseg3e8_v_i8m2_m(__VA_ARGS__)

#define	vsseg3e8_v_i8mf2(...) __riscv_vsseg3e8_v_i8mf2(__VA_ARGS__)

#define	vsseg3e8_v_i8mf2_m(...) __riscv_vsseg3e8_v_i8mf2_m(__VA_ARGS__)

#define	vsseg3e8_v_i8mf4(...) __riscv_vsseg3e8_v_i8mf4(__VA_ARGS__)

#define	vsseg3e8_v_i8mf4_m(...) __riscv_vsseg3e8_v_i8mf4_m(__VA_ARGS__)

#define	vsseg3e8_v_i8mf8(...) __riscv_vsseg3e8_v_i8mf8(__VA_ARGS__)

#define	vsseg3e8_v_i8mf8_m(...) __riscv_vsseg3e8_v_i8mf8_m(__VA_ARGS__)

#define	vsseg3e8_v_u8m1(...) __riscv_vsseg3e8_v_u8m1(__VA_ARGS__)

#define	vsseg3e8_v_u8m1_m(...) __riscv_vsseg3e8_v_u8m1_m(__VA_ARGS__)

#define	vsseg3e8_v_u8m2(...) __riscv_vsseg3e8_v_u8m2(__VA_ARGS__)

#define	vsseg3e8_v_u8m2_m(...) __riscv_vsseg3e8_v_u8m2_m(__VA_ARGS__)

#define	vsseg3e8_v_u8mf2(...) __riscv_vsseg3e8_v_u8mf2(__VA_ARGS__)

#define	vsseg3e8_v_u8mf2_m(...) __riscv_vsseg3e8_v_u8mf2_m(__VA_ARGS__)

#define	vsseg3e8_v_u8mf4(...) __riscv_vsseg3e8_v_u8mf4(__VA_ARGS__)

#define	vsseg3e8_v_u8mf4_m(...) __riscv_vsseg3e8_v_u8mf4_m(__VA_ARGS__)

#define	vsseg3e8_v_u8mf8(...) __riscv_vsseg3e8_v_u8mf8(__VA_ARGS__)

#define	vsseg3e8_v_u8mf8_m(...) __riscv_vsseg3e8_v_u8mf8_m(__VA_ARGS__)

#define	vsseg4e16_v_f16m1(...) __riscv_vsseg4e16_v_f16m1(__VA_ARGS__)

#define	vsseg4e16_v_f16m1_m(...) __riscv_vsseg4e16_v_f16m1_m(__VA_ARGS__)

#define	vsseg4e16_v_f16m2(...) __riscv_vsseg4e16_v_f16m2(__VA_ARGS__)

#define	vsseg4e16_v_f16m2_m(...) __riscv_vsseg4e16_v_f16m2_m(__VA_ARGS__)

#define	vsseg4e16_v_f16mf2(...) __riscv_vsseg4e16_v_f16mf2(__VA_ARGS__)

#define	vsseg4e16_v_f16mf2_m(...) __riscv_vsseg4e16_v_f16mf2_m(__VA_ARGS__)

#define	vsseg4e16_v_f16mf4(...) __riscv_vsseg4e16_v_f16mf4(__VA_ARGS__)

#define	vsseg4e16_v_f16mf4_m(...) __riscv_vsseg4e16_v_f16mf4_m(__VA_ARGS__)

#define	vsseg4e16_v_i16m1(...) __riscv_vsseg4e16_v_i16m1(__VA_ARGS__)

#define	vsseg4e16_v_i16m1_m(...) __riscv_vsseg4e16_v_i16m1_m(__VA_ARGS__)

#define	vsseg4e16_v_i16m2(...) __riscv_vsseg4e16_v_i16m2(__VA_ARGS__)

#define	vsseg4e16_v_i16m2_m(...) __riscv_vsseg4e16_v_i16m2_m(__VA_ARGS__)

#define	vsseg4e16_v_i16mf2(...) __riscv_vsseg4e16_v_i16mf2(__VA_ARGS__)

#define	vsseg4e16_v_i16mf2_m(...) __riscv_vsseg4e16_v_i16mf2_m(__VA_ARGS__)

#define	vsseg4e16_v_i16mf4(...) __riscv_vsseg4e16_v_i16mf4(__VA_ARGS__)

#define	vsseg4e16_v_i16mf4_m(...) __riscv_vsseg4e16_v_i16mf4_m(__VA_ARGS__)

#define	vsseg4e16_v_u16m1(...) __riscv_vsseg4e16_v_u16m1(__VA_ARGS__)

#define	vsseg4e16_v_u16m1_m(...) __riscv_vsseg4e16_v_u16m1_m(__VA_ARGS__)

#define	vsseg4e16_v_u16m2(...) __riscv_vsseg4e16_v_u16m2(__VA_ARGS__)

#define	vsseg4e16_v_u16m2_m(...) __riscv_vsseg4e16_v_u16m2_m(__VA_ARGS__)

#define	vsseg4e16_v_u16mf2(...) __riscv_vsseg4e16_v_u16mf2(__VA_ARGS__)

#define	vsseg4e16_v_u16mf2_m(...) __riscv_vsseg4e16_v_u16mf2_m(__VA_ARGS__)

#define	vsseg4e16_v_u16mf4(...) __riscv_vsseg4e16_v_u16mf4(__VA_ARGS__)

#define	vsseg4e16_v_u16mf4_m(...) __riscv_vsseg4e16_v_u16mf4_m(__VA_ARGS__)

#define	vsseg4e32_v_f32m1(...) __riscv_vsseg4e32_v_f32m1(__VA_ARGS__)

#define	vsseg4e32_v_f32m1_m(...) __riscv_vsseg4e32_v_f32m1_m(__VA_ARGS__)

#define	vsseg4e32_v_f32m2(...) __riscv_vsseg4e32_v_f32m2(__VA_ARGS__)

#define	vsseg4e32_v_f32m2_m(...) __riscv_vsseg4e32_v_f32m2_m(__VA_ARGS__)

#define	vsseg4e32_v_f32mf2(...) __riscv_vsseg4e32_v_f32mf2(__VA_ARGS__)

#define	vsseg4e32_v_f32mf2_m(...) __riscv_vsseg4e32_v_f32mf2_m(__VA_ARGS__)

#define	vsseg4e32_v_i32m1(...) __riscv_vsseg4e32_v_i32m1(__VA_ARGS__)

#define	vsseg4e32_v_i32m1_m(...) __riscv_vsseg4e32_v_i32m1_m(__VA_ARGS__)

#define	vsseg4e32_v_i32m2(...) __riscv_vsseg4e32_v_i32m2(__VA_ARGS__)

#define	vsseg4e32_v_i32m2_m(...) __riscv_vsseg4e32_v_i32m2_m(__VA_ARGS__)

#define	vsseg4e32_v_i32mf2(...) __riscv_vsseg4e32_v_i32mf2(__VA_ARGS__)

#define	vsseg4e32_v_i32mf2_m(...) __riscv_vsseg4e32_v_i32mf2_m(__VA_ARGS__)

#define	vsseg4e32_v_u32m1(...) __riscv_vsseg4e32_v_u32m1(__VA_ARGS__)

#define	vsseg4e32_v_u32m1_m(...) __riscv_vsseg4e32_v_u32m1_m(__VA_ARGS__)

#define	vsseg4e32_v_u32m2(...) __riscv_vsseg4e32_v_u32m2(__VA_ARGS__)

#define	vsseg4e32_v_u32m2_m(...) __riscv_vsseg4e32_v_u32m2_m(__VA_ARGS__)

#define	vsseg4e32_v_u32mf2(...) __riscv_vsseg4e32_v_u32mf2(__VA_ARGS__)

#define	vsseg4e32_v_u32mf2_m(...) __riscv_vsseg4e32_v_u32mf2_m(__VA_ARGS__)

#define	vsseg4e64_v_f64m1(...) __riscv_vsseg4e64_v_f64m1(__VA_ARGS__)

#define	vsseg4e64_v_f64m1_m(...) __riscv_vsseg4e64_v_f64m1_m(__VA_ARGS__)

#define	vsseg4e64_v_f64m2(...) __riscv_vsseg4e64_v_f64m2(__VA_ARGS__)

#define	vsseg4e64_v_f64m2_m(...) __riscv_vsseg4e64_v_f64m2_m(__VA_ARGS__)

#define	vsseg4e64_v_i64m1(...) __riscv_vsseg4e64_v_i64m1(__VA_ARGS__)

#define	vsseg4e64_v_i64m1_m(...) __riscv_vsseg4e64_v_i64m1_m(__VA_ARGS__)

#define	vsseg4e64_v_i64m2(...) __riscv_vsseg4e64_v_i64m2(__VA_ARGS__)

#define	vsseg4e64_v_i64m2_m(...) __riscv_vsseg4e64_v_i64m2_m(__VA_ARGS__)

#define	vsseg4e64_v_u64m1(...) __riscv_vsseg4e64_v_u64m1(__VA_ARGS__)

#define	vsseg4e64_v_u64m1_m(...) __riscv_vsseg4e64_v_u64m1_m(__VA_ARGS__)

#define	vsseg4e64_v_u64m2(...) __riscv_vsseg4e64_v_u64m2(__VA_ARGS__)

#define	vsseg4e64_v_u64m2_m(...) __riscv_vsseg4e64_v_u64m2_m(__VA_ARGS__)

#define	vsseg4e8_v_i8m1(...) __riscv_vsseg4e8_v_i8m1(__VA_ARGS__)

#define	vsseg4e8_v_i8m1_m(...) __riscv_vsseg4e8_v_i8m1_m(__VA_ARGS__)

#define	vsseg4e8_v_i8m2(...) __riscv_vsseg4e8_v_i8m2(__VA_ARGS__)

#define	vsseg4e8_v_i8m2_m(...) __riscv_vsseg4e8_v_i8m2_m(__VA_ARGS__)

#define	vsseg4e8_v_i8mf2(...) __riscv_vsseg4e8_v_i8mf2(__VA_ARGS__)

#define	vsseg4e8_v_i8mf2_m(...) __riscv_vsseg4e8_v_i8mf2_m(__VA_ARGS__)

#define	vsseg4e8_v_i8mf4(...) __riscv_vsseg4e8_v_i8mf4(__VA_ARGS__)

#define	vsseg4e8_v_i8mf4_m(...) __riscv_vsseg4e8_v_i8mf4_m(__VA_ARGS__)

#define	vsseg4e8_v_i8mf8(...) __riscv_vsseg4e8_v_i8mf8(__VA_ARGS__)

#define	vsseg4e8_v_i8mf8_m(...) __riscv_vsseg4e8_v_i8mf8_m(__VA_ARGS__)

#define	vsseg4e8_v_u8m1(...) __riscv_vsseg4e8_v_u8m1(__VA_ARGS__)

#define	vsseg4e8_v_u8m1_m(...) __riscv_vsseg4e8_v_u8m1_m(__VA_ARGS__)

#define	vsseg4e8_v_u8m2(...) __riscv_vsseg4e8_v_u8m2(__VA_ARGS__)

#define	vsseg4e8_v_u8m2_m(...) __riscv_vsseg4e8_v_u8m2_m(__VA_ARGS__)

#define	vsseg4e8_v_u8mf2(...) __riscv_vsseg4e8_v_u8mf2(__VA_ARGS__)

#define	vsseg4e8_v_u8mf2_m(...) __riscv_vsseg4e8_v_u8mf2_m(__VA_ARGS__)

#define	vsseg4e8_v_u8mf4(...) __riscv_vsseg4e8_v_u8mf4(__VA_ARGS__)

#define	vsseg4e8_v_u8mf4_m(...) __riscv_vsseg4e8_v_u8mf4_m(__VA_ARGS__)

#define	vsseg4e8_v_u8mf8(...) __riscv_vsseg4e8_v_u8mf8(__VA_ARGS__)

#define	vsseg4e8_v_u8mf8_m(...) __riscv_vsseg4e8_v_u8mf8_m(__VA_ARGS__)

#define	vsseg5e16_v_f16m1(...) __riscv_vsseg5e16_v_f16m1(__VA_ARGS__)

#define	vsseg5e16_v_f16m1_m(...) __riscv_vsseg5e16_v_f16m1_m(__VA_ARGS__)

#define	vsseg5e16_v_f16mf2(...) __riscv_vsseg5e16_v_f16mf2(__VA_ARGS__)

#define	vsseg5e16_v_f16mf2_m(...) __riscv_vsseg5e16_v_f16mf2_m(__VA_ARGS__)

#define	vsseg5e16_v_f16mf4(...) __riscv_vsseg5e16_v_f16mf4(__VA_ARGS__)

#define	vsseg5e16_v_f16mf4_m(...) __riscv_vsseg5e16_v_f16mf4_m(__VA_ARGS__)

#define	vsseg5e16_v_i16m1(...) __riscv_vsseg5e16_v_i16m1(__VA_ARGS__)

#define	vsseg5e16_v_i16m1_m(...) __riscv_vsseg5e16_v_i16m1_m(__VA_ARGS__)

#define	vsseg5e16_v_i16mf2(...) __riscv_vsseg5e16_v_i16mf2(__VA_ARGS__)

#define	vsseg5e16_v_i16mf2_m(...) __riscv_vsseg5e16_v_i16mf2_m(__VA_ARGS__)

#define	vsseg5e16_v_i16mf4(...) __riscv_vsseg5e16_v_i16mf4(__VA_ARGS__)

#define	vsseg5e16_v_i16mf4_m(...) __riscv_vsseg5e16_v_i16mf4_m(__VA_ARGS__)

#define	vsseg5e16_v_u16m1(...) __riscv_vsseg5e16_v_u16m1(__VA_ARGS__)

#define	vsseg5e16_v_u16m1_m(...) __riscv_vsseg5e16_v_u16m1_m(__VA_ARGS__)

#define	vsseg5e16_v_u16mf2(...) __riscv_vsseg5e16_v_u16mf2(__VA_ARGS__)

#define	vsseg5e16_v_u16mf2_m(...) __riscv_vsseg5e16_v_u16mf2_m(__VA_ARGS__)

#define	vsseg5e16_v_u16mf4(...) __riscv_vsseg5e16_v_u16mf4(__VA_ARGS__)

#define	vsseg5e16_v_u16mf4_m(...) __riscv_vsseg5e16_v_u16mf4_m(__VA_ARGS__)

#define	vsseg5e32_v_f32m1(...) __riscv_vsseg5e32_v_f32m1(__VA_ARGS__)

#define	vsseg5e32_v_f32m1_m(...) __riscv_vsseg5e32_v_f32m1_m(__VA_ARGS__)

#define	vsseg5e32_v_f32mf2(...) __riscv_vsseg5e32_v_f32mf2(__VA_ARGS__)

#define	vsseg5e32_v_f32mf2_m(...) __riscv_vsseg5e32_v_f32mf2_m(__VA_ARGS__)

#define	vsseg5e32_v_i32m1(...) __riscv_vsseg5e32_v_i32m1(__VA_ARGS__)

#define	vsseg5e32_v_i32m1_m(...) __riscv_vsseg5e32_v_i32m1_m(__VA_ARGS__)

#define	vsseg5e32_v_i32mf2(...) __riscv_vsseg5e32_v_i32mf2(__VA_ARGS__)

#define	vsseg5e32_v_i32mf2_m(...) __riscv_vsseg5e32_v_i32mf2_m(__VA_ARGS__)

#define	vsseg5e32_v_u32m1(...) __riscv_vsseg5e32_v_u32m1(__VA_ARGS__)

#define	vsseg5e32_v_u32m1_m(...) __riscv_vsseg5e32_v_u32m1_m(__VA_ARGS__)

#define	vsseg5e32_v_u32mf2(...) __riscv_vsseg5e32_v_u32mf2(__VA_ARGS__)

#define	vsseg5e32_v_u32mf2_m(...) __riscv_vsseg5e32_v_u32mf2_m(__VA_ARGS__)

#define	vsseg5e64_v_f64m1(...) __riscv_vsseg5e64_v_f64m1(__VA_ARGS__)

#define	vsseg5e64_v_f64m1_m(...) __riscv_vsseg5e64_v_f64m1_m(__VA_ARGS__)

#define	vsseg5e64_v_i64m1(...) __riscv_vsseg5e64_v_i64m1(__VA_ARGS__)

#define	vsseg5e64_v_i64m1_m(...) __riscv_vsseg5e64_v_i64m1_m(__VA_ARGS__)

#define	vsseg5e64_v_u64m1(...) __riscv_vsseg5e64_v_u64m1(__VA_ARGS__)

#define	vsseg5e64_v_u64m1_m(...) __riscv_vsseg5e64_v_u64m1_m(__VA_ARGS__)

#define	vsseg5e8_v_i8m1(...) __riscv_vsseg5e8_v_i8m1(__VA_ARGS__)

#define	vsseg5e8_v_i8m1_m(...) __riscv_vsseg5e8_v_i8m1_m(__VA_ARGS__)

#define	vsseg5e8_v_i8mf2(...) __riscv_vsseg5e8_v_i8mf2(__VA_ARGS__)

#define	vsseg5e8_v_i8mf2_m(...) __riscv_vsseg5e8_v_i8mf2_m(__VA_ARGS__)

#define	vsseg5e8_v_i8mf4(...) __riscv_vsseg5e8_v_i8mf4(__VA_ARGS__)

#define	vsseg5e8_v_i8mf4_m(...) __riscv_vsseg5e8_v_i8mf4_m(__VA_ARGS__)

#define	vsseg5e8_v_i8mf8(...) __riscv_vsseg5e8_v_i8mf8(__VA_ARGS__)

#define	vsseg5e8_v_i8mf8_m(...) __riscv_vsseg5e8_v_i8mf8_m(__VA_ARGS__)

#define	vsseg5e8_v_u8m1(...) __riscv_vsseg5e8_v_u8m1(__VA_ARGS__)

#define	vsseg5e8_v_u8m1_m(...) __riscv_vsseg5e8_v_u8m1_m(__VA_ARGS__)

#define	vsseg5e8_v_u8mf2(...) __riscv_vsseg5e8_v_u8mf2(__VA_ARGS__)

#define	vsseg5e8_v_u8mf2_m(...) __riscv_vsseg5e8_v_u8mf2_m(__VA_ARGS__)

#define	vsseg5e8_v_u8mf4(...) __riscv_vsseg5e8_v_u8mf4(__VA_ARGS__)

#define	vsseg5e8_v_u8mf4_m(...) __riscv_vsseg5e8_v_u8mf4_m(__VA_ARGS__)

#define	vsseg5e8_v_u8mf8(...) __riscv_vsseg5e8_v_u8mf8(__VA_ARGS__)

#define	vsseg5e8_v_u8mf8_m(...) __riscv_vsseg5e8_v_u8mf8_m(__VA_ARGS__)

#define	vsseg6e16_v_f16m1(...) __riscv_vsseg6e16_v_f16m1(__VA_ARGS__)

#define	vsseg6e16_v_f16m1_m(...) __riscv_vsseg6e16_v_f16m1_m(__VA_ARGS__)

#define	vsseg6e16_v_f16mf2(...) __riscv_vsseg6e16_v_f16mf2(__VA_ARGS__)

#define	vsseg6e16_v_f16mf2_m(...) __riscv_vsseg6e16_v_f16mf2_m(__VA_ARGS__)

#define	vsseg6e16_v_f16mf4(...) __riscv_vsseg6e16_v_f16mf4(__VA_ARGS__)

#define	vsseg6e16_v_f16mf4_m(...) __riscv_vsseg6e16_v_f16mf4_m(__VA_ARGS__)

#define	vsseg6e16_v_i16m1(...) __riscv_vsseg6e16_v_i16m1(__VA_ARGS__)

#define	vsseg6e16_v_i16m1_m(...) __riscv_vsseg6e16_v_i16m1_m(__VA_ARGS__)

#define	vsseg6e16_v_i16mf2(...) __riscv_vsseg6e16_v_i16mf2(__VA_ARGS__)

#define	vsseg6e16_v_i16mf2_m(...) __riscv_vsseg6e16_v_i16mf2_m(__VA_ARGS__)

#define	vsseg6e16_v_i16mf4(...) __riscv_vsseg6e16_v_i16mf4(__VA_ARGS__)

#define	vsseg6e16_v_i16mf4_m(...) __riscv_vsseg6e16_v_i16mf4_m(__VA_ARGS__)

#define	vsseg6e16_v_u16m1(...) __riscv_vsseg6e16_v_u16m1(__VA_ARGS__)

#define	vsseg6e16_v_u16m1_m(...) __riscv_vsseg6e16_v_u16m1_m(__VA_ARGS__)

#define	vsseg6e16_v_u16mf2(...) __riscv_vsseg6e16_v_u16mf2(__VA_ARGS__)

#define	vsseg6e16_v_u16mf2_m(...) __riscv_vsseg6e16_v_u16mf2_m(__VA_ARGS__)

#define	vsseg6e16_v_u16mf4(...) __riscv_vsseg6e16_v_u16mf4(__VA_ARGS__)

#define	vsseg6e16_v_u16mf4_m(...) __riscv_vsseg6e16_v_u16mf4_m(__VA_ARGS__)

#define	vsseg6e32_v_f32m1(...) __riscv_vsseg6e32_v_f32m1(__VA_ARGS__)

#define	vsseg6e32_v_f32m1_m(...) __riscv_vsseg6e32_v_f32m1_m(__VA_ARGS__)

#define	vsseg6e32_v_f32mf2(...) __riscv_vsseg6e32_v_f32mf2(__VA_ARGS__)

#define	vsseg6e32_v_f32mf2_m(...) __riscv_vsseg6e32_v_f32mf2_m(__VA_ARGS__)

#define	vsseg6e32_v_i32m1(...) __riscv_vsseg6e32_v_i32m1(__VA_ARGS__)

#define	vsseg6e32_v_i32m1_m(...) __riscv_vsseg6e32_v_i32m1_m(__VA_ARGS__)

#define	vsseg6e32_v_i32mf2(...) __riscv_vsseg6e32_v_i32mf2(__VA_ARGS__)

#define	vsseg6e32_v_i32mf2_m(...) __riscv_vsseg6e32_v_i32mf2_m(__VA_ARGS__)

#define	vsseg6e32_v_u32m1(...) __riscv_vsseg6e32_v_u32m1(__VA_ARGS__)

#define	vsseg6e32_v_u32m1_m(...) __riscv_vsseg6e32_v_u32m1_m(__VA_ARGS__)

#define	vsseg6e32_v_u32mf2(...) __riscv_vsseg6e32_v_u32mf2(__VA_ARGS__)

#define	vsseg6e32_v_u32mf2_m(...) __riscv_vsseg6e32_v_u32mf2_m(__VA_ARGS__)

#define	vsseg6e64_v_f64m1(...) __riscv_vsseg6e64_v_f64m1(__VA_ARGS__)

#define	vsseg6e64_v_f64m1_m(...) __riscv_vsseg6e64_v_f64m1_m(__VA_ARGS__)

#define	vsseg6e64_v_i64m1(...) __riscv_vsseg6e64_v_i64m1(__VA_ARGS__)

#define	vsseg6e64_v_i64m1_m(...) __riscv_vsseg6e64_v_i64m1_m(__VA_ARGS__)

#define	vsseg6e64_v_u64m1(...) __riscv_vsseg6e64_v_u64m1(__VA_ARGS__)

#define	vsseg6e64_v_u64m1_m(...) __riscv_vsseg6e64_v_u64m1_m(__VA_ARGS__)

#define	vsseg6e8_v_i8m1(...) __riscv_vsseg6e8_v_i8m1(__VA_ARGS__)

#define	vsseg6e8_v_i8m1_m(...) __riscv_vsseg6e8_v_i8m1_m(__VA_ARGS__)

#define	vsseg6e8_v_i8mf2(...) __riscv_vsseg6e8_v_i8mf2(__VA_ARGS__)

#define	vsseg6e8_v_i8mf2_m(...) __riscv_vsseg6e8_v_i8mf2_m(__VA_ARGS__)

#define	vsseg6e8_v_i8mf4(...) __riscv_vsseg6e8_v_i8mf4(__VA_ARGS__)

#define	vsseg6e8_v_i8mf4_m(...) __riscv_vsseg6e8_v_i8mf4_m(__VA_ARGS__)

#define	vsseg6e8_v_i8mf8(...) __riscv_vsseg6e8_v_i8mf8(__VA_ARGS__)

#define	vsseg6e8_v_i8mf8_m(...) __riscv_vsseg6e8_v_i8mf8_m(__VA_ARGS__)

#define	vsseg6e8_v_u8m1(...) __riscv_vsseg6e8_v_u8m1(__VA_ARGS__)

#define	vsseg6e8_v_u8m1_m(...) __riscv_vsseg6e8_v_u8m1_m(__VA_ARGS__)

#define	vsseg6e8_v_u8mf2(...) __riscv_vsseg6e8_v_u8mf2(__VA_ARGS__)

#define	vsseg6e8_v_u8mf2_m(...) __riscv_vsseg6e8_v_u8mf2_m(__VA_ARGS__)

#define	vsseg6e8_v_u8mf4(...) __riscv_vsseg6e8_v_u8mf4(__VA_ARGS__)

#define	vsseg6e8_v_u8mf4_m(...) __riscv_vsseg6e8_v_u8mf4_m(__VA_ARGS__)

#define	vsseg6e8_v_u8mf8(...) __riscv_vsseg6e8_v_u8mf8(__VA_ARGS__)

#define	vsseg6e8_v_u8mf8_m(...) __riscv_vsseg6e8_v_u8mf8_m(__VA_ARGS__)

#define	vsseg7e16_v_f16m1(...) __riscv_vsseg7e16_v_f16m1(__VA_ARGS__)

#define	vsseg7e16_v_f16m1_m(...) __riscv_vsseg7e16_v_f16m1_m(__VA_ARGS__)

#define	vsseg7e16_v_f16mf2(...) __riscv_vsseg7e16_v_f16mf2(__VA_ARGS__)

#define	vsseg7e16_v_f16mf2_m(...) __riscv_vsseg7e16_v_f16mf2_m(__VA_ARGS__)

#define	vsseg7e16_v_f16mf4(...) __riscv_vsseg7e16_v_f16mf4(__VA_ARGS__)

#define	vsseg7e16_v_f16mf4_m(...) __riscv_vsseg7e16_v_f16mf4_m(__VA_ARGS__)

#define	vsseg7e16_v_i16m1(...) __riscv_vsseg7e16_v_i16m1(__VA_ARGS__)

#define	vsseg7e16_v_i16m1_m(...) __riscv_vsseg7e16_v_i16m1_m(__VA_ARGS__)

#define	vsseg7e16_v_i16mf2(...) __riscv_vsseg7e16_v_i16mf2(__VA_ARGS__)

#define	vsseg7e16_v_i16mf2_m(...) __riscv_vsseg7e16_v_i16mf2_m(__VA_ARGS__)

#define	vsseg7e16_v_i16mf4(...) __riscv_vsseg7e16_v_i16mf4(__VA_ARGS__)

#define	vsseg7e16_v_i16mf4_m(...) __riscv_vsseg7e16_v_i16mf4_m(__VA_ARGS__)

#define	vsseg7e16_v_u16m1(...) __riscv_vsseg7e16_v_u16m1(__VA_ARGS__)

#define	vsseg7e16_v_u16m1_m(...) __riscv_vsseg7e16_v_u16m1_m(__VA_ARGS__)

#define	vsseg7e16_v_u16mf2(...) __riscv_vsseg7e16_v_u16mf2(__VA_ARGS__)

#define	vsseg7e16_v_u16mf2_m(...) __riscv_vsseg7e16_v_u16mf2_m(__VA_ARGS__)

#define	vsseg7e16_v_u16mf4(...) __riscv_vsseg7e16_v_u16mf4(__VA_ARGS__)

#define	vsseg7e16_v_u16mf4_m(...) __riscv_vsseg7e16_v_u16mf4_m(__VA_ARGS__)

#define	vsseg7e32_v_f32m1(...) __riscv_vsseg7e32_v_f32m1(__VA_ARGS__)

#define	vsseg7e32_v_f32m1_m(...) __riscv_vsseg7e32_v_f32m1_m(__VA_ARGS__)

#define	vsseg7e32_v_f32mf2(...) __riscv_vsseg7e32_v_f32mf2(__VA_ARGS__)

#define	vsseg7e32_v_f32mf2_m(...) __riscv_vsseg7e32_v_f32mf2_m(__VA_ARGS__)

#define	vsseg7e32_v_i32m1(...) __riscv_vsseg7e32_v_i32m1(__VA_ARGS__)

#define	vsseg7e32_v_i32m1_m(...) __riscv_vsseg7e32_v_i32m1_m(__VA_ARGS__)

#define	vsseg7e32_v_i32mf2(...) __riscv_vsseg7e32_v_i32mf2(__VA_ARGS__)

#define	vsseg7e32_v_i32mf2_m(...) __riscv_vsseg7e32_v_i32mf2_m(__VA_ARGS__)

#define	vsseg7e32_v_u32m1(...) __riscv_vsseg7e32_v_u32m1(__VA_ARGS__)

#define	vsseg7e32_v_u32m1_m(...) __riscv_vsseg7e32_v_u32m1_m(__VA_ARGS__)

#define	vsseg7e32_v_u32mf2(...) __riscv_vsseg7e32_v_u32mf2(__VA_ARGS__)

#define	vsseg7e32_v_u32mf2_m(...) __riscv_vsseg7e32_v_u32mf2_m(__VA_ARGS__)

#define	vsseg7e64_v_f64m1(...) __riscv_vsseg7e64_v_f64m1(__VA_ARGS__)

#define	vsseg7e64_v_f64m1_m(...) __riscv_vsseg7e64_v_f64m1_m(__VA_ARGS__)

#define	vsseg7e64_v_i64m1(...) __riscv_vsseg7e64_v_i64m1(__VA_ARGS__)

#define	vsseg7e64_v_i64m1_m(...) __riscv_vsseg7e64_v_i64m1_m(__VA_ARGS__)

#define	vsseg7e64_v_u64m1(...) __riscv_vsseg7e64_v_u64m1(__VA_ARGS__)

#define	vsseg7e64_v_u64m1_m(...) __riscv_vsseg7e64_v_u64m1_m(__VA_ARGS__)

#define	vsseg7e8_v_i8m1(...) __riscv_vsseg7e8_v_i8m1(__VA_ARGS__)

#define	vsseg7e8_v_i8m1_m(...) __riscv_vsseg7e8_v_i8m1_m(__VA_ARGS__)

#define	vsseg7e8_v_i8mf2(...) __riscv_vsseg7e8_v_i8mf2(__VA_ARGS__)

#define	vsseg7e8_v_i8mf2_m(...) __riscv_vsseg7e8_v_i8mf2_m(__VA_ARGS__)

#define	vsseg7e8_v_i8mf4(...) __riscv_vsseg7e8_v_i8mf4(__VA_ARGS__)

#define	vsseg7e8_v_i8mf4_m(...) __riscv_vsseg7e8_v_i8mf4_m(__VA_ARGS__)

#define	vsseg7e8_v_i8mf8(...) __riscv_vsseg7e8_v_i8mf8(__VA_ARGS__)

#define	vsseg7e8_v_i8mf8_m(...) __riscv_vsseg7e8_v_i8mf8_m(__VA_ARGS__)

#define	vsseg7e8_v_u8m1(...) __riscv_vsseg7e8_v_u8m1(__VA_ARGS__)

#define	vsseg7e8_v_u8m1_m(...) __riscv_vsseg7e8_v_u8m1_m(__VA_ARGS__)

#define	vsseg7e8_v_u8mf2(...) __riscv_vsseg7e8_v_u8mf2(__VA_ARGS__)

#define	vsseg7e8_v_u8mf2_m(...) __riscv_vsseg7e8_v_u8mf2_m(__VA_ARGS__)

#define	vsseg7e8_v_u8mf4(...) __riscv_vsseg7e8_v_u8mf4(__VA_ARGS__)

#define	vsseg7e8_v_u8mf4_m(...) __riscv_vsseg7e8_v_u8mf4_m(__VA_ARGS__)

#define	vsseg7e8_v_u8mf8(...) __riscv_vsseg7e8_v_u8mf8(__VA_ARGS__)

#define	vsseg7e8_v_u8mf8_m(...) __riscv_vsseg7e8_v_u8mf8_m(__VA_ARGS__)

#define	vsseg8e16_v_f16m1(...) __riscv_vsseg8e16_v_f16m1(__VA_ARGS__)

#define	vsseg8e16_v_f16m1_m(...) __riscv_vsseg8e16_v_f16m1_m(__VA_ARGS__)

#define	vsseg8e16_v_f16mf2(...) __riscv_vsseg8e16_v_f16mf2(__VA_ARGS__)

#define	vsseg8e16_v_f16mf2_m(...) __riscv_vsseg8e16_v_f16mf2_m(__VA_ARGS__)

#define	vsseg8e16_v_f16mf4(...) __riscv_vsseg8e16_v_f16mf4(__VA_ARGS__)

#define	vsseg8e16_v_f16mf4_m(...) __riscv_vsseg8e16_v_f16mf4_m(__VA_ARGS__)

#define	vsseg8e16_v_i16m1(...) __riscv_vsseg8e16_v_i16m1(__VA_ARGS__)

#define	vsseg8e16_v_i16m1_m(...) __riscv_vsseg8e16_v_i16m1_m(__VA_ARGS__)

#define	vsseg8e16_v_i16mf2(...) __riscv_vsseg8e16_v_i16mf2(__VA_ARGS__)

#define	vsseg8e16_v_i16mf2_m(...) __riscv_vsseg8e16_v_i16mf2_m(__VA_ARGS__)

#define	vsseg8e16_v_i16mf4(...) __riscv_vsseg8e16_v_i16mf4(__VA_ARGS__)

#define	vsseg8e16_v_i16mf4_m(...) __riscv_vsseg8e16_v_i16mf4_m(__VA_ARGS__)

#define	vsseg8e16_v_u16m1(...) __riscv_vsseg8e16_v_u16m1(__VA_ARGS__)

#define	vsseg8e16_v_u16m1_m(...) __riscv_vsseg8e16_v_u16m1_m(__VA_ARGS__)

#define	vsseg8e16_v_u16mf2(...) __riscv_vsseg8e16_v_u16mf2(__VA_ARGS__)

#define	vsseg8e16_v_u16mf2_m(...) __riscv_vsseg8e16_v_u16mf2_m(__VA_ARGS__)

#define	vsseg8e16_v_u16mf4(...) __riscv_vsseg8e16_v_u16mf4(__VA_ARGS__)

#define	vsseg8e16_v_u16mf4_m(...) __riscv_vsseg8e16_v_u16mf4_m(__VA_ARGS__)

#define	vsseg8e32_v_f32m1(...) __riscv_vsseg8e32_v_f32m1(__VA_ARGS__)

#define	vsseg8e32_v_f32m1_m(...) __riscv_vsseg8e32_v_f32m1_m(__VA_ARGS__)

#define	vsseg8e32_v_f32mf2(...) __riscv_vsseg8e32_v_f32mf2(__VA_ARGS__)

#define	vsseg8e32_v_f32mf2_m(...) __riscv_vsseg8e32_v_f32mf2_m(__VA_ARGS__)

#define	vsseg8e32_v_i32m1(...) __riscv_vsseg8e32_v_i32m1(__VA_ARGS__)

#define	vsseg8e32_v_i32m1_m(...) __riscv_vsseg8e32_v_i32m1_m(__VA_ARGS__)

#define	vsseg8e32_v_i32mf2(...) __riscv_vsseg8e32_v_i32mf2(__VA_ARGS__)

#define	vsseg8e32_v_i32mf2_m(...) __riscv_vsseg8e32_v_i32mf2_m(__VA_ARGS__)

#define	vsseg8e32_v_u32m1(...) __riscv_vsseg8e32_v_u32m1(__VA_ARGS__)

#define	vsseg8e32_v_u32m1_m(...) __riscv_vsseg8e32_v_u32m1_m(__VA_ARGS__)

#define	vsseg8e32_v_u32mf2(...) __riscv_vsseg8e32_v_u32mf2(__VA_ARGS__)

#define	vsseg8e32_v_u32mf2_m(...) __riscv_vsseg8e32_v_u32mf2_m(__VA_ARGS__)

#define	vsseg8e64_v_f64m1(...) __riscv_vsseg8e64_v_f64m1(__VA_ARGS__)

#define	vsseg8e64_v_f64m1_m(...) __riscv_vsseg8e64_v_f64m1_m(__VA_ARGS__)

#define	vsseg8e64_v_i64m1(...) __riscv_vsseg8e64_v_i64m1(__VA_ARGS__)

#define	vsseg8e64_v_i64m1_m(...) __riscv_vsseg8e64_v_i64m1_m(__VA_ARGS__)

#define	vsseg8e64_v_u64m1(...) __riscv_vsseg8e64_v_u64m1(__VA_ARGS__)

#define	vsseg8e64_v_u64m1_m(...) __riscv_vsseg8e64_v_u64m1_m(__VA_ARGS__)

#define	vsseg8e8_v_i8m1(...) __riscv_vsseg8e8_v_i8m1(__VA_ARGS__)

#define	vsseg8e8_v_i8m1_m(...) __riscv_vsseg8e8_v_i8m1_m(__VA_ARGS__)

#define	vsseg8e8_v_i8mf2(...) __riscv_vsseg8e8_v_i8mf2(__VA_ARGS__)

#define	vsseg8e8_v_i8mf2_m(...) __riscv_vsseg8e8_v_i8mf2_m(__VA_ARGS__)

#define	vsseg8e8_v_i8mf4(...) __riscv_vsseg8e8_v_i8mf4(__VA_ARGS__)

#define	vsseg8e8_v_i8mf4_m(...) __riscv_vsseg8e8_v_i8mf4_m(__VA_ARGS__)

#define	vsseg8e8_v_i8mf8(...) __riscv_vsseg8e8_v_i8mf8(__VA_ARGS__)

#define	vsseg8e8_v_i8mf8_m(...) __riscv_vsseg8e8_v_i8mf8_m(__VA_ARGS__)

#define	vsseg8e8_v_u8m1(...) __riscv_vsseg8e8_v_u8m1(__VA_ARGS__)

#define	vsseg8e8_v_u8m1_m(...) __riscv_vsseg8e8_v_u8m1_m(__VA_ARGS__)

#define	vsseg8e8_v_u8mf2(...) __riscv_vsseg8e8_v_u8mf2(__VA_ARGS__)

#define	vsseg8e8_v_u8mf2_m(...) __riscv_vsseg8e8_v_u8mf2_m(__VA_ARGS__)

#define	vsseg8e8_v_u8mf4(...) __riscv_vsseg8e8_v_u8mf4(__VA_ARGS__)

#define	vsseg8e8_v_u8mf4_m(...) __riscv_vsseg8e8_v_u8mf4_m(__VA_ARGS__)

#define	vsseg8e8_v_u8mf8(...) __riscv_vsseg8e8_v_u8mf8(__VA_ARGS__)

#define	vsseg8e8_v_u8mf8_m(...) __riscv_vsseg8e8_v_u8mf8_m(__VA_ARGS__)

#define	vssra_vv_i16m1(...) __riscv_vssra_vv_i16m1(__VA_ARGS__)

#define	vssra_vv_i16m1_m(...) __riscv_vssra_vv_i16m1_tumu(__VA_ARGS__)

#define	vssra_vv_i16m2(...) __riscv_vssra_vv_i16m2(__VA_ARGS__)

#define	vssra_vv_i16m2_m(...) __riscv_vssra_vv_i16m2_tumu(__VA_ARGS__)

#define	vssra_vv_i16m4(...) __riscv_vssra_vv_i16m4(__VA_ARGS__)

#define	vssra_vv_i16m4_m(...) __riscv_vssra_vv_i16m4_tumu(__VA_ARGS__)

#define	vssra_vv_i16m8(...) __riscv_vssra_vv_i16m8(__VA_ARGS__)

#define	vssra_vv_i16m8_m(...) __riscv_vssra_vv_i16m8_tumu(__VA_ARGS__)

#define	vssra_vv_i16mf2(...) __riscv_vssra_vv_i16mf2(__VA_ARGS__)

#define	vssra_vv_i16mf2_m(...) __riscv_vssra_vv_i16mf2_tumu(__VA_ARGS__)

#define	vssra_vv_i16mf4(...) __riscv_vssra_vv_i16mf4(__VA_ARGS__)

#define	vssra_vv_i16mf4_m(...) __riscv_vssra_vv_i16mf4_tumu(__VA_ARGS__)

#define	vssra_vv_i32m1(...) __riscv_vssra_vv_i32m1(__VA_ARGS__)

#define	vssra_vv_i32m1_m(...) __riscv_vssra_vv_i32m1_tumu(__VA_ARGS__)

#define	vssra_vv_i32m2(...) __riscv_vssra_vv_i32m2(__VA_ARGS__)

#define	vssra_vv_i32m2_m(...) __riscv_vssra_vv_i32m2_tumu(__VA_ARGS__)

#define	vssra_vv_i32m4(...) __riscv_vssra_vv_i32m4(__VA_ARGS__)

#define	vssra_vv_i32m4_m(...) __riscv_vssra_vv_i32m4_tumu(__VA_ARGS__)

#define	vssra_vv_i32m8(...) __riscv_vssra_vv_i32m8(__VA_ARGS__)

#define	vssra_vv_i32m8_m(...) __riscv_vssra_vv_i32m8_tumu(__VA_ARGS__)

#define	vssra_vv_i32mf2(...) __riscv_vssra_vv_i32mf2(__VA_ARGS__)

#define	vssra_vv_i32mf2_m(...) __riscv_vssra_vv_i32mf2_tumu(__VA_ARGS__)

#define	vssra_vv_i64m1(...) __riscv_vssra_vv_i64m1(__VA_ARGS__)

#define	vssra_vv_i64m1_m(...) __riscv_vssra_vv_i64m1_tumu(__VA_ARGS__)

#define	vssra_vv_i64m2(...) __riscv_vssra_vv_i64m2(__VA_ARGS__)

#define	vssra_vv_i64m2_m(...) __riscv_vssra_vv_i64m2_tumu(__VA_ARGS__)

#define	vssra_vv_i64m4(...) __riscv_vssra_vv_i64m4(__VA_ARGS__)

#define	vssra_vv_i64m4_m(...) __riscv_vssra_vv_i64m4_tumu(__VA_ARGS__)

#define	vssra_vv_i64m8(...) __riscv_vssra_vv_i64m8(__VA_ARGS__)

#define	vssra_vv_i64m8_m(...) __riscv_vssra_vv_i64m8_tumu(__VA_ARGS__)

#define	vssra_vv_i8m1(...) __riscv_vssra_vv_i8m1(__VA_ARGS__)

#define	vssra_vv_i8m1_m(...) __riscv_vssra_vv_i8m1_tumu(__VA_ARGS__)

#define	vssra_vv_i8m2(...) __riscv_vssra_vv_i8m2(__VA_ARGS__)

#define	vssra_vv_i8m2_m(...) __riscv_vssra_vv_i8m2_tumu(__VA_ARGS__)

#define	vssra_vv_i8m4(...) __riscv_vssra_vv_i8m4(__VA_ARGS__)

#define	vssra_vv_i8m4_m(...) __riscv_vssra_vv_i8m4_tumu(__VA_ARGS__)

#define	vssra_vv_i8m8(...) __riscv_vssra_vv_i8m8(__VA_ARGS__)

#define	vssra_vv_i8m8_m(...) __riscv_vssra_vv_i8m8_tumu(__VA_ARGS__)

#define	vssra_vv_i8mf2(...) __riscv_vssra_vv_i8mf2(__VA_ARGS__)

#define	vssra_vv_i8mf2_m(...) __riscv_vssra_vv_i8mf2_tumu(__VA_ARGS__)

#define	vssra_vv_i8mf4(...) __riscv_vssra_vv_i8mf4(__VA_ARGS__)

#define	vssra_vv_i8mf4_m(...) __riscv_vssra_vv_i8mf4_tumu(__VA_ARGS__)

#define	vssra_vv_i8mf8(...) __riscv_vssra_vv_i8mf8(__VA_ARGS__)

#define	vssra_vv_i8mf8_m(...) __riscv_vssra_vv_i8mf8_tumu(__VA_ARGS__)

#define	vssra_vx_i16m1(...) __riscv_vssra_vx_i16m1(__VA_ARGS__)

#define	vssra_vx_i16m1_m(...) __riscv_vssra_vx_i16m1_tumu(__VA_ARGS__)

#define	vssra_vx_i16m2(...) __riscv_vssra_vx_i16m2(__VA_ARGS__)

#define	vssra_vx_i16m2_m(...) __riscv_vssra_vx_i16m2_tumu(__VA_ARGS__)

#define	vssra_vx_i16m4(...) __riscv_vssra_vx_i16m4(__VA_ARGS__)

#define	vssra_vx_i16m4_m(...) __riscv_vssra_vx_i16m4_tumu(__VA_ARGS__)

#define	vssra_vx_i16m8(...) __riscv_vssra_vx_i16m8(__VA_ARGS__)

#define	vssra_vx_i16m8_m(...) __riscv_vssra_vx_i16m8_tumu(__VA_ARGS__)

#define	vssra_vx_i16mf2(...) __riscv_vssra_vx_i16mf2(__VA_ARGS__)

#define	vssra_vx_i16mf2_m(...) __riscv_vssra_vx_i16mf2_tumu(__VA_ARGS__)

#define	vssra_vx_i16mf4(...) __riscv_vssra_vx_i16mf4(__VA_ARGS__)

#define	vssra_vx_i16mf4_m(...) __riscv_vssra_vx_i16mf4_tumu(__VA_ARGS__)

#define	vssra_vx_i32m1(...) __riscv_vssra_vx_i32m1(__VA_ARGS__)

#define	vssra_vx_i32m1_m(...) __riscv_vssra_vx_i32m1_tumu(__VA_ARGS__)

#define	vssra_vx_i32m2(...) __riscv_vssra_vx_i32m2(__VA_ARGS__)

#define	vssra_vx_i32m2_m(...) __riscv_vssra_vx_i32m2_tumu(__VA_ARGS__)

#define	vssra_vx_i32m4(...) __riscv_vssra_vx_i32m4(__VA_ARGS__)

#define	vssra_vx_i32m4_m(...) __riscv_vssra_vx_i32m4_tumu(__VA_ARGS__)

#define	vssra_vx_i32m8(...) __riscv_vssra_vx_i32m8(__VA_ARGS__)

#define	vssra_vx_i32m8_m(...) __riscv_vssra_vx_i32m8_tumu(__VA_ARGS__)

#define	vssra_vx_i32mf2(...) __riscv_vssra_vx_i32mf2(__VA_ARGS__)

#define	vssra_vx_i32mf2_m(...) __riscv_vssra_vx_i32mf2_tumu(__VA_ARGS__)

#define	vssra_vx_i64m1(...) __riscv_vssra_vx_i64m1(__VA_ARGS__)

#define	vssra_vx_i64m1_m(...) __riscv_vssra_vx_i64m1_tumu(__VA_ARGS__)

#define	vssra_vx_i64m2(...) __riscv_vssra_vx_i64m2(__VA_ARGS__)

#define	vssra_vx_i64m2_m(...) __riscv_vssra_vx_i64m2_tumu(__VA_ARGS__)

#define	vssra_vx_i64m4(...) __riscv_vssra_vx_i64m4(__VA_ARGS__)

#define	vssra_vx_i64m4_m(...) __riscv_vssra_vx_i64m4_tumu(__VA_ARGS__)

#define	vssra_vx_i64m8(...) __riscv_vssra_vx_i64m8(__VA_ARGS__)

#define	vssra_vx_i64m8_m(...) __riscv_vssra_vx_i64m8_tumu(__VA_ARGS__)

#define	vssra_vx_i8m1(...) __riscv_vssra_vx_i8m1(__VA_ARGS__)

#define	vssra_vx_i8m1_m(...) __riscv_vssra_vx_i8m1_tumu(__VA_ARGS__)

#define	vssra_vx_i8m2(...) __riscv_vssra_vx_i8m2(__VA_ARGS__)

#define	vssra_vx_i8m2_m(...) __riscv_vssra_vx_i8m2_tumu(__VA_ARGS__)

#define	vssra_vx_i8m4(...) __riscv_vssra_vx_i8m4(__VA_ARGS__)

#define	vssra_vx_i8m4_m(...) __riscv_vssra_vx_i8m4_tumu(__VA_ARGS__)

#define	vssra_vx_i8m8(...) __riscv_vssra_vx_i8m8(__VA_ARGS__)

#define	vssra_vx_i8m8_m(...) __riscv_vssra_vx_i8m8_tumu(__VA_ARGS__)

#define	vssra_vx_i8mf2(...) __riscv_vssra_vx_i8mf2(__VA_ARGS__)

#define	vssra_vx_i8mf2_m(...) __riscv_vssra_vx_i8mf2_tumu(__VA_ARGS__)

#define	vssra_vx_i8mf4(...) __riscv_vssra_vx_i8mf4(__VA_ARGS__)

#define	vssra_vx_i8mf4_m(...) __riscv_vssra_vx_i8mf4_tumu(__VA_ARGS__)

#define	vssra_vx_i8mf8(...) __riscv_vssra_vx_i8mf8(__VA_ARGS__)

#define	vssra_vx_i8mf8_m(...) __riscv_vssra_vx_i8mf8_tumu(__VA_ARGS__)

#define	vssrl_vv_u16m1(...) __riscv_vssrl_vv_u16m1(__VA_ARGS__)

#define	vssrl_vv_u16m1_m(...) __riscv_vssrl_vv_u16m1_tumu(__VA_ARGS__)

#define	vssrl_vv_u16m2(...) __riscv_vssrl_vv_u16m2(__VA_ARGS__)

#define	vssrl_vv_u16m2_m(...) __riscv_vssrl_vv_u16m2_tumu(__VA_ARGS__)

#define	vssrl_vv_u16m4(...) __riscv_vssrl_vv_u16m4(__VA_ARGS__)

#define	vssrl_vv_u16m4_m(...) __riscv_vssrl_vv_u16m4_tumu(__VA_ARGS__)

#define	vssrl_vv_u16m8(...) __riscv_vssrl_vv_u16m8(__VA_ARGS__)

#define	vssrl_vv_u16m8_m(...) __riscv_vssrl_vv_u16m8_tumu(__VA_ARGS__)

#define	vssrl_vv_u16mf2(...) __riscv_vssrl_vv_u16mf2(__VA_ARGS__)

#define	vssrl_vv_u16mf2_m(...) __riscv_vssrl_vv_u16mf2_tumu(__VA_ARGS__)

#define	vssrl_vv_u16mf4(...) __riscv_vssrl_vv_u16mf4(__VA_ARGS__)

#define	vssrl_vv_u16mf4_m(...) __riscv_vssrl_vv_u16mf4_tumu(__VA_ARGS__)

#define	vssrl_vv_u32m1(...) __riscv_vssrl_vv_u32m1(__VA_ARGS__)

#define	vssrl_vv_u32m1_m(...) __riscv_vssrl_vv_u32m1_tumu(__VA_ARGS__)

#define	vssrl_vv_u32m2(...) __riscv_vssrl_vv_u32m2(__VA_ARGS__)

#define	vssrl_vv_u32m2_m(...) __riscv_vssrl_vv_u32m2_tumu(__VA_ARGS__)

#define	vssrl_vv_u32m4(...) __riscv_vssrl_vv_u32m4(__VA_ARGS__)

#define	vssrl_vv_u32m4_m(...) __riscv_vssrl_vv_u32m4_tumu(__VA_ARGS__)

#define	vssrl_vv_u32m8(...) __riscv_vssrl_vv_u32m8(__VA_ARGS__)

#define	vssrl_vv_u32m8_m(...) __riscv_vssrl_vv_u32m8_tumu(__VA_ARGS__)

#define	vssrl_vv_u32mf2(...) __riscv_vssrl_vv_u32mf2(__VA_ARGS__)

#define	vssrl_vv_u32mf2_m(...) __riscv_vssrl_vv_u32mf2_tumu(__VA_ARGS__)

#define	vssrl_vv_u64m1(...) __riscv_vssrl_vv_u64m1(__VA_ARGS__)

#define	vssrl_vv_u64m1_m(...) __riscv_vssrl_vv_u64m1_tumu(__VA_ARGS__)

#define	vssrl_vv_u64m2(...) __riscv_vssrl_vv_u64m2(__VA_ARGS__)

#define	vssrl_vv_u64m2_m(...) __riscv_vssrl_vv_u64m2_tumu(__VA_ARGS__)

#define	vssrl_vv_u64m4(...) __riscv_vssrl_vv_u64m4(__VA_ARGS__)

#define	vssrl_vv_u64m4_m(...) __riscv_vssrl_vv_u64m4_tumu(__VA_ARGS__)

#define	vssrl_vv_u64m8(...) __riscv_vssrl_vv_u64m8(__VA_ARGS__)

#define	vssrl_vv_u64m8_m(...) __riscv_vssrl_vv_u64m8_tumu(__VA_ARGS__)

#define	vssrl_vv_u8m1(...) __riscv_vssrl_vv_u8m1(__VA_ARGS__)

#define	vssrl_vv_u8m1_m(...) __riscv_vssrl_vv_u8m1_tumu(__VA_ARGS__)

#define	vssrl_vv_u8m2(...) __riscv_vssrl_vv_u8m2(__VA_ARGS__)

#define	vssrl_vv_u8m2_m(...) __riscv_vssrl_vv_u8m2_tumu(__VA_ARGS__)

#define	vssrl_vv_u8m4(...) __riscv_vssrl_vv_u8m4(__VA_ARGS__)

#define	vssrl_vv_u8m4_m(...) __riscv_vssrl_vv_u8m4_tumu(__VA_ARGS__)

#define	vssrl_vv_u8m8(...) __riscv_vssrl_vv_u8m8(__VA_ARGS__)

#define	vssrl_vv_u8m8_m(...) __riscv_vssrl_vv_u8m8_tumu(__VA_ARGS__)

#define	vssrl_vv_u8mf2(...) __riscv_vssrl_vv_u8mf2(__VA_ARGS__)

#define	vssrl_vv_u8mf2_m(...) __riscv_vssrl_vv_u8mf2_tumu(__VA_ARGS__)

#define	vssrl_vv_u8mf4(...) __riscv_vssrl_vv_u8mf4(__VA_ARGS__)

#define	vssrl_vv_u8mf4_m(...) __riscv_vssrl_vv_u8mf4_tumu(__VA_ARGS__)

#define	vssrl_vv_u8mf8(...) __riscv_vssrl_vv_u8mf8(__VA_ARGS__)

#define	vssrl_vv_u8mf8_m(...) __riscv_vssrl_vv_u8mf8_tumu(__VA_ARGS__)

#define	vssrl_vx_u16m1(...) __riscv_vssrl_vx_u16m1(__VA_ARGS__)

#define	vssrl_vx_u16m1_m(...) __riscv_vssrl_vx_u16m1_tumu(__VA_ARGS__)

#define	vssrl_vx_u16m2(...) __riscv_vssrl_vx_u16m2(__VA_ARGS__)

#define	vssrl_vx_u16m2_m(...) __riscv_vssrl_vx_u16m2_tumu(__VA_ARGS__)

#define	vssrl_vx_u16m4(...) __riscv_vssrl_vx_u16m4(__VA_ARGS__)

#define	vssrl_vx_u16m4_m(...) __riscv_vssrl_vx_u16m4_tumu(__VA_ARGS__)

#define	vssrl_vx_u16m8(...) __riscv_vssrl_vx_u16m8(__VA_ARGS__)

#define	vssrl_vx_u16m8_m(...) __riscv_vssrl_vx_u16m8_tumu(__VA_ARGS__)

#define	vssrl_vx_u16mf2(...) __riscv_vssrl_vx_u16mf2(__VA_ARGS__)

#define	vssrl_vx_u16mf2_m(...) __riscv_vssrl_vx_u16mf2_tumu(__VA_ARGS__)

#define	vssrl_vx_u16mf4(...) __riscv_vssrl_vx_u16mf4(__VA_ARGS__)

#define	vssrl_vx_u16mf4_m(...) __riscv_vssrl_vx_u16mf4_tumu(__VA_ARGS__)

#define	vssrl_vx_u32m1(...) __riscv_vssrl_vx_u32m1(__VA_ARGS__)

#define	vssrl_vx_u32m1_m(...) __riscv_vssrl_vx_u32m1_tumu(__VA_ARGS__)

#define	vssrl_vx_u32m2(...) __riscv_vssrl_vx_u32m2(__VA_ARGS__)

#define	vssrl_vx_u32m2_m(...) __riscv_vssrl_vx_u32m2_tumu(__VA_ARGS__)

#define	vssrl_vx_u32m4(...) __riscv_vssrl_vx_u32m4(__VA_ARGS__)

#define	vssrl_vx_u32m4_m(...) __riscv_vssrl_vx_u32m4_tumu(__VA_ARGS__)

#define	vssrl_vx_u32m8(...) __riscv_vssrl_vx_u32m8(__VA_ARGS__)

#define	vssrl_vx_u32m8_m(...) __riscv_vssrl_vx_u32m8_tumu(__VA_ARGS__)

#define	vssrl_vx_u32mf2(...) __riscv_vssrl_vx_u32mf2(__VA_ARGS__)

#define	vssrl_vx_u32mf2_m(...) __riscv_vssrl_vx_u32mf2_tumu(__VA_ARGS__)

#define	vssrl_vx_u64m1(...) __riscv_vssrl_vx_u64m1(__VA_ARGS__)

#define	vssrl_vx_u64m1_m(...) __riscv_vssrl_vx_u64m1_tumu(__VA_ARGS__)

#define	vssrl_vx_u64m2(...) __riscv_vssrl_vx_u64m2(__VA_ARGS__)

#define	vssrl_vx_u64m2_m(...) __riscv_vssrl_vx_u64m2_tumu(__VA_ARGS__)

#define	vssrl_vx_u64m4(...) __riscv_vssrl_vx_u64m4(__VA_ARGS__)

#define	vssrl_vx_u64m4_m(...) __riscv_vssrl_vx_u64m4_tumu(__VA_ARGS__)

#define	vssrl_vx_u64m8(...) __riscv_vssrl_vx_u64m8(__VA_ARGS__)

#define	vssrl_vx_u64m8_m(...) __riscv_vssrl_vx_u64m8_tumu(__VA_ARGS__)

#define	vssrl_vx_u8m1(...) __riscv_vssrl_vx_u8m1(__VA_ARGS__)

#define	vssrl_vx_u8m1_m(...) __riscv_vssrl_vx_u8m1_tumu(__VA_ARGS__)

#define	vssrl_vx_u8m2(...) __riscv_vssrl_vx_u8m2(__VA_ARGS__)

#define	vssrl_vx_u8m2_m(...) __riscv_vssrl_vx_u8m2_tumu(__VA_ARGS__)

#define	vssrl_vx_u8m4(...) __riscv_vssrl_vx_u8m4(__VA_ARGS__)

#define	vssrl_vx_u8m4_m(...) __riscv_vssrl_vx_u8m4_tumu(__VA_ARGS__)

#define	vssrl_vx_u8m8(...) __riscv_vssrl_vx_u8m8(__VA_ARGS__)

#define	vssrl_vx_u8m8_m(...) __riscv_vssrl_vx_u8m8_tumu(__VA_ARGS__)

#define	vssrl_vx_u8mf2(...) __riscv_vssrl_vx_u8mf2(__VA_ARGS__)

#define	vssrl_vx_u8mf2_m(...) __riscv_vssrl_vx_u8mf2_tumu(__VA_ARGS__)

#define	vssrl_vx_u8mf4(...) __riscv_vssrl_vx_u8mf4(__VA_ARGS__)

#define	vssrl_vx_u8mf4_m(...) __riscv_vssrl_vx_u8mf4_tumu(__VA_ARGS__)

#define	vssrl_vx_u8mf8(...) __riscv_vssrl_vx_u8mf8(__VA_ARGS__)

#define	vssrl_vx_u8mf8_m(...) __riscv_vssrl_vx_u8mf8_tumu(__VA_ARGS__)

#define	vssseg2e16_v_f16m1(...) __riscv_vssseg2e16_v_f16m1(__VA_ARGS__)

#define	vssseg2e16_v_f16m1_m(...) __riscv_vssseg2e16_v_f16m1_m(__VA_ARGS__)

#define	vssseg2e16_v_f16m2(...) __riscv_vssseg2e16_v_f16m2(__VA_ARGS__)

#define	vssseg2e16_v_f16m2_m(...) __riscv_vssseg2e16_v_f16m2_m(__VA_ARGS__)

#define	vssseg2e16_v_f16m4(...) __riscv_vssseg2e16_v_f16m4(__VA_ARGS__)

#define	vssseg2e16_v_f16m4_m(...) __riscv_vssseg2e16_v_f16m4_m(__VA_ARGS__)

#define	vssseg2e16_v_f16mf2(...) __riscv_vssseg2e16_v_f16mf2(__VA_ARGS__)

#define	vssseg2e16_v_f16mf2_m(...) __riscv_vssseg2e16_v_f16mf2_m(__VA_ARGS__)

#define	vssseg2e16_v_f16mf4(...) __riscv_vssseg2e16_v_f16mf4(__VA_ARGS__)

#define	vssseg2e16_v_f16mf4_m(...) __riscv_vssseg2e16_v_f16mf4_m(__VA_ARGS__)

#define	vssseg2e16_v_i16m1(...) __riscv_vssseg2e16_v_i16m1(__VA_ARGS__)

#define	vssseg2e16_v_i16m1_m(...) __riscv_vssseg2e16_v_i16m1_m(__VA_ARGS__)

#define	vssseg2e16_v_i16m2(...) __riscv_vssseg2e16_v_i16m2(__VA_ARGS__)

#define	vssseg2e16_v_i16m2_m(...) __riscv_vssseg2e16_v_i16m2_m(__VA_ARGS__)

#define	vssseg2e16_v_i16m4(...) __riscv_vssseg2e16_v_i16m4(__VA_ARGS__)

#define	vssseg2e16_v_i16m4_m(...) __riscv_vssseg2e16_v_i16m4_m(__VA_ARGS__)

#define	vssseg2e16_v_i16mf2(...) __riscv_vssseg2e16_v_i16mf2(__VA_ARGS__)

#define	vssseg2e16_v_i16mf2_m(...) __riscv_vssseg2e16_v_i16mf2_m(__VA_ARGS__)

#define	vssseg2e16_v_i16mf4(...) __riscv_vssseg2e16_v_i16mf4(__VA_ARGS__)

#define	vssseg2e16_v_i16mf4_m(...) __riscv_vssseg2e16_v_i16mf4_m(__VA_ARGS__)

#define	vssseg2e16_v_u16m1(...) __riscv_vssseg2e16_v_u16m1(__VA_ARGS__)

#define	vssseg2e16_v_u16m1_m(...) __riscv_vssseg2e16_v_u16m1_m(__VA_ARGS__)

#define	vssseg2e16_v_u16m2(...) __riscv_vssseg2e16_v_u16m2(__VA_ARGS__)

#define	vssseg2e16_v_u16m2_m(...) __riscv_vssseg2e16_v_u16m2_m(__VA_ARGS__)

#define	vssseg2e16_v_u16m4(...) __riscv_vssseg2e16_v_u16m4(__VA_ARGS__)

#define	vssseg2e16_v_u16m4_m(...) __riscv_vssseg2e16_v_u16m4_m(__VA_ARGS__)

#define	vssseg2e16_v_u16mf2(...) __riscv_vssseg2e16_v_u16mf2(__VA_ARGS__)

#define	vssseg2e16_v_u16mf2_m(...) __riscv_vssseg2e16_v_u16mf2_m(__VA_ARGS__)

#define	vssseg2e16_v_u16mf4(...) __riscv_vssseg2e16_v_u16mf4(__VA_ARGS__)

#define	vssseg2e16_v_u16mf4_m(...) __riscv_vssseg2e16_v_u16mf4_m(__VA_ARGS__)

#define	vssseg2e32_v_f32m1(...) __riscv_vssseg2e32_v_f32m1(__VA_ARGS__)

#define	vssseg2e32_v_f32m1_m(...) __riscv_vssseg2e32_v_f32m1_m(__VA_ARGS__)

#define	vssseg2e32_v_f32m2(...) __riscv_vssseg2e32_v_f32m2(__VA_ARGS__)

#define	vssseg2e32_v_f32m2_m(...) __riscv_vssseg2e32_v_f32m2_m(__VA_ARGS__)

#define	vssseg2e32_v_f32m4(...) __riscv_vssseg2e32_v_f32m4(__VA_ARGS__)

#define	vssseg2e32_v_f32m4_m(...) __riscv_vssseg2e32_v_f32m4_m(__VA_ARGS__)

#define	vssseg2e32_v_f32mf2(...) __riscv_vssseg2e32_v_f32mf2(__VA_ARGS__)

#define	vssseg2e32_v_f32mf2_m(...) __riscv_vssseg2e32_v_f32mf2_m(__VA_ARGS__)

#define	vssseg2e32_v_i32m1(...) __riscv_vssseg2e32_v_i32m1(__VA_ARGS__)

#define	vssseg2e32_v_i32m1_m(...) __riscv_vssseg2e32_v_i32m1_m(__VA_ARGS__)

#define	vssseg2e32_v_i32m2(...) __riscv_vssseg2e32_v_i32m2(__VA_ARGS__)

#define	vssseg2e32_v_i32m2_m(...) __riscv_vssseg2e32_v_i32m2_m(__VA_ARGS__)

#define	vssseg2e32_v_i32m4(...) __riscv_vssseg2e32_v_i32m4(__VA_ARGS__)

#define	vssseg2e32_v_i32m4_m(...) __riscv_vssseg2e32_v_i32m4_m(__VA_ARGS__)

#define	vssseg2e32_v_i32mf2(...) __riscv_vssseg2e32_v_i32mf2(__VA_ARGS__)

#define	vssseg2e32_v_i32mf2_m(...) __riscv_vssseg2e32_v_i32mf2_m(__VA_ARGS__)

#define	vssseg2e32_v_u32m1(...) __riscv_vssseg2e32_v_u32m1(__VA_ARGS__)

#define	vssseg2e32_v_u32m1_m(...) __riscv_vssseg2e32_v_u32m1_m(__VA_ARGS__)

#define	vssseg2e32_v_u32m2(...) __riscv_vssseg2e32_v_u32m2(__VA_ARGS__)

#define	vssseg2e32_v_u32m2_m(...) __riscv_vssseg2e32_v_u32m2_m(__VA_ARGS__)

#define	vssseg2e32_v_u32m4(...) __riscv_vssseg2e32_v_u32m4(__VA_ARGS__)

#define	vssseg2e32_v_u32m4_m(...) __riscv_vssseg2e32_v_u32m4_m(__VA_ARGS__)

#define	vssseg2e32_v_u32mf2(...) __riscv_vssseg2e32_v_u32mf2(__VA_ARGS__)

#define	vssseg2e32_v_u32mf2_m(...) __riscv_vssseg2e32_v_u32mf2_m(__VA_ARGS__)

#define	vssseg2e64_v_f64m1(...) __riscv_vssseg2e64_v_f64m1(__VA_ARGS__)

#define	vssseg2e64_v_f64m1_m(...) __riscv_vssseg2e64_v_f64m1_m(__VA_ARGS__)

#define	vssseg2e64_v_f64m2(...) __riscv_vssseg2e64_v_f64m2(__VA_ARGS__)

#define	vssseg2e64_v_f64m2_m(...) __riscv_vssseg2e64_v_f64m2_m(__VA_ARGS__)

#define	vssseg2e64_v_f64m4(...) __riscv_vssseg2e64_v_f64m4(__VA_ARGS__)

#define	vssseg2e64_v_f64m4_m(...) __riscv_vssseg2e64_v_f64m4_m(__VA_ARGS__)

#define	vssseg2e64_v_i64m1(...) __riscv_vssseg2e64_v_i64m1(__VA_ARGS__)

#define	vssseg2e64_v_i64m1_m(...) __riscv_vssseg2e64_v_i64m1_m(__VA_ARGS__)

#define	vssseg2e64_v_i64m2(...) __riscv_vssseg2e64_v_i64m2(__VA_ARGS__)

#define	vssseg2e64_v_i64m2_m(...) __riscv_vssseg2e64_v_i64m2_m(__VA_ARGS__)

#define	vssseg2e64_v_i64m4(...) __riscv_vssseg2e64_v_i64m4(__VA_ARGS__)

#define	vssseg2e64_v_i64m4_m(...) __riscv_vssseg2e64_v_i64m4_m(__VA_ARGS__)

#define	vssseg2e64_v_u64m1(...) __riscv_vssseg2e64_v_u64m1(__VA_ARGS__)

#define	vssseg2e64_v_u64m1_m(...) __riscv_vssseg2e64_v_u64m1_m(__VA_ARGS__)

#define	vssseg2e64_v_u64m2(...) __riscv_vssseg2e64_v_u64m2(__VA_ARGS__)

#define	vssseg2e64_v_u64m2_m(...) __riscv_vssseg2e64_v_u64m2_m(__VA_ARGS__)

#define	vssseg2e64_v_u64m4(...) __riscv_vssseg2e64_v_u64m4(__VA_ARGS__)

#define	vssseg2e64_v_u64m4_m(...) __riscv_vssseg2e64_v_u64m4_m(__VA_ARGS__)

#define	vssseg2e8_v_i8m1(...) __riscv_vssseg2e8_v_i8m1(__VA_ARGS__)

#define	vssseg2e8_v_i8m1_m(...) __riscv_vssseg2e8_v_i8m1_m(__VA_ARGS__)

#define	vssseg2e8_v_i8m2(...) __riscv_vssseg2e8_v_i8m2(__VA_ARGS__)

#define	vssseg2e8_v_i8m2_m(...) __riscv_vssseg2e8_v_i8m2_m(__VA_ARGS__)

#define	vssseg2e8_v_i8m4(...) __riscv_vssseg2e8_v_i8m4(__VA_ARGS__)

#define	vssseg2e8_v_i8m4_m(...) __riscv_vssseg2e8_v_i8m4_m(__VA_ARGS__)

#define	vssseg2e8_v_i8mf2(...) __riscv_vssseg2e8_v_i8mf2(__VA_ARGS__)

#define	vssseg2e8_v_i8mf2_m(...) __riscv_vssseg2e8_v_i8mf2_m(__VA_ARGS__)

#define	vssseg2e8_v_i8mf4(...) __riscv_vssseg2e8_v_i8mf4(__VA_ARGS__)

#define	vssseg2e8_v_i8mf4_m(...) __riscv_vssseg2e8_v_i8mf4_m(__VA_ARGS__)

#define	vssseg2e8_v_i8mf8(...) __riscv_vssseg2e8_v_i8mf8(__VA_ARGS__)

#define	vssseg2e8_v_i8mf8_m(...) __riscv_vssseg2e8_v_i8mf8_m(__VA_ARGS__)

#define	vssseg2e8_v_u8m1(...) __riscv_vssseg2e8_v_u8m1(__VA_ARGS__)

#define	vssseg2e8_v_u8m1_m(...) __riscv_vssseg2e8_v_u8m1_m(__VA_ARGS__)

#define	vssseg2e8_v_u8m2(...) __riscv_vssseg2e8_v_u8m2(__VA_ARGS__)

#define	vssseg2e8_v_u8m2_m(...) __riscv_vssseg2e8_v_u8m2_m(__VA_ARGS__)

#define	vssseg2e8_v_u8m4(...) __riscv_vssseg2e8_v_u8m4(__VA_ARGS__)

#define	vssseg2e8_v_u8m4_m(...) __riscv_vssseg2e8_v_u8m4_m(__VA_ARGS__)

#define	vssseg2e8_v_u8mf2(...) __riscv_vssseg2e8_v_u8mf2(__VA_ARGS__)

#define	vssseg2e8_v_u8mf2_m(...) __riscv_vssseg2e8_v_u8mf2_m(__VA_ARGS__)

#define	vssseg2e8_v_u8mf4(...) __riscv_vssseg2e8_v_u8mf4(__VA_ARGS__)

#define	vssseg2e8_v_u8mf4_m(...) __riscv_vssseg2e8_v_u8mf4_m(__VA_ARGS__)

#define	vssseg2e8_v_u8mf8(...) __riscv_vssseg2e8_v_u8mf8(__VA_ARGS__)

#define	vssseg2e8_v_u8mf8_m(...) __riscv_vssseg2e8_v_u8mf8_m(__VA_ARGS__)

#define	vssseg3e16_v_f16m1(...) __riscv_vssseg3e16_v_f16m1(__VA_ARGS__)

#define	vssseg3e16_v_f16m1_m(...) __riscv_vssseg3e16_v_f16m1_m(__VA_ARGS__)

#define	vssseg3e16_v_f16m2(...) __riscv_vssseg3e16_v_f16m2(__VA_ARGS__)

#define	vssseg3e16_v_f16m2_m(...) __riscv_vssseg3e16_v_f16m2_m(__VA_ARGS__)

#define	vssseg3e16_v_f16mf2(...) __riscv_vssseg3e16_v_f16mf2(__VA_ARGS__)

#define	vssseg3e16_v_f16mf2_m(...) __riscv_vssseg3e16_v_f16mf2_m(__VA_ARGS__)

#define	vssseg3e16_v_f16mf4(...) __riscv_vssseg3e16_v_f16mf4(__VA_ARGS__)

#define	vssseg3e16_v_f16mf4_m(...) __riscv_vssseg3e16_v_f16mf4_m(__VA_ARGS__)

#define	vssseg3e16_v_i16m1(...) __riscv_vssseg3e16_v_i16m1(__VA_ARGS__)

#define	vssseg3e16_v_i16m1_m(...) __riscv_vssseg3e16_v_i16m1_m(__VA_ARGS__)

#define	vssseg3e16_v_i16m2(...) __riscv_vssseg3e16_v_i16m2(__VA_ARGS__)

#define	vssseg3e16_v_i16m2_m(...) __riscv_vssseg3e16_v_i16m2_m(__VA_ARGS__)

#define	vssseg3e16_v_i16mf2(...) __riscv_vssseg3e16_v_i16mf2(__VA_ARGS__)

#define	vssseg3e16_v_i16mf2_m(...) __riscv_vssseg3e16_v_i16mf2_m(__VA_ARGS__)

#define	vssseg3e16_v_i16mf4(...) __riscv_vssseg3e16_v_i16mf4(__VA_ARGS__)

#define	vssseg3e16_v_i16mf4_m(...) __riscv_vssseg3e16_v_i16mf4_m(__VA_ARGS__)

#define	vssseg3e16_v_u16m1(...) __riscv_vssseg3e16_v_u16m1(__VA_ARGS__)

#define	vssseg3e16_v_u16m1_m(...) __riscv_vssseg3e16_v_u16m1_m(__VA_ARGS__)

#define	vssseg3e16_v_u16m2(...) __riscv_vssseg3e16_v_u16m2(__VA_ARGS__)

#define	vssseg3e16_v_u16m2_m(...) __riscv_vssseg3e16_v_u16m2_m(__VA_ARGS__)

#define	vssseg3e16_v_u16mf2(...) __riscv_vssseg3e16_v_u16mf2(__VA_ARGS__)

#define	vssseg3e16_v_u16mf2_m(...) __riscv_vssseg3e16_v_u16mf2_m(__VA_ARGS__)

#define	vssseg3e16_v_u16mf4(...) __riscv_vssseg3e16_v_u16mf4(__VA_ARGS__)

#define	vssseg3e16_v_u16mf4_m(...) __riscv_vssseg3e16_v_u16mf4_m(__VA_ARGS__)

#define	vssseg3e32_v_f32m1(...) __riscv_vssseg3e32_v_f32m1(__VA_ARGS__)

#define	vssseg3e32_v_f32m1_m(...) __riscv_vssseg3e32_v_f32m1_m(__VA_ARGS__)

#define	vssseg3e32_v_f32m2(...) __riscv_vssseg3e32_v_f32m2(__VA_ARGS__)

#define	vssseg3e32_v_f32m2_m(...) __riscv_vssseg3e32_v_f32m2_m(__VA_ARGS__)

#define	vssseg3e32_v_f32mf2(...) __riscv_vssseg3e32_v_f32mf2(__VA_ARGS__)

#define	vssseg3e32_v_f32mf2_m(...) __riscv_vssseg3e32_v_f32mf2_m(__VA_ARGS__)

#define	vssseg3e32_v_i32m1(...) __riscv_vssseg3e32_v_i32m1(__VA_ARGS__)

#define	vssseg3e32_v_i32m1_m(...) __riscv_vssseg3e32_v_i32m1_m(__VA_ARGS__)

#define	vssseg3e32_v_i32m2(...) __riscv_vssseg3e32_v_i32m2(__VA_ARGS__)

#define	vssseg3e32_v_i32m2_m(...) __riscv_vssseg3e32_v_i32m2_m(__VA_ARGS__)

#define	vssseg3e32_v_i32mf2(...) __riscv_vssseg3e32_v_i32mf2(__VA_ARGS__)

#define	vssseg3e32_v_i32mf2_m(...) __riscv_vssseg3e32_v_i32mf2_m(__VA_ARGS__)

#define	vssseg3e32_v_u32m1(...) __riscv_vssseg3e32_v_u32m1(__VA_ARGS__)

#define	vssseg3e32_v_u32m1_m(...) __riscv_vssseg3e32_v_u32m1_m(__VA_ARGS__)

#define	vssseg3e32_v_u32m2(...) __riscv_vssseg3e32_v_u32m2(__VA_ARGS__)

#define	vssseg3e32_v_u32m2_m(...) __riscv_vssseg3e32_v_u32m2_m(__VA_ARGS__)

#define	vssseg3e32_v_u32mf2(...) __riscv_vssseg3e32_v_u32mf2(__VA_ARGS__)

#define	vssseg3e32_v_u32mf2_m(...) __riscv_vssseg3e32_v_u32mf2_m(__VA_ARGS__)

#define	vssseg3e64_v_f64m1(...) __riscv_vssseg3e64_v_f64m1(__VA_ARGS__)

#define	vssseg3e64_v_f64m1_m(...) __riscv_vssseg3e64_v_f64m1_m(__VA_ARGS__)

#define	vssseg3e64_v_f64m2(...) __riscv_vssseg3e64_v_f64m2(__VA_ARGS__)

#define	vssseg3e64_v_f64m2_m(...) __riscv_vssseg3e64_v_f64m2_m(__VA_ARGS__)

#define	vssseg3e64_v_i64m1(...) __riscv_vssseg3e64_v_i64m1(__VA_ARGS__)

#define	vssseg3e64_v_i64m1_m(...) __riscv_vssseg3e64_v_i64m1_m(__VA_ARGS__)

#define	vssseg3e64_v_i64m2(...) __riscv_vssseg3e64_v_i64m2(__VA_ARGS__)

#define	vssseg3e64_v_i64m2_m(...) __riscv_vssseg3e64_v_i64m2_m(__VA_ARGS__)

#define	vssseg3e64_v_u64m1(...) __riscv_vssseg3e64_v_u64m1(__VA_ARGS__)

#define	vssseg3e64_v_u64m1_m(...) __riscv_vssseg3e64_v_u64m1_m(__VA_ARGS__)

#define	vssseg3e64_v_u64m2(...) __riscv_vssseg3e64_v_u64m2(__VA_ARGS__)

#define	vssseg3e64_v_u64m2_m(...) __riscv_vssseg3e64_v_u64m2_m(__VA_ARGS__)

#define	vssseg3e8_v_i8m1(...) __riscv_vssseg3e8_v_i8m1(__VA_ARGS__)

#define	vssseg3e8_v_i8m1_m(...) __riscv_vssseg3e8_v_i8m1_m(__VA_ARGS__)

#define	vssseg3e8_v_i8m2(...) __riscv_vssseg3e8_v_i8m2(__VA_ARGS__)

#define	vssseg3e8_v_i8m2_m(...) __riscv_vssseg3e8_v_i8m2_m(__VA_ARGS__)

#define	vssseg3e8_v_i8mf2(...) __riscv_vssseg3e8_v_i8mf2(__VA_ARGS__)

#define	vssseg3e8_v_i8mf2_m(...) __riscv_vssseg3e8_v_i8mf2_m(__VA_ARGS__)

#define	vssseg3e8_v_i8mf4(...) __riscv_vssseg3e8_v_i8mf4(__VA_ARGS__)

#define	vssseg3e8_v_i8mf4_m(...) __riscv_vssseg3e8_v_i8mf4_m(__VA_ARGS__)

#define	vssseg3e8_v_i8mf8(...) __riscv_vssseg3e8_v_i8mf8(__VA_ARGS__)

#define	vssseg3e8_v_i8mf8_m(...) __riscv_vssseg3e8_v_i8mf8_m(__VA_ARGS__)

#define	vssseg3e8_v_u8m1(...) __riscv_vssseg3e8_v_u8m1(__VA_ARGS__)

#define	vssseg3e8_v_u8m1_m(...) __riscv_vssseg3e8_v_u8m1_m(__VA_ARGS__)

#define	vssseg3e8_v_u8m2(...) __riscv_vssseg3e8_v_u8m2(__VA_ARGS__)

#define	vssseg3e8_v_u8m2_m(...) __riscv_vssseg3e8_v_u8m2_m(__VA_ARGS__)

#define	vssseg3e8_v_u8mf2(...) __riscv_vssseg3e8_v_u8mf2(__VA_ARGS__)

#define	vssseg3e8_v_u8mf2_m(...) __riscv_vssseg3e8_v_u8mf2_m(__VA_ARGS__)

#define	vssseg3e8_v_u8mf4(...) __riscv_vssseg3e8_v_u8mf4(__VA_ARGS__)

#define	vssseg3e8_v_u8mf4_m(...) __riscv_vssseg3e8_v_u8mf4_m(__VA_ARGS__)

#define	vssseg3e8_v_u8mf8(...) __riscv_vssseg3e8_v_u8mf8(__VA_ARGS__)

#define	vssseg3e8_v_u8mf8_m(...) __riscv_vssseg3e8_v_u8mf8_m(__VA_ARGS__)

#define	vssseg4e16_v_f16m1(...) __riscv_vssseg4e16_v_f16m1(__VA_ARGS__)

#define	vssseg4e16_v_f16m1_m(...) __riscv_vssseg4e16_v_f16m1_m(__VA_ARGS__)

#define	vssseg4e16_v_f16m2(...) __riscv_vssseg4e16_v_f16m2(__VA_ARGS__)

#define	vssseg4e16_v_f16m2_m(...) __riscv_vssseg4e16_v_f16m2_m(__VA_ARGS__)

#define	vssseg4e16_v_f16mf2(...) __riscv_vssseg4e16_v_f16mf2(__VA_ARGS__)

#define	vssseg4e16_v_f16mf2_m(...) __riscv_vssseg4e16_v_f16mf2_m(__VA_ARGS__)

#define	vssseg4e16_v_f16mf4(...) __riscv_vssseg4e16_v_f16mf4(__VA_ARGS__)

#define	vssseg4e16_v_f16mf4_m(...) __riscv_vssseg4e16_v_f16mf4_m(__VA_ARGS__)

#define	vssseg4e16_v_i16m1(...) __riscv_vssseg4e16_v_i16m1(__VA_ARGS__)

#define	vssseg4e16_v_i16m1_m(...) __riscv_vssseg4e16_v_i16m1_m(__VA_ARGS__)

#define	vssseg4e16_v_i16m2(...) __riscv_vssseg4e16_v_i16m2(__VA_ARGS__)

#define	vssseg4e16_v_i16m2_m(...) __riscv_vssseg4e16_v_i16m2_m(__VA_ARGS__)

#define	vssseg4e16_v_i16mf2(...) __riscv_vssseg4e16_v_i16mf2(__VA_ARGS__)

#define	vssseg4e16_v_i16mf2_m(...) __riscv_vssseg4e16_v_i16mf2_m(__VA_ARGS__)

#define	vssseg4e16_v_i16mf4(...) __riscv_vssseg4e16_v_i16mf4(__VA_ARGS__)

#define	vssseg4e16_v_i16mf4_m(...) __riscv_vssseg4e16_v_i16mf4_m(__VA_ARGS__)

#define	vssseg4e16_v_u16m1(...) __riscv_vssseg4e16_v_u16m1(__VA_ARGS__)

#define	vssseg4e16_v_u16m1_m(...) __riscv_vssseg4e16_v_u16m1_m(__VA_ARGS__)

#define	vssseg4e16_v_u16m2(...) __riscv_vssseg4e16_v_u16m2(__VA_ARGS__)

#define	vssseg4e16_v_u16m2_m(...) __riscv_vssseg4e16_v_u16m2_m(__VA_ARGS__)

#define	vssseg4e16_v_u16mf2(...) __riscv_vssseg4e16_v_u16mf2(__VA_ARGS__)

#define	vssseg4e16_v_u16mf2_m(...) __riscv_vssseg4e16_v_u16mf2_m(__VA_ARGS__)

#define	vssseg4e16_v_u16mf4(...) __riscv_vssseg4e16_v_u16mf4(__VA_ARGS__)

#define	vssseg4e16_v_u16mf4_m(...) __riscv_vssseg4e16_v_u16mf4_m(__VA_ARGS__)

#define	vssseg4e32_v_f32m1(...) __riscv_vssseg4e32_v_f32m1(__VA_ARGS__)

#define	vssseg4e32_v_f32m1_m(...) __riscv_vssseg4e32_v_f32m1_m(__VA_ARGS__)

#define	vssseg4e32_v_f32m2(...) __riscv_vssseg4e32_v_f32m2(__VA_ARGS__)

#define	vssseg4e32_v_f32m2_m(...) __riscv_vssseg4e32_v_f32m2_m(__VA_ARGS__)

#define	vssseg4e32_v_f32mf2(...) __riscv_vssseg4e32_v_f32mf2(__VA_ARGS__)

#define	vssseg4e32_v_f32mf2_m(...) __riscv_vssseg4e32_v_f32mf2_m(__VA_ARGS__)

#define	vssseg4e32_v_i32m1(...) __riscv_vssseg4e32_v_i32m1(__VA_ARGS__)

#define	vssseg4e32_v_i32m1_m(...) __riscv_vssseg4e32_v_i32m1_m(__VA_ARGS__)

#define	vssseg4e32_v_i32m2(...) __riscv_vssseg4e32_v_i32m2(__VA_ARGS__)

#define	vssseg4e32_v_i32m2_m(...) __riscv_vssseg4e32_v_i32m2_m(__VA_ARGS__)

#define	vssseg4e32_v_i32mf2(...) __riscv_vssseg4e32_v_i32mf2(__VA_ARGS__)

#define	vssseg4e32_v_i32mf2_m(...) __riscv_vssseg4e32_v_i32mf2_m(__VA_ARGS__)

#define	vssseg4e32_v_u32m1(...) __riscv_vssseg4e32_v_u32m1(__VA_ARGS__)

#define	vssseg4e32_v_u32m1_m(...) __riscv_vssseg4e32_v_u32m1_m(__VA_ARGS__)

#define	vssseg4e32_v_u32m2(...) __riscv_vssseg4e32_v_u32m2(__VA_ARGS__)

#define	vssseg4e32_v_u32m2_m(...) __riscv_vssseg4e32_v_u32m2_m(__VA_ARGS__)

#define	vssseg4e32_v_u32mf2(...) __riscv_vssseg4e32_v_u32mf2(__VA_ARGS__)

#define	vssseg4e32_v_u32mf2_m(...) __riscv_vssseg4e32_v_u32mf2_m(__VA_ARGS__)

#define	vssseg4e64_v_f64m1(...) __riscv_vssseg4e64_v_f64m1(__VA_ARGS__)

#define	vssseg4e64_v_f64m1_m(...) __riscv_vssseg4e64_v_f64m1_m(__VA_ARGS__)

#define	vssseg4e64_v_f64m2(...) __riscv_vssseg4e64_v_f64m2(__VA_ARGS__)

#define	vssseg4e64_v_f64m2_m(...) __riscv_vssseg4e64_v_f64m2_m(__VA_ARGS__)

#define	vssseg4e64_v_i64m1(...) __riscv_vssseg4e64_v_i64m1(__VA_ARGS__)

#define	vssseg4e64_v_i64m1_m(...) __riscv_vssseg4e64_v_i64m1_m(__VA_ARGS__)

#define	vssseg4e64_v_i64m2(...) __riscv_vssseg4e64_v_i64m2(__VA_ARGS__)

#define	vssseg4e64_v_i64m2_m(...) __riscv_vssseg4e64_v_i64m2_m(__VA_ARGS__)

#define	vssseg4e64_v_u64m1(...) __riscv_vssseg4e64_v_u64m1(__VA_ARGS__)

#define	vssseg4e64_v_u64m1_m(...) __riscv_vssseg4e64_v_u64m1_m(__VA_ARGS__)

#define	vssseg4e64_v_u64m2(...) __riscv_vssseg4e64_v_u64m2(__VA_ARGS__)

#define	vssseg4e64_v_u64m2_m(...) __riscv_vssseg4e64_v_u64m2_m(__VA_ARGS__)

#define	vssseg4e8_v_i8m1(...) __riscv_vssseg4e8_v_i8m1(__VA_ARGS__)

#define	vssseg4e8_v_i8m1_m(...) __riscv_vssseg4e8_v_i8m1_m(__VA_ARGS__)

#define	vssseg4e8_v_i8m2(...) __riscv_vssseg4e8_v_i8m2(__VA_ARGS__)

#define	vssseg4e8_v_i8m2_m(...) __riscv_vssseg4e8_v_i8m2_m(__VA_ARGS__)

#define	vssseg4e8_v_i8mf2(...) __riscv_vssseg4e8_v_i8mf2(__VA_ARGS__)

#define	vssseg4e8_v_i8mf2_m(...) __riscv_vssseg4e8_v_i8mf2_m(__VA_ARGS__)

#define	vssseg4e8_v_i8mf4(...) __riscv_vssseg4e8_v_i8mf4(__VA_ARGS__)

#define	vssseg4e8_v_i8mf4_m(...) __riscv_vssseg4e8_v_i8mf4_m(__VA_ARGS__)

#define	vssseg4e8_v_i8mf8(...) __riscv_vssseg4e8_v_i8mf8(__VA_ARGS__)

#define	vssseg4e8_v_i8mf8_m(...) __riscv_vssseg4e8_v_i8mf8_m(__VA_ARGS__)

#define	vssseg4e8_v_u8m1(...) __riscv_vssseg4e8_v_u8m1(__VA_ARGS__)

#define	vssseg4e8_v_u8m1_m(...) __riscv_vssseg4e8_v_u8m1_m(__VA_ARGS__)

#define	vssseg4e8_v_u8m2(...) __riscv_vssseg4e8_v_u8m2(__VA_ARGS__)

#define	vssseg4e8_v_u8m2_m(...) __riscv_vssseg4e8_v_u8m2_m(__VA_ARGS__)

#define	vssseg4e8_v_u8mf2(...) __riscv_vssseg4e8_v_u8mf2(__VA_ARGS__)

#define	vssseg4e8_v_u8mf2_m(...) __riscv_vssseg4e8_v_u8mf2_m(__VA_ARGS__)

#define	vssseg4e8_v_u8mf4(...) __riscv_vssseg4e8_v_u8mf4(__VA_ARGS__)

#define	vssseg4e8_v_u8mf4_m(...) __riscv_vssseg4e8_v_u8mf4_m(__VA_ARGS__)

#define	vssseg4e8_v_u8mf8(...) __riscv_vssseg4e8_v_u8mf8(__VA_ARGS__)

#define	vssseg4e8_v_u8mf8_m(...) __riscv_vssseg4e8_v_u8mf8_m(__VA_ARGS__)

#define	vssseg5e16_v_f16m1(...) __riscv_vssseg5e16_v_f16m1(__VA_ARGS__)

#define	vssseg5e16_v_f16m1_m(...) __riscv_vssseg5e16_v_f16m1_m(__VA_ARGS__)

#define	vssseg5e16_v_f16mf2(...) __riscv_vssseg5e16_v_f16mf2(__VA_ARGS__)

#define	vssseg5e16_v_f16mf2_m(...) __riscv_vssseg5e16_v_f16mf2_m(__VA_ARGS__)

#define	vssseg5e16_v_f16mf4(...) __riscv_vssseg5e16_v_f16mf4(__VA_ARGS__)

#define	vssseg5e16_v_f16mf4_m(...) __riscv_vssseg5e16_v_f16mf4_m(__VA_ARGS__)

#define	vssseg5e16_v_i16m1(...) __riscv_vssseg5e16_v_i16m1(__VA_ARGS__)

#define	vssseg5e16_v_i16m1_m(...) __riscv_vssseg5e16_v_i16m1_m(__VA_ARGS__)

#define	vssseg5e16_v_i16mf2(...) __riscv_vssseg5e16_v_i16mf2(__VA_ARGS__)

#define	vssseg5e16_v_i16mf2_m(...) __riscv_vssseg5e16_v_i16mf2_m(__VA_ARGS__)

#define	vssseg5e16_v_i16mf4(...) __riscv_vssseg5e16_v_i16mf4(__VA_ARGS__)

#define	vssseg5e16_v_i16mf4_m(...) __riscv_vssseg5e16_v_i16mf4_m(__VA_ARGS__)

#define	vssseg5e16_v_u16m1(...) __riscv_vssseg5e16_v_u16m1(__VA_ARGS__)

#define	vssseg5e16_v_u16m1_m(...) __riscv_vssseg5e16_v_u16m1_m(__VA_ARGS__)

#define	vssseg5e16_v_u16mf2(...) __riscv_vssseg5e16_v_u16mf2(__VA_ARGS__)

#define	vssseg5e16_v_u16mf2_m(...) __riscv_vssseg5e16_v_u16mf2_m(__VA_ARGS__)

#define	vssseg5e16_v_u16mf4(...) __riscv_vssseg5e16_v_u16mf4(__VA_ARGS__)

#define	vssseg5e16_v_u16mf4_m(...) __riscv_vssseg5e16_v_u16mf4_m(__VA_ARGS__)

#define	vssseg5e32_v_f32m1(...) __riscv_vssseg5e32_v_f32m1(__VA_ARGS__)

#define	vssseg5e32_v_f32m1_m(...) __riscv_vssseg5e32_v_f32m1_m(__VA_ARGS__)

#define	vssseg5e32_v_f32mf2(...) __riscv_vssseg5e32_v_f32mf2(__VA_ARGS__)

#define	vssseg5e32_v_f32mf2_m(...) __riscv_vssseg5e32_v_f32mf2_m(__VA_ARGS__)

#define	vssseg5e32_v_i32m1(...) __riscv_vssseg5e32_v_i32m1(__VA_ARGS__)

#define	vssseg5e32_v_i32m1_m(...) __riscv_vssseg5e32_v_i32m1_m(__VA_ARGS__)

#define	vssseg5e32_v_i32mf2(...) __riscv_vssseg5e32_v_i32mf2(__VA_ARGS__)

#define	vssseg5e32_v_i32mf2_m(...) __riscv_vssseg5e32_v_i32mf2_m(__VA_ARGS__)

#define	vssseg5e32_v_u32m1(...) __riscv_vssseg5e32_v_u32m1(__VA_ARGS__)

#define	vssseg5e32_v_u32m1_m(...) __riscv_vssseg5e32_v_u32m1_m(__VA_ARGS__)

#define	vssseg5e32_v_u32mf2(...) __riscv_vssseg5e32_v_u32mf2(__VA_ARGS__)

#define	vssseg5e32_v_u32mf2_m(...) __riscv_vssseg5e32_v_u32mf2_m(__VA_ARGS__)

#define	vssseg5e64_v_f64m1(...) __riscv_vssseg5e64_v_f64m1(__VA_ARGS__)

#define	vssseg5e64_v_f64m1_m(...) __riscv_vssseg5e64_v_f64m1_m(__VA_ARGS__)

#define	vssseg5e64_v_i64m1(...) __riscv_vssseg5e64_v_i64m1(__VA_ARGS__)

#define	vssseg5e64_v_i64m1_m(...) __riscv_vssseg5e64_v_i64m1_m(__VA_ARGS__)

#define	vssseg5e64_v_u64m1(...) __riscv_vssseg5e64_v_u64m1(__VA_ARGS__)

#define	vssseg5e64_v_u64m1_m(...) __riscv_vssseg5e64_v_u64m1_m(__VA_ARGS__)

#define	vssseg5e8_v_i8m1(...) __riscv_vssseg5e8_v_i8m1(__VA_ARGS__)

#define	vssseg5e8_v_i8m1_m(...) __riscv_vssseg5e8_v_i8m1_m(__VA_ARGS__)

#define	vssseg5e8_v_i8mf2(...) __riscv_vssseg5e8_v_i8mf2(__VA_ARGS__)

#define	vssseg5e8_v_i8mf2_m(...) __riscv_vssseg5e8_v_i8mf2_m(__VA_ARGS__)

#define	vssseg5e8_v_i8mf4(...) __riscv_vssseg5e8_v_i8mf4(__VA_ARGS__)

#define	vssseg5e8_v_i8mf4_m(...) __riscv_vssseg5e8_v_i8mf4_m(__VA_ARGS__)

#define	vssseg5e8_v_i8mf8(...) __riscv_vssseg5e8_v_i8mf8(__VA_ARGS__)

#define	vssseg5e8_v_i8mf8_m(...) __riscv_vssseg5e8_v_i8mf8_m(__VA_ARGS__)

#define	vssseg5e8_v_u8m1(...) __riscv_vssseg5e8_v_u8m1(__VA_ARGS__)

#define	vssseg5e8_v_u8m1_m(...) __riscv_vssseg5e8_v_u8m1_m(__VA_ARGS__)

#define	vssseg5e8_v_u8mf2(...) __riscv_vssseg5e8_v_u8mf2(__VA_ARGS__)

#define	vssseg5e8_v_u8mf2_m(...) __riscv_vssseg5e8_v_u8mf2_m(__VA_ARGS__)

#define	vssseg5e8_v_u8mf4(...) __riscv_vssseg5e8_v_u8mf4(__VA_ARGS__)

#define	vssseg5e8_v_u8mf4_m(...) __riscv_vssseg5e8_v_u8mf4_m(__VA_ARGS__)

#define	vssseg5e8_v_u8mf8(...) __riscv_vssseg5e8_v_u8mf8(__VA_ARGS__)

#define	vssseg5e8_v_u8mf8_m(...) __riscv_vssseg5e8_v_u8mf8_m(__VA_ARGS__)

#define	vssseg6e16_v_f16m1(...) __riscv_vssseg6e16_v_f16m1(__VA_ARGS__)

#define	vssseg6e16_v_f16m1_m(...) __riscv_vssseg6e16_v_f16m1_m(__VA_ARGS__)

#define	vssseg6e16_v_f16mf2(...) __riscv_vssseg6e16_v_f16mf2(__VA_ARGS__)

#define	vssseg6e16_v_f16mf2_m(...) __riscv_vssseg6e16_v_f16mf2_m(__VA_ARGS__)

#define	vssseg6e16_v_f16mf4(...) __riscv_vssseg6e16_v_f16mf4(__VA_ARGS__)

#define	vssseg6e16_v_f16mf4_m(...) __riscv_vssseg6e16_v_f16mf4_m(__VA_ARGS__)

#define	vssseg6e16_v_i16m1(...) __riscv_vssseg6e16_v_i16m1(__VA_ARGS__)

#define	vssseg6e16_v_i16m1_m(...) __riscv_vssseg6e16_v_i16m1_m(__VA_ARGS__)

#define	vssseg6e16_v_i16mf2(...) __riscv_vssseg6e16_v_i16mf2(__VA_ARGS__)

#define	vssseg6e16_v_i16mf2_m(...) __riscv_vssseg6e16_v_i16mf2_m(__VA_ARGS__)

#define	vssseg6e16_v_i16mf4(...) __riscv_vssseg6e16_v_i16mf4(__VA_ARGS__)

#define	vssseg6e16_v_i16mf4_m(...) __riscv_vssseg6e16_v_i16mf4_m(__VA_ARGS__)

#define	vssseg6e16_v_u16m1(...) __riscv_vssseg6e16_v_u16m1(__VA_ARGS__)

#define	vssseg6e16_v_u16m1_m(...) __riscv_vssseg6e16_v_u16m1_m(__VA_ARGS__)

#define	vssseg6e16_v_u16mf2(...) __riscv_vssseg6e16_v_u16mf2(__VA_ARGS__)

#define	vssseg6e16_v_u16mf2_m(...) __riscv_vssseg6e16_v_u16mf2_m(__VA_ARGS__)

#define	vssseg6e16_v_u16mf4(...) __riscv_vssseg6e16_v_u16mf4(__VA_ARGS__)

#define	vssseg6e16_v_u16mf4_m(...) __riscv_vssseg6e16_v_u16mf4_m(__VA_ARGS__)

#define	vssseg6e32_v_f32m1(...) __riscv_vssseg6e32_v_f32m1(__VA_ARGS__)

#define	vssseg6e32_v_f32m1_m(...) __riscv_vssseg6e32_v_f32m1_m(__VA_ARGS__)

#define	vssseg6e32_v_f32mf2(...) __riscv_vssseg6e32_v_f32mf2(__VA_ARGS__)

#define	vssseg6e32_v_f32mf2_m(...) __riscv_vssseg6e32_v_f32mf2_m(__VA_ARGS__)

#define	vssseg6e32_v_i32m1(...) __riscv_vssseg6e32_v_i32m1(__VA_ARGS__)

#define	vssseg6e32_v_i32m1_m(...) __riscv_vssseg6e32_v_i32m1_m(__VA_ARGS__)

#define	vssseg6e32_v_i32mf2(...) __riscv_vssseg6e32_v_i32mf2(__VA_ARGS__)

#define	vssseg6e32_v_i32mf2_m(...) __riscv_vssseg6e32_v_i32mf2_m(__VA_ARGS__)

#define	vssseg6e32_v_u32m1(...) __riscv_vssseg6e32_v_u32m1(__VA_ARGS__)

#define	vssseg6e32_v_u32m1_m(...) __riscv_vssseg6e32_v_u32m1_m(__VA_ARGS__)

#define	vssseg6e32_v_u32mf2(...) __riscv_vssseg6e32_v_u32mf2(__VA_ARGS__)

#define	vssseg6e32_v_u32mf2_m(...) __riscv_vssseg6e32_v_u32mf2_m(__VA_ARGS__)

#define	vssseg6e64_v_f64m1(...) __riscv_vssseg6e64_v_f64m1(__VA_ARGS__)

#define	vssseg6e64_v_f64m1_m(...) __riscv_vssseg6e64_v_f64m1_m(__VA_ARGS__)

#define	vssseg6e64_v_i64m1(...) __riscv_vssseg6e64_v_i64m1(__VA_ARGS__)

#define	vssseg6e64_v_i64m1_m(...) __riscv_vssseg6e64_v_i64m1_m(__VA_ARGS__)

#define	vssseg6e64_v_u64m1(...) __riscv_vssseg6e64_v_u64m1(__VA_ARGS__)

#define	vssseg6e64_v_u64m1_m(...) __riscv_vssseg6e64_v_u64m1_m(__VA_ARGS__)

#define	vssseg6e8_v_i8m1(...) __riscv_vssseg6e8_v_i8m1(__VA_ARGS__)

#define	vssseg6e8_v_i8m1_m(...) __riscv_vssseg6e8_v_i8m1_m(__VA_ARGS__)

#define	vssseg6e8_v_i8mf2(...) __riscv_vssseg6e8_v_i8mf2(__VA_ARGS__)

#define	vssseg6e8_v_i8mf2_m(...) __riscv_vssseg6e8_v_i8mf2_m(__VA_ARGS__)

#define	vssseg6e8_v_i8mf4(...) __riscv_vssseg6e8_v_i8mf4(__VA_ARGS__)

#define	vssseg6e8_v_i8mf4_m(...) __riscv_vssseg6e8_v_i8mf4_m(__VA_ARGS__)

#define	vssseg6e8_v_i8mf8(...) __riscv_vssseg6e8_v_i8mf8(__VA_ARGS__)

#define	vssseg6e8_v_i8mf8_m(...) __riscv_vssseg6e8_v_i8mf8_m(__VA_ARGS__)

#define	vssseg6e8_v_u8m1(...) __riscv_vssseg6e8_v_u8m1(__VA_ARGS__)

#define	vssseg6e8_v_u8m1_m(...) __riscv_vssseg6e8_v_u8m1_m(__VA_ARGS__)

#define	vssseg6e8_v_u8mf2(...) __riscv_vssseg6e8_v_u8mf2(__VA_ARGS__)

#define	vssseg6e8_v_u8mf2_m(...) __riscv_vssseg6e8_v_u8mf2_m(__VA_ARGS__)

#define	vssseg6e8_v_u8mf4(...) __riscv_vssseg6e8_v_u8mf4(__VA_ARGS__)

#define	vssseg6e8_v_u8mf4_m(...) __riscv_vssseg6e8_v_u8mf4_m(__VA_ARGS__)

#define	vssseg6e8_v_u8mf8(...) __riscv_vssseg6e8_v_u8mf8(__VA_ARGS__)

#define	vssseg6e8_v_u8mf8_m(...) __riscv_vssseg6e8_v_u8mf8_m(__VA_ARGS__)

#define	vssseg7e16_v_f16m1(...) __riscv_vssseg7e16_v_f16m1(__VA_ARGS__)

#define	vssseg7e16_v_f16m1_m(...) __riscv_vssseg7e16_v_f16m1_m(__VA_ARGS__)

#define	vssseg7e16_v_f16mf2(...) __riscv_vssseg7e16_v_f16mf2(__VA_ARGS__)

#define	vssseg7e16_v_f16mf2_m(...) __riscv_vssseg7e16_v_f16mf2_m(__VA_ARGS__)

#define	vssseg7e16_v_f16mf4(...) __riscv_vssseg7e16_v_f16mf4(__VA_ARGS__)

#define	vssseg7e16_v_f16mf4_m(...) __riscv_vssseg7e16_v_f16mf4_m(__VA_ARGS__)

#define	vssseg7e16_v_i16m1(...) __riscv_vssseg7e16_v_i16m1(__VA_ARGS__)

#define	vssseg7e16_v_i16m1_m(...) __riscv_vssseg7e16_v_i16m1_m(__VA_ARGS__)

#define	vssseg7e16_v_i16mf2(...) __riscv_vssseg7e16_v_i16mf2(__VA_ARGS__)

#define	vssseg7e16_v_i16mf2_m(...) __riscv_vssseg7e16_v_i16mf2_m(__VA_ARGS__)

#define	vssseg7e16_v_i16mf4(...) __riscv_vssseg7e16_v_i16mf4(__VA_ARGS__)

#define	vssseg7e16_v_i16mf4_m(...) __riscv_vssseg7e16_v_i16mf4_m(__VA_ARGS__)

#define	vssseg7e16_v_u16m1(...) __riscv_vssseg7e16_v_u16m1(__VA_ARGS__)

#define	vssseg7e16_v_u16m1_m(...) __riscv_vssseg7e16_v_u16m1_m(__VA_ARGS__)

#define	vssseg7e16_v_u16mf2(...) __riscv_vssseg7e16_v_u16mf2(__VA_ARGS__)

#define	vssseg7e16_v_u16mf2_m(...) __riscv_vssseg7e16_v_u16mf2_m(__VA_ARGS__)

#define	vssseg7e16_v_u16mf4(...) __riscv_vssseg7e16_v_u16mf4(__VA_ARGS__)

#define	vssseg7e16_v_u16mf4_m(...) __riscv_vssseg7e16_v_u16mf4_m(__VA_ARGS__)

#define	vssseg7e32_v_f32m1(...) __riscv_vssseg7e32_v_f32m1(__VA_ARGS__)

#define	vssseg7e32_v_f32m1_m(...) __riscv_vssseg7e32_v_f32m1_m(__VA_ARGS__)

#define	vssseg7e32_v_f32mf2(...) __riscv_vssseg7e32_v_f32mf2(__VA_ARGS__)

#define	vssseg7e32_v_f32mf2_m(...) __riscv_vssseg7e32_v_f32mf2_m(__VA_ARGS__)

#define	vssseg7e32_v_i32m1(...) __riscv_vssseg7e32_v_i32m1(__VA_ARGS__)

#define	vssseg7e32_v_i32m1_m(...) __riscv_vssseg7e32_v_i32m1_m(__VA_ARGS__)

#define	vssseg7e32_v_i32mf2(...) __riscv_vssseg7e32_v_i32mf2(__VA_ARGS__)

#define	vssseg7e32_v_i32mf2_m(...) __riscv_vssseg7e32_v_i32mf2_m(__VA_ARGS__)

#define	vssseg7e32_v_u32m1(...) __riscv_vssseg7e32_v_u32m1(__VA_ARGS__)

#define	vssseg7e32_v_u32m1_m(...) __riscv_vssseg7e32_v_u32m1_m(__VA_ARGS__)

#define	vssseg7e32_v_u32mf2(...) __riscv_vssseg7e32_v_u32mf2(__VA_ARGS__)

#define	vssseg7e32_v_u32mf2_m(...) __riscv_vssseg7e32_v_u32mf2_m(__VA_ARGS__)

#define	vssseg7e64_v_f64m1(...) __riscv_vssseg7e64_v_f64m1(__VA_ARGS__)

#define	vssseg7e64_v_f64m1_m(...) __riscv_vssseg7e64_v_f64m1_m(__VA_ARGS__)

#define	vssseg7e64_v_i64m1(...) __riscv_vssseg7e64_v_i64m1(__VA_ARGS__)

#define	vssseg7e64_v_i64m1_m(...) __riscv_vssseg7e64_v_i64m1_m(__VA_ARGS__)

#define	vssseg7e64_v_u64m1(...) __riscv_vssseg7e64_v_u64m1(__VA_ARGS__)

#define	vssseg7e64_v_u64m1_m(...) __riscv_vssseg7e64_v_u64m1_m(__VA_ARGS__)

#define	vssseg7e8_v_i8m1(...) __riscv_vssseg7e8_v_i8m1(__VA_ARGS__)

#define	vssseg7e8_v_i8m1_m(...) __riscv_vssseg7e8_v_i8m1_m(__VA_ARGS__)

#define	vssseg7e8_v_i8mf2(...) __riscv_vssseg7e8_v_i8mf2(__VA_ARGS__)

#define	vssseg7e8_v_i8mf2_m(...) __riscv_vssseg7e8_v_i8mf2_m(__VA_ARGS__)

#define	vssseg7e8_v_i8mf4(...) __riscv_vssseg7e8_v_i8mf4(__VA_ARGS__)

#define	vssseg7e8_v_i8mf4_m(...) __riscv_vssseg7e8_v_i8mf4_m(__VA_ARGS__)

#define	vssseg7e8_v_i8mf8(...) __riscv_vssseg7e8_v_i8mf8(__VA_ARGS__)

#define	vssseg7e8_v_i8mf8_m(...) __riscv_vssseg7e8_v_i8mf8_m(__VA_ARGS__)

#define	vssseg7e8_v_u8m1(...) __riscv_vssseg7e8_v_u8m1(__VA_ARGS__)

#define	vssseg7e8_v_u8m1_m(...) __riscv_vssseg7e8_v_u8m1_m(__VA_ARGS__)

#define	vssseg7e8_v_u8mf2(...) __riscv_vssseg7e8_v_u8mf2(__VA_ARGS__)

#define	vssseg7e8_v_u8mf2_m(...) __riscv_vssseg7e8_v_u8mf2_m(__VA_ARGS__)

#define	vssseg7e8_v_u8mf4(...) __riscv_vssseg7e8_v_u8mf4(__VA_ARGS__)

#define	vssseg7e8_v_u8mf4_m(...) __riscv_vssseg7e8_v_u8mf4_m(__VA_ARGS__)

#define	vssseg7e8_v_u8mf8(...) __riscv_vssseg7e8_v_u8mf8(__VA_ARGS__)

#define	vssseg7e8_v_u8mf8_m(...) __riscv_vssseg7e8_v_u8mf8_m(__VA_ARGS__)

#define	vssseg8e16_v_f16m1(...) __riscv_vssseg8e16_v_f16m1(__VA_ARGS__)

#define	vssseg8e16_v_f16m1_m(...) __riscv_vssseg8e16_v_f16m1_m(__VA_ARGS__)

#define	vssseg8e16_v_f16mf2(...) __riscv_vssseg8e16_v_f16mf2(__VA_ARGS__)

#define	vssseg8e16_v_f16mf2_m(...) __riscv_vssseg8e16_v_f16mf2_m(__VA_ARGS__)

#define	vssseg8e16_v_f16mf4(...) __riscv_vssseg8e16_v_f16mf4(__VA_ARGS__)

#define	vssseg8e16_v_f16mf4_m(...) __riscv_vssseg8e16_v_f16mf4_m(__VA_ARGS__)

#define	vssseg8e16_v_i16m1(...) __riscv_vssseg8e16_v_i16m1(__VA_ARGS__)

#define	vssseg8e16_v_i16m1_m(...) __riscv_vssseg8e16_v_i16m1_m(__VA_ARGS__)

#define	vssseg8e16_v_i16mf2(...) __riscv_vssseg8e16_v_i16mf2(__VA_ARGS__)

#define	vssseg8e16_v_i16mf2_m(...) __riscv_vssseg8e16_v_i16mf2_m(__VA_ARGS__)

#define	vssseg8e16_v_i16mf4(...) __riscv_vssseg8e16_v_i16mf4(__VA_ARGS__)

#define	vssseg8e16_v_i16mf4_m(...) __riscv_vssseg8e16_v_i16mf4_m(__VA_ARGS__)

#define	vssseg8e16_v_u16m1(...) __riscv_vssseg8e16_v_u16m1(__VA_ARGS__)

#define	vssseg8e16_v_u16m1_m(...) __riscv_vssseg8e16_v_u16m1_m(__VA_ARGS__)

#define	vssseg8e16_v_u16mf2(...) __riscv_vssseg8e16_v_u16mf2(__VA_ARGS__)

#define	vssseg8e16_v_u16mf2_m(...) __riscv_vssseg8e16_v_u16mf2_m(__VA_ARGS__)

#define	vssseg8e16_v_u16mf4(...) __riscv_vssseg8e16_v_u16mf4(__VA_ARGS__)

#define	vssseg8e16_v_u16mf4_m(...) __riscv_vssseg8e16_v_u16mf4_m(__VA_ARGS__)

#define	vssseg8e32_v_f32m1(...) __riscv_vssseg8e32_v_f32m1(__VA_ARGS__)

#define	vssseg8e32_v_f32m1_m(...) __riscv_vssseg8e32_v_f32m1_m(__VA_ARGS__)

#define	vssseg8e32_v_f32mf2(...) __riscv_vssseg8e32_v_f32mf2(__VA_ARGS__)

#define	vssseg8e32_v_f32mf2_m(...) __riscv_vssseg8e32_v_f32mf2_m(__VA_ARGS__)

#define	vssseg8e32_v_i32m1(...) __riscv_vssseg8e32_v_i32m1(__VA_ARGS__)

#define	vssseg8e32_v_i32m1_m(...) __riscv_vssseg8e32_v_i32m1_m(__VA_ARGS__)

#define	vssseg8e32_v_i32mf2(...) __riscv_vssseg8e32_v_i32mf2(__VA_ARGS__)

#define	vssseg8e32_v_i32mf2_m(...) __riscv_vssseg8e32_v_i32mf2_m(__VA_ARGS__)

#define	vssseg8e32_v_u32m1(...) __riscv_vssseg8e32_v_u32m1(__VA_ARGS__)

#define	vssseg8e32_v_u32m1_m(...) __riscv_vssseg8e32_v_u32m1_m(__VA_ARGS__)

#define	vssseg8e32_v_u32mf2(...) __riscv_vssseg8e32_v_u32mf2(__VA_ARGS__)

#define	vssseg8e32_v_u32mf2_m(...) __riscv_vssseg8e32_v_u32mf2_m(__VA_ARGS__)

#define	vssseg8e64_v_f64m1(...) __riscv_vssseg8e64_v_f64m1(__VA_ARGS__)

#define	vssseg8e64_v_f64m1_m(...) __riscv_vssseg8e64_v_f64m1_m(__VA_ARGS__)

#define	vssseg8e64_v_i64m1(...) __riscv_vssseg8e64_v_i64m1(__VA_ARGS__)

#define	vssseg8e64_v_i64m1_m(...) __riscv_vssseg8e64_v_i64m1_m(__VA_ARGS__)

#define	vssseg8e64_v_u64m1(...) __riscv_vssseg8e64_v_u64m1(__VA_ARGS__)

#define	vssseg8e64_v_u64m1_m(...) __riscv_vssseg8e64_v_u64m1_m(__VA_ARGS__)

#define	vssseg8e8_v_i8m1(...) __riscv_vssseg8e8_v_i8m1(__VA_ARGS__)

#define	vssseg8e8_v_i8m1_m(...) __riscv_vssseg8e8_v_i8m1_m(__VA_ARGS__)

#define	vssseg8e8_v_i8mf2(...) __riscv_vssseg8e8_v_i8mf2(__VA_ARGS__)

#define	vssseg8e8_v_i8mf2_m(...) __riscv_vssseg8e8_v_i8mf2_m(__VA_ARGS__)

#define	vssseg8e8_v_i8mf4(...) __riscv_vssseg8e8_v_i8mf4(__VA_ARGS__)

#define	vssseg8e8_v_i8mf4_m(...) __riscv_vssseg8e8_v_i8mf4_m(__VA_ARGS__)

#define	vssseg8e8_v_i8mf8(...) __riscv_vssseg8e8_v_i8mf8(__VA_ARGS__)

#define	vssseg8e8_v_i8mf8_m(...) __riscv_vssseg8e8_v_i8mf8_m(__VA_ARGS__)

#define	vssseg8e8_v_u8m1(...) __riscv_vssseg8e8_v_u8m1(__VA_ARGS__)

#define	vssseg8e8_v_u8m1_m(...) __riscv_vssseg8e8_v_u8m1_m(__VA_ARGS__)

#define	vssseg8e8_v_u8mf2(...) __riscv_vssseg8e8_v_u8mf2(__VA_ARGS__)

#define	vssseg8e8_v_u8mf2_m(...) __riscv_vssseg8e8_v_u8mf2_m(__VA_ARGS__)

#define	vssseg8e8_v_u8mf4(...) __riscv_vssseg8e8_v_u8mf4(__VA_ARGS__)

#define	vssseg8e8_v_u8mf4_m(...) __riscv_vssseg8e8_v_u8mf4_m(__VA_ARGS__)

#define	vssseg8e8_v_u8mf8(...) __riscv_vssseg8e8_v_u8mf8(__VA_ARGS__)

#define	vssseg8e8_v_u8mf8_m(...) __riscv_vssseg8e8_v_u8mf8_m(__VA_ARGS__)

#define	vssub_vv_i16m1(...) __riscv_vssub_vv_i16m1(__VA_ARGS__)

#define	vssub_vv_i16m1_m(...) __riscv_vssub_vv_i16m1_tumu(__VA_ARGS__)

#define	vssub_vv_i16m2(...) __riscv_vssub_vv_i16m2(__VA_ARGS__)

#define	vssub_vv_i16m2_m(...) __riscv_vssub_vv_i16m2_tumu(__VA_ARGS__)

#define	vssub_vv_i16m4(...) __riscv_vssub_vv_i16m4(__VA_ARGS__)

#define	vssub_vv_i16m4_m(...) __riscv_vssub_vv_i16m4_tumu(__VA_ARGS__)

#define	vssub_vv_i16m8(...) __riscv_vssub_vv_i16m8(__VA_ARGS__)

#define	vssub_vv_i16m8_m(...) __riscv_vssub_vv_i16m8_tumu(__VA_ARGS__)

#define	vssub_vv_i16mf2(...) __riscv_vssub_vv_i16mf2(__VA_ARGS__)

#define	vssub_vv_i16mf2_m(...) __riscv_vssub_vv_i16mf2_tumu(__VA_ARGS__)

#define	vssub_vv_i16mf4(...) __riscv_vssub_vv_i16mf4(__VA_ARGS__)

#define	vssub_vv_i16mf4_m(...) __riscv_vssub_vv_i16mf4_tumu(__VA_ARGS__)

#define	vssub_vv_i32m1(...) __riscv_vssub_vv_i32m1(__VA_ARGS__)

#define	vssub_vv_i32m1_m(...) __riscv_vssub_vv_i32m1_tumu(__VA_ARGS__)

#define	vssub_vv_i32m2(...) __riscv_vssub_vv_i32m2(__VA_ARGS__)

#define	vssub_vv_i32m2_m(...) __riscv_vssub_vv_i32m2_tumu(__VA_ARGS__)

#define	vssub_vv_i32m4(...) __riscv_vssub_vv_i32m4(__VA_ARGS__)

#define	vssub_vv_i32m4_m(...) __riscv_vssub_vv_i32m4_tumu(__VA_ARGS__)

#define	vssub_vv_i32m8(...) __riscv_vssub_vv_i32m8(__VA_ARGS__)

#define	vssub_vv_i32m8_m(...) __riscv_vssub_vv_i32m8_tumu(__VA_ARGS__)

#define	vssub_vv_i32mf2(...) __riscv_vssub_vv_i32mf2(__VA_ARGS__)

#define	vssub_vv_i32mf2_m(...) __riscv_vssub_vv_i32mf2_tumu(__VA_ARGS__)

#define	vssub_vv_i64m1(...) __riscv_vssub_vv_i64m1(__VA_ARGS__)

#define	vssub_vv_i64m1_m(...) __riscv_vssub_vv_i64m1_tumu(__VA_ARGS__)

#define	vssub_vv_i64m2(...) __riscv_vssub_vv_i64m2(__VA_ARGS__)

#define	vssub_vv_i64m2_m(...) __riscv_vssub_vv_i64m2_tumu(__VA_ARGS__)

#define	vssub_vv_i64m4(...) __riscv_vssub_vv_i64m4(__VA_ARGS__)

#define	vssub_vv_i64m4_m(...) __riscv_vssub_vv_i64m4_tumu(__VA_ARGS__)

#define	vssub_vv_i64m8(...) __riscv_vssub_vv_i64m8(__VA_ARGS__)

#define	vssub_vv_i64m8_m(...) __riscv_vssub_vv_i64m8_tumu(__VA_ARGS__)

#define	vssub_vv_i8m1(...) __riscv_vssub_vv_i8m1(__VA_ARGS__)

#define	vssub_vv_i8m1_m(...) __riscv_vssub_vv_i8m1_tumu(__VA_ARGS__)

#define	vssub_vv_i8m2(...) __riscv_vssub_vv_i8m2(__VA_ARGS__)

#define	vssub_vv_i8m2_m(...) __riscv_vssub_vv_i8m2_tumu(__VA_ARGS__)

#define	vssub_vv_i8m4(...) __riscv_vssub_vv_i8m4(__VA_ARGS__)

#define	vssub_vv_i8m4_m(...) __riscv_vssub_vv_i8m4_tumu(__VA_ARGS__)

#define	vssub_vv_i8m8(...) __riscv_vssub_vv_i8m8(__VA_ARGS__)

#define	vssub_vv_i8m8_m(...) __riscv_vssub_vv_i8m8_tumu(__VA_ARGS__)

#define	vssub_vv_i8mf2(...) __riscv_vssub_vv_i8mf2(__VA_ARGS__)

#define	vssub_vv_i8mf2_m(...) __riscv_vssub_vv_i8mf2_tumu(__VA_ARGS__)

#define	vssub_vv_i8mf4(...) __riscv_vssub_vv_i8mf4(__VA_ARGS__)

#define	vssub_vv_i8mf4_m(...) __riscv_vssub_vv_i8mf4_tumu(__VA_ARGS__)

#define	vssub_vv_i8mf8(...) __riscv_vssub_vv_i8mf8(__VA_ARGS__)

#define	vssub_vv_i8mf8_m(...) __riscv_vssub_vv_i8mf8_tumu(__VA_ARGS__)

#define	vssub_vx_i16m1(...) __riscv_vssub_vx_i16m1(__VA_ARGS__)

#define	vssub_vx_i16m1_m(...) __riscv_vssub_vx_i16m1_tumu(__VA_ARGS__)

#define	vssub_vx_i16m2(...) __riscv_vssub_vx_i16m2(__VA_ARGS__)

#define	vssub_vx_i16m2_m(...) __riscv_vssub_vx_i16m2_tumu(__VA_ARGS__)

#define	vssub_vx_i16m4(...) __riscv_vssub_vx_i16m4(__VA_ARGS__)

#define	vssub_vx_i16m4_m(...) __riscv_vssub_vx_i16m4_tumu(__VA_ARGS__)

#define	vssub_vx_i16m8(...) __riscv_vssub_vx_i16m8(__VA_ARGS__)

#define	vssub_vx_i16m8_m(...) __riscv_vssub_vx_i16m8_tumu(__VA_ARGS__)

#define	vssub_vx_i16mf2(...) __riscv_vssub_vx_i16mf2(__VA_ARGS__)

#define	vssub_vx_i16mf2_m(...) __riscv_vssub_vx_i16mf2_tumu(__VA_ARGS__)

#define	vssub_vx_i16mf4(...) __riscv_vssub_vx_i16mf4(__VA_ARGS__)

#define	vssub_vx_i16mf4_m(...) __riscv_vssub_vx_i16mf4_tumu(__VA_ARGS__)

#define	vssub_vx_i32m1(...) __riscv_vssub_vx_i32m1(__VA_ARGS__)

#define	vssub_vx_i32m1_m(...) __riscv_vssub_vx_i32m1_tumu(__VA_ARGS__)

#define	vssub_vx_i32m2(...) __riscv_vssub_vx_i32m2(__VA_ARGS__)

#define	vssub_vx_i32m2_m(...) __riscv_vssub_vx_i32m2_tumu(__VA_ARGS__)

#define	vssub_vx_i32m4(...) __riscv_vssub_vx_i32m4(__VA_ARGS__)

#define	vssub_vx_i32m4_m(...) __riscv_vssub_vx_i32m4_tumu(__VA_ARGS__)

#define	vssub_vx_i32m8(...) __riscv_vssub_vx_i32m8(__VA_ARGS__)

#define	vssub_vx_i32m8_m(...) __riscv_vssub_vx_i32m8_tumu(__VA_ARGS__)

#define	vssub_vx_i32mf2(...) __riscv_vssub_vx_i32mf2(__VA_ARGS__)

#define	vssub_vx_i32mf2_m(...) __riscv_vssub_vx_i32mf2_tumu(__VA_ARGS__)

#define	vssub_vx_i64m1(...) __riscv_vssub_vx_i64m1(__VA_ARGS__)

#define	vssub_vx_i64m1_m(...) __riscv_vssub_vx_i64m1_tumu(__VA_ARGS__)

#define	vssub_vx_i64m2(...) __riscv_vssub_vx_i64m2(__VA_ARGS__)

#define	vssub_vx_i64m2_m(...) __riscv_vssub_vx_i64m2_tumu(__VA_ARGS__)

#define	vssub_vx_i64m4(...) __riscv_vssub_vx_i64m4(__VA_ARGS__)

#define	vssub_vx_i64m4_m(...) __riscv_vssub_vx_i64m4_tumu(__VA_ARGS__)

#define	vssub_vx_i64m8(...) __riscv_vssub_vx_i64m8(__VA_ARGS__)

#define	vssub_vx_i64m8_m(...) __riscv_vssub_vx_i64m8_tumu(__VA_ARGS__)

#define	vssub_vx_i8m1(...) __riscv_vssub_vx_i8m1(__VA_ARGS__)

#define	vssub_vx_i8m1_m(...) __riscv_vssub_vx_i8m1_tumu(__VA_ARGS__)

#define	vssub_vx_i8m2(...) __riscv_vssub_vx_i8m2(__VA_ARGS__)

#define	vssub_vx_i8m2_m(...) __riscv_vssub_vx_i8m2_tumu(__VA_ARGS__)

#define	vssub_vx_i8m4(...) __riscv_vssub_vx_i8m4(__VA_ARGS__)

#define	vssub_vx_i8m4_m(...) __riscv_vssub_vx_i8m4_tumu(__VA_ARGS__)

#define	vssub_vx_i8m8(...) __riscv_vssub_vx_i8m8(__VA_ARGS__)

#define	vssub_vx_i8m8_m(...) __riscv_vssub_vx_i8m8_tumu(__VA_ARGS__)

#define	vssub_vx_i8mf2(...) __riscv_vssub_vx_i8mf2(__VA_ARGS__)

#define	vssub_vx_i8mf2_m(...) __riscv_vssub_vx_i8mf2_tumu(__VA_ARGS__)

#define	vssub_vx_i8mf4(...) __riscv_vssub_vx_i8mf4(__VA_ARGS__)

#define	vssub_vx_i8mf4_m(...) __riscv_vssub_vx_i8mf4_tumu(__VA_ARGS__)

#define	vssub_vx_i8mf8(...) __riscv_vssub_vx_i8mf8(__VA_ARGS__)

#define	vssub_vx_i8mf8_m(...) __riscv_vssub_vx_i8mf8_tumu(__VA_ARGS__)

#define	vssubu_vv_u16m1(...) __riscv_vssubu_vv_u16m1(__VA_ARGS__)

#define	vssubu_vv_u16m1_m(...) __riscv_vssubu_vv_u16m1_tumu(__VA_ARGS__)

#define	vssubu_vv_u16m2(...) __riscv_vssubu_vv_u16m2(__VA_ARGS__)

#define	vssubu_vv_u16m2_m(...) __riscv_vssubu_vv_u16m2_tumu(__VA_ARGS__)

#define	vssubu_vv_u16m4(...) __riscv_vssubu_vv_u16m4(__VA_ARGS__)

#define	vssubu_vv_u16m4_m(...) __riscv_vssubu_vv_u16m4_tumu(__VA_ARGS__)

#define	vssubu_vv_u16m8(...) __riscv_vssubu_vv_u16m8(__VA_ARGS__)

#define	vssubu_vv_u16m8_m(...) __riscv_vssubu_vv_u16m8_tumu(__VA_ARGS__)

#define	vssubu_vv_u16mf2(...) __riscv_vssubu_vv_u16mf2(__VA_ARGS__)

#define	vssubu_vv_u16mf2_m(...) __riscv_vssubu_vv_u16mf2_tumu(__VA_ARGS__)

#define	vssubu_vv_u16mf4(...) __riscv_vssubu_vv_u16mf4(__VA_ARGS__)

#define	vssubu_vv_u16mf4_m(...) __riscv_vssubu_vv_u16mf4_tumu(__VA_ARGS__)

#define	vssubu_vv_u32m1(...) __riscv_vssubu_vv_u32m1(__VA_ARGS__)

#define	vssubu_vv_u32m1_m(...) __riscv_vssubu_vv_u32m1_tumu(__VA_ARGS__)

#define	vssubu_vv_u32m2(...) __riscv_vssubu_vv_u32m2(__VA_ARGS__)

#define	vssubu_vv_u32m2_m(...) __riscv_vssubu_vv_u32m2_tumu(__VA_ARGS__)

#define	vssubu_vv_u32m4(...) __riscv_vssubu_vv_u32m4(__VA_ARGS__)

#define	vssubu_vv_u32m4_m(...) __riscv_vssubu_vv_u32m4_tumu(__VA_ARGS__)

#define	vssubu_vv_u32m8(...) __riscv_vssubu_vv_u32m8(__VA_ARGS__)

#define	vssubu_vv_u32m8_m(...) __riscv_vssubu_vv_u32m8_tumu(__VA_ARGS__)

#define	vssubu_vv_u32mf2(...) __riscv_vssubu_vv_u32mf2(__VA_ARGS__)

#define	vssubu_vv_u32mf2_m(...) __riscv_vssubu_vv_u32mf2_tumu(__VA_ARGS__)

#define	vssubu_vv_u64m1(...) __riscv_vssubu_vv_u64m1(__VA_ARGS__)

#define	vssubu_vv_u64m1_m(...) __riscv_vssubu_vv_u64m1_tumu(__VA_ARGS__)

#define	vssubu_vv_u64m2(...) __riscv_vssubu_vv_u64m2(__VA_ARGS__)

#define	vssubu_vv_u64m2_m(...) __riscv_vssubu_vv_u64m2_tumu(__VA_ARGS__)

#define	vssubu_vv_u64m4(...) __riscv_vssubu_vv_u64m4(__VA_ARGS__)

#define	vssubu_vv_u64m4_m(...) __riscv_vssubu_vv_u64m4_tumu(__VA_ARGS__)

#define	vssubu_vv_u64m8(...) __riscv_vssubu_vv_u64m8(__VA_ARGS__)

#define	vssubu_vv_u64m8_m(...) __riscv_vssubu_vv_u64m8_tumu(__VA_ARGS__)

#define	vssubu_vv_u8m1(...) __riscv_vssubu_vv_u8m1(__VA_ARGS__)

#define	vssubu_vv_u8m1_m(...) __riscv_vssubu_vv_u8m1_tumu(__VA_ARGS__)

#define	vssubu_vv_u8m2(...) __riscv_vssubu_vv_u8m2(__VA_ARGS__)

#define	vssubu_vv_u8m2_m(...) __riscv_vssubu_vv_u8m2_tumu(__VA_ARGS__)

#define	vssubu_vv_u8m4(...) __riscv_vssubu_vv_u8m4(__VA_ARGS__)

#define	vssubu_vv_u8m4_m(...) __riscv_vssubu_vv_u8m4_tumu(__VA_ARGS__)

#define	vssubu_vv_u8m8(...) __riscv_vssubu_vv_u8m8(__VA_ARGS__)

#define	vssubu_vv_u8m8_m(...) __riscv_vssubu_vv_u8m8_tumu(__VA_ARGS__)

#define	vssubu_vv_u8mf2(...) __riscv_vssubu_vv_u8mf2(__VA_ARGS__)

#define	vssubu_vv_u8mf2_m(...) __riscv_vssubu_vv_u8mf2_tumu(__VA_ARGS__)

#define	vssubu_vv_u8mf4(...) __riscv_vssubu_vv_u8mf4(__VA_ARGS__)

#define	vssubu_vv_u8mf4_m(...) __riscv_vssubu_vv_u8mf4_tumu(__VA_ARGS__)

#define	vssubu_vv_u8mf8(...) __riscv_vssubu_vv_u8mf8(__VA_ARGS__)

#define	vssubu_vv_u8mf8_m(...) __riscv_vssubu_vv_u8mf8_tumu(__VA_ARGS__)

#define	vssubu_vx_u16m1(...) __riscv_vssubu_vx_u16m1(__VA_ARGS__)

#define	vssubu_vx_u16m1_m(...) __riscv_vssubu_vx_u16m1_tumu(__VA_ARGS__)

#define	vssubu_vx_u16m2(...) __riscv_vssubu_vx_u16m2(__VA_ARGS__)

#define	vssubu_vx_u16m2_m(...) __riscv_vssubu_vx_u16m2_tumu(__VA_ARGS__)

#define	vssubu_vx_u16m4(...) __riscv_vssubu_vx_u16m4(__VA_ARGS__)

#define	vssubu_vx_u16m4_m(...) __riscv_vssubu_vx_u16m4_tumu(__VA_ARGS__)

#define	vssubu_vx_u16m8(...) __riscv_vssubu_vx_u16m8(__VA_ARGS__)

#define	vssubu_vx_u16m8_m(...) __riscv_vssubu_vx_u16m8_tumu(__VA_ARGS__)

#define	vssubu_vx_u16mf2(...) __riscv_vssubu_vx_u16mf2(__VA_ARGS__)

#define	vssubu_vx_u16mf2_m(...) __riscv_vssubu_vx_u16mf2_tumu(__VA_ARGS__)

#define	vssubu_vx_u16mf4(...) __riscv_vssubu_vx_u16mf4(__VA_ARGS__)

#define	vssubu_vx_u16mf4_m(...) __riscv_vssubu_vx_u16mf4_tumu(__VA_ARGS__)

#define	vssubu_vx_u32m1(...) __riscv_vssubu_vx_u32m1(__VA_ARGS__)

#define	vssubu_vx_u32m1_m(...) __riscv_vssubu_vx_u32m1_tumu(__VA_ARGS__)

#define	vssubu_vx_u32m2(...) __riscv_vssubu_vx_u32m2(__VA_ARGS__)

#define	vssubu_vx_u32m2_m(...) __riscv_vssubu_vx_u32m2_tumu(__VA_ARGS__)

#define	vssubu_vx_u32m4(...) __riscv_vssubu_vx_u32m4(__VA_ARGS__)

#define	vssubu_vx_u32m4_m(...) __riscv_vssubu_vx_u32m4_tumu(__VA_ARGS__)

#define	vssubu_vx_u32m8(...) __riscv_vssubu_vx_u32m8(__VA_ARGS__)

#define	vssubu_vx_u32m8_m(...) __riscv_vssubu_vx_u32m8_tumu(__VA_ARGS__)

#define	vssubu_vx_u32mf2(...) __riscv_vssubu_vx_u32mf2(__VA_ARGS__)

#define	vssubu_vx_u32mf2_m(...) __riscv_vssubu_vx_u32mf2_tumu(__VA_ARGS__)

#define	vssubu_vx_u64m1(...) __riscv_vssubu_vx_u64m1(__VA_ARGS__)

#define	vssubu_vx_u64m1_m(...) __riscv_vssubu_vx_u64m1_tumu(__VA_ARGS__)

#define	vssubu_vx_u64m2(...) __riscv_vssubu_vx_u64m2(__VA_ARGS__)

#define	vssubu_vx_u64m2_m(...) __riscv_vssubu_vx_u64m2_tumu(__VA_ARGS__)

#define	vssubu_vx_u64m4(...) __riscv_vssubu_vx_u64m4(__VA_ARGS__)

#define	vssubu_vx_u64m4_m(...) __riscv_vssubu_vx_u64m4_tumu(__VA_ARGS__)

#define	vssubu_vx_u64m8(...) __riscv_vssubu_vx_u64m8(__VA_ARGS__)

#define	vssubu_vx_u64m8_m(...) __riscv_vssubu_vx_u64m8_tumu(__VA_ARGS__)

#define	vssubu_vx_u8m1(...) __riscv_vssubu_vx_u8m1(__VA_ARGS__)

#define	vssubu_vx_u8m1_m(...) __riscv_vssubu_vx_u8m1_tumu(__VA_ARGS__)

#define	vssubu_vx_u8m2(...) __riscv_vssubu_vx_u8m2(__VA_ARGS__)

#define	vssubu_vx_u8m2_m(...) __riscv_vssubu_vx_u8m2_tumu(__VA_ARGS__)

#define	vssubu_vx_u8m4(...) __riscv_vssubu_vx_u8m4(__VA_ARGS__)

#define	vssubu_vx_u8m4_m(...) __riscv_vssubu_vx_u8m4_tumu(__VA_ARGS__)

#define	vssubu_vx_u8m8(...) __riscv_vssubu_vx_u8m8(__VA_ARGS__)

#define	vssubu_vx_u8m8_m(...) __riscv_vssubu_vx_u8m8_tumu(__VA_ARGS__)

#define	vssubu_vx_u8mf2(...) __riscv_vssubu_vx_u8mf2(__VA_ARGS__)

#define	vssubu_vx_u8mf2_m(...) __riscv_vssubu_vx_u8mf2_tumu(__VA_ARGS__)

#define	vssubu_vx_u8mf4(...) __riscv_vssubu_vx_u8mf4(__VA_ARGS__)

#define	vssubu_vx_u8mf4_m(...) __riscv_vssubu_vx_u8mf4_tumu(__VA_ARGS__)

#define	vssubu_vx_u8mf8(...) __riscv_vssubu_vx_u8mf8(__VA_ARGS__)

#define	vssubu_vx_u8mf8_m(...) __riscv_vssubu_vx_u8mf8_tumu(__VA_ARGS__)

#define	vsub_vv_i16m1(...) __riscv_vsub_vv_i16m1(__VA_ARGS__)

#define	vsub_vv_i16m1_m(...) __riscv_vsub_vv_i16m1_tumu(__VA_ARGS__)

#define	vsub_vv_i16m2(...) __riscv_vsub_vv_i16m2(__VA_ARGS__)

#define	vsub_vv_i16m2_m(...) __riscv_vsub_vv_i16m2_tumu(__VA_ARGS__)

#define	vsub_vv_i16m4(...) __riscv_vsub_vv_i16m4(__VA_ARGS__)

#define	vsub_vv_i16m4_m(...) __riscv_vsub_vv_i16m4_tumu(__VA_ARGS__)

#define	vsub_vv_i16m8(...) __riscv_vsub_vv_i16m8(__VA_ARGS__)

#define	vsub_vv_i16m8_m(...) __riscv_vsub_vv_i16m8_tumu(__VA_ARGS__)

#define	vsub_vv_i16mf2(...) __riscv_vsub_vv_i16mf2(__VA_ARGS__)

#define	vsub_vv_i16mf2_m(...) __riscv_vsub_vv_i16mf2_tumu(__VA_ARGS__)

#define	vsub_vv_i16mf4(...) __riscv_vsub_vv_i16mf4(__VA_ARGS__)

#define	vsub_vv_i16mf4_m(...) __riscv_vsub_vv_i16mf4_tumu(__VA_ARGS__)

#define	vsub_vv_i32m1(...) __riscv_vsub_vv_i32m1(__VA_ARGS__)

#define	vsub_vv_i32m1_m(...) __riscv_vsub_vv_i32m1_tumu(__VA_ARGS__)

#define	vsub_vv_i32m2(...) __riscv_vsub_vv_i32m2(__VA_ARGS__)

#define	vsub_vv_i32m2_m(...) __riscv_vsub_vv_i32m2_tumu(__VA_ARGS__)

#define	vsub_vv_i32m4(...) __riscv_vsub_vv_i32m4(__VA_ARGS__)

#define	vsub_vv_i32m4_m(...) __riscv_vsub_vv_i32m4_tumu(__VA_ARGS__)

#define	vsub_vv_i32m8(...) __riscv_vsub_vv_i32m8(__VA_ARGS__)

#define	vsub_vv_i32m8_m(...) __riscv_vsub_vv_i32m8_tumu(__VA_ARGS__)

#define	vsub_vv_i32mf2(...) __riscv_vsub_vv_i32mf2(__VA_ARGS__)

#define	vsub_vv_i32mf2_m(...) __riscv_vsub_vv_i32mf2_tumu(__VA_ARGS__)

#define	vsub_vv_i64m1(...) __riscv_vsub_vv_i64m1(__VA_ARGS__)

#define	vsub_vv_i64m1_m(...) __riscv_vsub_vv_i64m1_tumu(__VA_ARGS__)

#define	vsub_vv_i64m2(...) __riscv_vsub_vv_i64m2(__VA_ARGS__)

#define	vsub_vv_i64m2_m(...) __riscv_vsub_vv_i64m2_tumu(__VA_ARGS__)

#define	vsub_vv_i64m4(...) __riscv_vsub_vv_i64m4(__VA_ARGS__)

#define	vsub_vv_i64m4_m(...) __riscv_vsub_vv_i64m4_tumu(__VA_ARGS__)

#define	vsub_vv_i64m8(...) __riscv_vsub_vv_i64m8(__VA_ARGS__)

#define	vsub_vv_i64m8_m(...) __riscv_vsub_vv_i64m8_tumu(__VA_ARGS__)

#define	vsub_vv_i8m1(...) __riscv_vsub_vv_i8m1(__VA_ARGS__)

#define	vsub_vv_i8m1_m(...) __riscv_vsub_vv_i8m1_tumu(__VA_ARGS__)

#define	vsub_vv_i8m2(...) __riscv_vsub_vv_i8m2(__VA_ARGS__)

#define	vsub_vv_i8m2_m(...) __riscv_vsub_vv_i8m2_tumu(__VA_ARGS__)

#define	vsub_vv_i8m4(...) __riscv_vsub_vv_i8m4(__VA_ARGS__)

#define	vsub_vv_i8m4_m(...) __riscv_vsub_vv_i8m4_tumu(__VA_ARGS__)

#define	vsub_vv_i8m8(...) __riscv_vsub_vv_i8m8(__VA_ARGS__)

#define	vsub_vv_i8m8_m(...) __riscv_vsub_vv_i8m8_tumu(__VA_ARGS__)

#define	vsub_vv_i8mf2(...) __riscv_vsub_vv_i8mf2(__VA_ARGS__)

#define	vsub_vv_i8mf2_m(...) __riscv_vsub_vv_i8mf2_tumu(__VA_ARGS__)

#define	vsub_vv_i8mf4(...) __riscv_vsub_vv_i8mf4(__VA_ARGS__)

#define	vsub_vv_i8mf4_m(...) __riscv_vsub_vv_i8mf4_tumu(__VA_ARGS__)

#define	vsub_vv_i8mf8(...) __riscv_vsub_vv_i8mf8(__VA_ARGS__)

#define	vsub_vv_i8mf8_m(...) __riscv_vsub_vv_i8mf8_tumu(__VA_ARGS__)

#define	vsub_vv_u16m1(...) __riscv_vsub_vv_u16m1(__VA_ARGS__)

#define	vsub_vv_u16m1_m(...) __riscv_vsub_vv_u16m1_tumu(__VA_ARGS__)

#define	vsub_vv_u16m2(...) __riscv_vsub_vv_u16m2(__VA_ARGS__)

#define	vsub_vv_u16m2_m(...) __riscv_vsub_vv_u16m2_tumu(__VA_ARGS__)

#define	vsub_vv_u16m4(...) __riscv_vsub_vv_u16m4(__VA_ARGS__)

#define	vsub_vv_u16m4_m(...) __riscv_vsub_vv_u16m4_tumu(__VA_ARGS__)

#define	vsub_vv_u16m8(...) __riscv_vsub_vv_u16m8(__VA_ARGS__)

#define	vsub_vv_u16m8_m(...) __riscv_vsub_vv_u16m8_tumu(__VA_ARGS__)

#define	vsub_vv_u16mf2(...) __riscv_vsub_vv_u16mf2(__VA_ARGS__)

#define	vsub_vv_u16mf2_m(...) __riscv_vsub_vv_u16mf2_tumu(__VA_ARGS__)

#define	vsub_vv_u16mf4(...) __riscv_vsub_vv_u16mf4(__VA_ARGS__)

#define	vsub_vv_u16mf4_m(...) __riscv_vsub_vv_u16mf4_tumu(__VA_ARGS__)

#define	vsub_vv_u32m1(...) __riscv_vsub_vv_u32m1(__VA_ARGS__)

#define	vsub_vv_u32m1_m(...) __riscv_vsub_vv_u32m1_tumu(__VA_ARGS__)

#define	vsub_vv_u32m2(...) __riscv_vsub_vv_u32m2(__VA_ARGS__)

#define	vsub_vv_u32m2_m(...) __riscv_vsub_vv_u32m2_tumu(__VA_ARGS__)

#define	vsub_vv_u32m4(...) __riscv_vsub_vv_u32m4(__VA_ARGS__)

#define	vsub_vv_u32m4_m(...) __riscv_vsub_vv_u32m4_tumu(__VA_ARGS__)

#define	vsub_vv_u32m8(...) __riscv_vsub_vv_u32m8(__VA_ARGS__)

#define	vsub_vv_u32m8_m(...) __riscv_vsub_vv_u32m8_tumu(__VA_ARGS__)

#define	vsub_vv_u32mf2(...) __riscv_vsub_vv_u32mf2(__VA_ARGS__)

#define	vsub_vv_u32mf2_m(...) __riscv_vsub_vv_u32mf2_tumu(__VA_ARGS__)

#define	vsub_vv_u64m1(...) __riscv_vsub_vv_u64m1(__VA_ARGS__)

#define	vsub_vv_u64m1_m(...) __riscv_vsub_vv_u64m1_tumu(__VA_ARGS__)

#define	vsub_vv_u64m2(...) __riscv_vsub_vv_u64m2(__VA_ARGS__)

#define	vsub_vv_u64m2_m(...) __riscv_vsub_vv_u64m2_tumu(__VA_ARGS__)

#define	vsub_vv_u64m4(...) __riscv_vsub_vv_u64m4(__VA_ARGS__)

#define	vsub_vv_u64m4_m(...) __riscv_vsub_vv_u64m4_tumu(__VA_ARGS__)

#define	vsub_vv_u64m8(...) __riscv_vsub_vv_u64m8(__VA_ARGS__)

#define	vsub_vv_u64m8_m(...) __riscv_vsub_vv_u64m8_tumu(__VA_ARGS__)

#define	vsub_vv_u8m1(...) __riscv_vsub_vv_u8m1(__VA_ARGS__)

#define	vsub_vv_u8m1_m(...) __riscv_vsub_vv_u8m1_tumu(__VA_ARGS__)

#define	vsub_vv_u8m2(...) __riscv_vsub_vv_u8m2(__VA_ARGS__)

#define	vsub_vv_u8m2_m(...) __riscv_vsub_vv_u8m2_tumu(__VA_ARGS__)

#define	vsub_vv_u8m4(...) __riscv_vsub_vv_u8m4(__VA_ARGS__)

#define	vsub_vv_u8m4_m(...) __riscv_vsub_vv_u8m4_tumu(__VA_ARGS__)

#define	vsub_vv_u8m8(...) __riscv_vsub_vv_u8m8(__VA_ARGS__)

#define	vsub_vv_u8m8_m(...) __riscv_vsub_vv_u8m8_tumu(__VA_ARGS__)

#define	vsub_vv_u8mf2(...) __riscv_vsub_vv_u8mf2(__VA_ARGS__)

#define	vsub_vv_u8mf2_m(...) __riscv_vsub_vv_u8mf2_tumu(__VA_ARGS__)

#define	vsub_vv_u8mf4(...) __riscv_vsub_vv_u8mf4(__VA_ARGS__)

#define	vsub_vv_u8mf4_m(...) __riscv_vsub_vv_u8mf4_tumu(__VA_ARGS__)

#define	vsub_vv_u8mf8(...) __riscv_vsub_vv_u8mf8(__VA_ARGS__)

#define	vsub_vv_u8mf8_m(...) __riscv_vsub_vv_u8mf8_tumu(__VA_ARGS__)

#define	vsub_vx_i16m1(...) __riscv_vsub_vx_i16m1(__VA_ARGS__)

#define	vsub_vx_i16m1_m(...) __riscv_vsub_vx_i16m1_tumu(__VA_ARGS__)

#define	vsub_vx_i16m2(...) __riscv_vsub_vx_i16m2(__VA_ARGS__)

#define	vsub_vx_i16m2_m(...) __riscv_vsub_vx_i16m2_tumu(__VA_ARGS__)

#define	vsub_vx_i16m4(...) __riscv_vsub_vx_i16m4(__VA_ARGS__)

#define	vsub_vx_i16m4_m(...) __riscv_vsub_vx_i16m4_tumu(__VA_ARGS__)

#define	vsub_vx_i16m8(...) __riscv_vsub_vx_i16m8(__VA_ARGS__)

#define	vsub_vx_i16m8_m(...) __riscv_vsub_vx_i16m8_tumu(__VA_ARGS__)

#define	vsub_vx_i16mf2(...) __riscv_vsub_vx_i16mf2(__VA_ARGS__)

#define	vsub_vx_i16mf2_m(...) __riscv_vsub_vx_i16mf2_tumu(__VA_ARGS__)

#define	vsub_vx_i16mf4(...) __riscv_vsub_vx_i16mf4(__VA_ARGS__)

#define	vsub_vx_i16mf4_m(...) __riscv_vsub_vx_i16mf4_tumu(__VA_ARGS__)

#define	vsub_vx_i32m1(...) __riscv_vsub_vx_i32m1(__VA_ARGS__)

#define	vsub_vx_i32m1_m(...) __riscv_vsub_vx_i32m1_tumu(__VA_ARGS__)

#define	vsub_vx_i32m2(...) __riscv_vsub_vx_i32m2(__VA_ARGS__)

#define	vsub_vx_i32m2_m(...) __riscv_vsub_vx_i32m2_tumu(__VA_ARGS__)

#define	vsub_vx_i32m4(...) __riscv_vsub_vx_i32m4(__VA_ARGS__)

#define	vsub_vx_i32m4_m(...) __riscv_vsub_vx_i32m4_tumu(__VA_ARGS__)

#define	vsub_vx_i32m8(...) __riscv_vsub_vx_i32m8(__VA_ARGS__)

#define	vsub_vx_i32m8_m(...) __riscv_vsub_vx_i32m8_tumu(__VA_ARGS__)

#define	vsub_vx_i32mf2(...) __riscv_vsub_vx_i32mf2(__VA_ARGS__)

#define	vsub_vx_i32mf2_m(...) __riscv_vsub_vx_i32mf2_tumu(__VA_ARGS__)

#define	vsub_vx_i64m1(...) __riscv_vsub_vx_i64m1(__VA_ARGS__)

#define	vsub_vx_i64m1_m(...) __riscv_vsub_vx_i64m1_tumu(__VA_ARGS__)

#define	vsub_vx_i64m2(...) __riscv_vsub_vx_i64m2(__VA_ARGS__)

#define	vsub_vx_i64m2_m(...) __riscv_vsub_vx_i64m2_tumu(__VA_ARGS__)

#define	vsub_vx_i64m4(...) __riscv_vsub_vx_i64m4(__VA_ARGS__)

#define	vsub_vx_i64m4_m(...) __riscv_vsub_vx_i64m4_tumu(__VA_ARGS__)

#define	vsub_vx_i64m8(...) __riscv_vsub_vx_i64m8(__VA_ARGS__)

#define	vsub_vx_i64m8_m(...) __riscv_vsub_vx_i64m8_tumu(__VA_ARGS__)

#define	vsub_vx_i8m1(...) __riscv_vsub_vx_i8m1(__VA_ARGS__)

#define	vsub_vx_i8m1_m(...) __riscv_vsub_vx_i8m1_tumu(__VA_ARGS__)

#define	vsub_vx_i8m2(...) __riscv_vsub_vx_i8m2(__VA_ARGS__)

#define	vsub_vx_i8m2_m(...) __riscv_vsub_vx_i8m2_tumu(__VA_ARGS__)

#define	vsub_vx_i8m4(...) __riscv_vsub_vx_i8m4(__VA_ARGS__)

#define	vsub_vx_i8m4_m(...) __riscv_vsub_vx_i8m4_tumu(__VA_ARGS__)

#define	vsub_vx_i8m8(...) __riscv_vsub_vx_i8m8(__VA_ARGS__)

#define	vsub_vx_i8m8_m(...) __riscv_vsub_vx_i8m8_tumu(__VA_ARGS__)

#define	vsub_vx_i8mf2(...) __riscv_vsub_vx_i8mf2(__VA_ARGS__)

#define	vsub_vx_i8mf2_m(...) __riscv_vsub_vx_i8mf2_tumu(__VA_ARGS__)

#define	vsub_vx_i8mf4(...) __riscv_vsub_vx_i8mf4(__VA_ARGS__)

#define	vsub_vx_i8mf4_m(...) __riscv_vsub_vx_i8mf4_tumu(__VA_ARGS__)

#define	vsub_vx_i8mf8(...) __riscv_vsub_vx_i8mf8(__VA_ARGS__)

#define	vsub_vx_i8mf8_m(...) __riscv_vsub_vx_i8mf8_tumu(__VA_ARGS__)

#define	vsub_vx_u16m1(...) __riscv_vsub_vx_u16m1(__VA_ARGS__)

#define	vsub_vx_u16m1_m(...) __riscv_vsub_vx_u16m1_tumu(__VA_ARGS__)

#define	vsub_vx_u16m2(...) __riscv_vsub_vx_u16m2(__VA_ARGS__)

#define	vsub_vx_u16m2_m(...) __riscv_vsub_vx_u16m2_tumu(__VA_ARGS__)

#define	vsub_vx_u16m4(...) __riscv_vsub_vx_u16m4(__VA_ARGS__)

#define	vsub_vx_u16m4_m(...) __riscv_vsub_vx_u16m4_tumu(__VA_ARGS__)

#define	vsub_vx_u16m8(...) __riscv_vsub_vx_u16m8(__VA_ARGS__)

#define	vsub_vx_u16m8_m(...) __riscv_vsub_vx_u16m8_tumu(__VA_ARGS__)

#define	vsub_vx_u16mf2(...) __riscv_vsub_vx_u16mf2(__VA_ARGS__)

#define	vsub_vx_u16mf2_m(...) __riscv_vsub_vx_u16mf2_tumu(__VA_ARGS__)

#define	vsub_vx_u16mf4(...) __riscv_vsub_vx_u16mf4(__VA_ARGS__)

#define	vsub_vx_u16mf4_m(...) __riscv_vsub_vx_u16mf4_tumu(__VA_ARGS__)

#define	vsub_vx_u32m1(...) __riscv_vsub_vx_u32m1(__VA_ARGS__)

#define	vsub_vx_u32m1_m(...) __riscv_vsub_vx_u32m1_tumu(__VA_ARGS__)

#define	vsub_vx_u32m2(...) __riscv_vsub_vx_u32m2(__VA_ARGS__)

#define	vsub_vx_u32m2_m(...) __riscv_vsub_vx_u32m2_tumu(__VA_ARGS__)

#define	vsub_vx_u32m4(...) __riscv_vsub_vx_u32m4(__VA_ARGS__)

#define	vsub_vx_u32m4_m(...) __riscv_vsub_vx_u32m4_tumu(__VA_ARGS__)

#define	vsub_vx_u32m8(...) __riscv_vsub_vx_u32m8(__VA_ARGS__)

#define	vsub_vx_u32m8_m(...) __riscv_vsub_vx_u32m8_tumu(__VA_ARGS__)

#define	vsub_vx_u32mf2(...) __riscv_vsub_vx_u32mf2(__VA_ARGS__)

#define	vsub_vx_u32mf2_m(...) __riscv_vsub_vx_u32mf2_tumu(__VA_ARGS__)

#define	vsub_vx_u64m1(...) __riscv_vsub_vx_u64m1(__VA_ARGS__)

#define	vsub_vx_u64m1_m(...) __riscv_vsub_vx_u64m1_tumu(__VA_ARGS__)

#define	vsub_vx_u64m2(...) __riscv_vsub_vx_u64m2(__VA_ARGS__)

#define	vsub_vx_u64m2_m(...) __riscv_vsub_vx_u64m2_tumu(__VA_ARGS__)

#define	vsub_vx_u64m4(...) __riscv_vsub_vx_u64m4(__VA_ARGS__)

#define	vsub_vx_u64m4_m(...) __riscv_vsub_vx_u64m4_tumu(__VA_ARGS__)

#define	vsub_vx_u64m8(...) __riscv_vsub_vx_u64m8(__VA_ARGS__)

#define	vsub_vx_u64m8_m(...) __riscv_vsub_vx_u64m8_tumu(__VA_ARGS__)

#define	vsub_vx_u8m1(...) __riscv_vsub_vx_u8m1(__VA_ARGS__)

#define	vsub_vx_u8m1_m(...) __riscv_vsub_vx_u8m1_tumu(__VA_ARGS__)

#define	vsub_vx_u8m2(...) __riscv_vsub_vx_u8m2(__VA_ARGS__)

#define	vsub_vx_u8m2_m(...) __riscv_vsub_vx_u8m2_tumu(__VA_ARGS__)

#define	vsub_vx_u8m4(...) __riscv_vsub_vx_u8m4(__VA_ARGS__)

#define	vsub_vx_u8m4_m(...) __riscv_vsub_vx_u8m4_tumu(__VA_ARGS__)

#define	vsub_vx_u8m8(...) __riscv_vsub_vx_u8m8(__VA_ARGS__)

#define	vsub_vx_u8m8_m(...) __riscv_vsub_vx_u8m8_tumu(__VA_ARGS__)

#define	vsub_vx_u8mf2(...) __riscv_vsub_vx_u8mf2(__VA_ARGS__)

#define	vsub_vx_u8mf2_m(...) __riscv_vsub_vx_u8mf2_tumu(__VA_ARGS__)

#define	vsub_vx_u8mf4(...) __riscv_vsub_vx_u8mf4(__VA_ARGS__)

#define	vsub_vx_u8mf4_m(...) __riscv_vsub_vx_u8mf4_tumu(__VA_ARGS__)

#define	vsub_vx_u8mf8(...) __riscv_vsub_vx_u8mf8(__VA_ARGS__)

#define	vsub_vx_u8mf8_m(...) __riscv_vsub_vx_u8mf8_tumu(__VA_ARGS__)

#define	vsuxei16_v_f16m1(...) __riscv_vsuxei16_v_f16m1(__VA_ARGS__)

#define	vsuxei16_v_f16m1_m(...) __riscv_vsuxei16_v_f16m1_m(__VA_ARGS__)

#define	vsuxei16_v_f16m2(...) __riscv_vsuxei16_v_f16m2(__VA_ARGS__)

#define	vsuxei16_v_f16m2_m(...) __riscv_vsuxei16_v_f16m2_m(__VA_ARGS__)

#define	vsuxei16_v_f16m4(...) __riscv_vsuxei16_v_f16m4(__VA_ARGS__)

#define	vsuxei16_v_f16m4_m(...) __riscv_vsuxei16_v_f16m4_m(__VA_ARGS__)

#define	vsuxei16_v_f16m8(...) __riscv_vsuxei16_v_f16m8(__VA_ARGS__)

#define	vsuxei16_v_f16m8_m(...) __riscv_vsuxei16_v_f16m8_m(__VA_ARGS__)

#define	vsuxei16_v_f16mf2(...) __riscv_vsuxei16_v_f16mf2(__VA_ARGS__)

#define	vsuxei16_v_f16mf2_m(...) __riscv_vsuxei16_v_f16mf2_m(__VA_ARGS__)

#define	vsuxei16_v_f16mf4(...) __riscv_vsuxei16_v_f16mf4(__VA_ARGS__)

#define	vsuxei16_v_f16mf4_m(...) __riscv_vsuxei16_v_f16mf4_m(__VA_ARGS__)

#define	vsuxei16_v_f32m1(...) __riscv_vsuxei16_v_f32m1(__VA_ARGS__)

#define	vsuxei16_v_f32m1_m(...) __riscv_vsuxei16_v_f32m1_m(__VA_ARGS__)

#define	vsuxei16_v_f32m2(...) __riscv_vsuxei16_v_f32m2(__VA_ARGS__)

#define	vsuxei16_v_f32m2_m(...) __riscv_vsuxei16_v_f32m2_m(__VA_ARGS__)

#define	vsuxei16_v_f32m4(...) __riscv_vsuxei16_v_f32m4(__VA_ARGS__)

#define	vsuxei16_v_f32m4_m(...) __riscv_vsuxei16_v_f32m4_m(__VA_ARGS__)

#define	vsuxei16_v_f32m8(...) __riscv_vsuxei16_v_f32m8(__VA_ARGS__)

#define	vsuxei16_v_f32m8_m(...) __riscv_vsuxei16_v_f32m8_m(__VA_ARGS__)

#define	vsuxei16_v_f32mf2(...) __riscv_vsuxei16_v_f32mf2(__VA_ARGS__)

#define	vsuxei16_v_f32mf2_m(...) __riscv_vsuxei16_v_f32mf2_m(__VA_ARGS__)

#define	vsuxei16_v_f64m1(...) __riscv_vsuxei16_v_f64m1(__VA_ARGS__)

#define	vsuxei16_v_f64m1_m(...) __riscv_vsuxei16_v_f64m1_m(__VA_ARGS__)

#define	vsuxei16_v_f64m2(...) __riscv_vsuxei16_v_f64m2(__VA_ARGS__)

#define	vsuxei16_v_f64m2_m(...) __riscv_vsuxei16_v_f64m2_m(__VA_ARGS__)

#define	vsuxei16_v_f64m4(...) __riscv_vsuxei16_v_f64m4(__VA_ARGS__)

#define	vsuxei16_v_f64m4_m(...) __riscv_vsuxei16_v_f64m4_m(__VA_ARGS__)

#define	vsuxei16_v_f64m8(...) __riscv_vsuxei16_v_f64m8(__VA_ARGS__)

#define	vsuxei16_v_f64m8_m(...) __riscv_vsuxei16_v_f64m8_m(__VA_ARGS__)

#define	vsuxei16_v_i16m1(...) __riscv_vsuxei16_v_i16m1(__VA_ARGS__)

#define	vsuxei16_v_i16m1_m(...) __riscv_vsuxei16_v_i16m1_m(__VA_ARGS__)

#define	vsuxei16_v_i16m2(...) __riscv_vsuxei16_v_i16m2(__VA_ARGS__)

#define	vsuxei16_v_i16m2_m(...) __riscv_vsuxei16_v_i16m2_m(__VA_ARGS__)

#define	vsuxei16_v_i16m4(...) __riscv_vsuxei16_v_i16m4(__VA_ARGS__)

#define	vsuxei16_v_i16m4_m(...) __riscv_vsuxei16_v_i16m4_m(__VA_ARGS__)

#define	vsuxei16_v_i16m8(...) __riscv_vsuxei16_v_i16m8(__VA_ARGS__)

#define	vsuxei16_v_i16m8_m(...) __riscv_vsuxei16_v_i16m8_m(__VA_ARGS__)

#define	vsuxei16_v_i16mf2(...) __riscv_vsuxei16_v_i16mf2(__VA_ARGS__)

#define	vsuxei16_v_i16mf2_m(...) __riscv_vsuxei16_v_i16mf2_m(__VA_ARGS__)

#define	vsuxei16_v_i16mf4(...) __riscv_vsuxei16_v_i16mf4(__VA_ARGS__)

#define	vsuxei16_v_i16mf4_m(...) __riscv_vsuxei16_v_i16mf4_m(__VA_ARGS__)

#define	vsuxei16_v_i32m1(...) __riscv_vsuxei16_v_i32m1(__VA_ARGS__)

#define	vsuxei16_v_i32m1_m(...) __riscv_vsuxei16_v_i32m1_m(__VA_ARGS__)

#define	vsuxei16_v_i32m2(...) __riscv_vsuxei16_v_i32m2(__VA_ARGS__)

#define	vsuxei16_v_i32m2_m(...) __riscv_vsuxei16_v_i32m2_m(__VA_ARGS__)

#define	vsuxei16_v_i32m4(...) __riscv_vsuxei16_v_i32m4(__VA_ARGS__)

#define	vsuxei16_v_i32m4_m(...) __riscv_vsuxei16_v_i32m4_m(__VA_ARGS__)

#define	vsuxei16_v_i32m8(...) __riscv_vsuxei16_v_i32m8(__VA_ARGS__)

#define	vsuxei16_v_i32m8_m(...) __riscv_vsuxei16_v_i32m8_m(__VA_ARGS__)

#define	vsuxei16_v_i32mf2(...) __riscv_vsuxei16_v_i32mf2(__VA_ARGS__)

#define	vsuxei16_v_i32mf2_m(...) __riscv_vsuxei16_v_i32mf2_m(__VA_ARGS__)

#define	vsuxei16_v_i64m1(...) __riscv_vsuxei16_v_i64m1(__VA_ARGS__)

#define	vsuxei16_v_i64m1_m(...) __riscv_vsuxei16_v_i64m1_m(__VA_ARGS__)

#define	vsuxei16_v_i64m2(...) __riscv_vsuxei16_v_i64m2(__VA_ARGS__)

#define	vsuxei16_v_i64m2_m(...) __riscv_vsuxei16_v_i64m2_m(__VA_ARGS__)

#define	vsuxei16_v_i64m4(...) __riscv_vsuxei16_v_i64m4(__VA_ARGS__)

#define	vsuxei16_v_i64m4_m(...) __riscv_vsuxei16_v_i64m4_m(__VA_ARGS__)

#define	vsuxei16_v_i64m8(...) __riscv_vsuxei16_v_i64m8(__VA_ARGS__)

#define	vsuxei16_v_i64m8_m(...) __riscv_vsuxei16_v_i64m8_m(__VA_ARGS__)

#define	vsuxei16_v_i8m1(...) __riscv_vsuxei16_v_i8m1(__VA_ARGS__)

#define	vsuxei16_v_i8m1_m(...) __riscv_vsuxei16_v_i8m1_m(__VA_ARGS__)

#define	vsuxei16_v_i8m2(...) __riscv_vsuxei16_v_i8m2(__VA_ARGS__)

#define	vsuxei16_v_i8m2_m(...) __riscv_vsuxei16_v_i8m2_m(__VA_ARGS__)

#define	vsuxei16_v_i8m4(...) __riscv_vsuxei16_v_i8m4(__VA_ARGS__)

#define	vsuxei16_v_i8m4_m(...) __riscv_vsuxei16_v_i8m4_m(__VA_ARGS__)

#define	vsuxei16_v_i8mf2(...) __riscv_vsuxei16_v_i8mf2(__VA_ARGS__)

#define	vsuxei16_v_i8mf2_m(...) __riscv_vsuxei16_v_i8mf2_m(__VA_ARGS__)

#define	vsuxei16_v_i8mf4(...) __riscv_vsuxei16_v_i8mf4(__VA_ARGS__)

#define	vsuxei16_v_i8mf4_m(...) __riscv_vsuxei16_v_i8mf4_m(__VA_ARGS__)

#define	vsuxei16_v_i8mf8(...) __riscv_vsuxei16_v_i8mf8(__VA_ARGS__)

#define	vsuxei16_v_i8mf8_m(...) __riscv_vsuxei16_v_i8mf8_m(__VA_ARGS__)

#define	vsuxei16_v_u16m1(...) __riscv_vsuxei16_v_u16m1(__VA_ARGS__)

#define	vsuxei16_v_u16m1_m(...) __riscv_vsuxei16_v_u16m1_m(__VA_ARGS__)

#define	vsuxei16_v_u16m2(...) __riscv_vsuxei16_v_u16m2(__VA_ARGS__)

#define	vsuxei16_v_u16m2_m(...) __riscv_vsuxei16_v_u16m2_m(__VA_ARGS__)

#define	vsuxei16_v_u16m4(...) __riscv_vsuxei16_v_u16m4(__VA_ARGS__)

#define	vsuxei16_v_u16m4_m(...) __riscv_vsuxei16_v_u16m4_m(__VA_ARGS__)

#define	vsuxei16_v_u16m8(...) __riscv_vsuxei16_v_u16m8(__VA_ARGS__)

#define	vsuxei16_v_u16m8_m(...) __riscv_vsuxei16_v_u16m8_m(__VA_ARGS__)

#define	vsuxei16_v_u16mf2(...) __riscv_vsuxei16_v_u16mf2(__VA_ARGS__)

#define	vsuxei16_v_u16mf2_m(...) __riscv_vsuxei16_v_u16mf2_m(__VA_ARGS__)

#define	vsuxei16_v_u16mf4(...) __riscv_vsuxei16_v_u16mf4(__VA_ARGS__)

#define	vsuxei16_v_u16mf4_m(...) __riscv_vsuxei16_v_u16mf4_m(__VA_ARGS__)

#define	vsuxei16_v_u32m1(...) __riscv_vsuxei16_v_u32m1(__VA_ARGS__)

#define	vsuxei16_v_u32m1_m(...) __riscv_vsuxei16_v_u32m1_m(__VA_ARGS__)

#define	vsuxei16_v_u32m2(...) __riscv_vsuxei16_v_u32m2(__VA_ARGS__)

#define	vsuxei16_v_u32m2_m(...) __riscv_vsuxei16_v_u32m2_m(__VA_ARGS__)

#define	vsuxei16_v_u32m4(...) __riscv_vsuxei16_v_u32m4(__VA_ARGS__)

#define	vsuxei16_v_u32m4_m(...) __riscv_vsuxei16_v_u32m4_m(__VA_ARGS__)

#define	vsuxei16_v_u32m8(...) __riscv_vsuxei16_v_u32m8(__VA_ARGS__)

#define	vsuxei16_v_u32m8_m(...) __riscv_vsuxei16_v_u32m8_m(__VA_ARGS__)

#define	vsuxei16_v_u32mf2(...) __riscv_vsuxei16_v_u32mf2(__VA_ARGS__)

#define	vsuxei16_v_u32mf2_m(...) __riscv_vsuxei16_v_u32mf2_m(__VA_ARGS__)

#define	vsuxei16_v_u64m1(...) __riscv_vsuxei16_v_u64m1(__VA_ARGS__)

#define	vsuxei16_v_u64m1_m(...) __riscv_vsuxei16_v_u64m1_m(__VA_ARGS__)

#define	vsuxei16_v_u64m2(...) __riscv_vsuxei16_v_u64m2(__VA_ARGS__)

#define	vsuxei16_v_u64m2_m(...) __riscv_vsuxei16_v_u64m2_m(__VA_ARGS__)

#define	vsuxei16_v_u64m4(...) __riscv_vsuxei16_v_u64m4(__VA_ARGS__)

#define	vsuxei16_v_u64m4_m(...) __riscv_vsuxei16_v_u64m4_m(__VA_ARGS__)

#define	vsuxei16_v_u64m8(...) __riscv_vsuxei16_v_u64m8(__VA_ARGS__)

#define	vsuxei16_v_u64m8_m(...) __riscv_vsuxei16_v_u64m8_m(__VA_ARGS__)

#define	vsuxei16_v_u8m1(...) __riscv_vsuxei16_v_u8m1(__VA_ARGS__)

#define	vsuxei16_v_u8m1_m(...) __riscv_vsuxei16_v_u8m1_m(__VA_ARGS__)

#define	vsuxei16_v_u8m2(...) __riscv_vsuxei16_v_u8m2(__VA_ARGS__)

#define	vsuxei16_v_u8m2_m(...) __riscv_vsuxei16_v_u8m2_m(__VA_ARGS__)

#define	vsuxei16_v_u8m4(...) __riscv_vsuxei16_v_u8m4(__VA_ARGS__)

#define	vsuxei16_v_u8m4_m(...) __riscv_vsuxei16_v_u8m4_m(__VA_ARGS__)

#define	vsuxei16_v_u8mf2(...) __riscv_vsuxei16_v_u8mf2(__VA_ARGS__)

#define	vsuxei16_v_u8mf2_m(...) __riscv_vsuxei16_v_u8mf2_m(__VA_ARGS__)

#define	vsuxei16_v_u8mf4(...) __riscv_vsuxei16_v_u8mf4(__VA_ARGS__)

#define	vsuxei16_v_u8mf4_m(...) __riscv_vsuxei16_v_u8mf4_m(__VA_ARGS__)

#define	vsuxei16_v_u8mf8(...) __riscv_vsuxei16_v_u8mf8(__VA_ARGS__)

#define	vsuxei16_v_u8mf8_m(...) __riscv_vsuxei16_v_u8mf8_m(__VA_ARGS__)

#define	vsuxei32_v_f16m1(...) __riscv_vsuxei32_v_f16m1(__VA_ARGS__)

#define	vsuxei32_v_f16m1_m(...) __riscv_vsuxei32_v_f16m1_m(__VA_ARGS__)

#define	vsuxei32_v_f16m2(...) __riscv_vsuxei32_v_f16m2(__VA_ARGS__)

#define	vsuxei32_v_f16m2_m(...) __riscv_vsuxei32_v_f16m2_m(__VA_ARGS__)

#define	vsuxei32_v_f16m4(...) __riscv_vsuxei32_v_f16m4(__VA_ARGS__)

#define	vsuxei32_v_f16m4_m(...) __riscv_vsuxei32_v_f16m4_m(__VA_ARGS__)

#define	vsuxei32_v_f16mf2(...) __riscv_vsuxei32_v_f16mf2(__VA_ARGS__)

#define	vsuxei32_v_f16mf2_m(...) __riscv_vsuxei32_v_f16mf2_m(__VA_ARGS__)

#define	vsuxei32_v_f16mf4(...) __riscv_vsuxei32_v_f16mf4(__VA_ARGS__)

#define	vsuxei32_v_f16mf4_m(...) __riscv_vsuxei32_v_f16mf4_m(__VA_ARGS__)

#define	vsuxei32_v_f32m1(...) __riscv_vsuxei32_v_f32m1(__VA_ARGS__)

#define	vsuxei32_v_f32m1_m(...) __riscv_vsuxei32_v_f32m1_m(__VA_ARGS__)

#define	vsuxei32_v_f32m2(...) __riscv_vsuxei32_v_f32m2(__VA_ARGS__)

#define	vsuxei32_v_f32m2_m(...) __riscv_vsuxei32_v_f32m2_m(__VA_ARGS__)

#define	vsuxei32_v_f32m4(...) __riscv_vsuxei32_v_f32m4(__VA_ARGS__)

#define	vsuxei32_v_f32m4_m(...) __riscv_vsuxei32_v_f32m4_m(__VA_ARGS__)

#define	vsuxei32_v_f32m8(...) __riscv_vsuxei32_v_f32m8(__VA_ARGS__)

#define	vsuxei32_v_f32m8_m(...) __riscv_vsuxei32_v_f32m8_m(__VA_ARGS__)

#define	vsuxei32_v_f32mf2(...) __riscv_vsuxei32_v_f32mf2(__VA_ARGS__)

#define	vsuxei32_v_f32mf2_m(...) __riscv_vsuxei32_v_f32mf2_m(__VA_ARGS__)

#define	vsuxei32_v_f64m1(...) __riscv_vsuxei32_v_f64m1(__VA_ARGS__)

#define	vsuxei32_v_f64m1_m(...) __riscv_vsuxei32_v_f64m1_m(__VA_ARGS__)

#define	vsuxei32_v_f64m2(...) __riscv_vsuxei32_v_f64m2(__VA_ARGS__)

#define	vsuxei32_v_f64m2_m(...) __riscv_vsuxei32_v_f64m2_m(__VA_ARGS__)

#define	vsuxei32_v_f64m4(...) __riscv_vsuxei32_v_f64m4(__VA_ARGS__)

#define	vsuxei32_v_f64m4_m(...) __riscv_vsuxei32_v_f64m4_m(__VA_ARGS__)

#define	vsuxei32_v_f64m8(...) __riscv_vsuxei32_v_f64m8(__VA_ARGS__)

#define	vsuxei32_v_f64m8_m(...) __riscv_vsuxei32_v_f64m8_m(__VA_ARGS__)

#define	vsuxei32_v_i16m1(...) __riscv_vsuxei32_v_i16m1(__VA_ARGS__)

#define	vsuxei32_v_i16m1_m(...) __riscv_vsuxei32_v_i16m1_m(__VA_ARGS__)

#define	vsuxei32_v_i16m2(...) __riscv_vsuxei32_v_i16m2(__VA_ARGS__)

#define	vsuxei32_v_i16m2_m(...) __riscv_vsuxei32_v_i16m2_m(__VA_ARGS__)

#define	vsuxei32_v_i16m4(...) __riscv_vsuxei32_v_i16m4(__VA_ARGS__)

#define	vsuxei32_v_i16m4_m(...) __riscv_vsuxei32_v_i16m4_m(__VA_ARGS__)

#define	vsuxei32_v_i16mf2(...) __riscv_vsuxei32_v_i16mf2(__VA_ARGS__)

#define	vsuxei32_v_i16mf2_m(...) __riscv_vsuxei32_v_i16mf2_m(__VA_ARGS__)

#define	vsuxei32_v_i16mf4(...) __riscv_vsuxei32_v_i16mf4(__VA_ARGS__)

#define	vsuxei32_v_i16mf4_m(...) __riscv_vsuxei32_v_i16mf4_m(__VA_ARGS__)

#define	vsuxei32_v_i32m1(...) __riscv_vsuxei32_v_i32m1(__VA_ARGS__)

#define	vsuxei32_v_i32m1_m(...) __riscv_vsuxei32_v_i32m1_m(__VA_ARGS__)

#define	vsuxei32_v_i32m2(...) __riscv_vsuxei32_v_i32m2(__VA_ARGS__)

#define	vsuxei32_v_i32m2_m(...) __riscv_vsuxei32_v_i32m2_m(__VA_ARGS__)

#define	vsuxei32_v_i32m4(...) __riscv_vsuxei32_v_i32m4(__VA_ARGS__)

#define	vsuxei32_v_i32m4_m(...) __riscv_vsuxei32_v_i32m4_m(__VA_ARGS__)

#define	vsuxei32_v_i32m8(...) __riscv_vsuxei32_v_i32m8(__VA_ARGS__)

#define	vsuxei32_v_i32m8_m(...) __riscv_vsuxei32_v_i32m8_m(__VA_ARGS__)

#define	vsuxei32_v_i32mf2(...) __riscv_vsuxei32_v_i32mf2(__VA_ARGS__)

#define	vsuxei32_v_i32mf2_m(...) __riscv_vsuxei32_v_i32mf2_m(__VA_ARGS__)

#define	vsuxei32_v_i64m1(...) __riscv_vsuxei32_v_i64m1(__VA_ARGS__)

#define	vsuxei32_v_i64m1_m(...) __riscv_vsuxei32_v_i64m1_m(__VA_ARGS__)

#define	vsuxei32_v_i64m2(...) __riscv_vsuxei32_v_i64m2(__VA_ARGS__)

#define	vsuxei32_v_i64m2_m(...) __riscv_vsuxei32_v_i64m2_m(__VA_ARGS__)

#define	vsuxei32_v_i64m4(...) __riscv_vsuxei32_v_i64m4(__VA_ARGS__)

#define	vsuxei32_v_i64m4_m(...) __riscv_vsuxei32_v_i64m4_m(__VA_ARGS__)

#define	vsuxei32_v_i64m8(...) __riscv_vsuxei32_v_i64m8(__VA_ARGS__)

#define	vsuxei32_v_i64m8_m(...) __riscv_vsuxei32_v_i64m8_m(__VA_ARGS__)

#define	vsuxei32_v_i8m1(...) __riscv_vsuxei32_v_i8m1(__VA_ARGS__)

#define	vsuxei32_v_i8m1_m(...) __riscv_vsuxei32_v_i8m1_m(__VA_ARGS__)

#define	vsuxei32_v_i8m2(...) __riscv_vsuxei32_v_i8m2(__VA_ARGS__)

#define	vsuxei32_v_i8m2_m(...) __riscv_vsuxei32_v_i8m2_m(__VA_ARGS__)

#define	vsuxei32_v_i8mf2(...) __riscv_vsuxei32_v_i8mf2(__VA_ARGS__)

#define	vsuxei32_v_i8mf2_m(...) __riscv_vsuxei32_v_i8mf2_m(__VA_ARGS__)

#define	vsuxei32_v_i8mf4(...) __riscv_vsuxei32_v_i8mf4(__VA_ARGS__)

#define	vsuxei32_v_i8mf4_m(...) __riscv_vsuxei32_v_i8mf4_m(__VA_ARGS__)

#define	vsuxei32_v_i8mf8(...) __riscv_vsuxei32_v_i8mf8(__VA_ARGS__)

#define	vsuxei32_v_i8mf8_m(...) __riscv_vsuxei32_v_i8mf8_m(__VA_ARGS__)

#define	vsuxei32_v_u16m1(...) __riscv_vsuxei32_v_u16m1(__VA_ARGS__)

#define	vsuxei32_v_u16m1_m(...) __riscv_vsuxei32_v_u16m1_m(__VA_ARGS__)

#define	vsuxei32_v_u16m2(...) __riscv_vsuxei32_v_u16m2(__VA_ARGS__)

#define	vsuxei32_v_u16m2_m(...) __riscv_vsuxei32_v_u16m2_m(__VA_ARGS__)

#define	vsuxei32_v_u16m4(...) __riscv_vsuxei32_v_u16m4(__VA_ARGS__)

#define	vsuxei32_v_u16m4_m(...) __riscv_vsuxei32_v_u16m4_m(__VA_ARGS__)

#define	vsuxei32_v_u16mf2(...) __riscv_vsuxei32_v_u16mf2(__VA_ARGS__)

#define	vsuxei32_v_u16mf2_m(...) __riscv_vsuxei32_v_u16mf2_m(__VA_ARGS__)

#define	vsuxei32_v_u16mf4(...) __riscv_vsuxei32_v_u16mf4(__VA_ARGS__)

#define	vsuxei32_v_u16mf4_m(...) __riscv_vsuxei32_v_u16mf4_m(__VA_ARGS__)

#define	vsuxei32_v_u32m1(...) __riscv_vsuxei32_v_u32m1(__VA_ARGS__)

#define	vsuxei32_v_u32m1_m(...) __riscv_vsuxei32_v_u32m1_m(__VA_ARGS__)

#define	vsuxei32_v_u32m2(...) __riscv_vsuxei32_v_u32m2(__VA_ARGS__)

#define	vsuxei32_v_u32m2_m(...) __riscv_vsuxei32_v_u32m2_m(__VA_ARGS__)

#define	vsuxei32_v_u32m4(...) __riscv_vsuxei32_v_u32m4(__VA_ARGS__)

#define	vsuxei32_v_u32m4_m(...) __riscv_vsuxei32_v_u32m4_m(__VA_ARGS__)

#define	vsuxei32_v_u32m8(...) __riscv_vsuxei32_v_u32m8(__VA_ARGS__)

#define	vsuxei32_v_u32m8_m(...) __riscv_vsuxei32_v_u32m8_m(__VA_ARGS__)

#define	vsuxei32_v_u32mf2(...) __riscv_vsuxei32_v_u32mf2(__VA_ARGS__)

#define	vsuxei32_v_u32mf2_m(...) __riscv_vsuxei32_v_u32mf2_m(__VA_ARGS__)

#define	vsuxei32_v_u64m1(...) __riscv_vsuxei32_v_u64m1(__VA_ARGS__)

#define	vsuxei32_v_u64m1_m(...) __riscv_vsuxei32_v_u64m1_m(__VA_ARGS__)

#define	vsuxei32_v_u64m2(...) __riscv_vsuxei32_v_u64m2(__VA_ARGS__)

#define	vsuxei32_v_u64m2_m(...) __riscv_vsuxei32_v_u64m2_m(__VA_ARGS__)

#define	vsuxei32_v_u64m4(...) __riscv_vsuxei32_v_u64m4(__VA_ARGS__)

#define	vsuxei32_v_u64m4_m(...) __riscv_vsuxei32_v_u64m4_m(__VA_ARGS__)

#define	vsuxei32_v_u64m8(...) __riscv_vsuxei32_v_u64m8(__VA_ARGS__)

#define	vsuxei32_v_u64m8_m(...) __riscv_vsuxei32_v_u64m8_m(__VA_ARGS__)

#define	vsuxei32_v_u8m1(...) __riscv_vsuxei32_v_u8m1(__VA_ARGS__)

#define	vsuxei32_v_u8m1_m(...) __riscv_vsuxei32_v_u8m1_m(__VA_ARGS__)

#define	vsuxei32_v_u8m2(...) __riscv_vsuxei32_v_u8m2(__VA_ARGS__)

#define	vsuxei32_v_u8m2_m(...) __riscv_vsuxei32_v_u8m2_m(__VA_ARGS__)

#define	vsuxei32_v_u8mf2(...) __riscv_vsuxei32_v_u8mf2(__VA_ARGS__)

#define	vsuxei32_v_u8mf2_m(...) __riscv_vsuxei32_v_u8mf2_m(__VA_ARGS__)

#define	vsuxei32_v_u8mf4(...) __riscv_vsuxei32_v_u8mf4(__VA_ARGS__)

#define	vsuxei32_v_u8mf4_m(...) __riscv_vsuxei32_v_u8mf4_m(__VA_ARGS__)

#define	vsuxei32_v_u8mf8(...) __riscv_vsuxei32_v_u8mf8(__VA_ARGS__)

#define	vsuxei32_v_u8mf8_m(...) __riscv_vsuxei32_v_u8mf8_m(__VA_ARGS__)

#define	vsuxei64_v_f16m1(...) __riscv_vsuxei64_v_f16m1(__VA_ARGS__)

#define	vsuxei64_v_f16m1_m(...) __riscv_vsuxei64_v_f16m1_m(__VA_ARGS__)

#define	vsuxei64_v_f16m2(...) __riscv_vsuxei64_v_f16m2(__VA_ARGS__)

#define	vsuxei64_v_f16m2_m(...) __riscv_vsuxei64_v_f16m2_m(__VA_ARGS__)

#define	vsuxei64_v_f16mf2(...) __riscv_vsuxei64_v_f16mf2(__VA_ARGS__)

#define	vsuxei64_v_f16mf2_m(...) __riscv_vsuxei64_v_f16mf2_m(__VA_ARGS__)

#define	vsuxei64_v_f16mf4(...) __riscv_vsuxei64_v_f16mf4(__VA_ARGS__)

#define	vsuxei64_v_f16mf4_m(...) __riscv_vsuxei64_v_f16mf4_m(__VA_ARGS__)

#define	vsuxei64_v_f32m1(...) __riscv_vsuxei64_v_f32m1(__VA_ARGS__)

#define	vsuxei64_v_f32m1_m(...) __riscv_vsuxei64_v_f32m1_m(__VA_ARGS__)

#define	vsuxei64_v_f32m2(...) __riscv_vsuxei64_v_f32m2(__VA_ARGS__)

#define	vsuxei64_v_f32m2_m(...) __riscv_vsuxei64_v_f32m2_m(__VA_ARGS__)

#define	vsuxei64_v_f32m4(...) __riscv_vsuxei64_v_f32m4(__VA_ARGS__)

#define	vsuxei64_v_f32m4_m(...) __riscv_vsuxei64_v_f32m4_m(__VA_ARGS__)

#define	vsuxei64_v_f32mf2(...) __riscv_vsuxei64_v_f32mf2(__VA_ARGS__)

#define	vsuxei64_v_f32mf2_m(...) __riscv_vsuxei64_v_f32mf2_m(__VA_ARGS__)

#define	vsuxei64_v_f64m1(...) __riscv_vsuxei64_v_f64m1(__VA_ARGS__)

#define	vsuxei64_v_f64m1_m(...) __riscv_vsuxei64_v_f64m1_m(__VA_ARGS__)

#define	vsuxei64_v_f64m2(...) __riscv_vsuxei64_v_f64m2(__VA_ARGS__)

#define	vsuxei64_v_f64m2_m(...) __riscv_vsuxei64_v_f64m2_m(__VA_ARGS__)

#define	vsuxei64_v_f64m4(...) __riscv_vsuxei64_v_f64m4(__VA_ARGS__)

#define	vsuxei64_v_f64m4_m(...) __riscv_vsuxei64_v_f64m4_m(__VA_ARGS__)

#define	vsuxei64_v_f64m8(...) __riscv_vsuxei64_v_f64m8(__VA_ARGS__)

#define	vsuxei64_v_f64m8_m(...) __riscv_vsuxei64_v_f64m8_m(__VA_ARGS__)

#define	vsuxei64_v_i16m1(...) __riscv_vsuxei64_v_i16m1(__VA_ARGS__)

#define	vsuxei64_v_i16m1_m(...) __riscv_vsuxei64_v_i16m1_m(__VA_ARGS__)

#define	vsuxei64_v_i16m2(...) __riscv_vsuxei64_v_i16m2(__VA_ARGS__)

#define	vsuxei64_v_i16m2_m(...) __riscv_vsuxei64_v_i16m2_m(__VA_ARGS__)

#define	vsuxei64_v_i16mf2(...) __riscv_vsuxei64_v_i16mf2(__VA_ARGS__)

#define	vsuxei64_v_i16mf2_m(...) __riscv_vsuxei64_v_i16mf2_m(__VA_ARGS__)

#define	vsuxei64_v_i16mf4(...) __riscv_vsuxei64_v_i16mf4(__VA_ARGS__)

#define	vsuxei64_v_i16mf4_m(...) __riscv_vsuxei64_v_i16mf4_m(__VA_ARGS__)

#define	vsuxei64_v_i32m1(...) __riscv_vsuxei64_v_i32m1(__VA_ARGS__)

#define	vsuxei64_v_i32m1_m(...) __riscv_vsuxei64_v_i32m1_m(__VA_ARGS__)

#define	vsuxei64_v_i32m2(...) __riscv_vsuxei64_v_i32m2(__VA_ARGS__)

#define	vsuxei64_v_i32m2_m(...) __riscv_vsuxei64_v_i32m2_m(__VA_ARGS__)

#define	vsuxei64_v_i32m4(...) __riscv_vsuxei64_v_i32m4(__VA_ARGS__)

#define	vsuxei64_v_i32m4_m(...) __riscv_vsuxei64_v_i32m4_m(__VA_ARGS__)

#define	vsuxei64_v_i32mf2(...) __riscv_vsuxei64_v_i32mf2(__VA_ARGS__)

#define	vsuxei64_v_i32mf2_m(...) __riscv_vsuxei64_v_i32mf2_m(__VA_ARGS__)

#define	vsuxei64_v_i64m1(...) __riscv_vsuxei64_v_i64m1(__VA_ARGS__)

#define	vsuxei64_v_i64m1_m(...) __riscv_vsuxei64_v_i64m1_m(__VA_ARGS__)

#define	vsuxei64_v_i64m2(...) __riscv_vsuxei64_v_i64m2(__VA_ARGS__)

#define	vsuxei64_v_i64m2_m(...) __riscv_vsuxei64_v_i64m2_m(__VA_ARGS__)

#define	vsuxei64_v_i64m4(...) __riscv_vsuxei64_v_i64m4(__VA_ARGS__)

#define	vsuxei64_v_i64m4_m(...) __riscv_vsuxei64_v_i64m4_m(__VA_ARGS__)

#define	vsuxei64_v_i64m8(...) __riscv_vsuxei64_v_i64m8(__VA_ARGS__)

#define	vsuxei64_v_i64m8_m(...) __riscv_vsuxei64_v_i64m8_m(__VA_ARGS__)

#define	vsuxei64_v_i8m1(...) __riscv_vsuxei64_v_i8m1(__VA_ARGS__)

#define	vsuxei64_v_i8m1_m(...) __riscv_vsuxei64_v_i8m1_m(__VA_ARGS__)

#define	vsuxei64_v_i8mf2(...) __riscv_vsuxei64_v_i8mf2(__VA_ARGS__)

#define	vsuxei64_v_i8mf2_m(...) __riscv_vsuxei64_v_i8mf2_m(__VA_ARGS__)

#define	vsuxei64_v_i8mf4(...) __riscv_vsuxei64_v_i8mf4(__VA_ARGS__)

#define	vsuxei64_v_i8mf4_m(...) __riscv_vsuxei64_v_i8mf4_m(__VA_ARGS__)

#define	vsuxei64_v_i8mf8(...) __riscv_vsuxei64_v_i8mf8(__VA_ARGS__)

#define	vsuxei64_v_i8mf8_m(...) __riscv_vsuxei64_v_i8mf8_m(__VA_ARGS__)

#define	vsuxei64_v_u16m1(...) __riscv_vsuxei64_v_u16m1(__VA_ARGS__)

#define	vsuxei64_v_u16m1_m(...) __riscv_vsuxei64_v_u16m1_m(__VA_ARGS__)

#define	vsuxei64_v_u16m2(...) __riscv_vsuxei64_v_u16m2(__VA_ARGS__)

#define	vsuxei64_v_u16m2_m(...) __riscv_vsuxei64_v_u16m2_m(__VA_ARGS__)

#define	vsuxei64_v_u16mf2(...) __riscv_vsuxei64_v_u16mf2(__VA_ARGS__)

#define	vsuxei64_v_u16mf2_m(...) __riscv_vsuxei64_v_u16mf2_m(__VA_ARGS__)

#define	vsuxei64_v_u16mf4(...) __riscv_vsuxei64_v_u16mf4(__VA_ARGS__)

#define	vsuxei64_v_u16mf4_m(...) __riscv_vsuxei64_v_u16mf4_m(__VA_ARGS__)

#define	vsuxei64_v_u32m1(...) __riscv_vsuxei64_v_u32m1(__VA_ARGS__)

#define	vsuxei64_v_u32m1_m(...) __riscv_vsuxei64_v_u32m1_m(__VA_ARGS__)

#define	vsuxei64_v_u32m2(...) __riscv_vsuxei64_v_u32m2(__VA_ARGS__)

#define	vsuxei64_v_u32m2_m(...) __riscv_vsuxei64_v_u32m2_m(__VA_ARGS__)

#define	vsuxei64_v_u32m4(...) __riscv_vsuxei64_v_u32m4(__VA_ARGS__)

#define	vsuxei64_v_u32m4_m(...) __riscv_vsuxei64_v_u32m4_m(__VA_ARGS__)

#define	vsuxei64_v_u32mf2(...) __riscv_vsuxei64_v_u32mf2(__VA_ARGS__)

#define	vsuxei64_v_u32mf2_m(...) __riscv_vsuxei64_v_u32mf2_m(__VA_ARGS__)

#define	vsuxei64_v_u64m1(...) __riscv_vsuxei64_v_u64m1(__VA_ARGS__)

#define	vsuxei64_v_u64m1_m(...) __riscv_vsuxei64_v_u64m1_m(__VA_ARGS__)

#define	vsuxei64_v_u64m2(...) __riscv_vsuxei64_v_u64m2(__VA_ARGS__)

#define	vsuxei64_v_u64m2_m(...) __riscv_vsuxei64_v_u64m2_m(__VA_ARGS__)

#define	vsuxei64_v_u64m4(...) __riscv_vsuxei64_v_u64m4(__VA_ARGS__)

#define	vsuxei64_v_u64m4_m(...) __riscv_vsuxei64_v_u64m4_m(__VA_ARGS__)

#define	vsuxei64_v_u64m8(...) __riscv_vsuxei64_v_u64m8(__VA_ARGS__)

#define	vsuxei64_v_u64m8_m(...) __riscv_vsuxei64_v_u64m8_m(__VA_ARGS__)

#define	vsuxei64_v_u8m1(...) __riscv_vsuxei64_v_u8m1(__VA_ARGS__)

#define	vsuxei64_v_u8m1_m(...) __riscv_vsuxei64_v_u8m1_m(__VA_ARGS__)

#define	vsuxei64_v_u8mf2(...) __riscv_vsuxei64_v_u8mf2(__VA_ARGS__)

#define	vsuxei64_v_u8mf2_m(...) __riscv_vsuxei64_v_u8mf2_m(__VA_ARGS__)

#define	vsuxei64_v_u8mf4(...) __riscv_vsuxei64_v_u8mf4(__VA_ARGS__)

#define	vsuxei64_v_u8mf4_m(...) __riscv_vsuxei64_v_u8mf4_m(__VA_ARGS__)

#define	vsuxei64_v_u8mf8(...) __riscv_vsuxei64_v_u8mf8(__VA_ARGS__)

#define	vsuxei64_v_u8mf8_m(...) __riscv_vsuxei64_v_u8mf8_m(__VA_ARGS__)

#define	vsuxei8_v_f16m1(...) __riscv_vsuxei8_v_f16m1(__VA_ARGS__)

#define	vsuxei8_v_f16m1_m(...) __riscv_vsuxei8_v_f16m1_m(__VA_ARGS__)

#define	vsuxei8_v_f16m2(...) __riscv_vsuxei8_v_f16m2(__VA_ARGS__)

#define	vsuxei8_v_f16m2_m(...) __riscv_vsuxei8_v_f16m2_m(__VA_ARGS__)

#define	vsuxei8_v_f16m4(...) __riscv_vsuxei8_v_f16m4(__VA_ARGS__)

#define	vsuxei8_v_f16m4_m(...) __riscv_vsuxei8_v_f16m4_m(__VA_ARGS__)

#define	vsuxei8_v_f16m8(...) __riscv_vsuxei8_v_f16m8(__VA_ARGS__)

#define	vsuxei8_v_f16m8_m(...) __riscv_vsuxei8_v_f16m8_m(__VA_ARGS__)

#define	vsuxei8_v_f16mf2(...) __riscv_vsuxei8_v_f16mf2(__VA_ARGS__)

#define	vsuxei8_v_f16mf2_m(...) __riscv_vsuxei8_v_f16mf2_m(__VA_ARGS__)

#define	vsuxei8_v_f16mf4(...) __riscv_vsuxei8_v_f16mf4(__VA_ARGS__)

#define	vsuxei8_v_f16mf4_m(...) __riscv_vsuxei8_v_f16mf4_m(__VA_ARGS__)

#define	vsuxei8_v_f32m1(...) __riscv_vsuxei8_v_f32m1(__VA_ARGS__)

#define	vsuxei8_v_f32m1_m(...) __riscv_vsuxei8_v_f32m1_m(__VA_ARGS__)

#define	vsuxei8_v_f32m2(...) __riscv_vsuxei8_v_f32m2(__VA_ARGS__)

#define	vsuxei8_v_f32m2_m(...) __riscv_vsuxei8_v_f32m2_m(__VA_ARGS__)

#define	vsuxei8_v_f32m4(...) __riscv_vsuxei8_v_f32m4(__VA_ARGS__)

#define	vsuxei8_v_f32m4_m(...) __riscv_vsuxei8_v_f32m4_m(__VA_ARGS__)

#define	vsuxei8_v_f32m8(...) __riscv_vsuxei8_v_f32m8(__VA_ARGS__)

#define	vsuxei8_v_f32m8_m(...) __riscv_vsuxei8_v_f32m8_m(__VA_ARGS__)

#define	vsuxei8_v_f32mf2(...) __riscv_vsuxei8_v_f32mf2(__VA_ARGS__)

#define	vsuxei8_v_f32mf2_m(...) __riscv_vsuxei8_v_f32mf2_m(__VA_ARGS__)

#define	vsuxei8_v_f64m1(...) __riscv_vsuxei8_v_f64m1(__VA_ARGS__)

#define	vsuxei8_v_f64m1_m(...) __riscv_vsuxei8_v_f64m1_m(__VA_ARGS__)

#define	vsuxei8_v_f64m2(...) __riscv_vsuxei8_v_f64m2(__VA_ARGS__)

#define	vsuxei8_v_f64m2_m(...) __riscv_vsuxei8_v_f64m2_m(__VA_ARGS__)

#define	vsuxei8_v_f64m4(...) __riscv_vsuxei8_v_f64m4(__VA_ARGS__)

#define	vsuxei8_v_f64m4_m(...) __riscv_vsuxei8_v_f64m4_m(__VA_ARGS__)

#define	vsuxei8_v_f64m8(...) __riscv_vsuxei8_v_f64m8(__VA_ARGS__)

#define	vsuxei8_v_f64m8_m(...) __riscv_vsuxei8_v_f64m8_m(__VA_ARGS__)

#define	vsuxei8_v_i16m1(...) __riscv_vsuxei8_v_i16m1(__VA_ARGS__)

#define	vsuxei8_v_i16m1_m(...) __riscv_vsuxei8_v_i16m1_m(__VA_ARGS__)

#define	vsuxei8_v_i16m2(...) __riscv_vsuxei8_v_i16m2(__VA_ARGS__)

#define	vsuxei8_v_i16m2_m(...) __riscv_vsuxei8_v_i16m2_m(__VA_ARGS__)

#define	vsuxei8_v_i16m4(...) __riscv_vsuxei8_v_i16m4(__VA_ARGS__)

#define	vsuxei8_v_i16m4_m(...) __riscv_vsuxei8_v_i16m4_m(__VA_ARGS__)

#define	vsuxei8_v_i16m8(...) __riscv_vsuxei8_v_i16m8(__VA_ARGS__)

#define	vsuxei8_v_i16m8_m(...) __riscv_vsuxei8_v_i16m8_m(__VA_ARGS__)

#define	vsuxei8_v_i16mf2(...) __riscv_vsuxei8_v_i16mf2(__VA_ARGS__)

#define	vsuxei8_v_i16mf2_m(...) __riscv_vsuxei8_v_i16mf2_m(__VA_ARGS__)

#define	vsuxei8_v_i16mf4(...) __riscv_vsuxei8_v_i16mf4(__VA_ARGS__)

#define	vsuxei8_v_i16mf4_m(...) __riscv_vsuxei8_v_i16mf4_m(__VA_ARGS__)

#define	vsuxei8_v_i32m1(...) __riscv_vsuxei8_v_i32m1(__VA_ARGS__)

#define	vsuxei8_v_i32m1_m(...) __riscv_vsuxei8_v_i32m1_m(__VA_ARGS__)

#define	vsuxei8_v_i32m2(...) __riscv_vsuxei8_v_i32m2(__VA_ARGS__)

#define	vsuxei8_v_i32m2_m(...) __riscv_vsuxei8_v_i32m2_m(__VA_ARGS__)

#define	vsuxei8_v_i32m4(...) __riscv_vsuxei8_v_i32m4(__VA_ARGS__)

#define	vsuxei8_v_i32m4_m(...) __riscv_vsuxei8_v_i32m4_m(__VA_ARGS__)

#define	vsuxei8_v_i32m8(...) __riscv_vsuxei8_v_i32m8(__VA_ARGS__)

#define	vsuxei8_v_i32m8_m(...) __riscv_vsuxei8_v_i32m8_m(__VA_ARGS__)

#define	vsuxei8_v_i32mf2(...) __riscv_vsuxei8_v_i32mf2(__VA_ARGS__)

#define	vsuxei8_v_i32mf2_m(...) __riscv_vsuxei8_v_i32mf2_m(__VA_ARGS__)

#define	vsuxei8_v_i64m1(...) __riscv_vsuxei8_v_i64m1(__VA_ARGS__)

#define	vsuxei8_v_i64m1_m(...) __riscv_vsuxei8_v_i64m1_m(__VA_ARGS__)

#define	vsuxei8_v_i64m2(...) __riscv_vsuxei8_v_i64m2(__VA_ARGS__)

#define	vsuxei8_v_i64m2_m(...) __riscv_vsuxei8_v_i64m2_m(__VA_ARGS__)

#define	vsuxei8_v_i64m4(...) __riscv_vsuxei8_v_i64m4(__VA_ARGS__)

#define	vsuxei8_v_i64m4_m(...) __riscv_vsuxei8_v_i64m4_m(__VA_ARGS__)

#define	vsuxei8_v_i64m8(...) __riscv_vsuxei8_v_i64m8(__VA_ARGS__)

#define	vsuxei8_v_i64m8_m(...) __riscv_vsuxei8_v_i64m8_m(__VA_ARGS__)

#define	vsuxei8_v_i8m1(...) __riscv_vsuxei8_v_i8m1(__VA_ARGS__)

#define	vsuxei8_v_i8m1_m(...) __riscv_vsuxei8_v_i8m1_m(__VA_ARGS__)

#define	vsuxei8_v_i8m2(...) __riscv_vsuxei8_v_i8m2(__VA_ARGS__)

#define	vsuxei8_v_i8m2_m(...) __riscv_vsuxei8_v_i8m2_m(__VA_ARGS__)

#define	vsuxei8_v_i8m4(...) __riscv_vsuxei8_v_i8m4(__VA_ARGS__)

#define	vsuxei8_v_i8m4_m(...) __riscv_vsuxei8_v_i8m4_m(__VA_ARGS__)

#define	vsuxei8_v_i8m8(...) __riscv_vsuxei8_v_i8m8(__VA_ARGS__)

#define	vsuxei8_v_i8m8_m(...) __riscv_vsuxei8_v_i8m8_m(__VA_ARGS__)

#define	vsuxei8_v_i8mf2(...) __riscv_vsuxei8_v_i8mf2(__VA_ARGS__)

#define	vsuxei8_v_i8mf2_m(...) __riscv_vsuxei8_v_i8mf2_m(__VA_ARGS__)

#define	vsuxei8_v_i8mf4(...) __riscv_vsuxei8_v_i8mf4(__VA_ARGS__)

#define	vsuxei8_v_i8mf4_m(...) __riscv_vsuxei8_v_i8mf4_m(__VA_ARGS__)

#define	vsuxei8_v_i8mf8(...) __riscv_vsuxei8_v_i8mf8(__VA_ARGS__)

#define	vsuxei8_v_i8mf8_m(...) __riscv_vsuxei8_v_i8mf8_m(__VA_ARGS__)

#define	vsuxei8_v_u16m1(...) __riscv_vsuxei8_v_u16m1(__VA_ARGS__)

#define	vsuxei8_v_u16m1_m(...) __riscv_vsuxei8_v_u16m1_m(__VA_ARGS__)

#define	vsuxei8_v_u16m2(...) __riscv_vsuxei8_v_u16m2(__VA_ARGS__)

#define	vsuxei8_v_u16m2_m(...) __riscv_vsuxei8_v_u16m2_m(__VA_ARGS__)

#define	vsuxei8_v_u16m4(...) __riscv_vsuxei8_v_u16m4(__VA_ARGS__)

#define	vsuxei8_v_u16m4_m(...) __riscv_vsuxei8_v_u16m4_m(__VA_ARGS__)

#define	vsuxei8_v_u16m8(...) __riscv_vsuxei8_v_u16m8(__VA_ARGS__)

#define	vsuxei8_v_u16m8_m(...) __riscv_vsuxei8_v_u16m8_m(__VA_ARGS__)

#define	vsuxei8_v_u16mf2(...) __riscv_vsuxei8_v_u16mf2(__VA_ARGS__)

#define	vsuxei8_v_u16mf2_m(...) __riscv_vsuxei8_v_u16mf2_m(__VA_ARGS__)

#define	vsuxei8_v_u16mf4(...) __riscv_vsuxei8_v_u16mf4(__VA_ARGS__)

#define	vsuxei8_v_u16mf4_m(...) __riscv_vsuxei8_v_u16mf4_m(__VA_ARGS__)

#define	vsuxei8_v_u32m1(...) __riscv_vsuxei8_v_u32m1(__VA_ARGS__)

#define	vsuxei8_v_u32m1_m(...) __riscv_vsuxei8_v_u32m1_m(__VA_ARGS__)

#define	vsuxei8_v_u32m2(...) __riscv_vsuxei8_v_u32m2(__VA_ARGS__)

#define	vsuxei8_v_u32m2_m(...) __riscv_vsuxei8_v_u32m2_m(__VA_ARGS__)

#define	vsuxei8_v_u32m4(...) __riscv_vsuxei8_v_u32m4(__VA_ARGS__)

#define	vsuxei8_v_u32m4_m(...) __riscv_vsuxei8_v_u32m4_m(__VA_ARGS__)

#define	vsuxei8_v_u32m8(...) __riscv_vsuxei8_v_u32m8(__VA_ARGS__)

#define	vsuxei8_v_u32m8_m(...) __riscv_vsuxei8_v_u32m8_m(__VA_ARGS__)

#define	vsuxei8_v_u32mf2(...) __riscv_vsuxei8_v_u32mf2(__VA_ARGS__)

#define	vsuxei8_v_u32mf2_m(...) __riscv_vsuxei8_v_u32mf2_m(__VA_ARGS__)

#define	vsuxei8_v_u64m1(...) __riscv_vsuxei8_v_u64m1(__VA_ARGS__)

#define	vsuxei8_v_u64m1_m(...) __riscv_vsuxei8_v_u64m1_m(__VA_ARGS__)

#define	vsuxei8_v_u64m2(...) __riscv_vsuxei8_v_u64m2(__VA_ARGS__)

#define	vsuxei8_v_u64m2_m(...) __riscv_vsuxei8_v_u64m2_m(__VA_ARGS__)

#define	vsuxei8_v_u64m4(...) __riscv_vsuxei8_v_u64m4(__VA_ARGS__)

#define	vsuxei8_v_u64m4_m(...) __riscv_vsuxei8_v_u64m4_m(__VA_ARGS__)

#define	vsuxei8_v_u64m8(...) __riscv_vsuxei8_v_u64m8(__VA_ARGS__)

#define	vsuxei8_v_u64m8_m(...) __riscv_vsuxei8_v_u64m8_m(__VA_ARGS__)

#define	vsuxei8_v_u8m1(...) __riscv_vsuxei8_v_u8m1(__VA_ARGS__)

#define	vsuxei8_v_u8m1_m(...) __riscv_vsuxei8_v_u8m1_m(__VA_ARGS__)

#define	vsuxei8_v_u8m2(...) __riscv_vsuxei8_v_u8m2(__VA_ARGS__)

#define	vsuxei8_v_u8m2_m(...) __riscv_vsuxei8_v_u8m2_m(__VA_ARGS__)

#define	vsuxei8_v_u8m4(...) __riscv_vsuxei8_v_u8m4(__VA_ARGS__)

#define	vsuxei8_v_u8m4_m(...) __riscv_vsuxei8_v_u8m4_m(__VA_ARGS__)

#define	vsuxei8_v_u8m8(...) __riscv_vsuxei8_v_u8m8(__VA_ARGS__)

#define	vsuxei8_v_u8m8_m(...) __riscv_vsuxei8_v_u8m8_m(__VA_ARGS__)

#define	vsuxei8_v_u8mf2(...) __riscv_vsuxei8_v_u8mf2(__VA_ARGS__)

#define	vsuxei8_v_u8mf2_m(...) __riscv_vsuxei8_v_u8mf2_m(__VA_ARGS__)

#define	vsuxei8_v_u8mf4(...) __riscv_vsuxei8_v_u8mf4(__VA_ARGS__)

#define	vsuxei8_v_u8mf4_m(...) __riscv_vsuxei8_v_u8mf4_m(__VA_ARGS__)

#define	vsuxei8_v_u8mf8(...) __riscv_vsuxei8_v_u8mf8(__VA_ARGS__)

#define	vsuxei8_v_u8mf8_m(...) __riscv_vsuxei8_v_u8mf8_m(__VA_ARGS__)

#define	vsuxseg2ei16_v_f16m1(...) __riscv_vsuxseg2ei16_v_f16m1(__VA_ARGS__)

#define	vsuxseg2ei16_v_f16m1_m(...) __riscv_vsuxseg2ei16_v_f16m1_m(__VA_ARGS__)

#define	vsuxseg2ei16_v_f16m2(...) __riscv_vsuxseg2ei16_v_f16m2(__VA_ARGS__)

#define	vsuxseg2ei16_v_f16m2_m(...) __riscv_vsuxseg2ei16_v_f16m2_m(__VA_ARGS__)

#define	vsuxseg2ei16_v_f16m4(...) __riscv_vsuxseg2ei16_v_f16m4(__VA_ARGS__)

#define	vsuxseg2ei16_v_f16m4_m(...) __riscv_vsuxseg2ei16_v_f16m4_m(__VA_ARGS__)

#define	vsuxseg2ei16_v_f16mf2(...) __riscv_vsuxseg2ei16_v_f16mf2(__VA_ARGS__)

#define	vsuxseg2ei16_v_f16mf2_m(...) __riscv_vsuxseg2ei16_v_f16mf2_m(__VA_ARGS__)

#define	vsuxseg2ei16_v_f16mf4(...) __riscv_vsuxseg2ei16_v_f16mf4(__VA_ARGS__)

#define	vsuxseg2ei16_v_f16mf4_m(...) __riscv_vsuxseg2ei16_v_f16mf4_m(__VA_ARGS__)

#define	vsuxseg2ei16_v_f32m1(...) __riscv_vsuxseg2ei16_v_f32m1(__VA_ARGS__)

#define	vsuxseg2ei16_v_f32m1_m(...) __riscv_vsuxseg2ei16_v_f32m1_m(__VA_ARGS__)

#define	vsuxseg2ei16_v_f32m2(...) __riscv_vsuxseg2ei16_v_f32m2(__VA_ARGS__)

#define	vsuxseg2ei16_v_f32m2_m(...) __riscv_vsuxseg2ei16_v_f32m2_m(__VA_ARGS__)

#define	vsuxseg2ei16_v_f32m4(...) __riscv_vsuxseg2ei16_v_f32m4(__VA_ARGS__)

#define	vsuxseg2ei16_v_f32m4_m(...) __riscv_vsuxseg2ei16_v_f32m4_m(__VA_ARGS__)

#define	vsuxseg2ei16_v_f32mf2(...) __riscv_vsuxseg2ei16_v_f32mf2(__VA_ARGS__)

#define	vsuxseg2ei16_v_f32mf2_m(...) __riscv_vsuxseg2ei16_v_f32mf2_m(__VA_ARGS__)

#define	vsuxseg2ei16_v_f64m1(...) __riscv_vsuxseg2ei16_v_f64m1(__VA_ARGS__)

#define	vsuxseg2ei16_v_f64m1_m(...) __riscv_vsuxseg2ei16_v_f64m1_m(__VA_ARGS__)

#define	vsuxseg2ei16_v_f64m2(...) __riscv_vsuxseg2ei16_v_f64m2(__VA_ARGS__)

#define	vsuxseg2ei16_v_f64m2_m(...) __riscv_vsuxseg2ei16_v_f64m2_m(__VA_ARGS__)

#define	vsuxseg2ei16_v_f64m4(...) __riscv_vsuxseg2ei16_v_f64m4(__VA_ARGS__)

#define	vsuxseg2ei16_v_f64m4_m(...) __riscv_vsuxseg2ei16_v_f64m4_m(__VA_ARGS__)

#define	vsuxseg2ei16_v_i16m1(...) __riscv_vsuxseg2ei16_v_i16m1(__VA_ARGS__)

#define	vsuxseg2ei16_v_i16m1_m(...) __riscv_vsuxseg2ei16_v_i16m1_m(__VA_ARGS__)

#define	vsuxseg2ei16_v_i16m2(...) __riscv_vsuxseg2ei16_v_i16m2(__VA_ARGS__)

#define	vsuxseg2ei16_v_i16m2_m(...) __riscv_vsuxseg2ei16_v_i16m2_m(__VA_ARGS__)

#define	vsuxseg2ei16_v_i16m4(...) __riscv_vsuxseg2ei16_v_i16m4(__VA_ARGS__)

#define	vsuxseg2ei16_v_i16m4_m(...) __riscv_vsuxseg2ei16_v_i16m4_m(__VA_ARGS__)

#define	vsuxseg2ei16_v_i16mf2(...) __riscv_vsuxseg2ei16_v_i16mf2(__VA_ARGS__)

#define	vsuxseg2ei16_v_i16mf2_m(...) __riscv_vsuxseg2ei16_v_i16mf2_m(__VA_ARGS__)

#define	vsuxseg2ei16_v_i16mf4(...) __riscv_vsuxseg2ei16_v_i16mf4(__VA_ARGS__)

#define	vsuxseg2ei16_v_i16mf4_m(...) __riscv_vsuxseg2ei16_v_i16mf4_m(__VA_ARGS__)

#define	vsuxseg2ei16_v_i32m1(...) __riscv_vsuxseg2ei16_v_i32m1(__VA_ARGS__)

#define	vsuxseg2ei16_v_i32m1_m(...) __riscv_vsuxseg2ei16_v_i32m1_m(__VA_ARGS__)

#define	vsuxseg2ei16_v_i32m2(...) __riscv_vsuxseg2ei16_v_i32m2(__VA_ARGS__)

#define	vsuxseg2ei16_v_i32m2_m(...) __riscv_vsuxseg2ei16_v_i32m2_m(__VA_ARGS__)

#define	vsuxseg2ei16_v_i32m4(...) __riscv_vsuxseg2ei16_v_i32m4(__VA_ARGS__)

#define	vsuxseg2ei16_v_i32m4_m(...) __riscv_vsuxseg2ei16_v_i32m4_m(__VA_ARGS__)

#define	vsuxseg2ei16_v_i32mf2(...) __riscv_vsuxseg2ei16_v_i32mf2(__VA_ARGS__)

#define	vsuxseg2ei16_v_i32mf2_m(...) __riscv_vsuxseg2ei16_v_i32mf2_m(__VA_ARGS__)

#define	vsuxseg2ei16_v_i64m1(...) __riscv_vsuxseg2ei16_v_i64m1(__VA_ARGS__)

#define	vsuxseg2ei16_v_i64m1_m(...) __riscv_vsuxseg2ei16_v_i64m1_m(__VA_ARGS__)

#define	vsuxseg2ei16_v_i64m2(...) __riscv_vsuxseg2ei16_v_i64m2(__VA_ARGS__)

#define	vsuxseg2ei16_v_i64m2_m(...) __riscv_vsuxseg2ei16_v_i64m2_m(__VA_ARGS__)

#define	vsuxseg2ei16_v_i64m4(...) __riscv_vsuxseg2ei16_v_i64m4(__VA_ARGS__)

#define	vsuxseg2ei16_v_i64m4_m(...) __riscv_vsuxseg2ei16_v_i64m4_m(__VA_ARGS__)

#define	vsuxseg2ei16_v_i8m1(...) __riscv_vsuxseg2ei16_v_i8m1(__VA_ARGS__)

#define	vsuxseg2ei16_v_i8m1_m(...) __riscv_vsuxseg2ei16_v_i8m1_m(__VA_ARGS__)

#define	vsuxseg2ei16_v_i8m2(...) __riscv_vsuxseg2ei16_v_i8m2(__VA_ARGS__)

#define	vsuxseg2ei16_v_i8m2_m(...) __riscv_vsuxseg2ei16_v_i8m2_m(__VA_ARGS__)

#define	vsuxseg2ei16_v_i8m4(...) __riscv_vsuxseg2ei16_v_i8m4(__VA_ARGS__)

#define	vsuxseg2ei16_v_i8m4_m(...) __riscv_vsuxseg2ei16_v_i8m4_m(__VA_ARGS__)

#define	vsuxseg2ei16_v_i8mf2(...) __riscv_vsuxseg2ei16_v_i8mf2(__VA_ARGS__)

#define	vsuxseg2ei16_v_i8mf2_m(...) __riscv_vsuxseg2ei16_v_i8mf2_m(__VA_ARGS__)

#define	vsuxseg2ei16_v_i8mf4(...) __riscv_vsuxseg2ei16_v_i8mf4(__VA_ARGS__)

#define	vsuxseg2ei16_v_i8mf4_m(...) __riscv_vsuxseg2ei16_v_i8mf4_m(__VA_ARGS__)

#define	vsuxseg2ei16_v_i8mf8(...) __riscv_vsuxseg2ei16_v_i8mf8(__VA_ARGS__)

#define	vsuxseg2ei16_v_i8mf8_m(...) __riscv_vsuxseg2ei16_v_i8mf8_m(__VA_ARGS__)

#define	vsuxseg2ei16_v_u16m1(...) __riscv_vsuxseg2ei16_v_u16m1(__VA_ARGS__)

#define	vsuxseg2ei16_v_u16m1_m(...) __riscv_vsuxseg2ei16_v_u16m1_m(__VA_ARGS__)

#define	vsuxseg2ei16_v_u16m2(...) __riscv_vsuxseg2ei16_v_u16m2(__VA_ARGS__)

#define	vsuxseg2ei16_v_u16m2_m(...) __riscv_vsuxseg2ei16_v_u16m2_m(__VA_ARGS__)

#define	vsuxseg2ei16_v_u16m4(...) __riscv_vsuxseg2ei16_v_u16m4(__VA_ARGS__)

#define	vsuxseg2ei16_v_u16m4_m(...) __riscv_vsuxseg2ei16_v_u16m4_m(__VA_ARGS__)

#define	vsuxseg2ei16_v_u16mf2(...) __riscv_vsuxseg2ei16_v_u16mf2(__VA_ARGS__)

#define	vsuxseg2ei16_v_u16mf2_m(...) __riscv_vsuxseg2ei16_v_u16mf2_m(__VA_ARGS__)

#define	vsuxseg2ei16_v_u16mf4(...) __riscv_vsuxseg2ei16_v_u16mf4(__VA_ARGS__)

#define	vsuxseg2ei16_v_u16mf4_m(...) __riscv_vsuxseg2ei16_v_u16mf4_m(__VA_ARGS__)

#define	vsuxseg2ei16_v_u32m1(...) __riscv_vsuxseg2ei16_v_u32m1(__VA_ARGS__)

#define	vsuxseg2ei16_v_u32m1_m(...) __riscv_vsuxseg2ei16_v_u32m1_m(__VA_ARGS__)

#define	vsuxseg2ei16_v_u32m2(...) __riscv_vsuxseg2ei16_v_u32m2(__VA_ARGS__)

#define	vsuxseg2ei16_v_u32m2_m(...) __riscv_vsuxseg2ei16_v_u32m2_m(__VA_ARGS__)

#define	vsuxseg2ei16_v_u32m4(...) __riscv_vsuxseg2ei16_v_u32m4(__VA_ARGS__)

#define	vsuxseg2ei16_v_u32m4_m(...) __riscv_vsuxseg2ei16_v_u32m4_m(__VA_ARGS__)

#define	vsuxseg2ei16_v_u32mf2(...) __riscv_vsuxseg2ei16_v_u32mf2(__VA_ARGS__)

#define	vsuxseg2ei16_v_u32mf2_m(...) __riscv_vsuxseg2ei16_v_u32mf2_m(__VA_ARGS__)

#define	vsuxseg2ei16_v_u64m1(...) __riscv_vsuxseg2ei16_v_u64m1(__VA_ARGS__)

#define	vsuxseg2ei16_v_u64m1_m(...) __riscv_vsuxseg2ei16_v_u64m1_m(__VA_ARGS__)

#define	vsuxseg2ei16_v_u64m2(...) __riscv_vsuxseg2ei16_v_u64m2(__VA_ARGS__)

#define	vsuxseg2ei16_v_u64m2_m(...) __riscv_vsuxseg2ei16_v_u64m2_m(__VA_ARGS__)

#define	vsuxseg2ei16_v_u64m4(...) __riscv_vsuxseg2ei16_v_u64m4(__VA_ARGS__)

#define	vsuxseg2ei16_v_u64m4_m(...) __riscv_vsuxseg2ei16_v_u64m4_m(__VA_ARGS__)

#define	vsuxseg2ei16_v_u8m1(...) __riscv_vsuxseg2ei16_v_u8m1(__VA_ARGS__)

#define	vsuxseg2ei16_v_u8m1_m(...) __riscv_vsuxseg2ei16_v_u8m1_m(__VA_ARGS__)

#define	vsuxseg2ei16_v_u8m2(...) __riscv_vsuxseg2ei16_v_u8m2(__VA_ARGS__)

#define	vsuxseg2ei16_v_u8m2_m(...) __riscv_vsuxseg2ei16_v_u8m2_m(__VA_ARGS__)

#define	vsuxseg2ei16_v_u8m4(...) __riscv_vsuxseg2ei16_v_u8m4(__VA_ARGS__)

#define	vsuxseg2ei16_v_u8m4_m(...) __riscv_vsuxseg2ei16_v_u8m4_m(__VA_ARGS__)

#define	vsuxseg2ei16_v_u8mf2(...) __riscv_vsuxseg2ei16_v_u8mf2(__VA_ARGS__)

#define	vsuxseg2ei16_v_u8mf2_m(...) __riscv_vsuxseg2ei16_v_u8mf2_m(__VA_ARGS__)

#define	vsuxseg2ei16_v_u8mf4(...) __riscv_vsuxseg2ei16_v_u8mf4(__VA_ARGS__)

#define	vsuxseg2ei16_v_u8mf4_m(...) __riscv_vsuxseg2ei16_v_u8mf4_m(__VA_ARGS__)

#define	vsuxseg2ei16_v_u8mf8(...) __riscv_vsuxseg2ei16_v_u8mf8(__VA_ARGS__)

#define	vsuxseg2ei16_v_u8mf8_m(...) __riscv_vsuxseg2ei16_v_u8mf8_m(__VA_ARGS__)

#define	vsuxseg2ei32_v_f16m1(...) __riscv_vsuxseg2ei32_v_f16m1(__VA_ARGS__)

#define	vsuxseg2ei32_v_f16m1_m(...) __riscv_vsuxseg2ei32_v_f16m1_m(__VA_ARGS__)

#define	vsuxseg2ei32_v_f16m2(...) __riscv_vsuxseg2ei32_v_f16m2(__VA_ARGS__)

#define	vsuxseg2ei32_v_f16m2_m(...) __riscv_vsuxseg2ei32_v_f16m2_m(__VA_ARGS__)

#define	vsuxseg2ei32_v_f16m4(...) __riscv_vsuxseg2ei32_v_f16m4(__VA_ARGS__)

#define	vsuxseg2ei32_v_f16m4_m(...) __riscv_vsuxseg2ei32_v_f16m4_m(__VA_ARGS__)

#define	vsuxseg2ei32_v_f16mf2(...) __riscv_vsuxseg2ei32_v_f16mf2(__VA_ARGS__)

#define	vsuxseg2ei32_v_f16mf2_m(...) __riscv_vsuxseg2ei32_v_f16mf2_m(__VA_ARGS__)

#define	vsuxseg2ei32_v_f16mf4(...) __riscv_vsuxseg2ei32_v_f16mf4(__VA_ARGS__)

#define	vsuxseg2ei32_v_f16mf4_m(...) __riscv_vsuxseg2ei32_v_f16mf4_m(__VA_ARGS__)

#define	vsuxseg2ei32_v_f32m1(...) __riscv_vsuxseg2ei32_v_f32m1(__VA_ARGS__)

#define	vsuxseg2ei32_v_f32m1_m(...) __riscv_vsuxseg2ei32_v_f32m1_m(__VA_ARGS__)

#define	vsuxseg2ei32_v_f32m2(...) __riscv_vsuxseg2ei32_v_f32m2(__VA_ARGS__)

#define	vsuxseg2ei32_v_f32m2_m(...) __riscv_vsuxseg2ei32_v_f32m2_m(__VA_ARGS__)

#define	vsuxseg2ei32_v_f32m4(...) __riscv_vsuxseg2ei32_v_f32m4(__VA_ARGS__)

#define	vsuxseg2ei32_v_f32m4_m(...) __riscv_vsuxseg2ei32_v_f32m4_m(__VA_ARGS__)

#define	vsuxseg2ei32_v_f32mf2(...) __riscv_vsuxseg2ei32_v_f32mf2(__VA_ARGS__)

#define	vsuxseg2ei32_v_f32mf2_m(...) __riscv_vsuxseg2ei32_v_f32mf2_m(__VA_ARGS__)

#define	vsuxseg2ei32_v_f64m1(...) __riscv_vsuxseg2ei32_v_f64m1(__VA_ARGS__)

#define	vsuxseg2ei32_v_f64m1_m(...) __riscv_vsuxseg2ei32_v_f64m1_m(__VA_ARGS__)

#define	vsuxseg2ei32_v_f64m2(...) __riscv_vsuxseg2ei32_v_f64m2(__VA_ARGS__)

#define	vsuxseg2ei32_v_f64m2_m(...) __riscv_vsuxseg2ei32_v_f64m2_m(__VA_ARGS__)

#define	vsuxseg2ei32_v_f64m4(...) __riscv_vsuxseg2ei32_v_f64m4(__VA_ARGS__)

#define	vsuxseg2ei32_v_f64m4_m(...) __riscv_vsuxseg2ei32_v_f64m4_m(__VA_ARGS__)

#define	vsuxseg2ei32_v_i16m1(...) __riscv_vsuxseg2ei32_v_i16m1(__VA_ARGS__)

#define	vsuxseg2ei32_v_i16m1_m(...) __riscv_vsuxseg2ei32_v_i16m1_m(__VA_ARGS__)

#define	vsuxseg2ei32_v_i16m2(...) __riscv_vsuxseg2ei32_v_i16m2(__VA_ARGS__)

#define	vsuxseg2ei32_v_i16m2_m(...) __riscv_vsuxseg2ei32_v_i16m2_m(__VA_ARGS__)

#define	vsuxseg2ei32_v_i16m4(...) __riscv_vsuxseg2ei32_v_i16m4(__VA_ARGS__)

#define	vsuxseg2ei32_v_i16m4_m(...) __riscv_vsuxseg2ei32_v_i16m4_m(__VA_ARGS__)

#define	vsuxseg2ei32_v_i16mf2(...) __riscv_vsuxseg2ei32_v_i16mf2(__VA_ARGS__)

#define	vsuxseg2ei32_v_i16mf2_m(...) __riscv_vsuxseg2ei32_v_i16mf2_m(__VA_ARGS__)

#define	vsuxseg2ei32_v_i16mf4(...) __riscv_vsuxseg2ei32_v_i16mf4(__VA_ARGS__)

#define	vsuxseg2ei32_v_i16mf4_m(...) __riscv_vsuxseg2ei32_v_i16mf4_m(__VA_ARGS__)

#define	vsuxseg2ei32_v_i32m1(...) __riscv_vsuxseg2ei32_v_i32m1(__VA_ARGS__)

#define	vsuxseg2ei32_v_i32m1_m(...) __riscv_vsuxseg2ei32_v_i32m1_m(__VA_ARGS__)

#define	vsuxseg2ei32_v_i32m2(...) __riscv_vsuxseg2ei32_v_i32m2(__VA_ARGS__)

#define	vsuxseg2ei32_v_i32m2_m(...) __riscv_vsuxseg2ei32_v_i32m2_m(__VA_ARGS__)

#define	vsuxseg2ei32_v_i32m4(...) __riscv_vsuxseg2ei32_v_i32m4(__VA_ARGS__)

#define	vsuxseg2ei32_v_i32m4_m(...) __riscv_vsuxseg2ei32_v_i32m4_m(__VA_ARGS__)

#define	vsuxseg2ei32_v_i32mf2(...) __riscv_vsuxseg2ei32_v_i32mf2(__VA_ARGS__)

#define	vsuxseg2ei32_v_i32mf2_m(...) __riscv_vsuxseg2ei32_v_i32mf2_m(__VA_ARGS__)

#define	vsuxseg2ei32_v_i64m1(...) __riscv_vsuxseg2ei32_v_i64m1(__VA_ARGS__)

#define	vsuxseg2ei32_v_i64m1_m(...) __riscv_vsuxseg2ei32_v_i64m1_m(__VA_ARGS__)

#define	vsuxseg2ei32_v_i64m2(...) __riscv_vsuxseg2ei32_v_i64m2(__VA_ARGS__)

#define	vsuxseg2ei32_v_i64m2_m(...) __riscv_vsuxseg2ei32_v_i64m2_m(__VA_ARGS__)

#define	vsuxseg2ei32_v_i64m4(...) __riscv_vsuxseg2ei32_v_i64m4(__VA_ARGS__)

#define	vsuxseg2ei32_v_i64m4_m(...) __riscv_vsuxseg2ei32_v_i64m4_m(__VA_ARGS__)

#define	vsuxseg2ei32_v_i8m1(...) __riscv_vsuxseg2ei32_v_i8m1(__VA_ARGS__)

#define	vsuxseg2ei32_v_i8m1_m(...) __riscv_vsuxseg2ei32_v_i8m1_m(__VA_ARGS__)

#define	vsuxseg2ei32_v_i8m2(...) __riscv_vsuxseg2ei32_v_i8m2(__VA_ARGS__)

#define	vsuxseg2ei32_v_i8m2_m(...) __riscv_vsuxseg2ei32_v_i8m2_m(__VA_ARGS__)

#define	vsuxseg2ei32_v_i8mf2(...) __riscv_vsuxseg2ei32_v_i8mf2(__VA_ARGS__)

#define	vsuxseg2ei32_v_i8mf2_m(...) __riscv_vsuxseg2ei32_v_i8mf2_m(__VA_ARGS__)

#define	vsuxseg2ei32_v_i8mf4(...) __riscv_vsuxseg2ei32_v_i8mf4(__VA_ARGS__)

#define	vsuxseg2ei32_v_i8mf4_m(...) __riscv_vsuxseg2ei32_v_i8mf4_m(__VA_ARGS__)

#define	vsuxseg2ei32_v_i8mf8(...) __riscv_vsuxseg2ei32_v_i8mf8(__VA_ARGS__)

#define	vsuxseg2ei32_v_i8mf8_m(...) __riscv_vsuxseg2ei32_v_i8mf8_m(__VA_ARGS__)

#define	vsuxseg2ei32_v_u16m1(...) __riscv_vsuxseg2ei32_v_u16m1(__VA_ARGS__)

#define	vsuxseg2ei32_v_u16m1_m(...) __riscv_vsuxseg2ei32_v_u16m1_m(__VA_ARGS__)

#define	vsuxseg2ei32_v_u16m2(...) __riscv_vsuxseg2ei32_v_u16m2(__VA_ARGS__)

#define	vsuxseg2ei32_v_u16m2_m(...) __riscv_vsuxseg2ei32_v_u16m2_m(__VA_ARGS__)

#define	vsuxseg2ei32_v_u16m4(...) __riscv_vsuxseg2ei32_v_u16m4(__VA_ARGS__)

#define	vsuxseg2ei32_v_u16m4_m(...) __riscv_vsuxseg2ei32_v_u16m4_m(__VA_ARGS__)

#define	vsuxseg2ei32_v_u16mf2(...) __riscv_vsuxseg2ei32_v_u16mf2(__VA_ARGS__)

#define	vsuxseg2ei32_v_u16mf2_m(...) __riscv_vsuxseg2ei32_v_u16mf2_m(__VA_ARGS__)

#define	vsuxseg2ei32_v_u16mf4(...) __riscv_vsuxseg2ei32_v_u16mf4(__VA_ARGS__)

#define	vsuxseg2ei32_v_u16mf4_m(...) __riscv_vsuxseg2ei32_v_u16mf4_m(__VA_ARGS__)

#define	vsuxseg2ei32_v_u32m1(...) __riscv_vsuxseg2ei32_v_u32m1(__VA_ARGS__)

#define	vsuxseg2ei32_v_u32m1_m(...) __riscv_vsuxseg2ei32_v_u32m1_m(__VA_ARGS__)

#define	vsuxseg2ei32_v_u32m2(...) __riscv_vsuxseg2ei32_v_u32m2(__VA_ARGS__)

#define	vsuxseg2ei32_v_u32m2_m(...) __riscv_vsuxseg2ei32_v_u32m2_m(__VA_ARGS__)

#define	vsuxseg2ei32_v_u32m4(...) __riscv_vsuxseg2ei32_v_u32m4(__VA_ARGS__)

#define	vsuxseg2ei32_v_u32m4_m(...) __riscv_vsuxseg2ei32_v_u32m4_m(__VA_ARGS__)

#define	vsuxseg2ei32_v_u32mf2(...) __riscv_vsuxseg2ei32_v_u32mf2(__VA_ARGS__)

#define	vsuxseg2ei32_v_u32mf2_m(...) __riscv_vsuxseg2ei32_v_u32mf2_m(__VA_ARGS__)

#define	vsuxseg2ei32_v_u64m1(...) __riscv_vsuxseg2ei32_v_u64m1(__VA_ARGS__)

#define	vsuxseg2ei32_v_u64m1_m(...) __riscv_vsuxseg2ei32_v_u64m1_m(__VA_ARGS__)

#define	vsuxseg2ei32_v_u64m2(...) __riscv_vsuxseg2ei32_v_u64m2(__VA_ARGS__)

#define	vsuxseg2ei32_v_u64m2_m(...) __riscv_vsuxseg2ei32_v_u64m2_m(__VA_ARGS__)

#define	vsuxseg2ei32_v_u64m4(...) __riscv_vsuxseg2ei32_v_u64m4(__VA_ARGS__)

#define	vsuxseg2ei32_v_u64m4_m(...) __riscv_vsuxseg2ei32_v_u64m4_m(__VA_ARGS__)

#define	vsuxseg2ei32_v_u8m1(...) __riscv_vsuxseg2ei32_v_u8m1(__VA_ARGS__)

#define	vsuxseg2ei32_v_u8m1_m(...) __riscv_vsuxseg2ei32_v_u8m1_m(__VA_ARGS__)

#define	vsuxseg2ei32_v_u8m2(...) __riscv_vsuxseg2ei32_v_u8m2(__VA_ARGS__)

#define	vsuxseg2ei32_v_u8m2_m(...) __riscv_vsuxseg2ei32_v_u8m2_m(__VA_ARGS__)

#define	vsuxseg2ei32_v_u8mf2(...) __riscv_vsuxseg2ei32_v_u8mf2(__VA_ARGS__)

#define	vsuxseg2ei32_v_u8mf2_m(...) __riscv_vsuxseg2ei32_v_u8mf2_m(__VA_ARGS__)

#define	vsuxseg2ei32_v_u8mf4(...) __riscv_vsuxseg2ei32_v_u8mf4(__VA_ARGS__)

#define	vsuxseg2ei32_v_u8mf4_m(...) __riscv_vsuxseg2ei32_v_u8mf4_m(__VA_ARGS__)

#define	vsuxseg2ei32_v_u8mf8(...) __riscv_vsuxseg2ei32_v_u8mf8(__VA_ARGS__)

#define	vsuxseg2ei32_v_u8mf8_m(...) __riscv_vsuxseg2ei32_v_u8mf8_m(__VA_ARGS__)

#define	vsuxseg2ei64_v_f16m1(...) __riscv_vsuxseg2ei64_v_f16m1(__VA_ARGS__)

#define	vsuxseg2ei64_v_f16m1_m(...) __riscv_vsuxseg2ei64_v_f16m1_m(__VA_ARGS__)

#define	vsuxseg2ei64_v_f16m2(...) __riscv_vsuxseg2ei64_v_f16m2(__VA_ARGS__)

#define	vsuxseg2ei64_v_f16m2_m(...) __riscv_vsuxseg2ei64_v_f16m2_m(__VA_ARGS__)

#define	vsuxseg2ei64_v_f16mf2(...) __riscv_vsuxseg2ei64_v_f16mf2(__VA_ARGS__)

#define	vsuxseg2ei64_v_f16mf2_m(...) __riscv_vsuxseg2ei64_v_f16mf2_m(__VA_ARGS__)

#define	vsuxseg2ei64_v_f16mf4(...) __riscv_vsuxseg2ei64_v_f16mf4(__VA_ARGS__)

#define	vsuxseg2ei64_v_f16mf4_m(...) __riscv_vsuxseg2ei64_v_f16mf4_m(__VA_ARGS__)

#define	vsuxseg2ei64_v_f32m1(...) __riscv_vsuxseg2ei64_v_f32m1(__VA_ARGS__)

#define	vsuxseg2ei64_v_f32m1_m(...) __riscv_vsuxseg2ei64_v_f32m1_m(__VA_ARGS__)

#define	vsuxseg2ei64_v_f32m2(...) __riscv_vsuxseg2ei64_v_f32m2(__VA_ARGS__)

#define	vsuxseg2ei64_v_f32m2_m(...) __riscv_vsuxseg2ei64_v_f32m2_m(__VA_ARGS__)

#define	vsuxseg2ei64_v_f32m4(...) __riscv_vsuxseg2ei64_v_f32m4(__VA_ARGS__)

#define	vsuxseg2ei64_v_f32m4_m(...) __riscv_vsuxseg2ei64_v_f32m4_m(__VA_ARGS__)

#define	vsuxseg2ei64_v_f32mf2(...) __riscv_vsuxseg2ei64_v_f32mf2(__VA_ARGS__)

#define	vsuxseg2ei64_v_f32mf2_m(...) __riscv_vsuxseg2ei64_v_f32mf2_m(__VA_ARGS__)

#define	vsuxseg2ei64_v_f64m1(...) __riscv_vsuxseg2ei64_v_f64m1(__VA_ARGS__)

#define	vsuxseg2ei64_v_f64m1_m(...) __riscv_vsuxseg2ei64_v_f64m1_m(__VA_ARGS__)

#define	vsuxseg2ei64_v_f64m2(...) __riscv_vsuxseg2ei64_v_f64m2(__VA_ARGS__)

#define	vsuxseg2ei64_v_f64m2_m(...) __riscv_vsuxseg2ei64_v_f64m2_m(__VA_ARGS__)

#define	vsuxseg2ei64_v_f64m4(...) __riscv_vsuxseg2ei64_v_f64m4(__VA_ARGS__)

#define	vsuxseg2ei64_v_f64m4_m(...) __riscv_vsuxseg2ei64_v_f64m4_m(__VA_ARGS__)

#define	vsuxseg2ei64_v_i16m1(...) __riscv_vsuxseg2ei64_v_i16m1(__VA_ARGS__)

#define	vsuxseg2ei64_v_i16m1_m(...) __riscv_vsuxseg2ei64_v_i16m1_m(__VA_ARGS__)

#define	vsuxseg2ei64_v_i16m2(...) __riscv_vsuxseg2ei64_v_i16m2(__VA_ARGS__)

#define	vsuxseg2ei64_v_i16m2_m(...) __riscv_vsuxseg2ei64_v_i16m2_m(__VA_ARGS__)

#define	vsuxseg2ei64_v_i16mf2(...) __riscv_vsuxseg2ei64_v_i16mf2(__VA_ARGS__)

#define	vsuxseg2ei64_v_i16mf2_m(...) __riscv_vsuxseg2ei64_v_i16mf2_m(__VA_ARGS__)

#define	vsuxseg2ei64_v_i16mf4(...) __riscv_vsuxseg2ei64_v_i16mf4(__VA_ARGS__)

#define	vsuxseg2ei64_v_i16mf4_m(...) __riscv_vsuxseg2ei64_v_i16mf4_m(__VA_ARGS__)

#define	vsuxseg2ei64_v_i32m1(...) __riscv_vsuxseg2ei64_v_i32m1(__VA_ARGS__)

#define	vsuxseg2ei64_v_i32m1_m(...) __riscv_vsuxseg2ei64_v_i32m1_m(__VA_ARGS__)

#define	vsuxseg2ei64_v_i32m2(...) __riscv_vsuxseg2ei64_v_i32m2(__VA_ARGS__)

#define	vsuxseg2ei64_v_i32m2_m(...) __riscv_vsuxseg2ei64_v_i32m2_m(__VA_ARGS__)

#define	vsuxseg2ei64_v_i32m4(...) __riscv_vsuxseg2ei64_v_i32m4(__VA_ARGS__)

#define	vsuxseg2ei64_v_i32m4_m(...) __riscv_vsuxseg2ei64_v_i32m4_m(__VA_ARGS__)

#define	vsuxseg2ei64_v_i32mf2(...) __riscv_vsuxseg2ei64_v_i32mf2(__VA_ARGS__)

#define	vsuxseg2ei64_v_i32mf2_m(...) __riscv_vsuxseg2ei64_v_i32mf2_m(__VA_ARGS__)

#define	vsuxseg2ei64_v_i64m1(...) __riscv_vsuxseg2ei64_v_i64m1(__VA_ARGS__)

#define	vsuxseg2ei64_v_i64m1_m(...) __riscv_vsuxseg2ei64_v_i64m1_m(__VA_ARGS__)

#define	vsuxseg2ei64_v_i64m2(...) __riscv_vsuxseg2ei64_v_i64m2(__VA_ARGS__)

#define	vsuxseg2ei64_v_i64m2_m(...) __riscv_vsuxseg2ei64_v_i64m2_m(__VA_ARGS__)

#define	vsuxseg2ei64_v_i64m4(...) __riscv_vsuxseg2ei64_v_i64m4(__VA_ARGS__)

#define	vsuxseg2ei64_v_i64m4_m(...) __riscv_vsuxseg2ei64_v_i64m4_m(__VA_ARGS__)

#define	vsuxseg2ei64_v_i8m1(...) __riscv_vsuxseg2ei64_v_i8m1(__VA_ARGS__)

#define	vsuxseg2ei64_v_i8m1_m(...) __riscv_vsuxseg2ei64_v_i8m1_m(__VA_ARGS__)

#define	vsuxseg2ei64_v_i8mf2(...) __riscv_vsuxseg2ei64_v_i8mf2(__VA_ARGS__)

#define	vsuxseg2ei64_v_i8mf2_m(...) __riscv_vsuxseg2ei64_v_i8mf2_m(__VA_ARGS__)

#define	vsuxseg2ei64_v_i8mf4(...) __riscv_vsuxseg2ei64_v_i8mf4(__VA_ARGS__)

#define	vsuxseg2ei64_v_i8mf4_m(...) __riscv_vsuxseg2ei64_v_i8mf4_m(__VA_ARGS__)

#define	vsuxseg2ei64_v_i8mf8(...) __riscv_vsuxseg2ei64_v_i8mf8(__VA_ARGS__)

#define	vsuxseg2ei64_v_i8mf8_m(...) __riscv_vsuxseg2ei64_v_i8mf8_m(__VA_ARGS__)

#define	vsuxseg2ei64_v_u16m1(...) __riscv_vsuxseg2ei64_v_u16m1(__VA_ARGS__)

#define	vsuxseg2ei64_v_u16m1_m(...) __riscv_vsuxseg2ei64_v_u16m1_m(__VA_ARGS__)

#define	vsuxseg2ei64_v_u16m2(...) __riscv_vsuxseg2ei64_v_u16m2(__VA_ARGS__)

#define	vsuxseg2ei64_v_u16m2_m(...) __riscv_vsuxseg2ei64_v_u16m2_m(__VA_ARGS__)

#define	vsuxseg2ei64_v_u16mf2(...) __riscv_vsuxseg2ei64_v_u16mf2(__VA_ARGS__)

#define	vsuxseg2ei64_v_u16mf2_m(...) __riscv_vsuxseg2ei64_v_u16mf2_m(__VA_ARGS__)

#define	vsuxseg2ei64_v_u16mf4(...) __riscv_vsuxseg2ei64_v_u16mf4(__VA_ARGS__)

#define	vsuxseg2ei64_v_u16mf4_m(...) __riscv_vsuxseg2ei64_v_u16mf4_m(__VA_ARGS__)

#define	vsuxseg2ei64_v_u32m1(...) __riscv_vsuxseg2ei64_v_u32m1(__VA_ARGS__)

#define	vsuxseg2ei64_v_u32m1_m(...) __riscv_vsuxseg2ei64_v_u32m1_m(__VA_ARGS__)

#define	vsuxseg2ei64_v_u32m2(...) __riscv_vsuxseg2ei64_v_u32m2(__VA_ARGS__)

#define	vsuxseg2ei64_v_u32m2_m(...) __riscv_vsuxseg2ei64_v_u32m2_m(__VA_ARGS__)

#define	vsuxseg2ei64_v_u32m4(...) __riscv_vsuxseg2ei64_v_u32m4(__VA_ARGS__)

#define	vsuxseg2ei64_v_u32m4_m(...) __riscv_vsuxseg2ei64_v_u32m4_m(__VA_ARGS__)

#define	vsuxseg2ei64_v_u32mf2(...) __riscv_vsuxseg2ei64_v_u32mf2(__VA_ARGS__)

#define	vsuxseg2ei64_v_u32mf2_m(...) __riscv_vsuxseg2ei64_v_u32mf2_m(__VA_ARGS__)

#define	vsuxseg2ei64_v_u64m1(...) __riscv_vsuxseg2ei64_v_u64m1(__VA_ARGS__)

#define	vsuxseg2ei64_v_u64m1_m(...) __riscv_vsuxseg2ei64_v_u64m1_m(__VA_ARGS__)

#define	vsuxseg2ei64_v_u64m2(...) __riscv_vsuxseg2ei64_v_u64m2(__VA_ARGS__)

#define	vsuxseg2ei64_v_u64m2_m(...) __riscv_vsuxseg2ei64_v_u64m2_m(__VA_ARGS__)

#define	vsuxseg2ei64_v_u64m4(...) __riscv_vsuxseg2ei64_v_u64m4(__VA_ARGS__)

#define	vsuxseg2ei64_v_u64m4_m(...) __riscv_vsuxseg2ei64_v_u64m4_m(__VA_ARGS__)

#define	vsuxseg2ei64_v_u8m1(...) __riscv_vsuxseg2ei64_v_u8m1(__VA_ARGS__)

#define	vsuxseg2ei64_v_u8m1_m(...) __riscv_vsuxseg2ei64_v_u8m1_m(__VA_ARGS__)

#define	vsuxseg2ei64_v_u8mf2(...) __riscv_vsuxseg2ei64_v_u8mf2(__VA_ARGS__)

#define	vsuxseg2ei64_v_u8mf2_m(...) __riscv_vsuxseg2ei64_v_u8mf2_m(__VA_ARGS__)

#define	vsuxseg2ei64_v_u8mf4(...) __riscv_vsuxseg2ei64_v_u8mf4(__VA_ARGS__)

#define	vsuxseg2ei64_v_u8mf4_m(...) __riscv_vsuxseg2ei64_v_u8mf4_m(__VA_ARGS__)

#define	vsuxseg2ei64_v_u8mf8(...) __riscv_vsuxseg2ei64_v_u8mf8(__VA_ARGS__)

#define	vsuxseg2ei64_v_u8mf8_m(...) __riscv_vsuxseg2ei64_v_u8mf8_m(__VA_ARGS__)

#define	vsuxseg2ei8_v_f16m1(...) __riscv_vsuxseg2ei8_v_f16m1(__VA_ARGS__)

#define	vsuxseg2ei8_v_f16m1_m(...) __riscv_vsuxseg2ei8_v_f16m1_m(__VA_ARGS__)

#define	vsuxseg2ei8_v_f16m2(...) __riscv_vsuxseg2ei8_v_f16m2(__VA_ARGS__)

#define	vsuxseg2ei8_v_f16m2_m(...) __riscv_vsuxseg2ei8_v_f16m2_m(__VA_ARGS__)

#define	vsuxseg2ei8_v_f16m4(...) __riscv_vsuxseg2ei8_v_f16m4(__VA_ARGS__)

#define	vsuxseg2ei8_v_f16m4_m(...) __riscv_vsuxseg2ei8_v_f16m4_m(__VA_ARGS__)

#define	vsuxseg2ei8_v_f16mf2(...) __riscv_vsuxseg2ei8_v_f16mf2(__VA_ARGS__)

#define	vsuxseg2ei8_v_f16mf2_m(...) __riscv_vsuxseg2ei8_v_f16mf2_m(__VA_ARGS__)

#define	vsuxseg2ei8_v_f16mf4(...) __riscv_vsuxseg2ei8_v_f16mf4(__VA_ARGS__)

#define	vsuxseg2ei8_v_f16mf4_m(...) __riscv_vsuxseg2ei8_v_f16mf4_m(__VA_ARGS__)

#define	vsuxseg2ei8_v_f32m1(...) __riscv_vsuxseg2ei8_v_f32m1(__VA_ARGS__)

#define	vsuxseg2ei8_v_f32m1_m(...) __riscv_vsuxseg2ei8_v_f32m1_m(__VA_ARGS__)

#define	vsuxseg2ei8_v_f32m2(...) __riscv_vsuxseg2ei8_v_f32m2(__VA_ARGS__)

#define	vsuxseg2ei8_v_f32m2_m(...) __riscv_vsuxseg2ei8_v_f32m2_m(__VA_ARGS__)

#define	vsuxseg2ei8_v_f32m4(...) __riscv_vsuxseg2ei8_v_f32m4(__VA_ARGS__)

#define	vsuxseg2ei8_v_f32m4_m(...) __riscv_vsuxseg2ei8_v_f32m4_m(__VA_ARGS__)

#define	vsuxseg2ei8_v_f32mf2(...) __riscv_vsuxseg2ei8_v_f32mf2(__VA_ARGS__)

#define	vsuxseg2ei8_v_f32mf2_m(...) __riscv_vsuxseg2ei8_v_f32mf2_m(__VA_ARGS__)

#define	vsuxseg2ei8_v_f64m1(...) __riscv_vsuxseg2ei8_v_f64m1(__VA_ARGS__)

#define	vsuxseg2ei8_v_f64m1_m(...) __riscv_vsuxseg2ei8_v_f64m1_m(__VA_ARGS__)

#define	vsuxseg2ei8_v_f64m2(...) __riscv_vsuxseg2ei8_v_f64m2(__VA_ARGS__)

#define	vsuxseg2ei8_v_f64m2_m(...) __riscv_vsuxseg2ei8_v_f64m2_m(__VA_ARGS__)

#define	vsuxseg2ei8_v_f64m4(...) __riscv_vsuxseg2ei8_v_f64m4(__VA_ARGS__)

#define	vsuxseg2ei8_v_f64m4_m(...) __riscv_vsuxseg2ei8_v_f64m4_m(__VA_ARGS__)

#define	vsuxseg2ei8_v_i16m1(...) __riscv_vsuxseg2ei8_v_i16m1(__VA_ARGS__)

#define	vsuxseg2ei8_v_i16m1_m(...) __riscv_vsuxseg2ei8_v_i16m1_m(__VA_ARGS__)

#define	vsuxseg2ei8_v_i16m2(...) __riscv_vsuxseg2ei8_v_i16m2(__VA_ARGS__)

#define	vsuxseg2ei8_v_i16m2_m(...) __riscv_vsuxseg2ei8_v_i16m2_m(__VA_ARGS__)

#define	vsuxseg2ei8_v_i16m4(...) __riscv_vsuxseg2ei8_v_i16m4(__VA_ARGS__)

#define	vsuxseg2ei8_v_i16m4_m(...) __riscv_vsuxseg2ei8_v_i16m4_m(__VA_ARGS__)

#define	vsuxseg2ei8_v_i16mf2(...) __riscv_vsuxseg2ei8_v_i16mf2(__VA_ARGS__)

#define	vsuxseg2ei8_v_i16mf2_m(...) __riscv_vsuxseg2ei8_v_i16mf2_m(__VA_ARGS__)

#define	vsuxseg2ei8_v_i16mf4(...) __riscv_vsuxseg2ei8_v_i16mf4(__VA_ARGS__)

#define	vsuxseg2ei8_v_i16mf4_m(...) __riscv_vsuxseg2ei8_v_i16mf4_m(__VA_ARGS__)

#define	vsuxseg2ei8_v_i32m1(...) __riscv_vsuxseg2ei8_v_i32m1(__VA_ARGS__)

#define	vsuxseg2ei8_v_i32m1_m(...) __riscv_vsuxseg2ei8_v_i32m1_m(__VA_ARGS__)

#define	vsuxseg2ei8_v_i32m2(...) __riscv_vsuxseg2ei8_v_i32m2(__VA_ARGS__)

#define	vsuxseg2ei8_v_i32m2_m(...) __riscv_vsuxseg2ei8_v_i32m2_m(__VA_ARGS__)

#define	vsuxseg2ei8_v_i32m4(...) __riscv_vsuxseg2ei8_v_i32m4(__VA_ARGS__)

#define	vsuxseg2ei8_v_i32m4_m(...) __riscv_vsuxseg2ei8_v_i32m4_m(__VA_ARGS__)

#define	vsuxseg2ei8_v_i32mf2(...) __riscv_vsuxseg2ei8_v_i32mf2(__VA_ARGS__)

#define	vsuxseg2ei8_v_i32mf2_m(...) __riscv_vsuxseg2ei8_v_i32mf2_m(__VA_ARGS__)

#define	vsuxseg2ei8_v_i64m1(...) __riscv_vsuxseg2ei8_v_i64m1(__VA_ARGS__)

#define	vsuxseg2ei8_v_i64m1_m(...) __riscv_vsuxseg2ei8_v_i64m1_m(__VA_ARGS__)

#define	vsuxseg2ei8_v_i64m2(...) __riscv_vsuxseg2ei8_v_i64m2(__VA_ARGS__)

#define	vsuxseg2ei8_v_i64m2_m(...) __riscv_vsuxseg2ei8_v_i64m2_m(__VA_ARGS__)

#define	vsuxseg2ei8_v_i64m4(...) __riscv_vsuxseg2ei8_v_i64m4(__VA_ARGS__)

#define	vsuxseg2ei8_v_i64m4_m(...) __riscv_vsuxseg2ei8_v_i64m4_m(__VA_ARGS__)

#define	vsuxseg2ei8_v_i8m1(...) __riscv_vsuxseg2ei8_v_i8m1(__VA_ARGS__)

#define	vsuxseg2ei8_v_i8m1_m(...) __riscv_vsuxseg2ei8_v_i8m1_m(__VA_ARGS__)

#define	vsuxseg2ei8_v_i8m2(...) __riscv_vsuxseg2ei8_v_i8m2(__VA_ARGS__)

#define	vsuxseg2ei8_v_i8m2_m(...) __riscv_vsuxseg2ei8_v_i8m2_m(__VA_ARGS__)

#define	vsuxseg2ei8_v_i8m4(...) __riscv_vsuxseg2ei8_v_i8m4(__VA_ARGS__)

#define	vsuxseg2ei8_v_i8m4_m(...) __riscv_vsuxseg2ei8_v_i8m4_m(__VA_ARGS__)

#define	vsuxseg2ei8_v_i8mf2(...) __riscv_vsuxseg2ei8_v_i8mf2(__VA_ARGS__)

#define	vsuxseg2ei8_v_i8mf2_m(...) __riscv_vsuxseg2ei8_v_i8mf2_m(__VA_ARGS__)

#define	vsuxseg2ei8_v_i8mf4(...) __riscv_vsuxseg2ei8_v_i8mf4(__VA_ARGS__)

#define	vsuxseg2ei8_v_i8mf4_m(...) __riscv_vsuxseg2ei8_v_i8mf4_m(__VA_ARGS__)

#define	vsuxseg2ei8_v_i8mf8(...) __riscv_vsuxseg2ei8_v_i8mf8(__VA_ARGS__)

#define	vsuxseg2ei8_v_i8mf8_m(...) __riscv_vsuxseg2ei8_v_i8mf8_m(__VA_ARGS__)

#define	vsuxseg2ei8_v_u16m1(...) __riscv_vsuxseg2ei8_v_u16m1(__VA_ARGS__)

#define	vsuxseg2ei8_v_u16m1_m(...) __riscv_vsuxseg2ei8_v_u16m1_m(__VA_ARGS__)

#define	vsuxseg2ei8_v_u16m2(...) __riscv_vsuxseg2ei8_v_u16m2(__VA_ARGS__)

#define	vsuxseg2ei8_v_u16m2_m(...) __riscv_vsuxseg2ei8_v_u16m2_m(__VA_ARGS__)

#define	vsuxseg2ei8_v_u16m4(...) __riscv_vsuxseg2ei8_v_u16m4(__VA_ARGS__)

#define	vsuxseg2ei8_v_u16m4_m(...) __riscv_vsuxseg2ei8_v_u16m4_m(__VA_ARGS__)

#define	vsuxseg2ei8_v_u16mf2(...) __riscv_vsuxseg2ei8_v_u16mf2(__VA_ARGS__)

#define	vsuxseg2ei8_v_u16mf2_m(...) __riscv_vsuxseg2ei8_v_u16mf2_m(__VA_ARGS__)

#define	vsuxseg2ei8_v_u16mf4(...) __riscv_vsuxseg2ei8_v_u16mf4(__VA_ARGS__)

#define	vsuxseg2ei8_v_u16mf4_m(...) __riscv_vsuxseg2ei8_v_u16mf4_m(__VA_ARGS__)

#define	vsuxseg2ei8_v_u32m1(...) __riscv_vsuxseg2ei8_v_u32m1(__VA_ARGS__)

#define	vsuxseg2ei8_v_u32m1_m(...) __riscv_vsuxseg2ei8_v_u32m1_m(__VA_ARGS__)

#define	vsuxseg2ei8_v_u32m2(...) __riscv_vsuxseg2ei8_v_u32m2(__VA_ARGS__)

#define	vsuxseg2ei8_v_u32m2_m(...) __riscv_vsuxseg2ei8_v_u32m2_m(__VA_ARGS__)

#define	vsuxseg2ei8_v_u32m4(...) __riscv_vsuxseg2ei8_v_u32m4(__VA_ARGS__)

#define	vsuxseg2ei8_v_u32m4_m(...) __riscv_vsuxseg2ei8_v_u32m4_m(__VA_ARGS__)

#define	vsuxseg2ei8_v_u32mf2(...) __riscv_vsuxseg2ei8_v_u32mf2(__VA_ARGS__)

#define	vsuxseg2ei8_v_u32mf2_m(...) __riscv_vsuxseg2ei8_v_u32mf2_m(__VA_ARGS__)

#define	vsuxseg2ei8_v_u64m1(...) __riscv_vsuxseg2ei8_v_u64m1(__VA_ARGS__)

#define	vsuxseg2ei8_v_u64m1_m(...) __riscv_vsuxseg2ei8_v_u64m1_m(__VA_ARGS__)

#define	vsuxseg2ei8_v_u64m2(...) __riscv_vsuxseg2ei8_v_u64m2(__VA_ARGS__)

#define	vsuxseg2ei8_v_u64m2_m(...) __riscv_vsuxseg2ei8_v_u64m2_m(__VA_ARGS__)

#define	vsuxseg2ei8_v_u64m4(...) __riscv_vsuxseg2ei8_v_u64m4(__VA_ARGS__)

#define	vsuxseg2ei8_v_u64m4_m(...) __riscv_vsuxseg2ei8_v_u64m4_m(__VA_ARGS__)

#define	vsuxseg2ei8_v_u8m1(...) __riscv_vsuxseg2ei8_v_u8m1(__VA_ARGS__)

#define	vsuxseg2ei8_v_u8m1_m(...) __riscv_vsuxseg2ei8_v_u8m1_m(__VA_ARGS__)

#define	vsuxseg2ei8_v_u8m2(...) __riscv_vsuxseg2ei8_v_u8m2(__VA_ARGS__)

#define	vsuxseg2ei8_v_u8m2_m(...) __riscv_vsuxseg2ei8_v_u8m2_m(__VA_ARGS__)

#define	vsuxseg2ei8_v_u8m4(...) __riscv_vsuxseg2ei8_v_u8m4(__VA_ARGS__)

#define	vsuxseg2ei8_v_u8m4_m(...) __riscv_vsuxseg2ei8_v_u8m4_m(__VA_ARGS__)

#define	vsuxseg2ei8_v_u8mf2(...) __riscv_vsuxseg2ei8_v_u8mf2(__VA_ARGS__)

#define	vsuxseg2ei8_v_u8mf2_m(...) __riscv_vsuxseg2ei8_v_u8mf2_m(__VA_ARGS__)

#define	vsuxseg2ei8_v_u8mf4(...) __riscv_vsuxseg2ei8_v_u8mf4(__VA_ARGS__)

#define	vsuxseg2ei8_v_u8mf4_m(...) __riscv_vsuxseg2ei8_v_u8mf4_m(__VA_ARGS__)

#define	vsuxseg2ei8_v_u8mf8(...) __riscv_vsuxseg2ei8_v_u8mf8(__VA_ARGS__)

#define	vsuxseg2ei8_v_u8mf8_m(...) __riscv_vsuxseg2ei8_v_u8mf8_m(__VA_ARGS__)

#define	vsuxseg3ei16_v_f16m1(...) __riscv_vsuxseg3ei16_v_f16m1(__VA_ARGS__)

#define	vsuxseg3ei16_v_f16m1_m(...) __riscv_vsuxseg3ei16_v_f16m1_m(__VA_ARGS__)

#define	vsuxseg3ei16_v_f16m2(...) __riscv_vsuxseg3ei16_v_f16m2(__VA_ARGS__)

#define	vsuxseg3ei16_v_f16m2_m(...) __riscv_vsuxseg3ei16_v_f16m2_m(__VA_ARGS__)

#define	vsuxseg3ei16_v_f16mf2(...) __riscv_vsuxseg3ei16_v_f16mf2(__VA_ARGS__)

#define	vsuxseg3ei16_v_f16mf2_m(...) __riscv_vsuxseg3ei16_v_f16mf2_m(__VA_ARGS__)

#define	vsuxseg3ei16_v_f16mf4(...) __riscv_vsuxseg3ei16_v_f16mf4(__VA_ARGS__)

#define	vsuxseg3ei16_v_f16mf4_m(...) __riscv_vsuxseg3ei16_v_f16mf4_m(__VA_ARGS__)

#define	vsuxseg3ei16_v_f32m1(...) __riscv_vsuxseg3ei16_v_f32m1(__VA_ARGS__)

#define	vsuxseg3ei16_v_f32m1_m(...) __riscv_vsuxseg3ei16_v_f32m1_m(__VA_ARGS__)

#define	vsuxseg3ei16_v_f32m2(...) __riscv_vsuxseg3ei16_v_f32m2(__VA_ARGS__)

#define	vsuxseg3ei16_v_f32m2_m(...) __riscv_vsuxseg3ei16_v_f32m2_m(__VA_ARGS__)

#define	vsuxseg3ei16_v_f32mf2(...) __riscv_vsuxseg3ei16_v_f32mf2(__VA_ARGS__)

#define	vsuxseg3ei16_v_f32mf2_m(...) __riscv_vsuxseg3ei16_v_f32mf2_m(__VA_ARGS__)

#define	vsuxseg3ei16_v_f64m1(...) __riscv_vsuxseg3ei16_v_f64m1(__VA_ARGS__)

#define	vsuxseg3ei16_v_f64m1_m(...) __riscv_vsuxseg3ei16_v_f64m1_m(__VA_ARGS__)

#define	vsuxseg3ei16_v_f64m2(...) __riscv_vsuxseg3ei16_v_f64m2(__VA_ARGS__)

#define	vsuxseg3ei16_v_f64m2_m(...) __riscv_vsuxseg3ei16_v_f64m2_m(__VA_ARGS__)

#define	vsuxseg3ei16_v_i16m1(...) __riscv_vsuxseg3ei16_v_i16m1(__VA_ARGS__)

#define	vsuxseg3ei16_v_i16m1_m(...) __riscv_vsuxseg3ei16_v_i16m1_m(__VA_ARGS__)

#define	vsuxseg3ei16_v_i16m2(...) __riscv_vsuxseg3ei16_v_i16m2(__VA_ARGS__)

#define	vsuxseg3ei16_v_i16m2_m(...) __riscv_vsuxseg3ei16_v_i16m2_m(__VA_ARGS__)

#define	vsuxseg3ei16_v_i16mf2(...) __riscv_vsuxseg3ei16_v_i16mf2(__VA_ARGS__)

#define	vsuxseg3ei16_v_i16mf2_m(...) __riscv_vsuxseg3ei16_v_i16mf2_m(__VA_ARGS__)

#define	vsuxseg3ei16_v_i16mf4(...) __riscv_vsuxseg3ei16_v_i16mf4(__VA_ARGS__)

#define	vsuxseg3ei16_v_i16mf4_m(...) __riscv_vsuxseg3ei16_v_i16mf4_m(__VA_ARGS__)

#define	vsuxseg3ei16_v_i32m1(...) __riscv_vsuxseg3ei16_v_i32m1(__VA_ARGS__)

#define	vsuxseg3ei16_v_i32m1_m(...) __riscv_vsuxseg3ei16_v_i32m1_m(__VA_ARGS__)

#define	vsuxseg3ei16_v_i32m2(...) __riscv_vsuxseg3ei16_v_i32m2(__VA_ARGS__)

#define	vsuxseg3ei16_v_i32m2_m(...) __riscv_vsuxseg3ei16_v_i32m2_m(__VA_ARGS__)

#define	vsuxseg3ei16_v_i32mf2(...) __riscv_vsuxseg3ei16_v_i32mf2(__VA_ARGS__)

#define	vsuxseg3ei16_v_i32mf2_m(...) __riscv_vsuxseg3ei16_v_i32mf2_m(__VA_ARGS__)

#define	vsuxseg3ei16_v_i64m1(...) __riscv_vsuxseg3ei16_v_i64m1(__VA_ARGS__)

#define	vsuxseg3ei16_v_i64m1_m(...) __riscv_vsuxseg3ei16_v_i64m1_m(__VA_ARGS__)

#define	vsuxseg3ei16_v_i64m2(...) __riscv_vsuxseg3ei16_v_i64m2(__VA_ARGS__)

#define	vsuxseg3ei16_v_i64m2_m(...) __riscv_vsuxseg3ei16_v_i64m2_m(__VA_ARGS__)

#define	vsuxseg3ei16_v_i8m1(...) __riscv_vsuxseg3ei16_v_i8m1(__VA_ARGS__)

#define	vsuxseg3ei16_v_i8m1_m(...) __riscv_vsuxseg3ei16_v_i8m1_m(__VA_ARGS__)

#define	vsuxseg3ei16_v_i8m2(...) __riscv_vsuxseg3ei16_v_i8m2(__VA_ARGS__)

#define	vsuxseg3ei16_v_i8m2_m(...) __riscv_vsuxseg3ei16_v_i8m2_m(__VA_ARGS__)

#define	vsuxseg3ei16_v_i8mf2(...) __riscv_vsuxseg3ei16_v_i8mf2(__VA_ARGS__)

#define	vsuxseg3ei16_v_i8mf2_m(...) __riscv_vsuxseg3ei16_v_i8mf2_m(__VA_ARGS__)

#define	vsuxseg3ei16_v_i8mf4(...) __riscv_vsuxseg3ei16_v_i8mf4(__VA_ARGS__)

#define	vsuxseg3ei16_v_i8mf4_m(...) __riscv_vsuxseg3ei16_v_i8mf4_m(__VA_ARGS__)

#define	vsuxseg3ei16_v_i8mf8(...) __riscv_vsuxseg3ei16_v_i8mf8(__VA_ARGS__)

#define	vsuxseg3ei16_v_i8mf8_m(...) __riscv_vsuxseg3ei16_v_i8mf8_m(__VA_ARGS__)

#define	vsuxseg3ei16_v_u16m1(...) __riscv_vsuxseg3ei16_v_u16m1(__VA_ARGS__)

#define	vsuxseg3ei16_v_u16m1_m(...) __riscv_vsuxseg3ei16_v_u16m1_m(__VA_ARGS__)

#define	vsuxseg3ei16_v_u16m2(...) __riscv_vsuxseg3ei16_v_u16m2(__VA_ARGS__)

#define	vsuxseg3ei16_v_u16m2_m(...) __riscv_vsuxseg3ei16_v_u16m2_m(__VA_ARGS__)

#define	vsuxseg3ei16_v_u16mf2(...) __riscv_vsuxseg3ei16_v_u16mf2(__VA_ARGS__)

#define	vsuxseg3ei16_v_u16mf2_m(...) __riscv_vsuxseg3ei16_v_u16mf2_m(__VA_ARGS__)

#define	vsuxseg3ei16_v_u16mf4(...) __riscv_vsuxseg3ei16_v_u16mf4(__VA_ARGS__)

#define	vsuxseg3ei16_v_u16mf4_m(...) __riscv_vsuxseg3ei16_v_u16mf4_m(__VA_ARGS__)

#define	vsuxseg3ei16_v_u32m1(...) __riscv_vsuxseg3ei16_v_u32m1(__VA_ARGS__)

#define	vsuxseg3ei16_v_u32m1_m(...) __riscv_vsuxseg3ei16_v_u32m1_m(__VA_ARGS__)

#define	vsuxseg3ei16_v_u32m2(...) __riscv_vsuxseg3ei16_v_u32m2(__VA_ARGS__)

#define	vsuxseg3ei16_v_u32m2_m(...) __riscv_vsuxseg3ei16_v_u32m2_m(__VA_ARGS__)

#define	vsuxseg3ei16_v_u32mf2(...) __riscv_vsuxseg3ei16_v_u32mf2(__VA_ARGS__)

#define	vsuxseg3ei16_v_u32mf2_m(...) __riscv_vsuxseg3ei16_v_u32mf2_m(__VA_ARGS__)

#define	vsuxseg3ei16_v_u64m1(...) __riscv_vsuxseg3ei16_v_u64m1(__VA_ARGS__)

#define	vsuxseg3ei16_v_u64m1_m(...) __riscv_vsuxseg3ei16_v_u64m1_m(__VA_ARGS__)

#define	vsuxseg3ei16_v_u64m2(...) __riscv_vsuxseg3ei16_v_u64m2(__VA_ARGS__)

#define	vsuxseg3ei16_v_u64m2_m(...) __riscv_vsuxseg3ei16_v_u64m2_m(__VA_ARGS__)

#define	vsuxseg3ei16_v_u8m1(...) __riscv_vsuxseg3ei16_v_u8m1(__VA_ARGS__)

#define	vsuxseg3ei16_v_u8m1_m(...) __riscv_vsuxseg3ei16_v_u8m1_m(__VA_ARGS__)

#define	vsuxseg3ei16_v_u8m2(...) __riscv_vsuxseg3ei16_v_u8m2(__VA_ARGS__)

#define	vsuxseg3ei16_v_u8m2_m(...) __riscv_vsuxseg3ei16_v_u8m2_m(__VA_ARGS__)

#define	vsuxseg3ei16_v_u8mf2(...) __riscv_vsuxseg3ei16_v_u8mf2(__VA_ARGS__)

#define	vsuxseg3ei16_v_u8mf2_m(...) __riscv_vsuxseg3ei16_v_u8mf2_m(__VA_ARGS__)

#define	vsuxseg3ei16_v_u8mf4(...) __riscv_vsuxseg3ei16_v_u8mf4(__VA_ARGS__)

#define	vsuxseg3ei16_v_u8mf4_m(...) __riscv_vsuxseg3ei16_v_u8mf4_m(__VA_ARGS__)

#define	vsuxseg3ei16_v_u8mf8(...) __riscv_vsuxseg3ei16_v_u8mf8(__VA_ARGS__)

#define	vsuxseg3ei16_v_u8mf8_m(...) __riscv_vsuxseg3ei16_v_u8mf8_m(__VA_ARGS__)

#define	vsuxseg3ei32_v_f16m1(...) __riscv_vsuxseg3ei32_v_f16m1(__VA_ARGS__)

#define	vsuxseg3ei32_v_f16m1_m(...) __riscv_vsuxseg3ei32_v_f16m1_m(__VA_ARGS__)

#define	vsuxseg3ei32_v_f16m2(...) __riscv_vsuxseg3ei32_v_f16m2(__VA_ARGS__)

#define	vsuxseg3ei32_v_f16m2_m(...) __riscv_vsuxseg3ei32_v_f16m2_m(__VA_ARGS__)

#define	vsuxseg3ei32_v_f16mf2(...) __riscv_vsuxseg3ei32_v_f16mf2(__VA_ARGS__)

#define	vsuxseg3ei32_v_f16mf2_m(...) __riscv_vsuxseg3ei32_v_f16mf2_m(__VA_ARGS__)

#define	vsuxseg3ei32_v_f16mf4(...) __riscv_vsuxseg3ei32_v_f16mf4(__VA_ARGS__)

#define	vsuxseg3ei32_v_f16mf4_m(...) __riscv_vsuxseg3ei32_v_f16mf4_m(__VA_ARGS__)

#define	vsuxseg3ei32_v_f32m1(...) __riscv_vsuxseg3ei32_v_f32m1(__VA_ARGS__)

#define	vsuxseg3ei32_v_f32m1_m(...) __riscv_vsuxseg3ei32_v_f32m1_m(__VA_ARGS__)

#define	vsuxseg3ei32_v_f32m2(...) __riscv_vsuxseg3ei32_v_f32m2(__VA_ARGS__)

#define	vsuxseg3ei32_v_f32m2_m(...) __riscv_vsuxseg3ei32_v_f32m2_m(__VA_ARGS__)

#define	vsuxseg3ei32_v_f32mf2(...) __riscv_vsuxseg3ei32_v_f32mf2(__VA_ARGS__)

#define	vsuxseg3ei32_v_f32mf2_m(...) __riscv_vsuxseg3ei32_v_f32mf2_m(__VA_ARGS__)

#define	vsuxseg3ei32_v_f64m1(...) __riscv_vsuxseg3ei32_v_f64m1(__VA_ARGS__)

#define	vsuxseg3ei32_v_f64m1_m(...) __riscv_vsuxseg3ei32_v_f64m1_m(__VA_ARGS__)

#define	vsuxseg3ei32_v_f64m2(...) __riscv_vsuxseg3ei32_v_f64m2(__VA_ARGS__)

#define	vsuxseg3ei32_v_f64m2_m(...) __riscv_vsuxseg3ei32_v_f64m2_m(__VA_ARGS__)

#define	vsuxseg3ei32_v_i16m1(...) __riscv_vsuxseg3ei32_v_i16m1(__VA_ARGS__)

#define	vsuxseg3ei32_v_i16m1_m(...) __riscv_vsuxseg3ei32_v_i16m1_m(__VA_ARGS__)

#define	vsuxseg3ei32_v_i16m2(...) __riscv_vsuxseg3ei32_v_i16m2(__VA_ARGS__)

#define	vsuxseg3ei32_v_i16m2_m(...) __riscv_vsuxseg3ei32_v_i16m2_m(__VA_ARGS__)

#define	vsuxseg3ei32_v_i16mf2(...) __riscv_vsuxseg3ei32_v_i16mf2(__VA_ARGS__)

#define	vsuxseg3ei32_v_i16mf2_m(...) __riscv_vsuxseg3ei32_v_i16mf2_m(__VA_ARGS__)

#define	vsuxseg3ei32_v_i16mf4(...) __riscv_vsuxseg3ei32_v_i16mf4(__VA_ARGS__)

#define	vsuxseg3ei32_v_i16mf4_m(...) __riscv_vsuxseg3ei32_v_i16mf4_m(__VA_ARGS__)

#define	vsuxseg3ei32_v_i32m1(...) __riscv_vsuxseg3ei32_v_i32m1(__VA_ARGS__)

#define	vsuxseg3ei32_v_i32m1_m(...) __riscv_vsuxseg3ei32_v_i32m1_m(__VA_ARGS__)

#define	vsuxseg3ei32_v_i32m2(...) __riscv_vsuxseg3ei32_v_i32m2(__VA_ARGS__)

#define	vsuxseg3ei32_v_i32m2_m(...) __riscv_vsuxseg3ei32_v_i32m2_m(__VA_ARGS__)

#define	vsuxseg3ei32_v_i32mf2(...) __riscv_vsuxseg3ei32_v_i32mf2(__VA_ARGS__)

#define	vsuxseg3ei32_v_i32mf2_m(...) __riscv_vsuxseg3ei32_v_i32mf2_m(__VA_ARGS__)

#define	vsuxseg3ei32_v_i64m1(...) __riscv_vsuxseg3ei32_v_i64m1(__VA_ARGS__)

#define	vsuxseg3ei32_v_i64m1_m(...) __riscv_vsuxseg3ei32_v_i64m1_m(__VA_ARGS__)

#define	vsuxseg3ei32_v_i64m2(...) __riscv_vsuxseg3ei32_v_i64m2(__VA_ARGS__)

#define	vsuxseg3ei32_v_i64m2_m(...) __riscv_vsuxseg3ei32_v_i64m2_m(__VA_ARGS__)

#define	vsuxseg3ei32_v_i8m1(...) __riscv_vsuxseg3ei32_v_i8m1(__VA_ARGS__)

#define	vsuxseg3ei32_v_i8m1_m(...) __riscv_vsuxseg3ei32_v_i8m1_m(__VA_ARGS__)

#define	vsuxseg3ei32_v_i8m2(...) __riscv_vsuxseg3ei32_v_i8m2(__VA_ARGS__)

#define	vsuxseg3ei32_v_i8m2_m(...) __riscv_vsuxseg3ei32_v_i8m2_m(__VA_ARGS__)

#define	vsuxseg3ei32_v_i8mf2(...) __riscv_vsuxseg3ei32_v_i8mf2(__VA_ARGS__)

#define	vsuxseg3ei32_v_i8mf2_m(...) __riscv_vsuxseg3ei32_v_i8mf2_m(__VA_ARGS__)

#define	vsuxseg3ei32_v_i8mf4(...) __riscv_vsuxseg3ei32_v_i8mf4(__VA_ARGS__)

#define	vsuxseg3ei32_v_i8mf4_m(...) __riscv_vsuxseg3ei32_v_i8mf4_m(__VA_ARGS__)

#define	vsuxseg3ei32_v_i8mf8(...) __riscv_vsuxseg3ei32_v_i8mf8(__VA_ARGS__)

#define	vsuxseg3ei32_v_i8mf8_m(...) __riscv_vsuxseg3ei32_v_i8mf8_m(__VA_ARGS__)

#define	vsuxseg3ei32_v_u16m1(...) __riscv_vsuxseg3ei32_v_u16m1(__VA_ARGS__)

#define	vsuxseg3ei32_v_u16m1_m(...) __riscv_vsuxseg3ei32_v_u16m1_m(__VA_ARGS__)

#define	vsuxseg3ei32_v_u16m2(...) __riscv_vsuxseg3ei32_v_u16m2(__VA_ARGS__)

#define	vsuxseg3ei32_v_u16m2_m(...) __riscv_vsuxseg3ei32_v_u16m2_m(__VA_ARGS__)

#define	vsuxseg3ei32_v_u16mf2(...) __riscv_vsuxseg3ei32_v_u16mf2(__VA_ARGS__)

#define	vsuxseg3ei32_v_u16mf2_m(...) __riscv_vsuxseg3ei32_v_u16mf2_m(__VA_ARGS__)

#define	vsuxseg3ei32_v_u16mf4(...) __riscv_vsuxseg3ei32_v_u16mf4(__VA_ARGS__)

#define	vsuxseg3ei32_v_u16mf4_m(...) __riscv_vsuxseg3ei32_v_u16mf4_m(__VA_ARGS__)

#define	vsuxseg3ei32_v_u32m1(...) __riscv_vsuxseg3ei32_v_u32m1(__VA_ARGS__)

#define	vsuxseg3ei32_v_u32m1_m(...) __riscv_vsuxseg3ei32_v_u32m1_m(__VA_ARGS__)

#define	vsuxseg3ei32_v_u32m2(...) __riscv_vsuxseg3ei32_v_u32m2(__VA_ARGS__)

#define	vsuxseg3ei32_v_u32m2_m(...) __riscv_vsuxseg3ei32_v_u32m2_m(__VA_ARGS__)

#define	vsuxseg3ei32_v_u32mf2(...) __riscv_vsuxseg3ei32_v_u32mf2(__VA_ARGS__)

#define	vsuxseg3ei32_v_u32mf2_m(...) __riscv_vsuxseg3ei32_v_u32mf2_m(__VA_ARGS__)

#define	vsuxseg3ei32_v_u64m1(...) __riscv_vsuxseg3ei32_v_u64m1(__VA_ARGS__)

#define	vsuxseg3ei32_v_u64m1_m(...) __riscv_vsuxseg3ei32_v_u64m1_m(__VA_ARGS__)

#define	vsuxseg3ei32_v_u64m2(...) __riscv_vsuxseg3ei32_v_u64m2(__VA_ARGS__)

#define	vsuxseg3ei32_v_u64m2_m(...) __riscv_vsuxseg3ei32_v_u64m2_m(__VA_ARGS__)

#define	vsuxseg3ei32_v_u8m1(...) __riscv_vsuxseg3ei32_v_u8m1(__VA_ARGS__)

#define	vsuxseg3ei32_v_u8m1_m(...) __riscv_vsuxseg3ei32_v_u8m1_m(__VA_ARGS__)

#define	vsuxseg3ei32_v_u8m2(...) __riscv_vsuxseg3ei32_v_u8m2(__VA_ARGS__)

#define	vsuxseg3ei32_v_u8m2_m(...) __riscv_vsuxseg3ei32_v_u8m2_m(__VA_ARGS__)

#define	vsuxseg3ei32_v_u8mf2(...) __riscv_vsuxseg3ei32_v_u8mf2(__VA_ARGS__)

#define	vsuxseg3ei32_v_u8mf2_m(...) __riscv_vsuxseg3ei32_v_u8mf2_m(__VA_ARGS__)

#define	vsuxseg3ei32_v_u8mf4(...) __riscv_vsuxseg3ei32_v_u8mf4(__VA_ARGS__)

#define	vsuxseg3ei32_v_u8mf4_m(...) __riscv_vsuxseg3ei32_v_u8mf4_m(__VA_ARGS__)

#define	vsuxseg3ei32_v_u8mf8(...) __riscv_vsuxseg3ei32_v_u8mf8(__VA_ARGS__)

#define	vsuxseg3ei32_v_u8mf8_m(...) __riscv_vsuxseg3ei32_v_u8mf8_m(__VA_ARGS__)

#define	vsuxseg3ei64_v_f16m1(...) __riscv_vsuxseg3ei64_v_f16m1(__VA_ARGS__)

#define	vsuxseg3ei64_v_f16m1_m(...) __riscv_vsuxseg3ei64_v_f16m1_m(__VA_ARGS__)

#define	vsuxseg3ei64_v_f16m2(...) __riscv_vsuxseg3ei64_v_f16m2(__VA_ARGS__)

#define	vsuxseg3ei64_v_f16m2_m(...) __riscv_vsuxseg3ei64_v_f16m2_m(__VA_ARGS__)

#define	vsuxseg3ei64_v_f16mf2(...) __riscv_vsuxseg3ei64_v_f16mf2(__VA_ARGS__)

#define	vsuxseg3ei64_v_f16mf2_m(...) __riscv_vsuxseg3ei64_v_f16mf2_m(__VA_ARGS__)

#define	vsuxseg3ei64_v_f16mf4(...) __riscv_vsuxseg3ei64_v_f16mf4(__VA_ARGS__)

#define	vsuxseg3ei64_v_f16mf4_m(...) __riscv_vsuxseg3ei64_v_f16mf4_m(__VA_ARGS__)

#define	vsuxseg3ei64_v_f32m1(...) __riscv_vsuxseg3ei64_v_f32m1(__VA_ARGS__)

#define	vsuxseg3ei64_v_f32m1_m(...) __riscv_vsuxseg3ei64_v_f32m1_m(__VA_ARGS__)

#define	vsuxseg3ei64_v_f32m2(...) __riscv_vsuxseg3ei64_v_f32m2(__VA_ARGS__)

#define	vsuxseg3ei64_v_f32m2_m(...) __riscv_vsuxseg3ei64_v_f32m2_m(__VA_ARGS__)

#define	vsuxseg3ei64_v_f32mf2(...) __riscv_vsuxseg3ei64_v_f32mf2(__VA_ARGS__)

#define	vsuxseg3ei64_v_f32mf2_m(...) __riscv_vsuxseg3ei64_v_f32mf2_m(__VA_ARGS__)

#define	vsuxseg3ei64_v_f64m1(...) __riscv_vsuxseg3ei64_v_f64m1(__VA_ARGS__)

#define	vsuxseg3ei64_v_f64m1_m(...) __riscv_vsuxseg3ei64_v_f64m1_m(__VA_ARGS__)

#define	vsuxseg3ei64_v_f64m2(...) __riscv_vsuxseg3ei64_v_f64m2(__VA_ARGS__)

#define	vsuxseg3ei64_v_f64m2_m(...) __riscv_vsuxseg3ei64_v_f64m2_m(__VA_ARGS__)

#define	vsuxseg3ei64_v_i16m1(...) __riscv_vsuxseg3ei64_v_i16m1(__VA_ARGS__)

#define	vsuxseg3ei64_v_i16m1_m(...) __riscv_vsuxseg3ei64_v_i16m1_m(__VA_ARGS__)

#define	vsuxseg3ei64_v_i16m2(...) __riscv_vsuxseg3ei64_v_i16m2(__VA_ARGS__)

#define	vsuxseg3ei64_v_i16m2_m(...) __riscv_vsuxseg3ei64_v_i16m2_m(__VA_ARGS__)

#define	vsuxseg3ei64_v_i16mf2(...) __riscv_vsuxseg3ei64_v_i16mf2(__VA_ARGS__)

#define	vsuxseg3ei64_v_i16mf2_m(...) __riscv_vsuxseg3ei64_v_i16mf2_m(__VA_ARGS__)

#define	vsuxseg3ei64_v_i16mf4(...) __riscv_vsuxseg3ei64_v_i16mf4(__VA_ARGS__)

#define	vsuxseg3ei64_v_i16mf4_m(...) __riscv_vsuxseg3ei64_v_i16mf4_m(__VA_ARGS__)

#define	vsuxseg3ei64_v_i32m1(...) __riscv_vsuxseg3ei64_v_i32m1(__VA_ARGS__)

#define	vsuxseg3ei64_v_i32m1_m(...) __riscv_vsuxseg3ei64_v_i32m1_m(__VA_ARGS__)

#define	vsuxseg3ei64_v_i32m2(...) __riscv_vsuxseg3ei64_v_i32m2(__VA_ARGS__)

#define	vsuxseg3ei64_v_i32m2_m(...) __riscv_vsuxseg3ei64_v_i32m2_m(__VA_ARGS__)

#define	vsuxseg3ei64_v_i32mf2(...) __riscv_vsuxseg3ei64_v_i32mf2(__VA_ARGS__)

#define	vsuxseg3ei64_v_i32mf2_m(...) __riscv_vsuxseg3ei64_v_i32mf2_m(__VA_ARGS__)

#define	vsuxseg3ei64_v_i64m1(...) __riscv_vsuxseg3ei64_v_i64m1(__VA_ARGS__)

#define	vsuxseg3ei64_v_i64m1_m(...) __riscv_vsuxseg3ei64_v_i64m1_m(__VA_ARGS__)

#define	vsuxseg3ei64_v_i64m2(...) __riscv_vsuxseg3ei64_v_i64m2(__VA_ARGS__)

#define	vsuxseg3ei64_v_i64m2_m(...) __riscv_vsuxseg3ei64_v_i64m2_m(__VA_ARGS__)

#define	vsuxseg3ei64_v_i8m1(...) __riscv_vsuxseg3ei64_v_i8m1(__VA_ARGS__)

#define	vsuxseg3ei64_v_i8m1_m(...) __riscv_vsuxseg3ei64_v_i8m1_m(__VA_ARGS__)

#define	vsuxseg3ei64_v_i8mf2(...) __riscv_vsuxseg3ei64_v_i8mf2(__VA_ARGS__)

#define	vsuxseg3ei64_v_i8mf2_m(...) __riscv_vsuxseg3ei64_v_i8mf2_m(__VA_ARGS__)

#define	vsuxseg3ei64_v_i8mf4(...) __riscv_vsuxseg3ei64_v_i8mf4(__VA_ARGS__)

#define	vsuxseg3ei64_v_i8mf4_m(...) __riscv_vsuxseg3ei64_v_i8mf4_m(__VA_ARGS__)

#define	vsuxseg3ei64_v_i8mf8(...) __riscv_vsuxseg3ei64_v_i8mf8(__VA_ARGS__)

#define	vsuxseg3ei64_v_i8mf8_m(...) __riscv_vsuxseg3ei64_v_i8mf8_m(__VA_ARGS__)

#define	vsuxseg3ei64_v_u16m1(...) __riscv_vsuxseg3ei64_v_u16m1(__VA_ARGS__)

#define	vsuxseg3ei64_v_u16m1_m(...) __riscv_vsuxseg3ei64_v_u16m1_m(__VA_ARGS__)

#define	vsuxseg3ei64_v_u16m2(...) __riscv_vsuxseg3ei64_v_u16m2(__VA_ARGS__)

#define	vsuxseg3ei64_v_u16m2_m(...) __riscv_vsuxseg3ei64_v_u16m2_m(__VA_ARGS__)

#define	vsuxseg3ei64_v_u16mf2(...) __riscv_vsuxseg3ei64_v_u16mf2(__VA_ARGS__)

#define	vsuxseg3ei64_v_u16mf2_m(...) __riscv_vsuxseg3ei64_v_u16mf2_m(__VA_ARGS__)

#define	vsuxseg3ei64_v_u16mf4(...) __riscv_vsuxseg3ei64_v_u16mf4(__VA_ARGS__)

#define	vsuxseg3ei64_v_u16mf4_m(...) __riscv_vsuxseg3ei64_v_u16mf4_m(__VA_ARGS__)

#define	vsuxseg3ei64_v_u32m1(...) __riscv_vsuxseg3ei64_v_u32m1(__VA_ARGS__)

#define	vsuxseg3ei64_v_u32m1_m(...) __riscv_vsuxseg3ei64_v_u32m1_m(__VA_ARGS__)

#define	vsuxseg3ei64_v_u32m2(...) __riscv_vsuxseg3ei64_v_u32m2(__VA_ARGS__)

#define	vsuxseg3ei64_v_u32m2_m(...) __riscv_vsuxseg3ei64_v_u32m2_m(__VA_ARGS__)

#define	vsuxseg3ei64_v_u32mf2(...) __riscv_vsuxseg3ei64_v_u32mf2(__VA_ARGS__)

#define	vsuxseg3ei64_v_u32mf2_m(...) __riscv_vsuxseg3ei64_v_u32mf2_m(__VA_ARGS__)

#define	vsuxseg3ei64_v_u64m1(...) __riscv_vsuxseg3ei64_v_u64m1(__VA_ARGS__)

#define	vsuxseg3ei64_v_u64m1_m(...) __riscv_vsuxseg3ei64_v_u64m1_m(__VA_ARGS__)

#define	vsuxseg3ei64_v_u64m2(...) __riscv_vsuxseg3ei64_v_u64m2(__VA_ARGS__)

#define	vsuxseg3ei64_v_u64m2_m(...) __riscv_vsuxseg3ei64_v_u64m2_m(__VA_ARGS__)

#define	vsuxseg3ei64_v_u8m1(...) __riscv_vsuxseg3ei64_v_u8m1(__VA_ARGS__)

#define	vsuxseg3ei64_v_u8m1_m(...) __riscv_vsuxseg3ei64_v_u8m1_m(__VA_ARGS__)

#define	vsuxseg3ei64_v_u8mf2(...) __riscv_vsuxseg3ei64_v_u8mf2(__VA_ARGS__)

#define	vsuxseg3ei64_v_u8mf2_m(...) __riscv_vsuxseg3ei64_v_u8mf2_m(__VA_ARGS__)

#define	vsuxseg3ei64_v_u8mf4(...) __riscv_vsuxseg3ei64_v_u8mf4(__VA_ARGS__)

#define	vsuxseg3ei64_v_u8mf4_m(...) __riscv_vsuxseg3ei64_v_u8mf4_m(__VA_ARGS__)

#define	vsuxseg3ei64_v_u8mf8(...) __riscv_vsuxseg3ei64_v_u8mf8(__VA_ARGS__)

#define	vsuxseg3ei64_v_u8mf8_m(...) __riscv_vsuxseg3ei64_v_u8mf8_m(__VA_ARGS__)

#define	vsuxseg3ei8_v_f16m1(...) __riscv_vsuxseg3ei8_v_f16m1(__VA_ARGS__)

#define	vsuxseg3ei8_v_f16m1_m(...) __riscv_vsuxseg3ei8_v_f16m1_m(__VA_ARGS__)

#define	vsuxseg3ei8_v_f16m2(...) __riscv_vsuxseg3ei8_v_f16m2(__VA_ARGS__)

#define	vsuxseg3ei8_v_f16m2_m(...) __riscv_vsuxseg3ei8_v_f16m2_m(__VA_ARGS__)

#define	vsuxseg3ei8_v_f16mf2(...) __riscv_vsuxseg3ei8_v_f16mf2(__VA_ARGS__)

#define	vsuxseg3ei8_v_f16mf2_m(...) __riscv_vsuxseg3ei8_v_f16mf2_m(__VA_ARGS__)

#define	vsuxseg3ei8_v_f16mf4(...) __riscv_vsuxseg3ei8_v_f16mf4(__VA_ARGS__)

#define	vsuxseg3ei8_v_f16mf4_m(...) __riscv_vsuxseg3ei8_v_f16mf4_m(__VA_ARGS__)

#define	vsuxseg3ei8_v_f32m1(...) __riscv_vsuxseg3ei8_v_f32m1(__VA_ARGS__)

#define	vsuxseg3ei8_v_f32m1_m(...) __riscv_vsuxseg3ei8_v_f32m1_m(__VA_ARGS__)

#define	vsuxseg3ei8_v_f32m2(...) __riscv_vsuxseg3ei8_v_f32m2(__VA_ARGS__)

#define	vsuxseg3ei8_v_f32m2_m(...) __riscv_vsuxseg3ei8_v_f32m2_m(__VA_ARGS__)

#define	vsuxseg3ei8_v_f32mf2(...) __riscv_vsuxseg3ei8_v_f32mf2(__VA_ARGS__)

#define	vsuxseg3ei8_v_f32mf2_m(...) __riscv_vsuxseg3ei8_v_f32mf2_m(__VA_ARGS__)

#define	vsuxseg3ei8_v_f64m1(...) __riscv_vsuxseg3ei8_v_f64m1(__VA_ARGS__)

#define	vsuxseg3ei8_v_f64m1_m(...) __riscv_vsuxseg3ei8_v_f64m1_m(__VA_ARGS__)

#define	vsuxseg3ei8_v_f64m2(...) __riscv_vsuxseg3ei8_v_f64m2(__VA_ARGS__)

#define	vsuxseg3ei8_v_f64m2_m(...) __riscv_vsuxseg3ei8_v_f64m2_m(__VA_ARGS__)

#define	vsuxseg3ei8_v_i16m1(...) __riscv_vsuxseg3ei8_v_i16m1(__VA_ARGS__)

#define	vsuxseg3ei8_v_i16m1_m(...) __riscv_vsuxseg3ei8_v_i16m1_m(__VA_ARGS__)

#define	vsuxseg3ei8_v_i16m2(...) __riscv_vsuxseg3ei8_v_i16m2(__VA_ARGS__)

#define	vsuxseg3ei8_v_i16m2_m(...) __riscv_vsuxseg3ei8_v_i16m2_m(__VA_ARGS__)

#define	vsuxseg3ei8_v_i16mf2(...) __riscv_vsuxseg3ei8_v_i16mf2(__VA_ARGS__)

#define	vsuxseg3ei8_v_i16mf2_m(...) __riscv_vsuxseg3ei8_v_i16mf2_m(__VA_ARGS__)

#define	vsuxseg3ei8_v_i16mf4(...) __riscv_vsuxseg3ei8_v_i16mf4(__VA_ARGS__)

#define	vsuxseg3ei8_v_i16mf4_m(...) __riscv_vsuxseg3ei8_v_i16mf4_m(__VA_ARGS__)

#define	vsuxseg3ei8_v_i32m1(...) __riscv_vsuxseg3ei8_v_i32m1(__VA_ARGS__)

#define	vsuxseg3ei8_v_i32m1_m(...) __riscv_vsuxseg3ei8_v_i32m1_m(__VA_ARGS__)

#define	vsuxseg3ei8_v_i32m2(...) __riscv_vsuxseg3ei8_v_i32m2(__VA_ARGS__)

#define	vsuxseg3ei8_v_i32m2_m(...) __riscv_vsuxseg3ei8_v_i32m2_m(__VA_ARGS__)

#define	vsuxseg3ei8_v_i32mf2(...) __riscv_vsuxseg3ei8_v_i32mf2(__VA_ARGS__)

#define	vsuxseg3ei8_v_i32mf2_m(...) __riscv_vsuxseg3ei8_v_i32mf2_m(__VA_ARGS__)

#define	vsuxseg3ei8_v_i64m1(...) __riscv_vsuxseg3ei8_v_i64m1(__VA_ARGS__)

#define	vsuxseg3ei8_v_i64m1_m(...) __riscv_vsuxseg3ei8_v_i64m1_m(__VA_ARGS__)

#define	vsuxseg3ei8_v_i64m2(...) __riscv_vsuxseg3ei8_v_i64m2(__VA_ARGS__)

#define	vsuxseg3ei8_v_i64m2_m(...) __riscv_vsuxseg3ei8_v_i64m2_m(__VA_ARGS__)

#define	vsuxseg3ei8_v_i8m1(...) __riscv_vsuxseg3ei8_v_i8m1(__VA_ARGS__)

#define	vsuxseg3ei8_v_i8m1_m(...) __riscv_vsuxseg3ei8_v_i8m1_m(__VA_ARGS__)

#define	vsuxseg3ei8_v_i8m2(...) __riscv_vsuxseg3ei8_v_i8m2(__VA_ARGS__)

#define	vsuxseg3ei8_v_i8m2_m(...) __riscv_vsuxseg3ei8_v_i8m2_m(__VA_ARGS__)

#define	vsuxseg3ei8_v_i8mf2(...) __riscv_vsuxseg3ei8_v_i8mf2(__VA_ARGS__)

#define	vsuxseg3ei8_v_i8mf2_m(...) __riscv_vsuxseg3ei8_v_i8mf2_m(__VA_ARGS__)

#define	vsuxseg3ei8_v_i8mf4(...) __riscv_vsuxseg3ei8_v_i8mf4(__VA_ARGS__)

#define	vsuxseg3ei8_v_i8mf4_m(...) __riscv_vsuxseg3ei8_v_i8mf4_m(__VA_ARGS__)

#define	vsuxseg3ei8_v_i8mf8(...) __riscv_vsuxseg3ei8_v_i8mf8(__VA_ARGS__)

#define	vsuxseg3ei8_v_i8mf8_m(...) __riscv_vsuxseg3ei8_v_i8mf8_m(__VA_ARGS__)

#define	vsuxseg3ei8_v_u16m1(...) __riscv_vsuxseg3ei8_v_u16m1(__VA_ARGS__)

#define	vsuxseg3ei8_v_u16m1_m(...) __riscv_vsuxseg3ei8_v_u16m1_m(__VA_ARGS__)

#define	vsuxseg3ei8_v_u16m2(...) __riscv_vsuxseg3ei8_v_u16m2(__VA_ARGS__)

#define	vsuxseg3ei8_v_u16m2_m(...) __riscv_vsuxseg3ei8_v_u16m2_m(__VA_ARGS__)

#define	vsuxseg3ei8_v_u16mf2(...) __riscv_vsuxseg3ei8_v_u16mf2(__VA_ARGS__)

#define	vsuxseg3ei8_v_u16mf2_m(...) __riscv_vsuxseg3ei8_v_u16mf2_m(__VA_ARGS__)

#define	vsuxseg3ei8_v_u16mf4(...) __riscv_vsuxseg3ei8_v_u16mf4(__VA_ARGS__)

#define	vsuxseg3ei8_v_u16mf4_m(...) __riscv_vsuxseg3ei8_v_u16mf4_m(__VA_ARGS__)

#define	vsuxseg3ei8_v_u32m1(...) __riscv_vsuxseg3ei8_v_u32m1(__VA_ARGS__)

#define	vsuxseg3ei8_v_u32m1_m(...) __riscv_vsuxseg3ei8_v_u32m1_m(__VA_ARGS__)

#define	vsuxseg3ei8_v_u32m2(...) __riscv_vsuxseg3ei8_v_u32m2(__VA_ARGS__)

#define	vsuxseg3ei8_v_u32m2_m(...) __riscv_vsuxseg3ei8_v_u32m2_m(__VA_ARGS__)

#define	vsuxseg3ei8_v_u32mf2(...) __riscv_vsuxseg3ei8_v_u32mf2(__VA_ARGS__)

#define	vsuxseg3ei8_v_u32mf2_m(...) __riscv_vsuxseg3ei8_v_u32mf2_m(__VA_ARGS__)

#define	vsuxseg3ei8_v_u64m1(...) __riscv_vsuxseg3ei8_v_u64m1(__VA_ARGS__)

#define	vsuxseg3ei8_v_u64m1_m(...) __riscv_vsuxseg3ei8_v_u64m1_m(__VA_ARGS__)

#define	vsuxseg3ei8_v_u64m2(...) __riscv_vsuxseg3ei8_v_u64m2(__VA_ARGS__)

#define	vsuxseg3ei8_v_u64m2_m(...) __riscv_vsuxseg3ei8_v_u64m2_m(__VA_ARGS__)

#define	vsuxseg3ei8_v_u8m1(...) __riscv_vsuxseg3ei8_v_u8m1(__VA_ARGS__)

#define	vsuxseg3ei8_v_u8m1_m(...) __riscv_vsuxseg3ei8_v_u8m1_m(__VA_ARGS__)

#define	vsuxseg3ei8_v_u8m2(...) __riscv_vsuxseg3ei8_v_u8m2(__VA_ARGS__)

#define	vsuxseg3ei8_v_u8m2_m(...) __riscv_vsuxseg3ei8_v_u8m2_m(__VA_ARGS__)

#define	vsuxseg3ei8_v_u8mf2(...) __riscv_vsuxseg3ei8_v_u8mf2(__VA_ARGS__)

#define	vsuxseg3ei8_v_u8mf2_m(...) __riscv_vsuxseg3ei8_v_u8mf2_m(__VA_ARGS__)

#define	vsuxseg3ei8_v_u8mf4(...) __riscv_vsuxseg3ei8_v_u8mf4(__VA_ARGS__)

#define	vsuxseg3ei8_v_u8mf4_m(...) __riscv_vsuxseg3ei8_v_u8mf4_m(__VA_ARGS__)

#define	vsuxseg3ei8_v_u8mf8(...) __riscv_vsuxseg3ei8_v_u8mf8(__VA_ARGS__)

#define	vsuxseg3ei8_v_u8mf8_m(...) __riscv_vsuxseg3ei8_v_u8mf8_m(__VA_ARGS__)

#define	vsuxseg4ei16_v_f16m1(...) __riscv_vsuxseg4ei16_v_f16m1(__VA_ARGS__)

#define	vsuxseg4ei16_v_f16m1_m(...) __riscv_vsuxseg4ei16_v_f16m1_m(__VA_ARGS__)

#define	vsuxseg4ei16_v_f16m2(...) __riscv_vsuxseg4ei16_v_f16m2(__VA_ARGS__)

#define	vsuxseg4ei16_v_f16m2_m(...) __riscv_vsuxseg4ei16_v_f16m2_m(__VA_ARGS__)

#define	vsuxseg4ei16_v_f16mf2(...) __riscv_vsuxseg4ei16_v_f16mf2(__VA_ARGS__)

#define	vsuxseg4ei16_v_f16mf2_m(...) __riscv_vsuxseg4ei16_v_f16mf2_m(__VA_ARGS__)

#define	vsuxseg4ei16_v_f16mf4(...) __riscv_vsuxseg4ei16_v_f16mf4(__VA_ARGS__)

#define	vsuxseg4ei16_v_f16mf4_m(...) __riscv_vsuxseg4ei16_v_f16mf4_m(__VA_ARGS__)

#define	vsuxseg4ei16_v_f32m1(...) __riscv_vsuxseg4ei16_v_f32m1(__VA_ARGS__)

#define	vsuxseg4ei16_v_f32m1_m(...) __riscv_vsuxseg4ei16_v_f32m1_m(__VA_ARGS__)

#define	vsuxseg4ei16_v_f32m2(...) __riscv_vsuxseg4ei16_v_f32m2(__VA_ARGS__)

#define	vsuxseg4ei16_v_f32m2_m(...) __riscv_vsuxseg4ei16_v_f32m2_m(__VA_ARGS__)

#define	vsuxseg4ei16_v_f32mf2(...) __riscv_vsuxseg4ei16_v_f32mf2(__VA_ARGS__)

#define	vsuxseg4ei16_v_f32mf2_m(...) __riscv_vsuxseg4ei16_v_f32mf2_m(__VA_ARGS__)

#define	vsuxseg4ei16_v_f64m1(...) __riscv_vsuxseg4ei16_v_f64m1(__VA_ARGS__)

#define	vsuxseg4ei16_v_f64m1_m(...) __riscv_vsuxseg4ei16_v_f64m1_m(__VA_ARGS__)

#define	vsuxseg4ei16_v_f64m2(...) __riscv_vsuxseg4ei16_v_f64m2(__VA_ARGS__)

#define	vsuxseg4ei16_v_f64m2_m(...) __riscv_vsuxseg4ei16_v_f64m2_m(__VA_ARGS__)

#define	vsuxseg4ei16_v_i16m1(...) __riscv_vsuxseg4ei16_v_i16m1(__VA_ARGS__)

#define	vsuxseg4ei16_v_i16m1_m(...) __riscv_vsuxseg4ei16_v_i16m1_m(__VA_ARGS__)

#define	vsuxseg4ei16_v_i16m2(...) __riscv_vsuxseg4ei16_v_i16m2(__VA_ARGS__)

#define	vsuxseg4ei16_v_i16m2_m(...) __riscv_vsuxseg4ei16_v_i16m2_m(__VA_ARGS__)

#define	vsuxseg4ei16_v_i16mf2(...) __riscv_vsuxseg4ei16_v_i16mf2(__VA_ARGS__)

#define	vsuxseg4ei16_v_i16mf2_m(...) __riscv_vsuxseg4ei16_v_i16mf2_m(__VA_ARGS__)

#define	vsuxseg4ei16_v_i16mf4(...) __riscv_vsuxseg4ei16_v_i16mf4(__VA_ARGS__)

#define	vsuxseg4ei16_v_i16mf4_m(...) __riscv_vsuxseg4ei16_v_i16mf4_m(__VA_ARGS__)

#define	vsuxseg4ei16_v_i32m1(...) __riscv_vsuxseg4ei16_v_i32m1(__VA_ARGS__)

#define	vsuxseg4ei16_v_i32m1_m(...) __riscv_vsuxseg4ei16_v_i32m1_m(__VA_ARGS__)

#define	vsuxseg4ei16_v_i32m2(...) __riscv_vsuxseg4ei16_v_i32m2(__VA_ARGS__)

#define	vsuxseg4ei16_v_i32m2_m(...) __riscv_vsuxseg4ei16_v_i32m2_m(__VA_ARGS__)

#define	vsuxseg4ei16_v_i32mf2(...) __riscv_vsuxseg4ei16_v_i32mf2(__VA_ARGS__)

#define	vsuxseg4ei16_v_i32mf2_m(...) __riscv_vsuxseg4ei16_v_i32mf2_m(__VA_ARGS__)

#define	vsuxseg4ei16_v_i64m1(...) __riscv_vsuxseg4ei16_v_i64m1(__VA_ARGS__)

#define	vsuxseg4ei16_v_i64m1_m(...) __riscv_vsuxseg4ei16_v_i64m1_m(__VA_ARGS__)

#define	vsuxseg4ei16_v_i64m2(...) __riscv_vsuxseg4ei16_v_i64m2(__VA_ARGS__)

#define	vsuxseg4ei16_v_i64m2_m(...) __riscv_vsuxseg4ei16_v_i64m2_m(__VA_ARGS__)

#define	vsuxseg4ei16_v_i8m1(...) __riscv_vsuxseg4ei16_v_i8m1(__VA_ARGS__)

#define	vsuxseg4ei16_v_i8m1_m(...) __riscv_vsuxseg4ei16_v_i8m1_m(__VA_ARGS__)

#define	vsuxseg4ei16_v_i8m2(...) __riscv_vsuxseg4ei16_v_i8m2(__VA_ARGS__)

#define	vsuxseg4ei16_v_i8m2_m(...) __riscv_vsuxseg4ei16_v_i8m2_m(__VA_ARGS__)

#define	vsuxseg4ei16_v_i8mf2(...) __riscv_vsuxseg4ei16_v_i8mf2(__VA_ARGS__)

#define	vsuxseg4ei16_v_i8mf2_m(...) __riscv_vsuxseg4ei16_v_i8mf2_m(__VA_ARGS__)

#define	vsuxseg4ei16_v_i8mf4(...) __riscv_vsuxseg4ei16_v_i8mf4(__VA_ARGS__)

#define	vsuxseg4ei16_v_i8mf4_m(...) __riscv_vsuxseg4ei16_v_i8mf4_m(__VA_ARGS__)

#define	vsuxseg4ei16_v_i8mf8(...) __riscv_vsuxseg4ei16_v_i8mf8(__VA_ARGS__)

#define	vsuxseg4ei16_v_i8mf8_m(...) __riscv_vsuxseg4ei16_v_i8mf8_m(__VA_ARGS__)

#define	vsuxseg4ei16_v_u16m1(...) __riscv_vsuxseg4ei16_v_u16m1(__VA_ARGS__)

#define	vsuxseg4ei16_v_u16m1_m(...) __riscv_vsuxseg4ei16_v_u16m1_m(__VA_ARGS__)

#define	vsuxseg4ei16_v_u16m2(...) __riscv_vsuxseg4ei16_v_u16m2(__VA_ARGS__)

#define	vsuxseg4ei16_v_u16m2_m(...) __riscv_vsuxseg4ei16_v_u16m2_m(__VA_ARGS__)

#define	vsuxseg4ei16_v_u16mf2(...) __riscv_vsuxseg4ei16_v_u16mf2(__VA_ARGS__)

#define	vsuxseg4ei16_v_u16mf2_m(...) __riscv_vsuxseg4ei16_v_u16mf2_m(__VA_ARGS__)

#define	vsuxseg4ei16_v_u16mf4(...) __riscv_vsuxseg4ei16_v_u16mf4(__VA_ARGS__)

#define	vsuxseg4ei16_v_u16mf4_m(...) __riscv_vsuxseg4ei16_v_u16mf4_m(__VA_ARGS__)

#define	vsuxseg4ei16_v_u32m1(...) __riscv_vsuxseg4ei16_v_u32m1(__VA_ARGS__)

#define	vsuxseg4ei16_v_u32m1_m(...) __riscv_vsuxseg4ei16_v_u32m1_m(__VA_ARGS__)

#define	vsuxseg4ei16_v_u32m2(...) __riscv_vsuxseg4ei16_v_u32m2(__VA_ARGS__)

#define	vsuxseg4ei16_v_u32m2_m(...) __riscv_vsuxseg4ei16_v_u32m2_m(__VA_ARGS__)

#define	vsuxseg4ei16_v_u32mf2(...) __riscv_vsuxseg4ei16_v_u32mf2(__VA_ARGS__)

#define	vsuxseg4ei16_v_u32mf2_m(...) __riscv_vsuxseg4ei16_v_u32mf2_m(__VA_ARGS__)

#define	vsuxseg4ei16_v_u64m1(...) __riscv_vsuxseg4ei16_v_u64m1(__VA_ARGS__)

#define	vsuxseg4ei16_v_u64m1_m(...) __riscv_vsuxseg4ei16_v_u64m1_m(__VA_ARGS__)

#define	vsuxseg4ei16_v_u64m2(...) __riscv_vsuxseg4ei16_v_u64m2(__VA_ARGS__)

#define	vsuxseg4ei16_v_u64m2_m(...) __riscv_vsuxseg4ei16_v_u64m2_m(__VA_ARGS__)

#define	vsuxseg4ei16_v_u8m1(...) __riscv_vsuxseg4ei16_v_u8m1(__VA_ARGS__)

#define	vsuxseg4ei16_v_u8m1_m(...) __riscv_vsuxseg4ei16_v_u8m1_m(__VA_ARGS__)

#define	vsuxseg4ei16_v_u8m2(...) __riscv_vsuxseg4ei16_v_u8m2(__VA_ARGS__)

#define	vsuxseg4ei16_v_u8m2_m(...) __riscv_vsuxseg4ei16_v_u8m2_m(__VA_ARGS__)

#define	vsuxseg4ei16_v_u8mf2(...) __riscv_vsuxseg4ei16_v_u8mf2(__VA_ARGS__)

#define	vsuxseg4ei16_v_u8mf2_m(...) __riscv_vsuxseg4ei16_v_u8mf2_m(__VA_ARGS__)

#define	vsuxseg4ei16_v_u8mf4(...) __riscv_vsuxseg4ei16_v_u8mf4(__VA_ARGS__)

#define	vsuxseg4ei16_v_u8mf4_m(...) __riscv_vsuxseg4ei16_v_u8mf4_m(__VA_ARGS__)

#define	vsuxseg4ei16_v_u8mf8(...) __riscv_vsuxseg4ei16_v_u8mf8(__VA_ARGS__)

#define	vsuxseg4ei16_v_u8mf8_m(...) __riscv_vsuxseg4ei16_v_u8mf8_m(__VA_ARGS__)

#define	vsuxseg4ei32_v_f16m1(...) __riscv_vsuxseg4ei32_v_f16m1(__VA_ARGS__)

#define	vsuxseg4ei32_v_f16m1_m(...) __riscv_vsuxseg4ei32_v_f16m1_m(__VA_ARGS__)

#define	vsuxseg4ei32_v_f16m2(...) __riscv_vsuxseg4ei32_v_f16m2(__VA_ARGS__)

#define	vsuxseg4ei32_v_f16m2_m(...) __riscv_vsuxseg4ei32_v_f16m2_m(__VA_ARGS__)

#define	vsuxseg4ei32_v_f16mf2(...) __riscv_vsuxseg4ei32_v_f16mf2(__VA_ARGS__)

#define	vsuxseg4ei32_v_f16mf2_m(...) __riscv_vsuxseg4ei32_v_f16mf2_m(__VA_ARGS__)

#define	vsuxseg4ei32_v_f16mf4(...) __riscv_vsuxseg4ei32_v_f16mf4(__VA_ARGS__)

#define	vsuxseg4ei32_v_f16mf4_m(...) __riscv_vsuxseg4ei32_v_f16mf4_m(__VA_ARGS__)

#define	vsuxseg4ei32_v_f32m1(...) __riscv_vsuxseg4ei32_v_f32m1(__VA_ARGS__)

#define	vsuxseg4ei32_v_f32m1_m(...) __riscv_vsuxseg4ei32_v_f32m1_m(__VA_ARGS__)

#define	vsuxseg4ei32_v_f32m2(...) __riscv_vsuxseg4ei32_v_f32m2(__VA_ARGS__)

#define	vsuxseg4ei32_v_f32m2_m(...) __riscv_vsuxseg4ei32_v_f32m2_m(__VA_ARGS__)

#define	vsuxseg4ei32_v_f32mf2(...) __riscv_vsuxseg4ei32_v_f32mf2(__VA_ARGS__)

#define	vsuxseg4ei32_v_f32mf2_m(...) __riscv_vsuxseg4ei32_v_f32mf2_m(__VA_ARGS__)

#define	vsuxseg4ei32_v_f64m1(...) __riscv_vsuxseg4ei32_v_f64m1(__VA_ARGS__)

#define	vsuxseg4ei32_v_f64m1_m(...) __riscv_vsuxseg4ei32_v_f64m1_m(__VA_ARGS__)

#define	vsuxseg4ei32_v_f64m2(...) __riscv_vsuxseg4ei32_v_f64m2(__VA_ARGS__)

#define	vsuxseg4ei32_v_f64m2_m(...) __riscv_vsuxseg4ei32_v_f64m2_m(__VA_ARGS__)

#define	vsuxseg4ei32_v_i16m1(...) __riscv_vsuxseg4ei32_v_i16m1(__VA_ARGS__)

#define	vsuxseg4ei32_v_i16m1_m(...) __riscv_vsuxseg4ei32_v_i16m1_m(__VA_ARGS__)

#define	vsuxseg4ei32_v_i16m2(...) __riscv_vsuxseg4ei32_v_i16m2(__VA_ARGS__)

#define	vsuxseg4ei32_v_i16m2_m(...) __riscv_vsuxseg4ei32_v_i16m2_m(__VA_ARGS__)

#define	vsuxseg4ei32_v_i16mf2(...) __riscv_vsuxseg4ei32_v_i16mf2(__VA_ARGS__)

#define	vsuxseg4ei32_v_i16mf2_m(...) __riscv_vsuxseg4ei32_v_i16mf2_m(__VA_ARGS__)

#define	vsuxseg4ei32_v_i16mf4(...) __riscv_vsuxseg4ei32_v_i16mf4(__VA_ARGS__)

#define	vsuxseg4ei32_v_i16mf4_m(...) __riscv_vsuxseg4ei32_v_i16mf4_m(__VA_ARGS__)

#define	vsuxseg4ei32_v_i32m1(...) __riscv_vsuxseg4ei32_v_i32m1(__VA_ARGS__)

#define	vsuxseg4ei32_v_i32m1_m(...) __riscv_vsuxseg4ei32_v_i32m1_m(__VA_ARGS__)

#define	vsuxseg4ei32_v_i32m2(...) __riscv_vsuxseg4ei32_v_i32m2(__VA_ARGS__)

#define	vsuxseg4ei32_v_i32m2_m(...) __riscv_vsuxseg4ei32_v_i32m2_m(__VA_ARGS__)

#define	vsuxseg4ei32_v_i32mf2(...) __riscv_vsuxseg4ei32_v_i32mf2(__VA_ARGS__)

#define	vsuxseg4ei32_v_i32mf2_m(...) __riscv_vsuxseg4ei32_v_i32mf2_m(__VA_ARGS__)

#define	vsuxseg4ei32_v_i64m1(...) __riscv_vsuxseg4ei32_v_i64m1(__VA_ARGS__)

#define	vsuxseg4ei32_v_i64m1_m(...) __riscv_vsuxseg4ei32_v_i64m1_m(__VA_ARGS__)

#define	vsuxseg4ei32_v_i64m2(...) __riscv_vsuxseg4ei32_v_i64m2(__VA_ARGS__)

#define	vsuxseg4ei32_v_i64m2_m(...) __riscv_vsuxseg4ei32_v_i64m2_m(__VA_ARGS__)

#define	vsuxseg4ei32_v_i8m1(...) __riscv_vsuxseg4ei32_v_i8m1(__VA_ARGS__)

#define	vsuxseg4ei32_v_i8m1_m(...) __riscv_vsuxseg4ei32_v_i8m1_m(__VA_ARGS__)

#define	vsuxseg4ei32_v_i8m2(...) __riscv_vsuxseg4ei32_v_i8m2(__VA_ARGS__)

#define	vsuxseg4ei32_v_i8m2_m(...) __riscv_vsuxseg4ei32_v_i8m2_m(__VA_ARGS__)

#define	vsuxseg4ei32_v_i8mf2(...) __riscv_vsuxseg4ei32_v_i8mf2(__VA_ARGS__)

#define	vsuxseg4ei32_v_i8mf2_m(...) __riscv_vsuxseg4ei32_v_i8mf2_m(__VA_ARGS__)

#define	vsuxseg4ei32_v_i8mf4(...) __riscv_vsuxseg4ei32_v_i8mf4(__VA_ARGS__)

#define	vsuxseg4ei32_v_i8mf4_m(...) __riscv_vsuxseg4ei32_v_i8mf4_m(__VA_ARGS__)

#define	vsuxseg4ei32_v_i8mf8(...) __riscv_vsuxseg4ei32_v_i8mf8(__VA_ARGS__)

#define	vsuxseg4ei32_v_i8mf8_m(...) __riscv_vsuxseg4ei32_v_i8mf8_m(__VA_ARGS__)

#define	vsuxseg4ei32_v_u16m1(...) __riscv_vsuxseg4ei32_v_u16m1(__VA_ARGS__)

#define	vsuxseg4ei32_v_u16m1_m(...) __riscv_vsuxseg4ei32_v_u16m1_m(__VA_ARGS__)

#define	vsuxseg4ei32_v_u16m2(...) __riscv_vsuxseg4ei32_v_u16m2(__VA_ARGS__)

#define	vsuxseg4ei32_v_u16m2_m(...) __riscv_vsuxseg4ei32_v_u16m2_m(__VA_ARGS__)

#define	vsuxseg4ei32_v_u16mf2(...) __riscv_vsuxseg4ei32_v_u16mf2(__VA_ARGS__)

#define	vsuxseg4ei32_v_u16mf2_m(...) __riscv_vsuxseg4ei32_v_u16mf2_m(__VA_ARGS__)

#define	vsuxseg4ei32_v_u16mf4(...) __riscv_vsuxseg4ei32_v_u16mf4(__VA_ARGS__)

#define	vsuxseg4ei32_v_u16mf4_m(...) __riscv_vsuxseg4ei32_v_u16mf4_m(__VA_ARGS__)

#define	vsuxseg4ei32_v_u32m1(...) __riscv_vsuxseg4ei32_v_u32m1(__VA_ARGS__)

#define	vsuxseg4ei32_v_u32m1_m(...) __riscv_vsuxseg4ei32_v_u32m1_m(__VA_ARGS__)

#define	vsuxseg4ei32_v_u32m2(...) __riscv_vsuxseg4ei32_v_u32m2(__VA_ARGS__)

#define	vsuxseg4ei32_v_u32m2_m(...) __riscv_vsuxseg4ei32_v_u32m2_m(__VA_ARGS__)

#define	vsuxseg4ei32_v_u32mf2(...) __riscv_vsuxseg4ei32_v_u32mf2(__VA_ARGS__)

#define	vsuxseg4ei32_v_u32mf2_m(...) __riscv_vsuxseg4ei32_v_u32mf2_m(__VA_ARGS__)

#define	vsuxseg4ei32_v_u64m1(...) __riscv_vsuxseg4ei32_v_u64m1(__VA_ARGS__)

#define	vsuxseg4ei32_v_u64m1_m(...) __riscv_vsuxseg4ei32_v_u64m1_m(__VA_ARGS__)

#define	vsuxseg4ei32_v_u64m2(...) __riscv_vsuxseg4ei32_v_u64m2(__VA_ARGS__)

#define	vsuxseg4ei32_v_u64m2_m(...) __riscv_vsuxseg4ei32_v_u64m2_m(__VA_ARGS__)

#define	vsuxseg4ei32_v_u8m1(...) __riscv_vsuxseg4ei32_v_u8m1(__VA_ARGS__)

#define	vsuxseg4ei32_v_u8m1_m(...) __riscv_vsuxseg4ei32_v_u8m1_m(__VA_ARGS__)

#define	vsuxseg4ei32_v_u8m2(...) __riscv_vsuxseg4ei32_v_u8m2(__VA_ARGS__)

#define	vsuxseg4ei32_v_u8m2_m(...) __riscv_vsuxseg4ei32_v_u8m2_m(__VA_ARGS__)

#define	vsuxseg4ei32_v_u8mf2(...) __riscv_vsuxseg4ei32_v_u8mf2(__VA_ARGS__)

#define	vsuxseg4ei32_v_u8mf2_m(...) __riscv_vsuxseg4ei32_v_u8mf2_m(__VA_ARGS__)

#define	vsuxseg4ei32_v_u8mf4(...) __riscv_vsuxseg4ei32_v_u8mf4(__VA_ARGS__)

#define	vsuxseg4ei32_v_u8mf4_m(...) __riscv_vsuxseg4ei32_v_u8mf4_m(__VA_ARGS__)

#define	vsuxseg4ei32_v_u8mf8(...) __riscv_vsuxseg4ei32_v_u8mf8(__VA_ARGS__)

#define	vsuxseg4ei32_v_u8mf8_m(...) __riscv_vsuxseg4ei32_v_u8mf8_m(__VA_ARGS__)

#define	vsuxseg4ei64_v_f16m1(...) __riscv_vsuxseg4ei64_v_f16m1(__VA_ARGS__)

#define	vsuxseg4ei64_v_f16m1_m(...) __riscv_vsuxseg4ei64_v_f16m1_m(__VA_ARGS__)

#define	vsuxseg4ei64_v_f16m2(...) __riscv_vsuxseg4ei64_v_f16m2(__VA_ARGS__)

#define	vsuxseg4ei64_v_f16m2_m(...) __riscv_vsuxseg4ei64_v_f16m2_m(__VA_ARGS__)

#define	vsuxseg4ei64_v_f16mf2(...) __riscv_vsuxseg4ei64_v_f16mf2(__VA_ARGS__)

#define	vsuxseg4ei64_v_f16mf2_m(...) __riscv_vsuxseg4ei64_v_f16mf2_m(__VA_ARGS__)

#define	vsuxseg4ei64_v_f16mf4(...) __riscv_vsuxseg4ei64_v_f16mf4(__VA_ARGS__)

#define	vsuxseg4ei64_v_f16mf4_m(...) __riscv_vsuxseg4ei64_v_f16mf4_m(__VA_ARGS__)

#define	vsuxseg4ei64_v_f32m1(...) __riscv_vsuxseg4ei64_v_f32m1(__VA_ARGS__)

#define	vsuxseg4ei64_v_f32m1_m(...) __riscv_vsuxseg4ei64_v_f32m1_m(__VA_ARGS__)

#define	vsuxseg4ei64_v_f32m2(...) __riscv_vsuxseg4ei64_v_f32m2(__VA_ARGS__)

#define	vsuxseg4ei64_v_f32m2_m(...) __riscv_vsuxseg4ei64_v_f32m2_m(__VA_ARGS__)

#define	vsuxseg4ei64_v_f32mf2(...) __riscv_vsuxseg4ei64_v_f32mf2(__VA_ARGS__)

#define	vsuxseg4ei64_v_f32mf2_m(...) __riscv_vsuxseg4ei64_v_f32mf2_m(__VA_ARGS__)

#define	vsuxseg4ei64_v_f64m1(...) __riscv_vsuxseg4ei64_v_f64m1(__VA_ARGS__)

#define	vsuxseg4ei64_v_f64m1_m(...) __riscv_vsuxseg4ei64_v_f64m1_m(__VA_ARGS__)

#define	vsuxseg4ei64_v_f64m2(...) __riscv_vsuxseg4ei64_v_f64m2(__VA_ARGS__)

#define	vsuxseg4ei64_v_f64m2_m(...) __riscv_vsuxseg4ei64_v_f64m2_m(__VA_ARGS__)

#define	vsuxseg4ei64_v_i16m1(...) __riscv_vsuxseg4ei64_v_i16m1(__VA_ARGS__)

#define	vsuxseg4ei64_v_i16m1_m(...) __riscv_vsuxseg4ei64_v_i16m1_m(__VA_ARGS__)

#define	vsuxseg4ei64_v_i16m2(...) __riscv_vsuxseg4ei64_v_i16m2(__VA_ARGS__)

#define	vsuxseg4ei64_v_i16m2_m(...) __riscv_vsuxseg4ei64_v_i16m2_m(__VA_ARGS__)

#define	vsuxseg4ei64_v_i16mf2(...) __riscv_vsuxseg4ei64_v_i16mf2(__VA_ARGS__)

#define	vsuxseg4ei64_v_i16mf2_m(...) __riscv_vsuxseg4ei64_v_i16mf2_m(__VA_ARGS__)

#define	vsuxseg4ei64_v_i16mf4(...) __riscv_vsuxseg4ei64_v_i16mf4(__VA_ARGS__)

#define	vsuxseg4ei64_v_i16mf4_m(...) __riscv_vsuxseg4ei64_v_i16mf4_m(__VA_ARGS__)

#define	vsuxseg4ei64_v_i32m1(...) __riscv_vsuxseg4ei64_v_i32m1(__VA_ARGS__)

#define	vsuxseg4ei64_v_i32m1_m(...) __riscv_vsuxseg4ei64_v_i32m1_m(__VA_ARGS__)

#define	vsuxseg4ei64_v_i32m2(...) __riscv_vsuxseg4ei64_v_i32m2(__VA_ARGS__)

#define	vsuxseg4ei64_v_i32m2_m(...) __riscv_vsuxseg4ei64_v_i32m2_m(__VA_ARGS__)

#define	vsuxseg4ei64_v_i32mf2(...) __riscv_vsuxseg4ei64_v_i32mf2(__VA_ARGS__)

#define	vsuxseg4ei64_v_i32mf2_m(...) __riscv_vsuxseg4ei64_v_i32mf2_m(__VA_ARGS__)

#define	vsuxseg4ei64_v_i64m1(...) __riscv_vsuxseg4ei64_v_i64m1(__VA_ARGS__)

#define	vsuxseg4ei64_v_i64m1_m(...) __riscv_vsuxseg4ei64_v_i64m1_m(__VA_ARGS__)

#define	vsuxseg4ei64_v_i64m2(...) __riscv_vsuxseg4ei64_v_i64m2(__VA_ARGS__)

#define	vsuxseg4ei64_v_i64m2_m(...) __riscv_vsuxseg4ei64_v_i64m2_m(__VA_ARGS__)

#define	vsuxseg4ei64_v_i8m1(...) __riscv_vsuxseg4ei64_v_i8m1(__VA_ARGS__)

#define	vsuxseg4ei64_v_i8m1_m(...) __riscv_vsuxseg4ei64_v_i8m1_m(__VA_ARGS__)

#define	vsuxseg4ei64_v_i8mf2(...) __riscv_vsuxseg4ei64_v_i8mf2(__VA_ARGS__)

#define	vsuxseg4ei64_v_i8mf2_m(...) __riscv_vsuxseg4ei64_v_i8mf2_m(__VA_ARGS__)

#define	vsuxseg4ei64_v_i8mf4(...) __riscv_vsuxseg4ei64_v_i8mf4(__VA_ARGS__)

#define	vsuxseg4ei64_v_i8mf4_m(...) __riscv_vsuxseg4ei64_v_i8mf4_m(__VA_ARGS__)

#define	vsuxseg4ei64_v_i8mf8(...) __riscv_vsuxseg4ei64_v_i8mf8(__VA_ARGS__)

#define	vsuxseg4ei64_v_i8mf8_m(...) __riscv_vsuxseg4ei64_v_i8mf8_m(__VA_ARGS__)

#define	vsuxseg4ei64_v_u16m1(...) __riscv_vsuxseg4ei64_v_u16m1(__VA_ARGS__)

#define	vsuxseg4ei64_v_u16m1_m(...) __riscv_vsuxseg4ei64_v_u16m1_m(__VA_ARGS__)

#define	vsuxseg4ei64_v_u16m2(...) __riscv_vsuxseg4ei64_v_u16m2(__VA_ARGS__)

#define	vsuxseg4ei64_v_u16m2_m(...) __riscv_vsuxseg4ei64_v_u16m2_m(__VA_ARGS__)

#define	vsuxseg4ei64_v_u16mf2(...) __riscv_vsuxseg4ei64_v_u16mf2(__VA_ARGS__)

#define	vsuxseg4ei64_v_u16mf2_m(...) __riscv_vsuxseg4ei64_v_u16mf2_m(__VA_ARGS__)

#define	vsuxseg4ei64_v_u16mf4(...) __riscv_vsuxseg4ei64_v_u16mf4(__VA_ARGS__)

#define	vsuxseg4ei64_v_u16mf4_m(...) __riscv_vsuxseg4ei64_v_u16mf4_m(__VA_ARGS__)

#define	vsuxseg4ei64_v_u32m1(...) __riscv_vsuxseg4ei64_v_u32m1(__VA_ARGS__)

#define	vsuxseg4ei64_v_u32m1_m(...) __riscv_vsuxseg4ei64_v_u32m1_m(__VA_ARGS__)

#define	vsuxseg4ei64_v_u32m2(...) __riscv_vsuxseg4ei64_v_u32m2(__VA_ARGS__)

#define	vsuxseg4ei64_v_u32m2_m(...) __riscv_vsuxseg4ei64_v_u32m2_m(__VA_ARGS__)

#define	vsuxseg4ei64_v_u32mf2(...) __riscv_vsuxseg4ei64_v_u32mf2(__VA_ARGS__)

#define	vsuxseg4ei64_v_u32mf2_m(...) __riscv_vsuxseg4ei64_v_u32mf2_m(__VA_ARGS__)

#define	vsuxseg4ei64_v_u64m1(...) __riscv_vsuxseg4ei64_v_u64m1(__VA_ARGS__)

#define	vsuxseg4ei64_v_u64m1_m(...) __riscv_vsuxseg4ei64_v_u64m1_m(__VA_ARGS__)

#define	vsuxseg4ei64_v_u64m2(...) __riscv_vsuxseg4ei64_v_u64m2(__VA_ARGS__)

#define	vsuxseg4ei64_v_u64m2_m(...) __riscv_vsuxseg4ei64_v_u64m2_m(__VA_ARGS__)

#define	vsuxseg4ei64_v_u8m1(...) __riscv_vsuxseg4ei64_v_u8m1(__VA_ARGS__)

#define	vsuxseg4ei64_v_u8m1_m(...) __riscv_vsuxseg4ei64_v_u8m1_m(__VA_ARGS__)

#define	vsuxseg4ei64_v_u8mf2(...) __riscv_vsuxseg4ei64_v_u8mf2(__VA_ARGS__)

#define	vsuxseg4ei64_v_u8mf2_m(...) __riscv_vsuxseg4ei64_v_u8mf2_m(__VA_ARGS__)

#define	vsuxseg4ei64_v_u8mf4(...) __riscv_vsuxseg4ei64_v_u8mf4(__VA_ARGS__)

#define	vsuxseg4ei64_v_u8mf4_m(...) __riscv_vsuxseg4ei64_v_u8mf4_m(__VA_ARGS__)

#define	vsuxseg4ei64_v_u8mf8(...) __riscv_vsuxseg4ei64_v_u8mf8(__VA_ARGS__)

#define	vsuxseg4ei64_v_u8mf8_m(...) __riscv_vsuxseg4ei64_v_u8mf8_m(__VA_ARGS__)

#define	vsuxseg4ei8_v_f16m1(...) __riscv_vsuxseg4ei8_v_f16m1(__VA_ARGS__)

#define	vsuxseg4ei8_v_f16m1_m(...) __riscv_vsuxseg4ei8_v_f16m1_m(__VA_ARGS__)

#define	vsuxseg4ei8_v_f16m2(...) __riscv_vsuxseg4ei8_v_f16m2(__VA_ARGS__)

#define	vsuxseg4ei8_v_f16m2_m(...) __riscv_vsuxseg4ei8_v_f16m2_m(__VA_ARGS__)

#define	vsuxseg4ei8_v_f16mf2(...) __riscv_vsuxseg4ei8_v_f16mf2(__VA_ARGS__)

#define	vsuxseg4ei8_v_f16mf2_m(...) __riscv_vsuxseg4ei8_v_f16mf2_m(__VA_ARGS__)

#define	vsuxseg4ei8_v_f16mf4(...) __riscv_vsuxseg4ei8_v_f16mf4(__VA_ARGS__)

#define	vsuxseg4ei8_v_f16mf4_m(...) __riscv_vsuxseg4ei8_v_f16mf4_m(__VA_ARGS__)

#define	vsuxseg4ei8_v_f32m1(...) __riscv_vsuxseg4ei8_v_f32m1(__VA_ARGS__)

#define	vsuxseg4ei8_v_f32m1_m(...) __riscv_vsuxseg4ei8_v_f32m1_m(__VA_ARGS__)

#define	vsuxseg4ei8_v_f32m2(...) __riscv_vsuxseg4ei8_v_f32m2(__VA_ARGS__)

#define	vsuxseg4ei8_v_f32m2_m(...) __riscv_vsuxseg4ei8_v_f32m2_m(__VA_ARGS__)

#define	vsuxseg4ei8_v_f32mf2(...) __riscv_vsuxseg4ei8_v_f32mf2(__VA_ARGS__)

#define	vsuxseg4ei8_v_f32mf2_m(...) __riscv_vsuxseg4ei8_v_f32mf2_m(__VA_ARGS__)

#define	vsuxseg4ei8_v_f64m1(...) __riscv_vsuxseg4ei8_v_f64m1(__VA_ARGS__)

#define	vsuxseg4ei8_v_f64m1_m(...) __riscv_vsuxseg4ei8_v_f64m1_m(__VA_ARGS__)

#define	vsuxseg4ei8_v_f64m2(...) __riscv_vsuxseg4ei8_v_f64m2(__VA_ARGS__)

#define	vsuxseg4ei8_v_f64m2_m(...) __riscv_vsuxseg4ei8_v_f64m2_m(__VA_ARGS__)

#define	vsuxseg4ei8_v_i16m1(...) __riscv_vsuxseg4ei8_v_i16m1(__VA_ARGS__)

#define	vsuxseg4ei8_v_i16m1_m(...) __riscv_vsuxseg4ei8_v_i16m1_m(__VA_ARGS__)

#define	vsuxseg4ei8_v_i16m2(...) __riscv_vsuxseg4ei8_v_i16m2(__VA_ARGS__)

#define	vsuxseg4ei8_v_i16m2_m(...) __riscv_vsuxseg4ei8_v_i16m2_m(__VA_ARGS__)

#define	vsuxseg4ei8_v_i16mf2(...) __riscv_vsuxseg4ei8_v_i16mf2(__VA_ARGS__)

#define	vsuxseg4ei8_v_i16mf2_m(...) __riscv_vsuxseg4ei8_v_i16mf2_m(__VA_ARGS__)

#define	vsuxseg4ei8_v_i16mf4(...) __riscv_vsuxseg4ei8_v_i16mf4(__VA_ARGS__)

#define	vsuxseg4ei8_v_i16mf4_m(...) __riscv_vsuxseg4ei8_v_i16mf4_m(__VA_ARGS__)

#define	vsuxseg4ei8_v_i32m1(...) __riscv_vsuxseg4ei8_v_i32m1(__VA_ARGS__)

#define	vsuxseg4ei8_v_i32m1_m(...) __riscv_vsuxseg4ei8_v_i32m1_m(__VA_ARGS__)

#define	vsuxseg4ei8_v_i32m2(...) __riscv_vsuxseg4ei8_v_i32m2(__VA_ARGS__)

#define	vsuxseg4ei8_v_i32m2_m(...) __riscv_vsuxseg4ei8_v_i32m2_m(__VA_ARGS__)

#define	vsuxseg4ei8_v_i32mf2(...) __riscv_vsuxseg4ei8_v_i32mf2(__VA_ARGS__)

#define	vsuxseg4ei8_v_i32mf2_m(...) __riscv_vsuxseg4ei8_v_i32mf2_m(__VA_ARGS__)

#define	vsuxseg4ei8_v_i64m1(...) __riscv_vsuxseg4ei8_v_i64m1(__VA_ARGS__)

#define	vsuxseg4ei8_v_i64m1_m(...) __riscv_vsuxseg4ei8_v_i64m1_m(__VA_ARGS__)

#define	vsuxseg4ei8_v_i64m2(...) __riscv_vsuxseg4ei8_v_i64m2(__VA_ARGS__)

#define	vsuxseg4ei8_v_i64m2_m(...) __riscv_vsuxseg4ei8_v_i64m2_m(__VA_ARGS__)

#define	vsuxseg4ei8_v_i8m1(...) __riscv_vsuxseg4ei8_v_i8m1(__VA_ARGS__)

#define	vsuxseg4ei8_v_i8m1_m(...) __riscv_vsuxseg4ei8_v_i8m1_m(__VA_ARGS__)

#define	vsuxseg4ei8_v_i8m2(...) __riscv_vsuxseg4ei8_v_i8m2(__VA_ARGS__)

#define	vsuxseg4ei8_v_i8m2_m(...) __riscv_vsuxseg4ei8_v_i8m2_m(__VA_ARGS__)

#define	vsuxseg4ei8_v_i8mf2(...) __riscv_vsuxseg4ei8_v_i8mf2(__VA_ARGS__)

#define	vsuxseg4ei8_v_i8mf2_m(...) __riscv_vsuxseg4ei8_v_i8mf2_m(__VA_ARGS__)

#define	vsuxseg4ei8_v_i8mf4(...) __riscv_vsuxseg4ei8_v_i8mf4(__VA_ARGS__)

#define	vsuxseg4ei8_v_i8mf4_m(...) __riscv_vsuxseg4ei8_v_i8mf4_m(__VA_ARGS__)

#define	vsuxseg4ei8_v_i8mf8(...) __riscv_vsuxseg4ei8_v_i8mf8(__VA_ARGS__)

#define	vsuxseg4ei8_v_i8mf8_m(...) __riscv_vsuxseg4ei8_v_i8mf8_m(__VA_ARGS__)

#define	vsuxseg4ei8_v_u16m1(...) __riscv_vsuxseg4ei8_v_u16m1(__VA_ARGS__)

#define	vsuxseg4ei8_v_u16m1_m(...) __riscv_vsuxseg4ei8_v_u16m1_m(__VA_ARGS__)

#define	vsuxseg4ei8_v_u16m2(...) __riscv_vsuxseg4ei8_v_u16m2(__VA_ARGS__)

#define	vsuxseg4ei8_v_u16m2_m(...) __riscv_vsuxseg4ei8_v_u16m2_m(__VA_ARGS__)

#define	vsuxseg4ei8_v_u16mf2(...) __riscv_vsuxseg4ei8_v_u16mf2(__VA_ARGS__)

#define	vsuxseg4ei8_v_u16mf2_m(...) __riscv_vsuxseg4ei8_v_u16mf2_m(__VA_ARGS__)

#define	vsuxseg4ei8_v_u16mf4(...) __riscv_vsuxseg4ei8_v_u16mf4(__VA_ARGS__)

#define	vsuxseg4ei8_v_u16mf4_m(...) __riscv_vsuxseg4ei8_v_u16mf4_m(__VA_ARGS__)

#define	vsuxseg4ei8_v_u32m1(...) __riscv_vsuxseg4ei8_v_u32m1(__VA_ARGS__)

#define	vsuxseg4ei8_v_u32m1_m(...) __riscv_vsuxseg4ei8_v_u32m1_m(__VA_ARGS__)

#define	vsuxseg4ei8_v_u32m2(...) __riscv_vsuxseg4ei8_v_u32m2(__VA_ARGS__)

#define	vsuxseg4ei8_v_u32m2_m(...) __riscv_vsuxseg4ei8_v_u32m2_m(__VA_ARGS__)

#define	vsuxseg4ei8_v_u32mf2(...) __riscv_vsuxseg4ei8_v_u32mf2(__VA_ARGS__)

#define	vsuxseg4ei8_v_u32mf2_m(...) __riscv_vsuxseg4ei8_v_u32mf2_m(__VA_ARGS__)

#define	vsuxseg4ei8_v_u64m1(...) __riscv_vsuxseg4ei8_v_u64m1(__VA_ARGS__)

#define	vsuxseg4ei8_v_u64m1_m(...) __riscv_vsuxseg4ei8_v_u64m1_m(__VA_ARGS__)

#define	vsuxseg4ei8_v_u64m2(...) __riscv_vsuxseg4ei8_v_u64m2(__VA_ARGS__)

#define	vsuxseg4ei8_v_u64m2_m(...) __riscv_vsuxseg4ei8_v_u64m2_m(__VA_ARGS__)

#define	vsuxseg4ei8_v_u8m1(...) __riscv_vsuxseg4ei8_v_u8m1(__VA_ARGS__)

#define	vsuxseg4ei8_v_u8m1_m(...) __riscv_vsuxseg4ei8_v_u8m1_m(__VA_ARGS__)

#define	vsuxseg4ei8_v_u8m2(...) __riscv_vsuxseg4ei8_v_u8m2(__VA_ARGS__)

#define	vsuxseg4ei8_v_u8m2_m(...) __riscv_vsuxseg4ei8_v_u8m2_m(__VA_ARGS__)

#define	vsuxseg4ei8_v_u8mf2(...) __riscv_vsuxseg4ei8_v_u8mf2(__VA_ARGS__)

#define	vsuxseg4ei8_v_u8mf2_m(...) __riscv_vsuxseg4ei8_v_u8mf2_m(__VA_ARGS__)

#define	vsuxseg4ei8_v_u8mf4(...) __riscv_vsuxseg4ei8_v_u8mf4(__VA_ARGS__)

#define	vsuxseg4ei8_v_u8mf4_m(...) __riscv_vsuxseg4ei8_v_u8mf4_m(__VA_ARGS__)

#define	vsuxseg4ei8_v_u8mf8(...) __riscv_vsuxseg4ei8_v_u8mf8(__VA_ARGS__)

#define	vsuxseg4ei8_v_u8mf8_m(...) __riscv_vsuxseg4ei8_v_u8mf8_m(__VA_ARGS__)

#define	vsuxseg5ei16_v_f16m1(...) __riscv_vsuxseg5ei16_v_f16m1(__VA_ARGS__)

#define	vsuxseg5ei16_v_f16m1_m(...) __riscv_vsuxseg5ei16_v_f16m1_m(__VA_ARGS__)

#define	vsuxseg5ei16_v_f16mf2(...) __riscv_vsuxseg5ei16_v_f16mf2(__VA_ARGS__)

#define	vsuxseg5ei16_v_f16mf2_m(...) __riscv_vsuxseg5ei16_v_f16mf2_m(__VA_ARGS__)

#define	vsuxseg5ei16_v_f16mf4(...) __riscv_vsuxseg5ei16_v_f16mf4(__VA_ARGS__)

#define	vsuxseg5ei16_v_f16mf4_m(...) __riscv_vsuxseg5ei16_v_f16mf4_m(__VA_ARGS__)

#define	vsuxseg5ei16_v_f32m1(...) __riscv_vsuxseg5ei16_v_f32m1(__VA_ARGS__)

#define	vsuxseg5ei16_v_f32m1_m(...) __riscv_vsuxseg5ei16_v_f32m1_m(__VA_ARGS__)

#define	vsuxseg5ei16_v_f32mf2(...) __riscv_vsuxseg5ei16_v_f32mf2(__VA_ARGS__)

#define	vsuxseg5ei16_v_f32mf2_m(...) __riscv_vsuxseg5ei16_v_f32mf2_m(__VA_ARGS__)

#define	vsuxseg5ei16_v_f64m1(...) __riscv_vsuxseg5ei16_v_f64m1(__VA_ARGS__)

#define	vsuxseg5ei16_v_f64m1_m(...) __riscv_vsuxseg5ei16_v_f64m1_m(__VA_ARGS__)

#define	vsuxseg5ei16_v_i16m1(...) __riscv_vsuxseg5ei16_v_i16m1(__VA_ARGS__)

#define	vsuxseg5ei16_v_i16m1_m(...) __riscv_vsuxseg5ei16_v_i16m1_m(__VA_ARGS__)

#define	vsuxseg5ei16_v_i16mf2(...) __riscv_vsuxseg5ei16_v_i16mf2(__VA_ARGS__)

#define	vsuxseg5ei16_v_i16mf2_m(...) __riscv_vsuxseg5ei16_v_i16mf2_m(__VA_ARGS__)

#define	vsuxseg5ei16_v_i16mf4(...) __riscv_vsuxseg5ei16_v_i16mf4(__VA_ARGS__)

#define	vsuxseg5ei16_v_i16mf4_m(...) __riscv_vsuxseg5ei16_v_i16mf4_m(__VA_ARGS__)

#define	vsuxseg5ei16_v_i32m1(...) __riscv_vsuxseg5ei16_v_i32m1(__VA_ARGS__)

#define	vsuxseg5ei16_v_i32m1_m(...) __riscv_vsuxseg5ei16_v_i32m1_m(__VA_ARGS__)

#define	vsuxseg5ei16_v_i32mf2(...) __riscv_vsuxseg5ei16_v_i32mf2(__VA_ARGS__)

#define	vsuxseg5ei16_v_i32mf2_m(...) __riscv_vsuxseg5ei16_v_i32mf2_m(__VA_ARGS__)

#define	vsuxseg5ei16_v_i64m1(...) __riscv_vsuxseg5ei16_v_i64m1(__VA_ARGS__)

#define	vsuxseg5ei16_v_i64m1_m(...) __riscv_vsuxseg5ei16_v_i64m1_m(__VA_ARGS__)

#define	vsuxseg5ei16_v_i8m1(...) __riscv_vsuxseg5ei16_v_i8m1(__VA_ARGS__)

#define	vsuxseg5ei16_v_i8m1_m(...) __riscv_vsuxseg5ei16_v_i8m1_m(__VA_ARGS__)

#define	vsuxseg5ei16_v_i8mf2(...) __riscv_vsuxseg5ei16_v_i8mf2(__VA_ARGS__)

#define	vsuxseg5ei16_v_i8mf2_m(...) __riscv_vsuxseg5ei16_v_i8mf2_m(__VA_ARGS__)

#define	vsuxseg5ei16_v_i8mf4(...) __riscv_vsuxseg5ei16_v_i8mf4(__VA_ARGS__)

#define	vsuxseg5ei16_v_i8mf4_m(...) __riscv_vsuxseg5ei16_v_i8mf4_m(__VA_ARGS__)

#define	vsuxseg5ei16_v_i8mf8(...) __riscv_vsuxseg5ei16_v_i8mf8(__VA_ARGS__)

#define	vsuxseg5ei16_v_i8mf8_m(...) __riscv_vsuxseg5ei16_v_i8mf8_m(__VA_ARGS__)

#define	vsuxseg5ei16_v_u16m1(...) __riscv_vsuxseg5ei16_v_u16m1(__VA_ARGS__)

#define	vsuxseg5ei16_v_u16m1_m(...) __riscv_vsuxseg5ei16_v_u16m1_m(__VA_ARGS__)

#define	vsuxseg5ei16_v_u16mf2(...) __riscv_vsuxseg5ei16_v_u16mf2(__VA_ARGS__)

#define	vsuxseg5ei16_v_u16mf2_m(...) __riscv_vsuxseg5ei16_v_u16mf2_m(__VA_ARGS__)

#define	vsuxseg5ei16_v_u16mf4(...) __riscv_vsuxseg5ei16_v_u16mf4(__VA_ARGS__)

#define	vsuxseg5ei16_v_u16mf4_m(...) __riscv_vsuxseg5ei16_v_u16mf4_m(__VA_ARGS__)

#define	vsuxseg5ei16_v_u32m1(...) __riscv_vsuxseg5ei16_v_u32m1(__VA_ARGS__)

#define	vsuxseg5ei16_v_u32m1_m(...) __riscv_vsuxseg5ei16_v_u32m1_m(__VA_ARGS__)

#define	vsuxseg5ei16_v_u32mf2(...) __riscv_vsuxseg5ei16_v_u32mf2(__VA_ARGS__)

#define	vsuxseg5ei16_v_u32mf2_m(...) __riscv_vsuxseg5ei16_v_u32mf2_m(__VA_ARGS__)

#define	vsuxseg5ei16_v_u64m1(...) __riscv_vsuxseg5ei16_v_u64m1(__VA_ARGS__)

#define	vsuxseg5ei16_v_u64m1_m(...) __riscv_vsuxseg5ei16_v_u64m1_m(__VA_ARGS__)

#define	vsuxseg5ei16_v_u8m1(...) __riscv_vsuxseg5ei16_v_u8m1(__VA_ARGS__)

#define	vsuxseg5ei16_v_u8m1_m(...) __riscv_vsuxseg5ei16_v_u8m1_m(__VA_ARGS__)

#define	vsuxseg5ei16_v_u8mf2(...) __riscv_vsuxseg5ei16_v_u8mf2(__VA_ARGS__)

#define	vsuxseg5ei16_v_u8mf2_m(...) __riscv_vsuxseg5ei16_v_u8mf2_m(__VA_ARGS__)

#define	vsuxseg5ei16_v_u8mf4(...) __riscv_vsuxseg5ei16_v_u8mf4(__VA_ARGS__)

#define	vsuxseg5ei16_v_u8mf4_m(...) __riscv_vsuxseg5ei16_v_u8mf4_m(__VA_ARGS__)

#define	vsuxseg5ei16_v_u8mf8(...) __riscv_vsuxseg5ei16_v_u8mf8(__VA_ARGS__)

#define	vsuxseg5ei16_v_u8mf8_m(...) __riscv_vsuxseg5ei16_v_u8mf8_m(__VA_ARGS__)

#define	vsuxseg5ei32_v_f16m1(...) __riscv_vsuxseg5ei32_v_f16m1(__VA_ARGS__)

#define	vsuxseg5ei32_v_f16m1_m(...) __riscv_vsuxseg5ei32_v_f16m1_m(__VA_ARGS__)

#define	vsuxseg5ei32_v_f16mf2(...) __riscv_vsuxseg5ei32_v_f16mf2(__VA_ARGS__)

#define	vsuxseg5ei32_v_f16mf2_m(...) __riscv_vsuxseg5ei32_v_f16mf2_m(__VA_ARGS__)

#define	vsuxseg5ei32_v_f16mf4(...) __riscv_vsuxseg5ei32_v_f16mf4(__VA_ARGS__)

#define	vsuxseg5ei32_v_f16mf4_m(...) __riscv_vsuxseg5ei32_v_f16mf4_m(__VA_ARGS__)

#define	vsuxseg5ei32_v_f32m1(...) __riscv_vsuxseg5ei32_v_f32m1(__VA_ARGS__)

#define	vsuxseg5ei32_v_f32m1_m(...) __riscv_vsuxseg5ei32_v_f32m1_m(__VA_ARGS__)

#define	vsuxseg5ei32_v_f32mf2(...) __riscv_vsuxseg5ei32_v_f32mf2(__VA_ARGS__)

#define	vsuxseg5ei32_v_f32mf2_m(...) __riscv_vsuxseg5ei32_v_f32mf2_m(__VA_ARGS__)

#define	vsuxseg5ei32_v_f64m1(...) __riscv_vsuxseg5ei32_v_f64m1(__VA_ARGS__)

#define	vsuxseg5ei32_v_f64m1_m(...) __riscv_vsuxseg5ei32_v_f64m1_m(__VA_ARGS__)

#define	vsuxseg5ei32_v_i16m1(...) __riscv_vsuxseg5ei32_v_i16m1(__VA_ARGS__)

#define	vsuxseg5ei32_v_i16m1_m(...) __riscv_vsuxseg5ei32_v_i16m1_m(__VA_ARGS__)

#define	vsuxseg5ei32_v_i16mf2(...) __riscv_vsuxseg5ei32_v_i16mf2(__VA_ARGS__)

#define	vsuxseg5ei32_v_i16mf2_m(...) __riscv_vsuxseg5ei32_v_i16mf2_m(__VA_ARGS__)

#define	vsuxseg5ei32_v_i16mf4(...) __riscv_vsuxseg5ei32_v_i16mf4(__VA_ARGS__)

#define	vsuxseg5ei32_v_i16mf4_m(...) __riscv_vsuxseg5ei32_v_i16mf4_m(__VA_ARGS__)

#define	vsuxseg5ei32_v_i32m1(...) __riscv_vsuxseg5ei32_v_i32m1(__VA_ARGS__)

#define	vsuxseg5ei32_v_i32m1_m(...) __riscv_vsuxseg5ei32_v_i32m1_m(__VA_ARGS__)

#define	vsuxseg5ei32_v_i32mf2(...) __riscv_vsuxseg5ei32_v_i32mf2(__VA_ARGS__)

#define	vsuxseg5ei32_v_i32mf2_m(...) __riscv_vsuxseg5ei32_v_i32mf2_m(__VA_ARGS__)

#define	vsuxseg5ei32_v_i64m1(...) __riscv_vsuxseg5ei32_v_i64m1(__VA_ARGS__)

#define	vsuxseg5ei32_v_i64m1_m(...) __riscv_vsuxseg5ei32_v_i64m1_m(__VA_ARGS__)

#define	vsuxseg5ei32_v_i8m1(...) __riscv_vsuxseg5ei32_v_i8m1(__VA_ARGS__)

#define	vsuxseg5ei32_v_i8m1_m(...) __riscv_vsuxseg5ei32_v_i8m1_m(__VA_ARGS__)

#define	vsuxseg5ei32_v_i8mf2(...) __riscv_vsuxseg5ei32_v_i8mf2(__VA_ARGS__)

#define	vsuxseg5ei32_v_i8mf2_m(...) __riscv_vsuxseg5ei32_v_i8mf2_m(__VA_ARGS__)

#define	vsuxseg5ei32_v_i8mf4(...) __riscv_vsuxseg5ei32_v_i8mf4(__VA_ARGS__)

#define	vsuxseg5ei32_v_i8mf4_m(...) __riscv_vsuxseg5ei32_v_i8mf4_m(__VA_ARGS__)

#define	vsuxseg5ei32_v_i8mf8(...) __riscv_vsuxseg5ei32_v_i8mf8(__VA_ARGS__)

#define	vsuxseg5ei32_v_i8mf8_m(...) __riscv_vsuxseg5ei32_v_i8mf8_m(__VA_ARGS__)

#define	vsuxseg5ei32_v_u16m1(...) __riscv_vsuxseg5ei32_v_u16m1(__VA_ARGS__)

#define	vsuxseg5ei32_v_u16m1_m(...) __riscv_vsuxseg5ei32_v_u16m1_m(__VA_ARGS__)

#define	vsuxseg5ei32_v_u16mf2(...) __riscv_vsuxseg5ei32_v_u16mf2(__VA_ARGS__)

#define	vsuxseg5ei32_v_u16mf2_m(...) __riscv_vsuxseg5ei32_v_u16mf2_m(__VA_ARGS__)

#define	vsuxseg5ei32_v_u16mf4(...) __riscv_vsuxseg5ei32_v_u16mf4(__VA_ARGS__)

#define	vsuxseg5ei32_v_u16mf4_m(...) __riscv_vsuxseg5ei32_v_u16mf4_m(__VA_ARGS__)

#define	vsuxseg5ei32_v_u32m1(...) __riscv_vsuxseg5ei32_v_u32m1(__VA_ARGS__)

#define	vsuxseg5ei32_v_u32m1_m(...) __riscv_vsuxseg5ei32_v_u32m1_m(__VA_ARGS__)

#define	vsuxseg5ei32_v_u32mf2(...) __riscv_vsuxseg5ei32_v_u32mf2(__VA_ARGS__)

#define	vsuxseg5ei32_v_u32mf2_m(...) __riscv_vsuxseg5ei32_v_u32mf2_m(__VA_ARGS__)

#define	vsuxseg5ei32_v_u64m1(...) __riscv_vsuxseg5ei32_v_u64m1(__VA_ARGS__)

#define	vsuxseg5ei32_v_u64m1_m(...) __riscv_vsuxseg5ei32_v_u64m1_m(__VA_ARGS__)

#define	vsuxseg5ei32_v_u8m1(...) __riscv_vsuxseg5ei32_v_u8m1(__VA_ARGS__)

#define	vsuxseg5ei32_v_u8m1_m(...) __riscv_vsuxseg5ei32_v_u8m1_m(__VA_ARGS__)

#define	vsuxseg5ei32_v_u8mf2(...) __riscv_vsuxseg5ei32_v_u8mf2(__VA_ARGS__)

#define	vsuxseg5ei32_v_u8mf2_m(...) __riscv_vsuxseg5ei32_v_u8mf2_m(__VA_ARGS__)

#define	vsuxseg5ei32_v_u8mf4(...) __riscv_vsuxseg5ei32_v_u8mf4(__VA_ARGS__)

#define	vsuxseg5ei32_v_u8mf4_m(...) __riscv_vsuxseg5ei32_v_u8mf4_m(__VA_ARGS__)

#define	vsuxseg5ei32_v_u8mf8(...) __riscv_vsuxseg5ei32_v_u8mf8(__VA_ARGS__)

#define	vsuxseg5ei32_v_u8mf8_m(...) __riscv_vsuxseg5ei32_v_u8mf8_m(__VA_ARGS__)

#define	vsuxseg5ei64_v_f16m1(...) __riscv_vsuxseg5ei64_v_f16m1(__VA_ARGS__)

#define	vsuxseg5ei64_v_f16m1_m(...) __riscv_vsuxseg5ei64_v_f16m1_m(__VA_ARGS__)

#define	vsuxseg5ei64_v_f16mf2(...) __riscv_vsuxseg5ei64_v_f16mf2(__VA_ARGS__)

#define	vsuxseg5ei64_v_f16mf2_m(...) __riscv_vsuxseg5ei64_v_f16mf2_m(__VA_ARGS__)

#define	vsuxseg5ei64_v_f16mf4(...) __riscv_vsuxseg5ei64_v_f16mf4(__VA_ARGS__)

#define	vsuxseg5ei64_v_f16mf4_m(...) __riscv_vsuxseg5ei64_v_f16mf4_m(__VA_ARGS__)

#define	vsuxseg5ei64_v_f32m1(...) __riscv_vsuxseg5ei64_v_f32m1(__VA_ARGS__)

#define	vsuxseg5ei64_v_f32m1_m(...) __riscv_vsuxseg5ei64_v_f32m1_m(__VA_ARGS__)

#define	vsuxseg5ei64_v_f32mf2(...) __riscv_vsuxseg5ei64_v_f32mf2(__VA_ARGS__)

#define	vsuxseg5ei64_v_f32mf2_m(...) __riscv_vsuxseg5ei64_v_f32mf2_m(__VA_ARGS__)

#define	vsuxseg5ei64_v_f64m1(...) __riscv_vsuxseg5ei64_v_f64m1(__VA_ARGS__)

#define	vsuxseg5ei64_v_f64m1_m(...) __riscv_vsuxseg5ei64_v_f64m1_m(__VA_ARGS__)

#define	vsuxseg5ei64_v_i16m1(...) __riscv_vsuxseg5ei64_v_i16m1(__VA_ARGS__)

#define	vsuxseg5ei64_v_i16m1_m(...) __riscv_vsuxseg5ei64_v_i16m1_m(__VA_ARGS__)

#define	vsuxseg5ei64_v_i16mf2(...) __riscv_vsuxseg5ei64_v_i16mf2(__VA_ARGS__)

#define	vsuxseg5ei64_v_i16mf2_m(...) __riscv_vsuxseg5ei64_v_i16mf2_m(__VA_ARGS__)

#define	vsuxseg5ei64_v_i16mf4(...) __riscv_vsuxseg5ei64_v_i16mf4(__VA_ARGS__)

#define	vsuxseg5ei64_v_i16mf4_m(...) __riscv_vsuxseg5ei64_v_i16mf4_m(__VA_ARGS__)

#define	vsuxseg5ei64_v_i32m1(...) __riscv_vsuxseg5ei64_v_i32m1(__VA_ARGS__)

#define	vsuxseg5ei64_v_i32m1_m(...) __riscv_vsuxseg5ei64_v_i32m1_m(__VA_ARGS__)

#define	vsuxseg5ei64_v_i32mf2(...) __riscv_vsuxseg5ei64_v_i32mf2(__VA_ARGS__)

#define	vsuxseg5ei64_v_i32mf2_m(...) __riscv_vsuxseg5ei64_v_i32mf2_m(__VA_ARGS__)

#define	vsuxseg5ei64_v_i64m1(...) __riscv_vsuxseg5ei64_v_i64m1(__VA_ARGS__)

#define	vsuxseg5ei64_v_i64m1_m(...) __riscv_vsuxseg5ei64_v_i64m1_m(__VA_ARGS__)

#define	vsuxseg5ei64_v_i8m1(...) __riscv_vsuxseg5ei64_v_i8m1(__VA_ARGS__)

#define	vsuxseg5ei64_v_i8m1_m(...) __riscv_vsuxseg5ei64_v_i8m1_m(__VA_ARGS__)

#define	vsuxseg5ei64_v_i8mf2(...) __riscv_vsuxseg5ei64_v_i8mf2(__VA_ARGS__)

#define	vsuxseg5ei64_v_i8mf2_m(...) __riscv_vsuxseg5ei64_v_i8mf2_m(__VA_ARGS__)

#define	vsuxseg5ei64_v_i8mf4(...) __riscv_vsuxseg5ei64_v_i8mf4(__VA_ARGS__)

#define	vsuxseg5ei64_v_i8mf4_m(...) __riscv_vsuxseg5ei64_v_i8mf4_m(__VA_ARGS__)

#define	vsuxseg5ei64_v_i8mf8(...) __riscv_vsuxseg5ei64_v_i8mf8(__VA_ARGS__)

#define	vsuxseg5ei64_v_i8mf8_m(...) __riscv_vsuxseg5ei64_v_i8mf8_m(__VA_ARGS__)

#define	vsuxseg5ei64_v_u16m1(...) __riscv_vsuxseg5ei64_v_u16m1(__VA_ARGS__)

#define	vsuxseg5ei64_v_u16m1_m(...) __riscv_vsuxseg5ei64_v_u16m1_m(__VA_ARGS__)

#define	vsuxseg5ei64_v_u16mf2(...) __riscv_vsuxseg5ei64_v_u16mf2(__VA_ARGS__)

#define	vsuxseg5ei64_v_u16mf2_m(...) __riscv_vsuxseg5ei64_v_u16mf2_m(__VA_ARGS__)

#define	vsuxseg5ei64_v_u16mf4(...) __riscv_vsuxseg5ei64_v_u16mf4(__VA_ARGS__)

#define	vsuxseg5ei64_v_u16mf4_m(...) __riscv_vsuxseg5ei64_v_u16mf4_m(__VA_ARGS__)

#define	vsuxseg5ei64_v_u32m1(...) __riscv_vsuxseg5ei64_v_u32m1(__VA_ARGS__)

#define	vsuxseg5ei64_v_u32m1_m(...) __riscv_vsuxseg5ei64_v_u32m1_m(__VA_ARGS__)

#define	vsuxseg5ei64_v_u32mf2(...) __riscv_vsuxseg5ei64_v_u32mf2(__VA_ARGS__)

#define	vsuxseg5ei64_v_u32mf2_m(...) __riscv_vsuxseg5ei64_v_u32mf2_m(__VA_ARGS__)

#define	vsuxseg5ei64_v_u64m1(...) __riscv_vsuxseg5ei64_v_u64m1(__VA_ARGS__)

#define	vsuxseg5ei64_v_u64m1_m(...) __riscv_vsuxseg5ei64_v_u64m1_m(__VA_ARGS__)

#define	vsuxseg5ei64_v_u8m1(...) __riscv_vsuxseg5ei64_v_u8m1(__VA_ARGS__)

#define	vsuxseg5ei64_v_u8m1_m(...) __riscv_vsuxseg5ei64_v_u8m1_m(__VA_ARGS__)

#define	vsuxseg5ei64_v_u8mf2(...) __riscv_vsuxseg5ei64_v_u8mf2(__VA_ARGS__)

#define	vsuxseg5ei64_v_u8mf2_m(...) __riscv_vsuxseg5ei64_v_u8mf2_m(__VA_ARGS__)

#define	vsuxseg5ei64_v_u8mf4(...) __riscv_vsuxseg5ei64_v_u8mf4(__VA_ARGS__)

#define	vsuxseg5ei64_v_u8mf4_m(...) __riscv_vsuxseg5ei64_v_u8mf4_m(__VA_ARGS__)

#define	vsuxseg5ei64_v_u8mf8(...) __riscv_vsuxseg5ei64_v_u8mf8(__VA_ARGS__)

#define	vsuxseg5ei64_v_u8mf8_m(...) __riscv_vsuxseg5ei64_v_u8mf8_m(__VA_ARGS__)

#define	vsuxseg5ei8_v_f16m1(...) __riscv_vsuxseg5ei8_v_f16m1(__VA_ARGS__)

#define	vsuxseg5ei8_v_f16m1_m(...) __riscv_vsuxseg5ei8_v_f16m1_m(__VA_ARGS__)

#define	vsuxseg5ei8_v_f16mf2(...) __riscv_vsuxseg5ei8_v_f16mf2(__VA_ARGS__)

#define	vsuxseg5ei8_v_f16mf2_m(...) __riscv_vsuxseg5ei8_v_f16mf2_m(__VA_ARGS__)

#define	vsuxseg5ei8_v_f16mf4(...) __riscv_vsuxseg5ei8_v_f16mf4(__VA_ARGS__)

#define	vsuxseg5ei8_v_f16mf4_m(...) __riscv_vsuxseg5ei8_v_f16mf4_m(__VA_ARGS__)

#define	vsuxseg5ei8_v_f32m1(...) __riscv_vsuxseg5ei8_v_f32m1(__VA_ARGS__)

#define	vsuxseg5ei8_v_f32m1_m(...) __riscv_vsuxseg5ei8_v_f32m1_m(__VA_ARGS__)

#define	vsuxseg5ei8_v_f32mf2(...) __riscv_vsuxseg5ei8_v_f32mf2(__VA_ARGS__)

#define	vsuxseg5ei8_v_f32mf2_m(...) __riscv_vsuxseg5ei8_v_f32mf2_m(__VA_ARGS__)

#define	vsuxseg5ei8_v_f64m1(...) __riscv_vsuxseg5ei8_v_f64m1(__VA_ARGS__)

#define	vsuxseg5ei8_v_f64m1_m(...) __riscv_vsuxseg5ei8_v_f64m1_m(__VA_ARGS__)

#define	vsuxseg5ei8_v_i16m1(...) __riscv_vsuxseg5ei8_v_i16m1(__VA_ARGS__)

#define	vsuxseg5ei8_v_i16m1_m(...) __riscv_vsuxseg5ei8_v_i16m1_m(__VA_ARGS__)

#define	vsuxseg5ei8_v_i16mf2(...) __riscv_vsuxseg5ei8_v_i16mf2(__VA_ARGS__)

#define	vsuxseg5ei8_v_i16mf2_m(...) __riscv_vsuxseg5ei8_v_i16mf2_m(__VA_ARGS__)

#define	vsuxseg5ei8_v_i16mf4(...) __riscv_vsuxseg5ei8_v_i16mf4(__VA_ARGS__)

#define	vsuxseg5ei8_v_i16mf4_m(...) __riscv_vsuxseg5ei8_v_i16mf4_m(__VA_ARGS__)

#define	vsuxseg5ei8_v_i32m1(...) __riscv_vsuxseg5ei8_v_i32m1(__VA_ARGS__)

#define	vsuxseg5ei8_v_i32m1_m(...) __riscv_vsuxseg5ei8_v_i32m1_m(__VA_ARGS__)

#define	vsuxseg5ei8_v_i32mf2(...) __riscv_vsuxseg5ei8_v_i32mf2(__VA_ARGS__)

#define	vsuxseg5ei8_v_i32mf2_m(...) __riscv_vsuxseg5ei8_v_i32mf2_m(__VA_ARGS__)

#define	vsuxseg5ei8_v_i64m1(...) __riscv_vsuxseg5ei8_v_i64m1(__VA_ARGS__)

#define	vsuxseg5ei8_v_i64m1_m(...) __riscv_vsuxseg5ei8_v_i64m1_m(__VA_ARGS__)

#define	vsuxseg5ei8_v_i8m1(...) __riscv_vsuxseg5ei8_v_i8m1(__VA_ARGS__)

#define	vsuxseg5ei8_v_i8m1_m(...) __riscv_vsuxseg5ei8_v_i8m1_m(__VA_ARGS__)

#define	vsuxseg5ei8_v_i8mf2(...) __riscv_vsuxseg5ei8_v_i8mf2(__VA_ARGS__)

#define	vsuxseg5ei8_v_i8mf2_m(...) __riscv_vsuxseg5ei8_v_i8mf2_m(__VA_ARGS__)

#define	vsuxseg5ei8_v_i8mf4(...) __riscv_vsuxseg5ei8_v_i8mf4(__VA_ARGS__)

#define	vsuxseg5ei8_v_i8mf4_m(...) __riscv_vsuxseg5ei8_v_i8mf4_m(__VA_ARGS__)

#define	vsuxseg5ei8_v_i8mf8(...) __riscv_vsuxseg5ei8_v_i8mf8(__VA_ARGS__)

#define	vsuxseg5ei8_v_i8mf8_m(...) __riscv_vsuxseg5ei8_v_i8mf8_m(__VA_ARGS__)

#define	vsuxseg5ei8_v_u16m1(...) __riscv_vsuxseg5ei8_v_u16m1(__VA_ARGS__)

#define	vsuxseg5ei8_v_u16m1_m(...) __riscv_vsuxseg5ei8_v_u16m1_m(__VA_ARGS__)

#define	vsuxseg5ei8_v_u16mf2(...) __riscv_vsuxseg5ei8_v_u16mf2(__VA_ARGS__)

#define	vsuxseg5ei8_v_u16mf2_m(...) __riscv_vsuxseg5ei8_v_u16mf2_m(__VA_ARGS__)

#define	vsuxseg5ei8_v_u16mf4(...) __riscv_vsuxseg5ei8_v_u16mf4(__VA_ARGS__)

#define	vsuxseg5ei8_v_u16mf4_m(...) __riscv_vsuxseg5ei8_v_u16mf4_m(__VA_ARGS__)

#define	vsuxseg5ei8_v_u32m1(...) __riscv_vsuxseg5ei8_v_u32m1(__VA_ARGS__)

#define	vsuxseg5ei8_v_u32m1_m(...) __riscv_vsuxseg5ei8_v_u32m1_m(__VA_ARGS__)

#define	vsuxseg5ei8_v_u32mf2(...) __riscv_vsuxseg5ei8_v_u32mf2(__VA_ARGS__)

#define	vsuxseg5ei8_v_u32mf2_m(...) __riscv_vsuxseg5ei8_v_u32mf2_m(__VA_ARGS__)

#define	vsuxseg5ei8_v_u64m1(...) __riscv_vsuxseg5ei8_v_u64m1(__VA_ARGS__)

#define	vsuxseg5ei8_v_u64m1_m(...) __riscv_vsuxseg5ei8_v_u64m1_m(__VA_ARGS__)

#define	vsuxseg5ei8_v_u8m1(...) __riscv_vsuxseg5ei8_v_u8m1(__VA_ARGS__)

#define	vsuxseg5ei8_v_u8m1_m(...) __riscv_vsuxseg5ei8_v_u8m1_m(__VA_ARGS__)

#define	vsuxseg5ei8_v_u8mf2(...) __riscv_vsuxseg5ei8_v_u8mf2(__VA_ARGS__)

#define	vsuxseg5ei8_v_u8mf2_m(...) __riscv_vsuxseg5ei8_v_u8mf2_m(__VA_ARGS__)

#define	vsuxseg5ei8_v_u8mf4(...) __riscv_vsuxseg5ei8_v_u8mf4(__VA_ARGS__)

#define	vsuxseg5ei8_v_u8mf4_m(...) __riscv_vsuxseg5ei8_v_u8mf4_m(__VA_ARGS__)

#define	vsuxseg5ei8_v_u8mf8(...) __riscv_vsuxseg5ei8_v_u8mf8(__VA_ARGS__)

#define	vsuxseg5ei8_v_u8mf8_m(...) __riscv_vsuxseg5ei8_v_u8mf8_m(__VA_ARGS__)

#define	vsuxseg6ei16_v_f16m1(...) __riscv_vsuxseg6ei16_v_f16m1(__VA_ARGS__)

#define	vsuxseg6ei16_v_f16m1_m(...) __riscv_vsuxseg6ei16_v_f16m1_m(__VA_ARGS__)

#define	vsuxseg6ei16_v_f16mf2(...) __riscv_vsuxseg6ei16_v_f16mf2(__VA_ARGS__)

#define	vsuxseg6ei16_v_f16mf2_m(...) __riscv_vsuxseg6ei16_v_f16mf2_m(__VA_ARGS__)

#define	vsuxseg6ei16_v_f16mf4(...) __riscv_vsuxseg6ei16_v_f16mf4(__VA_ARGS__)

#define	vsuxseg6ei16_v_f16mf4_m(...) __riscv_vsuxseg6ei16_v_f16mf4_m(__VA_ARGS__)

#define	vsuxseg6ei16_v_f32m1(...) __riscv_vsuxseg6ei16_v_f32m1(__VA_ARGS__)

#define	vsuxseg6ei16_v_f32m1_m(...) __riscv_vsuxseg6ei16_v_f32m1_m(__VA_ARGS__)

#define	vsuxseg6ei16_v_f32mf2(...) __riscv_vsuxseg6ei16_v_f32mf2(__VA_ARGS__)

#define	vsuxseg6ei16_v_f32mf2_m(...) __riscv_vsuxseg6ei16_v_f32mf2_m(__VA_ARGS__)

#define	vsuxseg6ei16_v_f64m1(...) __riscv_vsuxseg6ei16_v_f64m1(__VA_ARGS__)

#define	vsuxseg6ei16_v_f64m1_m(...) __riscv_vsuxseg6ei16_v_f64m1_m(__VA_ARGS__)

#define	vsuxseg6ei16_v_i16m1(...) __riscv_vsuxseg6ei16_v_i16m1(__VA_ARGS__)

#define	vsuxseg6ei16_v_i16m1_m(...) __riscv_vsuxseg6ei16_v_i16m1_m(__VA_ARGS__)

#define	vsuxseg6ei16_v_i16mf2(...) __riscv_vsuxseg6ei16_v_i16mf2(__VA_ARGS__)

#define	vsuxseg6ei16_v_i16mf2_m(...) __riscv_vsuxseg6ei16_v_i16mf2_m(__VA_ARGS__)

#define	vsuxseg6ei16_v_i16mf4(...) __riscv_vsuxseg6ei16_v_i16mf4(__VA_ARGS__)

#define	vsuxseg6ei16_v_i16mf4_m(...) __riscv_vsuxseg6ei16_v_i16mf4_m(__VA_ARGS__)

#define	vsuxseg6ei16_v_i32m1(...) __riscv_vsuxseg6ei16_v_i32m1(__VA_ARGS__)

#define	vsuxseg6ei16_v_i32m1_m(...) __riscv_vsuxseg6ei16_v_i32m1_m(__VA_ARGS__)

#define	vsuxseg6ei16_v_i32mf2(...) __riscv_vsuxseg6ei16_v_i32mf2(__VA_ARGS__)

#define	vsuxseg6ei16_v_i32mf2_m(...) __riscv_vsuxseg6ei16_v_i32mf2_m(__VA_ARGS__)

#define	vsuxseg6ei16_v_i64m1(...) __riscv_vsuxseg6ei16_v_i64m1(__VA_ARGS__)

#define	vsuxseg6ei16_v_i64m1_m(...) __riscv_vsuxseg6ei16_v_i64m1_m(__VA_ARGS__)

#define	vsuxseg6ei16_v_i8m1(...) __riscv_vsuxseg6ei16_v_i8m1(__VA_ARGS__)

#define	vsuxseg6ei16_v_i8m1_m(...) __riscv_vsuxseg6ei16_v_i8m1_m(__VA_ARGS__)

#define	vsuxseg6ei16_v_i8mf2(...) __riscv_vsuxseg6ei16_v_i8mf2(__VA_ARGS__)

#define	vsuxseg6ei16_v_i8mf2_m(...) __riscv_vsuxseg6ei16_v_i8mf2_m(__VA_ARGS__)

#define	vsuxseg6ei16_v_i8mf4(...) __riscv_vsuxseg6ei16_v_i8mf4(__VA_ARGS__)

#define	vsuxseg6ei16_v_i8mf4_m(...) __riscv_vsuxseg6ei16_v_i8mf4_m(__VA_ARGS__)

#define	vsuxseg6ei16_v_i8mf8(...) __riscv_vsuxseg6ei16_v_i8mf8(__VA_ARGS__)

#define	vsuxseg6ei16_v_i8mf8_m(...) __riscv_vsuxseg6ei16_v_i8mf8_m(__VA_ARGS__)

#define	vsuxseg6ei16_v_u16m1(...) __riscv_vsuxseg6ei16_v_u16m1(__VA_ARGS__)

#define	vsuxseg6ei16_v_u16m1_m(...) __riscv_vsuxseg6ei16_v_u16m1_m(__VA_ARGS__)

#define	vsuxseg6ei16_v_u16mf2(...) __riscv_vsuxseg6ei16_v_u16mf2(__VA_ARGS__)

#define	vsuxseg6ei16_v_u16mf2_m(...) __riscv_vsuxseg6ei16_v_u16mf2_m(__VA_ARGS__)

#define	vsuxseg6ei16_v_u16mf4(...) __riscv_vsuxseg6ei16_v_u16mf4(__VA_ARGS__)

#define	vsuxseg6ei16_v_u16mf4_m(...) __riscv_vsuxseg6ei16_v_u16mf4_m(__VA_ARGS__)

#define	vsuxseg6ei16_v_u32m1(...) __riscv_vsuxseg6ei16_v_u32m1(__VA_ARGS__)

#define	vsuxseg6ei16_v_u32m1_m(...) __riscv_vsuxseg6ei16_v_u32m1_m(__VA_ARGS__)

#define	vsuxseg6ei16_v_u32mf2(...) __riscv_vsuxseg6ei16_v_u32mf2(__VA_ARGS__)

#define	vsuxseg6ei16_v_u32mf2_m(...) __riscv_vsuxseg6ei16_v_u32mf2_m(__VA_ARGS__)

#define	vsuxseg6ei16_v_u64m1(...) __riscv_vsuxseg6ei16_v_u64m1(__VA_ARGS__)

#define	vsuxseg6ei16_v_u64m1_m(...) __riscv_vsuxseg6ei16_v_u64m1_m(__VA_ARGS__)

#define	vsuxseg6ei16_v_u8m1(...) __riscv_vsuxseg6ei16_v_u8m1(__VA_ARGS__)

#define	vsuxseg6ei16_v_u8m1_m(...) __riscv_vsuxseg6ei16_v_u8m1_m(__VA_ARGS__)

#define	vsuxseg6ei16_v_u8mf2(...) __riscv_vsuxseg6ei16_v_u8mf2(__VA_ARGS__)

#define	vsuxseg6ei16_v_u8mf2_m(...) __riscv_vsuxseg6ei16_v_u8mf2_m(__VA_ARGS__)

#define	vsuxseg6ei16_v_u8mf4(...) __riscv_vsuxseg6ei16_v_u8mf4(__VA_ARGS__)

#define	vsuxseg6ei16_v_u8mf4_m(...) __riscv_vsuxseg6ei16_v_u8mf4_m(__VA_ARGS__)

#define	vsuxseg6ei16_v_u8mf8(...) __riscv_vsuxseg6ei16_v_u8mf8(__VA_ARGS__)

#define	vsuxseg6ei16_v_u8mf8_m(...) __riscv_vsuxseg6ei16_v_u8mf8_m(__VA_ARGS__)

#define	vsuxseg6ei32_v_f16m1(...) __riscv_vsuxseg6ei32_v_f16m1(__VA_ARGS__)

#define	vsuxseg6ei32_v_f16m1_m(...) __riscv_vsuxseg6ei32_v_f16m1_m(__VA_ARGS__)

#define	vsuxseg6ei32_v_f16mf2(...) __riscv_vsuxseg6ei32_v_f16mf2(__VA_ARGS__)

#define	vsuxseg6ei32_v_f16mf2_m(...) __riscv_vsuxseg6ei32_v_f16mf2_m(__VA_ARGS__)

#define	vsuxseg6ei32_v_f16mf4(...) __riscv_vsuxseg6ei32_v_f16mf4(__VA_ARGS__)

#define	vsuxseg6ei32_v_f16mf4_m(...) __riscv_vsuxseg6ei32_v_f16mf4_m(__VA_ARGS__)

#define	vsuxseg6ei32_v_f32m1(...) __riscv_vsuxseg6ei32_v_f32m1(__VA_ARGS__)

#define	vsuxseg6ei32_v_f32m1_m(...) __riscv_vsuxseg6ei32_v_f32m1_m(__VA_ARGS__)

#define	vsuxseg6ei32_v_f32mf2(...) __riscv_vsuxseg6ei32_v_f32mf2(__VA_ARGS__)

#define	vsuxseg6ei32_v_f32mf2_m(...) __riscv_vsuxseg6ei32_v_f32mf2_m(__VA_ARGS__)

#define	vsuxseg6ei32_v_f64m1(...) __riscv_vsuxseg6ei32_v_f64m1(__VA_ARGS__)

#define	vsuxseg6ei32_v_f64m1_m(...) __riscv_vsuxseg6ei32_v_f64m1_m(__VA_ARGS__)

#define	vsuxseg6ei32_v_i16m1(...) __riscv_vsuxseg6ei32_v_i16m1(__VA_ARGS__)

#define	vsuxseg6ei32_v_i16m1_m(...) __riscv_vsuxseg6ei32_v_i16m1_m(__VA_ARGS__)

#define	vsuxseg6ei32_v_i16mf2(...) __riscv_vsuxseg6ei32_v_i16mf2(__VA_ARGS__)

#define	vsuxseg6ei32_v_i16mf2_m(...) __riscv_vsuxseg6ei32_v_i16mf2_m(__VA_ARGS__)

#define	vsuxseg6ei32_v_i16mf4(...) __riscv_vsuxseg6ei32_v_i16mf4(__VA_ARGS__)

#define	vsuxseg6ei32_v_i16mf4_m(...) __riscv_vsuxseg6ei32_v_i16mf4_m(__VA_ARGS__)

#define	vsuxseg6ei32_v_i32m1(...) __riscv_vsuxseg6ei32_v_i32m1(__VA_ARGS__)

#define	vsuxseg6ei32_v_i32m1_m(...) __riscv_vsuxseg6ei32_v_i32m1_m(__VA_ARGS__)

#define	vsuxseg6ei32_v_i32mf2(...) __riscv_vsuxseg6ei32_v_i32mf2(__VA_ARGS__)

#define	vsuxseg6ei32_v_i32mf2_m(...) __riscv_vsuxseg6ei32_v_i32mf2_m(__VA_ARGS__)

#define	vsuxseg6ei32_v_i64m1(...) __riscv_vsuxseg6ei32_v_i64m1(__VA_ARGS__)

#define	vsuxseg6ei32_v_i64m1_m(...) __riscv_vsuxseg6ei32_v_i64m1_m(__VA_ARGS__)

#define	vsuxseg6ei32_v_i8m1(...) __riscv_vsuxseg6ei32_v_i8m1(__VA_ARGS__)

#define	vsuxseg6ei32_v_i8m1_m(...) __riscv_vsuxseg6ei32_v_i8m1_m(__VA_ARGS__)

#define	vsuxseg6ei32_v_i8mf2(...) __riscv_vsuxseg6ei32_v_i8mf2(__VA_ARGS__)

#define	vsuxseg6ei32_v_i8mf2_m(...) __riscv_vsuxseg6ei32_v_i8mf2_m(__VA_ARGS__)

#define	vsuxseg6ei32_v_i8mf4(...) __riscv_vsuxseg6ei32_v_i8mf4(__VA_ARGS__)

#define	vsuxseg6ei32_v_i8mf4_m(...) __riscv_vsuxseg6ei32_v_i8mf4_m(__VA_ARGS__)

#define	vsuxseg6ei32_v_i8mf8(...) __riscv_vsuxseg6ei32_v_i8mf8(__VA_ARGS__)

#define	vsuxseg6ei32_v_i8mf8_m(...) __riscv_vsuxseg6ei32_v_i8mf8_m(__VA_ARGS__)

#define	vsuxseg6ei32_v_u16m1(...) __riscv_vsuxseg6ei32_v_u16m1(__VA_ARGS__)

#define	vsuxseg6ei32_v_u16m1_m(...) __riscv_vsuxseg6ei32_v_u16m1_m(__VA_ARGS__)

#define	vsuxseg6ei32_v_u16mf2(...) __riscv_vsuxseg6ei32_v_u16mf2(__VA_ARGS__)

#define	vsuxseg6ei32_v_u16mf2_m(...) __riscv_vsuxseg6ei32_v_u16mf2_m(__VA_ARGS__)

#define	vsuxseg6ei32_v_u16mf4(...) __riscv_vsuxseg6ei32_v_u16mf4(__VA_ARGS__)

#define	vsuxseg6ei32_v_u16mf4_m(...) __riscv_vsuxseg6ei32_v_u16mf4_m(__VA_ARGS__)

#define	vsuxseg6ei32_v_u32m1(...) __riscv_vsuxseg6ei32_v_u32m1(__VA_ARGS__)

#define	vsuxseg6ei32_v_u32m1_m(...) __riscv_vsuxseg6ei32_v_u32m1_m(__VA_ARGS__)

#define	vsuxseg6ei32_v_u32mf2(...) __riscv_vsuxseg6ei32_v_u32mf2(__VA_ARGS__)

#define	vsuxseg6ei32_v_u32mf2_m(...) __riscv_vsuxseg6ei32_v_u32mf2_m(__VA_ARGS__)

#define	vsuxseg6ei32_v_u64m1(...) __riscv_vsuxseg6ei32_v_u64m1(__VA_ARGS__)

#define	vsuxseg6ei32_v_u64m1_m(...) __riscv_vsuxseg6ei32_v_u64m1_m(__VA_ARGS__)

#define	vsuxseg6ei32_v_u8m1(...) __riscv_vsuxseg6ei32_v_u8m1(__VA_ARGS__)

#define	vsuxseg6ei32_v_u8m1_m(...) __riscv_vsuxseg6ei32_v_u8m1_m(__VA_ARGS__)

#define	vsuxseg6ei32_v_u8mf2(...) __riscv_vsuxseg6ei32_v_u8mf2(__VA_ARGS__)

#define	vsuxseg6ei32_v_u8mf2_m(...) __riscv_vsuxseg6ei32_v_u8mf2_m(__VA_ARGS__)

#define	vsuxseg6ei32_v_u8mf4(...) __riscv_vsuxseg6ei32_v_u8mf4(__VA_ARGS__)

#define	vsuxseg6ei32_v_u8mf4_m(...) __riscv_vsuxseg6ei32_v_u8mf4_m(__VA_ARGS__)

#define	vsuxseg6ei32_v_u8mf8(...) __riscv_vsuxseg6ei32_v_u8mf8(__VA_ARGS__)

#define	vsuxseg6ei32_v_u8mf8_m(...) __riscv_vsuxseg6ei32_v_u8mf8_m(__VA_ARGS__)

#define	vsuxseg6ei64_v_f16m1(...) __riscv_vsuxseg6ei64_v_f16m1(__VA_ARGS__)

#define	vsuxseg6ei64_v_f16m1_m(...) __riscv_vsuxseg6ei64_v_f16m1_m(__VA_ARGS__)

#define	vsuxseg6ei64_v_f16mf2(...) __riscv_vsuxseg6ei64_v_f16mf2(__VA_ARGS__)

#define	vsuxseg6ei64_v_f16mf2_m(...) __riscv_vsuxseg6ei64_v_f16mf2_m(__VA_ARGS__)

#define	vsuxseg6ei64_v_f16mf4(...) __riscv_vsuxseg6ei64_v_f16mf4(__VA_ARGS__)

#define	vsuxseg6ei64_v_f16mf4_m(...) __riscv_vsuxseg6ei64_v_f16mf4_m(__VA_ARGS__)

#define	vsuxseg6ei64_v_f32m1(...) __riscv_vsuxseg6ei64_v_f32m1(__VA_ARGS__)

#define	vsuxseg6ei64_v_f32m1_m(...) __riscv_vsuxseg6ei64_v_f32m1_m(__VA_ARGS__)

#define	vsuxseg6ei64_v_f32mf2(...) __riscv_vsuxseg6ei64_v_f32mf2(__VA_ARGS__)

#define	vsuxseg6ei64_v_f32mf2_m(...) __riscv_vsuxseg6ei64_v_f32mf2_m(__VA_ARGS__)

#define	vsuxseg6ei64_v_f64m1(...) __riscv_vsuxseg6ei64_v_f64m1(__VA_ARGS__)

#define	vsuxseg6ei64_v_f64m1_m(...) __riscv_vsuxseg6ei64_v_f64m1_m(__VA_ARGS__)

#define	vsuxseg6ei64_v_i16m1(...) __riscv_vsuxseg6ei64_v_i16m1(__VA_ARGS__)

#define	vsuxseg6ei64_v_i16m1_m(...) __riscv_vsuxseg6ei64_v_i16m1_m(__VA_ARGS__)

#define	vsuxseg6ei64_v_i16mf2(...) __riscv_vsuxseg6ei64_v_i16mf2(__VA_ARGS__)

#define	vsuxseg6ei64_v_i16mf2_m(...) __riscv_vsuxseg6ei64_v_i16mf2_m(__VA_ARGS__)

#define	vsuxseg6ei64_v_i16mf4(...) __riscv_vsuxseg6ei64_v_i16mf4(__VA_ARGS__)

#define	vsuxseg6ei64_v_i16mf4_m(...) __riscv_vsuxseg6ei64_v_i16mf4_m(__VA_ARGS__)

#define	vsuxseg6ei64_v_i32m1(...) __riscv_vsuxseg6ei64_v_i32m1(__VA_ARGS__)

#define	vsuxseg6ei64_v_i32m1_m(...) __riscv_vsuxseg6ei64_v_i32m1_m(__VA_ARGS__)

#define	vsuxseg6ei64_v_i32mf2(...) __riscv_vsuxseg6ei64_v_i32mf2(__VA_ARGS__)

#define	vsuxseg6ei64_v_i32mf2_m(...) __riscv_vsuxseg6ei64_v_i32mf2_m(__VA_ARGS__)

#define	vsuxseg6ei64_v_i64m1(...) __riscv_vsuxseg6ei64_v_i64m1(__VA_ARGS__)

#define	vsuxseg6ei64_v_i64m1_m(...) __riscv_vsuxseg6ei64_v_i64m1_m(__VA_ARGS__)

#define	vsuxseg6ei64_v_i8m1(...) __riscv_vsuxseg6ei64_v_i8m1(__VA_ARGS__)

#define	vsuxseg6ei64_v_i8m1_m(...) __riscv_vsuxseg6ei64_v_i8m1_m(__VA_ARGS__)

#define	vsuxseg6ei64_v_i8mf2(...) __riscv_vsuxseg6ei64_v_i8mf2(__VA_ARGS__)

#define	vsuxseg6ei64_v_i8mf2_m(...) __riscv_vsuxseg6ei64_v_i8mf2_m(__VA_ARGS__)

#define	vsuxseg6ei64_v_i8mf4(...) __riscv_vsuxseg6ei64_v_i8mf4(__VA_ARGS__)

#define	vsuxseg6ei64_v_i8mf4_m(...) __riscv_vsuxseg6ei64_v_i8mf4_m(__VA_ARGS__)

#define	vsuxseg6ei64_v_i8mf8(...) __riscv_vsuxseg6ei64_v_i8mf8(__VA_ARGS__)

#define	vsuxseg6ei64_v_i8mf8_m(...) __riscv_vsuxseg6ei64_v_i8mf8_m(__VA_ARGS__)

#define	vsuxseg6ei64_v_u16m1(...) __riscv_vsuxseg6ei64_v_u16m1(__VA_ARGS__)

#define	vsuxseg6ei64_v_u16m1_m(...) __riscv_vsuxseg6ei64_v_u16m1_m(__VA_ARGS__)

#define	vsuxseg6ei64_v_u16mf2(...) __riscv_vsuxseg6ei64_v_u16mf2(__VA_ARGS__)

#define	vsuxseg6ei64_v_u16mf2_m(...) __riscv_vsuxseg6ei64_v_u16mf2_m(__VA_ARGS__)

#define	vsuxseg6ei64_v_u16mf4(...) __riscv_vsuxseg6ei64_v_u16mf4(__VA_ARGS__)

#define	vsuxseg6ei64_v_u16mf4_m(...) __riscv_vsuxseg6ei64_v_u16mf4_m(__VA_ARGS__)

#define	vsuxseg6ei64_v_u32m1(...) __riscv_vsuxseg6ei64_v_u32m1(__VA_ARGS__)

#define	vsuxseg6ei64_v_u32m1_m(...) __riscv_vsuxseg6ei64_v_u32m1_m(__VA_ARGS__)

#define	vsuxseg6ei64_v_u32mf2(...) __riscv_vsuxseg6ei64_v_u32mf2(__VA_ARGS__)

#define	vsuxseg6ei64_v_u32mf2_m(...) __riscv_vsuxseg6ei64_v_u32mf2_m(__VA_ARGS__)

#define	vsuxseg6ei64_v_u64m1(...) __riscv_vsuxseg6ei64_v_u64m1(__VA_ARGS__)

#define	vsuxseg6ei64_v_u64m1_m(...) __riscv_vsuxseg6ei64_v_u64m1_m(__VA_ARGS__)

#define	vsuxseg6ei64_v_u8m1(...) __riscv_vsuxseg6ei64_v_u8m1(__VA_ARGS__)

#define	vsuxseg6ei64_v_u8m1_m(...) __riscv_vsuxseg6ei64_v_u8m1_m(__VA_ARGS__)

#define	vsuxseg6ei64_v_u8mf2(...) __riscv_vsuxseg6ei64_v_u8mf2(__VA_ARGS__)

#define	vsuxseg6ei64_v_u8mf2_m(...) __riscv_vsuxseg6ei64_v_u8mf2_m(__VA_ARGS__)

#define	vsuxseg6ei64_v_u8mf4(...) __riscv_vsuxseg6ei64_v_u8mf4(__VA_ARGS__)

#define	vsuxseg6ei64_v_u8mf4_m(...) __riscv_vsuxseg6ei64_v_u8mf4_m(__VA_ARGS__)

#define	vsuxseg6ei64_v_u8mf8(...) __riscv_vsuxseg6ei64_v_u8mf8(__VA_ARGS__)

#define	vsuxseg6ei64_v_u8mf8_m(...) __riscv_vsuxseg6ei64_v_u8mf8_m(__VA_ARGS__)

#define	vsuxseg6ei8_v_f16m1(...) __riscv_vsuxseg6ei8_v_f16m1(__VA_ARGS__)

#define	vsuxseg6ei8_v_f16m1_m(...) __riscv_vsuxseg6ei8_v_f16m1_m(__VA_ARGS__)

#define	vsuxseg6ei8_v_f16mf2(...) __riscv_vsuxseg6ei8_v_f16mf2(__VA_ARGS__)

#define	vsuxseg6ei8_v_f16mf2_m(...) __riscv_vsuxseg6ei8_v_f16mf2_m(__VA_ARGS__)

#define	vsuxseg6ei8_v_f16mf4(...) __riscv_vsuxseg6ei8_v_f16mf4(__VA_ARGS__)

#define	vsuxseg6ei8_v_f16mf4_m(...) __riscv_vsuxseg6ei8_v_f16mf4_m(__VA_ARGS__)

#define	vsuxseg6ei8_v_f32m1(...) __riscv_vsuxseg6ei8_v_f32m1(__VA_ARGS__)

#define	vsuxseg6ei8_v_f32m1_m(...) __riscv_vsuxseg6ei8_v_f32m1_m(__VA_ARGS__)

#define	vsuxseg6ei8_v_f32mf2(...) __riscv_vsuxseg6ei8_v_f32mf2(__VA_ARGS__)

#define	vsuxseg6ei8_v_f32mf2_m(...) __riscv_vsuxseg6ei8_v_f32mf2_m(__VA_ARGS__)

#define	vsuxseg6ei8_v_f64m1(...) __riscv_vsuxseg6ei8_v_f64m1(__VA_ARGS__)

#define	vsuxseg6ei8_v_f64m1_m(...) __riscv_vsuxseg6ei8_v_f64m1_m(__VA_ARGS__)

#define	vsuxseg6ei8_v_i16m1(...) __riscv_vsuxseg6ei8_v_i16m1(__VA_ARGS__)

#define	vsuxseg6ei8_v_i16m1_m(...) __riscv_vsuxseg6ei8_v_i16m1_m(__VA_ARGS__)

#define	vsuxseg6ei8_v_i16mf2(...) __riscv_vsuxseg6ei8_v_i16mf2(__VA_ARGS__)

#define	vsuxseg6ei8_v_i16mf2_m(...) __riscv_vsuxseg6ei8_v_i16mf2_m(__VA_ARGS__)

#define	vsuxseg6ei8_v_i16mf4(...) __riscv_vsuxseg6ei8_v_i16mf4(__VA_ARGS__)

#define	vsuxseg6ei8_v_i16mf4_m(...) __riscv_vsuxseg6ei8_v_i16mf4_m(__VA_ARGS__)

#define	vsuxseg6ei8_v_i32m1(...) __riscv_vsuxseg6ei8_v_i32m1(__VA_ARGS__)

#define	vsuxseg6ei8_v_i32m1_m(...) __riscv_vsuxseg6ei8_v_i32m1_m(__VA_ARGS__)

#define	vsuxseg6ei8_v_i32mf2(...) __riscv_vsuxseg6ei8_v_i32mf2(__VA_ARGS__)

#define	vsuxseg6ei8_v_i32mf2_m(...) __riscv_vsuxseg6ei8_v_i32mf2_m(__VA_ARGS__)

#define	vsuxseg6ei8_v_i64m1(...) __riscv_vsuxseg6ei8_v_i64m1(__VA_ARGS__)

#define	vsuxseg6ei8_v_i64m1_m(...) __riscv_vsuxseg6ei8_v_i64m1_m(__VA_ARGS__)

#define	vsuxseg6ei8_v_i8m1(...) __riscv_vsuxseg6ei8_v_i8m1(__VA_ARGS__)

#define	vsuxseg6ei8_v_i8m1_m(...) __riscv_vsuxseg6ei8_v_i8m1_m(__VA_ARGS__)

#define	vsuxseg6ei8_v_i8mf2(...) __riscv_vsuxseg6ei8_v_i8mf2(__VA_ARGS__)

#define	vsuxseg6ei8_v_i8mf2_m(...) __riscv_vsuxseg6ei8_v_i8mf2_m(__VA_ARGS__)

#define	vsuxseg6ei8_v_i8mf4(...) __riscv_vsuxseg6ei8_v_i8mf4(__VA_ARGS__)

#define	vsuxseg6ei8_v_i8mf4_m(...) __riscv_vsuxseg6ei8_v_i8mf4_m(__VA_ARGS__)

#define	vsuxseg6ei8_v_i8mf8(...) __riscv_vsuxseg6ei8_v_i8mf8(__VA_ARGS__)

#define	vsuxseg6ei8_v_i8mf8_m(...) __riscv_vsuxseg6ei8_v_i8mf8_m(__VA_ARGS__)

#define	vsuxseg6ei8_v_u16m1(...) __riscv_vsuxseg6ei8_v_u16m1(__VA_ARGS__)

#define	vsuxseg6ei8_v_u16m1_m(...) __riscv_vsuxseg6ei8_v_u16m1_m(__VA_ARGS__)

#define	vsuxseg6ei8_v_u16mf2(...) __riscv_vsuxseg6ei8_v_u16mf2(__VA_ARGS__)

#define	vsuxseg6ei8_v_u16mf2_m(...) __riscv_vsuxseg6ei8_v_u16mf2_m(__VA_ARGS__)

#define	vsuxseg6ei8_v_u16mf4(...) __riscv_vsuxseg6ei8_v_u16mf4(__VA_ARGS__)

#define	vsuxseg6ei8_v_u16mf4_m(...) __riscv_vsuxseg6ei8_v_u16mf4_m(__VA_ARGS__)

#define	vsuxseg6ei8_v_u32m1(...) __riscv_vsuxseg6ei8_v_u32m1(__VA_ARGS__)

#define	vsuxseg6ei8_v_u32m1_m(...) __riscv_vsuxseg6ei8_v_u32m1_m(__VA_ARGS__)

#define	vsuxseg6ei8_v_u32mf2(...) __riscv_vsuxseg6ei8_v_u32mf2(__VA_ARGS__)

#define	vsuxseg6ei8_v_u32mf2_m(...) __riscv_vsuxseg6ei8_v_u32mf2_m(__VA_ARGS__)

#define	vsuxseg6ei8_v_u64m1(...) __riscv_vsuxseg6ei8_v_u64m1(__VA_ARGS__)

#define	vsuxseg6ei8_v_u64m1_m(...) __riscv_vsuxseg6ei8_v_u64m1_m(__VA_ARGS__)

#define	vsuxseg6ei8_v_u8m1(...) __riscv_vsuxseg6ei8_v_u8m1(__VA_ARGS__)

#define	vsuxseg6ei8_v_u8m1_m(...) __riscv_vsuxseg6ei8_v_u8m1_m(__VA_ARGS__)

#define	vsuxseg6ei8_v_u8mf2(...) __riscv_vsuxseg6ei8_v_u8mf2(__VA_ARGS__)

#define	vsuxseg6ei8_v_u8mf2_m(...) __riscv_vsuxseg6ei8_v_u8mf2_m(__VA_ARGS__)

#define	vsuxseg6ei8_v_u8mf4(...) __riscv_vsuxseg6ei8_v_u8mf4(__VA_ARGS__)

#define	vsuxseg6ei8_v_u8mf4_m(...) __riscv_vsuxseg6ei8_v_u8mf4_m(__VA_ARGS__)

#define	vsuxseg6ei8_v_u8mf8(...) __riscv_vsuxseg6ei8_v_u8mf8(__VA_ARGS__)

#define	vsuxseg6ei8_v_u8mf8_m(...) __riscv_vsuxseg6ei8_v_u8mf8_m(__VA_ARGS__)

#define	vsuxseg7ei16_v_f16m1(...) __riscv_vsuxseg7ei16_v_f16m1(__VA_ARGS__)

#define	vsuxseg7ei16_v_f16m1_m(...) __riscv_vsuxseg7ei16_v_f16m1_m(__VA_ARGS__)

#define	vsuxseg7ei16_v_f16mf2(...) __riscv_vsuxseg7ei16_v_f16mf2(__VA_ARGS__)

#define	vsuxseg7ei16_v_f16mf2_m(...) __riscv_vsuxseg7ei16_v_f16mf2_m(__VA_ARGS__)

#define	vsuxseg7ei16_v_f16mf4(...) __riscv_vsuxseg7ei16_v_f16mf4(__VA_ARGS__)

#define	vsuxseg7ei16_v_f16mf4_m(...) __riscv_vsuxseg7ei16_v_f16mf4_m(__VA_ARGS__)

#define	vsuxseg7ei16_v_f32m1(...) __riscv_vsuxseg7ei16_v_f32m1(__VA_ARGS__)

#define	vsuxseg7ei16_v_f32m1_m(...) __riscv_vsuxseg7ei16_v_f32m1_m(__VA_ARGS__)

#define	vsuxseg7ei16_v_f32mf2(...) __riscv_vsuxseg7ei16_v_f32mf2(__VA_ARGS__)

#define	vsuxseg7ei16_v_f32mf2_m(...) __riscv_vsuxseg7ei16_v_f32mf2_m(__VA_ARGS__)

#define	vsuxseg7ei16_v_f64m1(...) __riscv_vsuxseg7ei16_v_f64m1(__VA_ARGS__)

#define	vsuxseg7ei16_v_f64m1_m(...) __riscv_vsuxseg7ei16_v_f64m1_m(__VA_ARGS__)

#define	vsuxseg7ei16_v_i16m1(...) __riscv_vsuxseg7ei16_v_i16m1(__VA_ARGS__)

#define	vsuxseg7ei16_v_i16m1_m(...) __riscv_vsuxseg7ei16_v_i16m1_m(__VA_ARGS__)

#define	vsuxseg7ei16_v_i16mf2(...) __riscv_vsuxseg7ei16_v_i16mf2(__VA_ARGS__)

#define	vsuxseg7ei16_v_i16mf2_m(...) __riscv_vsuxseg7ei16_v_i16mf2_m(__VA_ARGS__)

#define	vsuxseg7ei16_v_i16mf4(...) __riscv_vsuxseg7ei16_v_i16mf4(__VA_ARGS__)

#define	vsuxseg7ei16_v_i16mf4_m(...) __riscv_vsuxseg7ei16_v_i16mf4_m(__VA_ARGS__)

#define	vsuxseg7ei16_v_i32m1(...) __riscv_vsuxseg7ei16_v_i32m1(__VA_ARGS__)

#define	vsuxseg7ei16_v_i32m1_m(...) __riscv_vsuxseg7ei16_v_i32m1_m(__VA_ARGS__)

#define	vsuxseg7ei16_v_i32mf2(...) __riscv_vsuxseg7ei16_v_i32mf2(__VA_ARGS__)

#define	vsuxseg7ei16_v_i32mf2_m(...) __riscv_vsuxseg7ei16_v_i32mf2_m(__VA_ARGS__)

#define	vsuxseg7ei16_v_i64m1(...) __riscv_vsuxseg7ei16_v_i64m1(__VA_ARGS__)

#define	vsuxseg7ei16_v_i64m1_m(...) __riscv_vsuxseg7ei16_v_i64m1_m(__VA_ARGS__)

#define	vsuxseg7ei16_v_i8m1(...) __riscv_vsuxseg7ei16_v_i8m1(__VA_ARGS__)

#define	vsuxseg7ei16_v_i8m1_m(...) __riscv_vsuxseg7ei16_v_i8m1_m(__VA_ARGS__)

#define	vsuxseg7ei16_v_i8mf2(...) __riscv_vsuxseg7ei16_v_i8mf2(__VA_ARGS__)

#define	vsuxseg7ei16_v_i8mf2_m(...) __riscv_vsuxseg7ei16_v_i8mf2_m(__VA_ARGS__)

#define	vsuxseg7ei16_v_i8mf4(...) __riscv_vsuxseg7ei16_v_i8mf4(__VA_ARGS__)

#define	vsuxseg7ei16_v_i8mf4_m(...) __riscv_vsuxseg7ei16_v_i8mf4_m(__VA_ARGS__)

#define	vsuxseg7ei16_v_i8mf8(...) __riscv_vsuxseg7ei16_v_i8mf8(__VA_ARGS__)

#define	vsuxseg7ei16_v_i8mf8_m(...) __riscv_vsuxseg7ei16_v_i8mf8_m(__VA_ARGS__)

#define	vsuxseg7ei16_v_u16m1(...) __riscv_vsuxseg7ei16_v_u16m1(__VA_ARGS__)

#define	vsuxseg7ei16_v_u16m1_m(...) __riscv_vsuxseg7ei16_v_u16m1_m(__VA_ARGS__)

#define	vsuxseg7ei16_v_u16mf2(...) __riscv_vsuxseg7ei16_v_u16mf2(__VA_ARGS__)

#define	vsuxseg7ei16_v_u16mf2_m(...) __riscv_vsuxseg7ei16_v_u16mf2_m(__VA_ARGS__)

#define	vsuxseg7ei16_v_u16mf4(...) __riscv_vsuxseg7ei16_v_u16mf4(__VA_ARGS__)

#define	vsuxseg7ei16_v_u16mf4_m(...) __riscv_vsuxseg7ei16_v_u16mf4_m(__VA_ARGS__)

#define	vsuxseg7ei16_v_u32m1(...) __riscv_vsuxseg7ei16_v_u32m1(__VA_ARGS__)

#define	vsuxseg7ei16_v_u32m1_m(...) __riscv_vsuxseg7ei16_v_u32m1_m(__VA_ARGS__)

#define	vsuxseg7ei16_v_u32mf2(...) __riscv_vsuxseg7ei16_v_u32mf2(__VA_ARGS__)

#define	vsuxseg7ei16_v_u32mf2_m(...) __riscv_vsuxseg7ei16_v_u32mf2_m(__VA_ARGS__)

#define	vsuxseg7ei16_v_u64m1(...) __riscv_vsuxseg7ei16_v_u64m1(__VA_ARGS__)

#define	vsuxseg7ei16_v_u64m1_m(...) __riscv_vsuxseg7ei16_v_u64m1_m(__VA_ARGS__)

#define	vsuxseg7ei16_v_u8m1(...) __riscv_vsuxseg7ei16_v_u8m1(__VA_ARGS__)

#define	vsuxseg7ei16_v_u8m1_m(...) __riscv_vsuxseg7ei16_v_u8m1_m(__VA_ARGS__)

#define	vsuxseg7ei16_v_u8mf2(...) __riscv_vsuxseg7ei16_v_u8mf2(__VA_ARGS__)

#define	vsuxseg7ei16_v_u8mf2_m(...) __riscv_vsuxseg7ei16_v_u8mf2_m(__VA_ARGS__)

#define	vsuxseg7ei16_v_u8mf4(...) __riscv_vsuxseg7ei16_v_u8mf4(__VA_ARGS__)

#define	vsuxseg7ei16_v_u8mf4_m(...) __riscv_vsuxseg7ei16_v_u8mf4_m(__VA_ARGS__)

#define	vsuxseg7ei16_v_u8mf8(...) __riscv_vsuxseg7ei16_v_u8mf8(__VA_ARGS__)

#define	vsuxseg7ei16_v_u8mf8_m(...) __riscv_vsuxseg7ei16_v_u8mf8_m(__VA_ARGS__)

#define	vsuxseg7ei32_v_f16m1(...) __riscv_vsuxseg7ei32_v_f16m1(__VA_ARGS__)

#define	vsuxseg7ei32_v_f16m1_m(...) __riscv_vsuxseg7ei32_v_f16m1_m(__VA_ARGS__)

#define	vsuxseg7ei32_v_f16mf2(...) __riscv_vsuxseg7ei32_v_f16mf2(__VA_ARGS__)

#define	vsuxseg7ei32_v_f16mf2_m(...) __riscv_vsuxseg7ei32_v_f16mf2_m(__VA_ARGS__)

#define	vsuxseg7ei32_v_f16mf4(...) __riscv_vsuxseg7ei32_v_f16mf4(__VA_ARGS__)

#define	vsuxseg7ei32_v_f16mf4_m(...) __riscv_vsuxseg7ei32_v_f16mf4_m(__VA_ARGS__)

#define	vsuxseg7ei32_v_f32m1(...) __riscv_vsuxseg7ei32_v_f32m1(__VA_ARGS__)

#define	vsuxseg7ei32_v_f32m1_m(...) __riscv_vsuxseg7ei32_v_f32m1_m(__VA_ARGS__)

#define	vsuxseg7ei32_v_f32mf2(...) __riscv_vsuxseg7ei32_v_f32mf2(__VA_ARGS__)

#define	vsuxseg7ei32_v_f32mf2_m(...) __riscv_vsuxseg7ei32_v_f32mf2_m(__VA_ARGS__)

#define	vsuxseg7ei32_v_f64m1(...) __riscv_vsuxseg7ei32_v_f64m1(__VA_ARGS__)

#define	vsuxseg7ei32_v_f64m1_m(...) __riscv_vsuxseg7ei32_v_f64m1_m(__VA_ARGS__)

#define	vsuxseg7ei32_v_i16m1(...) __riscv_vsuxseg7ei32_v_i16m1(__VA_ARGS__)

#define	vsuxseg7ei32_v_i16m1_m(...) __riscv_vsuxseg7ei32_v_i16m1_m(__VA_ARGS__)

#define	vsuxseg7ei32_v_i16mf2(...) __riscv_vsuxseg7ei32_v_i16mf2(__VA_ARGS__)

#define	vsuxseg7ei32_v_i16mf2_m(...) __riscv_vsuxseg7ei32_v_i16mf2_m(__VA_ARGS__)

#define	vsuxseg7ei32_v_i16mf4(...) __riscv_vsuxseg7ei32_v_i16mf4(__VA_ARGS__)

#define	vsuxseg7ei32_v_i16mf4_m(...) __riscv_vsuxseg7ei32_v_i16mf4_m(__VA_ARGS__)

#define	vsuxseg7ei32_v_i32m1(...) __riscv_vsuxseg7ei32_v_i32m1(__VA_ARGS__)

#define	vsuxseg7ei32_v_i32m1_m(...) __riscv_vsuxseg7ei32_v_i32m1_m(__VA_ARGS__)

#define	vsuxseg7ei32_v_i32mf2(...) __riscv_vsuxseg7ei32_v_i32mf2(__VA_ARGS__)

#define	vsuxseg7ei32_v_i32mf2_m(...) __riscv_vsuxseg7ei32_v_i32mf2_m(__VA_ARGS__)

#define	vsuxseg7ei32_v_i64m1(...) __riscv_vsuxseg7ei32_v_i64m1(__VA_ARGS__)

#define	vsuxseg7ei32_v_i64m1_m(...) __riscv_vsuxseg7ei32_v_i64m1_m(__VA_ARGS__)

#define	vsuxseg7ei32_v_i8m1(...) __riscv_vsuxseg7ei32_v_i8m1(__VA_ARGS__)

#define	vsuxseg7ei32_v_i8m1_m(...) __riscv_vsuxseg7ei32_v_i8m1_m(__VA_ARGS__)

#define	vsuxseg7ei32_v_i8mf2(...) __riscv_vsuxseg7ei32_v_i8mf2(__VA_ARGS__)

#define	vsuxseg7ei32_v_i8mf2_m(...) __riscv_vsuxseg7ei32_v_i8mf2_m(__VA_ARGS__)

#define	vsuxseg7ei32_v_i8mf4(...) __riscv_vsuxseg7ei32_v_i8mf4(__VA_ARGS__)

#define	vsuxseg7ei32_v_i8mf4_m(...) __riscv_vsuxseg7ei32_v_i8mf4_m(__VA_ARGS__)

#define	vsuxseg7ei32_v_i8mf8(...) __riscv_vsuxseg7ei32_v_i8mf8(__VA_ARGS__)

#define	vsuxseg7ei32_v_i8mf8_m(...) __riscv_vsuxseg7ei32_v_i8mf8_m(__VA_ARGS__)

#define	vsuxseg7ei32_v_u16m1(...) __riscv_vsuxseg7ei32_v_u16m1(__VA_ARGS__)

#define	vsuxseg7ei32_v_u16m1_m(...) __riscv_vsuxseg7ei32_v_u16m1_m(__VA_ARGS__)

#define	vsuxseg7ei32_v_u16mf2(...) __riscv_vsuxseg7ei32_v_u16mf2(__VA_ARGS__)

#define	vsuxseg7ei32_v_u16mf2_m(...) __riscv_vsuxseg7ei32_v_u16mf2_m(__VA_ARGS__)

#define	vsuxseg7ei32_v_u16mf4(...) __riscv_vsuxseg7ei32_v_u16mf4(__VA_ARGS__)

#define	vsuxseg7ei32_v_u16mf4_m(...) __riscv_vsuxseg7ei32_v_u16mf4_m(__VA_ARGS__)

#define	vsuxseg7ei32_v_u32m1(...) __riscv_vsuxseg7ei32_v_u32m1(__VA_ARGS__)

#define	vsuxseg7ei32_v_u32m1_m(...) __riscv_vsuxseg7ei32_v_u32m1_m(__VA_ARGS__)

#define	vsuxseg7ei32_v_u32mf2(...) __riscv_vsuxseg7ei32_v_u32mf2(__VA_ARGS__)

#define	vsuxseg7ei32_v_u32mf2_m(...) __riscv_vsuxseg7ei32_v_u32mf2_m(__VA_ARGS__)

#define	vsuxseg7ei32_v_u64m1(...) __riscv_vsuxseg7ei32_v_u64m1(__VA_ARGS__)

#define	vsuxseg7ei32_v_u64m1_m(...) __riscv_vsuxseg7ei32_v_u64m1_m(__VA_ARGS__)

#define	vsuxseg7ei32_v_u8m1(...) __riscv_vsuxseg7ei32_v_u8m1(__VA_ARGS__)

#define	vsuxseg7ei32_v_u8m1_m(...) __riscv_vsuxseg7ei32_v_u8m1_m(__VA_ARGS__)

#define	vsuxseg7ei32_v_u8mf2(...) __riscv_vsuxseg7ei32_v_u8mf2(__VA_ARGS__)

#define	vsuxseg7ei32_v_u8mf2_m(...) __riscv_vsuxseg7ei32_v_u8mf2_m(__VA_ARGS__)

#define	vsuxseg7ei32_v_u8mf4(...) __riscv_vsuxseg7ei32_v_u8mf4(__VA_ARGS__)

#define	vsuxseg7ei32_v_u8mf4_m(...) __riscv_vsuxseg7ei32_v_u8mf4_m(__VA_ARGS__)

#define	vsuxseg7ei32_v_u8mf8(...) __riscv_vsuxseg7ei32_v_u8mf8(__VA_ARGS__)

#define	vsuxseg7ei32_v_u8mf8_m(...) __riscv_vsuxseg7ei32_v_u8mf8_m(__VA_ARGS__)

#define	vsuxseg7ei64_v_f16m1(...) __riscv_vsuxseg7ei64_v_f16m1(__VA_ARGS__)

#define	vsuxseg7ei64_v_f16m1_m(...) __riscv_vsuxseg7ei64_v_f16m1_m(__VA_ARGS__)

#define	vsuxseg7ei64_v_f16mf2(...) __riscv_vsuxseg7ei64_v_f16mf2(__VA_ARGS__)

#define	vsuxseg7ei64_v_f16mf2_m(...) __riscv_vsuxseg7ei64_v_f16mf2_m(__VA_ARGS__)

#define	vsuxseg7ei64_v_f16mf4(...) __riscv_vsuxseg7ei64_v_f16mf4(__VA_ARGS__)

#define	vsuxseg7ei64_v_f16mf4_m(...) __riscv_vsuxseg7ei64_v_f16mf4_m(__VA_ARGS__)

#define	vsuxseg7ei64_v_f32m1(...) __riscv_vsuxseg7ei64_v_f32m1(__VA_ARGS__)

#define	vsuxseg7ei64_v_f32m1_m(...) __riscv_vsuxseg7ei64_v_f32m1_m(__VA_ARGS__)

#define	vsuxseg7ei64_v_f32mf2(...) __riscv_vsuxseg7ei64_v_f32mf2(__VA_ARGS__)

#define	vsuxseg7ei64_v_f32mf2_m(...) __riscv_vsuxseg7ei64_v_f32mf2_m(__VA_ARGS__)

#define	vsuxseg7ei64_v_f64m1(...) __riscv_vsuxseg7ei64_v_f64m1(__VA_ARGS__)

#define	vsuxseg7ei64_v_f64m1_m(...) __riscv_vsuxseg7ei64_v_f64m1_m(__VA_ARGS__)

#define	vsuxseg7ei64_v_i16m1(...) __riscv_vsuxseg7ei64_v_i16m1(__VA_ARGS__)

#define	vsuxseg7ei64_v_i16m1_m(...) __riscv_vsuxseg7ei64_v_i16m1_m(__VA_ARGS__)

#define	vsuxseg7ei64_v_i16mf2(...) __riscv_vsuxseg7ei64_v_i16mf2(__VA_ARGS__)

#define	vsuxseg7ei64_v_i16mf2_m(...) __riscv_vsuxseg7ei64_v_i16mf2_m(__VA_ARGS__)

#define	vsuxseg7ei64_v_i16mf4(...) __riscv_vsuxseg7ei64_v_i16mf4(__VA_ARGS__)

#define	vsuxseg7ei64_v_i16mf4_m(...) __riscv_vsuxseg7ei64_v_i16mf4_m(__VA_ARGS__)

#define	vsuxseg7ei64_v_i32m1(...) __riscv_vsuxseg7ei64_v_i32m1(__VA_ARGS__)

#define	vsuxseg7ei64_v_i32m1_m(...) __riscv_vsuxseg7ei64_v_i32m1_m(__VA_ARGS__)

#define	vsuxseg7ei64_v_i32mf2(...) __riscv_vsuxseg7ei64_v_i32mf2(__VA_ARGS__)

#define	vsuxseg7ei64_v_i32mf2_m(...) __riscv_vsuxseg7ei64_v_i32mf2_m(__VA_ARGS__)

#define	vsuxseg7ei64_v_i64m1(...) __riscv_vsuxseg7ei64_v_i64m1(__VA_ARGS__)

#define	vsuxseg7ei64_v_i64m1_m(...) __riscv_vsuxseg7ei64_v_i64m1_m(__VA_ARGS__)

#define	vsuxseg7ei64_v_i8m1(...) __riscv_vsuxseg7ei64_v_i8m1(__VA_ARGS__)

#define	vsuxseg7ei64_v_i8m1_m(...) __riscv_vsuxseg7ei64_v_i8m1_m(__VA_ARGS__)

#define	vsuxseg7ei64_v_i8mf2(...) __riscv_vsuxseg7ei64_v_i8mf2(__VA_ARGS__)

#define	vsuxseg7ei64_v_i8mf2_m(...) __riscv_vsuxseg7ei64_v_i8mf2_m(__VA_ARGS__)

#define	vsuxseg7ei64_v_i8mf4(...) __riscv_vsuxseg7ei64_v_i8mf4(__VA_ARGS__)

#define	vsuxseg7ei64_v_i8mf4_m(...) __riscv_vsuxseg7ei64_v_i8mf4_m(__VA_ARGS__)

#define	vsuxseg7ei64_v_i8mf8(...) __riscv_vsuxseg7ei64_v_i8mf8(__VA_ARGS__)

#define	vsuxseg7ei64_v_i8mf8_m(...) __riscv_vsuxseg7ei64_v_i8mf8_m(__VA_ARGS__)

#define	vsuxseg7ei64_v_u16m1(...) __riscv_vsuxseg7ei64_v_u16m1(__VA_ARGS__)

#define	vsuxseg7ei64_v_u16m1_m(...) __riscv_vsuxseg7ei64_v_u16m1_m(__VA_ARGS__)

#define	vsuxseg7ei64_v_u16mf2(...) __riscv_vsuxseg7ei64_v_u16mf2(__VA_ARGS__)

#define	vsuxseg7ei64_v_u16mf2_m(...) __riscv_vsuxseg7ei64_v_u16mf2_m(__VA_ARGS__)

#define	vsuxseg7ei64_v_u16mf4(...) __riscv_vsuxseg7ei64_v_u16mf4(__VA_ARGS__)

#define	vsuxseg7ei64_v_u16mf4_m(...) __riscv_vsuxseg7ei64_v_u16mf4_m(__VA_ARGS__)

#define	vsuxseg7ei64_v_u32m1(...) __riscv_vsuxseg7ei64_v_u32m1(__VA_ARGS__)

#define	vsuxseg7ei64_v_u32m1_m(...) __riscv_vsuxseg7ei64_v_u32m1_m(__VA_ARGS__)

#define	vsuxseg7ei64_v_u32mf2(...) __riscv_vsuxseg7ei64_v_u32mf2(__VA_ARGS__)

#define	vsuxseg7ei64_v_u32mf2_m(...) __riscv_vsuxseg7ei64_v_u32mf2_m(__VA_ARGS__)

#define	vsuxseg7ei64_v_u64m1(...) __riscv_vsuxseg7ei64_v_u64m1(__VA_ARGS__)

#define	vsuxseg7ei64_v_u64m1_m(...) __riscv_vsuxseg7ei64_v_u64m1_m(__VA_ARGS__)

#define	vsuxseg7ei64_v_u8m1(...) __riscv_vsuxseg7ei64_v_u8m1(__VA_ARGS__)

#define	vsuxseg7ei64_v_u8m1_m(...) __riscv_vsuxseg7ei64_v_u8m1_m(__VA_ARGS__)

#define	vsuxseg7ei64_v_u8mf2(...) __riscv_vsuxseg7ei64_v_u8mf2(__VA_ARGS__)

#define	vsuxseg7ei64_v_u8mf2_m(...) __riscv_vsuxseg7ei64_v_u8mf2_m(__VA_ARGS__)

#define	vsuxseg7ei64_v_u8mf4(...) __riscv_vsuxseg7ei64_v_u8mf4(__VA_ARGS__)

#define	vsuxseg7ei64_v_u8mf4_m(...) __riscv_vsuxseg7ei64_v_u8mf4_m(__VA_ARGS__)

#define	vsuxseg7ei64_v_u8mf8(...) __riscv_vsuxseg7ei64_v_u8mf8(__VA_ARGS__)

#define	vsuxseg7ei64_v_u8mf8_m(...) __riscv_vsuxseg7ei64_v_u8mf8_m(__VA_ARGS__)

#define	vsuxseg7ei8_v_f16m1(...) __riscv_vsuxseg7ei8_v_f16m1(__VA_ARGS__)

#define	vsuxseg7ei8_v_f16m1_m(...) __riscv_vsuxseg7ei8_v_f16m1_m(__VA_ARGS__)

#define	vsuxseg7ei8_v_f16mf2(...) __riscv_vsuxseg7ei8_v_f16mf2(__VA_ARGS__)

#define	vsuxseg7ei8_v_f16mf2_m(...) __riscv_vsuxseg7ei8_v_f16mf2_m(__VA_ARGS__)

#define	vsuxseg7ei8_v_f16mf4(...) __riscv_vsuxseg7ei8_v_f16mf4(__VA_ARGS__)

#define	vsuxseg7ei8_v_f16mf4_m(...) __riscv_vsuxseg7ei8_v_f16mf4_m(__VA_ARGS__)

#define	vsuxseg7ei8_v_f32m1(...) __riscv_vsuxseg7ei8_v_f32m1(__VA_ARGS__)

#define	vsuxseg7ei8_v_f32m1_m(...) __riscv_vsuxseg7ei8_v_f32m1_m(__VA_ARGS__)

#define	vsuxseg7ei8_v_f32mf2(...) __riscv_vsuxseg7ei8_v_f32mf2(__VA_ARGS__)

#define	vsuxseg7ei8_v_f32mf2_m(...) __riscv_vsuxseg7ei8_v_f32mf2_m(__VA_ARGS__)

#define	vsuxseg7ei8_v_f64m1(...) __riscv_vsuxseg7ei8_v_f64m1(__VA_ARGS__)

#define	vsuxseg7ei8_v_f64m1_m(...) __riscv_vsuxseg7ei8_v_f64m1_m(__VA_ARGS__)

#define	vsuxseg7ei8_v_i16m1(...) __riscv_vsuxseg7ei8_v_i16m1(__VA_ARGS__)

#define	vsuxseg7ei8_v_i16m1_m(...) __riscv_vsuxseg7ei8_v_i16m1_m(__VA_ARGS__)

#define	vsuxseg7ei8_v_i16mf2(...) __riscv_vsuxseg7ei8_v_i16mf2(__VA_ARGS__)

#define	vsuxseg7ei8_v_i16mf2_m(...) __riscv_vsuxseg7ei8_v_i16mf2_m(__VA_ARGS__)

#define	vsuxseg7ei8_v_i16mf4(...) __riscv_vsuxseg7ei8_v_i16mf4(__VA_ARGS__)

#define	vsuxseg7ei8_v_i16mf4_m(...) __riscv_vsuxseg7ei8_v_i16mf4_m(__VA_ARGS__)

#define	vsuxseg7ei8_v_i32m1(...) __riscv_vsuxseg7ei8_v_i32m1(__VA_ARGS__)

#define	vsuxseg7ei8_v_i32m1_m(...) __riscv_vsuxseg7ei8_v_i32m1_m(__VA_ARGS__)

#define	vsuxseg7ei8_v_i32mf2(...) __riscv_vsuxseg7ei8_v_i32mf2(__VA_ARGS__)

#define	vsuxseg7ei8_v_i32mf2_m(...) __riscv_vsuxseg7ei8_v_i32mf2_m(__VA_ARGS__)

#define	vsuxseg7ei8_v_i64m1(...) __riscv_vsuxseg7ei8_v_i64m1(__VA_ARGS__)

#define	vsuxseg7ei8_v_i64m1_m(...) __riscv_vsuxseg7ei8_v_i64m1_m(__VA_ARGS__)

#define	vsuxseg7ei8_v_i8m1(...) __riscv_vsuxseg7ei8_v_i8m1(__VA_ARGS__)

#define	vsuxseg7ei8_v_i8m1_m(...) __riscv_vsuxseg7ei8_v_i8m1_m(__VA_ARGS__)

#define	vsuxseg7ei8_v_i8mf2(...) __riscv_vsuxseg7ei8_v_i8mf2(__VA_ARGS__)

#define	vsuxseg7ei8_v_i8mf2_m(...) __riscv_vsuxseg7ei8_v_i8mf2_m(__VA_ARGS__)

#define	vsuxseg7ei8_v_i8mf4(...) __riscv_vsuxseg7ei8_v_i8mf4(__VA_ARGS__)

#define	vsuxseg7ei8_v_i8mf4_m(...) __riscv_vsuxseg7ei8_v_i8mf4_m(__VA_ARGS__)

#define	vsuxseg7ei8_v_i8mf8(...) __riscv_vsuxseg7ei8_v_i8mf8(__VA_ARGS__)

#define	vsuxseg7ei8_v_i8mf8_m(...) __riscv_vsuxseg7ei8_v_i8mf8_m(__VA_ARGS__)

#define	vsuxseg7ei8_v_u16m1(...) __riscv_vsuxseg7ei8_v_u16m1(__VA_ARGS__)

#define	vsuxseg7ei8_v_u16m1_m(...) __riscv_vsuxseg7ei8_v_u16m1_m(__VA_ARGS__)

#define	vsuxseg7ei8_v_u16mf2(...) __riscv_vsuxseg7ei8_v_u16mf2(__VA_ARGS__)

#define	vsuxseg7ei8_v_u16mf2_m(...) __riscv_vsuxseg7ei8_v_u16mf2_m(__VA_ARGS__)

#define	vsuxseg7ei8_v_u16mf4(...) __riscv_vsuxseg7ei8_v_u16mf4(__VA_ARGS__)

#define	vsuxseg7ei8_v_u16mf4_m(...) __riscv_vsuxseg7ei8_v_u16mf4_m(__VA_ARGS__)

#define	vsuxseg7ei8_v_u32m1(...) __riscv_vsuxseg7ei8_v_u32m1(__VA_ARGS__)

#define	vsuxseg7ei8_v_u32m1_m(...) __riscv_vsuxseg7ei8_v_u32m1_m(__VA_ARGS__)

#define	vsuxseg7ei8_v_u32mf2(...) __riscv_vsuxseg7ei8_v_u32mf2(__VA_ARGS__)

#define	vsuxseg7ei8_v_u32mf2_m(...) __riscv_vsuxseg7ei8_v_u32mf2_m(__VA_ARGS__)

#define	vsuxseg7ei8_v_u64m1(...) __riscv_vsuxseg7ei8_v_u64m1(__VA_ARGS__)

#define	vsuxseg7ei8_v_u64m1_m(...) __riscv_vsuxseg7ei8_v_u64m1_m(__VA_ARGS__)

#define	vsuxseg7ei8_v_u8m1(...) __riscv_vsuxseg7ei8_v_u8m1(__VA_ARGS__)

#define	vsuxseg7ei8_v_u8m1_m(...) __riscv_vsuxseg7ei8_v_u8m1_m(__VA_ARGS__)

#define	vsuxseg7ei8_v_u8mf2(...) __riscv_vsuxseg7ei8_v_u8mf2(__VA_ARGS__)

#define	vsuxseg7ei8_v_u8mf2_m(...) __riscv_vsuxseg7ei8_v_u8mf2_m(__VA_ARGS__)

#define	vsuxseg7ei8_v_u8mf4(...) __riscv_vsuxseg7ei8_v_u8mf4(__VA_ARGS__)

#define	vsuxseg7ei8_v_u8mf4_m(...) __riscv_vsuxseg7ei8_v_u8mf4_m(__VA_ARGS__)

#define	vsuxseg7ei8_v_u8mf8(...) __riscv_vsuxseg7ei8_v_u8mf8(__VA_ARGS__)

#define	vsuxseg7ei8_v_u8mf8_m(...) __riscv_vsuxseg7ei8_v_u8mf8_m(__VA_ARGS__)

#define	vsuxseg8ei16_v_f16m1(...) __riscv_vsuxseg8ei16_v_f16m1(__VA_ARGS__)

#define	vsuxseg8ei16_v_f16m1_m(...) __riscv_vsuxseg8ei16_v_f16m1_m(__VA_ARGS__)

#define	vsuxseg8ei16_v_f16mf2(...) __riscv_vsuxseg8ei16_v_f16mf2(__VA_ARGS__)

#define	vsuxseg8ei16_v_f16mf2_m(...) __riscv_vsuxseg8ei16_v_f16mf2_m(__VA_ARGS__)

#define	vsuxseg8ei16_v_f16mf4(...) __riscv_vsuxseg8ei16_v_f16mf4(__VA_ARGS__)

#define	vsuxseg8ei16_v_f16mf4_m(...) __riscv_vsuxseg8ei16_v_f16mf4_m(__VA_ARGS__)

#define	vsuxseg8ei16_v_f32m1(...) __riscv_vsuxseg8ei16_v_f32m1(__VA_ARGS__)

#define	vsuxseg8ei16_v_f32m1_m(...) __riscv_vsuxseg8ei16_v_f32m1_m(__VA_ARGS__)

#define	vsuxseg8ei16_v_f32mf2(...) __riscv_vsuxseg8ei16_v_f32mf2(__VA_ARGS__)

#define	vsuxseg8ei16_v_f32mf2_m(...) __riscv_vsuxseg8ei16_v_f32mf2_m(__VA_ARGS__)

#define	vsuxseg8ei16_v_f64m1(...) __riscv_vsuxseg8ei16_v_f64m1(__VA_ARGS__)

#define	vsuxseg8ei16_v_f64m1_m(...) __riscv_vsuxseg8ei16_v_f64m1_m(__VA_ARGS__)

#define	vsuxseg8ei16_v_i16m1(...) __riscv_vsuxseg8ei16_v_i16m1(__VA_ARGS__)

#define	vsuxseg8ei16_v_i16m1_m(...) __riscv_vsuxseg8ei16_v_i16m1_m(__VA_ARGS__)

#define	vsuxseg8ei16_v_i16mf2(...) __riscv_vsuxseg8ei16_v_i16mf2(__VA_ARGS__)

#define	vsuxseg8ei16_v_i16mf2_m(...) __riscv_vsuxseg8ei16_v_i16mf2_m(__VA_ARGS__)

#define	vsuxseg8ei16_v_i16mf4(...) __riscv_vsuxseg8ei16_v_i16mf4(__VA_ARGS__)

#define	vsuxseg8ei16_v_i16mf4_m(...) __riscv_vsuxseg8ei16_v_i16mf4_m(__VA_ARGS__)

#define	vsuxseg8ei16_v_i32m1(...) __riscv_vsuxseg8ei16_v_i32m1(__VA_ARGS__)

#define	vsuxseg8ei16_v_i32m1_m(...) __riscv_vsuxseg8ei16_v_i32m1_m(__VA_ARGS__)

#define	vsuxseg8ei16_v_i32mf2(...) __riscv_vsuxseg8ei16_v_i32mf2(__VA_ARGS__)

#define	vsuxseg8ei16_v_i32mf2_m(...) __riscv_vsuxseg8ei16_v_i32mf2_m(__VA_ARGS__)

#define	vsuxseg8ei16_v_i64m1(...) __riscv_vsuxseg8ei16_v_i64m1(__VA_ARGS__)

#define	vsuxseg8ei16_v_i64m1_m(...) __riscv_vsuxseg8ei16_v_i64m1_m(__VA_ARGS__)

#define	vsuxseg8ei16_v_i8m1(...) __riscv_vsuxseg8ei16_v_i8m1(__VA_ARGS__)

#define	vsuxseg8ei16_v_i8m1_m(...) __riscv_vsuxseg8ei16_v_i8m1_m(__VA_ARGS__)

#define	vsuxseg8ei16_v_i8mf2(...) __riscv_vsuxseg8ei16_v_i8mf2(__VA_ARGS__)

#define	vsuxseg8ei16_v_i8mf2_m(...) __riscv_vsuxseg8ei16_v_i8mf2_m(__VA_ARGS__)

#define	vsuxseg8ei16_v_i8mf4(...) __riscv_vsuxseg8ei16_v_i8mf4(__VA_ARGS__)

#define	vsuxseg8ei16_v_i8mf4_m(...) __riscv_vsuxseg8ei16_v_i8mf4_m(__VA_ARGS__)

#define	vsuxseg8ei16_v_i8mf8(...) __riscv_vsuxseg8ei16_v_i8mf8(__VA_ARGS__)

#define	vsuxseg8ei16_v_i8mf8_m(...) __riscv_vsuxseg8ei16_v_i8mf8_m(__VA_ARGS__)

#define	vsuxseg8ei16_v_u16m1(...) __riscv_vsuxseg8ei16_v_u16m1(__VA_ARGS__)

#define	vsuxseg8ei16_v_u16m1_m(...) __riscv_vsuxseg8ei16_v_u16m1_m(__VA_ARGS__)

#define	vsuxseg8ei16_v_u16mf2(...) __riscv_vsuxseg8ei16_v_u16mf2(__VA_ARGS__)

#define	vsuxseg8ei16_v_u16mf2_m(...) __riscv_vsuxseg8ei16_v_u16mf2_m(__VA_ARGS__)

#define	vsuxseg8ei16_v_u16mf4(...) __riscv_vsuxseg8ei16_v_u16mf4(__VA_ARGS__)

#define	vsuxseg8ei16_v_u16mf4_m(...) __riscv_vsuxseg8ei16_v_u16mf4_m(__VA_ARGS__)

#define	vsuxseg8ei16_v_u32m1(...) __riscv_vsuxseg8ei16_v_u32m1(__VA_ARGS__)

#define	vsuxseg8ei16_v_u32m1_m(...) __riscv_vsuxseg8ei16_v_u32m1_m(__VA_ARGS__)

#define	vsuxseg8ei16_v_u32mf2(...) __riscv_vsuxseg8ei16_v_u32mf2(__VA_ARGS__)

#define	vsuxseg8ei16_v_u32mf2_m(...) __riscv_vsuxseg8ei16_v_u32mf2_m(__VA_ARGS__)

#define	vsuxseg8ei16_v_u64m1(...) __riscv_vsuxseg8ei16_v_u64m1(__VA_ARGS__)

#define	vsuxseg8ei16_v_u64m1_m(...) __riscv_vsuxseg8ei16_v_u64m1_m(__VA_ARGS__)

#define	vsuxseg8ei16_v_u8m1(...) __riscv_vsuxseg8ei16_v_u8m1(__VA_ARGS__)

#define	vsuxseg8ei16_v_u8m1_m(...) __riscv_vsuxseg8ei16_v_u8m1_m(__VA_ARGS__)

#define	vsuxseg8ei16_v_u8mf2(...) __riscv_vsuxseg8ei16_v_u8mf2(__VA_ARGS__)

#define	vsuxseg8ei16_v_u8mf2_m(...) __riscv_vsuxseg8ei16_v_u8mf2_m(__VA_ARGS__)

#define	vsuxseg8ei16_v_u8mf4(...) __riscv_vsuxseg8ei16_v_u8mf4(__VA_ARGS__)

#define	vsuxseg8ei16_v_u8mf4_m(...) __riscv_vsuxseg8ei16_v_u8mf4_m(__VA_ARGS__)

#define	vsuxseg8ei16_v_u8mf8(...) __riscv_vsuxseg8ei16_v_u8mf8(__VA_ARGS__)

#define	vsuxseg8ei16_v_u8mf8_m(...) __riscv_vsuxseg8ei16_v_u8mf8_m(__VA_ARGS__)

#define	vsuxseg8ei32_v_f16m1(...) __riscv_vsuxseg8ei32_v_f16m1(__VA_ARGS__)

#define	vsuxseg8ei32_v_f16m1_m(...) __riscv_vsuxseg8ei32_v_f16m1_m(__VA_ARGS__)

#define	vsuxseg8ei32_v_f16mf2(...) __riscv_vsuxseg8ei32_v_f16mf2(__VA_ARGS__)

#define	vsuxseg8ei32_v_f16mf2_m(...) __riscv_vsuxseg8ei32_v_f16mf2_m(__VA_ARGS__)

#define	vsuxseg8ei32_v_f16mf4(...) __riscv_vsuxseg8ei32_v_f16mf4(__VA_ARGS__)

#define	vsuxseg8ei32_v_f16mf4_m(...) __riscv_vsuxseg8ei32_v_f16mf4_m(__VA_ARGS__)

#define	vsuxseg8ei32_v_f32m1(...) __riscv_vsuxseg8ei32_v_f32m1(__VA_ARGS__)

#define	vsuxseg8ei32_v_f32m1_m(...) __riscv_vsuxseg8ei32_v_f32m1_m(__VA_ARGS__)

#define	vsuxseg8ei32_v_f32mf2(...) __riscv_vsuxseg8ei32_v_f32mf2(__VA_ARGS__)

#define	vsuxseg8ei32_v_f32mf2_m(...) __riscv_vsuxseg8ei32_v_f32mf2_m(__VA_ARGS__)

#define	vsuxseg8ei32_v_f64m1(...) __riscv_vsuxseg8ei32_v_f64m1(__VA_ARGS__)

#define	vsuxseg8ei32_v_f64m1_m(...) __riscv_vsuxseg8ei32_v_f64m1_m(__VA_ARGS__)

#define	vsuxseg8ei32_v_i16m1(...) __riscv_vsuxseg8ei32_v_i16m1(__VA_ARGS__)

#define	vsuxseg8ei32_v_i16m1_m(...) __riscv_vsuxseg8ei32_v_i16m1_m(__VA_ARGS__)

#define	vsuxseg8ei32_v_i16mf2(...) __riscv_vsuxseg8ei32_v_i16mf2(__VA_ARGS__)

#define	vsuxseg8ei32_v_i16mf2_m(...) __riscv_vsuxseg8ei32_v_i16mf2_m(__VA_ARGS__)

#define	vsuxseg8ei32_v_i16mf4(...) __riscv_vsuxseg8ei32_v_i16mf4(__VA_ARGS__)

#define	vsuxseg8ei32_v_i16mf4_m(...) __riscv_vsuxseg8ei32_v_i16mf4_m(__VA_ARGS__)

#define	vsuxseg8ei32_v_i32m1(...) __riscv_vsuxseg8ei32_v_i32m1(__VA_ARGS__)

#define	vsuxseg8ei32_v_i32m1_m(...) __riscv_vsuxseg8ei32_v_i32m1_m(__VA_ARGS__)

#define	vsuxseg8ei32_v_i32mf2(...) __riscv_vsuxseg8ei32_v_i32mf2(__VA_ARGS__)

#define	vsuxseg8ei32_v_i32mf2_m(...) __riscv_vsuxseg8ei32_v_i32mf2_m(__VA_ARGS__)

#define	vsuxseg8ei32_v_i64m1(...) __riscv_vsuxseg8ei32_v_i64m1(__VA_ARGS__)

#define	vsuxseg8ei32_v_i64m1_m(...) __riscv_vsuxseg8ei32_v_i64m1_m(__VA_ARGS__)

#define	vsuxseg8ei32_v_i8m1(...) __riscv_vsuxseg8ei32_v_i8m1(__VA_ARGS__)

#define	vsuxseg8ei32_v_i8m1_m(...) __riscv_vsuxseg8ei32_v_i8m1_m(__VA_ARGS__)

#define	vsuxseg8ei32_v_i8mf2(...) __riscv_vsuxseg8ei32_v_i8mf2(__VA_ARGS__)

#define	vsuxseg8ei32_v_i8mf2_m(...) __riscv_vsuxseg8ei32_v_i8mf2_m(__VA_ARGS__)

#define	vsuxseg8ei32_v_i8mf4(...) __riscv_vsuxseg8ei32_v_i8mf4(__VA_ARGS__)

#define	vsuxseg8ei32_v_i8mf4_m(...) __riscv_vsuxseg8ei32_v_i8mf4_m(__VA_ARGS__)

#define	vsuxseg8ei32_v_i8mf8(...) __riscv_vsuxseg8ei32_v_i8mf8(__VA_ARGS__)

#define	vsuxseg8ei32_v_i8mf8_m(...) __riscv_vsuxseg8ei32_v_i8mf8_m(__VA_ARGS__)

#define	vsuxseg8ei32_v_u16m1(...) __riscv_vsuxseg8ei32_v_u16m1(__VA_ARGS__)

#define	vsuxseg8ei32_v_u16m1_m(...) __riscv_vsuxseg8ei32_v_u16m1_m(__VA_ARGS__)

#define	vsuxseg8ei32_v_u16mf2(...) __riscv_vsuxseg8ei32_v_u16mf2(__VA_ARGS__)

#define	vsuxseg8ei32_v_u16mf2_m(...) __riscv_vsuxseg8ei32_v_u16mf2_m(__VA_ARGS__)

#define	vsuxseg8ei32_v_u16mf4(...) __riscv_vsuxseg8ei32_v_u16mf4(__VA_ARGS__)

#define	vsuxseg8ei32_v_u16mf4_m(...) __riscv_vsuxseg8ei32_v_u16mf4_m(__VA_ARGS__)

#define	vsuxseg8ei32_v_u32m1(...) __riscv_vsuxseg8ei32_v_u32m1(__VA_ARGS__)

#define	vsuxseg8ei32_v_u32m1_m(...) __riscv_vsuxseg8ei32_v_u32m1_m(__VA_ARGS__)

#define	vsuxseg8ei32_v_u32mf2(...) __riscv_vsuxseg8ei32_v_u32mf2(__VA_ARGS__)

#define	vsuxseg8ei32_v_u32mf2_m(...) __riscv_vsuxseg8ei32_v_u32mf2_m(__VA_ARGS__)

#define	vsuxseg8ei32_v_u64m1(...) __riscv_vsuxseg8ei32_v_u64m1(__VA_ARGS__)

#define	vsuxseg8ei32_v_u64m1_m(...) __riscv_vsuxseg8ei32_v_u64m1_m(__VA_ARGS__)

#define	vsuxseg8ei32_v_u8m1(...) __riscv_vsuxseg8ei32_v_u8m1(__VA_ARGS__)

#define	vsuxseg8ei32_v_u8m1_m(...) __riscv_vsuxseg8ei32_v_u8m1_m(__VA_ARGS__)

#define	vsuxseg8ei32_v_u8mf2(...) __riscv_vsuxseg8ei32_v_u8mf2(__VA_ARGS__)

#define	vsuxseg8ei32_v_u8mf2_m(...) __riscv_vsuxseg8ei32_v_u8mf2_m(__VA_ARGS__)

#define	vsuxseg8ei32_v_u8mf4(...) __riscv_vsuxseg8ei32_v_u8mf4(__VA_ARGS__)

#define	vsuxseg8ei32_v_u8mf4_m(...) __riscv_vsuxseg8ei32_v_u8mf4_m(__VA_ARGS__)

#define	vsuxseg8ei32_v_u8mf8(...) __riscv_vsuxseg8ei32_v_u8mf8(__VA_ARGS__)

#define	vsuxseg8ei32_v_u8mf8_m(...) __riscv_vsuxseg8ei32_v_u8mf8_m(__VA_ARGS__)

#define	vsuxseg8ei64_v_f16m1(...) __riscv_vsuxseg8ei64_v_f16m1(__VA_ARGS__)

#define	vsuxseg8ei64_v_f16m1_m(...) __riscv_vsuxseg8ei64_v_f16m1_m(__VA_ARGS__)

#define	vsuxseg8ei64_v_f16mf2(...) __riscv_vsuxseg8ei64_v_f16mf2(__VA_ARGS__)

#define	vsuxseg8ei64_v_f16mf2_m(...) __riscv_vsuxseg8ei64_v_f16mf2_m(__VA_ARGS__)

#define	vsuxseg8ei64_v_f16mf4(...) __riscv_vsuxseg8ei64_v_f16mf4(__VA_ARGS__)

#define	vsuxseg8ei64_v_f16mf4_m(...) __riscv_vsuxseg8ei64_v_f16mf4_m(__VA_ARGS__)

#define	vsuxseg8ei64_v_f32m1(...) __riscv_vsuxseg8ei64_v_f32m1(__VA_ARGS__)

#define	vsuxseg8ei64_v_f32m1_m(...) __riscv_vsuxseg8ei64_v_f32m1_m(__VA_ARGS__)

#define	vsuxseg8ei64_v_f32mf2(...) __riscv_vsuxseg8ei64_v_f32mf2(__VA_ARGS__)

#define	vsuxseg8ei64_v_f32mf2_m(...) __riscv_vsuxseg8ei64_v_f32mf2_m(__VA_ARGS__)

#define	vsuxseg8ei64_v_f64m1(...) __riscv_vsuxseg8ei64_v_f64m1(__VA_ARGS__)

#define	vsuxseg8ei64_v_f64m1_m(...) __riscv_vsuxseg8ei64_v_f64m1_m(__VA_ARGS__)

#define	vsuxseg8ei64_v_i16m1(...) __riscv_vsuxseg8ei64_v_i16m1(__VA_ARGS__)

#define	vsuxseg8ei64_v_i16m1_m(...) __riscv_vsuxseg8ei64_v_i16m1_m(__VA_ARGS__)

#define	vsuxseg8ei64_v_i16mf2(...) __riscv_vsuxseg8ei64_v_i16mf2(__VA_ARGS__)

#define	vsuxseg8ei64_v_i16mf2_m(...) __riscv_vsuxseg8ei64_v_i16mf2_m(__VA_ARGS__)

#define	vsuxseg8ei64_v_i16mf4(...) __riscv_vsuxseg8ei64_v_i16mf4(__VA_ARGS__)

#define	vsuxseg8ei64_v_i16mf4_m(...) __riscv_vsuxseg8ei64_v_i16mf4_m(__VA_ARGS__)

#define	vsuxseg8ei64_v_i32m1(...) __riscv_vsuxseg8ei64_v_i32m1(__VA_ARGS__)

#define	vsuxseg8ei64_v_i32m1_m(...) __riscv_vsuxseg8ei64_v_i32m1_m(__VA_ARGS__)

#define	vsuxseg8ei64_v_i32mf2(...) __riscv_vsuxseg8ei64_v_i32mf2(__VA_ARGS__)

#define	vsuxseg8ei64_v_i32mf2_m(...) __riscv_vsuxseg8ei64_v_i32mf2_m(__VA_ARGS__)

#define	vsuxseg8ei64_v_i64m1(...) __riscv_vsuxseg8ei64_v_i64m1(__VA_ARGS__)

#define	vsuxseg8ei64_v_i64m1_m(...) __riscv_vsuxseg8ei64_v_i64m1_m(__VA_ARGS__)

#define	vsuxseg8ei64_v_i8m1(...) __riscv_vsuxseg8ei64_v_i8m1(__VA_ARGS__)

#define	vsuxseg8ei64_v_i8m1_m(...) __riscv_vsuxseg8ei64_v_i8m1_m(__VA_ARGS__)

#define	vsuxseg8ei64_v_i8mf2(...) __riscv_vsuxseg8ei64_v_i8mf2(__VA_ARGS__)

#define	vsuxseg8ei64_v_i8mf2_m(...) __riscv_vsuxseg8ei64_v_i8mf2_m(__VA_ARGS__)

#define	vsuxseg8ei64_v_i8mf4(...) __riscv_vsuxseg8ei64_v_i8mf4(__VA_ARGS__)

#define	vsuxseg8ei64_v_i8mf4_m(...) __riscv_vsuxseg8ei64_v_i8mf4_m(__VA_ARGS__)

#define	vsuxseg8ei64_v_i8mf8(...) __riscv_vsuxseg8ei64_v_i8mf8(__VA_ARGS__)

#define	vsuxseg8ei64_v_i8mf8_m(...) __riscv_vsuxseg8ei64_v_i8mf8_m(__VA_ARGS__)

#define	vsuxseg8ei64_v_u16m1(...) __riscv_vsuxseg8ei64_v_u16m1(__VA_ARGS__)

#define	vsuxseg8ei64_v_u16m1_m(...) __riscv_vsuxseg8ei64_v_u16m1_m(__VA_ARGS__)

#define	vsuxseg8ei64_v_u16mf2(...) __riscv_vsuxseg8ei64_v_u16mf2(__VA_ARGS__)

#define	vsuxseg8ei64_v_u16mf2_m(...) __riscv_vsuxseg8ei64_v_u16mf2_m(__VA_ARGS__)

#define	vsuxseg8ei64_v_u16mf4(...) __riscv_vsuxseg8ei64_v_u16mf4(__VA_ARGS__)

#define	vsuxseg8ei64_v_u16mf4_m(...) __riscv_vsuxseg8ei64_v_u16mf4_m(__VA_ARGS__)

#define	vsuxseg8ei64_v_u32m1(...) __riscv_vsuxseg8ei64_v_u32m1(__VA_ARGS__)

#define	vsuxseg8ei64_v_u32m1_m(...) __riscv_vsuxseg8ei64_v_u32m1_m(__VA_ARGS__)

#define	vsuxseg8ei64_v_u32mf2(...) __riscv_vsuxseg8ei64_v_u32mf2(__VA_ARGS__)

#define	vsuxseg8ei64_v_u32mf2_m(...) __riscv_vsuxseg8ei64_v_u32mf2_m(__VA_ARGS__)

#define	vsuxseg8ei64_v_u64m1(...) __riscv_vsuxseg8ei64_v_u64m1(__VA_ARGS__)

#define	vsuxseg8ei64_v_u64m1_m(...) __riscv_vsuxseg8ei64_v_u64m1_m(__VA_ARGS__)

#define	vsuxseg8ei64_v_u8m1(...) __riscv_vsuxseg8ei64_v_u8m1(__VA_ARGS__)

#define	vsuxseg8ei64_v_u8m1_m(...) __riscv_vsuxseg8ei64_v_u8m1_m(__VA_ARGS__)

#define	vsuxseg8ei64_v_u8mf2(...) __riscv_vsuxseg8ei64_v_u8mf2(__VA_ARGS__)

#define	vsuxseg8ei64_v_u8mf2_m(...) __riscv_vsuxseg8ei64_v_u8mf2_m(__VA_ARGS__)

#define	vsuxseg8ei64_v_u8mf4(...) __riscv_vsuxseg8ei64_v_u8mf4(__VA_ARGS__)

#define	vsuxseg8ei64_v_u8mf4_m(...) __riscv_vsuxseg8ei64_v_u8mf4_m(__VA_ARGS__)

#define	vsuxseg8ei64_v_u8mf8(...) __riscv_vsuxseg8ei64_v_u8mf8(__VA_ARGS__)

#define	vsuxseg8ei64_v_u8mf8_m(...) __riscv_vsuxseg8ei64_v_u8mf8_m(__VA_ARGS__)

#define	vsuxseg8ei8_v_f16m1(...) __riscv_vsuxseg8ei8_v_f16m1(__VA_ARGS__)

#define	vsuxseg8ei8_v_f16m1_m(...) __riscv_vsuxseg8ei8_v_f16m1_m(__VA_ARGS__)

#define	vsuxseg8ei8_v_f16mf2(...) __riscv_vsuxseg8ei8_v_f16mf2(__VA_ARGS__)

#define	vsuxseg8ei8_v_f16mf2_m(...) __riscv_vsuxseg8ei8_v_f16mf2_m(__VA_ARGS__)

#define	vsuxseg8ei8_v_f16mf4(...) __riscv_vsuxseg8ei8_v_f16mf4(__VA_ARGS__)

#define	vsuxseg8ei8_v_f16mf4_m(...) __riscv_vsuxseg8ei8_v_f16mf4_m(__VA_ARGS__)

#define	vsuxseg8ei8_v_f32m1(...) __riscv_vsuxseg8ei8_v_f32m1(__VA_ARGS__)

#define	vsuxseg8ei8_v_f32m1_m(...) __riscv_vsuxseg8ei8_v_f32m1_m(__VA_ARGS__)

#define	vsuxseg8ei8_v_f32mf2(...) __riscv_vsuxseg8ei8_v_f32mf2(__VA_ARGS__)

#define	vsuxseg8ei8_v_f32mf2_m(...) __riscv_vsuxseg8ei8_v_f32mf2_m(__VA_ARGS__)

#define	vsuxseg8ei8_v_f64m1(...) __riscv_vsuxseg8ei8_v_f64m1(__VA_ARGS__)

#define	vsuxseg8ei8_v_f64m1_m(...) __riscv_vsuxseg8ei8_v_f64m1_m(__VA_ARGS__)

#define	vsuxseg8ei8_v_i16m1(...) __riscv_vsuxseg8ei8_v_i16m1(__VA_ARGS__)

#define	vsuxseg8ei8_v_i16m1_m(...) __riscv_vsuxseg8ei8_v_i16m1_m(__VA_ARGS__)

#define	vsuxseg8ei8_v_i16mf2(...) __riscv_vsuxseg8ei8_v_i16mf2(__VA_ARGS__)

#define	vsuxseg8ei8_v_i16mf2_m(...) __riscv_vsuxseg8ei8_v_i16mf2_m(__VA_ARGS__)

#define	vsuxseg8ei8_v_i16mf4(...) __riscv_vsuxseg8ei8_v_i16mf4(__VA_ARGS__)

#define	vsuxseg8ei8_v_i16mf4_m(...) __riscv_vsuxseg8ei8_v_i16mf4_m(__VA_ARGS__)

#define	vsuxseg8ei8_v_i32m1(...) __riscv_vsuxseg8ei8_v_i32m1(__VA_ARGS__)

#define	vsuxseg8ei8_v_i32m1_m(...) __riscv_vsuxseg8ei8_v_i32m1_m(__VA_ARGS__)

#define	vsuxseg8ei8_v_i32mf2(...) __riscv_vsuxseg8ei8_v_i32mf2(__VA_ARGS__)

#define	vsuxseg8ei8_v_i32mf2_m(...) __riscv_vsuxseg8ei8_v_i32mf2_m(__VA_ARGS__)

#define	vsuxseg8ei8_v_i64m1(...) __riscv_vsuxseg8ei8_v_i64m1(__VA_ARGS__)

#define	vsuxseg8ei8_v_i64m1_m(...) __riscv_vsuxseg8ei8_v_i64m1_m(__VA_ARGS__)

#define	vsuxseg8ei8_v_i8m1(...) __riscv_vsuxseg8ei8_v_i8m1(__VA_ARGS__)

#define	vsuxseg8ei8_v_i8m1_m(...) __riscv_vsuxseg8ei8_v_i8m1_m(__VA_ARGS__)

#define	vsuxseg8ei8_v_i8mf2(...) __riscv_vsuxseg8ei8_v_i8mf2(__VA_ARGS__)

#define	vsuxseg8ei8_v_i8mf2_m(...) __riscv_vsuxseg8ei8_v_i8mf2_m(__VA_ARGS__)

#define	vsuxseg8ei8_v_i8mf4(...) __riscv_vsuxseg8ei8_v_i8mf4(__VA_ARGS__)

#define	vsuxseg8ei8_v_i8mf4_m(...) __riscv_vsuxseg8ei8_v_i8mf4_m(__VA_ARGS__)

#define	vsuxseg8ei8_v_i8mf8(...) __riscv_vsuxseg8ei8_v_i8mf8(__VA_ARGS__)

#define	vsuxseg8ei8_v_i8mf8_m(...) __riscv_vsuxseg8ei8_v_i8mf8_m(__VA_ARGS__)

#define	vsuxseg8ei8_v_u16m1(...) __riscv_vsuxseg8ei8_v_u16m1(__VA_ARGS__)

#define	vsuxseg8ei8_v_u16m1_m(...) __riscv_vsuxseg8ei8_v_u16m1_m(__VA_ARGS__)

#define	vsuxseg8ei8_v_u16mf2(...) __riscv_vsuxseg8ei8_v_u16mf2(__VA_ARGS__)

#define	vsuxseg8ei8_v_u16mf2_m(...) __riscv_vsuxseg8ei8_v_u16mf2_m(__VA_ARGS__)

#define	vsuxseg8ei8_v_u16mf4(...) __riscv_vsuxseg8ei8_v_u16mf4(__VA_ARGS__)

#define	vsuxseg8ei8_v_u16mf4_m(...) __riscv_vsuxseg8ei8_v_u16mf4_m(__VA_ARGS__)

#define	vsuxseg8ei8_v_u32m1(...) __riscv_vsuxseg8ei8_v_u32m1(__VA_ARGS__)

#define	vsuxseg8ei8_v_u32m1_m(...) __riscv_vsuxseg8ei8_v_u32m1_m(__VA_ARGS__)

#define	vsuxseg8ei8_v_u32mf2(...) __riscv_vsuxseg8ei8_v_u32mf2(__VA_ARGS__)

#define	vsuxseg8ei8_v_u32mf2_m(...) __riscv_vsuxseg8ei8_v_u32mf2_m(__VA_ARGS__)

#define	vsuxseg8ei8_v_u64m1(...) __riscv_vsuxseg8ei8_v_u64m1(__VA_ARGS__)

#define	vsuxseg8ei8_v_u64m1_m(...) __riscv_vsuxseg8ei8_v_u64m1_m(__VA_ARGS__)

#define	vsuxseg8ei8_v_u8m1(...) __riscv_vsuxseg8ei8_v_u8m1(__VA_ARGS__)

#define	vsuxseg8ei8_v_u8m1_m(...) __riscv_vsuxseg8ei8_v_u8m1_m(__VA_ARGS__)

#define	vsuxseg8ei8_v_u8mf2(...) __riscv_vsuxseg8ei8_v_u8mf2(__VA_ARGS__)

#define	vsuxseg8ei8_v_u8mf2_m(...) __riscv_vsuxseg8ei8_v_u8mf2_m(__VA_ARGS__)

#define	vsuxseg8ei8_v_u8mf4(...) __riscv_vsuxseg8ei8_v_u8mf4(__VA_ARGS__)

#define	vsuxseg8ei8_v_u8mf4_m(...) __riscv_vsuxseg8ei8_v_u8mf4_m(__VA_ARGS__)

#define	vsuxseg8ei8_v_u8mf8(...) __riscv_vsuxseg8ei8_v_u8mf8(__VA_ARGS__)

#define	vsuxseg8ei8_v_u8mf8_m(...) __riscv_vsuxseg8ei8_v_u8mf8_m(__VA_ARGS__)

#define	vundefined_f16m1(...) __riscv_vundefined_f16m1(__VA_ARGS__)

#define	vundefined_f16m2(...) __riscv_vundefined_f16m2(__VA_ARGS__)

#define	vundefined_f16m4(...) __riscv_vundefined_f16m4(__VA_ARGS__)

#define	vundefined_f16m8(...) __riscv_vundefined_f16m8(__VA_ARGS__)

#define	vundefined_f16mf2(...) __riscv_vundefined_f16mf2(__VA_ARGS__)

#define	vundefined_f16mf4(...) __riscv_vundefined_f16mf4(__VA_ARGS__)

#define	vundefined_f32m1(...) __riscv_vundefined_f32m1(__VA_ARGS__)

#define	vundefined_f32m2(...) __riscv_vundefined_f32m2(__VA_ARGS__)

#define	vundefined_f32m4(...) __riscv_vundefined_f32m4(__VA_ARGS__)

#define	vundefined_f32m8(...) __riscv_vundefined_f32m8(__VA_ARGS__)

#define	vundefined_f32mf2(...) __riscv_vundefined_f32mf2(__VA_ARGS__)

#define	vundefined_f64m1(...) __riscv_vundefined_f64m1(__VA_ARGS__)

#define	vundefined_f64m2(...) __riscv_vundefined_f64m2(__VA_ARGS__)

#define	vundefined_f64m4(...) __riscv_vundefined_f64m4(__VA_ARGS__)

#define	vundefined_f64m8(...) __riscv_vundefined_f64m8(__VA_ARGS__)

#define	vundefined_i16m1(...) __riscv_vundefined_i16m1(__VA_ARGS__)

#define	vundefined_i16m2(...) __riscv_vundefined_i16m2(__VA_ARGS__)

#define	vundefined_i16m4(...) __riscv_vundefined_i16m4(__VA_ARGS__)

#define	vundefined_i16m8(...) __riscv_vundefined_i16m8(__VA_ARGS__)

#define	vundefined_i16mf2(...) __riscv_vundefined_i16mf2(__VA_ARGS__)

#define	vundefined_i16mf4(...) __riscv_vundefined_i16mf4(__VA_ARGS__)

#define	vundefined_i32m1(...) __riscv_vundefined_i32m1(__VA_ARGS__)

#define	vundefined_i32m2(...) __riscv_vundefined_i32m2(__VA_ARGS__)

#define	vundefined_i32m4(...) __riscv_vundefined_i32m4(__VA_ARGS__)

#define	vundefined_i32m8(...) __riscv_vundefined_i32m8(__VA_ARGS__)

#define	vundefined_i32mf2(...) __riscv_vundefined_i32mf2(__VA_ARGS__)

#define	vundefined_i64m1(...) __riscv_vundefined_i64m1(__VA_ARGS__)

#define	vundefined_i64m2(...) __riscv_vundefined_i64m2(__VA_ARGS__)

#define	vundefined_i64m4(...) __riscv_vundefined_i64m4(__VA_ARGS__)

#define	vundefined_i64m8(...) __riscv_vundefined_i64m8(__VA_ARGS__)

#define	vundefined_i8m1(...) __riscv_vundefined_i8m1(__VA_ARGS__)

#define	vundefined_i8m2(...) __riscv_vundefined_i8m2(__VA_ARGS__)

#define	vundefined_i8m4(...) __riscv_vundefined_i8m4(__VA_ARGS__)

#define	vundefined_i8m8(...) __riscv_vundefined_i8m8(__VA_ARGS__)

#define	vundefined_i8mf2(...) __riscv_vundefined_i8mf2(__VA_ARGS__)

#define	vundefined_i8mf4(...) __riscv_vundefined_i8mf4(__VA_ARGS__)

#define	vundefined_i8mf8(...) __riscv_vundefined_i8mf8(__VA_ARGS__)

#define	vundefined_u16m1(...) __riscv_vundefined_u16m1(__VA_ARGS__)

#define	vundefined_u16m2(...) __riscv_vundefined_u16m2(__VA_ARGS__)

#define	vundefined_u16m4(...) __riscv_vundefined_u16m4(__VA_ARGS__)

#define	vundefined_u16m8(...) __riscv_vundefined_u16m8(__VA_ARGS__)

#define	vundefined_u16mf2(...) __riscv_vundefined_u16mf2(__VA_ARGS__)

#define	vundefined_u16mf4(...) __riscv_vundefined_u16mf4(__VA_ARGS__)

#define	vundefined_u32m1(...) __riscv_vundefined_u32m1(__VA_ARGS__)

#define	vundefined_u32m2(...) __riscv_vundefined_u32m2(__VA_ARGS__)

#define	vundefined_u32m4(...) __riscv_vundefined_u32m4(__VA_ARGS__)

#define	vundefined_u32m8(...) __riscv_vundefined_u32m8(__VA_ARGS__)

#define	vundefined_u32mf2(...) __riscv_vundefined_u32mf2(__VA_ARGS__)

#define	vundefined_u64m1(...) __riscv_vundefined_u64m1(__VA_ARGS__)

#define	vundefined_u64m2(...) __riscv_vundefined_u64m2(__VA_ARGS__)

#define	vundefined_u64m4(...) __riscv_vundefined_u64m4(__VA_ARGS__)

#define	vundefined_u64m8(...) __riscv_vundefined_u64m8(__VA_ARGS__)

#define	vundefined_u8m1(...) __riscv_vundefined_u8m1(__VA_ARGS__)

#define	vundefined_u8m2(...) __riscv_vundefined_u8m2(__VA_ARGS__)

#define	vundefined_u8m4(...) __riscv_vundefined_u8m4(__VA_ARGS__)

#define	vundefined_u8m8(...) __riscv_vundefined_u8m8(__VA_ARGS__)

#define	vundefined_u8mf2(...) __riscv_vundefined_u8mf2(__VA_ARGS__)

#define	vundefined_u8mf4(...) __riscv_vundefined_u8mf4(__VA_ARGS__)

#define	vundefined_u8mf8(...) __riscv_vundefined_u8mf8(__VA_ARGS__)

#define	vwadd_vv_i16m1(...) __riscv_vwadd_vv_i16m1(__VA_ARGS__)

#define	vwadd_vv_i16m1_m(...) __riscv_vwadd_vv_i16m1_tumu(__VA_ARGS__)

#define	vwadd_vv_i16m2(...) __riscv_vwadd_vv_i16m2(__VA_ARGS__)

#define	vwadd_vv_i16m2_m(...) __riscv_vwadd_vv_i16m2_tumu(__VA_ARGS__)

#define	vwadd_vv_i16m4(...) __riscv_vwadd_vv_i16m4(__VA_ARGS__)

#define	vwadd_vv_i16m4_m(...) __riscv_vwadd_vv_i16m4_tumu(__VA_ARGS__)

#define	vwadd_vv_i16m8(...) __riscv_vwadd_vv_i16m8(__VA_ARGS__)

#define	vwadd_vv_i16m8_m(...) __riscv_vwadd_vv_i16m8_tumu(__VA_ARGS__)

#define	vwadd_vv_i16mf2(...) __riscv_vwadd_vv_i16mf2(__VA_ARGS__)

#define	vwadd_vv_i16mf2_m(...) __riscv_vwadd_vv_i16mf2_tumu(__VA_ARGS__)

#define	vwadd_vv_i16mf4(...) __riscv_vwadd_vv_i16mf4(__VA_ARGS__)

#define	vwadd_vv_i16mf4_m(...) __riscv_vwadd_vv_i16mf4_tumu(__VA_ARGS__)

#define	vwadd_vv_i32m1(...) __riscv_vwadd_vv_i32m1(__VA_ARGS__)

#define	vwadd_vv_i32m1_m(...) __riscv_vwadd_vv_i32m1_tumu(__VA_ARGS__)

#define	vwadd_vv_i32m2(...) __riscv_vwadd_vv_i32m2(__VA_ARGS__)

#define	vwadd_vv_i32m2_m(...) __riscv_vwadd_vv_i32m2_tumu(__VA_ARGS__)

#define	vwadd_vv_i32m4(...) __riscv_vwadd_vv_i32m4(__VA_ARGS__)

#define	vwadd_vv_i32m4_m(...) __riscv_vwadd_vv_i32m4_tumu(__VA_ARGS__)

#define	vwadd_vv_i32m8(...) __riscv_vwadd_vv_i32m8(__VA_ARGS__)

#define	vwadd_vv_i32m8_m(...) __riscv_vwadd_vv_i32m8_tumu(__VA_ARGS__)

#define	vwadd_vv_i32mf2(...) __riscv_vwadd_vv_i32mf2(__VA_ARGS__)

#define	vwadd_vv_i32mf2_m(...) __riscv_vwadd_vv_i32mf2_tumu(__VA_ARGS__)

#define	vwadd_vv_i64m1(...) __riscv_vwadd_vv_i64m1(__VA_ARGS__)

#define	vwadd_vv_i64m1_m(...) __riscv_vwadd_vv_i64m1_tumu(__VA_ARGS__)

#define	vwadd_vv_i64m2(...) __riscv_vwadd_vv_i64m2(__VA_ARGS__)

#define	vwadd_vv_i64m2_m(...) __riscv_vwadd_vv_i64m2_tumu(__VA_ARGS__)

#define	vwadd_vv_i64m4(...) __riscv_vwadd_vv_i64m4(__VA_ARGS__)

#define	vwadd_vv_i64m4_m(...) __riscv_vwadd_vv_i64m4_tumu(__VA_ARGS__)

#define	vwadd_vv_i64m8(...) __riscv_vwadd_vv_i64m8(__VA_ARGS__)

#define	vwadd_vv_i64m8_m(...) __riscv_vwadd_vv_i64m8_tumu(__VA_ARGS__)

#define	vwadd_vx_i16m1(...) __riscv_vwadd_vx_i16m1(__VA_ARGS__)

#define	vwadd_vx_i16m1_m(...) __riscv_vwadd_vx_i16m1_tumu(__VA_ARGS__)

#define	vwadd_vx_i16m2(...) __riscv_vwadd_vx_i16m2(__VA_ARGS__)

#define	vwadd_vx_i16m2_m(...) __riscv_vwadd_vx_i16m2_tumu(__VA_ARGS__)

#define	vwadd_vx_i16m4(...) __riscv_vwadd_vx_i16m4(__VA_ARGS__)

#define	vwadd_vx_i16m4_m(...) __riscv_vwadd_vx_i16m4_tumu(__VA_ARGS__)

#define	vwadd_vx_i16m8(...) __riscv_vwadd_vx_i16m8(__VA_ARGS__)

#define	vwadd_vx_i16m8_m(...) __riscv_vwadd_vx_i16m8_tumu(__VA_ARGS__)

#define	vwadd_vx_i16mf2(...) __riscv_vwadd_vx_i16mf2(__VA_ARGS__)

#define	vwadd_vx_i16mf2_m(...) __riscv_vwadd_vx_i16mf2_tumu(__VA_ARGS__)

#define	vwadd_vx_i16mf4(...) __riscv_vwadd_vx_i16mf4(__VA_ARGS__)

#define	vwadd_vx_i16mf4_m(...) __riscv_vwadd_vx_i16mf4_tumu(__VA_ARGS__)

#define	vwadd_vx_i32m1(...) __riscv_vwadd_vx_i32m1(__VA_ARGS__)

#define	vwadd_vx_i32m1_m(...) __riscv_vwadd_vx_i32m1_tumu(__VA_ARGS__)

#define	vwadd_vx_i32m2(...) __riscv_vwadd_vx_i32m2(__VA_ARGS__)

#define	vwadd_vx_i32m2_m(...) __riscv_vwadd_vx_i32m2_tumu(__VA_ARGS__)

#define	vwadd_vx_i32m4(...) __riscv_vwadd_vx_i32m4(__VA_ARGS__)

#define	vwadd_vx_i32m4_m(...) __riscv_vwadd_vx_i32m4_tumu(__VA_ARGS__)

#define	vwadd_vx_i32m8(...) __riscv_vwadd_vx_i32m8(__VA_ARGS__)

#define	vwadd_vx_i32m8_m(...) __riscv_vwadd_vx_i32m8_tumu(__VA_ARGS__)

#define	vwadd_vx_i32mf2(...) __riscv_vwadd_vx_i32mf2(__VA_ARGS__)

#define	vwadd_vx_i32mf2_m(...) __riscv_vwadd_vx_i32mf2_tumu(__VA_ARGS__)

#define	vwadd_vx_i64m1(...) __riscv_vwadd_vx_i64m1(__VA_ARGS__)

#define	vwadd_vx_i64m1_m(...) __riscv_vwadd_vx_i64m1_tumu(__VA_ARGS__)

#define	vwadd_vx_i64m2(...) __riscv_vwadd_vx_i64m2(__VA_ARGS__)

#define	vwadd_vx_i64m2_m(...) __riscv_vwadd_vx_i64m2_tumu(__VA_ARGS__)

#define	vwadd_vx_i64m4(...) __riscv_vwadd_vx_i64m4(__VA_ARGS__)

#define	vwadd_vx_i64m4_m(...) __riscv_vwadd_vx_i64m4_tumu(__VA_ARGS__)

#define	vwadd_vx_i64m8(...) __riscv_vwadd_vx_i64m8(__VA_ARGS__)

#define	vwadd_vx_i64m8_m(...) __riscv_vwadd_vx_i64m8_tumu(__VA_ARGS__)

#define	vwadd_wv_i16m1(...) __riscv_vwadd_wv_i16m1(__VA_ARGS__)

#define	vwadd_wv_i16m1_m(...) __riscv_vwadd_wv_i16m1_tumu(__VA_ARGS__)

#define	vwadd_wv_i16m2(...) __riscv_vwadd_wv_i16m2(__VA_ARGS__)

#define	vwadd_wv_i16m2_m(...) __riscv_vwadd_wv_i16m2_tumu(__VA_ARGS__)

#define	vwadd_wv_i16m4(...) __riscv_vwadd_wv_i16m4(__VA_ARGS__)

#define	vwadd_wv_i16m4_m(...) __riscv_vwadd_wv_i16m4_tumu(__VA_ARGS__)

#define	vwadd_wv_i16m8(...) __riscv_vwadd_wv_i16m8(__VA_ARGS__)

#define	vwadd_wv_i16m8_m(...) __riscv_vwadd_wv_i16m8_tumu(__VA_ARGS__)

#define	vwadd_wv_i16mf2(...) __riscv_vwadd_wv_i16mf2(__VA_ARGS__)

#define	vwadd_wv_i16mf2_m(...) __riscv_vwadd_wv_i16mf2_tumu(__VA_ARGS__)

#define	vwadd_wv_i16mf4(...) __riscv_vwadd_wv_i16mf4(__VA_ARGS__)

#define	vwadd_wv_i16mf4_m(...) __riscv_vwadd_wv_i16mf4_tumu(__VA_ARGS__)

#define	vwadd_wv_i32m1(...) __riscv_vwadd_wv_i32m1(__VA_ARGS__)

#define	vwadd_wv_i32m1_m(...) __riscv_vwadd_wv_i32m1_tumu(__VA_ARGS__)

#define	vwadd_wv_i32m2(...) __riscv_vwadd_wv_i32m2(__VA_ARGS__)

#define	vwadd_wv_i32m2_m(...) __riscv_vwadd_wv_i32m2_tumu(__VA_ARGS__)

#define	vwadd_wv_i32m4(...) __riscv_vwadd_wv_i32m4(__VA_ARGS__)

#define	vwadd_wv_i32m4_m(...) __riscv_vwadd_wv_i32m4_tumu(__VA_ARGS__)

#define	vwadd_wv_i32m8(...) __riscv_vwadd_wv_i32m8(__VA_ARGS__)

#define	vwadd_wv_i32m8_m(...) __riscv_vwadd_wv_i32m8_tumu(__VA_ARGS__)

#define	vwadd_wv_i32mf2(...) __riscv_vwadd_wv_i32mf2(__VA_ARGS__)

#define	vwadd_wv_i32mf2_m(...) __riscv_vwadd_wv_i32mf2_tumu(__VA_ARGS__)

#define	vwadd_wv_i64m1(...) __riscv_vwadd_wv_i64m1(__VA_ARGS__)

#define	vwadd_wv_i64m1_m(...) __riscv_vwadd_wv_i64m1_tumu(__VA_ARGS__)

#define	vwadd_wv_i64m2(...) __riscv_vwadd_wv_i64m2(__VA_ARGS__)

#define	vwadd_wv_i64m2_m(...) __riscv_vwadd_wv_i64m2_tumu(__VA_ARGS__)

#define	vwadd_wv_i64m4(...) __riscv_vwadd_wv_i64m4(__VA_ARGS__)

#define	vwadd_wv_i64m4_m(...) __riscv_vwadd_wv_i64m4_tumu(__VA_ARGS__)

#define	vwadd_wv_i64m8(...) __riscv_vwadd_wv_i64m8(__VA_ARGS__)

#define	vwadd_wv_i64m8_m(...) __riscv_vwadd_wv_i64m8_tumu(__VA_ARGS__)

#define	vwadd_wx_i16m1(...) __riscv_vwadd_wx_i16m1(__VA_ARGS__)

#define	vwadd_wx_i16m1_m(...) __riscv_vwadd_wx_i16m1_tumu(__VA_ARGS__)

#define	vwadd_wx_i16m2(...) __riscv_vwadd_wx_i16m2(__VA_ARGS__)

#define	vwadd_wx_i16m2_m(...) __riscv_vwadd_wx_i16m2_tumu(__VA_ARGS__)

#define	vwadd_wx_i16m4(...) __riscv_vwadd_wx_i16m4(__VA_ARGS__)

#define	vwadd_wx_i16m4_m(...) __riscv_vwadd_wx_i16m4_tumu(__VA_ARGS__)

#define	vwadd_wx_i16m8(...) __riscv_vwadd_wx_i16m8(__VA_ARGS__)

#define	vwadd_wx_i16m8_m(...) __riscv_vwadd_wx_i16m8_tumu(__VA_ARGS__)

#define	vwadd_wx_i16mf2(...) __riscv_vwadd_wx_i16mf2(__VA_ARGS__)

#define	vwadd_wx_i16mf2_m(...) __riscv_vwadd_wx_i16mf2_tumu(__VA_ARGS__)

#define	vwadd_wx_i16mf4(...) __riscv_vwadd_wx_i16mf4(__VA_ARGS__)

#define	vwadd_wx_i16mf4_m(...) __riscv_vwadd_wx_i16mf4_tumu(__VA_ARGS__)

#define	vwadd_wx_i32m1(...) __riscv_vwadd_wx_i32m1(__VA_ARGS__)

#define	vwadd_wx_i32m1_m(...) __riscv_vwadd_wx_i32m1_tumu(__VA_ARGS__)

#define	vwadd_wx_i32m2(...) __riscv_vwadd_wx_i32m2(__VA_ARGS__)

#define	vwadd_wx_i32m2_m(...) __riscv_vwadd_wx_i32m2_tumu(__VA_ARGS__)

#define	vwadd_wx_i32m4(...) __riscv_vwadd_wx_i32m4(__VA_ARGS__)

#define	vwadd_wx_i32m4_m(...) __riscv_vwadd_wx_i32m4_tumu(__VA_ARGS__)

#define	vwadd_wx_i32m8(...) __riscv_vwadd_wx_i32m8(__VA_ARGS__)

#define	vwadd_wx_i32m8_m(...) __riscv_vwadd_wx_i32m8_tumu(__VA_ARGS__)

#define	vwadd_wx_i32mf2(...) __riscv_vwadd_wx_i32mf2(__VA_ARGS__)

#define	vwadd_wx_i32mf2_m(...) __riscv_vwadd_wx_i32mf2_tumu(__VA_ARGS__)

#define	vwadd_wx_i64m1(...) __riscv_vwadd_wx_i64m1(__VA_ARGS__)

#define	vwadd_wx_i64m1_m(...) __riscv_vwadd_wx_i64m1_tumu(__VA_ARGS__)

#define	vwadd_wx_i64m2(...) __riscv_vwadd_wx_i64m2(__VA_ARGS__)

#define	vwadd_wx_i64m2_m(...) __riscv_vwadd_wx_i64m2_tumu(__VA_ARGS__)

#define	vwadd_wx_i64m4(...) __riscv_vwadd_wx_i64m4(__VA_ARGS__)

#define	vwadd_wx_i64m4_m(...) __riscv_vwadd_wx_i64m4_tumu(__VA_ARGS__)

#define	vwadd_wx_i64m8(...) __riscv_vwadd_wx_i64m8(__VA_ARGS__)

#define	vwadd_wx_i64m8_m(...) __riscv_vwadd_wx_i64m8_tumu(__VA_ARGS__)

#define	vwaddu_vv_u16m1(...) __riscv_vwaddu_vv_u16m1(__VA_ARGS__)

#define	vwaddu_vv_u16m1_m(...) __riscv_vwaddu_vv_u16m1_tumu(__VA_ARGS__)

#define	vwaddu_vv_u16m2(...) __riscv_vwaddu_vv_u16m2(__VA_ARGS__)

#define	vwaddu_vv_u16m2_m(...) __riscv_vwaddu_vv_u16m2_tumu(__VA_ARGS__)

#define	vwaddu_vv_u16m4(...) __riscv_vwaddu_vv_u16m4(__VA_ARGS__)

#define	vwaddu_vv_u16m4_m(...) __riscv_vwaddu_vv_u16m4_tumu(__VA_ARGS__)

#define	vwaddu_vv_u16m8(...) __riscv_vwaddu_vv_u16m8(__VA_ARGS__)

#define	vwaddu_vv_u16m8_m(...) __riscv_vwaddu_vv_u16m8_tumu(__VA_ARGS__)

#define	vwaddu_vv_u16mf2(...) __riscv_vwaddu_vv_u16mf2(__VA_ARGS__)

#define	vwaddu_vv_u16mf2_m(...) __riscv_vwaddu_vv_u16mf2_tumu(__VA_ARGS__)

#define	vwaddu_vv_u16mf4(...) __riscv_vwaddu_vv_u16mf4(__VA_ARGS__)

#define	vwaddu_vv_u16mf4_m(...) __riscv_vwaddu_vv_u16mf4_tumu(__VA_ARGS__)

#define	vwaddu_vv_u32m1(...) __riscv_vwaddu_vv_u32m1(__VA_ARGS__)

#define	vwaddu_vv_u32m1_m(...) __riscv_vwaddu_vv_u32m1_tumu(__VA_ARGS__)

#define	vwaddu_vv_u32m2(...) __riscv_vwaddu_vv_u32m2(__VA_ARGS__)

#define	vwaddu_vv_u32m2_m(...) __riscv_vwaddu_vv_u32m2_tumu(__VA_ARGS__)

#define	vwaddu_vv_u32m4(...) __riscv_vwaddu_vv_u32m4(__VA_ARGS__)

#define	vwaddu_vv_u32m4_m(...) __riscv_vwaddu_vv_u32m4_tumu(__VA_ARGS__)

#define	vwaddu_vv_u32m8(...) __riscv_vwaddu_vv_u32m8(__VA_ARGS__)

#define	vwaddu_vv_u32m8_m(...) __riscv_vwaddu_vv_u32m8_tumu(__VA_ARGS__)

#define	vwaddu_vv_u32mf2(...) __riscv_vwaddu_vv_u32mf2(__VA_ARGS__)

#define	vwaddu_vv_u32mf2_m(...) __riscv_vwaddu_vv_u32mf2_tumu(__VA_ARGS__)

#define	vwaddu_vv_u64m1(...) __riscv_vwaddu_vv_u64m1(__VA_ARGS__)

#define	vwaddu_vv_u64m1_m(...) __riscv_vwaddu_vv_u64m1_tumu(__VA_ARGS__)

#define	vwaddu_vv_u64m2(...) __riscv_vwaddu_vv_u64m2(__VA_ARGS__)

#define	vwaddu_vv_u64m2_m(...) __riscv_vwaddu_vv_u64m2_tumu(__VA_ARGS__)

#define	vwaddu_vv_u64m4(...) __riscv_vwaddu_vv_u64m4(__VA_ARGS__)

#define	vwaddu_vv_u64m4_m(...) __riscv_vwaddu_vv_u64m4_tumu(__VA_ARGS__)

#define	vwaddu_vv_u64m8(...) __riscv_vwaddu_vv_u64m8(__VA_ARGS__)

#define	vwaddu_vv_u64m8_m(...) __riscv_vwaddu_vv_u64m8_tumu(__VA_ARGS__)

#define	vwaddu_vx_u16m1(...) __riscv_vwaddu_vx_u16m1(__VA_ARGS__)

#define	vwaddu_vx_u16m1_m(...) __riscv_vwaddu_vx_u16m1_tumu(__VA_ARGS__)

#define	vwaddu_vx_u16m2(...) __riscv_vwaddu_vx_u16m2(__VA_ARGS__)

#define	vwaddu_vx_u16m2_m(...) __riscv_vwaddu_vx_u16m2_tumu(__VA_ARGS__)

#define	vwaddu_vx_u16m4(...) __riscv_vwaddu_vx_u16m4(__VA_ARGS__)

#define	vwaddu_vx_u16m4_m(...) __riscv_vwaddu_vx_u16m4_tumu(__VA_ARGS__)

#define	vwaddu_vx_u16m8(...) __riscv_vwaddu_vx_u16m8(__VA_ARGS__)

#define	vwaddu_vx_u16m8_m(...) __riscv_vwaddu_vx_u16m8_tumu(__VA_ARGS__)

#define	vwaddu_vx_u16mf2(...) __riscv_vwaddu_vx_u16mf2(__VA_ARGS__)

#define	vwaddu_vx_u16mf2_m(...) __riscv_vwaddu_vx_u16mf2_tumu(__VA_ARGS__)

#define	vwaddu_vx_u16mf4(...) __riscv_vwaddu_vx_u16mf4(__VA_ARGS__)

#define	vwaddu_vx_u16mf4_m(...) __riscv_vwaddu_vx_u16mf4_tumu(__VA_ARGS__)

#define	vwaddu_vx_u32m1(...) __riscv_vwaddu_vx_u32m1(__VA_ARGS__)

#define	vwaddu_vx_u32m1_m(...) __riscv_vwaddu_vx_u32m1_tumu(__VA_ARGS__)

#define	vwaddu_vx_u32m2(...) __riscv_vwaddu_vx_u32m2(__VA_ARGS__)

#define	vwaddu_vx_u32m2_m(...) __riscv_vwaddu_vx_u32m2_tumu(__VA_ARGS__)

#define	vwaddu_vx_u32m4(...) __riscv_vwaddu_vx_u32m4(__VA_ARGS__)

#define	vwaddu_vx_u32m4_m(...) __riscv_vwaddu_vx_u32m4_tumu(__VA_ARGS__)

#define	vwaddu_vx_u32m8(...) __riscv_vwaddu_vx_u32m8(__VA_ARGS__)

#define	vwaddu_vx_u32m8_m(...) __riscv_vwaddu_vx_u32m8_tumu(__VA_ARGS__)

#define	vwaddu_vx_u32mf2(...) __riscv_vwaddu_vx_u32mf2(__VA_ARGS__)

#define	vwaddu_vx_u32mf2_m(...) __riscv_vwaddu_vx_u32mf2_tumu(__VA_ARGS__)

#define	vwaddu_vx_u64m1(...) __riscv_vwaddu_vx_u64m1(__VA_ARGS__)

#define	vwaddu_vx_u64m1_m(...) __riscv_vwaddu_vx_u64m1_tumu(__VA_ARGS__)

#define	vwaddu_vx_u64m2(...) __riscv_vwaddu_vx_u64m2(__VA_ARGS__)

#define	vwaddu_vx_u64m2_m(...) __riscv_vwaddu_vx_u64m2_tumu(__VA_ARGS__)

#define	vwaddu_vx_u64m4(...) __riscv_vwaddu_vx_u64m4(__VA_ARGS__)

#define	vwaddu_vx_u64m4_m(...) __riscv_vwaddu_vx_u64m4_tumu(__VA_ARGS__)

#define	vwaddu_vx_u64m8(...) __riscv_vwaddu_vx_u64m8(__VA_ARGS__)

#define	vwaddu_vx_u64m8_m(...) __riscv_vwaddu_vx_u64m8_tumu(__VA_ARGS__)

#define	vwaddu_wv_u16m1(...) __riscv_vwaddu_wv_u16m1(__VA_ARGS__)

#define	vwaddu_wv_u16m1_m(...) __riscv_vwaddu_wv_u16m1_tumu(__VA_ARGS__)

#define	vwaddu_wv_u16m2(...) __riscv_vwaddu_wv_u16m2(__VA_ARGS__)

#define	vwaddu_wv_u16m2_m(...) __riscv_vwaddu_wv_u16m2_tumu(__VA_ARGS__)

#define	vwaddu_wv_u16m4(...) __riscv_vwaddu_wv_u16m4(__VA_ARGS__)

#define	vwaddu_wv_u16m4_m(...) __riscv_vwaddu_wv_u16m4_tumu(__VA_ARGS__)

#define	vwaddu_wv_u16m8(...) __riscv_vwaddu_wv_u16m8(__VA_ARGS__)

#define	vwaddu_wv_u16m8_m(...) __riscv_vwaddu_wv_u16m8_tumu(__VA_ARGS__)

#define	vwaddu_wv_u16mf2(...) __riscv_vwaddu_wv_u16mf2(__VA_ARGS__)

#define	vwaddu_wv_u16mf2_m(...) __riscv_vwaddu_wv_u16mf2_tumu(__VA_ARGS__)

#define	vwaddu_wv_u16mf4(...) __riscv_vwaddu_wv_u16mf4(__VA_ARGS__)

#define	vwaddu_wv_u16mf4_m(...) __riscv_vwaddu_wv_u16mf4_tumu(__VA_ARGS__)

#define	vwaddu_wv_u32m1(...) __riscv_vwaddu_wv_u32m1(__VA_ARGS__)

#define	vwaddu_wv_u32m1_m(...) __riscv_vwaddu_wv_u32m1_tumu(__VA_ARGS__)

#define	vwaddu_wv_u32m2(...) __riscv_vwaddu_wv_u32m2(__VA_ARGS__)

#define	vwaddu_wv_u32m2_m(...) __riscv_vwaddu_wv_u32m2_tumu(__VA_ARGS__)

#define	vwaddu_wv_u32m4(...) __riscv_vwaddu_wv_u32m4(__VA_ARGS__)

#define	vwaddu_wv_u32m4_m(...) __riscv_vwaddu_wv_u32m4_tumu(__VA_ARGS__)

#define	vwaddu_wv_u32m8(...) __riscv_vwaddu_wv_u32m8(__VA_ARGS__)

#define	vwaddu_wv_u32m8_m(...) __riscv_vwaddu_wv_u32m8_tumu(__VA_ARGS__)

#define	vwaddu_wv_u32mf2(...) __riscv_vwaddu_wv_u32mf2(__VA_ARGS__)

#define	vwaddu_wv_u32mf2_m(...) __riscv_vwaddu_wv_u32mf2_tumu(__VA_ARGS__)

#define	vwaddu_wv_u64m1(...) __riscv_vwaddu_wv_u64m1(__VA_ARGS__)

#define	vwaddu_wv_u64m1_m(...) __riscv_vwaddu_wv_u64m1_tumu(__VA_ARGS__)

#define	vwaddu_wv_u64m2(...) __riscv_vwaddu_wv_u64m2(__VA_ARGS__)

#define	vwaddu_wv_u64m2_m(...) __riscv_vwaddu_wv_u64m2_tumu(__VA_ARGS__)

#define	vwaddu_wv_u64m4(...) __riscv_vwaddu_wv_u64m4(__VA_ARGS__)

#define	vwaddu_wv_u64m4_m(...) __riscv_vwaddu_wv_u64m4_tumu(__VA_ARGS__)

#define	vwaddu_wv_u64m8(...) __riscv_vwaddu_wv_u64m8(__VA_ARGS__)

#define	vwaddu_wv_u64m8_m(...) __riscv_vwaddu_wv_u64m8_tumu(__VA_ARGS__)

#define	vwaddu_wx_u16m1(...) __riscv_vwaddu_wx_u16m1(__VA_ARGS__)

#define	vwaddu_wx_u16m1_m(...) __riscv_vwaddu_wx_u16m1_tumu(__VA_ARGS__)

#define	vwaddu_wx_u16m2(...) __riscv_vwaddu_wx_u16m2(__VA_ARGS__)

#define	vwaddu_wx_u16m2_m(...) __riscv_vwaddu_wx_u16m2_tumu(__VA_ARGS__)

#define	vwaddu_wx_u16m4(...) __riscv_vwaddu_wx_u16m4(__VA_ARGS__)

#define	vwaddu_wx_u16m4_m(...) __riscv_vwaddu_wx_u16m4_tumu(__VA_ARGS__)

#define	vwaddu_wx_u16m8(...) __riscv_vwaddu_wx_u16m8(__VA_ARGS__)

#define	vwaddu_wx_u16m8_m(...) __riscv_vwaddu_wx_u16m8_tumu(__VA_ARGS__)

#define	vwaddu_wx_u16mf2(...) __riscv_vwaddu_wx_u16mf2(__VA_ARGS__)

#define	vwaddu_wx_u16mf2_m(...) __riscv_vwaddu_wx_u16mf2_tumu(__VA_ARGS__)

#define	vwaddu_wx_u16mf4(...) __riscv_vwaddu_wx_u16mf4(__VA_ARGS__)

#define	vwaddu_wx_u16mf4_m(...) __riscv_vwaddu_wx_u16mf4_tumu(__VA_ARGS__)

#define	vwaddu_wx_u32m1(...) __riscv_vwaddu_wx_u32m1(__VA_ARGS__)

#define	vwaddu_wx_u32m1_m(...) __riscv_vwaddu_wx_u32m1_tumu(__VA_ARGS__)

#define	vwaddu_wx_u32m2(...) __riscv_vwaddu_wx_u32m2(__VA_ARGS__)

#define	vwaddu_wx_u32m2_m(...) __riscv_vwaddu_wx_u32m2_tumu(__VA_ARGS__)

#define	vwaddu_wx_u32m4(...) __riscv_vwaddu_wx_u32m4(__VA_ARGS__)

#define	vwaddu_wx_u32m4_m(...) __riscv_vwaddu_wx_u32m4_tumu(__VA_ARGS__)

#define	vwaddu_wx_u32m8(...) __riscv_vwaddu_wx_u32m8(__VA_ARGS__)

#define	vwaddu_wx_u32m8_m(...) __riscv_vwaddu_wx_u32m8_tumu(__VA_ARGS__)

#define	vwaddu_wx_u32mf2(...) __riscv_vwaddu_wx_u32mf2(__VA_ARGS__)

#define	vwaddu_wx_u32mf2_m(...) __riscv_vwaddu_wx_u32mf2_tumu(__VA_ARGS__)

#define	vwaddu_wx_u64m1(...) __riscv_vwaddu_wx_u64m1(__VA_ARGS__)

#define	vwaddu_wx_u64m1_m(...) __riscv_vwaddu_wx_u64m1_tumu(__VA_ARGS__)

#define	vwaddu_wx_u64m2(...) __riscv_vwaddu_wx_u64m2(__VA_ARGS__)

#define	vwaddu_wx_u64m2_m(...) __riscv_vwaddu_wx_u64m2_tumu(__VA_ARGS__)

#define	vwaddu_wx_u64m4(...) __riscv_vwaddu_wx_u64m4(__VA_ARGS__)

#define	vwaddu_wx_u64m4_m(...) __riscv_vwaddu_wx_u64m4_tumu(__VA_ARGS__)

#define	vwaddu_wx_u64m8(...) __riscv_vwaddu_wx_u64m8(__VA_ARGS__)

#define	vwaddu_wx_u64m8_m(...) __riscv_vwaddu_wx_u64m8_tumu(__VA_ARGS__)

#define	vwcvt_x_x_v_i16m1(...) __riscv_vwcvt_x_x_v_i16m1(__VA_ARGS__)

#define	vwcvt_x_x_v_i16m1_m(...) __riscv_vwcvt_x_x_v_i16m1_tumu(__VA_ARGS__)

#define	vwcvt_x_x_v_i16m2(...) __riscv_vwcvt_x_x_v_i16m2(__VA_ARGS__)

#define	vwcvt_x_x_v_i16m2_m(...) __riscv_vwcvt_x_x_v_i16m2_tumu(__VA_ARGS__)

#define	vwcvt_x_x_v_i16m4(...) __riscv_vwcvt_x_x_v_i16m4(__VA_ARGS__)

#define	vwcvt_x_x_v_i16m4_m(...) __riscv_vwcvt_x_x_v_i16m4_tumu(__VA_ARGS__)

#define	vwcvt_x_x_v_i16m8(...) __riscv_vwcvt_x_x_v_i16m8(__VA_ARGS__)

#define	vwcvt_x_x_v_i16m8_m(...) __riscv_vwcvt_x_x_v_i16m8_tumu(__VA_ARGS__)

#define	vwcvt_x_x_v_i16mf2(...) __riscv_vwcvt_x_x_v_i16mf2(__VA_ARGS__)

#define	vwcvt_x_x_v_i16mf2_m(...) __riscv_vwcvt_x_x_v_i16mf2_tumu(__VA_ARGS__)

#define	vwcvt_x_x_v_i16mf4(...) __riscv_vwcvt_x_x_v_i16mf4(__VA_ARGS__)

#define	vwcvt_x_x_v_i16mf4_m(...) __riscv_vwcvt_x_x_v_i16mf4_tumu(__VA_ARGS__)

#define	vwcvt_x_x_v_i32m1(...) __riscv_vwcvt_x_x_v_i32m1(__VA_ARGS__)

#define	vwcvt_x_x_v_i32m1_m(...) __riscv_vwcvt_x_x_v_i32m1_tumu(__VA_ARGS__)

#define	vwcvt_x_x_v_i32m2(...) __riscv_vwcvt_x_x_v_i32m2(__VA_ARGS__)

#define	vwcvt_x_x_v_i32m2_m(...) __riscv_vwcvt_x_x_v_i32m2_tumu(__VA_ARGS__)

#define	vwcvt_x_x_v_i32m4(...) __riscv_vwcvt_x_x_v_i32m4(__VA_ARGS__)

#define	vwcvt_x_x_v_i32m4_m(...) __riscv_vwcvt_x_x_v_i32m4_tumu(__VA_ARGS__)

#define	vwcvt_x_x_v_i32m8(...) __riscv_vwcvt_x_x_v_i32m8(__VA_ARGS__)

#define	vwcvt_x_x_v_i32m8_m(...) __riscv_vwcvt_x_x_v_i32m8_tumu(__VA_ARGS__)

#define	vwcvt_x_x_v_i32mf2(...) __riscv_vwcvt_x_x_v_i32mf2(__VA_ARGS__)

#define	vwcvt_x_x_v_i32mf2_m(...) __riscv_vwcvt_x_x_v_i32mf2_tumu(__VA_ARGS__)

#define	vwcvt_x_x_v_i64m1(...) __riscv_vwcvt_x_x_v_i64m1(__VA_ARGS__)

#define	vwcvt_x_x_v_i64m1_m(...) __riscv_vwcvt_x_x_v_i64m1_tumu(__VA_ARGS__)

#define	vwcvt_x_x_v_i64m2(...) __riscv_vwcvt_x_x_v_i64m2(__VA_ARGS__)

#define	vwcvt_x_x_v_i64m2_m(...) __riscv_vwcvt_x_x_v_i64m2_tumu(__VA_ARGS__)

#define	vwcvt_x_x_v_i64m4(...) __riscv_vwcvt_x_x_v_i64m4(__VA_ARGS__)

#define	vwcvt_x_x_v_i64m4_m(...) __riscv_vwcvt_x_x_v_i64m4_tumu(__VA_ARGS__)

#define	vwcvt_x_x_v_i64m8(...) __riscv_vwcvt_x_x_v_i64m8(__VA_ARGS__)

#define	vwcvt_x_x_v_i64m8_m(...) __riscv_vwcvt_x_x_v_i64m8_tumu(__VA_ARGS__)

#define	vwcvtu_x_x_v_u16m1(...) __riscv_vwcvtu_x_x_v_u16m1(__VA_ARGS__)

#define	vwcvtu_x_x_v_u16m1_m(...) __riscv_vwcvtu_x_x_v_u16m1_tumu(__VA_ARGS__)

#define	vwcvtu_x_x_v_u16m2(...) __riscv_vwcvtu_x_x_v_u16m2(__VA_ARGS__)

#define	vwcvtu_x_x_v_u16m2_m(...) __riscv_vwcvtu_x_x_v_u16m2_tumu(__VA_ARGS__)

#define	vwcvtu_x_x_v_u16m4(...) __riscv_vwcvtu_x_x_v_u16m4(__VA_ARGS__)

#define	vwcvtu_x_x_v_u16m4_m(...) __riscv_vwcvtu_x_x_v_u16m4_tumu(__VA_ARGS__)

#define	vwcvtu_x_x_v_u16m8(...) __riscv_vwcvtu_x_x_v_u16m8(__VA_ARGS__)

#define	vwcvtu_x_x_v_u16m8_m(...) __riscv_vwcvtu_x_x_v_u16m8_tumu(__VA_ARGS__)

#define	vwcvtu_x_x_v_u16mf2(...) __riscv_vwcvtu_x_x_v_u16mf2(__VA_ARGS__)

#define	vwcvtu_x_x_v_u16mf2_m(...) __riscv_vwcvtu_x_x_v_u16mf2_tumu(__VA_ARGS__)

#define	vwcvtu_x_x_v_u16mf4(...) __riscv_vwcvtu_x_x_v_u16mf4(__VA_ARGS__)

#define	vwcvtu_x_x_v_u16mf4_m(...) __riscv_vwcvtu_x_x_v_u16mf4_tumu(__VA_ARGS__)

#define	vwcvtu_x_x_v_u32m1(...) __riscv_vwcvtu_x_x_v_u32m1(__VA_ARGS__)

#define	vwcvtu_x_x_v_u32m1_m(...) __riscv_vwcvtu_x_x_v_u32m1_tumu(__VA_ARGS__)

#define	vwcvtu_x_x_v_u32m2(...) __riscv_vwcvtu_x_x_v_u32m2(__VA_ARGS__)

#define	vwcvtu_x_x_v_u32m2_m(...) __riscv_vwcvtu_x_x_v_u32m2_tumu(__VA_ARGS__)

#define	vwcvtu_x_x_v_u32m4(...) __riscv_vwcvtu_x_x_v_u32m4(__VA_ARGS__)

#define	vwcvtu_x_x_v_u32m4_m(...) __riscv_vwcvtu_x_x_v_u32m4_tumu(__VA_ARGS__)

#define	vwcvtu_x_x_v_u32m8(...) __riscv_vwcvtu_x_x_v_u32m8(__VA_ARGS__)

#define	vwcvtu_x_x_v_u32m8_m(...) __riscv_vwcvtu_x_x_v_u32m8_tumu(__VA_ARGS__)

#define	vwcvtu_x_x_v_u32mf2(...) __riscv_vwcvtu_x_x_v_u32mf2(__VA_ARGS__)

#define	vwcvtu_x_x_v_u32mf2_m(...) __riscv_vwcvtu_x_x_v_u32mf2_tumu(__VA_ARGS__)

#define	vwcvtu_x_x_v_u64m1(...) __riscv_vwcvtu_x_x_v_u64m1(__VA_ARGS__)

#define	vwcvtu_x_x_v_u64m1_m(...) __riscv_vwcvtu_x_x_v_u64m1_tumu(__VA_ARGS__)

#define	vwcvtu_x_x_v_u64m2(...) __riscv_vwcvtu_x_x_v_u64m2(__VA_ARGS__)

#define	vwcvtu_x_x_v_u64m2_m(...) __riscv_vwcvtu_x_x_v_u64m2_tumu(__VA_ARGS__)

#define	vwcvtu_x_x_v_u64m4(...) __riscv_vwcvtu_x_x_v_u64m4(__VA_ARGS__)

#define	vwcvtu_x_x_v_u64m4_m(...) __riscv_vwcvtu_x_x_v_u64m4_tumu(__VA_ARGS__)

#define	vwcvtu_x_x_v_u64m8(...) __riscv_vwcvtu_x_x_v_u64m8(__VA_ARGS__)

#define	vwcvtu_x_x_v_u64m8_m(...) __riscv_vwcvtu_x_x_v_u64m8_tumu(__VA_ARGS__)

#define	vwmacc_vv_i16m1(...) __riscv_vwmacc_vv_i16m1_tu(__VA_ARGS__)

#define	vwmacc_vv_i16m1_m(...) __riscv_vwmacc_vv_i16m1_tumu(__VA_ARGS__)

#define	vwmacc_vv_i16m2(...) __riscv_vwmacc_vv_i16m2_tu(__VA_ARGS__)

#define	vwmacc_vv_i16m2_m(...) __riscv_vwmacc_vv_i16m2_tumu(__VA_ARGS__)

#define	vwmacc_vv_i16m4(...) __riscv_vwmacc_vv_i16m4_tu(__VA_ARGS__)

#define	vwmacc_vv_i16m4_m(...) __riscv_vwmacc_vv_i16m4_tumu(__VA_ARGS__)

#define	vwmacc_vv_i16m8(...) __riscv_vwmacc_vv_i16m8_tu(__VA_ARGS__)

#define	vwmacc_vv_i16m8_m(...) __riscv_vwmacc_vv_i16m8_tumu(__VA_ARGS__)

#define	vwmacc_vv_i16mf2(...) __riscv_vwmacc_vv_i16mf2_tu(__VA_ARGS__)

#define	vwmacc_vv_i16mf2_m(...) __riscv_vwmacc_vv_i16mf2_tumu(__VA_ARGS__)

#define	vwmacc_vv_i16mf4(...) __riscv_vwmacc_vv_i16mf4_tu(__VA_ARGS__)

#define	vwmacc_vv_i16mf4_m(...) __riscv_vwmacc_vv_i16mf4_tumu(__VA_ARGS__)

#define	vwmacc_vv_i32m1(...) __riscv_vwmacc_vv_i32m1_tu(__VA_ARGS__)

#define	vwmacc_vv_i32m1_m(...) __riscv_vwmacc_vv_i32m1_tumu(__VA_ARGS__)

#define	vwmacc_vv_i32m2(...) __riscv_vwmacc_vv_i32m2_tu(__VA_ARGS__)

#define	vwmacc_vv_i32m2_m(...) __riscv_vwmacc_vv_i32m2_tumu(__VA_ARGS__)

#define	vwmacc_vv_i32m4(...) __riscv_vwmacc_vv_i32m4_tu(__VA_ARGS__)

#define	vwmacc_vv_i32m4_m(...) __riscv_vwmacc_vv_i32m4_tumu(__VA_ARGS__)

#define	vwmacc_vv_i32m8(...) __riscv_vwmacc_vv_i32m8_tu(__VA_ARGS__)

#define	vwmacc_vv_i32m8_m(...) __riscv_vwmacc_vv_i32m8_tumu(__VA_ARGS__)

#define	vwmacc_vv_i32mf2(...) __riscv_vwmacc_vv_i32mf2_tu(__VA_ARGS__)

#define	vwmacc_vv_i32mf2_m(...) __riscv_vwmacc_vv_i32mf2_tumu(__VA_ARGS__)

#define	vwmacc_vv_i64m1(...) __riscv_vwmacc_vv_i64m1_tu(__VA_ARGS__)

#define	vwmacc_vv_i64m1_m(...) __riscv_vwmacc_vv_i64m1_tumu(__VA_ARGS__)

#define	vwmacc_vv_i64m2(...) __riscv_vwmacc_vv_i64m2_tu(__VA_ARGS__)

#define	vwmacc_vv_i64m2_m(...) __riscv_vwmacc_vv_i64m2_tumu(__VA_ARGS__)

#define	vwmacc_vv_i64m4(...) __riscv_vwmacc_vv_i64m4_tu(__VA_ARGS__)

#define	vwmacc_vv_i64m4_m(...) __riscv_vwmacc_vv_i64m4_tumu(__VA_ARGS__)

#define	vwmacc_vv_i64m8(...) __riscv_vwmacc_vv_i64m8_tu(__VA_ARGS__)

#define	vwmacc_vv_i64m8_m(...) __riscv_vwmacc_vv_i64m8_tumu(__VA_ARGS__)

#define	vwmacc_vx_i16m1(...) __riscv_vwmacc_vx_i16m1_tu(__VA_ARGS__)

#define	vwmacc_vx_i16m1_m(...) __riscv_vwmacc_vx_i16m1_tumu(__VA_ARGS__)

#define	vwmacc_vx_i16m2(...) __riscv_vwmacc_vx_i16m2_tu(__VA_ARGS__)

#define	vwmacc_vx_i16m2_m(...) __riscv_vwmacc_vx_i16m2_tumu(__VA_ARGS__)

#define	vwmacc_vx_i16m4(...) __riscv_vwmacc_vx_i16m4_tu(__VA_ARGS__)

#define	vwmacc_vx_i16m4_m(...) __riscv_vwmacc_vx_i16m4_tumu(__VA_ARGS__)

#define	vwmacc_vx_i16m8(...) __riscv_vwmacc_vx_i16m8_tu(__VA_ARGS__)

#define	vwmacc_vx_i16m8_m(...) __riscv_vwmacc_vx_i16m8_tumu(__VA_ARGS__)

#define	vwmacc_vx_i16mf2(...) __riscv_vwmacc_vx_i16mf2_tu(__VA_ARGS__)

#define	vwmacc_vx_i16mf2_m(...) __riscv_vwmacc_vx_i16mf2_tumu(__VA_ARGS__)

#define	vwmacc_vx_i16mf4(...) __riscv_vwmacc_vx_i16mf4_tu(__VA_ARGS__)

#define	vwmacc_vx_i16mf4_m(...) __riscv_vwmacc_vx_i16mf4_tumu(__VA_ARGS__)

#define	vwmacc_vx_i32m1(...) __riscv_vwmacc_vx_i32m1_tu(__VA_ARGS__)

#define	vwmacc_vx_i32m1_m(...) __riscv_vwmacc_vx_i32m1_tumu(__VA_ARGS__)

#define	vwmacc_vx_i32m2(...) __riscv_vwmacc_vx_i32m2_tu(__VA_ARGS__)

#define	vwmacc_vx_i32m2_m(...) __riscv_vwmacc_vx_i32m2_tumu(__VA_ARGS__)

#define	vwmacc_vx_i32m4(...) __riscv_vwmacc_vx_i32m4_tu(__VA_ARGS__)

#define	vwmacc_vx_i32m4_m(...) __riscv_vwmacc_vx_i32m4_tumu(__VA_ARGS__)

#define	vwmacc_vx_i32m8(...) __riscv_vwmacc_vx_i32m8_tu(__VA_ARGS__)

#define	vwmacc_vx_i32m8_m(...) __riscv_vwmacc_vx_i32m8_tumu(__VA_ARGS__)

#define	vwmacc_vx_i32mf2(...) __riscv_vwmacc_vx_i32mf2_tu(__VA_ARGS__)

#define	vwmacc_vx_i32mf2_m(...) __riscv_vwmacc_vx_i32mf2_tumu(__VA_ARGS__)

#define	vwmacc_vx_i64m1(...) __riscv_vwmacc_vx_i64m1_tu(__VA_ARGS__)

#define	vwmacc_vx_i64m1_m(...) __riscv_vwmacc_vx_i64m1_tumu(__VA_ARGS__)

#define	vwmacc_vx_i64m2(...) __riscv_vwmacc_vx_i64m2_tu(__VA_ARGS__)

#define	vwmacc_vx_i64m2_m(...) __riscv_vwmacc_vx_i64m2_tumu(__VA_ARGS__)

#define	vwmacc_vx_i64m4(...) __riscv_vwmacc_vx_i64m4_tu(__VA_ARGS__)

#define	vwmacc_vx_i64m4_m(...) __riscv_vwmacc_vx_i64m4_tumu(__VA_ARGS__)

#define	vwmacc_vx_i64m8(...) __riscv_vwmacc_vx_i64m8_tu(__VA_ARGS__)

#define	vwmacc_vx_i64m8_m(...) __riscv_vwmacc_vx_i64m8_tumu(__VA_ARGS__)

#define	vwmaccsu_vv_i16m1(...) __riscv_vwmaccsu_vv_i16m1_tu(__VA_ARGS__)

#define	vwmaccsu_vv_i16m1_m(...) __riscv_vwmaccsu_vv_i16m1_tumu(__VA_ARGS__)

#define	vwmaccsu_vv_i16m2(...) __riscv_vwmaccsu_vv_i16m2_tu(__VA_ARGS__)

#define	vwmaccsu_vv_i16m2_m(...) __riscv_vwmaccsu_vv_i16m2_tumu(__VA_ARGS__)

#define	vwmaccsu_vv_i16m4(...) __riscv_vwmaccsu_vv_i16m4_tu(__VA_ARGS__)

#define	vwmaccsu_vv_i16m4_m(...) __riscv_vwmaccsu_vv_i16m4_tumu(__VA_ARGS__)

#define	vwmaccsu_vv_i16m8(...) __riscv_vwmaccsu_vv_i16m8_tu(__VA_ARGS__)

#define	vwmaccsu_vv_i16m8_m(...) __riscv_vwmaccsu_vv_i16m8_tumu(__VA_ARGS__)

#define	vwmaccsu_vv_i16mf2(...) __riscv_vwmaccsu_vv_i16mf2_tu(__VA_ARGS__)

#define	vwmaccsu_vv_i16mf2_m(...) __riscv_vwmaccsu_vv_i16mf2_tumu(__VA_ARGS__)

#define	vwmaccsu_vv_i16mf4(...) __riscv_vwmaccsu_vv_i16mf4_tu(__VA_ARGS__)

#define	vwmaccsu_vv_i16mf4_m(...) __riscv_vwmaccsu_vv_i16mf4_tumu(__VA_ARGS__)

#define	vwmaccsu_vv_i32m1(...) __riscv_vwmaccsu_vv_i32m1_tu(__VA_ARGS__)

#define	vwmaccsu_vv_i32m1_m(...) __riscv_vwmaccsu_vv_i32m1_tumu(__VA_ARGS__)

#define	vwmaccsu_vv_i32m2(...) __riscv_vwmaccsu_vv_i32m2_tu(__VA_ARGS__)

#define	vwmaccsu_vv_i32m2_m(...) __riscv_vwmaccsu_vv_i32m2_tumu(__VA_ARGS__)

#define	vwmaccsu_vv_i32m4(...) __riscv_vwmaccsu_vv_i32m4_tu(__VA_ARGS__)

#define	vwmaccsu_vv_i32m4_m(...) __riscv_vwmaccsu_vv_i32m4_tumu(__VA_ARGS__)

#define	vwmaccsu_vv_i32m8(...) __riscv_vwmaccsu_vv_i32m8_tu(__VA_ARGS__)

#define	vwmaccsu_vv_i32m8_m(...) __riscv_vwmaccsu_vv_i32m8_tumu(__VA_ARGS__)

#define	vwmaccsu_vv_i32mf2(...) __riscv_vwmaccsu_vv_i32mf2_tu(__VA_ARGS__)

#define	vwmaccsu_vv_i32mf2_m(...) __riscv_vwmaccsu_vv_i32mf2_tumu(__VA_ARGS__)

#define	vwmaccsu_vv_i64m1(...) __riscv_vwmaccsu_vv_i64m1_tu(__VA_ARGS__)

#define	vwmaccsu_vv_i64m1_m(...) __riscv_vwmaccsu_vv_i64m1_tumu(__VA_ARGS__)

#define	vwmaccsu_vv_i64m2(...) __riscv_vwmaccsu_vv_i64m2_tu(__VA_ARGS__)

#define	vwmaccsu_vv_i64m2_m(...) __riscv_vwmaccsu_vv_i64m2_tumu(__VA_ARGS__)

#define	vwmaccsu_vv_i64m4(...) __riscv_vwmaccsu_vv_i64m4_tu(__VA_ARGS__)

#define	vwmaccsu_vv_i64m4_m(...) __riscv_vwmaccsu_vv_i64m4_tumu(__VA_ARGS__)

#define	vwmaccsu_vv_i64m8(...) __riscv_vwmaccsu_vv_i64m8_tu(__VA_ARGS__)

#define	vwmaccsu_vv_i64m8_m(...) __riscv_vwmaccsu_vv_i64m8_tumu(__VA_ARGS__)

#define	vwmaccsu_vx_i16m1(...) __riscv_vwmaccsu_vx_i16m1_tu(__VA_ARGS__)

#define	vwmaccsu_vx_i16m1_m(...) __riscv_vwmaccsu_vx_i16m1_tumu(__VA_ARGS__)

#define	vwmaccsu_vx_i16m2(...) __riscv_vwmaccsu_vx_i16m2_tu(__VA_ARGS__)

#define	vwmaccsu_vx_i16m2_m(...) __riscv_vwmaccsu_vx_i16m2_tumu(__VA_ARGS__)

#define	vwmaccsu_vx_i16m4(...) __riscv_vwmaccsu_vx_i16m4_tu(__VA_ARGS__)

#define	vwmaccsu_vx_i16m4_m(...) __riscv_vwmaccsu_vx_i16m4_tumu(__VA_ARGS__)

#define	vwmaccsu_vx_i16m8(...) __riscv_vwmaccsu_vx_i16m8_tu(__VA_ARGS__)

#define	vwmaccsu_vx_i16m8_m(...) __riscv_vwmaccsu_vx_i16m8_tumu(__VA_ARGS__)

#define	vwmaccsu_vx_i16mf2(...) __riscv_vwmaccsu_vx_i16mf2_tu(__VA_ARGS__)

#define	vwmaccsu_vx_i16mf2_m(...) __riscv_vwmaccsu_vx_i16mf2_tumu(__VA_ARGS__)

#define	vwmaccsu_vx_i16mf4(...) __riscv_vwmaccsu_vx_i16mf4_tu(__VA_ARGS__)

#define	vwmaccsu_vx_i16mf4_m(...) __riscv_vwmaccsu_vx_i16mf4_tumu(__VA_ARGS__)

#define	vwmaccsu_vx_i32m1(...) __riscv_vwmaccsu_vx_i32m1_tu(__VA_ARGS__)

#define	vwmaccsu_vx_i32m1_m(...) __riscv_vwmaccsu_vx_i32m1_tumu(__VA_ARGS__)

#define	vwmaccsu_vx_i32m2(...) __riscv_vwmaccsu_vx_i32m2_tu(__VA_ARGS__)

#define	vwmaccsu_vx_i32m2_m(...) __riscv_vwmaccsu_vx_i32m2_tumu(__VA_ARGS__)

#define	vwmaccsu_vx_i32m4(...) __riscv_vwmaccsu_vx_i32m4_tu(__VA_ARGS__)

#define	vwmaccsu_vx_i32m4_m(...) __riscv_vwmaccsu_vx_i32m4_tumu(__VA_ARGS__)

#define	vwmaccsu_vx_i32m8(...) __riscv_vwmaccsu_vx_i32m8_tu(__VA_ARGS__)

#define	vwmaccsu_vx_i32m8_m(...) __riscv_vwmaccsu_vx_i32m8_tumu(__VA_ARGS__)

#define	vwmaccsu_vx_i32mf2(...) __riscv_vwmaccsu_vx_i32mf2_tu(__VA_ARGS__)

#define	vwmaccsu_vx_i32mf2_m(...) __riscv_vwmaccsu_vx_i32mf2_tumu(__VA_ARGS__)

#define	vwmaccsu_vx_i64m1(...) __riscv_vwmaccsu_vx_i64m1_tu(__VA_ARGS__)

#define	vwmaccsu_vx_i64m1_m(...) __riscv_vwmaccsu_vx_i64m1_tumu(__VA_ARGS__)

#define	vwmaccsu_vx_i64m2(...) __riscv_vwmaccsu_vx_i64m2_tu(__VA_ARGS__)

#define	vwmaccsu_vx_i64m2_m(...) __riscv_vwmaccsu_vx_i64m2_tumu(__VA_ARGS__)

#define	vwmaccsu_vx_i64m4(...) __riscv_vwmaccsu_vx_i64m4_tu(__VA_ARGS__)

#define	vwmaccsu_vx_i64m4_m(...) __riscv_vwmaccsu_vx_i64m4_tumu(__VA_ARGS__)

#define	vwmaccsu_vx_i64m8(...) __riscv_vwmaccsu_vx_i64m8_tu(__VA_ARGS__)

#define	vwmaccsu_vx_i64m8_m(...) __riscv_vwmaccsu_vx_i64m8_tumu(__VA_ARGS__)

#define	vwmaccu_vv_u16m1(...) __riscv_vwmaccu_vv_u16m1_tu(__VA_ARGS__)

#define	vwmaccu_vv_u16m1_m(...) __riscv_vwmaccu_vv_u16m1_tumu(__VA_ARGS__)

#define	vwmaccu_vv_u16m2(...) __riscv_vwmaccu_vv_u16m2_tu(__VA_ARGS__)

#define	vwmaccu_vv_u16m2_m(...) __riscv_vwmaccu_vv_u16m2_tumu(__VA_ARGS__)

#define	vwmaccu_vv_u16m4(...) __riscv_vwmaccu_vv_u16m4_tu(__VA_ARGS__)

#define	vwmaccu_vv_u16m4_m(...) __riscv_vwmaccu_vv_u16m4_tumu(__VA_ARGS__)

#define	vwmaccu_vv_u16m8(...) __riscv_vwmaccu_vv_u16m8_tu(__VA_ARGS__)

#define	vwmaccu_vv_u16m8_m(...) __riscv_vwmaccu_vv_u16m8_tumu(__VA_ARGS__)

#define	vwmaccu_vv_u16mf2(...) __riscv_vwmaccu_vv_u16mf2_tu(__VA_ARGS__)

#define	vwmaccu_vv_u16mf2_m(...) __riscv_vwmaccu_vv_u16mf2_tumu(__VA_ARGS__)

#define	vwmaccu_vv_u16mf4(...) __riscv_vwmaccu_vv_u16mf4_tu(__VA_ARGS__)

#define	vwmaccu_vv_u16mf4_m(...) __riscv_vwmaccu_vv_u16mf4_tumu(__VA_ARGS__)

#define	vwmaccu_vv_u32m1(...) __riscv_vwmaccu_vv_u32m1_tu(__VA_ARGS__)

#define	vwmaccu_vv_u32m1_m(...) __riscv_vwmaccu_vv_u32m1_tumu(__VA_ARGS__)

#define	vwmaccu_vv_u32m2(...) __riscv_vwmaccu_vv_u32m2_tu(__VA_ARGS__)

#define	vwmaccu_vv_u32m2_m(...) __riscv_vwmaccu_vv_u32m2_tumu(__VA_ARGS__)

#define	vwmaccu_vv_u32m4(...) __riscv_vwmaccu_vv_u32m4_tu(__VA_ARGS__)

#define	vwmaccu_vv_u32m4_m(...) __riscv_vwmaccu_vv_u32m4_tumu(__VA_ARGS__)

#define	vwmaccu_vv_u32m8(...) __riscv_vwmaccu_vv_u32m8_tu(__VA_ARGS__)

#define	vwmaccu_vv_u32m8_m(...) __riscv_vwmaccu_vv_u32m8_tumu(__VA_ARGS__)

#define	vwmaccu_vv_u32mf2(...) __riscv_vwmaccu_vv_u32mf2_tu(__VA_ARGS__)

#define	vwmaccu_vv_u32mf2_m(...) __riscv_vwmaccu_vv_u32mf2_tumu(__VA_ARGS__)

#define	vwmaccu_vv_u64m1(...) __riscv_vwmaccu_vv_u64m1_tu(__VA_ARGS__)

#define	vwmaccu_vv_u64m1_m(...) __riscv_vwmaccu_vv_u64m1_tumu(__VA_ARGS__)

#define	vwmaccu_vv_u64m2(...) __riscv_vwmaccu_vv_u64m2_tu(__VA_ARGS__)

#define	vwmaccu_vv_u64m2_m(...) __riscv_vwmaccu_vv_u64m2_tumu(__VA_ARGS__)

#define	vwmaccu_vv_u64m4(...) __riscv_vwmaccu_vv_u64m4_tu(__VA_ARGS__)

#define	vwmaccu_vv_u64m4_m(...) __riscv_vwmaccu_vv_u64m4_tumu(__VA_ARGS__)

#define	vwmaccu_vv_u64m8(...) __riscv_vwmaccu_vv_u64m8_tu(__VA_ARGS__)

#define	vwmaccu_vv_u64m8_m(...) __riscv_vwmaccu_vv_u64m8_tumu(__VA_ARGS__)

#define	vwmaccu_vx_u16m1(...) __riscv_vwmaccu_vx_u16m1_tu(__VA_ARGS__)

#define	vwmaccu_vx_u16m1_m(...) __riscv_vwmaccu_vx_u16m1_tumu(__VA_ARGS__)

#define	vwmaccu_vx_u16m2(...) __riscv_vwmaccu_vx_u16m2_tu(__VA_ARGS__)

#define	vwmaccu_vx_u16m2_m(...) __riscv_vwmaccu_vx_u16m2_tumu(__VA_ARGS__)

#define	vwmaccu_vx_u16m4(...) __riscv_vwmaccu_vx_u16m4_tu(__VA_ARGS__)

#define	vwmaccu_vx_u16m4_m(...) __riscv_vwmaccu_vx_u16m4_tumu(__VA_ARGS__)

#define	vwmaccu_vx_u16m8(...) __riscv_vwmaccu_vx_u16m8_tu(__VA_ARGS__)

#define	vwmaccu_vx_u16m8_m(...) __riscv_vwmaccu_vx_u16m8_tumu(__VA_ARGS__)

#define	vwmaccu_vx_u16mf2(...) __riscv_vwmaccu_vx_u16mf2_tu(__VA_ARGS__)

#define	vwmaccu_vx_u16mf2_m(...) __riscv_vwmaccu_vx_u16mf2_tumu(__VA_ARGS__)

#define	vwmaccu_vx_u16mf4(...) __riscv_vwmaccu_vx_u16mf4_tu(__VA_ARGS__)

#define	vwmaccu_vx_u16mf4_m(...) __riscv_vwmaccu_vx_u16mf4_tumu(__VA_ARGS__)

#define	vwmaccu_vx_u32m1(...) __riscv_vwmaccu_vx_u32m1_tu(__VA_ARGS__)

#define	vwmaccu_vx_u32m1_m(...) __riscv_vwmaccu_vx_u32m1_tumu(__VA_ARGS__)

#define	vwmaccu_vx_u32m2(...) __riscv_vwmaccu_vx_u32m2_tu(__VA_ARGS__)

#define	vwmaccu_vx_u32m2_m(...) __riscv_vwmaccu_vx_u32m2_tumu(__VA_ARGS__)

#define	vwmaccu_vx_u32m4(...) __riscv_vwmaccu_vx_u32m4_tu(__VA_ARGS__)

#define	vwmaccu_vx_u32m4_m(...) __riscv_vwmaccu_vx_u32m4_tumu(__VA_ARGS__)

#define	vwmaccu_vx_u32m8(...) __riscv_vwmaccu_vx_u32m8_tu(__VA_ARGS__)

#define	vwmaccu_vx_u32m8_m(...) __riscv_vwmaccu_vx_u32m8_tumu(__VA_ARGS__)

#define	vwmaccu_vx_u32mf2(...) __riscv_vwmaccu_vx_u32mf2_tu(__VA_ARGS__)

#define	vwmaccu_vx_u32mf2_m(...) __riscv_vwmaccu_vx_u32mf2_tumu(__VA_ARGS__)

#define	vwmaccu_vx_u64m1(...) __riscv_vwmaccu_vx_u64m1_tu(__VA_ARGS__)

#define	vwmaccu_vx_u64m1_m(...) __riscv_vwmaccu_vx_u64m1_tumu(__VA_ARGS__)

#define	vwmaccu_vx_u64m2(...) __riscv_vwmaccu_vx_u64m2_tu(__VA_ARGS__)

#define	vwmaccu_vx_u64m2_m(...) __riscv_vwmaccu_vx_u64m2_tumu(__VA_ARGS__)

#define	vwmaccu_vx_u64m4(...) __riscv_vwmaccu_vx_u64m4_tu(__VA_ARGS__)

#define	vwmaccu_vx_u64m4_m(...) __riscv_vwmaccu_vx_u64m4_tumu(__VA_ARGS__)

#define	vwmaccu_vx_u64m8(...) __riscv_vwmaccu_vx_u64m8_tu(__VA_ARGS__)

#define	vwmaccu_vx_u64m8_m(...) __riscv_vwmaccu_vx_u64m8_tumu(__VA_ARGS__)

#define	vwmaccus_vx_i16m1(...) __riscv_vwmaccus_vx_i16m1_tu(__VA_ARGS__)

#define	vwmaccus_vx_i16m1_m(...) __riscv_vwmaccus_vx_i16m1_tumu(__VA_ARGS__)

#define	vwmaccus_vx_i16m2(...) __riscv_vwmaccus_vx_i16m2_tu(__VA_ARGS__)

#define	vwmaccus_vx_i16m2_m(...) __riscv_vwmaccus_vx_i16m2_tumu(__VA_ARGS__)

#define	vwmaccus_vx_i16m4(...) __riscv_vwmaccus_vx_i16m4_tu(__VA_ARGS__)

#define	vwmaccus_vx_i16m4_m(...) __riscv_vwmaccus_vx_i16m4_tumu(__VA_ARGS__)

#define	vwmaccus_vx_i16m8(...) __riscv_vwmaccus_vx_i16m8_tu(__VA_ARGS__)

#define	vwmaccus_vx_i16m8_m(...) __riscv_vwmaccus_vx_i16m8_tumu(__VA_ARGS__)

#define	vwmaccus_vx_i16mf2(...) __riscv_vwmaccus_vx_i16mf2_tu(__VA_ARGS__)

#define	vwmaccus_vx_i16mf2_m(...) __riscv_vwmaccus_vx_i16mf2_tumu(__VA_ARGS__)

#define	vwmaccus_vx_i16mf4(...) __riscv_vwmaccus_vx_i16mf4_tu(__VA_ARGS__)

#define	vwmaccus_vx_i16mf4_m(...) __riscv_vwmaccus_vx_i16mf4_tumu(__VA_ARGS__)

#define	vwmaccus_vx_i32m1(...) __riscv_vwmaccus_vx_i32m1_tu(__VA_ARGS__)

#define	vwmaccus_vx_i32m1_m(...) __riscv_vwmaccus_vx_i32m1_tumu(__VA_ARGS__)

#define	vwmaccus_vx_i32m2(...) __riscv_vwmaccus_vx_i32m2_tu(__VA_ARGS__)

#define	vwmaccus_vx_i32m2_m(...) __riscv_vwmaccus_vx_i32m2_tumu(__VA_ARGS__)

#define	vwmaccus_vx_i32m4(...) __riscv_vwmaccus_vx_i32m4_tu(__VA_ARGS__)

#define	vwmaccus_vx_i32m4_m(...) __riscv_vwmaccus_vx_i32m4_tumu(__VA_ARGS__)

#define	vwmaccus_vx_i32m8(...) __riscv_vwmaccus_vx_i32m8_tu(__VA_ARGS__)

#define	vwmaccus_vx_i32m8_m(...) __riscv_vwmaccus_vx_i32m8_tumu(__VA_ARGS__)

#define	vwmaccus_vx_i32mf2(...) __riscv_vwmaccus_vx_i32mf2_tu(__VA_ARGS__)

#define	vwmaccus_vx_i32mf2_m(...) __riscv_vwmaccus_vx_i32mf2_tumu(__VA_ARGS__)

#define	vwmaccus_vx_i64m1(...) __riscv_vwmaccus_vx_i64m1_tu(__VA_ARGS__)

#define	vwmaccus_vx_i64m1_m(...) __riscv_vwmaccus_vx_i64m1_tumu(__VA_ARGS__)

#define	vwmaccus_vx_i64m2(...) __riscv_vwmaccus_vx_i64m2_tu(__VA_ARGS__)

#define	vwmaccus_vx_i64m2_m(...) __riscv_vwmaccus_vx_i64m2_tumu(__VA_ARGS__)

#define	vwmaccus_vx_i64m4(...) __riscv_vwmaccus_vx_i64m4_tu(__VA_ARGS__)

#define	vwmaccus_vx_i64m4_m(...) __riscv_vwmaccus_vx_i64m4_tumu(__VA_ARGS__)

#define	vwmaccus_vx_i64m8(...) __riscv_vwmaccus_vx_i64m8_tu(__VA_ARGS__)

#define	vwmaccus_vx_i64m8_m(...) __riscv_vwmaccus_vx_i64m8_tumu(__VA_ARGS__)

#define	vwmul_vv_i16m1(...) __riscv_vwmul_vv_i16m1(__VA_ARGS__)

#define	vwmul_vv_i16m1_m(...) __riscv_vwmul_vv_i16m1_tumu(__VA_ARGS__)

#define	vwmul_vv_i16m2(...) __riscv_vwmul_vv_i16m2(__VA_ARGS__)

#define	vwmul_vv_i16m2_m(...) __riscv_vwmul_vv_i16m2_tumu(__VA_ARGS__)

#define	vwmul_vv_i16m4(...) __riscv_vwmul_vv_i16m4(__VA_ARGS__)

#define	vwmul_vv_i16m4_m(...) __riscv_vwmul_vv_i16m4_tumu(__VA_ARGS__)

#define	vwmul_vv_i16m8(...) __riscv_vwmul_vv_i16m8(__VA_ARGS__)

#define	vwmul_vv_i16m8_m(...) __riscv_vwmul_vv_i16m8_tumu(__VA_ARGS__)

#define	vwmul_vv_i16mf2(...) __riscv_vwmul_vv_i16mf2(__VA_ARGS__)

#define	vwmul_vv_i16mf2_m(...) __riscv_vwmul_vv_i16mf2_tumu(__VA_ARGS__)

#define	vwmul_vv_i16mf4(...) __riscv_vwmul_vv_i16mf4(__VA_ARGS__)

#define	vwmul_vv_i16mf4_m(...) __riscv_vwmul_vv_i16mf4_tumu(__VA_ARGS__)

#define	vwmul_vv_i32m1(...) __riscv_vwmul_vv_i32m1(__VA_ARGS__)

#define	vwmul_vv_i32m1_m(...) __riscv_vwmul_vv_i32m1_tumu(__VA_ARGS__)

#define	vwmul_vv_i32m2(...) __riscv_vwmul_vv_i32m2(__VA_ARGS__)

#define	vwmul_vv_i32m2_m(...) __riscv_vwmul_vv_i32m2_tumu(__VA_ARGS__)

#define	vwmul_vv_i32m4(...) __riscv_vwmul_vv_i32m4(__VA_ARGS__)

#define	vwmul_vv_i32m4_m(...) __riscv_vwmul_vv_i32m4_tumu(__VA_ARGS__)

#define	vwmul_vv_i32m8(...) __riscv_vwmul_vv_i32m8(__VA_ARGS__)

#define	vwmul_vv_i32m8_m(...) __riscv_vwmul_vv_i32m8_tumu(__VA_ARGS__)

#define	vwmul_vv_i32mf2(...) __riscv_vwmul_vv_i32mf2(__VA_ARGS__)

#define	vwmul_vv_i32mf2_m(...) __riscv_vwmul_vv_i32mf2_tumu(__VA_ARGS__)

#define	vwmul_vv_i64m1(...) __riscv_vwmul_vv_i64m1(__VA_ARGS__)

#define	vwmul_vv_i64m1_m(...) __riscv_vwmul_vv_i64m1_tumu(__VA_ARGS__)

#define	vwmul_vv_i64m2(...) __riscv_vwmul_vv_i64m2(__VA_ARGS__)

#define	vwmul_vv_i64m2_m(...) __riscv_vwmul_vv_i64m2_tumu(__VA_ARGS__)

#define	vwmul_vv_i64m4(...) __riscv_vwmul_vv_i64m4(__VA_ARGS__)

#define	vwmul_vv_i64m4_m(...) __riscv_vwmul_vv_i64m4_tumu(__VA_ARGS__)

#define	vwmul_vv_i64m8(...) __riscv_vwmul_vv_i64m8(__VA_ARGS__)

#define	vwmul_vv_i64m8_m(...) __riscv_vwmul_vv_i64m8_tumu(__VA_ARGS__)

#define	vwmul_vx_i16m1(...) __riscv_vwmul_vx_i16m1(__VA_ARGS__)

#define	vwmul_vx_i16m1_m(...) __riscv_vwmul_vx_i16m1_tumu(__VA_ARGS__)

#define	vwmul_vx_i16m2(...) __riscv_vwmul_vx_i16m2(__VA_ARGS__)

#define	vwmul_vx_i16m2_m(...) __riscv_vwmul_vx_i16m2_tumu(__VA_ARGS__)

#define	vwmul_vx_i16m4(...) __riscv_vwmul_vx_i16m4(__VA_ARGS__)

#define	vwmul_vx_i16m4_m(...) __riscv_vwmul_vx_i16m4_tumu(__VA_ARGS__)

#define	vwmul_vx_i16m8(...) __riscv_vwmul_vx_i16m8(__VA_ARGS__)

#define	vwmul_vx_i16m8_m(...) __riscv_vwmul_vx_i16m8_tumu(__VA_ARGS__)

#define	vwmul_vx_i16mf2(...) __riscv_vwmul_vx_i16mf2(__VA_ARGS__)

#define	vwmul_vx_i16mf2_m(...) __riscv_vwmul_vx_i16mf2_tumu(__VA_ARGS__)

#define	vwmul_vx_i16mf4(...) __riscv_vwmul_vx_i16mf4(__VA_ARGS__)

#define	vwmul_vx_i16mf4_m(...) __riscv_vwmul_vx_i16mf4_tumu(__VA_ARGS__)

#define	vwmul_vx_i32m1(...) __riscv_vwmul_vx_i32m1(__VA_ARGS__)

#define	vwmul_vx_i32m1_m(...) __riscv_vwmul_vx_i32m1_tumu(__VA_ARGS__)

#define	vwmul_vx_i32m2(...) __riscv_vwmul_vx_i32m2(__VA_ARGS__)

#define	vwmul_vx_i32m2_m(...) __riscv_vwmul_vx_i32m2_tumu(__VA_ARGS__)

#define	vwmul_vx_i32m4(...) __riscv_vwmul_vx_i32m4(__VA_ARGS__)

#define	vwmul_vx_i32m4_m(...) __riscv_vwmul_vx_i32m4_tumu(__VA_ARGS__)

#define	vwmul_vx_i32m8(...) __riscv_vwmul_vx_i32m8(__VA_ARGS__)

#define	vwmul_vx_i32m8_m(...) __riscv_vwmul_vx_i32m8_tumu(__VA_ARGS__)

#define	vwmul_vx_i32mf2(...) __riscv_vwmul_vx_i32mf2(__VA_ARGS__)

#define	vwmul_vx_i32mf2_m(...) __riscv_vwmul_vx_i32mf2_tumu(__VA_ARGS__)

#define	vwmul_vx_i64m1(...) __riscv_vwmul_vx_i64m1(__VA_ARGS__)

#define	vwmul_vx_i64m1_m(...) __riscv_vwmul_vx_i64m1_tumu(__VA_ARGS__)

#define	vwmul_vx_i64m2(...) __riscv_vwmul_vx_i64m2(__VA_ARGS__)

#define	vwmul_vx_i64m2_m(...) __riscv_vwmul_vx_i64m2_tumu(__VA_ARGS__)

#define	vwmul_vx_i64m4(...) __riscv_vwmul_vx_i64m4(__VA_ARGS__)

#define	vwmul_vx_i64m4_m(...) __riscv_vwmul_vx_i64m4_tumu(__VA_ARGS__)

#define	vwmul_vx_i64m8(...) __riscv_vwmul_vx_i64m8(__VA_ARGS__)

#define	vwmul_vx_i64m8_m(...) __riscv_vwmul_vx_i64m8_tumu(__VA_ARGS__)

#define	vwmulsu_vv_i16m1(...) __riscv_vwmulsu_vv_i16m1(__VA_ARGS__)

#define	vwmulsu_vv_i16m1_m(...) __riscv_vwmulsu_vv_i16m1_tumu(__VA_ARGS__)

#define	vwmulsu_vv_i16m2(...) __riscv_vwmulsu_vv_i16m2(__VA_ARGS__)

#define	vwmulsu_vv_i16m2_m(...) __riscv_vwmulsu_vv_i16m2_tumu(__VA_ARGS__)

#define	vwmulsu_vv_i16m4(...) __riscv_vwmulsu_vv_i16m4(__VA_ARGS__)

#define	vwmulsu_vv_i16m4_m(...) __riscv_vwmulsu_vv_i16m4_tumu(__VA_ARGS__)

#define	vwmulsu_vv_i16m8(...) __riscv_vwmulsu_vv_i16m8(__VA_ARGS__)

#define	vwmulsu_vv_i16m8_m(...) __riscv_vwmulsu_vv_i16m8_tumu(__VA_ARGS__)

#define	vwmulsu_vv_i16mf2(...) __riscv_vwmulsu_vv_i16mf2(__VA_ARGS__)

#define	vwmulsu_vv_i16mf2_m(...) __riscv_vwmulsu_vv_i16mf2_tumu(__VA_ARGS__)

#define	vwmulsu_vv_i16mf4(...) __riscv_vwmulsu_vv_i16mf4(__VA_ARGS__)

#define	vwmulsu_vv_i16mf4_m(...) __riscv_vwmulsu_vv_i16mf4_tumu(__VA_ARGS__)

#define	vwmulsu_vv_i32m1(...) __riscv_vwmulsu_vv_i32m1(__VA_ARGS__)

#define	vwmulsu_vv_i32m1_m(...) __riscv_vwmulsu_vv_i32m1_tumu(__VA_ARGS__)

#define	vwmulsu_vv_i32m2(...) __riscv_vwmulsu_vv_i32m2(__VA_ARGS__)

#define	vwmulsu_vv_i32m2_m(...) __riscv_vwmulsu_vv_i32m2_tumu(__VA_ARGS__)

#define	vwmulsu_vv_i32m4(...) __riscv_vwmulsu_vv_i32m4(__VA_ARGS__)

#define	vwmulsu_vv_i32m4_m(...) __riscv_vwmulsu_vv_i32m4_tumu(__VA_ARGS__)

#define	vwmulsu_vv_i32m8(...) __riscv_vwmulsu_vv_i32m8(__VA_ARGS__)

#define	vwmulsu_vv_i32m8_m(...) __riscv_vwmulsu_vv_i32m8_tumu(__VA_ARGS__)

#define	vwmulsu_vv_i32mf2(...) __riscv_vwmulsu_vv_i32mf2(__VA_ARGS__)

#define	vwmulsu_vv_i32mf2_m(...) __riscv_vwmulsu_vv_i32mf2_tumu(__VA_ARGS__)

#define	vwmulsu_vv_i64m1(...) __riscv_vwmulsu_vv_i64m1(__VA_ARGS__)

#define	vwmulsu_vv_i64m1_m(...) __riscv_vwmulsu_vv_i64m1_tumu(__VA_ARGS__)

#define	vwmulsu_vv_i64m2(...) __riscv_vwmulsu_vv_i64m2(__VA_ARGS__)

#define	vwmulsu_vv_i64m2_m(...) __riscv_vwmulsu_vv_i64m2_tumu(__VA_ARGS__)

#define	vwmulsu_vv_i64m4(...) __riscv_vwmulsu_vv_i64m4(__VA_ARGS__)

#define	vwmulsu_vv_i64m4_m(...) __riscv_vwmulsu_vv_i64m4_tumu(__VA_ARGS__)

#define	vwmulsu_vv_i64m8(...) __riscv_vwmulsu_vv_i64m8(__VA_ARGS__)

#define	vwmulsu_vv_i64m8_m(...) __riscv_vwmulsu_vv_i64m8_tumu(__VA_ARGS__)

#define	vwmulsu_vx_i16m1(...) __riscv_vwmulsu_vx_i16m1(__VA_ARGS__)

#define	vwmulsu_vx_i16m1_m(...) __riscv_vwmulsu_vx_i16m1_tumu(__VA_ARGS__)

#define	vwmulsu_vx_i16m2(...) __riscv_vwmulsu_vx_i16m2(__VA_ARGS__)

#define	vwmulsu_vx_i16m2_m(...) __riscv_vwmulsu_vx_i16m2_tumu(__VA_ARGS__)

#define	vwmulsu_vx_i16m4(...) __riscv_vwmulsu_vx_i16m4(__VA_ARGS__)

#define	vwmulsu_vx_i16m4_m(...) __riscv_vwmulsu_vx_i16m4_tumu(__VA_ARGS__)

#define	vwmulsu_vx_i16m8(...) __riscv_vwmulsu_vx_i16m8(__VA_ARGS__)

#define	vwmulsu_vx_i16m8_m(...) __riscv_vwmulsu_vx_i16m8_tumu(__VA_ARGS__)

#define	vwmulsu_vx_i16mf2(...) __riscv_vwmulsu_vx_i16mf2(__VA_ARGS__)

#define	vwmulsu_vx_i16mf2_m(...) __riscv_vwmulsu_vx_i16mf2_tumu(__VA_ARGS__)

#define	vwmulsu_vx_i16mf4(...) __riscv_vwmulsu_vx_i16mf4(__VA_ARGS__)

#define	vwmulsu_vx_i16mf4_m(...) __riscv_vwmulsu_vx_i16mf4_tumu(__VA_ARGS__)

#define	vwmulsu_vx_i32m1(...) __riscv_vwmulsu_vx_i32m1(__VA_ARGS__)

#define	vwmulsu_vx_i32m1_m(...) __riscv_vwmulsu_vx_i32m1_tumu(__VA_ARGS__)

#define	vwmulsu_vx_i32m2(...) __riscv_vwmulsu_vx_i32m2(__VA_ARGS__)

#define	vwmulsu_vx_i32m2_m(...) __riscv_vwmulsu_vx_i32m2_tumu(__VA_ARGS__)

#define	vwmulsu_vx_i32m4(...) __riscv_vwmulsu_vx_i32m4(__VA_ARGS__)

#define	vwmulsu_vx_i32m4_m(...) __riscv_vwmulsu_vx_i32m4_tumu(__VA_ARGS__)

#define	vwmulsu_vx_i32m8(...) __riscv_vwmulsu_vx_i32m8(__VA_ARGS__)

#define	vwmulsu_vx_i32m8_m(...) __riscv_vwmulsu_vx_i32m8_tumu(__VA_ARGS__)

#define	vwmulsu_vx_i32mf2(...) __riscv_vwmulsu_vx_i32mf2(__VA_ARGS__)

#define	vwmulsu_vx_i32mf2_m(...) __riscv_vwmulsu_vx_i32mf2_tumu(__VA_ARGS__)

#define	vwmulsu_vx_i64m1(...) __riscv_vwmulsu_vx_i64m1(__VA_ARGS__)

#define	vwmulsu_vx_i64m1_m(...) __riscv_vwmulsu_vx_i64m1_tumu(__VA_ARGS__)

#define	vwmulsu_vx_i64m2(...) __riscv_vwmulsu_vx_i64m2(__VA_ARGS__)

#define	vwmulsu_vx_i64m2_m(...) __riscv_vwmulsu_vx_i64m2_tumu(__VA_ARGS__)

#define	vwmulsu_vx_i64m4(...) __riscv_vwmulsu_vx_i64m4(__VA_ARGS__)

#define	vwmulsu_vx_i64m4_m(...) __riscv_vwmulsu_vx_i64m4_tumu(__VA_ARGS__)

#define	vwmulsu_vx_i64m8(...) __riscv_vwmulsu_vx_i64m8(__VA_ARGS__)

#define	vwmulsu_vx_i64m8_m(...) __riscv_vwmulsu_vx_i64m8_tumu(__VA_ARGS__)

#define	vwmulu_vv_u16m1(...) __riscv_vwmulu_vv_u16m1(__VA_ARGS__)

#define	vwmulu_vv_u16m1_m(...) __riscv_vwmulu_vv_u16m1_tumu(__VA_ARGS__)

#define	vwmulu_vv_u16m2(...) __riscv_vwmulu_vv_u16m2(__VA_ARGS__)

#define	vwmulu_vv_u16m2_m(...) __riscv_vwmulu_vv_u16m2_tumu(__VA_ARGS__)

#define	vwmulu_vv_u16m4(...) __riscv_vwmulu_vv_u16m4(__VA_ARGS__)

#define	vwmulu_vv_u16m4_m(...) __riscv_vwmulu_vv_u16m4_tumu(__VA_ARGS__)

#define	vwmulu_vv_u16m8(...) __riscv_vwmulu_vv_u16m8(__VA_ARGS__)

#define	vwmulu_vv_u16m8_m(...) __riscv_vwmulu_vv_u16m8_tumu(__VA_ARGS__)

#define	vwmulu_vv_u16mf2(...) __riscv_vwmulu_vv_u16mf2(__VA_ARGS__)

#define	vwmulu_vv_u16mf2_m(...) __riscv_vwmulu_vv_u16mf2_tumu(__VA_ARGS__)

#define	vwmulu_vv_u16mf4(...) __riscv_vwmulu_vv_u16mf4(__VA_ARGS__)

#define	vwmulu_vv_u16mf4_m(...) __riscv_vwmulu_vv_u16mf4_tumu(__VA_ARGS__)

#define	vwmulu_vv_u32m1(...) __riscv_vwmulu_vv_u32m1(__VA_ARGS__)

#define	vwmulu_vv_u32m1_m(...) __riscv_vwmulu_vv_u32m1_tumu(__VA_ARGS__)

#define	vwmulu_vv_u32m2(...) __riscv_vwmulu_vv_u32m2(__VA_ARGS__)

#define	vwmulu_vv_u32m2_m(...) __riscv_vwmulu_vv_u32m2_tumu(__VA_ARGS__)

#define	vwmulu_vv_u32m4(...) __riscv_vwmulu_vv_u32m4(__VA_ARGS__)

#define	vwmulu_vv_u32m4_m(...) __riscv_vwmulu_vv_u32m4_tumu(__VA_ARGS__)

#define	vwmulu_vv_u32m8(...) __riscv_vwmulu_vv_u32m8(__VA_ARGS__)

#define	vwmulu_vv_u32m8_m(...) __riscv_vwmulu_vv_u32m8_tumu(__VA_ARGS__)

#define	vwmulu_vv_u32mf2(...) __riscv_vwmulu_vv_u32mf2(__VA_ARGS__)

#define	vwmulu_vv_u32mf2_m(...) __riscv_vwmulu_vv_u32mf2_tumu(__VA_ARGS__)

#define	vwmulu_vv_u64m1(...) __riscv_vwmulu_vv_u64m1(__VA_ARGS__)

#define	vwmulu_vv_u64m1_m(...) __riscv_vwmulu_vv_u64m1_tumu(__VA_ARGS__)

#define	vwmulu_vv_u64m2(...) __riscv_vwmulu_vv_u64m2(__VA_ARGS__)

#define	vwmulu_vv_u64m2_m(...) __riscv_vwmulu_vv_u64m2_tumu(__VA_ARGS__)

#define	vwmulu_vv_u64m4(...) __riscv_vwmulu_vv_u64m4(__VA_ARGS__)

#define	vwmulu_vv_u64m4_m(...) __riscv_vwmulu_vv_u64m4_tumu(__VA_ARGS__)

#define	vwmulu_vv_u64m8(...) __riscv_vwmulu_vv_u64m8(__VA_ARGS__)

#define	vwmulu_vv_u64m8_m(...) __riscv_vwmulu_vv_u64m8_tumu(__VA_ARGS__)

#define	vwmulu_vx_u16m1(...) __riscv_vwmulu_vx_u16m1(__VA_ARGS__)

#define	vwmulu_vx_u16m1_m(...) __riscv_vwmulu_vx_u16m1_tumu(__VA_ARGS__)

#define	vwmulu_vx_u16m2(...) __riscv_vwmulu_vx_u16m2(__VA_ARGS__)

#define	vwmulu_vx_u16m2_m(...) __riscv_vwmulu_vx_u16m2_tumu(__VA_ARGS__)

#define	vwmulu_vx_u16m4(...) __riscv_vwmulu_vx_u16m4(__VA_ARGS__)

#define	vwmulu_vx_u16m4_m(...) __riscv_vwmulu_vx_u16m4_tumu(__VA_ARGS__)

#define	vwmulu_vx_u16m8(...) __riscv_vwmulu_vx_u16m8(__VA_ARGS__)

#define	vwmulu_vx_u16m8_m(...) __riscv_vwmulu_vx_u16m8_tumu(__VA_ARGS__)

#define	vwmulu_vx_u16mf2(...) __riscv_vwmulu_vx_u16mf2(__VA_ARGS__)

#define	vwmulu_vx_u16mf2_m(...) __riscv_vwmulu_vx_u16mf2_tumu(__VA_ARGS__)

#define	vwmulu_vx_u16mf4(...) __riscv_vwmulu_vx_u16mf4(__VA_ARGS__)

#define	vwmulu_vx_u16mf4_m(...) __riscv_vwmulu_vx_u16mf4_tumu(__VA_ARGS__)

#define	vwmulu_vx_u32m1(...) __riscv_vwmulu_vx_u32m1(__VA_ARGS__)

#define	vwmulu_vx_u32m1_m(...) __riscv_vwmulu_vx_u32m1_tumu(__VA_ARGS__)

#define	vwmulu_vx_u32m2(...) __riscv_vwmulu_vx_u32m2(__VA_ARGS__)

#define	vwmulu_vx_u32m2_m(...) __riscv_vwmulu_vx_u32m2_tumu(__VA_ARGS__)

#define	vwmulu_vx_u32m4(...) __riscv_vwmulu_vx_u32m4(__VA_ARGS__)

#define	vwmulu_vx_u32m4_m(...) __riscv_vwmulu_vx_u32m4_tumu(__VA_ARGS__)

#define	vwmulu_vx_u32m8(...) __riscv_vwmulu_vx_u32m8(__VA_ARGS__)

#define	vwmulu_vx_u32m8_m(...) __riscv_vwmulu_vx_u32m8_tumu(__VA_ARGS__)

#define	vwmulu_vx_u32mf2(...) __riscv_vwmulu_vx_u32mf2(__VA_ARGS__)

#define	vwmulu_vx_u32mf2_m(...) __riscv_vwmulu_vx_u32mf2_tumu(__VA_ARGS__)

#define	vwmulu_vx_u64m1(...) __riscv_vwmulu_vx_u64m1(__VA_ARGS__)

#define	vwmulu_vx_u64m1_m(...) __riscv_vwmulu_vx_u64m1_tumu(__VA_ARGS__)

#define	vwmulu_vx_u64m2(...) __riscv_vwmulu_vx_u64m2(__VA_ARGS__)

#define	vwmulu_vx_u64m2_m(...) __riscv_vwmulu_vx_u64m2_tumu(__VA_ARGS__)

#define	vwmulu_vx_u64m4(...) __riscv_vwmulu_vx_u64m4(__VA_ARGS__)

#define	vwmulu_vx_u64m4_m(...) __riscv_vwmulu_vx_u64m4_tumu(__VA_ARGS__)

#define	vwmulu_vx_u64m8(...) __riscv_vwmulu_vx_u64m8(__VA_ARGS__)

#define	vwmulu_vx_u64m8_m(...) __riscv_vwmulu_vx_u64m8_tumu(__VA_ARGS__)

#define	vwredsum_vs_i16m1_i32m1(...) __riscv_vwredsum_vs_i16m1_i32m1_tu(__VA_ARGS__)

#define	vwredsum_vs_i16m1_i32m1_m(...) __riscv_vwredsum_vs_i16m1_i32m1_tum(__VA_ARGS__)

#define	vwredsum_vs_i16m2_i32m1(...) __riscv_vwredsum_vs_i16m2_i32m1_tu(__VA_ARGS__)

#define	vwredsum_vs_i16m2_i32m1_m(...) __riscv_vwredsum_vs_i16m2_i32m1_tum(__VA_ARGS__)

#define	vwredsum_vs_i16m4_i32m1(...) __riscv_vwredsum_vs_i16m4_i32m1_tu(__VA_ARGS__)

#define	vwredsum_vs_i16m4_i32m1_m(...) __riscv_vwredsum_vs_i16m4_i32m1_tum(__VA_ARGS__)

#define	vwredsum_vs_i16m8_i32m1(...) __riscv_vwredsum_vs_i16m8_i32m1_tu(__VA_ARGS__)

#define	vwredsum_vs_i16m8_i32m1_m(...) __riscv_vwredsum_vs_i16m8_i32m1_tum(__VA_ARGS__)

#define	vwredsum_vs_i16mf2_i32m1(...) __riscv_vwredsum_vs_i16mf2_i32m1_tu(__VA_ARGS__)

#define	vwredsum_vs_i16mf2_i32m1_m(...) __riscv_vwredsum_vs_i16mf2_i32m1_tum(__VA_ARGS__)

#define	vwredsum_vs_i16mf4_i32m1(...) __riscv_vwredsum_vs_i16mf4_i32m1_tu(__VA_ARGS__)

#define	vwredsum_vs_i16mf4_i32m1_m(...) __riscv_vwredsum_vs_i16mf4_i32m1_tum(__VA_ARGS__)

#define	vwredsum_vs_i32m1_i64m1(...) __riscv_vwredsum_vs_i32m1_i64m1_tu(__VA_ARGS__)

#define	vwredsum_vs_i32m1_i64m1_m(...) __riscv_vwredsum_vs_i32m1_i64m1_tum(__VA_ARGS__)

#define	vwredsum_vs_i32m2_i64m1(...) __riscv_vwredsum_vs_i32m2_i64m1_tu(__VA_ARGS__)

#define	vwredsum_vs_i32m2_i64m1_m(...) __riscv_vwredsum_vs_i32m2_i64m1_tum(__VA_ARGS__)

#define	vwredsum_vs_i32m4_i64m1(...) __riscv_vwredsum_vs_i32m4_i64m1_tu(__VA_ARGS__)

#define	vwredsum_vs_i32m4_i64m1_m(...) __riscv_vwredsum_vs_i32m4_i64m1_tum(__VA_ARGS__)

#define	vwredsum_vs_i32m8_i64m1(...) __riscv_vwredsum_vs_i32m8_i64m1_tu(__VA_ARGS__)

#define	vwredsum_vs_i32m8_i64m1_m(...) __riscv_vwredsum_vs_i32m8_i64m1_tum(__VA_ARGS__)

#define	vwredsum_vs_i32mf2_i64m1(...) __riscv_vwredsum_vs_i32mf2_i64m1_tu(__VA_ARGS__)

#define	vwredsum_vs_i32mf2_i64m1_m(...) __riscv_vwredsum_vs_i32mf2_i64m1_tum(__VA_ARGS__)

#define	vwredsum_vs_i8m1_i16m1(...) __riscv_vwredsum_vs_i8m1_i16m1_tu(__VA_ARGS__)

#define	vwredsum_vs_i8m1_i16m1_m(...) __riscv_vwredsum_vs_i8m1_i16m1_tum(__VA_ARGS__)

#define	vwredsum_vs_i8m2_i16m1(...) __riscv_vwredsum_vs_i8m2_i16m1_tu(__VA_ARGS__)

#define	vwredsum_vs_i8m2_i16m1_m(...) __riscv_vwredsum_vs_i8m2_i16m1_tum(__VA_ARGS__)

#define	vwredsum_vs_i8m4_i16m1(...) __riscv_vwredsum_vs_i8m4_i16m1_tu(__VA_ARGS__)

#define	vwredsum_vs_i8m4_i16m1_m(...) __riscv_vwredsum_vs_i8m4_i16m1_tum(__VA_ARGS__)

#define	vwredsum_vs_i8m8_i16m1(...) __riscv_vwredsum_vs_i8m8_i16m1_tu(__VA_ARGS__)

#define	vwredsum_vs_i8m8_i16m1_m(...) __riscv_vwredsum_vs_i8m8_i16m1_tum(__VA_ARGS__)

#define	vwredsum_vs_i8mf2_i16m1(...) __riscv_vwredsum_vs_i8mf2_i16m1_tu(__VA_ARGS__)

#define	vwredsum_vs_i8mf2_i16m1_m(...) __riscv_vwredsum_vs_i8mf2_i16m1_tum(__VA_ARGS__)

#define	vwredsum_vs_i8mf4_i16m1(...) __riscv_vwredsum_vs_i8mf4_i16m1_tu(__VA_ARGS__)

#define	vwredsum_vs_i8mf4_i16m1_m(...) __riscv_vwredsum_vs_i8mf4_i16m1_tum(__VA_ARGS__)

#define	vwredsum_vs_i8mf8_i16m1(...) __riscv_vwredsum_vs_i8mf8_i16m1_tu(__VA_ARGS__)

#define	vwredsum_vs_i8mf8_i16m1_m(...) __riscv_vwredsum_vs_i8mf8_i16m1_tum(__VA_ARGS__)

#define	vwredsumu_vs_u16m1_u32m1(...) __riscv_vwredsumu_vs_u16m1_u32m1_tu(__VA_ARGS__)

#define	vwredsumu_vs_u16m1_u32m1_m(...) __riscv_vwredsumu_vs_u16m1_u32m1_tum(__VA_ARGS__)

#define	vwredsumu_vs_u16m2_u32m1(...) __riscv_vwredsumu_vs_u16m2_u32m1_tu(__VA_ARGS__)

#define	vwredsumu_vs_u16m2_u32m1_m(...) __riscv_vwredsumu_vs_u16m2_u32m1_tum(__VA_ARGS__)

#define	vwredsumu_vs_u16m4_u32m1(...) __riscv_vwredsumu_vs_u16m4_u32m1_tu(__VA_ARGS__)

#define	vwredsumu_vs_u16m4_u32m1_m(...) __riscv_vwredsumu_vs_u16m4_u32m1_tum(__VA_ARGS__)

#define	vwredsumu_vs_u16m8_u32m1(...) __riscv_vwredsumu_vs_u16m8_u32m1_tu(__VA_ARGS__)

#define	vwredsumu_vs_u16m8_u32m1_m(...) __riscv_vwredsumu_vs_u16m8_u32m1_tum(__VA_ARGS__)

#define	vwredsumu_vs_u16mf2_u32m1(...) __riscv_vwredsumu_vs_u16mf2_u32m1_tu(__VA_ARGS__)

#define	vwredsumu_vs_u16mf2_u32m1_m(...) __riscv_vwredsumu_vs_u16mf2_u32m1_tum(__VA_ARGS__)

#define	vwredsumu_vs_u16mf4_u32m1(...) __riscv_vwredsumu_vs_u16mf4_u32m1_tu(__VA_ARGS__)

#define	vwredsumu_vs_u16mf4_u32m1_m(...) __riscv_vwredsumu_vs_u16mf4_u32m1_tum(__VA_ARGS__)

#define	vwredsumu_vs_u32m1_u64m1(...) __riscv_vwredsumu_vs_u32m1_u64m1_tu(__VA_ARGS__)

#define	vwredsumu_vs_u32m1_u64m1_m(...) __riscv_vwredsumu_vs_u32m1_u64m1_tum(__VA_ARGS__)

#define	vwredsumu_vs_u32m2_u64m1(...) __riscv_vwredsumu_vs_u32m2_u64m1_tu(__VA_ARGS__)

#define	vwredsumu_vs_u32m2_u64m1_m(...) __riscv_vwredsumu_vs_u32m2_u64m1_tum(__VA_ARGS__)

#define	vwredsumu_vs_u32m4_u64m1(...) __riscv_vwredsumu_vs_u32m4_u64m1_tu(__VA_ARGS__)

#define	vwredsumu_vs_u32m4_u64m1_m(...) __riscv_vwredsumu_vs_u32m4_u64m1_tum(__VA_ARGS__)

#define	vwredsumu_vs_u32m8_u64m1(...) __riscv_vwredsumu_vs_u32m8_u64m1_tu(__VA_ARGS__)

#define	vwredsumu_vs_u32m8_u64m1_m(...) __riscv_vwredsumu_vs_u32m8_u64m1_tum(__VA_ARGS__)

#define	vwredsumu_vs_u32mf2_u64m1(...) __riscv_vwredsumu_vs_u32mf2_u64m1_tu(__VA_ARGS__)

#define	vwredsumu_vs_u32mf2_u64m1_m(...) __riscv_vwredsumu_vs_u32mf2_u64m1_tum(__VA_ARGS__)

#define	vwredsumu_vs_u8m1_u16m1(...) __riscv_vwredsumu_vs_u8m1_u16m1_tu(__VA_ARGS__)

#define	vwredsumu_vs_u8m1_u16m1_m(...) __riscv_vwredsumu_vs_u8m1_u16m1_tum(__VA_ARGS__)

#define	vwredsumu_vs_u8m2_u16m1(...) __riscv_vwredsumu_vs_u8m2_u16m1_tu(__VA_ARGS__)

#define	vwredsumu_vs_u8m2_u16m1_m(...) __riscv_vwredsumu_vs_u8m2_u16m1_tum(__VA_ARGS__)

#define	vwredsumu_vs_u8m4_u16m1(...) __riscv_vwredsumu_vs_u8m4_u16m1_tu(__VA_ARGS__)

#define	vwredsumu_vs_u8m4_u16m1_m(...) __riscv_vwredsumu_vs_u8m4_u16m1_tum(__VA_ARGS__)

#define	vwredsumu_vs_u8m8_u16m1(...) __riscv_vwredsumu_vs_u8m8_u16m1_tu(__VA_ARGS__)

#define	vwredsumu_vs_u8m8_u16m1_m(...) __riscv_vwredsumu_vs_u8m8_u16m1_tum(__VA_ARGS__)

#define	vwredsumu_vs_u8mf2_u16m1(...) __riscv_vwredsumu_vs_u8mf2_u16m1_tu(__VA_ARGS__)

#define	vwredsumu_vs_u8mf2_u16m1_m(...) __riscv_vwredsumu_vs_u8mf2_u16m1_tum(__VA_ARGS__)

#define	vwredsumu_vs_u8mf4_u16m1(...) __riscv_vwredsumu_vs_u8mf4_u16m1_tu(__VA_ARGS__)

#define	vwredsumu_vs_u8mf4_u16m1_m(...) __riscv_vwredsumu_vs_u8mf4_u16m1_tum(__VA_ARGS__)

#define	vwredsumu_vs_u8mf8_u16m1(...) __riscv_vwredsumu_vs_u8mf8_u16m1_tu(__VA_ARGS__)

#define	vwredsumu_vs_u8mf8_u16m1_m(...) __riscv_vwredsumu_vs_u8mf8_u16m1_tum(__VA_ARGS__)

#define	vwsub_vv_i16m1(...) __riscv_vwsub_vv_i16m1(__VA_ARGS__)

#define	vwsub_vv_i16m1_m(...) __riscv_vwsub_vv_i16m1_tumu(__VA_ARGS__)

#define	vwsub_vv_i16m2(...) __riscv_vwsub_vv_i16m2(__VA_ARGS__)

#define	vwsub_vv_i16m2_m(...) __riscv_vwsub_vv_i16m2_tumu(__VA_ARGS__)

#define	vwsub_vv_i16m4(...) __riscv_vwsub_vv_i16m4(__VA_ARGS__)

#define	vwsub_vv_i16m4_m(...) __riscv_vwsub_vv_i16m4_tumu(__VA_ARGS__)

#define	vwsub_vv_i16m8(...) __riscv_vwsub_vv_i16m8(__VA_ARGS__)

#define	vwsub_vv_i16m8_m(...) __riscv_vwsub_vv_i16m8_tumu(__VA_ARGS__)

#define	vwsub_vv_i16mf2(...) __riscv_vwsub_vv_i16mf2(__VA_ARGS__)

#define	vwsub_vv_i16mf2_m(...) __riscv_vwsub_vv_i16mf2_tumu(__VA_ARGS__)

#define	vwsub_vv_i16mf4(...) __riscv_vwsub_vv_i16mf4(__VA_ARGS__)

#define	vwsub_vv_i16mf4_m(...) __riscv_vwsub_vv_i16mf4_tumu(__VA_ARGS__)

#define	vwsub_vv_i32m1(...) __riscv_vwsub_vv_i32m1(__VA_ARGS__)

#define	vwsub_vv_i32m1_m(...) __riscv_vwsub_vv_i32m1_tumu(__VA_ARGS__)

#define	vwsub_vv_i32m2(...) __riscv_vwsub_vv_i32m2(__VA_ARGS__)

#define	vwsub_vv_i32m2_m(...) __riscv_vwsub_vv_i32m2_tumu(__VA_ARGS__)

#define	vwsub_vv_i32m4(...) __riscv_vwsub_vv_i32m4(__VA_ARGS__)

#define	vwsub_vv_i32m4_m(...) __riscv_vwsub_vv_i32m4_tumu(__VA_ARGS__)

#define	vwsub_vv_i32m8(...) __riscv_vwsub_vv_i32m8(__VA_ARGS__)

#define	vwsub_vv_i32m8_m(...) __riscv_vwsub_vv_i32m8_tumu(__VA_ARGS__)

#define	vwsub_vv_i32mf2(...) __riscv_vwsub_vv_i32mf2(__VA_ARGS__)

#define	vwsub_vv_i32mf2_m(...) __riscv_vwsub_vv_i32mf2_tumu(__VA_ARGS__)

#define	vwsub_vv_i64m1(...) __riscv_vwsub_vv_i64m1(__VA_ARGS__)

#define	vwsub_vv_i64m1_m(...) __riscv_vwsub_vv_i64m1_tumu(__VA_ARGS__)

#define	vwsub_vv_i64m2(...) __riscv_vwsub_vv_i64m2(__VA_ARGS__)

#define	vwsub_vv_i64m2_m(...) __riscv_vwsub_vv_i64m2_tumu(__VA_ARGS__)

#define	vwsub_vv_i64m4(...) __riscv_vwsub_vv_i64m4(__VA_ARGS__)

#define	vwsub_vv_i64m4_m(...) __riscv_vwsub_vv_i64m4_tumu(__VA_ARGS__)

#define	vwsub_vv_i64m8(...) __riscv_vwsub_vv_i64m8(__VA_ARGS__)

#define	vwsub_vv_i64m8_m(...) __riscv_vwsub_vv_i64m8_tumu(__VA_ARGS__)

#define	vwsub_vx_i16m1(...) __riscv_vwsub_vx_i16m1(__VA_ARGS__)

#define	vwsub_vx_i16m1_m(...) __riscv_vwsub_vx_i16m1_tumu(__VA_ARGS__)

#define	vwsub_vx_i16m2(...) __riscv_vwsub_vx_i16m2(__VA_ARGS__)

#define	vwsub_vx_i16m2_m(...) __riscv_vwsub_vx_i16m2_tumu(__VA_ARGS__)

#define	vwsub_vx_i16m4(...) __riscv_vwsub_vx_i16m4(__VA_ARGS__)

#define	vwsub_vx_i16m4_m(...) __riscv_vwsub_vx_i16m4_tumu(__VA_ARGS__)

#define	vwsub_vx_i16m8(...) __riscv_vwsub_vx_i16m8(__VA_ARGS__)

#define	vwsub_vx_i16m8_m(...) __riscv_vwsub_vx_i16m8_tumu(__VA_ARGS__)

#define	vwsub_vx_i16mf2(...) __riscv_vwsub_vx_i16mf2(__VA_ARGS__)

#define	vwsub_vx_i16mf2_m(...) __riscv_vwsub_vx_i16mf2_tumu(__VA_ARGS__)

#define	vwsub_vx_i16mf4(...) __riscv_vwsub_vx_i16mf4(__VA_ARGS__)

#define	vwsub_vx_i16mf4_m(...) __riscv_vwsub_vx_i16mf4_tumu(__VA_ARGS__)

#define	vwsub_vx_i32m1(...) __riscv_vwsub_vx_i32m1(__VA_ARGS__)

#define	vwsub_vx_i32m1_m(...) __riscv_vwsub_vx_i32m1_tumu(__VA_ARGS__)

#define	vwsub_vx_i32m2(...) __riscv_vwsub_vx_i32m2(__VA_ARGS__)

#define	vwsub_vx_i32m2_m(...) __riscv_vwsub_vx_i32m2_tumu(__VA_ARGS__)

#define	vwsub_vx_i32m4(...) __riscv_vwsub_vx_i32m4(__VA_ARGS__)

#define	vwsub_vx_i32m4_m(...) __riscv_vwsub_vx_i32m4_tumu(__VA_ARGS__)

#define	vwsub_vx_i32m8(...) __riscv_vwsub_vx_i32m8(__VA_ARGS__)

#define	vwsub_vx_i32m8_m(...) __riscv_vwsub_vx_i32m8_tumu(__VA_ARGS__)

#define	vwsub_vx_i32mf2(...) __riscv_vwsub_vx_i32mf2(__VA_ARGS__)

#define	vwsub_vx_i32mf2_m(...) __riscv_vwsub_vx_i32mf2_tumu(__VA_ARGS__)

#define	vwsub_vx_i64m1(...) __riscv_vwsub_vx_i64m1(__VA_ARGS__)

#define	vwsub_vx_i64m1_m(...) __riscv_vwsub_vx_i64m1_tumu(__VA_ARGS__)

#define	vwsub_vx_i64m2(...) __riscv_vwsub_vx_i64m2(__VA_ARGS__)

#define	vwsub_vx_i64m2_m(...) __riscv_vwsub_vx_i64m2_tumu(__VA_ARGS__)

#define	vwsub_vx_i64m4(...) __riscv_vwsub_vx_i64m4(__VA_ARGS__)

#define	vwsub_vx_i64m4_m(...) __riscv_vwsub_vx_i64m4_tumu(__VA_ARGS__)

#define	vwsub_vx_i64m8(...) __riscv_vwsub_vx_i64m8(__VA_ARGS__)

#define	vwsub_vx_i64m8_m(...) __riscv_vwsub_vx_i64m8_tumu(__VA_ARGS__)

#define	vwsub_wv_i16m1(...) __riscv_vwsub_wv_i16m1(__VA_ARGS__)

#define	vwsub_wv_i16m1_m(...) __riscv_vwsub_wv_i16m1_tumu(__VA_ARGS__)

#define	vwsub_wv_i16m2(...) __riscv_vwsub_wv_i16m2(__VA_ARGS__)

#define	vwsub_wv_i16m2_m(...) __riscv_vwsub_wv_i16m2_tumu(__VA_ARGS__)

#define	vwsub_wv_i16m4(...) __riscv_vwsub_wv_i16m4(__VA_ARGS__)

#define	vwsub_wv_i16m4_m(...) __riscv_vwsub_wv_i16m4_tumu(__VA_ARGS__)

#define	vwsub_wv_i16m8(...) __riscv_vwsub_wv_i16m8(__VA_ARGS__)

#define	vwsub_wv_i16m8_m(...) __riscv_vwsub_wv_i16m8_tumu(__VA_ARGS__)

#define	vwsub_wv_i16mf2(...) __riscv_vwsub_wv_i16mf2(__VA_ARGS__)

#define	vwsub_wv_i16mf2_m(...) __riscv_vwsub_wv_i16mf2_tumu(__VA_ARGS__)

#define	vwsub_wv_i16mf4(...) __riscv_vwsub_wv_i16mf4(__VA_ARGS__)

#define	vwsub_wv_i16mf4_m(...) __riscv_vwsub_wv_i16mf4_tumu(__VA_ARGS__)

#define	vwsub_wv_i32m1(...) __riscv_vwsub_wv_i32m1(__VA_ARGS__)

#define	vwsub_wv_i32m1_m(...) __riscv_vwsub_wv_i32m1_tumu(__VA_ARGS__)

#define	vwsub_wv_i32m2(...) __riscv_vwsub_wv_i32m2(__VA_ARGS__)

#define	vwsub_wv_i32m2_m(...) __riscv_vwsub_wv_i32m2_tumu(__VA_ARGS__)

#define	vwsub_wv_i32m4(...) __riscv_vwsub_wv_i32m4(__VA_ARGS__)

#define	vwsub_wv_i32m4_m(...) __riscv_vwsub_wv_i32m4_tumu(__VA_ARGS__)

#define	vwsub_wv_i32m8(...) __riscv_vwsub_wv_i32m8(__VA_ARGS__)

#define	vwsub_wv_i32m8_m(...) __riscv_vwsub_wv_i32m8_tumu(__VA_ARGS__)

#define	vwsub_wv_i32mf2(...) __riscv_vwsub_wv_i32mf2(__VA_ARGS__)

#define	vwsub_wv_i32mf2_m(...) __riscv_vwsub_wv_i32mf2_tumu(__VA_ARGS__)

#define	vwsub_wv_i64m1(...) __riscv_vwsub_wv_i64m1(__VA_ARGS__)

#define	vwsub_wv_i64m1_m(...) __riscv_vwsub_wv_i64m1_tumu(__VA_ARGS__)

#define	vwsub_wv_i64m2(...) __riscv_vwsub_wv_i64m2(__VA_ARGS__)

#define	vwsub_wv_i64m2_m(...) __riscv_vwsub_wv_i64m2_tumu(__VA_ARGS__)

#define	vwsub_wv_i64m4(...) __riscv_vwsub_wv_i64m4(__VA_ARGS__)

#define	vwsub_wv_i64m4_m(...) __riscv_vwsub_wv_i64m4_tumu(__VA_ARGS__)

#define	vwsub_wv_i64m8(...) __riscv_vwsub_wv_i64m8(__VA_ARGS__)

#define	vwsub_wv_i64m8_m(...) __riscv_vwsub_wv_i64m8_tumu(__VA_ARGS__)

#define	vwsub_wx_i16m1(...) __riscv_vwsub_wx_i16m1(__VA_ARGS__)

#define	vwsub_wx_i16m1_m(...) __riscv_vwsub_wx_i16m1_tumu(__VA_ARGS__)

#define	vwsub_wx_i16m2(...) __riscv_vwsub_wx_i16m2(__VA_ARGS__)

#define	vwsub_wx_i16m2_m(...) __riscv_vwsub_wx_i16m2_tumu(__VA_ARGS__)

#define	vwsub_wx_i16m4(...) __riscv_vwsub_wx_i16m4(__VA_ARGS__)

#define	vwsub_wx_i16m4_m(...) __riscv_vwsub_wx_i16m4_tumu(__VA_ARGS__)

#define	vwsub_wx_i16m8(...) __riscv_vwsub_wx_i16m8(__VA_ARGS__)

#define	vwsub_wx_i16m8_m(...) __riscv_vwsub_wx_i16m8_tumu(__VA_ARGS__)

#define	vwsub_wx_i16mf2(...) __riscv_vwsub_wx_i16mf2(__VA_ARGS__)

#define	vwsub_wx_i16mf2_m(...) __riscv_vwsub_wx_i16mf2_tumu(__VA_ARGS__)

#define	vwsub_wx_i16mf4(...) __riscv_vwsub_wx_i16mf4(__VA_ARGS__)

#define	vwsub_wx_i16mf4_m(...) __riscv_vwsub_wx_i16mf4_tumu(__VA_ARGS__)

#define	vwsub_wx_i32m1(...) __riscv_vwsub_wx_i32m1(__VA_ARGS__)

#define	vwsub_wx_i32m1_m(...) __riscv_vwsub_wx_i32m1_tumu(__VA_ARGS__)

#define	vwsub_wx_i32m2(...) __riscv_vwsub_wx_i32m2(__VA_ARGS__)

#define	vwsub_wx_i32m2_m(...) __riscv_vwsub_wx_i32m2_tumu(__VA_ARGS__)

#define	vwsub_wx_i32m4(...) __riscv_vwsub_wx_i32m4(__VA_ARGS__)

#define	vwsub_wx_i32m4_m(...) __riscv_vwsub_wx_i32m4_tumu(__VA_ARGS__)

#define	vwsub_wx_i32m8(...) __riscv_vwsub_wx_i32m8(__VA_ARGS__)

#define	vwsub_wx_i32m8_m(...) __riscv_vwsub_wx_i32m8_tumu(__VA_ARGS__)

#define	vwsub_wx_i32mf2(...) __riscv_vwsub_wx_i32mf2(__VA_ARGS__)

#define	vwsub_wx_i32mf2_m(...) __riscv_vwsub_wx_i32mf2_tumu(__VA_ARGS__)

#define	vwsub_wx_i64m1(...) __riscv_vwsub_wx_i64m1(__VA_ARGS__)

#define	vwsub_wx_i64m1_m(...) __riscv_vwsub_wx_i64m1_tumu(__VA_ARGS__)

#define	vwsub_wx_i64m2(...) __riscv_vwsub_wx_i64m2(__VA_ARGS__)

#define	vwsub_wx_i64m2_m(...) __riscv_vwsub_wx_i64m2_tumu(__VA_ARGS__)

#define	vwsub_wx_i64m4(...) __riscv_vwsub_wx_i64m4(__VA_ARGS__)

#define	vwsub_wx_i64m4_m(...) __riscv_vwsub_wx_i64m4_tumu(__VA_ARGS__)

#define	vwsub_wx_i64m8(...) __riscv_vwsub_wx_i64m8(__VA_ARGS__)

#define	vwsub_wx_i64m8_m(...) __riscv_vwsub_wx_i64m8_tumu(__VA_ARGS__)

#define	vwsubu_vv_u16m1(...) __riscv_vwsubu_vv_u16m1(__VA_ARGS__)

#define	vwsubu_vv_u16m1_m(...) __riscv_vwsubu_vv_u16m1_tumu(__VA_ARGS__)

#define	vwsubu_vv_u16m2(...) __riscv_vwsubu_vv_u16m2(__VA_ARGS__)

#define	vwsubu_vv_u16m2_m(...) __riscv_vwsubu_vv_u16m2_tumu(__VA_ARGS__)

#define	vwsubu_vv_u16m4(...) __riscv_vwsubu_vv_u16m4(__VA_ARGS__)

#define	vwsubu_vv_u16m4_m(...) __riscv_vwsubu_vv_u16m4_tumu(__VA_ARGS__)

#define	vwsubu_vv_u16m8(...) __riscv_vwsubu_vv_u16m8(__VA_ARGS__)

#define	vwsubu_vv_u16m8_m(...) __riscv_vwsubu_vv_u16m8_tumu(__VA_ARGS__)

#define	vwsubu_vv_u16mf2(...) __riscv_vwsubu_vv_u16mf2(__VA_ARGS__)

#define	vwsubu_vv_u16mf2_m(...) __riscv_vwsubu_vv_u16mf2_tumu(__VA_ARGS__)

#define	vwsubu_vv_u16mf4(...) __riscv_vwsubu_vv_u16mf4(__VA_ARGS__)

#define	vwsubu_vv_u16mf4_m(...) __riscv_vwsubu_vv_u16mf4_tumu(__VA_ARGS__)

#define	vwsubu_vv_u32m1(...) __riscv_vwsubu_vv_u32m1(__VA_ARGS__)

#define	vwsubu_vv_u32m1_m(...) __riscv_vwsubu_vv_u32m1_tumu(__VA_ARGS__)

#define	vwsubu_vv_u32m2(...) __riscv_vwsubu_vv_u32m2(__VA_ARGS__)

#define	vwsubu_vv_u32m2_m(...) __riscv_vwsubu_vv_u32m2_tumu(__VA_ARGS__)

#define	vwsubu_vv_u32m4(...) __riscv_vwsubu_vv_u32m4(__VA_ARGS__)

#define	vwsubu_vv_u32m4_m(...) __riscv_vwsubu_vv_u32m4_tumu(__VA_ARGS__)

#define	vwsubu_vv_u32m8(...) __riscv_vwsubu_vv_u32m8(__VA_ARGS__)

#define	vwsubu_vv_u32m8_m(...) __riscv_vwsubu_vv_u32m8_tumu(__VA_ARGS__)

#define	vwsubu_vv_u32mf2(...) __riscv_vwsubu_vv_u32mf2(__VA_ARGS__)

#define	vwsubu_vv_u32mf2_m(...) __riscv_vwsubu_vv_u32mf2_tumu(__VA_ARGS__)

#define	vwsubu_vv_u64m1(...) __riscv_vwsubu_vv_u64m1(__VA_ARGS__)

#define	vwsubu_vv_u64m1_m(...) __riscv_vwsubu_vv_u64m1_tumu(__VA_ARGS__)

#define	vwsubu_vv_u64m2(...) __riscv_vwsubu_vv_u64m2(__VA_ARGS__)

#define	vwsubu_vv_u64m2_m(...) __riscv_vwsubu_vv_u64m2_tumu(__VA_ARGS__)

#define	vwsubu_vv_u64m4(...) __riscv_vwsubu_vv_u64m4(__VA_ARGS__)

#define	vwsubu_vv_u64m4_m(...) __riscv_vwsubu_vv_u64m4_tumu(__VA_ARGS__)

#define	vwsubu_vv_u64m8(...) __riscv_vwsubu_vv_u64m8(__VA_ARGS__)

#define	vwsubu_vv_u64m8_m(...) __riscv_vwsubu_vv_u64m8_tumu(__VA_ARGS__)

#define	vwsubu_vx_u16m1(...) __riscv_vwsubu_vx_u16m1(__VA_ARGS__)

#define	vwsubu_vx_u16m1_m(...) __riscv_vwsubu_vx_u16m1_tumu(__VA_ARGS__)

#define	vwsubu_vx_u16m2(...) __riscv_vwsubu_vx_u16m2(__VA_ARGS__)

#define	vwsubu_vx_u16m2_m(...) __riscv_vwsubu_vx_u16m2_tumu(__VA_ARGS__)

#define	vwsubu_vx_u16m4(...) __riscv_vwsubu_vx_u16m4(__VA_ARGS__)

#define	vwsubu_vx_u16m4_m(...) __riscv_vwsubu_vx_u16m4_tumu(__VA_ARGS__)

#define	vwsubu_vx_u16m8(...) __riscv_vwsubu_vx_u16m8(__VA_ARGS__)

#define	vwsubu_vx_u16m8_m(...) __riscv_vwsubu_vx_u16m8_tumu(__VA_ARGS__)

#define	vwsubu_vx_u16mf2(...) __riscv_vwsubu_vx_u16mf2(__VA_ARGS__)

#define	vwsubu_vx_u16mf2_m(...) __riscv_vwsubu_vx_u16mf2_tumu(__VA_ARGS__)

#define	vwsubu_vx_u16mf4(...) __riscv_vwsubu_vx_u16mf4(__VA_ARGS__)

#define	vwsubu_vx_u16mf4_m(...) __riscv_vwsubu_vx_u16mf4_tumu(__VA_ARGS__)

#define	vwsubu_vx_u32m1(...) __riscv_vwsubu_vx_u32m1(__VA_ARGS__)

#define	vwsubu_vx_u32m1_m(...) __riscv_vwsubu_vx_u32m1_tumu(__VA_ARGS__)

#define	vwsubu_vx_u32m2(...) __riscv_vwsubu_vx_u32m2(__VA_ARGS__)

#define	vwsubu_vx_u32m2_m(...) __riscv_vwsubu_vx_u32m2_tumu(__VA_ARGS__)

#define	vwsubu_vx_u32m4(...) __riscv_vwsubu_vx_u32m4(__VA_ARGS__)

#define	vwsubu_vx_u32m4_m(...) __riscv_vwsubu_vx_u32m4_tumu(__VA_ARGS__)

#define	vwsubu_vx_u32m8(...) __riscv_vwsubu_vx_u32m8(__VA_ARGS__)

#define	vwsubu_vx_u32m8_m(...) __riscv_vwsubu_vx_u32m8_tumu(__VA_ARGS__)

#define	vwsubu_vx_u32mf2(...) __riscv_vwsubu_vx_u32mf2(__VA_ARGS__)

#define	vwsubu_vx_u32mf2_m(...) __riscv_vwsubu_vx_u32mf2_tumu(__VA_ARGS__)

#define	vwsubu_vx_u64m1(...) __riscv_vwsubu_vx_u64m1(__VA_ARGS__)

#define	vwsubu_vx_u64m1_m(...) __riscv_vwsubu_vx_u64m1_tumu(__VA_ARGS__)

#define	vwsubu_vx_u64m2(...) __riscv_vwsubu_vx_u64m2(__VA_ARGS__)

#define	vwsubu_vx_u64m2_m(...) __riscv_vwsubu_vx_u64m2_tumu(__VA_ARGS__)

#define	vwsubu_vx_u64m4(...) __riscv_vwsubu_vx_u64m4(__VA_ARGS__)

#define	vwsubu_vx_u64m4_m(...) __riscv_vwsubu_vx_u64m4_tumu(__VA_ARGS__)

#define	vwsubu_vx_u64m8(...) __riscv_vwsubu_vx_u64m8(__VA_ARGS__)

#define	vwsubu_vx_u64m8_m(...) __riscv_vwsubu_vx_u64m8_tumu(__VA_ARGS__)

#define	vwsubu_wv_u16m1(...) __riscv_vwsubu_wv_u16m1(__VA_ARGS__)

#define	vwsubu_wv_u16m1_m(...) __riscv_vwsubu_wv_u16m1_tumu(__VA_ARGS__)

#define	vwsubu_wv_u16m2(...) __riscv_vwsubu_wv_u16m2(__VA_ARGS__)

#define	vwsubu_wv_u16m2_m(...) __riscv_vwsubu_wv_u16m2_tumu(__VA_ARGS__)

#define	vwsubu_wv_u16m4(...) __riscv_vwsubu_wv_u16m4(__VA_ARGS__)

#define	vwsubu_wv_u16m4_m(...) __riscv_vwsubu_wv_u16m4_tumu(__VA_ARGS__)

#define	vwsubu_wv_u16m8(...) __riscv_vwsubu_wv_u16m8(__VA_ARGS__)

#define	vwsubu_wv_u16m8_m(...) __riscv_vwsubu_wv_u16m8_tumu(__VA_ARGS__)

#define	vwsubu_wv_u16mf2(...) __riscv_vwsubu_wv_u16mf2(__VA_ARGS__)

#define	vwsubu_wv_u16mf2_m(...) __riscv_vwsubu_wv_u16mf2_tumu(__VA_ARGS__)

#define	vwsubu_wv_u16mf4(...) __riscv_vwsubu_wv_u16mf4(__VA_ARGS__)

#define	vwsubu_wv_u16mf4_m(...) __riscv_vwsubu_wv_u16mf4_tumu(__VA_ARGS__)

#define	vwsubu_wv_u32m1(...) __riscv_vwsubu_wv_u32m1(__VA_ARGS__)

#define	vwsubu_wv_u32m1_m(...) __riscv_vwsubu_wv_u32m1_tumu(__VA_ARGS__)

#define	vwsubu_wv_u32m2(...) __riscv_vwsubu_wv_u32m2(__VA_ARGS__)

#define	vwsubu_wv_u32m2_m(...) __riscv_vwsubu_wv_u32m2_tumu(__VA_ARGS__)

#define	vwsubu_wv_u32m4(...) __riscv_vwsubu_wv_u32m4(__VA_ARGS__)

#define	vwsubu_wv_u32m4_m(...) __riscv_vwsubu_wv_u32m4_tumu(__VA_ARGS__)

#define	vwsubu_wv_u32m8(...) __riscv_vwsubu_wv_u32m8(__VA_ARGS__)

#define	vwsubu_wv_u32m8_m(...) __riscv_vwsubu_wv_u32m8_tumu(__VA_ARGS__)

#define	vwsubu_wv_u32mf2(...) __riscv_vwsubu_wv_u32mf2(__VA_ARGS__)

#define	vwsubu_wv_u32mf2_m(...) __riscv_vwsubu_wv_u32mf2_tumu(__VA_ARGS__)

#define	vwsubu_wv_u64m1(...) __riscv_vwsubu_wv_u64m1(__VA_ARGS__)

#define	vwsubu_wv_u64m1_m(...) __riscv_vwsubu_wv_u64m1_tumu(__VA_ARGS__)

#define	vwsubu_wv_u64m2(...) __riscv_vwsubu_wv_u64m2(__VA_ARGS__)

#define	vwsubu_wv_u64m2_m(...) __riscv_vwsubu_wv_u64m2_tumu(__VA_ARGS__)

#define	vwsubu_wv_u64m4(...) __riscv_vwsubu_wv_u64m4(__VA_ARGS__)

#define	vwsubu_wv_u64m4_m(...) __riscv_vwsubu_wv_u64m4_tumu(__VA_ARGS__)

#define	vwsubu_wv_u64m8(...) __riscv_vwsubu_wv_u64m8(__VA_ARGS__)

#define	vwsubu_wv_u64m8_m(...) __riscv_vwsubu_wv_u64m8_tumu(__VA_ARGS__)

#define	vwsubu_wx_u16m1(...) __riscv_vwsubu_wx_u16m1(__VA_ARGS__)

#define	vwsubu_wx_u16m1_m(...) __riscv_vwsubu_wx_u16m1_tumu(__VA_ARGS__)

#define	vwsubu_wx_u16m2(...) __riscv_vwsubu_wx_u16m2(__VA_ARGS__)

#define	vwsubu_wx_u16m2_m(...) __riscv_vwsubu_wx_u16m2_tumu(__VA_ARGS__)

#define	vwsubu_wx_u16m4(...) __riscv_vwsubu_wx_u16m4(__VA_ARGS__)

#define	vwsubu_wx_u16m4_m(...) __riscv_vwsubu_wx_u16m4_tumu(__VA_ARGS__)

#define	vwsubu_wx_u16m8(...) __riscv_vwsubu_wx_u16m8(__VA_ARGS__)

#define	vwsubu_wx_u16m8_m(...) __riscv_vwsubu_wx_u16m8_tumu(__VA_ARGS__)

#define	vwsubu_wx_u16mf2(...) __riscv_vwsubu_wx_u16mf2(__VA_ARGS__)

#define	vwsubu_wx_u16mf2_m(...) __riscv_vwsubu_wx_u16mf2_tumu(__VA_ARGS__)

#define	vwsubu_wx_u16mf4(...) __riscv_vwsubu_wx_u16mf4(__VA_ARGS__)

#define	vwsubu_wx_u16mf4_m(...) __riscv_vwsubu_wx_u16mf4_tumu(__VA_ARGS__)

#define	vwsubu_wx_u32m1(...) __riscv_vwsubu_wx_u32m1(__VA_ARGS__)

#define	vwsubu_wx_u32m1_m(...) __riscv_vwsubu_wx_u32m1_tumu(__VA_ARGS__)

#define	vwsubu_wx_u32m2(...) __riscv_vwsubu_wx_u32m2(__VA_ARGS__)

#define	vwsubu_wx_u32m2_m(...) __riscv_vwsubu_wx_u32m2_tumu(__VA_ARGS__)

#define	vwsubu_wx_u32m4(...) __riscv_vwsubu_wx_u32m4(__VA_ARGS__)

#define	vwsubu_wx_u32m4_m(...) __riscv_vwsubu_wx_u32m4_tumu(__VA_ARGS__)

#define	vwsubu_wx_u32m8(...) __riscv_vwsubu_wx_u32m8(__VA_ARGS__)

#define	vwsubu_wx_u32m8_m(...) __riscv_vwsubu_wx_u32m8_tumu(__VA_ARGS__)

#define	vwsubu_wx_u32mf2(...) __riscv_vwsubu_wx_u32mf2(__VA_ARGS__)

#define	vwsubu_wx_u32mf2_m(...) __riscv_vwsubu_wx_u32mf2_tumu(__VA_ARGS__)

#define	vwsubu_wx_u64m1(...) __riscv_vwsubu_wx_u64m1(__VA_ARGS__)

#define	vwsubu_wx_u64m1_m(...) __riscv_vwsubu_wx_u64m1_tumu(__VA_ARGS__)

#define	vwsubu_wx_u64m2(...) __riscv_vwsubu_wx_u64m2(__VA_ARGS__)

#define	vwsubu_wx_u64m2_m(...) __riscv_vwsubu_wx_u64m2_tumu(__VA_ARGS__)

#define	vwsubu_wx_u64m4(...) __riscv_vwsubu_wx_u64m4(__VA_ARGS__)

#define	vwsubu_wx_u64m4_m(...) __riscv_vwsubu_wx_u64m4_tumu(__VA_ARGS__)

#define	vwsubu_wx_u64m8(...) __riscv_vwsubu_wx_u64m8(__VA_ARGS__)

#define	vwsubu_wx_u64m8_m(...) __riscv_vwsubu_wx_u64m8_tumu(__VA_ARGS__)

#define	vxor_vv_i16m1(...) __riscv_vxor_vv_i16m1(__VA_ARGS__)

#define	vxor_vv_i16m1_m(...) __riscv_vxor_vv_i16m1_tumu(__VA_ARGS__)

#define	vxor_vv_i16m2(...) __riscv_vxor_vv_i16m2(__VA_ARGS__)

#define	vxor_vv_i16m2_m(...) __riscv_vxor_vv_i16m2_tumu(__VA_ARGS__)

#define	vxor_vv_i16m4(...) __riscv_vxor_vv_i16m4(__VA_ARGS__)

#define	vxor_vv_i16m4_m(...) __riscv_vxor_vv_i16m4_tumu(__VA_ARGS__)

#define	vxor_vv_i16m8(...) __riscv_vxor_vv_i16m8(__VA_ARGS__)

#define	vxor_vv_i16m8_m(...) __riscv_vxor_vv_i16m8_tumu(__VA_ARGS__)

#define	vxor_vv_i16mf2(...) __riscv_vxor_vv_i16mf2(__VA_ARGS__)

#define	vxor_vv_i16mf2_m(...) __riscv_vxor_vv_i16mf2_tumu(__VA_ARGS__)

#define	vxor_vv_i16mf4(...) __riscv_vxor_vv_i16mf4(__VA_ARGS__)

#define	vxor_vv_i16mf4_m(...) __riscv_vxor_vv_i16mf4_tumu(__VA_ARGS__)

#define	vxor_vv_i32m1(...) __riscv_vxor_vv_i32m1(__VA_ARGS__)

#define	vxor_vv_i32m1_m(...) __riscv_vxor_vv_i32m1_tumu(__VA_ARGS__)

#define	vxor_vv_i32m2(...) __riscv_vxor_vv_i32m2(__VA_ARGS__)

#define	vxor_vv_i32m2_m(...) __riscv_vxor_vv_i32m2_tumu(__VA_ARGS__)

#define	vxor_vv_i32m4(...) __riscv_vxor_vv_i32m4(__VA_ARGS__)

#define	vxor_vv_i32m4_m(...) __riscv_vxor_vv_i32m4_tumu(__VA_ARGS__)

#define	vxor_vv_i32m8(...) __riscv_vxor_vv_i32m8(__VA_ARGS__)

#define	vxor_vv_i32m8_m(...) __riscv_vxor_vv_i32m8_tumu(__VA_ARGS__)

#define	vxor_vv_i32mf2(...) __riscv_vxor_vv_i32mf2(__VA_ARGS__)

#define	vxor_vv_i32mf2_m(...) __riscv_vxor_vv_i32mf2_tumu(__VA_ARGS__)

#define	vxor_vv_i64m1(...) __riscv_vxor_vv_i64m1(__VA_ARGS__)

#define	vxor_vv_i64m1_m(...) __riscv_vxor_vv_i64m1_tumu(__VA_ARGS__)

#define	vxor_vv_i64m2(...) __riscv_vxor_vv_i64m2(__VA_ARGS__)

#define	vxor_vv_i64m2_m(...) __riscv_vxor_vv_i64m2_tumu(__VA_ARGS__)

#define	vxor_vv_i64m4(...) __riscv_vxor_vv_i64m4(__VA_ARGS__)

#define	vxor_vv_i64m4_m(...) __riscv_vxor_vv_i64m4_tumu(__VA_ARGS__)

#define	vxor_vv_i64m8(...) __riscv_vxor_vv_i64m8(__VA_ARGS__)

#define	vxor_vv_i64m8_m(...) __riscv_vxor_vv_i64m8_tumu(__VA_ARGS__)

#define	vxor_vv_i8m1(...) __riscv_vxor_vv_i8m1(__VA_ARGS__)

#define	vxor_vv_i8m1_m(...) __riscv_vxor_vv_i8m1_tumu(__VA_ARGS__)

#define	vxor_vv_i8m2(...) __riscv_vxor_vv_i8m2(__VA_ARGS__)

#define	vxor_vv_i8m2_m(...) __riscv_vxor_vv_i8m2_tumu(__VA_ARGS__)

#define	vxor_vv_i8m4(...) __riscv_vxor_vv_i8m4(__VA_ARGS__)

#define	vxor_vv_i8m4_m(...) __riscv_vxor_vv_i8m4_tumu(__VA_ARGS__)

#define	vxor_vv_i8m8(...) __riscv_vxor_vv_i8m8(__VA_ARGS__)

#define	vxor_vv_i8m8_m(...) __riscv_vxor_vv_i8m8_tumu(__VA_ARGS__)

#define	vxor_vv_i8mf2(...) __riscv_vxor_vv_i8mf2(__VA_ARGS__)

#define	vxor_vv_i8mf2_m(...) __riscv_vxor_vv_i8mf2_tumu(__VA_ARGS__)

#define	vxor_vv_i8mf4(...) __riscv_vxor_vv_i8mf4(__VA_ARGS__)

#define	vxor_vv_i8mf4_m(...) __riscv_vxor_vv_i8mf4_tumu(__VA_ARGS__)

#define	vxor_vv_i8mf8(...) __riscv_vxor_vv_i8mf8(__VA_ARGS__)

#define	vxor_vv_i8mf8_m(...) __riscv_vxor_vv_i8mf8_tumu(__VA_ARGS__)

#define	vxor_vv_u16m1(...) __riscv_vxor_vv_u16m1(__VA_ARGS__)

#define	vxor_vv_u16m1_m(...) __riscv_vxor_vv_u16m1_tumu(__VA_ARGS__)

#define	vxor_vv_u16m2(...) __riscv_vxor_vv_u16m2(__VA_ARGS__)

#define	vxor_vv_u16m2_m(...) __riscv_vxor_vv_u16m2_tumu(__VA_ARGS__)

#define	vxor_vv_u16m4(...) __riscv_vxor_vv_u16m4(__VA_ARGS__)

#define	vxor_vv_u16m4_m(...) __riscv_vxor_vv_u16m4_tumu(__VA_ARGS__)

#define	vxor_vv_u16m8(...) __riscv_vxor_vv_u16m8(__VA_ARGS__)

#define	vxor_vv_u16m8_m(...) __riscv_vxor_vv_u16m8_tumu(__VA_ARGS__)

#define	vxor_vv_u16mf2(...) __riscv_vxor_vv_u16mf2(__VA_ARGS__)

#define	vxor_vv_u16mf2_m(...) __riscv_vxor_vv_u16mf2_tumu(__VA_ARGS__)

#define	vxor_vv_u16mf4(...) __riscv_vxor_vv_u16mf4(__VA_ARGS__)

#define	vxor_vv_u16mf4_m(...) __riscv_vxor_vv_u16mf4_tumu(__VA_ARGS__)

#define	vxor_vv_u32m1(...) __riscv_vxor_vv_u32m1(__VA_ARGS__)

#define	vxor_vv_u32m1_m(...) __riscv_vxor_vv_u32m1_tumu(__VA_ARGS__)

#define	vxor_vv_u32m2(...) __riscv_vxor_vv_u32m2(__VA_ARGS__)

#define	vxor_vv_u32m2_m(...) __riscv_vxor_vv_u32m2_tumu(__VA_ARGS__)

#define	vxor_vv_u32m4(...) __riscv_vxor_vv_u32m4(__VA_ARGS__)

#define	vxor_vv_u32m4_m(...) __riscv_vxor_vv_u32m4_tumu(__VA_ARGS__)

#define	vxor_vv_u32m8(...) __riscv_vxor_vv_u32m8(__VA_ARGS__)

#define	vxor_vv_u32m8_m(...) __riscv_vxor_vv_u32m8_tumu(__VA_ARGS__)

#define	vxor_vv_u32mf2(...) __riscv_vxor_vv_u32mf2(__VA_ARGS__)

#define	vxor_vv_u32mf2_m(...) __riscv_vxor_vv_u32mf2_tumu(__VA_ARGS__)

#define	vxor_vv_u64m1(...) __riscv_vxor_vv_u64m1(__VA_ARGS__)

#define	vxor_vv_u64m1_m(...) __riscv_vxor_vv_u64m1_tumu(__VA_ARGS__)

#define	vxor_vv_u64m2(...) __riscv_vxor_vv_u64m2(__VA_ARGS__)

#define	vxor_vv_u64m2_m(...) __riscv_vxor_vv_u64m2_tumu(__VA_ARGS__)

#define	vxor_vv_u64m4(...) __riscv_vxor_vv_u64m4(__VA_ARGS__)

#define	vxor_vv_u64m4_m(...) __riscv_vxor_vv_u64m4_tumu(__VA_ARGS__)

#define	vxor_vv_u64m8(...) __riscv_vxor_vv_u64m8(__VA_ARGS__)

#define	vxor_vv_u64m8_m(...) __riscv_vxor_vv_u64m8_tumu(__VA_ARGS__)

#define	vxor_vv_u8m1(...) __riscv_vxor_vv_u8m1(__VA_ARGS__)

#define	vxor_vv_u8m1_m(...) __riscv_vxor_vv_u8m1_tumu(__VA_ARGS__)

#define	vxor_vv_u8m2(...) __riscv_vxor_vv_u8m2(__VA_ARGS__)

#define	vxor_vv_u8m2_m(...) __riscv_vxor_vv_u8m2_tumu(__VA_ARGS__)

#define	vxor_vv_u8m4(...) __riscv_vxor_vv_u8m4(__VA_ARGS__)

#define	vxor_vv_u8m4_m(...) __riscv_vxor_vv_u8m4_tumu(__VA_ARGS__)

#define	vxor_vv_u8m8(...) __riscv_vxor_vv_u8m8(__VA_ARGS__)

#define	vxor_vv_u8m8_m(...) __riscv_vxor_vv_u8m8_tumu(__VA_ARGS__)

#define	vxor_vv_u8mf2(...) __riscv_vxor_vv_u8mf2(__VA_ARGS__)

#define	vxor_vv_u8mf2_m(...) __riscv_vxor_vv_u8mf2_tumu(__VA_ARGS__)

#define	vxor_vv_u8mf4(...) __riscv_vxor_vv_u8mf4(__VA_ARGS__)

#define	vxor_vv_u8mf4_m(...) __riscv_vxor_vv_u8mf4_tumu(__VA_ARGS__)

#define	vxor_vv_u8mf8(...) __riscv_vxor_vv_u8mf8(__VA_ARGS__)

#define	vxor_vv_u8mf8_m(...) __riscv_vxor_vv_u8mf8_tumu(__VA_ARGS__)

#define	vxor_vx_i16m1(...) __riscv_vxor_vx_i16m1(__VA_ARGS__)

#define	vxor_vx_i16m1_m(...) __riscv_vxor_vx_i16m1_tumu(__VA_ARGS__)

#define	vxor_vx_i16m2(...) __riscv_vxor_vx_i16m2(__VA_ARGS__)

#define	vxor_vx_i16m2_m(...) __riscv_vxor_vx_i16m2_tumu(__VA_ARGS__)

#define	vxor_vx_i16m4(...) __riscv_vxor_vx_i16m4(__VA_ARGS__)

#define	vxor_vx_i16m4_m(...) __riscv_vxor_vx_i16m4_tumu(__VA_ARGS__)

#define	vxor_vx_i16m8(...) __riscv_vxor_vx_i16m8(__VA_ARGS__)

#define	vxor_vx_i16m8_m(...) __riscv_vxor_vx_i16m8_tumu(__VA_ARGS__)

#define	vxor_vx_i16mf2(...) __riscv_vxor_vx_i16mf2(__VA_ARGS__)

#define	vxor_vx_i16mf2_m(...) __riscv_vxor_vx_i16mf2_tumu(__VA_ARGS__)

#define	vxor_vx_i16mf4(...) __riscv_vxor_vx_i16mf4(__VA_ARGS__)

#define	vxor_vx_i16mf4_m(...) __riscv_vxor_vx_i16mf4_tumu(__VA_ARGS__)

#define	vxor_vx_i32m1(...) __riscv_vxor_vx_i32m1(__VA_ARGS__)

#define	vxor_vx_i32m1_m(...) __riscv_vxor_vx_i32m1_tumu(__VA_ARGS__)

#define	vxor_vx_i32m2(...) __riscv_vxor_vx_i32m2(__VA_ARGS__)

#define	vxor_vx_i32m2_m(...) __riscv_vxor_vx_i32m2_tumu(__VA_ARGS__)

#define	vxor_vx_i32m4(...) __riscv_vxor_vx_i32m4(__VA_ARGS__)

#define	vxor_vx_i32m4_m(...) __riscv_vxor_vx_i32m4_tumu(__VA_ARGS__)

#define	vxor_vx_i32m8(...) __riscv_vxor_vx_i32m8(__VA_ARGS__)

#define	vxor_vx_i32m8_m(...) __riscv_vxor_vx_i32m8_tumu(__VA_ARGS__)

#define	vxor_vx_i32mf2(...) __riscv_vxor_vx_i32mf2(__VA_ARGS__)

#define	vxor_vx_i32mf2_m(...) __riscv_vxor_vx_i32mf2_tumu(__VA_ARGS__)

#define	vxor_vx_i64m1(...) __riscv_vxor_vx_i64m1(__VA_ARGS__)

#define	vxor_vx_i64m1_m(...) __riscv_vxor_vx_i64m1_tumu(__VA_ARGS__)

#define	vxor_vx_i64m2(...) __riscv_vxor_vx_i64m2(__VA_ARGS__)

#define	vxor_vx_i64m2_m(...) __riscv_vxor_vx_i64m2_tumu(__VA_ARGS__)

#define	vxor_vx_i64m4(...) __riscv_vxor_vx_i64m4(__VA_ARGS__)

#define	vxor_vx_i64m4_m(...) __riscv_vxor_vx_i64m4_tumu(__VA_ARGS__)

#define	vxor_vx_i64m8(...) __riscv_vxor_vx_i64m8(__VA_ARGS__)

#define	vxor_vx_i64m8_m(...) __riscv_vxor_vx_i64m8_tumu(__VA_ARGS__)

#define	vxor_vx_i8m1(...) __riscv_vxor_vx_i8m1(__VA_ARGS__)

#define	vxor_vx_i8m1_m(...) __riscv_vxor_vx_i8m1_tumu(__VA_ARGS__)

#define	vxor_vx_i8m2(...) __riscv_vxor_vx_i8m2(__VA_ARGS__)

#define	vxor_vx_i8m2_m(...) __riscv_vxor_vx_i8m2_tumu(__VA_ARGS__)

#define	vxor_vx_i8m4(...) __riscv_vxor_vx_i8m4(__VA_ARGS__)

#define	vxor_vx_i8m4_m(...) __riscv_vxor_vx_i8m4_tumu(__VA_ARGS__)

#define	vxor_vx_i8m8(...) __riscv_vxor_vx_i8m8(__VA_ARGS__)

#define	vxor_vx_i8m8_m(...) __riscv_vxor_vx_i8m8_tumu(__VA_ARGS__)

#define	vxor_vx_i8mf2(...) __riscv_vxor_vx_i8mf2(__VA_ARGS__)

#define	vxor_vx_i8mf2_m(...) __riscv_vxor_vx_i8mf2_tumu(__VA_ARGS__)

#define	vxor_vx_i8mf4(...) __riscv_vxor_vx_i8mf4(__VA_ARGS__)

#define	vxor_vx_i8mf4_m(...) __riscv_vxor_vx_i8mf4_tumu(__VA_ARGS__)

#define	vxor_vx_i8mf8(...) __riscv_vxor_vx_i8mf8(__VA_ARGS__)

#define	vxor_vx_i8mf8_m(...) __riscv_vxor_vx_i8mf8_tumu(__VA_ARGS__)

#define	vxor_vx_u16m1(...) __riscv_vxor_vx_u16m1(__VA_ARGS__)

#define	vxor_vx_u16m1_m(...) __riscv_vxor_vx_u16m1_tumu(__VA_ARGS__)

#define	vxor_vx_u16m2(...) __riscv_vxor_vx_u16m2(__VA_ARGS__)

#define	vxor_vx_u16m2_m(...) __riscv_vxor_vx_u16m2_tumu(__VA_ARGS__)

#define	vxor_vx_u16m4(...) __riscv_vxor_vx_u16m4(__VA_ARGS__)

#define	vxor_vx_u16m4_m(...) __riscv_vxor_vx_u16m4_tumu(__VA_ARGS__)

#define	vxor_vx_u16m8(...) __riscv_vxor_vx_u16m8(__VA_ARGS__)

#define	vxor_vx_u16m8_m(...) __riscv_vxor_vx_u16m8_tumu(__VA_ARGS__)

#define	vxor_vx_u16mf2(...) __riscv_vxor_vx_u16mf2(__VA_ARGS__)

#define	vxor_vx_u16mf2_m(...) __riscv_vxor_vx_u16mf2_tumu(__VA_ARGS__)

#define	vxor_vx_u16mf4(...) __riscv_vxor_vx_u16mf4(__VA_ARGS__)

#define	vxor_vx_u16mf4_m(...) __riscv_vxor_vx_u16mf4_tumu(__VA_ARGS__)

#define	vxor_vx_u32m1(...) __riscv_vxor_vx_u32m1(__VA_ARGS__)

#define	vxor_vx_u32m1_m(...) __riscv_vxor_vx_u32m1_tumu(__VA_ARGS__)

#define	vxor_vx_u32m2(...) __riscv_vxor_vx_u32m2(__VA_ARGS__)

#define	vxor_vx_u32m2_m(...) __riscv_vxor_vx_u32m2_tumu(__VA_ARGS__)

#define	vxor_vx_u32m4(...) __riscv_vxor_vx_u32m4(__VA_ARGS__)

#define	vxor_vx_u32m4_m(...) __riscv_vxor_vx_u32m4_tumu(__VA_ARGS__)

#define	vxor_vx_u32m8(...) __riscv_vxor_vx_u32m8(__VA_ARGS__)

#define	vxor_vx_u32m8_m(...) __riscv_vxor_vx_u32m8_tumu(__VA_ARGS__)

#define	vxor_vx_u32mf2(...) __riscv_vxor_vx_u32mf2(__VA_ARGS__)

#define	vxor_vx_u32mf2_m(...) __riscv_vxor_vx_u32mf2_tumu(__VA_ARGS__)

#define	vxor_vx_u64m1(...) __riscv_vxor_vx_u64m1(__VA_ARGS__)

#define	vxor_vx_u64m1_m(...) __riscv_vxor_vx_u64m1_tumu(__VA_ARGS__)

#define	vxor_vx_u64m2(...) __riscv_vxor_vx_u64m2(__VA_ARGS__)

#define	vxor_vx_u64m2_m(...) __riscv_vxor_vx_u64m2_tumu(__VA_ARGS__)

#define	vxor_vx_u64m4(...) __riscv_vxor_vx_u64m4(__VA_ARGS__)

#define	vxor_vx_u64m4_m(...) __riscv_vxor_vx_u64m4_tumu(__VA_ARGS__)

#define	vxor_vx_u64m8(...) __riscv_vxor_vx_u64m8(__VA_ARGS__)

#define	vxor_vx_u64m8_m(...) __riscv_vxor_vx_u64m8_tumu(__VA_ARGS__)

#define	vxor_vx_u8m1(...) __riscv_vxor_vx_u8m1(__VA_ARGS__)

#define	vxor_vx_u8m1_m(...) __riscv_vxor_vx_u8m1_tumu(__VA_ARGS__)

#define	vxor_vx_u8m2(...) __riscv_vxor_vx_u8m2(__VA_ARGS__)

#define	vxor_vx_u8m2_m(...) __riscv_vxor_vx_u8m2_tumu(__VA_ARGS__)

#define	vxor_vx_u8m4(...) __riscv_vxor_vx_u8m4(__VA_ARGS__)

#define	vxor_vx_u8m4_m(...) __riscv_vxor_vx_u8m4_tumu(__VA_ARGS__)

#define	vxor_vx_u8m8(...) __riscv_vxor_vx_u8m8(__VA_ARGS__)

#define	vxor_vx_u8m8_m(...) __riscv_vxor_vx_u8m8_tumu(__VA_ARGS__)

#define	vxor_vx_u8mf2(...) __riscv_vxor_vx_u8mf2(__VA_ARGS__)

#define	vxor_vx_u8mf2_m(...) __riscv_vxor_vx_u8mf2_tumu(__VA_ARGS__)

#define	vxor_vx_u8mf4(...) __riscv_vxor_vx_u8mf4(__VA_ARGS__)

#define	vxor_vx_u8mf4_m(...) __riscv_vxor_vx_u8mf4_tumu(__VA_ARGS__)

#define	vxor_vx_u8mf8(...) __riscv_vxor_vx_u8mf8(__VA_ARGS__)

#define	vxor_vx_u8mf8_m(...) __riscv_vxor_vx_u8mf8_tumu(__VA_ARGS__)

#define	vzext_vf2_u16m1(...) __riscv_vzext_vf2_u16m1(__VA_ARGS__)

#define	vzext_vf2_u16m1_m(...) __riscv_vzext_vf2_u16m1_tumu(__VA_ARGS__)

#define	vzext_vf2_u16m2(...) __riscv_vzext_vf2_u16m2(__VA_ARGS__)

#define	vzext_vf2_u16m2_m(...) __riscv_vzext_vf2_u16m2_tumu(__VA_ARGS__)

#define	vzext_vf2_u16m4(...) __riscv_vzext_vf2_u16m4(__VA_ARGS__)

#define	vzext_vf2_u16m4_m(...) __riscv_vzext_vf2_u16m4_tumu(__VA_ARGS__)

#define	vzext_vf2_u16m8(...) __riscv_vzext_vf2_u16m8(__VA_ARGS__)

#define	vzext_vf2_u16m8_m(...) __riscv_vzext_vf2_u16m8_tumu(__VA_ARGS__)

#define	vzext_vf2_u16mf2(...) __riscv_vzext_vf2_u16mf2(__VA_ARGS__)

#define	vzext_vf2_u16mf2_m(...) __riscv_vzext_vf2_u16mf2_tumu(__VA_ARGS__)

#define	vzext_vf2_u16mf4(...) __riscv_vzext_vf2_u16mf4(__VA_ARGS__)

#define	vzext_vf2_u16mf4_m(...) __riscv_vzext_vf2_u16mf4_tumu(__VA_ARGS__)

#define	vzext_vf2_u32m1(...) __riscv_vzext_vf2_u32m1(__VA_ARGS__)

#define	vzext_vf2_u32m1_m(...) __riscv_vzext_vf2_u32m1_tumu(__VA_ARGS__)

#define	vzext_vf2_u32m2(...) __riscv_vzext_vf2_u32m2(__VA_ARGS__)

#define	vzext_vf2_u32m2_m(...) __riscv_vzext_vf2_u32m2_tumu(__VA_ARGS__)

#define	vzext_vf2_u32m4(...) __riscv_vzext_vf2_u32m4(__VA_ARGS__)

#define	vzext_vf2_u32m4_m(...) __riscv_vzext_vf2_u32m4_tumu(__VA_ARGS__)

#define	vzext_vf2_u32m8(...) __riscv_vzext_vf2_u32m8(__VA_ARGS__)

#define	vzext_vf2_u32m8_m(...) __riscv_vzext_vf2_u32m8_tumu(__VA_ARGS__)

#define	vzext_vf2_u32mf2(...) __riscv_vzext_vf2_u32mf2(__VA_ARGS__)

#define	vzext_vf2_u32mf2_m(...) __riscv_vzext_vf2_u32mf2_tumu(__VA_ARGS__)

#define	vzext_vf2_u64m1(...) __riscv_vzext_vf2_u64m1(__VA_ARGS__)

#define	vzext_vf2_u64m1_m(...) __riscv_vzext_vf2_u64m1_tumu(__VA_ARGS__)

#define	vzext_vf2_u64m2(...) __riscv_vzext_vf2_u64m2(__VA_ARGS__)

#define	vzext_vf2_u64m2_m(...) __riscv_vzext_vf2_u64m2_tumu(__VA_ARGS__)

#define	vzext_vf2_u64m4(...) __riscv_vzext_vf2_u64m4(__VA_ARGS__)

#define	vzext_vf2_u64m4_m(...) __riscv_vzext_vf2_u64m4_tumu(__VA_ARGS__)

#define	vzext_vf2_u64m8(...) __riscv_vzext_vf2_u64m8(__VA_ARGS__)

#define	vzext_vf2_u64m8_m(...) __riscv_vzext_vf2_u64m8_tumu(__VA_ARGS__)

#define	vzext_vf4_u32m1(...) __riscv_vzext_vf4_u32m1(__VA_ARGS__)

#define	vzext_vf4_u32m1_m(...) __riscv_vzext_vf4_u32m1_tumu(__VA_ARGS__)

#define	vzext_vf4_u32m2(...) __riscv_vzext_vf4_u32m2(__VA_ARGS__)

#define	vzext_vf4_u32m2_m(...) __riscv_vzext_vf4_u32m2_tumu(__VA_ARGS__)

#define	vzext_vf4_u32m4(...) __riscv_vzext_vf4_u32m4(__VA_ARGS__)

#define	vzext_vf4_u32m4_m(...) __riscv_vzext_vf4_u32m4_tumu(__VA_ARGS__)

#define	vzext_vf4_u32m8(...) __riscv_vzext_vf4_u32m8(__VA_ARGS__)

#define	vzext_vf4_u32m8_m(...) __riscv_vzext_vf4_u32m8_tumu(__VA_ARGS__)

#define	vzext_vf4_u32mf2(...) __riscv_vzext_vf4_u32mf2(__VA_ARGS__)

#define	vzext_vf4_u32mf2_m(...) __riscv_vzext_vf4_u32mf2_tumu(__VA_ARGS__)

#define	vzext_vf4_u64m1(...) __riscv_vzext_vf4_u64m1(__VA_ARGS__)

#define	vzext_vf4_u64m1_m(...) __riscv_vzext_vf4_u64m1_tumu(__VA_ARGS__)

#define	vzext_vf4_u64m2(...) __riscv_vzext_vf4_u64m2(__VA_ARGS__)

#define	vzext_vf4_u64m2_m(...) __riscv_vzext_vf4_u64m2_tumu(__VA_ARGS__)

#define	vzext_vf4_u64m4(...) __riscv_vzext_vf4_u64m4(__VA_ARGS__)

#define	vzext_vf4_u64m4_m(...) __riscv_vzext_vf4_u64m4_tumu(__VA_ARGS__)

#define	vzext_vf4_u64m8(...) __riscv_vzext_vf4_u64m8(__VA_ARGS__)

#define	vzext_vf4_u64m8_m(...) __riscv_vzext_vf4_u64m8_tumu(__VA_ARGS__)

#define	vzext_vf8_u64m1(...) __riscv_vzext_vf8_u64m1(__VA_ARGS__)

#define	vzext_vf8_u64m1_m(...) __riscv_vzext_vf8_u64m1_tumu(__VA_ARGS__)

#define	vzext_vf8_u64m2(...) __riscv_vzext_vf8_u64m2(__VA_ARGS__)

#define	vzext_vf8_u64m2_m(...) __riscv_vzext_vf8_u64m2_tumu(__VA_ARGS__)

#define	vzext_vf8_u64m4(...) __riscv_vzext_vf8_u64m4(__VA_ARGS__)

#define	vzext_vf8_u64m4_m(...) __riscv_vzext_vf8_u64m4_tumu(__VA_ARGS__)

#define	vzext_vf8_u64m8(...) __riscv_vzext_vf8_u64m8(__VA_ARGS__)

#define	vzext_vf8_u64m8_m(...) __riscv_vzext_vf8_u64m8_tumu(__VA_ARGS__)

Macro Definition Documentation

◆ vaadd_vv_i16m1

#define vaadd_vv_i16m1 ( ... ) __riscv_vaadd_vv_i16m1(__VA_ARGS__)

◆ vaadd_vv_i16m1_m

#define vaadd_vv_i16m1_m ( ... ) __riscv_vaadd_vv_i16m1_tumu(__VA_ARGS__)

◆ vaadd_vv_i16m2

#define vaadd_vv_i16m2 ( ... ) __riscv_vaadd_vv_i16m2(__VA_ARGS__)

◆ vaadd_vv_i16m2_m

#define vaadd_vv_i16m2_m ( ... ) __riscv_vaadd_vv_i16m2_tumu(__VA_ARGS__)

◆ vaadd_vv_i16m4

#define vaadd_vv_i16m4 ( ... ) __riscv_vaadd_vv_i16m4(__VA_ARGS__)

◆ vaadd_vv_i16m4_m

#define vaadd_vv_i16m4_m ( ... ) __riscv_vaadd_vv_i16m4_tumu(__VA_ARGS__)

◆ vaadd_vv_i16m8

#define vaadd_vv_i16m8 ( ... ) __riscv_vaadd_vv_i16m8(__VA_ARGS__)

◆ vaadd_vv_i16m8_m

#define vaadd_vv_i16m8_m ( ... ) __riscv_vaadd_vv_i16m8_tumu(__VA_ARGS__)

◆ vaadd_vv_i16mf2

#define vaadd_vv_i16mf2 ( ... ) __riscv_vaadd_vv_i16mf2(__VA_ARGS__)

◆ vaadd_vv_i16mf2_m

#define vaadd_vv_i16mf2_m ( ... ) __riscv_vaadd_vv_i16mf2_tumu(__VA_ARGS__)

◆ vaadd_vv_i16mf4

#define vaadd_vv_i16mf4 ( ... ) __riscv_vaadd_vv_i16mf4(__VA_ARGS__)

◆ vaadd_vv_i16mf4_m

#define vaadd_vv_i16mf4_m ( ... ) __riscv_vaadd_vv_i16mf4_tumu(__VA_ARGS__)

◆ vaadd_vv_i32m1

#define vaadd_vv_i32m1 ( ... ) __riscv_vaadd_vv_i32m1(__VA_ARGS__)

◆ vaadd_vv_i32m1_m

#define vaadd_vv_i32m1_m ( ... ) __riscv_vaadd_vv_i32m1_tumu(__VA_ARGS__)

◆ vaadd_vv_i32m2

#define vaadd_vv_i32m2 ( ... ) __riscv_vaadd_vv_i32m2(__VA_ARGS__)

◆ vaadd_vv_i32m2_m

#define vaadd_vv_i32m2_m ( ... ) __riscv_vaadd_vv_i32m2_tumu(__VA_ARGS__)

◆ vaadd_vv_i32m4

#define vaadd_vv_i32m4 ( ... ) __riscv_vaadd_vv_i32m4(__VA_ARGS__)

◆ vaadd_vv_i32m4_m

#define vaadd_vv_i32m4_m ( ... ) __riscv_vaadd_vv_i32m4_tumu(__VA_ARGS__)

◆ vaadd_vv_i32m8

#define vaadd_vv_i32m8 ( ... ) __riscv_vaadd_vv_i32m8(__VA_ARGS__)

◆ vaadd_vv_i32m8_m

#define vaadd_vv_i32m8_m ( ... ) __riscv_vaadd_vv_i32m8_tumu(__VA_ARGS__)

◆ vaadd_vv_i32mf2

#define vaadd_vv_i32mf2 ( ... ) __riscv_vaadd_vv_i32mf2(__VA_ARGS__)

◆ vaadd_vv_i32mf2_m

#define vaadd_vv_i32mf2_m ( ... ) __riscv_vaadd_vv_i32mf2_tumu(__VA_ARGS__)

◆ vaadd_vv_i64m1

#define vaadd_vv_i64m1 ( ... ) __riscv_vaadd_vv_i64m1(__VA_ARGS__)

◆ vaadd_vv_i64m1_m

#define vaadd_vv_i64m1_m ( ... ) __riscv_vaadd_vv_i64m1_tumu(__VA_ARGS__)

◆ vaadd_vv_i64m2

#define vaadd_vv_i64m2 ( ... ) __riscv_vaadd_vv_i64m2(__VA_ARGS__)

◆ vaadd_vv_i64m2_m

#define vaadd_vv_i64m2_m ( ... ) __riscv_vaadd_vv_i64m2_tumu(__VA_ARGS__)

◆ vaadd_vv_i64m4

#define vaadd_vv_i64m4 ( ... ) __riscv_vaadd_vv_i64m4(__VA_ARGS__)

◆ vaadd_vv_i64m4_m

#define vaadd_vv_i64m4_m ( ... ) __riscv_vaadd_vv_i64m4_tumu(__VA_ARGS__)

◆ vaadd_vv_i64m8

#define vaadd_vv_i64m8 ( ... ) __riscv_vaadd_vv_i64m8(__VA_ARGS__)

◆ vaadd_vv_i64m8_m

#define vaadd_vv_i64m8_m ( ... ) __riscv_vaadd_vv_i64m8_tumu(__VA_ARGS__)

◆ vaadd_vv_i8m1

#define vaadd_vv_i8m1 ( ... ) __riscv_vaadd_vv_i8m1(__VA_ARGS__)

◆ vaadd_vv_i8m1_m

#define vaadd_vv_i8m1_m ( ... ) __riscv_vaadd_vv_i8m1_tumu(__VA_ARGS__)

◆ vaadd_vv_i8m2

#define vaadd_vv_i8m2 ( ... ) __riscv_vaadd_vv_i8m2(__VA_ARGS__)

◆ vaadd_vv_i8m2_m

#define vaadd_vv_i8m2_m ( ... ) __riscv_vaadd_vv_i8m2_tumu(__VA_ARGS__)

◆ vaadd_vv_i8m4

#define vaadd_vv_i8m4 ( ... ) __riscv_vaadd_vv_i8m4(__VA_ARGS__)

◆ vaadd_vv_i8m4_m

#define vaadd_vv_i8m4_m ( ... ) __riscv_vaadd_vv_i8m4_tumu(__VA_ARGS__)

◆ vaadd_vv_i8m8

#define vaadd_vv_i8m8 ( ... ) __riscv_vaadd_vv_i8m8(__VA_ARGS__)

◆ vaadd_vv_i8m8_m

#define vaadd_vv_i8m8_m ( ... ) __riscv_vaadd_vv_i8m8_tumu(__VA_ARGS__)

◆ vaadd_vv_i8mf2

#define vaadd_vv_i8mf2 ( ... ) __riscv_vaadd_vv_i8mf2(__VA_ARGS__)

◆ vaadd_vv_i8mf2_m

#define vaadd_vv_i8mf2_m ( ... ) __riscv_vaadd_vv_i8mf2_tumu(__VA_ARGS__)

◆ vaadd_vv_i8mf4

#define vaadd_vv_i8mf4 ( ... ) __riscv_vaadd_vv_i8mf4(__VA_ARGS__)

◆ vaadd_vv_i8mf4_m

#define vaadd_vv_i8mf4_m ( ... ) __riscv_vaadd_vv_i8mf4_tumu(__VA_ARGS__)

◆ vaadd_vv_i8mf8

#define vaadd_vv_i8mf8 ( ... ) __riscv_vaadd_vv_i8mf8(__VA_ARGS__)

◆ vaadd_vv_i8mf8_m

#define vaadd_vv_i8mf8_m ( ... ) __riscv_vaadd_vv_i8mf8_tumu(__VA_ARGS__)

◆ vaadd_vx_i16m1

#define vaadd_vx_i16m1 ( ... ) __riscv_vaadd_vx_i16m1(__VA_ARGS__)

◆ vaadd_vx_i16m1_m

#define vaadd_vx_i16m1_m ( ... ) __riscv_vaadd_vx_i16m1_tumu(__VA_ARGS__)

◆ vaadd_vx_i16m2

#define vaadd_vx_i16m2 ( ... ) __riscv_vaadd_vx_i16m2(__VA_ARGS__)

◆ vaadd_vx_i16m2_m

#define vaadd_vx_i16m2_m ( ... ) __riscv_vaadd_vx_i16m2_tumu(__VA_ARGS__)

◆ vaadd_vx_i16m4

#define vaadd_vx_i16m4 ( ... ) __riscv_vaadd_vx_i16m4(__VA_ARGS__)

◆ vaadd_vx_i16m4_m

#define vaadd_vx_i16m4_m ( ... ) __riscv_vaadd_vx_i16m4_tumu(__VA_ARGS__)

◆ vaadd_vx_i16m8

#define vaadd_vx_i16m8 ( ... ) __riscv_vaadd_vx_i16m8(__VA_ARGS__)

◆ vaadd_vx_i16m8_m

#define vaadd_vx_i16m8_m ( ... ) __riscv_vaadd_vx_i16m8_tumu(__VA_ARGS__)

◆ vaadd_vx_i16mf2

#define vaadd_vx_i16mf2 ( ... ) __riscv_vaadd_vx_i16mf2(__VA_ARGS__)

◆ vaadd_vx_i16mf2_m

#define vaadd_vx_i16mf2_m ( ... ) __riscv_vaadd_vx_i16mf2_tumu(__VA_ARGS__)

◆ vaadd_vx_i16mf4

#define vaadd_vx_i16mf4 ( ... ) __riscv_vaadd_vx_i16mf4(__VA_ARGS__)

◆ vaadd_vx_i16mf4_m

#define vaadd_vx_i16mf4_m ( ... ) __riscv_vaadd_vx_i16mf4_tumu(__VA_ARGS__)

◆ vaadd_vx_i32m1

#define vaadd_vx_i32m1 ( ... ) __riscv_vaadd_vx_i32m1(__VA_ARGS__)

◆ vaadd_vx_i32m1_m

#define vaadd_vx_i32m1_m ( ... ) __riscv_vaadd_vx_i32m1_tumu(__VA_ARGS__)

◆ vaadd_vx_i32m2

#define vaadd_vx_i32m2 ( ... ) __riscv_vaadd_vx_i32m2(__VA_ARGS__)

◆ vaadd_vx_i32m2_m

#define vaadd_vx_i32m2_m ( ... ) __riscv_vaadd_vx_i32m2_tumu(__VA_ARGS__)

◆ vaadd_vx_i32m4

#define vaadd_vx_i32m4 ( ... ) __riscv_vaadd_vx_i32m4(__VA_ARGS__)

◆ vaadd_vx_i32m4_m

#define vaadd_vx_i32m4_m ( ... ) __riscv_vaadd_vx_i32m4_tumu(__VA_ARGS__)

◆ vaadd_vx_i32m8

#define vaadd_vx_i32m8 ( ... ) __riscv_vaadd_vx_i32m8(__VA_ARGS__)

◆ vaadd_vx_i32m8_m

#define vaadd_vx_i32m8_m ( ... ) __riscv_vaadd_vx_i32m8_tumu(__VA_ARGS__)

◆ vaadd_vx_i32mf2

#define vaadd_vx_i32mf2 ( ... ) __riscv_vaadd_vx_i32mf2(__VA_ARGS__)

◆ vaadd_vx_i32mf2_m

#define vaadd_vx_i32mf2_m ( ... ) __riscv_vaadd_vx_i32mf2_tumu(__VA_ARGS__)

◆ vaadd_vx_i64m1

#define vaadd_vx_i64m1 ( ... ) __riscv_vaadd_vx_i64m1(__VA_ARGS__)

◆ vaadd_vx_i64m1_m

#define vaadd_vx_i64m1_m ( ... ) __riscv_vaadd_vx_i64m1_tumu(__VA_ARGS__)

◆ vaadd_vx_i64m2

#define vaadd_vx_i64m2 ( ... ) __riscv_vaadd_vx_i64m2(__VA_ARGS__)

◆ vaadd_vx_i64m2_m

#define vaadd_vx_i64m2_m ( ... ) __riscv_vaadd_vx_i64m2_tumu(__VA_ARGS__)

◆ vaadd_vx_i64m4

#define vaadd_vx_i64m4 ( ... ) __riscv_vaadd_vx_i64m4(__VA_ARGS__)

◆ vaadd_vx_i64m4_m

#define vaadd_vx_i64m4_m ( ... ) __riscv_vaadd_vx_i64m4_tumu(__VA_ARGS__)

◆ vaadd_vx_i64m8

#define vaadd_vx_i64m8 ( ... ) __riscv_vaadd_vx_i64m8(__VA_ARGS__)

◆ vaadd_vx_i64m8_m

#define vaadd_vx_i64m8_m ( ... ) __riscv_vaadd_vx_i64m8_tumu(__VA_ARGS__)

◆ vaadd_vx_i8m1

#define vaadd_vx_i8m1 ( ... ) __riscv_vaadd_vx_i8m1(__VA_ARGS__)

◆ vaadd_vx_i8m1_m

#define vaadd_vx_i8m1_m ( ... ) __riscv_vaadd_vx_i8m1_tumu(__VA_ARGS__)

◆ vaadd_vx_i8m2

#define vaadd_vx_i8m2 ( ... ) __riscv_vaadd_vx_i8m2(__VA_ARGS__)

◆ vaadd_vx_i8m2_m

#define vaadd_vx_i8m2_m ( ... ) __riscv_vaadd_vx_i8m2_tumu(__VA_ARGS__)

◆ vaadd_vx_i8m4

#define vaadd_vx_i8m4 ( ... ) __riscv_vaadd_vx_i8m4(__VA_ARGS__)

◆ vaadd_vx_i8m4_m

#define vaadd_vx_i8m4_m ( ... ) __riscv_vaadd_vx_i8m4_tumu(__VA_ARGS__)

◆ vaadd_vx_i8m8

#define vaadd_vx_i8m8 ( ... ) __riscv_vaadd_vx_i8m8(__VA_ARGS__)

◆ vaadd_vx_i8m8_m

#define vaadd_vx_i8m8_m ( ... ) __riscv_vaadd_vx_i8m8_tumu(__VA_ARGS__)

◆ vaadd_vx_i8mf2

#define vaadd_vx_i8mf2 ( ... ) __riscv_vaadd_vx_i8mf2(__VA_ARGS__)

◆ vaadd_vx_i8mf2_m

#define vaadd_vx_i8mf2_m ( ... ) __riscv_vaadd_vx_i8mf2_tumu(__VA_ARGS__)

◆ vaadd_vx_i8mf4

#define vaadd_vx_i8mf4 ( ... ) __riscv_vaadd_vx_i8mf4(__VA_ARGS__)

◆ vaadd_vx_i8mf4_m

#define vaadd_vx_i8mf4_m ( ... ) __riscv_vaadd_vx_i8mf4_tumu(__VA_ARGS__)

◆ vaadd_vx_i8mf8

#define vaadd_vx_i8mf8 ( ... ) __riscv_vaadd_vx_i8mf8(__VA_ARGS__)

◆ vaadd_vx_i8mf8_m

#define vaadd_vx_i8mf8_m ( ... ) __riscv_vaadd_vx_i8mf8_tumu(__VA_ARGS__)

◆ vaaddu_vv_u16m1

#define vaaddu_vv_u16m1 ( ... ) __riscv_vaaddu_vv_u16m1(__VA_ARGS__)

◆ vaaddu_vv_u16m1_m

#define vaaddu_vv_u16m1_m ( ... ) __riscv_vaaddu_vv_u16m1_tumu(__VA_ARGS__)

◆ vaaddu_vv_u16m2

#define vaaddu_vv_u16m2 ( ... ) __riscv_vaaddu_vv_u16m2(__VA_ARGS__)

◆ vaaddu_vv_u16m2_m

#define vaaddu_vv_u16m2_m ( ... ) __riscv_vaaddu_vv_u16m2_tumu(__VA_ARGS__)

◆ vaaddu_vv_u16m4

#define vaaddu_vv_u16m4 ( ... ) __riscv_vaaddu_vv_u16m4(__VA_ARGS__)

◆ vaaddu_vv_u16m4_m

#define vaaddu_vv_u16m4_m ( ... ) __riscv_vaaddu_vv_u16m4_tumu(__VA_ARGS__)

◆ vaaddu_vv_u16m8

#define vaaddu_vv_u16m8 ( ... ) __riscv_vaaddu_vv_u16m8(__VA_ARGS__)

◆ vaaddu_vv_u16m8_m

#define vaaddu_vv_u16m8_m ( ... ) __riscv_vaaddu_vv_u16m8_tumu(__VA_ARGS__)

◆ vaaddu_vv_u16mf2

#define vaaddu_vv_u16mf2 ( ... ) __riscv_vaaddu_vv_u16mf2(__VA_ARGS__)

◆ vaaddu_vv_u16mf2_m

#define vaaddu_vv_u16mf2_m ( ... ) __riscv_vaaddu_vv_u16mf2_tumu(__VA_ARGS__)

◆ vaaddu_vv_u16mf4

#define vaaddu_vv_u16mf4 ( ... ) __riscv_vaaddu_vv_u16mf4(__VA_ARGS__)

◆ vaaddu_vv_u16mf4_m

#define vaaddu_vv_u16mf4_m ( ... ) __riscv_vaaddu_vv_u16mf4_tumu(__VA_ARGS__)

◆ vaaddu_vv_u32m1

#define vaaddu_vv_u32m1 ( ... ) __riscv_vaaddu_vv_u32m1(__VA_ARGS__)

◆ vaaddu_vv_u32m1_m

#define vaaddu_vv_u32m1_m ( ... ) __riscv_vaaddu_vv_u32m1_tumu(__VA_ARGS__)

◆ vaaddu_vv_u32m2

#define vaaddu_vv_u32m2 ( ... ) __riscv_vaaddu_vv_u32m2(__VA_ARGS__)

◆ vaaddu_vv_u32m2_m

#define vaaddu_vv_u32m2_m ( ... ) __riscv_vaaddu_vv_u32m2_tumu(__VA_ARGS__)

◆ vaaddu_vv_u32m4

#define vaaddu_vv_u32m4 ( ... ) __riscv_vaaddu_vv_u32m4(__VA_ARGS__)

◆ vaaddu_vv_u32m4_m

#define vaaddu_vv_u32m4_m ( ... ) __riscv_vaaddu_vv_u32m4_tumu(__VA_ARGS__)

◆ vaaddu_vv_u32m8

#define vaaddu_vv_u32m8 ( ... ) __riscv_vaaddu_vv_u32m8(__VA_ARGS__)

◆ vaaddu_vv_u32m8_m

#define vaaddu_vv_u32m8_m ( ... ) __riscv_vaaddu_vv_u32m8_tumu(__VA_ARGS__)

◆ vaaddu_vv_u32mf2

#define vaaddu_vv_u32mf2 ( ... ) __riscv_vaaddu_vv_u32mf2(__VA_ARGS__)

◆ vaaddu_vv_u32mf2_m

#define vaaddu_vv_u32mf2_m ( ... ) __riscv_vaaddu_vv_u32mf2_tumu(__VA_ARGS__)

◆ vaaddu_vv_u64m1

#define vaaddu_vv_u64m1 ( ... ) __riscv_vaaddu_vv_u64m1(__VA_ARGS__)

◆ vaaddu_vv_u64m1_m

#define vaaddu_vv_u64m1_m ( ... ) __riscv_vaaddu_vv_u64m1_tumu(__VA_ARGS__)

◆ vaaddu_vv_u64m2

#define vaaddu_vv_u64m2 ( ... ) __riscv_vaaddu_vv_u64m2(__VA_ARGS__)

◆ vaaddu_vv_u64m2_m

#define vaaddu_vv_u64m2_m ( ... ) __riscv_vaaddu_vv_u64m2_tumu(__VA_ARGS__)

◆ vaaddu_vv_u64m4

#define vaaddu_vv_u64m4 ( ... ) __riscv_vaaddu_vv_u64m4(__VA_ARGS__)

◆ vaaddu_vv_u64m4_m

#define vaaddu_vv_u64m4_m ( ... ) __riscv_vaaddu_vv_u64m4_tumu(__VA_ARGS__)

◆ vaaddu_vv_u64m8

#define vaaddu_vv_u64m8 ( ... ) __riscv_vaaddu_vv_u64m8(__VA_ARGS__)

◆ vaaddu_vv_u64m8_m

#define vaaddu_vv_u64m8_m ( ... ) __riscv_vaaddu_vv_u64m8_tumu(__VA_ARGS__)

◆ vaaddu_vv_u8m1

#define vaaddu_vv_u8m1 ( ... ) __riscv_vaaddu_vv_u8m1(__VA_ARGS__)

◆ vaaddu_vv_u8m1_m

#define vaaddu_vv_u8m1_m ( ... ) __riscv_vaaddu_vv_u8m1_tumu(__VA_ARGS__)

◆ vaaddu_vv_u8m2

#define vaaddu_vv_u8m2 ( ... ) __riscv_vaaddu_vv_u8m2(__VA_ARGS__)

◆ vaaddu_vv_u8m2_m

#define vaaddu_vv_u8m2_m ( ... ) __riscv_vaaddu_vv_u8m2_tumu(__VA_ARGS__)

◆ vaaddu_vv_u8m4

#define vaaddu_vv_u8m4 ( ... ) __riscv_vaaddu_vv_u8m4(__VA_ARGS__)

◆ vaaddu_vv_u8m4_m

#define vaaddu_vv_u8m4_m ( ... ) __riscv_vaaddu_vv_u8m4_tumu(__VA_ARGS__)

◆ vaaddu_vv_u8m8

#define vaaddu_vv_u8m8 ( ... ) __riscv_vaaddu_vv_u8m8(__VA_ARGS__)

◆ vaaddu_vv_u8m8_m

#define vaaddu_vv_u8m8_m ( ... ) __riscv_vaaddu_vv_u8m8_tumu(__VA_ARGS__)

◆ vaaddu_vv_u8mf2

#define vaaddu_vv_u8mf2 ( ... ) __riscv_vaaddu_vv_u8mf2(__VA_ARGS__)

◆ vaaddu_vv_u8mf2_m

#define vaaddu_vv_u8mf2_m ( ... ) __riscv_vaaddu_vv_u8mf2_tumu(__VA_ARGS__)

◆ vaaddu_vv_u8mf4

#define vaaddu_vv_u8mf4 ( ... ) __riscv_vaaddu_vv_u8mf4(__VA_ARGS__)

◆ vaaddu_vv_u8mf4_m

#define vaaddu_vv_u8mf4_m ( ... ) __riscv_vaaddu_vv_u8mf4_tumu(__VA_ARGS__)

◆ vaaddu_vv_u8mf8

#define vaaddu_vv_u8mf8 ( ... ) __riscv_vaaddu_vv_u8mf8(__VA_ARGS__)

◆ vaaddu_vv_u8mf8_m

#define vaaddu_vv_u8mf8_m ( ... ) __riscv_vaaddu_vv_u8mf8_tumu(__VA_ARGS__)

◆ vaaddu_vx_u16m1

#define vaaddu_vx_u16m1 ( ... ) __riscv_vaaddu_vx_u16m1(__VA_ARGS__)

◆ vaaddu_vx_u16m1_m

#define vaaddu_vx_u16m1_m ( ... ) __riscv_vaaddu_vx_u16m1_tumu(__VA_ARGS__)

◆ vaaddu_vx_u16m2

#define vaaddu_vx_u16m2 ( ... ) __riscv_vaaddu_vx_u16m2(__VA_ARGS__)

◆ vaaddu_vx_u16m2_m

#define vaaddu_vx_u16m2_m ( ... ) __riscv_vaaddu_vx_u16m2_tumu(__VA_ARGS__)

◆ vaaddu_vx_u16m4

#define vaaddu_vx_u16m4 ( ... ) __riscv_vaaddu_vx_u16m4(__VA_ARGS__)

◆ vaaddu_vx_u16m4_m

#define vaaddu_vx_u16m4_m ( ... ) __riscv_vaaddu_vx_u16m4_tumu(__VA_ARGS__)

◆ vaaddu_vx_u16m8

#define vaaddu_vx_u16m8 ( ... ) __riscv_vaaddu_vx_u16m8(__VA_ARGS__)

◆ vaaddu_vx_u16m8_m

#define vaaddu_vx_u16m8_m ( ... ) __riscv_vaaddu_vx_u16m8_tumu(__VA_ARGS__)

◆ vaaddu_vx_u16mf2

#define vaaddu_vx_u16mf2 ( ... ) __riscv_vaaddu_vx_u16mf2(__VA_ARGS__)

◆ vaaddu_vx_u16mf2_m

#define vaaddu_vx_u16mf2_m ( ... ) __riscv_vaaddu_vx_u16mf2_tumu(__VA_ARGS__)

◆ vaaddu_vx_u16mf4

#define vaaddu_vx_u16mf4 ( ... ) __riscv_vaaddu_vx_u16mf4(__VA_ARGS__)

◆ vaaddu_vx_u16mf4_m

#define vaaddu_vx_u16mf4_m ( ... ) __riscv_vaaddu_vx_u16mf4_tumu(__VA_ARGS__)

◆ vaaddu_vx_u32m1

#define vaaddu_vx_u32m1 ( ... ) __riscv_vaaddu_vx_u32m1(__VA_ARGS__)

◆ vaaddu_vx_u32m1_m

#define vaaddu_vx_u32m1_m ( ... ) __riscv_vaaddu_vx_u32m1_tumu(__VA_ARGS__)

◆ vaaddu_vx_u32m2

#define vaaddu_vx_u32m2 ( ... ) __riscv_vaaddu_vx_u32m2(__VA_ARGS__)

◆ vaaddu_vx_u32m2_m

#define vaaddu_vx_u32m2_m ( ... ) __riscv_vaaddu_vx_u32m2_tumu(__VA_ARGS__)

◆ vaaddu_vx_u32m4

#define vaaddu_vx_u32m4 ( ... ) __riscv_vaaddu_vx_u32m4(__VA_ARGS__)

◆ vaaddu_vx_u32m4_m

#define vaaddu_vx_u32m4_m ( ... ) __riscv_vaaddu_vx_u32m4_tumu(__VA_ARGS__)

◆ vaaddu_vx_u32m8

#define vaaddu_vx_u32m8 ( ... ) __riscv_vaaddu_vx_u32m8(__VA_ARGS__)

◆ vaaddu_vx_u32m8_m

#define vaaddu_vx_u32m8_m ( ... ) __riscv_vaaddu_vx_u32m8_tumu(__VA_ARGS__)

◆ vaaddu_vx_u32mf2

#define vaaddu_vx_u32mf2 ( ... ) __riscv_vaaddu_vx_u32mf2(__VA_ARGS__)

◆ vaaddu_vx_u32mf2_m

#define vaaddu_vx_u32mf2_m ( ... ) __riscv_vaaddu_vx_u32mf2_tumu(__VA_ARGS__)

◆ vaaddu_vx_u64m1

#define vaaddu_vx_u64m1 ( ... ) __riscv_vaaddu_vx_u64m1(__VA_ARGS__)

◆ vaaddu_vx_u64m1_m

#define vaaddu_vx_u64m1_m ( ... ) __riscv_vaaddu_vx_u64m1_tumu(__VA_ARGS__)

◆ vaaddu_vx_u64m2

#define vaaddu_vx_u64m2 ( ... ) __riscv_vaaddu_vx_u64m2(__VA_ARGS__)

◆ vaaddu_vx_u64m2_m

#define vaaddu_vx_u64m2_m ( ... ) __riscv_vaaddu_vx_u64m2_tumu(__VA_ARGS__)

◆ vaaddu_vx_u64m4

#define vaaddu_vx_u64m4 ( ... ) __riscv_vaaddu_vx_u64m4(__VA_ARGS__)

◆ vaaddu_vx_u64m4_m

#define vaaddu_vx_u64m4_m ( ... ) __riscv_vaaddu_vx_u64m4_tumu(__VA_ARGS__)

◆ vaaddu_vx_u64m8

#define vaaddu_vx_u64m8 ( ... ) __riscv_vaaddu_vx_u64m8(__VA_ARGS__)

◆ vaaddu_vx_u64m8_m

#define vaaddu_vx_u64m8_m ( ... ) __riscv_vaaddu_vx_u64m8_tumu(__VA_ARGS__)

◆ vaaddu_vx_u8m1

#define vaaddu_vx_u8m1 ( ... ) __riscv_vaaddu_vx_u8m1(__VA_ARGS__)

◆ vaaddu_vx_u8m1_m

#define vaaddu_vx_u8m1_m ( ... ) __riscv_vaaddu_vx_u8m1_tumu(__VA_ARGS__)

◆ vaaddu_vx_u8m2

#define vaaddu_vx_u8m2 ( ... ) __riscv_vaaddu_vx_u8m2(__VA_ARGS__)

◆ vaaddu_vx_u8m2_m

#define vaaddu_vx_u8m2_m ( ... ) __riscv_vaaddu_vx_u8m2_tumu(__VA_ARGS__)

◆ vaaddu_vx_u8m4

#define vaaddu_vx_u8m4 ( ... ) __riscv_vaaddu_vx_u8m4(__VA_ARGS__)

◆ vaaddu_vx_u8m4_m

#define vaaddu_vx_u8m4_m ( ... ) __riscv_vaaddu_vx_u8m4_tumu(__VA_ARGS__)

◆ vaaddu_vx_u8m8

#define vaaddu_vx_u8m8 ( ... ) __riscv_vaaddu_vx_u8m8(__VA_ARGS__)

◆ vaaddu_vx_u8m8_m

#define vaaddu_vx_u8m8_m ( ... ) __riscv_vaaddu_vx_u8m8_tumu(__VA_ARGS__)

◆ vaaddu_vx_u8mf2

#define vaaddu_vx_u8mf2 ( ... ) __riscv_vaaddu_vx_u8mf2(__VA_ARGS__)

◆ vaaddu_vx_u8mf2_m

#define vaaddu_vx_u8mf2_m ( ... ) __riscv_vaaddu_vx_u8mf2_tumu(__VA_ARGS__)

◆ vaaddu_vx_u8mf4

#define vaaddu_vx_u8mf4 ( ... ) __riscv_vaaddu_vx_u8mf4(__VA_ARGS__)

◆ vaaddu_vx_u8mf4_m

#define vaaddu_vx_u8mf4_m ( ... ) __riscv_vaaddu_vx_u8mf4_tumu(__VA_ARGS__)

◆ vaaddu_vx_u8mf8

#define vaaddu_vx_u8mf8 ( ... ) __riscv_vaaddu_vx_u8mf8(__VA_ARGS__)

◆ vaaddu_vx_u8mf8_m

#define vaaddu_vx_u8mf8_m ( ... ) __riscv_vaaddu_vx_u8mf8_tumu(__VA_ARGS__)

◆ vadc_vvm_i16m1

#define vadc_vvm_i16m1 ( ... ) __riscv_vadc_vvm_i16m1(__VA_ARGS__)

◆ vadc_vvm_i16m2

#define vadc_vvm_i16m2 ( ... ) __riscv_vadc_vvm_i16m2(__VA_ARGS__)

◆ vadc_vvm_i16m4

#define vadc_vvm_i16m4 ( ... ) __riscv_vadc_vvm_i16m4(__VA_ARGS__)

◆ vadc_vvm_i16m8

#define vadc_vvm_i16m8 ( ... ) __riscv_vadc_vvm_i16m8(__VA_ARGS__)

◆ vadc_vvm_i16mf2

#define vadc_vvm_i16mf2 ( ... ) __riscv_vadc_vvm_i16mf2(__VA_ARGS__)

◆ vadc_vvm_i16mf4

#define vadc_vvm_i16mf4 ( ... ) __riscv_vadc_vvm_i16mf4(__VA_ARGS__)

◆ vadc_vvm_i32m1

#define vadc_vvm_i32m1 ( ... ) __riscv_vadc_vvm_i32m1(__VA_ARGS__)

◆ vadc_vvm_i32m2

#define vadc_vvm_i32m2 ( ... ) __riscv_vadc_vvm_i32m2(__VA_ARGS__)

◆ vadc_vvm_i32m4

#define vadc_vvm_i32m4 ( ... ) __riscv_vadc_vvm_i32m4(__VA_ARGS__)

◆ vadc_vvm_i32m8

#define vadc_vvm_i32m8 ( ... ) __riscv_vadc_vvm_i32m8(__VA_ARGS__)

◆ vadc_vvm_i32mf2

#define vadc_vvm_i32mf2 ( ... ) __riscv_vadc_vvm_i32mf2(__VA_ARGS__)

◆ vadc_vvm_i64m1

#define vadc_vvm_i64m1 ( ... ) __riscv_vadc_vvm_i64m1(__VA_ARGS__)

◆ vadc_vvm_i64m2

#define vadc_vvm_i64m2 ( ... ) __riscv_vadc_vvm_i64m2(__VA_ARGS__)

◆ vadc_vvm_i64m4

#define vadc_vvm_i64m4 ( ... ) __riscv_vadc_vvm_i64m4(__VA_ARGS__)

◆ vadc_vvm_i64m8

#define vadc_vvm_i64m8 ( ... ) __riscv_vadc_vvm_i64m8(__VA_ARGS__)

◆ vadc_vvm_i8m1

#define vadc_vvm_i8m1 ( ... ) __riscv_vadc_vvm_i8m1(__VA_ARGS__)

◆ vadc_vvm_i8m2

#define vadc_vvm_i8m2 ( ... ) __riscv_vadc_vvm_i8m2(__VA_ARGS__)

◆ vadc_vvm_i8m4

#define vadc_vvm_i8m4 ( ... ) __riscv_vadc_vvm_i8m4(__VA_ARGS__)

◆ vadc_vvm_i8m8

#define vadc_vvm_i8m8 ( ... ) __riscv_vadc_vvm_i8m8(__VA_ARGS__)

◆ vadc_vvm_i8mf2

#define vadc_vvm_i8mf2 ( ... ) __riscv_vadc_vvm_i8mf2(__VA_ARGS__)

◆ vadc_vvm_i8mf4

#define vadc_vvm_i8mf4 ( ... ) __riscv_vadc_vvm_i8mf4(__VA_ARGS__)

◆ vadc_vvm_i8mf8

#define vadc_vvm_i8mf8 ( ... ) __riscv_vadc_vvm_i8mf8(__VA_ARGS__)

◆ vadc_vvm_u16m1

#define vadc_vvm_u16m1 ( ... ) __riscv_vadc_vvm_u16m1(__VA_ARGS__)

◆ vadc_vvm_u16m2

#define vadc_vvm_u16m2 ( ... ) __riscv_vadc_vvm_u16m2(__VA_ARGS__)

◆ vadc_vvm_u16m4

#define vadc_vvm_u16m4 ( ... ) __riscv_vadc_vvm_u16m4(__VA_ARGS__)

◆ vadc_vvm_u16m8

#define vadc_vvm_u16m8 ( ... ) __riscv_vadc_vvm_u16m8(__VA_ARGS__)

◆ vadc_vvm_u16mf2

#define vadc_vvm_u16mf2 ( ... ) __riscv_vadc_vvm_u16mf2(__VA_ARGS__)

◆ vadc_vvm_u16mf4

#define vadc_vvm_u16mf4 ( ... ) __riscv_vadc_vvm_u16mf4(__VA_ARGS__)

◆ vadc_vvm_u32m1

#define vadc_vvm_u32m1 ( ... ) __riscv_vadc_vvm_u32m1(__VA_ARGS__)

◆ vadc_vvm_u32m2

#define vadc_vvm_u32m2 ( ... ) __riscv_vadc_vvm_u32m2(__VA_ARGS__)

◆ vadc_vvm_u32m4

#define vadc_vvm_u32m4 ( ... ) __riscv_vadc_vvm_u32m4(__VA_ARGS__)

◆ vadc_vvm_u32m8

#define vadc_vvm_u32m8 ( ... ) __riscv_vadc_vvm_u32m8(__VA_ARGS__)

◆ vadc_vvm_u32mf2

#define vadc_vvm_u32mf2 ( ... ) __riscv_vadc_vvm_u32mf2(__VA_ARGS__)

◆ vadc_vvm_u64m1

#define vadc_vvm_u64m1 ( ... ) __riscv_vadc_vvm_u64m1(__VA_ARGS__)

◆ vadc_vvm_u64m2

#define vadc_vvm_u64m2 ( ... ) __riscv_vadc_vvm_u64m2(__VA_ARGS__)

◆ vadc_vvm_u64m4

#define vadc_vvm_u64m4 ( ... ) __riscv_vadc_vvm_u64m4(__VA_ARGS__)

◆ vadc_vvm_u64m8

#define vadc_vvm_u64m8 ( ... ) __riscv_vadc_vvm_u64m8(__VA_ARGS__)

◆ vadc_vvm_u8m1

#define vadc_vvm_u8m1 ( ... ) __riscv_vadc_vvm_u8m1(__VA_ARGS__)

◆ vadc_vvm_u8m2

#define vadc_vvm_u8m2 ( ... ) __riscv_vadc_vvm_u8m2(__VA_ARGS__)

◆ vadc_vvm_u8m4

#define vadc_vvm_u8m4 ( ... ) __riscv_vadc_vvm_u8m4(__VA_ARGS__)

◆ vadc_vvm_u8m8

#define vadc_vvm_u8m8 ( ... ) __riscv_vadc_vvm_u8m8(__VA_ARGS__)

◆ vadc_vvm_u8mf2

#define vadc_vvm_u8mf2 ( ... ) __riscv_vadc_vvm_u8mf2(__VA_ARGS__)

◆ vadc_vvm_u8mf4

#define vadc_vvm_u8mf4 ( ... ) __riscv_vadc_vvm_u8mf4(__VA_ARGS__)

◆ vadc_vvm_u8mf8

#define vadc_vvm_u8mf8 ( ... ) __riscv_vadc_vvm_u8mf8(__VA_ARGS__)

◆ vadc_vxm_i16m1

#define vadc_vxm_i16m1 ( ... ) __riscv_vadc_vxm_i16m1(__VA_ARGS__)

◆ vadc_vxm_i16m2

#define vadc_vxm_i16m2 ( ... ) __riscv_vadc_vxm_i16m2(__VA_ARGS__)

◆ vadc_vxm_i16m4

#define vadc_vxm_i16m4 ( ... ) __riscv_vadc_vxm_i16m4(__VA_ARGS__)

◆ vadc_vxm_i16m8

#define vadc_vxm_i16m8 ( ... ) __riscv_vadc_vxm_i16m8(__VA_ARGS__)

◆ vadc_vxm_i16mf2

#define vadc_vxm_i16mf2 ( ... ) __riscv_vadc_vxm_i16mf2(__VA_ARGS__)

◆ vadc_vxm_i16mf4

#define vadc_vxm_i16mf4 ( ... ) __riscv_vadc_vxm_i16mf4(__VA_ARGS__)

◆ vadc_vxm_i32m1

#define vadc_vxm_i32m1 ( ... ) __riscv_vadc_vxm_i32m1(__VA_ARGS__)

◆ vadc_vxm_i32m2

#define vadc_vxm_i32m2 ( ... ) __riscv_vadc_vxm_i32m2(__VA_ARGS__)

◆ vadc_vxm_i32m4

#define vadc_vxm_i32m4 ( ... ) __riscv_vadc_vxm_i32m4(__VA_ARGS__)

◆ vadc_vxm_i32m8

#define vadc_vxm_i32m8 ( ... ) __riscv_vadc_vxm_i32m8(__VA_ARGS__)

◆ vadc_vxm_i32mf2

#define vadc_vxm_i32mf2 ( ... ) __riscv_vadc_vxm_i32mf2(__VA_ARGS__)

◆ vadc_vxm_i64m1

#define vadc_vxm_i64m1 ( ... ) __riscv_vadc_vxm_i64m1(__VA_ARGS__)

◆ vadc_vxm_i64m2

#define vadc_vxm_i64m2 ( ... ) __riscv_vadc_vxm_i64m2(__VA_ARGS__)

◆ vadc_vxm_i64m4

#define vadc_vxm_i64m4 ( ... ) __riscv_vadc_vxm_i64m4(__VA_ARGS__)

◆ vadc_vxm_i64m8

#define vadc_vxm_i64m8 ( ... ) __riscv_vadc_vxm_i64m8(__VA_ARGS__)

◆ vadc_vxm_i8m1

#define vadc_vxm_i8m1 ( ... ) __riscv_vadc_vxm_i8m1(__VA_ARGS__)

◆ vadc_vxm_i8m2

#define vadc_vxm_i8m2 ( ... ) __riscv_vadc_vxm_i8m2(__VA_ARGS__)

◆ vadc_vxm_i8m4

#define vadc_vxm_i8m4 ( ... ) __riscv_vadc_vxm_i8m4(__VA_ARGS__)

◆ vadc_vxm_i8m8

#define vadc_vxm_i8m8 ( ... ) __riscv_vadc_vxm_i8m8(__VA_ARGS__)

◆ vadc_vxm_i8mf2

#define vadc_vxm_i8mf2 ( ... ) __riscv_vadc_vxm_i8mf2(__VA_ARGS__)

◆ vadc_vxm_i8mf4

#define vadc_vxm_i8mf4 ( ... ) __riscv_vadc_vxm_i8mf4(__VA_ARGS__)

◆ vadc_vxm_i8mf8

#define vadc_vxm_i8mf8 ( ... ) __riscv_vadc_vxm_i8mf8(__VA_ARGS__)

◆ vadc_vxm_u16m1

#define vadc_vxm_u16m1 ( ... ) __riscv_vadc_vxm_u16m1(__VA_ARGS__)

◆ vadc_vxm_u16m2

#define vadc_vxm_u16m2 ( ... ) __riscv_vadc_vxm_u16m2(__VA_ARGS__)

◆ vadc_vxm_u16m4

#define vadc_vxm_u16m4 ( ... ) __riscv_vadc_vxm_u16m4(__VA_ARGS__)

◆ vadc_vxm_u16m8

#define vadc_vxm_u16m8 ( ... ) __riscv_vadc_vxm_u16m8(__VA_ARGS__)

◆ vadc_vxm_u16mf2

#define vadc_vxm_u16mf2 ( ... ) __riscv_vadc_vxm_u16mf2(__VA_ARGS__)

◆ vadc_vxm_u16mf4

#define vadc_vxm_u16mf4 ( ... ) __riscv_vadc_vxm_u16mf4(__VA_ARGS__)

◆ vadc_vxm_u32m1

#define vadc_vxm_u32m1 ( ... ) __riscv_vadc_vxm_u32m1(__VA_ARGS__)

◆ vadc_vxm_u32m2

#define vadc_vxm_u32m2 ( ... ) __riscv_vadc_vxm_u32m2(__VA_ARGS__)

◆ vadc_vxm_u32m4

#define vadc_vxm_u32m4 ( ... ) __riscv_vadc_vxm_u32m4(__VA_ARGS__)

◆ vadc_vxm_u32m8

#define vadc_vxm_u32m8 ( ... ) __riscv_vadc_vxm_u32m8(__VA_ARGS__)

◆ vadc_vxm_u32mf2

#define vadc_vxm_u32mf2 ( ... ) __riscv_vadc_vxm_u32mf2(__VA_ARGS__)

◆ vadc_vxm_u64m1

#define vadc_vxm_u64m1 ( ... ) __riscv_vadc_vxm_u64m1(__VA_ARGS__)

◆ vadc_vxm_u64m2

#define vadc_vxm_u64m2 ( ... ) __riscv_vadc_vxm_u64m2(__VA_ARGS__)

◆ vadc_vxm_u64m4

#define vadc_vxm_u64m4 ( ... ) __riscv_vadc_vxm_u64m4(__VA_ARGS__)

◆ vadc_vxm_u64m8

#define vadc_vxm_u64m8 ( ... ) __riscv_vadc_vxm_u64m8(__VA_ARGS__)

◆ vadc_vxm_u8m1

#define vadc_vxm_u8m1 ( ... ) __riscv_vadc_vxm_u8m1(__VA_ARGS__)

◆ vadc_vxm_u8m2

#define vadc_vxm_u8m2 ( ... ) __riscv_vadc_vxm_u8m2(__VA_ARGS__)

◆ vadc_vxm_u8m4

#define vadc_vxm_u8m4 ( ... ) __riscv_vadc_vxm_u8m4(__VA_ARGS__)

◆ vadc_vxm_u8m8

#define vadc_vxm_u8m8 ( ... ) __riscv_vadc_vxm_u8m8(__VA_ARGS__)

◆ vadc_vxm_u8mf2

#define vadc_vxm_u8mf2 ( ... ) __riscv_vadc_vxm_u8mf2(__VA_ARGS__)

◆ vadc_vxm_u8mf4

#define vadc_vxm_u8mf4 ( ... ) __riscv_vadc_vxm_u8mf4(__VA_ARGS__)

◆ vadc_vxm_u8mf8

#define vadc_vxm_u8mf8 ( ... ) __riscv_vadc_vxm_u8mf8(__VA_ARGS__)

◆ vadd_vv_i16m1

#define vadd_vv_i16m1 ( ... ) __riscv_vadd_vv_i16m1(__VA_ARGS__)

◆ vadd_vv_i16m1_m

#define vadd_vv_i16m1_m ( ... ) __riscv_vadd_vv_i16m1_tumu(__VA_ARGS__)

◆ vadd_vv_i16m2

#define vadd_vv_i16m2 ( ... ) __riscv_vadd_vv_i16m2(__VA_ARGS__)

◆ vadd_vv_i16m2_m

#define vadd_vv_i16m2_m ( ... ) __riscv_vadd_vv_i16m2_tumu(__VA_ARGS__)

◆ vadd_vv_i16m4

#define vadd_vv_i16m4 ( ... ) __riscv_vadd_vv_i16m4(__VA_ARGS__)

◆ vadd_vv_i16m4_m

#define vadd_vv_i16m4_m ( ... ) __riscv_vadd_vv_i16m4_tumu(__VA_ARGS__)

◆ vadd_vv_i16m8

#define vadd_vv_i16m8 ( ... ) __riscv_vadd_vv_i16m8(__VA_ARGS__)

◆ vadd_vv_i16m8_m

#define vadd_vv_i16m8_m ( ... ) __riscv_vadd_vv_i16m8_tumu(__VA_ARGS__)

◆ vadd_vv_i16mf2

#define vadd_vv_i16mf2 ( ... ) __riscv_vadd_vv_i16mf2(__VA_ARGS__)

◆ vadd_vv_i16mf2_m

#define vadd_vv_i16mf2_m ( ... ) __riscv_vadd_vv_i16mf2_tumu(__VA_ARGS__)

◆ vadd_vv_i16mf4

#define vadd_vv_i16mf4 ( ... ) __riscv_vadd_vv_i16mf4(__VA_ARGS__)

◆ vadd_vv_i16mf4_m

#define vadd_vv_i16mf4_m ( ... ) __riscv_vadd_vv_i16mf4_tumu(__VA_ARGS__)

◆ vadd_vv_i32m1

#define vadd_vv_i32m1 ( ... ) __riscv_vadd_vv_i32m1(__VA_ARGS__)

◆ vadd_vv_i32m1_m

#define vadd_vv_i32m1_m ( ... ) __riscv_vadd_vv_i32m1_tumu(__VA_ARGS__)

◆ vadd_vv_i32m2

#define vadd_vv_i32m2 ( ... ) __riscv_vadd_vv_i32m2(__VA_ARGS__)

◆ vadd_vv_i32m2_m

#define vadd_vv_i32m2_m ( ... ) __riscv_vadd_vv_i32m2_tumu(__VA_ARGS__)

◆ vadd_vv_i32m4

#define vadd_vv_i32m4 ( ... ) __riscv_vadd_vv_i32m4(__VA_ARGS__)

◆ vadd_vv_i32m4_m

#define vadd_vv_i32m4_m ( ... ) __riscv_vadd_vv_i32m4_tumu(__VA_ARGS__)

◆ vadd_vv_i32m8

#define vadd_vv_i32m8 ( ... ) __riscv_vadd_vv_i32m8(__VA_ARGS__)

◆ vadd_vv_i32m8_m

#define vadd_vv_i32m8_m ( ... ) __riscv_vadd_vv_i32m8_tumu(__VA_ARGS__)

◆ vadd_vv_i32mf2

#define vadd_vv_i32mf2 ( ... ) __riscv_vadd_vv_i32mf2(__VA_ARGS__)

◆ vadd_vv_i32mf2_m

#define vadd_vv_i32mf2_m ( ... ) __riscv_vadd_vv_i32mf2_tumu(__VA_ARGS__)

◆ vadd_vv_i64m1

#define vadd_vv_i64m1 ( ... ) __riscv_vadd_vv_i64m1(__VA_ARGS__)

◆ vadd_vv_i64m1_m

#define vadd_vv_i64m1_m ( ... ) __riscv_vadd_vv_i64m1_tumu(__VA_ARGS__)

◆ vadd_vv_i64m2

#define vadd_vv_i64m2 ( ... ) __riscv_vadd_vv_i64m2(__VA_ARGS__)

◆ vadd_vv_i64m2_m

#define vadd_vv_i64m2_m ( ... ) __riscv_vadd_vv_i64m2_tumu(__VA_ARGS__)

◆ vadd_vv_i64m4

#define vadd_vv_i64m4 ( ... ) __riscv_vadd_vv_i64m4(__VA_ARGS__)

◆ vadd_vv_i64m4_m

#define vadd_vv_i64m4_m ( ... ) __riscv_vadd_vv_i64m4_tumu(__VA_ARGS__)

◆ vadd_vv_i64m8

#define vadd_vv_i64m8 ( ... ) __riscv_vadd_vv_i64m8(__VA_ARGS__)

◆ vadd_vv_i64m8_m

#define vadd_vv_i64m8_m ( ... ) __riscv_vadd_vv_i64m8_tumu(__VA_ARGS__)

◆ vadd_vv_i8m1

#define vadd_vv_i8m1 ( ... ) __riscv_vadd_vv_i8m1(__VA_ARGS__)

◆ vadd_vv_i8m1_m

#define vadd_vv_i8m1_m ( ... ) __riscv_vadd_vv_i8m1_tumu(__VA_ARGS__)

◆ vadd_vv_i8m2

#define vadd_vv_i8m2 ( ... ) __riscv_vadd_vv_i8m2(__VA_ARGS__)

◆ vadd_vv_i8m2_m

#define vadd_vv_i8m2_m ( ... ) __riscv_vadd_vv_i8m2_tumu(__VA_ARGS__)

◆ vadd_vv_i8m4

#define vadd_vv_i8m4 ( ... ) __riscv_vadd_vv_i8m4(__VA_ARGS__)

◆ vadd_vv_i8m4_m

#define vadd_vv_i8m4_m ( ... ) __riscv_vadd_vv_i8m4_tumu(__VA_ARGS__)

◆ vadd_vv_i8m8

#define vadd_vv_i8m8 ( ... ) __riscv_vadd_vv_i8m8(__VA_ARGS__)

◆ vadd_vv_i8m8_m

#define vadd_vv_i8m8_m ( ... ) __riscv_vadd_vv_i8m8_tumu(__VA_ARGS__)

◆ vadd_vv_i8mf2

#define vadd_vv_i8mf2 ( ... ) __riscv_vadd_vv_i8mf2(__VA_ARGS__)

◆ vadd_vv_i8mf2_m

#define vadd_vv_i8mf2_m ( ... ) __riscv_vadd_vv_i8mf2_tumu(__VA_ARGS__)

◆ vadd_vv_i8mf4

#define vadd_vv_i8mf4 ( ... ) __riscv_vadd_vv_i8mf4(__VA_ARGS__)

◆ vadd_vv_i8mf4_m

#define vadd_vv_i8mf4_m ( ... ) __riscv_vadd_vv_i8mf4_tumu(__VA_ARGS__)

◆ vadd_vv_i8mf8

#define vadd_vv_i8mf8 ( ... ) __riscv_vadd_vv_i8mf8(__VA_ARGS__)

◆ vadd_vv_i8mf8_m

#define vadd_vv_i8mf8_m ( ... ) __riscv_vadd_vv_i8mf8_tumu(__VA_ARGS__)

◆ vadd_vv_u16m1

#define vadd_vv_u16m1 ( ... ) __riscv_vadd_vv_u16m1(__VA_ARGS__)

◆ vadd_vv_u16m1_m

#define vadd_vv_u16m1_m ( ... ) __riscv_vadd_vv_u16m1_tumu(__VA_ARGS__)

◆ vadd_vv_u16m2

#define vadd_vv_u16m2 ( ... ) __riscv_vadd_vv_u16m2(__VA_ARGS__)

◆ vadd_vv_u16m2_m

#define vadd_vv_u16m2_m ( ... ) __riscv_vadd_vv_u16m2_tumu(__VA_ARGS__)

◆ vadd_vv_u16m4

#define vadd_vv_u16m4 ( ... ) __riscv_vadd_vv_u16m4(__VA_ARGS__)

◆ vadd_vv_u16m4_m

#define vadd_vv_u16m4_m ( ... ) __riscv_vadd_vv_u16m4_tumu(__VA_ARGS__)

◆ vadd_vv_u16m8

#define vadd_vv_u16m8 ( ... ) __riscv_vadd_vv_u16m8(__VA_ARGS__)

◆ vadd_vv_u16m8_m

#define vadd_vv_u16m8_m ( ... ) __riscv_vadd_vv_u16m8_tumu(__VA_ARGS__)

◆ vadd_vv_u16mf2

#define vadd_vv_u16mf2 ( ... ) __riscv_vadd_vv_u16mf2(__VA_ARGS__)

◆ vadd_vv_u16mf2_m

#define vadd_vv_u16mf2_m ( ... ) __riscv_vadd_vv_u16mf2_tumu(__VA_ARGS__)

◆ vadd_vv_u16mf4

#define vadd_vv_u16mf4 ( ... ) __riscv_vadd_vv_u16mf4(__VA_ARGS__)

◆ vadd_vv_u16mf4_m

#define vadd_vv_u16mf4_m ( ... ) __riscv_vadd_vv_u16mf4_tumu(__VA_ARGS__)

◆ vadd_vv_u32m1

#define vadd_vv_u32m1 ( ... ) __riscv_vadd_vv_u32m1(__VA_ARGS__)

◆ vadd_vv_u32m1_m

#define vadd_vv_u32m1_m ( ... ) __riscv_vadd_vv_u32m1_tumu(__VA_ARGS__)

◆ vadd_vv_u32m2

#define vadd_vv_u32m2 ( ... ) __riscv_vadd_vv_u32m2(__VA_ARGS__)

◆ vadd_vv_u32m2_m

#define vadd_vv_u32m2_m ( ... ) __riscv_vadd_vv_u32m2_tumu(__VA_ARGS__)

◆ vadd_vv_u32m4

#define vadd_vv_u32m4 ( ... ) __riscv_vadd_vv_u32m4(__VA_ARGS__)

◆ vadd_vv_u32m4_m

#define vadd_vv_u32m4_m ( ... ) __riscv_vadd_vv_u32m4_tumu(__VA_ARGS__)

◆ vadd_vv_u32m8

#define vadd_vv_u32m8 ( ... ) __riscv_vadd_vv_u32m8(__VA_ARGS__)

◆ vadd_vv_u32m8_m

#define vadd_vv_u32m8_m ( ... ) __riscv_vadd_vv_u32m8_tumu(__VA_ARGS__)

◆ vadd_vv_u32mf2

#define vadd_vv_u32mf2 ( ... ) __riscv_vadd_vv_u32mf2(__VA_ARGS__)

◆ vadd_vv_u32mf2_m

#define vadd_vv_u32mf2_m ( ... ) __riscv_vadd_vv_u32mf2_tumu(__VA_ARGS__)

◆ vadd_vv_u64m1

#define vadd_vv_u64m1 ( ... ) __riscv_vadd_vv_u64m1(__VA_ARGS__)

◆ vadd_vv_u64m1_m

#define vadd_vv_u64m1_m ( ... ) __riscv_vadd_vv_u64m1_tumu(__VA_ARGS__)

◆ vadd_vv_u64m2

#define vadd_vv_u64m2 ( ... ) __riscv_vadd_vv_u64m2(__VA_ARGS__)

◆ vadd_vv_u64m2_m

#define vadd_vv_u64m2_m ( ... ) __riscv_vadd_vv_u64m2_tumu(__VA_ARGS__)

◆ vadd_vv_u64m4

#define vadd_vv_u64m4 ( ... ) __riscv_vadd_vv_u64m4(__VA_ARGS__)

◆ vadd_vv_u64m4_m

#define vadd_vv_u64m4_m ( ... ) __riscv_vadd_vv_u64m4_tumu(__VA_ARGS__)

◆ vadd_vv_u64m8

#define vadd_vv_u64m8 ( ... ) __riscv_vadd_vv_u64m8(__VA_ARGS__)

◆ vadd_vv_u64m8_m

#define vadd_vv_u64m8_m ( ... ) __riscv_vadd_vv_u64m8_tumu(__VA_ARGS__)

◆ vadd_vv_u8m1

#define vadd_vv_u8m1 ( ... ) __riscv_vadd_vv_u8m1(__VA_ARGS__)

◆ vadd_vv_u8m1_m

#define vadd_vv_u8m1_m ( ... ) __riscv_vadd_vv_u8m1_tumu(__VA_ARGS__)

◆ vadd_vv_u8m2

#define vadd_vv_u8m2 ( ... ) __riscv_vadd_vv_u8m2(__VA_ARGS__)

◆ vadd_vv_u8m2_m

#define vadd_vv_u8m2_m ( ... ) __riscv_vadd_vv_u8m2_tumu(__VA_ARGS__)

◆ vadd_vv_u8m4

#define vadd_vv_u8m4 ( ... ) __riscv_vadd_vv_u8m4(__VA_ARGS__)

◆ vadd_vv_u8m4_m

#define vadd_vv_u8m4_m ( ... ) __riscv_vadd_vv_u8m4_tumu(__VA_ARGS__)

◆ vadd_vv_u8m8

#define vadd_vv_u8m8 ( ... ) __riscv_vadd_vv_u8m8(__VA_ARGS__)

◆ vadd_vv_u8m8_m

#define vadd_vv_u8m8_m ( ... ) __riscv_vadd_vv_u8m8_tumu(__VA_ARGS__)

◆ vadd_vv_u8mf2

#define vadd_vv_u8mf2 ( ... ) __riscv_vadd_vv_u8mf2(__VA_ARGS__)

◆ vadd_vv_u8mf2_m

#define vadd_vv_u8mf2_m ( ... ) __riscv_vadd_vv_u8mf2_tumu(__VA_ARGS__)

◆ vadd_vv_u8mf4

#define vadd_vv_u8mf4 ( ... ) __riscv_vadd_vv_u8mf4(__VA_ARGS__)

◆ vadd_vv_u8mf4_m

#define vadd_vv_u8mf4_m ( ... ) __riscv_vadd_vv_u8mf4_tumu(__VA_ARGS__)

◆ vadd_vv_u8mf8

#define vadd_vv_u8mf8 ( ... ) __riscv_vadd_vv_u8mf8(__VA_ARGS__)

◆ vadd_vv_u8mf8_m

#define vadd_vv_u8mf8_m ( ... ) __riscv_vadd_vv_u8mf8_tumu(__VA_ARGS__)

◆ vadd_vx_i16m1

#define vadd_vx_i16m1 ( ... ) __riscv_vadd_vx_i16m1(__VA_ARGS__)

◆ vadd_vx_i16m1_m

#define vadd_vx_i16m1_m ( ... ) __riscv_vadd_vx_i16m1_tumu(__VA_ARGS__)

◆ vadd_vx_i16m2

#define vadd_vx_i16m2 ( ... ) __riscv_vadd_vx_i16m2(__VA_ARGS__)

◆ vadd_vx_i16m2_m

#define vadd_vx_i16m2_m ( ... ) __riscv_vadd_vx_i16m2_tumu(__VA_ARGS__)

◆ vadd_vx_i16m4

#define vadd_vx_i16m4 ( ... ) __riscv_vadd_vx_i16m4(__VA_ARGS__)

◆ vadd_vx_i16m4_m

#define vadd_vx_i16m4_m ( ... ) __riscv_vadd_vx_i16m4_tumu(__VA_ARGS__)

◆ vadd_vx_i16m8

#define vadd_vx_i16m8 ( ... ) __riscv_vadd_vx_i16m8(__VA_ARGS__)

◆ vadd_vx_i16m8_m

#define vadd_vx_i16m8_m ( ... ) __riscv_vadd_vx_i16m8_tumu(__VA_ARGS__)

◆ vadd_vx_i16mf2

#define vadd_vx_i16mf2 ( ... ) __riscv_vadd_vx_i16mf2(__VA_ARGS__)

◆ vadd_vx_i16mf2_m

#define vadd_vx_i16mf2_m ( ... ) __riscv_vadd_vx_i16mf2_tumu(__VA_ARGS__)

◆ vadd_vx_i16mf4

#define vadd_vx_i16mf4 ( ... ) __riscv_vadd_vx_i16mf4(__VA_ARGS__)

◆ vadd_vx_i16mf4_m

#define vadd_vx_i16mf4_m ( ... ) __riscv_vadd_vx_i16mf4_tumu(__VA_ARGS__)

◆ vadd_vx_i32m1

#define vadd_vx_i32m1 ( ... ) __riscv_vadd_vx_i32m1(__VA_ARGS__)

◆ vadd_vx_i32m1_m

#define vadd_vx_i32m1_m ( ... ) __riscv_vadd_vx_i32m1_tumu(__VA_ARGS__)

◆ vadd_vx_i32m2

#define vadd_vx_i32m2 ( ... ) __riscv_vadd_vx_i32m2(__VA_ARGS__)

◆ vadd_vx_i32m2_m

#define vadd_vx_i32m2_m ( ... ) __riscv_vadd_vx_i32m2_tumu(__VA_ARGS__)

◆ vadd_vx_i32m4

#define vadd_vx_i32m4 ( ... ) __riscv_vadd_vx_i32m4(__VA_ARGS__)

◆ vadd_vx_i32m4_m

#define vadd_vx_i32m4_m ( ... ) __riscv_vadd_vx_i32m4_tumu(__VA_ARGS__)

◆ vadd_vx_i32m8

#define vadd_vx_i32m8 ( ... ) __riscv_vadd_vx_i32m8(__VA_ARGS__)

◆ vadd_vx_i32m8_m

#define vadd_vx_i32m8_m ( ... ) __riscv_vadd_vx_i32m8_tumu(__VA_ARGS__)

◆ vadd_vx_i32mf2

#define vadd_vx_i32mf2 ( ... ) __riscv_vadd_vx_i32mf2(__VA_ARGS__)

◆ vadd_vx_i32mf2_m

#define vadd_vx_i32mf2_m ( ... ) __riscv_vadd_vx_i32mf2_tumu(__VA_ARGS__)

◆ vadd_vx_i64m1

#define vadd_vx_i64m1 ( ... ) __riscv_vadd_vx_i64m1(__VA_ARGS__)

◆ vadd_vx_i64m1_m

#define vadd_vx_i64m1_m ( ... ) __riscv_vadd_vx_i64m1_tumu(__VA_ARGS__)

◆ vadd_vx_i64m2

#define vadd_vx_i64m2 ( ... ) __riscv_vadd_vx_i64m2(__VA_ARGS__)

◆ vadd_vx_i64m2_m

#define vadd_vx_i64m2_m ( ... ) __riscv_vadd_vx_i64m2_tumu(__VA_ARGS__)

◆ vadd_vx_i64m4

#define vadd_vx_i64m4 ( ... ) __riscv_vadd_vx_i64m4(__VA_ARGS__)

◆ vadd_vx_i64m4_m

#define vadd_vx_i64m4_m ( ... ) __riscv_vadd_vx_i64m4_tumu(__VA_ARGS__)

◆ vadd_vx_i64m8

#define vadd_vx_i64m8 ( ... ) __riscv_vadd_vx_i64m8(__VA_ARGS__)

◆ vadd_vx_i64m8_m

#define vadd_vx_i64m8_m ( ... ) __riscv_vadd_vx_i64m8_tumu(__VA_ARGS__)

◆ vadd_vx_i8m1

#define vadd_vx_i8m1 ( ... ) __riscv_vadd_vx_i8m1(__VA_ARGS__)

◆ vadd_vx_i8m1_m

#define vadd_vx_i8m1_m ( ... ) __riscv_vadd_vx_i8m1_tumu(__VA_ARGS__)

◆ vadd_vx_i8m2

#define vadd_vx_i8m2 ( ... ) __riscv_vadd_vx_i8m2(__VA_ARGS__)

◆ vadd_vx_i8m2_m

#define vadd_vx_i8m2_m ( ... ) __riscv_vadd_vx_i8m2_tumu(__VA_ARGS__)

◆ vadd_vx_i8m4

#define vadd_vx_i8m4 ( ... ) __riscv_vadd_vx_i8m4(__VA_ARGS__)

◆ vadd_vx_i8m4_m

#define vadd_vx_i8m4_m ( ... ) __riscv_vadd_vx_i8m4_tumu(__VA_ARGS__)

◆ vadd_vx_i8m8

#define vadd_vx_i8m8 ( ... ) __riscv_vadd_vx_i8m8(__VA_ARGS__)

◆ vadd_vx_i8m8_m

#define vadd_vx_i8m8_m ( ... ) __riscv_vadd_vx_i8m8_tumu(__VA_ARGS__)

◆ vadd_vx_i8mf2

#define vadd_vx_i8mf2 ( ... ) __riscv_vadd_vx_i8mf2(__VA_ARGS__)

◆ vadd_vx_i8mf2_m

#define vadd_vx_i8mf2_m ( ... ) __riscv_vadd_vx_i8mf2_tumu(__VA_ARGS__)

◆ vadd_vx_i8mf4

#define vadd_vx_i8mf4 ( ... ) __riscv_vadd_vx_i8mf4(__VA_ARGS__)

◆ vadd_vx_i8mf4_m

#define vadd_vx_i8mf4_m ( ... ) __riscv_vadd_vx_i8mf4_tumu(__VA_ARGS__)

◆ vadd_vx_i8mf8

#define vadd_vx_i8mf8 ( ... ) __riscv_vadd_vx_i8mf8(__VA_ARGS__)

◆ vadd_vx_i8mf8_m

#define vadd_vx_i8mf8_m ( ... ) __riscv_vadd_vx_i8mf8_tumu(__VA_ARGS__)

◆ vadd_vx_u16m1

#define vadd_vx_u16m1 ( ... ) __riscv_vadd_vx_u16m1(__VA_ARGS__)

◆ vadd_vx_u16m1_m

#define vadd_vx_u16m1_m ( ... ) __riscv_vadd_vx_u16m1_tumu(__VA_ARGS__)

◆ vadd_vx_u16m2

#define vadd_vx_u16m2 ( ... ) __riscv_vadd_vx_u16m2(__VA_ARGS__)

◆ vadd_vx_u16m2_m

#define vadd_vx_u16m2_m ( ... ) __riscv_vadd_vx_u16m2_tumu(__VA_ARGS__)

◆ vadd_vx_u16m4

#define vadd_vx_u16m4 ( ... ) __riscv_vadd_vx_u16m4(__VA_ARGS__)

◆ vadd_vx_u16m4_m

#define vadd_vx_u16m4_m ( ... ) __riscv_vadd_vx_u16m4_tumu(__VA_ARGS__)

◆ vadd_vx_u16m8

#define vadd_vx_u16m8 ( ... ) __riscv_vadd_vx_u16m8(__VA_ARGS__)

◆ vadd_vx_u16m8_m

#define vadd_vx_u16m8_m ( ... ) __riscv_vadd_vx_u16m8_tumu(__VA_ARGS__)

◆ vadd_vx_u16mf2

#define vadd_vx_u16mf2 ( ... ) __riscv_vadd_vx_u16mf2(__VA_ARGS__)

◆ vadd_vx_u16mf2_m

#define vadd_vx_u16mf2_m ( ... ) __riscv_vadd_vx_u16mf2_tumu(__VA_ARGS__)

◆ vadd_vx_u16mf4

#define vadd_vx_u16mf4 ( ... ) __riscv_vadd_vx_u16mf4(__VA_ARGS__)

◆ vadd_vx_u16mf4_m

#define vadd_vx_u16mf4_m ( ... ) __riscv_vadd_vx_u16mf4_tumu(__VA_ARGS__)

◆ vadd_vx_u32m1

#define vadd_vx_u32m1 ( ... ) __riscv_vadd_vx_u32m1(__VA_ARGS__)

◆ vadd_vx_u32m1_m

#define vadd_vx_u32m1_m ( ... ) __riscv_vadd_vx_u32m1_tumu(__VA_ARGS__)

◆ vadd_vx_u32m2

#define vadd_vx_u32m2 ( ... ) __riscv_vadd_vx_u32m2(__VA_ARGS__)

◆ vadd_vx_u32m2_m

#define vadd_vx_u32m2_m ( ... ) __riscv_vadd_vx_u32m2_tumu(__VA_ARGS__)

◆ vadd_vx_u32m4

#define vadd_vx_u32m4 ( ... ) __riscv_vadd_vx_u32m4(__VA_ARGS__)

◆ vadd_vx_u32m4_m

#define vadd_vx_u32m4_m ( ... ) __riscv_vadd_vx_u32m4_tumu(__VA_ARGS__)

◆ vadd_vx_u32m8

#define vadd_vx_u32m8 ( ... ) __riscv_vadd_vx_u32m8(__VA_ARGS__)

◆ vadd_vx_u32m8_m

#define vadd_vx_u32m8_m ( ... ) __riscv_vadd_vx_u32m8_tumu(__VA_ARGS__)

◆ vadd_vx_u32mf2

#define vadd_vx_u32mf2 ( ... ) __riscv_vadd_vx_u32mf2(__VA_ARGS__)

◆ vadd_vx_u32mf2_m

#define vadd_vx_u32mf2_m ( ... ) __riscv_vadd_vx_u32mf2_tumu(__VA_ARGS__)

◆ vadd_vx_u64m1

#define vadd_vx_u64m1 ( ... ) __riscv_vadd_vx_u64m1(__VA_ARGS__)

◆ vadd_vx_u64m1_m

#define vadd_vx_u64m1_m ( ... ) __riscv_vadd_vx_u64m1_tumu(__VA_ARGS__)

◆ vadd_vx_u64m2

#define vadd_vx_u64m2 ( ... ) __riscv_vadd_vx_u64m2(__VA_ARGS__)

◆ vadd_vx_u64m2_m

#define vadd_vx_u64m2_m ( ... ) __riscv_vadd_vx_u64m2_tumu(__VA_ARGS__)

◆ vadd_vx_u64m4

#define vadd_vx_u64m4 ( ... ) __riscv_vadd_vx_u64m4(__VA_ARGS__)

◆ vadd_vx_u64m4_m

#define vadd_vx_u64m4_m ( ... ) __riscv_vadd_vx_u64m4_tumu(__VA_ARGS__)

◆ vadd_vx_u64m8

#define vadd_vx_u64m8 ( ... ) __riscv_vadd_vx_u64m8(__VA_ARGS__)

◆ vadd_vx_u64m8_m

#define vadd_vx_u64m8_m ( ... ) __riscv_vadd_vx_u64m8_tumu(__VA_ARGS__)

◆ vadd_vx_u8m1

#define vadd_vx_u8m1 ( ... ) __riscv_vadd_vx_u8m1(__VA_ARGS__)

◆ vadd_vx_u8m1_m

#define vadd_vx_u8m1_m ( ... ) __riscv_vadd_vx_u8m1_tumu(__VA_ARGS__)

◆ vadd_vx_u8m2

#define vadd_vx_u8m2 ( ... ) __riscv_vadd_vx_u8m2(__VA_ARGS__)

◆ vadd_vx_u8m2_m

#define vadd_vx_u8m2_m ( ... ) __riscv_vadd_vx_u8m2_tumu(__VA_ARGS__)

◆ vadd_vx_u8m4

#define vadd_vx_u8m4 ( ... ) __riscv_vadd_vx_u8m4(__VA_ARGS__)

◆ vadd_vx_u8m4_m

#define vadd_vx_u8m4_m ( ... ) __riscv_vadd_vx_u8m4_tumu(__VA_ARGS__)

◆ vadd_vx_u8m8

#define vadd_vx_u8m8 ( ... ) __riscv_vadd_vx_u8m8(__VA_ARGS__)

◆ vadd_vx_u8m8_m

#define vadd_vx_u8m8_m ( ... ) __riscv_vadd_vx_u8m8_tumu(__VA_ARGS__)

◆ vadd_vx_u8mf2

#define vadd_vx_u8mf2 ( ... ) __riscv_vadd_vx_u8mf2(__VA_ARGS__)

◆ vadd_vx_u8mf2_m

#define vadd_vx_u8mf2_m ( ... ) __riscv_vadd_vx_u8mf2_tumu(__VA_ARGS__)

◆ vadd_vx_u8mf4

#define vadd_vx_u8mf4 ( ... ) __riscv_vadd_vx_u8mf4(__VA_ARGS__)

◆ vadd_vx_u8mf4_m

#define vadd_vx_u8mf4_m ( ... ) __riscv_vadd_vx_u8mf4_tumu(__VA_ARGS__)

◆ vadd_vx_u8mf8

#define vadd_vx_u8mf8 ( ... ) __riscv_vadd_vx_u8mf8(__VA_ARGS__)

◆ vadd_vx_u8mf8_m

#define vadd_vx_u8mf8_m ( ... ) __riscv_vadd_vx_u8mf8_tumu(__VA_ARGS__)

◆ vand_vv_i16m1

#define vand_vv_i16m1 ( ... ) __riscv_vand_vv_i16m1(__VA_ARGS__)

◆ vand_vv_i16m1_m

#define vand_vv_i16m1_m ( ... ) __riscv_vand_vv_i16m1_tumu(__VA_ARGS__)

◆ vand_vv_i16m2

#define vand_vv_i16m2 ( ... ) __riscv_vand_vv_i16m2(__VA_ARGS__)

◆ vand_vv_i16m2_m

#define vand_vv_i16m2_m ( ... ) __riscv_vand_vv_i16m2_tumu(__VA_ARGS__)

◆ vand_vv_i16m4

#define vand_vv_i16m4 ( ... ) __riscv_vand_vv_i16m4(__VA_ARGS__)

◆ vand_vv_i16m4_m

#define vand_vv_i16m4_m ( ... ) __riscv_vand_vv_i16m4_tumu(__VA_ARGS__)

◆ vand_vv_i16m8

#define vand_vv_i16m8 ( ... ) __riscv_vand_vv_i16m8(__VA_ARGS__)

◆ vand_vv_i16m8_m

#define vand_vv_i16m8_m ( ... ) __riscv_vand_vv_i16m8_tumu(__VA_ARGS__)

◆ vand_vv_i16mf2

#define vand_vv_i16mf2 ( ... ) __riscv_vand_vv_i16mf2(__VA_ARGS__)

◆ vand_vv_i16mf2_m

#define vand_vv_i16mf2_m ( ... ) __riscv_vand_vv_i16mf2_tumu(__VA_ARGS__)

◆ vand_vv_i16mf4

#define vand_vv_i16mf4 ( ... ) __riscv_vand_vv_i16mf4(__VA_ARGS__)

◆ vand_vv_i16mf4_m

#define vand_vv_i16mf4_m ( ... ) __riscv_vand_vv_i16mf4_tumu(__VA_ARGS__)

◆ vand_vv_i32m1

#define vand_vv_i32m1 ( ... ) __riscv_vand_vv_i32m1(__VA_ARGS__)

◆ vand_vv_i32m1_m

#define vand_vv_i32m1_m ( ... ) __riscv_vand_vv_i32m1_tumu(__VA_ARGS__)

◆ vand_vv_i32m2

#define vand_vv_i32m2 ( ... ) __riscv_vand_vv_i32m2(__VA_ARGS__)

◆ vand_vv_i32m2_m

#define vand_vv_i32m2_m ( ... ) __riscv_vand_vv_i32m2_tumu(__VA_ARGS__)

◆ vand_vv_i32m4

#define vand_vv_i32m4 ( ... ) __riscv_vand_vv_i32m4(__VA_ARGS__)

◆ vand_vv_i32m4_m

#define vand_vv_i32m4_m ( ... ) __riscv_vand_vv_i32m4_tumu(__VA_ARGS__)

◆ vand_vv_i32m8

#define vand_vv_i32m8 ( ... ) __riscv_vand_vv_i32m8(__VA_ARGS__)

◆ vand_vv_i32m8_m

#define vand_vv_i32m8_m ( ... ) __riscv_vand_vv_i32m8_tumu(__VA_ARGS__)

◆ vand_vv_i32mf2

#define vand_vv_i32mf2 ( ... ) __riscv_vand_vv_i32mf2(__VA_ARGS__)

◆ vand_vv_i32mf2_m

#define vand_vv_i32mf2_m ( ... ) __riscv_vand_vv_i32mf2_tumu(__VA_ARGS__)

◆ vand_vv_i64m1

#define vand_vv_i64m1 ( ... ) __riscv_vand_vv_i64m1(__VA_ARGS__)

◆ vand_vv_i64m1_m

#define vand_vv_i64m1_m ( ... ) __riscv_vand_vv_i64m1_tumu(__VA_ARGS__)

◆ vand_vv_i64m2

#define vand_vv_i64m2 ( ... ) __riscv_vand_vv_i64m2(__VA_ARGS__)

◆ vand_vv_i64m2_m

#define vand_vv_i64m2_m ( ... ) __riscv_vand_vv_i64m2_tumu(__VA_ARGS__)

◆ vand_vv_i64m4

#define vand_vv_i64m4 ( ... ) __riscv_vand_vv_i64m4(__VA_ARGS__)

◆ vand_vv_i64m4_m

#define vand_vv_i64m4_m ( ... ) __riscv_vand_vv_i64m4_tumu(__VA_ARGS__)

◆ vand_vv_i64m8

#define vand_vv_i64m8 ( ... ) __riscv_vand_vv_i64m8(__VA_ARGS__)

◆ vand_vv_i64m8_m

#define vand_vv_i64m8_m ( ... ) __riscv_vand_vv_i64m8_tumu(__VA_ARGS__)

◆ vand_vv_i8m1

#define vand_vv_i8m1 ( ... ) __riscv_vand_vv_i8m1(__VA_ARGS__)

◆ vand_vv_i8m1_m

#define vand_vv_i8m1_m ( ... ) __riscv_vand_vv_i8m1_tumu(__VA_ARGS__)

◆ vand_vv_i8m2

#define vand_vv_i8m2 ( ... ) __riscv_vand_vv_i8m2(__VA_ARGS__)

◆ vand_vv_i8m2_m

#define vand_vv_i8m2_m ( ... ) __riscv_vand_vv_i8m2_tumu(__VA_ARGS__)

◆ vand_vv_i8m4

#define vand_vv_i8m4 ( ... ) __riscv_vand_vv_i8m4(__VA_ARGS__)

◆ vand_vv_i8m4_m

#define vand_vv_i8m4_m ( ... ) __riscv_vand_vv_i8m4_tumu(__VA_ARGS__)

◆ vand_vv_i8m8

#define vand_vv_i8m8 ( ... ) __riscv_vand_vv_i8m8(__VA_ARGS__)

◆ vand_vv_i8m8_m

#define vand_vv_i8m8_m ( ... ) __riscv_vand_vv_i8m8_tumu(__VA_ARGS__)

◆ vand_vv_i8mf2

#define vand_vv_i8mf2 ( ... ) __riscv_vand_vv_i8mf2(__VA_ARGS__)

◆ vand_vv_i8mf2_m

#define vand_vv_i8mf2_m ( ... ) __riscv_vand_vv_i8mf2_tumu(__VA_ARGS__)

◆ vand_vv_i8mf4

#define vand_vv_i8mf4 ( ... ) __riscv_vand_vv_i8mf4(__VA_ARGS__)

◆ vand_vv_i8mf4_m

#define vand_vv_i8mf4_m ( ... ) __riscv_vand_vv_i8mf4_tumu(__VA_ARGS__)

◆ vand_vv_i8mf8

#define vand_vv_i8mf8 ( ... ) __riscv_vand_vv_i8mf8(__VA_ARGS__)

◆ vand_vv_i8mf8_m

#define vand_vv_i8mf8_m ( ... ) __riscv_vand_vv_i8mf8_tumu(__VA_ARGS__)

◆ vand_vv_u16m1

#define vand_vv_u16m1 ( ... ) __riscv_vand_vv_u16m1(__VA_ARGS__)

◆ vand_vv_u16m1_m

#define vand_vv_u16m1_m ( ... ) __riscv_vand_vv_u16m1_tumu(__VA_ARGS__)

◆ vand_vv_u16m2

#define vand_vv_u16m2 ( ... ) __riscv_vand_vv_u16m2(__VA_ARGS__)

◆ vand_vv_u16m2_m

#define vand_vv_u16m2_m ( ... ) __riscv_vand_vv_u16m2_tumu(__VA_ARGS__)

◆ vand_vv_u16m4

#define vand_vv_u16m4 ( ... ) __riscv_vand_vv_u16m4(__VA_ARGS__)

◆ vand_vv_u16m4_m

#define vand_vv_u16m4_m ( ... ) __riscv_vand_vv_u16m4_tumu(__VA_ARGS__)

◆ vand_vv_u16m8

#define vand_vv_u16m8 ( ... ) __riscv_vand_vv_u16m8(__VA_ARGS__)

◆ vand_vv_u16m8_m

#define vand_vv_u16m8_m ( ... ) __riscv_vand_vv_u16m8_tumu(__VA_ARGS__)

◆ vand_vv_u16mf2

#define vand_vv_u16mf2 ( ... ) __riscv_vand_vv_u16mf2(__VA_ARGS__)

◆ vand_vv_u16mf2_m

#define vand_vv_u16mf2_m ( ... ) __riscv_vand_vv_u16mf2_tumu(__VA_ARGS__)

◆ vand_vv_u16mf4

#define vand_vv_u16mf4 ( ... ) __riscv_vand_vv_u16mf4(__VA_ARGS__)

◆ vand_vv_u16mf4_m

#define vand_vv_u16mf4_m ( ... ) __riscv_vand_vv_u16mf4_tumu(__VA_ARGS__)

◆ vand_vv_u32m1

#define vand_vv_u32m1 ( ... ) __riscv_vand_vv_u32m1(__VA_ARGS__)

◆ vand_vv_u32m1_m

#define vand_vv_u32m1_m ( ... ) __riscv_vand_vv_u32m1_tumu(__VA_ARGS__)

◆ vand_vv_u32m2

#define vand_vv_u32m2 ( ... ) __riscv_vand_vv_u32m2(__VA_ARGS__)

◆ vand_vv_u32m2_m

#define vand_vv_u32m2_m ( ... ) __riscv_vand_vv_u32m2_tumu(__VA_ARGS__)

◆ vand_vv_u32m4

#define vand_vv_u32m4 ( ... ) __riscv_vand_vv_u32m4(__VA_ARGS__)

◆ vand_vv_u32m4_m

#define vand_vv_u32m4_m ( ... ) __riscv_vand_vv_u32m4_tumu(__VA_ARGS__)

◆ vand_vv_u32m8

#define vand_vv_u32m8 ( ... ) __riscv_vand_vv_u32m8(__VA_ARGS__)

◆ vand_vv_u32m8_m

#define vand_vv_u32m8_m ( ... ) __riscv_vand_vv_u32m8_tumu(__VA_ARGS__)

◆ vand_vv_u32mf2

#define vand_vv_u32mf2 ( ... ) __riscv_vand_vv_u32mf2(__VA_ARGS__)

◆ vand_vv_u32mf2_m

#define vand_vv_u32mf2_m ( ... ) __riscv_vand_vv_u32mf2_tumu(__VA_ARGS__)

◆ vand_vv_u64m1

#define vand_vv_u64m1 ( ... ) __riscv_vand_vv_u64m1(__VA_ARGS__)

◆ vand_vv_u64m1_m

#define vand_vv_u64m1_m ( ... ) __riscv_vand_vv_u64m1_tumu(__VA_ARGS__)

◆ vand_vv_u64m2

#define vand_vv_u64m2 ( ... ) __riscv_vand_vv_u64m2(__VA_ARGS__)

◆ vand_vv_u64m2_m

#define vand_vv_u64m2_m ( ... ) __riscv_vand_vv_u64m2_tumu(__VA_ARGS__)

◆ vand_vv_u64m4

#define vand_vv_u64m4 ( ... ) __riscv_vand_vv_u64m4(__VA_ARGS__)

◆ vand_vv_u64m4_m

#define vand_vv_u64m4_m ( ... ) __riscv_vand_vv_u64m4_tumu(__VA_ARGS__)

◆ vand_vv_u64m8

#define vand_vv_u64m8 ( ... ) __riscv_vand_vv_u64m8(__VA_ARGS__)

◆ vand_vv_u64m8_m

#define vand_vv_u64m8_m ( ... ) __riscv_vand_vv_u64m8_tumu(__VA_ARGS__)

◆ vand_vv_u8m1

#define vand_vv_u8m1 ( ... ) __riscv_vand_vv_u8m1(__VA_ARGS__)

◆ vand_vv_u8m1_m

#define vand_vv_u8m1_m ( ... ) __riscv_vand_vv_u8m1_tumu(__VA_ARGS__)

◆ vand_vv_u8m2

#define vand_vv_u8m2 ( ... ) __riscv_vand_vv_u8m2(__VA_ARGS__)

◆ vand_vv_u8m2_m

#define vand_vv_u8m2_m ( ... ) __riscv_vand_vv_u8m2_tumu(__VA_ARGS__)

◆ vand_vv_u8m4

#define vand_vv_u8m4 ( ... ) __riscv_vand_vv_u8m4(__VA_ARGS__)

◆ vand_vv_u8m4_m

#define vand_vv_u8m4_m ( ... ) __riscv_vand_vv_u8m4_tumu(__VA_ARGS__)

◆ vand_vv_u8m8

#define vand_vv_u8m8 ( ... ) __riscv_vand_vv_u8m8(__VA_ARGS__)

◆ vand_vv_u8m8_m

#define vand_vv_u8m8_m ( ... ) __riscv_vand_vv_u8m8_tumu(__VA_ARGS__)

◆ vand_vv_u8mf2

#define vand_vv_u8mf2 ( ... ) __riscv_vand_vv_u8mf2(__VA_ARGS__)

◆ vand_vv_u8mf2_m

#define vand_vv_u8mf2_m ( ... ) __riscv_vand_vv_u8mf2_tumu(__VA_ARGS__)

◆ vand_vv_u8mf4

#define vand_vv_u8mf4 ( ... ) __riscv_vand_vv_u8mf4(__VA_ARGS__)

◆ vand_vv_u8mf4_m

#define vand_vv_u8mf4_m ( ... ) __riscv_vand_vv_u8mf4_tumu(__VA_ARGS__)

◆ vand_vv_u8mf8

#define vand_vv_u8mf8 ( ... ) __riscv_vand_vv_u8mf8(__VA_ARGS__)

◆ vand_vv_u8mf8_m

#define vand_vv_u8mf8_m ( ... ) __riscv_vand_vv_u8mf8_tumu(__VA_ARGS__)

◆ vand_vx_i16m1

#define vand_vx_i16m1 ( ... ) __riscv_vand_vx_i16m1(__VA_ARGS__)

◆ vand_vx_i16m1_m

#define vand_vx_i16m1_m ( ... ) __riscv_vand_vx_i16m1_tumu(__VA_ARGS__)

◆ vand_vx_i16m2

#define vand_vx_i16m2 ( ... ) __riscv_vand_vx_i16m2(__VA_ARGS__)

◆ vand_vx_i16m2_m

#define vand_vx_i16m2_m ( ... ) __riscv_vand_vx_i16m2_tumu(__VA_ARGS__)

◆ vand_vx_i16m4

#define vand_vx_i16m4 ( ... ) __riscv_vand_vx_i16m4(__VA_ARGS__)

◆ vand_vx_i16m4_m

#define vand_vx_i16m4_m ( ... ) __riscv_vand_vx_i16m4_tumu(__VA_ARGS__)

◆ vand_vx_i16m8

#define vand_vx_i16m8 ( ... ) __riscv_vand_vx_i16m8(__VA_ARGS__)

◆ vand_vx_i16m8_m

#define vand_vx_i16m8_m ( ... ) __riscv_vand_vx_i16m8_tumu(__VA_ARGS__)

◆ vand_vx_i16mf2

#define vand_vx_i16mf2 ( ... ) __riscv_vand_vx_i16mf2(__VA_ARGS__)

◆ vand_vx_i16mf2_m

#define vand_vx_i16mf2_m ( ... ) __riscv_vand_vx_i16mf2_tumu(__VA_ARGS__)

◆ vand_vx_i16mf4

#define vand_vx_i16mf4 ( ... ) __riscv_vand_vx_i16mf4(__VA_ARGS__)

◆ vand_vx_i16mf4_m

#define vand_vx_i16mf4_m ( ... ) __riscv_vand_vx_i16mf4_tumu(__VA_ARGS__)

◆ vand_vx_i32m1

#define vand_vx_i32m1 ( ... ) __riscv_vand_vx_i32m1(__VA_ARGS__)

◆ vand_vx_i32m1_m

#define vand_vx_i32m1_m ( ... ) __riscv_vand_vx_i32m1_tumu(__VA_ARGS__)

◆ vand_vx_i32m2

#define vand_vx_i32m2 ( ... ) __riscv_vand_vx_i32m2(__VA_ARGS__)

◆ vand_vx_i32m2_m

#define vand_vx_i32m2_m ( ... ) __riscv_vand_vx_i32m2_tumu(__VA_ARGS__)

◆ vand_vx_i32m4

#define vand_vx_i32m4 ( ... ) __riscv_vand_vx_i32m4(__VA_ARGS__)

◆ vand_vx_i32m4_m

#define vand_vx_i32m4_m ( ... ) __riscv_vand_vx_i32m4_tumu(__VA_ARGS__)

◆ vand_vx_i32m8

#define vand_vx_i32m8 ( ... ) __riscv_vand_vx_i32m8(__VA_ARGS__)

◆ vand_vx_i32m8_m

#define vand_vx_i32m8_m ( ... ) __riscv_vand_vx_i32m8_tumu(__VA_ARGS__)

◆ vand_vx_i32mf2

#define vand_vx_i32mf2 ( ... ) __riscv_vand_vx_i32mf2(__VA_ARGS__)

◆ vand_vx_i32mf2_m

#define vand_vx_i32mf2_m ( ... ) __riscv_vand_vx_i32mf2_tumu(__VA_ARGS__)

◆ vand_vx_i64m1

#define vand_vx_i64m1 ( ... ) __riscv_vand_vx_i64m1(__VA_ARGS__)

◆ vand_vx_i64m1_m

#define vand_vx_i64m1_m ( ... ) __riscv_vand_vx_i64m1_tumu(__VA_ARGS__)

◆ vand_vx_i64m2

#define vand_vx_i64m2 ( ... ) __riscv_vand_vx_i64m2(__VA_ARGS__)

◆ vand_vx_i64m2_m

#define vand_vx_i64m2_m ( ... ) __riscv_vand_vx_i64m2_tumu(__VA_ARGS__)

◆ vand_vx_i64m4

#define vand_vx_i64m4 ( ... ) __riscv_vand_vx_i64m4(__VA_ARGS__)

◆ vand_vx_i64m4_m

#define vand_vx_i64m4_m ( ... ) __riscv_vand_vx_i64m4_tumu(__VA_ARGS__)

◆ vand_vx_i64m8

#define vand_vx_i64m8 ( ... ) __riscv_vand_vx_i64m8(__VA_ARGS__)

◆ vand_vx_i64m8_m

#define vand_vx_i64m8_m ( ... ) __riscv_vand_vx_i64m8_tumu(__VA_ARGS__)

◆ vand_vx_i8m1

#define vand_vx_i8m1 ( ... ) __riscv_vand_vx_i8m1(__VA_ARGS__)

◆ vand_vx_i8m1_m

#define vand_vx_i8m1_m ( ... ) __riscv_vand_vx_i8m1_tumu(__VA_ARGS__)

◆ vand_vx_i8m2

#define vand_vx_i8m2 ( ... ) __riscv_vand_vx_i8m2(__VA_ARGS__)

◆ vand_vx_i8m2_m

#define vand_vx_i8m2_m ( ... ) __riscv_vand_vx_i8m2_tumu(__VA_ARGS__)

◆ vand_vx_i8m4

#define vand_vx_i8m4 ( ... ) __riscv_vand_vx_i8m4(__VA_ARGS__)

◆ vand_vx_i8m4_m

#define vand_vx_i8m4_m ( ... ) __riscv_vand_vx_i8m4_tumu(__VA_ARGS__)

◆ vand_vx_i8m8

#define vand_vx_i8m8 ( ... ) __riscv_vand_vx_i8m8(__VA_ARGS__)

◆ vand_vx_i8m8_m

#define vand_vx_i8m8_m ( ... ) __riscv_vand_vx_i8m8_tumu(__VA_ARGS__)

◆ vand_vx_i8mf2

#define vand_vx_i8mf2 ( ... ) __riscv_vand_vx_i8mf2(__VA_ARGS__)

◆ vand_vx_i8mf2_m

#define vand_vx_i8mf2_m ( ... ) __riscv_vand_vx_i8mf2_tumu(__VA_ARGS__)

◆ vand_vx_i8mf4

#define vand_vx_i8mf4 ( ... ) __riscv_vand_vx_i8mf4(__VA_ARGS__)

◆ vand_vx_i8mf4_m

#define vand_vx_i8mf4_m ( ... ) __riscv_vand_vx_i8mf4_tumu(__VA_ARGS__)

◆ vand_vx_i8mf8

#define vand_vx_i8mf8 ( ... ) __riscv_vand_vx_i8mf8(__VA_ARGS__)

◆ vand_vx_i8mf8_m

#define vand_vx_i8mf8_m ( ... ) __riscv_vand_vx_i8mf8_tumu(__VA_ARGS__)

◆ vand_vx_u16m1

#define vand_vx_u16m1 ( ... ) __riscv_vand_vx_u16m1(__VA_ARGS__)

◆ vand_vx_u16m1_m

#define vand_vx_u16m1_m ( ... ) __riscv_vand_vx_u16m1_tumu(__VA_ARGS__)

◆ vand_vx_u16m2

#define vand_vx_u16m2 ( ... ) __riscv_vand_vx_u16m2(__VA_ARGS__)

◆ vand_vx_u16m2_m

#define vand_vx_u16m2_m ( ... ) __riscv_vand_vx_u16m2_tumu(__VA_ARGS__)

◆ vand_vx_u16m4

#define vand_vx_u16m4 ( ... ) __riscv_vand_vx_u16m4(__VA_ARGS__)

◆ vand_vx_u16m4_m

#define vand_vx_u16m4_m ( ... ) __riscv_vand_vx_u16m4_tumu(__VA_ARGS__)

◆ vand_vx_u16m8

#define vand_vx_u16m8 ( ... ) __riscv_vand_vx_u16m8(__VA_ARGS__)

◆ vand_vx_u16m8_m

#define vand_vx_u16m8_m ( ... ) __riscv_vand_vx_u16m8_tumu(__VA_ARGS__)

◆ vand_vx_u16mf2

#define vand_vx_u16mf2 ( ... ) __riscv_vand_vx_u16mf2(__VA_ARGS__)

◆ vand_vx_u16mf2_m

#define vand_vx_u16mf2_m ( ... ) __riscv_vand_vx_u16mf2_tumu(__VA_ARGS__)

◆ vand_vx_u16mf4

#define vand_vx_u16mf4 ( ... ) __riscv_vand_vx_u16mf4(__VA_ARGS__)

◆ vand_vx_u16mf4_m

#define vand_vx_u16mf4_m ( ... ) __riscv_vand_vx_u16mf4_tumu(__VA_ARGS__)

◆ vand_vx_u32m1

#define vand_vx_u32m1 ( ... ) __riscv_vand_vx_u32m1(__VA_ARGS__)

◆ vand_vx_u32m1_m

#define vand_vx_u32m1_m ( ... ) __riscv_vand_vx_u32m1_tumu(__VA_ARGS__)

◆ vand_vx_u32m2

#define vand_vx_u32m2 ( ... ) __riscv_vand_vx_u32m2(__VA_ARGS__)

◆ vand_vx_u32m2_m

#define vand_vx_u32m2_m ( ... ) __riscv_vand_vx_u32m2_tumu(__VA_ARGS__)

◆ vand_vx_u32m4

#define vand_vx_u32m4 ( ... ) __riscv_vand_vx_u32m4(__VA_ARGS__)

◆ vand_vx_u32m4_m

#define vand_vx_u32m4_m ( ... ) __riscv_vand_vx_u32m4_tumu(__VA_ARGS__)

◆ vand_vx_u32m8

#define vand_vx_u32m8 ( ... ) __riscv_vand_vx_u32m8(__VA_ARGS__)

◆ vand_vx_u32m8_m

#define vand_vx_u32m8_m ( ... ) __riscv_vand_vx_u32m8_tumu(__VA_ARGS__)

◆ vand_vx_u32mf2

#define vand_vx_u32mf2 ( ... ) __riscv_vand_vx_u32mf2(__VA_ARGS__)

◆ vand_vx_u32mf2_m

#define vand_vx_u32mf2_m ( ... ) __riscv_vand_vx_u32mf2_tumu(__VA_ARGS__)

◆ vand_vx_u64m1

#define vand_vx_u64m1 ( ... ) __riscv_vand_vx_u64m1(__VA_ARGS__)

◆ vand_vx_u64m1_m

#define vand_vx_u64m1_m ( ... ) __riscv_vand_vx_u64m1_tumu(__VA_ARGS__)

◆ vand_vx_u64m2

#define vand_vx_u64m2 ( ... ) __riscv_vand_vx_u64m2(__VA_ARGS__)

◆ vand_vx_u64m2_m

#define vand_vx_u64m2_m ( ... ) __riscv_vand_vx_u64m2_tumu(__VA_ARGS__)

◆ vand_vx_u64m4

#define vand_vx_u64m4 ( ... ) __riscv_vand_vx_u64m4(__VA_ARGS__)

◆ vand_vx_u64m4_m

#define vand_vx_u64m4_m ( ... ) __riscv_vand_vx_u64m4_tumu(__VA_ARGS__)

◆ vand_vx_u64m8

#define vand_vx_u64m8 ( ... ) __riscv_vand_vx_u64m8(__VA_ARGS__)

◆ vand_vx_u64m8_m

#define vand_vx_u64m8_m ( ... ) __riscv_vand_vx_u64m8_tumu(__VA_ARGS__)

◆ vand_vx_u8m1

#define vand_vx_u8m1 ( ... ) __riscv_vand_vx_u8m1(__VA_ARGS__)

◆ vand_vx_u8m1_m

#define vand_vx_u8m1_m ( ... ) __riscv_vand_vx_u8m1_tumu(__VA_ARGS__)

◆ vand_vx_u8m2

#define vand_vx_u8m2 ( ... ) __riscv_vand_vx_u8m2(__VA_ARGS__)

◆ vand_vx_u8m2_m

#define vand_vx_u8m2_m ( ... ) __riscv_vand_vx_u8m2_tumu(__VA_ARGS__)

◆ vand_vx_u8m4

#define vand_vx_u8m4 ( ... ) __riscv_vand_vx_u8m4(__VA_ARGS__)

◆ vand_vx_u8m4_m

#define vand_vx_u8m4_m ( ... ) __riscv_vand_vx_u8m4_tumu(__VA_ARGS__)

◆ vand_vx_u8m8

#define vand_vx_u8m8 ( ... ) __riscv_vand_vx_u8m8(__VA_ARGS__)

◆ vand_vx_u8m8_m

#define vand_vx_u8m8_m ( ... ) __riscv_vand_vx_u8m8_tumu(__VA_ARGS__)

◆ vand_vx_u8mf2

#define vand_vx_u8mf2 ( ... ) __riscv_vand_vx_u8mf2(__VA_ARGS__)

◆ vand_vx_u8mf2_m

#define vand_vx_u8mf2_m ( ... ) __riscv_vand_vx_u8mf2_tumu(__VA_ARGS__)

◆ vand_vx_u8mf4

#define vand_vx_u8mf4 ( ... ) __riscv_vand_vx_u8mf4(__VA_ARGS__)

◆ vand_vx_u8mf4_m

#define vand_vx_u8mf4_m ( ... ) __riscv_vand_vx_u8mf4_tumu(__VA_ARGS__)

◆ vand_vx_u8mf8

#define vand_vx_u8mf8 ( ... ) __riscv_vand_vx_u8mf8(__VA_ARGS__)

◆ vand_vx_u8mf8_m

#define vand_vx_u8mf8_m ( ... ) __riscv_vand_vx_u8mf8_tumu(__VA_ARGS__)

◆ vasub_vv_i16m1

#define vasub_vv_i16m1 ( ... ) __riscv_vasub_vv_i16m1(__VA_ARGS__)

◆ vasub_vv_i16m1_m

#define vasub_vv_i16m1_m ( ... ) __riscv_vasub_vv_i16m1_tumu(__VA_ARGS__)

◆ vasub_vv_i16m2

#define vasub_vv_i16m2 ( ... ) __riscv_vasub_vv_i16m2(__VA_ARGS__)

◆ vasub_vv_i16m2_m

#define vasub_vv_i16m2_m ( ... ) __riscv_vasub_vv_i16m2_tumu(__VA_ARGS__)

◆ vasub_vv_i16m4

#define vasub_vv_i16m4 ( ... ) __riscv_vasub_vv_i16m4(__VA_ARGS__)

◆ vasub_vv_i16m4_m

#define vasub_vv_i16m4_m ( ... ) __riscv_vasub_vv_i16m4_tumu(__VA_ARGS__)

◆ vasub_vv_i16m8

#define vasub_vv_i16m8 ( ... ) __riscv_vasub_vv_i16m8(__VA_ARGS__)

◆ vasub_vv_i16m8_m

#define vasub_vv_i16m8_m ( ... ) __riscv_vasub_vv_i16m8_tumu(__VA_ARGS__)

◆ vasub_vv_i16mf2

#define vasub_vv_i16mf2 ( ... ) __riscv_vasub_vv_i16mf2(__VA_ARGS__)

◆ vasub_vv_i16mf2_m

#define vasub_vv_i16mf2_m ( ... ) __riscv_vasub_vv_i16mf2_tumu(__VA_ARGS__)

◆ vasub_vv_i16mf4

#define vasub_vv_i16mf4 ( ... ) __riscv_vasub_vv_i16mf4(__VA_ARGS__)

◆ vasub_vv_i16mf4_m

#define vasub_vv_i16mf4_m ( ... ) __riscv_vasub_vv_i16mf4_tumu(__VA_ARGS__)

◆ vasub_vv_i32m1

#define vasub_vv_i32m1 ( ... ) __riscv_vasub_vv_i32m1(__VA_ARGS__)

◆ vasub_vv_i32m1_m

#define vasub_vv_i32m1_m ( ... ) __riscv_vasub_vv_i32m1_tumu(__VA_ARGS__)

◆ vasub_vv_i32m2

#define vasub_vv_i32m2 ( ... ) __riscv_vasub_vv_i32m2(__VA_ARGS__)

◆ vasub_vv_i32m2_m

#define vasub_vv_i32m2_m ( ... ) __riscv_vasub_vv_i32m2_tumu(__VA_ARGS__)

◆ vasub_vv_i32m4

#define vasub_vv_i32m4 ( ... ) __riscv_vasub_vv_i32m4(__VA_ARGS__)

◆ vasub_vv_i32m4_m

#define vasub_vv_i32m4_m ( ... ) __riscv_vasub_vv_i32m4_tumu(__VA_ARGS__)

◆ vasub_vv_i32m8

#define vasub_vv_i32m8 ( ... ) __riscv_vasub_vv_i32m8(__VA_ARGS__)

◆ vasub_vv_i32m8_m

#define vasub_vv_i32m8_m ( ... ) __riscv_vasub_vv_i32m8_tumu(__VA_ARGS__)

◆ vasub_vv_i32mf2

#define vasub_vv_i32mf2 ( ... ) __riscv_vasub_vv_i32mf2(__VA_ARGS__)

◆ vasub_vv_i32mf2_m

#define vasub_vv_i32mf2_m ( ... ) __riscv_vasub_vv_i32mf2_tumu(__VA_ARGS__)

◆ vasub_vv_i64m1

#define vasub_vv_i64m1 ( ... ) __riscv_vasub_vv_i64m1(__VA_ARGS__)

◆ vasub_vv_i64m1_m

#define vasub_vv_i64m1_m ( ... ) __riscv_vasub_vv_i64m1_tumu(__VA_ARGS__)

◆ vasub_vv_i64m2

#define vasub_vv_i64m2 ( ... ) __riscv_vasub_vv_i64m2(__VA_ARGS__)

◆ vasub_vv_i64m2_m

#define vasub_vv_i64m2_m ( ... ) __riscv_vasub_vv_i64m2_tumu(__VA_ARGS__)

◆ vasub_vv_i64m4

#define vasub_vv_i64m4 ( ... ) __riscv_vasub_vv_i64m4(__VA_ARGS__)

◆ vasub_vv_i64m4_m

#define vasub_vv_i64m4_m ( ... ) __riscv_vasub_vv_i64m4_tumu(__VA_ARGS__)

◆ vasub_vv_i64m8

#define vasub_vv_i64m8 ( ... ) __riscv_vasub_vv_i64m8(__VA_ARGS__)

◆ vasub_vv_i64m8_m

#define vasub_vv_i64m8_m ( ... ) __riscv_vasub_vv_i64m8_tumu(__VA_ARGS__)

◆ vasub_vv_i8m1

#define vasub_vv_i8m1 ( ... ) __riscv_vasub_vv_i8m1(__VA_ARGS__)

◆ vasub_vv_i8m1_m

#define vasub_vv_i8m1_m ( ... ) __riscv_vasub_vv_i8m1_tumu(__VA_ARGS__)

◆ vasub_vv_i8m2

#define vasub_vv_i8m2 ( ... ) __riscv_vasub_vv_i8m2(__VA_ARGS__)

◆ vasub_vv_i8m2_m

#define vasub_vv_i8m2_m ( ... ) __riscv_vasub_vv_i8m2_tumu(__VA_ARGS__)

◆ vasub_vv_i8m4

#define vasub_vv_i8m4 ( ... ) __riscv_vasub_vv_i8m4(__VA_ARGS__)

◆ vasub_vv_i8m4_m

#define vasub_vv_i8m4_m ( ... ) __riscv_vasub_vv_i8m4_tumu(__VA_ARGS__)

◆ vasub_vv_i8m8

#define vasub_vv_i8m8 ( ... ) __riscv_vasub_vv_i8m8(__VA_ARGS__)

◆ vasub_vv_i8m8_m

#define vasub_vv_i8m8_m ( ... ) __riscv_vasub_vv_i8m8_tumu(__VA_ARGS__)

◆ vasub_vv_i8mf2

#define vasub_vv_i8mf2 ( ... ) __riscv_vasub_vv_i8mf2(__VA_ARGS__)

◆ vasub_vv_i8mf2_m

#define vasub_vv_i8mf2_m ( ... ) __riscv_vasub_vv_i8mf2_tumu(__VA_ARGS__)

◆ vasub_vv_i8mf4

#define vasub_vv_i8mf4 ( ... ) __riscv_vasub_vv_i8mf4(__VA_ARGS__)

◆ vasub_vv_i8mf4_m

#define vasub_vv_i8mf4_m ( ... ) __riscv_vasub_vv_i8mf4_tumu(__VA_ARGS__)

◆ vasub_vv_i8mf8

#define vasub_vv_i8mf8 ( ... ) __riscv_vasub_vv_i8mf8(__VA_ARGS__)

◆ vasub_vv_i8mf8_m

#define vasub_vv_i8mf8_m ( ... ) __riscv_vasub_vv_i8mf8_tumu(__VA_ARGS__)

◆ vasub_vx_i16m1

#define vasub_vx_i16m1 ( ... ) __riscv_vasub_vx_i16m1(__VA_ARGS__)

◆ vasub_vx_i16m1_m

#define vasub_vx_i16m1_m ( ... ) __riscv_vasub_vx_i16m1_tumu(__VA_ARGS__)

◆ vasub_vx_i16m2

#define vasub_vx_i16m2 ( ... ) __riscv_vasub_vx_i16m2(__VA_ARGS__)

◆ vasub_vx_i16m2_m

#define vasub_vx_i16m2_m ( ... ) __riscv_vasub_vx_i16m2_tumu(__VA_ARGS__)

◆ vasub_vx_i16m4

#define vasub_vx_i16m4 ( ... ) __riscv_vasub_vx_i16m4(__VA_ARGS__)

◆ vasub_vx_i16m4_m

#define vasub_vx_i16m4_m ( ... ) __riscv_vasub_vx_i16m4_tumu(__VA_ARGS__)

◆ vasub_vx_i16m8

#define vasub_vx_i16m8 ( ... ) __riscv_vasub_vx_i16m8(__VA_ARGS__)

◆ vasub_vx_i16m8_m

#define vasub_vx_i16m8_m ( ... ) __riscv_vasub_vx_i16m8_tumu(__VA_ARGS__)

◆ vasub_vx_i16mf2

#define vasub_vx_i16mf2 ( ... ) __riscv_vasub_vx_i16mf2(__VA_ARGS__)

◆ vasub_vx_i16mf2_m

#define vasub_vx_i16mf2_m ( ... ) __riscv_vasub_vx_i16mf2_tumu(__VA_ARGS__)

◆ vasub_vx_i16mf4

#define vasub_vx_i16mf4 ( ... ) __riscv_vasub_vx_i16mf4(__VA_ARGS__)

◆ vasub_vx_i16mf4_m

#define vasub_vx_i16mf4_m ( ... ) __riscv_vasub_vx_i16mf4_tumu(__VA_ARGS__)

◆ vasub_vx_i32m1

#define vasub_vx_i32m1 ( ... ) __riscv_vasub_vx_i32m1(__VA_ARGS__)

◆ vasub_vx_i32m1_m

#define vasub_vx_i32m1_m ( ... ) __riscv_vasub_vx_i32m1_tumu(__VA_ARGS__)

◆ vasub_vx_i32m2

#define vasub_vx_i32m2 ( ... ) __riscv_vasub_vx_i32m2(__VA_ARGS__)

◆ vasub_vx_i32m2_m

#define vasub_vx_i32m2_m ( ... ) __riscv_vasub_vx_i32m2_tumu(__VA_ARGS__)

◆ vasub_vx_i32m4

#define vasub_vx_i32m4 ( ... ) __riscv_vasub_vx_i32m4(__VA_ARGS__)

◆ vasub_vx_i32m4_m

#define vasub_vx_i32m4_m ( ... ) __riscv_vasub_vx_i32m4_tumu(__VA_ARGS__)

◆ vasub_vx_i32m8

#define vasub_vx_i32m8 ( ... ) __riscv_vasub_vx_i32m8(__VA_ARGS__)

◆ vasub_vx_i32m8_m

#define vasub_vx_i32m8_m ( ... ) __riscv_vasub_vx_i32m8_tumu(__VA_ARGS__)

◆ vasub_vx_i32mf2

#define vasub_vx_i32mf2 ( ... ) __riscv_vasub_vx_i32mf2(__VA_ARGS__)

◆ vasub_vx_i32mf2_m

#define vasub_vx_i32mf2_m ( ... ) __riscv_vasub_vx_i32mf2_tumu(__VA_ARGS__)

◆ vasub_vx_i64m1

#define vasub_vx_i64m1 ( ... ) __riscv_vasub_vx_i64m1(__VA_ARGS__)

◆ vasub_vx_i64m1_m

#define vasub_vx_i64m1_m ( ... ) __riscv_vasub_vx_i64m1_tumu(__VA_ARGS__)

◆ vasub_vx_i64m2

#define vasub_vx_i64m2 ( ... ) __riscv_vasub_vx_i64m2(__VA_ARGS__)

◆ vasub_vx_i64m2_m

#define vasub_vx_i64m2_m ( ... ) __riscv_vasub_vx_i64m2_tumu(__VA_ARGS__)

◆ vasub_vx_i64m4

#define vasub_vx_i64m4 ( ... ) __riscv_vasub_vx_i64m4(__VA_ARGS__)

◆ vasub_vx_i64m4_m

#define vasub_vx_i64m4_m ( ... ) __riscv_vasub_vx_i64m4_tumu(__VA_ARGS__)

◆ vasub_vx_i64m8

#define vasub_vx_i64m8 ( ... ) __riscv_vasub_vx_i64m8(__VA_ARGS__)

◆ vasub_vx_i64m8_m

#define vasub_vx_i64m8_m ( ... ) __riscv_vasub_vx_i64m8_tumu(__VA_ARGS__)

◆ vasub_vx_i8m1

#define vasub_vx_i8m1 ( ... ) __riscv_vasub_vx_i8m1(__VA_ARGS__)

◆ vasub_vx_i8m1_m

#define vasub_vx_i8m1_m ( ... ) __riscv_vasub_vx_i8m1_tumu(__VA_ARGS__)

◆ vasub_vx_i8m2

#define vasub_vx_i8m2 ( ... ) __riscv_vasub_vx_i8m2(__VA_ARGS__)

◆ vasub_vx_i8m2_m

#define vasub_vx_i8m2_m ( ... ) __riscv_vasub_vx_i8m2_tumu(__VA_ARGS__)

◆ vasub_vx_i8m4

#define vasub_vx_i8m4 ( ... ) __riscv_vasub_vx_i8m4(__VA_ARGS__)

◆ vasub_vx_i8m4_m

#define vasub_vx_i8m4_m ( ... ) __riscv_vasub_vx_i8m4_tumu(__VA_ARGS__)

◆ vasub_vx_i8m8

#define vasub_vx_i8m8 ( ... ) __riscv_vasub_vx_i8m8(__VA_ARGS__)

◆ vasub_vx_i8m8_m

#define vasub_vx_i8m8_m ( ... ) __riscv_vasub_vx_i8m8_tumu(__VA_ARGS__)

◆ vasub_vx_i8mf2

#define vasub_vx_i8mf2 ( ... ) __riscv_vasub_vx_i8mf2(__VA_ARGS__)

◆ vasub_vx_i8mf2_m

#define vasub_vx_i8mf2_m ( ... ) __riscv_vasub_vx_i8mf2_tumu(__VA_ARGS__)

◆ vasub_vx_i8mf4

#define vasub_vx_i8mf4 ( ... ) __riscv_vasub_vx_i8mf4(__VA_ARGS__)

◆ vasub_vx_i8mf4_m

#define vasub_vx_i8mf4_m ( ... ) __riscv_vasub_vx_i8mf4_tumu(__VA_ARGS__)

◆ vasub_vx_i8mf8

#define vasub_vx_i8mf8 ( ... ) __riscv_vasub_vx_i8mf8(__VA_ARGS__)

◆ vasub_vx_i8mf8_m

#define vasub_vx_i8mf8_m ( ... ) __riscv_vasub_vx_i8mf8_tumu(__VA_ARGS__)

◆ vasubu_vv_u16m1

#define vasubu_vv_u16m1 ( ... ) __riscv_vasubu_vv_u16m1(__VA_ARGS__)

◆ vasubu_vv_u16m1_m

#define vasubu_vv_u16m1_m ( ... ) __riscv_vasubu_vv_u16m1_tumu(__VA_ARGS__)

◆ vasubu_vv_u16m2

#define vasubu_vv_u16m2 ( ... ) __riscv_vasubu_vv_u16m2(__VA_ARGS__)

◆ vasubu_vv_u16m2_m

#define vasubu_vv_u16m2_m ( ... ) __riscv_vasubu_vv_u16m2_tumu(__VA_ARGS__)

◆ vasubu_vv_u16m4

#define vasubu_vv_u16m4 ( ... ) __riscv_vasubu_vv_u16m4(__VA_ARGS__)

◆ vasubu_vv_u16m4_m

#define vasubu_vv_u16m4_m ( ... ) __riscv_vasubu_vv_u16m4_tumu(__VA_ARGS__)

◆ vasubu_vv_u16m8

#define vasubu_vv_u16m8 ( ... ) __riscv_vasubu_vv_u16m8(__VA_ARGS__)

◆ vasubu_vv_u16m8_m

#define vasubu_vv_u16m8_m ( ... ) __riscv_vasubu_vv_u16m8_tumu(__VA_ARGS__)

◆ vasubu_vv_u16mf2

#define vasubu_vv_u16mf2 ( ... ) __riscv_vasubu_vv_u16mf2(__VA_ARGS__)

◆ vasubu_vv_u16mf2_m

#define vasubu_vv_u16mf2_m ( ... ) __riscv_vasubu_vv_u16mf2_tumu(__VA_ARGS__)

◆ vasubu_vv_u16mf4

#define vasubu_vv_u16mf4 ( ... ) __riscv_vasubu_vv_u16mf4(__VA_ARGS__)

◆ vasubu_vv_u16mf4_m

#define vasubu_vv_u16mf4_m ( ... ) __riscv_vasubu_vv_u16mf4_tumu(__VA_ARGS__)

◆ vasubu_vv_u32m1

#define vasubu_vv_u32m1 ( ... ) __riscv_vasubu_vv_u32m1(__VA_ARGS__)

◆ vasubu_vv_u32m1_m

#define vasubu_vv_u32m1_m ( ... ) __riscv_vasubu_vv_u32m1_tumu(__VA_ARGS__)

◆ vasubu_vv_u32m2

#define vasubu_vv_u32m2 ( ... ) __riscv_vasubu_vv_u32m2(__VA_ARGS__)

◆ vasubu_vv_u32m2_m

#define vasubu_vv_u32m2_m ( ... ) __riscv_vasubu_vv_u32m2_tumu(__VA_ARGS__)

◆ vasubu_vv_u32m4

#define vasubu_vv_u32m4 ( ... ) __riscv_vasubu_vv_u32m4(__VA_ARGS__)

◆ vasubu_vv_u32m4_m

#define vasubu_vv_u32m4_m ( ... ) __riscv_vasubu_vv_u32m4_tumu(__VA_ARGS__)

◆ vasubu_vv_u32m8

#define vasubu_vv_u32m8 ( ... ) __riscv_vasubu_vv_u32m8(__VA_ARGS__)

◆ vasubu_vv_u32m8_m

#define vasubu_vv_u32m8_m ( ... ) __riscv_vasubu_vv_u32m8_tumu(__VA_ARGS__)

◆ vasubu_vv_u32mf2

#define vasubu_vv_u32mf2 ( ... ) __riscv_vasubu_vv_u32mf2(__VA_ARGS__)

◆ vasubu_vv_u32mf2_m

#define vasubu_vv_u32mf2_m ( ... ) __riscv_vasubu_vv_u32mf2_tumu(__VA_ARGS__)

◆ vasubu_vv_u64m1

#define vasubu_vv_u64m1 ( ... ) __riscv_vasubu_vv_u64m1(__VA_ARGS__)

◆ vasubu_vv_u64m1_m

#define vasubu_vv_u64m1_m ( ... ) __riscv_vasubu_vv_u64m1_tumu(__VA_ARGS__)

◆ vasubu_vv_u64m2

#define vasubu_vv_u64m2 ( ... ) __riscv_vasubu_vv_u64m2(__VA_ARGS__)

◆ vasubu_vv_u64m2_m

#define vasubu_vv_u64m2_m ( ... ) __riscv_vasubu_vv_u64m2_tumu(__VA_ARGS__)

◆ vasubu_vv_u64m4

#define vasubu_vv_u64m4 ( ... ) __riscv_vasubu_vv_u64m4(__VA_ARGS__)

◆ vasubu_vv_u64m4_m

#define vasubu_vv_u64m4_m ( ... ) __riscv_vasubu_vv_u64m4_tumu(__VA_ARGS__)

◆ vasubu_vv_u64m8

#define vasubu_vv_u64m8 ( ... ) __riscv_vasubu_vv_u64m8(__VA_ARGS__)

◆ vasubu_vv_u64m8_m

#define vasubu_vv_u64m8_m ( ... ) __riscv_vasubu_vv_u64m8_tumu(__VA_ARGS__)

◆ vasubu_vv_u8m1

#define vasubu_vv_u8m1 ( ... ) __riscv_vasubu_vv_u8m1(__VA_ARGS__)

◆ vasubu_vv_u8m1_m

#define vasubu_vv_u8m1_m ( ... ) __riscv_vasubu_vv_u8m1_tumu(__VA_ARGS__)

◆ vasubu_vv_u8m2

#define vasubu_vv_u8m2 ( ... ) __riscv_vasubu_vv_u8m2(__VA_ARGS__)

◆ vasubu_vv_u8m2_m

#define vasubu_vv_u8m2_m ( ... ) __riscv_vasubu_vv_u8m2_tumu(__VA_ARGS__)

◆ vasubu_vv_u8m4

#define vasubu_vv_u8m4 ( ... ) __riscv_vasubu_vv_u8m4(__VA_ARGS__)

◆ vasubu_vv_u8m4_m

#define vasubu_vv_u8m4_m ( ... ) __riscv_vasubu_vv_u8m4_tumu(__VA_ARGS__)

◆ vasubu_vv_u8m8

#define vasubu_vv_u8m8 ( ... ) __riscv_vasubu_vv_u8m8(__VA_ARGS__)

◆ vasubu_vv_u8m8_m

#define vasubu_vv_u8m8_m ( ... ) __riscv_vasubu_vv_u8m8_tumu(__VA_ARGS__)

◆ vasubu_vv_u8mf2

#define vasubu_vv_u8mf2 ( ... ) __riscv_vasubu_vv_u8mf2(__VA_ARGS__)

◆ vasubu_vv_u8mf2_m

#define vasubu_vv_u8mf2_m ( ... ) __riscv_vasubu_vv_u8mf2_tumu(__VA_ARGS__)

◆ vasubu_vv_u8mf4

#define vasubu_vv_u8mf4 ( ... ) __riscv_vasubu_vv_u8mf4(__VA_ARGS__)

◆ vasubu_vv_u8mf4_m

#define vasubu_vv_u8mf4_m ( ... ) __riscv_vasubu_vv_u8mf4_tumu(__VA_ARGS__)

◆ vasubu_vv_u8mf8

#define vasubu_vv_u8mf8 ( ... ) __riscv_vasubu_vv_u8mf8(__VA_ARGS__)

◆ vasubu_vv_u8mf8_m

#define vasubu_vv_u8mf8_m ( ... ) __riscv_vasubu_vv_u8mf8_tumu(__VA_ARGS__)

◆ vasubu_vx_u16m1

#define vasubu_vx_u16m1 ( ... ) __riscv_vasubu_vx_u16m1(__VA_ARGS__)

◆ vasubu_vx_u16m1_m

#define vasubu_vx_u16m1_m ( ... ) __riscv_vasubu_vx_u16m1_tumu(__VA_ARGS__)

◆ vasubu_vx_u16m2

#define vasubu_vx_u16m2 ( ... ) __riscv_vasubu_vx_u16m2(__VA_ARGS__)

◆ vasubu_vx_u16m2_m

#define vasubu_vx_u16m2_m ( ... ) __riscv_vasubu_vx_u16m2_tumu(__VA_ARGS__)

◆ vasubu_vx_u16m4

#define vasubu_vx_u16m4 ( ... ) __riscv_vasubu_vx_u16m4(__VA_ARGS__)

◆ vasubu_vx_u16m4_m

#define vasubu_vx_u16m4_m ( ... ) __riscv_vasubu_vx_u16m4_tumu(__VA_ARGS__)

◆ vasubu_vx_u16m8

#define vasubu_vx_u16m8 ( ... ) __riscv_vasubu_vx_u16m8(__VA_ARGS__)

◆ vasubu_vx_u16m8_m

#define vasubu_vx_u16m8_m ( ... ) __riscv_vasubu_vx_u16m8_tumu(__VA_ARGS__)

◆ vasubu_vx_u16mf2

#define vasubu_vx_u16mf2 ( ... ) __riscv_vasubu_vx_u16mf2(__VA_ARGS__)

◆ vasubu_vx_u16mf2_m

#define vasubu_vx_u16mf2_m ( ... ) __riscv_vasubu_vx_u16mf2_tumu(__VA_ARGS__)

◆ vasubu_vx_u16mf4

#define vasubu_vx_u16mf4 ( ... ) __riscv_vasubu_vx_u16mf4(__VA_ARGS__)

◆ vasubu_vx_u16mf4_m

#define vasubu_vx_u16mf4_m ( ... ) __riscv_vasubu_vx_u16mf4_tumu(__VA_ARGS__)

◆ vasubu_vx_u32m1

#define vasubu_vx_u32m1 ( ... ) __riscv_vasubu_vx_u32m1(__VA_ARGS__)

◆ vasubu_vx_u32m1_m

#define vasubu_vx_u32m1_m ( ... ) __riscv_vasubu_vx_u32m1_tumu(__VA_ARGS__)

◆ vasubu_vx_u32m2

#define vasubu_vx_u32m2 ( ... ) __riscv_vasubu_vx_u32m2(__VA_ARGS__)

◆ vasubu_vx_u32m2_m

#define vasubu_vx_u32m2_m ( ... ) __riscv_vasubu_vx_u32m2_tumu(__VA_ARGS__)

◆ vasubu_vx_u32m4

#define vasubu_vx_u32m4 ( ... ) __riscv_vasubu_vx_u32m4(__VA_ARGS__)

◆ vasubu_vx_u32m4_m

#define vasubu_vx_u32m4_m ( ... ) __riscv_vasubu_vx_u32m4_tumu(__VA_ARGS__)

◆ vasubu_vx_u32m8

#define vasubu_vx_u32m8 ( ... ) __riscv_vasubu_vx_u32m8(__VA_ARGS__)

◆ vasubu_vx_u32m8_m

#define vasubu_vx_u32m8_m ( ... ) __riscv_vasubu_vx_u32m8_tumu(__VA_ARGS__)

◆ vasubu_vx_u32mf2

#define vasubu_vx_u32mf2 ( ... ) __riscv_vasubu_vx_u32mf2(__VA_ARGS__)

◆ vasubu_vx_u32mf2_m

#define vasubu_vx_u32mf2_m ( ... ) __riscv_vasubu_vx_u32mf2_tumu(__VA_ARGS__)

◆ vasubu_vx_u64m1

#define vasubu_vx_u64m1 ( ... ) __riscv_vasubu_vx_u64m1(__VA_ARGS__)

◆ vasubu_vx_u64m1_m

#define vasubu_vx_u64m1_m ( ... ) __riscv_vasubu_vx_u64m1_tumu(__VA_ARGS__)

◆ vasubu_vx_u64m2

#define vasubu_vx_u64m2 ( ... ) __riscv_vasubu_vx_u64m2(__VA_ARGS__)

◆ vasubu_vx_u64m2_m

#define vasubu_vx_u64m2_m ( ... ) __riscv_vasubu_vx_u64m2_tumu(__VA_ARGS__)

◆ vasubu_vx_u64m4

#define vasubu_vx_u64m4 ( ... ) __riscv_vasubu_vx_u64m4(__VA_ARGS__)

◆ vasubu_vx_u64m4_m

#define vasubu_vx_u64m4_m ( ... ) __riscv_vasubu_vx_u64m4_tumu(__VA_ARGS__)

◆ vasubu_vx_u64m8

#define vasubu_vx_u64m8 ( ... ) __riscv_vasubu_vx_u64m8(__VA_ARGS__)

◆ vasubu_vx_u64m8_m

#define vasubu_vx_u64m8_m ( ... ) __riscv_vasubu_vx_u64m8_tumu(__VA_ARGS__)

◆ vasubu_vx_u8m1

#define vasubu_vx_u8m1 ( ... ) __riscv_vasubu_vx_u8m1(__VA_ARGS__)

◆ vasubu_vx_u8m1_m

#define vasubu_vx_u8m1_m ( ... ) __riscv_vasubu_vx_u8m1_tumu(__VA_ARGS__)

◆ vasubu_vx_u8m2

#define vasubu_vx_u8m2 ( ... ) __riscv_vasubu_vx_u8m2(__VA_ARGS__)

◆ vasubu_vx_u8m2_m

#define vasubu_vx_u8m2_m ( ... ) __riscv_vasubu_vx_u8m2_tumu(__VA_ARGS__)

◆ vasubu_vx_u8m4

#define vasubu_vx_u8m4 ( ... ) __riscv_vasubu_vx_u8m4(__VA_ARGS__)

◆ vasubu_vx_u8m4_m

#define vasubu_vx_u8m4_m ( ... ) __riscv_vasubu_vx_u8m4_tumu(__VA_ARGS__)

◆ vasubu_vx_u8m8

#define vasubu_vx_u8m8 ( ... ) __riscv_vasubu_vx_u8m8(__VA_ARGS__)

◆ vasubu_vx_u8m8_m

#define vasubu_vx_u8m8_m ( ... ) __riscv_vasubu_vx_u8m8_tumu(__VA_ARGS__)

◆ vasubu_vx_u8mf2

#define vasubu_vx_u8mf2 ( ... ) __riscv_vasubu_vx_u8mf2(__VA_ARGS__)

◆ vasubu_vx_u8mf2_m

#define vasubu_vx_u8mf2_m ( ... ) __riscv_vasubu_vx_u8mf2_tumu(__VA_ARGS__)

◆ vasubu_vx_u8mf4

#define vasubu_vx_u8mf4 ( ... ) __riscv_vasubu_vx_u8mf4(__VA_ARGS__)

◆ vasubu_vx_u8mf4_m

#define vasubu_vx_u8mf4_m ( ... ) __riscv_vasubu_vx_u8mf4_tumu(__VA_ARGS__)

◆ vasubu_vx_u8mf8

#define vasubu_vx_u8mf8 ( ... ) __riscv_vasubu_vx_u8mf8(__VA_ARGS__)

◆ vasubu_vx_u8mf8_m

#define vasubu_vx_u8mf8_m ( ... ) __riscv_vasubu_vx_u8mf8_tumu(__VA_ARGS__)

◆ vcompress_vm_f16m1

#define vcompress_vm_f16m1	(	mask,
		dest,
		src,
		vl
	)	__riscv_vcompress_vm_f16m1_tu((dest), (src), (mask), (vl))

◆ vcompress_vm_f16m2

#define vcompress_vm_f16m2	(	mask,
		dest,
		src,
		vl
	)	__riscv_vcompress_vm_f16m2_tu((dest), (src), (mask), (vl))

◆ vcompress_vm_f16m4

#define vcompress_vm_f16m4	(	mask,
		dest,
		src,
		vl
	)	__riscv_vcompress_vm_f16m4_tu((dest), (src), (mask), (vl))

◆ vcompress_vm_f16m8

#define vcompress_vm_f16m8	(	mask,
		dest,
		src,
		vl
	)	__riscv_vcompress_vm_f16m8_tu((dest), (src), (mask), (vl))

◆ vcompress_vm_f16mf2

#define vcompress_vm_f16mf2	(	mask,
		dest,
		src,
		vl
	)	__riscv_vcompress_vm_f16mf2_tu((dest), (src), (mask), (vl))

◆ vcompress_vm_f16mf4

#define vcompress_vm_f16mf4	(	mask,
		dest,
		src,
		vl
	)	__riscv_vcompress_vm_f16mf4_tu((dest), (src), (mask), (vl))

◆ vcompress_vm_f32m1

#define vcompress_vm_f32m1	(	mask,
		dest,
		src,
		vl
	)	__riscv_vcompress_vm_f32m1_tu((dest), (src), (mask), (vl))

◆ vcompress_vm_f32m2

#define vcompress_vm_f32m2	(	mask,
		dest,
		src,
		vl
	)	__riscv_vcompress_vm_f32m2_tu((dest), (src), (mask), (vl))

◆ vcompress_vm_f32m4

#define vcompress_vm_f32m4	(	mask,
		dest,
		src,
		vl
	)	__riscv_vcompress_vm_f32m4_tu((dest), (src), (mask), (vl))

◆ vcompress_vm_f32m8

#define vcompress_vm_f32m8	(	mask,
		dest,
		src,
		vl
	)	__riscv_vcompress_vm_f32m8_tu((dest), (src), (mask), (vl))

◆ vcompress_vm_f32mf2

#define vcompress_vm_f32mf2	(	mask,
		dest,
		src,
		vl
	)	__riscv_vcompress_vm_f32mf2_tu((dest), (src), (mask), (vl))

◆ vcompress_vm_f64m1

#define vcompress_vm_f64m1	(	mask,
		dest,
		src,
		vl
	)	__riscv_vcompress_vm_f64m1_tu((dest), (src), (mask), (vl))

◆ vcompress_vm_f64m2

#define vcompress_vm_f64m2	(	mask,
		dest,
		src,
		vl
	)	__riscv_vcompress_vm_f64m2_tu((dest), (src), (mask), (vl))

◆ vcompress_vm_f64m4

#define vcompress_vm_f64m4	(	mask,
		dest,
		src,
		vl
	)	__riscv_vcompress_vm_f64m4_tu((dest), (src), (mask), (vl))

◆ vcompress_vm_f64m8

#define vcompress_vm_f64m8	(	mask,
		dest,
		src,
		vl
	)	__riscv_vcompress_vm_f64m8_tu((dest), (src), (mask), (vl))

◆ vcompress_vm_i16m1

#define vcompress_vm_i16m1	(	mask,
		dest,
		src,
		vl
	)	__riscv_vcompress_vm_i16m1_tu((dest), (src), (mask), (vl))

◆ vcompress_vm_i16m2

#define vcompress_vm_i16m2	(	mask,
		dest,
		src,
		vl
	)	__riscv_vcompress_vm_i16m2_tu((dest), (src), (mask), (vl))

◆ vcompress_vm_i16m4

#define vcompress_vm_i16m4	(	mask,
		dest,
		src,
		vl
	)	__riscv_vcompress_vm_i16m4_tu((dest), (src), (mask), (vl))

◆ vcompress_vm_i16m8

#define vcompress_vm_i16m8	(	mask,
		dest,
		src,
		vl
	)	__riscv_vcompress_vm_i16m8_tu((dest), (src), (mask), (vl))

◆ vcompress_vm_i16mf2

#define vcompress_vm_i16mf2	(	mask,
		dest,
		src,
		vl
	)	__riscv_vcompress_vm_i16mf2_tu((dest), (src), (mask), (vl))

◆ vcompress_vm_i16mf4

#define vcompress_vm_i16mf4	(	mask,
		dest,
		src,
		vl
	)	__riscv_vcompress_vm_i16mf4_tu((dest), (src), (mask), (vl))

◆ vcompress_vm_i32m1

#define vcompress_vm_i32m1	(	mask,
		dest,
		src,
		vl
	)	__riscv_vcompress_vm_i32m1_tu((dest), (src), (mask), (vl))

◆ vcompress_vm_i32m2

#define vcompress_vm_i32m2	(	mask,
		dest,
		src,
		vl
	)	__riscv_vcompress_vm_i32m2_tu((dest), (src), (mask), (vl))

◆ vcompress_vm_i32m4

#define vcompress_vm_i32m4	(	mask,
		dest,
		src,
		vl
	)	__riscv_vcompress_vm_i32m4_tu((dest), (src), (mask), (vl))

◆ vcompress_vm_i32m8

#define vcompress_vm_i32m8	(	mask,
		dest,
		src,
		vl
	)	__riscv_vcompress_vm_i32m8_tu((dest), (src), (mask), (vl))

◆ vcompress_vm_i32mf2

#define vcompress_vm_i32mf2	(	mask,
		dest,
		src,
		vl
	)	__riscv_vcompress_vm_i32mf2_tu((dest), (src), (mask), (vl))

◆ vcompress_vm_i64m1

#define vcompress_vm_i64m1	(	mask,
		dest,
		src,
		vl
	)	__riscv_vcompress_vm_i64m1_tu((dest), (src), (mask), (vl))

◆ vcompress_vm_i64m2

#define vcompress_vm_i64m2	(	mask,
		dest,
		src,
		vl
	)	__riscv_vcompress_vm_i64m2_tu((dest), (src), (mask), (vl))

◆ vcompress_vm_i64m4

#define vcompress_vm_i64m4	(	mask,
		dest,
		src,
		vl
	)	__riscv_vcompress_vm_i64m4_tu((dest), (src), (mask), (vl))

◆ vcompress_vm_i64m8

#define vcompress_vm_i64m8	(	mask,
		dest,
		src,
		vl
	)	__riscv_vcompress_vm_i64m8_tu((dest), (src), (mask), (vl))

◆ vcompress_vm_i8m1

#define vcompress_vm_i8m1	(	mask,
		dest,
		src,
		vl
	)	__riscv_vcompress_vm_i8m1_tu((dest), (src), (mask), (vl))

◆ vcompress_vm_i8m2

#define vcompress_vm_i8m2	(	mask,
		dest,
		src,
		vl
	)	__riscv_vcompress_vm_i8m2_tu((dest), (src), (mask), (vl))

◆ vcompress_vm_i8m4

#define vcompress_vm_i8m4	(	mask,
		dest,
		src,
		vl
	)	__riscv_vcompress_vm_i8m4_tu((dest), (src), (mask), (vl))

◆ vcompress_vm_i8m8

#define vcompress_vm_i8m8	(	mask,
		dest,
		src,
		vl
	)	__riscv_vcompress_vm_i8m8_tu((dest), (src), (mask), (vl))

◆ vcompress_vm_i8mf2

#define vcompress_vm_i8mf2	(	mask,
		dest,
		src,
		vl
	)	__riscv_vcompress_vm_i8mf2_tu((dest), (src), (mask), (vl))

◆ vcompress_vm_i8mf4

#define vcompress_vm_i8mf4	(	mask,
		dest,
		src,
		vl
	)	__riscv_vcompress_vm_i8mf4_tu((dest), (src), (mask), (vl))

◆ vcompress_vm_i8mf8

#define vcompress_vm_i8mf8	(	mask,
		dest,
		src,
		vl
	)	__riscv_vcompress_vm_i8mf8_tu((dest), (src), (mask), (vl))

◆ vcompress_vm_u16m1

#define vcompress_vm_u16m1	(	mask,
		dest,
		src,
		vl
	)	__riscv_vcompress_vm_u16m1_tu((dest), (src), (mask), (vl))

◆ vcompress_vm_u16m2

#define vcompress_vm_u16m2	(	mask,
		dest,
		src,
		vl
	)	__riscv_vcompress_vm_u16m2_tu((dest), (src), (mask), (vl))

◆ vcompress_vm_u16m4

#define vcompress_vm_u16m4	(	mask,
		dest,
		src,
		vl
	)	__riscv_vcompress_vm_u16m4_tu((dest), (src), (mask), (vl))

◆ vcompress_vm_u16m8

#define vcompress_vm_u16m8	(	mask,
		dest,
		src,
		vl
	)	__riscv_vcompress_vm_u16m8_tu((dest), (src), (mask), (vl))

◆ vcompress_vm_u16mf2

#define vcompress_vm_u16mf2	(	mask,
		dest,
		src,
		vl
	)	__riscv_vcompress_vm_u16mf2_tu((dest), (src), (mask), (vl))

◆ vcompress_vm_u16mf4

#define vcompress_vm_u16mf4	(	mask,
		dest,
		src,
		vl
	)	__riscv_vcompress_vm_u16mf4_tu((dest), (src), (mask), (vl))

◆ vcompress_vm_u32m1

#define vcompress_vm_u32m1	(	mask,
		dest,
		src,
		vl
	)	__riscv_vcompress_vm_u32m1_tu((dest), (src), (mask), (vl))

◆ vcompress_vm_u32m2

#define vcompress_vm_u32m2	(	mask,
		dest,
		src,
		vl
	)	__riscv_vcompress_vm_u32m2_tu((dest), (src), (mask), (vl))

◆ vcompress_vm_u32m4

#define vcompress_vm_u32m4	(	mask,
		dest,
		src,
		vl
	)	__riscv_vcompress_vm_u32m4_tu((dest), (src), (mask), (vl))

◆ vcompress_vm_u32m8

#define vcompress_vm_u32m8	(	mask,
		dest,
		src,
		vl
	)	__riscv_vcompress_vm_u32m8_tu((dest), (src), (mask), (vl))

◆ vcompress_vm_u32mf2

#define vcompress_vm_u32mf2	(	mask,
		dest,
		src,
		vl
	)	__riscv_vcompress_vm_u32mf2_tu((dest), (src), (mask), (vl))

◆ vcompress_vm_u64m1

#define vcompress_vm_u64m1	(	mask,
		dest,
		src,
		vl
	)	__riscv_vcompress_vm_u64m1_tu((dest), (src), (mask), (vl))

◆ vcompress_vm_u64m2

#define vcompress_vm_u64m2	(	mask,
		dest,
		src,
		vl
	)	__riscv_vcompress_vm_u64m2_tu((dest), (src), (mask), (vl))

◆ vcompress_vm_u64m4

#define vcompress_vm_u64m4	(	mask,
		dest,
		src,
		vl
	)	__riscv_vcompress_vm_u64m4_tu((dest), (src), (mask), (vl))

◆ vcompress_vm_u64m8

#define vcompress_vm_u64m8	(	mask,
		dest,
		src,
		vl
	)	__riscv_vcompress_vm_u64m8_tu((dest), (src), (mask), (vl))

◆ vcompress_vm_u8m1

#define vcompress_vm_u8m1	(	mask,
		dest,
		src,
		vl
	)	__riscv_vcompress_vm_u8m1_tu((dest), (src), (mask), (vl))

◆ vcompress_vm_u8m2

#define vcompress_vm_u8m2	(	mask,
		dest,
		src,
		vl
	)	__riscv_vcompress_vm_u8m2_tu((dest), (src), (mask), (vl))

◆ vcompress_vm_u8m4

#define vcompress_vm_u8m4	(	mask,
		dest,
		src,
		vl
	)	__riscv_vcompress_vm_u8m4_tu((dest), (src), (mask), (vl))

◆ vcompress_vm_u8m8

#define vcompress_vm_u8m8	(	mask,
		dest,
		src,
		vl
	)	__riscv_vcompress_vm_u8m8_tu((dest), (src), (mask), (vl))

◆ vcompress_vm_u8mf2

#define vcompress_vm_u8mf2	(	mask,
		dest,
		src,
		vl
	)	__riscv_vcompress_vm_u8mf2_tu((dest), (src), (mask), (vl))

◆ vcompress_vm_u8mf4

#define vcompress_vm_u8mf4	(	mask,
		dest,
		src,
		vl
	)	__riscv_vcompress_vm_u8mf4_tu((dest), (src), (mask), (vl))

◆ vcompress_vm_u8mf8

#define vcompress_vm_u8mf8	(	mask,
		dest,
		src,
		vl
	)	__riscv_vcompress_vm_u8mf8_tu((dest), (src), (mask), (vl))

◆ vcpop_m_b1

#define vcpop_m_b1 ( ... ) __riscv_vcpop_m_b1(__VA_ARGS__)

◆ vcpop_m_b16

#define vcpop_m_b16 ( ... ) __riscv_vcpop_m_b16(__VA_ARGS__)

◆ vcpop_m_b16_m

#define vcpop_m_b16_m ( ... ) __riscv_vcpop_m_b16_m(__VA_ARGS__)

◆ vcpop_m_b1_m

#define vcpop_m_b1_m ( ... ) __riscv_vcpop_m_b1_m(__VA_ARGS__)

◆ vcpop_m_b2

#define vcpop_m_b2 ( ... ) __riscv_vcpop_m_b2(__VA_ARGS__)

◆ vcpop_m_b2_m

#define vcpop_m_b2_m ( ... ) __riscv_vcpop_m_b2_m(__VA_ARGS__)

◆ vcpop_m_b32

#define vcpop_m_b32 ( ... ) __riscv_vcpop_m_b32(__VA_ARGS__)

◆ vcpop_m_b32_m

#define vcpop_m_b32_m ( ... ) __riscv_vcpop_m_b32_m(__VA_ARGS__)

◆ vcpop_m_b4

#define vcpop_m_b4 ( ... ) __riscv_vcpop_m_b4(__VA_ARGS__)

◆ vcpop_m_b4_m

#define vcpop_m_b4_m ( ... ) __riscv_vcpop_m_b4_m(__VA_ARGS__)

◆ vcpop_m_b64

#define vcpop_m_b64 ( ... ) __riscv_vcpop_m_b64(__VA_ARGS__)

◆ vcpop_m_b64_m

#define vcpop_m_b64_m ( ... ) __riscv_vcpop_m_b64_m(__VA_ARGS__)

◆ vcpop_m_b8

#define vcpop_m_b8 ( ... ) __riscv_vcpop_m_b8(__VA_ARGS__)

◆ vcpop_m_b8_m

#define vcpop_m_b8_m ( ... ) __riscv_vcpop_m_b8_m(__VA_ARGS__)

◆ vdiv_vv_i16m1

#define vdiv_vv_i16m1 ( ... ) __riscv_vdiv_vv_i16m1(__VA_ARGS__)

◆ vdiv_vv_i16m1_m

#define vdiv_vv_i16m1_m ( ... ) __riscv_vdiv_vv_i16m1_tumu(__VA_ARGS__)

◆ vdiv_vv_i16m2

#define vdiv_vv_i16m2 ( ... ) __riscv_vdiv_vv_i16m2(__VA_ARGS__)

◆ vdiv_vv_i16m2_m

#define vdiv_vv_i16m2_m ( ... ) __riscv_vdiv_vv_i16m2_tumu(__VA_ARGS__)

◆ vdiv_vv_i16m4

#define vdiv_vv_i16m4 ( ... ) __riscv_vdiv_vv_i16m4(__VA_ARGS__)

◆ vdiv_vv_i16m4_m

#define vdiv_vv_i16m4_m ( ... ) __riscv_vdiv_vv_i16m4_tumu(__VA_ARGS__)

◆ vdiv_vv_i16m8

#define vdiv_vv_i16m8 ( ... ) __riscv_vdiv_vv_i16m8(__VA_ARGS__)

◆ vdiv_vv_i16m8_m

#define vdiv_vv_i16m8_m ( ... ) __riscv_vdiv_vv_i16m8_tumu(__VA_ARGS__)

◆ vdiv_vv_i16mf2

#define vdiv_vv_i16mf2 ( ... ) __riscv_vdiv_vv_i16mf2(__VA_ARGS__)

◆ vdiv_vv_i16mf2_m

#define vdiv_vv_i16mf2_m ( ... ) __riscv_vdiv_vv_i16mf2_tumu(__VA_ARGS__)

◆ vdiv_vv_i16mf4

#define vdiv_vv_i16mf4 ( ... ) __riscv_vdiv_vv_i16mf4(__VA_ARGS__)

◆ vdiv_vv_i16mf4_m

#define vdiv_vv_i16mf4_m ( ... ) __riscv_vdiv_vv_i16mf4_tumu(__VA_ARGS__)

◆ vdiv_vv_i32m1

#define vdiv_vv_i32m1 ( ... ) __riscv_vdiv_vv_i32m1(__VA_ARGS__)

◆ vdiv_vv_i32m1_m

#define vdiv_vv_i32m1_m ( ... ) __riscv_vdiv_vv_i32m1_tumu(__VA_ARGS__)

◆ vdiv_vv_i32m2

#define vdiv_vv_i32m2 ( ... ) __riscv_vdiv_vv_i32m2(__VA_ARGS__)

◆ vdiv_vv_i32m2_m

#define vdiv_vv_i32m2_m ( ... ) __riscv_vdiv_vv_i32m2_tumu(__VA_ARGS__)

◆ vdiv_vv_i32m4

#define vdiv_vv_i32m4 ( ... ) __riscv_vdiv_vv_i32m4(__VA_ARGS__)

◆ vdiv_vv_i32m4_m

#define vdiv_vv_i32m4_m ( ... ) __riscv_vdiv_vv_i32m4_tumu(__VA_ARGS__)

◆ vdiv_vv_i32m8

#define vdiv_vv_i32m8 ( ... ) __riscv_vdiv_vv_i32m8(__VA_ARGS__)

◆ vdiv_vv_i32m8_m

#define vdiv_vv_i32m8_m ( ... ) __riscv_vdiv_vv_i32m8_tumu(__VA_ARGS__)

◆ vdiv_vv_i32mf2

#define vdiv_vv_i32mf2 ( ... ) __riscv_vdiv_vv_i32mf2(__VA_ARGS__)

◆ vdiv_vv_i32mf2_m

#define vdiv_vv_i32mf2_m ( ... ) __riscv_vdiv_vv_i32mf2_tumu(__VA_ARGS__)

◆ vdiv_vv_i64m1

#define vdiv_vv_i64m1 ( ... ) __riscv_vdiv_vv_i64m1(__VA_ARGS__)

◆ vdiv_vv_i64m1_m

#define vdiv_vv_i64m1_m ( ... ) __riscv_vdiv_vv_i64m1_tumu(__VA_ARGS__)

◆ vdiv_vv_i64m2

#define vdiv_vv_i64m2 ( ... ) __riscv_vdiv_vv_i64m2(__VA_ARGS__)

◆ vdiv_vv_i64m2_m

#define vdiv_vv_i64m2_m ( ... ) __riscv_vdiv_vv_i64m2_tumu(__VA_ARGS__)

◆ vdiv_vv_i64m4

#define vdiv_vv_i64m4 ( ... ) __riscv_vdiv_vv_i64m4(__VA_ARGS__)

◆ vdiv_vv_i64m4_m

#define vdiv_vv_i64m4_m ( ... ) __riscv_vdiv_vv_i64m4_tumu(__VA_ARGS__)

◆ vdiv_vv_i64m8

#define vdiv_vv_i64m8 ( ... ) __riscv_vdiv_vv_i64m8(__VA_ARGS__)

◆ vdiv_vv_i64m8_m

#define vdiv_vv_i64m8_m ( ... ) __riscv_vdiv_vv_i64m8_tumu(__VA_ARGS__)

◆ vdiv_vv_i8m1

#define vdiv_vv_i8m1 ( ... ) __riscv_vdiv_vv_i8m1(__VA_ARGS__)

◆ vdiv_vv_i8m1_m

#define vdiv_vv_i8m1_m ( ... ) __riscv_vdiv_vv_i8m1_tumu(__VA_ARGS__)

◆ vdiv_vv_i8m2

#define vdiv_vv_i8m2 ( ... ) __riscv_vdiv_vv_i8m2(__VA_ARGS__)

◆ vdiv_vv_i8m2_m

#define vdiv_vv_i8m2_m ( ... ) __riscv_vdiv_vv_i8m2_tumu(__VA_ARGS__)

◆ vdiv_vv_i8m4

#define vdiv_vv_i8m4 ( ... ) __riscv_vdiv_vv_i8m4(__VA_ARGS__)

◆ vdiv_vv_i8m4_m

#define vdiv_vv_i8m4_m ( ... ) __riscv_vdiv_vv_i8m4_tumu(__VA_ARGS__)

◆ vdiv_vv_i8m8

#define vdiv_vv_i8m8 ( ... ) __riscv_vdiv_vv_i8m8(__VA_ARGS__)

◆ vdiv_vv_i8m8_m

#define vdiv_vv_i8m8_m ( ... ) __riscv_vdiv_vv_i8m8_tumu(__VA_ARGS__)

◆ vdiv_vv_i8mf2

#define vdiv_vv_i8mf2 ( ... ) __riscv_vdiv_vv_i8mf2(__VA_ARGS__)

◆ vdiv_vv_i8mf2_m

#define vdiv_vv_i8mf2_m ( ... ) __riscv_vdiv_vv_i8mf2_tumu(__VA_ARGS__)

◆ vdiv_vv_i8mf4

#define vdiv_vv_i8mf4 ( ... ) __riscv_vdiv_vv_i8mf4(__VA_ARGS__)

◆ vdiv_vv_i8mf4_m

#define vdiv_vv_i8mf4_m ( ... ) __riscv_vdiv_vv_i8mf4_tumu(__VA_ARGS__)

◆ vdiv_vv_i8mf8

#define vdiv_vv_i8mf8 ( ... ) __riscv_vdiv_vv_i8mf8(__VA_ARGS__)

◆ vdiv_vv_i8mf8_m

#define vdiv_vv_i8mf8_m ( ... ) __riscv_vdiv_vv_i8mf8_tumu(__VA_ARGS__)

◆ vdiv_vx_i16m1

#define vdiv_vx_i16m1 ( ... ) __riscv_vdiv_vx_i16m1(__VA_ARGS__)

◆ vdiv_vx_i16m1_m

#define vdiv_vx_i16m1_m ( ... ) __riscv_vdiv_vx_i16m1_tumu(__VA_ARGS__)

◆ vdiv_vx_i16m2

#define vdiv_vx_i16m2 ( ... ) __riscv_vdiv_vx_i16m2(__VA_ARGS__)

◆ vdiv_vx_i16m2_m

#define vdiv_vx_i16m2_m ( ... ) __riscv_vdiv_vx_i16m2_tumu(__VA_ARGS__)

◆ vdiv_vx_i16m4

#define vdiv_vx_i16m4 ( ... ) __riscv_vdiv_vx_i16m4(__VA_ARGS__)

◆ vdiv_vx_i16m4_m

#define vdiv_vx_i16m4_m ( ... ) __riscv_vdiv_vx_i16m4_tumu(__VA_ARGS__)

◆ vdiv_vx_i16m8

#define vdiv_vx_i16m8 ( ... ) __riscv_vdiv_vx_i16m8(__VA_ARGS__)

◆ vdiv_vx_i16m8_m

#define vdiv_vx_i16m8_m ( ... ) __riscv_vdiv_vx_i16m8_tumu(__VA_ARGS__)

◆ vdiv_vx_i16mf2

#define vdiv_vx_i16mf2 ( ... ) __riscv_vdiv_vx_i16mf2(__VA_ARGS__)

◆ vdiv_vx_i16mf2_m

#define vdiv_vx_i16mf2_m ( ... ) __riscv_vdiv_vx_i16mf2_tumu(__VA_ARGS__)

◆ vdiv_vx_i16mf4

#define vdiv_vx_i16mf4 ( ... ) __riscv_vdiv_vx_i16mf4(__VA_ARGS__)

◆ vdiv_vx_i16mf4_m

#define vdiv_vx_i16mf4_m ( ... ) __riscv_vdiv_vx_i16mf4_tumu(__VA_ARGS__)

◆ vdiv_vx_i32m1

#define vdiv_vx_i32m1 ( ... ) __riscv_vdiv_vx_i32m1(__VA_ARGS__)

◆ vdiv_vx_i32m1_m

#define vdiv_vx_i32m1_m ( ... ) __riscv_vdiv_vx_i32m1_tumu(__VA_ARGS__)

◆ vdiv_vx_i32m2

#define vdiv_vx_i32m2 ( ... ) __riscv_vdiv_vx_i32m2(__VA_ARGS__)

◆ vdiv_vx_i32m2_m

#define vdiv_vx_i32m2_m ( ... ) __riscv_vdiv_vx_i32m2_tumu(__VA_ARGS__)

◆ vdiv_vx_i32m4

#define vdiv_vx_i32m4 ( ... ) __riscv_vdiv_vx_i32m4(__VA_ARGS__)

◆ vdiv_vx_i32m4_m

#define vdiv_vx_i32m4_m ( ... ) __riscv_vdiv_vx_i32m4_tumu(__VA_ARGS__)

◆ vdiv_vx_i32m8

#define vdiv_vx_i32m8 ( ... ) __riscv_vdiv_vx_i32m8(__VA_ARGS__)

◆ vdiv_vx_i32m8_m

#define vdiv_vx_i32m8_m ( ... ) __riscv_vdiv_vx_i32m8_tumu(__VA_ARGS__)

◆ vdiv_vx_i32mf2

#define vdiv_vx_i32mf2 ( ... ) __riscv_vdiv_vx_i32mf2(__VA_ARGS__)

◆ vdiv_vx_i32mf2_m

#define vdiv_vx_i32mf2_m ( ... ) __riscv_vdiv_vx_i32mf2_tumu(__VA_ARGS__)

◆ vdiv_vx_i64m1

#define vdiv_vx_i64m1 ( ... ) __riscv_vdiv_vx_i64m1(__VA_ARGS__)

◆ vdiv_vx_i64m1_m

#define vdiv_vx_i64m1_m ( ... ) __riscv_vdiv_vx_i64m1_tumu(__VA_ARGS__)

◆ vdiv_vx_i64m2

#define vdiv_vx_i64m2 ( ... ) __riscv_vdiv_vx_i64m2(__VA_ARGS__)

◆ vdiv_vx_i64m2_m

#define vdiv_vx_i64m2_m ( ... ) __riscv_vdiv_vx_i64m2_tumu(__VA_ARGS__)

◆ vdiv_vx_i64m4

#define vdiv_vx_i64m4 ( ... ) __riscv_vdiv_vx_i64m4(__VA_ARGS__)

◆ vdiv_vx_i64m4_m

#define vdiv_vx_i64m4_m ( ... ) __riscv_vdiv_vx_i64m4_tumu(__VA_ARGS__)

◆ vdiv_vx_i64m8

#define vdiv_vx_i64m8 ( ... ) __riscv_vdiv_vx_i64m8(__VA_ARGS__)

◆ vdiv_vx_i64m8_m

#define vdiv_vx_i64m8_m ( ... ) __riscv_vdiv_vx_i64m8_tumu(__VA_ARGS__)

◆ vdiv_vx_i8m1

#define vdiv_vx_i8m1 ( ... ) __riscv_vdiv_vx_i8m1(__VA_ARGS__)

◆ vdiv_vx_i8m1_m

#define vdiv_vx_i8m1_m ( ... ) __riscv_vdiv_vx_i8m1_tumu(__VA_ARGS__)

◆ vdiv_vx_i8m2

#define vdiv_vx_i8m2 ( ... ) __riscv_vdiv_vx_i8m2(__VA_ARGS__)

◆ vdiv_vx_i8m2_m

#define vdiv_vx_i8m2_m ( ... ) __riscv_vdiv_vx_i8m2_tumu(__VA_ARGS__)

◆ vdiv_vx_i8m4

#define vdiv_vx_i8m4 ( ... ) __riscv_vdiv_vx_i8m4(__VA_ARGS__)

◆ vdiv_vx_i8m4_m

#define vdiv_vx_i8m4_m ( ... ) __riscv_vdiv_vx_i8m4_tumu(__VA_ARGS__)

◆ vdiv_vx_i8m8

#define vdiv_vx_i8m8 ( ... ) __riscv_vdiv_vx_i8m8(__VA_ARGS__)

◆ vdiv_vx_i8m8_m

#define vdiv_vx_i8m8_m ( ... ) __riscv_vdiv_vx_i8m8_tumu(__VA_ARGS__)

◆ vdiv_vx_i8mf2

#define vdiv_vx_i8mf2 ( ... ) __riscv_vdiv_vx_i8mf2(__VA_ARGS__)

◆ vdiv_vx_i8mf2_m

#define vdiv_vx_i8mf2_m ( ... ) __riscv_vdiv_vx_i8mf2_tumu(__VA_ARGS__)

◆ vdiv_vx_i8mf4

#define vdiv_vx_i8mf4 ( ... ) __riscv_vdiv_vx_i8mf4(__VA_ARGS__)

◆ vdiv_vx_i8mf4_m

#define vdiv_vx_i8mf4_m ( ... ) __riscv_vdiv_vx_i8mf4_tumu(__VA_ARGS__)

◆ vdiv_vx_i8mf8

#define vdiv_vx_i8mf8 ( ... ) __riscv_vdiv_vx_i8mf8(__VA_ARGS__)

◆ vdiv_vx_i8mf8_m

#define vdiv_vx_i8mf8_m ( ... ) __riscv_vdiv_vx_i8mf8_tumu(__VA_ARGS__)

◆ vdivu_vv_u16m1

#define vdivu_vv_u16m1 ( ... ) __riscv_vdivu_vv_u16m1(__VA_ARGS__)

◆ vdivu_vv_u16m1_m

#define vdivu_vv_u16m1_m ( ... ) __riscv_vdivu_vv_u16m1_tumu(__VA_ARGS__)

◆ vdivu_vv_u16m2

#define vdivu_vv_u16m2 ( ... ) __riscv_vdivu_vv_u16m2(__VA_ARGS__)

◆ vdivu_vv_u16m2_m

#define vdivu_vv_u16m2_m ( ... ) __riscv_vdivu_vv_u16m2_tumu(__VA_ARGS__)

◆ vdivu_vv_u16m4

#define vdivu_vv_u16m4 ( ... ) __riscv_vdivu_vv_u16m4(__VA_ARGS__)

◆ vdivu_vv_u16m4_m

#define vdivu_vv_u16m4_m ( ... ) __riscv_vdivu_vv_u16m4_tumu(__VA_ARGS__)

◆ vdivu_vv_u16m8

#define vdivu_vv_u16m8 ( ... ) __riscv_vdivu_vv_u16m8(__VA_ARGS__)

◆ vdivu_vv_u16m8_m

#define vdivu_vv_u16m8_m ( ... ) __riscv_vdivu_vv_u16m8_tumu(__VA_ARGS__)

◆ vdivu_vv_u16mf2

#define vdivu_vv_u16mf2 ( ... ) __riscv_vdivu_vv_u16mf2(__VA_ARGS__)

◆ vdivu_vv_u16mf2_m

#define vdivu_vv_u16mf2_m ( ... ) __riscv_vdivu_vv_u16mf2_tumu(__VA_ARGS__)

◆ vdivu_vv_u16mf4

#define vdivu_vv_u16mf4 ( ... ) __riscv_vdivu_vv_u16mf4(__VA_ARGS__)

◆ vdivu_vv_u16mf4_m

#define vdivu_vv_u16mf4_m ( ... ) __riscv_vdivu_vv_u16mf4_tumu(__VA_ARGS__)

◆ vdivu_vv_u32m1

#define vdivu_vv_u32m1 ( ... ) __riscv_vdivu_vv_u32m1(__VA_ARGS__)

◆ vdivu_vv_u32m1_m

#define vdivu_vv_u32m1_m ( ... ) __riscv_vdivu_vv_u32m1_tumu(__VA_ARGS__)

◆ vdivu_vv_u32m2

#define vdivu_vv_u32m2 ( ... ) __riscv_vdivu_vv_u32m2(__VA_ARGS__)

◆ vdivu_vv_u32m2_m

#define vdivu_vv_u32m2_m ( ... ) __riscv_vdivu_vv_u32m2_tumu(__VA_ARGS__)

◆ vdivu_vv_u32m4

#define vdivu_vv_u32m4 ( ... ) __riscv_vdivu_vv_u32m4(__VA_ARGS__)

◆ vdivu_vv_u32m4_m

#define vdivu_vv_u32m4_m ( ... ) __riscv_vdivu_vv_u32m4_tumu(__VA_ARGS__)

◆ vdivu_vv_u32m8

#define vdivu_vv_u32m8 ( ... ) __riscv_vdivu_vv_u32m8(__VA_ARGS__)

◆ vdivu_vv_u32m8_m

#define vdivu_vv_u32m8_m ( ... ) __riscv_vdivu_vv_u32m8_tumu(__VA_ARGS__)

◆ vdivu_vv_u32mf2

#define vdivu_vv_u32mf2 ( ... ) __riscv_vdivu_vv_u32mf2(__VA_ARGS__)

◆ vdivu_vv_u32mf2_m

#define vdivu_vv_u32mf2_m ( ... ) __riscv_vdivu_vv_u32mf2_tumu(__VA_ARGS__)

◆ vdivu_vv_u64m1

#define vdivu_vv_u64m1 ( ... ) __riscv_vdivu_vv_u64m1(__VA_ARGS__)

◆ vdivu_vv_u64m1_m

#define vdivu_vv_u64m1_m ( ... ) __riscv_vdivu_vv_u64m1_tumu(__VA_ARGS__)

◆ vdivu_vv_u64m2

#define vdivu_vv_u64m2 ( ... ) __riscv_vdivu_vv_u64m2(__VA_ARGS__)

◆ vdivu_vv_u64m2_m

#define vdivu_vv_u64m2_m ( ... ) __riscv_vdivu_vv_u64m2_tumu(__VA_ARGS__)

◆ vdivu_vv_u64m4

#define vdivu_vv_u64m4 ( ... ) __riscv_vdivu_vv_u64m4(__VA_ARGS__)

◆ vdivu_vv_u64m4_m

#define vdivu_vv_u64m4_m ( ... ) __riscv_vdivu_vv_u64m4_tumu(__VA_ARGS__)

◆ vdivu_vv_u64m8

#define vdivu_vv_u64m8 ( ... ) __riscv_vdivu_vv_u64m8(__VA_ARGS__)

◆ vdivu_vv_u64m8_m

#define vdivu_vv_u64m8_m ( ... ) __riscv_vdivu_vv_u64m8_tumu(__VA_ARGS__)

◆ vdivu_vv_u8m1

#define vdivu_vv_u8m1 ( ... ) __riscv_vdivu_vv_u8m1(__VA_ARGS__)

◆ vdivu_vv_u8m1_m

#define vdivu_vv_u8m1_m ( ... ) __riscv_vdivu_vv_u8m1_tumu(__VA_ARGS__)

◆ vdivu_vv_u8m2

#define vdivu_vv_u8m2 ( ... ) __riscv_vdivu_vv_u8m2(__VA_ARGS__)

◆ vdivu_vv_u8m2_m

#define vdivu_vv_u8m2_m ( ... ) __riscv_vdivu_vv_u8m2_tumu(__VA_ARGS__)

◆ vdivu_vv_u8m4

#define vdivu_vv_u8m4 ( ... ) __riscv_vdivu_vv_u8m4(__VA_ARGS__)

◆ vdivu_vv_u8m4_m

#define vdivu_vv_u8m4_m ( ... ) __riscv_vdivu_vv_u8m4_tumu(__VA_ARGS__)

◆ vdivu_vv_u8m8

#define vdivu_vv_u8m8 ( ... ) __riscv_vdivu_vv_u8m8(__VA_ARGS__)

◆ vdivu_vv_u8m8_m

#define vdivu_vv_u8m8_m ( ... ) __riscv_vdivu_vv_u8m8_tumu(__VA_ARGS__)

◆ vdivu_vv_u8mf2

#define vdivu_vv_u8mf2 ( ... ) __riscv_vdivu_vv_u8mf2(__VA_ARGS__)

◆ vdivu_vv_u8mf2_m

#define vdivu_vv_u8mf2_m ( ... ) __riscv_vdivu_vv_u8mf2_tumu(__VA_ARGS__)

◆ vdivu_vv_u8mf4

#define vdivu_vv_u8mf4 ( ... ) __riscv_vdivu_vv_u8mf4(__VA_ARGS__)

◆ vdivu_vv_u8mf4_m

#define vdivu_vv_u8mf4_m ( ... ) __riscv_vdivu_vv_u8mf4_tumu(__VA_ARGS__)

◆ vdivu_vv_u8mf8

#define vdivu_vv_u8mf8 ( ... ) __riscv_vdivu_vv_u8mf8(__VA_ARGS__)

◆ vdivu_vv_u8mf8_m

#define vdivu_vv_u8mf8_m ( ... ) __riscv_vdivu_vv_u8mf8_tumu(__VA_ARGS__)

◆ vdivu_vx_u16m1

#define vdivu_vx_u16m1 ( ... ) __riscv_vdivu_vx_u16m1(__VA_ARGS__)

◆ vdivu_vx_u16m1_m

#define vdivu_vx_u16m1_m ( ... ) __riscv_vdivu_vx_u16m1_tumu(__VA_ARGS__)

◆ vdivu_vx_u16m2

#define vdivu_vx_u16m2 ( ... ) __riscv_vdivu_vx_u16m2(__VA_ARGS__)

◆ vdivu_vx_u16m2_m

#define vdivu_vx_u16m2_m ( ... ) __riscv_vdivu_vx_u16m2_tumu(__VA_ARGS__)

◆ vdivu_vx_u16m4

#define vdivu_vx_u16m4 ( ... ) __riscv_vdivu_vx_u16m4(__VA_ARGS__)

◆ vdivu_vx_u16m4_m

#define vdivu_vx_u16m4_m ( ... ) __riscv_vdivu_vx_u16m4_tumu(__VA_ARGS__)

◆ vdivu_vx_u16m8

#define vdivu_vx_u16m8 ( ... ) __riscv_vdivu_vx_u16m8(__VA_ARGS__)

◆ vdivu_vx_u16m8_m

#define vdivu_vx_u16m8_m ( ... ) __riscv_vdivu_vx_u16m8_tumu(__VA_ARGS__)

◆ vdivu_vx_u16mf2

#define vdivu_vx_u16mf2 ( ... ) __riscv_vdivu_vx_u16mf2(__VA_ARGS__)

◆ vdivu_vx_u16mf2_m

#define vdivu_vx_u16mf2_m ( ... ) __riscv_vdivu_vx_u16mf2_tumu(__VA_ARGS__)

◆ vdivu_vx_u16mf4

#define vdivu_vx_u16mf4 ( ... ) __riscv_vdivu_vx_u16mf4(__VA_ARGS__)

◆ vdivu_vx_u16mf4_m

#define vdivu_vx_u16mf4_m ( ... ) __riscv_vdivu_vx_u16mf4_tumu(__VA_ARGS__)

◆ vdivu_vx_u32m1

#define vdivu_vx_u32m1 ( ... ) __riscv_vdivu_vx_u32m1(__VA_ARGS__)

◆ vdivu_vx_u32m1_m

#define vdivu_vx_u32m1_m ( ... ) __riscv_vdivu_vx_u32m1_tumu(__VA_ARGS__)

◆ vdivu_vx_u32m2

#define vdivu_vx_u32m2 ( ... ) __riscv_vdivu_vx_u32m2(__VA_ARGS__)

◆ vdivu_vx_u32m2_m

#define vdivu_vx_u32m2_m ( ... ) __riscv_vdivu_vx_u32m2_tumu(__VA_ARGS__)

◆ vdivu_vx_u32m4

#define vdivu_vx_u32m4 ( ... ) __riscv_vdivu_vx_u32m4(__VA_ARGS__)

◆ vdivu_vx_u32m4_m

#define vdivu_vx_u32m4_m ( ... ) __riscv_vdivu_vx_u32m4_tumu(__VA_ARGS__)

◆ vdivu_vx_u32m8

#define vdivu_vx_u32m8 ( ... ) __riscv_vdivu_vx_u32m8(__VA_ARGS__)

◆ vdivu_vx_u32m8_m

#define vdivu_vx_u32m8_m ( ... ) __riscv_vdivu_vx_u32m8_tumu(__VA_ARGS__)

◆ vdivu_vx_u32mf2

#define vdivu_vx_u32mf2 ( ... ) __riscv_vdivu_vx_u32mf2(__VA_ARGS__)

◆ vdivu_vx_u32mf2_m

#define vdivu_vx_u32mf2_m ( ... ) __riscv_vdivu_vx_u32mf2_tumu(__VA_ARGS__)

◆ vdivu_vx_u64m1

#define vdivu_vx_u64m1 ( ... ) __riscv_vdivu_vx_u64m1(__VA_ARGS__)

◆ vdivu_vx_u64m1_m

#define vdivu_vx_u64m1_m ( ... ) __riscv_vdivu_vx_u64m1_tumu(__VA_ARGS__)

◆ vdivu_vx_u64m2

#define vdivu_vx_u64m2 ( ... ) __riscv_vdivu_vx_u64m2(__VA_ARGS__)

◆ vdivu_vx_u64m2_m

#define vdivu_vx_u64m2_m ( ... ) __riscv_vdivu_vx_u64m2_tumu(__VA_ARGS__)

◆ vdivu_vx_u64m4

#define vdivu_vx_u64m4 ( ... ) __riscv_vdivu_vx_u64m4(__VA_ARGS__)

◆ vdivu_vx_u64m4_m

#define vdivu_vx_u64m4_m ( ... ) __riscv_vdivu_vx_u64m4_tumu(__VA_ARGS__)

◆ vdivu_vx_u64m8

#define vdivu_vx_u64m8 ( ... ) __riscv_vdivu_vx_u64m8(__VA_ARGS__)

◆ vdivu_vx_u64m8_m

#define vdivu_vx_u64m8_m ( ... ) __riscv_vdivu_vx_u64m8_tumu(__VA_ARGS__)

◆ vdivu_vx_u8m1

#define vdivu_vx_u8m1 ( ... ) __riscv_vdivu_vx_u8m1(__VA_ARGS__)

◆ vdivu_vx_u8m1_m

#define vdivu_vx_u8m1_m ( ... ) __riscv_vdivu_vx_u8m1_tumu(__VA_ARGS__)

◆ vdivu_vx_u8m2

#define vdivu_vx_u8m2 ( ... ) __riscv_vdivu_vx_u8m2(__VA_ARGS__)

◆ vdivu_vx_u8m2_m

#define vdivu_vx_u8m2_m ( ... ) __riscv_vdivu_vx_u8m2_tumu(__VA_ARGS__)

◆ vdivu_vx_u8m4

#define vdivu_vx_u8m4 ( ... ) __riscv_vdivu_vx_u8m4(__VA_ARGS__)

◆ vdivu_vx_u8m4_m

#define vdivu_vx_u8m4_m ( ... ) __riscv_vdivu_vx_u8m4_tumu(__VA_ARGS__)

◆ vdivu_vx_u8m8

#define vdivu_vx_u8m8 ( ... ) __riscv_vdivu_vx_u8m8(__VA_ARGS__)

◆ vdivu_vx_u8m8_m

#define vdivu_vx_u8m8_m ( ... ) __riscv_vdivu_vx_u8m8_tumu(__VA_ARGS__)

◆ vdivu_vx_u8mf2

#define vdivu_vx_u8mf2 ( ... ) __riscv_vdivu_vx_u8mf2(__VA_ARGS__)

◆ vdivu_vx_u8mf2_m

#define vdivu_vx_u8mf2_m ( ... ) __riscv_vdivu_vx_u8mf2_tumu(__VA_ARGS__)

◆ vdivu_vx_u8mf4

#define vdivu_vx_u8mf4 ( ... ) __riscv_vdivu_vx_u8mf4(__VA_ARGS__)

◆ vdivu_vx_u8mf4_m

#define vdivu_vx_u8mf4_m ( ... ) __riscv_vdivu_vx_u8mf4_tumu(__VA_ARGS__)

◆ vdivu_vx_u8mf8

#define vdivu_vx_u8mf8 ( ... ) __riscv_vdivu_vx_u8mf8(__VA_ARGS__)

◆ vdivu_vx_u8mf8_m

#define vdivu_vx_u8mf8_m ( ... ) __riscv_vdivu_vx_u8mf8_tumu(__VA_ARGS__)

◆ vfabs_v_f16m1

#define vfabs_v_f16m1 ( ... ) __riscv_vfabs_v_f16m1(__VA_ARGS__)

◆ vfabs_v_f16m1_m

#define vfabs_v_f16m1_m ( ... ) __riscv_vfabs_v_f16m1_tumu(__VA_ARGS__)

◆ vfabs_v_f16m2

#define vfabs_v_f16m2 ( ... ) __riscv_vfabs_v_f16m2(__VA_ARGS__)

◆ vfabs_v_f16m2_m

#define vfabs_v_f16m2_m ( ... ) __riscv_vfabs_v_f16m2_tumu(__VA_ARGS__)

◆ vfabs_v_f16m4

#define vfabs_v_f16m4 ( ... ) __riscv_vfabs_v_f16m4(__VA_ARGS__)

◆ vfabs_v_f16m4_m

#define vfabs_v_f16m4_m ( ... ) __riscv_vfabs_v_f16m4_tumu(__VA_ARGS__)

◆ vfabs_v_f16m8

#define vfabs_v_f16m8 ( ... ) __riscv_vfabs_v_f16m8(__VA_ARGS__)

◆ vfabs_v_f16m8_m

#define vfabs_v_f16m8_m ( ... ) __riscv_vfabs_v_f16m8_tumu(__VA_ARGS__)

◆ vfabs_v_f16mf2

#define vfabs_v_f16mf2 ( ... ) __riscv_vfabs_v_f16mf2(__VA_ARGS__)

◆ vfabs_v_f16mf2_m

#define vfabs_v_f16mf2_m ( ... ) __riscv_vfabs_v_f16mf2_tumu(__VA_ARGS__)

◆ vfabs_v_f16mf4

#define vfabs_v_f16mf4 ( ... ) __riscv_vfabs_v_f16mf4(__VA_ARGS__)

◆ vfabs_v_f16mf4_m

#define vfabs_v_f16mf4_m ( ... ) __riscv_vfabs_v_f16mf4_tumu(__VA_ARGS__)

◆ vfabs_v_f32m1

#define vfabs_v_f32m1 ( ... ) __riscv_vfabs_v_f32m1(__VA_ARGS__)

◆ vfabs_v_f32m1_m

#define vfabs_v_f32m1_m ( ... ) __riscv_vfabs_v_f32m1_tumu(__VA_ARGS__)

◆ vfabs_v_f32m2

#define vfabs_v_f32m2 ( ... ) __riscv_vfabs_v_f32m2(__VA_ARGS__)

◆ vfabs_v_f32m2_m

#define vfabs_v_f32m2_m ( ... ) __riscv_vfabs_v_f32m2_tumu(__VA_ARGS__)

◆ vfabs_v_f32m4

#define vfabs_v_f32m4 ( ... ) __riscv_vfabs_v_f32m4(__VA_ARGS__)

◆ vfabs_v_f32m4_m

#define vfabs_v_f32m4_m ( ... ) __riscv_vfabs_v_f32m4_tumu(__VA_ARGS__)

◆ vfabs_v_f32m8

#define vfabs_v_f32m8 ( ... ) __riscv_vfabs_v_f32m8(__VA_ARGS__)

◆ vfabs_v_f32m8_m

#define vfabs_v_f32m8_m ( ... ) __riscv_vfabs_v_f32m8_tumu(__VA_ARGS__)

◆ vfabs_v_f32mf2

#define vfabs_v_f32mf2 ( ... ) __riscv_vfabs_v_f32mf2(__VA_ARGS__)

◆ vfabs_v_f32mf2_m

#define vfabs_v_f32mf2_m ( ... ) __riscv_vfabs_v_f32mf2_tumu(__VA_ARGS__)

◆ vfabs_v_f64m1

#define vfabs_v_f64m1 ( ... ) __riscv_vfabs_v_f64m1(__VA_ARGS__)

◆ vfabs_v_f64m1_m

#define vfabs_v_f64m1_m ( ... ) __riscv_vfabs_v_f64m1_tumu(__VA_ARGS__)

◆ vfabs_v_f64m2

#define vfabs_v_f64m2 ( ... ) __riscv_vfabs_v_f64m2(__VA_ARGS__)

◆ vfabs_v_f64m2_m

#define vfabs_v_f64m2_m ( ... ) __riscv_vfabs_v_f64m2_tumu(__VA_ARGS__)

◆ vfabs_v_f64m4

#define vfabs_v_f64m4 ( ... ) __riscv_vfabs_v_f64m4(__VA_ARGS__)

◆ vfabs_v_f64m4_m

#define vfabs_v_f64m4_m ( ... ) __riscv_vfabs_v_f64m4_tumu(__VA_ARGS__)

◆ vfabs_v_f64m8

#define vfabs_v_f64m8 ( ... ) __riscv_vfabs_v_f64m8(__VA_ARGS__)

◆ vfabs_v_f64m8_m

#define vfabs_v_f64m8_m ( ... ) __riscv_vfabs_v_f64m8_tumu(__VA_ARGS__)

◆ vfadd_vf_f16m1

#define vfadd_vf_f16m1 ( ... ) __riscv_vfadd_vf_f16m1(__VA_ARGS__)

◆ vfadd_vf_f16m1_m

#define vfadd_vf_f16m1_m ( ... ) __riscv_vfadd_vf_f16m1_tumu(__VA_ARGS__)

◆ vfadd_vf_f16m2

#define vfadd_vf_f16m2 ( ... ) __riscv_vfadd_vf_f16m2(__VA_ARGS__)

◆ vfadd_vf_f16m2_m

#define vfadd_vf_f16m2_m ( ... ) __riscv_vfadd_vf_f16m2_tumu(__VA_ARGS__)

◆ vfadd_vf_f16m4

#define vfadd_vf_f16m4 ( ... ) __riscv_vfadd_vf_f16m4(__VA_ARGS__)

◆ vfadd_vf_f16m4_m

#define vfadd_vf_f16m4_m ( ... ) __riscv_vfadd_vf_f16m4_tumu(__VA_ARGS__)

◆ vfadd_vf_f16m8

#define vfadd_vf_f16m8 ( ... ) __riscv_vfadd_vf_f16m8(__VA_ARGS__)

◆ vfadd_vf_f16m8_m

#define vfadd_vf_f16m8_m ( ... ) __riscv_vfadd_vf_f16m8_tumu(__VA_ARGS__)

◆ vfadd_vf_f16mf2

#define vfadd_vf_f16mf2 ( ... ) __riscv_vfadd_vf_f16mf2(__VA_ARGS__)

◆ vfadd_vf_f16mf2_m

#define vfadd_vf_f16mf2_m ( ... ) __riscv_vfadd_vf_f16mf2_tumu(__VA_ARGS__)

◆ vfadd_vf_f16mf4

#define vfadd_vf_f16mf4 ( ... ) __riscv_vfadd_vf_f16mf4(__VA_ARGS__)

◆ vfadd_vf_f16mf4_m

#define vfadd_vf_f16mf4_m ( ... ) __riscv_vfadd_vf_f16mf4_tumu(__VA_ARGS__)

◆ vfadd_vf_f32m1

#define vfadd_vf_f32m1 ( ... ) __riscv_vfadd_vf_f32m1(__VA_ARGS__)

◆ vfadd_vf_f32m1_m

#define vfadd_vf_f32m1_m ( ... ) __riscv_vfadd_vf_f32m1_tumu(__VA_ARGS__)

◆ vfadd_vf_f32m2

#define vfadd_vf_f32m2 ( ... ) __riscv_vfadd_vf_f32m2(__VA_ARGS__)

◆ vfadd_vf_f32m2_m

#define vfadd_vf_f32m2_m ( ... ) __riscv_vfadd_vf_f32m2_tumu(__VA_ARGS__)

◆ vfadd_vf_f32m4

#define vfadd_vf_f32m4 ( ... ) __riscv_vfadd_vf_f32m4(__VA_ARGS__)

◆ vfadd_vf_f32m4_m

#define vfadd_vf_f32m4_m ( ... ) __riscv_vfadd_vf_f32m4_tumu(__VA_ARGS__)

◆ vfadd_vf_f32m8

#define vfadd_vf_f32m8 ( ... ) __riscv_vfadd_vf_f32m8(__VA_ARGS__)

◆ vfadd_vf_f32m8_m

#define vfadd_vf_f32m8_m ( ... ) __riscv_vfadd_vf_f32m8_tumu(__VA_ARGS__)

◆ vfadd_vf_f32mf2

#define vfadd_vf_f32mf2 ( ... ) __riscv_vfadd_vf_f32mf2(__VA_ARGS__)

◆ vfadd_vf_f32mf2_m

#define vfadd_vf_f32mf2_m ( ... ) __riscv_vfadd_vf_f32mf2_tumu(__VA_ARGS__)

◆ vfadd_vf_f64m1

#define vfadd_vf_f64m1 ( ... ) __riscv_vfadd_vf_f64m1(__VA_ARGS__)

◆ vfadd_vf_f64m1_m

#define vfadd_vf_f64m1_m ( ... ) __riscv_vfadd_vf_f64m1_tumu(__VA_ARGS__)

◆ vfadd_vf_f64m2

#define vfadd_vf_f64m2 ( ... ) __riscv_vfadd_vf_f64m2(__VA_ARGS__)

◆ vfadd_vf_f64m2_m

#define vfadd_vf_f64m2_m ( ... ) __riscv_vfadd_vf_f64m2_tumu(__VA_ARGS__)

◆ vfadd_vf_f64m4

#define vfadd_vf_f64m4 ( ... ) __riscv_vfadd_vf_f64m4(__VA_ARGS__)

◆ vfadd_vf_f64m4_m

#define vfadd_vf_f64m4_m ( ... ) __riscv_vfadd_vf_f64m4_tumu(__VA_ARGS__)

◆ vfadd_vf_f64m8

#define vfadd_vf_f64m8 ( ... ) __riscv_vfadd_vf_f64m8(__VA_ARGS__)

◆ vfadd_vf_f64m8_m

#define vfadd_vf_f64m8_m ( ... ) __riscv_vfadd_vf_f64m8_tumu(__VA_ARGS__)

◆ vfadd_vv_f16m1

#define vfadd_vv_f16m1 ( ... ) __riscv_vfadd_vv_f16m1(__VA_ARGS__)

◆ vfadd_vv_f16m1_m

#define vfadd_vv_f16m1_m ( ... ) __riscv_vfadd_vv_f16m1_tumu(__VA_ARGS__)

◆ vfadd_vv_f16m2

#define vfadd_vv_f16m2 ( ... ) __riscv_vfadd_vv_f16m2(__VA_ARGS__)

◆ vfadd_vv_f16m2_m

#define vfadd_vv_f16m2_m ( ... ) __riscv_vfadd_vv_f16m2_tumu(__VA_ARGS__)

◆ vfadd_vv_f16m4

#define vfadd_vv_f16m4 ( ... ) __riscv_vfadd_vv_f16m4(__VA_ARGS__)

◆ vfadd_vv_f16m4_m

#define vfadd_vv_f16m4_m ( ... ) __riscv_vfadd_vv_f16m4_tumu(__VA_ARGS__)

◆ vfadd_vv_f16m8

#define vfadd_vv_f16m8 ( ... ) __riscv_vfadd_vv_f16m8(__VA_ARGS__)

◆ vfadd_vv_f16m8_m

#define vfadd_vv_f16m8_m ( ... ) __riscv_vfadd_vv_f16m8_tumu(__VA_ARGS__)

◆ vfadd_vv_f16mf2

#define vfadd_vv_f16mf2 ( ... ) __riscv_vfadd_vv_f16mf2(__VA_ARGS__)

◆ vfadd_vv_f16mf2_m

#define vfadd_vv_f16mf2_m ( ... ) __riscv_vfadd_vv_f16mf2_tumu(__VA_ARGS__)

◆ vfadd_vv_f16mf4

#define vfadd_vv_f16mf4 ( ... ) __riscv_vfadd_vv_f16mf4(__VA_ARGS__)

◆ vfadd_vv_f16mf4_m

#define vfadd_vv_f16mf4_m ( ... ) __riscv_vfadd_vv_f16mf4_tumu(__VA_ARGS__)

◆ vfadd_vv_f32m1

#define vfadd_vv_f32m1 ( ... ) __riscv_vfadd_vv_f32m1(__VA_ARGS__)

◆ vfadd_vv_f32m1_m

#define vfadd_vv_f32m1_m ( ... ) __riscv_vfadd_vv_f32m1_tumu(__VA_ARGS__)

◆ vfadd_vv_f32m2

#define vfadd_vv_f32m2 ( ... ) __riscv_vfadd_vv_f32m2(__VA_ARGS__)

◆ vfadd_vv_f32m2_m

#define vfadd_vv_f32m2_m ( ... ) __riscv_vfadd_vv_f32m2_tumu(__VA_ARGS__)

◆ vfadd_vv_f32m4

#define vfadd_vv_f32m4 ( ... ) __riscv_vfadd_vv_f32m4(__VA_ARGS__)

◆ vfadd_vv_f32m4_m

#define vfadd_vv_f32m4_m ( ... ) __riscv_vfadd_vv_f32m4_tumu(__VA_ARGS__)

◆ vfadd_vv_f32m8

#define vfadd_vv_f32m8 ( ... ) __riscv_vfadd_vv_f32m8(__VA_ARGS__)

◆ vfadd_vv_f32m8_m

#define vfadd_vv_f32m8_m ( ... ) __riscv_vfadd_vv_f32m8_tumu(__VA_ARGS__)

◆ vfadd_vv_f32mf2

#define vfadd_vv_f32mf2 ( ... ) __riscv_vfadd_vv_f32mf2(__VA_ARGS__)

◆ vfadd_vv_f32mf2_m

#define vfadd_vv_f32mf2_m ( ... ) __riscv_vfadd_vv_f32mf2_tumu(__VA_ARGS__)

◆ vfadd_vv_f64m1

#define vfadd_vv_f64m1 ( ... ) __riscv_vfadd_vv_f64m1(__VA_ARGS__)

◆ vfadd_vv_f64m1_m

#define vfadd_vv_f64m1_m ( ... ) __riscv_vfadd_vv_f64m1_tumu(__VA_ARGS__)

◆ vfadd_vv_f64m2

#define vfadd_vv_f64m2 ( ... ) __riscv_vfadd_vv_f64m2(__VA_ARGS__)

◆ vfadd_vv_f64m2_m

#define vfadd_vv_f64m2_m ( ... ) __riscv_vfadd_vv_f64m2_tumu(__VA_ARGS__)

◆ vfadd_vv_f64m4

#define vfadd_vv_f64m4 ( ... ) __riscv_vfadd_vv_f64m4(__VA_ARGS__)

◆ vfadd_vv_f64m4_m

#define vfadd_vv_f64m4_m ( ... ) __riscv_vfadd_vv_f64m4_tumu(__VA_ARGS__)

◆ vfadd_vv_f64m8

#define vfadd_vv_f64m8 ( ... ) __riscv_vfadd_vv_f64m8(__VA_ARGS__)

◆ vfadd_vv_f64m8_m

#define vfadd_vv_f64m8_m ( ... ) __riscv_vfadd_vv_f64m8_tumu(__VA_ARGS__)

◆ vfclass_v_u16m1

#define vfclass_v_u16m1 ( ... ) __riscv_vfclass_v_u16m1(__VA_ARGS__)

◆ vfclass_v_u16m1_m

#define vfclass_v_u16m1_m ( ... ) __riscv_vfclass_v_u16m1_tumu(__VA_ARGS__)

◆ vfclass_v_u16m2

#define vfclass_v_u16m2 ( ... ) __riscv_vfclass_v_u16m2(__VA_ARGS__)

◆ vfclass_v_u16m2_m

#define vfclass_v_u16m2_m ( ... ) __riscv_vfclass_v_u16m2_tumu(__VA_ARGS__)

◆ vfclass_v_u16m4

#define vfclass_v_u16m4 ( ... ) __riscv_vfclass_v_u16m4(__VA_ARGS__)

◆ vfclass_v_u16m4_m

#define vfclass_v_u16m4_m ( ... ) __riscv_vfclass_v_u16m4_tumu(__VA_ARGS__)

◆ vfclass_v_u16m8

#define vfclass_v_u16m8 ( ... ) __riscv_vfclass_v_u16m8(__VA_ARGS__)

◆ vfclass_v_u16m8_m

#define vfclass_v_u16m8_m ( ... ) __riscv_vfclass_v_u16m8_tumu(__VA_ARGS__)

◆ vfclass_v_u16mf2

#define vfclass_v_u16mf2 ( ... ) __riscv_vfclass_v_u16mf2(__VA_ARGS__)

◆ vfclass_v_u16mf2_m

#define vfclass_v_u16mf2_m ( ... ) __riscv_vfclass_v_u16mf2_tumu(__VA_ARGS__)

◆ vfclass_v_u16mf4

#define vfclass_v_u16mf4 ( ... ) __riscv_vfclass_v_u16mf4(__VA_ARGS__)

◆ vfclass_v_u16mf4_m

#define vfclass_v_u16mf4_m ( ... ) __riscv_vfclass_v_u16mf4_tumu(__VA_ARGS__)

◆ vfclass_v_u32m1

#define vfclass_v_u32m1 ( ... ) __riscv_vfclass_v_u32m1(__VA_ARGS__)

◆ vfclass_v_u32m1_m

#define vfclass_v_u32m1_m ( ... ) __riscv_vfclass_v_u32m1_tumu(__VA_ARGS__)

◆ vfclass_v_u32m2

#define vfclass_v_u32m2 ( ... ) __riscv_vfclass_v_u32m2(__VA_ARGS__)

◆ vfclass_v_u32m2_m

#define vfclass_v_u32m2_m ( ... ) __riscv_vfclass_v_u32m2_tumu(__VA_ARGS__)

◆ vfclass_v_u32m4

#define vfclass_v_u32m4 ( ... ) __riscv_vfclass_v_u32m4(__VA_ARGS__)

◆ vfclass_v_u32m4_m

#define vfclass_v_u32m4_m ( ... ) __riscv_vfclass_v_u32m4_tumu(__VA_ARGS__)

◆ vfclass_v_u32m8

#define vfclass_v_u32m8 ( ... ) __riscv_vfclass_v_u32m8(__VA_ARGS__)

◆ vfclass_v_u32m8_m

#define vfclass_v_u32m8_m ( ... ) __riscv_vfclass_v_u32m8_tumu(__VA_ARGS__)

◆ vfclass_v_u32mf2

#define vfclass_v_u32mf2 ( ... ) __riscv_vfclass_v_u32mf2(__VA_ARGS__)

◆ vfclass_v_u32mf2_m

#define vfclass_v_u32mf2_m ( ... ) __riscv_vfclass_v_u32mf2_tumu(__VA_ARGS__)

◆ vfclass_v_u64m1

#define vfclass_v_u64m1 ( ... ) __riscv_vfclass_v_u64m1(__VA_ARGS__)

◆ vfclass_v_u64m1_m

#define vfclass_v_u64m1_m ( ... ) __riscv_vfclass_v_u64m1_tumu(__VA_ARGS__)

◆ vfclass_v_u64m2

#define vfclass_v_u64m2 ( ... ) __riscv_vfclass_v_u64m2(__VA_ARGS__)

◆ vfclass_v_u64m2_m

#define vfclass_v_u64m2_m ( ... ) __riscv_vfclass_v_u64m2_tumu(__VA_ARGS__)

◆ vfclass_v_u64m4

#define vfclass_v_u64m4 ( ... ) __riscv_vfclass_v_u64m4(__VA_ARGS__)

◆ vfclass_v_u64m4_m

#define vfclass_v_u64m4_m ( ... ) __riscv_vfclass_v_u64m4_tumu(__VA_ARGS__)

◆ vfclass_v_u64m8

#define vfclass_v_u64m8 ( ... ) __riscv_vfclass_v_u64m8(__VA_ARGS__)

◆ vfclass_v_u64m8_m

#define vfclass_v_u64m8_m ( ... ) __riscv_vfclass_v_u64m8_tumu(__VA_ARGS__)

◆ vfcvt_f_x_v_f16m1

#define vfcvt_f_x_v_f16m1 ( ... ) __riscv_vfcvt_f_x_v_f16m1(__VA_ARGS__)

◆ vfcvt_f_x_v_f16m1_m

#define vfcvt_f_x_v_f16m1_m ( ... ) __riscv_vfcvt_f_x_v_f16m1_tumu(__VA_ARGS__)

◆ vfcvt_f_x_v_f16m2

#define vfcvt_f_x_v_f16m2 ( ... ) __riscv_vfcvt_f_x_v_f16m2(__VA_ARGS__)

◆ vfcvt_f_x_v_f16m2_m

#define vfcvt_f_x_v_f16m2_m ( ... ) __riscv_vfcvt_f_x_v_f16m2_tumu(__VA_ARGS__)

◆ vfcvt_f_x_v_f16m4

#define vfcvt_f_x_v_f16m4 ( ... ) __riscv_vfcvt_f_x_v_f16m4(__VA_ARGS__)

◆ vfcvt_f_x_v_f16m4_m

#define vfcvt_f_x_v_f16m4_m ( ... ) __riscv_vfcvt_f_x_v_f16m4_tumu(__VA_ARGS__)

◆ vfcvt_f_x_v_f16m8

#define vfcvt_f_x_v_f16m8 ( ... ) __riscv_vfcvt_f_x_v_f16m8(__VA_ARGS__)

◆ vfcvt_f_x_v_f16m8_m

#define vfcvt_f_x_v_f16m8_m ( ... ) __riscv_vfcvt_f_x_v_f16m8_tumu(__VA_ARGS__)

◆ vfcvt_f_x_v_f16mf2

#define vfcvt_f_x_v_f16mf2 ( ... ) __riscv_vfcvt_f_x_v_f16mf2(__VA_ARGS__)

◆ vfcvt_f_x_v_f16mf2_m

#define vfcvt_f_x_v_f16mf2_m ( ... ) __riscv_vfcvt_f_x_v_f16mf2_tumu(__VA_ARGS__)

◆ vfcvt_f_x_v_f16mf4

#define vfcvt_f_x_v_f16mf4 ( ... ) __riscv_vfcvt_f_x_v_f16mf4(__VA_ARGS__)

◆ vfcvt_f_x_v_f16mf4_m

#define vfcvt_f_x_v_f16mf4_m ( ... ) __riscv_vfcvt_f_x_v_f16mf4_tumu(__VA_ARGS__)

◆ vfcvt_f_x_v_f32m1

#define vfcvt_f_x_v_f32m1 ( ... ) __riscv_vfcvt_f_x_v_f32m1(__VA_ARGS__)

◆ vfcvt_f_x_v_f32m1_m

#define vfcvt_f_x_v_f32m1_m ( ... ) __riscv_vfcvt_f_x_v_f32m1_tumu(__VA_ARGS__)

◆ vfcvt_f_x_v_f32m2

#define vfcvt_f_x_v_f32m2 ( ... ) __riscv_vfcvt_f_x_v_f32m2(__VA_ARGS__)

◆ vfcvt_f_x_v_f32m2_m

#define vfcvt_f_x_v_f32m2_m ( ... ) __riscv_vfcvt_f_x_v_f32m2_tumu(__VA_ARGS__)

◆ vfcvt_f_x_v_f32m4

#define vfcvt_f_x_v_f32m4 ( ... ) __riscv_vfcvt_f_x_v_f32m4(__VA_ARGS__)

◆ vfcvt_f_x_v_f32m4_m

#define vfcvt_f_x_v_f32m4_m ( ... ) __riscv_vfcvt_f_x_v_f32m4_tumu(__VA_ARGS__)

◆ vfcvt_f_x_v_f32m8

#define vfcvt_f_x_v_f32m8 ( ... ) __riscv_vfcvt_f_x_v_f32m8(__VA_ARGS__)

◆ vfcvt_f_x_v_f32m8_m

#define vfcvt_f_x_v_f32m8_m ( ... ) __riscv_vfcvt_f_x_v_f32m8_tumu(__VA_ARGS__)

◆ vfcvt_f_x_v_f32mf2

#define vfcvt_f_x_v_f32mf2 ( ... ) __riscv_vfcvt_f_x_v_f32mf2(__VA_ARGS__)

◆ vfcvt_f_x_v_f32mf2_m

#define vfcvt_f_x_v_f32mf2_m ( ... ) __riscv_vfcvt_f_x_v_f32mf2_tumu(__VA_ARGS__)

◆ vfcvt_f_x_v_f64m1

#define vfcvt_f_x_v_f64m1 ( ... ) __riscv_vfcvt_f_x_v_f64m1(__VA_ARGS__)

◆ vfcvt_f_x_v_f64m1_m

#define vfcvt_f_x_v_f64m1_m ( ... ) __riscv_vfcvt_f_x_v_f64m1_tumu(__VA_ARGS__)

◆ vfcvt_f_x_v_f64m2

#define vfcvt_f_x_v_f64m2 ( ... ) __riscv_vfcvt_f_x_v_f64m2(__VA_ARGS__)

◆ vfcvt_f_x_v_f64m2_m

#define vfcvt_f_x_v_f64m2_m ( ... ) __riscv_vfcvt_f_x_v_f64m2_tumu(__VA_ARGS__)

◆ vfcvt_f_x_v_f64m4

#define vfcvt_f_x_v_f64m4 ( ... ) __riscv_vfcvt_f_x_v_f64m4(__VA_ARGS__)

◆ vfcvt_f_x_v_f64m4_m

#define vfcvt_f_x_v_f64m4_m ( ... ) __riscv_vfcvt_f_x_v_f64m4_tumu(__VA_ARGS__)

◆ vfcvt_f_x_v_f64m8

#define vfcvt_f_x_v_f64m8 ( ... ) __riscv_vfcvt_f_x_v_f64m8(__VA_ARGS__)

◆ vfcvt_f_x_v_f64m8_m

#define vfcvt_f_x_v_f64m8_m ( ... ) __riscv_vfcvt_f_x_v_f64m8_tumu(__VA_ARGS__)

◆ vfcvt_f_xu_v_f16m1

#define vfcvt_f_xu_v_f16m1 ( ... ) __riscv_vfcvt_f_xu_v_f16m1(__VA_ARGS__)

◆ vfcvt_f_xu_v_f16m1_m

#define vfcvt_f_xu_v_f16m1_m ( ... ) __riscv_vfcvt_f_xu_v_f16m1_tumu(__VA_ARGS__)

◆ vfcvt_f_xu_v_f16m2

#define vfcvt_f_xu_v_f16m2 ( ... ) __riscv_vfcvt_f_xu_v_f16m2(__VA_ARGS__)

◆ vfcvt_f_xu_v_f16m2_m

#define vfcvt_f_xu_v_f16m2_m ( ... ) __riscv_vfcvt_f_xu_v_f16m2_tumu(__VA_ARGS__)

◆ vfcvt_f_xu_v_f16m4

#define vfcvt_f_xu_v_f16m4 ( ... ) __riscv_vfcvt_f_xu_v_f16m4(__VA_ARGS__)

◆ vfcvt_f_xu_v_f16m4_m

#define vfcvt_f_xu_v_f16m4_m ( ... ) __riscv_vfcvt_f_xu_v_f16m4_tumu(__VA_ARGS__)

◆ vfcvt_f_xu_v_f16m8

#define vfcvt_f_xu_v_f16m8 ( ... ) __riscv_vfcvt_f_xu_v_f16m8(__VA_ARGS__)

◆ vfcvt_f_xu_v_f16m8_m

#define vfcvt_f_xu_v_f16m8_m ( ... ) __riscv_vfcvt_f_xu_v_f16m8_tumu(__VA_ARGS__)

◆ vfcvt_f_xu_v_f16mf2

#define vfcvt_f_xu_v_f16mf2 ( ... ) __riscv_vfcvt_f_xu_v_f16mf2(__VA_ARGS__)

◆ vfcvt_f_xu_v_f16mf2_m

#define vfcvt_f_xu_v_f16mf2_m ( ... ) __riscv_vfcvt_f_xu_v_f16mf2_tumu(__VA_ARGS__)

◆ vfcvt_f_xu_v_f16mf4

#define vfcvt_f_xu_v_f16mf4 ( ... ) __riscv_vfcvt_f_xu_v_f16mf4(__VA_ARGS__)

◆ vfcvt_f_xu_v_f16mf4_m

#define vfcvt_f_xu_v_f16mf4_m ( ... ) __riscv_vfcvt_f_xu_v_f16mf4_tumu(__VA_ARGS__)

◆ vfcvt_f_xu_v_f32m1

#define vfcvt_f_xu_v_f32m1 ( ... ) __riscv_vfcvt_f_xu_v_f32m1(__VA_ARGS__)

◆ vfcvt_f_xu_v_f32m1_m

#define vfcvt_f_xu_v_f32m1_m ( ... ) __riscv_vfcvt_f_xu_v_f32m1_tumu(__VA_ARGS__)

◆ vfcvt_f_xu_v_f32m2

#define vfcvt_f_xu_v_f32m2 ( ... ) __riscv_vfcvt_f_xu_v_f32m2(__VA_ARGS__)

◆ vfcvt_f_xu_v_f32m2_m

#define vfcvt_f_xu_v_f32m2_m ( ... ) __riscv_vfcvt_f_xu_v_f32m2_tumu(__VA_ARGS__)

◆ vfcvt_f_xu_v_f32m4

#define vfcvt_f_xu_v_f32m4 ( ... ) __riscv_vfcvt_f_xu_v_f32m4(__VA_ARGS__)

◆ vfcvt_f_xu_v_f32m4_m

#define vfcvt_f_xu_v_f32m4_m ( ... ) __riscv_vfcvt_f_xu_v_f32m4_tumu(__VA_ARGS__)

◆ vfcvt_f_xu_v_f32m8

#define vfcvt_f_xu_v_f32m8 ( ... ) __riscv_vfcvt_f_xu_v_f32m8(__VA_ARGS__)

◆ vfcvt_f_xu_v_f32m8_m

#define vfcvt_f_xu_v_f32m8_m ( ... ) __riscv_vfcvt_f_xu_v_f32m8_tumu(__VA_ARGS__)

◆ vfcvt_f_xu_v_f32mf2

#define vfcvt_f_xu_v_f32mf2 ( ... ) __riscv_vfcvt_f_xu_v_f32mf2(__VA_ARGS__)

◆ vfcvt_f_xu_v_f32mf2_m

#define vfcvt_f_xu_v_f32mf2_m ( ... ) __riscv_vfcvt_f_xu_v_f32mf2_tumu(__VA_ARGS__)

◆ vfcvt_f_xu_v_f64m1

#define vfcvt_f_xu_v_f64m1 ( ... ) __riscv_vfcvt_f_xu_v_f64m1(__VA_ARGS__)

◆ vfcvt_f_xu_v_f64m1_m

#define vfcvt_f_xu_v_f64m1_m ( ... ) __riscv_vfcvt_f_xu_v_f64m1_tumu(__VA_ARGS__)

◆ vfcvt_f_xu_v_f64m2

#define vfcvt_f_xu_v_f64m2 ( ... ) __riscv_vfcvt_f_xu_v_f64m2(__VA_ARGS__)

◆ vfcvt_f_xu_v_f64m2_m

#define vfcvt_f_xu_v_f64m2_m ( ... ) __riscv_vfcvt_f_xu_v_f64m2_tumu(__VA_ARGS__)

◆ vfcvt_f_xu_v_f64m4

#define vfcvt_f_xu_v_f64m4 ( ... ) __riscv_vfcvt_f_xu_v_f64m4(__VA_ARGS__)

◆ vfcvt_f_xu_v_f64m4_m

#define vfcvt_f_xu_v_f64m4_m ( ... ) __riscv_vfcvt_f_xu_v_f64m4_tumu(__VA_ARGS__)

◆ vfcvt_f_xu_v_f64m8

#define vfcvt_f_xu_v_f64m8 ( ... ) __riscv_vfcvt_f_xu_v_f64m8(__VA_ARGS__)

◆ vfcvt_f_xu_v_f64m8_m

#define vfcvt_f_xu_v_f64m8_m ( ... ) __riscv_vfcvt_f_xu_v_f64m8_tumu(__VA_ARGS__)

◆ vfcvt_rtz_x_f_v_i16m1

#define vfcvt_rtz_x_f_v_i16m1 ( ... ) __riscv_vfcvt_rtz_x_f_v_i16m1(__VA_ARGS__)

◆ vfcvt_rtz_x_f_v_i16m1_m

#define vfcvt_rtz_x_f_v_i16m1_m ( ... ) __riscv_vfcvt_rtz_x_f_v_i16m1_tumu(__VA_ARGS__)

◆ vfcvt_rtz_x_f_v_i16m2

#define vfcvt_rtz_x_f_v_i16m2 ( ... ) __riscv_vfcvt_rtz_x_f_v_i16m2(__VA_ARGS__)

◆ vfcvt_rtz_x_f_v_i16m2_m

#define vfcvt_rtz_x_f_v_i16m2_m ( ... ) __riscv_vfcvt_rtz_x_f_v_i16m2_tumu(__VA_ARGS__)

◆ vfcvt_rtz_x_f_v_i16m4

#define vfcvt_rtz_x_f_v_i16m4 ( ... ) __riscv_vfcvt_rtz_x_f_v_i16m4(__VA_ARGS__)

◆ vfcvt_rtz_x_f_v_i16m4_m

#define vfcvt_rtz_x_f_v_i16m4_m ( ... ) __riscv_vfcvt_rtz_x_f_v_i16m4_tumu(__VA_ARGS__)

◆ vfcvt_rtz_x_f_v_i16m8

#define vfcvt_rtz_x_f_v_i16m8 ( ... ) __riscv_vfcvt_rtz_x_f_v_i16m8(__VA_ARGS__)

◆ vfcvt_rtz_x_f_v_i16m8_m

#define vfcvt_rtz_x_f_v_i16m8_m ( ... ) __riscv_vfcvt_rtz_x_f_v_i16m8_tumu(__VA_ARGS__)

◆ vfcvt_rtz_x_f_v_i16mf2

#define vfcvt_rtz_x_f_v_i16mf2 ( ... ) __riscv_vfcvt_rtz_x_f_v_i16mf2(__VA_ARGS__)

◆ vfcvt_rtz_x_f_v_i16mf2_m

#define vfcvt_rtz_x_f_v_i16mf2_m ( ... ) __riscv_vfcvt_rtz_x_f_v_i16mf2_tumu(__VA_ARGS__)

◆ vfcvt_rtz_x_f_v_i16mf4

#define vfcvt_rtz_x_f_v_i16mf4 ( ... ) __riscv_vfcvt_rtz_x_f_v_i16mf4(__VA_ARGS__)

◆ vfcvt_rtz_x_f_v_i16mf4_m

#define vfcvt_rtz_x_f_v_i16mf4_m ( ... ) __riscv_vfcvt_rtz_x_f_v_i16mf4_tumu(__VA_ARGS__)

◆ vfcvt_rtz_x_f_v_i32m1

#define vfcvt_rtz_x_f_v_i32m1 ( ... ) __riscv_vfcvt_rtz_x_f_v_i32m1(__VA_ARGS__)

◆ vfcvt_rtz_x_f_v_i32m1_m

#define vfcvt_rtz_x_f_v_i32m1_m ( ... ) __riscv_vfcvt_rtz_x_f_v_i32m1_tumu(__VA_ARGS__)

◆ vfcvt_rtz_x_f_v_i32m2

#define vfcvt_rtz_x_f_v_i32m2 ( ... ) __riscv_vfcvt_rtz_x_f_v_i32m2(__VA_ARGS__)

◆ vfcvt_rtz_x_f_v_i32m2_m

#define vfcvt_rtz_x_f_v_i32m2_m ( ... ) __riscv_vfcvt_rtz_x_f_v_i32m2_tumu(__VA_ARGS__)

◆ vfcvt_rtz_x_f_v_i32m4

#define vfcvt_rtz_x_f_v_i32m4 ( ... ) __riscv_vfcvt_rtz_x_f_v_i32m4(__VA_ARGS__)

◆ vfcvt_rtz_x_f_v_i32m4_m

#define vfcvt_rtz_x_f_v_i32m4_m ( ... ) __riscv_vfcvt_rtz_x_f_v_i32m4_tumu(__VA_ARGS__)

◆ vfcvt_rtz_x_f_v_i32m8

#define vfcvt_rtz_x_f_v_i32m8 ( ... ) __riscv_vfcvt_rtz_x_f_v_i32m8(__VA_ARGS__)

◆ vfcvt_rtz_x_f_v_i32m8_m

#define vfcvt_rtz_x_f_v_i32m8_m ( ... ) __riscv_vfcvt_rtz_x_f_v_i32m8_tumu(__VA_ARGS__)

◆ vfcvt_rtz_x_f_v_i32mf2

#define vfcvt_rtz_x_f_v_i32mf2 ( ... ) __riscv_vfcvt_rtz_x_f_v_i32mf2(__VA_ARGS__)

◆ vfcvt_rtz_x_f_v_i32mf2_m

#define vfcvt_rtz_x_f_v_i32mf2_m ( ... ) __riscv_vfcvt_rtz_x_f_v_i32mf2_tumu(__VA_ARGS__)

◆ vfcvt_rtz_x_f_v_i64m1

#define vfcvt_rtz_x_f_v_i64m1 ( ... ) __riscv_vfcvt_rtz_x_f_v_i64m1(__VA_ARGS__)

◆ vfcvt_rtz_x_f_v_i64m1_m

#define vfcvt_rtz_x_f_v_i64m1_m ( ... ) __riscv_vfcvt_rtz_x_f_v_i64m1_tumu(__VA_ARGS__)

◆ vfcvt_rtz_x_f_v_i64m2

#define vfcvt_rtz_x_f_v_i64m2 ( ... ) __riscv_vfcvt_rtz_x_f_v_i64m2(__VA_ARGS__)

◆ vfcvt_rtz_x_f_v_i64m2_m

#define vfcvt_rtz_x_f_v_i64m2_m ( ... ) __riscv_vfcvt_rtz_x_f_v_i64m2_tumu(__VA_ARGS__)

◆ vfcvt_rtz_x_f_v_i64m4

#define vfcvt_rtz_x_f_v_i64m4 ( ... ) __riscv_vfcvt_rtz_x_f_v_i64m4(__VA_ARGS__)

◆ vfcvt_rtz_x_f_v_i64m4_m

#define vfcvt_rtz_x_f_v_i64m4_m ( ... ) __riscv_vfcvt_rtz_x_f_v_i64m4_tumu(__VA_ARGS__)

◆ vfcvt_rtz_x_f_v_i64m8

#define vfcvt_rtz_x_f_v_i64m8 ( ... ) __riscv_vfcvt_rtz_x_f_v_i64m8(__VA_ARGS__)

◆ vfcvt_rtz_x_f_v_i64m8_m

#define vfcvt_rtz_x_f_v_i64m8_m ( ... ) __riscv_vfcvt_rtz_x_f_v_i64m8_tumu(__VA_ARGS__)

◆ vfcvt_rtz_xu_f_v_u16m1

#define vfcvt_rtz_xu_f_v_u16m1 ( ... ) __riscv_vfcvt_rtz_xu_f_v_u16m1(__VA_ARGS__)

◆ vfcvt_rtz_xu_f_v_u16m1_m

#define vfcvt_rtz_xu_f_v_u16m1_m ( ... ) __riscv_vfcvt_rtz_xu_f_v_u16m1_tumu(__VA_ARGS__)

◆ vfcvt_rtz_xu_f_v_u16m2

#define vfcvt_rtz_xu_f_v_u16m2 ( ... ) __riscv_vfcvt_rtz_xu_f_v_u16m2(__VA_ARGS__)

◆ vfcvt_rtz_xu_f_v_u16m2_m

#define vfcvt_rtz_xu_f_v_u16m2_m ( ... ) __riscv_vfcvt_rtz_xu_f_v_u16m2_tumu(__VA_ARGS__)

◆ vfcvt_rtz_xu_f_v_u16m4

#define vfcvt_rtz_xu_f_v_u16m4 ( ... ) __riscv_vfcvt_rtz_xu_f_v_u16m4(__VA_ARGS__)

◆ vfcvt_rtz_xu_f_v_u16m4_m

#define vfcvt_rtz_xu_f_v_u16m4_m ( ... ) __riscv_vfcvt_rtz_xu_f_v_u16m4_tumu(__VA_ARGS__)

◆ vfcvt_rtz_xu_f_v_u16m8

#define vfcvt_rtz_xu_f_v_u16m8 ( ... ) __riscv_vfcvt_rtz_xu_f_v_u16m8(__VA_ARGS__)

◆ vfcvt_rtz_xu_f_v_u16m8_m

#define vfcvt_rtz_xu_f_v_u16m8_m ( ... ) __riscv_vfcvt_rtz_xu_f_v_u16m8_tumu(__VA_ARGS__)

◆ vfcvt_rtz_xu_f_v_u16mf2

#define vfcvt_rtz_xu_f_v_u16mf2 ( ... ) __riscv_vfcvt_rtz_xu_f_v_u16mf2(__VA_ARGS__)

◆ vfcvt_rtz_xu_f_v_u16mf2_m

#define vfcvt_rtz_xu_f_v_u16mf2_m ( ... ) __riscv_vfcvt_rtz_xu_f_v_u16mf2_tumu(__VA_ARGS__)

◆ vfcvt_rtz_xu_f_v_u16mf4

#define vfcvt_rtz_xu_f_v_u16mf4 ( ... ) __riscv_vfcvt_rtz_xu_f_v_u16mf4(__VA_ARGS__)

◆ vfcvt_rtz_xu_f_v_u16mf4_m

#define vfcvt_rtz_xu_f_v_u16mf4_m ( ... ) __riscv_vfcvt_rtz_xu_f_v_u16mf4_tumu(__VA_ARGS__)

◆ vfcvt_rtz_xu_f_v_u32m1

#define vfcvt_rtz_xu_f_v_u32m1 ( ... ) __riscv_vfcvt_rtz_xu_f_v_u32m1(__VA_ARGS__)

◆ vfcvt_rtz_xu_f_v_u32m1_m

#define vfcvt_rtz_xu_f_v_u32m1_m ( ... ) __riscv_vfcvt_rtz_xu_f_v_u32m1_tumu(__VA_ARGS__)

◆ vfcvt_rtz_xu_f_v_u32m2

#define vfcvt_rtz_xu_f_v_u32m2 ( ... ) __riscv_vfcvt_rtz_xu_f_v_u32m2(__VA_ARGS__)

◆ vfcvt_rtz_xu_f_v_u32m2_m

#define vfcvt_rtz_xu_f_v_u32m2_m ( ... ) __riscv_vfcvt_rtz_xu_f_v_u32m2_tumu(__VA_ARGS__)

◆ vfcvt_rtz_xu_f_v_u32m4

#define vfcvt_rtz_xu_f_v_u32m4 ( ... ) __riscv_vfcvt_rtz_xu_f_v_u32m4(__VA_ARGS__)

◆ vfcvt_rtz_xu_f_v_u32m4_m

#define vfcvt_rtz_xu_f_v_u32m4_m ( ... ) __riscv_vfcvt_rtz_xu_f_v_u32m4_tumu(__VA_ARGS__)

◆ vfcvt_rtz_xu_f_v_u32m8

#define vfcvt_rtz_xu_f_v_u32m8 ( ... ) __riscv_vfcvt_rtz_xu_f_v_u32m8(__VA_ARGS__)

◆ vfcvt_rtz_xu_f_v_u32m8_m

#define vfcvt_rtz_xu_f_v_u32m8_m ( ... ) __riscv_vfcvt_rtz_xu_f_v_u32m8_tumu(__VA_ARGS__)

◆ vfcvt_rtz_xu_f_v_u32mf2

#define vfcvt_rtz_xu_f_v_u32mf2 ( ... ) __riscv_vfcvt_rtz_xu_f_v_u32mf2(__VA_ARGS__)

◆ vfcvt_rtz_xu_f_v_u32mf2_m

#define vfcvt_rtz_xu_f_v_u32mf2_m ( ... ) __riscv_vfcvt_rtz_xu_f_v_u32mf2_tumu(__VA_ARGS__)

◆ vfcvt_rtz_xu_f_v_u64m1

#define vfcvt_rtz_xu_f_v_u64m1 ( ... ) __riscv_vfcvt_rtz_xu_f_v_u64m1(__VA_ARGS__)

◆ vfcvt_rtz_xu_f_v_u64m1_m

#define vfcvt_rtz_xu_f_v_u64m1_m ( ... ) __riscv_vfcvt_rtz_xu_f_v_u64m1_tumu(__VA_ARGS__)

◆ vfcvt_rtz_xu_f_v_u64m2

#define vfcvt_rtz_xu_f_v_u64m2 ( ... ) __riscv_vfcvt_rtz_xu_f_v_u64m2(__VA_ARGS__)

◆ vfcvt_rtz_xu_f_v_u64m2_m

#define vfcvt_rtz_xu_f_v_u64m2_m ( ... ) __riscv_vfcvt_rtz_xu_f_v_u64m2_tumu(__VA_ARGS__)

◆ vfcvt_rtz_xu_f_v_u64m4

#define vfcvt_rtz_xu_f_v_u64m4 ( ... ) __riscv_vfcvt_rtz_xu_f_v_u64m4(__VA_ARGS__)

◆ vfcvt_rtz_xu_f_v_u64m4_m

#define vfcvt_rtz_xu_f_v_u64m4_m ( ... ) __riscv_vfcvt_rtz_xu_f_v_u64m4_tumu(__VA_ARGS__)

◆ vfcvt_rtz_xu_f_v_u64m8

#define vfcvt_rtz_xu_f_v_u64m8 ( ... ) __riscv_vfcvt_rtz_xu_f_v_u64m8(__VA_ARGS__)

◆ vfcvt_rtz_xu_f_v_u64m8_m

#define vfcvt_rtz_xu_f_v_u64m8_m ( ... ) __riscv_vfcvt_rtz_xu_f_v_u64m8_tumu(__VA_ARGS__)

◆ vfcvt_x_f_v_i16m1

#define vfcvt_x_f_v_i16m1 ( ... ) __riscv_vfcvt_x_f_v_i16m1(__VA_ARGS__)

◆ vfcvt_x_f_v_i16m1_m

#define vfcvt_x_f_v_i16m1_m ( ... ) __riscv_vfcvt_x_f_v_i16m1_tumu(__VA_ARGS__)

◆ vfcvt_x_f_v_i16m2

#define vfcvt_x_f_v_i16m2 ( ... ) __riscv_vfcvt_x_f_v_i16m2(__VA_ARGS__)

◆ vfcvt_x_f_v_i16m2_m

#define vfcvt_x_f_v_i16m2_m ( ... ) __riscv_vfcvt_x_f_v_i16m2_tumu(__VA_ARGS__)

◆ vfcvt_x_f_v_i16m4

#define vfcvt_x_f_v_i16m4 ( ... ) __riscv_vfcvt_x_f_v_i16m4(__VA_ARGS__)

◆ vfcvt_x_f_v_i16m4_m

#define vfcvt_x_f_v_i16m4_m ( ... ) __riscv_vfcvt_x_f_v_i16m4_tumu(__VA_ARGS__)

◆ vfcvt_x_f_v_i16m8

#define vfcvt_x_f_v_i16m8 ( ... ) __riscv_vfcvt_x_f_v_i16m8(__VA_ARGS__)

◆ vfcvt_x_f_v_i16m8_m

#define vfcvt_x_f_v_i16m8_m ( ... ) __riscv_vfcvt_x_f_v_i16m8_tumu(__VA_ARGS__)

◆ vfcvt_x_f_v_i16mf2

#define vfcvt_x_f_v_i16mf2 ( ... ) __riscv_vfcvt_x_f_v_i16mf2(__VA_ARGS__)

◆ vfcvt_x_f_v_i16mf2_m

#define vfcvt_x_f_v_i16mf2_m ( ... ) __riscv_vfcvt_x_f_v_i16mf2_tumu(__VA_ARGS__)

◆ vfcvt_x_f_v_i16mf4

#define vfcvt_x_f_v_i16mf4 ( ... ) __riscv_vfcvt_x_f_v_i16mf4(__VA_ARGS__)

◆ vfcvt_x_f_v_i16mf4_m

#define vfcvt_x_f_v_i16mf4_m ( ... ) __riscv_vfcvt_x_f_v_i16mf4_tumu(__VA_ARGS__)

◆ vfcvt_x_f_v_i32m1

#define vfcvt_x_f_v_i32m1 ( ... ) __riscv_vfcvt_x_f_v_i32m1(__VA_ARGS__)

◆ vfcvt_x_f_v_i32m1_m

#define vfcvt_x_f_v_i32m1_m ( ... ) __riscv_vfcvt_x_f_v_i32m1_tumu(__VA_ARGS__)

◆ vfcvt_x_f_v_i32m2

#define vfcvt_x_f_v_i32m2 ( ... ) __riscv_vfcvt_x_f_v_i32m2(__VA_ARGS__)

◆ vfcvt_x_f_v_i32m2_m

#define vfcvt_x_f_v_i32m2_m ( ... ) __riscv_vfcvt_x_f_v_i32m2_tumu(__VA_ARGS__)

◆ vfcvt_x_f_v_i32m4

#define vfcvt_x_f_v_i32m4 ( ... ) __riscv_vfcvt_x_f_v_i32m4(__VA_ARGS__)

◆ vfcvt_x_f_v_i32m4_m

#define vfcvt_x_f_v_i32m4_m ( ... ) __riscv_vfcvt_x_f_v_i32m4_tumu(__VA_ARGS__)

◆ vfcvt_x_f_v_i32m8

#define vfcvt_x_f_v_i32m8 ( ... ) __riscv_vfcvt_x_f_v_i32m8(__VA_ARGS__)

◆ vfcvt_x_f_v_i32m8_m

#define vfcvt_x_f_v_i32m8_m ( ... ) __riscv_vfcvt_x_f_v_i32m8_tumu(__VA_ARGS__)

◆ vfcvt_x_f_v_i32mf2

#define vfcvt_x_f_v_i32mf2 ( ... ) __riscv_vfcvt_x_f_v_i32mf2(__VA_ARGS__)

◆ vfcvt_x_f_v_i32mf2_m

#define vfcvt_x_f_v_i32mf2_m ( ... ) __riscv_vfcvt_x_f_v_i32mf2_tumu(__VA_ARGS__)

◆ vfcvt_x_f_v_i64m1

#define vfcvt_x_f_v_i64m1 ( ... ) __riscv_vfcvt_x_f_v_i64m1(__VA_ARGS__)

◆ vfcvt_x_f_v_i64m1_m

#define vfcvt_x_f_v_i64m1_m ( ... ) __riscv_vfcvt_x_f_v_i64m1_tumu(__VA_ARGS__)

◆ vfcvt_x_f_v_i64m2

#define vfcvt_x_f_v_i64m2 ( ... ) __riscv_vfcvt_x_f_v_i64m2(__VA_ARGS__)

◆ vfcvt_x_f_v_i64m2_m

#define vfcvt_x_f_v_i64m2_m ( ... ) __riscv_vfcvt_x_f_v_i64m2_tumu(__VA_ARGS__)

◆ vfcvt_x_f_v_i64m4

#define vfcvt_x_f_v_i64m4 ( ... ) __riscv_vfcvt_x_f_v_i64m4(__VA_ARGS__)

◆ vfcvt_x_f_v_i64m4_m

#define vfcvt_x_f_v_i64m4_m ( ... ) __riscv_vfcvt_x_f_v_i64m4_tumu(__VA_ARGS__)

◆ vfcvt_x_f_v_i64m8

#define vfcvt_x_f_v_i64m8 ( ... ) __riscv_vfcvt_x_f_v_i64m8(__VA_ARGS__)

◆ vfcvt_x_f_v_i64m8_m

#define vfcvt_x_f_v_i64m8_m ( ... ) __riscv_vfcvt_x_f_v_i64m8_tumu(__VA_ARGS__)

◆ vfcvt_xu_f_v_u16m1

#define vfcvt_xu_f_v_u16m1 ( ... ) __riscv_vfcvt_xu_f_v_u16m1(__VA_ARGS__)

◆ vfcvt_xu_f_v_u16m1_m

#define vfcvt_xu_f_v_u16m1_m ( ... ) __riscv_vfcvt_xu_f_v_u16m1_tumu(__VA_ARGS__)

◆ vfcvt_xu_f_v_u16m2

#define vfcvt_xu_f_v_u16m2 ( ... ) __riscv_vfcvt_xu_f_v_u16m2(__VA_ARGS__)

◆ vfcvt_xu_f_v_u16m2_m

#define vfcvt_xu_f_v_u16m2_m ( ... ) __riscv_vfcvt_xu_f_v_u16m2_tumu(__VA_ARGS__)

◆ vfcvt_xu_f_v_u16m4

#define vfcvt_xu_f_v_u16m4 ( ... ) __riscv_vfcvt_xu_f_v_u16m4(__VA_ARGS__)

◆ vfcvt_xu_f_v_u16m4_m

#define vfcvt_xu_f_v_u16m4_m ( ... ) __riscv_vfcvt_xu_f_v_u16m4_tumu(__VA_ARGS__)

◆ vfcvt_xu_f_v_u16m8

#define vfcvt_xu_f_v_u16m8 ( ... ) __riscv_vfcvt_xu_f_v_u16m8(__VA_ARGS__)

◆ vfcvt_xu_f_v_u16m8_m

#define vfcvt_xu_f_v_u16m8_m ( ... ) __riscv_vfcvt_xu_f_v_u16m8_tumu(__VA_ARGS__)

◆ vfcvt_xu_f_v_u16mf2

#define vfcvt_xu_f_v_u16mf2 ( ... ) __riscv_vfcvt_xu_f_v_u16mf2(__VA_ARGS__)

◆ vfcvt_xu_f_v_u16mf2_m

#define vfcvt_xu_f_v_u16mf2_m ( ... ) __riscv_vfcvt_xu_f_v_u16mf2_tumu(__VA_ARGS__)

◆ vfcvt_xu_f_v_u16mf4

#define vfcvt_xu_f_v_u16mf4 ( ... ) __riscv_vfcvt_xu_f_v_u16mf4(__VA_ARGS__)

◆ vfcvt_xu_f_v_u16mf4_m

#define vfcvt_xu_f_v_u16mf4_m ( ... ) __riscv_vfcvt_xu_f_v_u16mf4_tumu(__VA_ARGS__)

◆ vfcvt_xu_f_v_u32m1

#define vfcvt_xu_f_v_u32m1 ( ... ) __riscv_vfcvt_xu_f_v_u32m1(__VA_ARGS__)

◆ vfcvt_xu_f_v_u32m1_m

#define vfcvt_xu_f_v_u32m1_m ( ... ) __riscv_vfcvt_xu_f_v_u32m1_tumu(__VA_ARGS__)

◆ vfcvt_xu_f_v_u32m2

#define vfcvt_xu_f_v_u32m2 ( ... ) __riscv_vfcvt_xu_f_v_u32m2(__VA_ARGS__)

◆ vfcvt_xu_f_v_u32m2_m

#define vfcvt_xu_f_v_u32m2_m ( ... ) __riscv_vfcvt_xu_f_v_u32m2_tumu(__VA_ARGS__)

◆ vfcvt_xu_f_v_u32m4

#define vfcvt_xu_f_v_u32m4 ( ... ) __riscv_vfcvt_xu_f_v_u32m4(__VA_ARGS__)

◆ vfcvt_xu_f_v_u32m4_m

#define vfcvt_xu_f_v_u32m4_m ( ... ) __riscv_vfcvt_xu_f_v_u32m4_tumu(__VA_ARGS__)

◆ vfcvt_xu_f_v_u32m8

#define vfcvt_xu_f_v_u32m8 ( ... ) __riscv_vfcvt_xu_f_v_u32m8(__VA_ARGS__)

◆ vfcvt_xu_f_v_u32m8_m

#define vfcvt_xu_f_v_u32m8_m ( ... ) __riscv_vfcvt_xu_f_v_u32m8_tumu(__VA_ARGS__)

◆ vfcvt_xu_f_v_u32mf2

#define vfcvt_xu_f_v_u32mf2 ( ... ) __riscv_vfcvt_xu_f_v_u32mf2(__VA_ARGS__)

◆ vfcvt_xu_f_v_u32mf2_m

#define vfcvt_xu_f_v_u32mf2_m ( ... ) __riscv_vfcvt_xu_f_v_u32mf2_tumu(__VA_ARGS__)

◆ vfcvt_xu_f_v_u64m1

#define vfcvt_xu_f_v_u64m1 ( ... ) __riscv_vfcvt_xu_f_v_u64m1(__VA_ARGS__)

◆ vfcvt_xu_f_v_u64m1_m

#define vfcvt_xu_f_v_u64m1_m ( ... ) __riscv_vfcvt_xu_f_v_u64m1_tumu(__VA_ARGS__)

◆ vfcvt_xu_f_v_u64m2

#define vfcvt_xu_f_v_u64m2 ( ... ) __riscv_vfcvt_xu_f_v_u64m2(__VA_ARGS__)

◆ vfcvt_xu_f_v_u64m2_m

#define vfcvt_xu_f_v_u64m2_m ( ... ) __riscv_vfcvt_xu_f_v_u64m2_tumu(__VA_ARGS__)

◆ vfcvt_xu_f_v_u64m4

#define vfcvt_xu_f_v_u64m4 ( ... ) __riscv_vfcvt_xu_f_v_u64m4(__VA_ARGS__)

◆ vfcvt_xu_f_v_u64m4_m

#define vfcvt_xu_f_v_u64m4_m ( ... ) __riscv_vfcvt_xu_f_v_u64m4_tumu(__VA_ARGS__)

◆ vfcvt_xu_f_v_u64m8

#define vfcvt_xu_f_v_u64m8 ( ... ) __riscv_vfcvt_xu_f_v_u64m8(__VA_ARGS__)

◆ vfcvt_xu_f_v_u64m8_m

#define vfcvt_xu_f_v_u64m8_m ( ... ) __riscv_vfcvt_xu_f_v_u64m8_tumu(__VA_ARGS__)

◆ vfdiv_vf_f16m1

#define vfdiv_vf_f16m1 ( ... ) __riscv_vfdiv_vf_f16m1(__VA_ARGS__)

◆ vfdiv_vf_f16m1_m

#define vfdiv_vf_f16m1_m ( ... ) __riscv_vfdiv_vf_f16m1_tumu(__VA_ARGS__)

◆ vfdiv_vf_f16m2

#define vfdiv_vf_f16m2 ( ... ) __riscv_vfdiv_vf_f16m2(__VA_ARGS__)

◆ vfdiv_vf_f16m2_m

#define vfdiv_vf_f16m2_m ( ... ) __riscv_vfdiv_vf_f16m2_tumu(__VA_ARGS__)

◆ vfdiv_vf_f16m4

#define vfdiv_vf_f16m4 ( ... ) __riscv_vfdiv_vf_f16m4(__VA_ARGS__)

◆ vfdiv_vf_f16m4_m

#define vfdiv_vf_f16m4_m ( ... ) __riscv_vfdiv_vf_f16m4_tumu(__VA_ARGS__)

◆ vfdiv_vf_f16m8

#define vfdiv_vf_f16m8 ( ... ) __riscv_vfdiv_vf_f16m8(__VA_ARGS__)

◆ vfdiv_vf_f16m8_m

#define vfdiv_vf_f16m8_m ( ... ) __riscv_vfdiv_vf_f16m8_tumu(__VA_ARGS__)

◆ vfdiv_vf_f16mf2

#define vfdiv_vf_f16mf2 ( ... ) __riscv_vfdiv_vf_f16mf2(__VA_ARGS__)

◆ vfdiv_vf_f16mf2_m

#define vfdiv_vf_f16mf2_m ( ... ) __riscv_vfdiv_vf_f16mf2_tumu(__VA_ARGS__)

◆ vfdiv_vf_f16mf4

#define vfdiv_vf_f16mf4 ( ... ) __riscv_vfdiv_vf_f16mf4(__VA_ARGS__)

◆ vfdiv_vf_f16mf4_m

#define vfdiv_vf_f16mf4_m ( ... ) __riscv_vfdiv_vf_f16mf4_tumu(__VA_ARGS__)

◆ vfdiv_vf_f32m1

#define vfdiv_vf_f32m1 ( ... ) __riscv_vfdiv_vf_f32m1(__VA_ARGS__)

◆ vfdiv_vf_f32m1_m

#define vfdiv_vf_f32m1_m ( ... ) __riscv_vfdiv_vf_f32m1_tumu(__VA_ARGS__)

◆ vfdiv_vf_f32m2

#define vfdiv_vf_f32m2 ( ... ) __riscv_vfdiv_vf_f32m2(__VA_ARGS__)

◆ vfdiv_vf_f32m2_m

#define vfdiv_vf_f32m2_m ( ... ) __riscv_vfdiv_vf_f32m2_tumu(__VA_ARGS__)

◆ vfdiv_vf_f32m4

#define vfdiv_vf_f32m4 ( ... ) __riscv_vfdiv_vf_f32m4(__VA_ARGS__)

◆ vfdiv_vf_f32m4_m

#define vfdiv_vf_f32m4_m ( ... ) __riscv_vfdiv_vf_f32m4_tumu(__VA_ARGS__)

◆ vfdiv_vf_f32m8

#define vfdiv_vf_f32m8 ( ... ) __riscv_vfdiv_vf_f32m8(__VA_ARGS__)

◆ vfdiv_vf_f32m8_m

#define vfdiv_vf_f32m8_m ( ... ) __riscv_vfdiv_vf_f32m8_tumu(__VA_ARGS__)

◆ vfdiv_vf_f32mf2

#define vfdiv_vf_f32mf2 ( ... ) __riscv_vfdiv_vf_f32mf2(__VA_ARGS__)

◆ vfdiv_vf_f32mf2_m

#define vfdiv_vf_f32mf2_m ( ... ) __riscv_vfdiv_vf_f32mf2_tumu(__VA_ARGS__)

◆ vfdiv_vf_f64m1

#define vfdiv_vf_f64m1 ( ... ) __riscv_vfdiv_vf_f64m1(__VA_ARGS__)

◆ vfdiv_vf_f64m1_m

#define vfdiv_vf_f64m1_m ( ... ) __riscv_vfdiv_vf_f64m1_tumu(__VA_ARGS__)

◆ vfdiv_vf_f64m2

#define vfdiv_vf_f64m2 ( ... ) __riscv_vfdiv_vf_f64m2(__VA_ARGS__)

◆ vfdiv_vf_f64m2_m

#define vfdiv_vf_f64m2_m ( ... ) __riscv_vfdiv_vf_f64m2_tumu(__VA_ARGS__)

◆ vfdiv_vf_f64m4

#define vfdiv_vf_f64m4 ( ... ) __riscv_vfdiv_vf_f64m4(__VA_ARGS__)

◆ vfdiv_vf_f64m4_m

#define vfdiv_vf_f64m4_m ( ... ) __riscv_vfdiv_vf_f64m4_tumu(__VA_ARGS__)

◆ vfdiv_vf_f64m8

#define vfdiv_vf_f64m8 ( ... ) __riscv_vfdiv_vf_f64m8(__VA_ARGS__)

◆ vfdiv_vf_f64m8_m

#define vfdiv_vf_f64m8_m ( ... ) __riscv_vfdiv_vf_f64m8_tumu(__VA_ARGS__)

◆ vfdiv_vv_f16m1

#define vfdiv_vv_f16m1 ( ... ) __riscv_vfdiv_vv_f16m1(__VA_ARGS__)

◆ vfdiv_vv_f16m1_m

#define vfdiv_vv_f16m1_m ( ... ) __riscv_vfdiv_vv_f16m1_tumu(__VA_ARGS__)

◆ vfdiv_vv_f16m2

#define vfdiv_vv_f16m2 ( ... ) __riscv_vfdiv_vv_f16m2(__VA_ARGS__)

◆ vfdiv_vv_f16m2_m

#define vfdiv_vv_f16m2_m ( ... ) __riscv_vfdiv_vv_f16m2_tumu(__VA_ARGS__)

◆ vfdiv_vv_f16m4

#define vfdiv_vv_f16m4 ( ... ) __riscv_vfdiv_vv_f16m4(__VA_ARGS__)

◆ vfdiv_vv_f16m4_m

#define vfdiv_vv_f16m4_m ( ... ) __riscv_vfdiv_vv_f16m4_tumu(__VA_ARGS__)

◆ vfdiv_vv_f16m8

#define vfdiv_vv_f16m8 ( ... ) __riscv_vfdiv_vv_f16m8(__VA_ARGS__)

◆ vfdiv_vv_f16m8_m

#define vfdiv_vv_f16m8_m ( ... ) __riscv_vfdiv_vv_f16m8_tumu(__VA_ARGS__)

◆ vfdiv_vv_f16mf2

#define vfdiv_vv_f16mf2 ( ... ) __riscv_vfdiv_vv_f16mf2(__VA_ARGS__)

◆ vfdiv_vv_f16mf2_m

#define vfdiv_vv_f16mf2_m ( ... ) __riscv_vfdiv_vv_f16mf2_tumu(__VA_ARGS__)

◆ vfdiv_vv_f16mf4

#define vfdiv_vv_f16mf4 ( ... ) __riscv_vfdiv_vv_f16mf4(__VA_ARGS__)

◆ vfdiv_vv_f16mf4_m

#define vfdiv_vv_f16mf4_m ( ... ) __riscv_vfdiv_vv_f16mf4_tumu(__VA_ARGS__)

◆ vfdiv_vv_f32m1

#define vfdiv_vv_f32m1 ( ... ) __riscv_vfdiv_vv_f32m1(__VA_ARGS__)

◆ vfdiv_vv_f32m1_m

#define vfdiv_vv_f32m1_m ( ... ) __riscv_vfdiv_vv_f32m1_tumu(__VA_ARGS__)

◆ vfdiv_vv_f32m2

#define vfdiv_vv_f32m2 ( ... ) __riscv_vfdiv_vv_f32m2(__VA_ARGS__)

◆ vfdiv_vv_f32m2_m

#define vfdiv_vv_f32m2_m ( ... ) __riscv_vfdiv_vv_f32m2_tumu(__VA_ARGS__)

◆ vfdiv_vv_f32m4

#define vfdiv_vv_f32m4 ( ... ) __riscv_vfdiv_vv_f32m4(__VA_ARGS__)

◆ vfdiv_vv_f32m4_m

#define vfdiv_vv_f32m4_m ( ... ) __riscv_vfdiv_vv_f32m4_tumu(__VA_ARGS__)

◆ vfdiv_vv_f32m8

#define vfdiv_vv_f32m8 ( ... ) __riscv_vfdiv_vv_f32m8(__VA_ARGS__)

◆ vfdiv_vv_f32m8_m

#define vfdiv_vv_f32m8_m ( ... ) __riscv_vfdiv_vv_f32m8_tumu(__VA_ARGS__)

◆ vfdiv_vv_f32mf2

#define vfdiv_vv_f32mf2 ( ... ) __riscv_vfdiv_vv_f32mf2(__VA_ARGS__)

◆ vfdiv_vv_f32mf2_m

#define vfdiv_vv_f32mf2_m ( ... ) __riscv_vfdiv_vv_f32mf2_tumu(__VA_ARGS__)

◆ vfdiv_vv_f64m1

#define vfdiv_vv_f64m1 ( ... ) __riscv_vfdiv_vv_f64m1(__VA_ARGS__)

◆ vfdiv_vv_f64m1_m

#define vfdiv_vv_f64m1_m ( ... ) __riscv_vfdiv_vv_f64m1_tumu(__VA_ARGS__)

◆ vfdiv_vv_f64m2

#define vfdiv_vv_f64m2 ( ... ) __riscv_vfdiv_vv_f64m2(__VA_ARGS__)

◆ vfdiv_vv_f64m2_m

#define vfdiv_vv_f64m2_m ( ... ) __riscv_vfdiv_vv_f64m2_tumu(__VA_ARGS__)

◆ vfdiv_vv_f64m4

#define vfdiv_vv_f64m4 ( ... ) __riscv_vfdiv_vv_f64m4(__VA_ARGS__)

◆ vfdiv_vv_f64m4_m

#define vfdiv_vv_f64m4_m ( ... ) __riscv_vfdiv_vv_f64m4_tumu(__VA_ARGS__)

◆ vfdiv_vv_f64m8

#define vfdiv_vv_f64m8 ( ... ) __riscv_vfdiv_vv_f64m8(__VA_ARGS__)

◆ vfdiv_vv_f64m8_m

#define vfdiv_vv_f64m8_m ( ... ) __riscv_vfdiv_vv_f64m8_tumu(__VA_ARGS__)

◆ vfirst_m_b1

#define vfirst_m_b1 ( ... ) __riscv_vfirst_m_b1(__VA_ARGS__)

◆ vfirst_m_b16

#define vfirst_m_b16 ( ... ) __riscv_vfirst_m_b16(__VA_ARGS__)

◆ vfirst_m_b16_m

#define vfirst_m_b16_m ( ... ) __riscv_vfirst_m_b16_m(__VA_ARGS__)

◆ vfirst_m_b1_m

#define vfirst_m_b1_m ( ... ) __riscv_vfirst_m_b1_m(__VA_ARGS__)

◆ vfirst_m_b2

#define vfirst_m_b2 ( ... ) __riscv_vfirst_m_b2(__VA_ARGS__)

◆ vfirst_m_b2_m

#define vfirst_m_b2_m ( ... ) __riscv_vfirst_m_b2_m(__VA_ARGS__)

◆ vfirst_m_b32

#define vfirst_m_b32 ( ... ) __riscv_vfirst_m_b32(__VA_ARGS__)

◆ vfirst_m_b32_m

#define vfirst_m_b32_m ( ... ) __riscv_vfirst_m_b32_m(__VA_ARGS__)

◆ vfirst_m_b4

#define vfirst_m_b4 ( ... ) __riscv_vfirst_m_b4(__VA_ARGS__)

◆ vfirst_m_b4_m

#define vfirst_m_b4_m ( ... ) __riscv_vfirst_m_b4_m(__VA_ARGS__)

◆ vfirst_m_b64

#define vfirst_m_b64 ( ... ) __riscv_vfirst_m_b64(__VA_ARGS__)

◆ vfirst_m_b64_m

#define vfirst_m_b64_m ( ... ) __riscv_vfirst_m_b64_m(__VA_ARGS__)

◆ vfirst_m_b8

#define vfirst_m_b8 ( ... ) __riscv_vfirst_m_b8(__VA_ARGS__)

◆ vfirst_m_b8_m

#define vfirst_m_b8_m ( ... ) __riscv_vfirst_m_b8_m(__VA_ARGS__)

◆ vfmacc_vf_f16m1

#define vfmacc_vf_f16m1 ( ... ) __riscv_vfmacc_vf_f16m1_tu(__VA_ARGS__)

◆ vfmacc_vf_f16m1_m

#define vfmacc_vf_f16m1_m ( ... ) __riscv_vfmacc_vf_f16m1_tumu(__VA_ARGS__)

◆ vfmacc_vf_f16m2

#define vfmacc_vf_f16m2 ( ... ) __riscv_vfmacc_vf_f16m2_tu(__VA_ARGS__)

◆ vfmacc_vf_f16m2_m

#define vfmacc_vf_f16m2_m ( ... ) __riscv_vfmacc_vf_f16m2_tumu(__VA_ARGS__)

◆ vfmacc_vf_f16m4

#define vfmacc_vf_f16m4 ( ... ) __riscv_vfmacc_vf_f16m4_tu(__VA_ARGS__)

◆ vfmacc_vf_f16m4_m

#define vfmacc_vf_f16m4_m ( ... ) __riscv_vfmacc_vf_f16m4_tumu(__VA_ARGS__)

◆ vfmacc_vf_f16m8

#define vfmacc_vf_f16m8 ( ... ) __riscv_vfmacc_vf_f16m8_tu(__VA_ARGS__)

◆ vfmacc_vf_f16m8_m

#define vfmacc_vf_f16m8_m ( ... ) __riscv_vfmacc_vf_f16m8_tumu(__VA_ARGS__)

◆ vfmacc_vf_f16mf2

#define vfmacc_vf_f16mf2 ( ... ) __riscv_vfmacc_vf_f16mf2_tu(__VA_ARGS__)

◆ vfmacc_vf_f16mf2_m

#define vfmacc_vf_f16mf2_m ( ... ) __riscv_vfmacc_vf_f16mf2_tumu(__VA_ARGS__)

◆ vfmacc_vf_f16mf4

#define vfmacc_vf_f16mf4 ( ... ) __riscv_vfmacc_vf_f16mf4_tu(__VA_ARGS__)

◆ vfmacc_vf_f16mf4_m

#define vfmacc_vf_f16mf4_m ( ... ) __riscv_vfmacc_vf_f16mf4_tumu(__VA_ARGS__)

◆ vfmacc_vf_f32m1

#define vfmacc_vf_f32m1 ( ... ) __riscv_vfmacc_vf_f32m1_tu(__VA_ARGS__)

◆ vfmacc_vf_f32m1_m

#define vfmacc_vf_f32m1_m ( ... ) __riscv_vfmacc_vf_f32m1_tumu(__VA_ARGS__)

◆ vfmacc_vf_f32m2

#define vfmacc_vf_f32m2 ( ... ) __riscv_vfmacc_vf_f32m2_tu(__VA_ARGS__)

◆ vfmacc_vf_f32m2_m

#define vfmacc_vf_f32m2_m ( ... ) __riscv_vfmacc_vf_f32m2_tumu(__VA_ARGS__)

◆ vfmacc_vf_f32m4

#define vfmacc_vf_f32m4 ( ... ) __riscv_vfmacc_vf_f32m4_tu(__VA_ARGS__)

◆ vfmacc_vf_f32m4_m

#define vfmacc_vf_f32m4_m ( ... ) __riscv_vfmacc_vf_f32m4_tumu(__VA_ARGS__)

◆ vfmacc_vf_f32m8

#define vfmacc_vf_f32m8 ( ... ) __riscv_vfmacc_vf_f32m8_tu(__VA_ARGS__)

◆ vfmacc_vf_f32m8_m

#define vfmacc_vf_f32m8_m ( ... ) __riscv_vfmacc_vf_f32m8_tumu(__VA_ARGS__)

◆ vfmacc_vf_f32mf2

#define vfmacc_vf_f32mf2 ( ... ) __riscv_vfmacc_vf_f32mf2_tu(__VA_ARGS__)

◆ vfmacc_vf_f32mf2_m

#define vfmacc_vf_f32mf2_m ( ... ) __riscv_vfmacc_vf_f32mf2_tumu(__VA_ARGS__)

◆ vfmacc_vf_f64m1

#define vfmacc_vf_f64m1 ( ... ) __riscv_vfmacc_vf_f64m1_tu(__VA_ARGS__)

◆ vfmacc_vf_f64m1_m

#define vfmacc_vf_f64m1_m ( ... ) __riscv_vfmacc_vf_f64m1_tumu(__VA_ARGS__)

◆ vfmacc_vf_f64m2

#define vfmacc_vf_f64m2 ( ... ) __riscv_vfmacc_vf_f64m2_tu(__VA_ARGS__)

◆ vfmacc_vf_f64m2_m

#define vfmacc_vf_f64m2_m ( ... ) __riscv_vfmacc_vf_f64m2_tumu(__VA_ARGS__)

◆ vfmacc_vf_f64m4

#define vfmacc_vf_f64m4 ( ... ) __riscv_vfmacc_vf_f64m4_tu(__VA_ARGS__)

◆ vfmacc_vf_f64m4_m

#define vfmacc_vf_f64m4_m ( ... ) __riscv_vfmacc_vf_f64m4_tumu(__VA_ARGS__)

◆ vfmacc_vf_f64m8

#define vfmacc_vf_f64m8 ( ... ) __riscv_vfmacc_vf_f64m8_tu(__VA_ARGS__)

◆ vfmacc_vf_f64m8_m

#define vfmacc_vf_f64m8_m ( ... ) __riscv_vfmacc_vf_f64m8_tumu(__VA_ARGS__)

◆ vfmacc_vv_f16m1

#define vfmacc_vv_f16m1 ( ... ) __riscv_vfmacc_vv_f16m1_tu(__VA_ARGS__)

◆ vfmacc_vv_f16m1_m

#define vfmacc_vv_f16m1_m ( ... ) __riscv_vfmacc_vv_f16m1_tumu(__VA_ARGS__)

◆ vfmacc_vv_f16m2

#define vfmacc_vv_f16m2 ( ... ) __riscv_vfmacc_vv_f16m2_tu(__VA_ARGS__)

◆ vfmacc_vv_f16m2_m

#define vfmacc_vv_f16m2_m ( ... ) __riscv_vfmacc_vv_f16m2_tumu(__VA_ARGS__)

◆ vfmacc_vv_f16m4

#define vfmacc_vv_f16m4 ( ... ) __riscv_vfmacc_vv_f16m4_tu(__VA_ARGS__)

◆ vfmacc_vv_f16m4_m

#define vfmacc_vv_f16m4_m ( ... ) __riscv_vfmacc_vv_f16m4_tumu(__VA_ARGS__)

◆ vfmacc_vv_f16m8

#define vfmacc_vv_f16m8 ( ... ) __riscv_vfmacc_vv_f16m8_tu(__VA_ARGS__)

◆ vfmacc_vv_f16m8_m

#define vfmacc_vv_f16m8_m ( ... ) __riscv_vfmacc_vv_f16m8_tumu(__VA_ARGS__)

◆ vfmacc_vv_f16mf2

#define vfmacc_vv_f16mf2 ( ... ) __riscv_vfmacc_vv_f16mf2_tu(__VA_ARGS__)

◆ vfmacc_vv_f16mf2_m

#define vfmacc_vv_f16mf2_m ( ... ) __riscv_vfmacc_vv_f16mf2_tumu(__VA_ARGS__)

◆ vfmacc_vv_f16mf4

#define vfmacc_vv_f16mf4 ( ... ) __riscv_vfmacc_vv_f16mf4_tu(__VA_ARGS__)

◆ vfmacc_vv_f16mf4_m

#define vfmacc_vv_f16mf4_m ( ... ) __riscv_vfmacc_vv_f16mf4_tumu(__VA_ARGS__)

◆ vfmacc_vv_f32m1

#define vfmacc_vv_f32m1 ( ... ) __riscv_vfmacc_vv_f32m1_tu(__VA_ARGS__)

◆ vfmacc_vv_f32m1_m

#define vfmacc_vv_f32m1_m ( ... ) __riscv_vfmacc_vv_f32m1_tumu(__VA_ARGS__)

◆ vfmacc_vv_f32m2

#define vfmacc_vv_f32m2 ( ... ) __riscv_vfmacc_vv_f32m2_tu(__VA_ARGS__)

◆ vfmacc_vv_f32m2_m

#define vfmacc_vv_f32m2_m ( ... ) __riscv_vfmacc_vv_f32m2_tumu(__VA_ARGS__)

◆ vfmacc_vv_f32m4

#define vfmacc_vv_f32m4 ( ... ) __riscv_vfmacc_vv_f32m4_tu(__VA_ARGS__)

◆ vfmacc_vv_f32m4_m

#define vfmacc_vv_f32m4_m ( ... ) __riscv_vfmacc_vv_f32m4_tumu(__VA_ARGS__)

◆ vfmacc_vv_f32m8

#define vfmacc_vv_f32m8 ( ... ) __riscv_vfmacc_vv_f32m8_tu(__VA_ARGS__)

◆ vfmacc_vv_f32m8_m

#define vfmacc_vv_f32m8_m ( ... ) __riscv_vfmacc_vv_f32m8_tumu(__VA_ARGS__)

◆ vfmacc_vv_f32mf2

#define vfmacc_vv_f32mf2 ( ... ) __riscv_vfmacc_vv_f32mf2_tu(__VA_ARGS__)

◆ vfmacc_vv_f32mf2_m

#define vfmacc_vv_f32mf2_m ( ... ) __riscv_vfmacc_vv_f32mf2_tumu(__VA_ARGS__)

◆ vfmacc_vv_f64m1

#define vfmacc_vv_f64m1 ( ... ) __riscv_vfmacc_vv_f64m1_tu(__VA_ARGS__)

◆ vfmacc_vv_f64m1_m

#define vfmacc_vv_f64m1_m ( ... ) __riscv_vfmacc_vv_f64m1_tumu(__VA_ARGS__)

◆ vfmacc_vv_f64m2

#define vfmacc_vv_f64m2 ( ... ) __riscv_vfmacc_vv_f64m2_tu(__VA_ARGS__)

◆ vfmacc_vv_f64m2_m

#define vfmacc_vv_f64m2_m ( ... ) __riscv_vfmacc_vv_f64m2_tumu(__VA_ARGS__)

◆ vfmacc_vv_f64m4

#define vfmacc_vv_f64m4 ( ... ) __riscv_vfmacc_vv_f64m4_tu(__VA_ARGS__)

◆ vfmacc_vv_f64m4_m

#define vfmacc_vv_f64m4_m ( ... ) __riscv_vfmacc_vv_f64m4_tumu(__VA_ARGS__)

◆ vfmacc_vv_f64m8

#define vfmacc_vv_f64m8 ( ... ) __riscv_vfmacc_vv_f64m8_tu(__VA_ARGS__)

◆ vfmacc_vv_f64m8_m

#define vfmacc_vv_f64m8_m ( ... ) __riscv_vfmacc_vv_f64m8_tumu(__VA_ARGS__)

◆ vfmadd_vf_f16m1

#define vfmadd_vf_f16m1 ( ... ) __riscv_vfmadd_vf_f16m1_tu(__VA_ARGS__)

◆ vfmadd_vf_f16m1_m

#define vfmadd_vf_f16m1_m ( ... ) __riscv_vfmadd_vf_f16m1_tumu(__VA_ARGS__)

◆ vfmadd_vf_f16m2

#define vfmadd_vf_f16m2 ( ... ) __riscv_vfmadd_vf_f16m2_tu(__VA_ARGS__)

◆ vfmadd_vf_f16m2_m

#define vfmadd_vf_f16m2_m ( ... ) __riscv_vfmadd_vf_f16m2_tumu(__VA_ARGS__)

◆ vfmadd_vf_f16m4

#define vfmadd_vf_f16m4 ( ... ) __riscv_vfmadd_vf_f16m4_tu(__VA_ARGS__)

◆ vfmadd_vf_f16m4_m

#define vfmadd_vf_f16m4_m ( ... ) __riscv_vfmadd_vf_f16m4_tumu(__VA_ARGS__)

◆ vfmadd_vf_f16m8

#define vfmadd_vf_f16m8 ( ... ) __riscv_vfmadd_vf_f16m8_tu(__VA_ARGS__)

◆ vfmadd_vf_f16m8_m

#define vfmadd_vf_f16m8_m ( ... ) __riscv_vfmadd_vf_f16m8_tumu(__VA_ARGS__)

◆ vfmadd_vf_f16mf2

#define vfmadd_vf_f16mf2 ( ... ) __riscv_vfmadd_vf_f16mf2_tu(__VA_ARGS__)

◆ vfmadd_vf_f16mf2_m

#define vfmadd_vf_f16mf2_m ( ... ) __riscv_vfmadd_vf_f16mf2_tumu(__VA_ARGS__)

◆ vfmadd_vf_f16mf4

#define vfmadd_vf_f16mf4 ( ... ) __riscv_vfmadd_vf_f16mf4_tu(__VA_ARGS__)

◆ vfmadd_vf_f16mf4_m

#define vfmadd_vf_f16mf4_m ( ... ) __riscv_vfmadd_vf_f16mf4_tumu(__VA_ARGS__)

◆ vfmadd_vf_f32m1

#define vfmadd_vf_f32m1 ( ... ) __riscv_vfmadd_vf_f32m1_tu(__VA_ARGS__)

◆ vfmadd_vf_f32m1_m

#define vfmadd_vf_f32m1_m ( ... ) __riscv_vfmadd_vf_f32m1_tumu(__VA_ARGS__)

◆ vfmadd_vf_f32m2

#define vfmadd_vf_f32m2 ( ... ) __riscv_vfmadd_vf_f32m2_tu(__VA_ARGS__)

◆ vfmadd_vf_f32m2_m

#define vfmadd_vf_f32m2_m ( ... ) __riscv_vfmadd_vf_f32m2_tumu(__VA_ARGS__)

◆ vfmadd_vf_f32m4

#define vfmadd_vf_f32m4 ( ... ) __riscv_vfmadd_vf_f32m4_tu(__VA_ARGS__)

◆ vfmadd_vf_f32m4_m

#define vfmadd_vf_f32m4_m ( ... ) __riscv_vfmadd_vf_f32m4_tumu(__VA_ARGS__)

◆ vfmadd_vf_f32m8

#define vfmadd_vf_f32m8 ( ... ) __riscv_vfmadd_vf_f32m8_tu(__VA_ARGS__)

◆ vfmadd_vf_f32m8_m

#define vfmadd_vf_f32m8_m ( ... ) __riscv_vfmadd_vf_f32m8_tumu(__VA_ARGS__)

◆ vfmadd_vf_f32mf2

#define vfmadd_vf_f32mf2 ( ... ) __riscv_vfmadd_vf_f32mf2_tu(__VA_ARGS__)

◆ vfmadd_vf_f32mf2_m

#define vfmadd_vf_f32mf2_m ( ... ) __riscv_vfmadd_vf_f32mf2_tumu(__VA_ARGS__)

◆ vfmadd_vf_f64m1

#define vfmadd_vf_f64m1 ( ... ) __riscv_vfmadd_vf_f64m1_tu(__VA_ARGS__)

◆ vfmadd_vf_f64m1_m

#define vfmadd_vf_f64m1_m ( ... ) __riscv_vfmadd_vf_f64m1_tumu(__VA_ARGS__)

◆ vfmadd_vf_f64m2

#define vfmadd_vf_f64m2 ( ... ) __riscv_vfmadd_vf_f64m2_tu(__VA_ARGS__)

◆ vfmadd_vf_f64m2_m

#define vfmadd_vf_f64m2_m ( ... ) __riscv_vfmadd_vf_f64m2_tumu(__VA_ARGS__)

◆ vfmadd_vf_f64m4

#define vfmadd_vf_f64m4 ( ... ) __riscv_vfmadd_vf_f64m4_tu(__VA_ARGS__)

◆ vfmadd_vf_f64m4_m

#define vfmadd_vf_f64m4_m ( ... ) __riscv_vfmadd_vf_f64m4_tumu(__VA_ARGS__)

◆ vfmadd_vf_f64m8

#define vfmadd_vf_f64m8 ( ... ) __riscv_vfmadd_vf_f64m8_tu(__VA_ARGS__)

◆ vfmadd_vf_f64m8_m

#define vfmadd_vf_f64m8_m ( ... ) __riscv_vfmadd_vf_f64m8_tumu(__VA_ARGS__)

◆ vfmadd_vv_f16m1

#define vfmadd_vv_f16m1 ( ... ) __riscv_vfmadd_vv_f16m1_tu(__VA_ARGS__)

◆ vfmadd_vv_f16m1_m

#define vfmadd_vv_f16m1_m ( ... ) __riscv_vfmadd_vv_f16m1_tumu(__VA_ARGS__)

◆ vfmadd_vv_f16m2

#define vfmadd_vv_f16m2 ( ... ) __riscv_vfmadd_vv_f16m2_tu(__VA_ARGS__)

◆ vfmadd_vv_f16m2_m

#define vfmadd_vv_f16m2_m ( ... ) __riscv_vfmadd_vv_f16m2_tumu(__VA_ARGS__)

◆ vfmadd_vv_f16m4

#define vfmadd_vv_f16m4 ( ... ) __riscv_vfmadd_vv_f16m4_tu(__VA_ARGS__)

◆ vfmadd_vv_f16m4_m

#define vfmadd_vv_f16m4_m ( ... ) __riscv_vfmadd_vv_f16m4_tumu(__VA_ARGS__)

◆ vfmadd_vv_f16m8

#define vfmadd_vv_f16m8 ( ... ) __riscv_vfmadd_vv_f16m8_tu(__VA_ARGS__)

◆ vfmadd_vv_f16m8_m

#define vfmadd_vv_f16m8_m ( ... ) __riscv_vfmadd_vv_f16m8_tumu(__VA_ARGS__)

◆ vfmadd_vv_f16mf2

#define vfmadd_vv_f16mf2 ( ... ) __riscv_vfmadd_vv_f16mf2_tu(__VA_ARGS__)

◆ vfmadd_vv_f16mf2_m

#define vfmadd_vv_f16mf2_m ( ... ) __riscv_vfmadd_vv_f16mf2_tumu(__VA_ARGS__)

◆ vfmadd_vv_f16mf4

#define vfmadd_vv_f16mf4 ( ... ) __riscv_vfmadd_vv_f16mf4_tu(__VA_ARGS__)

◆ vfmadd_vv_f16mf4_m

#define vfmadd_vv_f16mf4_m ( ... ) __riscv_vfmadd_vv_f16mf4_tumu(__VA_ARGS__)

◆ vfmadd_vv_f32m1

#define vfmadd_vv_f32m1 ( ... ) __riscv_vfmadd_vv_f32m1_tu(__VA_ARGS__)

◆ vfmadd_vv_f32m1_m

#define vfmadd_vv_f32m1_m ( ... ) __riscv_vfmadd_vv_f32m1_tumu(__VA_ARGS__)

◆ vfmadd_vv_f32m2

#define vfmadd_vv_f32m2 ( ... ) __riscv_vfmadd_vv_f32m2_tu(__VA_ARGS__)

◆ vfmadd_vv_f32m2_m

#define vfmadd_vv_f32m2_m ( ... ) __riscv_vfmadd_vv_f32m2_tumu(__VA_ARGS__)

◆ vfmadd_vv_f32m4

#define vfmadd_vv_f32m4 ( ... ) __riscv_vfmadd_vv_f32m4_tu(__VA_ARGS__)

◆ vfmadd_vv_f32m4_m

#define vfmadd_vv_f32m4_m ( ... ) __riscv_vfmadd_vv_f32m4_tumu(__VA_ARGS__)

◆ vfmadd_vv_f32m8

#define vfmadd_vv_f32m8 ( ... ) __riscv_vfmadd_vv_f32m8_tu(__VA_ARGS__)

◆ vfmadd_vv_f32m8_m

#define vfmadd_vv_f32m8_m ( ... ) __riscv_vfmadd_vv_f32m8_tumu(__VA_ARGS__)

◆ vfmadd_vv_f32mf2

#define vfmadd_vv_f32mf2 ( ... ) __riscv_vfmadd_vv_f32mf2_tu(__VA_ARGS__)

◆ vfmadd_vv_f32mf2_m

#define vfmadd_vv_f32mf2_m ( ... ) __riscv_vfmadd_vv_f32mf2_tumu(__VA_ARGS__)

◆ vfmadd_vv_f64m1

#define vfmadd_vv_f64m1 ( ... ) __riscv_vfmadd_vv_f64m1_tu(__VA_ARGS__)

◆ vfmadd_vv_f64m1_m

#define vfmadd_vv_f64m1_m ( ... ) __riscv_vfmadd_vv_f64m1_tumu(__VA_ARGS__)

◆ vfmadd_vv_f64m2

#define vfmadd_vv_f64m2 ( ... ) __riscv_vfmadd_vv_f64m2_tu(__VA_ARGS__)

◆ vfmadd_vv_f64m2_m

#define vfmadd_vv_f64m2_m ( ... ) __riscv_vfmadd_vv_f64m2_tumu(__VA_ARGS__)

◆ vfmadd_vv_f64m4

#define vfmadd_vv_f64m4 ( ... ) __riscv_vfmadd_vv_f64m4_tu(__VA_ARGS__)

◆ vfmadd_vv_f64m4_m

#define vfmadd_vv_f64m4_m ( ... ) __riscv_vfmadd_vv_f64m4_tumu(__VA_ARGS__)

◆ vfmadd_vv_f64m8

#define vfmadd_vv_f64m8 ( ... ) __riscv_vfmadd_vv_f64m8_tu(__VA_ARGS__)

◆ vfmadd_vv_f64m8_m

#define vfmadd_vv_f64m8_m ( ... ) __riscv_vfmadd_vv_f64m8_tumu(__VA_ARGS__)

◆ vfmax_vf_f16m1

#define vfmax_vf_f16m1 ( ... ) __riscv_vfmax_vf_f16m1(__VA_ARGS__)

◆ vfmax_vf_f16m1_m

#define vfmax_vf_f16m1_m ( ... ) __riscv_vfmax_vf_f16m1_tumu(__VA_ARGS__)

◆ vfmax_vf_f16m2

#define vfmax_vf_f16m2 ( ... ) __riscv_vfmax_vf_f16m2(__VA_ARGS__)

◆ vfmax_vf_f16m2_m

#define vfmax_vf_f16m2_m ( ... ) __riscv_vfmax_vf_f16m2_tumu(__VA_ARGS__)

◆ vfmax_vf_f16m4

#define vfmax_vf_f16m4 ( ... ) __riscv_vfmax_vf_f16m4(__VA_ARGS__)

◆ vfmax_vf_f16m4_m

#define vfmax_vf_f16m4_m ( ... ) __riscv_vfmax_vf_f16m4_tumu(__VA_ARGS__)

◆ vfmax_vf_f16m8

#define vfmax_vf_f16m8 ( ... ) __riscv_vfmax_vf_f16m8(__VA_ARGS__)

◆ vfmax_vf_f16m8_m

#define vfmax_vf_f16m8_m ( ... ) __riscv_vfmax_vf_f16m8_tumu(__VA_ARGS__)

◆ vfmax_vf_f16mf2

#define vfmax_vf_f16mf2 ( ... ) __riscv_vfmax_vf_f16mf2(__VA_ARGS__)

◆ vfmax_vf_f16mf2_m

#define vfmax_vf_f16mf2_m ( ... ) __riscv_vfmax_vf_f16mf2_tumu(__VA_ARGS__)

◆ vfmax_vf_f16mf4

#define vfmax_vf_f16mf4 ( ... ) __riscv_vfmax_vf_f16mf4(__VA_ARGS__)

◆ vfmax_vf_f16mf4_m

#define vfmax_vf_f16mf4_m ( ... ) __riscv_vfmax_vf_f16mf4_tumu(__VA_ARGS__)

◆ vfmax_vf_f32m1

#define vfmax_vf_f32m1 ( ... ) __riscv_vfmax_vf_f32m1(__VA_ARGS__)

◆ vfmax_vf_f32m1_m

#define vfmax_vf_f32m1_m ( ... ) __riscv_vfmax_vf_f32m1_tumu(__VA_ARGS__)

◆ vfmax_vf_f32m2

#define vfmax_vf_f32m2 ( ... ) __riscv_vfmax_vf_f32m2(__VA_ARGS__)

◆ vfmax_vf_f32m2_m

#define vfmax_vf_f32m2_m ( ... ) __riscv_vfmax_vf_f32m2_tumu(__VA_ARGS__)

◆ vfmax_vf_f32m4

#define vfmax_vf_f32m4 ( ... ) __riscv_vfmax_vf_f32m4(__VA_ARGS__)

◆ vfmax_vf_f32m4_m

#define vfmax_vf_f32m4_m ( ... ) __riscv_vfmax_vf_f32m4_tumu(__VA_ARGS__)

◆ vfmax_vf_f32m8

#define vfmax_vf_f32m8 ( ... ) __riscv_vfmax_vf_f32m8(__VA_ARGS__)

◆ vfmax_vf_f32m8_m

#define vfmax_vf_f32m8_m ( ... ) __riscv_vfmax_vf_f32m8_tumu(__VA_ARGS__)

◆ vfmax_vf_f32mf2

#define vfmax_vf_f32mf2 ( ... ) __riscv_vfmax_vf_f32mf2(__VA_ARGS__)

◆ vfmax_vf_f32mf2_m

#define vfmax_vf_f32mf2_m ( ... ) __riscv_vfmax_vf_f32mf2_tumu(__VA_ARGS__)

◆ vfmax_vf_f64m1

#define vfmax_vf_f64m1 ( ... ) __riscv_vfmax_vf_f64m1(__VA_ARGS__)

◆ vfmax_vf_f64m1_m

#define vfmax_vf_f64m1_m ( ... ) __riscv_vfmax_vf_f64m1_tumu(__VA_ARGS__)

◆ vfmax_vf_f64m2

#define vfmax_vf_f64m2 ( ... ) __riscv_vfmax_vf_f64m2(__VA_ARGS__)

◆ vfmax_vf_f64m2_m

#define vfmax_vf_f64m2_m ( ... ) __riscv_vfmax_vf_f64m2_tumu(__VA_ARGS__)

◆ vfmax_vf_f64m4

#define vfmax_vf_f64m4 ( ... ) __riscv_vfmax_vf_f64m4(__VA_ARGS__)

◆ vfmax_vf_f64m4_m

#define vfmax_vf_f64m4_m ( ... ) __riscv_vfmax_vf_f64m4_tumu(__VA_ARGS__)

◆ vfmax_vf_f64m8

#define vfmax_vf_f64m8 ( ... ) __riscv_vfmax_vf_f64m8(__VA_ARGS__)

◆ vfmax_vf_f64m8_m

#define vfmax_vf_f64m8_m ( ... ) __riscv_vfmax_vf_f64m8_tumu(__VA_ARGS__)

◆ vfmax_vv_f16m1

#define vfmax_vv_f16m1 ( ... ) __riscv_vfmax_vv_f16m1(__VA_ARGS__)

◆ vfmax_vv_f16m1_m

#define vfmax_vv_f16m1_m ( ... ) __riscv_vfmax_vv_f16m1_tumu(__VA_ARGS__)

◆ vfmax_vv_f16m2

#define vfmax_vv_f16m2 ( ... ) __riscv_vfmax_vv_f16m2(__VA_ARGS__)

◆ vfmax_vv_f16m2_m

#define vfmax_vv_f16m2_m ( ... ) __riscv_vfmax_vv_f16m2_tumu(__VA_ARGS__)

◆ vfmax_vv_f16m4

#define vfmax_vv_f16m4 ( ... ) __riscv_vfmax_vv_f16m4(__VA_ARGS__)

◆ vfmax_vv_f16m4_m

#define vfmax_vv_f16m4_m ( ... ) __riscv_vfmax_vv_f16m4_tumu(__VA_ARGS__)

◆ vfmax_vv_f16m8

#define vfmax_vv_f16m8 ( ... ) __riscv_vfmax_vv_f16m8(__VA_ARGS__)

◆ vfmax_vv_f16m8_m

#define vfmax_vv_f16m8_m ( ... ) __riscv_vfmax_vv_f16m8_tumu(__VA_ARGS__)

◆ vfmax_vv_f16mf2

#define vfmax_vv_f16mf2 ( ... ) __riscv_vfmax_vv_f16mf2(__VA_ARGS__)

◆ vfmax_vv_f16mf2_m

#define vfmax_vv_f16mf2_m ( ... ) __riscv_vfmax_vv_f16mf2_tumu(__VA_ARGS__)

◆ vfmax_vv_f16mf4

#define vfmax_vv_f16mf4 ( ... ) __riscv_vfmax_vv_f16mf4(__VA_ARGS__)

◆ vfmax_vv_f16mf4_m

#define vfmax_vv_f16mf4_m ( ... ) __riscv_vfmax_vv_f16mf4_tumu(__VA_ARGS__)

◆ vfmax_vv_f32m1

#define vfmax_vv_f32m1 ( ... ) __riscv_vfmax_vv_f32m1(__VA_ARGS__)

◆ vfmax_vv_f32m1_m

#define vfmax_vv_f32m1_m ( ... ) __riscv_vfmax_vv_f32m1_tumu(__VA_ARGS__)

◆ vfmax_vv_f32m2

#define vfmax_vv_f32m2 ( ... ) __riscv_vfmax_vv_f32m2(__VA_ARGS__)

◆ vfmax_vv_f32m2_m

#define vfmax_vv_f32m2_m ( ... ) __riscv_vfmax_vv_f32m2_tumu(__VA_ARGS__)

◆ vfmax_vv_f32m4

#define vfmax_vv_f32m4 ( ... ) __riscv_vfmax_vv_f32m4(__VA_ARGS__)

◆ vfmax_vv_f32m4_m

#define vfmax_vv_f32m4_m ( ... ) __riscv_vfmax_vv_f32m4_tumu(__VA_ARGS__)

◆ vfmax_vv_f32m8

#define vfmax_vv_f32m8 ( ... ) __riscv_vfmax_vv_f32m8(__VA_ARGS__)

◆ vfmax_vv_f32m8_m

#define vfmax_vv_f32m8_m ( ... ) __riscv_vfmax_vv_f32m8_tumu(__VA_ARGS__)

◆ vfmax_vv_f32mf2

#define vfmax_vv_f32mf2 ( ... ) __riscv_vfmax_vv_f32mf2(__VA_ARGS__)

◆ vfmax_vv_f32mf2_m

#define vfmax_vv_f32mf2_m ( ... ) __riscv_vfmax_vv_f32mf2_tumu(__VA_ARGS__)

◆ vfmax_vv_f64m1

#define vfmax_vv_f64m1 ( ... ) __riscv_vfmax_vv_f64m1(__VA_ARGS__)

◆ vfmax_vv_f64m1_m

#define vfmax_vv_f64m1_m ( ... ) __riscv_vfmax_vv_f64m1_tumu(__VA_ARGS__)

◆ vfmax_vv_f64m2

#define vfmax_vv_f64m2 ( ... ) __riscv_vfmax_vv_f64m2(__VA_ARGS__)

◆ vfmax_vv_f64m2_m

#define vfmax_vv_f64m2_m ( ... ) __riscv_vfmax_vv_f64m2_tumu(__VA_ARGS__)

◆ vfmax_vv_f64m4

#define vfmax_vv_f64m4 ( ... ) __riscv_vfmax_vv_f64m4(__VA_ARGS__)

◆ vfmax_vv_f64m4_m

#define vfmax_vv_f64m4_m ( ... ) __riscv_vfmax_vv_f64m4_tumu(__VA_ARGS__)

◆ vfmax_vv_f64m8

#define vfmax_vv_f64m8 ( ... ) __riscv_vfmax_vv_f64m8(__VA_ARGS__)

◆ vfmax_vv_f64m8_m

#define vfmax_vv_f64m8_m ( ... ) __riscv_vfmax_vv_f64m8_tumu(__VA_ARGS__)

◆ vfmerge_vfm_f16m1

#define vfmerge_vfm_f16m1	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vfmerge_vfm_f16m1((op1), (op2), (mask), (vl))

◆ vfmerge_vfm_f16m2

#define vfmerge_vfm_f16m2	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vfmerge_vfm_f16m2((op1), (op2), (mask), (vl))

◆ vfmerge_vfm_f16m4

#define vfmerge_vfm_f16m4	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vfmerge_vfm_f16m4((op1), (op2), (mask), (vl))

◆ vfmerge_vfm_f16m8

#define vfmerge_vfm_f16m8	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vfmerge_vfm_f16m8((op1), (op2), (mask), (vl))

◆ vfmerge_vfm_f16mf2

#define vfmerge_vfm_f16mf2	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vfmerge_vfm_f16mf2((op1), (op2), (mask), (vl))

◆ vfmerge_vfm_f16mf4

#define vfmerge_vfm_f16mf4	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vfmerge_vfm_f16mf4((op1), (op2), (mask), (vl))

◆ vfmerge_vfm_f32m1

#define vfmerge_vfm_f32m1	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vfmerge_vfm_f32m1((op1), (op2), (mask), (vl))

◆ vfmerge_vfm_f32m2

#define vfmerge_vfm_f32m2	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vfmerge_vfm_f32m2((op1), (op2), (mask), (vl))

◆ vfmerge_vfm_f32m4

#define vfmerge_vfm_f32m4	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vfmerge_vfm_f32m4((op1), (op2), (mask), (vl))

◆ vfmerge_vfm_f32m8

#define vfmerge_vfm_f32m8	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vfmerge_vfm_f32m8((op1), (op2), (mask), (vl))

◆ vfmerge_vfm_f32mf2

#define vfmerge_vfm_f32mf2	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vfmerge_vfm_f32mf2((op1), (op2), (mask), (vl))

◆ vfmerge_vfm_f64m1

#define vfmerge_vfm_f64m1	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vfmerge_vfm_f64m1((op1), (op2), (mask), (vl))

◆ vfmerge_vfm_f64m2

#define vfmerge_vfm_f64m2	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vfmerge_vfm_f64m2((op1), (op2), (mask), (vl))

◆ vfmerge_vfm_f64m4

#define vfmerge_vfm_f64m4	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vfmerge_vfm_f64m4((op1), (op2), (mask), (vl))

◆ vfmerge_vfm_f64m8

#define vfmerge_vfm_f64m8	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vfmerge_vfm_f64m8((op1), (op2), (mask), (vl))

◆ vfmin_vf_f16m1

#define vfmin_vf_f16m1 ( ... ) __riscv_vfmin_vf_f16m1(__VA_ARGS__)

◆ vfmin_vf_f16m1_m

#define vfmin_vf_f16m1_m ( ... ) __riscv_vfmin_vf_f16m1_tumu(__VA_ARGS__)

◆ vfmin_vf_f16m2

#define vfmin_vf_f16m2 ( ... ) __riscv_vfmin_vf_f16m2(__VA_ARGS__)

◆ vfmin_vf_f16m2_m

#define vfmin_vf_f16m2_m ( ... ) __riscv_vfmin_vf_f16m2_tumu(__VA_ARGS__)

◆ vfmin_vf_f16m4

#define vfmin_vf_f16m4 ( ... ) __riscv_vfmin_vf_f16m4(__VA_ARGS__)

◆ vfmin_vf_f16m4_m

#define vfmin_vf_f16m4_m ( ... ) __riscv_vfmin_vf_f16m4_tumu(__VA_ARGS__)

◆ vfmin_vf_f16m8

#define vfmin_vf_f16m8 ( ... ) __riscv_vfmin_vf_f16m8(__VA_ARGS__)

◆ vfmin_vf_f16m8_m

#define vfmin_vf_f16m8_m ( ... ) __riscv_vfmin_vf_f16m8_tumu(__VA_ARGS__)

◆ vfmin_vf_f16mf2

#define vfmin_vf_f16mf2 ( ... ) __riscv_vfmin_vf_f16mf2(__VA_ARGS__)

◆ vfmin_vf_f16mf2_m

#define vfmin_vf_f16mf2_m ( ... ) __riscv_vfmin_vf_f16mf2_tumu(__VA_ARGS__)

◆ vfmin_vf_f16mf4

#define vfmin_vf_f16mf4 ( ... ) __riscv_vfmin_vf_f16mf4(__VA_ARGS__)

◆ vfmin_vf_f16mf4_m

#define vfmin_vf_f16mf4_m ( ... ) __riscv_vfmin_vf_f16mf4_tumu(__VA_ARGS__)

◆ vfmin_vf_f32m1

#define vfmin_vf_f32m1 ( ... ) __riscv_vfmin_vf_f32m1(__VA_ARGS__)

◆ vfmin_vf_f32m1_m

#define vfmin_vf_f32m1_m ( ... ) __riscv_vfmin_vf_f32m1_tumu(__VA_ARGS__)

◆ vfmin_vf_f32m2

#define vfmin_vf_f32m2 ( ... ) __riscv_vfmin_vf_f32m2(__VA_ARGS__)

◆ vfmin_vf_f32m2_m

#define vfmin_vf_f32m2_m ( ... ) __riscv_vfmin_vf_f32m2_tumu(__VA_ARGS__)

◆ vfmin_vf_f32m4

#define vfmin_vf_f32m4 ( ... ) __riscv_vfmin_vf_f32m4(__VA_ARGS__)

◆ vfmin_vf_f32m4_m

#define vfmin_vf_f32m4_m ( ... ) __riscv_vfmin_vf_f32m4_tumu(__VA_ARGS__)

◆ vfmin_vf_f32m8

#define vfmin_vf_f32m8 ( ... ) __riscv_vfmin_vf_f32m8(__VA_ARGS__)

◆ vfmin_vf_f32m8_m

#define vfmin_vf_f32m8_m ( ... ) __riscv_vfmin_vf_f32m8_tumu(__VA_ARGS__)

◆ vfmin_vf_f32mf2

#define vfmin_vf_f32mf2 ( ... ) __riscv_vfmin_vf_f32mf2(__VA_ARGS__)

◆ vfmin_vf_f32mf2_m

#define vfmin_vf_f32mf2_m ( ... ) __riscv_vfmin_vf_f32mf2_tumu(__VA_ARGS__)

◆ vfmin_vf_f64m1

#define vfmin_vf_f64m1 ( ... ) __riscv_vfmin_vf_f64m1(__VA_ARGS__)

◆ vfmin_vf_f64m1_m

#define vfmin_vf_f64m1_m ( ... ) __riscv_vfmin_vf_f64m1_tumu(__VA_ARGS__)

◆ vfmin_vf_f64m2

#define vfmin_vf_f64m2 ( ... ) __riscv_vfmin_vf_f64m2(__VA_ARGS__)

◆ vfmin_vf_f64m2_m

#define vfmin_vf_f64m2_m ( ... ) __riscv_vfmin_vf_f64m2_tumu(__VA_ARGS__)

◆ vfmin_vf_f64m4

#define vfmin_vf_f64m4 ( ... ) __riscv_vfmin_vf_f64m4(__VA_ARGS__)

◆ vfmin_vf_f64m4_m

#define vfmin_vf_f64m4_m ( ... ) __riscv_vfmin_vf_f64m4_tumu(__VA_ARGS__)

◆ vfmin_vf_f64m8

#define vfmin_vf_f64m8 ( ... ) __riscv_vfmin_vf_f64m8(__VA_ARGS__)

◆ vfmin_vf_f64m8_m

#define vfmin_vf_f64m8_m ( ... ) __riscv_vfmin_vf_f64m8_tumu(__VA_ARGS__)

◆ vfmin_vv_f16m1

#define vfmin_vv_f16m1 ( ... ) __riscv_vfmin_vv_f16m1(__VA_ARGS__)

◆ vfmin_vv_f16m1_m

#define vfmin_vv_f16m1_m ( ... ) __riscv_vfmin_vv_f16m1_tumu(__VA_ARGS__)

◆ vfmin_vv_f16m2

#define vfmin_vv_f16m2 ( ... ) __riscv_vfmin_vv_f16m2(__VA_ARGS__)

◆ vfmin_vv_f16m2_m

#define vfmin_vv_f16m2_m ( ... ) __riscv_vfmin_vv_f16m2_tumu(__VA_ARGS__)

◆ vfmin_vv_f16m4

#define vfmin_vv_f16m4 ( ... ) __riscv_vfmin_vv_f16m4(__VA_ARGS__)

◆ vfmin_vv_f16m4_m

#define vfmin_vv_f16m4_m ( ... ) __riscv_vfmin_vv_f16m4_tumu(__VA_ARGS__)

◆ vfmin_vv_f16m8

#define vfmin_vv_f16m8 ( ... ) __riscv_vfmin_vv_f16m8(__VA_ARGS__)

◆ vfmin_vv_f16m8_m

#define vfmin_vv_f16m8_m ( ... ) __riscv_vfmin_vv_f16m8_tumu(__VA_ARGS__)

◆ vfmin_vv_f16mf2

#define vfmin_vv_f16mf2 ( ... ) __riscv_vfmin_vv_f16mf2(__VA_ARGS__)

◆ vfmin_vv_f16mf2_m

#define vfmin_vv_f16mf2_m ( ... ) __riscv_vfmin_vv_f16mf2_tumu(__VA_ARGS__)

◆ vfmin_vv_f16mf4

#define vfmin_vv_f16mf4 ( ... ) __riscv_vfmin_vv_f16mf4(__VA_ARGS__)

◆ vfmin_vv_f16mf4_m

#define vfmin_vv_f16mf4_m ( ... ) __riscv_vfmin_vv_f16mf4_tumu(__VA_ARGS__)

◆ vfmin_vv_f32m1

#define vfmin_vv_f32m1 ( ... ) __riscv_vfmin_vv_f32m1(__VA_ARGS__)

◆ vfmin_vv_f32m1_m

#define vfmin_vv_f32m1_m ( ... ) __riscv_vfmin_vv_f32m1_tumu(__VA_ARGS__)

◆ vfmin_vv_f32m2

#define vfmin_vv_f32m2 ( ... ) __riscv_vfmin_vv_f32m2(__VA_ARGS__)

◆ vfmin_vv_f32m2_m

#define vfmin_vv_f32m2_m ( ... ) __riscv_vfmin_vv_f32m2_tumu(__VA_ARGS__)

◆ vfmin_vv_f32m4

#define vfmin_vv_f32m4 ( ... ) __riscv_vfmin_vv_f32m4(__VA_ARGS__)

◆ vfmin_vv_f32m4_m

#define vfmin_vv_f32m4_m ( ... ) __riscv_vfmin_vv_f32m4_tumu(__VA_ARGS__)

◆ vfmin_vv_f32m8

#define vfmin_vv_f32m8 ( ... ) __riscv_vfmin_vv_f32m8(__VA_ARGS__)

◆ vfmin_vv_f32m8_m

#define vfmin_vv_f32m8_m ( ... ) __riscv_vfmin_vv_f32m8_tumu(__VA_ARGS__)

◆ vfmin_vv_f32mf2

#define vfmin_vv_f32mf2 ( ... ) __riscv_vfmin_vv_f32mf2(__VA_ARGS__)

◆ vfmin_vv_f32mf2_m

#define vfmin_vv_f32mf2_m ( ... ) __riscv_vfmin_vv_f32mf2_tumu(__VA_ARGS__)

◆ vfmin_vv_f64m1

#define vfmin_vv_f64m1 ( ... ) __riscv_vfmin_vv_f64m1(__VA_ARGS__)

◆ vfmin_vv_f64m1_m

#define vfmin_vv_f64m1_m ( ... ) __riscv_vfmin_vv_f64m1_tumu(__VA_ARGS__)

◆ vfmin_vv_f64m2

#define vfmin_vv_f64m2 ( ... ) __riscv_vfmin_vv_f64m2(__VA_ARGS__)

◆ vfmin_vv_f64m2_m

#define vfmin_vv_f64m2_m ( ... ) __riscv_vfmin_vv_f64m2_tumu(__VA_ARGS__)

◆ vfmin_vv_f64m4

#define vfmin_vv_f64m4 ( ... ) __riscv_vfmin_vv_f64m4(__VA_ARGS__)

◆ vfmin_vv_f64m4_m

#define vfmin_vv_f64m4_m ( ... ) __riscv_vfmin_vv_f64m4_tumu(__VA_ARGS__)

◆ vfmin_vv_f64m8

#define vfmin_vv_f64m8 ( ... ) __riscv_vfmin_vv_f64m8(__VA_ARGS__)

◆ vfmin_vv_f64m8_m

#define vfmin_vv_f64m8_m ( ... ) __riscv_vfmin_vv_f64m8_tumu(__VA_ARGS__)

◆ vfmsac_vf_f16m1

#define vfmsac_vf_f16m1 ( ... ) __riscv_vfmsac_vf_f16m1_tu(__VA_ARGS__)

◆ vfmsac_vf_f16m1_m

#define vfmsac_vf_f16m1_m ( ... ) __riscv_vfmsac_vf_f16m1_tumu(__VA_ARGS__)

◆ vfmsac_vf_f16m2

#define vfmsac_vf_f16m2 ( ... ) __riscv_vfmsac_vf_f16m2_tu(__VA_ARGS__)

◆ vfmsac_vf_f16m2_m

#define vfmsac_vf_f16m2_m ( ... ) __riscv_vfmsac_vf_f16m2_tumu(__VA_ARGS__)

◆ vfmsac_vf_f16m4

#define vfmsac_vf_f16m4 ( ... ) __riscv_vfmsac_vf_f16m4_tu(__VA_ARGS__)

◆ vfmsac_vf_f16m4_m

#define vfmsac_vf_f16m4_m ( ... ) __riscv_vfmsac_vf_f16m4_tumu(__VA_ARGS__)

◆ vfmsac_vf_f16m8

#define vfmsac_vf_f16m8 ( ... ) __riscv_vfmsac_vf_f16m8_tu(__VA_ARGS__)

◆ vfmsac_vf_f16m8_m

#define vfmsac_vf_f16m8_m ( ... ) __riscv_vfmsac_vf_f16m8_tumu(__VA_ARGS__)

◆ vfmsac_vf_f16mf2

#define vfmsac_vf_f16mf2 ( ... ) __riscv_vfmsac_vf_f16mf2_tu(__VA_ARGS__)

◆ vfmsac_vf_f16mf2_m

#define vfmsac_vf_f16mf2_m ( ... ) __riscv_vfmsac_vf_f16mf2_tumu(__VA_ARGS__)

◆ vfmsac_vf_f16mf4

#define vfmsac_vf_f16mf4 ( ... ) __riscv_vfmsac_vf_f16mf4_tu(__VA_ARGS__)

◆ vfmsac_vf_f16mf4_m

#define vfmsac_vf_f16mf4_m ( ... ) __riscv_vfmsac_vf_f16mf4_tumu(__VA_ARGS__)

◆ vfmsac_vf_f32m1

#define vfmsac_vf_f32m1 ( ... ) __riscv_vfmsac_vf_f32m1_tu(__VA_ARGS__)

◆ vfmsac_vf_f32m1_m

#define vfmsac_vf_f32m1_m ( ... ) __riscv_vfmsac_vf_f32m1_tumu(__VA_ARGS__)

◆ vfmsac_vf_f32m2

#define vfmsac_vf_f32m2 ( ... ) __riscv_vfmsac_vf_f32m2_tu(__VA_ARGS__)

◆ vfmsac_vf_f32m2_m

#define vfmsac_vf_f32m2_m ( ... ) __riscv_vfmsac_vf_f32m2_tumu(__VA_ARGS__)

◆ vfmsac_vf_f32m4

#define vfmsac_vf_f32m4 ( ... ) __riscv_vfmsac_vf_f32m4_tu(__VA_ARGS__)

◆ vfmsac_vf_f32m4_m

#define vfmsac_vf_f32m4_m ( ... ) __riscv_vfmsac_vf_f32m4_tumu(__VA_ARGS__)

◆ vfmsac_vf_f32m8

#define vfmsac_vf_f32m8 ( ... ) __riscv_vfmsac_vf_f32m8_tu(__VA_ARGS__)

◆ vfmsac_vf_f32m8_m

#define vfmsac_vf_f32m8_m ( ... ) __riscv_vfmsac_vf_f32m8_tumu(__VA_ARGS__)

◆ vfmsac_vf_f32mf2

#define vfmsac_vf_f32mf2 ( ... ) __riscv_vfmsac_vf_f32mf2_tu(__VA_ARGS__)

◆ vfmsac_vf_f32mf2_m

#define vfmsac_vf_f32mf2_m ( ... ) __riscv_vfmsac_vf_f32mf2_tumu(__VA_ARGS__)

◆ vfmsac_vf_f64m1

#define vfmsac_vf_f64m1 ( ... ) __riscv_vfmsac_vf_f64m1_tu(__VA_ARGS__)

◆ vfmsac_vf_f64m1_m

#define vfmsac_vf_f64m1_m ( ... ) __riscv_vfmsac_vf_f64m1_tumu(__VA_ARGS__)

◆ vfmsac_vf_f64m2

#define vfmsac_vf_f64m2 ( ... ) __riscv_vfmsac_vf_f64m2_tu(__VA_ARGS__)

◆ vfmsac_vf_f64m2_m

#define vfmsac_vf_f64m2_m ( ... ) __riscv_vfmsac_vf_f64m2_tumu(__VA_ARGS__)

◆ vfmsac_vf_f64m4

#define vfmsac_vf_f64m4 ( ... ) __riscv_vfmsac_vf_f64m4_tu(__VA_ARGS__)

◆ vfmsac_vf_f64m4_m

#define vfmsac_vf_f64m4_m ( ... ) __riscv_vfmsac_vf_f64m4_tumu(__VA_ARGS__)

◆ vfmsac_vf_f64m8

#define vfmsac_vf_f64m8 ( ... ) __riscv_vfmsac_vf_f64m8_tu(__VA_ARGS__)

◆ vfmsac_vf_f64m8_m

#define vfmsac_vf_f64m8_m ( ... ) __riscv_vfmsac_vf_f64m8_tumu(__VA_ARGS__)

◆ vfmsac_vv_f16m1

#define vfmsac_vv_f16m1 ( ... ) __riscv_vfmsac_vv_f16m1_tu(__VA_ARGS__)

◆ vfmsac_vv_f16m1_m

#define vfmsac_vv_f16m1_m ( ... ) __riscv_vfmsac_vv_f16m1_tumu(__VA_ARGS__)

◆ vfmsac_vv_f16m2

#define vfmsac_vv_f16m2 ( ... ) __riscv_vfmsac_vv_f16m2_tu(__VA_ARGS__)

◆ vfmsac_vv_f16m2_m

#define vfmsac_vv_f16m2_m ( ... ) __riscv_vfmsac_vv_f16m2_tumu(__VA_ARGS__)

◆ vfmsac_vv_f16m4

#define vfmsac_vv_f16m4 ( ... ) __riscv_vfmsac_vv_f16m4_tu(__VA_ARGS__)

◆ vfmsac_vv_f16m4_m

#define vfmsac_vv_f16m4_m ( ... ) __riscv_vfmsac_vv_f16m4_tumu(__VA_ARGS__)

◆ vfmsac_vv_f16m8

#define vfmsac_vv_f16m8 ( ... ) __riscv_vfmsac_vv_f16m8_tu(__VA_ARGS__)

◆ vfmsac_vv_f16m8_m

#define vfmsac_vv_f16m8_m ( ... ) __riscv_vfmsac_vv_f16m8_tumu(__VA_ARGS__)

◆ vfmsac_vv_f16mf2

#define vfmsac_vv_f16mf2 ( ... ) __riscv_vfmsac_vv_f16mf2_tu(__VA_ARGS__)

◆ vfmsac_vv_f16mf2_m

#define vfmsac_vv_f16mf2_m ( ... ) __riscv_vfmsac_vv_f16mf2_tumu(__VA_ARGS__)

◆ vfmsac_vv_f16mf4

#define vfmsac_vv_f16mf4 ( ... ) __riscv_vfmsac_vv_f16mf4_tu(__VA_ARGS__)

◆ vfmsac_vv_f16mf4_m

#define vfmsac_vv_f16mf4_m ( ... ) __riscv_vfmsac_vv_f16mf4_tumu(__VA_ARGS__)

◆ vfmsac_vv_f32m1

#define vfmsac_vv_f32m1 ( ... ) __riscv_vfmsac_vv_f32m1_tu(__VA_ARGS__)

◆ vfmsac_vv_f32m1_m

#define vfmsac_vv_f32m1_m ( ... ) __riscv_vfmsac_vv_f32m1_tumu(__VA_ARGS__)

◆ vfmsac_vv_f32m2

#define vfmsac_vv_f32m2 ( ... ) __riscv_vfmsac_vv_f32m2_tu(__VA_ARGS__)

◆ vfmsac_vv_f32m2_m

#define vfmsac_vv_f32m2_m ( ... ) __riscv_vfmsac_vv_f32m2_tumu(__VA_ARGS__)

◆ vfmsac_vv_f32m4

#define vfmsac_vv_f32m4 ( ... ) __riscv_vfmsac_vv_f32m4_tu(__VA_ARGS__)

◆ vfmsac_vv_f32m4_m

#define vfmsac_vv_f32m4_m ( ... ) __riscv_vfmsac_vv_f32m4_tumu(__VA_ARGS__)

◆ vfmsac_vv_f32m8

#define vfmsac_vv_f32m8 ( ... ) __riscv_vfmsac_vv_f32m8_tu(__VA_ARGS__)

◆ vfmsac_vv_f32m8_m

#define vfmsac_vv_f32m8_m ( ... ) __riscv_vfmsac_vv_f32m8_tumu(__VA_ARGS__)

◆ vfmsac_vv_f32mf2

#define vfmsac_vv_f32mf2 ( ... ) __riscv_vfmsac_vv_f32mf2_tu(__VA_ARGS__)

◆ vfmsac_vv_f32mf2_m

#define vfmsac_vv_f32mf2_m ( ... ) __riscv_vfmsac_vv_f32mf2_tumu(__VA_ARGS__)

◆ vfmsac_vv_f64m1

#define vfmsac_vv_f64m1 ( ... ) __riscv_vfmsac_vv_f64m1_tu(__VA_ARGS__)

◆ vfmsac_vv_f64m1_m

#define vfmsac_vv_f64m1_m ( ... ) __riscv_vfmsac_vv_f64m1_tumu(__VA_ARGS__)

◆ vfmsac_vv_f64m2

#define vfmsac_vv_f64m2 ( ... ) __riscv_vfmsac_vv_f64m2_tu(__VA_ARGS__)

◆ vfmsac_vv_f64m2_m

#define vfmsac_vv_f64m2_m ( ... ) __riscv_vfmsac_vv_f64m2_tumu(__VA_ARGS__)

◆ vfmsac_vv_f64m4

#define vfmsac_vv_f64m4 ( ... ) __riscv_vfmsac_vv_f64m4_tu(__VA_ARGS__)

◆ vfmsac_vv_f64m4_m

#define vfmsac_vv_f64m4_m ( ... ) __riscv_vfmsac_vv_f64m4_tumu(__VA_ARGS__)

◆ vfmsac_vv_f64m8

#define vfmsac_vv_f64m8 ( ... ) __riscv_vfmsac_vv_f64m8_tu(__VA_ARGS__)

◆ vfmsac_vv_f64m8_m

#define vfmsac_vv_f64m8_m ( ... ) __riscv_vfmsac_vv_f64m8_tumu(__VA_ARGS__)

◆ vfmsub_vf_f16m1

#define vfmsub_vf_f16m1 ( ... ) __riscv_vfmsub_vf_f16m1_tu(__VA_ARGS__)

◆ vfmsub_vf_f16m1_m

#define vfmsub_vf_f16m1_m ( ... ) __riscv_vfmsub_vf_f16m1_tumu(__VA_ARGS__)

◆ vfmsub_vf_f16m2

#define vfmsub_vf_f16m2 ( ... ) __riscv_vfmsub_vf_f16m2_tu(__VA_ARGS__)

◆ vfmsub_vf_f16m2_m

#define vfmsub_vf_f16m2_m ( ... ) __riscv_vfmsub_vf_f16m2_tumu(__VA_ARGS__)

◆ vfmsub_vf_f16m4

#define vfmsub_vf_f16m4 ( ... ) __riscv_vfmsub_vf_f16m4_tu(__VA_ARGS__)

◆ vfmsub_vf_f16m4_m

#define vfmsub_vf_f16m4_m ( ... ) __riscv_vfmsub_vf_f16m4_tumu(__VA_ARGS__)

◆ vfmsub_vf_f16m8

#define vfmsub_vf_f16m8 ( ... ) __riscv_vfmsub_vf_f16m8_tu(__VA_ARGS__)

◆ vfmsub_vf_f16m8_m

#define vfmsub_vf_f16m8_m ( ... ) __riscv_vfmsub_vf_f16m8_tumu(__VA_ARGS__)

◆ vfmsub_vf_f16mf2

#define vfmsub_vf_f16mf2 ( ... ) __riscv_vfmsub_vf_f16mf2_tu(__VA_ARGS__)

◆ vfmsub_vf_f16mf2_m

#define vfmsub_vf_f16mf2_m ( ... ) __riscv_vfmsub_vf_f16mf2_tumu(__VA_ARGS__)

◆ vfmsub_vf_f16mf4

#define vfmsub_vf_f16mf4 ( ... ) __riscv_vfmsub_vf_f16mf4_tu(__VA_ARGS__)

◆ vfmsub_vf_f16mf4_m

#define vfmsub_vf_f16mf4_m ( ... ) __riscv_vfmsub_vf_f16mf4_tumu(__VA_ARGS__)

◆ vfmsub_vf_f32m1

#define vfmsub_vf_f32m1 ( ... ) __riscv_vfmsub_vf_f32m1_tu(__VA_ARGS__)

◆ vfmsub_vf_f32m1_m

#define vfmsub_vf_f32m1_m ( ... ) __riscv_vfmsub_vf_f32m1_tumu(__VA_ARGS__)

◆ vfmsub_vf_f32m2

#define vfmsub_vf_f32m2 ( ... ) __riscv_vfmsub_vf_f32m2_tu(__VA_ARGS__)

◆ vfmsub_vf_f32m2_m

#define vfmsub_vf_f32m2_m ( ... ) __riscv_vfmsub_vf_f32m2_tumu(__VA_ARGS__)

◆ vfmsub_vf_f32m4

#define vfmsub_vf_f32m4 ( ... ) __riscv_vfmsub_vf_f32m4_tu(__VA_ARGS__)

◆ vfmsub_vf_f32m4_m

#define vfmsub_vf_f32m4_m ( ... ) __riscv_vfmsub_vf_f32m4_tumu(__VA_ARGS__)

◆ vfmsub_vf_f32m8

#define vfmsub_vf_f32m8 ( ... ) __riscv_vfmsub_vf_f32m8_tu(__VA_ARGS__)

◆ vfmsub_vf_f32m8_m

#define vfmsub_vf_f32m8_m ( ... ) __riscv_vfmsub_vf_f32m8_tumu(__VA_ARGS__)

◆ vfmsub_vf_f32mf2

#define vfmsub_vf_f32mf2 ( ... ) __riscv_vfmsub_vf_f32mf2_tu(__VA_ARGS__)

◆ vfmsub_vf_f32mf2_m

#define vfmsub_vf_f32mf2_m ( ... ) __riscv_vfmsub_vf_f32mf2_tumu(__VA_ARGS__)

◆ vfmsub_vf_f64m1

#define vfmsub_vf_f64m1 ( ... ) __riscv_vfmsub_vf_f64m1_tu(__VA_ARGS__)

◆ vfmsub_vf_f64m1_m

#define vfmsub_vf_f64m1_m ( ... ) __riscv_vfmsub_vf_f64m1_tumu(__VA_ARGS__)

◆ vfmsub_vf_f64m2

#define vfmsub_vf_f64m2 ( ... ) __riscv_vfmsub_vf_f64m2_tu(__VA_ARGS__)

◆ vfmsub_vf_f64m2_m

#define vfmsub_vf_f64m2_m ( ... ) __riscv_vfmsub_vf_f64m2_tumu(__VA_ARGS__)

◆ vfmsub_vf_f64m4

#define vfmsub_vf_f64m4 ( ... ) __riscv_vfmsub_vf_f64m4_tu(__VA_ARGS__)

◆ vfmsub_vf_f64m4_m

#define vfmsub_vf_f64m4_m ( ... ) __riscv_vfmsub_vf_f64m4_tumu(__VA_ARGS__)

◆ vfmsub_vf_f64m8

#define vfmsub_vf_f64m8 ( ... ) __riscv_vfmsub_vf_f64m8_tu(__VA_ARGS__)

◆ vfmsub_vf_f64m8_m

#define vfmsub_vf_f64m8_m ( ... ) __riscv_vfmsub_vf_f64m8_tumu(__VA_ARGS__)

◆ vfmsub_vv_f16m1

#define vfmsub_vv_f16m1 ( ... ) __riscv_vfmsub_vv_f16m1_tu(__VA_ARGS__)

◆ vfmsub_vv_f16m1_m

#define vfmsub_vv_f16m1_m ( ... ) __riscv_vfmsub_vv_f16m1_tumu(__VA_ARGS__)

◆ vfmsub_vv_f16m2

#define vfmsub_vv_f16m2 ( ... ) __riscv_vfmsub_vv_f16m2_tu(__VA_ARGS__)

◆ vfmsub_vv_f16m2_m

#define vfmsub_vv_f16m2_m ( ... ) __riscv_vfmsub_vv_f16m2_tumu(__VA_ARGS__)

◆ vfmsub_vv_f16m4

#define vfmsub_vv_f16m4 ( ... ) __riscv_vfmsub_vv_f16m4_tu(__VA_ARGS__)

◆ vfmsub_vv_f16m4_m

#define vfmsub_vv_f16m4_m ( ... ) __riscv_vfmsub_vv_f16m4_tumu(__VA_ARGS__)

◆ vfmsub_vv_f16m8

#define vfmsub_vv_f16m8 ( ... ) __riscv_vfmsub_vv_f16m8_tu(__VA_ARGS__)

◆ vfmsub_vv_f16m8_m

#define vfmsub_vv_f16m8_m ( ... ) __riscv_vfmsub_vv_f16m8_tumu(__VA_ARGS__)

◆ vfmsub_vv_f16mf2

#define vfmsub_vv_f16mf2 ( ... ) __riscv_vfmsub_vv_f16mf2_tu(__VA_ARGS__)

◆ vfmsub_vv_f16mf2_m

#define vfmsub_vv_f16mf2_m ( ... ) __riscv_vfmsub_vv_f16mf2_tumu(__VA_ARGS__)

◆ vfmsub_vv_f16mf4

#define vfmsub_vv_f16mf4 ( ... ) __riscv_vfmsub_vv_f16mf4_tu(__VA_ARGS__)

◆ vfmsub_vv_f16mf4_m

#define vfmsub_vv_f16mf4_m ( ... ) __riscv_vfmsub_vv_f16mf4_tumu(__VA_ARGS__)

◆ vfmsub_vv_f32m1

#define vfmsub_vv_f32m1 ( ... ) __riscv_vfmsub_vv_f32m1_tu(__VA_ARGS__)

◆ vfmsub_vv_f32m1_m

#define vfmsub_vv_f32m1_m ( ... ) __riscv_vfmsub_vv_f32m1_tumu(__VA_ARGS__)

◆ vfmsub_vv_f32m2

#define vfmsub_vv_f32m2 ( ... ) __riscv_vfmsub_vv_f32m2_tu(__VA_ARGS__)

◆ vfmsub_vv_f32m2_m

#define vfmsub_vv_f32m2_m ( ... ) __riscv_vfmsub_vv_f32m2_tumu(__VA_ARGS__)

◆ vfmsub_vv_f32m4

#define vfmsub_vv_f32m4 ( ... ) __riscv_vfmsub_vv_f32m4_tu(__VA_ARGS__)

◆ vfmsub_vv_f32m4_m

#define vfmsub_vv_f32m4_m ( ... ) __riscv_vfmsub_vv_f32m4_tumu(__VA_ARGS__)

◆ vfmsub_vv_f32m8

#define vfmsub_vv_f32m8 ( ... ) __riscv_vfmsub_vv_f32m8_tu(__VA_ARGS__)

◆ vfmsub_vv_f32m8_m

#define vfmsub_vv_f32m8_m ( ... ) __riscv_vfmsub_vv_f32m8_tumu(__VA_ARGS__)

◆ vfmsub_vv_f32mf2

#define vfmsub_vv_f32mf2 ( ... ) __riscv_vfmsub_vv_f32mf2_tu(__VA_ARGS__)

◆ vfmsub_vv_f32mf2_m

#define vfmsub_vv_f32mf2_m ( ... ) __riscv_vfmsub_vv_f32mf2_tumu(__VA_ARGS__)

◆ vfmsub_vv_f64m1

#define vfmsub_vv_f64m1 ( ... ) __riscv_vfmsub_vv_f64m1_tu(__VA_ARGS__)

◆ vfmsub_vv_f64m1_m

#define vfmsub_vv_f64m1_m ( ... ) __riscv_vfmsub_vv_f64m1_tumu(__VA_ARGS__)

◆ vfmsub_vv_f64m2

#define vfmsub_vv_f64m2 ( ... ) __riscv_vfmsub_vv_f64m2_tu(__VA_ARGS__)

◆ vfmsub_vv_f64m2_m

#define vfmsub_vv_f64m2_m ( ... ) __riscv_vfmsub_vv_f64m2_tumu(__VA_ARGS__)

◆ vfmsub_vv_f64m4

#define vfmsub_vv_f64m4 ( ... ) __riscv_vfmsub_vv_f64m4_tu(__VA_ARGS__)

◆ vfmsub_vv_f64m4_m

#define vfmsub_vv_f64m4_m ( ... ) __riscv_vfmsub_vv_f64m4_tumu(__VA_ARGS__)

◆ vfmsub_vv_f64m8

#define vfmsub_vv_f64m8 ( ... ) __riscv_vfmsub_vv_f64m8_tu(__VA_ARGS__)

◆ vfmsub_vv_f64m8_m

#define vfmsub_vv_f64m8_m ( ... ) __riscv_vfmsub_vv_f64m8_tumu(__VA_ARGS__)

◆ vfmul_vf_f16m1

#define vfmul_vf_f16m1 ( ... ) __riscv_vfmul_vf_f16m1(__VA_ARGS__)

◆ vfmul_vf_f16m1_m

#define vfmul_vf_f16m1_m ( ... ) __riscv_vfmul_vf_f16m1_tumu(__VA_ARGS__)

◆ vfmul_vf_f16m2

#define vfmul_vf_f16m2 ( ... ) __riscv_vfmul_vf_f16m2(__VA_ARGS__)

◆ vfmul_vf_f16m2_m

#define vfmul_vf_f16m2_m ( ... ) __riscv_vfmul_vf_f16m2_tumu(__VA_ARGS__)

◆ vfmul_vf_f16m4

#define vfmul_vf_f16m4 ( ... ) __riscv_vfmul_vf_f16m4(__VA_ARGS__)

◆ vfmul_vf_f16m4_m

#define vfmul_vf_f16m4_m ( ... ) __riscv_vfmul_vf_f16m4_tumu(__VA_ARGS__)

◆ vfmul_vf_f16m8

#define vfmul_vf_f16m8 ( ... ) __riscv_vfmul_vf_f16m8(__VA_ARGS__)

◆ vfmul_vf_f16m8_m

#define vfmul_vf_f16m8_m ( ... ) __riscv_vfmul_vf_f16m8_tumu(__VA_ARGS__)

◆ vfmul_vf_f16mf2

#define vfmul_vf_f16mf2 ( ... ) __riscv_vfmul_vf_f16mf2(__VA_ARGS__)

◆ vfmul_vf_f16mf2_m

#define vfmul_vf_f16mf2_m ( ... ) __riscv_vfmul_vf_f16mf2_tumu(__VA_ARGS__)

◆ vfmul_vf_f16mf4

#define vfmul_vf_f16mf4 ( ... ) __riscv_vfmul_vf_f16mf4(__VA_ARGS__)

◆ vfmul_vf_f16mf4_m

#define vfmul_vf_f16mf4_m ( ... ) __riscv_vfmul_vf_f16mf4_tumu(__VA_ARGS__)

◆ vfmul_vf_f32m1

#define vfmul_vf_f32m1 ( ... ) __riscv_vfmul_vf_f32m1(__VA_ARGS__)

◆ vfmul_vf_f32m1_m

#define vfmul_vf_f32m1_m ( ... ) __riscv_vfmul_vf_f32m1_tumu(__VA_ARGS__)

◆ vfmul_vf_f32m2

#define vfmul_vf_f32m2 ( ... ) __riscv_vfmul_vf_f32m2(__VA_ARGS__)

◆ vfmul_vf_f32m2_m

#define vfmul_vf_f32m2_m ( ... ) __riscv_vfmul_vf_f32m2_tumu(__VA_ARGS__)

◆ vfmul_vf_f32m4

#define vfmul_vf_f32m4 ( ... ) __riscv_vfmul_vf_f32m4(__VA_ARGS__)

◆ vfmul_vf_f32m4_m

#define vfmul_vf_f32m4_m ( ... ) __riscv_vfmul_vf_f32m4_tumu(__VA_ARGS__)

◆ vfmul_vf_f32m8

#define vfmul_vf_f32m8 ( ... ) __riscv_vfmul_vf_f32m8(__VA_ARGS__)

◆ vfmul_vf_f32m8_m

#define vfmul_vf_f32m8_m ( ... ) __riscv_vfmul_vf_f32m8_tumu(__VA_ARGS__)

◆ vfmul_vf_f32mf2

#define vfmul_vf_f32mf2 ( ... ) __riscv_vfmul_vf_f32mf2(__VA_ARGS__)

◆ vfmul_vf_f32mf2_m

#define vfmul_vf_f32mf2_m ( ... ) __riscv_vfmul_vf_f32mf2_tumu(__VA_ARGS__)

◆ vfmul_vf_f64m1

#define vfmul_vf_f64m1 ( ... ) __riscv_vfmul_vf_f64m1(__VA_ARGS__)

◆ vfmul_vf_f64m1_m

#define vfmul_vf_f64m1_m ( ... ) __riscv_vfmul_vf_f64m1_tumu(__VA_ARGS__)

◆ vfmul_vf_f64m2

#define vfmul_vf_f64m2 ( ... ) __riscv_vfmul_vf_f64m2(__VA_ARGS__)

◆ vfmul_vf_f64m2_m

#define vfmul_vf_f64m2_m ( ... ) __riscv_vfmul_vf_f64m2_tumu(__VA_ARGS__)

◆ vfmul_vf_f64m4

#define vfmul_vf_f64m4 ( ... ) __riscv_vfmul_vf_f64m4(__VA_ARGS__)

◆ vfmul_vf_f64m4_m

#define vfmul_vf_f64m4_m ( ... ) __riscv_vfmul_vf_f64m4_tumu(__VA_ARGS__)

◆ vfmul_vf_f64m8

#define vfmul_vf_f64m8 ( ... ) __riscv_vfmul_vf_f64m8(__VA_ARGS__)

◆ vfmul_vf_f64m8_m

#define vfmul_vf_f64m8_m ( ... ) __riscv_vfmul_vf_f64m8_tumu(__VA_ARGS__)

◆ vfmul_vv_f16m1

#define vfmul_vv_f16m1 ( ... ) __riscv_vfmul_vv_f16m1(__VA_ARGS__)

◆ vfmul_vv_f16m1_m

#define vfmul_vv_f16m1_m ( ... ) __riscv_vfmul_vv_f16m1_tumu(__VA_ARGS__)

◆ vfmul_vv_f16m2

#define vfmul_vv_f16m2 ( ... ) __riscv_vfmul_vv_f16m2(__VA_ARGS__)

◆ vfmul_vv_f16m2_m

#define vfmul_vv_f16m2_m ( ... ) __riscv_vfmul_vv_f16m2_tumu(__VA_ARGS__)

◆ vfmul_vv_f16m4

#define vfmul_vv_f16m4 ( ... ) __riscv_vfmul_vv_f16m4(__VA_ARGS__)

◆ vfmul_vv_f16m4_m

#define vfmul_vv_f16m4_m ( ... ) __riscv_vfmul_vv_f16m4_tumu(__VA_ARGS__)

◆ vfmul_vv_f16m8

#define vfmul_vv_f16m8 ( ... ) __riscv_vfmul_vv_f16m8(__VA_ARGS__)

◆ vfmul_vv_f16m8_m

#define vfmul_vv_f16m8_m ( ... ) __riscv_vfmul_vv_f16m8_tumu(__VA_ARGS__)

◆ vfmul_vv_f16mf2

#define vfmul_vv_f16mf2 ( ... ) __riscv_vfmul_vv_f16mf2(__VA_ARGS__)

◆ vfmul_vv_f16mf2_m

#define vfmul_vv_f16mf2_m ( ... ) __riscv_vfmul_vv_f16mf2_tumu(__VA_ARGS__)

◆ vfmul_vv_f16mf4

#define vfmul_vv_f16mf4 ( ... ) __riscv_vfmul_vv_f16mf4(__VA_ARGS__)

◆ vfmul_vv_f16mf4_m

#define vfmul_vv_f16mf4_m ( ... ) __riscv_vfmul_vv_f16mf4_tumu(__VA_ARGS__)

◆ vfmul_vv_f32m1

#define vfmul_vv_f32m1 ( ... ) __riscv_vfmul_vv_f32m1(__VA_ARGS__)

◆ vfmul_vv_f32m1_m

#define vfmul_vv_f32m1_m ( ... ) __riscv_vfmul_vv_f32m1_tumu(__VA_ARGS__)

◆ vfmul_vv_f32m2

#define vfmul_vv_f32m2 ( ... ) __riscv_vfmul_vv_f32m2(__VA_ARGS__)

◆ vfmul_vv_f32m2_m

#define vfmul_vv_f32m2_m ( ... ) __riscv_vfmul_vv_f32m2_tumu(__VA_ARGS__)

◆ vfmul_vv_f32m4

#define vfmul_vv_f32m4 ( ... ) __riscv_vfmul_vv_f32m4(__VA_ARGS__)

◆ vfmul_vv_f32m4_m

#define vfmul_vv_f32m4_m ( ... ) __riscv_vfmul_vv_f32m4_tumu(__VA_ARGS__)

◆ vfmul_vv_f32m8

#define vfmul_vv_f32m8 ( ... ) __riscv_vfmul_vv_f32m8(__VA_ARGS__)

◆ vfmul_vv_f32m8_m

#define vfmul_vv_f32m8_m ( ... ) __riscv_vfmul_vv_f32m8_tumu(__VA_ARGS__)

◆ vfmul_vv_f32mf2

#define vfmul_vv_f32mf2 ( ... ) __riscv_vfmul_vv_f32mf2(__VA_ARGS__)

◆ vfmul_vv_f32mf2_m

#define vfmul_vv_f32mf2_m ( ... ) __riscv_vfmul_vv_f32mf2_tumu(__VA_ARGS__)

◆ vfmul_vv_f64m1

#define vfmul_vv_f64m1 ( ... ) __riscv_vfmul_vv_f64m1(__VA_ARGS__)

◆ vfmul_vv_f64m1_m

#define vfmul_vv_f64m1_m ( ... ) __riscv_vfmul_vv_f64m1_tumu(__VA_ARGS__)

◆ vfmul_vv_f64m2

#define vfmul_vv_f64m2 ( ... ) __riscv_vfmul_vv_f64m2(__VA_ARGS__)

◆ vfmul_vv_f64m2_m

#define vfmul_vv_f64m2_m ( ... ) __riscv_vfmul_vv_f64m2_tumu(__VA_ARGS__)

◆ vfmul_vv_f64m4

#define vfmul_vv_f64m4 ( ... ) __riscv_vfmul_vv_f64m4(__VA_ARGS__)

◆ vfmul_vv_f64m4_m

#define vfmul_vv_f64m4_m ( ... ) __riscv_vfmul_vv_f64m4_tumu(__VA_ARGS__)

◆ vfmul_vv_f64m8

#define vfmul_vv_f64m8 ( ... ) __riscv_vfmul_vv_f64m8(__VA_ARGS__)

◆ vfmul_vv_f64m8_m

#define vfmul_vv_f64m8_m ( ... ) __riscv_vfmul_vv_f64m8_tumu(__VA_ARGS__)

◆ vfmv_f_s_f16m1_f16

#define vfmv_f_s_f16m1_f16 ( ... ) __riscv_vfmv_f_s_f16m1_f16(__VA_ARGS__)

◆ vfmv_f_s_f16m2_f16

#define vfmv_f_s_f16m2_f16 ( ... ) __riscv_vfmv_f_s_f16m2_f16(__VA_ARGS__)

◆ vfmv_f_s_f16m4_f16

#define vfmv_f_s_f16m4_f16 ( ... ) __riscv_vfmv_f_s_f16m4_f16(__VA_ARGS__)

◆ vfmv_f_s_f16m8_f16

#define vfmv_f_s_f16m8_f16 ( ... ) __riscv_vfmv_f_s_f16m8_f16(__VA_ARGS__)

◆ vfmv_f_s_f16mf2_f16

#define vfmv_f_s_f16mf2_f16 ( ... ) __riscv_vfmv_f_s_f16mf2_f16(__VA_ARGS__)

◆ vfmv_f_s_f16mf4_f16

#define vfmv_f_s_f16mf4_f16 ( ... ) __riscv_vfmv_f_s_f16mf4_f16(__VA_ARGS__)

◆ vfmv_f_s_f32m1_f32

#define vfmv_f_s_f32m1_f32 ( ... ) __riscv_vfmv_f_s_f32m1_f32(__VA_ARGS__)

◆ vfmv_f_s_f32m2_f32

#define vfmv_f_s_f32m2_f32 ( ... ) __riscv_vfmv_f_s_f32m2_f32(__VA_ARGS__)

◆ vfmv_f_s_f32m4_f32

#define vfmv_f_s_f32m4_f32 ( ... ) __riscv_vfmv_f_s_f32m4_f32(__VA_ARGS__)

◆ vfmv_f_s_f32m8_f32

#define vfmv_f_s_f32m8_f32 ( ... ) __riscv_vfmv_f_s_f32m8_f32(__VA_ARGS__)

◆ vfmv_f_s_f32mf2_f32

#define vfmv_f_s_f32mf2_f32 ( ... ) __riscv_vfmv_f_s_f32mf2_f32(__VA_ARGS__)

◆ vfmv_f_s_f64m1_f64

#define vfmv_f_s_f64m1_f64 ( ... ) __riscv_vfmv_f_s_f64m1_f64(__VA_ARGS__)

◆ vfmv_f_s_f64m2_f64

#define vfmv_f_s_f64m2_f64 ( ... ) __riscv_vfmv_f_s_f64m2_f64(__VA_ARGS__)

◆ vfmv_f_s_f64m4_f64

#define vfmv_f_s_f64m4_f64 ( ... ) __riscv_vfmv_f_s_f64m4_f64(__VA_ARGS__)

◆ vfmv_f_s_f64m8_f64

#define vfmv_f_s_f64m8_f64 ( ... ) __riscv_vfmv_f_s_f64m8_f64(__VA_ARGS__)

◆ vfmv_s_f_f16m1

#define vfmv_s_f_f16m1 ( ... ) __riscv_vfmv_s_f_f16m1_tu(__VA_ARGS__)

◆ vfmv_s_f_f16m2

#define vfmv_s_f_f16m2 ( ... ) __riscv_vfmv_s_f_f16m2_tu(__VA_ARGS__)

◆ vfmv_s_f_f16m4

#define vfmv_s_f_f16m4 ( ... ) __riscv_vfmv_s_f_f16m4_tu(__VA_ARGS__)

◆ vfmv_s_f_f16m8

#define vfmv_s_f_f16m8 ( ... ) __riscv_vfmv_s_f_f16m8_tu(__VA_ARGS__)

◆ vfmv_s_f_f16mf2

#define vfmv_s_f_f16mf2 ( ... ) __riscv_vfmv_s_f_f16mf2_tu(__VA_ARGS__)

◆ vfmv_s_f_f16mf4

#define vfmv_s_f_f16mf4 ( ... ) __riscv_vfmv_s_f_f16mf4_tu(__VA_ARGS__)

◆ vfmv_s_f_f32m1

#define vfmv_s_f_f32m1 ( ... ) __riscv_vfmv_s_f_f32m1_tu(__VA_ARGS__)

◆ vfmv_s_f_f32m2

#define vfmv_s_f_f32m2 ( ... ) __riscv_vfmv_s_f_f32m2_tu(__VA_ARGS__)

◆ vfmv_s_f_f32m4

#define vfmv_s_f_f32m4 ( ... ) __riscv_vfmv_s_f_f32m4_tu(__VA_ARGS__)

◆ vfmv_s_f_f32m8

#define vfmv_s_f_f32m8 ( ... ) __riscv_vfmv_s_f_f32m8_tu(__VA_ARGS__)

◆ vfmv_s_f_f32mf2

#define vfmv_s_f_f32mf2 ( ... ) __riscv_vfmv_s_f_f32mf2_tu(__VA_ARGS__)

◆ vfmv_s_f_f64m1

#define vfmv_s_f_f64m1 ( ... ) __riscv_vfmv_s_f_f64m1_tu(__VA_ARGS__)

◆ vfmv_s_f_f64m2

#define vfmv_s_f_f64m2 ( ... ) __riscv_vfmv_s_f_f64m2_tu(__VA_ARGS__)

◆ vfmv_s_f_f64m4

#define vfmv_s_f_f64m4 ( ... ) __riscv_vfmv_s_f_f64m4_tu(__VA_ARGS__)

◆ vfmv_s_f_f64m8

#define vfmv_s_f_f64m8 ( ... ) __riscv_vfmv_s_f_f64m8_tu(__VA_ARGS__)

◆ vfmv_v_f_f16m1

#define vfmv_v_f_f16m1 ( ... ) __riscv_vfmv_v_f_f16m1(__VA_ARGS__)

◆ vfmv_v_f_f16m2

#define vfmv_v_f_f16m2 ( ... ) __riscv_vfmv_v_f_f16m2(__VA_ARGS__)

◆ vfmv_v_f_f16m4

#define vfmv_v_f_f16m4 ( ... ) __riscv_vfmv_v_f_f16m4(__VA_ARGS__)

◆ vfmv_v_f_f16m8

#define vfmv_v_f_f16m8 ( ... ) __riscv_vfmv_v_f_f16m8(__VA_ARGS__)

◆ vfmv_v_f_f16mf2

#define vfmv_v_f_f16mf2 ( ... ) __riscv_vfmv_v_f_f16mf2(__VA_ARGS__)

◆ vfmv_v_f_f16mf4

#define vfmv_v_f_f16mf4 ( ... ) __riscv_vfmv_v_f_f16mf4(__VA_ARGS__)

◆ vfmv_v_f_f32m1

#define vfmv_v_f_f32m1 ( ... ) __riscv_vfmv_v_f_f32m1(__VA_ARGS__)

◆ vfmv_v_f_f32m2

#define vfmv_v_f_f32m2 ( ... ) __riscv_vfmv_v_f_f32m2(__VA_ARGS__)

◆ vfmv_v_f_f32m4

#define vfmv_v_f_f32m4 ( ... ) __riscv_vfmv_v_f_f32m4(__VA_ARGS__)

◆ vfmv_v_f_f32m8

#define vfmv_v_f_f32m8 ( ... ) __riscv_vfmv_v_f_f32m8(__VA_ARGS__)

◆ vfmv_v_f_f32mf2

#define vfmv_v_f_f32mf2 ( ... ) __riscv_vfmv_v_f_f32mf2(__VA_ARGS__)

◆ vfmv_v_f_f64m1

#define vfmv_v_f_f64m1 ( ... ) __riscv_vfmv_v_f_f64m1(__VA_ARGS__)

◆ vfmv_v_f_f64m2

#define vfmv_v_f_f64m2 ( ... ) __riscv_vfmv_v_f_f64m2(__VA_ARGS__)

◆ vfmv_v_f_f64m4

#define vfmv_v_f_f64m4 ( ... ) __riscv_vfmv_v_f_f64m4(__VA_ARGS__)

◆ vfmv_v_f_f64m8

#define vfmv_v_f_f64m8 ( ... ) __riscv_vfmv_v_f_f64m8(__VA_ARGS__)

◆ vfncvt_f_f_w_f16m1

#define vfncvt_f_f_w_f16m1 ( ... ) __riscv_vfncvt_f_f_w_f16m1(__VA_ARGS__)

◆ vfncvt_f_f_w_f16m1_m

#define vfncvt_f_f_w_f16m1_m ( ... ) __riscv_vfncvt_f_f_w_f16m1_tumu(__VA_ARGS__)

◆ vfncvt_f_f_w_f16m2

#define vfncvt_f_f_w_f16m2 ( ... ) __riscv_vfncvt_f_f_w_f16m2(__VA_ARGS__)

◆ vfncvt_f_f_w_f16m2_m

#define vfncvt_f_f_w_f16m2_m ( ... ) __riscv_vfncvt_f_f_w_f16m2_tumu(__VA_ARGS__)

◆ vfncvt_f_f_w_f16m4

#define vfncvt_f_f_w_f16m4 ( ... ) __riscv_vfncvt_f_f_w_f16m4(__VA_ARGS__)

◆ vfncvt_f_f_w_f16m4_m

#define vfncvt_f_f_w_f16m4_m ( ... ) __riscv_vfncvt_f_f_w_f16m4_tumu(__VA_ARGS__)

◆ vfncvt_f_f_w_f16mf2

#define vfncvt_f_f_w_f16mf2 ( ... ) __riscv_vfncvt_f_f_w_f16mf2(__VA_ARGS__)

◆ vfncvt_f_f_w_f16mf2_m

#define vfncvt_f_f_w_f16mf2_m ( ... ) __riscv_vfncvt_f_f_w_f16mf2_tumu(__VA_ARGS__)

◆ vfncvt_f_f_w_f16mf4

#define vfncvt_f_f_w_f16mf4 ( ... ) __riscv_vfncvt_f_f_w_f16mf4(__VA_ARGS__)

◆ vfncvt_f_f_w_f16mf4_m

#define vfncvt_f_f_w_f16mf4_m ( ... ) __riscv_vfncvt_f_f_w_f16mf4_tumu(__VA_ARGS__)

◆ vfncvt_f_f_w_f32m1

#define vfncvt_f_f_w_f32m1 ( ... ) __riscv_vfncvt_f_f_w_f32m1(__VA_ARGS__)

◆ vfncvt_f_f_w_f32m1_m

#define vfncvt_f_f_w_f32m1_m ( ... ) __riscv_vfncvt_f_f_w_f32m1_tumu(__VA_ARGS__)

◆ vfncvt_f_f_w_f32m2

#define vfncvt_f_f_w_f32m2 ( ... ) __riscv_vfncvt_f_f_w_f32m2(__VA_ARGS__)

◆ vfncvt_f_f_w_f32m2_m

#define vfncvt_f_f_w_f32m2_m ( ... ) __riscv_vfncvt_f_f_w_f32m2_tumu(__VA_ARGS__)

◆ vfncvt_f_f_w_f32m4

#define vfncvt_f_f_w_f32m4 ( ... ) __riscv_vfncvt_f_f_w_f32m4(__VA_ARGS__)

◆ vfncvt_f_f_w_f32m4_m

#define vfncvt_f_f_w_f32m4_m ( ... ) __riscv_vfncvt_f_f_w_f32m4_tumu(__VA_ARGS__)

◆ vfncvt_f_f_w_f32mf2

#define vfncvt_f_f_w_f32mf2 ( ... ) __riscv_vfncvt_f_f_w_f32mf2(__VA_ARGS__)

◆ vfncvt_f_f_w_f32mf2_m

#define vfncvt_f_f_w_f32mf2_m ( ... ) __riscv_vfncvt_f_f_w_f32mf2_tumu(__VA_ARGS__)

◆ vfncvt_f_x_w_f16m1

#define vfncvt_f_x_w_f16m1 ( ... ) __riscv_vfncvt_f_x_w_f16m1(__VA_ARGS__)

◆ vfncvt_f_x_w_f16m1_m

#define vfncvt_f_x_w_f16m1_m ( ... ) __riscv_vfncvt_f_x_w_f16m1_tumu(__VA_ARGS__)

◆ vfncvt_f_x_w_f16m2

#define vfncvt_f_x_w_f16m2 ( ... ) __riscv_vfncvt_f_x_w_f16m2(__VA_ARGS__)

◆ vfncvt_f_x_w_f16m2_m

#define vfncvt_f_x_w_f16m2_m ( ... ) __riscv_vfncvt_f_x_w_f16m2_tumu(__VA_ARGS__)

◆ vfncvt_f_x_w_f16m4

#define vfncvt_f_x_w_f16m4 ( ... ) __riscv_vfncvt_f_x_w_f16m4(__VA_ARGS__)

◆ vfncvt_f_x_w_f16m4_m

#define vfncvt_f_x_w_f16m4_m ( ... ) __riscv_vfncvt_f_x_w_f16m4_tumu(__VA_ARGS__)

◆ vfncvt_f_x_w_f16mf2

#define vfncvt_f_x_w_f16mf2 ( ... ) __riscv_vfncvt_f_x_w_f16mf2(__VA_ARGS__)

◆ vfncvt_f_x_w_f16mf2_m

#define vfncvt_f_x_w_f16mf2_m ( ... ) __riscv_vfncvt_f_x_w_f16mf2_tumu(__VA_ARGS__)

◆ vfncvt_f_x_w_f16mf4

#define vfncvt_f_x_w_f16mf4 ( ... ) __riscv_vfncvt_f_x_w_f16mf4(__VA_ARGS__)

◆ vfncvt_f_x_w_f16mf4_m

#define vfncvt_f_x_w_f16mf4_m ( ... ) __riscv_vfncvt_f_x_w_f16mf4_tumu(__VA_ARGS__)

◆ vfncvt_f_x_w_f32m1

#define vfncvt_f_x_w_f32m1 ( ... ) __riscv_vfncvt_f_x_w_f32m1(__VA_ARGS__)

◆ vfncvt_f_x_w_f32m1_m

#define vfncvt_f_x_w_f32m1_m ( ... ) __riscv_vfncvt_f_x_w_f32m1_tumu(__VA_ARGS__)

◆ vfncvt_f_x_w_f32m2

#define vfncvt_f_x_w_f32m2 ( ... ) __riscv_vfncvt_f_x_w_f32m2(__VA_ARGS__)

◆ vfncvt_f_x_w_f32m2_m

#define vfncvt_f_x_w_f32m2_m ( ... ) __riscv_vfncvt_f_x_w_f32m2_tumu(__VA_ARGS__)

◆ vfncvt_f_x_w_f32m4

#define vfncvt_f_x_w_f32m4 ( ... ) __riscv_vfncvt_f_x_w_f32m4(__VA_ARGS__)

◆ vfncvt_f_x_w_f32m4_m

#define vfncvt_f_x_w_f32m4_m ( ... ) __riscv_vfncvt_f_x_w_f32m4_tumu(__VA_ARGS__)

◆ vfncvt_f_x_w_f32mf2

#define vfncvt_f_x_w_f32mf2 ( ... ) __riscv_vfncvt_f_x_w_f32mf2(__VA_ARGS__)

◆ vfncvt_f_x_w_f32mf2_m

#define vfncvt_f_x_w_f32mf2_m ( ... ) __riscv_vfncvt_f_x_w_f32mf2_tumu(__VA_ARGS__)

◆ vfncvt_f_xu_w_f16m1

#define vfncvt_f_xu_w_f16m1 ( ... ) __riscv_vfncvt_f_xu_w_f16m1(__VA_ARGS__)

◆ vfncvt_f_xu_w_f16m1_m

#define vfncvt_f_xu_w_f16m1_m ( ... ) __riscv_vfncvt_f_xu_w_f16m1_tumu(__VA_ARGS__)

◆ vfncvt_f_xu_w_f16m2

#define vfncvt_f_xu_w_f16m2 ( ... ) __riscv_vfncvt_f_xu_w_f16m2(__VA_ARGS__)

◆ vfncvt_f_xu_w_f16m2_m

#define vfncvt_f_xu_w_f16m2_m ( ... ) __riscv_vfncvt_f_xu_w_f16m2_tumu(__VA_ARGS__)

◆ vfncvt_f_xu_w_f16m4

#define vfncvt_f_xu_w_f16m4 ( ... ) __riscv_vfncvt_f_xu_w_f16m4(__VA_ARGS__)

◆ vfncvt_f_xu_w_f16m4_m

#define vfncvt_f_xu_w_f16m4_m ( ... ) __riscv_vfncvt_f_xu_w_f16m4_tumu(__VA_ARGS__)

◆ vfncvt_f_xu_w_f16mf2

#define vfncvt_f_xu_w_f16mf2 ( ... ) __riscv_vfncvt_f_xu_w_f16mf2(__VA_ARGS__)

◆ vfncvt_f_xu_w_f16mf2_m

#define vfncvt_f_xu_w_f16mf2_m ( ... ) __riscv_vfncvt_f_xu_w_f16mf2_tumu(__VA_ARGS__)

◆ vfncvt_f_xu_w_f16mf4

#define vfncvt_f_xu_w_f16mf4 ( ... ) __riscv_vfncvt_f_xu_w_f16mf4(__VA_ARGS__)

◆ vfncvt_f_xu_w_f16mf4_m

#define vfncvt_f_xu_w_f16mf4_m ( ... ) __riscv_vfncvt_f_xu_w_f16mf4_tumu(__VA_ARGS__)

◆ vfncvt_f_xu_w_f32m1

#define vfncvt_f_xu_w_f32m1 ( ... ) __riscv_vfncvt_f_xu_w_f32m1(__VA_ARGS__)

◆ vfncvt_f_xu_w_f32m1_m

#define vfncvt_f_xu_w_f32m1_m ( ... ) __riscv_vfncvt_f_xu_w_f32m1_tumu(__VA_ARGS__)

◆ vfncvt_f_xu_w_f32m2

#define vfncvt_f_xu_w_f32m2 ( ... ) __riscv_vfncvt_f_xu_w_f32m2(__VA_ARGS__)

◆ vfncvt_f_xu_w_f32m2_m

#define vfncvt_f_xu_w_f32m2_m ( ... ) __riscv_vfncvt_f_xu_w_f32m2_tumu(__VA_ARGS__)

◆ vfncvt_f_xu_w_f32m4

#define vfncvt_f_xu_w_f32m4 ( ... ) __riscv_vfncvt_f_xu_w_f32m4(__VA_ARGS__)

◆ vfncvt_f_xu_w_f32m4_m

#define vfncvt_f_xu_w_f32m4_m ( ... ) __riscv_vfncvt_f_xu_w_f32m4_tumu(__VA_ARGS__)

◆ vfncvt_f_xu_w_f32mf2

#define vfncvt_f_xu_w_f32mf2 ( ... ) __riscv_vfncvt_f_xu_w_f32mf2(__VA_ARGS__)

◆ vfncvt_f_xu_w_f32mf2_m

#define vfncvt_f_xu_w_f32mf2_m ( ... ) __riscv_vfncvt_f_xu_w_f32mf2_tumu(__VA_ARGS__)

◆ vfncvt_rod_f_f_w_f16m1

#define vfncvt_rod_f_f_w_f16m1 ( ... ) __riscv_vfncvt_rod_f_f_w_f16m1(__VA_ARGS__)

◆ vfncvt_rod_f_f_w_f16m1_m

#define vfncvt_rod_f_f_w_f16m1_m ( ... ) __riscv_vfncvt_rod_f_f_w_f16m1_tumu(__VA_ARGS__)

◆ vfncvt_rod_f_f_w_f16m2

#define vfncvt_rod_f_f_w_f16m2 ( ... ) __riscv_vfncvt_rod_f_f_w_f16m2(__VA_ARGS__)

◆ vfncvt_rod_f_f_w_f16m2_m

#define vfncvt_rod_f_f_w_f16m2_m ( ... ) __riscv_vfncvt_rod_f_f_w_f16m2_tumu(__VA_ARGS__)

◆ vfncvt_rod_f_f_w_f16m4

#define vfncvt_rod_f_f_w_f16m4 ( ... ) __riscv_vfncvt_rod_f_f_w_f16m4(__VA_ARGS__)

◆ vfncvt_rod_f_f_w_f16m4_m

#define vfncvt_rod_f_f_w_f16m4_m ( ... ) __riscv_vfncvt_rod_f_f_w_f16m4_tumu(__VA_ARGS__)

◆ vfncvt_rod_f_f_w_f16mf2

#define vfncvt_rod_f_f_w_f16mf2 ( ... ) __riscv_vfncvt_rod_f_f_w_f16mf2(__VA_ARGS__)

◆ vfncvt_rod_f_f_w_f16mf2_m

#define vfncvt_rod_f_f_w_f16mf2_m ( ... ) __riscv_vfncvt_rod_f_f_w_f16mf2_tumu(__VA_ARGS__)

◆ vfncvt_rod_f_f_w_f16mf4

#define vfncvt_rod_f_f_w_f16mf4 ( ... ) __riscv_vfncvt_rod_f_f_w_f16mf4(__VA_ARGS__)

◆ vfncvt_rod_f_f_w_f16mf4_m

#define vfncvt_rod_f_f_w_f16mf4_m ( ... ) __riscv_vfncvt_rod_f_f_w_f16mf4_tumu(__VA_ARGS__)

◆ vfncvt_rod_f_f_w_f32m1

#define vfncvt_rod_f_f_w_f32m1 ( ... ) __riscv_vfncvt_rod_f_f_w_f32m1(__VA_ARGS__)

◆ vfncvt_rod_f_f_w_f32m1_m

#define vfncvt_rod_f_f_w_f32m1_m ( ... ) __riscv_vfncvt_rod_f_f_w_f32m1_tumu(__VA_ARGS__)

◆ vfncvt_rod_f_f_w_f32m2

#define vfncvt_rod_f_f_w_f32m2 ( ... ) __riscv_vfncvt_rod_f_f_w_f32m2(__VA_ARGS__)

◆ vfncvt_rod_f_f_w_f32m2_m

#define vfncvt_rod_f_f_w_f32m2_m ( ... ) __riscv_vfncvt_rod_f_f_w_f32m2_tumu(__VA_ARGS__)

◆ vfncvt_rod_f_f_w_f32m4

#define vfncvt_rod_f_f_w_f32m4 ( ... ) __riscv_vfncvt_rod_f_f_w_f32m4(__VA_ARGS__)

◆ vfncvt_rod_f_f_w_f32m4_m

#define vfncvt_rod_f_f_w_f32m4_m ( ... ) __riscv_vfncvt_rod_f_f_w_f32m4_tumu(__VA_ARGS__)

◆ vfncvt_rod_f_f_w_f32mf2

#define vfncvt_rod_f_f_w_f32mf2 ( ... ) __riscv_vfncvt_rod_f_f_w_f32mf2(__VA_ARGS__)

◆ vfncvt_rod_f_f_w_f32mf2_m

#define vfncvt_rod_f_f_w_f32mf2_m ( ... ) __riscv_vfncvt_rod_f_f_w_f32mf2_tumu(__VA_ARGS__)

◆ vfncvt_rtz_x_f_w_i16m1

#define vfncvt_rtz_x_f_w_i16m1 ( ... ) __riscv_vfncvt_rtz_x_f_w_i16m1(__VA_ARGS__)

◆ vfncvt_rtz_x_f_w_i16m1_m

#define vfncvt_rtz_x_f_w_i16m1_m ( ... ) __riscv_vfncvt_rtz_x_f_w_i16m1_tumu(__VA_ARGS__)

◆ vfncvt_rtz_x_f_w_i16m2

#define vfncvt_rtz_x_f_w_i16m2 ( ... ) __riscv_vfncvt_rtz_x_f_w_i16m2(__VA_ARGS__)

◆ vfncvt_rtz_x_f_w_i16m2_m

#define vfncvt_rtz_x_f_w_i16m2_m ( ... ) __riscv_vfncvt_rtz_x_f_w_i16m2_tumu(__VA_ARGS__)

◆ vfncvt_rtz_x_f_w_i16m4

#define vfncvt_rtz_x_f_w_i16m4 ( ... ) __riscv_vfncvt_rtz_x_f_w_i16m4(__VA_ARGS__)

◆ vfncvt_rtz_x_f_w_i16m4_m

#define vfncvt_rtz_x_f_w_i16m4_m ( ... ) __riscv_vfncvt_rtz_x_f_w_i16m4_tumu(__VA_ARGS__)

◆ vfncvt_rtz_x_f_w_i16mf2

#define vfncvt_rtz_x_f_w_i16mf2 ( ... ) __riscv_vfncvt_rtz_x_f_w_i16mf2(__VA_ARGS__)

◆ vfncvt_rtz_x_f_w_i16mf2_m

#define vfncvt_rtz_x_f_w_i16mf2_m ( ... ) __riscv_vfncvt_rtz_x_f_w_i16mf2_tumu(__VA_ARGS__)

◆ vfncvt_rtz_x_f_w_i16mf4

#define vfncvt_rtz_x_f_w_i16mf4 ( ... ) __riscv_vfncvt_rtz_x_f_w_i16mf4(__VA_ARGS__)

◆ vfncvt_rtz_x_f_w_i16mf4_m

#define vfncvt_rtz_x_f_w_i16mf4_m ( ... ) __riscv_vfncvt_rtz_x_f_w_i16mf4_tumu(__VA_ARGS__)

◆ vfncvt_rtz_x_f_w_i32m1

#define vfncvt_rtz_x_f_w_i32m1 ( ... ) __riscv_vfncvt_rtz_x_f_w_i32m1(__VA_ARGS__)

◆ vfncvt_rtz_x_f_w_i32m1_m

#define vfncvt_rtz_x_f_w_i32m1_m ( ... ) __riscv_vfncvt_rtz_x_f_w_i32m1_tumu(__VA_ARGS__)

◆ vfncvt_rtz_x_f_w_i32m2

#define vfncvt_rtz_x_f_w_i32m2 ( ... ) __riscv_vfncvt_rtz_x_f_w_i32m2(__VA_ARGS__)

◆ vfncvt_rtz_x_f_w_i32m2_m

#define vfncvt_rtz_x_f_w_i32m2_m ( ... ) __riscv_vfncvt_rtz_x_f_w_i32m2_tumu(__VA_ARGS__)

◆ vfncvt_rtz_x_f_w_i32m4

#define vfncvt_rtz_x_f_w_i32m4 ( ... ) __riscv_vfncvt_rtz_x_f_w_i32m4(__VA_ARGS__)

◆ vfncvt_rtz_x_f_w_i32m4_m

#define vfncvt_rtz_x_f_w_i32m4_m ( ... ) __riscv_vfncvt_rtz_x_f_w_i32m4_tumu(__VA_ARGS__)

◆ vfncvt_rtz_x_f_w_i32mf2

#define vfncvt_rtz_x_f_w_i32mf2 ( ... ) __riscv_vfncvt_rtz_x_f_w_i32mf2(__VA_ARGS__)

◆ vfncvt_rtz_x_f_w_i32mf2_m

#define vfncvt_rtz_x_f_w_i32mf2_m ( ... ) __riscv_vfncvt_rtz_x_f_w_i32mf2_tumu(__VA_ARGS__)

◆ vfncvt_rtz_x_f_w_i8m1

#define vfncvt_rtz_x_f_w_i8m1 ( ... ) __riscv_vfncvt_rtz_x_f_w_i8m1(__VA_ARGS__)

◆ vfncvt_rtz_x_f_w_i8m1_m

#define vfncvt_rtz_x_f_w_i8m1_m ( ... ) __riscv_vfncvt_rtz_x_f_w_i8m1_tumu(__VA_ARGS__)

◆ vfncvt_rtz_x_f_w_i8m2

#define vfncvt_rtz_x_f_w_i8m2 ( ... ) __riscv_vfncvt_rtz_x_f_w_i8m2(__VA_ARGS__)

◆ vfncvt_rtz_x_f_w_i8m2_m

#define vfncvt_rtz_x_f_w_i8m2_m ( ... ) __riscv_vfncvt_rtz_x_f_w_i8m2_tumu(__VA_ARGS__)

◆ vfncvt_rtz_x_f_w_i8m4

#define vfncvt_rtz_x_f_w_i8m4 ( ... ) __riscv_vfncvt_rtz_x_f_w_i8m4(__VA_ARGS__)

◆ vfncvt_rtz_x_f_w_i8m4_m

#define vfncvt_rtz_x_f_w_i8m4_m ( ... ) __riscv_vfncvt_rtz_x_f_w_i8m4_tumu(__VA_ARGS__)

◆ vfncvt_rtz_x_f_w_i8mf2

#define vfncvt_rtz_x_f_w_i8mf2 ( ... ) __riscv_vfncvt_rtz_x_f_w_i8mf2(__VA_ARGS__)

◆ vfncvt_rtz_x_f_w_i8mf2_m

#define vfncvt_rtz_x_f_w_i8mf2_m ( ... ) __riscv_vfncvt_rtz_x_f_w_i8mf2_tumu(__VA_ARGS__)

◆ vfncvt_rtz_x_f_w_i8mf4

#define vfncvt_rtz_x_f_w_i8mf4 ( ... ) __riscv_vfncvt_rtz_x_f_w_i8mf4(__VA_ARGS__)

◆ vfncvt_rtz_x_f_w_i8mf4_m

#define vfncvt_rtz_x_f_w_i8mf4_m ( ... ) __riscv_vfncvt_rtz_x_f_w_i8mf4_tumu(__VA_ARGS__)

◆ vfncvt_rtz_x_f_w_i8mf8

#define vfncvt_rtz_x_f_w_i8mf8 ( ... ) __riscv_vfncvt_rtz_x_f_w_i8mf8(__VA_ARGS__)

◆ vfncvt_rtz_x_f_w_i8mf8_m

#define vfncvt_rtz_x_f_w_i8mf8_m ( ... ) __riscv_vfncvt_rtz_x_f_w_i8mf8_tumu(__VA_ARGS__)

◆ vfncvt_rtz_xu_f_w_u16m1

#define vfncvt_rtz_xu_f_w_u16m1 ( ... ) __riscv_vfncvt_rtz_xu_f_w_u16m1(__VA_ARGS__)

◆ vfncvt_rtz_xu_f_w_u16m1_m

#define vfncvt_rtz_xu_f_w_u16m1_m ( ... ) __riscv_vfncvt_rtz_xu_f_w_u16m1_tumu(__VA_ARGS__)

◆ vfncvt_rtz_xu_f_w_u16m2

#define vfncvt_rtz_xu_f_w_u16m2 ( ... ) __riscv_vfncvt_rtz_xu_f_w_u16m2(__VA_ARGS__)

◆ vfncvt_rtz_xu_f_w_u16m2_m

#define vfncvt_rtz_xu_f_w_u16m2_m ( ... ) __riscv_vfncvt_rtz_xu_f_w_u16m2_tumu(__VA_ARGS__)

◆ vfncvt_rtz_xu_f_w_u16m4

#define vfncvt_rtz_xu_f_w_u16m4 ( ... ) __riscv_vfncvt_rtz_xu_f_w_u16m4(__VA_ARGS__)

◆ vfncvt_rtz_xu_f_w_u16m4_m

#define vfncvt_rtz_xu_f_w_u16m4_m ( ... ) __riscv_vfncvt_rtz_xu_f_w_u16m4_tumu(__VA_ARGS__)

◆ vfncvt_rtz_xu_f_w_u16mf2

#define vfncvt_rtz_xu_f_w_u16mf2 ( ... ) __riscv_vfncvt_rtz_xu_f_w_u16mf2(__VA_ARGS__)

◆ vfncvt_rtz_xu_f_w_u16mf2_m

#define vfncvt_rtz_xu_f_w_u16mf2_m ( ... ) __riscv_vfncvt_rtz_xu_f_w_u16mf2_tumu(__VA_ARGS__)

◆ vfncvt_rtz_xu_f_w_u16mf4

#define vfncvt_rtz_xu_f_w_u16mf4 ( ... ) __riscv_vfncvt_rtz_xu_f_w_u16mf4(__VA_ARGS__)

◆ vfncvt_rtz_xu_f_w_u16mf4_m

#define vfncvt_rtz_xu_f_w_u16mf4_m ( ... ) __riscv_vfncvt_rtz_xu_f_w_u16mf4_tumu(__VA_ARGS__)

◆ vfncvt_rtz_xu_f_w_u32m1

#define vfncvt_rtz_xu_f_w_u32m1 ( ... ) __riscv_vfncvt_rtz_xu_f_w_u32m1(__VA_ARGS__)

◆ vfncvt_rtz_xu_f_w_u32m1_m

#define vfncvt_rtz_xu_f_w_u32m1_m ( ... ) __riscv_vfncvt_rtz_xu_f_w_u32m1_tumu(__VA_ARGS__)

◆ vfncvt_rtz_xu_f_w_u32m2

#define vfncvt_rtz_xu_f_w_u32m2 ( ... ) __riscv_vfncvt_rtz_xu_f_w_u32m2(__VA_ARGS__)

◆ vfncvt_rtz_xu_f_w_u32m2_m

#define vfncvt_rtz_xu_f_w_u32m2_m ( ... ) __riscv_vfncvt_rtz_xu_f_w_u32m2_tumu(__VA_ARGS__)

◆ vfncvt_rtz_xu_f_w_u32m4

#define vfncvt_rtz_xu_f_w_u32m4 ( ... ) __riscv_vfncvt_rtz_xu_f_w_u32m4(__VA_ARGS__)

◆ vfncvt_rtz_xu_f_w_u32m4_m

#define vfncvt_rtz_xu_f_w_u32m4_m ( ... ) __riscv_vfncvt_rtz_xu_f_w_u32m4_tumu(__VA_ARGS__)

◆ vfncvt_rtz_xu_f_w_u32mf2

#define vfncvt_rtz_xu_f_w_u32mf2 ( ... ) __riscv_vfncvt_rtz_xu_f_w_u32mf2(__VA_ARGS__)

◆ vfncvt_rtz_xu_f_w_u32mf2_m

#define vfncvt_rtz_xu_f_w_u32mf2_m ( ... ) __riscv_vfncvt_rtz_xu_f_w_u32mf2_tumu(__VA_ARGS__)

◆ vfncvt_rtz_xu_f_w_u8m1

#define vfncvt_rtz_xu_f_w_u8m1 ( ... ) __riscv_vfncvt_rtz_xu_f_w_u8m1(__VA_ARGS__)

◆ vfncvt_rtz_xu_f_w_u8m1_m

#define vfncvt_rtz_xu_f_w_u8m1_m ( ... ) __riscv_vfncvt_rtz_xu_f_w_u8m1_tumu(__VA_ARGS__)

◆ vfncvt_rtz_xu_f_w_u8m2

#define vfncvt_rtz_xu_f_w_u8m2 ( ... ) __riscv_vfncvt_rtz_xu_f_w_u8m2(__VA_ARGS__)

◆ vfncvt_rtz_xu_f_w_u8m2_m

#define vfncvt_rtz_xu_f_w_u8m2_m ( ... ) __riscv_vfncvt_rtz_xu_f_w_u8m2_tumu(__VA_ARGS__)

◆ vfncvt_rtz_xu_f_w_u8m4

#define vfncvt_rtz_xu_f_w_u8m4 ( ... ) __riscv_vfncvt_rtz_xu_f_w_u8m4(__VA_ARGS__)

◆ vfncvt_rtz_xu_f_w_u8m4_m

#define vfncvt_rtz_xu_f_w_u8m4_m ( ... ) __riscv_vfncvt_rtz_xu_f_w_u8m4_tumu(__VA_ARGS__)

◆ vfncvt_rtz_xu_f_w_u8mf2

#define vfncvt_rtz_xu_f_w_u8mf2 ( ... ) __riscv_vfncvt_rtz_xu_f_w_u8mf2(__VA_ARGS__)

◆ vfncvt_rtz_xu_f_w_u8mf2_m

#define vfncvt_rtz_xu_f_w_u8mf2_m ( ... ) __riscv_vfncvt_rtz_xu_f_w_u8mf2_tumu(__VA_ARGS__)

◆ vfncvt_rtz_xu_f_w_u8mf4

#define vfncvt_rtz_xu_f_w_u8mf4 ( ... ) __riscv_vfncvt_rtz_xu_f_w_u8mf4(__VA_ARGS__)

◆ vfncvt_rtz_xu_f_w_u8mf4_m

#define vfncvt_rtz_xu_f_w_u8mf4_m ( ... ) __riscv_vfncvt_rtz_xu_f_w_u8mf4_tumu(__VA_ARGS__)

◆ vfncvt_rtz_xu_f_w_u8mf8

#define vfncvt_rtz_xu_f_w_u8mf8 ( ... ) __riscv_vfncvt_rtz_xu_f_w_u8mf8(__VA_ARGS__)

◆ vfncvt_rtz_xu_f_w_u8mf8_m

#define vfncvt_rtz_xu_f_w_u8mf8_m ( ... ) __riscv_vfncvt_rtz_xu_f_w_u8mf8_tumu(__VA_ARGS__)

◆ vfncvt_x_f_w_i16m1

#define vfncvt_x_f_w_i16m1 ( ... ) __riscv_vfncvt_x_f_w_i16m1(__VA_ARGS__)

◆ vfncvt_x_f_w_i16m1_m

#define vfncvt_x_f_w_i16m1_m ( ... ) __riscv_vfncvt_x_f_w_i16m1_tumu(__VA_ARGS__)

◆ vfncvt_x_f_w_i16m2

#define vfncvt_x_f_w_i16m2 ( ... ) __riscv_vfncvt_x_f_w_i16m2(__VA_ARGS__)

◆ vfncvt_x_f_w_i16m2_m

#define vfncvt_x_f_w_i16m2_m ( ... ) __riscv_vfncvt_x_f_w_i16m2_tumu(__VA_ARGS__)

◆ vfncvt_x_f_w_i16m4

#define vfncvt_x_f_w_i16m4 ( ... ) __riscv_vfncvt_x_f_w_i16m4(__VA_ARGS__)

◆ vfncvt_x_f_w_i16m4_m

#define vfncvt_x_f_w_i16m4_m ( ... ) __riscv_vfncvt_x_f_w_i16m4_tumu(__VA_ARGS__)

◆ vfncvt_x_f_w_i16mf2

#define vfncvt_x_f_w_i16mf2 ( ... ) __riscv_vfncvt_x_f_w_i16mf2(__VA_ARGS__)

◆ vfncvt_x_f_w_i16mf2_m

#define vfncvt_x_f_w_i16mf2_m ( ... ) __riscv_vfncvt_x_f_w_i16mf2_tumu(__VA_ARGS__)

◆ vfncvt_x_f_w_i16mf4

#define vfncvt_x_f_w_i16mf4 ( ... ) __riscv_vfncvt_x_f_w_i16mf4(__VA_ARGS__)

◆ vfncvt_x_f_w_i16mf4_m

#define vfncvt_x_f_w_i16mf4_m ( ... ) __riscv_vfncvt_x_f_w_i16mf4_tumu(__VA_ARGS__)

◆ vfncvt_x_f_w_i32m1

#define vfncvt_x_f_w_i32m1 ( ... ) __riscv_vfncvt_x_f_w_i32m1(__VA_ARGS__)

◆ vfncvt_x_f_w_i32m1_m

#define vfncvt_x_f_w_i32m1_m ( ... ) __riscv_vfncvt_x_f_w_i32m1_tumu(__VA_ARGS__)

◆ vfncvt_x_f_w_i32m2

#define vfncvt_x_f_w_i32m2 ( ... ) __riscv_vfncvt_x_f_w_i32m2(__VA_ARGS__)

◆ vfncvt_x_f_w_i32m2_m

#define vfncvt_x_f_w_i32m2_m ( ... ) __riscv_vfncvt_x_f_w_i32m2_tumu(__VA_ARGS__)

◆ vfncvt_x_f_w_i32m4

#define vfncvt_x_f_w_i32m4 ( ... ) __riscv_vfncvt_x_f_w_i32m4(__VA_ARGS__)

◆ vfncvt_x_f_w_i32m4_m

#define vfncvt_x_f_w_i32m4_m ( ... ) __riscv_vfncvt_x_f_w_i32m4_tumu(__VA_ARGS__)

◆ vfncvt_x_f_w_i32mf2

#define vfncvt_x_f_w_i32mf2 ( ... ) __riscv_vfncvt_x_f_w_i32mf2(__VA_ARGS__)

◆ vfncvt_x_f_w_i32mf2_m

#define vfncvt_x_f_w_i32mf2_m ( ... ) __riscv_vfncvt_x_f_w_i32mf2_tumu(__VA_ARGS__)

◆ vfncvt_x_f_w_i8m1

#define vfncvt_x_f_w_i8m1 ( ... ) __riscv_vfncvt_x_f_w_i8m1(__VA_ARGS__)

◆ vfncvt_x_f_w_i8m1_m

#define vfncvt_x_f_w_i8m1_m ( ... ) __riscv_vfncvt_x_f_w_i8m1_tumu(__VA_ARGS__)

◆ vfncvt_x_f_w_i8m2

#define vfncvt_x_f_w_i8m2 ( ... ) __riscv_vfncvt_x_f_w_i8m2(__VA_ARGS__)

◆ vfncvt_x_f_w_i8m2_m

#define vfncvt_x_f_w_i8m2_m ( ... ) __riscv_vfncvt_x_f_w_i8m2_tumu(__VA_ARGS__)

◆ vfncvt_x_f_w_i8m4

#define vfncvt_x_f_w_i8m4 ( ... ) __riscv_vfncvt_x_f_w_i8m4(__VA_ARGS__)

◆ vfncvt_x_f_w_i8m4_m

#define vfncvt_x_f_w_i8m4_m ( ... ) __riscv_vfncvt_x_f_w_i8m4_tumu(__VA_ARGS__)

◆ vfncvt_x_f_w_i8mf2

#define vfncvt_x_f_w_i8mf2 ( ... ) __riscv_vfncvt_x_f_w_i8mf2(__VA_ARGS__)

◆ vfncvt_x_f_w_i8mf2_m

#define vfncvt_x_f_w_i8mf2_m ( ... ) __riscv_vfncvt_x_f_w_i8mf2_tumu(__VA_ARGS__)

◆ vfncvt_x_f_w_i8mf4

#define vfncvt_x_f_w_i8mf4 ( ... ) __riscv_vfncvt_x_f_w_i8mf4(__VA_ARGS__)

◆ vfncvt_x_f_w_i8mf4_m

#define vfncvt_x_f_w_i8mf4_m ( ... ) __riscv_vfncvt_x_f_w_i8mf4_tumu(__VA_ARGS__)

◆ vfncvt_x_f_w_i8mf8

#define vfncvt_x_f_w_i8mf8 ( ... ) __riscv_vfncvt_x_f_w_i8mf8(__VA_ARGS__)

◆ vfncvt_x_f_w_i8mf8_m

#define vfncvt_x_f_w_i8mf8_m ( ... ) __riscv_vfncvt_x_f_w_i8mf8_tumu(__VA_ARGS__)

◆ vfncvt_xu_f_w_u16m1

#define vfncvt_xu_f_w_u16m1 ( ... ) __riscv_vfncvt_xu_f_w_u16m1(__VA_ARGS__)

◆ vfncvt_xu_f_w_u16m1_m

#define vfncvt_xu_f_w_u16m1_m ( ... ) __riscv_vfncvt_xu_f_w_u16m1_tumu(__VA_ARGS__)

◆ vfncvt_xu_f_w_u16m2

#define vfncvt_xu_f_w_u16m2 ( ... ) __riscv_vfncvt_xu_f_w_u16m2(__VA_ARGS__)

◆ vfncvt_xu_f_w_u16m2_m

#define vfncvt_xu_f_w_u16m2_m ( ... ) __riscv_vfncvt_xu_f_w_u16m2_tumu(__VA_ARGS__)

◆ vfncvt_xu_f_w_u16m4

#define vfncvt_xu_f_w_u16m4 ( ... ) __riscv_vfncvt_xu_f_w_u16m4(__VA_ARGS__)

◆ vfncvt_xu_f_w_u16m4_m

#define vfncvt_xu_f_w_u16m4_m ( ... ) __riscv_vfncvt_xu_f_w_u16m4_tumu(__VA_ARGS__)

◆ vfncvt_xu_f_w_u16mf2

#define vfncvt_xu_f_w_u16mf2 ( ... ) __riscv_vfncvt_xu_f_w_u16mf2(__VA_ARGS__)

◆ vfncvt_xu_f_w_u16mf2_m

#define vfncvt_xu_f_w_u16mf2_m ( ... ) __riscv_vfncvt_xu_f_w_u16mf2_tumu(__VA_ARGS__)

◆ vfncvt_xu_f_w_u16mf4

#define vfncvt_xu_f_w_u16mf4 ( ... ) __riscv_vfncvt_xu_f_w_u16mf4(__VA_ARGS__)

◆ vfncvt_xu_f_w_u16mf4_m

#define vfncvt_xu_f_w_u16mf4_m ( ... ) __riscv_vfncvt_xu_f_w_u16mf4_tumu(__VA_ARGS__)

◆ vfncvt_xu_f_w_u32m1

#define vfncvt_xu_f_w_u32m1 ( ... ) __riscv_vfncvt_xu_f_w_u32m1(__VA_ARGS__)

◆ vfncvt_xu_f_w_u32m1_m

#define vfncvt_xu_f_w_u32m1_m ( ... ) __riscv_vfncvt_xu_f_w_u32m1_tumu(__VA_ARGS__)

◆ vfncvt_xu_f_w_u32m2

#define vfncvt_xu_f_w_u32m2 ( ... ) __riscv_vfncvt_xu_f_w_u32m2(__VA_ARGS__)

◆ vfncvt_xu_f_w_u32m2_m

#define vfncvt_xu_f_w_u32m2_m ( ... ) __riscv_vfncvt_xu_f_w_u32m2_tumu(__VA_ARGS__)

◆ vfncvt_xu_f_w_u32m4

#define vfncvt_xu_f_w_u32m4 ( ... ) __riscv_vfncvt_xu_f_w_u32m4(__VA_ARGS__)

◆ vfncvt_xu_f_w_u32m4_m

#define vfncvt_xu_f_w_u32m4_m ( ... ) __riscv_vfncvt_xu_f_w_u32m4_tumu(__VA_ARGS__)

◆ vfncvt_xu_f_w_u32mf2

#define vfncvt_xu_f_w_u32mf2 ( ... ) __riscv_vfncvt_xu_f_w_u32mf2(__VA_ARGS__)

◆ vfncvt_xu_f_w_u32mf2_m

#define vfncvt_xu_f_w_u32mf2_m ( ... ) __riscv_vfncvt_xu_f_w_u32mf2_tumu(__VA_ARGS__)

◆ vfncvt_xu_f_w_u8m1

#define vfncvt_xu_f_w_u8m1 ( ... ) __riscv_vfncvt_xu_f_w_u8m1(__VA_ARGS__)

◆ vfncvt_xu_f_w_u8m1_m

#define vfncvt_xu_f_w_u8m1_m ( ... ) __riscv_vfncvt_xu_f_w_u8m1_tumu(__VA_ARGS__)

◆ vfncvt_xu_f_w_u8m2

#define vfncvt_xu_f_w_u8m2 ( ... ) __riscv_vfncvt_xu_f_w_u8m2(__VA_ARGS__)

◆ vfncvt_xu_f_w_u8m2_m

#define vfncvt_xu_f_w_u8m2_m ( ... ) __riscv_vfncvt_xu_f_w_u8m2_tumu(__VA_ARGS__)

◆ vfncvt_xu_f_w_u8m4

#define vfncvt_xu_f_w_u8m4 ( ... ) __riscv_vfncvt_xu_f_w_u8m4(__VA_ARGS__)

◆ vfncvt_xu_f_w_u8m4_m

#define vfncvt_xu_f_w_u8m4_m ( ... ) __riscv_vfncvt_xu_f_w_u8m4_tumu(__VA_ARGS__)

◆ vfncvt_xu_f_w_u8mf2

#define vfncvt_xu_f_w_u8mf2 ( ... ) __riscv_vfncvt_xu_f_w_u8mf2(__VA_ARGS__)

◆ vfncvt_xu_f_w_u8mf2_m

#define vfncvt_xu_f_w_u8mf2_m ( ... ) __riscv_vfncvt_xu_f_w_u8mf2_tumu(__VA_ARGS__)

◆ vfncvt_xu_f_w_u8mf4

#define vfncvt_xu_f_w_u8mf4 ( ... ) __riscv_vfncvt_xu_f_w_u8mf4(__VA_ARGS__)

◆ vfncvt_xu_f_w_u8mf4_m

#define vfncvt_xu_f_w_u8mf4_m ( ... ) __riscv_vfncvt_xu_f_w_u8mf4_tumu(__VA_ARGS__)

◆ vfncvt_xu_f_w_u8mf8

#define vfncvt_xu_f_w_u8mf8 ( ... ) __riscv_vfncvt_xu_f_w_u8mf8(__VA_ARGS__)

◆ vfncvt_xu_f_w_u8mf8_m

#define vfncvt_xu_f_w_u8mf8_m ( ... ) __riscv_vfncvt_xu_f_w_u8mf8_tumu(__VA_ARGS__)

◆ vfneg_v_f16m1

#define vfneg_v_f16m1 ( ... ) __riscv_vfneg_v_f16m1(__VA_ARGS__)

◆ vfneg_v_f16m1_m

#define vfneg_v_f16m1_m ( ... ) __riscv_vfneg_v_f16m1_tumu(__VA_ARGS__)

◆ vfneg_v_f16m2

#define vfneg_v_f16m2 ( ... ) __riscv_vfneg_v_f16m2(__VA_ARGS__)

◆ vfneg_v_f16m2_m

#define vfneg_v_f16m2_m ( ... ) __riscv_vfneg_v_f16m2_tumu(__VA_ARGS__)

◆ vfneg_v_f16m4

#define vfneg_v_f16m4 ( ... ) __riscv_vfneg_v_f16m4(__VA_ARGS__)

◆ vfneg_v_f16m4_m

#define vfneg_v_f16m4_m ( ... ) __riscv_vfneg_v_f16m4_tumu(__VA_ARGS__)

◆ vfneg_v_f16m8

#define vfneg_v_f16m8 ( ... ) __riscv_vfneg_v_f16m8(__VA_ARGS__)

◆ vfneg_v_f16m8_m

#define vfneg_v_f16m8_m ( ... ) __riscv_vfneg_v_f16m8_tumu(__VA_ARGS__)

◆ vfneg_v_f16mf2

#define vfneg_v_f16mf2 ( ... ) __riscv_vfneg_v_f16mf2(__VA_ARGS__)

◆ vfneg_v_f16mf2_m

#define vfneg_v_f16mf2_m ( ... ) __riscv_vfneg_v_f16mf2_tumu(__VA_ARGS__)

◆ vfneg_v_f16mf4

#define vfneg_v_f16mf4 ( ... ) __riscv_vfneg_v_f16mf4(__VA_ARGS__)

◆ vfneg_v_f16mf4_m

#define vfneg_v_f16mf4_m ( ... ) __riscv_vfneg_v_f16mf4_tumu(__VA_ARGS__)

◆ vfneg_v_f32m1

#define vfneg_v_f32m1 ( ... ) __riscv_vfneg_v_f32m1(__VA_ARGS__)

◆ vfneg_v_f32m1_m

#define vfneg_v_f32m1_m ( ... ) __riscv_vfneg_v_f32m1_tumu(__VA_ARGS__)

◆ vfneg_v_f32m2

#define vfneg_v_f32m2 ( ... ) __riscv_vfneg_v_f32m2(__VA_ARGS__)

◆ vfneg_v_f32m2_m

#define vfneg_v_f32m2_m ( ... ) __riscv_vfneg_v_f32m2_tumu(__VA_ARGS__)

◆ vfneg_v_f32m4

#define vfneg_v_f32m4 ( ... ) __riscv_vfneg_v_f32m4(__VA_ARGS__)

◆ vfneg_v_f32m4_m

#define vfneg_v_f32m4_m ( ... ) __riscv_vfneg_v_f32m4_tumu(__VA_ARGS__)

◆ vfneg_v_f32m8

#define vfneg_v_f32m8 ( ... ) __riscv_vfneg_v_f32m8(__VA_ARGS__)

◆ vfneg_v_f32m8_m

#define vfneg_v_f32m8_m ( ... ) __riscv_vfneg_v_f32m8_tumu(__VA_ARGS__)

◆ vfneg_v_f32mf2

#define vfneg_v_f32mf2 ( ... ) __riscv_vfneg_v_f32mf2(__VA_ARGS__)

◆ vfneg_v_f32mf2_m

#define vfneg_v_f32mf2_m ( ... ) __riscv_vfneg_v_f32mf2_tumu(__VA_ARGS__)

◆ vfneg_v_f64m1

#define vfneg_v_f64m1 ( ... ) __riscv_vfneg_v_f64m1(__VA_ARGS__)

◆ vfneg_v_f64m1_m

#define vfneg_v_f64m1_m ( ... ) __riscv_vfneg_v_f64m1_tumu(__VA_ARGS__)

◆ vfneg_v_f64m2

#define vfneg_v_f64m2 ( ... ) __riscv_vfneg_v_f64m2(__VA_ARGS__)

◆ vfneg_v_f64m2_m

#define vfneg_v_f64m2_m ( ... ) __riscv_vfneg_v_f64m2_tumu(__VA_ARGS__)

◆ vfneg_v_f64m4

#define vfneg_v_f64m4 ( ... ) __riscv_vfneg_v_f64m4(__VA_ARGS__)

◆ vfneg_v_f64m4_m

#define vfneg_v_f64m4_m ( ... ) __riscv_vfneg_v_f64m4_tumu(__VA_ARGS__)

◆ vfneg_v_f64m8

#define vfneg_v_f64m8 ( ... ) __riscv_vfneg_v_f64m8(__VA_ARGS__)

◆ vfneg_v_f64m8_m

#define vfneg_v_f64m8_m ( ... ) __riscv_vfneg_v_f64m8_tumu(__VA_ARGS__)

◆ vfnmacc_vf_f16m1

#define vfnmacc_vf_f16m1 ( ... ) __riscv_vfnmacc_vf_f16m1_tu(__VA_ARGS__)

◆ vfnmacc_vf_f16m1_m

#define vfnmacc_vf_f16m1_m ( ... ) __riscv_vfnmacc_vf_f16m1_tumu(__VA_ARGS__)

◆ vfnmacc_vf_f16m2

#define vfnmacc_vf_f16m2 ( ... ) __riscv_vfnmacc_vf_f16m2_tu(__VA_ARGS__)

◆ vfnmacc_vf_f16m2_m

#define vfnmacc_vf_f16m2_m ( ... ) __riscv_vfnmacc_vf_f16m2_tumu(__VA_ARGS__)

◆ vfnmacc_vf_f16m4

#define vfnmacc_vf_f16m4 ( ... ) __riscv_vfnmacc_vf_f16m4_tu(__VA_ARGS__)

◆ vfnmacc_vf_f16m4_m

#define vfnmacc_vf_f16m4_m ( ... ) __riscv_vfnmacc_vf_f16m4_tumu(__VA_ARGS__)

◆ vfnmacc_vf_f16m8

#define vfnmacc_vf_f16m8 ( ... ) __riscv_vfnmacc_vf_f16m8_tu(__VA_ARGS__)

◆ vfnmacc_vf_f16m8_m

#define vfnmacc_vf_f16m8_m ( ... ) __riscv_vfnmacc_vf_f16m8_tumu(__VA_ARGS__)

◆ vfnmacc_vf_f16mf2

#define vfnmacc_vf_f16mf2 ( ... ) __riscv_vfnmacc_vf_f16mf2_tu(__VA_ARGS__)

◆ vfnmacc_vf_f16mf2_m

#define vfnmacc_vf_f16mf2_m ( ... ) __riscv_vfnmacc_vf_f16mf2_tumu(__VA_ARGS__)

◆ vfnmacc_vf_f16mf4

#define vfnmacc_vf_f16mf4 ( ... ) __riscv_vfnmacc_vf_f16mf4_tu(__VA_ARGS__)

◆ vfnmacc_vf_f16mf4_m

#define vfnmacc_vf_f16mf4_m ( ... ) __riscv_vfnmacc_vf_f16mf4_tumu(__VA_ARGS__)

◆ vfnmacc_vf_f32m1

#define vfnmacc_vf_f32m1 ( ... ) __riscv_vfnmacc_vf_f32m1_tu(__VA_ARGS__)

◆ vfnmacc_vf_f32m1_m

#define vfnmacc_vf_f32m1_m ( ... ) __riscv_vfnmacc_vf_f32m1_tumu(__VA_ARGS__)

◆ vfnmacc_vf_f32m2

#define vfnmacc_vf_f32m2 ( ... ) __riscv_vfnmacc_vf_f32m2_tu(__VA_ARGS__)

◆ vfnmacc_vf_f32m2_m

#define vfnmacc_vf_f32m2_m ( ... ) __riscv_vfnmacc_vf_f32m2_tumu(__VA_ARGS__)

◆ vfnmacc_vf_f32m4

#define vfnmacc_vf_f32m4 ( ... ) __riscv_vfnmacc_vf_f32m4_tu(__VA_ARGS__)

◆ vfnmacc_vf_f32m4_m

#define vfnmacc_vf_f32m4_m ( ... ) __riscv_vfnmacc_vf_f32m4_tumu(__VA_ARGS__)

◆ vfnmacc_vf_f32m8

#define vfnmacc_vf_f32m8 ( ... ) __riscv_vfnmacc_vf_f32m8_tu(__VA_ARGS__)

◆ vfnmacc_vf_f32m8_m

#define vfnmacc_vf_f32m8_m ( ... ) __riscv_vfnmacc_vf_f32m8_tumu(__VA_ARGS__)

◆ vfnmacc_vf_f32mf2

#define vfnmacc_vf_f32mf2 ( ... ) __riscv_vfnmacc_vf_f32mf2_tu(__VA_ARGS__)

◆ vfnmacc_vf_f32mf2_m

#define vfnmacc_vf_f32mf2_m ( ... ) __riscv_vfnmacc_vf_f32mf2_tumu(__VA_ARGS__)

◆ vfnmacc_vf_f64m1

#define vfnmacc_vf_f64m1 ( ... ) __riscv_vfnmacc_vf_f64m1_tu(__VA_ARGS__)

◆ vfnmacc_vf_f64m1_m

#define vfnmacc_vf_f64m1_m ( ... ) __riscv_vfnmacc_vf_f64m1_tumu(__VA_ARGS__)

◆ vfnmacc_vf_f64m2

#define vfnmacc_vf_f64m2 ( ... ) __riscv_vfnmacc_vf_f64m2_tu(__VA_ARGS__)

◆ vfnmacc_vf_f64m2_m

#define vfnmacc_vf_f64m2_m ( ... ) __riscv_vfnmacc_vf_f64m2_tumu(__VA_ARGS__)

◆ vfnmacc_vf_f64m4

#define vfnmacc_vf_f64m4 ( ... ) __riscv_vfnmacc_vf_f64m4_tu(__VA_ARGS__)

◆ vfnmacc_vf_f64m4_m

#define vfnmacc_vf_f64m4_m ( ... ) __riscv_vfnmacc_vf_f64m4_tumu(__VA_ARGS__)

◆ vfnmacc_vf_f64m8

#define vfnmacc_vf_f64m8 ( ... ) __riscv_vfnmacc_vf_f64m8_tu(__VA_ARGS__)

◆ vfnmacc_vf_f64m8_m

#define vfnmacc_vf_f64m8_m ( ... ) __riscv_vfnmacc_vf_f64m8_tumu(__VA_ARGS__)

◆ vfnmacc_vv_f16m1

#define vfnmacc_vv_f16m1 ( ... ) __riscv_vfnmacc_vv_f16m1_tu(__VA_ARGS__)

◆ vfnmacc_vv_f16m1_m

#define vfnmacc_vv_f16m1_m ( ... ) __riscv_vfnmacc_vv_f16m1_tumu(__VA_ARGS__)

◆ vfnmacc_vv_f16m2

#define vfnmacc_vv_f16m2 ( ... ) __riscv_vfnmacc_vv_f16m2_tu(__VA_ARGS__)

◆ vfnmacc_vv_f16m2_m

#define vfnmacc_vv_f16m2_m ( ... ) __riscv_vfnmacc_vv_f16m2_tumu(__VA_ARGS__)

◆ vfnmacc_vv_f16m4

#define vfnmacc_vv_f16m4 ( ... ) __riscv_vfnmacc_vv_f16m4_tu(__VA_ARGS__)

◆ vfnmacc_vv_f16m4_m

#define vfnmacc_vv_f16m4_m ( ... ) __riscv_vfnmacc_vv_f16m4_tumu(__VA_ARGS__)

◆ vfnmacc_vv_f16m8

#define vfnmacc_vv_f16m8 ( ... ) __riscv_vfnmacc_vv_f16m8_tu(__VA_ARGS__)

◆ vfnmacc_vv_f16m8_m

#define vfnmacc_vv_f16m8_m ( ... ) __riscv_vfnmacc_vv_f16m8_tumu(__VA_ARGS__)

◆ vfnmacc_vv_f16mf2

#define vfnmacc_vv_f16mf2 ( ... ) __riscv_vfnmacc_vv_f16mf2_tu(__VA_ARGS__)

◆ vfnmacc_vv_f16mf2_m

#define vfnmacc_vv_f16mf2_m ( ... ) __riscv_vfnmacc_vv_f16mf2_tumu(__VA_ARGS__)

◆ vfnmacc_vv_f16mf4

#define vfnmacc_vv_f16mf4 ( ... ) __riscv_vfnmacc_vv_f16mf4_tu(__VA_ARGS__)

◆ vfnmacc_vv_f16mf4_m

#define vfnmacc_vv_f16mf4_m ( ... ) __riscv_vfnmacc_vv_f16mf4_tumu(__VA_ARGS__)

◆ vfnmacc_vv_f32m1

#define vfnmacc_vv_f32m1 ( ... ) __riscv_vfnmacc_vv_f32m1_tu(__VA_ARGS__)

◆ vfnmacc_vv_f32m1_m

#define vfnmacc_vv_f32m1_m ( ... ) __riscv_vfnmacc_vv_f32m1_tumu(__VA_ARGS__)

◆ vfnmacc_vv_f32m2

#define vfnmacc_vv_f32m2 ( ... ) __riscv_vfnmacc_vv_f32m2_tu(__VA_ARGS__)

◆ vfnmacc_vv_f32m2_m

#define vfnmacc_vv_f32m2_m ( ... ) __riscv_vfnmacc_vv_f32m2_tumu(__VA_ARGS__)

◆ vfnmacc_vv_f32m4

#define vfnmacc_vv_f32m4 ( ... ) __riscv_vfnmacc_vv_f32m4_tu(__VA_ARGS__)

◆ vfnmacc_vv_f32m4_m

#define vfnmacc_vv_f32m4_m ( ... ) __riscv_vfnmacc_vv_f32m4_tumu(__VA_ARGS__)

◆ vfnmacc_vv_f32m8

#define vfnmacc_vv_f32m8 ( ... ) __riscv_vfnmacc_vv_f32m8_tu(__VA_ARGS__)

◆ vfnmacc_vv_f32m8_m

#define vfnmacc_vv_f32m8_m ( ... ) __riscv_vfnmacc_vv_f32m8_tumu(__VA_ARGS__)

◆ vfnmacc_vv_f32mf2

#define vfnmacc_vv_f32mf2 ( ... ) __riscv_vfnmacc_vv_f32mf2_tu(__VA_ARGS__)

◆ vfnmacc_vv_f32mf2_m

#define vfnmacc_vv_f32mf2_m ( ... ) __riscv_vfnmacc_vv_f32mf2_tumu(__VA_ARGS__)

◆ vfnmacc_vv_f64m1

#define vfnmacc_vv_f64m1 ( ... ) __riscv_vfnmacc_vv_f64m1_tu(__VA_ARGS__)

◆ vfnmacc_vv_f64m1_m

#define vfnmacc_vv_f64m1_m ( ... ) __riscv_vfnmacc_vv_f64m1_tumu(__VA_ARGS__)

◆ vfnmacc_vv_f64m2

#define vfnmacc_vv_f64m2 ( ... ) __riscv_vfnmacc_vv_f64m2_tu(__VA_ARGS__)

◆ vfnmacc_vv_f64m2_m

#define vfnmacc_vv_f64m2_m ( ... ) __riscv_vfnmacc_vv_f64m2_tumu(__VA_ARGS__)

◆ vfnmacc_vv_f64m4

#define vfnmacc_vv_f64m4 ( ... ) __riscv_vfnmacc_vv_f64m4_tu(__VA_ARGS__)

◆ vfnmacc_vv_f64m4_m

#define vfnmacc_vv_f64m4_m ( ... ) __riscv_vfnmacc_vv_f64m4_tumu(__VA_ARGS__)

◆ vfnmacc_vv_f64m8

#define vfnmacc_vv_f64m8 ( ... ) __riscv_vfnmacc_vv_f64m8_tu(__VA_ARGS__)

◆ vfnmacc_vv_f64m8_m

#define vfnmacc_vv_f64m8_m ( ... ) __riscv_vfnmacc_vv_f64m8_tumu(__VA_ARGS__)

◆ vfnmadd_vf_f16m1

#define vfnmadd_vf_f16m1 ( ... ) __riscv_vfnmadd_vf_f16m1_tu(__VA_ARGS__)

◆ vfnmadd_vf_f16m1_m

#define vfnmadd_vf_f16m1_m ( ... ) __riscv_vfnmadd_vf_f16m1_tumu(__VA_ARGS__)

◆ vfnmadd_vf_f16m2

#define vfnmadd_vf_f16m2 ( ... ) __riscv_vfnmadd_vf_f16m2_tu(__VA_ARGS__)

◆ vfnmadd_vf_f16m2_m

#define vfnmadd_vf_f16m2_m ( ... ) __riscv_vfnmadd_vf_f16m2_tumu(__VA_ARGS__)

◆ vfnmadd_vf_f16m4

#define vfnmadd_vf_f16m4 ( ... ) __riscv_vfnmadd_vf_f16m4_tu(__VA_ARGS__)

◆ vfnmadd_vf_f16m4_m

#define vfnmadd_vf_f16m4_m ( ... ) __riscv_vfnmadd_vf_f16m4_tumu(__VA_ARGS__)

◆ vfnmadd_vf_f16m8

#define vfnmadd_vf_f16m8 ( ... ) __riscv_vfnmadd_vf_f16m8_tu(__VA_ARGS__)

◆ vfnmadd_vf_f16m8_m

#define vfnmadd_vf_f16m8_m ( ... ) __riscv_vfnmadd_vf_f16m8_tumu(__VA_ARGS__)

◆ vfnmadd_vf_f16mf2

#define vfnmadd_vf_f16mf2 ( ... ) __riscv_vfnmadd_vf_f16mf2_tu(__VA_ARGS__)

◆ vfnmadd_vf_f16mf2_m

#define vfnmadd_vf_f16mf2_m ( ... ) __riscv_vfnmadd_vf_f16mf2_tumu(__VA_ARGS__)

◆ vfnmadd_vf_f16mf4

#define vfnmadd_vf_f16mf4 ( ... ) __riscv_vfnmadd_vf_f16mf4_tu(__VA_ARGS__)

◆ vfnmadd_vf_f16mf4_m

#define vfnmadd_vf_f16mf4_m ( ... ) __riscv_vfnmadd_vf_f16mf4_tumu(__VA_ARGS__)

◆ vfnmadd_vf_f32m1

#define vfnmadd_vf_f32m1 ( ... ) __riscv_vfnmadd_vf_f32m1_tu(__VA_ARGS__)

◆ vfnmadd_vf_f32m1_m

#define vfnmadd_vf_f32m1_m ( ... ) __riscv_vfnmadd_vf_f32m1_tumu(__VA_ARGS__)

◆ vfnmadd_vf_f32m2

#define vfnmadd_vf_f32m2 ( ... ) __riscv_vfnmadd_vf_f32m2_tu(__VA_ARGS__)

◆ vfnmadd_vf_f32m2_m

#define vfnmadd_vf_f32m2_m ( ... ) __riscv_vfnmadd_vf_f32m2_tumu(__VA_ARGS__)

◆ vfnmadd_vf_f32m4

#define vfnmadd_vf_f32m4 ( ... ) __riscv_vfnmadd_vf_f32m4_tu(__VA_ARGS__)

◆ vfnmadd_vf_f32m4_m

#define vfnmadd_vf_f32m4_m ( ... ) __riscv_vfnmadd_vf_f32m4_tumu(__VA_ARGS__)

◆ vfnmadd_vf_f32m8

#define vfnmadd_vf_f32m8 ( ... ) __riscv_vfnmadd_vf_f32m8_tu(__VA_ARGS__)

◆ vfnmadd_vf_f32m8_m

#define vfnmadd_vf_f32m8_m ( ... ) __riscv_vfnmadd_vf_f32m8_tumu(__VA_ARGS__)

◆ vfnmadd_vf_f32mf2

#define vfnmadd_vf_f32mf2 ( ... ) __riscv_vfnmadd_vf_f32mf2_tu(__VA_ARGS__)

◆ vfnmadd_vf_f32mf2_m

#define vfnmadd_vf_f32mf2_m ( ... ) __riscv_vfnmadd_vf_f32mf2_tumu(__VA_ARGS__)

◆ vfnmadd_vf_f64m1

#define vfnmadd_vf_f64m1 ( ... ) __riscv_vfnmadd_vf_f64m1_tu(__VA_ARGS__)

◆ vfnmadd_vf_f64m1_m

#define vfnmadd_vf_f64m1_m ( ... ) __riscv_vfnmadd_vf_f64m1_tumu(__VA_ARGS__)

◆ vfnmadd_vf_f64m2

#define vfnmadd_vf_f64m2 ( ... ) __riscv_vfnmadd_vf_f64m2_tu(__VA_ARGS__)

◆ vfnmadd_vf_f64m2_m

#define vfnmadd_vf_f64m2_m ( ... ) __riscv_vfnmadd_vf_f64m2_tumu(__VA_ARGS__)

◆ vfnmadd_vf_f64m4

#define vfnmadd_vf_f64m4 ( ... ) __riscv_vfnmadd_vf_f64m4_tu(__VA_ARGS__)

◆ vfnmadd_vf_f64m4_m

#define vfnmadd_vf_f64m4_m ( ... ) __riscv_vfnmadd_vf_f64m4_tumu(__VA_ARGS__)

◆ vfnmadd_vf_f64m8

#define vfnmadd_vf_f64m8 ( ... ) __riscv_vfnmadd_vf_f64m8_tu(__VA_ARGS__)

◆ vfnmadd_vf_f64m8_m

#define vfnmadd_vf_f64m8_m ( ... ) __riscv_vfnmadd_vf_f64m8_tumu(__VA_ARGS__)

◆ vfnmadd_vv_f16m1

#define vfnmadd_vv_f16m1 ( ... ) __riscv_vfnmadd_vv_f16m1_tu(__VA_ARGS__)

◆ vfnmadd_vv_f16m1_m

#define vfnmadd_vv_f16m1_m ( ... ) __riscv_vfnmadd_vv_f16m1_tumu(__VA_ARGS__)

◆ vfnmadd_vv_f16m2

#define vfnmadd_vv_f16m2 ( ... ) __riscv_vfnmadd_vv_f16m2_tu(__VA_ARGS__)

◆ vfnmadd_vv_f16m2_m

#define vfnmadd_vv_f16m2_m ( ... ) __riscv_vfnmadd_vv_f16m2_tumu(__VA_ARGS__)

◆ vfnmadd_vv_f16m4

#define vfnmadd_vv_f16m4 ( ... ) __riscv_vfnmadd_vv_f16m4_tu(__VA_ARGS__)

◆ vfnmadd_vv_f16m4_m

#define vfnmadd_vv_f16m4_m ( ... ) __riscv_vfnmadd_vv_f16m4_tumu(__VA_ARGS__)

◆ vfnmadd_vv_f16m8

#define vfnmadd_vv_f16m8 ( ... ) __riscv_vfnmadd_vv_f16m8_tu(__VA_ARGS__)

◆ vfnmadd_vv_f16m8_m

#define vfnmadd_vv_f16m8_m ( ... ) __riscv_vfnmadd_vv_f16m8_tumu(__VA_ARGS__)

◆ vfnmadd_vv_f16mf2

#define vfnmadd_vv_f16mf2 ( ... ) __riscv_vfnmadd_vv_f16mf2_tu(__VA_ARGS__)

◆ vfnmadd_vv_f16mf2_m

#define vfnmadd_vv_f16mf2_m ( ... ) __riscv_vfnmadd_vv_f16mf2_tumu(__VA_ARGS__)

◆ vfnmadd_vv_f16mf4

#define vfnmadd_vv_f16mf4 ( ... ) __riscv_vfnmadd_vv_f16mf4_tu(__VA_ARGS__)

◆ vfnmadd_vv_f16mf4_m

#define vfnmadd_vv_f16mf4_m ( ... ) __riscv_vfnmadd_vv_f16mf4_tumu(__VA_ARGS__)

◆ vfnmadd_vv_f32m1

#define vfnmadd_vv_f32m1 ( ... ) __riscv_vfnmadd_vv_f32m1_tu(__VA_ARGS__)

◆ vfnmadd_vv_f32m1_m

#define vfnmadd_vv_f32m1_m ( ... ) __riscv_vfnmadd_vv_f32m1_tumu(__VA_ARGS__)

◆ vfnmadd_vv_f32m2

#define vfnmadd_vv_f32m2 ( ... ) __riscv_vfnmadd_vv_f32m2_tu(__VA_ARGS__)

◆ vfnmadd_vv_f32m2_m

#define vfnmadd_vv_f32m2_m ( ... ) __riscv_vfnmadd_vv_f32m2_tumu(__VA_ARGS__)

◆ vfnmadd_vv_f32m4

#define vfnmadd_vv_f32m4 ( ... ) __riscv_vfnmadd_vv_f32m4_tu(__VA_ARGS__)

◆ vfnmadd_vv_f32m4_m

#define vfnmadd_vv_f32m4_m ( ... ) __riscv_vfnmadd_vv_f32m4_tumu(__VA_ARGS__)

◆ vfnmadd_vv_f32m8

#define vfnmadd_vv_f32m8 ( ... ) __riscv_vfnmadd_vv_f32m8_tu(__VA_ARGS__)

◆ vfnmadd_vv_f32m8_m

#define vfnmadd_vv_f32m8_m ( ... ) __riscv_vfnmadd_vv_f32m8_tumu(__VA_ARGS__)

◆ vfnmadd_vv_f32mf2

#define vfnmadd_vv_f32mf2 ( ... ) __riscv_vfnmadd_vv_f32mf2_tu(__VA_ARGS__)

◆ vfnmadd_vv_f32mf2_m

#define vfnmadd_vv_f32mf2_m ( ... ) __riscv_vfnmadd_vv_f32mf2_tumu(__VA_ARGS__)

◆ vfnmadd_vv_f64m1

#define vfnmadd_vv_f64m1 ( ... ) __riscv_vfnmadd_vv_f64m1_tu(__VA_ARGS__)

◆ vfnmadd_vv_f64m1_m

#define vfnmadd_vv_f64m1_m ( ... ) __riscv_vfnmadd_vv_f64m1_tumu(__VA_ARGS__)

◆ vfnmadd_vv_f64m2

#define vfnmadd_vv_f64m2 ( ... ) __riscv_vfnmadd_vv_f64m2_tu(__VA_ARGS__)

◆ vfnmadd_vv_f64m2_m

#define vfnmadd_vv_f64m2_m ( ... ) __riscv_vfnmadd_vv_f64m2_tumu(__VA_ARGS__)

◆ vfnmadd_vv_f64m4

#define vfnmadd_vv_f64m4 ( ... ) __riscv_vfnmadd_vv_f64m4_tu(__VA_ARGS__)

◆ vfnmadd_vv_f64m4_m

#define vfnmadd_vv_f64m4_m ( ... ) __riscv_vfnmadd_vv_f64m4_tumu(__VA_ARGS__)

◆ vfnmadd_vv_f64m8

#define vfnmadd_vv_f64m8 ( ... ) __riscv_vfnmadd_vv_f64m8_tu(__VA_ARGS__)

◆ vfnmadd_vv_f64m8_m

#define vfnmadd_vv_f64m8_m ( ... ) __riscv_vfnmadd_vv_f64m8_tumu(__VA_ARGS__)

◆ vfnmsac_vf_f16m1

#define vfnmsac_vf_f16m1 ( ... ) __riscv_vfnmsac_vf_f16m1_tu(__VA_ARGS__)

◆ vfnmsac_vf_f16m1_m

#define vfnmsac_vf_f16m1_m ( ... ) __riscv_vfnmsac_vf_f16m1_tumu(__VA_ARGS__)

◆ vfnmsac_vf_f16m2

#define vfnmsac_vf_f16m2 ( ... ) __riscv_vfnmsac_vf_f16m2_tu(__VA_ARGS__)

◆ vfnmsac_vf_f16m2_m

#define vfnmsac_vf_f16m2_m ( ... ) __riscv_vfnmsac_vf_f16m2_tumu(__VA_ARGS__)

◆ vfnmsac_vf_f16m4

#define vfnmsac_vf_f16m4 ( ... ) __riscv_vfnmsac_vf_f16m4_tu(__VA_ARGS__)

◆ vfnmsac_vf_f16m4_m

#define vfnmsac_vf_f16m4_m ( ... ) __riscv_vfnmsac_vf_f16m4_tumu(__VA_ARGS__)

◆ vfnmsac_vf_f16m8

#define vfnmsac_vf_f16m8 ( ... ) __riscv_vfnmsac_vf_f16m8_tu(__VA_ARGS__)

◆ vfnmsac_vf_f16m8_m

#define vfnmsac_vf_f16m8_m ( ... ) __riscv_vfnmsac_vf_f16m8_tumu(__VA_ARGS__)

◆ vfnmsac_vf_f16mf2

#define vfnmsac_vf_f16mf2 ( ... ) __riscv_vfnmsac_vf_f16mf2_tu(__VA_ARGS__)

◆ vfnmsac_vf_f16mf2_m

#define vfnmsac_vf_f16mf2_m ( ... ) __riscv_vfnmsac_vf_f16mf2_tumu(__VA_ARGS__)

◆ vfnmsac_vf_f16mf4

#define vfnmsac_vf_f16mf4 ( ... ) __riscv_vfnmsac_vf_f16mf4_tu(__VA_ARGS__)

◆ vfnmsac_vf_f16mf4_m

#define vfnmsac_vf_f16mf4_m ( ... ) __riscv_vfnmsac_vf_f16mf4_tumu(__VA_ARGS__)

◆ vfnmsac_vf_f32m1

#define vfnmsac_vf_f32m1 ( ... ) __riscv_vfnmsac_vf_f32m1_tu(__VA_ARGS__)

◆ vfnmsac_vf_f32m1_m

#define vfnmsac_vf_f32m1_m ( ... ) __riscv_vfnmsac_vf_f32m1_tumu(__VA_ARGS__)

◆ vfnmsac_vf_f32m2

#define vfnmsac_vf_f32m2 ( ... ) __riscv_vfnmsac_vf_f32m2_tu(__VA_ARGS__)

◆ vfnmsac_vf_f32m2_m

#define vfnmsac_vf_f32m2_m ( ... ) __riscv_vfnmsac_vf_f32m2_tumu(__VA_ARGS__)

◆ vfnmsac_vf_f32m4

#define vfnmsac_vf_f32m4 ( ... ) __riscv_vfnmsac_vf_f32m4_tu(__VA_ARGS__)

◆ vfnmsac_vf_f32m4_m

#define vfnmsac_vf_f32m4_m ( ... ) __riscv_vfnmsac_vf_f32m4_tumu(__VA_ARGS__)

◆ vfnmsac_vf_f32m8

#define vfnmsac_vf_f32m8 ( ... ) __riscv_vfnmsac_vf_f32m8_tu(__VA_ARGS__)

◆ vfnmsac_vf_f32m8_m

#define vfnmsac_vf_f32m8_m ( ... ) __riscv_vfnmsac_vf_f32m8_tumu(__VA_ARGS__)

◆ vfnmsac_vf_f32mf2

#define vfnmsac_vf_f32mf2 ( ... ) __riscv_vfnmsac_vf_f32mf2_tu(__VA_ARGS__)

◆ vfnmsac_vf_f32mf2_m

#define vfnmsac_vf_f32mf2_m ( ... ) __riscv_vfnmsac_vf_f32mf2_tumu(__VA_ARGS__)

◆ vfnmsac_vf_f64m1

#define vfnmsac_vf_f64m1 ( ... ) __riscv_vfnmsac_vf_f64m1_tu(__VA_ARGS__)

◆ vfnmsac_vf_f64m1_m

#define vfnmsac_vf_f64m1_m ( ... ) __riscv_vfnmsac_vf_f64m1_tumu(__VA_ARGS__)

◆ vfnmsac_vf_f64m2

#define vfnmsac_vf_f64m2 ( ... ) __riscv_vfnmsac_vf_f64m2_tu(__VA_ARGS__)

◆ vfnmsac_vf_f64m2_m

#define vfnmsac_vf_f64m2_m ( ... ) __riscv_vfnmsac_vf_f64m2_tumu(__VA_ARGS__)

◆ vfnmsac_vf_f64m4

#define vfnmsac_vf_f64m4 ( ... ) __riscv_vfnmsac_vf_f64m4_tu(__VA_ARGS__)

◆ vfnmsac_vf_f64m4_m

#define vfnmsac_vf_f64m4_m ( ... ) __riscv_vfnmsac_vf_f64m4_tumu(__VA_ARGS__)

◆ vfnmsac_vf_f64m8

#define vfnmsac_vf_f64m8 ( ... ) __riscv_vfnmsac_vf_f64m8_tu(__VA_ARGS__)

◆ vfnmsac_vf_f64m8_m

#define vfnmsac_vf_f64m8_m ( ... ) __riscv_vfnmsac_vf_f64m8_tumu(__VA_ARGS__)

◆ vfnmsac_vv_f16m1

#define vfnmsac_vv_f16m1 ( ... ) __riscv_vfnmsac_vv_f16m1_tu(__VA_ARGS__)

◆ vfnmsac_vv_f16m1_m

#define vfnmsac_vv_f16m1_m ( ... ) __riscv_vfnmsac_vv_f16m1_tumu(__VA_ARGS__)

◆ vfnmsac_vv_f16m2

#define vfnmsac_vv_f16m2 ( ... ) __riscv_vfnmsac_vv_f16m2_tu(__VA_ARGS__)

◆ vfnmsac_vv_f16m2_m

#define vfnmsac_vv_f16m2_m ( ... ) __riscv_vfnmsac_vv_f16m2_tumu(__VA_ARGS__)

◆ vfnmsac_vv_f16m4

#define vfnmsac_vv_f16m4 ( ... ) __riscv_vfnmsac_vv_f16m4_tu(__VA_ARGS__)

◆ vfnmsac_vv_f16m4_m

#define vfnmsac_vv_f16m4_m ( ... ) __riscv_vfnmsac_vv_f16m4_tumu(__VA_ARGS__)

◆ vfnmsac_vv_f16m8

#define vfnmsac_vv_f16m8 ( ... ) __riscv_vfnmsac_vv_f16m8_tu(__VA_ARGS__)

◆ vfnmsac_vv_f16m8_m

#define vfnmsac_vv_f16m8_m ( ... ) __riscv_vfnmsac_vv_f16m8_tumu(__VA_ARGS__)

◆ vfnmsac_vv_f16mf2

#define vfnmsac_vv_f16mf2 ( ... ) __riscv_vfnmsac_vv_f16mf2_tu(__VA_ARGS__)

◆ vfnmsac_vv_f16mf2_m

#define vfnmsac_vv_f16mf2_m ( ... ) __riscv_vfnmsac_vv_f16mf2_tumu(__VA_ARGS__)

◆ vfnmsac_vv_f16mf4

#define vfnmsac_vv_f16mf4 ( ... ) __riscv_vfnmsac_vv_f16mf4_tu(__VA_ARGS__)

◆ vfnmsac_vv_f16mf4_m

#define vfnmsac_vv_f16mf4_m ( ... ) __riscv_vfnmsac_vv_f16mf4_tumu(__VA_ARGS__)

◆ vfnmsac_vv_f32m1

#define vfnmsac_vv_f32m1 ( ... ) __riscv_vfnmsac_vv_f32m1_tu(__VA_ARGS__)

◆ vfnmsac_vv_f32m1_m

#define vfnmsac_vv_f32m1_m ( ... ) __riscv_vfnmsac_vv_f32m1_tumu(__VA_ARGS__)

◆ vfnmsac_vv_f32m2

#define vfnmsac_vv_f32m2 ( ... ) __riscv_vfnmsac_vv_f32m2_tu(__VA_ARGS__)

◆ vfnmsac_vv_f32m2_m

#define vfnmsac_vv_f32m2_m ( ... ) __riscv_vfnmsac_vv_f32m2_tumu(__VA_ARGS__)

◆ vfnmsac_vv_f32m4

#define vfnmsac_vv_f32m4 ( ... ) __riscv_vfnmsac_vv_f32m4_tu(__VA_ARGS__)

◆ vfnmsac_vv_f32m4_m

#define vfnmsac_vv_f32m4_m ( ... ) __riscv_vfnmsac_vv_f32m4_tumu(__VA_ARGS__)

◆ vfnmsac_vv_f32m8

#define vfnmsac_vv_f32m8 ( ... ) __riscv_vfnmsac_vv_f32m8_tu(__VA_ARGS__)

◆ vfnmsac_vv_f32m8_m

#define vfnmsac_vv_f32m8_m ( ... ) __riscv_vfnmsac_vv_f32m8_tumu(__VA_ARGS__)

◆ vfnmsac_vv_f32mf2

#define vfnmsac_vv_f32mf2 ( ... ) __riscv_vfnmsac_vv_f32mf2_tu(__VA_ARGS__)

◆ vfnmsac_vv_f32mf2_m

#define vfnmsac_vv_f32mf2_m ( ... ) __riscv_vfnmsac_vv_f32mf2_tumu(__VA_ARGS__)

◆ vfnmsac_vv_f64m1

#define vfnmsac_vv_f64m1 ( ... ) __riscv_vfnmsac_vv_f64m1_tu(__VA_ARGS__)

◆ vfnmsac_vv_f64m1_m

#define vfnmsac_vv_f64m1_m ( ... ) __riscv_vfnmsac_vv_f64m1_tumu(__VA_ARGS__)

◆ vfnmsac_vv_f64m2

#define vfnmsac_vv_f64m2 ( ... ) __riscv_vfnmsac_vv_f64m2_tu(__VA_ARGS__)

◆ vfnmsac_vv_f64m2_m

#define vfnmsac_vv_f64m2_m ( ... ) __riscv_vfnmsac_vv_f64m2_tumu(__VA_ARGS__)

◆ vfnmsac_vv_f64m4

#define vfnmsac_vv_f64m4 ( ... ) __riscv_vfnmsac_vv_f64m4_tu(__VA_ARGS__)

◆ vfnmsac_vv_f64m4_m

#define vfnmsac_vv_f64m4_m ( ... ) __riscv_vfnmsac_vv_f64m4_tumu(__VA_ARGS__)

◆ vfnmsac_vv_f64m8

#define vfnmsac_vv_f64m8 ( ... ) __riscv_vfnmsac_vv_f64m8_tu(__VA_ARGS__)

◆ vfnmsac_vv_f64m8_m

#define vfnmsac_vv_f64m8_m ( ... ) __riscv_vfnmsac_vv_f64m8_tumu(__VA_ARGS__)

◆ vfnmsub_vf_f16m1

#define vfnmsub_vf_f16m1 ( ... ) __riscv_vfnmsub_vf_f16m1_tu(__VA_ARGS__)

◆ vfnmsub_vf_f16m1_m

#define vfnmsub_vf_f16m1_m ( ... ) __riscv_vfnmsub_vf_f16m1_tumu(__VA_ARGS__)

◆ vfnmsub_vf_f16m2

#define vfnmsub_vf_f16m2 ( ... ) __riscv_vfnmsub_vf_f16m2_tu(__VA_ARGS__)

◆ vfnmsub_vf_f16m2_m

#define vfnmsub_vf_f16m2_m ( ... ) __riscv_vfnmsub_vf_f16m2_tumu(__VA_ARGS__)

◆ vfnmsub_vf_f16m4

#define vfnmsub_vf_f16m4 ( ... ) __riscv_vfnmsub_vf_f16m4_tu(__VA_ARGS__)

◆ vfnmsub_vf_f16m4_m

#define vfnmsub_vf_f16m4_m ( ... ) __riscv_vfnmsub_vf_f16m4_tumu(__VA_ARGS__)

◆ vfnmsub_vf_f16m8

#define vfnmsub_vf_f16m8 ( ... ) __riscv_vfnmsub_vf_f16m8_tu(__VA_ARGS__)

◆ vfnmsub_vf_f16m8_m

#define vfnmsub_vf_f16m8_m ( ... ) __riscv_vfnmsub_vf_f16m8_tumu(__VA_ARGS__)

◆ vfnmsub_vf_f16mf2

#define vfnmsub_vf_f16mf2 ( ... ) __riscv_vfnmsub_vf_f16mf2_tu(__VA_ARGS__)

◆ vfnmsub_vf_f16mf2_m

#define vfnmsub_vf_f16mf2_m ( ... ) __riscv_vfnmsub_vf_f16mf2_tumu(__VA_ARGS__)

◆ vfnmsub_vf_f16mf4

#define vfnmsub_vf_f16mf4 ( ... ) __riscv_vfnmsub_vf_f16mf4_tu(__VA_ARGS__)

◆ vfnmsub_vf_f16mf4_m

#define vfnmsub_vf_f16mf4_m ( ... ) __riscv_vfnmsub_vf_f16mf4_tumu(__VA_ARGS__)

◆ vfnmsub_vf_f32m1

#define vfnmsub_vf_f32m1 ( ... ) __riscv_vfnmsub_vf_f32m1_tu(__VA_ARGS__)

◆ vfnmsub_vf_f32m1_m

#define vfnmsub_vf_f32m1_m ( ... ) __riscv_vfnmsub_vf_f32m1_tumu(__VA_ARGS__)

◆ vfnmsub_vf_f32m2

#define vfnmsub_vf_f32m2 ( ... ) __riscv_vfnmsub_vf_f32m2_tu(__VA_ARGS__)

◆ vfnmsub_vf_f32m2_m

#define vfnmsub_vf_f32m2_m ( ... ) __riscv_vfnmsub_vf_f32m2_tumu(__VA_ARGS__)

◆ vfnmsub_vf_f32m4

#define vfnmsub_vf_f32m4 ( ... ) __riscv_vfnmsub_vf_f32m4_tu(__VA_ARGS__)

◆ vfnmsub_vf_f32m4_m

#define vfnmsub_vf_f32m4_m ( ... ) __riscv_vfnmsub_vf_f32m4_tumu(__VA_ARGS__)

◆ vfnmsub_vf_f32m8

#define vfnmsub_vf_f32m8 ( ... ) __riscv_vfnmsub_vf_f32m8_tu(__VA_ARGS__)

◆ vfnmsub_vf_f32m8_m

#define vfnmsub_vf_f32m8_m ( ... ) __riscv_vfnmsub_vf_f32m8_tumu(__VA_ARGS__)

◆ vfnmsub_vf_f32mf2

#define vfnmsub_vf_f32mf2 ( ... ) __riscv_vfnmsub_vf_f32mf2_tu(__VA_ARGS__)

◆ vfnmsub_vf_f32mf2_m

#define vfnmsub_vf_f32mf2_m ( ... ) __riscv_vfnmsub_vf_f32mf2_tumu(__VA_ARGS__)

◆ vfnmsub_vf_f64m1

#define vfnmsub_vf_f64m1 ( ... ) __riscv_vfnmsub_vf_f64m1_tu(__VA_ARGS__)

◆ vfnmsub_vf_f64m1_m

#define vfnmsub_vf_f64m1_m ( ... ) __riscv_vfnmsub_vf_f64m1_tumu(__VA_ARGS__)

◆ vfnmsub_vf_f64m2

#define vfnmsub_vf_f64m2 ( ... ) __riscv_vfnmsub_vf_f64m2_tu(__VA_ARGS__)

◆ vfnmsub_vf_f64m2_m

#define vfnmsub_vf_f64m2_m ( ... ) __riscv_vfnmsub_vf_f64m2_tumu(__VA_ARGS__)

◆ vfnmsub_vf_f64m4

#define vfnmsub_vf_f64m4 ( ... ) __riscv_vfnmsub_vf_f64m4_tu(__VA_ARGS__)

◆ vfnmsub_vf_f64m4_m

#define vfnmsub_vf_f64m4_m ( ... ) __riscv_vfnmsub_vf_f64m4_tumu(__VA_ARGS__)

◆ vfnmsub_vf_f64m8

#define vfnmsub_vf_f64m8 ( ... ) __riscv_vfnmsub_vf_f64m8_tu(__VA_ARGS__)

◆ vfnmsub_vf_f64m8_m

#define vfnmsub_vf_f64m8_m ( ... ) __riscv_vfnmsub_vf_f64m8_tumu(__VA_ARGS__)

◆ vfnmsub_vv_f16m1

#define vfnmsub_vv_f16m1 ( ... ) __riscv_vfnmsub_vv_f16m1_tu(__VA_ARGS__)

◆ vfnmsub_vv_f16m1_m

#define vfnmsub_vv_f16m1_m ( ... ) __riscv_vfnmsub_vv_f16m1_tumu(__VA_ARGS__)

◆ vfnmsub_vv_f16m2

#define vfnmsub_vv_f16m2 ( ... ) __riscv_vfnmsub_vv_f16m2_tu(__VA_ARGS__)

◆ vfnmsub_vv_f16m2_m

#define vfnmsub_vv_f16m2_m ( ... ) __riscv_vfnmsub_vv_f16m2_tumu(__VA_ARGS__)

◆ vfnmsub_vv_f16m4

#define vfnmsub_vv_f16m4 ( ... ) __riscv_vfnmsub_vv_f16m4_tu(__VA_ARGS__)

◆ vfnmsub_vv_f16m4_m

#define vfnmsub_vv_f16m4_m ( ... ) __riscv_vfnmsub_vv_f16m4_tumu(__VA_ARGS__)

◆ vfnmsub_vv_f16m8

#define vfnmsub_vv_f16m8 ( ... ) __riscv_vfnmsub_vv_f16m8_tu(__VA_ARGS__)

◆ vfnmsub_vv_f16m8_m

#define vfnmsub_vv_f16m8_m ( ... ) __riscv_vfnmsub_vv_f16m8_tumu(__VA_ARGS__)

◆ vfnmsub_vv_f16mf2

#define vfnmsub_vv_f16mf2 ( ... ) __riscv_vfnmsub_vv_f16mf2_tu(__VA_ARGS__)

◆ vfnmsub_vv_f16mf2_m

#define vfnmsub_vv_f16mf2_m ( ... ) __riscv_vfnmsub_vv_f16mf2_tumu(__VA_ARGS__)

◆ vfnmsub_vv_f16mf4

#define vfnmsub_vv_f16mf4 ( ... ) __riscv_vfnmsub_vv_f16mf4_tu(__VA_ARGS__)

◆ vfnmsub_vv_f16mf4_m

#define vfnmsub_vv_f16mf4_m ( ... ) __riscv_vfnmsub_vv_f16mf4_tumu(__VA_ARGS__)

◆ vfnmsub_vv_f32m1

#define vfnmsub_vv_f32m1 ( ... ) __riscv_vfnmsub_vv_f32m1_tu(__VA_ARGS__)

◆ vfnmsub_vv_f32m1_m

#define vfnmsub_vv_f32m1_m ( ... ) __riscv_vfnmsub_vv_f32m1_tumu(__VA_ARGS__)

◆ vfnmsub_vv_f32m2

#define vfnmsub_vv_f32m2 ( ... ) __riscv_vfnmsub_vv_f32m2_tu(__VA_ARGS__)

◆ vfnmsub_vv_f32m2_m

#define vfnmsub_vv_f32m2_m ( ... ) __riscv_vfnmsub_vv_f32m2_tumu(__VA_ARGS__)

◆ vfnmsub_vv_f32m4

#define vfnmsub_vv_f32m4 ( ... ) __riscv_vfnmsub_vv_f32m4_tu(__VA_ARGS__)

◆ vfnmsub_vv_f32m4_m

#define vfnmsub_vv_f32m4_m ( ... ) __riscv_vfnmsub_vv_f32m4_tumu(__VA_ARGS__)

◆ vfnmsub_vv_f32m8

#define vfnmsub_vv_f32m8 ( ... ) __riscv_vfnmsub_vv_f32m8_tu(__VA_ARGS__)

◆ vfnmsub_vv_f32m8_m

#define vfnmsub_vv_f32m8_m ( ... ) __riscv_vfnmsub_vv_f32m8_tumu(__VA_ARGS__)

◆ vfnmsub_vv_f32mf2

#define vfnmsub_vv_f32mf2 ( ... ) __riscv_vfnmsub_vv_f32mf2_tu(__VA_ARGS__)

◆ vfnmsub_vv_f32mf2_m

#define vfnmsub_vv_f32mf2_m ( ... ) __riscv_vfnmsub_vv_f32mf2_tumu(__VA_ARGS__)

◆ vfnmsub_vv_f64m1

#define vfnmsub_vv_f64m1 ( ... ) __riscv_vfnmsub_vv_f64m1_tu(__VA_ARGS__)

◆ vfnmsub_vv_f64m1_m

#define vfnmsub_vv_f64m1_m ( ... ) __riscv_vfnmsub_vv_f64m1_tumu(__VA_ARGS__)

◆ vfnmsub_vv_f64m2

#define vfnmsub_vv_f64m2 ( ... ) __riscv_vfnmsub_vv_f64m2_tu(__VA_ARGS__)

◆ vfnmsub_vv_f64m2_m

#define vfnmsub_vv_f64m2_m ( ... ) __riscv_vfnmsub_vv_f64m2_tumu(__VA_ARGS__)

◆ vfnmsub_vv_f64m4

#define vfnmsub_vv_f64m4 ( ... ) __riscv_vfnmsub_vv_f64m4_tu(__VA_ARGS__)

◆ vfnmsub_vv_f64m4_m

#define vfnmsub_vv_f64m4_m ( ... ) __riscv_vfnmsub_vv_f64m4_tumu(__VA_ARGS__)

◆ vfnmsub_vv_f64m8

#define vfnmsub_vv_f64m8 ( ... ) __riscv_vfnmsub_vv_f64m8_tu(__VA_ARGS__)

◆ vfnmsub_vv_f64m8_m

#define vfnmsub_vv_f64m8_m ( ... ) __riscv_vfnmsub_vv_f64m8_tumu(__VA_ARGS__)

◆ vfrdiv_vf_f16m1

#define vfrdiv_vf_f16m1 ( ... ) __riscv_vfrdiv_vf_f16m1(__VA_ARGS__)

◆ vfrdiv_vf_f16m1_m

#define vfrdiv_vf_f16m1_m ( ... ) __riscv_vfrdiv_vf_f16m1_tumu(__VA_ARGS__)

◆ vfrdiv_vf_f16m2

#define vfrdiv_vf_f16m2 ( ... ) __riscv_vfrdiv_vf_f16m2(__VA_ARGS__)

◆ vfrdiv_vf_f16m2_m

#define vfrdiv_vf_f16m2_m ( ... ) __riscv_vfrdiv_vf_f16m2_tumu(__VA_ARGS__)

◆ vfrdiv_vf_f16m4

#define vfrdiv_vf_f16m4 ( ... ) __riscv_vfrdiv_vf_f16m4(__VA_ARGS__)

◆ vfrdiv_vf_f16m4_m

#define vfrdiv_vf_f16m4_m ( ... ) __riscv_vfrdiv_vf_f16m4_tumu(__VA_ARGS__)

◆ vfrdiv_vf_f16m8

#define vfrdiv_vf_f16m8 ( ... ) __riscv_vfrdiv_vf_f16m8(__VA_ARGS__)

◆ vfrdiv_vf_f16m8_m

#define vfrdiv_vf_f16m8_m ( ... ) __riscv_vfrdiv_vf_f16m8_tumu(__VA_ARGS__)

◆ vfrdiv_vf_f16mf2

#define vfrdiv_vf_f16mf2 ( ... ) __riscv_vfrdiv_vf_f16mf2(__VA_ARGS__)

◆ vfrdiv_vf_f16mf2_m

#define vfrdiv_vf_f16mf2_m ( ... ) __riscv_vfrdiv_vf_f16mf2_tumu(__VA_ARGS__)

◆ vfrdiv_vf_f16mf4

#define vfrdiv_vf_f16mf4 ( ... ) __riscv_vfrdiv_vf_f16mf4(__VA_ARGS__)

◆ vfrdiv_vf_f16mf4_m

#define vfrdiv_vf_f16mf4_m ( ... ) __riscv_vfrdiv_vf_f16mf4_tumu(__VA_ARGS__)

◆ vfrdiv_vf_f32m1

#define vfrdiv_vf_f32m1 ( ... ) __riscv_vfrdiv_vf_f32m1(__VA_ARGS__)

◆ vfrdiv_vf_f32m1_m

#define vfrdiv_vf_f32m1_m ( ... ) __riscv_vfrdiv_vf_f32m1_tumu(__VA_ARGS__)

◆ vfrdiv_vf_f32m2

#define vfrdiv_vf_f32m2 ( ... ) __riscv_vfrdiv_vf_f32m2(__VA_ARGS__)

◆ vfrdiv_vf_f32m2_m

#define vfrdiv_vf_f32m2_m ( ... ) __riscv_vfrdiv_vf_f32m2_tumu(__VA_ARGS__)

◆ vfrdiv_vf_f32m4

#define vfrdiv_vf_f32m4 ( ... ) __riscv_vfrdiv_vf_f32m4(__VA_ARGS__)

◆ vfrdiv_vf_f32m4_m

#define vfrdiv_vf_f32m4_m ( ... ) __riscv_vfrdiv_vf_f32m4_tumu(__VA_ARGS__)

◆ vfrdiv_vf_f32m8

#define vfrdiv_vf_f32m8 ( ... ) __riscv_vfrdiv_vf_f32m8(__VA_ARGS__)

◆ vfrdiv_vf_f32m8_m

#define vfrdiv_vf_f32m8_m ( ... ) __riscv_vfrdiv_vf_f32m8_tumu(__VA_ARGS__)

◆ vfrdiv_vf_f32mf2

#define vfrdiv_vf_f32mf2 ( ... ) __riscv_vfrdiv_vf_f32mf2(__VA_ARGS__)

◆ vfrdiv_vf_f32mf2_m

#define vfrdiv_vf_f32mf2_m ( ... ) __riscv_vfrdiv_vf_f32mf2_tumu(__VA_ARGS__)

◆ vfrdiv_vf_f64m1

#define vfrdiv_vf_f64m1 ( ... ) __riscv_vfrdiv_vf_f64m1(__VA_ARGS__)

◆ vfrdiv_vf_f64m1_m

#define vfrdiv_vf_f64m1_m ( ... ) __riscv_vfrdiv_vf_f64m1_tumu(__VA_ARGS__)

◆ vfrdiv_vf_f64m2

#define vfrdiv_vf_f64m2 ( ... ) __riscv_vfrdiv_vf_f64m2(__VA_ARGS__)

◆ vfrdiv_vf_f64m2_m

#define vfrdiv_vf_f64m2_m ( ... ) __riscv_vfrdiv_vf_f64m2_tumu(__VA_ARGS__)

◆ vfrdiv_vf_f64m4

#define vfrdiv_vf_f64m4 ( ... ) __riscv_vfrdiv_vf_f64m4(__VA_ARGS__)

◆ vfrdiv_vf_f64m4_m

#define vfrdiv_vf_f64m4_m ( ... ) __riscv_vfrdiv_vf_f64m4_tumu(__VA_ARGS__)

◆ vfrdiv_vf_f64m8

#define vfrdiv_vf_f64m8 ( ... ) __riscv_vfrdiv_vf_f64m8(__VA_ARGS__)

◆ vfrdiv_vf_f64m8_m

#define vfrdiv_vf_f64m8_m ( ... ) __riscv_vfrdiv_vf_f64m8_tumu(__VA_ARGS__)

◆ vfrec7_v_f16m1

#define vfrec7_v_f16m1 ( ... ) __riscv_vfrec7_v_f16m1(__VA_ARGS__)

◆ vfrec7_v_f16m1_m

#define vfrec7_v_f16m1_m ( ... ) __riscv_vfrec7_v_f16m1_tumu(__VA_ARGS__)

◆ vfrec7_v_f16m2

#define vfrec7_v_f16m2 ( ... ) __riscv_vfrec7_v_f16m2(__VA_ARGS__)

◆ vfrec7_v_f16m2_m

#define vfrec7_v_f16m2_m ( ... ) __riscv_vfrec7_v_f16m2_tumu(__VA_ARGS__)

◆ vfrec7_v_f16m4

#define vfrec7_v_f16m4 ( ... ) __riscv_vfrec7_v_f16m4(__VA_ARGS__)

◆ vfrec7_v_f16m4_m

#define vfrec7_v_f16m4_m ( ... ) __riscv_vfrec7_v_f16m4_tumu(__VA_ARGS__)

◆ vfrec7_v_f16m8

#define vfrec7_v_f16m8 ( ... ) __riscv_vfrec7_v_f16m8(__VA_ARGS__)

◆ vfrec7_v_f16m8_m

#define vfrec7_v_f16m8_m ( ... ) __riscv_vfrec7_v_f16m8_tumu(__VA_ARGS__)

◆ vfrec7_v_f16mf2

#define vfrec7_v_f16mf2 ( ... ) __riscv_vfrec7_v_f16mf2(__VA_ARGS__)

◆ vfrec7_v_f16mf2_m

#define vfrec7_v_f16mf2_m ( ... ) __riscv_vfrec7_v_f16mf2_tumu(__VA_ARGS__)

◆ vfrec7_v_f16mf4

#define vfrec7_v_f16mf4 ( ... ) __riscv_vfrec7_v_f16mf4(__VA_ARGS__)

◆ vfrec7_v_f16mf4_m

#define vfrec7_v_f16mf4_m ( ... ) __riscv_vfrec7_v_f16mf4_tumu(__VA_ARGS__)

◆ vfrec7_v_f32m1

#define vfrec7_v_f32m1 ( ... ) __riscv_vfrec7_v_f32m1(__VA_ARGS__)

◆ vfrec7_v_f32m1_m

#define vfrec7_v_f32m1_m ( ... ) __riscv_vfrec7_v_f32m1_tumu(__VA_ARGS__)

◆ vfrec7_v_f32m2

#define vfrec7_v_f32m2 ( ... ) __riscv_vfrec7_v_f32m2(__VA_ARGS__)

◆ vfrec7_v_f32m2_m

#define vfrec7_v_f32m2_m ( ... ) __riscv_vfrec7_v_f32m2_tumu(__VA_ARGS__)

◆ vfrec7_v_f32m4

#define vfrec7_v_f32m4 ( ... ) __riscv_vfrec7_v_f32m4(__VA_ARGS__)

◆ vfrec7_v_f32m4_m

#define vfrec7_v_f32m4_m ( ... ) __riscv_vfrec7_v_f32m4_tumu(__VA_ARGS__)

◆ vfrec7_v_f32m8

#define vfrec7_v_f32m8 ( ... ) __riscv_vfrec7_v_f32m8(__VA_ARGS__)

◆ vfrec7_v_f32m8_m

#define vfrec7_v_f32m8_m ( ... ) __riscv_vfrec7_v_f32m8_tumu(__VA_ARGS__)

◆ vfrec7_v_f32mf2

#define vfrec7_v_f32mf2 ( ... ) __riscv_vfrec7_v_f32mf2(__VA_ARGS__)

◆ vfrec7_v_f32mf2_m

#define vfrec7_v_f32mf2_m ( ... ) __riscv_vfrec7_v_f32mf2_tumu(__VA_ARGS__)

◆ vfrec7_v_f64m1

#define vfrec7_v_f64m1 ( ... ) __riscv_vfrec7_v_f64m1(__VA_ARGS__)

◆ vfrec7_v_f64m1_m

#define vfrec7_v_f64m1_m ( ... ) __riscv_vfrec7_v_f64m1_tumu(__VA_ARGS__)

◆ vfrec7_v_f64m2

#define vfrec7_v_f64m2 ( ... ) __riscv_vfrec7_v_f64m2(__VA_ARGS__)

◆ vfrec7_v_f64m2_m

#define vfrec7_v_f64m2_m ( ... ) __riscv_vfrec7_v_f64m2_tumu(__VA_ARGS__)

◆ vfrec7_v_f64m4

#define vfrec7_v_f64m4 ( ... ) __riscv_vfrec7_v_f64m4(__VA_ARGS__)

◆ vfrec7_v_f64m4_m

#define vfrec7_v_f64m4_m ( ... ) __riscv_vfrec7_v_f64m4_tumu(__VA_ARGS__)

◆ vfrec7_v_f64m8

#define vfrec7_v_f64m8 ( ... ) __riscv_vfrec7_v_f64m8(__VA_ARGS__)

◆ vfrec7_v_f64m8_m

#define vfrec7_v_f64m8_m ( ... ) __riscv_vfrec7_v_f64m8_tumu(__VA_ARGS__)

◆ vfredmax_vs_f16m1_f16m1

#define vfredmax_vs_f16m1_f16m1 ( ... ) __riscv_vfredmax_vs_f16m1_f16m1_tu(__VA_ARGS__)

◆ vfredmax_vs_f16m1_f16m1_m

#define vfredmax_vs_f16m1_f16m1_m ( ... ) __riscv_vfredmax_vs_f16m1_f16m1_tum(__VA_ARGS__)

◆ vfredmax_vs_f16m2_f16m1

#define vfredmax_vs_f16m2_f16m1 ( ... ) __riscv_vfredmax_vs_f16m2_f16m1_tu(__VA_ARGS__)

◆ vfredmax_vs_f16m2_f16m1_m

#define vfredmax_vs_f16m2_f16m1_m ( ... ) __riscv_vfredmax_vs_f16m2_f16m1_tum(__VA_ARGS__)

◆ vfredmax_vs_f16m4_f16m1

#define vfredmax_vs_f16m4_f16m1 ( ... ) __riscv_vfredmax_vs_f16m4_f16m1_tu(__VA_ARGS__)

◆ vfredmax_vs_f16m4_f16m1_m

#define vfredmax_vs_f16m4_f16m1_m ( ... ) __riscv_vfredmax_vs_f16m4_f16m1_tum(__VA_ARGS__)

◆ vfredmax_vs_f16m8_f16m1

#define vfredmax_vs_f16m8_f16m1 ( ... ) __riscv_vfredmax_vs_f16m8_f16m1_tu(__VA_ARGS__)

◆ vfredmax_vs_f16m8_f16m1_m

#define vfredmax_vs_f16m8_f16m1_m ( ... ) __riscv_vfredmax_vs_f16m8_f16m1_tum(__VA_ARGS__)

◆ vfredmax_vs_f16mf2_f16m1

#define vfredmax_vs_f16mf2_f16m1 ( ... ) __riscv_vfredmax_vs_f16mf2_f16m1_tu(__VA_ARGS__)

◆ vfredmax_vs_f16mf2_f16m1_m

#define vfredmax_vs_f16mf2_f16m1_m ( ... ) __riscv_vfredmax_vs_f16mf2_f16m1_tum(__VA_ARGS__)

◆ vfredmax_vs_f16mf4_f16m1

#define vfredmax_vs_f16mf4_f16m1 ( ... ) __riscv_vfredmax_vs_f16mf4_f16m1_tu(__VA_ARGS__)

◆ vfredmax_vs_f16mf4_f16m1_m

#define vfredmax_vs_f16mf4_f16m1_m ( ... ) __riscv_vfredmax_vs_f16mf4_f16m1_tum(__VA_ARGS__)

◆ vfredmax_vs_f32m1_f32m1

#define vfredmax_vs_f32m1_f32m1 ( ... ) __riscv_vfredmax_vs_f32m1_f32m1_tu(__VA_ARGS__)

◆ vfredmax_vs_f32m1_f32m1_m

#define vfredmax_vs_f32m1_f32m1_m ( ... ) __riscv_vfredmax_vs_f32m1_f32m1_tum(__VA_ARGS__)

◆ vfredmax_vs_f32m2_f32m1

#define vfredmax_vs_f32m2_f32m1 ( ... ) __riscv_vfredmax_vs_f32m2_f32m1_tu(__VA_ARGS__)

◆ vfredmax_vs_f32m2_f32m1_m

#define vfredmax_vs_f32m2_f32m1_m ( ... ) __riscv_vfredmax_vs_f32m2_f32m1_tum(__VA_ARGS__)

◆ vfredmax_vs_f32m4_f32m1

#define vfredmax_vs_f32m4_f32m1 ( ... ) __riscv_vfredmax_vs_f32m4_f32m1_tu(__VA_ARGS__)

◆ vfredmax_vs_f32m4_f32m1_m

#define vfredmax_vs_f32m4_f32m1_m ( ... ) __riscv_vfredmax_vs_f32m4_f32m1_tum(__VA_ARGS__)

◆ vfredmax_vs_f32m8_f32m1

#define vfredmax_vs_f32m8_f32m1 ( ... ) __riscv_vfredmax_vs_f32m8_f32m1_tu(__VA_ARGS__)

◆ vfredmax_vs_f32m8_f32m1_m

#define vfredmax_vs_f32m8_f32m1_m ( ... ) __riscv_vfredmax_vs_f32m8_f32m1_tum(__VA_ARGS__)

◆ vfredmax_vs_f32mf2_f32m1

#define vfredmax_vs_f32mf2_f32m1 ( ... ) __riscv_vfredmax_vs_f32mf2_f32m1_tu(__VA_ARGS__)

◆ vfredmax_vs_f32mf2_f32m1_m

#define vfredmax_vs_f32mf2_f32m1_m ( ... ) __riscv_vfredmax_vs_f32mf2_f32m1_tum(__VA_ARGS__)

◆ vfredmax_vs_f64m1_f64m1

#define vfredmax_vs_f64m1_f64m1 ( ... ) __riscv_vfredmax_vs_f64m1_f64m1_tu(__VA_ARGS__)

◆ vfredmax_vs_f64m1_f64m1_m

#define vfredmax_vs_f64m1_f64m1_m ( ... ) __riscv_vfredmax_vs_f64m1_f64m1_tum(__VA_ARGS__)

◆ vfredmax_vs_f64m2_f64m1

#define vfredmax_vs_f64m2_f64m1 ( ... ) __riscv_vfredmax_vs_f64m2_f64m1_tu(__VA_ARGS__)

◆ vfredmax_vs_f64m2_f64m1_m

#define vfredmax_vs_f64m2_f64m1_m ( ... ) __riscv_vfredmax_vs_f64m2_f64m1_tum(__VA_ARGS__)

◆ vfredmax_vs_f64m4_f64m1

#define vfredmax_vs_f64m4_f64m1 ( ... ) __riscv_vfredmax_vs_f64m4_f64m1_tu(__VA_ARGS__)

◆ vfredmax_vs_f64m4_f64m1_m

#define vfredmax_vs_f64m4_f64m1_m ( ... ) __riscv_vfredmax_vs_f64m4_f64m1_tum(__VA_ARGS__)

◆ vfredmax_vs_f64m8_f64m1

#define vfredmax_vs_f64m8_f64m1 ( ... ) __riscv_vfredmax_vs_f64m8_f64m1_tu(__VA_ARGS__)

◆ vfredmax_vs_f64m8_f64m1_m

#define vfredmax_vs_f64m8_f64m1_m ( ... ) __riscv_vfredmax_vs_f64m8_f64m1_tum(__VA_ARGS__)

◆ vfredmin_vs_f16m1_f16m1

#define vfredmin_vs_f16m1_f16m1 ( ... ) __riscv_vfredmin_vs_f16m1_f16m1_tu(__VA_ARGS__)

◆ vfredmin_vs_f16m1_f16m1_m

#define vfredmin_vs_f16m1_f16m1_m ( ... ) __riscv_vfredmin_vs_f16m1_f16m1_tum(__VA_ARGS__)

◆ vfredmin_vs_f16m2_f16m1

#define vfredmin_vs_f16m2_f16m1 ( ... ) __riscv_vfredmin_vs_f16m2_f16m1_tu(__VA_ARGS__)

◆ vfredmin_vs_f16m2_f16m1_m

#define vfredmin_vs_f16m2_f16m1_m ( ... ) __riscv_vfredmin_vs_f16m2_f16m1_tum(__VA_ARGS__)

◆ vfredmin_vs_f16m4_f16m1

#define vfredmin_vs_f16m4_f16m1 ( ... ) __riscv_vfredmin_vs_f16m4_f16m1_tu(__VA_ARGS__)

◆ vfredmin_vs_f16m4_f16m1_m

#define vfredmin_vs_f16m4_f16m1_m ( ... ) __riscv_vfredmin_vs_f16m4_f16m1_tum(__VA_ARGS__)

◆ vfredmin_vs_f16m8_f16m1

#define vfredmin_vs_f16m8_f16m1 ( ... ) __riscv_vfredmin_vs_f16m8_f16m1_tu(__VA_ARGS__)

◆ vfredmin_vs_f16m8_f16m1_m

#define vfredmin_vs_f16m8_f16m1_m ( ... ) __riscv_vfredmin_vs_f16m8_f16m1_tum(__VA_ARGS__)

◆ vfredmin_vs_f16mf2_f16m1

#define vfredmin_vs_f16mf2_f16m1 ( ... ) __riscv_vfredmin_vs_f16mf2_f16m1_tu(__VA_ARGS__)

◆ vfredmin_vs_f16mf2_f16m1_m

#define vfredmin_vs_f16mf2_f16m1_m ( ... ) __riscv_vfredmin_vs_f16mf2_f16m1_tum(__VA_ARGS__)

◆ vfredmin_vs_f16mf4_f16m1

#define vfredmin_vs_f16mf4_f16m1 ( ... ) __riscv_vfredmin_vs_f16mf4_f16m1_tu(__VA_ARGS__)

◆ vfredmin_vs_f16mf4_f16m1_m

#define vfredmin_vs_f16mf4_f16m1_m ( ... ) __riscv_vfredmin_vs_f16mf4_f16m1_tum(__VA_ARGS__)

◆ vfredmin_vs_f32m1_f32m1

#define vfredmin_vs_f32m1_f32m1 ( ... ) __riscv_vfredmin_vs_f32m1_f32m1_tu(__VA_ARGS__)

◆ vfredmin_vs_f32m1_f32m1_m

#define vfredmin_vs_f32m1_f32m1_m ( ... ) __riscv_vfredmin_vs_f32m1_f32m1_tum(__VA_ARGS__)

◆ vfredmin_vs_f32m2_f32m1

#define vfredmin_vs_f32m2_f32m1 ( ... ) __riscv_vfredmin_vs_f32m2_f32m1_tu(__VA_ARGS__)

◆ vfredmin_vs_f32m2_f32m1_m

#define vfredmin_vs_f32m2_f32m1_m ( ... ) __riscv_vfredmin_vs_f32m2_f32m1_tum(__VA_ARGS__)

◆ vfredmin_vs_f32m4_f32m1

#define vfredmin_vs_f32m4_f32m1 ( ... ) __riscv_vfredmin_vs_f32m4_f32m1_tu(__VA_ARGS__)

◆ vfredmin_vs_f32m4_f32m1_m

#define vfredmin_vs_f32m4_f32m1_m ( ... ) __riscv_vfredmin_vs_f32m4_f32m1_tum(__VA_ARGS__)

◆ vfredmin_vs_f32m8_f32m1

#define vfredmin_vs_f32m8_f32m1 ( ... ) __riscv_vfredmin_vs_f32m8_f32m1_tu(__VA_ARGS__)

◆ vfredmin_vs_f32m8_f32m1_m

#define vfredmin_vs_f32m8_f32m1_m ( ... ) __riscv_vfredmin_vs_f32m8_f32m1_tum(__VA_ARGS__)

◆ vfredmin_vs_f32mf2_f32m1

#define vfredmin_vs_f32mf2_f32m1 ( ... ) __riscv_vfredmin_vs_f32mf2_f32m1_tu(__VA_ARGS__)

◆ vfredmin_vs_f32mf2_f32m1_m

#define vfredmin_vs_f32mf2_f32m1_m ( ... ) __riscv_vfredmin_vs_f32mf2_f32m1_tum(__VA_ARGS__)

◆ vfredmin_vs_f64m1_f64m1

#define vfredmin_vs_f64m1_f64m1 ( ... ) __riscv_vfredmin_vs_f64m1_f64m1_tu(__VA_ARGS__)

◆ vfredmin_vs_f64m1_f64m1_m

#define vfredmin_vs_f64m1_f64m1_m ( ... ) __riscv_vfredmin_vs_f64m1_f64m1_tum(__VA_ARGS__)

◆ vfredmin_vs_f64m2_f64m1

#define vfredmin_vs_f64m2_f64m1 ( ... ) __riscv_vfredmin_vs_f64m2_f64m1_tu(__VA_ARGS__)

◆ vfredmin_vs_f64m2_f64m1_m

#define vfredmin_vs_f64m2_f64m1_m ( ... ) __riscv_vfredmin_vs_f64m2_f64m1_tum(__VA_ARGS__)

◆ vfredmin_vs_f64m4_f64m1

#define vfredmin_vs_f64m4_f64m1 ( ... ) __riscv_vfredmin_vs_f64m4_f64m1_tu(__VA_ARGS__)

◆ vfredmin_vs_f64m4_f64m1_m

#define vfredmin_vs_f64m4_f64m1_m ( ... ) __riscv_vfredmin_vs_f64m4_f64m1_tum(__VA_ARGS__)

◆ vfredmin_vs_f64m8_f64m1

#define vfredmin_vs_f64m8_f64m1 ( ... ) __riscv_vfredmin_vs_f64m8_f64m1_tu(__VA_ARGS__)

◆ vfredmin_vs_f64m8_f64m1_m

#define vfredmin_vs_f64m8_f64m1_m ( ... ) __riscv_vfredmin_vs_f64m8_f64m1_tum(__VA_ARGS__)

◆ vfredosum_vs_f16m1_f16m1

#define vfredosum_vs_f16m1_f16m1 ( ... ) __riscv_vfredosum_vs_f16m1_f16m1_tu(__VA_ARGS__)

◆ vfredosum_vs_f16m1_f16m1_m

#define vfredosum_vs_f16m1_f16m1_m ( ... ) __riscv_vfredosum_vs_f16m1_f16m1_tum(__VA_ARGS__)

◆ vfredosum_vs_f16m2_f16m1

#define vfredosum_vs_f16m2_f16m1 ( ... ) __riscv_vfredosum_vs_f16m2_f16m1_tu(__VA_ARGS__)

◆ vfredosum_vs_f16m2_f16m1_m

#define vfredosum_vs_f16m2_f16m1_m ( ... ) __riscv_vfredosum_vs_f16m2_f16m1_tum(__VA_ARGS__)

◆ vfredosum_vs_f16m4_f16m1

#define vfredosum_vs_f16m4_f16m1 ( ... ) __riscv_vfredosum_vs_f16m4_f16m1_tu(__VA_ARGS__)

◆ vfredosum_vs_f16m4_f16m1_m

#define vfredosum_vs_f16m4_f16m1_m ( ... ) __riscv_vfredosum_vs_f16m4_f16m1_tum(__VA_ARGS__)

◆ vfredosum_vs_f16m8_f16m1

#define vfredosum_vs_f16m8_f16m1 ( ... ) __riscv_vfredosum_vs_f16m8_f16m1_tu(__VA_ARGS__)

◆ vfredosum_vs_f16m8_f16m1_m

#define vfredosum_vs_f16m8_f16m1_m ( ... ) __riscv_vfredosum_vs_f16m8_f16m1_tum(__VA_ARGS__)

◆ vfredosum_vs_f16mf2_f16m1

#define vfredosum_vs_f16mf2_f16m1 ( ... ) __riscv_vfredosum_vs_f16mf2_f16m1_tu(__VA_ARGS__)

◆ vfredosum_vs_f16mf2_f16m1_m

#define vfredosum_vs_f16mf2_f16m1_m ( ... ) __riscv_vfredosum_vs_f16mf2_f16m1_tum(__VA_ARGS__)

◆ vfredosum_vs_f16mf4_f16m1

#define vfredosum_vs_f16mf4_f16m1 ( ... ) __riscv_vfredosum_vs_f16mf4_f16m1_tu(__VA_ARGS__)

◆ vfredosum_vs_f16mf4_f16m1_m

#define vfredosum_vs_f16mf4_f16m1_m ( ... ) __riscv_vfredosum_vs_f16mf4_f16m1_tum(__VA_ARGS__)

◆ vfredosum_vs_f32m1_f32m1

#define vfredosum_vs_f32m1_f32m1 ( ... ) __riscv_vfredosum_vs_f32m1_f32m1_tu(__VA_ARGS__)

◆ vfredosum_vs_f32m1_f32m1_m

#define vfredosum_vs_f32m1_f32m1_m ( ... ) __riscv_vfredosum_vs_f32m1_f32m1_tum(__VA_ARGS__)

◆ vfredosum_vs_f32m2_f32m1

#define vfredosum_vs_f32m2_f32m1 ( ... ) __riscv_vfredosum_vs_f32m2_f32m1_tu(__VA_ARGS__)

◆ vfredosum_vs_f32m2_f32m1_m

#define vfredosum_vs_f32m2_f32m1_m ( ... ) __riscv_vfredosum_vs_f32m2_f32m1_tum(__VA_ARGS__)

◆ vfredosum_vs_f32m4_f32m1

#define vfredosum_vs_f32m4_f32m1 ( ... ) __riscv_vfredosum_vs_f32m4_f32m1_tu(__VA_ARGS__)

◆ vfredosum_vs_f32m4_f32m1_m

#define vfredosum_vs_f32m4_f32m1_m ( ... ) __riscv_vfredosum_vs_f32m4_f32m1_tum(__VA_ARGS__)

◆ vfredosum_vs_f32m8_f32m1

#define vfredosum_vs_f32m8_f32m1 ( ... ) __riscv_vfredosum_vs_f32m8_f32m1_tu(__VA_ARGS__)

◆ vfredosum_vs_f32m8_f32m1_m

#define vfredosum_vs_f32m8_f32m1_m ( ... ) __riscv_vfredosum_vs_f32m8_f32m1_tum(__VA_ARGS__)

◆ vfredosum_vs_f32mf2_f32m1

#define vfredosum_vs_f32mf2_f32m1 ( ... ) __riscv_vfredosum_vs_f32mf2_f32m1_tu(__VA_ARGS__)

◆ vfredosum_vs_f32mf2_f32m1_m

#define vfredosum_vs_f32mf2_f32m1_m ( ... ) __riscv_vfredosum_vs_f32mf2_f32m1_tum(__VA_ARGS__)

◆ vfredosum_vs_f64m1_f64m1

#define vfredosum_vs_f64m1_f64m1 ( ... ) __riscv_vfredosum_vs_f64m1_f64m1_tu(__VA_ARGS__)

◆ vfredosum_vs_f64m1_f64m1_m

#define vfredosum_vs_f64m1_f64m1_m ( ... ) __riscv_vfredosum_vs_f64m1_f64m1_tum(__VA_ARGS__)

◆ vfredosum_vs_f64m2_f64m1

#define vfredosum_vs_f64m2_f64m1 ( ... ) __riscv_vfredosum_vs_f64m2_f64m1_tu(__VA_ARGS__)

◆ vfredosum_vs_f64m2_f64m1_m

#define vfredosum_vs_f64m2_f64m1_m ( ... ) __riscv_vfredosum_vs_f64m2_f64m1_tum(__VA_ARGS__)

◆ vfredosum_vs_f64m4_f64m1

#define vfredosum_vs_f64m4_f64m1 ( ... ) __riscv_vfredosum_vs_f64m4_f64m1_tu(__VA_ARGS__)

◆ vfredosum_vs_f64m4_f64m1_m

#define vfredosum_vs_f64m4_f64m1_m ( ... ) __riscv_vfredosum_vs_f64m4_f64m1_tum(__VA_ARGS__)

◆ vfredosum_vs_f64m8_f64m1

#define vfredosum_vs_f64m8_f64m1 ( ... ) __riscv_vfredosum_vs_f64m8_f64m1_tu(__VA_ARGS__)

◆ vfredosum_vs_f64m8_f64m1_m

#define vfredosum_vs_f64m8_f64m1_m ( ... ) __riscv_vfredosum_vs_f64m8_f64m1_tum(__VA_ARGS__)

◆ vfredusum_vs_f16m1_f16m1

#define vfredusum_vs_f16m1_f16m1 ( ... ) __riscv_vfredusum_vs_f16m1_f16m1_tu(__VA_ARGS__)

◆ vfredusum_vs_f16m1_f16m1_m

#define vfredusum_vs_f16m1_f16m1_m ( ... ) __riscv_vfredusum_vs_f16m1_f16m1_tum(__VA_ARGS__)

◆ vfredusum_vs_f16m2_f16m1

#define vfredusum_vs_f16m2_f16m1 ( ... ) __riscv_vfredusum_vs_f16m2_f16m1_tu(__VA_ARGS__)

◆ vfredusum_vs_f16m2_f16m1_m

#define vfredusum_vs_f16m2_f16m1_m ( ... ) __riscv_vfredusum_vs_f16m2_f16m1_tum(__VA_ARGS__)

◆ vfredusum_vs_f16m4_f16m1

#define vfredusum_vs_f16m4_f16m1 ( ... ) __riscv_vfredusum_vs_f16m4_f16m1_tu(__VA_ARGS__)

◆ vfredusum_vs_f16m4_f16m1_m

#define vfredusum_vs_f16m4_f16m1_m ( ... ) __riscv_vfredusum_vs_f16m4_f16m1_tum(__VA_ARGS__)

◆ vfredusum_vs_f16m8_f16m1

#define vfredusum_vs_f16m8_f16m1 ( ... ) __riscv_vfredusum_vs_f16m8_f16m1_tu(__VA_ARGS__)

◆ vfredusum_vs_f16m8_f16m1_m

#define vfredusum_vs_f16m8_f16m1_m ( ... ) __riscv_vfredusum_vs_f16m8_f16m1_tum(__VA_ARGS__)

◆ vfredusum_vs_f16mf2_f16m1

#define vfredusum_vs_f16mf2_f16m1 ( ... ) __riscv_vfredusum_vs_f16mf2_f16m1_tu(__VA_ARGS__)

◆ vfredusum_vs_f16mf2_f16m1_m

#define vfredusum_vs_f16mf2_f16m1_m ( ... ) __riscv_vfredusum_vs_f16mf2_f16m1_tum(__VA_ARGS__)

◆ vfredusum_vs_f16mf4_f16m1

#define vfredusum_vs_f16mf4_f16m1 ( ... ) __riscv_vfredusum_vs_f16mf4_f16m1_tu(__VA_ARGS__)

◆ vfredusum_vs_f16mf4_f16m1_m

#define vfredusum_vs_f16mf4_f16m1_m ( ... ) __riscv_vfredusum_vs_f16mf4_f16m1_tum(__VA_ARGS__)

◆ vfredusum_vs_f32m1_f32m1

#define vfredusum_vs_f32m1_f32m1 ( ... ) __riscv_vfredusum_vs_f32m1_f32m1_tu(__VA_ARGS__)

◆ vfredusum_vs_f32m1_f32m1_m

#define vfredusum_vs_f32m1_f32m1_m ( ... ) __riscv_vfredusum_vs_f32m1_f32m1_tum(__VA_ARGS__)

◆ vfredusum_vs_f32m2_f32m1

#define vfredusum_vs_f32m2_f32m1 ( ... ) __riscv_vfredusum_vs_f32m2_f32m1_tu(__VA_ARGS__)

◆ vfredusum_vs_f32m2_f32m1_m

#define vfredusum_vs_f32m2_f32m1_m ( ... ) __riscv_vfredusum_vs_f32m2_f32m1_tum(__VA_ARGS__)

◆ vfredusum_vs_f32m4_f32m1

#define vfredusum_vs_f32m4_f32m1 ( ... ) __riscv_vfredusum_vs_f32m4_f32m1_tu(__VA_ARGS__)

◆ vfredusum_vs_f32m4_f32m1_m

#define vfredusum_vs_f32m4_f32m1_m ( ... ) __riscv_vfredusum_vs_f32m4_f32m1_tum(__VA_ARGS__)

◆ vfredusum_vs_f32m8_f32m1

#define vfredusum_vs_f32m8_f32m1 ( ... ) __riscv_vfredusum_vs_f32m8_f32m1_tu(__VA_ARGS__)

◆ vfredusum_vs_f32m8_f32m1_m

#define vfredusum_vs_f32m8_f32m1_m ( ... ) __riscv_vfredusum_vs_f32m8_f32m1_tum(__VA_ARGS__)

◆ vfredusum_vs_f32mf2_f32m1

#define vfredusum_vs_f32mf2_f32m1 ( ... ) __riscv_vfredusum_vs_f32mf2_f32m1_tu(__VA_ARGS__)

◆ vfredusum_vs_f32mf2_f32m1_m

#define vfredusum_vs_f32mf2_f32m1_m ( ... ) __riscv_vfredusum_vs_f32mf2_f32m1_tum(__VA_ARGS__)

◆ vfredusum_vs_f64m1_f64m1

#define vfredusum_vs_f64m1_f64m1 ( ... ) __riscv_vfredusum_vs_f64m1_f64m1_tu(__VA_ARGS__)

◆ vfredusum_vs_f64m1_f64m1_m

#define vfredusum_vs_f64m1_f64m1_m ( ... ) __riscv_vfredusum_vs_f64m1_f64m1_tum(__VA_ARGS__)

◆ vfredusum_vs_f64m2_f64m1

#define vfredusum_vs_f64m2_f64m1 ( ... ) __riscv_vfredusum_vs_f64m2_f64m1_tu(__VA_ARGS__)

◆ vfredusum_vs_f64m2_f64m1_m

#define vfredusum_vs_f64m2_f64m1_m ( ... ) __riscv_vfredusum_vs_f64m2_f64m1_tum(__VA_ARGS__)

◆ vfredusum_vs_f64m4_f64m1

#define vfredusum_vs_f64m4_f64m1 ( ... ) __riscv_vfredusum_vs_f64m4_f64m1_tu(__VA_ARGS__)

◆ vfredusum_vs_f64m4_f64m1_m

#define vfredusum_vs_f64m4_f64m1_m ( ... ) __riscv_vfredusum_vs_f64m4_f64m1_tum(__VA_ARGS__)

◆ vfredusum_vs_f64m8_f64m1

#define vfredusum_vs_f64m8_f64m1 ( ... ) __riscv_vfredusum_vs_f64m8_f64m1_tu(__VA_ARGS__)

◆ vfredusum_vs_f64m8_f64m1_m

#define vfredusum_vs_f64m8_f64m1_m ( ... ) __riscv_vfredusum_vs_f64m8_f64m1_tum(__VA_ARGS__)

◆ vfrsqrt7_v_f16m1

#define vfrsqrt7_v_f16m1 ( ... ) __riscv_vfrsqrt7_v_f16m1(__VA_ARGS__)

◆ vfrsqrt7_v_f16m1_m

#define vfrsqrt7_v_f16m1_m ( ... ) __riscv_vfrsqrt7_v_f16m1_tumu(__VA_ARGS__)

◆ vfrsqrt7_v_f16m2

#define vfrsqrt7_v_f16m2 ( ... ) __riscv_vfrsqrt7_v_f16m2(__VA_ARGS__)

◆ vfrsqrt7_v_f16m2_m

#define vfrsqrt7_v_f16m2_m ( ... ) __riscv_vfrsqrt7_v_f16m2_tumu(__VA_ARGS__)

◆ vfrsqrt7_v_f16m4

#define vfrsqrt7_v_f16m4 ( ... ) __riscv_vfrsqrt7_v_f16m4(__VA_ARGS__)

◆ vfrsqrt7_v_f16m4_m

#define vfrsqrt7_v_f16m4_m ( ... ) __riscv_vfrsqrt7_v_f16m4_tumu(__VA_ARGS__)

◆ vfrsqrt7_v_f16m8

#define vfrsqrt7_v_f16m8 ( ... ) __riscv_vfrsqrt7_v_f16m8(__VA_ARGS__)

◆ vfrsqrt7_v_f16m8_m

#define vfrsqrt7_v_f16m8_m ( ... ) __riscv_vfrsqrt7_v_f16m8_tumu(__VA_ARGS__)

◆ vfrsqrt7_v_f16mf2

#define vfrsqrt7_v_f16mf2 ( ... ) __riscv_vfrsqrt7_v_f16mf2(__VA_ARGS__)

◆ vfrsqrt7_v_f16mf2_m

#define vfrsqrt7_v_f16mf2_m ( ... ) __riscv_vfrsqrt7_v_f16mf2_tumu(__VA_ARGS__)

◆ vfrsqrt7_v_f16mf4

#define vfrsqrt7_v_f16mf4 ( ... ) __riscv_vfrsqrt7_v_f16mf4(__VA_ARGS__)

◆ vfrsqrt7_v_f16mf4_m

#define vfrsqrt7_v_f16mf4_m ( ... ) __riscv_vfrsqrt7_v_f16mf4_tumu(__VA_ARGS__)

◆ vfrsqrt7_v_f32m1

#define vfrsqrt7_v_f32m1 ( ... ) __riscv_vfrsqrt7_v_f32m1(__VA_ARGS__)

◆ vfrsqrt7_v_f32m1_m

#define vfrsqrt7_v_f32m1_m ( ... ) __riscv_vfrsqrt7_v_f32m1_tumu(__VA_ARGS__)

◆ vfrsqrt7_v_f32m2

#define vfrsqrt7_v_f32m2 ( ... ) __riscv_vfrsqrt7_v_f32m2(__VA_ARGS__)

◆ vfrsqrt7_v_f32m2_m

#define vfrsqrt7_v_f32m2_m ( ... ) __riscv_vfrsqrt7_v_f32m2_tumu(__VA_ARGS__)

◆ vfrsqrt7_v_f32m4

#define vfrsqrt7_v_f32m4 ( ... ) __riscv_vfrsqrt7_v_f32m4(__VA_ARGS__)

◆ vfrsqrt7_v_f32m4_m

#define vfrsqrt7_v_f32m4_m ( ... ) __riscv_vfrsqrt7_v_f32m4_tumu(__VA_ARGS__)

◆ vfrsqrt7_v_f32m8

#define vfrsqrt7_v_f32m8 ( ... ) __riscv_vfrsqrt7_v_f32m8(__VA_ARGS__)

◆ vfrsqrt7_v_f32m8_m

#define vfrsqrt7_v_f32m8_m ( ... ) __riscv_vfrsqrt7_v_f32m8_tumu(__VA_ARGS__)

◆ vfrsqrt7_v_f32mf2

#define vfrsqrt7_v_f32mf2 ( ... ) __riscv_vfrsqrt7_v_f32mf2(__VA_ARGS__)

◆ vfrsqrt7_v_f32mf2_m

#define vfrsqrt7_v_f32mf2_m ( ... ) __riscv_vfrsqrt7_v_f32mf2_tumu(__VA_ARGS__)

◆ vfrsqrt7_v_f64m1

#define vfrsqrt7_v_f64m1 ( ... ) __riscv_vfrsqrt7_v_f64m1(__VA_ARGS__)

◆ vfrsqrt7_v_f64m1_m

#define vfrsqrt7_v_f64m1_m ( ... ) __riscv_vfrsqrt7_v_f64m1_tumu(__VA_ARGS__)

◆ vfrsqrt7_v_f64m2

#define vfrsqrt7_v_f64m2 ( ... ) __riscv_vfrsqrt7_v_f64m2(__VA_ARGS__)

◆ vfrsqrt7_v_f64m2_m

#define vfrsqrt7_v_f64m2_m ( ... ) __riscv_vfrsqrt7_v_f64m2_tumu(__VA_ARGS__)

◆ vfrsqrt7_v_f64m4

#define vfrsqrt7_v_f64m4 ( ... ) __riscv_vfrsqrt7_v_f64m4(__VA_ARGS__)

◆ vfrsqrt7_v_f64m4_m

#define vfrsqrt7_v_f64m4_m ( ... ) __riscv_vfrsqrt7_v_f64m4_tumu(__VA_ARGS__)

◆ vfrsqrt7_v_f64m8

#define vfrsqrt7_v_f64m8 ( ... ) __riscv_vfrsqrt7_v_f64m8(__VA_ARGS__)

◆ vfrsqrt7_v_f64m8_m

#define vfrsqrt7_v_f64m8_m ( ... ) __riscv_vfrsqrt7_v_f64m8_tumu(__VA_ARGS__)

◆ vfrsub_vf_f16m1

#define vfrsub_vf_f16m1 ( ... ) __riscv_vfrsub_vf_f16m1(__VA_ARGS__)

◆ vfrsub_vf_f16m1_m

#define vfrsub_vf_f16m1_m ( ... ) __riscv_vfrsub_vf_f16m1_tumu(__VA_ARGS__)

◆ vfrsub_vf_f16m2

#define vfrsub_vf_f16m2 ( ... ) __riscv_vfrsub_vf_f16m2(__VA_ARGS__)

◆ vfrsub_vf_f16m2_m

#define vfrsub_vf_f16m2_m ( ... ) __riscv_vfrsub_vf_f16m2_tumu(__VA_ARGS__)

◆ vfrsub_vf_f16m4

#define vfrsub_vf_f16m4 ( ... ) __riscv_vfrsub_vf_f16m4(__VA_ARGS__)

◆ vfrsub_vf_f16m4_m

#define vfrsub_vf_f16m4_m ( ... ) __riscv_vfrsub_vf_f16m4_tumu(__VA_ARGS__)

◆ vfrsub_vf_f16m8

#define vfrsub_vf_f16m8 ( ... ) __riscv_vfrsub_vf_f16m8(__VA_ARGS__)

◆ vfrsub_vf_f16m8_m

#define vfrsub_vf_f16m8_m ( ... ) __riscv_vfrsub_vf_f16m8_tumu(__VA_ARGS__)

◆ vfrsub_vf_f16mf2

#define vfrsub_vf_f16mf2 ( ... ) __riscv_vfrsub_vf_f16mf2(__VA_ARGS__)

◆ vfrsub_vf_f16mf2_m

#define vfrsub_vf_f16mf2_m ( ... ) __riscv_vfrsub_vf_f16mf2_tumu(__VA_ARGS__)

◆ vfrsub_vf_f16mf4

#define vfrsub_vf_f16mf4 ( ... ) __riscv_vfrsub_vf_f16mf4(__VA_ARGS__)

◆ vfrsub_vf_f16mf4_m

#define vfrsub_vf_f16mf4_m ( ... ) __riscv_vfrsub_vf_f16mf4_tumu(__VA_ARGS__)

◆ vfrsub_vf_f32m1

#define vfrsub_vf_f32m1 ( ... ) __riscv_vfrsub_vf_f32m1(__VA_ARGS__)

◆ vfrsub_vf_f32m1_m

#define vfrsub_vf_f32m1_m ( ... ) __riscv_vfrsub_vf_f32m1_tumu(__VA_ARGS__)

◆ vfrsub_vf_f32m2

#define vfrsub_vf_f32m2 ( ... ) __riscv_vfrsub_vf_f32m2(__VA_ARGS__)

◆ vfrsub_vf_f32m2_m

#define vfrsub_vf_f32m2_m ( ... ) __riscv_vfrsub_vf_f32m2_tumu(__VA_ARGS__)

◆ vfrsub_vf_f32m4

#define vfrsub_vf_f32m4 ( ... ) __riscv_vfrsub_vf_f32m4(__VA_ARGS__)

◆ vfrsub_vf_f32m4_m

#define vfrsub_vf_f32m4_m ( ... ) __riscv_vfrsub_vf_f32m4_tumu(__VA_ARGS__)

◆ vfrsub_vf_f32m8

#define vfrsub_vf_f32m8 ( ... ) __riscv_vfrsub_vf_f32m8(__VA_ARGS__)

◆ vfrsub_vf_f32m8_m

#define vfrsub_vf_f32m8_m ( ... ) __riscv_vfrsub_vf_f32m8_tumu(__VA_ARGS__)

◆ vfrsub_vf_f32mf2

#define vfrsub_vf_f32mf2 ( ... ) __riscv_vfrsub_vf_f32mf2(__VA_ARGS__)

◆ vfrsub_vf_f32mf2_m

#define vfrsub_vf_f32mf2_m ( ... ) __riscv_vfrsub_vf_f32mf2_tumu(__VA_ARGS__)

◆ vfrsub_vf_f64m1

#define vfrsub_vf_f64m1 ( ... ) __riscv_vfrsub_vf_f64m1(__VA_ARGS__)

◆ vfrsub_vf_f64m1_m

#define vfrsub_vf_f64m1_m ( ... ) __riscv_vfrsub_vf_f64m1_tumu(__VA_ARGS__)

◆ vfrsub_vf_f64m2

#define vfrsub_vf_f64m2 ( ... ) __riscv_vfrsub_vf_f64m2(__VA_ARGS__)

◆ vfrsub_vf_f64m2_m

#define vfrsub_vf_f64m2_m ( ... ) __riscv_vfrsub_vf_f64m2_tumu(__VA_ARGS__)

◆ vfrsub_vf_f64m4

#define vfrsub_vf_f64m4 ( ... ) __riscv_vfrsub_vf_f64m4(__VA_ARGS__)

◆ vfrsub_vf_f64m4_m

#define vfrsub_vf_f64m4_m ( ... ) __riscv_vfrsub_vf_f64m4_tumu(__VA_ARGS__)

◆ vfrsub_vf_f64m8

#define vfrsub_vf_f64m8 ( ... ) __riscv_vfrsub_vf_f64m8(__VA_ARGS__)

◆ vfrsub_vf_f64m8_m

#define vfrsub_vf_f64m8_m ( ... ) __riscv_vfrsub_vf_f64m8_tumu(__VA_ARGS__)

◆ vfsgnj_vf_f16m1

#define vfsgnj_vf_f16m1 ( ... ) __riscv_vfsgnj_vf_f16m1(__VA_ARGS__)

◆ vfsgnj_vf_f16m1_m

#define vfsgnj_vf_f16m1_m ( ... ) __riscv_vfsgnj_vf_f16m1_tumu(__VA_ARGS__)

◆ vfsgnj_vf_f16m2

#define vfsgnj_vf_f16m2 ( ... ) __riscv_vfsgnj_vf_f16m2(__VA_ARGS__)

◆ vfsgnj_vf_f16m2_m

#define vfsgnj_vf_f16m2_m ( ... ) __riscv_vfsgnj_vf_f16m2_tumu(__VA_ARGS__)

◆ vfsgnj_vf_f16m4

#define vfsgnj_vf_f16m4 ( ... ) __riscv_vfsgnj_vf_f16m4(__VA_ARGS__)

◆ vfsgnj_vf_f16m4_m

#define vfsgnj_vf_f16m4_m ( ... ) __riscv_vfsgnj_vf_f16m4_tumu(__VA_ARGS__)

◆ vfsgnj_vf_f16m8

#define vfsgnj_vf_f16m8 ( ... ) __riscv_vfsgnj_vf_f16m8(__VA_ARGS__)

◆ vfsgnj_vf_f16m8_m

#define vfsgnj_vf_f16m8_m ( ... ) __riscv_vfsgnj_vf_f16m8_tumu(__VA_ARGS__)

◆ vfsgnj_vf_f16mf2

#define vfsgnj_vf_f16mf2 ( ... ) __riscv_vfsgnj_vf_f16mf2(__VA_ARGS__)

◆ vfsgnj_vf_f16mf2_m

#define vfsgnj_vf_f16mf2_m ( ... ) __riscv_vfsgnj_vf_f16mf2_tumu(__VA_ARGS__)

◆ vfsgnj_vf_f16mf4

#define vfsgnj_vf_f16mf4 ( ... ) __riscv_vfsgnj_vf_f16mf4(__VA_ARGS__)

◆ vfsgnj_vf_f16mf4_m

#define vfsgnj_vf_f16mf4_m ( ... ) __riscv_vfsgnj_vf_f16mf4_tumu(__VA_ARGS__)

◆ vfsgnj_vf_f32m1

#define vfsgnj_vf_f32m1 ( ... ) __riscv_vfsgnj_vf_f32m1(__VA_ARGS__)

◆ vfsgnj_vf_f32m1_m

#define vfsgnj_vf_f32m1_m ( ... ) __riscv_vfsgnj_vf_f32m1_tumu(__VA_ARGS__)

◆ vfsgnj_vf_f32m2

#define vfsgnj_vf_f32m2 ( ... ) __riscv_vfsgnj_vf_f32m2(__VA_ARGS__)

◆ vfsgnj_vf_f32m2_m

#define vfsgnj_vf_f32m2_m ( ... ) __riscv_vfsgnj_vf_f32m2_tumu(__VA_ARGS__)

◆ vfsgnj_vf_f32m4

#define vfsgnj_vf_f32m4 ( ... ) __riscv_vfsgnj_vf_f32m4(__VA_ARGS__)

◆ vfsgnj_vf_f32m4_m

#define vfsgnj_vf_f32m4_m ( ... ) __riscv_vfsgnj_vf_f32m4_tumu(__VA_ARGS__)

◆ vfsgnj_vf_f32m8

#define vfsgnj_vf_f32m8 ( ... ) __riscv_vfsgnj_vf_f32m8(__VA_ARGS__)

◆ vfsgnj_vf_f32m8_m

#define vfsgnj_vf_f32m8_m ( ... ) __riscv_vfsgnj_vf_f32m8_tumu(__VA_ARGS__)

◆ vfsgnj_vf_f32mf2

#define vfsgnj_vf_f32mf2 ( ... ) __riscv_vfsgnj_vf_f32mf2(__VA_ARGS__)

◆ vfsgnj_vf_f32mf2_m

#define vfsgnj_vf_f32mf2_m ( ... ) __riscv_vfsgnj_vf_f32mf2_tumu(__VA_ARGS__)

◆ vfsgnj_vf_f64m1

#define vfsgnj_vf_f64m1 ( ... ) __riscv_vfsgnj_vf_f64m1(__VA_ARGS__)

◆ vfsgnj_vf_f64m1_m

#define vfsgnj_vf_f64m1_m ( ... ) __riscv_vfsgnj_vf_f64m1_tumu(__VA_ARGS__)

◆ vfsgnj_vf_f64m2

#define vfsgnj_vf_f64m2 ( ... ) __riscv_vfsgnj_vf_f64m2(__VA_ARGS__)

◆ vfsgnj_vf_f64m2_m

#define vfsgnj_vf_f64m2_m ( ... ) __riscv_vfsgnj_vf_f64m2_tumu(__VA_ARGS__)

◆ vfsgnj_vf_f64m4

#define vfsgnj_vf_f64m4 ( ... ) __riscv_vfsgnj_vf_f64m4(__VA_ARGS__)

◆ vfsgnj_vf_f64m4_m

#define vfsgnj_vf_f64m4_m ( ... ) __riscv_vfsgnj_vf_f64m4_tumu(__VA_ARGS__)

◆ vfsgnj_vf_f64m8

#define vfsgnj_vf_f64m8 ( ... ) __riscv_vfsgnj_vf_f64m8(__VA_ARGS__)

◆ vfsgnj_vf_f64m8_m

#define vfsgnj_vf_f64m8_m ( ... ) __riscv_vfsgnj_vf_f64m8_tumu(__VA_ARGS__)

◆ vfsgnj_vv_f16m1

#define vfsgnj_vv_f16m1 ( ... ) __riscv_vfsgnj_vv_f16m1(__VA_ARGS__)

◆ vfsgnj_vv_f16m1_m

#define vfsgnj_vv_f16m1_m ( ... ) __riscv_vfsgnj_vv_f16m1_tumu(__VA_ARGS__)

◆ vfsgnj_vv_f16m2

#define vfsgnj_vv_f16m2 ( ... ) __riscv_vfsgnj_vv_f16m2(__VA_ARGS__)

◆ vfsgnj_vv_f16m2_m

#define vfsgnj_vv_f16m2_m ( ... ) __riscv_vfsgnj_vv_f16m2_tumu(__VA_ARGS__)

◆ vfsgnj_vv_f16m4

#define vfsgnj_vv_f16m4 ( ... ) __riscv_vfsgnj_vv_f16m4(__VA_ARGS__)

◆ vfsgnj_vv_f16m4_m

#define vfsgnj_vv_f16m4_m ( ... ) __riscv_vfsgnj_vv_f16m4_tumu(__VA_ARGS__)

◆ vfsgnj_vv_f16m8

#define vfsgnj_vv_f16m8 ( ... ) __riscv_vfsgnj_vv_f16m8(__VA_ARGS__)

◆ vfsgnj_vv_f16m8_m

#define vfsgnj_vv_f16m8_m ( ... ) __riscv_vfsgnj_vv_f16m8_tumu(__VA_ARGS__)

◆ vfsgnj_vv_f16mf2

#define vfsgnj_vv_f16mf2 ( ... ) __riscv_vfsgnj_vv_f16mf2(__VA_ARGS__)

◆ vfsgnj_vv_f16mf2_m

#define vfsgnj_vv_f16mf2_m ( ... ) __riscv_vfsgnj_vv_f16mf2_tumu(__VA_ARGS__)

◆ vfsgnj_vv_f16mf4

#define vfsgnj_vv_f16mf4 ( ... ) __riscv_vfsgnj_vv_f16mf4(__VA_ARGS__)

◆ vfsgnj_vv_f16mf4_m

#define vfsgnj_vv_f16mf4_m ( ... ) __riscv_vfsgnj_vv_f16mf4_tumu(__VA_ARGS__)

◆ vfsgnj_vv_f32m1

#define vfsgnj_vv_f32m1 ( ... ) __riscv_vfsgnj_vv_f32m1(__VA_ARGS__)

◆ vfsgnj_vv_f32m1_m

#define vfsgnj_vv_f32m1_m ( ... ) __riscv_vfsgnj_vv_f32m1_tumu(__VA_ARGS__)

◆ vfsgnj_vv_f32m2

#define vfsgnj_vv_f32m2 ( ... ) __riscv_vfsgnj_vv_f32m2(__VA_ARGS__)

◆ vfsgnj_vv_f32m2_m

#define vfsgnj_vv_f32m2_m ( ... ) __riscv_vfsgnj_vv_f32m2_tumu(__VA_ARGS__)

◆ vfsgnj_vv_f32m4

#define vfsgnj_vv_f32m4 ( ... ) __riscv_vfsgnj_vv_f32m4(__VA_ARGS__)

◆ vfsgnj_vv_f32m4_m

#define vfsgnj_vv_f32m4_m ( ... ) __riscv_vfsgnj_vv_f32m4_tumu(__VA_ARGS__)

◆ vfsgnj_vv_f32m8

#define vfsgnj_vv_f32m8 ( ... ) __riscv_vfsgnj_vv_f32m8(__VA_ARGS__)

◆ vfsgnj_vv_f32m8_m

#define vfsgnj_vv_f32m8_m ( ... ) __riscv_vfsgnj_vv_f32m8_tumu(__VA_ARGS__)

◆ vfsgnj_vv_f32mf2

#define vfsgnj_vv_f32mf2 ( ... ) __riscv_vfsgnj_vv_f32mf2(__VA_ARGS__)

◆ vfsgnj_vv_f32mf2_m

#define vfsgnj_vv_f32mf2_m ( ... ) __riscv_vfsgnj_vv_f32mf2_tumu(__VA_ARGS__)

◆ vfsgnj_vv_f64m1

#define vfsgnj_vv_f64m1 ( ... ) __riscv_vfsgnj_vv_f64m1(__VA_ARGS__)

◆ vfsgnj_vv_f64m1_m

#define vfsgnj_vv_f64m1_m ( ... ) __riscv_vfsgnj_vv_f64m1_tumu(__VA_ARGS__)

◆ vfsgnj_vv_f64m2

#define vfsgnj_vv_f64m2 ( ... ) __riscv_vfsgnj_vv_f64m2(__VA_ARGS__)

◆ vfsgnj_vv_f64m2_m

#define vfsgnj_vv_f64m2_m ( ... ) __riscv_vfsgnj_vv_f64m2_tumu(__VA_ARGS__)

◆ vfsgnj_vv_f64m4

#define vfsgnj_vv_f64m4 ( ... ) __riscv_vfsgnj_vv_f64m4(__VA_ARGS__)

◆ vfsgnj_vv_f64m4_m

#define vfsgnj_vv_f64m4_m ( ... ) __riscv_vfsgnj_vv_f64m4_tumu(__VA_ARGS__)

◆ vfsgnj_vv_f64m8

#define vfsgnj_vv_f64m8 ( ... ) __riscv_vfsgnj_vv_f64m8(__VA_ARGS__)

◆ vfsgnj_vv_f64m8_m

#define vfsgnj_vv_f64m8_m ( ... ) __riscv_vfsgnj_vv_f64m8_tumu(__VA_ARGS__)

◆ vfsgnjn_vf_f16m1

#define vfsgnjn_vf_f16m1 ( ... ) __riscv_vfsgnjn_vf_f16m1(__VA_ARGS__)

◆ vfsgnjn_vf_f16m1_m

#define vfsgnjn_vf_f16m1_m ( ... ) __riscv_vfsgnjn_vf_f16m1_tumu(__VA_ARGS__)

◆ vfsgnjn_vf_f16m2

#define vfsgnjn_vf_f16m2 ( ... ) __riscv_vfsgnjn_vf_f16m2(__VA_ARGS__)

◆ vfsgnjn_vf_f16m2_m

#define vfsgnjn_vf_f16m2_m ( ... ) __riscv_vfsgnjn_vf_f16m2_tumu(__VA_ARGS__)

◆ vfsgnjn_vf_f16m4

#define vfsgnjn_vf_f16m4 ( ... ) __riscv_vfsgnjn_vf_f16m4(__VA_ARGS__)

◆ vfsgnjn_vf_f16m4_m

#define vfsgnjn_vf_f16m4_m ( ... ) __riscv_vfsgnjn_vf_f16m4_tumu(__VA_ARGS__)

◆ vfsgnjn_vf_f16m8

#define vfsgnjn_vf_f16m8 ( ... ) __riscv_vfsgnjn_vf_f16m8(__VA_ARGS__)

◆ vfsgnjn_vf_f16m8_m

#define vfsgnjn_vf_f16m8_m ( ... ) __riscv_vfsgnjn_vf_f16m8_tumu(__VA_ARGS__)

◆ vfsgnjn_vf_f16mf2

#define vfsgnjn_vf_f16mf2 ( ... ) __riscv_vfsgnjn_vf_f16mf2(__VA_ARGS__)

◆ vfsgnjn_vf_f16mf2_m

#define vfsgnjn_vf_f16mf2_m ( ... ) __riscv_vfsgnjn_vf_f16mf2_tumu(__VA_ARGS__)

◆ vfsgnjn_vf_f16mf4

#define vfsgnjn_vf_f16mf4 ( ... ) __riscv_vfsgnjn_vf_f16mf4(__VA_ARGS__)

◆ vfsgnjn_vf_f16mf4_m

#define vfsgnjn_vf_f16mf4_m ( ... ) __riscv_vfsgnjn_vf_f16mf4_tumu(__VA_ARGS__)

◆ vfsgnjn_vf_f32m1

#define vfsgnjn_vf_f32m1 ( ... ) __riscv_vfsgnjn_vf_f32m1(__VA_ARGS__)

◆ vfsgnjn_vf_f32m1_m

#define vfsgnjn_vf_f32m1_m ( ... ) __riscv_vfsgnjn_vf_f32m1_tumu(__VA_ARGS__)

◆ vfsgnjn_vf_f32m2

#define vfsgnjn_vf_f32m2 ( ... ) __riscv_vfsgnjn_vf_f32m2(__VA_ARGS__)

◆ vfsgnjn_vf_f32m2_m

#define vfsgnjn_vf_f32m2_m ( ... ) __riscv_vfsgnjn_vf_f32m2_tumu(__VA_ARGS__)

◆ vfsgnjn_vf_f32m4

#define vfsgnjn_vf_f32m4 ( ... ) __riscv_vfsgnjn_vf_f32m4(__VA_ARGS__)

◆ vfsgnjn_vf_f32m4_m

#define vfsgnjn_vf_f32m4_m ( ... ) __riscv_vfsgnjn_vf_f32m4_tumu(__VA_ARGS__)

◆ vfsgnjn_vf_f32m8

#define vfsgnjn_vf_f32m8 ( ... ) __riscv_vfsgnjn_vf_f32m8(__VA_ARGS__)

◆ vfsgnjn_vf_f32m8_m

#define vfsgnjn_vf_f32m8_m ( ... ) __riscv_vfsgnjn_vf_f32m8_tumu(__VA_ARGS__)

◆ vfsgnjn_vf_f32mf2

#define vfsgnjn_vf_f32mf2 ( ... ) __riscv_vfsgnjn_vf_f32mf2(__VA_ARGS__)

◆ vfsgnjn_vf_f32mf2_m

#define vfsgnjn_vf_f32mf2_m ( ... ) __riscv_vfsgnjn_vf_f32mf2_tumu(__VA_ARGS__)

◆ vfsgnjn_vf_f64m1

#define vfsgnjn_vf_f64m1 ( ... ) __riscv_vfsgnjn_vf_f64m1(__VA_ARGS__)

◆ vfsgnjn_vf_f64m1_m

#define vfsgnjn_vf_f64m1_m ( ... ) __riscv_vfsgnjn_vf_f64m1_tumu(__VA_ARGS__)

◆ vfsgnjn_vf_f64m2

#define vfsgnjn_vf_f64m2 ( ... ) __riscv_vfsgnjn_vf_f64m2(__VA_ARGS__)

◆ vfsgnjn_vf_f64m2_m

#define vfsgnjn_vf_f64m2_m ( ... ) __riscv_vfsgnjn_vf_f64m2_tumu(__VA_ARGS__)

◆ vfsgnjn_vf_f64m4

#define vfsgnjn_vf_f64m4 ( ... ) __riscv_vfsgnjn_vf_f64m4(__VA_ARGS__)

◆ vfsgnjn_vf_f64m4_m

#define vfsgnjn_vf_f64m4_m ( ... ) __riscv_vfsgnjn_vf_f64m4_tumu(__VA_ARGS__)

◆ vfsgnjn_vf_f64m8

#define vfsgnjn_vf_f64m8 ( ... ) __riscv_vfsgnjn_vf_f64m8(__VA_ARGS__)

◆ vfsgnjn_vf_f64m8_m

#define vfsgnjn_vf_f64m8_m ( ... ) __riscv_vfsgnjn_vf_f64m8_tumu(__VA_ARGS__)

◆ vfsgnjn_vv_f16m1

#define vfsgnjn_vv_f16m1 ( ... ) __riscv_vfsgnjn_vv_f16m1(__VA_ARGS__)

◆ vfsgnjn_vv_f16m1_m

#define vfsgnjn_vv_f16m1_m ( ... ) __riscv_vfsgnjn_vv_f16m1_tumu(__VA_ARGS__)

◆ vfsgnjn_vv_f16m2

#define vfsgnjn_vv_f16m2 ( ... ) __riscv_vfsgnjn_vv_f16m2(__VA_ARGS__)

◆ vfsgnjn_vv_f16m2_m

#define vfsgnjn_vv_f16m2_m ( ... ) __riscv_vfsgnjn_vv_f16m2_tumu(__VA_ARGS__)

◆ vfsgnjn_vv_f16m4

#define vfsgnjn_vv_f16m4 ( ... ) __riscv_vfsgnjn_vv_f16m4(__VA_ARGS__)

◆ vfsgnjn_vv_f16m4_m

#define vfsgnjn_vv_f16m4_m ( ... ) __riscv_vfsgnjn_vv_f16m4_tumu(__VA_ARGS__)

◆ vfsgnjn_vv_f16m8

#define vfsgnjn_vv_f16m8 ( ... ) __riscv_vfsgnjn_vv_f16m8(__VA_ARGS__)

◆ vfsgnjn_vv_f16m8_m

#define vfsgnjn_vv_f16m8_m ( ... ) __riscv_vfsgnjn_vv_f16m8_tumu(__VA_ARGS__)

◆ vfsgnjn_vv_f16mf2

#define vfsgnjn_vv_f16mf2 ( ... ) __riscv_vfsgnjn_vv_f16mf2(__VA_ARGS__)

◆ vfsgnjn_vv_f16mf2_m

#define vfsgnjn_vv_f16mf2_m ( ... ) __riscv_vfsgnjn_vv_f16mf2_tumu(__VA_ARGS__)

◆ vfsgnjn_vv_f16mf4

#define vfsgnjn_vv_f16mf4 ( ... ) __riscv_vfsgnjn_vv_f16mf4(__VA_ARGS__)

◆ vfsgnjn_vv_f16mf4_m

#define vfsgnjn_vv_f16mf4_m ( ... ) __riscv_vfsgnjn_vv_f16mf4_tumu(__VA_ARGS__)

◆ vfsgnjn_vv_f32m1

#define vfsgnjn_vv_f32m1 ( ... ) __riscv_vfsgnjn_vv_f32m1(__VA_ARGS__)

◆ vfsgnjn_vv_f32m1_m

#define vfsgnjn_vv_f32m1_m ( ... ) __riscv_vfsgnjn_vv_f32m1_tumu(__VA_ARGS__)

◆ vfsgnjn_vv_f32m2

#define vfsgnjn_vv_f32m2 ( ... ) __riscv_vfsgnjn_vv_f32m2(__VA_ARGS__)

◆ vfsgnjn_vv_f32m2_m

#define vfsgnjn_vv_f32m2_m ( ... ) __riscv_vfsgnjn_vv_f32m2_tumu(__VA_ARGS__)

◆ vfsgnjn_vv_f32m4

#define vfsgnjn_vv_f32m4 ( ... ) __riscv_vfsgnjn_vv_f32m4(__VA_ARGS__)

◆ vfsgnjn_vv_f32m4_m

#define vfsgnjn_vv_f32m4_m ( ... ) __riscv_vfsgnjn_vv_f32m4_tumu(__VA_ARGS__)

◆ vfsgnjn_vv_f32m8

#define vfsgnjn_vv_f32m8 ( ... ) __riscv_vfsgnjn_vv_f32m8(__VA_ARGS__)

◆ vfsgnjn_vv_f32m8_m

#define vfsgnjn_vv_f32m8_m ( ... ) __riscv_vfsgnjn_vv_f32m8_tumu(__VA_ARGS__)

◆ vfsgnjn_vv_f32mf2

#define vfsgnjn_vv_f32mf2 ( ... ) __riscv_vfsgnjn_vv_f32mf2(__VA_ARGS__)

◆ vfsgnjn_vv_f32mf2_m

#define vfsgnjn_vv_f32mf2_m ( ... ) __riscv_vfsgnjn_vv_f32mf2_tumu(__VA_ARGS__)

◆ vfsgnjn_vv_f64m1

#define vfsgnjn_vv_f64m1 ( ... ) __riscv_vfsgnjn_vv_f64m1(__VA_ARGS__)

◆ vfsgnjn_vv_f64m1_m

#define vfsgnjn_vv_f64m1_m ( ... ) __riscv_vfsgnjn_vv_f64m1_tumu(__VA_ARGS__)

◆ vfsgnjn_vv_f64m2

#define vfsgnjn_vv_f64m2 ( ... ) __riscv_vfsgnjn_vv_f64m2(__VA_ARGS__)

◆ vfsgnjn_vv_f64m2_m

#define vfsgnjn_vv_f64m2_m ( ... ) __riscv_vfsgnjn_vv_f64m2_tumu(__VA_ARGS__)

◆ vfsgnjn_vv_f64m4

#define vfsgnjn_vv_f64m4 ( ... ) __riscv_vfsgnjn_vv_f64m4(__VA_ARGS__)

◆ vfsgnjn_vv_f64m4_m

#define vfsgnjn_vv_f64m4_m ( ... ) __riscv_vfsgnjn_vv_f64m4_tumu(__VA_ARGS__)

◆ vfsgnjn_vv_f64m8

#define vfsgnjn_vv_f64m8 ( ... ) __riscv_vfsgnjn_vv_f64m8(__VA_ARGS__)

◆ vfsgnjn_vv_f64m8_m

#define vfsgnjn_vv_f64m8_m ( ... ) __riscv_vfsgnjn_vv_f64m8_tumu(__VA_ARGS__)

◆ vfsgnjx_vf_f16m1

#define vfsgnjx_vf_f16m1 ( ... ) __riscv_vfsgnjx_vf_f16m1(__VA_ARGS__)

◆ vfsgnjx_vf_f16m1_m

#define vfsgnjx_vf_f16m1_m ( ... ) __riscv_vfsgnjx_vf_f16m1_tumu(__VA_ARGS__)

◆ vfsgnjx_vf_f16m2

#define vfsgnjx_vf_f16m2 ( ... ) __riscv_vfsgnjx_vf_f16m2(__VA_ARGS__)

◆ vfsgnjx_vf_f16m2_m

#define vfsgnjx_vf_f16m2_m ( ... ) __riscv_vfsgnjx_vf_f16m2_tumu(__VA_ARGS__)

◆ vfsgnjx_vf_f16m4

#define vfsgnjx_vf_f16m4 ( ... ) __riscv_vfsgnjx_vf_f16m4(__VA_ARGS__)

◆ vfsgnjx_vf_f16m4_m

#define vfsgnjx_vf_f16m4_m ( ... ) __riscv_vfsgnjx_vf_f16m4_tumu(__VA_ARGS__)

◆ vfsgnjx_vf_f16m8

#define vfsgnjx_vf_f16m8 ( ... ) __riscv_vfsgnjx_vf_f16m8(__VA_ARGS__)

◆ vfsgnjx_vf_f16m8_m

#define vfsgnjx_vf_f16m8_m ( ... ) __riscv_vfsgnjx_vf_f16m8_tumu(__VA_ARGS__)

◆ vfsgnjx_vf_f16mf2

#define vfsgnjx_vf_f16mf2 ( ... ) __riscv_vfsgnjx_vf_f16mf2(__VA_ARGS__)

◆ vfsgnjx_vf_f16mf2_m

#define vfsgnjx_vf_f16mf2_m ( ... ) __riscv_vfsgnjx_vf_f16mf2_tumu(__VA_ARGS__)

◆ vfsgnjx_vf_f16mf4

#define vfsgnjx_vf_f16mf4 ( ... ) __riscv_vfsgnjx_vf_f16mf4(__VA_ARGS__)

◆ vfsgnjx_vf_f16mf4_m

#define vfsgnjx_vf_f16mf4_m ( ... ) __riscv_vfsgnjx_vf_f16mf4_tumu(__VA_ARGS__)

◆ vfsgnjx_vf_f32m1

#define vfsgnjx_vf_f32m1 ( ... ) __riscv_vfsgnjx_vf_f32m1(__VA_ARGS__)

◆ vfsgnjx_vf_f32m1_m

#define vfsgnjx_vf_f32m1_m ( ... ) __riscv_vfsgnjx_vf_f32m1_tumu(__VA_ARGS__)

◆ vfsgnjx_vf_f32m2

#define vfsgnjx_vf_f32m2 ( ... ) __riscv_vfsgnjx_vf_f32m2(__VA_ARGS__)

◆ vfsgnjx_vf_f32m2_m

#define vfsgnjx_vf_f32m2_m ( ... ) __riscv_vfsgnjx_vf_f32m2_tumu(__VA_ARGS__)

◆ vfsgnjx_vf_f32m4

#define vfsgnjx_vf_f32m4 ( ... ) __riscv_vfsgnjx_vf_f32m4(__VA_ARGS__)

◆ vfsgnjx_vf_f32m4_m

#define vfsgnjx_vf_f32m4_m ( ... ) __riscv_vfsgnjx_vf_f32m4_tumu(__VA_ARGS__)

◆ vfsgnjx_vf_f32m8

#define vfsgnjx_vf_f32m8 ( ... ) __riscv_vfsgnjx_vf_f32m8(__VA_ARGS__)

◆ vfsgnjx_vf_f32m8_m

#define vfsgnjx_vf_f32m8_m ( ... ) __riscv_vfsgnjx_vf_f32m8_tumu(__VA_ARGS__)

◆ vfsgnjx_vf_f32mf2

#define vfsgnjx_vf_f32mf2 ( ... ) __riscv_vfsgnjx_vf_f32mf2(__VA_ARGS__)

◆ vfsgnjx_vf_f32mf2_m

#define vfsgnjx_vf_f32mf2_m ( ... ) __riscv_vfsgnjx_vf_f32mf2_tumu(__VA_ARGS__)

◆ vfsgnjx_vf_f64m1

#define vfsgnjx_vf_f64m1 ( ... ) __riscv_vfsgnjx_vf_f64m1(__VA_ARGS__)

◆ vfsgnjx_vf_f64m1_m

#define vfsgnjx_vf_f64m1_m ( ... ) __riscv_vfsgnjx_vf_f64m1_tumu(__VA_ARGS__)

◆ vfsgnjx_vf_f64m2

#define vfsgnjx_vf_f64m2 ( ... ) __riscv_vfsgnjx_vf_f64m2(__VA_ARGS__)

◆ vfsgnjx_vf_f64m2_m

#define vfsgnjx_vf_f64m2_m ( ... ) __riscv_vfsgnjx_vf_f64m2_tumu(__VA_ARGS__)

◆ vfsgnjx_vf_f64m4

#define vfsgnjx_vf_f64m4 ( ... ) __riscv_vfsgnjx_vf_f64m4(__VA_ARGS__)

◆ vfsgnjx_vf_f64m4_m

#define vfsgnjx_vf_f64m4_m ( ... ) __riscv_vfsgnjx_vf_f64m4_tumu(__VA_ARGS__)

◆ vfsgnjx_vf_f64m8

#define vfsgnjx_vf_f64m8 ( ... ) __riscv_vfsgnjx_vf_f64m8(__VA_ARGS__)

◆ vfsgnjx_vf_f64m8_m

#define vfsgnjx_vf_f64m8_m ( ... ) __riscv_vfsgnjx_vf_f64m8_tumu(__VA_ARGS__)

◆ vfsgnjx_vv_f16m1

#define vfsgnjx_vv_f16m1 ( ... ) __riscv_vfsgnjx_vv_f16m1(__VA_ARGS__)

◆ vfsgnjx_vv_f16m1_m

#define vfsgnjx_vv_f16m1_m ( ... ) __riscv_vfsgnjx_vv_f16m1_tumu(__VA_ARGS__)

◆ vfsgnjx_vv_f16m2

#define vfsgnjx_vv_f16m2 ( ... ) __riscv_vfsgnjx_vv_f16m2(__VA_ARGS__)

◆ vfsgnjx_vv_f16m2_m

#define vfsgnjx_vv_f16m2_m ( ... ) __riscv_vfsgnjx_vv_f16m2_tumu(__VA_ARGS__)

◆ vfsgnjx_vv_f16m4

#define vfsgnjx_vv_f16m4 ( ... ) __riscv_vfsgnjx_vv_f16m4(__VA_ARGS__)

◆ vfsgnjx_vv_f16m4_m

#define vfsgnjx_vv_f16m4_m ( ... ) __riscv_vfsgnjx_vv_f16m4_tumu(__VA_ARGS__)

◆ vfsgnjx_vv_f16m8

#define vfsgnjx_vv_f16m8 ( ... ) __riscv_vfsgnjx_vv_f16m8(__VA_ARGS__)

◆ vfsgnjx_vv_f16m8_m

#define vfsgnjx_vv_f16m8_m ( ... ) __riscv_vfsgnjx_vv_f16m8_tumu(__VA_ARGS__)

◆ vfsgnjx_vv_f16mf2

#define vfsgnjx_vv_f16mf2 ( ... ) __riscv_vfsgnjx_vv_f16mf2(__VA_ARGS__)

◆ vfsgnjx_vv_f16mf2_m

#define vfsgnjx_vv_f16mf2_m ( ... ) __riscv_vfsgnjx_vv_f16mf2_tumu(__VA_ARGS__)

◆ vfsgnjx_vv_f16mf4

#define vfsgnjx_vv_f16mf4 ( ... ) __riscv_vfsgnjx_vv_f16mf4(__VA_ARGS__)

◆ vfsgnjx_vv_f16mf4_m

#define vfsgnjx_vv_f16mf4_m ( ... ) __riscv_vfsgnjx_vv_f16mf4_tumu(__VA_ARGS__)

◆ vfsgnjx_vv_f32m1

#define vfsgnjx_vv_f32m1 ( ... ) __riscv_vfsgnjx_vv_f32m1(__VA_ARGS__)

◆ vfsgnjx_vv_f32m1_m

#define vfsgnjx_vv_f32m1_m ( ... ) __riscv_vfsgnjx_vv_f32m1_tumu(__VA_ARGS__)

◆ vfsgnjx_vv_f32m2

#define vfsgnjx_vv_f32m2 ( ... ) __riscv_vfsgnjx_vv_f32m2(__VA_ARGS__)

◆ vfsgnjx_vv_f32m2_m

#define vfsgnjx_vv_f32m2_m ( ... ) __riscv_vfsgnjx_vv_f32m2_tumu(__VA_ARGS__)

◆ vfsgnjx_vv_f32m4

#define vfsgnjx_vv_f32m4 ( ... ) __riscv_vfsgnjx_vv_f32m4(__VA_ARGS__)

◆ vfsgnjx_vv_f32m4_m

#define vfsgnjx_vv_f32m4_m ( ... ) __riscv_vfsgnjx_vv_f32m4_tumu(__VA_ARGS__)

◆ vfsgnjx_vv_f32m8

#define vfsgnjx_vv_f32m8 ( ... ) __riscv_vfsgnjx_vv_f32m8(__VA_ARGS__)

◆ vfsgnjx_vv_f32m8_m

#define vfsgnjx_vv_f32m8_m ( ... ) __riscv_vfsgnjx_vv_f32m8_tumu(__VA_ARGS__)

◆ vfsgnjx_vv_f32mf2

#define vfsgnjx_vv_f32mf2 ( ... ) __riscv_vfsgnjx_vv_f32mf2(__VA_ARGS__)

◆ vfsgnjx_vv_f32mf2_m

#define vfsgnjx_vv_f32mf2_m ( ... ) __riscv_vfsgnjx_vv_f32mf2_tumu(__VA_ARGS__)

◆ vfsgnjx_vv_f64m1

#define vfsgnjx_vv_f64m1 ( ... ) __riscv_vfsgnjx_vv_f64m1(__VA_ARGS__)

◆ vfsgnjx_vv_f64m1_m

#define vfsgnjx_vv_f64m1_m ( ... ) __riscv_vfsgnjx_vv_f64m1_tumu(__VA_ARGS__)

◆ vfsgnjx_vv_f64m2

#define vfsgnjx_vv_f64m2 ( ... ) __riscv_vfsgnjx_vv_f64m2(__VA_ARGS__)

◆ vfsgnjx_vv_f64m2_m

#define vfsgnjx_vv_f64m2_m ( ... ) __riscv_vfsgnjx_vv_f64m2_tumu(__VA_ARGS__)

◆ vfsgnjx_vv_f64m4

#define vfsgnjx_vv_f64m4 ( ... ) __riscv_vfsgnjx_vv_f64m4(__VA_ARGS__)

◆ vfsgnjx_vv_f64m4_m

#define vfsgnjx_vv_f64m4_m ( ... ) __riscv_vfsgnjx_vv_f64m4_tumu(__VA_ARGS__)

◆ vfsgnjx_vv_f64m8

#define vfsgnjx_vv_f64m8 ( ... ) __riscv_vfsgnjx_vv_f64m8(__VA_ARGS__)

◆ vfsgnjx_vv_f64m8_m

#define vfsgnjx_vv_f64m8_m ( ... ) __riscv_vfsgnjx_vv_f64m8_tumu(__VA_ARGS__)

◆ vfslide1down_vf_f16m1

#define vfslide1down_vf_f16m1 ( ... ) __riscv_vfslide1down_vf_f16m1(__VA_ARGS__)

◆ vfslide1down_vf_f16m1_m

#define vfslide1down_vf_f16m1_m ( ... ) __riscv_vfslide1down_vf_f16m1_tumu(__VA_ARGS__)

◆ vfslide1down_vf_f16m2

#define vfslide1down_vf_f16m2 ( ... ) __riscv_vfslide1down_vf_f16m2(__VA_ARGS__)

◆ vfslide1down_vf_f16m2_m

#define vfslide1down_vf_f16m2_m ( ... ) __riscv_vfslide1down_vf_f16m2_tumu(__VA_ARGS__)

◆ vfslide1down_vf_f16m4

#define vfslide1down_vf_f16m4 ( ... ) __riscv_vfslide1down_vf_f16m4(__VA_ARGS__)

◆ vfslide1down_vf_f16m4_m

#define vfslide1down_vf_f16m4_m ( ... ) __riscv_vfslide1down_vf_f16m4_tumu(__VA_ARGS__)

◆ vfslide1down_vf_f16m8

#define vfslide1down_vf_f16m8 ( ... ) __riscv_vfslide1down_vf_f16m8(__VA_ARGS__)

◆ vfslide1down_vf_f16m8_m

#define vfslide1down_vf_f16m8_m ( ... ) __riscv_vfslide1down_vf_f16m8_tumu(__VA_ARGS__)

◆ vfslide1down_vf_f16mf2

#define vfslide1down_vf_f16mf2 ( ... ) __riscv_vfslide1down_vf_f16mf2(__VA_ARGS__)

◆ vfslide1down_vf_f16mf2_m

#define vfslide1down_vf_f16mf2_m ( ... ) __riscv_vfslide1down_vf_f16mf2_tumu(__VA_ARGS__)

◆ vfslide1down_vf_f16mf4

#define vfslide1down_vf_f16mf4 ( ... ) __riscv_vfslide1down_vf_f16mf4(__VA_ARGS__)

◆ vfslide1down_vf_f16mf4_m

#define vfslide1down_vf_f16mf4_m ( ... ) __riscv_vfslide1down_vf_f16mf4_tumu(__VA_ARGS__)

◆ vfslide1down_vf_f32m1

#define vfslide1down_vf_f32m1 ( ... ) __riscv_vfslide1down_vf_f32m1(__VA_ARGS__)

◆ vfslide1down_vf_f32m1_m

#define vfslide1down_vf_f32m1_m ( ... ) __riscv_vfslide1down_vf_f32m1_tumu(__VA_ARGS__)

◆ vfslide1down_vf_f32m2

#define vfslide1down_vf_f32m2 ( ... ) __riscv_vfslide1down_vf_f32m2(__VA_ARGS__)

◆ vfslide1down_vf_f32m2_m

#define vfslide1down_vf_f32m2_m ( ... ) __riscv_vfslide1down_vf_f32m2_tumu(__VA_ARGS__)

◆ vfslide1down_vf_f32m4

#define vfslide1down_vf_f32m4 ( ... ) __riscv_vfslide1down_vf_f32m4(__VA_ARGS__)

◆ vfslide1down_vf_f32m4_m

#define vfslide1down_vf_f32m4_m ( ... ) __riscv_vfslide1down_vf_f32m4_tumu(__VA_ARGS__)

◆ vfslide1down_vf_f32m8

#define vfslide1down_vf_f32m8 ( ... ) __riscv_vfslide1down_vf_f32m8(__VA_ARGS__)

◆ vfslide1down_vf_f32m8_m

#define vfslide1down_vf_f32m8_m ( ... ) __riscv_vfslide1down_vf_f32m8_tumu(__VA_ARGS__)

◆ vfslide1down_vf_f32mf2

#define vfslide1down_vf_f32mf2 ( ... ) __riscv_vfslide1down_vf_f32mf2(__VA_ARGS__)

◆ vfslide1down_vf_f32mf2_m

#define vfslide1down_vf_f32mf2_m ( ... ) __riscv_vfslide1down_vf_f32mf2_tumu(__VA_ARGS__)

◆ vfslide1down_vf_f64m1

#define vfslide1down_vf_f64m1 ( ... ) __riscv_vfslide1down_vf_f64m1(__VA_ARGS__)

◆ vfslide1down_vf_f64m1_m

#define vfslide1down_vf_f64m1_m ( ... ) __riscv_vfslide1down_vf_f64m1_tumu(__VA_ARGS__)

◆ vfslide1down_vf_f64m2

#define vfslide1down_vf_f64m2 ( ... ) __riscv_vfslide1down_vf_f64m2(__VA_ARGS__)

◆ vfslide1down_vf_f64m2_m

#define vfslide1down_vf_f64m2_m ( ... ) __riscv_vfslide1down_vf_f64m2_tumu(__VA_ARGS__)

◆ vfslide1down_vf_f64m4

#define vfslide1down_vf_f64m4 ( ... ) __riscv_vfslide1down_vf_f64m4(__VA_ARGS__)

◆ vfslide1down_vf_f64m4_m

#define vfslide1down_vf_f64m4_m ( ... ) __riscv_vfslide1down_vf_f64m4_tumu(__VA_ARGS__)

◆ vfslide1down_vf_f64m8

#define vfslide1down_vf_f64m8 ( ... ) __riscv_vfslide1down_vf_f64m8(__VA_ARGS__)

◆ vfslide1down_vf_f64m8_m

#define vfslide1down_vf_f64m8_m ( ... ) __riscv_vfslide1down_vf_f64m8_tumu(__VA_ARGS__)

◆ vfslide1up_vf_f16m1

#define vfslide1up_vf_f16m1 ( ... ) __riscv_vfslide1up_vf_f16m1(__VA_ARGS__)

◆ vfslide1up_vf_f16m1_m

#define vfslide1up_vf_f16m1_m ( ... ) __riscv_vfslide1up_vf_f16m1_tumu(__VA_ARGS__)

◆ vfslide1up_vf_f16m2

#define vfslide1up_vf_f16m2 ( ... ) __riscv_vfslide1up_vf_f16m2(__VA_ARGS__)

◆ vfslide1up_vf_f16m2_m

#define vfslide1up_vf_f16m2_m ( ... ) __riscv_vfslide1up_vf_f16m2_tumu(__VA_ARGS__)

◆ vfslide1up_vf_f16m4

#define vfslide1up_vf_f16m4 ( ... ) __riscv_vfslide1up_vf_f16m4(__VA_ARGS__)

◆ vfslide1up_vf_f16m4_m

#define vfslide1up_vf_f16m4_m ( ... ) __riscv_vfslide1up_vf_f16m4_tumu(__VA_ARGS__)

◆ vfslide1up_vf_f16m8

#define vfslide1up_vf_f16m8 ( ... ) __riscv_vfslide1up_vf_f16m8(__VA_ARGS__)

◆ vfslide1up_vf_f16m8_m

#define vfslide1up_vf_f16m8_m ( ... ) __riscv_vfslide1up_vf_f16m8_tumu(__VA_ARGS__)

◆ vfslide1up_vf_f16mf2

#define vfslide1up_vf_f16mf2 ( ... ) __riscv_vfslide1up_vf_f16mf2(__VA_ARGS__)

◆ vfslide1up_vf_f16mf2_m

#define vfslide1up_vf_f16mf2_m ( ... ) __riscv_vfslide1up_vf_f16mf2_tumu(__VA_ARGS__)

◆ vfslide1up_vf_f16mf4

#define vfslide1up_vf_f16mf4 ( ... ) __riscv_vfslide1up_vf_f16mf4(__VA_ARGS__)

◆ vfslide1up_vf_f16mf4_m

#define vfslide1up_vf_f16mf4_m ( ... ) __riscv_vfslide1up_vf_f16mf4_tumu(__VA_ARGS__)

◆ vfslide1up_vf_f32m1

#define vfslide1up_vf_f32m1 ( ... ) __riscv_vfslide1up_vf_f32m1(__VA_ARGS__)

◆ vfslide1up_vf_f32m1_m

#define vfslide1up_vf_f32m1_m ( ... ) __riscv_vfslide1up_vf_f32m1_tumu(__VA_ARGS__)

◆ vfslide1up_vf_f32m2

#define vfslide1up_vf_f32m2 ( ... ) __riscv_vfslide1up_vf_f32m2(__VA_ARGS__)

◆ vfslide1up_vf_f32m2_m

#define vfslide1up_vf_f32m2_m ( ... ) __riscv_vfslide1up_vf_f32m2_tumu(__VA_ARGS__)

◆ vfslide1up_vf_f32m4

#define vfslide1up_vf_f32m4 ( ... ) __riscv_vfslide1up_vf_f32m4(__VA_ARGS__)

◆ vfslide1up_vf_f32m4_m

#define vfslide1up_vf_f32m4_m ( ... ) __riscv_vfslide1up_vf_f32m4_tumu(__VA_ARGS__)

◆ vfslide1up_vf_f32m8

#define vfslide1up_vf_f32m8 ( ... ) __riscv_vfslide1up_vf_f32m8(__VA_ARGS__)

◆ vfslide1up_vf_f32m8_m

#define vfslide1up_vf_f32m8_m ( ... ) __riscv_vfslide1up_vf_f32m8_tumu(__VA_ARGS__)

◆ vfslide1up_vf_f32mf2

#define vfslide1up_vf_f32mf2 ( ... ) __riscv_vfslide1up_vf_f32mf2(__VA_ARGS__)

◆ vfslide1up_vf_f32mf2_m

#define vfslide1up_vf_f32mf2_m ( ... ) __riscv_vfslide1up_vf_f32mf2_tumu(__VA_ARGS__)

◆ vfslide1up_vf_f64m1

#define vfslide1up_vf_f64m1 ( ... ) __riscv_vfslide1up_vf_f64m1(__VA_ARGS__)

◆ vfslide1up_vf_f64m1_m

#define vfslide1up_vf_f64m1_m ( ... ) __riscv_vfslide1up_vf_f64m1_tumu(__VA_ARGS__)

◆ vfslide1up_vf_f64m2

#define vfslide1up_vf_f64m2 ( ... ) __riscv_vfslide1up_vf_f64m2(__VA_ARGS__)

◆ vfslide1up_vf_f64m2_m

#define vfslide1up_vf_f64m2_m ( ... ) __riscv_vfslide1up_vf_f64m2_tumu(__VA_ARGS__)

◆ vfslide1up_vf_f64m4

#define vfslide1up_vf_f64m4 ( ... ) __riscv_vfslide1up_vf_f64m4(__VA_ARGS__)

◆ vfslide1up_vf_f64m4_m

#define vfslide1up_vf_f64m4_m ( ... ) __riscv_vfslide1up_vf_f64m4_tumu(__VA_ARGS__)

◆ vfslide1up_vf_f64m8

#define vfslide1up_vf_f64m8 ( ... ) __riscv_vfslide1up_vf_f64m8(__VA_ARGS__)

◆ vfslide1up_vf_f64m8_m

#define vfslide1up_vf_f64m8_m ( ... ) __riscv_vfslide1up_vf_f64m8_tumu(__VA_ARGS__)

◆ vfsqrt_v_f16m1

#define vfsqrt_v_f16m1 ( ... ) __riscv_vfsqrt_v_f16m1(__VA_ARGS__)

◆ vfsqrt_v_f16m1_m

#define vfsqrt_v_f16m1_m ( ... ) __riscv_vfsqrt_v_f16m1_tumu(__VA_ARGS__)

◆ vfsqrt_v_f16m2

#define vfsqrt_v_f16m2 ( ... ) __riscv_vfsqrt_v_f16m2(__VA_ARGS__)

◆ vfsqrt_v_f16m2_m

#define vfsqrt_v_f16m2_m ( ... ) __riscv_vfsqrt_v_f16m2_tumu(__VA_ARGS__)

◆ vfsqrt_v_f16m4

#define vfsqrt_v_f16m4 ( ... ) __riscv_vfsqrt_v_f16m4(__VA_ARGS__)

◆ vfsqrt_v_f16m4_m

#define vfsqrt_v_f16m4_m ( ... ) __riscv_vfsqrt_v_f16m4_tumu(__VA_ARGS__)

◆ vfsqrt_v_f16m8

#define vfsqrt_v_f16m8 ( ... ) __riscv_vfsqrt_v_f16m8(__VA_ARGS__)

◆ vfsqrt_v_f16m8_m

#define vfsqrt_v_f16m8_m ( ... ) __riscv_vfsqrt_v_f16m8_tumu(__VA_ARGS__)

◆ vfsqrt_v_f16mf2

#define vfsqrt_v_f16mf2 ( ... ) __riscv_vfsqrt_v_f16mf2(__VA_ARGS__)

◆ vfsqrt_v_f16mf2_m

#define vfsqrt_v_f16mf2_m ( ... ) __riscv_vfsqrt_v_f16mf2_tumu(__VA_ARGS__)

◆ vfsqrt_v_f16mf4

#define vfsqrt_v_f16mf4 ( ... ) __riscv_vfsqrt_v_f16mf4(__VA_ARGS__)

◆ vfsqrt_v_f16mf4_m

#define vfsqrt_v_f16mf4_m ( ... ) __riscv_vfsqrt_v_f16mf4_tumu(__VA_ARGS__)

◆ vfsqrt_v_f32m1

#define vfsqrt_v_f32m1 ( ... ) __riscv_vfsqrt_v_f32m1(__VA_ARGS__)

◆ vfsqrt_v_f32m1_m

#define vfsqrt_v_f32m1_m ( ... ) __riscv_vfsqrt_v_f32m1_tumu(__VA_ARGS__)

◆ vfsqrt_v_f32m2

#define vfsqrt_v_f32m2 ( ... ) __riscv_vfsqrt_v_f32m2(__VA_ARGS__)

◆ vfsqrt_v_f32m2_m

#define vfsqrt_v_f32m2_m ( ... ) __riscv_vfsqrt_v_f32m2_tumu(__VA_ARGS__)

◆ vfsqrt_v_f32m4

#define vfsqrt_v_f32m4 ( ... ) __riscv_vfsqrt_v_f32m4(__VA_ARGS__)

◆ vfsqrt_v_f32m4_m

#define vfsqrt_v_f32m4_m ( ... ) __riscv_vfsqrt_v_f32m4_tumu(__VA_ARGS__)

◆ vfsqrt_v_f32m8

#define vfsqrt_v_f32m8 ( ... ) __riscv_vfsqrt_v_f32m8(__VA_ARGS__)

◆ vfsqrt_v_f32m8_m

#define vfsqrt_v_f32m8_m ( ... ) __riscv_vfsqrt_v_f32m8_tumu(__VA_ARGS__)

◆ vfsqrt_v_f32mf2

#define vfsqrt_v_f32mf2 ( ... ) __riscv_vfsqrt_v_f32mf2(__VA_ARGS__)

◆ vfsqrt_v_f32mf2_m

#define vfsqrt_v_f32mf2_m ( ... ) __riscv_vfsqrt_v_f32mf2_tumu(__VA_ARGS__)

◆ vfsqrt_v_f64m1

#define vfsqrt_v_f64m1 ( ... ) __riscv_vfsqrt_v_f64m1(__VA_ARGS__)

◆ vfsqrt_v_f64m1_m

#define vfsqrt_v_f64m1_m ( ... ) __riscv_vfsqrt_v_f64m1_tumu(__VA_ARGS__)

◆ vfsqrt_v_f64m2

#define vfsqrt_v_f64m2 ( ... ) __riscv_vfsqrt_v_f64m2(__VA_ARGS__)

◆ vfsqrt_v_f64m2_m

#define vfsqrt_v_f64m2_m ( ... ) __riscv_vfsqrt_v_f64m2_tumu(__VA_ARGS__)

◆ vfsqrt_v_f64m4

#define vfsqrt_v_f64m4 ( ... ) __riscv_vfsqrt_v_f64m4(__VA_ARGS__)

◆ vfsqrt_v_f64m4_m

#define vfsqrt_v_f64m4_m ( ... ) __riscv_vfsqrt_v_f64m4_tumu(__VA_ARGS__)

◆ vfsqrt_v_f64m8

#define vfsqrt_v_f64m8 ( ... ) __riscv_vfsqrt_v_f64m8(__VA_ARGS__)

◆ vfsqrt_v_f64m8_m

#define vfsqrt_v_f64m8_m ( ... ) __riscv_vfsqrt_v_f64m8_tumu(__VA_ARGS__)

◆ vfsub_vf_f16m1

#define vfsub_vf_f16m1 ( ... ) __riscv_vfsub_vf_f16m1(__VA_ARGS__)

◆ vfsub_vf_f16m1_m

#define vfsub_vf_f16m1_m ( ... ) __riscv_vfsub_vf_f16m1_tumu(__VA_ARGS__)

◆ vfsub_vf_f16m2

#define vfsub_vf_f16m2 ( ... ) __riscv_vfsub_vf_f16m2(__VA_ARGS__)

◆ vfsub_vf_f16m2_m

#define vfsub_vf_f16m2_m ( ... ) __riscv_vfsub_vf_f16m2_tumu(__VA_ARGS__)

◆ vfsub_vf_f16m4

#define vfsub_vf_f16m4 ( ... ) __riscv_vfsub_vf_f16m4(__VA_ARGS__)

◆ vfsub_vf_f16m4_m

#define vfsub_vf_f16m4_m ( ... ) __riscv_vfsub_vf_f16m4_tumu(__VA_ARGS__)

◆ vfsub_vf_f16m8

#define vfsub_vf_f16m8 ( ... ) __riscv_vfsub_vf_f16m8(__VA_ARGS__)

◆ vfsub_vf_f16m8_m

#define vfsub_vf_f16m8_m ( ... ) __riscv_vfsub_vf_f16m8_tumu(__VA_ARGS__)

◆ vfsub_vf_f16mf2

#define vfsub_vf_f16mf2 ( ... ) __riscv_vfsub_vf_f16mf2(__VA_ARGS__)

◆ vfsub_vf_f16mf2_m

#define vfsub_vf_f16mf2_m ( ... ) __riscv_vfsub_vf_f16mf2_tumu(__VA_ARGS__)

◆ vfsub_vf_f16mf4

#define vfsub_vf_f16mf4 ( ... ) __riscv_vfsub_vf_f16mf4(__VA_ARGS__)

◆ vfsub_vf_f16mf4_m

#define vfsub_vf_f16mf4_m ( ... ) __riscv_vfsub_vf_f16mf4_tumu(__VA_ARGS__)

◆ vfsub_vf_f32m1

#define vfsub_vf_f32m1 ( ... ) __riscv_vfsub_vf_f32m1(__VA_ARGS__)

◆ vfsub_vf_f32m1_m

#define vfsub_vf_f32m1_m ( ... ) __riscv_vfsub_vf_f32m1_tumu(__VA_ARGS__)

◆ vfsub_vf_f32m2

#define vfsub_vf_f32m2 ( ... ) __riscv_vfsub_vf_f32m2(__VA_ARGS__)

◆ vfsub_vf_f32m2_m

#define vfsub_vf_f32m2_m ( ... ) __riscv_vfsub_vf_f32m2_tumu(__VA_ARGS__)

◆ vfsub_vf_f32m4

#define vfsub_vf_f32m4 ( ... ) __riscv_vfsub_vf_f32m4(__VA_ARGS__)

◆ vfsub_vf_f32m4_m

#define vfsub_vf_f32m4_m ( ... ) __riscv_vfsub_vf_f32m4_tumu(__VA_ARGS__)

◆ vfsub_vf_f32m8

#define vfsub_vf_f32m8 ( ... ) __riscv_vfsub_vf_f32m8(__VA_ARGS__)

◆ vfsub_vf_f32m8_m

#define vfsub_vf_f32m8_m ( ... ) __riscv_vfsub_vf_f32m8_tumu(__VA_ARGS__)

◆ vfsub_vf_f32mf2

#define vfsub_vf_f32mf2 ( ... ) __riscv_vfsub_vf_f32mf2(__VA_ARGS__)

◆ vfsub_vf_f32mf2_m

#define vfsub_vf_f32mf2_m ( ... ) __riscv_vfsub_vf_f32mf2_tumu(__VA_ARGS__)

◆ vfsub_vf_f64m1

#define vfsub_vf_f64m1 ( ... ) __riscv_vfsub_vf_f64m1(__VA_ARGS__)

◆ vfsub_vf_f64m1_m

#define vfsub_vf_f64m1_m ( ... ) __riscv_vfsub_vf_f64m1_tumu(__VA_ARGS__)

◆ vfsub_vf_f64m2

#define vfsub_vf_f64m2 ( ... ) __riscv_vfsub_vf_f64m2(__VA_ARGS__)

◆ vfsub_vf_f64m2_m

#define vfsub_vf_f64m2_m ( ... ) __riscv_vfsub_vf_f64m2_tumu(__VA_ARGS__)

◆ vfsub_vf_f64m4

#define vfsub_vf_f64m4 ( ... ) __riscv_vfsub_vf_f64m4(__VA_ARGS__)

◆ vfsub_vf_f64m4_m

#define vfsub_vf_f64m4_m ( ... ) __riscv_vfsub_vf_f64m4_tumu(__VA_ARGS__)

◆ vfsub_vf_f64m8

#define vfsub_vf_f64m8 ( ... ) __riscv_vfsub_vf_f64m8(__VA_ARGS__)

◆ vfsub_vf_f64m8_m

#define vfsub_vf_f64m8_m ( ... ) __riscv_vfsub_vf_f64m8_tumu(__VA_ARGS__)

◆ vfsub_vv_f16m1

#define vfsub_vv_f16m1 ( ... ) __riscv_vfsub_vv_f16m1(__VA_ARGS__)

◆ vfsub_vv_f16m1_m

#define vfsub_vv_f16m1_m ( ... ) __riscv_vfsub_vv_f16m1_tumu(__VA_ARGS__)

◆ vfsub_vv_f16m2

#define vfsub_vv_f16m2 ( ... ) __riscv_vfsub_vv_f16m2(__VA_ARGS__)

◆ vfsub_vv_f16m2_m

#define vfsub_vv_f16m2_m ( ... ) __riscv_vfsub_vv_f16m2_tumu(__VA_ARGS__)

◆ vfsub_vv_f16m4

#define vfsub_vv_f16m4 ( ... ) __riscv_vfsub_vv_f16m4(__VA_ARGS__)

◆ vfsub_vv_f16m4_m

#define vfsub_vv_f16m4_m ( ... ) __riscv_vfsub_vv_f16m4_tumu(__VA_ARGS__)

◆ vfsub_vv_f16m8

#define vfsub_vv_f16m8 ( ... ) __riscv_vfsub_vv_f16m8(__VA_ARGS__)

◆ vfsub_vv_f16m8_m

#define vfsub_vv_f16m8_m ( ... ) __riscv_vfsub_vv_f16m8_tumu(__VA_ARGS__)

◆ vfsub_vv_f16mf2

#define vfsub_vv_f16mf2 ( ... ) __riscv_vfsub_vv_f16mf2(__VA_ARGS__)

◆ vfsub_vv_f16mf2_m

#define vfsub_vv_f16mf2_m ( ... ) __riscv_vfsub_vv_f16mf2_tumu(__VA_ARGS__)

◆ vfsub_vv_f16mf4

#define vfsub_vv_f16mf4 ( ... ) __riscv_vfsub_vv_f16mf4(__VA_ARGS__)

◆ vfsub_vv_f16mf4_m

#define vfsub_vv_f16mf4_m ( ... ) __riscv_vfsub_vv_f16mf4_tumu(__VA_ARGS__)

◆ vfsub_vv_f32m1

#define vfsub_vv_f32m1 ( ... ) __riscv_vfsub_vv_f32m1(__VA_ARGS__)

◆ vfsub_vv_f32m1_m

#define vfsub_vv_f32m1_m ( ... ) __riscv_vfsub_vv_f32m1_tumu(__VA_ARGS__)

◆ vfsub_vv_f32m2

#define vfsub_vv_f32m2 ( ... ) __riscv_vfsub_vv_f32m2(__VA_ARGS__)

◆ vfsub_vv_f32m2_m

#define vfsub_vv_f32m2_m ( ... ) __riscv_vfsub_vv_f32m2_tumu(__VA_ARGS__)

◆ vfsub_vv_f32m4

#define vfsub_vv_f32m4 ( ... ) __riscv_vfsub_vv_f32m4(__VA_ARGS__)

◆ vfsub_vv_f32m4_m

#define vfsub_vv_f32m4_m ( ... ) __riscv_vfsub_vv_f32m4_tumu(__VA_ARGS__)

◆ vfsub_vv_f32m8

#define vfsub_vv_f32m8 ( ... ) __riscv_vfsub_vv_f32m8(__VA_ARGS__)

◆ vfsub_vv_f32m8_m

#define vfsub_vv_f32m8_m ( ... ) __riscv_vfsub_vv_f32m8_tumu(__VA_ARGS__)

◆ vfsub_vv_f32mf2

#define vfsub_vv_f32mf2 ( ... ) __riscv_vfsub_vv_f32mf2(__VA_ARGS__)

◆ vfsub_vv_f32mf2_m

#define vfsub_vv_f32mf2_m ( ... ) __riscv_vfsub_vv_f32mf2_tumu(__VA_ARGS__)

◆ vfsub_vv_f64m1

#define vfsub_vv_f64m1 ( ... ) __riscv_vfsub_vv_f64m1(__VA_ARGS__)

◆ vfsub_vv_f64m1_m

#define vfsub_vv_f64m1_m ( ... ) __riscv_vfsub_vv_f64m1_tumu(__VA_ARGS__)

◆ vfsub_vv_f64m2

#define vfsub_vv_f64m2 ( ... ) __riscv_vfsub_vv_f64m2(__VA_ARGS__)

◆ vfsub_vv_f64m2_m

#define vfsub_vv_f64m2_m ( ... ) __riscv_vfsub_vv_f64m2_tumu(__VA_ARGS__)

◆ vfsub_vv_f64m4

#define vfsub_vv_f64m4 ( ... ) __riscv_vfsub_vv_f64m4(__VA_ARGS__)

◆ vfsub_vv_f64m4_m

#define vfsub_vv_f64m4_m ( ... ) __riscv_vfsub_vv_f64m4_tumu(__VA_ARGS__)

◆ vfsub_vv_f64m8

#define vfsub_vv_f64m8 ( ... ) __riscv_vfsub_vv_f64m8(__VA_ARGS__)

◆ vfsub_vv_f64m8_m

#define vfsub_vv_f64m8_m ( ... ) __riscv_vfsub_vv_f64m8_tumu(__VA_ARGS__)

◆ vfwadd_vf_f32m1

#define vfwadd_vf_f32m1 ( ... ) __riscv_vfwadd_vf_f32m1(__VA_ARGS__)

◆ vfwadd_vf_f32m1_m

#define vfwadd_vf_f32m1_m ( ... ) __riscv_vfwadd_vf_f32m1_tumu(__VA_ARGS__)

◆ vfwadd_vf_f32m2

#define vfwadd_vf_f32m2 ( ... ) __riscv_vfwadd_vf_f32m2(__VA_ARGS__)

◆ vfwadd_vf_f32m2_m

#define vfwadd_vf_f32m2_m ( ... ) __riscv_vfwadd_vf_f32m2_tumu(__VA_ARGS__)

◆ vfwadd_vf_f32m4

#define vfwadd_vf_f32m4 ( ... ) __riscv_vfwadd_vf_f32m4(__VA_ARGS__)

◆ vfwadd_vf_f32m4_m

#define vfwadd_vf_f32m4_m ( ... ) __riscv_vfwadd_vf_f32m4_tumu(__VA_ARGS__)

◆ vfwadd_vf_f32m8

#define vfwadd_vf_f32m8 ( ... ) __riscv_vfwadd_vf_f32m8(__VA_ARGS__)

◆ vfwadd_vf_f32m8_m

#define vfwadd_vf_f32m8_m ( ... ) __riscv_vfwadd_vf_f32m8_tumu(__VA_ARGS__)

◆ vfwadd_vf_f32mf2

#define vfwadd_vf_f32mf2 ( ... ) __riscv_vfwadd_vf_f32mf2(__VA_ARGS__)

◆ vfwadd_vf_f32mf2_m

#define vfwadd_vf_f32mf2_m ( ... ) __riscv_vfwadd_vf_f32mf2_tumu(__VA_ARGS__)

◆ vfwadd_vf_f64m1

#define vfwadd_vf_f64m1 ( ... ) __riscv_vfwadd_vf_f64m1(__VA_ARGS__)

◆ vfwadd_vf_f64m1_m

#define vfwadd_vf_f64m1_m ( ... ) __riscv_vfwadd_vf_f64m1_tumu(__VA_ARGS__)

◆ vfwadd_vf_f64m2

#define vfwadd_vf_f64m2 ( ... ) __riscv_vfwadd_vf_f64m2(__VA_ARGS__)

◆ vfwadd_vf_f64m2_m

#define vfwadd_vf_f64m2_m ( ... ) __riscv_vfwadd_vf_f64m2_tumu(__VA_ARGS__)

◆ vfwadd_vf_f64m4

#define vfwadd_vf_f64m4 ( ... ) __riscv_vfwadd_vf_f64m4(__VA_ARGS__)

◆ vfwadd_vf_f64m4_m

#define vfwadd_vf_f64m4_m ( ... ) __riscv_vfwadd_vf_f64m4_tumu(__VA_ARGS__)

◆ vfwadd_vf_f64m8

#define vfwadd_vf_f64m8 ( ... ) __riscv_vfwadd_vf_f64m8(__VA_ARGS__)

◆ vfwadd_vf_f64m8_m

#define vfwadd_vf_f64m8_m ( ... ) __riscv_vfwadd_vf_f64m8_tumu(__VA_ARGS__)

◆ vfwadd_vv_f32m1

#define vfwadd_vv_f32m1 ( ... ) __riscv_vfwadd_vv_f32m1(__VA_ARGS__)

◆ vfwadd_vv_f32m1_m

#define vfwadd_vv_f32m1_m ( ... ) __riscv_vfwadd_vv_f32m1_tumu(__VA_ARGS__)

◆ vfwadd_vv_f32m2

#define vfwadd_vv_f32m2 ( ... ) __riscv_vfwadd_vv_f32m2(__VA_ARGS__)

◆ vfwadd_vv_f32m2_m

#define vfwadd_vv_f32m2_m ( ... ) __riscv_vfwadd_vv_f32m2_tumu(__VA_ARGS__)

◆ vfwadd_vv_f32m4

#define vfwadd_vv_f32m4 ( ... ) __riscv_vfwadd_vv_f32m4(__VA_ARGS__)

◆ vfwadd_vv_f32m4_m

#define vfwadd_vv_f32m4_m ( ... ) __riscv_vfwadd_vv_f32m4_tumu(__VA_ARGS__)

◆ vfwadd_vv_f32m8

#define vfwadd_vv_f32m8 ( ... ) __riscv_vfwadd_vv_f32m8(__VA_ARGS__)

◆ vfwadd_vv_f32m8_m

#define vfwadd_vv_f32m8_m ( ... ) __riscv_vfwadd_vv_f32m8_tumu(__VA_ARGS__)

◆ vfwadd_vv_f32mf2

#define vfwadd_vv_f32mf2 ( ... ) __riscv_vfwadd_vv_f32mf2(__VA_ARGS__)

◆ vfwadd_vv_f32mf2_m

#define vfwadd_vv_f32mf2_m ( ... ) __riscv_vfwadd_vv_f32mf2_tumu(__VA_ARGS__)

◆ vfwadd_vv_f64m1

#define vfwadd_vv_f64m1 ( ... ) __riscv_vfwadd_vv_f64m1(__VA_ARGS__)

◆ vfwadd_vv_f64m1_m

#define vfwadd_vv_f64m1_m ( ... ) __riscv_vfwadd_vv_f64m1_tumu(__VA_ARGS__)

◆ vfwadd_vv_f64m2

#define vfwadd_vv_f64m2 ( ... ) __riscv_vfwadd_vv_f64m2(__VA_ARGS__)

◆ vfwadd_vv_f64m2_m

#define vfwadd_vv_f64m2_m ( ... ) __riscv_vfwadd_vv_f64m2_tumu(__VA_ARGS__)

◆ vfwadd_vv_f64m4

#define vfwadd_vv_f64m4 ( ... ) __riscv_vfwadd_vv_f64m4(__VA_ARGS__)

◆ vfwadd_vv_f64m4_m

#define vfwadd_vv_f64m4_m ( ... ) __riscv_vfwadd_vv_f64m4_tumu(__VA_ARGS__)

◆ vfwadd_vv_f64m8

#define vfwadd_vv_f64m8 ( ... ) __riscv_vfwadd_vv_f64m8(__VA_ARGS__)

◆ vfwadd_vv_f64m8_m

#define vfwadd_vv_f64m8_m ( ... ) __riscv_vfwadd_vv_f64m8_tumu(__VA_ARGS__)

◆ vfwadd_wf_f32m1

#define vfwadd_wf_f32m1 ( ... ) __riscv_vfwadd_wf_f32m1(__VA_ARGS__)

◆ vfwadd_wf_f32m1_m

#define vfwadd_wf_f32m1_m ( ... ) __riscv_vfwadd_wf_f32m1_tumu(__VA_ARGS__)

◆ vfwadd_wf_f32m2

#define vfwadd_wf_f32m2 ( ... ) __riscv_vfwadd_wf_f32m2(__VA_ARGS__)

◆ vfwadd_wf_f32m2_m

#define vfwadd_wf_f32m2_m ( ... ) __riscv_vfwadd_wf_f32m2_tumu(__VA_ARGS__)

◆ vfwadd_wf_f32m4

#define vfwadd_wf_f32m4 ( ... ) __riscv_vfwadd_wf_f32m4(__VA_ARGS__)

◆ vfwadd_wf_f32m4_m

#define vfwadd_wf_f32m4_m ( ... ) __riscv_vfwadd_wf_f32m4_tumu(__VA_ARGS__)

◆ vfwadd_wf_f32m8

#define vfwadd_wf_f32m8 ( ... ) __riscv_vfwadd_wf_f32m8(__VA_ARGS__)

◆ vfwadd_wf_f32m8_m

#define vfwadd_wf_f32m8_m ( ... ) __riscv_vfwadd_wf_f32m8_tumu(__VA_ARGS__)

◆ vfwadd_wf_f32mf2

#define vfwadd_wf_f32mf2 ( ... ) __riscv_vfwadd_wf_f32mf2(__VA_ARGS__)

◆ vfwadd_wf_f32mf2_m

#define vfwadd_wf_f32mf2_m ( ... ) __riscv_vfwadd_wf_f32mf2_tumu(__VA_ARGS__)

◆ vfwadd_wf_f64m1

#define vfwadd_wf_f64m1 ( ... ) __riscv_vfwadd_wf_f64m1(__VA_ARGS__)

◆ vfwadd_wf_f64m1_m

#define vfwadd_wf_f64m1_m ( ... ) __riscv_vfwadd_wf_f64m1_tumu(__VA_ARGS__)

◆ vfwadd_wf_f64m2

#define vfwadd_wf_f64m2 ( ... ) __riscv_vfwadd_wf_f64m2(__VA_ARGS__)

◆ vfwadd_wf_f64m2_m

#define vfwadd_wf_f64m2_m ( ... ) __riscv_vfwadd_wf_f64m2_tumu(__VA_ARGS__)

◆ vfwadd_wf_f64m4

#define vfwadd_wf_f64m4 ( ... ) __riscv_vfwadd_wf_f64m4(__VA_ARGS__)

◆ vfwadd_wf_f64m4_m

#define vfwadd_wf_f64m4_m ( ... ) __riscv_vfwadd_wf_f64m4_tumu(__VA_ARGS__)

◆ vfwadd_wf_f64m8

#define vfwadd_wf_f64m8 ( ... ) __riscv_vfwadd_wf_f64m8(__VA_ARGS__)

◆ vfwadd_wf_f64m8_m

#define vfwadd_wf_f64m8_m ( ... ) __riscv_vfwadd_wf_f64m8_tumu(__VA_ARGS__)

◆ vfwadd_wv_f32m1

#define vfwadd_wv_f32m1 ( ... ) __riscv_vfwadd_wv_f32m1(__VA_ARGS__)

◆ vfwadd_wv_f32m1_m

#define vfwadd_wv_f32m1_m ( ... ) __riscv_vfwadd_wv_f32m1_tumu(__VA_ARGS__)

◆ vfwadd_wv_f32m2

#define vfwadd_wv_f32m2 ( ... ) __riscv_vfwadd_wv_f32m2(__VA_ARGS__)

◆ vfwadd_wv_f32m2_m

#define vfwadd_wv_f32m2_m ( ... ) __riscv_vfwadd_wv_f32m2_tumu(__VA_ARGS__)

◆ vfwadd_wv_f32m4

#define vfwadd_wv_f32m4 ( ... ) __riscv_vfwadd_wv_f32m4(__VA_ARGS__)

◆ vfwadd_wv_f32m4_m

#define vfwadd_wv_f32m4_m ( ... ) __riscv_vfwadd_wv_f32m4_tumu(__VA_ARGS__)

◆ vfwadd_wv_f32m8

#define vfwadd_wv_f32m8 ( ... ) __riscv_vfwadd_wv_f32m8(__VA_ARGS__)

◆ vfwadd_wv_f32m8_m

#define vfwadd_wv_f32m8_m ( ... ) __riscv_vfwadd_wv_f32m8_tumu(__VA_ARGS__)

◆ vfwadd_wv_f32mf2

#define vfwadd_wv_f32mf2 ( ... ) __riscv_vfwadd_wv_f32mf2(__VA_ARGS__)

◆ vfwadd_wv_f32mf2_m

#define vfwadd_wv_f32mf2_m ( ... ) __riscv_vfwadd_wv_f32mf2_tumu(__VA_ARGS__)

◆ vfwadd_wv_f64m1

#define vfwadd_wv_f64m1 ( ... ) __riscv_vfwadd_wv_f64m1(__VA_ARGS__)

◆ vfwadd_wv_f64m1_m

#define vfwadd_wv_f64m1_m ( ... ) __riscv_vfwadd_wv_f64m1_tumu(__VA_ARGS__)

◆ vfwadd_wv_f64m2

#define vfwadd_wv_f64m2 ( ... ) __riscv_vfwadd_wv_f64m2(__VA_ARGS__)

◆ vfwadd_wv_f64m2_m

#define vfwadd_wv_f64m2_m ( ... ) __riscv_vfwadd_wv_f64m2_tumu(__VA_ARGS__)

◆ vfwadd_wv_f64m4

#define vfwadd_wv_f64m4 ( ... ) __riscv_vfwadd_wv_f64m4(__VA_ARGS__)

◆ vfwadd_wv_f64m4_m

#define vfwadd_wv_f64m4_m ( ... ) __riscv_vfwadd_wv_f64m4_tumu(__VA_ARGS__)

◆ vfwadd_wv_f64m8

#define vfwadd_wv_f64m8 ( ... ) __riscv_vfwadd_wv_f64m8(__VA_ARGS__)

◆ vfwadd_wv_f64m8_m

#define vfwadd_wv_f64m8_m ( ... ) __riscv_vfwadd_wv_f64m8_tumu(__VA_ARGS__)

◆ vfwcvt_f_f_v_f32m1

#define vfwcvt_f_f_v_f32m1 ( ... ) __riscv_vfwcvt_f_f_v_f32m1(__VA_ARGS__)

◆ vfwcvt_f_f_v_f32m1_m

#define vfwcvt_f_f_v_f32m1_m ( ... ) __riscv_vfwcvt_f_f_v_f32m1_tumu(__VA_ARGS__)

◆ vfwcvt_f_f_v_f32m2

#define vfwcvt_f_f_v_f32m2 ( ... ) __riscv_vfwcvt_f_f_v_f32m2(__VA_ARGS__)

◆ vfwcvt_f_f_v_f32m2_m

#define vfwcvt_f_f_v_f32m2_m ( ... ) __riscv_vfwcvt_f_f_v_f32m2_tumu(__VA_ARGS__)

◆ vfwcvt_f_f_v_f32m4

#define vfwcvt_f_f_v_f32m4 ( ... ) __riscv_vfwcvt_f_f_v_f32m4(__VA_ARGS__)

◆ vfwcvt_f_f_v_f32m4_m

#define vfwcvt_f_f_v_f32m4_m ( ... ) __riscv_vfwcvt_f_f_v_f32m4_tumu(__VA_ARGS__)

◆ vfwcvt_f_f_v_f32m8

#define vfwcvt_f_f_v_f32m8 ( ... ) __riscv_vfwcvt_f_f_v_f32m8(__VA_ARGS__)

◆ vfwcvt_f_f_v_f32m8_m

#define vfwcvt_f_f_v_f32m8_m ( ... ) __riscv_vfwcvt_f_f_v_f32m8_tumu(__VA_ARGS__)

◆ vfwcvt_f_f_v_f32mf2

#define vfwcvt_f_f_v_f32mf2 ( ... ) __riscv_vfwcvt_f_f_v_f32mf2(__VA_ARGS__)

◆ vfwcvt_f_f_v_f32mf2_m

#define vfwcvt_f_f_v_f32mf2_m ( ... ) __riscv_vfwcvt_f_f_v_f32mf2_tumu(__VA_ARGS__)

◆ vfwcvt_f_f_v_f64m1

#define vfwcvt_f_f_v_f64m1 ( ... ) __riscv_vfwcvt_f_f_v_f64m1(__VA_ARGS__)

◆ vfwcvt_f_f_v_f64m1_m

#define vfwcvt_f_f_v_f64m1_m ( ... ) __riscv_vfwcvt_f_f_v_f64m1_tumu(__VA_ARGS__)

◆ vfwcvt_f_f_v_f64m2

#define vfwcvt_f_f_v_f64m2 ( ... ) __riscv_vfwcvt_f_f_v_f64m2(__VA_ARGS__)

◆ vfwcvt_f_f_v_f64m2_m

#define vfwcvt_f_f_v_f64m2_m ( ... ) __riscv_vfwcvt_f_f_v_f64m2_tumu(__VA_ARGS__)

◆ vfwcvt_f_f_v_f64m4

#define vfwcvt_f_f_v_f64m4 ( ... ) __riscv_vfwcvt_f_f_v_f64m4(__VA_ARGS__)

◆ vfwcvt_f_f_v_f64m4_m

#define vfwcvt_f_f_v_f64m4_m ( ... ) __riscv_vfwcvt_f_f_v_f64m4_tumu(__VA_ARGS__)

◆ vfwcvt_f_f_v_f64m8

#define vfwcvt_f_f_v_f64m8 ( ... ) __riscv_vfwcvt_f_f_v_f64m8(__VA_ARGS__)

◆ vfwcvt_f_f_v_f64m8_m

#define vfwcvt_f_f_v_f64m8_m ( ... ) __riscv_vfwcvt_f_f_v_f64m8_tumu(__VA_ARGS__)

◆ vfwcvt_f_x_v_f16m1

#define vfwcvt_f_x_v_f16m1 ( ... ) __riscv_vfwcvt_f_x_v_f16m1(__VA_ARGS__)

◆ vfwcvt_f_x_v_f16m1_m

#define vfwcvt_f_x_v_f16m1_m ( ... ) __riscv_vfwcvt_f_x_v_f16m1_tumu(__VA_ARGS__)

◆ vfwcvt_f_x_v_f16m2

#define vfwcvt_f_x_v_f16m2 ( ... ) __riscv_vfwcvt_f_x_v_f16m2(__VA_ARGS__)

◆ vfwcvt_f_x_v_f16m2_m

#define vfwcvt_f_x_v_f16m2_m ( ... ) __riscv_vfwcvt_f_x_v_f16m2_tumu(__VA_ARGS__)

◆ vfwcvt_f_x_v_f16m4

#define vfwcvt_f_x_v_f16m4 ( ... ) __riscv_vfwcvt_f_x_v_f16m4(__VA_ARGS__)

◆ vfwcvt_f_x_v_f16m4_m

#define vfwcvt_f_x_v_f16m4_m ( ... ) __riscv_vfwcvt_f_x_v_f16m4_tumu(__VA_ARGS__)

◆ vfwcvt_f_x_v_f16m8

#define vfwcvt_f_x_v_f16m8 ( ... ) __riscv_vfwcvt_f_x_v_f16m8(__VA_ARGS__)

◆ vfwcvt_f_x_v_f16m8_m

#define vfwcvt_f_x_v_f16m8_m ( ... ) __riscv_vfwcvt_f_x_v_f16m8_tumu(__VA_ARGS__)

◆ vfwcvt_f_x_v_f16mf2

#define vfwcvt_f_x_v_f16mf2 ( ... ) __riscv_vfwcvt_f_x_v_f16mf2(__VA_ARGS__)

◆ vfwcvt_f_x_v_f16mf2_m

#define vfwcvt_f_x_v_f16mf2_m ( ... ) __riscv_vfwcvt_f_x_v_f16mf2_tumu(__VA_ARGS__)

◆ vfwcvt_f_x_v_f16mf4

#define vfwcvt_f_x_v_f16mf4 ( ... ) __riscv_vfwcvt_f_x_v_f16mf4(__VA_ARGS__)

◆ vfwcvt_f_x_v_f16mf4_m

#define vfwcvt_f_x_v_f16mf4_m ( ... ) __riscv_vfwcvt_f_x_v_f16mf4_tumu(__VA_ARGS__)

◆ vfwcvt_f_x_v_f32m1

#define vfwcvt_f_x_v_f32m1 ( ... ) __riscv_vfwcvt_f_x_v_f32m1(__VA_ARGS__)

◆ vfwcvt_f_x_v_f32m1_m

#define vfwcvt_f_x_v_f32m1_m ( ... ) __riscv_vfwcvt_f_x_v_f32m1_tumu(__VA_ARGS__)

◆ vfwcvt_f_x_v_f32m2

#define vfwcvt_f_x_v_f32m2 ( ... ) __riscv_vfwcvt_f_x_v_f32m2(__VA_ARGS__)

◆ vfwcvt_f_x_v_f32m2_m

#define vfwcvt_f_x_v_f32m2_m ( ... ) __riscv_vfwcvt_f_x_v_f32m2_tumu(__VA_ARGS__)

◆ vfwcvt_f_x_v_f32m4

#define vfwcvt_f_x_v_f32m4 ( ... ) __riscv_vfwcvt_f_x_v_f32m4(__VA_ARGS__)

◆ vfwcvt_f_x_v_f32m4_m

#define vfwcvt_f_x_v_f32m4_m ( ... ) __riscv_vfwcvt_f_x_v_f32m4_tumu(__VA_ARGS__)

◆ vfwcvt_f_x_v_f32m8

#define vfwcvt_f_x_v_f32m8 ( ... ) __riscv_vfwcvt_f_x_v_f32m8(__VA_ARGS__)

◆ vfwcvt_f_x_v_f32m8_m

#define vfwcvt_f_x_v_f32m8_m ( ... ) __riscv_vfwcvt_f_x_v_f32m8_tumu(__VA_ARGS__)

◆ vfwcvt_f_x_v_f32mf2

#define vfwcvt_f_x_v_f32mf2 ( ... ) __riscv_vfwcvt_f_x_v_f32mf2(__VA_ARGS__)

◆ vfwcvt_f_x_v_f32mf2_m

#define vfwcvt_f_x_v_f32mf2_m ( ... ) __riscv_vfwcvt_f_x_v_f32mf2_tumu(__VA_ARGS__)

◆ vfwcvt_f_x_v_f64m1

#define vfwcvt_f_x_v_f64m1 ( ... ) __riscv_vfwcvt_f_x_v_f64m1(__VA_ARGS__)

◆ vfwcvt_f_x_v_f64m1_m

#define vfwcvt_f_x_v_f64m1_m ( ... ) __riscv_vfwcvt_f_x_v_f64m1_tumu(__VA_ARGS__)

◆ vfwcvt_f_x_v_f64m2

#define vfwcvt_f_x_v_f64m2 ( ... ) __riscv_vfwcvt_f_x_v_f64m2(__VA_ARGS__)

◆ vfwcvt_f_x_v_f64m2_m

#define vfwcvt_f_x_v_f64m2_m ( ... ) __riscv_vfwcvt_f_x_v_f64m2_tumu(__VA_ARGS__)

◆ vfwcvt_f_x_v_f64m4

#define vfwcvt_f_x_v_f64m4 ( ... ) __riscv_vfwcvt_f_x_v_f64m4(__VA_ARGS__)

◆ vfwcvt_f_x_v_f64m4_m

#define vfwcvt_f_x_v_f64m4_m ( ... ) __riscv_vfwcvt_f_x_v_f64m4_tumu(__VA_ARGS__)

◆ vfwcvt_f_x_v_f64m8

#define vfwcvt_f_x_v_f64m8 ( ... ) __riscv_vfwcvt_f_x_v_f64m8(__VA_ARGS__)

◆ vfwcvt_f_x_v_f64m8_m

#define vfwcvt_f_x_v_f64m8_m ( ... ) __riscv_vfwcvt_f_x_v_f64m8_tumu(__VA_ARGS__)

◆ vfwcvt_f_xu_v_f16m1

#define vfwcvt_f_xu_v_f16m1 ( ... ) __riscv_vfwcvt_f_xu_v_f16m1(__VA_ARGS__)

◆ vfwcvt_f_xu_v_f16m1_m

#define vfwcvt_f_xu_v_f16m1_m ( ... ) __riscv_vfwcvt_f_xu_v_f16m1_tumu(__VA_ARGS__)

◆ vfwcvt_f_xu_v_f16m2

#define vfwcvt_f_xu_v_f16m2 ( ... ) __riscv_vfwcvt_f_xu_v_f16m2(__VA_ARGS__)

◆ vfwcvt_f_xu_v_f16m2_m

#define vfwcvt_f_xu_v_f16m2_m ( ... ) __riscv_vfwcvt_f_xu_v_f16m2_tumu(__VA_ARGS__)

◆ vfwcvt_f_xu_v_f16m4

#define vfwcvt_f_xu_v_f16m4 ( ... ) __riscv_vfwcvt_f_xu_v_f16m4(__VA_ARGS__)

◆ vfwcvt_f_xu_v_f16m4_m

#define vfwcvt_f_xu_v_f16m4_m ( ... ) __riscv_vfwcvt_f_xu_v_f16m4_tumu(__VA_ARGS__)

◆ vfwcvt_f_xu_v_f16m8

#define vfwcvt_f_xu_v_f16m8 ( ... ) __riscv_vfwcvt_f_xu_v_f16m8(__VA_ARGS__)

◆ vfwcvt_f_xu_v_f16m8_m

#define vfwcvt_f_xu_v_f16m8_m ( ... ) __riscv_vfwcvt_f_xu_v_f16m8_tumu(__VA_ARGS__)

◆ vfwcvt_f_xu_v_f16mf2

#define vfwcvt_f_xu_v_f16mf2 ( ... ) __riscv_vfwcvt_f_xu_v_f16mf2(__VA_ARGS__)

◆ vfwcvt_f_xu_v_f16mf2_m

#define vfwcvt_f_xu_v_f16mf2_m ( ... ) __riscv_vfwcvt_f_xu_v_f16mf2_tumu(__VA_ARGS__)

◆ vfwcvt_f_xu_v_f16mf4

#define vfwcvt_f_xu_v_f16mf4 ( ... ) __riscv_vfwcvt_f_xu_v_f16mf4(__VA_ARGS__)

◆ vfwcvt_f_xu_v_f16mf4_m

#define vfwcvt_f_xu_v_f16mf4_m ( ... ) __riscv_vfwcvt_f_xu_v_f16mf4_tumu(__VA_ARGS__)

◆ vfwcvt_f_xu_v_f32m1

#define vfwcvt_f_xu_v_f32m1 ( ... ) __riscv_vfwcvt_f_xu_v_f32m1(__VA_ARGS__)

◆ vfwcvt_f_xu_v_f32m1_m

#define vfwcvt_f_xu_v_f32m1_m ( ... ) __riscv_vfwcvt_f_xu_v_f32m1_tumu(__VA_ARGS__)

◆ vfwcvt_f_xu_v_f32m2

#define vfwcvt_f_xu_v_f32m2 ( ... ) __riscv_vfwcvt_f_xu_v_f32m2(__VA_ARGS__)

◆ vfwcvt_f_xu_v_f32m2_m

#define vfwcvt_f_xu_v_f32m2_m ( ... ) __riscv_vfwcvt_f_xu_v_f32m2_tumu(__VA_ARGS__)

◆ vfwcvt_f_xu_v_f32m4

#define vfwcvt_f_xu_v_f32m4 ( ... ) __riscv_vfwcvt_f_xu_v_f32m4(__VA_ARGS__)

◆ vfwcvt_f_xu_v_f32m4_m

#define vfwcvt_f_xu_v_f32m4_m ( ... ) __riscv_vfwcvt_f_xu_v_f32m4_tumu(__VA_ARGS__)

◆ vfwcvt_f_xu_v_f32m8

#define vfwcvt_f_xu_v_f32m8 ( ... ) __riscv_vfwcvt_f_xu_v_f32m8(__VA_ARGS__)

◆ vfwcvt_f_xu_v_f32m8_m

#define vfwcvt_f_xu_v_f32m8_m ( ... ) __riscv_vfwcvt_f_xu_v_f32m8_tumu(__VA_ARGS__)

◆ vfwcvt_f_xu_v_f32mf2

#define vfwcvt_f_xu_v_f32mf2 ( ... ) __riscv_vfwcvt_f_xu_v_f32mf2(__VA_ARGS__)

◆ vfwcvt_f_xu_v_f32mf2_m

#define vfwcvt_f_xu_v_f32mf2_m ( ... ) __riscv_vfwcvt_f_xu_v_f32mf2_tumu(__VA_ARGS__)

◆ vfwcvt_f_xu_v_f64m1

#define vfwcvt_f_xu_v_f64m1 ( ... ) __riscv_vfwcvt_f_xu_v_f64m1(__VA_ARGS__)

◆ vfwcvt_f_xu_v_f64m1_m

#define vfwcvt_f_xu_v_f64m1_m ( ... ) __riscv_vfwcvt_f_xu_v_f64m1_tumu(__VA_ARGS__)

◆ vfwcvt_f_xu_v_f64m2

#define vfwcvt_f_xu_v_f64m2 ( ... ) __riscv_vfwcvt_f_xu_v_f64m2(__VA_ARGS__)

◆ vfwcvt_f_xu_v_f64m2_m

#define vfwcvt_f_xu_v_f64m2_m ( ... ) __riscv_vfwcvt_f_xu_v_f64m2_tumu(__VA_ARGS__)

◆ vfwcvt_f_xu_v_f64m4

#define vfwcvt_f_xu_v_f64m4 ( ... ) __riscv_vfwcvt_f_xu_v_f64m4(__VA_ARGS__)

◆ vfwcvt_f_xu_v_f64m4_m

#define vfwcvt_f_xu_v_f64m4_m ( ... ) __riscv_vfwcvt_f_xu_v_f64m4_tumu(__VA_ARGS__)

◆ vfwcvt_f_xu_v_f64m8

#define vfwcvt_f_xu_v_f64m8 ( ... ) __riscv_vfwcvt_f_xu_v_f64m8(__VA_ARGS__)

◆ vfwcvt_f_xu_v_f64m8_m

#define vfwcvt_f_xu_v_f64m8_m ( ... ) __riscv_vfwcvt_f_xu_v_f64m8_tumu(__VA_ARGS__)

◆ vfwcvt_rtz_x_f_v_i32m1

#define vfwcvt_rtz_x_f_v_i32m1 ( ... ) __riscv_vfwcvt_rtz_x_f_v_i32m1(__VA_ARGS__)

◆ vfwcvt_rtz_x_f_v_i32m1_m

#define vfwcvt_rtz_x_f_v_i32m1_m ( ... ) __riscv_vfwcvt_rtz_x_f_v_i32m1_tumu(__VA_ARGS__)

◆ vfwcvt_rtz_x_f_v_i32m2

#define vfwcvt_rtz_x_f_v_i32m2 ( ... ) __riscv_vfwcvt_rtz_x_f_v_i32m2(__VA_ARGS__)

◆ vfwcvt_rtz_x_f_v_i32m2_m

#define vfwcvt_rtz_x_f_v_i32m2_m ( ... ) __riscv_vfwcvt_rtz_x_f_v_i32m2_tumu(__VA_ARGS__)

◆ vfwcvt_rtz_x_f_v_i32m4

#define vfwcvt_rtz_x_f_v_i32m4 ( ... ) __riscv_vfwcvt_rtz_x_f_v_i32m4(__VA_ARGS__)

◆ vfwcvt_rtz_x_f_v_i32m4_m

#define vfwcvt_rtz_x_f_v_i32m4_m ( ... ) __riscv_vfwcvt_rtz_x_f_v_i32m4_tumu(__VA_ARGS__)

◆ vfwcvt_rtz_x_f_v_i32m8

#define vfwcvt_rtz_x_f_v_i32m8 ( ... ) __riscv_vfwcvt_rtz_x_f_v_i32m8(__VA_ARGS__)

◆ vfwcvt_rtz_x_f_v_i32m8_m

#define vfwcvt_rtz_x_f_v_i32m8_m ( ... ) __riscv_vfwcvt_rtz_x_f_v_i32m8_tumu(__VA_ARGS__)

◆ vfwcvt_rtz_x_f_v_i32mf2

#define vfwcvt_rtz_x_f_v_i32mf2 ( ... ) __riscv_vfwcvt_rtz_x_f_v_i32mf2(__VA_ARGS__)

◆ vfwcvt_rtz_x_f_v_i32mf2_m

#define vfwcvt_rtz_x_f_v_i32mf2_m ( ... ) __riscv_vfwcvt_rtz_x_f_v_i32mf2_tumu(__VA_ARGS__)

◆ vfwcvt_rtz_x_f_v_i64m1

#define vfwcvt_rtz_x_f_v_i64m1 ( ... ) __riscv_vfwcvt_rtz_x_f_v_i64m1(__VA_ARGS__)

◆ vfwcvt_rtz_x_f_v_i64m1_m

#define vfwcvt_rtz_x_f_v_i64m1_m ( ... ) __riscv_vfwcvt_rtz_x_f_v_i64m1_tumu(__VA_ARGS__)

◆ vfwcvt_rtz_x_f_v_i64m2

#define vfwcvt_rtz_x_f_v_i64m2 ( ... ) __riscv_vfwcvt_rtz_x_f_v_i64m2(__VA_ARGS__)

◆ vfwcvt_rtz_x_f_v_i64m2_m

#define vfwcvt_rtz_x_f_v_i64m2_m ( ... ) __riscv_vfwcvt_rtz_x_f_v_i64m2_tumu(__VA_ARGS__)

◆ vfwcvt_rtz_x_f_v_i64m4

#define vfwcvt_rtz_x_f_v_i64m4 ( ... ) __riscv_vfwcvt_rtz_x_f_v_i64m4(__VA_ARGS__)

◆ vfwcvt_rtz_x_f_v_i64m4_m

#define vfwcvt_rtz_x_f_v_i64m4_m ( ... ) __riscv_vfwcvt_rtz_x_f_v_i64m4_tumu(__VA_ARGS__)

◆ vfwcvt_rtz_x_f_v_i64m8

#define vfwcvt_rtz_x_f_v_i64m8 ( ... ) __riscv_vfwcvt_rtz_x_f_v_i64m8(__VA_ARGS__)

◆ vfwcvt_rtz_x_f_v_i64m8_m

#define vfwcvt_rtz_x_f_v_i64m8_m ( ... ) __riscv_vfwcvt_rtz_x_f_v_i64m8_tumu(__VA_ARGS__)

◆ vfwcvt_rtz_xu_f_v_u32m1

#define vfwcvt_rtz_xu_f_v_u32m1 ( ... ) __riscv_vfwcvt_rtz_xu_f_v_u32m1(__VA_ARGS__)

◆ vfwcvt_rtz_xu_f_v_u32m1_m

#define vfwcvt_rtz_xu_f_v_u32m1_m ( ... ) __riscv_vfwcvt_rtz_xu_f_v_u32m1_tumu(__VA_ARGS__)

◆ vfwcvt_rtz_xu_f_v_u32m2

#define vfwcvt_rtz_xu_f_v_u32m2 ( ... ) __riscv_vfwcvt_rtz_xu_f_v_u32m2(__VA_ARGS__)

◆ vfwcvt_rtz_xu_f_v_u32m2_m

#define vfwcvt_rtz_xu_f_v_u32m2_m ( ... ) __riscv_vfwcvt_rtz_xu_f_v_u32m2_tumu(__VA_ARGS__)

◆ vfwcvt_rtz_xu_f_v_u32m4

#define vfwcvt_rtz_xu_f_v_u32m4 ( ... ) __riscv_vfwcvt_rtz_xu_f_v_u32m4(__VA_ARGS__)

◆ vfwcvt_rtz_xu_f_v_u32m4_m

#define vfwcvt_rtz_xu_f_v_u32m4_m ( ... ) __riscv_vfwcvt_rtz_xu_f_v_u32m4_tumu(__VA_ARGS__)

◆ vfwcvt_rtz_xu_f_v_u32m8

#define vfwcvt_rtz_xu_f_v_u32m8 ( ... ) __riscv_vfwcvt_rtz_xu_f_v_u32m8(__VA_ARGS__)

◆ vfwcvt_rtz_xu_f_v_u32m8_m

#define vfwcvt_rtz_xu_f_v_u32m8_m ( ... ) __riscv_vfwcvt_rtz_xu_f_v_u32m8_tumu(__VA_ARGS__)

◆ vfwcvt_rtz_xu_f_v_u32mf2

#define vfwcvt_rtz_xu_f_v_u32mf2 ( ... ) __riscv_vfwcvt_rtz_xu_f_v_u32mf2(__VA_ARGS__)

◆ vfwcvt_rtz_xu_f_v_u32mf2_m

#define vfwcvt_rtz_xu_f_v_u32mf2_m ( ... ) __riscv_vfwcvt_rtz_xu_f_v_u32mf2_tumu(__VA_ARGS__)

◆ vfwcvt_rtz_xu_f_v_u64m1

#define vfwcvt_rtz_xu_f_v_u64m1 ( ... ) __riscv_vfwcvt_rtz_xu_f_v_u64m1(__VA_ARGS__)

◆ vfwcvt_rtz_xu_f_v_u64m1_m

#define vfwcvt_rtz_xu_f_v_u64m1_m ( ... ) __riscv_vfwcvt_rtz_xu_f_v_u64m1_tumu(__VA_ARGS__)

◆ vfwcvt_rtz_xu_f_v_u64m2

#define vfwcvt_rtz_xu_f_v_u64m2 ( ... ) __riscv_vfwcvt_rtz_xu_f_v_u64m2(__VA_ARGS__)

◆ vfwcvt_rtz_xu_f_v_u64m2_m

#define vfwcvt_rtz_xu_f_v_u64m2_m ( ... ) __riscv_vfwcvt_rtz_xu_f_v_u64m2_tumu(__VA_ARGS__)

◆ vfwcvt_rtz_xu_f_v_u64m4

#define vfwcvt_rtz_xu_f_v_u64m4 ( ... ) __riscv_vfwcvt_rtz_xu_f_v_u64m4(__VA_ARGS__)

◆ vfwcvt_rtz_xu_f_v_u64m4_m

#define vfwcvt_rtz_xu_f_v_u64m4_m ( ... ) __riscv_vfwcvt_rtz_xu_f_v_u64m4_tumu(__VA_ARGS__)

◆ vfwcvt_rtz_xu_f_v_u64m8

#define vfwcvt_rtz_xu_f_v_u64m8 ( ... ) __riscv_vfwcvt_rtz_xu_f_v_u64m8(__VA_ARGS__)

◆ vfwcvt_rtz_xu_f_v_u64m8_m

#define vfwcvt_rtz_xu_f_v_u64m8_m ( ... ) __riscv_vfwcvt_rtz_xu_f_v_u64m8_tumu(__VA_ARGS__)

◆ vfwcvt_x_f_v_i32m1

#define vfwcvt_x_f_v_i32m1 ( ... ) __riscv_vfwcvt_x_f_v_i32m1(__VA_ARGS__)

◆ vfwcvt_x_f_v_i32m1_m

#define vfwcvt_x_f_v_i32m1_m ( ... ) __riscv_vfwcvt_x_f_v_i32m1_tumu(__VA_ARGS__)

◆ vfwcvt_x_f_v_i32m2

#define vfwcvt_x_f_v_i32m2 ( ... ) __riscv_vfwcvt_x_f_v_i32m2(__VA_ARGS__)

◆ vfwcvt_x_f_v_i32m2_m

#define vfwcvt_x_f_v_i32m2_m ( ... ) __riscv_vfwcvt_x_f_v_i32m2_tumu(__VA_ARGS__)

◆ vfwcvt_x_f_v_i32m4

#define vfwcvt_x_f_v_i32m4 ( ... ) __riscv_vfwcvt_x_f_v_i32m4(__VA_ARGS__)

◆ vfwcvt_x_f_v_i32m4_m

#define vfwcvt_x_f_v_i32m4_m ( ... ) __riscv_vfwcvt_x_f_v_i32m4_tumu(__VA_ARGS__)

◆ vfwcvt_x_f_v_i32m8

#define vfwcvt_x_f_v_i32m8 ( ... ) __riscv_vfwcvt_x_f_v_i32m8(__VA_ARGS__)

◆ vfwcvt_x_f_v_i32m8_m

#define vfwcvt_x_f_v_i32m8_m ( ... ) __riscv_vfwcvt_x_f_v_i32m8_tumu(__VA_ARGS__)

◆ vfwcvt_x_f_v_i32mf2

#define vfwcvt_x_f_v_i32mf2 ( ... ) __riscv_vfwcvt_x_f_v_i32mf2(__VA_ARGS__)

◆ vfwcvt_x_f_v_i32mf2_m

#define vfwcvt_x_f_v_i32mf2_m ( ... ) __riscv_vfwcvt_x_f_v_i32mf2_tumu(__VA_ARGS__)

◆ vfwcvt_x_f_v_i64m1

#define vfwcvt_x_f_v_i64m1 ( ... ) __riscv_vfwcvt_x_f_v_i64m1(__VA_ARGS__)

◆ vfwcvt_x_f_v_i64m1_m

#define vfwcvt_x_f_v_i64m1_m ( ... ) __riscv_vfwcvt_x_f_v_i64m1_tumu(__VA_ARGS__)

◆ vfwcvt_x_f_v_i64m2

#define vfwcvt_x_f_v_i64m2 ( ... ) __riscv_vfwcvt_x_f_v_i64m2(__VA_ARGS__)

◆ vfwcvt_x_f_v_i64m2_m

#define vfwcvt_x_f_v_i64m2_m ( ... ) __riscv_vfwcvt_x_f_v_i64m2_tumu(__VA_ARGS__)

◆ vfwcvt_x_f_v_i64m4

#define vfwcvt_x_f_v_i64m4 ( ... ) __riscv_vfwcvt_x_f_v_i64m4(__VA_ARGS__)

◆ vfwcvt_x_f_v_i64m4_m

#define vfwcvt_x_f_v_i64m4_m ( ... ) __riscv_vfwcvt_x_f_v_i64m4_tumu(__VA_ARGS__)

◆ vfwcvt_x_f_v_i64m8

#define vfwcvt_x_f_v_i64m8 ( ... ) __riscv_vfwcvt_x_f_v_i64m8(__VA_ARGS__)

◆ vfwcvt_x_f_v_i64m8_m

#define vfwcvt_x_f_v_i64m8_m ( ... ) __riscv_vfwcvt_x_f_v_i64m8_tumu(__VA_ARGS__)

◆ vfwcvt_xu_f_v_u32m1

#define vfwcvt_xu_f_v_u32m1 ( ... ) __riscv_vfwcvt_xu_f_v_u32m1(__VA_ARGS__)

◆ vfwcvt_xu_f_v_u32m1_m

#define vfwcvt_xu_f_v_u32m1_m ( ... ) __riscv_vfwcvt_xu_f_v_u32m1_tumu(__VA_ARGS__)

◆ vfwcvt_xu_f_v_u32m2

#define vfwcvt_xu_f_v_u32m2 ( ... ) __riscv_vfwcvt_xu_f_v_u32m2(__VA_ARGS__)

◆ vfwcvt_xu_f_v_u32m2_m

#define vfwcvt_xu_f_v_u32m2_m ( ... ) __riscv_vfwcvt_xu_f_v_u32m2_tumu(__VA_ARGS__)

◆ vfwcvt_xu_f_v_u32m4

#define vfwcvt_xu_f_v_u32m4 ( ... ) __riscv_vfwcvt_xu_f_v_u32m4(__VA_ARGS__)

◆ vfwcvt_xu_f_v_u32m4_m

#define vfwcvt_xu_f_v_u32m4_m ( ... ) __riscv_vfwcvt_xu_f_v_u32m4_tumu(__VA_ARGS__)

◆ vfwcvt_xu_f_v_u32m8

#define vfwcvt_xu_f_v_u32m8 ( ... ) __riscv_vfwcvt_xu_f_v_u32m8(__VA_ARGS__)

◆ vfwcvt_xu_f_v_u32m8_m

#define vfwcvt_xu_f_v_u32m8_m ( ... ) __riscv_vfwcvt_xu_f_v_u32m8_tumu(__VA_ARGS__)

◆ vfwcvt_xu_f_v_u32mf2

#define vfwcvt_xu_f_v_u32mf2 ( ... ) __riscv_vfwcvt_xu_f_v_u32mf2(__VA_ARGS__)

◆ vfwcvt_xu_f_v_u32mf2_m

#define vfwcvt_xu_f_v_u32mf2_m ( ... ) __riscv_vfwcvt_xu_f_v_u32mf2_tumu(__VA_ARGS__)

◆ vfwcvt_xu_f_v_u64m1

#define vfwcvt_xu_f_v_u64m1 ( ... ) __riscv_vfwcvt_xu_f_v_u64m1(__VA_ARGS__)

◆ vfwcvt_xu_f_v_u64m1_m

#define vfwcvt_xu_f_v_u64m1_m ( ... ) __riscv_vfwcvt_xu_f_v_u64m1_tumu(__VA_ARGS__)

◆ vfwcvt_xu_f_v_u64m2

#define vfwcvt_xu_f_v_u64m2 ( ... ) __riscv_vfwcvt_xu_f_v_u64m2(__VA_ARGS__)

◆ vfwcvt_xu_f_v_u64m2_m

#define vfwcvt_xu_f_v_u64m2_m ( ... ) __riscv_vfwcvt_xu_f_v_u64m2_tumu(__VA_ARGS__)

◆ vfwcvt_xu_f_v_u64m4

#define vfwcvt_xu_f_v_u64m4 ( ... ) __riscv_vfwcvt_xu_f_v_u64m4(__VA_ARGS__)

◆ vfwcvt_xu_f_v_u64m4_m

#define vfwcvt_xu_f_v_u64m4_m ( ... ) __riscv_vfwcvt_xu_f_v_u64m4_tumu(__VA_ARGS__)

◆ vfwcvt_xu_f_v_u64m8

#define vfwcvt_xu_f_v_u64m8 ( ... ) __riscv_vfwcvt_xu_f_v_u64m8(__VA_ARGS__)

◆ vfwcvt_xu_f_v_u64m8_m

#define vfwcvt_xu_f_v_u64m8_m ( ... ) __riscv_vfwcvt_xu_f_v_u64m8_tumu(__VA_ARGS__)

◆ vfwmacc_vf_f32m1

#define vfwmacc_vf_f32m1 ( ... ) __riscv_vfwmacc_vf_f32m1_tu(__VA_ARGS__)

◆ vfwmacc_vf_f32m1_m

#define vfwmacc_vf_f32m1_m ( ... ) __riscv_vfwmacc_vf_f32m1_tumu(__VA_ARGS__)

◆ vfwmacc_vf_f32m2

#define vfwmacc_vf_f32m2 ( ... ) __riscv_vfwmacc_vf_f32m2_tu(__VA_ARGS__)

◆ vfwmacc_vf_f32m2_m

#define vfwmacc_vf_f32m2_m ( ... ) __riscv_vfwmacc_vf_f32m2_tumu(__VA_ARGS__)

◆ vfwmacc_vf_f32m4

#define vfwmacc_vf_f32m4 ( ... ) __riscv_vfwmacc_vf_f32m4_tu(__VA_ARGS__)

◆ vfwmacc_vf_f32m4_m

#define vfwmacc_vf_f32m4_m ( ... ) __riscv_vfwmacc_vf_f32m4_tumu(__VA_ARGS__)

◆ vfwmacc_vf_f32m8

#define vfwmacc_vf_f32m8 ( ... ) __riscv_vfwmacc_vf_f32m8_tu(__VA_ARGS__)

◆ vfwmacc_vf_f32m8_m

#define vfwmacc_vf_f32m8_m ( ... ) __riscv_vfwmacc_vf_f32m8_tumu(__VA_ARGS__)

◆ vfwmacc_vf_f32mf2

#define vfwmacc_vf_f32mf2 ( ... ) __riscv_vfwmacc_vf_f32mf2_tu(__VA_ARGS__)

◆ vfwmacc_vf_f32mf2_m

#define vfwmacc_vf_f32mf2_m ( ... ) __riscv_vfwmacc_vf_f32mf2_tumu(__VA_ARGS__)

◆ vfwmacc_vf_f64m1

#define vfwmacc_vf_f64m1 ( ... ) __riscv_vfwmacc_vf_f64m1_tu(__VA_ARGS__)

◆ vfwmacc_vf_f64m1_m

#define vfwmacc_vf_f64m1_m ( ... ) __riscv_vfwmacc_vf_f64m1_tumu(__VA_ARGS__)

◆ vfwmacc_vf_f64m2

#define vfwmacc_vf_f64m2 ( ... ) __riscv_vfwmacc_vf_f64m2_tu(__VA_ARGS__)

◆ vfwmacc_vf_f64m2_m

#define vfwmacc_vf_f64m2_m ( ... ) __riscv_vfwmacc_vf_f64m2_tumu(__VA_ARGS__)

◆ vfwmacc_vf_f64m4

#define vfwmacc_vf_f64m4 ( ... ) __riscv_vfwmacc_vf_f64m4_tu(__VA_ARGS__)

◆ vfwmacc_vf_f64m4_m

#define vfwmacc_vf_f64m4_m ( ... ) __riscv_vfwmacc_vf_f64m4_tumu(__VA_ARGS__)

◆ vfwmacc_vf_f64m8

#define vfwmacc_vf_f64m8 ( ... ) __riscv_vfwmacc_vf_f64m8_tu(__VA_ARGS__)

◆ vfwmacc_vf_f64m8_m

#define vfwmacc_vf_f64m8_m ( ... ) __riscv_vfwmacc_vf_f64m8_tumu(__VA_ARGS__)

◆ vfwmacc_vv_f32m1

#define vfwmacc_vv_f32m1 ( ... ) __riscv_vfwmacc_vv_f32m1_tu(__VA_ARGS__)

◆ vfwmacc_vv_f32m1_m

#define vfwmacc_vv_f32m1_m ( ... ) __riscv_vfwmacc_vv_f32m1_tumu(__VA_ARGS__)

◆ vfwmacc_vv_f32m2

#define vfwmacc_vv_f32m2 ( ... ) __riscv_vfwmacc_vv_f32m2_tu(__VA_ARGS__)

◆ vfwmacc_vv_f32m2_m

#define vfwmacc_vv_f32m2_m ( ... ) __riscv_vfwmacc_vv_f32m2_tumu(__VA_ARGS__)

◆ vfwmacc_vv_f32m4

#define vfwmacc_vv_f32m4 ( ... ) __riscv_vfwmacc_vv_f32m4_tu(__VA_ARGS__)

◆ vfwmacc_vv_f32m4_m

#define vfwmacc_vv_f32m4_m ( ... ) __riscv_vfwmacc_vv_f32m4_tumu(__VA_ARGS__)

◆ vfwmacc_vv_f32m8

#define vfwmacc_vv_f32m8 ( ... ) __riscv_vfwmacc_vv_f32m8_tu(__VA_ARGS__)

◆ vfwmacc_vv_f32m8_m

#define vfwmacc_vv_f32m8_m ( ... ) __riscv_vfwmacc_vv_f32m8_tumu(__VA_ARGS__)

◆ vfwmacc_vv_f32mf2

#define vfwmacc_vv_f32mf2 ( ... ) __riscv_vfwmacc_vv_f32mf2_tu(__VA_ARGS__)

◆ vfwmacc_vv_f32mf2_m

#define vfwmacc_vv_f32mf2_m ( ... ) __riscv_vfwmacc_vv_f32mf2_tumu(__VA_ARGS__)

◆ vfwmacc_vv_f64m1

#define vfwmacc_vv_f64m1 ( ... ) __riscv_vfwmacc_vv_f64m1_tu(__VA_ARGS__)

◆ vfwmacc_vv_f64m1_m

#define vfwmacc_vv_f64m1_m ( ... ) __riscv_vfwmacc_vv_f64m1_tumu(__VA_ARGS__)

◆ vfwmacc_vv_f64m2

#define vfwmacc_vv_f64m2 ( ... ) __riscv_vfwmacc_vv_f64m2_tu(__VA_ARGS__)

◆ vfwmacc_vv_f64m2_m

#define vfwmacc_vv_f64m2_m ( ... ) __riscv_vfwmacc_vv_f64m2_tumu(__VA_ARGS__)

◆ vfwmacc_vv_f64m4

#define vfwmacc_vv_f64m4 ( ... ) __riscv_vfwmacc_vv_f64m4_tu(__VA_ARGS__)

◆ vfwmacc_vv_f64m4_m

#define vfwmacc_vv_f64m4_m ( ... ) __riscv_vfwmacc_vv_f64m4_tumu(__VA_ARGS__)

◆ vfwmacc_vv_f64m8

#define vfwmacc_vv_f64m8 ( ... ) __riscv_vfwmacc_vv_f64m8_tu(__VA_ARGS__)

◆ vfwmacc_vv_f64m8_m

#define vfwmacc_vv_f64m8_m ( ... ) __riscv_vfwmacc_vv_f64m8_tumu(__VA_ARGS__)

◆ vfwmsac_vf_f32m1

#define vfwmsac_vf_f32m1 ( ... ) __riscv_vfwmsac_vf_f32m1_tu(__VA_ARGS__)

◆ vfwmsac_vf_f32m1_m

#define vfwmsac_vf_f32m1_m ( ... ) __riscv_vfwmsac_vf_f32m1_tumu(__VA_ARGS__)

◆ vfwmsac_vf_f32m2

#define vfwmsac_vf_f32m2 ( ... ) __riscv_vfwmsac_vf_f32m2_tu(__VA_ARGS__)

◆ vfwmsac_vf_f32m2_m

#define vfwmsac_vf_f32m2_m ( ... ) __riscv_vfwmsac_vf_f32m2_tumu(__VA_ARGS__)

◆ vfwmsac_vf_f32m4

#define vfwmsac_vf_f32m4 ( ... ) __riscv_vfwmsac_vf_f32m4_tu(__VA_ARGS__)

◆ vfwmsac_vf_f32m4_m

#define vfwmsac_vf_f32m4_m ( ... ) __riscv_vfwmsac_vf_f32m4_tumu(__VA_ARGS__)

◆ vfwmsac_vf_f32m8

#define vfwmsac_vf_f32m8 ( ... ) __riscv_vfwmsac_vf_f32m8_tu(__VA_ARGS__)

◆ vfwmsac_vf_f32m8_m

#define vfwmsac_vf_f32m8_m ( ... ) __riscv_vfwmsac_vf_f32m8_tumu(__VA_ARGS__)

◆ vfwmsac_vf_f32mf2

#define vfwmsac_vf_f32mf2 ( ... ) __riscv_vfwmsac_vf_f32mf2_tu(__VA_ARGS__)

◆ vfwmsac_vf_f32mf2_m

#define vfwmsac_vf_f32mf2_m ( ... ) __riscv_vfwmsac_vf_f32mf2_tumu(__VA_ARGS__)

◆ vfwmsac_vf_f64m1

#define vfwmsac_vf_f64m1 ( ... ) __riscv_vfwmsac_vf_f64m1_tu(__VA_ARGS__)

◆ vfwmsac_vf_f64m1_m

#define vfwmsac_vf_f64m1_m ( ... ) __riscv_vfwmsac_vf_f64m1_tumu(__VA_ARGS__)

◆ vfwmsac_vf_f64m2

#define vfwmsac_vf_f64m2 ( ... ) __riscv_vfwmsac_vf_f64m2_tu(__VA_ARGS__)

◆ vfwmsac_vf_f64m2_m

#define vfwmsac_vf_f64m2_m ( ... ) __riscv_vfwmsac_vf_f64m2_tumu(__VA_ARGS__)

◆ vfwmsac_vf_f64m4

#define vfwmsac_vf_f64m4 ( ... ) __riscv_vfwmsac_vf_f64m4_tu(__VA_ARGS__)

◆ vfwmsac_vf_f64m4_m

#define vfwmsac_vf_f64m4_m ( ... ) __riscv_vfwmsac_vf_f64m4_tumu(__VA_ARGS__)

◆ vfwmsac_vf_f64m8

#define vfwmsac_vf_f64m8 ( ... ) __riscv_vfwmsac_vf_f64m8_tu(__VA_ARGS__)

◆ vfwmsac_vf_f64m8_m

#define vfwmsac_vf_f64m8_m ( ... ) __riscv_vfwmsac_vf_f64m8_tumu(__VA_ARGS__)

◆ vfwmsac_vv_f32m1

#define vfwmsac_vv_f32m1 ( ... ) __riscv_vfwmsac_vv_f32m1_tu(__VA_ARGS__)

◆ vfwmsac_vv_f32m1_m

#define vfwmsac_vv_f32m1_m ( ... ) __riscv_vfwmsac_vv_f32m1_tumu(__VA_ARGS__)

◆ vfwmsac_vv_f32m2

#define vfwmsac_vv_f32m2 ( ... ) __riscv_vfwmsac_vv_f32m2_tu(__VA_ARGS__)

◆ vfwmsac_vv_f32m2_m

#define vfwmsac_vv_f32m2_m ( ... ) __riscv_vfwmsac_vv_f32m2_tumu(__VA_ARGS__)

◆ vfwmsac_vv_f32m4

#define vfwmsac_vv_f32m4 ( ... ) __riscv_vfwmsac_vv_f32m4_tu(__VA_ARGS__)

◆ vfwmsac_vv_f32m4_m

#define vfwmsac_vv_f32m4_m ( ... ) __riscv_vfwmsac_vv_f32m4_tumu(__VA_ARGS__)

◆ vfwmsac_vv_f32m8

#define vfwmsac_vv_f32m8 ( ... ) __riscv_vfwmsac_vv_f32m8_tu(__VA_ARGS__)

◆ vfwmsac_vv_f32m8_m

#define vfwmsac_vv_f32m8_m ( ... ) __riscv_vfwmsac_vv_f32m8_tumu(__VA_ARGS__)

◆ vfwmsac_vv_f32mf2

#define vfwmsac_vv_f32mf2 ( ... ) __riscv_vfwmsac_vv_f32mf2_tu(__VA_ARGS__)

◆ vfwmsac_vv_f32mf2_m

#define vfwmsac_vv_f32mf2_m ( ... ) __riscv_vfwmsac_vv_f32mf2_tumu(__VA_ARGS__)

◆ vfwmsac_vv_f64m1

#define vfwmsac_vv_f64m1 ( ... ) __riscv_vfwmsac_vv_f64m1_tu(__VA_ARGS__)

◆ vfwmsac_vv_f64m1_m

#define vfwmsac_vv_f64m1_m ( ... ) __riscv_vfwmsac_vv_f64m1_tumu(__VA_ARGS__)

◆ vfwmsac_vv_f64m2

#define vfwmsac_vv_f64m2 ( ... ) __riscv_vfwmsac_vv_f64m2_tu(__VA_ARGS__)

◆ vfwmsac_vv_f64m2_m

#define vfwmsac_vv_f64m2_m ( ... ) __riscv_vfwmsac_vv_f64m2_tumu(__VA_ARGS__)

◆ vfwmsac_vv_f64m4

#define vfwmsac_vv_f64m4 ( ... ) __riscv_vfwmsac_vv_f64m4_tu(__VA_ARGS__)

◆ vfwmsac_vv_f64m4_m

#define vfwmsac_vv_f64m4_m ( ... ) __riscv_vfwmsac_vv_f64m4_tumu(__VA_ARGS__)

◆ vfwmsac_vv_f64m8

#define vfwmsac_vv_f64m8 ( ... ) __riscv_vfwmsac_vv_f64m8_tu(__VA_ARGS__)

◆ vfwmsac_vv_f64m8_m

#define vfwmsac_vv_f64m8_m ( ... ) __riscv_vfwmsac_vv_f64m8_tumu(__VA_ARGS__)

◆ vfwmul_vf_f32m1

#define vfwmul_vf_f32m1 ( ... ) __riscv_vfwmul_vf_f32m1(__VA_ARGS__)

◆ vfwmul_vf_f32m1_m

#define vfwmul_vf_f32m1_m ( ... ) __riscv_vfwmul_vf_f32m1_tumu(__VA_ARGS__)

◆ vfwmul_vf_f32m2

#define vfwmul_vf_f32m2 ( ... ) __riscv_vfwmul_vf_f32m2(__VA_ARGS__)

◆ vfwmul_vf_f32m2_m

#define vfwmul_vf_f32m2_m ( ... ) __riscv_vfwmul_vf_f32m2_tumu(__VA_ARGS__)

◆ vfwmul_vf_f32m4

#define vfwmul_vf_f32m4 ( ... ) __riscv_vfwmul_vf_f32m4(__VA_ARGS__)

◆ vfwmul_vf_f32m4_m

#define vfwmul_vf_f32m4_m ( ... ) __riscv_vfwmul_vf_f32m4_tumu(__VA_ARGS__)

◆ vfwmul_vf_f32m8

#define vfwmul_vf_f32m8 ( ... ) __riscv_vfwmul_vf_f32m8(__VA_ARGS__)

◆ vfwmul_vf_f32m8_m

#define vfwmul_vf_f32m8_m ( ... ) __riscv_vfwmul_vf_f32m8_tumu(__VA_ARGS__)

◆ vfwmul_vf_f32mf2

#define vfwmul_vf_f32mf2 ( ... ) __riscv_vfwmul_vf_f32mf2(__VA_ARGS__)

◆ vfwmul_vf_f32mf2_m

#define vfwmul_vf_f32mf2_m ( ... ) __riscv_vfwmul_vf_f32mf2_tumu(__VA_ARGS__)

◆ vfwmul_vf_f64m1

#define vfwmul_vf_f64m1 ( ... ) __riscv_vfwmul_vf_f64m1(__VA_ARGS__)

◆ vfwmul_vf_f64m1_m

#define vfwmul_vf_f64m1_m ( ... ) __riscv_vfwmul_vf_f64m1_tumu(__VA_ARGS__)

◆ vfwmul_vf_f64m2

#define vfwmul_vf_f64m2 ( ... ) __riscv_vfwmul_vf_f64m2(__VA_ARGS__)

◆ vfwmul_vf_f64m2_m

#define vfwmul_vf_f64m2_m ( ... ) __riscv_vfwmul_vf_f64m2_tumu(__VA_ARGS__)

◆ vfwmul_vf_f64m4

#define vfwmul_vf_f64m4 ( ... ) __riscv_vfwmul_vf_f64m4(__VA_ARGS__)

◆ vfwmul_vf_f64m4_m

#define vfwmul_vf_f64m4_m ( ... ) __riscv_vfwmul_vf_f64m4_tumu(__VA_ARGS__)

◆ vfwmul_vf_f64m8

#define vfwmul_vf_f64m8 ( ... ) __riscv_vfwmul_vf_f64m8(__VA_ARGS__)

◆ vfwmul_vf_f64m8_m

#define vfwmul_vf_f64m8_m ( ... ) __riscv_vfwmul_vf_f64m8_tumu(__VA_ARGS__)

◆ vfwmul_vv_f32m1

#define vfwmul_vv_f32m1 ( ... ) __riscv_vfwmul_vv_f32m1(__VA_ARGS__)

◆ vfwmul_vv_f32m1_m

#define vfwmul_vv_f32m1_m ( ... ) __riscv_vfwmul_vv_f32m1_tumu(__VA_ARGS__)

◆ vfwmul_vv_f32m2

#define vfwmul_vv_f32m2 ( ... ) __riscv_vfwmul_vv_f32m2(__VA_ARGS__)

◆ vfwmul_vv_f32m2_m

#define vfwmul_vv_f32m2_m ( ... ) __riscv_vfwmul_vv_f32m2_tumu(__VA_ARGS__)

◆ vfwmul_vv_f32m4

#define vfwmul_vv_f32m4 ( ... ) __riscv_vfwmul_vv_f32m4(__VA_ARGS__)

◆ vfwmul_vv_f32m4_m

#define vfwmul_vv_f32m4_m ( ... ) __riscv_vfwmul_vv_f32m4_tumu(__VA_ARGS__)

◆ vfwmul_vv_f32m8

#define vfwmul_vv_f32m8 ( ... ) __riscv_vfwmul_vv_f32m8(__VA_ARGS__)

◆ vfwmul_vv_f32m8_m

#define vfwmul_vv_f32m8_m ( ... ) __riscv_vfwmul_vv_f32m8_tumu(__VA_ARGS__)

◆ vfwmul_vv_f32mf2

#define vfwmul_vv_f32mf2 ( ... ) __riscv_vfwmul_vv_f32mf2(__VA_ARGS__)

◆ vfwmul_vv_f32mf2_m

#define vfwmul_vv_f32mf2_m ( ... ) __riscv_vfwmul_vv_f32mf2_tumu(__VA_ARGS__)

◆ vfwmul_vv_f64m1

#define vfwmul_vv_f64m1 ( ... ) __riscv_vfwmul_vv_f64m1(__VA_ARGS__)

◆ vfwmul_vv_f64m1_m

#define vfwmul_vv_f64m1_m ( ... ) __riscv_vfwmul_vv_f64m1_tumu(__VA_ARGS__)

◆ vfwmul_vv_f64m2

#define vfwmul_vv_f64m2 ( ... ) __riscv_vfwmul_vv_f64m2(__VA_ARGS__)

◆ vfwmul_vv_f64m2_m

#define vfwmul_vv_f64m2_m ( ... ) __riscv_vfwmul_vv_f64m2_tumu(__VA_ARGS__)

◆ vfwmul_vv_f64m4

#define vfwmul_vv_f64m4 ( ... ) __riscv_vfwmul_vv_f64m4(__VA_ARGS__)

◆ vfwmul_vv_f64m4_m

#define vfwmul_vv_f64m4_m ( ... ) __riscv_vfwmul_vv_f64m4_tumu(__VA_ARGS__)

◆ vfwmul_vv_f64m8

#define vfwmul_vv_f64m8 ( ... ) __riscv_vfwmul_vv_f64m8(__VA_ARGS__)

◆ vfwmul_vv_f64m8_m

#define vfwmul_vv_f64m8_m ( ... ) __riscv_vfwmul_vv_f64m8_tumu(__VA_ARGS__)

◆ vfwnmacc_vf_f32m1

#define vfwnmacc_vf_f32m1 ( ... ) __riscv_vfwnmacc_vf_f32m1_tu(__VA_ARGS__)

◆ vfwnmacc_vf_f32m1_m

#define vfwnmacc_vf_f32m1_m ( ... ) __riscv_vfwnmacc_vf_f32m1_tumu(__VA_ARGS__)

◆ vfwnmacc_vf_f32m2

#define vfwnmacc_vf_f32m2 ( ... ) __riscv_vfwnmacc_vf_f32m2_tu(__VA_ARGS__)

◆ vfwnmacc_vf_f32m2_m

#define vfwnmacc_vf_f32m2_m ( ... ) __riscv_vfwnmacc_vf_f32m2_tumu(__VA_ARGS__)

◆ vfwnmacc_vf_f32m4

#define vfwnmacc_vf_f32m4 ( ... ) __riscv_vfwnmacc_vf_f32m4_tu(__VA_ARGS__)

◆ vfwnmacc_vf_f32m4_m

#define vfwnmacc_vf_f32m4_m ( ... ) __riscv_vfwnmacc_vf_f32m4_tumu(__VA_ARGS__)

◆ vfwnmacc_vf_f32m8

#define vfwnmacc_vf_f32m8 ( ... ) __riscv_vfwnmacc_vf_f32m8_tu(__VA_ARGS__)

◆ vfwnmacc_vf_f32m8_m

#define vfwnmacc_vf_f32m8_m ( ... ) __riscv_vfwnmacc_vf_f32m8_tumu(__VA_ARGS__)

◆ vfwnmacc_vf_f32mf2

#define vfwnmacc_vf_f32mf2 ( ... ) __riscv_vfwnmacc_vf_f32mf2_tu(__VA_ARGS__)

◆ vfwnmacc_vf_f32mf2_m

#define vfwnmacc_vf_f32mf2_m ( ... ) __riscv_vfwnmacc_vf_f32mf2_tumu(__VA_ARGS__)

◆ vfwnmacc_vf_f64m1

#define vfwnmacc_vf_f64m1 ( ... ) __riscv_vfwnmacc_vf_f64m1_tu(__VA_ARGS__)

◆ vfwnmacc_vf_f64m1_m

#define vfwnmacc_vf_f64m1_m ( ... ) __riscv_vfwnmacc_vf_f64m1_tumu(__VA_ARGS__)

◆ vfwnmacc_vf_f64m2

#define vfwnmacc_vf_f64m2 ( ... ) __riscv_vfwnmacc_vf_f64m2_tu(__VA_ARGS__)

◆ vfwnmacc_vf_f64m2_m

#define vfwnmacc_vf_f64m2_m ( ... ) __riscv_vfwnmacc_vf_f64m2_tumu(__VA_ARGS__)

◆ vfwnmacc_vf_f64m4

#define vfwnmacc_vf_f64m4 ( ... ) __riscv_vfwnmacc_vf_f64m4_tu(__VA_ARGS__)

◆ vfwnmacc_vf_f64m4_m

#define vfwnmacc_vf_f64m4_m ( ... ) __riscv_vfwnmacc_vf_f64m4_tumu(__VA_ARGS__)

◆ vfwnmacc_vf_f64m8

#define vfwnmacc_vf_f64m8 ( ... ) __riscv_vfwnmacc_vf_f64m8_tu(__VA_ARGS__)

◆ vfwnmacc_vf_f64m8_m

#define vfwnmacc_vf_f64m8_m ( ... ) __riscv_vfwnmacc_vf_f64m8_tumu(__VA_ARGS__)

◆ vfwnmacc_vv_f32m1

#define vfwnmacc_vv_f32m1 ( ... ) __riscv_vfwnmacc_vv_f32m1_tu(__VA_ARGS__)

◆ vfwnmacc_vv_f32m1_m

#define vfwnmacc_vv_f32m1_m ( ... ) __riscv_vfwnmacc_vv_f32m1_tumu(__VA_ARGS__)

◆ vfwnmacc_vv_f32m2

#define vfwnmacc_vv_f32m2 ( ... ) __riscv_vfwnmacc_vv_f32m2_tu(__VA_ARGS__)

◆ vfwnmacc_vv_f32m2_m

#define vfwnmacc_vv_f32m2_m ( ... ) __riscv_vfwnmacc_vv_f32m2_tumu(__VA_ARGS__)

◆ vfwnmacc_vv_f32m4

#define vfwnmacc_vv_f32m4 ( ... ) __riscv_vfwnmacc_vv_f32m4_tu(__VA_ARGS__)

◆ vfwnmacc_vv_f32m4_m

#define vfwnmacc_vv_f32m4_m ( ... ) __riscv_vfwnmacc_vv_f32m4_tumu(__VA_ARGS__)

◆ vfwnmacc_vv_f32m8

#define vfwnmacc_vv_f32m8 ( ... ) __riscv_vfwnmacc_vv_f32m8_tu(__VA_ARGS__)

◆ vfwnmacc_vv_f32m8_m

#define vfwnmacc_vv_f32m8_m ( ... ) __riscv_vfwnmacc_vv_f32m8_tumu(__VA_ARGS__)

◆ vfwnmacc_vv_f32mf2

#define vfwnmacc_vv_f32mf2 ( ... ) __riscv_vfwnmacc_vv_f32mf2_tu(__VA_ARGS__)

◆ vfwnmacc_vv_f32mf2_m

#define vfwnmacc_vv_f32mf2_m ( ... ) __riscv_vfwnmacc_vv_f32mf2_tumu(__VA_ARGS__)

◆ vfwnmacc_vv_f64m1

#define vfwnmacc_vv_f64m1 ( ... ) __riscv_vfwnmacc_vv_f64m1_tu(__VA_ARGS__)

◆ vfwnmacc_vv_f64m1_m

#define vfwnmacc_vv_f64m1_m ( ... ) __riscv_vfwnmacc_vv_f64m1_tumu(__VA_ARGS__)

◆ vfwnmacc_vv_f64m2

#define vfwnmacc_vv_f64m2 ( ... ) __riscv_vfwnmacc_vv_f64m2_tu(__VA_ARGS__)

◆ vfwnmacc_vv_f64m2_m

#define vfwnmacc_vv_f64m2_m ( ... ) __riscv_vfwnmacc_vv_f64m2_tumu(__VA_ARGS__)

◆ vfwnmacc_vv_f64m4

#define vfwnmacc_vv_f64m4 ( ... ) __riscv_vfwnmacc_vv_f64m4_tu(__VA_ARGS__)

◆ vfwnmacc_vv_f64m4_m

#define vfwnmacc_vv_f64m4_m ( ... ) __riscv_vfwnmacc_vv_f64m4_tumu(__VA_ARGS__)

◆ vfwnmacc_vv_f64m8

#define vfwnmacc_vv_f64m8 ( ... ) __riscv_vfwnmacc_vv_f64m8_tu(__VA_ARGS__)

◆ vfwnmacc_vv_f64m8_m

#define vfwnmacc_vv_f64m8_m ( ... ) __riscv_vfwnmacc_vv_f64m8_tumu(__VA_ARGS__)

◆ vfwnmsac_vf_f32m1

#define vfwnmsac_vf_f32m1 ( ... ) __riscv_vfwnmsac_vf_f32m1_tu(__VA_ARGS__)

◆ vfwnmsac_vf_f32m1_m

#define vfwnmsac_vf_f32m1_m ( ... ) __riscv_vfwnmsac_vf_f32m1_tumu(__VA_ARGS__)

◆ vfwnmsac_vf_f32m2

#define vfwnmsac_vf_f32m2 ( ... ) __riscv_vfwnmsac_vf_f32m2_tu(__VA_ARGS__)

◆ vfwnmsac_vf_f32m2_m

#define vfwnmsac_vf_f32m2_m ( ... ) __riscv_vfwnmsac_vf_f32m2_tumu(__VA_ARGS__)

◆ vfwnmsac_vf_f32m4

#define vfwnmsac_vf_f32m4 ( ... ) __riscv_vfwnmsac_vf_f32m4_tu(__VA_ARGS__)

◆ vfwnmsac_vf_f32m4_m

#define vfwnmsac_vf_f32m4_m ( ... ) __riscv_vfwnmsac_vf_f32m4_tumu(__VA_ARGS__)

◆ vfwnmsac_vf_f32m8

#define vfwnmsac_vf_f32m8 ( ... ) __riscv_vfwnmsac_vf_f32m8_tu(__VA_ARGS__)

◆ vfwnmsac_vf_f32m8_m

#define vfwnmsac_vf_f32m8_m ( ... ) __riscv_vfwnmsac_vf_f32m8_tumu(__VA_ARGS__)

◆ vfwnmsac_vf_f32mf2

#define vfwnmsac_vf_f32mf2 ( ... ) __riscv_vfwnmsac_vf_f32mf2_tu(__VA_ARGS__)

◆ vfwnmsac_vf_f32mf2_m

#define vfwnmsac_vf_f32mf2_m ( ... ) __riscv_vfwnmsac_vf_f32mf2_tumu(__VA_ARGS__)

◆ vfwnmsac_vf_f64m1

#define vfwnmsac_vf_f64m1 ( ... ) __riscv_vfwnmsac_vf_f64m1_tu(__VA_ARGS__)

◆ vfwnmsac_vf_f64m1_m

#define vfwnmsac_vf_f64m1_m ( ... ) __riscv_vfwnmsac_vf_f64m1_tumu(__VA_ARGS__)

◆ vfwnmsac_vf_f64m2

#define vfwnmsac_vf_f64m2 ( ... ) __riscv_vfwnmsac_vf_f64m2_tu(__VA_ARGS__)

◆ vfwnmsac_vf_f64m2_m

#define vfwnmsac_vf_f64m2_m ( ... ) __riscv_vfwnmsac_vf_f64m2_tumu(__VA_ARGS__)

◆ vfwnmsac_vf_f64m4

#define vfwnmsac_vf_f64m4 ( ... ) __riscv_vfwnmsac_vf_f64m4_tu(__VA_ARGS__)

◆ vfwnmsac_vf_f64m4_m

#define vfwnmsac_vf_f64m4_m ( ... ) __riscv_vfwnmsac_vf_f64m4_tumu(__VA_ARGS__)

◆ vfwnmsac_vf_f64m8

#define vfwnmsac_vf_f64m8 ( ... ) __riscv_vfwnmsac_vf_f64m8_tu(__VA_ARGS__)

◆ vfwnmsac_vf_f64m8_m

#define vfwnmsac_vf_f64m8_m ( ... ) __riscv_vfwnmsac_vf_f64m8_tumu(__VA_ARGS__)

◆ vfwnmsac_vv_f32m1

#define vfwnmsac_vv_f32m1 ( ... ) __riscv_vfwnmsac_vv_f32m1_tu(__VA_ARGS__)

◆ vfwnmsac_vv_f32m1_m

#define vfwnmsac_vv_f32m1_m ( ... ) __riscv_vfwnmsac_vv_f32m1_tumu(__VA_ARGS__)

◆ vfwnmsac_vv_f32m2

#define vfwnmsac_vv_f32m2 ( ... ) __riscv_vfwnmsac_vv_f32m2_tu(__VA_ARGS__)

◆ vfwnmsac_vv_f32m2_m

#define vfwnmsac_vv_f32m2_m ( ... ) __riscv_vfwnmsac_vv_f32m2_tumu(__VA_ARGS__)

◆ vfwnmsac_vv_f32m4

#define vfwnmsac_vv_f32m4 ( ... ) __riscv_vfwnmsac_vv_f32m4_tu(__VA_ARGS__)

◆ vfwnmsac_vv_f32m4_m

#define vfwnmsac_vv_f32m4_m ( ... ) __riscv_vfwnmsac_vv_f32m4_tumu(__VA_ARGS__)

◆ vfwnmsac_vv_f32m8

#define vfwnmsac_vv_f32m8 ( ... ) __riscv_vfwnmsac_vv_f32m8_tu(__VA_ARGS__)

◆ vfwnmsac_vv_f32m8_m

#define vfwnmsac_vv_f32m8_m ( ... ) __riscv_vfwnmsac_vv_f32m8_tumu(__VA_ARGS__)

◆ vfwnmsac_vv_f32mf2

#define vfwnmsac_vv_f32mf2 ( ... ) __riscv_vfwnmsac_vv_f32mf2_tu(__VA_ARGS__)

◆ vfwnmsac_vv_f32mf2_m

#define vfwnmsac_vv_f32mf2_m ( ... ) __riscv_vfwnmsac_vv_f32mf2_tumu(__VA_ARGS__)

◆ vfwnmsac_vv_f64m1

#define vfwnmsac_vv_f64m1 ( ... ) __riscv_vfwnmsac_vv_f64m1_tu(__VA_ARGS__)

◆ vfwnmsac_vv_f64m1_m

#define vfwnmsac_vv_f64m1_m ( ... ) __riscv_vfwnmsac_vv_f64m1_tumu(__VA_ARGS__)

◆ vfwnmsac_vv_f64m2

#define vfwnmsac_vv_f64m2 ( ... ) __riscv_vfwnmsac_vv_f64m2_tu(__VA_ARGS__)

◆ vfwnmsac_vv_f64m2_m

#define vfwnmsac_vv_f64m2_m ( ... ) __riscv_vfwnmsac_vv_f64m2_tumu(__VA_ARGS__)

◆ vfwnmsac_vv_f64m4

#define vfwnmsac_vv_f64m4 ( ... ) __riscv_vfwnmsac_vv_f64m4_tu(__VA_ARGS__)

◆ vfwnmsac_vv_f64m4_m

#define vfwnmsac_vv_f64m4_m ( ... ) __riscv_vfwnmsac_vv_f64m4_tumu(__VA_ARGS__)

◆ vfwnmsac_vv_f64m8

#define vfwnmsac_vv_f64m8 ( ... ) __riscv_vfwnmsac_vv_f64m8_tu(__VA_ARGS__)

◆ vfwnmsac_vv_f64m8_m

#define vfwnmsac_vv_f64m8_m ( ... ) __riscv_vfwnmsac_vv_f64m8_tumu(__VA_ARGS__)

◆ vfwredosum_vs_f16m1_f32m1

#define vfwredosum_vs_f16m1_f32m1 ( ... ) __riscv_vfwredosum_vs_f16m1_f32m1_tu(__VA_ARGS__)

◆ vfwredosum_vs_f16m1_f32m1_m

#define vfwredosum_vs_f16m1_f32m1_m ( ... ) __riscv_vfwredosum_vs_f16m1_f32m1_tum(__VA_ARGS__)

◆ vfwredosum_vs_f16m2_f32m1

#define vfwredosum_vs_f16m2_f32m1 ( ... ) __riscv_vfwredosum_vs_f16m2_f32m1_tu(__VA_ARGS__)

◆ vfwredosum_vs_f16m2_f32m1_m

#define vfwredosum_vs_f16m2_f32m1_m ( ... ) __riscv_vfwredosum_vs_f16m2_f32m1_tum(__VA_ARGS__)

◆ vfwredosum_vs_f16m4_f32m1

#define vfwredosum_vs_f16m4_f32m1 ( ... ) __riscv_vfwredosum_vs_f16m4_f32m1_tu(__VA_ARGS__)

◆ vfwredosum_vs_f16m4_f32m1_m

#define vfwredosum_vs_f16m4_f32m1_m ( ... ) __riscv_vfwredosum_vs_f16m4_f32m1_tum(__VA_ARGS__)

◆ vfwredosum_vs_f16m8_f32m1

#define vfwredosum_vs_f16m8_f32m1 ( ... ) __riscv_vfwredosum_vs_f16m8_f32m1_tu(__VA_ARGS__)

◆ vfwredosum_vs_f16m8_f32m1_m

#define vfwredosum_vs_f16m8_f32m1_m ( ... ) __riscv_vfwredosum_vs_f16m8_f32m1_tum(__VA_ARGS__)

◆ vfwredosum_vs_f16mf2_f32m1

#define vfwredosum_vs_f16mf2_f32m1 ( ... ) __riscv_vfwredosum_vs_f16mf2_f32m1_tu(__VA_ARGS__)

◆ vfwredosum_vs_f16mf2_f32m1_m

#define vfwredosum_vs_f16mf2_f32m1_m ( ... ) __riscv_vfwredosum_vs_f16mf2_f32m1_tum(__VA_ARGS__)

◆ vfwredosum_vs_f16mf4_f32m1

#define vfwredosum_vs_f16mf4_f32m1 ( ... ) __riscv_vfwredosum_vs_f16mf4_f32m1_tu(__VA_ARGS__)

◆ vfwredosum_vs_f16mf4_f32m1_m

#define vfwredosum_vs_f16mf4_f32m1_m ( ... ) __riscv_vfwredosum_vs_f16mf4_f32m1_tum(__VA_ARGS__)

◆ vfwredosum_vs_f32m1_f64m1

#define vfwredosum_vs_f32m1_f64m1 ( ... ) __riscv_vfwredosum_vs_f32m1_f64m1_tu(__VA_ARGS__)

◆ vfwredosum_vs_f32m1_f64m1_m

#define vfwredosum_vs_f32m1_f64m1_m ( ... ) __riscv_vfwredosum_vs_f32m1_f64m1_tum(__VA_ARGS__)

◆ vfwredosum_vs_f32m2_f64m1

#define vfwredosum_vs_f32m2_f64m1 ( ... ) __riscv_vfwredosum_vs_f32m2_f64m1_tu(__VA_ARGS__)

◆ vfwredosum_vs_f32m2_f64m1_m

#define vfwredosum_vs_f32m2_f64m1_m ( ... ) __riscv_vfwredosum_vs_f32m2_f64m1_tum(__VA_ARGS__)

◆ vfwredosum_vs_f32m4_f64m1

#define vfwredosum_vs_f32m4_f64m1 ( ... ) __riscv_vfwredosum_vs_f32m4_f64m1_tu(__VA_ARGS__)

◆ vfwredosum_vs_f32m4_f64m1_m

#define vfwredosum_vs_f32m4_f64m1_m ( ... ) __riscv_vfwredosum_vs_f32m4_f64m1_tum(__VA_ARGS__)

◆ vfwredosum_vs_f32m8_f64m1

#define vfwredosum_vs_f32m8_f64m1 ( ... ) __riscv_vfwredosum_vs_f32m8_f64m1_tu(__VA_ARGS__)

◆ vfwredosum_vs_f32m8_f64m1_m

#define vfwredosum_vs_f32m8_f64m1_m ( ... ) __riscv_vfwredosum_vs_f32m8_f64m1_tum(__VA_ARGS__)

◆ vfwredosum_vs_f32mf2_f64m1

#define vfwredosum_vs_f32mf2_f64m1 ( ... ) __riscv_vfwredosum_vs_f32mf2_f64m1_tu(__VA_ARGS__)

◆ vfwredosum_vs_f32mf2_f64m1_m

#define vfwredosum_vs_f32mf2_f64m1_m ( ... ) __riscv_vfwredosum_vs_f32mf2_f64m1_tum(__VA_ARGS__)

◆ vfwredusum_vs_f16m1_f32m1

#define vfwredusum_vs_f16m1_f32m1 ( ... ) __riscv_vfwredusum_vs_f16m1_f32m1_tu(__VA_ARGS__)

◆ vfwredusum_vs_f16m1_f32m1_m

#define vfwredusum_vs_f16m1_f32m1_m ( ... ) __riscv_vfwredusum_vs_f16m1_f32m1_tum(__VA_ARGS__)

◆ vfwredusum_vs_f16m2_f32m1

#define vfwredusum_vs_f16m2_f32m1 ( ... ) __riscv_vfwredusum_vs_f16m2_f32m1_tu(__VA_ARGS__)

◆ vfwredusum_vs_f16m2_f32m1_m

#define vfwredusum_vs_f16m2_f32m1_m ( ... ) __riscv_vfwredusum_vs_f16m2_f32m1_tum(__VA_ARGS__)

◆ vfwredusum_vs_f16m4_f32m1

#define vfwredusum_vs_f16m4_f32m1 ( ... ) __riscv_vfwredusum_vs_f16m4_f32m1_tu(__VA_ARGS__)

◆ vfwredusum_vs_f16m4_f32m1_m

#define vfwredusum_vs_f16m4_f32m1_m ( ... ) __riscv_vfwredusum_vs_f16m4_f32m1_tum(__VA_ARGS__)

◆ vfwredusum_vs_f16m8_f32m1

#define vfwredusum_vs_f16m8_f32m1 ( ... ) __riscv_vfwredusum_vs_f16m8_f32m1_tu(__VA_ARGS__)

◆ vfwredusum_vs_f16m8_f32m1_m

#define vfwredusum_vs_f16m8_f32m1_m ( ... ) __riscv_vfwredusum_vs_f16m8_f32m1_tum(__VA_ARGS__)

◆ vfwredusum_vs_f16mf2_f32m1

#define vfwredusum_vs_f16mf2_f32m1 ( ... ) __riscv_vfwredusum_vs_f16mf2_f32m1_tu(__VA_ARGS__)

◆ vfwredusum_vs_f16mf2_f32m1_m

#define vfwredusum_vs_f16mf2_f32m1_m ( ... ) __riscv_vfwredusum_vs_f16mf2_f32m1_tum(__VA_ARGS__)

◆ vfwredusum_vs_f16mf4_f32m1

#define vfwredusum_vs_f16mf4_f32m1 ( ... ) __riscv_vfwredusum_vs_f16mf4_f32m1_tu(__VA_ARGS__)

◆ vfwredusum_vs_f16mf4_f32m1_m

#define vfwredusum_vs_f16mf4_f32m1_m ( ... ) __riscv_vfwredusum_vs_f16mf4_f32m1_tum(__VA_ARGS__)

◆ vfwredusum_vs_f32m1_f64m1

#define vfwredusum_vs_f32m1_f64m1 ( ... ) __riscv_vfwredusum_vs_f32m1_f64m1_tu(__VA_ARGS__)

◆ vfwredusum_vs_f32m1_f64m1_m

#define vfwredusum_vs_f32m1_f64m1_m ( ... ) __riscv_vfwredusum_vs_f32m1_f64m1_tum(__VA_ARGS__)

◆ vfwredusum_vs_f32m2_f64m1

#define vfwredusum_vs_f32m2_f64m1 ( ... ) __riscv_vfwredusum_vs_f32m2_f64m1_tu(__VA_ARGS__)

◆ vfwredusum_vs_f32m2_f64m1_m

#define vfwredusum_vs_f32m2_f64m1_m ( ... ) __riscv_vfwredusum_vs_f32m2_f64m1_tum(__VA_ARGS__)

◆ vfwredusum_vs_f32m4_f64m1

#define vfwredusum_vs_f32m4_f64m1 ( ... ) __riscv_vfwredusum_vs_f32m4_f64m1_tu(__VA_ARGS__)

◆ vfwredusum_vs_f32m4_f64m1_m

#define vfwredusum_vs_f32m4_f64m1_m ( ... ) __riscv_vfwredusum_vs_f32m4_f64m1_tum(__VA_ARGS__)

◆ vfwredusum_vs_f32m8_f64m1

#define vfwredusum_vs_f32m8_f64m1 ( ... ) __riscv_vfwredusum_vs_f32m8_f64m1_tu(__VA_ARGS__)

◆ vfwredusum_vs_f32m8_f64m1_m

#define vfwredusum_vs_f32m8_f64m1_m ( ... ) __riscv_vfwredusum_vs_f32m8_f64m1_tum(__VA_ARGS__)

◆ vfwredusum_vs_f32mf2_f64m1

#define vfwredusum_vs_f32mf2_f64m1 ( ... ) __riscv_vfwredusum_vs_f32mf2_f64m1_tu(__VA_ARGS__)

◆ vfwredusum_vs_f32mf2_f64m1_m

#define vfwredusum_vs_f32mf2_f64m1_m ( ... ) __riscv_vfwredusum_vs_f32mf2_f64m1_tum(__VA_ARGS__)

◆ vfwsub_vf_f32m1

#define vfwsub_vf_f32m1 ( ... ) __riscv_vfwsub_vf_f32m1(__VA_ARGS__)

◆ vfwsub_vf_f32m1_m

#define vfwsub_vf_f32m1_m ( ... ) __riscv_vfwsub_vf_f32m1_tumu(__VA_ARGS__)

◆ vfwsub_vf_f32m2

#define vfwsub_vf_f32m2 ( ... ) __riscv_vfwsub_vf_f32m2(__VA_ARGS__)

◆ vfwsub_vf_f32m2_m

#define vfwsub_vf_f32m2_m ( ... ) __riscv_vfwsub_vf_f32m2_tumu(__VA_ARGS__)

◆ vfwsub_vf_f32m4

#define vfwsub_vf_f32m4 ( ... ) __riscv_vfwsub_vf_f32m4(__VA_ARGS__)

◆ vfwsub_vf_f32m4_m

#define vfwsub_vf_f32m4_m ( ... ) __riscv_vfwsub_vf_f32m4_tumu(__VA_ARGS__)

◆ vfwsub_vf_f32m8

#define vfwsub_vf_f32m8 ( ... ) __riscv_vfwsub_vf_f32m8(__VA_ARGS__)

◆ vfwsub_vf_f32m8_m

#define vfwsub_vf_f32m8_m ( ... ) __riscv_vfwsub_vf_f32m8_tumu(__VA_ARGS__)

◆ vfwsub_vf_f32mf2

#define vfwsub_vf_f32mf2 ( ... ) __riscv_vfwsub_vf_f32mf2(__VA_ARGS__)

◆ vfwsub_vf_f32mf2_m

#define vfwsub_vf_f32mf2_m ( ... ) __riscv_vfwsub_vf_f32mf2_tumu(__VA_ARGS__)

◆ vfwsub_vf_f64m1

#define vfwsub_vf_f64m1 ( ... ) __riscv_vfwsub_vf_f64m1(__VA_ARGS__)

◆ vfwsub_vf_f64m1_m

#define vfwsub_vf_f64m1_m ( ... ) __riscv_vfwsub_vf_f64m1_tumu(__VA_ARGS__)

◆ vfwsub_vf_f64m2

#define vfwsub_vf_f64m2 ( ... ) __riscv_vfwsub_vf_f64m2(__VA_ARGS__)

◆ vfwsub_vf_f64m2_m

#define vfwsub_vf_f64m2_m ( ... ) __riscv_vfwsub_vf_f64m2_tumu(__VA_ARGS__)

◆ vfwsub_vf_f64m4

#define vfwsub_vf_f64m4 ( ... ) __riscv_vfwsub_vf_f64m4(__VA_ARGS__)

◆ vfwsub_vf_f64m4_m

#define vfwsub_vf_f64m4_m ( ... ) __riscv_vfwsub_vf_f64m4_tumu(__VA_ARGS__)

◆ vfwsub_vf_f64m8

#define vfwsub_vf_f64m8 ( ... ) __riscv_vfwsub_vf_f64m8(__VA_ARGS__)

◆ vfwsub_vf_f64m8_m

#define vfwsub_vf_f64m8_m ( ... ) __riscv_vfwsub_vf_f64m8_tumu(__VA_ARGS__)

◆ vfwsub_vv_f32m1

#define vfwsub_vv_f32m1 ( ... ) __riscv_vfwsub_vv_f32m1(__VA_ARGS__)

◆ vfwsub_vv_f32m1_m

#define vfwsub_vv_f32m1_m ( ... ) __riscv_vfwsub_vv_f32m1_tumu(__VA_ARGS__)

◆ vfwsub_vv_f32m2

#define vfwsub_vv_f32m2 ( ... ) __riscv_vfwsub_vv_f32m2(__VA_ARGS__)

◆ vfwsub_vv_f32m2_m

#define vfwsub_vv_f32m2_m ( ... ) __riscv_vfwsub_vv_f32m2_tumu(__VA_ARGS__)

◆ vfwsub_vv_f32m4

#define vfwsub_vv_f32m4 ( ... ) __riscv_vfwsub_vv_f32m4(__VA_ARGS__)

◆ vfwsub_vv_f32m4_m

#define vfwsub_vv_f32m4_m ( ... ) __riscv_vfwsub_vv_f32m4_tumu(__VA_ARGS__)

◆ vfwsub_vv_f32m8

#define vfwsub_vv_f32m8 ( ... ) __riscv_vfwsub_vv_f32m8(__VA_ARGS__)

◆ vfwsub_vv_f32m8_m

#define vfwsub_vv_f32m8_m ( ... ) __riscv_vfwsub_vv_f32m8_tumu(__VA_ARGS__)

◆ vfwsub_vv_f32mf2

#define vfwsub_vv_f32mf2 ( ... ) __riscv_vfwsub_vv_f32mf2(__VA_ARGS__)

◆ vfwsub_vv_f32mf2_m

#define vfwsub_vv_f32mf2_m ( ... ) __riscv_vfwsub_vv_f32mf2_tumu(__VA_ARGS__)

◆ vfwsub_vv_f64m1

#define vfwsub_vv_f64m1 ( ... ) __riscv_vfwsub_vv_f64m1(__VA_ARGS__)

◆ vfwsub_vv_f64m1_m

#define vfwsub_vv_f64m1_m ( ... ) __riscv_vfwsub_vv_f64m1_tumu(__VA_ARGS__)

◆ vfwsub_vv_f64m2

#define vfwsub_vv_f64m2 ( ... ) __riscv_vfwsub_vv_f64m2(__VA_ARGS__)

◆ vfwsub_vv_f64m2_m

#define vfwsub_vv_f64m2_m ( ... ) __riscv_vfwsub_vv_f64m2_tumu(__VA_ARGS__)

◆ vfwsub_vv_f64m4

#define vfwsub_vv_f64m4 ( ... ) __riscv_vfwsub_vv_f64m4(__VA_ARGS__)

◆ vfwsub_vv_f64m4_m

#define vfwsub_vv_f64m4_m ( ... ) __riscv_vfwsub_vv_f64m4_tumu(__VA_ARGS__)

◆ vfwsub_vv_f64m8

#define vfwsub_vv_f64m8 ( ... ) __riscv_vfwsub_vv_f64m8(__VA_ARGS__)

◆ vfwsub_vv_f64m8_m

#define vfwsub_vv_f64m8_m ( ... ) __riscv_vfwsub_vv_f64m8_tumu(__VA_ARGS__)

◆ vfwsub_wf_f32m1

#define vfwsub_wf_f32m1 ( ... ) __riscv_vfwsub_wf_f32m1(__VA_ARGS__)

◆ vfwsub_wf_f32m1_m

#define vfwsub_wf_f32m1_m ( ... ) __riscv_vfwsub_wf_f32m1_tumu(__VA_ARGS__)

◆ vfwsub_wf_f32m2

#define vfwsub_wf_f32m2 ( ... ) __riscv_vfwsub_wf_f32m2(__VA_ARGS__)

◆ vfwsub_wf_f32m2_m

#define vfwsub_wf_f32m2_m ( ... ) __riscv_vfwsub_wf_f32m2_tumu(__VA_ARGS__)

◆ vfwsub_wf_f32m4

#define vfwsub_wf_f32m4 ( ... ) __riscv_vfwsub_wf_f32m4(__VA_ARGS__)

◆ vfwsub_wf_f32m4_m

#define vfwsub_wf_f32m4_m ( ... ) __riscv_vfwsub_wf_f32m4_tumu(__VA_ARGS__)

◆ vfwsub_wf_f32m8

#define vfwsub_wf_f32m8 ( ... ) __riscv_vfwsub_wf_f32m8(__VA_ARGS__)

◆ vfwsub_wf_f32m8_m

#define vfwsub_wf_f32m8_m ( ... ) __riscv_vfwsub_wf_f32m8_tumu(__VA_ARGS__)

◆ vfwsub_wf_f32mf2

#define vfwsub_wf_f32mf2 ( ... ) __riscv_vfwsub_wf_f32mf2(__VA_ARGS__)

◆ vfwsub_wf_f32mf2_m

#define vfwsub_wf_f32mf2_m ( ... ) __riscv_vfwsub_wf_f32mf2_tumu(__VA_ARGS__)

◆ vfwsub_wf_f64m1

#define vfwsub_wf_f64m1 ( ... ) __riscv_vfwsub_wf_f64m1(__VA_ARGS__)

◆ vfwsub_wf_f64m1_m

#define vfwsub_wf_f64m1_m ( ... ) __riscv_vfwsub_wf_f64m1_tumu(__VA_ARGS__)

◆ vfwsub_wf_f64m2

#define vfwsub_wf_f64m2 ( ... ) __riscv_vfwsub_wf_f64m2(__VA_ARGS__)

◆ vfwsub_wf_f64m2_m

#define vfwsub_wf_f64m2_m ( ... ) __riscv_vfwsub_wf_f64m2_tumu(__VA_ARGS__)

◆ vfwsub_wf_f64m4

#define vfwsub_wf_f64m4 ( ... ) __riscv_vfwsub_wf_f64m4(__VA_ARGS__)

◆ vfwsub_wf_f64m4_m

#define vfwsub_wf_f64m4_m ( ... ) __riscv_vfwsub_wf_f64m4_tumu(__VA_ARGS__)

◆ vfwsub_wf_f64m8

#define vfwsub_wf_f64m8 ( ... ) __riscv_vfwsub_wf_f64m8(__VA_ARGS__)

◆ vfwsub_wf_f64m8_m

#define vfwsub_wf_f64m8_m ( ... ) __riscv_vfwsub_wf_f64m8_tumu(__VA_ARGS__)

◆ vfwsub_wv_f32m1

#define vfwsub_wv_f32m1 ( ... ) __riscv_vfwsub_wv_f32m1(__VA_ARGS__)

◆ vfwsub_wv_f32m1_m

#define vfwsub_wv_f32m1_m ( ... ) __riscv_vfwsub_wv_f32m1_tumu(__VA_ARGS__)

◆ vfwsub_wv_f32m2

#define vfwsub_wv_f32m2 ( ... ) __riscv_vfwsub_wv_f32m2(__VA_ARGS__)

◆ vfwsub_wv_f32m2_m

#define vfwsub_wv_f32m2_m ( ... ) __riscv_vfwsub_wv_f32m2_tumu(__VA_ARGS__)

◆ vfwsub_wv_f32m4

#define vfwsub_wv_f32m4 ( ... ) __riscv_vfwsub_wv_f32m4(__VA_ARGS__)

◆ vfwsub_wv_f32m4_m

#define vfwsub_wv_f32m4_m ( ... ) __riscv_vfwsub_wv_f32m4_tumu(__VA_ARGS__)

◆ vfwsub_wv_f32m8

#define vfwsub_wv_f32m8 ( ... ) __riscv_vfwsub_wv_f32m8(__VA_ARGS__)

◆ vfwsub_wv_f32m8_m

#define vfwsub_wv_f32m8_m ( ... ) __riscv_vfwsub_wv_f32m8_tumu(__VA_ARGS__)

◆ vfwsub_wv_f32mf2

#define vfwsub_wv_f32mf2 ( ... ) __riscv_vfwsub_wv_f32mf2(__VA_ARGS__)

◆ vfwsub_wv_f32mf2_m

#define vfwsub_wv_f32mf2_m ( ... ) __riscv_vfwsub_wv_f32mf2_tumu(__VA_ARGS__)

◆ vfwsub_wv_f64m1

#define vfwsub_wv_f64m1 ( ... ) __riscv_vfwsub_wv_f64m1(__VA_ARGS__)

◆ vfwsub_wv_f64m1_m

#define vfwsub_wv_f64m1_m ( ... ) __riscv_vfwsub_wv_f64m1_tumu(__VA_ARGS__)

◆ vfwsub_wv_f64m2

#define vfwsub_wv_f64m2 ( ... ) __riscv_vfwsub_wv_f64m2(__VA_ARGS__)

◆ vfwsub_wv_f64m2_m

#define vfwsub_wv_f64m2_m ( ... ) __riscv_vfwsub_wv_f64m2_tumu(__VA_ARGS__)

◆ vfwsub_wv_f64m4

#define vfwsub_wv_f64m4 ( ... ) __riscv_vfwsub_wv_f64m4(__VA_ARGS__)

◆ vfwsub_wv_f64m4_m

#define vfwsub_wv_f64m4_m ( ... ) __riscv_vfwsub_wv_f64m4_tumu(__VA_ARGS__)

◆ vfwsub_wv_f64m8

#define vfwsub_wv_f64m8 ( ... ) __riscv_vfwsub_wv_f64m8(__VA_ARGS__)

◆ vfwsub_wv_f64m8_m

#define vfwsub_wv_f64m8_m ( ... ) __riscv_vfwsub_wv_f64m8_tumu(__VA_ARGS__)

◆ vget_v_f16m2_f16m1

#define vget_v_f16m2_f16m1 ( ... ) __riscv_vget_v_f16m2_f16m1(__VA_ARGS__)

◆ vget_v_f16m4_f16m1

#define vget_v_f16m4_f16m1 ( ... ) __riscv_vget_v_f16m4_f16m1(__VA_ARGS__)

◆ vget_v_f16m4_f16m2

#define vget_v_f16m4_f16m2 ( ... ) __riscv_vget_v_f16m4_f16m2(__VA_ARGS__)

◆ vget_v_f16m8_f16m1

#define vget_v_f16m8_f16m1 ( ... ) __riscv_vget_v_f16m8_f16m1(__VA_ARGS__)

◆ vget_v_f16m8_f16m2

#define vget_v_f16m8_f16m2 ( ... ) __riscv_vget_v_f16m8_f16m2(__VA_ARGS__)

◆ vget_v_f16m8_f16m4

#define vget_v_f16m8_f16m4 ( ... ) __riscv_vget_v_f16m8_f16m4(__VA_ARGS__)

◆ vget_v_f32m2_f32m1

#define vget_v_f32m2_f32m1 ( ... ) __riscv_vget_v_f32m2_f32m1(__VA_ARGS__)

◆ vget_v_f32m4_f32m1

#define vget_v_f32m4_f32m1 ( ... ) __riscv_vget_v_f32m4_f32m1(__VA_ARGS__)

◆ vget_v_f32m4_f32m2

#define vget_v_f32m4_f32m2 ( ... ) __riscv_vget_v_f32m4_f32m2(__VA_ARGS__)

◆ vget_v_f32m8_f32m1

#define vget_v_f32m8_f32m1 ( ... ) __riscv_vget_v_f32m8_f32m1(__VA_ARGS__)

◆ vget_v_f32m8_f32m2

#define vget_v_f32m8_f32m2 ( ... ) __riscv_vget_v_f32m8_f32m2(__VA_ARGS__)

◆ vget_v_f32m8_f32m4

#define vget_v_f32m8_f32m4 ( ... ) __riscv_vget_v_f32m8_f32m4(__VA_ARGS__)

◆ vget_v_f64m2_f64m1

#define vget_v_f64m2_f64m1 ( ... ) __riscv_vget_v_f64m2_f64m1(__VA_ARGS__)

◆ vget_v_f64m4_f64m1

#define vget_v_f64m4_f64m1 ( ... ) __riscv_vget_v_f64m4_f64m1(__VA_ARGS__)

◆ vget_v_f64m4_f64m2

#define vget_v_f64m4_f64m2 ( ... ) __riscv_vget_v_f64m4_f64m2(__VA_ARGS__)

◆ vget_v_f64m8_f64m1

#define vget_v_f64m8_f64m1 ( ... ) __riscv_vget_v_f64m8_f64m1(__VA_ARGS__)

◆ vget_v_f64m8_f64m2

#define vget_v_f64m8_f64m2 ( ... ) __riscv_vget_v_f64m8_f64m2(__VA_ARGS__)

◆ vget_v_f64m8_f64m4

#define vget_v_f64m8_f64m4 ( ... ) __riscv_vget_v_f64m8_f64m4(__VA_ARGS__)

◆ vget_v_i16m2_i16m1

#define vget_v_i16m2_i16m1 ( ... ) __riscv_vget_v_i16m2_i16m1(__VA_ARGS__)

◆ vget_v_i16m4_i16m1

#define vget_v_i16m4_i16m1 ( ... ) __riscv_vget_v_i16m4_i16m1(__VA_ARGS__)

◆ vget_v_i16m4_i16m2

#define vget_v_i16m4_i16m2 ( ... ) __riscv_vget_v_i16m4_i16m2(__VA_ARGS__)

◆ vget_v_i16m8_i16m1

#define vget_v_i16m8_i16m1 ( ... ) __riscv_vget_v_i16m8_i16m1(__VA_ARGS__)

◆ vget_v_i16m8_i16m2

#define vget_v_i16m8_i16m2 ( ... ) __riscv_vget_v_i16m8_i16m2(__VA_ARGS__)

◆ vget_v_i16m8_i16m4

#define vget_v_i16m8_i16m4 ( ... ) __riscv_vget_v_i16m8_i16m4(__VA_ARGS__)

◆ vget_v_i32m2_i32m1

#define vget_v_i32m2_i32m1 ( ... ) __riscv_vget_v_i32m2_i32m1(__VA_ARGS__)

◆ vget_v_i32m4_i32m1

#define vget_v_i32m4_i32m1 ( ... ) __riscv_vget_v_i32m4_i32m1(__VA_ARGS__)

◆ vget_v_i32m4_i32m2

#define vget_v_i32m4_i32m2 ( ... ) __riscv_vget_v_i32m4_i32m2(__VA_ARGS__)

◆ vget_v_i32m8_i32m1

#define vget_v_i32m8_i32m1 ( ... ) __riscv_vget_v_i32m8_i32m1(__VA_ARGS__)

◆ vget_v_i32m8_i32m2

#define vget_v_i32m8_i32m2 ( ... ) __riscv_vget_v_i32m8_i32m2(__VA_ARGS__)

◆ vget_v_i32m8_i32m4

#define vget_v_i32m8_i32m4 ( ... ) __riscv_vget_v_i32m8_i32m4(__VA_ARGS__)

◆ vget_v_i64m2_i64m1

#define vget_v_i64m2_i64m1 ( ... ) __riscv_vget_v_i64m2_i64m1(__VA_ARGS__)

◆ vget_v_i64m4_i64m1

#define vget_v_i64m4_i64m1 ( ... ) __riscv_vget_v_i64m4_i64m1(__VA_ARGS__)

◆ vget_v_i64m4_i64m2

#define vget_v_i64m4_i64m2 ( ... ) __riscv_vget_v_i64m4_i64m2(__VA_ARGS__)

◆ vget_v_i64m8_i64m1

#define vget_v_i64m8_i64m1 ( ... ) __riscv_vget_v_i64m8_i64m1(__VA_ARGS__)

◆ vget_v_i64m8_i64m2

#define vget_v_i64m8_i64m2 ( ... ) __riscv_vget_v_i64m8_i64m2(__VA_ARGS__)

◆ vget_v_i64m8_i64m4

#define vget_v_i64m8_i64m4 ( ... ) __riscv_vget_v_i64m8_i64m4(__VA_ARGS__)

◆ vget_v_i8m2_i8m1

#define vget_v_i8m2_i8m1 ( ... ) __riscv_vget_v_i8m2_i8m1(__VA_ARGS__)

◆ vget_v_i8m4_i8m1

#define vget_v_i8m4_i8m1 ( ... ) __riscv_vget_v_i8m4_i8m1(__VA_ARGS__)

◆ vget_v_i8m4_i8m2

#define vget_v_i8m4_i8m2 ( ... ) __riscv_vget_v_i8m4_i8m2(__VA_ARGS__)

◆ vget_v_i8m8_i8m1

#define vget_v_i8m8_i8m1 ( ... ) __riscv_vget_v_i8m8_i8m1(__VA_ARGS__)

◆ vget_v_i8m8_i8m2

#define vget_v_i8m8_i8m2 ( ... ) __riscv_vget_v_i8m8_i8m2(__VA_ARGS__)

◆ vget_v_i8m8_i8m4

#define vget_v_i8m8_i8m4 ( ... ) __riscv_vget_v_i8m8_i8m4(__VA_ARGS__)

◆ vget_v_u16m2_u16m1

#define vget_v_u16m2_u16m1 ( ... ) __riscv_vget_v_u16m2_u16m1(__VA_ARGS__)

◆ vget_v_u16m4_u16m1

#define vget_v_u16m4_u16m1 ( ... ) __riscv_vget_v_u16m4_u16m1(__VA_ARGS__)

◆ vget_v_u16m4_u16m2

#define vget_v_u16m4_u16m2 ( ... ) __riscv_vget_v_u16m4_u16m2(__VA_ARGS__)

◆ vget_v_u16m8_u16m1

#define vget_v_u16m8_u16m1 ( ... ) __riscv_vget_v_u16m8_u16m1(__VA_ARGS__)

◆ vget_v_u16m8_u16m2

#define vget_v_u16m8_u16m2 ( ... ) __riscv_vget_v_u16m8_u16m2(__VA_ARGS__)

◆ vget_v_u16m8_u16m4

#define vget_v_u16m8_u16m4 ( ... ) __riscv_vget_v_u16m8_u16m4(__VA_ARGS__)

◆ vget_v_u32m2_u32m1

#define vget_v_u32m2_u32m1 ( ... ) __riscv_vget_v_u32m2_u32m1(__VA_ARGS__)

◆ vget_v_u32m4_u32m1

#define vget_v_u32m4_u32m1 ( ... ) __riscv_vget_v_u32m4_u32m1(__VA_ARGS__)

◆ vget_v_u32m4_u32m2

#define vget_v_u32m4_u32m2 ( ... ) __riscv_vget_v_u32m4_u32m2(__VA_ARGS__)

◆ vget_v_u32m8_u32m1

#define vget_v_u32m8_u32m1 ( ... ) __riscv_vget_v_u32m8_u32m1(__VA_ARGS__)

◆ vget_v_u32m8_u32m2

#define vget_v_u32m8_u32m2 ( ... ) __riscv_vget_v_u32m8_u32m2(__VA_ARGS__)

◆ vget_v_u32m8_u32m4

#define vget_v_u32m8_u32m4 ( ... ) __riscv_vget_v_u32m8_u32m4(__VA_ARGS__)

◆ vget_v_u64m2_u64m1

#define vget_v_u64m2_u64m1 ( ... ) __riscv_vget_v_u64m2_u64m1(__VA_ARGS__)

◆ vget_v_u64m4_u64m1

#define vget_v_u64m4_u64m1 ( ... ) __riscv_vget_v_u64m4_u64m1(__VA_ARGS__)

◆ vget_v_u64m4_u64m2

#define vget_v_u64m4_u64m2 ( ... ) __riscv_vget_v_u64m4_u64m2(__VA_ARGS__)

◆ vget_v_u64m8_u64m1

#define vget_v_u64m8_u64m1 ( ... ) __riscv_vget_v_u64m8_u64m1(__VA_ARGS__)

◆ vget_v_u64m8_u64m2

#define vget_v_u64m8_u64m2 ( ... ) __riscv_vget_v_u64m8_u64m2(__VA_ARGS__)

◆ vget_v_u64m8_u64m4

#define vget_v_u64m8_u64m4 ( ... ) __riscv_vget_v_u64m8_u64m4(__VA_ARGS__)

◆ vget_v_u8m2_u8m1

#define vget_v_u8m2_u8m1 ( ... ) __riscv_vget_v_u8m2_u8m1(__VA_ARGS__)

◆ vget_v_u8m4_u8m1

#define vget_v_u8m4_u8m1 ( ... ) __riscv_vget_v_u8m4_u8m1(__VA_ARGS__)

◆ vget_v_u8m4_u8m2

#define vget_v_u8m4_u8m2 ( ... ) __riscv_vget_v_u8m4_u8m2(__VA_ARGS__)

◆ vget_v_u8m8_u8m1

#define vget_v_u8m8_u8m1 ( ... ) __riscv_vget_v_u8m8_u8m1(__VA_ARGS__)

◆ vget_v_u8m8_u8m2

#define vget_v_u8m8_u8m2 ( ... ) __riscv_vget_v_u8m8_u8m2(__VA_ARGS__)

◆ vget_v_u8m8_u8m4

#define vget_v_u8m8_u8m4 ( ... ) __riscv_vget_v_u8m8_u8m4(__VA_ARGS__)

◆ vid_v_u16m1

#define vid_v_u16m1 ( ... ) __riscv_vid_v_u16m1(__VA_ARGS__)

◆ vid_v_u16m1_m

#define vid_v_u16m1_m ( ... ) __riscv_vid_v_u16m1_tumu(__VA_ARGS__)

◆ vid_v_u16m2

#define vid_v_u16m2 ( ... ) __riscv_vid_v_u16m2(__VA_ARGS__)

◆ vid_v_u16m2_m

#define vid_v_u16m2_m ( ... ) __riscv_vid_v_u16m2_tumu(__VA_ARGS__)

◆ vid_v_u16m4

#define vid_v_u16m4 ( ... ) __riscv_vid_v_u16m4(__VA_ARGS__)

◆ vid_v_u16m4_m

#define vid_v_u16m4_m ( ... ) __riscv_vid_v_u16m4_tumu(__VA_ARGS__)

◆ vid_v_u16m8

#define vid_v_u16m8 ( ... ) __riscv_vid_v_u16m8(__VA_ARGS__)

◆ vid_v_u16m8_m

#define vid_v_u16m8_m ( ... ) __riscv_vid_v_u16m8_tumu(__VA_ARGS__)

◆ vid_v_u16mf2

#define vid_v_u16mf2 ( ... ) __riscv_vid_v_u16mf2(__VA_ARGS__)

◆ vid_v_u16mf2_m

#define vid_v_u16mf2_m ( ... ) __riscv_vid_v_u16mf2_tumu(__VA_ARGS__)

◆ vid_v_u16mf4

#define vid_v_u16mf4 ( ... ) __riscv_vid_v_u16mf4(__VA_ARGS__)

◆ vid_v_u16mf4_m

#define vid_v_u16mf4_m ( ... ) __riscv_vid_v_u16mf4_tumu(__VA_ARGS__)

◆ vid_v_u32m1

#define vid_v_u32m1 ( ... ) __riscv_vid_v_u32m1(__VA_ARGS__)

◆ vid_v_u32m1_m

#define vid_v_u32m1_m ( ... ) __riscv_vid_v_u32m1_tumu(__VA_ARGS__)

◆ vid_v_u32m2

#define vid_v_u32m2 ( ... ) __riscv_vid_v_u32m2(__VA_ARGS__)

◆ vid_v_u32m2_m

#define vid_v_u32m2_m ( ... ) __riscv_vid_v_u32m2_tumu(__VA_ARGS__)

◆ vid_v_u32m4

#define vid_v_u32m4 ( ... ) __riscv_vid_v_u32m4(__VA_ARGS__)

◆ vid_v_u32m4_m

#define vid_v_u32m4_m ( ... ) __riscv_vid_v_u32m4_tumu(__VA_ARGS__)

◆ vid_v_u32m8

#define vid_v_u32m8 ( ... ) __riscv_vid_v_u32m8(__VA_ARGS__)

◆ vid_v_u32m8_m

#define vid_v_u32m8_m ( ... ) __riscv_vid_v_u32m8_tumu(__VA_ARGS__)

◆ vid_v_u32mf2

#define vid_v_u32mf2 ( ... ) __riscv_vid_v_u32mf2(__VA_ARGS__)

◆ vid_v_u32mf2_m

#define vid_v_u32mf2_m ( ... ) __riscv_vid_v_u32mf2_tumu(__VA_ARGS__)

◆ vid_v_u64m1

#define vid_v_u64m1 ( ... ) __riscv_vid_v_u64m1(__VA_ARGS__)

◆ vid_v_u64m1_m

#define vid_v_u64m1_m ( ... ) __riscv_vid_v_u64m1_tumu(__VA_ARGS__)

◆ vid_v_u64m2

#define vid_v_u64m2 ( ... ) __riscv_vid_v_u64m2(__VA_ARGS__)

◆ vid_v_u64m2_m

#define vid_v_u64m2_m ( ... ) __riscv_vid_v_u64m2_tumu(__VA_ARGS__)

◆ vid_v_u64m4

#define vid_v_u64m4 ( ... ) __riscv_vid_v_u64m4(__VA_ARGS__)

◆ vid_v_u64m4_m

#define vid_v_u64m4_m ( ... ) __riscv_vid_v_u64m4_tumu(__VA_ARGS__)

◆ vid_v_u64m8

#define vid_v_u64m8 ( ... ) __riscv_vid_v_u64m8(__VA_ARGS__)

◆ vid_v_u64m8_m

#define vid_v_u64m8_m ( ... ) __riscv_vid_v_u64m8_tumu(__VA_ARGS__)

◆ vid_v_u8m1

#define vid_v_u8m1 ( ... ) __riscv_vid_v_u8m1(__VA_ARGS__)

◆ vid_v_u8m1_m

#define vid_v_u8m1_m ( ... ) __riscv_vid_v_u8m1_tumu(__VA_ARGS__)

◆ vid_v_u8m2

#define vid_v_u8m2 ( ... ) __riscv_vid_v_u8m2(__VA_ARGS__)

◆ vid_v_u8m2_m

#define vid_v_u8m2_m ( ... ) __riscv_vid_v_u8m2_tumu(__VA_ARGS__)

◆ vid_v_u8m4

#define vid_v_u8m4 ( ... ) __riscv_vid_v_u8m4(__VA_ARGS__)

◆ vid_v_u8m4_m

#define vid_v_u8m4_m ( ... ) __riscv_vid_v_u8m4_tumu(__VA_ARGS__)

◆ vid_v_u8m8

#define vid_v_u8m8 ( ... ) __riscv_vid_v_u8m8(__VA_ARGS__)

◆ vid_v_u8m8_m

#define vid_v_u8m8_m ( ... ) __riscv_vid_v_u8m8_tumu(__VA_ARGS__)

◆ vid_v_u8mf2

#define vid_v_u8mf2 ( ... ) __riscv_vid_v_u8mf2(__VA_ARGS__)

◆ vid_v_u8mf2_m

#define vid_v_u8mf2_m ( ... ) __riscv_vid_v_u8mf2_tumu(__VA_ARGS__)

◆ vid_v_u8mf4

#define vid_v_u8mf4 ( ... ) __riscv_vid_v_u8mf4(__VA_ARGS__)

◆ vid_v_u8mf4_m

#define vid_v_u8mf4_m ( ... ) __riscv_vid_v_u8mf4_tumu(__VA_ARGS__)

◆ vid_v_u8mf8

#define vid_v_u8mf8 ( ... ) __riscv_vid_v_u8mf8(__VA_ARGS__)

◆ vid_v_u8mf8_m

#define vid_v_u8mf8_m ( ... ) __riscv_vid_v_u8mf8_tumu(__VA_ARGS__)

◆ viota_m_u16m1

#define viota_m_u16m1 ( ... ) __riscv_viota_m_u16m1(__VA_ARGS__)

◆ viota_m_u16m1_m

#define viota_m_u16m1_m ( ... ) __riscv_viota_m_u16m1_tumu(__VA_ARGS__)

◆ viota_m_u16m2

#define viota_m_u16m2 ( ... ) __riscv_viota_m_u16m2(__VA_ARGS__)

◆ viota_m_u16m2_m

#define viota_m_u16m2_m ( ... ) __riscv_viota_m_u16m2_tumu(__VA_ARGS__)

◆ viota_m_u16m4

#define viota_m_u16m4 ( ... ) __riscv_viota_m_u16m4(__VA_ARGS__)

◆ viota_m_u16m4_m

#define viota_m_u16m4_m ( ... ) __riscv_viota_m_u16m4_tumu(__VA_ARGS__)

◆ viota_m_u16m8

#define viota_m_u16m8 ( ... ) __riscv_viota_m_u16m8(__VA_ARGS__)

◆ viota_m_u16m8_m

#define viota_m_u16m8_m ( ... ) __riscv_viota_m_u16m8_tumu(__VA_ARGS__)

◆ viota_m_u16mf2

#define viota_m_u16mf2 ( ... ) __riscv_viota_m_u16mf2(__VA_ARGS__)

◆ viota_m_u16mf2_m

#define viota_m_u16mf2_m ( ... ) __riscv_viota_m_u16mf2_tumu(__VA_ARGS__)

◆ viota_m_u16mf4

#define viota_m_u16mf4 ( ... ) __riscv_viota_m_u16mf4(__VA_ARGS__)

◆ viota_m_u16mf4_m

#define viota_m_u16mf4_m ( ... ) __riscv_viota_m_u16mf4_tumu(__VA_ARGS__)

◆ viota_m_u32m1

#define viota_m_u32m1 ( ... ) __riscv_viota_m_u32m1(__VA_ARGS__)

◆ viota_m_u32m1_m

#define viota_m_u32m1_m ( ... ) __riscv_viota_m_u32m1_tumu(__VA_ARGS__)

◆ viota_m_u32m2

#define viota_m_u32m2 ( ... ) __riscv_viota_m_u32m2(__VA_ARGS__)

◆ viota_m_u32m2_m

#define viota_m_u32m2_m ( ... ) __riscv_viota_m_u32m2_tumu(__VA_ARGS__)

◆ viota_m_u32m4

#define viota_m_u32m4 ( ... ) __riscv_viota_m_u32m4(__VA_ARGS__)

◆ viota_m_u32m4_m

#define viota_m_u32m4_m ( ... ) __riscv_viota_m_u32m4_tumu(__VA_ARGS__)

◆ viota_m_u32m8

#define viota_m_u32m8 ( ... ) __riscv_viota_m_u32m8(__VA_ARGS__)

◆ viota_m_u32m8_m

#define viota_m_u32m8_m ( ... ) __riscv_viota_m_u32m8_tumu(__VA_ARGS__)

◆ viota_m_u32mf2

#define viota_m_u32mf2 ( ... ) __riscv_viota_m_u32mf2(__VA_ARGS__)

◆ viota_m_u32mf2_m

#define viota_m_u32mf2_m ( ... ) __riscv_viota_m_u32mf2_tumu(__VA_ARGS__)

◆ viota_m_u64m1

#define viota_m_u64m1 ( ... ) __riscv_viota_m_u64m1(__VA_ARGS__)

◆ viota_m_u64m1_m

#define viota_m_u64m1_m ( ... ) __riscv_viota_m_u64m1_tumu(__VA_ARGS__)

◆ viota_m_u64m2

#define viota_m_u64m2 ( ... ) __riscv_viota_m_u64m2(__VA_ARGS__)

◆ viota_m_u64m2_m

#define viota_m_u64m2_m ( ... ) __riscv_viota_m_u64m2_tumu(__VA_ARGS__)

◆ viota_m_u64m4

#define viota_m_u64m4 ( ... ) __riscv_viota_m_u64m4(__VA_ARGS__)

◆ viota_m_u64m4_m

#define viota_m_u64m4_m ( ... ) __riscv_viota_m_u64m4_tumu(__VA_ARGS__)

◆ viota_m_u64m8

#define viota_m_u64m8 ( ... ) __riscv_viota_m_u64m8(__VA_ARGS__)

◆ viota_m_u64m8_m

#define viota_m_u64m8_m ( ... ) __riscv_viota_m_u64m8_tumu(__VA_ARGS__)

◆ viota_m_u8m1

#define viota_m_u8m1 ( ... ) __riscv_viota_m_u8m1(__VA_ARGS__)

◆ viota_m_u8m1_m

#define viota_m_u8m1_m ( ... ) __riscv_viota_m_u8m1_tumu(__VA_ARGS__)

◆ viota_m_u8m2

#define viota_m_u8m2 ( ... ) __riscv_viota_m_u8m2(__VA_ARGS__)

◆ viota_m_u8m2_m

#define viota_m_u8m2_m ( ... ) __riscv_viota_m_u8m2_tumu(__VA_ARGS__)

◆ viota_m_u8m4

#define viota_m_u8m4 ( ... ) __riscv_viota_m_u8m4(__VA_ARGS__)

◆ viota_m_u8m4_m

#define viota_m_u8m4_m ( ... ) __riscv_viota_m_u8m4_tumu(__VA_ARGS__)

◆ viota_m_u8m8

#define viota_m_u8m8 ( ... ) __riscv_viota_m_u8m8(__VA_ARGS__)

◆ viota_m_u8m8_m

#define viota_m_u8m8_m ( ... ) __riscv_viota_m_u8m8_tumu(__VA_ARGS__)

◆ viota_m_u8mf2

#define viota_m_u8mf2 ( ... ) __riscv_viota_m_u8mf2(__VA_ARGS__)

◆ viota_m_u8mf2_m

#define viota_m_u8mf2_m ( ... ) __riscv_viota_m_u8mf2_tumu(__VA_ARGS__)

◆ viota_m_u8mf4

#define viota_m_u8mf4 ( ... ) __riscv_viota_m_u8mf4(__VA_ARGS__)

◆ viota_m_u8mf4_m

#define viota_m_u8mf4_m ( ... ) __riscv_viota_m_u8mf4_tumu(__VA_ARGS__)

◆ viota_m_u8mf8

#define viota_m_u8mf8 ( ... ) __riscv_viota_m_u8mf8(__VA_ARGS__)

◆ viota_m_u8mf8_m

#define viota_m_u8mf8_m ( ... ) __riscv_viota_m_u8mf8_tumu(__VA_ARGS__)

◆ vle16_v_f16m1

#define vle16_v_f16m1 ( ... ) __riscv_vle16_v_f16m1(__VA_ARGS__)

◆ vle16_v_f16m1_m

#define vle16_v_f16m1_m ( ... ) __riscv_vle16_v_f16m1_tumu(__VA_ARGS__)

◆ vle16_v_f16m2

#define vle16_v_f16m2 ( ... ) __riscv_vle16_v_f16m2(__VA_ARGS__)

◆ vle16_v_f16m2_m

#define vle16_v_f16m2_m ( ... ) __riscv_vle16_v_f16m2_tumu(__VA_ARGS__)

◆ vle16_v_f16m4

#define vle16_v_f16m4 ( ... ) __riscv_vle16_v_f16m4(__VA_ARGS__)

◆ vle16_v_f16m4_m

#define vle16_v_f16m4_m ( ... ) __riscv_vle16_v_f16m4_tumu(__VA_ARGS__)

◆ vle16_v_f16m8

#define vle16_v_f16m8 ( ... ) __riscv_vle16_v_f16m8(__VA_ARGS__)

◆ vle16_v_f16m8_m

#define vle16_v_f16m8_m ( ... ) __riscv_vle16_v_f16m8_tumu(__VA_ARGS__)

◆ vle16_v_f16mf2

#define vle16_v_f16mf2 ( ... ) __riscv_vle16_v_f16mf2(__VA_ARGS__)

◆ vle16_v_f16mf2_m

#define vle16_v_f16mf2_m ( ... ) __riscv_vle16_v_f16mf2_tumu(__VA_ARGS__)

◆ vle16_v_f16mf4

#define vle16_v_f16mf4 ( ... ) __riscv_vle16_v_f16mf4(__VA_ARGS__)

◆ vle16_v_f16mf4_m

#define vle16_v_f16mf4_m ( ... ) __riscv_vle16_v_f16mf4_tumu(__VA_ARGS__)

◆ vle16_v_i16m1

#define vle16_v_i16m1 ( ... ) __riscv_vle16_v_i16m1(__VA_ARGS__)

◆ vle16_v_i16m1_m

#define vle16_v_i16m1_m ( ... ) __riscv_vle16_v_i16m1_tumu(__VA_ARGS__)

◆ vle16_v_i16m2

#define vle16_v_i16m2 ( ... ) __riscv_vle16_v_i16m2(__VA_ARGS__)

◆ vle16_v_i16m2_m

#define vle16_v_i16m2_m ( ... ) __riscv_vle16_v_i16m2_tumu(__VA_ARGS__)

◆ vle16_v_i16m4

#define vle16_v_i16m4 ( ... ) __riscv_vle16_v_i16m4(__VA_ARGS__)

◆ vle16_v_i16m4_m

#define vle16_v_i16m4_m ( ... ) __riscv_vle16_v_i16m4_tumu(__VA_ARGS__)

◆ vle16_v_i16m8

#define vle16_v_i16m8 ( ... ) __riscv_vle16_v_i16m8(__VA_ARGS__)

◆ vle16_v_i16m8_m

#define vle16_v_i16m8_m ( ... ) __riscv_vle16_v_i16m8_tumu(__VA_ARGS__)

◆ vle16_v_i16mf2

#define vle16_v_i16mf2 ( ... ) __riscv_vle16_v_i16mf2(__VA_ARGS__)

◆ vle16_v_i16mf2_m

#define vle16_v_i16mf2_m ( ... ) __riscv_vle16_v_i16mf2_tumu(__VA_ARGS__)

◆ vle16_v_i16mf4

#define vle16_v_i16mf4 ( ... ) __riscv_vle16_v_i16mf4(__VA_ARGS__)

◆ vle16_v_i16mf4_m

#define vle16_v_i16mf4_m ( ... ) __riscv_vle16_v_i16mf4_tumu(__VA_ARGS__)

◆ vle16_v_u16m1

#define vle16_v_u16m1 ( ... ) __riscv_vle16_v_u16m1(__VA_ARGS__)

◆ vle16_v_u16m1_m

#define vle16_v_u16m1_m ( ... ) __riscv_vle16_v_u16m1_tumu(__VA_ARGS__)

◆ vle16_v_u16m2

#define vle16_v_u16m2 ( ... ) __riscv_vle16_v_u16m2(__VA_ARGS__)

◆ vle16_v_u16m2_m

#define vle16_v_u16m2_m ( ... ) __riscv_vle16_v_u16m2_tumu(__VA_ARGS__)

◆ vle16_v_u16m4

#define vle16_v_u16m4 ( ... ) __riscv_vle16_v_u16m4(__VA_ARGS__)

◆ vle16_v_u16m4_m

#define vle16_v_u16m4_m ( ... ) __riscv_vle16_v_u16m4_tumu(__VA_ARGS__)

◆ vle16_v_u16m8

#define vle16_v_u16m8 ( ... ) __riscv_vle16_v_u16m8(__VA_ARGS__)

◆ vle16_v_u16m8_m

#define vle16_v_u16m8_m ( ... ) __riscv_vle16_v_u16m8_tumu(__VA_ARGS__)

◆ vle16_v_u16mf2

#define vle16_v_u16mf2 ( ... ) __riscv_vle16_v_u16mf2(__VA_ARGS__)

◆ vle16_v_u16mf2_m

#define vle16_v_u16mf2_m ( ... ) __riscv_vle16_v_u16mf2_tumu(__VA_ARGS__)

◆ vle16_v_u16mf4

#define vle16_v_u16mf4 ( ... ) __riscv_vle16_v_u16mf4(__VA_ARGS__)

◆ vle16_v_u16mf4_m

#define vle16_v_u16mf4_m ( ... ) __riscv_vle16_v_u16mf4_tumu(__VA_ARGS__)

◆ vle16ff_v_f16m1

#define vle16ff_v_f16m1 ( ... ) __riscv_vle16ff_v_f16m1(__VA_ARGS__)

◆ vle16ff_v_f16m1_m

#define vle16ff_v_f16m1_m ( ... ) __riscv_vle16ff_v_f16m1_tumu(__VA_ARGS__)

◆ vle16ff_v_f16m2

#define vle16ff_v_f16m2 ( ... ) __riscv_vle16ff_v_f16m2(__VA_ARGS__)

◆ vle16ff_v_f16m2_m

#define vle16ff_v_f16m2_m ( ... ) __riscv_vle16ff_v_f16m2_tumu(__VA_ARGS__)

◆ vle16ff_v_f16m4

#define vle16ff_v_f16m4 ( ... ) __riscv_vle16ff_v_f16m4(__VA_ARGS__)

◆ vle16ff_v_f16m4_m

#define vle16ff_v_f16m4_m ( ... ) __riscv_vle16ff_v_f16m4_tumu(__VA_ARGS__)

◆ vle16ff_v_f16m8

#define vle16ff_v_f16m8 ( ... ) __riscv_vle16ff_v_f16m8(__VA_ARGS__)

◆ vle16ff_v_f16m8_m

#define vle16ff_v_f16m8_m ( ... ) __riscv_vle16ff_v_f16m8_tumu(__VA_ARGS__)

◆ vle16ff_v_f16mf2

#define vle16ff_v_f16mf2 ( ... ) __riscv_vle16ff_v_f16mf2(__VA_ARGS__)

◆ vle16ff_v_f16mf2_m

#define vle16ff_v_f16mf2_m ( ... ) __riscv_vle16ff_v_f16mf2_tumu(__VA_ARGS__)

◆ vle16ff_v_f16mf4

#define vle16ff_v_f16mf4 ( ... ) __riscv_vle16ff_v_f16mf4(__VA_ARGS__)

◆ vle16ff_v_f16mf4_m

#define vle16ff_v_f16mf4_m ( ... ) __riscv_vle16ff_v_f16mf4_tumu(__VA_ARGS__)

◆ vle16ff_v_i16m1

#define vle16ff_v_i16m1 ( ... ) __riscv_vle16ff_v_i16m1(__VA_ARGS__)

◆ vle16ff_v_i16m1_m

#define vle16ff_v_i16m1_m ( ... ) __riscv_vle16ff_v_i16m1_tumu(__VA_ARGS__)

◆ vle16ff_v_i16m2

#define vle16ff_v_i16m2 ( ... ) __riscv_vle16ff_v_i16m2(__VA_ARGS__)

◆ vle16ff_v_i16m2_m

#define vle16ff_v_i16m2_m ( ... ) __riscv_vle16ff_v_i16m2_tumu(__VA_ARGS__)

◆ vle16ff_v_i16m4

#define vle16ff_v_i16m4 ( ... ) __riscv_vle16ff_v_i16m4(__VA_ARGS__)

◆ vle16ff_v_i16m4_m

#define vle16ff_v_i16m4_m ( ... ) __riscv_vle16ff_v_i16m4_tumu(__VA_ARGS__)

◆ vle16ff_v_i16m8

#define vle16ff_v_i16m8 ( ... ) __riscv_vle16ff_v_i16m8(__VA_ARGS__)

◆ vle16ff_v_i16m8_m

#define vle16ff_v_i16m8_m ( ... ) __riscv_vle16ff_v_i16m8_tumu(__VA_ARGS__)

◆ vle16ff_v_i16mf2

#define vle16ff_v_i16mf2 ( ... ) __riscv_vle16ff_v_i16mf2(__VA_ARGS__)

◆ vle16ff_v_i16mf2_m

#define vle16ff_v_i16mf2_m ( ... ) __riscv_vle16ff_v_i16mf2_tumu(__VA_ARGS__)

◆ vle16ff_v_i16mf4

#define vle16ff_v_i16mf4 ( ... ) __riscv_vle16ff_v_i16mf4(__VA_ARGS__)

◆ vle16ff_v_i16mf4_m

#define vle16ff_v_i16mf4_m ( ... ) __riscv_vle16ff_v_i16mf4_tumu(__VA_ARGS__)

◆ vle16ff_v_u16m1

#define vle16ff_v_u16m1 ( ... ) __riscv_vle16ff_v_u16m1(__VA_ARGS__)

◆ vle16ff_v_u16m1_m

#define vle16ff_v_u16m1_m ( ... ) __riscv_vle16ff_v_u16m1_tumu(__VA_ARGS__)

◆ vle16ff_v_u16m2

#define vle16ff_v_u16m2 ( ... ) __riscv_vle16ff_v_u16m2(__VA_ARGS__)

◆ vle16ff_v_u16m2_m

#define vle16ff_v_u16m2_m ( ... ) __riscv_vle16ff_v_u16m2_tumu(__VA_ARGS__)

◆ vle16ff_v_u16m4

#define vle16ff_v_u16m4 ( ... ) __riscv_vle16ff_v_u16m4(__VA_ARGS__)

◆ vle16ff_v_u16m4_m

#define vle16ff_v_u16m4_m ( ... ) __riscv_vle16ff_v_u16m4_tumu(__VA_ARGS__)

◆ vle16ff_v_u16m8

#define vle16ff_v_u16m8 ( ... ) __riscv_vle16ff_v_u16m8(__VA_ARGS__)

◆ vle16ff_v_u16m8_m

#define vle16ff_v_u16m8_m ( ... ) __riscv_vle16ff_v_u16m8_tumu(__VA_ARGS__)

◆ vle16ff_v_u16mf2

#define vle16ff_v_u16mf2 ( ... ) __riscv_vle16ff_v_u16mf2(__VA_ARGS__)

◆ vle16ff_v_u16mf2_m

#define vle16ff_v_u16mf2_m ( ... ) __riscv_vle16ff_v_u16mf2_tumu(__VA_ARGS__)

◆ vle16ff_v_u16mf4

#define vle16ff_v_u16mf4 ( ... ) __riscv_vle16ff_v_u16mf4(__VA_ARGS__)

◆ vle16ff_v_u16mf4_m

#define vle16ff_v_u16mf4_m ( ... ) __riscv_vle16ff_v_u16mf4_tumu(__VA_ARGS__)

◆ vle32_v_f32m1

#define vle32_v_f32m1 ( ... ) __riscv_vle32_v_f32m1(__VA_ARGS__)

◆ vle32_v_f32m1_m

#define vle32_v_f32m1_m ( ... ) __riscv_vle32_v_f32m1_tumu(__VA_ARGS__)

◆ vle32_v_f32m2

#define vle32_v_f32m2 ( ... ) __riscv_vle32_v_f32m2(__VA_ARGS__)

◆ vle32_v_f32m2_m

#define vle32_v_f32m2_m ( ... ) __riscv_vle32_v_f32m2_tumu(__VA_ARGS__)

◆ vle32_v_f32m4

#define vle32_v_f32m4 ( ... ) __riscv_vle32_v_f32m4(__VA_ARGS__)

◆ vle32_v_f32m4_m

#define vle32_v_f32m4_m ( ... ) __riscv_vle32_v_f32m4_tumu(__VA_ARGS__)

◆ vle32_v_f32m8

#define vle32_v_f32m8 ( ... ) __riscv_vle32_v_f32m8(__VA_ARGS__)

◆ vle32_v_f32m8_m

#define vle32_v_f32m8_m ( ... ) __riscv_vle32_v_f32m8_tumu(__VA_ARGS__)

◆ vle32_v_f32mf2

#define vle32_v_f32mf2 ( ... ) __riscv_vle32_v_f32mf2(__VA_ARGS__)

◆ vle32_v_f32mf2_m

#define vle32_v_f32mf2_m ( ... ) __riscv_vle32_v_f32mf2_tumu(__VA_ARGS__)

◆ vle32_v_i32m1

#define vle32_v_i32m1 ( ... ) __riscv_vle32_v_i32m1(__VA_ARGS__)

◆ vle32_v_i32m1_m

#define vle32_v_i32m1_m ( ... ) __riscv_vle32_v_i32m1_tumu(__VA_ARGS__)

◆ vle32_v_i32m2

#define vle32_v_i32m2 ( ... ) __riscv_vle32_v_i32m2(__VA_ARGS__)

◆ vle32_v_i32m2_m

#define vle32_v_i32m2_m ( ... ) __riscv_vle32_v_i32m2_tumu(__VA_ARGS__)

◆ vle32_v_i32m4

#define vle32_v_i32m4 ( ... ) __riscv_vle32_v_i32m4(__VA_ARGS__)

◆ vle32_v_i32m4_m

#define vle32_v_i32m4_m ( ... ) __riscv_vle32_v_i32m4_tumu(__VA_ARGS__)

◆ vle32_v_i32m8

#define vle32_v_i32m8 ( ... ) __riscv_vle32_v_i32m8(__VA_ARGS__)

◆ vle32_v_i32m8_m

#define vle32_v_i32m8_m ( ... ) __riscv_vle32_v_i32m8_tumu(__VA_ARGS__)

◆ vle32_v_i32mf2

#define vle32_v_i32mf2 ( ... ) __riscv_vle32_v_i32mf2(__VA_ARGS__)

◆ vle32_v_i32mf2_m

#define vle32_v_i32mf2_m ( ... ) __riscv_vle32_v_i32mf2_tumu(__VA_ARGS__)

◆ vle32_v_u32m1

#define vle32_v_u32m1 ( ... ) __riscv_vle32_v_u32m1(__VA_ARGS__)

◆ vle32_v_u32m1_m

#define vle32_v_u32m1_m ( ... ) __riscv_vle32_v_u32m1_tumu(__VA_ARGS__)

◆ vle32_v_u32m2

#define vle32_v_u32m2 ( ... ) __riscv_vle32_v_u32m2(__VA_ARGS__)

◆ vle32_v_u32m2_m

#define vle32_v_u32m2_m ( ... ) __riscv_vle32_v_u32m2_tumu(__VA_ARGS__)

◆ vle32_v_u32m4

#define vle32_v_u32m4 ( ... ) __riscv_vle32_v_u32m4(__VA_ARGS__)

◆ vle32_v_u32m4_m

#define vle32_v_u32m4_m ( ... ) __riscv_vle32_v_u32m4_tumu(__VA_ARGS__)

◆ vle32_v_u32m8

#define vle32_v_u32m8 ( ... ) __riscv_vle32_v_u32m8(__VA_ARGS__)

◆ vle32_v_u32m8_m

#define vle32_v_u32m8_m ( ... ) __riscv_vle32_v_u32m8_tumu(__VA_ARGS__)

◆ vle32_v_u32mf2

#define vle32_v_u32mf2 ( ... ) __riscv_vle32_v_u32mf2(__VA_ARGS__)

◆ vle32_v_u32mf2_m

#define vle32_v_u32mf2_m ( ... ) __riscv_vle32_v_u32mf2_tumu(__VA_ARGS__)

◆ vle32ff_v_f32m1

#define vle32ff_v_f32m1 ( ... ) __riscv_vle32ff_v_f32m1(__VA_ARGS__)

◆ vle32ff_v_f32m1_m

#define vle32ff_v_f32m1_m ( ... ) __riscv_vle32ff_v_f32m1_tumu(__VA_ARGS__)

◆ vle32ff_v_f32m2

#define vle32ff_v_f32m2 ( ... ) __riscv_vle32ff_v_f32m2(__VA_ARGS__)

◆ vle32ff_v_f32m2_m

#define vle32ff_v_f32m2_m ( ... ) __riscv_vle32ff_v_f32m2_tumu(__VA_ARGS__)

◆ vle32ff_v_f32m4

#define vle32ff_v_f32m4 ( ... ) __riscv_vle32ff_v_f32m4(__VA_ARGS__)

◆ vle32ff_v_f32m4_m

#define vle32ff_v_f32m4_m ( ... ) __riscv_vle32ff_v_f32m4_tumu(__VA_ARGS__)

◆ vle32ff_v_f32m8

#define vle32ff_v_f32m8 ( ... ) __riscv_vle32ff_v_f32m8(__VA_ARGS__)

◆ vle32ff_v_f32m8_m

#define vle32ff_v_f32m8_m ( ... ) __riscv_vle32ff_v_f32m8_tumu(__VA_ARGS__)

◆ vle32ff_v_f32mf2

#define vle32ff_v_f32mf2 ( ... ) __riscv_vle32ff_v_f32mf2(__VA_ARGS__)

◆ vle32ff_v_f32mf2_m

#define vle32ff_v_f32mf2_m ( ... ) __riscv_vle32ff_v_f32mf2_tumu(__VA_ARGS__)

◆ vle32ff_v_i32m1

#define vle32ff_v_i32m1 ( ... ) __riscv_vle32ff_v_i32m1(__VA_ARGS__)

◆ vle32ff_v_i32m1_m

#define vle32ff_v_i32m1_m ( ... ) __riscv_vle32ff_v_i32m1_tumu(__VA_ARGS__)

◆ vle32ff_v_i32m2

#define vle32ff_v_i32m2 ( ... ) __riscv_vle32ff_v_i32m2(__VA_ARGS__)

◆ vle32ff_v_i32m2_m

#define vle32ff_v_i32m2_m ( ... ) __riscv_vle32ff_v_i32m2_tumu(__VA_ARGS__)

◆ vle32ff_v_i32m4

#define vle32ff_v_i32m4 ( ... ) __riscv_vle32ff_v_i32m4(__VA_ARGS__)

◆ vle32ff_v_i32m4_m

#define vle32ff_v_i32m4_m ( ... ) __riscv_vle32ff_v_i32m4_tumu(__VA_ARGS__)

◆ vle32ff_v_i32m8

#define vle32ff_v_i32m8 ( ... ) __riscv_vle32ff_v_i32m8(__VA_ARGS__)

◆ vle32ff_v_i32m8_m

#define vle32ff_v_i32m8_m ( ... ) __riscv_vle32ff_v_i32m8_tumu(__VA_ARGS__)

◆ vle32ff_v_i32mf2

#define vle32ff_v_i32mf2 ( ... ) __riscv_vle32ff_v_i32mf2(__VA_ARGS__)

◆ vle32ff_v_i32mf2_m

#define vle32ff_v_i32mf2_m ( ... ) __riscv_vle32ff_v_i32mf2_tumu(__VA_ARGS__)

◆ vle32ff_v_u32m1

#define vle32ff_v_u32m1 ( ... ) __riscv_vle32ff_v_u32m1(__VA_ARGS__)

◆ vle32ff_v_u32m1_m

#define vle32ff_v_u32m1_m ( ... ) __riscv_vle32ff_v_u32m1_tumu(__VA_ARGS__)

◆ vle32ff_v_u32m2

#define vle32ff_v_u32m2 ( ... ) __riscv_vle32ff_v_u32m2(__VA_ARGS__)

◆ vle32ff_v_u32m2_m

#define vle32ff_v_u32m2_m ( ... ) __riscv_vle32ff_v_u32m2_tumu(__VA_ARGS__)

◆ vle32ff_v_u32m4

#define vle32ff_v_u32m4 ( ... ) __riscv_vle32ff_v_u32m4(__VA_ARGS__)

◆ vle32ff_v_u32m4_m

#define vle32ff_v_u32m4_m ( ... ) __riscv_vle32ff_v_u32m4_tumu(__VA_ARGS__)

◆ vle32ff_v_u32m8

#define vle32ff_v_u32m8 ( ... ) __riscv_vle32ff_v_u32m8(__VA_ARGS__)

◆ vle32ff_v_u32m8_m

#define vle32ff_v_u32m8_m ( ... ) __riscv_vle32ff_v_u32m8_tumu(__VA_ARGS__)

◆ vle32ff_v_u32mf2

#define vle32ff_v_u32mf2 ( ... ) __riscv_vle32ff_v_u32mf2(__VA_ARGS__)

◆ vle32ff_v_u32mf2_m

#define vle32ff_v_u32mf2_m ( ... ) __riscv_vle32ff_v_u32mf2_tumu(__VA_ARGS__)

◆ vle64_v_f64m1

#define vle64_v_f64m1 ( ... ) __riscv_vle64_v_f64m1(__VA_ARGS__)

◆ vle64_v_f64m1_m

#define vle64_v_f64m1_m ( ... ) __riscv_vle64_v_f64m1_tumu(__VA_ARGS__)

◆ vle64_v_f64m2

#define vle64_v_f64m2 ( ... ) __riscv_vle64_v_f64m2(__VA_ARGS__)

◆ vle64_v_f64m2_m

#define vle64_v_f64m2_m ( ... ) __riscv_vle64_v_f64m2_tumu(__VA_ARGS__)

◆ vle64_v_f64m4

#define vle64_v_f64m4 ( ... ) __riscv_vle64_v_f64m4(__VA_ARGS__)

◆ vle64_v_f64m4_m

#define vle64_v_f64m4_m ( ... ) __riscv_vle64_v_f64m4_tumu(__VA_ARGS__)

◆ vle64_v_f64m8

#define vle64_v_f64m8 ( ... ) __riscv_vle64_v_f64m8(__VA_ARGS__)

◆ vle64_v_f64m8_m

#define vle64_v_f64m8_m ( ... ) __riscv_vle64_v_f64m8_tumu(__VA_ARGS__)

◆ vle64_v_i64m1

#define vle64_v_i64m1 ( ... ) __riscv_vle64_v_i64m1(__VA_ARGS__)

◆ vle64_v_i64m1_m

#define vle64_v_i64m1_m ( ... ) __riscv_vle64_v_i64m1_tumu(__VA_ARGS__)

◆ vle64_v_i64m2

#define vle64_v_i64m2 ( ... ) __riscv_vle64_v_i64m2(__VA_ARGS__)

◆ vle64_v_i64m2_m

#define vle64_v_i64m2_m ( ... ) __riscv_vle64_v_i64m2_tumu(__VA_ARGS__)

◆ vle64_v_i64m4

#define vle64_v_i64m4 ( ... ) __riscv_vle64_v_i64m4(__VA_ARGS__)

◆ vle64_v_i64m4_m

#define vle64_v_i64m4_m ( ... ) __riscv_vle64_v_i64m4_tumu(__VA_ARGS__)

◆ vle64_v_i64m8

#define vle64_v_i64m8 ( ... ) __riscv_vle64_v_i64m8(__VA_ARGS__)

◆ vle64_v_i64m8_m

#define vle64_v_i64m8_m ( ... ) __riscv_vle64_v_i64m8_tumu(__VA_ARGS__)

◆ vle64_v_u64m1

#define vle64_v_u64m1 ( ... ) __riscv_vle64_v_u64m1(__VA_ARGS__)

◆ vle64_v_u64m1_m

#define vle64_v_u64m1_m ( ... ) __riscv_vle64_v_u64m1_tumu(__VA_ARGS__)

◆ vle64_v_u64m2

#define vle64_v_u64m2 ( ... ) __riscv_vle64_v_u64m2(__VA_ARGS__)

◆ vle64_v_u64m2_m

#define vle64_v_u64m2_m ( ... ) __riscv_vle64_v_u64m2_tumu(__VA_ARGS__)

◆ vle64_v_u64m4

#define vle64_v_u64m4 ( ... ) __riscv_vle64_v_u64m4(__VA_ARGS__)

◆ vle64_v_u64m4_m

#define vle64_v_u64m4_m ( ... ) __riscv_vle64_v_u64m4_tumu(__VA_ARGS__)

◆ vle64_v_u64m8

#define vle64_v_u64m8 ( ... ) __riscv_vle64_v_u64m8(__VA_ARGS__)

◆ vle64_v_u64m8_m

#define vle64_v_u64m8_m ( ... ) __riscv_vle64_v_u64m8_tumu(__VA_ARGS__)

◆ vle64ff_v_f64m1

#define vle64ff_v_f64m1 ( ... ) __riscv_vle64ff_v_f64m1(__VA_ARGS__)

◆ vle64ff_v_f64m1_m

#define vle64ff_v_f64m1_m ( ... ) __riscv_vle64ff_v_f64m1_tumu(__VA_ARGS__)

◆ vle64ff_v_f64m2

#define vle64ff_v_f64m2 ( ... ) __riscv_vle64ff_v_f64m2(__VA_ARGS__)

◆ vle64ff_v_f64m2_m

#define vle64ff_v_f64m2_m ( ... ) __riscv_vle64ff_v_f64m2_tumu(__VA_ARGS__)

◆ vle64ff_v_f64m4

#define vle64ff_v_f64m4 ( ... ) __riscv_vle64ff_v_f64m4(__VA_ARGS__)

◆ vle64ff_v_f64m4_m

#define vle64ff_v_f64m4_m ( ... ) __riscv_vle64ff_v_f64m4_tumu(__VA_ARGS__)

◆ vle64ff_v_f64m8

#define vle64ff_v_f64m8 ( ... ) __riscv_vle64ff_v_f64m8(__VA_ARGS__)

◆ vle64ff_v_f64m8_m

#define vle64ff_v_f64m8_m ( ... ) __riscv_vle64ff_v_f64m8_tumu(__VA_ARGS__)

◆ vle64ff_v_i64m1

#define vle64ff_v_i64m1 ( ... ) __riscv_vle64ff_v_i64m1(__VA_ARGS__)

◆ vle64ff_v_i64m1_m

#define vle64ff_v_i64m1_m ( ... ) __riscv_vle64ff_v_i64m1_tumu(__VA_ARGS__)

◆ vle64ff_v_i64m2

#define vle64ff_v_i64m2 ( ... ) __riscv_vle64ff_v_i64m2(__VA_ARGS__)

◆ vle64ff_v_i64m2_m

#define vle64ff_v_i64m2_m ( ... ) __riscv_vle64ff_v_i64m2_tumu(__VA_ARGS__)

◆ vle64ff_v_i64m4

#define vle64ff_v_i64m4 ( ... ) __riscv_vle64ff_v_i64m4(__VA_ARGS__)

◆ vle64ff_v_i64m4_m

#define vle64ff_v_i64m4_m ( ... ) __riscv_vle64ff_v_i64m4_tumu(__VA_ARGS__)

◆ vle64ff_v_i64m8

#define vle64ff_v_i64m8 ( ... ) __riscv_vle64ff_v_i64m8(__VA_ARGS__)

◆ vle64ff_v_i64m8_m

#define vle64ff_v_i64m8_m ( ... ) __riscv_vle64ff_v_i64m8_tumu(__VA_ARGS__)

◆ vle64ff_v_u64m1

#define vle64ff_v_u64m1 ( ... ) __riscv_vle64ff_v_u64m1(__VA_ARGS__)

◆ vle64ff_v_u64m1_m

#define vle64ff_v_u64m1_m ( ... ) __riscv_vle64ff_v_u64m1_tumu(__VA_ARGS__)

◆ vle64ff_v_u64m2

#define vle64ff_v_u64m2 ( ... ) __riscv_vle64ff_v_u64m2(__VA_ARGS__)

◆ vle64ff_v_u64m2_m

#define vle64ff_v_u64m2_m ( ... ) __riscv_vle64ff_v_u64m2_tumu(__VA_ARGS__)

◆ vle64ff_v_u64m4

#define vle64ff_v_u64m4 ( ... ) __riscv_vle64ff_v_u64m4(__VA_ARGS__)

◆ vle64ff_v_u64m4_m

#define vle64ff_v_u64m4_m ( ... ) __riscv_vle64ff_v_u64m4_tumu(__VA_ARGS__)

◆ vle64ff_v_u64m8

#define vle64ff_v_u64m8 ( ... ) __riscv_vle64ff_v_u64m8(__VA_ARGS__)

◆ vle64ff_v_u64m8_m

#define vle64ff_v_u64m8_m ( ... ) __riscv_vle64ff_v_u64m8_tumu(__VA_ARGS__)

◆ vle8_v_i8m1

#define vle8_v_i8m1 ( ... ) __riscv_vle8_v_i8m1(__VA_ARGS__)

◆ vle8_v_i8m1_m

#define vle8_v_i8m1_m ( ... ) __riscv_vle8_v_i8m1_tumu(__VA_ARGS__)

◆ vle8_v_i8m2

#define vle8_v_i8m2 ( ... ) __riscv_vle8_v_i8m2(__VA_ARGS__)

◆ vle8_v_i8m2_m

#define vle8_v_i8m2_m ( ... ) __riscv_vle8_v_i8m2_tumu(__VA_ARGS__)

◆ vle8_v_i8m4

#define vle8_v_i8m4 ( ... ) __riscv_vle8_v_i8m4(__VA_ARGS__)

◆ vle8_v_i8m4_m

#define vle8_v_i8m4_m ( ... ) __riscv_vle8_v_i8m4_tumu(__VA_ARGS__)

◆ vle8_v_i8m8

#define vle8_v_i8m8 ( ... ) __riscv_vle8_v_i8m8(__VA_ARGS__)

◆ vle8_v_i8m8_m

#define vle8_v_i8m8_m ( ... ) __riscv_vle8_v_i8m8_tumu(__VA_ARGS__)

◆ vle8_v_i8mf2

#define vle8_v_i8mf2 ( ... ) __riscv_vle8_v_i8mf2(__VA_ARGS__)

◆ vle8_v_i8mf2_m

#define vle8_v_i8mf2_m ( ... ) __riscv_vle8_v_i8mf2_tumu(__VA_ARGS__)

◆ vle8_v_i8mf4

#define vle8_v_i8mf4 ( ... ) __riscv_vle8_v_i8mf4(__VA_ARGS__)

◆ vle8_v_i8mf4_m

#define vle8_v_i8mf4_m ( ... ) __riscv_vle8_v_i8mf4_tumu(__VA_ARGS__)

◆ vle8_v_i8mf8

#define vle8_v_i8mf8 ( ... ) __riscv_vle8_v_i8mf8(__VA_ARGS__)

◆ vle8_v_i8mf8_m

#define vle8_v_i8mf8_m ( ... ) __riscv_vle8_v_i8mf8_tumu(__VA_ARGS__)

◆ vle8_v_u8m1

#define vle8_v_u8m1 ( ... ) __riscv_vle8_v_u8m1(__VA_ARGS__)

◆ vle8_v_u8m1_m

#define vle8_v_u8m1_m ( ... ) __riscv_vle8_v_u8m1_tumu(__VA_ARGS__)

◆ vle8_v_u8m2

#define vle8_v_u8m2 ( ... ) __riscv_vle8_v_u8m2(__VA_ARGS__)

◆ vle8_v_u8m2_m

#define vle8_v_u8m2_m ( ... ) __riscv_vle8_v_u8m2_tumu(__VA_ARGS__)

◆ vle8_v_u8m4

#define vle8_v_u8m4 ( ... ) __riscv_vle8_v_u8m4(__VA_ARGS__)

◆ vle8_v_u8m4_m

#define vle8_v_u8m4_m ( ... ) __riscv_vle8_v_u8m4_tumu(__VA_ARGS__)

◆ vle8_v_u8m8

#define vle8_v_u8m8 ( ... ) __riscv_vle8_v_u8m8(__VA_ARGS__)

◆ vle8_v_u8m8_m

#define vle8_v_u8m8_m ( ... ) __riscv_vle8_v_u8m8_tumu(__VA_ARGS__)

◆ vle8_v_u8mf2

#define vle8_v_u8mf2 ( ... ) __riscv_vle8_v_u8mf2(__VA_ARGS__)

◆ vle8_v_u8mf2_m

#define vle8_v_u8mf2_m ( ... ) __riscv_vle8_v_u8mf2_tumu(__VA_ARGS__)

◆ vle8_v_u8mf4

#define vle8_v_u8mf4 ( ... ) __riscv_vle8_v_u8mf4(__VA_ARGS__)

◆ vle8_v_u8mf4_m

#define vle8_v_u8mf4_m ( ... ) __riscv_vle8_v_u8mf4_tumu(__VA_ARGS__)

◆ vle8_v_u8mf8

#define vle8_v_u8mf8 ( ... ) __riscv_vle8_v_u8mf8(__VA_ARGS__)

◆ vle8_v_u8mf8_m

#define vle8_v_u8mf8_m ( ... ) __riscv_vle8_v_u8mf8_tumu(__VA_ARGS__)

◆ vle8ff_v_i8m1

#define vle8ff_v_i8m1 ( ... ) __riscv_vle8ff_v_i8m1(__VA_ARGS__)

◆ vle8ff_v_i8m1_m

#define vle8ff_v_i8m1_m ( ... ) __riscv_vle8ff_v_i8m1_tumu(__VA_ARGS__)

◆ vle8ff_v_i8m2

#define vle8ff_v_i8m2 ( ... ) __riscv_vle8ff_v_i8m2(__VA_ARGS__)

◆ vle8ff_v_i8m2_m

#define vle8ff_v_i8m2_m ( ... ) __riscv_vle8ff_v_i8m2_tumu(__VA_ARGS__)

◆ vle8ff_v_i8m4

#define vle8ff_v_i8m4 ( ... ) __riscv_vle8ff_v_i8m4(__VA_ARGS__)

◆ vle8ff_v_i8m4_m

#define vle8ff_v_i8m4_m ( ... ) __riscv_vle8ff_v_i8m4_tumu(__VA_ARGS__)

◆ vle8ff_v_i8m8

#define vle8ff_v_i8m8 ( ... ) __riscv_vle8ff_v_i8m8(__VA_ARGS__)

◆ vle8ff_v_i8m8_m

#define vle8ff_v_i8m8_m ( ... ) __riscv_vle8ff_v_i8m8_tumu(__VA_ARGS__)

◆ vle8ff_v_i8mf2

#define vle8ff_v_i8mf2 ( ... ) __riscv_vle8ff_v_i8mf2(__VA_ARGS__)

◆ vle8ff_v_i8mf2_m

#define vle8ff_v_i8mf2_m ( ... ) __riscv_vle8ff_v_i8mf2_tumu(__VA_ARGS__)

◆ vle8ff_v_i8mf4

#define vle8ff_v_i8mf4 ( ... ) __riscv_vle8ff_v_i8mf4(__VA_ARGS__)

◆ vle8ff_v_i8mf4_m

#define vle8ff_v_i8mf4_m ( ... ) __riscv_vle8ff_v_i8mf4_tumu(__VA_ARGS__)

◆ vle8ff_v_i8mf8

#define vle8ff_v_i8mf8 ( ... ) __riscv_vle8ff_v_i8mf8(__VA_ARGS__)

◆ vle8ff_v_i8mf8_m

#define vle8ff_v_i8mf8_m ( ... ) __riscv_vle8ff_v_i8mf8_tumu(__VA_ARGS__)

◆ vle8ff_v_u8m1

#define vle8ff_v_u8m1 ( ... ) __riscv_vle8ff_v_u8m1(__VA_ARGS__)

◆ vle8ff_v_u8m1_m

#define vle8ff_v_u8m1_m ( ... ) __riscv_vle8ff_v_u8m1_tumu(__VA_ARGS__)

◆ vle8ff_v_u8m2

#define vle8ff_v_u8m2 ( ... ) __riscv_vle8ff_v_u8m2(__VA_ARGS__)

◆ vle8ff_v_u8m2_m

#define vle8ff_v_u8m2_m ( ... ) __riscv_vle8ff_v_u8m2_tumu(__VA_ARGS__)

◆ vle8ff_v_u8m4

#define vle8ff_v_u8m4 ( ... ) __riscv_vle8ff_v_u8m4(__VA_ARGS__)

◆ vle8ff_v_u8m4_m

#define vle8ff_v_u8m4_m ( ... ) __riscv_vle8ff_v_u8m4_tumu(__VA_ARGS__)

◆ vle8ff_v_u8m8

#define vle8ff_v_u8m8 ( ... ) __riscv_vle8ff_v_u8m8(__VA_ARGS__)

◆ vle8ff_v_u8m8_m

#define vle8ff_v_u8m8_m ( ... ) __riscv_vle8ff_v_u8m8_tumu(__VA_ARGS__)

◆ vle8ff_v_u8mf2

#define vle8ff_v_u8mf2 ( ... ) __riscv_vle8ff_v_u8mf2(__VA_ARGS__)

◆ vle8ff_v_u8mf2_m

#define vle8ff_v_u8mf2_m ( ... ) __riscv_vle8ff_v_u8mf2_tumu(__VA_ARGS__)

◆ vle8ff_v_u8mf4

#define vle8ff_v_u8mf4 ( ... ) __riscv_vle8ff_v_u8mf4(__VA_ARGS__)

◆ vle8ff_v_u8mf4_m

#define vle8ff_v_u8mf4_m ( ... ) __riscv_vle8ff_v_u8mf4_tumu(__VA_ARGS__)

◆ vle8ff_v_u8mf8

#define vle8ff_v_u8mf8 ( ... ) __riscv_vle8ff_v_u8mf8(__VA_ARGS__)

◆ vle8ff_v_u8mf8_m

#define vle8ff_v_u8mf8_m ( ... ) __riscv_vle8ff_v_u8mf8_tumu(__VA_ARGS__)

◆ vlm_v_b1

#define vlm_v_b1 ( ... ) __riscv_vlm_v_b1(__VA_ARGS__)

◆ vlm_v_b16

#define vlm_v_b16 ( ... ) __riscv_vlm_v_b16(__VA_ARGS__)

◆ vlm_v_b2

#define vlm_v_b2 ( ... ) __riscv_vlm_v_b2(__VA_ARGS__)

◆ vlm_v_b32

#define vlm_v_b32 ( ... ) __riscv_vlm_v_b32(__VA_ARGS__)

◆ vlm_v_b4

#define vlm_v_b4 ( ... ) __riscv_vlm_v_b4(__VA_ARGS__)

◆ vlm_v_b64

#define vlm_v_b64 ( ... ) __riscv_vlm_v_b64(__VA_ARGS__)

◆ vlm_v_b8

#define vlm_v_b8 ( ... ) __riscv_vlm_v_b8(__VA_ARGS__)

◆ vlmul_ext_v_f16m1_f16m2

#define vlmul_ext_v_f16m1_f16m2 ( ... ) __riscv_vlmul_ext_v_f16m1_f16m2(__VA_ARGS__)

◆ vlmul_ext_v_f16m1_f16m4

#define vlmul_ext_v_f16m1_f16m4 ( ... ) __riscv_vlmul_ext_v_f16m1_f16m4(__VA_ARGS__)

◆ vlmul_ext_v_f16m1_f16m8

#define vlmul_ext_v_f16m1_f16m8 ( ... ) __riscv_vlmul_ext_v_f16m1_f16m8(__VA_ARGS__)

◆ vlmul_ext_v_f16m2_f16m4

#define vlmul_ext_v_f16m2_f16m4 ( ... ) __riscv_vlmul_ext_v_f16m2_f16m4(__VA_ARGS__)

◆ vlmul_ext_v_f16m2_f16m8

#define vlmul_ext_v_f16m2_f16m8 ( ... ) __riscv_vlmul_ext_v_f16m2_f16m8(__VA_ARGS__)

◆ vlmul_ext_v_f16m4_f16m8

#define vlmul_ext_v_f16m4_f16m8 ( ... ) __riscv_vlmul_ext_v_f16m4_f16m8(__VA_ARGS__)

◆ vlmul_ext_v_f16mf2_f16m1

#define vlmul_ext_v_f16mf2_f16m1 ( ... ) __riscv_vlmul_ext_v_f16mf2_f16m1(__VA_ARGS__)

◆ vlmul_ext_v_f16mf2_f16m2

#define vlmul_ext_v_f16mf2_f16m2 ( ... ) __riscv_vlmul_ext_v_f16mf2_f16m2(__VA_ARGS__)

◆ vlmul_ext_v_f16mf2_f16m4

#define vlmul_ext_v_f16mf2_f16m4 ( ... ) __riscv_vlmul_ext_v_f16mf2_f16m4(__VA_ARGS__)

◆ vlmul_ext_v_f16mf2_f16m8

#define vlmul_ext_v_f16mf2_f16m8 ( ... ) __riscv_vlmul_ext_v_f16mf2_f16m8(__VA_ARGS__)

◆ vlmul_ext_v_f16mf4_f16m1

#define vlmul_ext_v_f16mf4_f16m1 ( ... ) __riscv_vlmul_ext_v_f16mf4_f16m1(__VA_ARGS__)

◆ vlmul_ext_v_f16mf4_f16m2

#define vlmul_ext_v_f16mf4_f16m2 ( ... ) __riscv_vlmul_ext_v_f16mf4_f16m2(__VA_ARGS__)

◆ vlmul_ext_v_f16mf4_f16m4

#define vlmul_ext_v_f16mf4_f16m4 ( ... ) __riscv_vlmul_ext_v_f16mf4_f16m4(__VA_ARGS__)

◆ vlmul_ext_v_f16mf4_f16m8

#define vlmul_ext_v_f16mf4_f16m8 ( ... ) __riscv_vlmul_ext_v_f16mf4_f16m8(__VA_ARGS__)

◆ vlmul_ext_v_f16mf4_f16mf2

#define vlmul_ext_v_f16mf4_f16mf2 ( ... ) __riscv_vlmul_ext_v_f16mf4_f16mf2(__VA_ARGS__)

◆ vlmul_ext_v_f32m1_f32m2

#define vlmul_ext_v_f32m1_f32m2 ( ... ) __riscv_vlmul_ext_v_f32m1_f32m2(__VA_ARGS__)

◆ vlmul_ext_v_f32m1_f32m4

#define vlmul_ext_v_f32m1_f32m4 ( ... ) __riscv_vlmul_ext_v_f32m1_f32m4(__VA_ARGS__)

◆ vlmul_ext_v_f32m1_f32m8

#define vlmul_ext_v_f32m1_f32m8 ( ... ) __riscv_vlmul_ext_v_f32m1_f32m8(__VA_ARGS__)

◆ vlmul_ext_v_f32m2_f32m4

#define vlmul_ext_v_f32m2_f32m4 ( ... ) __riscv_vlmul_ext_v_f32m2_f32m4(__VA_ARGS__)

◆ vlmul_ext_v_f32m2_f32m8

#define vlmul_ext_v_f32m2_f32m8 ( ... ) __riscv_vlmul_ext_v_f32m2_f32m8(__VA_ARGS__)

◆ vlmul_ext_v_f32m4_f32m8

#define vlmul_ext_v_f32m4_f32m8 ( ... ) __riscv_vlmul_ext_v_f32m4_f32m8(__VA_ARGS__)

◆ vlmul_ext_v_f32mf2_f32m1

#define vlmul_ext_v_f32mf2_f32m1 ( ... ) __riscv_vlmul_ext_v_f32mf2_f32m1(__VA_ARGS__)

◆ vlmul_ext_v_f32mf2_f32m2

#define vlmul_ext_v_f32mf2_f32m2 ( ... ) __riscv_vlmul_ext_v_f32mf2_f32m2(__VA_ARGS__)

◆ vlmul_ext_v_f32mf2_f32m4

#define vlmul_ext_v_f32mf2_f32m4 ( ... ) __riscv_vlmul_ext_v_f32mf2_f32m4(__VA_ARGS__)

◆ vlmul_ext_v_f32mf2_f32m8

#define vlmul_ext_v_f32mf2_f32m8 ( ... ) __riscv_vlmul_ext_v_f32mf2_f32m8(__VA_ARGS__)

◆ vlmul_ext_v_f64m1_f64m2

#define vlmul_ext_v_f64m1_f64m2 ( ... ) __riscv_vlmul_ext_v_f64m1_f64m2(__VA_ARGS__)

◆ vlmul_ext_v_f64m1_f64m4

#define vlmul_ext_v_f64m1_f64m4 ( ... ) __riscv_vlmul_ext_v_f64m1_f64m4(__VA_ARGS__)

◆ vlmul_ext_v_f64m1_f64m8

#define vlmul_ext_v_f64m1_f64m8 ( ... ) __riscv_vlmul_ext_v_f64m1_f64m8(__VA_ARGS__)

◆ vlmul_ext_v_f64m2_f64m4

#define vlmul_ext_v_f64m2_f64m4 ( ... ) __riscv_vlmul_ext_v_f64m2_f64m4(__VA_ARGS__)

◆ vlmul_ext_v_f64m2_f64m8

#define vlmul_ext_v_f64m2_f64m8 ( ... ) __riscv_vlmul_ext_v_f64m2_f64m8(__VA_ARGS__)

◆ vlmul_ext_v_f64m4_f64m8

#define vlmul_ext_v_f64m4_f64m8 ( ... ) __riscv_vlmul_ext_v_f64m4_f64m8(__VA_ARGS__)

◆ vlmul_ext_v_i16m1_i16m2

#define vlmul_ext_v_i16m1_i16m2 ( ... ) __riscv_vlmul_ext_v_i16m1_i16m2(__VA_ARGS__)

◆ vlmul_ext_v_i16m1_i16m4

#define vlmul_ext_v_i16m1_i16m4 ( ... ) __riscv_vlmul_ext_v_i16m1_i16m4(__VA_ARGS__)

◆ vlmul_ext_v_i16m1_i16m8

#define vlmul_ext_v_i16m1_i16m8 ( ... ) __riscv_vlmul_ext_v_i16m1_i16m8(__VA_ARGS__)

◆ vlmul_ext_v_i16m2_i16m4

#define vlmul_ext_v_i16m2_i16m4 ( ... ) __riscv_vlmul_ext_v_i16m2_i16m4(__VA_ARGS__)

◆ vlmul_ext_v_i16m2_i16m8

#define vlmul_ext_v_i16m2_i16m8 ( ... ) __riscv_vlmul_ext_v_i16m2_i16m8(__VA_ARGS__)

◆ vlmul_ext_v_i16m4_i16m8

#define vlmul_ext_v_i16m4_i16m8 ( ... ) __riscv_vlmul_ext_v_i16m4_i16m8(__VA_ARGS__)

◆ vlmul_ext_v_i16mf2_i16m1

#define vlmul_ext_v_i16mf2_i16m1 ( ... ) __riscv_vlmul_ext_v_i16mf2_i16m1(__VA_ARGS__)

◆ vlmul_ext_v_i16mf2_i16m2

#define vlmul_ext_v_i16mf2_i16m2 ( ... ) __riscv_vlmul_ext_v_i16mf2_i16m2(__VA_ARGS__)

◆ vlmul_ext_v_i16mf2_i16m4

#define vlmul_ext_v_i16mf2_i16m4 ( ... ) __riscv_vlmul_ext_v_i16mf2_i16m4(__VA_ARGS__)

◆ vlmul_ext_v_i16mf2_i16m8

#define vlmul_ext_v_i16mf2_i16m8 ( ... ) __riscv_vlmul_ext_v_i16mf2_i16m8(__VA_ARGS__)

◆ vlmul_ext_v_i16mf4_i16m1

#define vlmul_ext_v_i16mf4_i16m1 ( ... ) __riscv_vlmul_ext_v_i16mf4_i16m1(__VA_ARGS__)

◆ vlmul_ext_v_i16mf4_i16m2

#define vlmul_ext_v_i16mf4_i16m2 ( ... ) __riscv_vlmul_ext_v_i16mf4_i16m2(__VA_ARGS__)

◆ vlmul_ext_v_i16mf4_i16m4

#define vlmul_ext_v_i16mf4_i16m4 ( ... ) __riscv_vlmul_ext_v_i16mf4_i16m4(__VA_ARGS__)

◆ vlmul_ext_v_i16mf4_i16m8

#define vlmul_ext_v_i16mf4_i16m8 ( ... ) __riscv_vlmul_ext_v_i16mf4_i16m8(__VA_ARGS__)

◆ vlmul_ext_v_i16mf4_i16mf2

#define vlmul_ext_v_i16mf4_i16mf2 ( ... ) __riscv_vlmul_ext_v_i16mf4_i16mf2(__VA_ARGS__)

◆ vlmul_ext_v_i32m1_i32m2

#define vlmul_ext_v_i32m1_i32m2 ( ... ) __riscv_vlmul_ext_v_i32m1_i32m2(__VA_ARGS__)

◆ vlmul_ext_v_i32m1_i32m4

#define vlmul_ext_v_i32m1_i32m4 ( ... ) __riscv_vlmul_ext_v_i32m1_i32m4(__VA_ARGS__)

◆ vlmul_ext_v_i32m1_i32m8

#define vlmul_ext_v_i32m1_i32m8 ( ... ) __riscv_vlmul_ext_v_i32m1_i32m8(__VA_ARGS__)

◆ vlmul_ext_v_i32m2_i32m4

#define vlmul_ext_v_i32m2_i32m4 ( ... ) __riscv_vlmul_ext_v_i32m2_i32m4(__VA_ARGS__)

◆ vlmul_ext_v_i32m2_i32m8

#define vlmul_ext_v_i32m2_i32m8 ( ... ) __riscv_vlmul_ext_v_i32m2_i32m8(__VA_ARGS__)

◆ vlmul_ext_v_i32m4_i32m8

#define vlmul_ext_v_i32m4_i32m8 ( ... ) __riscv_vlmul_ext_v_i32m4_i32m8(__VA_ARGS__)

◆ vlmul_ext_v_i32mf2_i32m1

#define vlmul_ext_v_i32mf2_i32m1 ( ... ) __riscv_vlmul_ext_v_i32mf2_i32m1(__VA_ARGS__)

◆ vlmul_ext_v_i32mf2_i32m2

#define vlmul_ext_v_i32mf2_i32m2 ( ... ) __riscv_vlmul_ext_v_i32mf2_i32m2(__VA_ARGS__)

◆ vlmul_ext_v_i32mf2_i32m4

#define vlmul_ext_v_i32mf2_i32m4 ( ... ) __riscv_vlmul_ext_v_i32mf2_i32m4(__VA_ARGS__)

◆ vlmul_ext_v_i32mf2_i32m8

#define vlmul_ext_v_i32mf2_i32m8 ( ... ) __riscv_vlmul_ext_v_i32mf2_i32m8(__VA_ARGS__)

◆ vlmul_ext_v_i64m1_i64m2

#define vlmul_ext_v_i64m1_i64m2 ( ... ) __riscv_vlmul_ext_v_i64m1_i64m2(__VA_ARGS__)

◆ vlmul_ext_v_i64m1_i64m4

#define vlmul_ext_v_i64m1_i64m4 ( ... ) __riscv_vlmul_ext_v_i64m1_i64m4(__VA_ARGS__)

◆ vlmul_ext_v_i64m1_i64m8

#define vlmul_ext_v_i64m1_i64m8 ( ... ) __riscv_vlmul_ext_v_i64m1_i64m8(__VA_ARGS__)

◆ vlmul_ext_v_i64m2_i64m4

#define vlmul_ext_v_i64m2_i64m4 ( ... ) __riscv_vlmul_ext_v_i64m2_i64m4(__VA_ARGS__)

◆ vlmul_ext_v_i64m2_i64m8

#define vlmul_ext_v_i64m2_i64m8 ( ... ) __riscv_vlmul_ext_v_i64m2_i64m8(__VA_ARGS__)

◆ vlmul_ext_v_i64m4_i64m8

#define vlmul_ext_v_i64m4_i64m8 ( ... ) __riscv_vlmul_ext_v_i64m4_i64m8(__VA_ARGS__)

◆ vlmul_ext_v_i8m1_i8m2

#define vlmul_ext_v_i8m1_i8m2 ( ... ) __riscv_vlmul_ext_v_i8m1_i8m2(__VA_ARGS__)

◆ vlmul_ext_v_i8m1_i8m4

#define vlmul_ext_v_i8m1_i8m4 ( ... ) __riscv_vlmul_ext_v_i8m1_i8m4(__VA_ARGS__)

◆ vlmul_ext_v_i8m1_i8m8

#define vlmul_ext_v_i8m1_i8m8 ( ... ) __riscv_vlmul_ext_v_i8m1_i8m8(__VA_ARGS__)

◆ vlmul_ext_v_i8m2_i8m4

#define vlmul_ext_v_i8m2_i8m4 ( ... ) __riscv_vlmul_ext_v_i8m2_i8m4(__VA_ARGS__)

◆ vlmul_ext_v_i8m2_i8m8

#define vlmul_ext_v_i8m2_i8m8 ( ... ) __riscv_vlmul_ext_v_i8m2_i8m8(__VA_ARGS__)

◆ vlmul_ext_v_i8m4_i8m8

#define vlmul_ext_v_i8m4_i8m8 ( ... ) __riscv_vlmul_ext_v_i8m4_i8m8(__VA_ARGS__)

◆ vlmul_ext_v_i8mf2_i8m1

#define vlmul_ext_v_i8mf2_i8m1 ( ... ) __riscv_vlmul_ext_v_i8mf2_i8m1(__VA_ARGS__)

◆ vlmul_ext_v_i8mf2_i8m2

#define vlmul_ext_v_i8mf2_i8m2 ( ... ) __riscv_vlmul_ext_v_i8mf2_i8m2(__VA_ARGS__)

◆ vlmul_ext_v_i8mf2_i8m4

#define vlmul_ext_v_i8mf2_i8m4 ( ... ) __riscv_vlmul_ext_v_i8mf2_i8m4(__VA_ARGS__)

◆ vlmul_ext_v_i8mf2_i8m8

#define vlmul_ext_v_i8mf2_i8m8 ( ... ) __riscv_vlmul_ext_v_i8mf2_i8m8(__VA_ARGS__)

◆ vlmul_ext_v_i8mf4_i8m1

#define vlmul_ext_v_i8mf4_i8m1 ( ... ) __riscv_vlmul_ext_v_i8mf4_i8m1(__VA_ARGS__)

◆ vlmul_ext_v_i8mf4_i8m2

#define vlmul_ext_v_i8mf4_i8m2 ( ... ) __riscv_vlmul_ext_v_i8mf4_i8m2(__VA_ARGS__)

◆ vlmul_ext_v_i8mf4_i8m4

#define vlmul_ext_v_i8mf4_i8m4 ( ... ) __riscv_vlmul_ext_v_i8mf4_i8m4(__VA_ARGS__)

◆ vlmul_ext_v_i8mf4_i8m8

#define vlmul_ext_v_i8mf4_i8m8 ( ... ) __riscv_vlmul_ext_v_i8mf4_i8m8(__VA_ARGS__)

◆ vlmul_ext_v_i8mf4_i8mf2

#define vlmul_ext_v_i8mf4_i8mf2 ( ... ) __riscv_vlmul_ext_v_i8mf4_i8mf2(__VA_ARGS__)

◆ vlmul_ext_v_i8mf8_i8m1

#define vlmul_ext_v_i8mf8_i8m1 ( ... ) __riscv_vlmul_ext_v_i8mf8_i8m1(__VA_ARGS__)

◆ vlmul_ext_v_i8mf8_i8m2

#define vlmul_ext_v_i8mf8_i8m2 ( ... ) __riscv_vlmul_ext_v_i8mf8_i8m2(__VA_ARGS__)

◆ vlmul_ext_v_i8mf8_i8m4

#define vlmul_ext_v_i8mf8_i8m4 ( ... ) __riscv_vlmul_ext_v_i8mf8_i8m4(__VA_ARGS__)

◆ vlmul_ext_v_i8mf8_i8m8

#define vlmul_ext_v_i8mf8_i8m8 ( ... ) __riscv_vlmul_ext_v_i8mf8_i8m8(__VA_ARGS__)

◆ vlmul_ext_v_i8mf8_i8mf2

#define vlmul_ext_v_i8mf8_i8mf2 ( ... ) __riscv_vlmul_ext_v_i8mf8_i8mf2(__VA_ARGS__)

◆ vlmul_ext_v_i8mf8_i8mf4

#define vlmul_ext_v_i8mf8_i8mf4 ( ... ) __riscv_vlmul_ext_v_i8mf8_i8mf4(__VA_ARGS__)

◆ vlmul_ext_v_u16m1_u16m2

#define vlmul_ext_v_u16m1_u16m2 ( ... ) __riscv_vlmul_ext_v_u16m1_u16m2(__VA_ARGS__)

◆ vlmul_ext_v_u16m1_u16m4

#define vlmul_ext_v_u16m1_u16m4 ( ... ) __riscv_vlmul_ext_v_u16m1_u16m4(__VA_ARGS__)

◆ vlmul_ext_v_u16m1_u16m8

#define vlmul_ext_v_u16m1_u16m8 ( ... ) __riscv_vlmul_ext_v_u16m1_u16m8(__VA_ARGS__)

◆ vlmul_ext_v_u16m2_u16m4

#define vlmul_ext_v_u16m2_u16m4 ( ... ) __riscv_vlmul_ext_v_u16m2_u16m4(__VA_ARGS__)

◆ vlmul_ext_v_u16m2_u16m8

#define vlmul_ext_v_u16m2_u16m8 ( ... ) __riscv_vlmul_ext_v_u16m2_u16m8(__VA_ARGS__)

◆ vlmul_ext_v_u16m4_u16m8

#define vlmul_ext_v_u16m4_u16m8 ( ... ) __riscv_vlmul_ext_v_u16m4_u16m8(__VA_ARGS__)

◆ vlmul_ext_v_u16mf2_u16m1

#define vlmul_ext_v_u16mf2_u16m1 ( ... ) __riscv_vlmul_ext_v_u16mf2_u16m1(__VA_ARGS__)

◆ vlmul_ext_v_u16mf2_u16m2

#define vlmul_ext_v_u16mf2_u16m2 ( ... ) __riscv_vlmul_ext_v_u16mf2_u16m2(__VA_ARGS__)

◆ vlmul_ext_v_u16mf2_u16m4

#define vlmul_ext_v_u16mf2_u16m4 ( ... ) __riscv_vlmul_ext_v_u16mf2_u16m4(__VA_ARGS__)

◆ vlmul_ext_v_u16mf2_u16m8

#define vlmul_ext_v_u16mf2_u16m8 ( ... ) __riscv_vlmul_ext_v_u16mf2_u16m8(__VA_ARGS__)

◆ vlmul_ext_v_u16mf4_u16m1

#define vlmul_ext_v_u16mf4_u16m1 ( ... ) __riscv_vlmul_ext_v_u16mf4_u16m1(__VA_ARGS__)

◆ vlmul_ext_v_u16mf4_u16m2

#define vlmul_ext_v_u16mf4_u16m2 ( ... ) __riscv_vlmul_ext_v_u16mf4_u16m2(__VA_ARGS__)

◆ vlmul_ext_v_u16mf4_u16m4

#define vlmul_ext_v_u16mf4_u16m4 ( ... ) __riscv_vlmul_ext_v_u16mf4_u16m4(__VA_ARGS__)

◆ vlmul_ext_v_u16mf4_u16m8

#define vlmul_ext_v_u16mf4_u16m8 ( ... ) __riscv_vlmul_ext_v_u16mf4_u16m8(__VA_ARGS__)

◆ vlmul_ext_v_u16mf4_u16mf2

#define vlmul_ext_v_u16mf4_u16mf2 ( ... ) __riscv_vlmul_ext_v_u16mf4_u16mf2(__VA_ARGS__)

◆ vlmul_ext_v_u32m1_u32m2

#define vlmul_ext_v_u32m1_u32m2 ( ... ) __riscv_vlmul_ext_v_u32m1_u32m2(__VA_ARGS__)

◆ vlmul_ext_v_u32m1_u32m4

#define vlmul_ext_v_u32m1_u32m4 ( ... ) __riscv_vlmul_ext_v_u32m1_u32m4(__VA_ARGS__)

◆ vlmul_ext_v_u32m1_u32m8

#define vlmul_ext_v_u32m1_u32m8 ( ... ) __riscv_vlmul_ext_v_u32m1_u32m8(__VA_ARGS__)

◆ vlmul_ext_v_u32m2_u32m4

#define vlmul_ext_v_u32m2_u32m4 ( ... ) __riscv_vlmul_ext_v_u32m2_u32m4(__VA_ARGS__)

◆ vlmul_ext_v_u32m2_u32m8

#define vlmul_ext_v_u32m2_u32m8 ( ... ) __riscv_vlmul_ext_v_u32m2_u32m8(__VA_ARGS__)

◆ vlmul_ext_v_u32m4_u32m8

#define vlmul_ext_v_u32m4_u32m8 ( ... ) __riscv_vlmul_ext_v_u32m4_u32m8(__VA_ARGS__)

◆ vlmul_ext_v_u32mf2_u32m1

#define vlmul_ext_v_u32mf2_u32m1 ( ... ) __riscv_vlmul_ext_v_u32mf2_u32m1(__VA_ARGS__)

◆ vlmul_ext_v_u32mf2_u32m2

#define vlmul_ext_v_u32mf2_u32m2 ( ... ) __riscv_vlmul_ext_v_u32mf2_u32m2(__VA_ARGS__)

◆ vlmul_ext_v_u32mf2_u32m4

#define vlmul_ext_v_u32mf2_u32m4 ( ... ) __riscv_vlmul_ext_v_u32mf2_u32m4(__VA_ARGS__)

◆ vlmul_ext_v_u32mf2_u32m8

#define vlmul_ext_v_u32mf2_u32m8 ( ... ) __riscv_vlmul_ext_v_u32mf2_u32m8(__VA_ARGS__)

◆ vlmul_ext_v_u64m1_u64m2

#define vlmul_ext_v_u64m1_u64m2 ( ... ) __riscv_vlmul_ext_v_u64m1_u64m2(__VA_ARGS__)

◆ vlmul_ext_v_u64m1_u64m4

#define vlmul_ext_v_u64m1_u64m4 ( ... ) __riscv_vlmul_ext_v_u64m1_u64m4(__VA_ARGS__)

◆ vlmul_ext_v_u64m1_u64m8

#define vlmul_ext_v_u64m1_u64m8 ( ... ) __riscv_vlmul_ext_v_u64m1_u64m8(__VA_ARGS__)

◆ vlmul_ext_v_u64m2_u64m4

#define vlmul_ext_v_u64m2_u64m4 ( ... ) __riscv_vlmul_ext_v_u64m2_u64m4(__VA_ARGS__)

◆ vlmul_ext_v_u64m2_u64m8

#define vlmul_ext_v_u64m2_u64m8 ( ... ) __riscv_vlmul_ext_v_u64m2_u64m8(__VA_ARGS__)

◆ vlmul_ext_v_u64m4_u64m8

#define vlmul_ext_v_u64m4_u64m8 ( ... ) __riscv_vlmul_ext_v_u64m4_u64m8(__VA_ARGS__)

◆ vlmul_ext_v_u8m1_u8m2

#define vlmul_ext_v_u8m1_u8m2 ( ... ) __riscv_vlmul_ext_v_u8m1_u8m2(__VA_ARGS__)

◆ vlmul_ext_v_u8m1_u8m4

#define vlmul_ext_v_u8m1_u8m4 ( ... ) __riscv_vlmul_ext_v_u8m1_u8m4(__VA_ARGS__)

◆ vlmul_ext_v_u8m1_u8m8

#define vlmul_ext_v_u8m1_u8m8 ( ... ) __riscv_vlmul_ext_v_u8m1_u8m8(__VA_ARGS__)

◆ vlmul_ext_v_u8m2_u8m4

#define vlmul_ext_v_u8m2_u8m4 ( ... ) __riscv_vlmul_ext_v_u8m2_u8m4(__VA_ARGS__)

◆ vlmul_ext_v_u8m2_u8m8

#define vlmul_ext_v_u8m2_u8m8 ( ... ) __riscv_vlmul_ext_v_u8m2_u8m8(__VA_ARGS__)

◆ vlmul_ext_v_u8m4_u8m8

#define vlmul_ext_v_u8m4_u8m8 ( ... ) __riscv_vlmul_ext_v_u8m4_u8m8(__VA_ARGS__)

◆ vlmul_ext_v_u8mf2_u8m1

#define vlmul_ext_v_u8mf2_u8m1 ( ... ) __riscv_vlmul_ext_v_u8mf2_u8m1(__VA_ARGS__)

◆ vlmul_ext_v_u8mf2_u8m2

#define vlmul_ext_v_u8mf2_u8m2 ( ... ) __riscv_vlmul_ext_v_u8mf2_u8m2(__VA_ARGS__)

◆ vlmul_ext_v_u8mf2_u8m4

#define vlmul_ext_v_u8mf2_u8m4 ( ... ) __riscv_vlmul_ext_v_u8mf2_u8m4(__VA_ARGS__)

◆ vlmul_ext_v_u8mf2_u8m8

#define vlmul_ext_v_u8mf2_u8m8 ( ... ) __riscv_vlmul_ext_v_u8mf2_u8m8(__VA_ARGS__)

◆ vlmul_ext_v_u8mf4_u8m1

#define vlmul_ext_v_u8mf4_u8m1 ( ... ) __riscv_vlmul_ext_v_u8mf4_u8m1(__VA_ARGS__)

◆ vlmul_ext_v_u8mf4_u8m2

#define vlmul_ext_v_u8mf4_u8m2 ( ... ) __riscv_vlmul_ext_v_u8mf4_u8m2(__VA_ARGS__)

◆ vlmul_ext_v_u8mf4_u8m4

#define vlmul_ext_v_u8mf4_u8m4 ( ... ) __riscv_vlmul_ext_v_u8mf4_u8m4(__VA_ARGS__)

◆ vlmul_ext_v_u8mf4_u8m8

#define vlmul_ext_v_u8mf4_u8m8 ( ... ) __riscv_vlmul_ext_v_u8mf4_u8m8(__VA_ARGS__)

◆ vlmul_ext_v_u8mf4_u8mf2

#define vlmul_ext_v_u8mf4_u8mf2 ( ... ) __riscv_vlmul_ext_v_u8mf4_u8mf2(__VA_ARGS__)

◆ vlmul_ext_v_u8mf8_u8m1

#define vlmul_ext_v_u8mf8_u8m1 ( ... ) __riscv_vlmul_ext_v_u8mf8_u8m1(__VA_ARGS__)

◆ vlmul_ext_v_u8mf8_u8m2

#define vlmul_ext_v_u8mf8_u8m2 ( ... ) __riscv_vlmul_ext_v_u8mf8_u8m2(__VA_ARGS__)

◆ vlmul_ext_v_u8mf8_u8m4

#define vlmul_ext_v_u8mf8_u8m4 ( ... ) __riscv_vlmul_ext_v_u8mf8_u8m4(__VA_ARGS__)

◆ vlmul_ext_v_u8mf8_u8m8

#define vlmul_ext_v_u8mf8_u8m8 ( ... ) __riscv_vlmul_ext_v_u8mf8_u8m8(__VA_ARGS__)

◆ vlmul_ext_v_u8mf8_u8mf2

#define vlmul_ext_v_u8mf8_u8mf2 ( ... ) __riscv_vlmul_ext_v_u8mf8_u8mf2(__VA_ARGS__)

◆ vlmul_ext_v_u8mf8_u8mf4

#define vlmul_ext_v_u8mf8_u8mf4 ( ... ) __riscv_vlmul_ext_v_u8mf8_u8mf4(__VA_ARGS__)

◆ vlmul_trunc_v_f16m1_f16mf2

#define vlmul_trunc_v_f16m1_f16mf2 ( ... ) __riscv_vlmul_trunc_v_f16m1_f16mf2(__VA_ARGS__)

◆ vlmul_trunc_v_f16m1_f16mf4

#define vlmul_trunc_v_f16m1_f16mf4 ( ... ) __riscv_vlmul_trunc_v_f16m1_f16mf4(__VA_ARGS__)

◆ vlmul_trunc_v_f16m2_f16m1

#define vlmul_trunc_v_f16m2_f16m1 ( ... ) __riscv_vlmul_trunc_v_f16m2_f16m1(__VA_ARGS__)

◆ vlmul_trunc_v_f16m2_f16mf2

#define vlmul_trunc_v_f16m2_f16mf2 ( ... ) __riscv_vlmul_trunc_v_f16m2_f16mf2(__VA_ARGS__)

◆ vlmul_trunc_v_f16m2_f16mf4

#define vlmul_trunc_v_f16m2_f16mf4 ( ... ) __riscv_vlmul_trunc_v_f16m2_f16mf4(__VA_ARGS__)

◆ vlmul_trunc_v_f16m4_f16m1

#define vlmul_trunc_v_f16m4_f16m1 ( ... ) __riscv_vlmul_trunc_v_f16m4_f16m1(__VA_ARGS__)

◆ vlmul_trunc_v_f16m4_f16m2

#define vlmul_trunc_v_f16m4_f16m2 ( ... ) __riscv_vlmul_trunc_v_f16m4_f16m2(__VA_ARGS__)

◆ vlmul_trunc_v_f16m4_f16mf2

#define vlmul_trunc_v_f16m4_f16mf2 ( ... ) __riscv_vlmul_trunc_v_f16m4_f16mf2(__VA_ARGS__)

◆ vlmul_trunc_v_f16m4_f16mf4

#define vlmul_trunc_v_f16m4_f16mf4 ( ... ) __riscv_vlmul_trunc_v_f16m4_f16mf4(__VA_ARGS__)

◆ vlmul_trunc_v_f16m8_f16m1

#define vlmul_trunc_v_f16m8_f16m1 ( ... ) __riscv_vlmul_trunc_v_f16m8_f16m1(__VA_ARGS__)

◆ vlmul_trunc_v_f16m8_f16m2

#define vlmul_trunc_v_f16m8_f16m2 ( ... ) __riscv_vlmul_trunc_v_f16m8_f16m2(__VA_ARGS__)

◆ vlmul_trunc_v_f16m8_f16m4

#define vlmul_trunc_v_f16m8_f16m4 ( ... ) __riscv_vlmul_trunc_v_f16m8_f16m4(__VA_ARGS__)

◆ vlmul_trunc_v_f16m8_f16mf2

#define vlmul_trunc_v_f16m8_f16mf2 ( ... ) __riscv_vlmul_trunc_v_f16m8_f16mf2(__VA_ARGS__)

◆ vlmul_trunc_v_f16m8_f16mf4

#define vlmul_trunc_v_f16m8_f16mf4 ( ... ) __riscv_vlmul_trunc_v_f16m8_f16mf4(__VA_ARGS__)

◆ vlmul_trunc_v_f16mf2_f16mf4

#define vlmul_trunc_v_f16mf2_f16mf4 ( ... ) __riscv_vlmul_trunc_v_f16mf2_f16mf4(__VA_ARGS__)

◆ vlmul_trunc_v_f32m1_f32mf2

#define vlmul_trunc_v_f32m1_f32mf2 ( ... ) __riscv_vlmul_trunc_v_f32m1_f32mf2(__VA_ARGS__)

◆ vlmul_trunc_v_f32m2_f32m1

#define vlmul_trunc_v_f32m2_f32m1 ( ... ) __riscv_vlmul_trunc_v_f32m2_f32m1(__VA_ARGS__)

◆ vlmul_trunc_v_f32m2_f32mf2

#define vlmul_trunc_v_f32m2_f32mf2 ( ... ) __riscv_vlmul_trunc_v_f32m2_f32mf2(__VA_ARGS__)

◆ vlmul_trunc_v_f32m4_f32m1

#define vlmul_trunc_v_f32m4_f32m1 ( ... ) __riscv_vlmul_trunc_v_f32m4_f32m1(__VA_ARGS__)

◆ vlmul_trunc_v_f32m4_f32m2

#define vlmul_trunc_v_f32m4_f32m2 ( ... ) __riscv_vlmul_trunc_v_f32m4_f32m2(__VA_ARGS__)

◆ vlmul_trunc_v_f32m4_f32mf2

#define vlmul_trunc_v_f32m4_f32mf2 ( ... ) __riscv_vlmul_trunc_v_f32m4_f32mf2(__VA_ARGS__)

◆ vlmul_trunc_v_f32m8_f32m1

#define vlmul_trunc_v_f32m8_f32m1 ( ... ) __riscv_vlmul_trunc_v_f32m8_f32m1(__VA_ARGS__)

◆ vlmul_trunc_v_f32m8_f32m2

#define vlmul_trunc_v_f32m8_f32m2 ( ... ) __riscv_vlmul_trunc_v_f32m8_f32m2(__VA_ARGS__)

◆ vlmul_trunc_v_f32m8_f32m4

#define vlmul_trunc_v_f32m8_f32m4 ( ... ) __riscv_vlmul_trunc_v_f32m8_f32m4(__VA_ARGS__)

◆ vlmul_trunc_v_f32m8_f32mf2

#define vlmul_trunc_v_f32m8_f32mf2 ( ... ) __riscv_vlmul_trunc_v_f32m8_f32mf2(__VA_ARGS__)

◆ vlmul_trunc_v_f64m2_f64m1

#define vlmul_trunc_v_f64m2_f64m1 ( ... ) __riscv_vlmul_trunc_v_f64m2_f64m1(__VA_ARGS__)

◆ vlmul_trunc_v_f64m4_f64m1

#define vlmul_trunc_v_f64m4_f64m1 ( ... ) __riscv_vlmul_trunc_v_f64m4_f64m1(__VA_ARGS__)

◆ vlmul_trunc_v_f64m4_f64m2

#define vlmul_trunc_v_f64m4_f64m2 ( ... ) __riscv_vlmul_trunc_v_f64m4_f64m2(__VA_ARGS__)

◆ vlmul_trunc_v_f64m8_f64m1

#define vlmul_trunc_v_f64m8_f64m1 ( ... ) __riscv_vlmul_trunc_v_f64m8_f64m1(__VA_ARGS__)

◆ vlmul_trunc_v_f64m8_f64m2

#define vlmul_trunc_v_f64m8_f64m2 ( ... ) __riscv_vlmul_trunc_v_f64m8_f64m2(__VA_ARGS__)

◆ vlmul_trunc_v_f64m8_f64m4

#define vlmul_trunc_v_f64m8_f64m4 ( ... ) __riscv_vlmul_trunc_v_f64m8_f64m4(__VA_ARGS__)

◆ vlmul_trunc_v_i16m1_i16mf2

#define vlmul_trunc_v_i16m1_i16mf2 ( ... ) __riscv_vlmul_trunc_v_i16m1_i16mf2(__VA_ARGS__)

◆ vlmul_trunc_v_i16m1_i16mf4

#define vlmul_trunc_v_i16m1_i16mf4 ( ... ) __riscv_vlmul_trunc_v_i16m1_i16mf4(__VA_ARGS__)

◆ vlmul_trunc_v_i16m2_i16m1

#define vlmul_trunc_v_i16m2_i16m1 ( ... ) __riscv_vlmul_trunc_v_i16m2_i16m1(__VA_ARGS__)

◆ vlmul_trunc_v_i16m2_i16mf2

#define vlmul_trunc_v_i16m2_i16mf2 ( ... ) __riscv_vlmul_trunc_v_i16m2_i16mf2(__VA_ARGS__)

◆ vlmul_trunc_v_i16m2_i16mf4

#define vlmul_trunc_v_i16m2_i16mf4 ( ... ) __riscv_vlmul_trunc_v_i16m2_i16mf4(__VA_ARGS__)

◆ vlmul_trunc_v_i16m4_i16m1

#define vlmul_trunc_v_i16m4_i16m1 ( ... ) __riscv_vlmul_trunc_v_i16m4_i16m1(__VA_ARGS__)

◆ vlmul_trunc_v_i16m4_i16m2

#define vlmul_trunc_v_i16m4_i16m2 ( ... ) __riscv_vlmul_trunc_v_i16m4_i16m2(__VA_ARGS__)

◆ vlmul_trunc_v_i16m4_i16mf2

#define vlmul_trunc_v_i16m4_i16mf2 ( ... ) __riscv_vlmul_trunc_v_i16m4_i16mf2(__VA_ARGS__)

◆ vlmul_trunc_v_i16m4_i16mf4

#define vlmul_trunc_v_i16m4_i16mf4 ( ... ) __riscv_vlmul_trunc_v_i16m4_i16mf4(__VA_ARGS__)

◆ vlmul_trunc_v_i16m8_i16m1

#define vlmul_trunc_v_i16m8_i16m1 ( ... ) __riscv_vlmul_trunc_v_i16m8_i16m1(__VA_ARGS__)

◆ vlmul_trunc_v_i16m8_i16m2

#define vlmul_trunc_v_i16m8_i16m2 ( ... ) __riscv_vlmul_trunc_v_i16m8_i16m2(__VA_ARGS__)

◆ vlmul_trunc_v_i16m8_i16m4

#define vlmul_trunc_v_i16m8_i16m4 ( ... ) __riscv_vlmul_trunc_v_i16m8_i16m4(__VA_ARGS__)

◆ vlmul_trunc_v_i16m8_i16mf2

#define vlmul_trunc_v_i16m8_i16mf2 ( ... ) __riscv_vlmul_trunc_v_i16m8_i16mf2(__VA_ARGS__)

◆ vlmul_trunc_v_i16m8_i16mf4

#define vlmul_trunc_v_i16m8_i16mf4 ( ... ) __riscv_vlmul_trunc_v_i16m8_i16mf4(__VA_ARGS__)

◆ vlmul_trunc_v_i16mf2_i16mf4

#define vlmul_trunc_v_i16mf2_i16mf4 ( ... ) __riscv_vlmul_trunc_v_i16mf2_i16mf4(__VA_ARGS__)

◆ vlmul_trunc_v_i32m1_i32mf2

#define vlmul_trunc_v_i32m1_i32mf2 ( ... ) __riscv_vlmul_trunc_v_i32m1_i32mf2(__VA_ARGS__)

◆ vlmul_trunc_v_i32m2_i32m1

#define vlmul_trunc_v_i32m2_i32m1 ( ... ) __riscv_vlmul_trunc_v_i32m2_i32m1(__VA_ARGS__)

◆ vlmul_trunc_v_i32m2_i32mf2

#define vlmul_trunc_v_i32m2_i32mf2 ( ... ) __riscv_vlmul_trunc_v_i32m2_i32mf2(__VA_ARGS__)

◆ vlmul_trunc_v_i32m4_i32m1

#define vlmul_trunc_v_i32m4_i32m1 ( ... ) __riscv_vlmul_trunc_v_i32m4_i32m1(__VA_ARGS__)

◆ vlmul_trunc_v_i32m4_i32m2

#define vlmul_trunc_v_i32m4_i32m2 ( ... ) __riscv_vlmul_trunc_v_i32m4_i32m2(__VA_ARGS__)

◆ vlmul_trunc_v_i32m4_i32mf2

#define vlmul_trunc_v_i32m4_i32mf2 ( ... ) __riscv_vlmul_trunc_v_i32m4_i32mf2(__VA_ARGS__)

◆ vlmul_trunc_v_i32m8_i32m1

#define vlmul_trunc_v_i32m8_i32m1 ( ... ) __riscv_vlmul_trunc_v_i32m8_i32m1(__VA_ARGS__)

◆ vlmul_trunc_v_i32m8_i32m2

#define vlmul_trunc_v_i32m8_i32m2 ( ... ) __riscv_vlmul_trunc_v_i32m8_i32m2(__VA_ARGS__)

◆ vlmul_trunc_v_i32m8_i32m4

#define vlmul_trunc_v_i32m8_i32m4 ( ... ) __riscv_vlmul_trunc_v_i32m8_i32m4(__VA_ARGS__)

◆ vlmul_trunc_v_i32m8_i32mf2

#define vlmul_trunc_v_i32m8_i32mf2 ( ... ) __riscv_vlmul_trunc_v_i32m8_i32mf2(__VA_ARGS__)

◆ vlmul_trunc_v_i64m2_i64m1

#define vlmul_trunc_v_i64m2_i64m1 ( ... ) __riscv_vlmul_trunc_v_i64m2_i64m1(__VA_ARGS__)

◆ vlmul_trunc_v_i64m4_i64m1

#define vlmul_trunc_v_i64m4_i64m1 ( ... ) __riscv_vlmul_trunc_v_i64m4_i64m1(__VA_ARGS__)

◆ vlmul_trunc_v_i64m4_i64m2

#define vlmul_trunc_v_i64m4_i64m2 ( ... ) __riscv_vlmul_trunc_v_i64m4_i64m2(__VA_ARGS__)

◆ vlmul_trunc_v_i64m8_i64m1

#define vlmul_trunc_v_i64m8_i64m1 ( ... ) __riscv_vlmul_trunc_v_i64m8_i64m1(__VA_ARGS__)

◆ vlmul_trunc_v_i64m8_i64m2

#define vlmul_trunc_v_i64m8_i64m2 ( ... ) __riscv_vlmul_trunc_v_i64m8_i64m2(__VA_ARGS__)

◆ vlmul_trunc_v_i64m8_i64m4

#define vlmul_trunc_v_i64m8_i64m4 ( ... ) __riscv_vlmul_trunc_v_i64m8_i64m4(__VA_ARGS__)

◆ vlmul_trunc_v_i8m1_i8mf2

#define vlmul_trunc_v_i8m1_i8mf2 ( ... ) __riscv_vlmul_trunc_v_i8m1_i8mf2(__VA_ARGS__)

◆ vlmul_trunc_v_i8m1_i8mf4

#define vlmul_trunc_v_i8m1_i8mf4 ( ... ) __riscv_vlmul_trunc_v_i8m1_i8mf4(__VA_ARGS__)

◆ vlmul_trunc_v_i8m1_i8mf8

#define vlmul_trunc_v_i8m1_i8mf8 ( ... ) __riscv_vlmul_trunc_v_i8m1_i8mf8(__VA_ARGS__)

◆ vlmul_trunc_v_i8m2_i8m1

#define vlmul_trunc_v_i8m2_i8m1 ( ... ) __riscv_vlmul_trunc_v_i8m2_i8m1(__VA_ARGS__)

◆ vlmul_trunc_v_i8m2_i8mf2

#define vlmul_trunc_v_i8m2_i8mf2 ( ... ) __riscv_vlmul_trunc_v_i8m2_i8mf2(__VA_ARGS__)

◆ vlmul_trunc_v_i8m2_i8mf4

#define vlmul_trunc_v_i8m2_i8mf4 ( ... ) __riscv_vlmul_trunc_v_i8m2_i8mf4(__VA_ARGS__)

◆ vlmul_trunc_v_i8m2_i8mf8

#define vlmul_trunc_v_i8m2_i8mf8 ( ... ) __riscv_vlmul_trunc_v_i8m2_i8mf8(__VA_ARGS__)

◆ vlmul_trunc_v_i8m4_i8m1

#define vlmul_trunc_v_i8m4_i8m1 ( ... ) __riscv_vlmul_trunc_v_i8m4_i8m1(__VA_ARGS__)

◆ vlmul_trunc_v_i8m4_i8m2

#define vlmul_trunc_v_i8m4_i8m2 ( ... ) __riscv_vlmul_trunc_v_i8m4_i8m2(__VA_ARGS__)

◆ vlmul_trunc_v_i8m4_i8mf2

#define vlmul_trunc_v_i8m4_i8mf2 ( ... ) __riscv_vlmul_trunc_v_i8m4_i8mf2(__VA_ARGS__)

◆ vlmul_trunc_v_i8m4_i8mf4

#define vlmul_trunc_v_i8m4_i8mf4 ( ... ) __riscv_vlmul_trunc_v_i8m4_i8mf4(__VA_ARGS__)

◆ vlmul_trunc_v_i8m4_i8mf8

#define vlmul_trunc_v_i8m4_i8mf8 ( ... ) __riscv_vlmul_trunc_v_i8m4_i8mf8(__VA_ARGS__)

◆ vlmul_trunc_v_i8m8_i8m1

#define vlmul_trunc_v_i8m8_i8m1 ( ... ) __riscv_vlmul_trunc_v_i8m8_i8m1(__VA_ARGS__)

◆ vlmul_trunc_v_i8m8_i8m2

#define vlmul_trunc_v_i8m8_i8m2 ( ... ) __riscv_vlmul_trunc_v_i8m8_i8m2(__VA_ARGS__)

◆ vlmul_trunc_v_i8m8_i8m4

#define vlmul_trunc_v_i8m8_i8m4 ( ... ) __riscv_vlmul_trunc_v_i8m8_i8m4(__VA_ARGS__)

◆ vlmul_trunc_v_i8m8_i8mf2

#define vlmul_trunc_v_i8m8_i8mf2 ( ... ) __riscv_vlmul_trunc_v_i8m8_i8mf2(__VA_ARGS__)

◆ vlmul_trunc_v_i8m8_i8mf4

#define vlmul_trunc_v_i8m8_i8mf4 ( ... ) __riscv_vlmul_trunc_v_i8m8_i8mf4(__VA_ARGS__)

◆ vlmul_trunc_v_i8m8_i8mf8

#define vlmul_trunc_v_i8m8_i8mf8 ( ... ) __riscv_vlmul_trunc_v_i8m8_i8mf8(__VA_ARGS__)

◆ vlmul_trunc_v_i8mf2_i8mf4

#define vlmul_trunc_v_i8mf2_i8mf4 ( ... ) __riscv_vlmul_trunc_v_i8mf2_i8mf4(__VA_ARGS__)

◆ vlmul_trunc_v_i8mf2_i8mf8

#define vlmul_trunc_v_i8mf2_i8mf8 ( ... ) __riscv_vlmul_trunc_v_i8mf2_i8mf8(__VA_ARGS__)

◆ vlmul_trunc_v_i8mf4_i8mf8

#define vlmul_trunc_v_i8mf4_i8mf8 ( ... ) __riscv_vlmul_trunc_v_i8mf4_i8mf8(__VA_ARGS__)

◆ vlmul_trunc_v_u16m1_u16mf2

#define vlmul_trunc_v_u16m1_u16mf2 ( ... ) __riscv_vlmul_trunc_v_u16m1_u16mf2(__VA_ARGS__)

◆ vlmul_trunc_v_u16m1_u16mf4

#define vlmul_trunc_v_u16m1_u16mf4 ( ... ) __riscv_vlmul_trunc_v_u16m1_u16mf4(__VA_ARGS__)

◆ vlmul_trunc_v_u16m2_u16m1

#define vlmul_trunc_v_u16m2_u16m1 ( ... ) __riscv_vlmul_trunc_v_u16m2_u16m1(__VA_ARGS__)

◆ vlmul_trunc_v_u16m2_u16mf2

#define vlmul_trunc_v_u16m2_u16mf2 ( ... ) __riscv_vlmul_trunc_v_u16m2_u16mf2(__VA_ARGS__)

◆ vlmul_trunc_v_u16m2_u16mf4

#define vlmul_trunc_v_u16m2_u16mf4 ( ... ) __riscv_vlmul_trunc_v_u16m2_u16mf4(__VA_ARGS__)

◆ vlmul_trunc_v_u16m4_u16m1

#define vlmul_trunc_v_u16m4_u16m1 ( ... ) __riscv_vlmul_trunc_v_u16m4_u16m1(__VA_ARGS__)

◆ vlmul_trunc_v_u16m4_u16m2

#define vlmul_trunc_v_u16m4_u16m2 ( ... ) __riscv_vlmul_trunc_v_u16m4_u16m2(__VA_ARGS__)

◆ vlmul_trunc_v_u16m4_u16mf2

#define vlmul_trunc_v_u16m4_u16mf2 ( ... ) __riscv_vlmul_trunc_v_u16m4_u16mf2(__VA_ARGS__)

◆ vlmul_trunc_v_u16m4_u16mf4

#define vlmul_trunc_v_u16m4_u16mf4 ( ... ) __riscv_vlmul_trunc_v_u16m4_u16mf4(__VA_ARGS__)

◆ vlmul_trunc_v_u16m8_u16m1

#define vlmul_trunc_v_u16m8_u16m1 ( ... ) __riscv_vlmul_trunc_v_u16m8_u16m1(__VA_ARGS__)

◆ vlmul_trunc_v_u16m8_u16m2

#define vlmul_trunc_v_u16m8_u16m2 ( ... ) __riscv_vlmul_trunc_v_u16m8_u16m2(__VA_ARGS__)

◆ vlmul_trunc_v_u16m8_u16m4

#define vlmul_trunc_v_u16m8_u16m4 ( ... ) __riscv_vlmul_trunc_v_u16m8_u16m4(__VA_ARGS__)

◆ vlmul_trunc_v_u16m8_u16mf2

#define vlmul_trunc_v_u16m8_u16mf2 ( ... ) __riscv_vlmul_trunc_v_u16m8_u16mf2(__VA_ARGS__)

◆ vlmul_trunc_v_u16m8_u16mf4

#define vlmul_trunc_v_u16m8_u16mf4 ( ... ) __riscv_vlmul_trunc_v_u16m8_u16mf4(__VA_ARGS__)

◆ vlmul_trunc_v_u16mf2_u16mf4

#define vlmul_trunc_v_u16mf2_u16mf4 ( ... ) __riscv_vlmul_trunc_v_u16mf2_u16mf4(__VA_ARGS__)

◆ vlmul_trunc_v_u32m1_u32mf2

#define vlmul_trunc_v_u32m1_u32mf2 ( ... ) __riscv_vlmul_trunc_v_u32m1_u32mf2(__VA_ARGS__)

◆ vlmul_trunc_v_u32m2_u32m1

#define vlmul_trunc_v_u32m2_u32m1 ( ... ) __riscv_vlmul_trunc_v_u32m2_u32m1(__VA_ARGS__)

◆ vlmul_trunc_v_u32m2_u32mf2

#define vlmul_trunc_v_u32m2_u32mf2 ( ... ) __riscv_vlmul_trunc_v_u32m2_u32mf2(__VA_ARGS__)

◆ vlmul_trunc_v_u32m4_u32m1

#define vlmul_trunc_v_u32m4_u32m1 ( ... ) __riscv_vlmul_trunc_v_u32m4_u32m1(__VA_ARGS__)

◆ vlmul_trunc_v_u32m4_u32m2

#define vlmul_trunc_v_u32m4_u32m2 ( ... ) __riscv_vlmul_trunc_v_u32m4_u32m2(__VA_ARGS__)

◆ vlmul_trunc_v_u32m4_u32mf2

#define vlmul_trunc_v_u32m4_u32mf2 ( ... ) __riscv_vlmul_trunc_v_u32m4_u32mf2(__VA_ARGS__)

◆ vlmul_trunc_v_u32m8_u32m1

#define vlmul_trunc_v_u32m8_u32m1 ( ... ) __riscv_vlmul_trunc_v_u32m8_u32m1(__VA_ARGS__)

◆ vlmul_trunc_v_u32m8_u32m2

#define vlmul_trunc_v_u32m8_u32m2 ( ... ) __riscv_vlmul_trunc_v_u32m8_u32m2(__VA_ARGS__)

◆ vlmul_trunc_v_u32m8_u32m4

#define vlmul_trunc_v_u32m8_u32m4 ( ... ) __riscv_vlmul_trunc_v_u32m8_u32m4(__VA_ARGS__)

◆ vlmul_trunc_v_u32m8_u32mf2

#define vlmul_trunc_v_u32m8_u32mf2 ( ... ) __riscv_vlmul_trunc_v_u32m8_u32mf2(__VA_ARGS__)

◆ vlmul_trunc_v_u64m2_u64m1

#define vlmul_trunc_v_u64m2_u64m1 ( ... ) __riscv_vlmul_trunc_v_u64m2_u64m1(__VA_ARGS__)

◆ vlmul_trunc_v_u64m4_u64m1

#define vlmul_trunc_v_u64m4_u64m1 ( ... ) __riscv_vlmul_trunc_v_u64m4_u64m1(__VA_ARGS__)

◆ vlmul_trunc_v_u64m4_u64m2

#define vlmul_trunc_v_u64m4_u64m2 ( ... ) __riscv_vlmul_trunc_v_u64m4_u64m2(__VA_ARGS__)

◆ vlmul_trunc_v_u64m8_u64m1

#define vlmul_trunc_v_u64m8_u64m1 ( ... ) __riscv_vlmul_trunc_v_u64m8_u64m1(__VA_ARGS__)

◆ vlmul_trunc_v_u64m8_u64m2

#define vlmul_trunc_v_u64m8_u64m2 ( ... ) __riscv_vlmul_trunc_v_u64m8_u64m2(__VA_ARGS__)

◆ vlmul_trunc_v_u64m8_u64m4

#define vlmul_trunc_v_u64m8_u64m4 ( ... ) __riscv_vlmul_trunc_v_u64m8_u64m4(__VA_ARGS__)

◆ vlmul_trunc_v_u8m1_u8mf2

#define vlmul_trunc_v_u8m1_u8mf2 ( ... ) __riscv_vlmul_trunc_v_u8m1_u8mf2(__VA_ARGS__)

◆ vlmul_trunc_v_u8m1_u8mf4

#define vlmul_trunc_v_u8m1_u8mf4 ( ... ) __riscv_vlmul_trunc_v_u8m1_u8mf4(__VA_ARGS__)

◆ vlmul_trunc_v_u8m1_u8mf8

#define vlmul_trunc_v_u8m1_u8mf8 ( ... ) __riscv_vlmul_trunc_v_u8m1_u8mf8(__VA_ARGS__)

◆ vlmul_trunc_v_u8m2_u8m1

#define vlmul_trunc_v_u8m2_u8m1 ( ... ) __riscv_vlmul_trunc_v_u8m2_u8m1(__VA_ARGS__)

◆ vlmul_trunc_v_u8m2_u8mf2

#define vlmul_trunc_v_u8m2_u8mf2 ( ... ) __riscv_vlmul_trunc_v_u8m2_u8mf2(__VA_ARGS__)

◆ vlmul_trunc_v_u8m2_u8mf4

#define vlmul_trunc_v_u8m2_u8mf4 ( ... ) __riscv_vlmul_trunc_v_u8m2_u8mf4(__VA_ARGS__)

◆ vlmul_trunc_v_u8m2_u8mf8

#define vlmul_trunc_v_u8m2_u8mf8 ( ... ) __riscv_vlmul_trunc_v_u8m2_u8mf8(__VA_ARGS__)

◆ vlmul_trunc_v_u8m4_u8m1

#define vlmul_trunc_v_u8m4_u8m1 ( ... ) __riscv_vlmul_trunc_v_u8m4_u8m1(__VA_ARGS__)

◆ vlmul_trunc_v_u8m4_u8m2

#define vlmul_trunc_v_u8m4_u8m2 ( ... ) __riscv_vlmul_trunc_v_u8m4_u8m2(__VA_ARGS__)

◆ vlmul_trunc_v_u8m4_u8mf2

#define vlmul_trunc_v_u8m4_u8mf2 ( ... ) __riscv_vlmul_trunc_v_u8m4_u8mf2(__VA_ARGS__)

◆ vlmul_trunc_v_u8m4_u8mf4

#define vlmul_trunc_v_u8m4_u8mf4 ( ... ) __riscv_vlmul_trunc_v_u8m4_u8mf4(__VA_ARGS__)

◆ vlmul_trunc_v_u8m4_u8mf8

#define vlmul_trunc_v_u8m4_u8mf8 ( ... ) __riscv_vlmul_trunc_v_u8m4_u8mf8(__VA_ARGS__)

◆ vlmul_trunc_v_u8m8_u8m1

#define vlmul_trunc_v_u8m8_u8m1 ( ... ) __riscv_vlmul_trunc_v_u8m8_u8m1(__VA_ARGS__)

◆ vlmul_trunc_v_u8m8_u8m2

#define vlmul_trunc_v_u8m8_u8m2 ( ... ) __riscv_vlmul_trunc_v_u8m8_u8m2(__VA_ARGS__)

◆ vlmul_trunc_v_u8m8_u8m4

#define vlmul_trunc_v_u8m8_u8m4 ( ... ) __riscv_vlmul_trunc_v_u8m8_u8m4(__VA_ARGS__)

◆ vlmul_trunc_v_u8m8_u8mf2

#define vlmul_trunc_v_u8m8_u8mf2 ( ... ) __riscv_vlmul_trunc_v_u8m8_u8mf2(__VA_ARGS__)

◆ vlmul_trunc_v_u8m8_u8mf4

#define vlmul_trunc_v_u8m8_u8mf4 ( ... ) __riscv_vlmul_trunc_v_u8m8_u8mf4(__VA_ARGS__)

◆ vlmul_trunc_v_u8m8_u8mf8

#define vlmul_trunc_v_u8m8_u8mf8 ( ... ) __riscv_vlmul_trunc_v_u8m8_u8mf8(__VA_ARGS__)

◆ vlmul_trunc_v_u8mf2_u8mf4

#define vlmul_trunc_v_u8mf2_u8mf4 ( ... ) __riscv_vlmul_trunc_v_u8mf2_u8mf4(__VA_ARGS__)

◆ vlmul_trunc_v_u8mf2_u8mf8

#define vlmul_trunc_v_u8mf2_u8mf8 ( ... ) __riscv_vlmul_trunc_v_u8mf2_u8mf8(__VA_ARGS__)

◆ vlmul_trunc_v_u8mf4_u8mf8

#define vlmul_trunc_v_u8mf4_u8mf8 ( ... ) __riscv_vlmul_trunc_v_u8mf4_u8mf8(__VA_ARGS__)

◆ vloxei16_v_f16m1

#define vloxei16_v_f16m1 ( ... ) __riscv_vloxei16_v_f16m1(__VA_ARGS__)

◆ vloxei16_v_f16m1_m

#define vloxei16_v_f16m1_m ( ... ) __riscv_vloxei16_v_f16m1_tumu(__VA_ARGS__)

◆ vloxei16_v_f16m2

#define vloxei16_v_f16m2 ( ... ) __riscv_vloxei16_v_f16m2(__VA_ARGS__)

◆ vloxei16_v_f16m2_m

#define vloxei16_v_f16m2_m ( ... ) __riscv_vloxei16_v_f16m2_tumu(__VA_ARGS__)

◆ vloxei16_v_f16m4

#define vloxei16_v_f16m4 ( ... ) __riscv_vloxei16_v_f16m4(__VA_ARGS__)

◆ vloxei16_v_f16m4_m

#define vloxei16_v_f16m4_m ( ... ) __riscv_vloxei16_v_f16m4_tumu(__VA_ARGS__)

◆ vloxei16_v_f16m8

#define vloxei16_v_f16m8 ( ... ) __riscv_vloxei16_v_f16m8(__VA_ARGS__)

◆ vloxei16_v_f16m8_m

#define vloxei16_v_f16m8_m ( ... ) __riscv_vloxei16_v_f16m8_tumu(__VA_ARGS__)

◆ vloxei16_v_f16mf2

#define vloxei16_v_f16mf2 ( ... ) __riscv_vloxei16_v_f16mf2(__VA_ARGS__)

◆ vloxei16_v_f16mf2_m

#define vloxei16_v_f16mf2_m ( ... ) __riscv_vloxei16_v_f16mf2_tumu(__VA_ARGS__)

◆ vloxei16_v_f16mf4

#define vloxei16_v_f16mf4 ( ... ) __riscv_vloxei16_v_f16mf4(__VA_ARGS__)

◆ vloxei16_v_f16mf4_m

#define vloxei16_v_f16mf4_m ( ... ) __riscv_vloxei16_v_f16mf4_tumu(__VA_ARGS__)

◆ vloxei16_v_f32m1

#define vloxei16_v_f32m1 ( ... ) __riscv_vloxei16_v_f32m1(__VA_ARGS__)

◆ vloxei16_v_f32m1_m

#define vloxei16_v_f32m1_m ( ... ) __riscv_vloxei16_v_f32m1_tumu(__VA_ARGS__)

◆ vloxei16_v_f32m2

#define vloxei16_v_f32m2 ( ... ) __riscv_vloxei16_v_f32m2(__VA_ARGS__)

◆ vloxei16_v_f32m2_m

#define vloxei16_v_f32m2_m ( ... ) __riscv_vloxei16_v_f32m2_tumu(__VA_ARGS__)

◆ vloxei16_v_f32m4

#define vloxei16_v_f32m4 ( ... ) __riscv_vloxei16_v_f32m4(__VA_ARGS__)

◆ vloxei16_v_f32m4_m

#define vloxei16_v_f32m4_m ( ... ) __riscv_vloxei16_v_f32m4_tumu(__VA_ARGS__)

◆ vloxei16_v_f32m8

#define vloxei16_v_f32m8 ( ... ) __riscv_vloxei16_v_f32m8(__VA_ARGS__)

◆ vloxei16_v_f32m8_m

#define vloxei16_v_f32m8_m ( ... ) __riscv_vloxei16_v_f32m8_tumu(__VA_ARGS__)

◆ vloxei16_v_f32mf2

#define vloxei16_v_f32mf2 ( ... ) __riscv_vloxei16_v_f32mf2(__VA_ARGS__)

◆ vloxei16_v_f32mf2_m

#define vloxei16_v_f32mf2_m ( ... ) __riscv_vloxei16_v_f32mf2_tumu(__VA_ARGS__)

◆ vloxei16_v_f64m1

#define vloxei16_v_f64m1 ( ... ) __riscv_vloxei16_v_f64m1(__VA_ARGS__)

◆ vloxei16_v_f64m1_m

#define vloxei16_v_f64m1_m ( ... ) __riscv_vloxei16_v_f64m1_tumu(__VA_ARGS__)

◆ vloxei16_v_f64m2

#define vloxei16_v_f64m2 ( ... ) __riscv_vloxei16_v_f64m2(__VA_ARGS__)

◆ vloxei16_v_f64m2_m

#define vloxei16_v_f64m2_m ( ... ) __riscv_vloxei16_v_f64m2_tumu(__VA_ARGS__)

◆ vloxei16_v_f64m4

#define vloxei16_v_f64m4 ( ... ) __riscv_vloxei16_v_f64m4(__VA_ARGS__)

◆ vloxei16_v_f64m4_m

#define vloxei16_v_f64m4_m ( ... ) __riscv_vloxei16_v_f64m4_tumu(__VA_ARGS__)

◆ vloxei16_v_f64m8

#define vloxei16_v_f64m8 ( ... ) __riscv_vloxei16_v_f64m8(__VA_ARGS__)

◆ vloxei16_v_f64m8_m

#define vloxei16_v_f64m8_m ( ... ) __riscv_vloxei16_v_f64m8_tumu(__VA_ARGS__)

◆ vloxei16_v_i16m1

#define vloxei16_v_i16m1 ( ... ) __riscv_vloxei16_v_i16m1(__VA_ARGS__)

◆ vloxei16_v_i16m1_m

#define vloxei16_v_i16m1_m ( ... ) __riscv_vloxei16_v_i16m1_tumu(__VA_ARGS__)

◆ vloxei16_v_i16m2

#define vloxei16_v_i16m2 ( ... ) __riscv_vloxei16_v_i16m2(__VA_ARGS__)

◆ vloxei16_v_i16m2_m

#define vloxei16_v_i16m2_m ( ... ) __riscv_vloxei16_v_i16m2_tumu(__VA_ARGS__)

◆ vloxei16_v_i16m4

#define vloxei16_v_i16m4 ( ... ) __riscv_vloxei16_v_i16m4(__VA_ARGS__)

◆ vloxei16_v_i16m4_m

#define vloxei16_v_i16m4_m ( ... ) __riscv_vloxei16_v_i16m4_tumu(__VA_ARGS__)

◆ vloxei16_v_i16m8

#define vloxei16_v_i16m8 ( ... ) __riscv_vloxei16_v_i16m8(__VA_ARGS__)

◆ vloxei16_v_i16m8_m

#define vloxei16_v_i16m8_m ( ... ) __riscv_vloxei16_v_i16m8_tumu(__VA_ARGS__)

◆ vloxei16_v_i16mf2

#define vloxei16_v_i16mf2 ( ... ) __riscv_vloxei16_v_i16mf2(__VA_ARGS__)

◆ vloxei16_v_i16mf2_m

#define vloxei16_v_i16mf2_m ( ... ) __riscv_vloxei16_v_i16mf2_tumu(__VA_ARGS__)

◆ vloxei16_v_i16mf4

#define vloxei16_v_i16mf4 ( ... ) __riscv_vloxei16_v_i16mf4(__VA_ARGS__)

◆ vloxei16_v_i16mf4_m

#define vloxei16_v_i16mf4_m ( ... ) __riscv_vloxei16_v_i16mf4_tumu(__VA_ARGS__)

◆ vloxei16_v_i32m1

#define vloxei16_v_i32m1 ( ... ) __riscv_vloxei16_v_i32m1(__VA_ARGS__)

◆ vloxei16_v_i32m1_m

#define vloxei16_v_i32m1_m ( ... ) __riscv_vloxei16_v_i32m1_tumu(__VA_ARGS__)

◆ vloxei16_v_i32m2

#define vloxei16_v_i32m2 ( ... ) __riscv_vloxei16_v_i32m2(__VA_ARGS__)

◆ vloxei16_v_i32m2_m

#define vloxei16_v_i32m2_m ( ... ) __riscv_vloxei16_v_i32m2_tumu(__VA_ARGS__)

◆ vloxei16_v_i32m4

#define vloxei16_v_i32m4 ( ... ) __riscv_vloxei16_v_i32m4(__VA_ARGS__)

◆ vloxei16_v_i32m4_m

#define vloxei16_v_i32m4_m ( ... ) __riscv_vloxei16_v_i32m4_tumu(__VA_ARGS__)

◆ vloxei16_v_i32m8

#define vloxei16_v_i32m8 ( ... ) __riscv_vloxei16_v_i32m8(__VA_ARGS__)

◆ vloxei16_v_i32m8_m

#define vloxei16_v_i32m8_m ( ... ) __riscv_vloxei16_v_i32m8_tumu(__VA_ARGS__)

◆ vloxei16_v_i32mf2

#define vloxei16_v_i32mf2 ( ... ) __riscv_vloxei16_v_i32mf2(__VA_ARGS__)

◆ vloxei16_v_i32mf2_m

#define vloxei16_v_i32mf2_m ( ... ) __riscv_vloxei16_v_i32mf2_tumu(__VA_ARGS__)

◆ vloxei16_v_i64m1

#define vloxei16_v_i64m1 ( ... ) __riscv_vloxei16_v_i64m1(__VA_ARGS__)

◆ vloxei16_v_i64m1_m

#define vloxei16_v_i64m1_m ( ... ) __riscv_vloxei16_v_i64m1_tumu(__VA_ARGS__)

◆ vloxei16_v_i64m2

#define vloxei16_v_i64m2 ( ... ) __riscv_vloxei16_v_i64m2(__VA_ARGS__)

◆ vloxei16_v_i64m2_m

#define vloxei16_v_i64m2_m ( ... ) __riscv_vloxei16_v_i64m2_tumu(__VA_ARGS__)

◆ vloxei16_v_i64m4

#define vloxei16_v_i64m4 ( ... ) __riscv_vloxei16_v_i64m4(__VA_ARGS__)

◆ vloxei16_v_i64m4_m

#define vloxei16_v_i64m4_m ( ... ) __riscv_vloxei16_v_i64m4_tumu(__VA_ARGS__)

◆ vloxei16_v_i64m8

#define vloxei16_v_i64m8 ( ... ) __riscv_vloxei16_v_i64m8(__VA_ARGS__)

◆ vloxei16_v_i64m8_m

#define vloxei16_v_i64m8_m ( ... ) __riscv_vloxei16_v_i64m8_tumu(__VA_ARGS__)

◆ vloxei16_v_i8m1

#define vloxei16_v_i8m1 ( ... ) __riscv_vloxei16_v_i8m1(__VA_ARGS__)

◆ vloxei16_v_i8m1_m

#define vloxei16_v_i8m1_m ( ... ) __riscv_vloxei16_v_i8m1_tumu(__VA_ARGS__)

◆ vloxei16_v_i8m2

#define vloxei16_v_i8m2 ( ... ) __riscv_vloxei16_v_i8m2(__VA_ARGS__)

◆ vloxei16_v_i8m2_m

#define vloxei16_v_i8m2_m ( ... ) __riscv_vloxei16_v_i8m2_tumu(__VA_ARGS__)

◆ vloxei16_v_i8m4

#define vloxei16_v_i8m4 ( ... ) __riscv_vloxei16_v_i8m4(__VA_ARGS__)

◆ vloxei16_v_i8m4_m

#define vloxei16_v_i8m4_m ( ... ) __riscv_vloxei16_v_i8m4_tumu(__VA_ARGS__)

◆ vloxei16_v_i8mf2

#define vloxei16_v_i8mf2 ( ... ) __riscv_vloxei16_v_i8mf2(__VA_ARGS__)

◆ vloxei16_v_i8mf2_m

#define vloxei16_v_i8mf2_m ( ... ) __riscv_vloxei16_v_i8mf2_tumu(__VA_ARGS__)

◆ vloxei16_v_i8mf4

#define vloxei16_v_i8mf4 ( ... ) __riscv_vloxei16_v_i8mf4(__VA_ARGS__)

◆ vloxei16_v_i8mf4_m

#define vloxei16_v_i8mf4_m ( ... ) __riscv_vloxei16_v_i8mf4_tumu(__VA_ARGS__)

◆ vloxei16_v_i8mf8

#define vloxei16_v_i8mf8 ( ... ) __riscv_vloxei16_v_i8mf8(__VA_ARGS__)

◆ vloxei16_v_i8mf8_m

#define vloxei16_v_i8mf8_m ( ... ) __riscv_vloxei16_v_i8mf8_tumu(__VA_ARGS__)

◆ vloxei16_v_u16m1

#define vloxei16_v_u16m1 ( ... ) __riscv_vloxei16_v_u16m1(__VA_ARGS__)

◆ vloxei16_v_u16m1_m

#define vloxei16_v_u16m1_m ( ... ) __riscv_vloxei16_v_u16m1_tumu(__VA_ARGS__)

◆ vloxei16_v_u16m2

#define vloxei16_v_u16m2 ( ... ) __riscv_vloxei16_v_u16m2(__VA_ARGS__)

◆ vloxei16_v_u16m2_m

#define vloxei16_v_u16m2_m ( ... ) __riscv_vloxei16_v_u16m2_tumu(__VA_ARGS__)

◆ vloxei16_v_u16m4

#define vloxei16_v_u16m4 ( ... ) __riscv_vloxei16_v_u16m4(__VA_ARGS__)

◆ vloxei16_v_u16m4_m

#define vloxei16_v_u16m4_m ( ... ) __riscv_vloxei16_v_u16m4_tumu(__VA_ARGS__)

◆ vloxei16_v_u16m8

#define vloxei16_v_u16m8 ( ... ) __riscv_vloxei16_v_u16m8(__VA_ARGS__)

◆ vloxei16_v_u16m8_m

#define vloxei16_v_u16m8_m ( ... ) __riscv_vloxei16_v_u16m8_tumu(__VA_ARGS__)

◆ vloxei16_v_u16mf2

#define vloxei16_v_u16mf2 ( ... ) __riscv_vloxei16_v_u16mf2(__VA_ARGS__)

◆ vloxei16_v_u16mf2_m

#define vloxei16_v_u16mf2_m ( ... ) __riscv_vloxei16_v_u16mf2_tumu(__VA_ARGS__)

◆ vloxei16_v_u16mf4

#define vloxei16_v_u16mf4 ( ... ) __riscv_vloxei16_v_u16mf4(__VA_ARGS__)

◆ vloxei16_v_u16mf4_m

#define vloxei16_v_u16mf4_m ( ... ) __riscv_vloxei16_v_u16mf4_tumu(__VA_ARGS__)

◆ vloxei16_v_u32m1

#define vloxei16_v_u32m1 ( ... ) __riscv_vloxei16_v_u32m1(__VA_ARGS__)

◆ vloxei16_v_u32m1_m

#define vloxei16_v_u32m1_m ( ... ) __riscv_vloxei16_v_u32m1_tumu(__VA_ARGS__)

◆ vloxei16_v_u32m2

#define vloxei16_v_u32m2 ( ... ) __riscv_vloxei16_v_u32m2(__VA_ARGS__)

◆ vloxei16_v_u32m2_m

#define vloxei16_v_u32m2_m ( ... ) __riscv_vloxei16_v_u32m2_tumu(__VA_ARGS__)

◆ vloxei16_v_u32m4

#define vloxei16_v_u32m4 ( ... ) __riscv_vloxei16_v_u32m4(__VA_ARGS__)

◆ vloxei16_v_u32m4_m

#define vloxei16_v_u32m4_m ( ... ) __riscv_vloxei16_v_u32m4_tumu(__VA_ARGS__)

◆ vloxei16_v_u32m8

#define vloxei16_v_u32m8 ( ... ) __riscv_vloxei16_v_u32m8(__VA_ARGS__)

◆ vloxei16_v_u32m8_m

#define vloxei16_v_u32m8_m ( ... ) __riscv_vloxei16_v_u32m8_tumu(__VA_ARGS__)

◆ vloxei16_v_u32mf2

#define vloxei16_v_u32mf2 ( ... ) __riscv_vloxei16_v_u32mf2(__VA_ARGS__)

◆ vloxei16_v_u32mf2_m

#define vloxei16_v_u32mf2_m ( ... ) __riscv_vloxei16_v_u32mf2_tumu(__VA_ARGS__)

◆ vloxei16_v_u64m1

#define vloxei16_v_u64m1 ( ... ) __riscv_vloxei16_v_u64m1(__VA_ARGS__)

◆ vloxei16_v_u64m1_m

#define vloxei16_v_u64m1_m ( ... ) __riscv_vloxei16_v_u64m1_tumu(__VA_ARGS__)

◆ vloxei16_v_u64m2

#define vloxei16_v_u64m2 ( ... ) __riscv_vloxei16_v_u64m2(__VA_ARGS__)

◆ vloxei16_v_u64m2_m

#define vloxei16_v_u64m2_m ( ... ) __riscv_vloxei16_v_u64m2_tumu(__VA_ARGS__)

◆ vloxei16_v_u64m4

#define vloxei16_v_u64m4 ( ... ) __riscv_vloxei16_v_u64m4(__VA_ARGS__)

◆ vloxei16_v_u64m4_m

#define vloxei16_v_u64m4_m ( ... ) __riscv_vloxei16_v_u64m4_tumu(__VA_ARGS__)

◆ vloxei16_v_u64m8

#define vloxei16_v_u64m8 ( ... ) __riscv_vloxei16_v_u64m8(__VA_ARGS__)

◆ vloxei16_v_u64m8_m

#define vloxei16_v_u64m8_m ( ... ) __riscv_vloxei16_v_u64m8_tumu(__VA_ARGS__)

◆ vloxei16_v_u8m1

#define vloxei16_v_u8m1 ( ... ) __riscv_vloxei16_v_u8m1(__VA_ARGS__)

◆ vloxei16_v_u8m1_m

#define vloxei16_v_u8m1_m ( ... ) __riscv_vloxei16_v_u8m1_tumu(__VA_ARGS__)

◆ vloxei16_v_u8m2

#define vloxei16_v_u8m2 ( ... ) __riscv_vloxei16_v_u8m2(__VA_ARGS__)

◆ vloxei16_v_u8m2_m

#define vloxei16_v_u8m2_m ( ... ) __riscv_vloxei16_v_u8m2_tumu(__VA_ARGS__)

◆ vloxei16_v_u8m4

#define vloxei16_v_u8m4 ( ... ) __riscv_vloxei16_v_u8m4(__VA_ARGS__)

◆ vloxei16_v_u8m4_m

#define vloxei16_v_u8m4_m ( ... ) __riscv_vloxei16_v_u8m4_tumu(__VA_ARGS__)

◆ vloxei16_v_u8mf2

#define vloxei16_v_u8mf2 ( ... ) __riscv_vloxei16_v_u8mf2(__VA_ARGS__)

◆ vloxei16_v_u8mf2_m

#define vloxei16_v_u8mf2_m ( ... ) __riscv_vloxei16_v_u8mf2_tumu(__VA_ARGS__)

◆ vloxei16_v_u8mf4

#define vloxei16_v_u8mf4 ( ... ) __riscv_vloxei16_v_u8mf4(__VA_ARGS__)

◆ vloxei16_v_u8mf4_m

#define vloxei16_v_u8mf4_m ( ... ) __riscv_vloxei16_v_u8mf4_tumu(__VA_ARGS__)

◆ vloxei16_v_u8mf8

#define vloxei16_v_u8mf8 ( ... ) __riscv_vloxei16_v_u8mf8(__VA_ARGS__)

◆ vloxei16_v_u8mf8_m

#define vloxei16_v_u8mf8_m ( ... ) __riscv_vloxei16_v_u8mf8_tumu(__VA_ARGS__)

◆ vloxei32_v_f16m1

#define vloxei32_v_f16m1 ( ... ) __riscv_vloxei32_v_f16m1(__VA_ARGS__)

◆ vloxei32_v_f16m1_m

#define vloxei32_v_f16m1_m ( ... ) __riscv_vloxei32_v_f16m1_tumu(__VA_ARGS__)

◆ vloxei32_v_f16m2

#define vloxei32_v_f16m2 ( ... ) __riscv_vloxei32_v_f16m2(__VA_ARGS__)

◆ vloxei32_v_f16m2_m

#define vloxei32_v_f16m2_m ( ... ) __riscv_vloxei32_v_f16m2_tumu(__VA_ARGS__)

◆ vloxei32_v_f16m4

#define vloxei32_v_f16m4 ( ... ) __riscv_vloxei32_v_f16m4(__VA_ARGS__)

◆ vloxei32_v_f16m4_m

#define vloxei32_v_f16m4_m ( ... ) __riscv_vloxei32_v_f16m4_tumu(__VA_ARGS__)

◆ vloxei32_v_f16mf2

#define vloxei32_v_f16mf2 ( ... ) __riscv_vloxei32_v_f16mf2(__VA_ARGS__)

◆ vloxei32_v_f16mf2_m

#define vloxei32_v_f16mf2_m ( ... ) __riscv_vloxei32_v_f16mf2_tumu(__VA_ARGS__)

◆ vloxei32_v_f16mf4

#define vloxei32_v_f16mf4 ( ... ) __riscv_vloxei32_v_f16mf4(__VA_ARGS__)

◆ vloxei32_v_f16mf4_m

#define vloxei32_v_f16mf4_m ( ... ) __riscv_vloxei32_v_f16mf4_tumu(__VA_ARGS__)

◆ vloxei32_v_f32m1

#define vloxei32_v_f32m1 ( ... ) __riscv_vloxei32_v_f32m1(__VA_ARGS__)

◆ vloxei32_v_f32m1_m

#define vloxei32_v_f32m1_m ( ... ) __riscv_vloxei32_v_f32m1_tumu(__VA_ARGS__)

◆ vloxei32_v_f32m2

#define vloxei32_v_f32m2 ( ... ) __riscv_vloxei32_v_f32m2(__VA_ARGS__)

◆ vloxei32_v_f32m2_m

#define vloxei32_v_f32m2_m ( ... ) __riscv_vloxei32_v_f32m2_tumu(__VA_ARGS__)

◆ vloxei32_v_f32m4

#define vloxei32_v_f32m4 ( ... ) __riscv_vloxei32_v_f32m4(__VA_ARGS__)

◆ vloxei32_v_f32m4_m

#define vloxei32_v_f32m4_m ( ... ) __riscv_vloxei32_v_f32m4_tumu(__VA_ARGS__)

◆ vloxei32_v_f32m8

#define vloxei32_v_f32m8 ( ... ) __riscv_vloxei32_v_f32m8(__VA_ARGS__)

◆ vloxei32_v_f32m8_m

#define vloxei32_v_f32m8_m ( ... ) __riscv_vloxei32_v_f32m8_tumu(__VA_ARGS__)

◆ vloxei32_v_f32mf2

#define vloxei32_v_f32mf2 ( ... ) __riscv_vloxei32_v_f32mf2(__VA_ARGS__)

◆ vloxei32_v_f32mf2_m

#define vloxei32_v_f32mf2_m ( ... ) __riscv_vloxei32_v_f32mf2_tumu(__VA_ARGS__)

◆ vloxei32_v_f64m1

#define vloxei32_v_f64m1 ( ... ) __riscv_vloxei32_v_f64m1(__VA_ARGS__)

◆ vloxei32_v_f64m1_m

#define vloxei32_v_f64m1_m ( ... ) __riscv_vloxei32_v_f64m1_tumu(__VA_ARGS__)

◆ vloxei32_v_f64m2

#define vloxei32_v_f64m2 ( ... ) __riscv_vloxei32_v_f64m2(__VA_ARGS__)

◆ vloxei32_v_f64m2_m

#define vloxei32_v_f64m2_m ( ... ) __riscv_vloxei32_v_f64m2_tumu(__VA_ARGS__)

◆ vloxei32_v_f64m4

#define vloxei32_v_f64m4 ( ... ) __riscv_vloxei32_v_f64m4(__VA_ARGS__)

◆ vloxei32_v_f64m4_m

#define vloxei32_v_f64m4_m ( ... ) __riscv_vloxei32_v_f64m4_tumu(__VA_ARGS__)

◆ vloxei32_v_f64m8

#define vloxei32_v_f64m8 ( ... ) __riscv_vloxei32_v_f64m8(__VA_ARGS__)

◆ vloxei32_v_f64m8_m

#define vloxei32_v_f64m8_m ( ... ) __riscv_vloxei32_v_f64m8_tumu(__VA_ARGS__)

◆ vloxei32_v_i16m1

#define vloxei32_v_i16m1 ( ... ) __riscv_vloxei32_v_i16m1(__VA_ARGS__)

◆ vloxei32_v_i16m1_m

#define vloxei32_v_i16m1_m ( ... ) __riscv_vloxei32_v_i16m1_tumu(__VA_ARGS__)

◆ vloxei32_v_i16m2

#define vloxei32_v_i16m2 ( ... ) __riscv_vloxei32_v_i16m2(__VA_ARGS__)

◆ vloxei32_v_i16m2_m

#define vloxei32_v_i16m2_m ( ... ) __riscv_vloxei32_v_i16m2_tumu(__VA_ARGS__)

◆ vloxei32_v_i16m4

#define vloxei32_v_i16m4 ( ... ) __riscv_vloxei32_v_i16m4(__VA_ARGS__)

◆ vloxei32_v_i16m4_m

#define vloxei32_v_i16m4_m ( ... ) __riscv_vloxei32_v_i16m4_tumu(__VA_ARGS__)

◆ vloxei32_v_i16mf2

#define vloxei32_v_i16mf2 ( ... ) __riscv_vloxei32_v_i16mf2(__VA_ARGS__)

◆ vloxei32_v_i16mf2_m

#define vloxei32_v_i16mf2_m ( ... ) __riscv_vloxei32_v_i16mf2_tumu(__VA_ARGS__)

◆ vloxei32_v_i16mf4

#define vloxei32_v_i16mf4 ( ... ) __riscv_vloxei32_v_i16mf4(__VA_ARGS__)

◆ vloxei32_v_i16mf4_m

#define vloxei32_v_i16mf4_m ( ... ) __riscv_vloxei32_v_i16mf4_tumu(__VA_ARGS__)

◆ vloxei32_v_i32m1

#define vloxei32_v_i32m1 ( ... ) __riscv_vloxei32_v_i32m1(__VA_ARGS__)

◆ vloxei32_v_i32m1_m

#define vloxei32_v_i32m1_m ( ... ) __riscv_vloxei32_v_i32m1_tumu(__VA_ARGS__)

◆ vloxei32_v_i32m2

#define vloxei32_v_i32m2 ( ... ) __riscv_vloxei32_v_i32m2(__VA_ARGS__)

◆ vloxei32_v_i32m2_m

#define vloxei32_v_i32m2_m ( ... ) __riscv_vloxei32_v_i32m2_tumu(__VA_ARGS__)

◆ vloxei32_v_i32m4

#define vloxei32_v_i32m4 ( ... ) __riscv_vloxei32_v_i32m4(__VA_ARGS__)

◆ vloxei32_v_i32m4_m

#define vloxei32_v_i32m4_m ( ... ) __riscv_vloxei32_v_i32m4_tumu(__VA_ARGS__)

◆ vloxei32_v_i32m8

#define vloxei32_v_i32m8 ( ... ) __riscv_vloxei32_v_i32m8(__VA_ARGS__)

◆ vloxei32_v_i32m8_m

#define vloxei32_v_i32m8_m ( ... ) __riscv_vloxei32_v_i32m8_tumu(__VA_ARGS__)

◆ vloxei32_v_i32mf2

#define vloxei32_v_i32mf2 ( ... ) __riscv_vloxei32_v_i32mf2(__VA_ARGS__)

◆ vloxei32_v_i32mf2_m

#define vloxei32_v_i32mf2_m ( ... ) __riscv_vloxei32_v_i32mf2_tumu(__VA_ARGS__)

◆ vloxei32_v_i64m1

#define vloxei32_v_i64m1 ( ... ) __riscv_vloxei32_v_i64m1(__VA_ARGS__)

◆ vloxei32_v_i64m1_m

#define vloxei32_v_i64m1_m ( ... ) __riscv_vloxei32_v_i64m1_tumu(__VA_ARGS__)

◆ vloxei32_v_i64m2

#define vloxei32_v_i64m2 ( ... ) __riscv_vloxei32_v_i64m2(__VA_ARGS__)

◆ vloxei32_v_i64m2_m

#define vloxei32_v_i64m2_m ( ... ) __riscv_vloxei32_v_i64m2_tumu(__VA_ARGS__)

◆ vloxei32_v_i64m4

#define vloxei32_v_i64m4 ( ... ) __riscv_vloxei32_v_i64m4(__VA_ARGS__)

◆ vloxei32_v_i64m4_m

#define vloxei32_v_i64m4_m ( ... ) __riscv_vloxei32_v_i64m4_tumu(__VA_ARGS__)

◆ vloxei32_v_i64m8

#define vloxei32_v_i64m8 ( ... ) __riscv_vloxei32_v_i64m8(__VA_ARGS__)

◆ vloxei32_v_i64m8_m

#define vloxei32_v_i64m8_m ( ... ) __riscv_vloxei32_v_i64m8_tumu(__VA_ARGS__)

◆ vloxei32_v_i8m1

#define vloxei32_v_i8m1 ( ... ) __riscv_vloxei32_v_i8m1(__VA_ARGS__)

◆ vloxei32_v_i8m1_m

#define vloxei32_v_i8m1_m ( ... ) __riscv_vloxei32_v_i8m1_tumu(__VA_ARGS__)

◆ vloxei32_v_i8m2

#define vloxei32_v_i8m2 ( ... ) __riscv_vloxei32_v_i8m2(__VA_ARGS__)

◆ vloxei32_v_i8m2_m

#define vloxei32_v_i8m2_m ( ... ) __riscv_vloxei32_v_i8m2_tumu(__VA_ARGS__)

◆ vloxei32_v_i8mf2

#define vloxei32_v_i8mf2 ( ... ) __riscv_vloxei32_v_i8mf2(__VA_ARGS__)

◆ vloxei32_v_i8mf2_m

#define vloxei32_v_i8mf2_m ( ... ) __riscv_vloxei32_v_i8mf2_tumu(__VA_ARGS__)

◆ vloxei32_v_i8mf4

#define vloxei32_v_i8mf4 ( ... ) __riscv_vloxei32_v_i8mf4(__VA_ARGS__)

◆ vloxei32_v_i8mf4_m

#define vloxei32_v_i8mf4_m ( ... ) __riscv_vloxei32_v_i8mf4_tumu(__VA_ARGS__)

◆ vloxei32_v_i8mf8

#define vloxei32_v_i8mf8 ( ... ) __riscv_vloxei32_v_i8mf8(__VA_ARGS__)

◆ vloxei32_v_i8mf8_m

#define vloxei32_v_i8mf8_m ( ... ) __riscv_vloxei32_v_i8mf8_tumu(__VA_ARGS__)

◆ vloxei32_v_u16m1

#define vloxei32_v_u16m1 ( ... ) __riscv_vloxei32_v_u16m1(__VA_ARGS__)

◆ vloxei32_v_u16m1_m

#define vloxei32_v_u16m1_m ( ... ) __riscv_vloxei32_v_u16m1_tumu(__VA_ARGS__)

◆ vloxei32_v_u16m2

#define vloxei32_v_u16m2 ( ... ) __riscv_vloxei32_v_u16m2(__VA_ARGS__)

◆ vloxei32_v_u16m2_m

#define vloxei32_v_u16m2_m ( ... ) __riscv_vloxei32_v_u16m2_tumu(__VA_ARGS__)

◆ vloxei32_v_u16m4

#define vloxei32_v_u16m4 ( ... ) __riscv_vloxei32_v_u16m4(__VA_ARGS__)

◆ vloxei32_v_u16m4_m

#define vloxei32_v_u16m4_m ( ... ) __riscv_vloxei32_v_u16m4_tumu(__VA_ARGS__)

◆ vloxei32_v_u16mf2

#define vloxei32_v_u16mf2 ( ... ) __riscv_vloxei32_v_u16mf2(__VA_ARGS__)

◆ vloxei32_v_u16mf2_m

#define vloxei32_v_u16mf2_m ( ... ) __riscv_vloxei32_v_u16mf2_tumu(__VA_ARGS__)

◆ vloxei32_v_u16mf4

#define vloxei32_v_u16mf4 ( ... ) __riscv_vloxei32_v_u16mf4(__VA_ARGS__)

◆ vloxei32_v_u16mf4_m

#define vloxei32_v_u16mf4_m ( ... ) __riscv_vloxei32_v_u16mf4_tumu(__VA_ARGS__)

◆ vloxei32_v_u32m1

#define vloxei32_v_u32m1 ( ... ) __riscv_vloxei32_v_u32m1(__VA_ARGS__)

◆ vloxei32_v_u32m1_m

#define vloxei32_v_u32m1_m ( ... ) __riscv_vloxei32_v_u32m1_tumu(__VA_ARGS__)

◆ vloxei32_v_u32m2

#define vloxei32_v_u32m2 ( ... ) __riscv_vloxei32_v_u32m2(__VA_ARGS__)

◆ vloxei32_v_u32m2_m

#define vloxei32_v_u32m2_m ( ... ) __riscv_vloxei32_v_u32m2_tumu(__VA_ARGS__)

◆ vloxei32_v_u32m4

#define vloxei32_v_u32m4 ( ... ) __riscv_vloxei32_v_u32m4(__VA_ARGS__)

◆ vloxei32_v_u32m4_m

#define vloxei32_v_u32m4_m ( ... ) __riscv_vloxei32_v_u32m4_tumu(__VA_ARGS__)

◆ vloxei32_v_u32m8

#define vloxei32_v_u32m8 ( ... ) __riscv_vloxei32_v_u32m8(__VA_ARGS__)

◆ vloxei32_v_u32m8_m

#define vloxei32_v_u32m8_m ( ... ) __riscv_vloxei32_v_u32m8_tumu(__VA_ARGS__)

◆ vloxei32_v_u32mf2

#define vloxei32_v_u32mf2 ( ... ) __riscv_vloxei32_v_u32mf2(__VA_ARGS__)

◆ vloxei32_v_u32mf2_m

#define vloxei32_v_u32mf2_m ( ... ) __riscv_vloxei32_v_u32mf2_tumu(__VA_ARGS__)

◆ vloxei32_v_u64m1

#define vloxei32_v_u64m1 ( ... ) __riscv_vloxei32_v_u64m1(__VA_ARGS__)

◆ vloxei32_v_u64m1_m

#define vloxei32_v_u64m1_m ( ... ) __riscv_vloxei32_v_u64m1_tumu(__VA_ARGS__)

◆ vloxei32_v_u64m2

#define vloxei32_v_u64m2 ( ... ) __riscv_vloxei32_v_u64m2(__VA_ARGS__)

◆ vloxei32_v_u64m2_m

#define vloxei32_v_u64m2_m ( ... ) __riscv_vloxei32_v_u64m2_tumu(__VA_ARGS__)

◆ vloxei32_v_u64m4

#define vloxei32_v_u64m4 ( ... ) __riscv_vloxei32_v_u64m4(__VA_ARGS__)

◆ vloxei32_v_u64m4_m

#define vloxei32_v_u64m4_m ( ... ) __riscv_vloxei32_v_u64m4_tumu(__VA_ARGS__)

◆ vloxei32_v_u64m8

#define vloxei32_v_u64m8 ( ... ) __riscv_vloxei32_v_u64m8(__VA_ARGS__)

◆ vloxei32_v_u64m8_m

#define vloxei32_v_u64m8_m ( ... ) __riscv_vloxei32_v_u64m8_tumu(__VA_ARGS__)

◆ vloxei32_v_u8m1

#define vloxei32_v_u8m1 ( ... ) __riscv_vloxei32_v_u8m1(__VA_ARGS__)

◆ vloxei32_v_u8m1_m

#define vloxei32_v_u8m1_m ( ... ) __riscv_vloxei32_v_u8m1_tumu(__VA_ARGS__)

◆ vloxei32_v_u8m2

#define vloxei32_v_u8m2 ( ... ) __riscv_vloxei32_v_u8m2(__VA_ARGS__)

◆ vloxei32_v_u8m2_m

#define vloxei32_v_u8m2_m ( ... ) __riscv_vloxei32_v_u8m2_tumu(__VA_ARGS__)

◆ vloxei32_v_u8mf2

#define vloxei32_v_u8mf2 ( ... ) __riscv_vloxei32_v_u8mf2(__VA_ARGS__)

◆ vloxei32_v_u8mf2_m

#define vloxei32_v_u8mf2_m ( ... ) __riscv_vloxei32_v_u8mf2_tumu(__VA_ARGS__)

◆ vloxei32_v_u8mf4

#define vloxei32_v_u8mf4 ( ... ) __riscv_vloxei32_v_u8mf4(__VA_ARGS__)

◆ vloxei32_v_u8mf4_m

#define vloxei32_v_u8mf4_m ( ... ) __riscv_vloxei32_v_u8mf4_tumu(__VA_ARGS__)

◆ vloxei32_v_u8mf8

#define vloxei32_v_u8mf8 ( ... ) __riscv_vloxei32_v_u8mf8(__VA_ARGS__)

◆ vloxei32_v_u8mf8_m

#define vloxei32_v_u8mf8_m ( ... ) __riscv_vloxei32_v_u8mf8_tumu(__VA_ARGS__)

◆ vloxei64_v_f16m1

#define vloxei64_v_f16m1 ( ... ) __riscv_vloxei64_v_f16m1(__VA_ARGS__)

◆ vloxei64_v_f16m1_m

#define vloxei64_v_f16m1_m ( ... ) __riscv_vloxei64_v_f16m1_tumu(__VA_ARGS__)

◆ vloxei64_v_f16m2

#define vloxei64_v_f16m2 ( ... ) __riscv_vloxei64_v_f16m2(__VA_ARGS__)

◆ vloxei64_v_f16m2_m

#define vloxei64_v_f16m2_m ( ... ) __riscv_vloxei64_v_f16m2_tumu(__VA_ARGS__)

◆ vloxei64_v_f16mf2

#define vloxei64_v_f16mf2 ( ... ) __riscv_vloxei64_v_f16mf2(__VA_ARGS__)

◆ vloxei64_v_f16mf2_m

#define vloxei64_v_f16mf2_m ( ... ) __riscv_vloxei64_v_f16mf2_tumu(__VA_ARGS__)

◆ vloxei64_v_f16mf4

#define vloxei64_v_f16mf4 ( ... ) __riscv_vloxei64_v_f16mf4(__VA_ARGS__)

◆ vloxei64_v_f16mf4_m

#define vloxei64_v_f16mf4_m ( ... ) __riscv_vloxei64_v_f16mf4_tumu(__VA_ARGS__)

◆ vloxei64_v_f32m1

#define vloxei64_v_f32m1 ( ... ) __riscv_vloxei64_v_f32m1(__VA_ARGS__)

◆ vloxei64_v_f32m1_m

#define vloxei64_v_f32m1_m ( ... ) __riscv_vloxei64_v_f32m1_tumu(__VA_ARGS__)

◆ vloxei64_v_f32m2

#define vloxei64_v_f32m2 ( ... ) __riscv_vloxei64_v_f32m2(__VA_ARGS__)

◆ vloxei64_v_f32m2_m

#define vloxei64_v_f32m2_m ( ... ) __riscv_vloxei64_v_f32m2_tumu(__VA_ARGS__)

◆ vloxei64_v_f32m4

#define vloxei64_v_f32m4 ( ... ) __riscv_vloxei64_v_f32m4(__VA_ARGS__)

◆ vloxei64_v_f32m4_m

#define vloxei64_v_f32m4_m ( ... ) __riscv_vloxei64_v_f32m4_tumu(__VA_ARGS__)

◆ vloxei64_v_f32mf2

#define vloxei64_v_f32mf2 ( ... ) __riscv_vloxei64_v_f32mf2(__VA_ARGS__)

◆ vloxei64_v_f32mf2_m

#define vloxei64_v_f32mf2_m ( ... ) __riscv_vloxei64_v_f32mf2_tumu(__VA_ARGS__)

◆ vloxei64_v_f64m1

#define vloxei64_v_f64m1 ( ... ) __riscv_vloxei64_v_f64m1(__VA_ARGS__)

◆ vloxei64_v_f64m1_m

#define vloxei64_v_f64m1_m ( ... ) __riscv_vloxei64_v_f64m1_tumu(__VA_ARGS__)

◆ vloxei64_v_f64m2

#define vloxei64_v_f64m2 ( ... ) __riscv_vloxei64_v_f64m2(__VA_ARGS__)

◆ vloxei64_v_f64m2_m

#define vloxei64_v_f64m2_m ( ... ) __riscv_vloxei64_v_f64m2_tumu(__VA_ARGS__)

◆ vloxei64_v_f64m4

#define vloxei64_v_f64m4 ( ... ) __riscv_vloxei64_v_f64m4(__VA_ARGS__)

◆ vloxei64_v_f64m4_m

#define vloxei64_v_f64m4_m ( ... ) __riscv_vloxei64_v_f64m4_tumu(__VA_ARGS__)

◆ vloxei64_v_f64m8

#define vloxei64_v_f64m8 ( ... ) __riscv_vloxei64_v_f64m8(__VA_ARGS__)

◆ vloxei64_v_f64m8_m

#define vloxei64_v_f64m8_m ( ... ) __riscv_vloxei64_v_f64m8_tumu(__VA_ARGS__)

◆ vloxei64_v_i16m1

#define vloxei64_v_i16m1 ( ... ) __riscv_vloxei64_v_i16m1(__VA_ARGS__)

◆ vloxei64_v_i16m1_m

#define vloxei64_v_i16m1_m ( ... ) __riscv_vloxei64_v_i16m1_tumu(__VA_ARGS__)

◆ vloxei64_v_i16m2

#define vloxei64_v_i16m2 ( ... ) __riscv_vloxei64_v_i16m2(__VA_ARGS__)

◆ vloxei64_v_i16m2_m

#define vloxei64_v_i16m2_m ( ... ) __riscv_vloxei64_v_i16m2_tumu(__VA_ARGS__)

◆ vloxei64_v_i16mf2

#define vloxei64_v_i16mf2 ( ... ) __riscv_vloxei64_v_i16mf2(__VA_ARGS__)

◆ vloxei64_v_i16mf2_m

#define vloxei64_v_i16mf2_m ( ... ) __riscv_vloxei64_v_i16mf2_tumu(__VA_ARGS__)

◆ vloxei64_v_i16mf4

#define vloxei64_v_i16mf4 ( ... ) __riscv_vloxei64_v_i16mf4(__VA_ARGS__)

◆ vloxei64_v_i16mf4_m

#define vloxei64_v_i16mf4_m ( ... ) __riscv_vloxei64_v_i16mf4_tumu(__VA_ARGS__)

◆ vloxei64_v_i32m1

#define vloxei64_v_i32m1 ( ... ) __riscv_vloxei64_v_i32m1(__VA_ARGS__)

◆ vloxei64_v_i32m1_m

#define vloxei64_v_i32m1_m ( ... ) __riscv_vloxei64_v_i32m1_tumu(__VA_ARGS__)

◆ vloxei64_v_i32m2

#define vloxei64_v_i32m2 ( ... ) __riscv_vloxei64_v_i32m2(__VA_ARGS__)

◆ vloxei64_v_i32m2_m

#define vloxei64_v_i32m2_m ( ... ) __riscv_vloxei64_v_i32m2_tumu(__VA_ARGS__)

◆ vloxei64_v_i32m4

#define vloxei64_v_i32m4 ( ... ) __riscv_vloxei64_v_i32m4(__VA_ARGS__)

◆ vloxei64_v_i32m4_m

#define vloxei64_v_i32m4_m ( ... ) __riscv_vloxei64_v_i32m4_tumu(__VA_ARGS__)

◆ vloxei64_v_i32mf2

#define vloxei64_v_i32mf2 ( ... ) __riscv_vloxei64_v_i32mf2(__VA_ARGS__)

◆ vloxei64_v_i32mf2_m

#define vloxei64_v_i32mf2_m ( ... ) __riscv_vloxei64_v_i32mf2_tumu(__VA_ARGS__)

◆ vloxei64_v_i64m1

#define vloxei64_v_i64m1 ( ... ) __riscv_vloxei64_v_i64m1(__VA_ARGS__)

◆ vloxei64_v_i64m1_m

#define vloxei64_v_i64m1_m ( ... ) __riscv_vloxei64_v_i64m1_tumu(__VA_ARGS__)

◆ vloxei64_v_i64m2

#define vloxei64_v_i64m2 ( ... ) __riscv_vloxei64_v_i64m2(__VA_ARGS__)

◆ vloxei64_v_i64m2_m

#define vloxei64_v_i64m2_m ( ... ) __riscv_vloxei64_v_i64m2_tumu(__VA_ARGS__)

◆ vloxei64_v_i64m4

#define vloxei64_v_i64m4 ( ... ) __riscv_vloxei64_v_i64m4(__VA_ARGS__)

◆ vloxei64_v_i64m4_m

#define vloxei64_v_i64m4_m ( ... ) __riscv_vloxei64_v_i64m4_tumu(__VA_ARGS__)

◆ vloxei64_v_i64m8

#define vloxei64_v_i64m8 ( ... ) __riscv_vloxei64_v_i64m8(__VA_ARGS__)

◆ vloxei64_v_i64m8_m

#define vloxei64_v_i64m8_m ( ... ) __riscv_vloxei64_v_i64m8_tumu(__VA_ARGS__)

◆ vloxei64_v_i8m1

#define vloxei64_v_i8m1 ( ... ) __riscv_vloxei64_v_i8m1(__VA_ARGS__)

◆ vloxei64_v_i8m1_m

#define vloxei64_v_i8m1_m ( ... ) __riscv_vloxei64_v_i8m1_tumu(__VA_ARGS__)

◆ vloxei64_v_i8mf2

#define vloxei64_v_i8mf2 ( ... ) __riscv_vloxei64_v_i8mf2(__VA_ARGS__)

◆ vloxei64_v_i8mf2_m

#define vloxei64_v_i8mf2_m ( ... ) __riscv_vloxei64_v_i8mf2_tumu(__VA_ARGS__)

◆ vloxei64_v_i8mf4

#define vloxei64_v_i8mf4 ( ... ) __riscv_vloxei64_v_i8mf4(__VA_ARGS__)

◆ vloxei64_v_i8mf4_m

#define vloxei64_v_i8mf4_m ( ... ) __riscv_vloxei64_v_i8mf4_tumu(__VA_ARGS__)

◆ vloxei64_v_i8mf8

#define vloxei64_v_i8mf8 ( ... ) __riscv_vloxei64_v_i8mf8(__VA_ARGS__)

◆ vloxei64_v_i8mf8_m

#define vloxei64_v_i8mf8_m ( ... ) __riscv_vloxei64_v_i8mf8_tumu(__VA_ARGS__)

◆ vloxei64_v_u16m1

#define vloxei64_v_u16m1 ( ... ) __riscv_vloxei64_v_u16m1(__VA_ARGS__)

◆ vloxei64_v_u16m1_m

#define vloxei64_v_u16m1_m ( ... ) __riscv_vloxei64_v_u16m1_tumu(__VA_ARGS__)

◆ vloxei64_v_u16m2

#define vloxei64_v_u16m2 ( ... ) __riscv_vloxei64_v_u16m2(__VA_ARGS__)

◆ vloxei64_v_u16m2_m

#define vloxei64_v_u16m2_m ( ... ) __riscv_vloxei64_v_u16m2_tumu(__VA_ARGS__)

◆ vloxei64_v_u16mf2

#define vloxei64_v_u16mf2 ( ... ) __riscv_vloxei64_v_u16mf2(__VA_ARGS__)

◆ vloxei64_v_u16mf2_m

#define vloxei64_v_u16mf2_m ( ... ) __riscv_vloxei64_v_u16mf2_tumu(__VA_ARGS__)

◆ vloxei64_v_u16mf4

#define vloxei64_v_u16mf4 ( ... ) __riscv_vloxei64_v_u16mf4(__VA_ARGS__)

◆ vloxei64_v_u16mf4_m

#define vloxei64_v_u16mf4_m ( ... ) __riscv_vloxei64_v_u16mf4_tumu(__VA_ARGS__)

◆ vloxei64_v_u32m1

#define vloxei64_v_u32m1 ( ... ) __riscv_vloxei64_v_u32m1(__VA_ARGS__)

◆ vloxei64_v_u32m1_m

#define vloxei64_v_u32m1_m ( ... ) __riscv_vloxei64_v_u32m1_tumu(__VA_ARGS__)

◆ vloxei64_v_u32m2

#define vloxei64_v_u32m2 ( ... ) __riscv_vloxei64_v_u32m2(__VA_ARGS__)

◆ vloxei64_v_u32m2_m

#define vloxei64_v_u32m2_m ( ... ) __riscv_vloxei64_v_u32m2_tumu(__VA_ARGS__)

◆ vloxei64_v_u32m4

#define vloxei64_v_u32m4 ( ... ) __riscv_vloxei64_v_u32m4(__VA_ARGS__)

◆ vloxei64_v_u32m4_m

#define vloxei64_v_u32m4_m ( ... ) __riscv_vloxei64_v_u32m4_tumu(__VA_ARGS__)

◆ vloxei64_v_u32mf2

#define vloxei64_v_u32mf2 ( ... ) __riscv_vloxei64_v_u32mf2(__VA_ARGS__)

◆ vloxei64_v_u32mf2_m

#define vloxei64_v_u32mf2_m ( ... ) __riscv_vloxei64_v_u32mf2_tumu(__VA_ARGS__)

◆ vloxei64_v_u64m1

#define vloxei64_v_u64m1 ( ... ) __riscv_vloxei64_v_u64m1(__VA_ARGS__)

◆ vloxei64_v_u64m1_m

#define vloxei64_v_u64m1_m ( ... ) __riscv_vloxei64_v_u64m1_tumu(__VA_ARGS__)

◆ vloxei64_v_u64m2

#define vloxei64_v_u64m2 ( ... ) __riscv_vloxei64_v_u64m2(__VA_ARGS__)

◆ vloxei64_v_u64m2_m

#define vloxei64_v_u64m2_m ( ... ) __riscv_vloxei64_v_u64m2_tumu(__VA_ARGS__)

◆ vloxei64_v_u64m4

#define vloxei64_v_u64m4 ( ... ) __riscv_vloxei64_v_u64m4(__VA_ARGS__)

◆ vloxei64_v_u64m4_m

#define vloxei64_v_u64m4_m ( ... ) __riscv_vloxei64_v_u64m4_tumu(__VA_ARGS__)

◆ vloxei64_v_u64m8

#define vloxei64_v_u64m8 ( ... ) __riscv_vloxei64_v_u64m8(__VA_ARGS__)

◆ vloxei64_v_u64m8_m

#define vloxei64_v_u64m8_m ( ... ) __riscv_vloxei64_v_u64m8_tumu(__VA_ARGS__)

◆ vloxei64_v_u8m1

#define vloxei64_v_u8m1 ( ... ) __riscv_vloxei64_v_u8m1(__VA_ARGS__)

◆ vloxei64_v_u8m1_m

#define vloxei64_v_u8m1_m ( ... ) __riscv_vloxei64_v_u8m1_tumu(__VA_ARGS__)

◆ vloxei64_v_u8mf2

#define vloxei64_v_u8mf2 ( ... ) __riscv_vloxei64_v_u8mf2(__VA_ARGS__)

◆ vloxei64_v_u8mf2_m

#define vloxei64_v_u8mf2_m ( ... ) __riscv_vloxei64_v_u8mf2_tumu(__VA_ARGS__)

◆ vloxei64_v_u8mf4

#define vloxei64_v_u8mf4 ( ... ) __riscv_vloxei64_v_u8mf4(__VA_ARGS__)

◆ vloxei64_v_u8mf4_m

#define vloxei64_v_u8mf4_m ( ... ) __riscv_vloxei64_v_u8mf4_tumu(__VA_ARGS__)

◆ vloxei64_v_u8mf8

#define vloxei64_v_u8mf8 ( ... ) __riscv_vloxei64_v_u8mf8(__VA_ARGS__)

◆ vloxei64_v_u8mf8_m

#define vloxei64_v_u8mf8_m ( ... ) __riscv_vloxei64_v_u8mf8_tumu(__VA_ARGS__)

◆ vloxei8_v_f16m1

#define vloxei8_v_f16m1 ( ... ) __riscv_vloxei8_v_f16m1(__VA_ARGS__)

◆ vloxei8_v_f16m1_m

#define vloxei8_v_f16m1_m ( ... ) __riscv_vloxei8_v_f16m1_tumu(__VA_ARGS__)

◆ vloxei8_v_f16m2

#define vloxei8_v_f16m2 ( ... ) __riscv_vloxei8_v_f16m2(__VA_ARGS__)

◆ vloxei8_v_f16m2_m

#define vloxei8_v_f16m2_m ( ... ) __riscv_vloxei8_v_f16m2_tumu(__VA_ARGS__)

◆ vloxei8_v_f16m4

#define vloxei8_v_f16m4 ( ... ) __riscv_vloxei8_v_f16m4(__VA_ARGS__)

◆ vloxei8_v_f16m4_m

#define vloxei8_v_f16m4_m ( ... ) __riscv_vloxei8_v_f16m4_tumu(__VA_ARGS__)

◆ vloxei8_v_f16m8

#define vloxei8_v_f16m8 ( ... ) __riscv_vloxei8_v_f16m8(__VA_ARGS__)

◆ vloxei8_v_f16m8_m

#define vloxei8_v_f16m8_m ( ... ) __riscv_vloxei8_v_f16m8_tumu(__VA_ARGS__)

◆ vloxei8_v_f16mf2

#define vloxei8_v_f16mf2 ( ... ) __riscv_vloxei8_v_f16mf2(__VA_ARGS__)

◆ vloxei8_v_f16mf2_m

#define vloxei8_v_f16mf2_m ( ... ) __riscv_vloxei8_v_f16mf2_tumu(__VA_ARGS__)

◆ vloxei8_v_f16mf4

#define vloxei8_v_f16mf4 ( ... ) __riscv_vloxei8_v_f16mf4(__VA_ARGS__)

◆ vloxei8_v_f16mf4_m

#define vloxei8_v_f16mf4_m ( ... ) __riscv_vloxei8_v_f16mf4_tumu(__VA_ARGS__)

◆ vloxei8_v_f32m1

#define vloxei8_v_f32m1 ( ... ) __riscv_vloxei8_v_f32m1(__VA_ARGS__)

◆ vloxei8_v_f32m1_m

#define vloxei8_v_f32m1_m ( ... ) __riscv_vloxei8_v_f32m1_tumu(__VA_ARGS__)

◆ vloxei8_v_f32m2

#define vloxei8_v_f32m2 ( ... ) __riscv_vloxei8_v_f32m2(__VA_ARGS__)

◆ vloxei8_v_f32m2_m

#define vloxei8_v_f32m2_m ( ... ) __riscv_vloxei8_v_f32m2_tumu(__VA_ARGS__)

◆ vloxei8_v_f32m4

#define vloxei8_v_f32m4 ( ... ) __riscv_vloxei8_v_f32m4(__VA_ARGS__)

◆ vloxei8_v_f32m4_m

#define vloxei8_v_f32m4_m ( ... ) __riscv_vloxei8_v_f32m4_tumu(__VA_ARGS__)

◆ vloxei8_v_f32m8

#define vloxei8_v_f32m8 ( ... ) __riscv_vloxei8_v_f32m8(__VA_ARGS__)

◆ vloxei8_v_f32m8_m

#define vloxei8_v_f32m8_m ( ... ) __riscv_vloxei8_v_f32m8_tumu(__VA_ARGS__)

◆ vloxei8_v_f32mf2

#define vloxei8_v_f32mf2 ( ... ) __riscv_vloxei8_v_f32mf2(__VA_ARGS__)

◆ vloxei8_v_f32mf2_m

#define vloxei8_v_f32mf2_m ( ... ) __riscv_vloxei8_v_f32mf2_tumu(__VA_ARGS__)

◆ vloxei8_v_f64m1

#define vloxei8_v_f64m1 ( ... ) __riscv_vloxei8_v_f64m1(__VA_ARGS__)

◆ vloxei8_v_f64m1_m

#define vloxei8_v_f64m1_m ( ... ) __riscv_vloxei8_v_f64m1_tumu(__VA_ARGS__)

◆ vloxei8_v_f64m2

#define vloxei8_v_f64m2 ( ... ) __riscv_vloxei8_v_f64m2(__VA_ARGS__)

◆ vloxei8_v_f64m2_m

#define vloxei8_v_f64m2_m ( ... ) __riscv_vloxei8_v_f64m2_tumu(__VA_ARGS__)

◆ vloxei8_v_f64m4

#define vloxei8_v_f64m4 ( ... ) __riscv_vloxei8_v_f64m4(__VA_ARGS__)

◆ vloxei8_v_f64m4_m

#define vloxei8_v_f64m4_m ( ... ) __riscv_vloxei8_v_f64m4_tumu(__VA_ARGS__)

◆ vloxei8_v_f64m8

#define vloxei8_v_f64m8 ( ... ) __riscv_vloxei8_v_f64m8(__VA_ARGS__)

◆ vloxei8_v_f64m8_m

#define vloxei8_v_f64m8_m ( ... ) __riscv_vloxei8_v_f64m8_tumu(__VA_ARGS__)

◆ vloxei8_v_i16m1

#define vloxei8_v_i16m1 ( ... ) __riscv_vloxei8_v_i16m1(__VA_ARGS__)

◆ vloxei8_v_i16m1_m

#define vloxei8_v_i16m1_m ( ... ) __riscv_vloxei8_v_i16m1_tumu(__VA_ARGS__)

◆ vloxei8_v_i16m2

#define vloxei8_v_i16m2 ( ... ) __riscv_vloxei8_v_i16m2(__VA_ARGS__)

◆ vloxei8_v_i16m2_m

#define vloxei8_v_i16m2_m ( ... ) __riscv_vloxei8_v_i16m2_tumu(__VA_ARGS__)

◆ vloxei8_v_i16m4

#define vloxei8_v_i16m4 ( ... ) __riscv_vloxei8_v_i16m4(__VA_ARGS__)

◆ vloxei8_v_i16m4_m

#define vloxei8_v_i16m4_m ( ... ) __riscv_vloxei8_v_i16m4_tumu(__VA_ARGS__)

◆ vloxei8_v_i16m8

#define vloxei8_v_i16m8 ( ... ) __riscv_vloxei8_v_i16m8(__VA_ARGS__)

◆ vloxei8_v_i16m8_m

#define vloxei8_v_i16m8_m ( ... ) __riscv_vloxei8_v_i16m8_tumu(__VA_ARGS__)

◆ vloxei8_v_i16mf2

#define vloxei8_v_i16mf2 ( ... ) __riscv_vloxei8_v_i16mf2(__VA_ARGS__)

◆ vloxei8_v_i16mf2_m

#define vloxei8_v_i16mf2_m ( ... ) __riscv_vloxei8_v_i16mf2_tumu(__VA_ARGS__)

◆ vloxei8_v_i16mf4

#define vloxei8_v_i16mf4 ( ... ) __riscv_vloxei8_v_i16mf4(__VA_ARGS__)

◆ vloxei8_v_i16mf4_m

#define vloxei8_v_i16mf4_m ( ... ) __riscv_vloxei8_v_i16mf4_tumu(__VA_ARGS__)

◆ vloxei8_v_i32m1

#define vloxei8_v_i32m1 ( ... ) __riscv_vloxei8_v_i32m1(__VA_ARGS__)

◆ vloxei8_v_i32m1_m

#define vloxei8_v_i32m1_m ( ... ) __riscv_vloxei8_v_i32m1_tumu(__VA_ARGS__)

◆ vloxei8_v_i32m2

#define vloxei8_v_i32m2 ( ... ) __riscv_vloxei8_v_i32m2(__VA_ARGS__)

◆ vloxei8_v_i32m2_m

#define vloxei8_v_i32m2_m ( ... ) __riscv_vloxei8_v_i32m2_tumu(__VA_ARGS__)

◆ vloxei8_v_i32m4

#define vloxei8_v_i32m4 ( ... ) __riscv_vloxei8_v_i32m4(__VA_ARGS__)

◆ vloxei8_v_i32m4_m

#define vloxei8_v_i32m4_m ( ... ) __riscv_vloxei8_v_i32m4_tumu(__VA_ARGS__)

◆ vloxei8_v_i32m8

#define vloxei8_v_i32m8 ( ... ) __riscv_vloxei8_v_i32m8(__VA_ARGS__)

◆ vloxei8_v_i32m8_m

#define vloxei8_v_i32m8_m ( ... ) __riscv_vloxei8_v_i32m8_tumu(__VA_ARGS__)

◆ vloxei8_v_i32mf2

#define vloxei8_v_i32mf2 ( ... ) __riscv_vloxei8_v_i32mf2(__VA_ARGS__)

◆ vloxei8_v_i32mf2_m

#define vloxei8_v_i32mf2_m ( ... ) __riscv_vloxei8_v_i32mf2_tumu(__VA_ARGS__)

◆ vloxei8_v_i64m1

#define vloxei8_v_i64m1 ( ... ) __riscv_vloxei8_v_i64m1(__VA_ARGS__)

◆ vloxei8_v_i64m1_m

#define vloxei8_v_i64m1_m ( ... ) __riscv_vloxei8_v_i64m1_tumu(__VA_ARGS__)

◆ vloxei8_v_i64m2

#define vloxei8_v_i64m2 ( ... ) __riscv_vloxei8_v_i64m2(__VA_ARGS__)

◆ vloxei8_v_i64m2_m

#define vloxei8_v_i64m2_m ( ... ) __riscv_vloxei8_v_i64m2_tumu(__VA_ARGS__)

◆ vloxei8_v_i64m4

#define vloxei8_v_i64m4 ( ... ) __riscv_vloxei8_v_i64m4(__VA_ARGS__)

◆ vloxei8_v_i64m4_m

#define vloxei8_v_i64m4_m ( ... ) __riscv_vloxei8_v_i64m4_tumu(__VA_ARGS__)

◆ vloxei8_v_i64m8

#define vloxei8_v_i64m8 ( ... ) __riscv_vloxei8_v_i64m8(__VA_ARGS__)

◆ vloxei8_v_i64m8_m

#define vloxei8_v_i64m8_m ( ... ) __riscv_vloxei8_v_i64m8_tumu(__VA_ARGS__)

◆ vloxei8_v_i8m1

#define vloxei8_v_i8m1 ( ... ) __riscv_vloxei8_v_i8m1(__VA_ARGS__)

◆ vloxei8_v_i8m1_m

#define vloxei8_v_i8m1_m ( ... ) __riscv_vloxei8_v_i8m1_tumu(__VA_ARGS__)

◆ vloxei8_v_i8m2

#define vloxei8_v_i8m2 ( ... ) __riscv_vloxei8_v_i8m2(__VA_ARGS__)

◆ vloxei8_v_i8m2_m

#define vloxei8_v_i8m2_m ( ... ) __riscv_vloxei8_v_i8m2_tumu(__VA_ARGS__)

◆ vloxei8_v_i8m4

#define vloxei8_v_i8m4 ( ... ) __riscv_vloxei8_v_i8m4(__VA_ARGS__)

◆ vloxei8_v_i8m4_m

#define vloxei8_v_i8m4_m ( ... ) __riscv_vloxei8_v_i8m4_tumu(__VA_ARGS__)

◆ vloxei8_v_i8m8

#define vloxei8_v_i8m8 ( ... ) __riscv_vloxei8_v_i8m8(__VA_ARGS__)

◆ vloxei8_v_i8m8_m

#define vloxei8_v_i8m8_m ( ... ) __riscv_vloxei8_v_i8m8_tumu(__VA_ARGS__)

◆ vloxei8_v_i8mf2

#define vloxei8_v_i8mf2 ( ... ) __riscv_vloxei8_v_i8mf2(__VA_ARGS__)

◆ vloxei8_v_i8mf2_m

#define vloxei8_v_i8mf2_m ( ... ) __riscv_vloxei8_v_i8mf2_tumu(__VA_ARGS__)

◆ vloxei8_v_i8mf4

#define vloxei8_v_i8mf4 ( ... ) __riscv_vloxei8_v_i8mf4(__VA_ARGS__)

◆ vloxei8_v_i8mf4_m

#define vloxei8_v_i8mf4_m ( ... ) __riscv_vloxei8_v_i8mf4_tumu(__VA_ARGS__)

◆ vloxei8_v_i8mf8

#define vloxei8_v_i8mf8 ( ... ) __riscv_vloxei8_v_i8mf8(__VA_ARGS__)

◆ vloxei8_v_i8mf8_m

#define vloxei8_v_i8mf8_m ( ... ) __riscv_vloxei8_v_i8mf8_tumu(__VA_ARGS__)

◆ vloxei8_v_u16m1

#define vloxei8_v_u16m1 ( ... ) __riscv_vloxei8_v_u16m1(__VA_ARGS__)

◆ vloxei8_v_u16m1_m

#define vloxei8_v_u16m1_m ( ... ) __riscv_vloxei8_v_u16m1_tumu(__VA_ARGS__)

◆ vloxei8_v_u16m2

#define vloxei8_v_u16m2 ( ... ) __riscv_vloxei8_v_u16m2(__VA_ARGS__)

◆ vloxei8_v_u16m2_m

#define vloxei8_v_u16m2_m ( ... ) __riscv_vloxei8_v_u16m2_tumu(__VA_ARGS__)

◆ vloxei8_v_u16m4

#define vloxei8_v_u16m4 ( ... ) __riscv_vloxei8_v_u16m4(__VA_ARGS__)

◆ vloxei8_v_u16m4_m

#define vloxei8_v_u16m4_m ( ... ) __riscv_vloxei8_v_u16m4_tumu(__VA_ARGS__)

◆ vloxei8_v_u16m8

#define vloxei8_v_u16m8 ( ... ) __riscv_vloxei8_v_u16m8(__VA_ARGS__)

◆ vloxei8_v_u16m8_m

#define vloxei8_v_u16m8_m ( ... ) __riscv_vloxei8_v_u16m8_tumu(__VA_ARGS__)

◆ vloxei8_v_u16mf2

#define vloxei8_v_u16mf2 ( ... ) __riscv_vloxei8_v_u16mf2(__VA_ARGS__)

◆ vloxei8_v_u16mf2_m

#define vloxei8_v_u16mf2_m ( ... ) __riscv_vloxei8_v_u16mf2_tumu(__VA_ARGS__)

◆ vloxei8_v_u16mf4

#define vloxei8_v_u16mf4 ( ... ) __riscv_vloxei8_v_u16mf4(__VA_ARGS__)

◆ vloxei8_v_u16mf4_m

#define vloxei8_v_u16mf4_m ( ... ) __riscv_vloxei8_v_u16mf4_tumu(__VA_ARGS__)

◆ vloxei8_v_u32m1

#define vloxei8_v_u32m1 ( ... ) __riscv_vloxei8_v_u32m1(__VA_ARGS__)

◆ vloxei8_v_u32m1_m

#define vloxei8_v_u32m1_m ( ... ) __riscv_vloxei8_v_u32m1_tumu(__VA_ARGS__)

◆ vloxei8_v_u32m2

#define vloxei8_v_u32m2 ( ... ) __riscv_vloxei8_v_u32m2(__VA_ARGS__)

◆ vloxei8_v_u32m2_m

#define vloxei8_v_u32m2_m ( ... ) __riscv_vloxei8_v_u32m2_tumu(__VA_ARGS__)

◆ vloxei8_v_u32m4

#define vloxei8_v_u32m4 ( ... ) __riscv_vloxei8_v_u32m4(__VA_ARGS__)

◆ vloxei8_v_u32m4_m

#define vloxei8_v_u32m4_m ( ... ) __riscv_vloxei8_v_u32m4_tumu(__VA_ARGS__)

◆ vloxei8_v_u32m8

#define vloxei8_v_u32m8 ( ... ) __riscv_vloxei8_v_u32m8(__VA_ARGS__)

◆ vloxei8_v_u32m8_m

#define vloxei8_v_u32m8_m ( ... ) __riscv_vloxei8_v_u32m8_tumu(__VA_ARGS__)

◆ vloxei8_v_u32mf2

#define vloxei8_v_u32mf2 ( ... ) __riscv_vloxei8_v_u32mf2(__VA_ARGS__)

◆ vloxei8_v_u32mf2_m

#define vloxei8_v_u32mf2_m ( ... ) __riscv_vloxei8_v_u32mf2_tumu(__VA_ARGS__)

◆ vloxei8_v_u64m1

#define vloxei8_v_u64m1 ( ... ) __riscv_vloxei8_v_u64m1(__VA_ARGS__)

◆ vloxei8_v_u64m1_m

#define vloxei8_v_u64m1_m ( ... ) __riscv_vloxei8_v_u64m1_tumu(__VA_ARGS__)

◆ vloxei8_v_u64m2

#define vloxei8_v_u64m2 ( ... ) __riscv_vloxei8_v_u64m2(__VA_ARGS__)

◆ vloxei8_v_u64m2_m

#define vloxei8_v_u64m2_m ( ... ) __riscv_vloxei8_v_u64m2_tumu(__VA_ARGS__)

◆ vloxei8_v_u64m4

#define vloxei8_v_u64m4 ( ... ) __riscv_vloxei8_v_u64m4(__VA_ARGS__)

◆ vloxei8_v_u64m4_m

#define vloxei8_v_u64m4_m ( ... ) __riscv_vloxei8_v_u64m4_tumu(__VA_ARGS__)

◆ vloxei8_v_u64m8

#define vloxei8_v_u64m8 ( ... ) __riscv_vloxei8_v_u64m8(__VA_ARGS__)

◆ vloxei8_v_u64m8_m

#define vloxei8_v_u64m8_m ( ... ) __riscv_vloxei8_v_u64m8_tumu(__VA_ARGS__)

◆ vloxei8_v_u8m1

#define vloxei8_v_u8m1 ( ... ) __riscv_vloxei8_v_u8m1(__VA_ARGS__)

◆ vloxei8_v_u8m1_m

#define vloxei8_v_u8m1_m ( ... ) __riscv_vloxei8_v_u8m1_tumu(__VA_ARGS__)

◆ vloxei8_v_u8m2

#define vloxei8_v_u8m2 ( ... ) __riscv_vloxei8_v_u8m2(__VA_ARGS__)

◆ vloxei8_v_u8m2_m

#define vloxei8_v_u8m2_m ( ... ) __riscv_vloxei8_v_u8m2_tumu(__VA_ARGS__)

◆ vloxei8_v_u8m4

#define vloxei8_v_u8m4 ( ... ) __riscv_vloxei8_v_u8m4(__VA_ARGS__)

◆ vloxei8_v_u8m4_m

#define vloxei8_v_u8m4_m ( ... ) __riscv_vloxei8_v_u8m4_tumu(__VA_ARGS__)

◆ vloxei8_v_u8m8

#define vloxei8_v_u8m8 ( ... ) __riscv_vloxei8_v_u8m8(__VA_ARGS__)

◆ vloxei8_v_u8m8_m

#define vloxei8_v_u8m8_m ( ... ) __riscv_vloxei8_v_u8m8_tumu(__VA_ARGS__)

◆ vloxei8_v_u8mf2

#define vloxei8_v_u8mf2 ( ... ) __riscv_vloxei8_v_u8mf2(__VA_ARGS__)

◆ vloxei8_v_u8mf2_m

#define vloxei8_v_u8mf2_m ( ... ) __riscv_vloxei8_v_u8mf2_tumu(__VA_ARGS__)

◆ vloxei8_v_u8mf4

#define vloxei8_v_u8mf4 ( ... ) __riscv_vloxei8_v_u8mf4(__VA_ARGS__)

◆ vloxei8_v_u8mf4_m

#define vloxei8_v_u8mf4_m ( ... ) __riscv_vloxei8_v_u8mf4_tumu(__VA_ARGS__)

◆ vloxei8_v_u8mf8

#define vloxei8_v_u8mf8 ( ... ) __riscv_vloxei8_v_u8mf8(__VA_ARGS__)

◆ vloxei8_v_u8mf8_m

#define vloxei8_v_u8mf8_m ( ... ) __riscv_vloxei8_v_u8mf8_tumu(__VA_ARGS__)

◆ vloxseg2ei16_v_f16m1

#define vloxseg2ei16_v_f16m1 ( ... ) __riscv_vloxseg2ei16_v_f16m1(__VA_ARGS__)

◆ vloxseg2ei16_v_f16m1_m

#define vloxseg2ei16_v_f16m1_m ( ... ) __riscv_vloxseg2ei16_v_f16m1_tumu(__VA_ARGS__)

◆ vloxseg2ei16_v_f16m2

#define vloxseg2ei16_v_f16m2 ( ... ) __riscv_vloxseg2ei16_v_f16m2(__VA_ARGS__)

◆ vloxseg2ei16_v_f16m2_m

#define vloxseg2ei16_v_f16m2_m ( ... ) __riscv_vloxseg2ei16_v_f16m2_tumu(__VA_ARGS__)

◆ vloxseg2ei16_v_f16m4

#define vloxseg2ei16_v_f16m4 ( ... ) __riscv_vloxseg2ei16_v_f16m4(__VA_ARGS__)

◆ vloxseg2ei16_v_f16m4_m

#define vloxseg2ei16_v_f16m4_m ( ... ) __riscv_vloxseg2ei16_v_f16m4_tumu(__VA_ARGS__)

◆ vloxseg2ei16_v_f16mf2

#define vloxseg2ei16_v_f16mf2 ( ... ) __riscv_vloxseg2ei16_v_f16mf2(__VA_ARGS__)

◆ vloxseg2ei16_v_f16mf2_m

#define vloxseg2ei16_v_f16mf2_m ( ... ) __riscv_vloxseg2ei16_v_f16mf2_tumu(__VA_ARGS__)

◆ vloxseg2ei16_v_f16mf4

#define vloxseg2ei16_v_f16mf4 ( ... ) __riscv_vloxseg2ei16_v_f16mf4(__VA_ARGS__)

◆ vloxseg2ei16_v_f16mf4_m

#define vloxseg2ei16_v_f16mf4_m ( ... ) __riscv_vloxseg2ei16_v_f16mf4_tumu(__VA_ARGS__)

◆ vloxseg2ei16_v_f32m1

#define vloxseg2ei16_v_f32m1 ( ... ) __riscv_vloxseg2ei16_v_f32m1(__VA_ARGS__)

◆ vloxseg2ei16_v_f32m1_m

#define vloxseg2ei16_v_f32m1_m ( ... ) __riscv_vloxseg2ei16_v_f32m1_tumu(__VA_ARGS__)

◆ vloxseg2ei16_v_f32m2

#define vloxseg2ei16_v_f32m2 ( ... ) __riscv_vloxseg2ei16_v_f32m2(__VA_ARGS__)

◆ vloxseg2ei16_v_f32m2_m

#define vloxseg2ei16_v_f32m2_m ( ... ) __riscv_vloxseg2ei16_v_f32m2_tumu(__VA_ARGS__)

◆ vloxseg2ei16_v_f32m4

#define vloxseg2ei16_v_f32m4 ( ... ) __riscv_vloxseg2ei16_v_f32m4(__VA_ARGS__)

◆ vloxseg2ei16_v_f32m4_m

#define vloxseg2ei16_v_f32m4_m ( ... ) __riscv_vloxseg2ei16_v_f32m4_tumu(__VA_ARGS__)

◆ vloxseg2ei16_v_f32mf2

#define vloxseg2ei16_v_f32mf2 ( ... ) __riscv_vloxseg2ei16_v_f32mf2(__VA_ARGS__)

◆ vloxseg2ei16_v_f32mf2_m

#define vloxseg2ei16_v_f32mf2_m ( ... ) __riscv_vloxseg2ei16_v_f32mf2_tumu(__VA_ARGS__)

◆ vloxseg2ei16_v_f64m1

#define vloxseg2ei16_v_f64m1 ( ... ) __riscv_vloxseg2ei16_v_f64m1(__VA_ARGS__)

◆ vloxseg2ei16_v_f64m1_m

#define vloxseg2ei16_v_f64m1_m ( ... ) __riscv_vloxseg2ei16_v_f64m1_tumu(__VA_ARGS__)

◆ vloxseg2ei16_v_f64m2

#define vloxseg2ei16_v_f64m2 ( ... ) __riscv_vloxseg2ei16_v_f64m2(__VA_ARGS__)

◆ vloxseg2ei16_v_f64m2_m

#define vloxseg2ei16_v_f64m2_m ( ... ) __riscv_vloxseg2ei16_v_f64m2_tumu(__VA_ARGS__)

◆ vloxseg2ei16_v_f64m4

#define vloxseg2ei16_v_f64m4 ( ... ) __riscv_vloxseg2ei16_v_f64m4(__VA_ARGS__)

◆ vloxseg2ei16_v_f64m4_m

#define vloxseg2ei16_v_f64m4_m ( ... ) __riscv_vloxseg2ei16_v_f64m4_tumu(__VA_ARGS__)

◆ vloxseg2ei16_v_i16m1

#define vloxseg2ei16_v_i16m1 ( ... ) __riscv_vloxseg2ei16_v_i16m1(__VA_ARGS__)

◆ vloxseg2ei16_v_i16m1_m

#define vloxseg2ei16_v_i16m1_m ( ... ) __riscv_vloxseg2ei16_v_i16m1_tumu(__VA_ARGS__)

◆ vloxseg2ei16_v_i16m2

#define vloxseg2ei16_v_i16m2 ( ... ) __riscv_vloxseg2ei16_v_i16m2(__VA_ARGS__)

◆ vloxseg2ei16_v_i16m2_m

#define vloxseg2ei16_v_i16m2_m ( ... ) __riscv_vloxseg2ei16_v_i16m2_tumu(__VA_ARGS__)

◆ vloxseg2ei16_v_i16m4

#define vloxseg2ei16_v_i16m4 ( ... ) __riscv_vloxseg2ei16_v_i16m4(__VA_ARGS__)

◆ vloxseg2ei16_v_i16m4_m

#define vloxseg2ei16_v_i16m4_m ( ... ) __riscv_vloxseg2ei16_v_i16m4_tumu(__VA_ARGS__)

◆ vloxseg2ei16_v_i16mf2

#define vloxseg2ei16_v_i16mf2 ( ... ) __riscv_vloxseg2ei16_v_i16mf2(__VA_ARGS__)

◆ vloxseg2ei16_v_i16mf2_m

#define vloxseg2ei16_v_i16mf2_m ( ... ) __riscv_vloxseg2ei16_v_i16mf2_tumu(__VA_ARGS__)

◆ vloxseg2ei16_v_i16mf4

#define vloxseg2ei16_v_i16mf4 ( ... ) __riscv_vloxseg2ei16_v_i16mf4(__VA_ARGS__)

◆ vloxseg2ei16_v_i16mf4_m

#define vloxseg2ei16_v_i16mf4_m ( ... ) __riscv_vloxseg2ei16_v_i16mf4_tumu(__VA_ARGS__)

◆ vloxseg2ei16_v_i32m1

#define vloxseg2ei16_v_i32m1 ( ... ) __riscv_vloxseg2ei16_v_i32m1(__VA_ARGS__)

◆ vloxseg2ei16_v_i32m1_m

#define vloxseg2ei16_v_i32m1_m ( ... ) __riscv_vloxseg2ei16_v_i32m1_tumu(__VA_ARGS__)

◆ vloxseg2ei16_v_i32m2

#define vloxseg2ei16_v_i32m2 ( ... ) __riscv_vloxseg2ei16_v_i32m2(__VA_ARGS__)

◆ vloxseg2ei16_v_i32m2_m

#define vloxseg2ei16_v_i32m2_m ( ... ) __riscv_vloxseg2ei16_v_i32m2_tumu(__VA_ARGS__)

◆ vloxseg2ei16_v_i32m4

#define vloxseg2ei16_v_i32m4 ( ... ) __riscv_vloxseg2ei16_v_i32m4(__VA_ARGS__)

◆ vloxseg2ei16_v_i32m4_m

#define vloxseg2ei16_v_i32m4_m ( ... ) __riscv_vloxseg2ei16_v_i32m4_tumu(__VA_ARGS__)

◆ vloxseg2ei16_v_i32mf2

#define vloxseg2ei16_v_i32mf2 ( ... ) __riscv_vloxseg2ei16_v_i32mf2(__VA_ARGS__)

◆ vloxseg2ei16_v_i32mf2_m

#define vloxseg2ei16_v_i32mf2_m ( ... ) __riscv_vloxseg2ei16_v_i32mf2_tumu(__VA_ARGS__)

◆ vloxseg2ei16_v_i64m1

#define vloxseg2ei16_v_i64m1 ( ... ) __riscv_vloxseg2ei16_v_i64m1(__VA_ARGS__)

◆ vloxseg2ei16_v_i64m1_m

#define vloxseg2ei16_v_i64m1_m ( ... ) __riscv_vloxseg2ei16_v_i64m1_tumu(__VA_ARGS__)

◆ vloxseg2ei16_v_i64m2

#define vloxseg2ei16_v_i64m2 ( ... ) __riscv_vloxseg2ei16_v_i64m2(__VA_ARGS__)

◆ vloxseg2ei16_v_i64m2_m

#define vloxseg2ei16_v_i64m2_m ( ... ) __riscv_vloxseg2ei16_v_i64m2_tumu(__VA_ARGS__)

◆ vloxseg2ei16_v_i64m4

#define vloxseg2ei16_v_i64m4 ( ... ) __riscv_vloxseg2ei16_v_i64m4(__VA_ARGS__)

◆ vloxseg2ei16_v_i64m4_m

#define vloxseg2ei16_v_i64m4_m ( ... ) __riscv_vloxseg2ei16_v_i64m4_tumu(__VA_ARGS__)

◆ vloxseg2ei16_v_i8m1

#define vloxseg2ei16_v_i8m1 ( ... ) __riscv_vloxseg2ei16_v_i8m1(__VA_ARGS__)

◆ vloxseg2ei16_v_i8m1_m

#define vloxseg2ei16_v_i8m1_m ( ... ) __riscv_vloxseg2ei16_v_i8m1_tumu(__VA_ARGS__)

◆ vloxseg2ei16_v_i8m2

#define vloxseg2ei16_v_i8m2 ( ... ) __riscv_vloxseg2ei16_v_i8m2(__VA_ARGS__)

◆ vloxseg2ei16_v_i8m2_m

#define vloxseg2ei16_v_i8m2_m ( ... ) __riscv_vloxseg2ei16_v_i8m2_tumu(__VA_ARGS__)

◆ vloxseg2ei16_v_i8m4

#define vloxseg2ei16_v_i8m4 ( ... ) __riscv_vloxseg2ei16_v_i8m4(__VA_ARGS__)

◆ vloxseg2ei16_v_i8m4_m

#define vloxseg2ei16_v_i8m4_m ( ... ) __riscv_vloxseg2ei16_v_i8m4_tumu(__VA_ARGS__)

◆ vloxseg2ei16_v_i8mf2

#define vloxseg2ei16_v_i8mf2 ( ... ) __riscv_vloxseg2ei16_v_i8mf2(__VA_ARGS__)

◆ vloxseg2ei16_v_i8mf2_m

#define vloxseg2ei16_v_i8mf2_m ( ... ) __riscv_vloxseg2ei16_v_i8mf2_tumu(__VA_ARGS__)

◆ vloxseg2ei16_v_i8mf4

#define vloxseg2ei16_v_i8mf4 ( ... ) __riscv_vloxseg2ei16_v_i8mf4(__VA_ARGS__)

◆ vloxseg2ei16_v_i8mf4_m

#define vloxseg2ei16_v_i8mf4_m ( ... ) __riscv_vloxseg2ei16_v_i8mf4_tumu(__VA_ARGS__)

◆ vloxseg2ei16_v_i8mf8

#define vloxseg2ei16_v_i8mf8 ( ... ) __riscv_vloxseg2ei16_v_i8mf8(__VA_ARGS__)

◆ vloxseg2ei16_v_i8mf8_m

#define vloxseg2ei16_v_i8mf8_m ( ... ) __riscv_vloxseg2ei16_v_i8mf8_tumu(__VA_ARGS__)

◆ vloxseg2ei16_v_u16m1

#define vloxseg2ei16_v_u16m1 ( ... ) __riscv_vloxseg2ei16_v_u16m1(__VA_ARGS__)

◆ vloxseg2ei16_v_u16m1_m

#define vloxseg2ei16_v_u16m1_m ( ... ) __riscv_vloxseg2ei16_v_u16m1_tumu(__VA_ARGS__)

◆ vloxseg2ei16_v_u16m2

#define vloxseg2ei16_v_u16m2 ( ... ) __riscv_vloxseg2ei16_v_u16m2(__VA_ARGS__)

◆ vloxseg2ei16_v_u16m2_m

#define vloxseg2ei16_v_u16m2_m ( ... ) __riscv_vloxseg2ei16_v_u16m2_tumu(__VA_ARGS__)

◆ vloxseg2ei16_v_u16m4

#define vloxseg2ei16_v_u16m4 ( ... ) __riscv_vloxseg2ei16_v_u16m4(__VA_ARGS__)

◆ vloxseg2ei16_v_u16m4_m

#define vloxseg2ei16_v_u16m4_m ( ... ) __riscv_vloxseg2ei16_v_u16m4_tumu(__VA_ARGS__)

◆ vloxseg2ei16_v_u16mf2

#define vloxseg2ei16_v_u16mf2 ( ... ) __riscv_vloxseg2ei16_v_u16mf2(__VA_ARGS__)

◆ vloxseg2ei16_v_u16mf2_m

#define vloxseg2ei16_v_u16mf2_m ( ... ) __riscv_vloxseg2ei16_v_u16mf2_tumu(__VA_ARGS__)

◆ vloxseg2ei16_v_u16mf4

#define vloxseg2ei16_v_u16mf4 ( ... ) __riscv_vloxseg2ei16_v_u16mf4(__VA_ARGS__)

◆ vloxseg2ei16_v_u16mf4_m

#define vloxseg2ei16_v_u16mf4_m ( ... ) __riscv_vloxseg2ei16_v_u16mf4_tumu(__VA_ARGS__)

◆ vloxseg2ei16_v_u32m1

#define vloxseg2ei16_v_u32m1 ( ... ) __riscv_vloxseg2ei16_v_u32m1(__VA_ARGS__)

◆ vloxseg2ei16_v_u32m1_m

#define vloxseg2ei16_v_u32m1_m ( ... ) __riscv_vloxseg2ei16_v_u32m1_tumu(__VA_ARGS__)

◆ vloxseg2ei16_v_u32m2

#define vloxseg2ei16_v_u32m2 ( ... ) __riscv_vloxseg2ei16_v_u32m2(__VA_ARGS__)

◆ vloxseg2ei16_v_u32m2_m

#define vloxseg2ei16_v_u32m2_m ( ... ) __riscv_vloxseg2ei16_v_u32m2_tumu(__VA_ARGS__)

◆ vloxseg2ei16_v_u32m4

#define vloxseg2ei16_v_u32m4 ( ... ) __riscv_vloxseg2ei16_v_u32m4(__VA_ARGS__)

◆ vloxseg2ei16_v_u32m4_m

#define vloxseg2ei16_v_u32m4_m ( ... ) __riscv_vloxseg2ei16_v_u32m4_tumu(__VA_ARGS__)

◆ vloxseg2ei16_v_u32mf2

#define vloxseg2ei16_v_u32mf2 ( ... ) __riscv_vloxseg2ei16_v_u32mf2(__VA_ARGS__)

◆ vloxseg2ei16_v_u32mf2_m

#define vloxseg2ei16_v_u32mf2_m ( ... ) __riscv_vloxseg2ei16_v_u32mf2_tumu(__VA_ARGS__)

◆ vloxseg2ei16_v_u64m1

#define vloxseg2ei16_v_u64m1 ( ... ) __riscv_vloxseg2ei16_v_u64m1(__VA_ARGS__)

◆ vloxseg2ei16_v_u64m1_m

#define vloxseg2ei16_v_u64m1_m ( ... ) __riscv_vloxseg2ei16_v_u64m1_tumu(__VA_ARGS__)

◆ vloxseg2ei16_v_u64m2

#define vloxseg2ei16_v_u64m2 ( ... ) __riscv_vloxseg2ei16_v_u64m2(__VA_ARGS__)

◆ vloxseg2ei16_v_u64m2_m

#define vloxseg2ei16_v_u64m2_m ( ... ) __riscv_vloxseg2ei16_v_u64m2_tumu(__VA_ARGS__)

◆ vloxseg2ei16_v_u64m4

#define vloxseg2ei16_v_u64m4 ( ... ) __riscv_vloxseg2ei16_v_u64m4(__VA_ARGS__)

◆ vloxseg2ei16_v_u64m4_m

#define vloxseg2ei16_v_u64m4_m ( ... ) __riscv_vloxseg2ei16_v_u64m4_tumu(__VA_ARGS__)

◆ vloxseg2ei16_v_u8m1

#define vloxseg2ei16_v_u8m1 ( ... ) __riscv_vloxseg2ei16_v_u8m1(__VA_ARGS__)

◆ vloxseg2ei16_v_u8m1_m

#define vloxseg2ei16_v_u8m1_m ( ... ) __riscv_vloxseg2ei16_v_u8m1_tumu(__VA_ARGS__)

◆ vloxseg2ei16_v_u8m2

#define vloxseg2ei16_v_u8m2 ( ... ) __riscv_vloxseg2ei16_v_u8m2(__VA_ARGS__)

◆ vloxseg2ei16_v_u8m2_m

#define vloxseg2ei16_v_u8m2_m ( ... ) __riscv_vloxseg2ei16_v_u8m2_tumu(__VA_ARGS__)

◆ vloxseg2ei16_v_u8m4

#define vloxseg2ei16_v_u8m4 ( ... ) __riscv_vloxseg2ei16_v_u8m4(__VA_ARGS__)

◆ vloxseg2ei16_v_u8m4_m

#define vloxseg2ei16_v_u8m4_m ( ... ) __riscv_vloxseg2ei16_v_u8m4_tumu(__VA_ARGS__)

◆ vloxseg2ei16_v_u8mf2

#define vloxseg2ei16_v_u8mf2 ( ... ) __riscv_vloxseg2ei16_v_u8mf2(__VA_ARGS__)

◆ vloxseg2ei16_v_u8mf2_m

#define vloxseg2ei16_v_u8mf2_m ( ... ) __riscv_vloxseg2ei16_v_u8mf2_tumu(__VA_ARGS__)

◆ vloxseg2ei16_v_u8mf4

#define vloxseg2ei16_v_u8mf4 ( ... ) __riscv_vloxseg2ei16_v_u8mf4(__VA_ARGS__)

◆ vloxseg2ei16_v_u8mf4_m

#define vloxseg2ei16_v_u8mf4_m ( ... ) __riscv_vloxseg2ei16_v_u8mf4_tumu(__VA_ARGS__)

◆ vloxseg2ei16_v_u8mf8

#define vloxseg2ei16_v_u8mf8 ( ... ) __riscv_vloxseg2ei16_v_u8mf8(__VA_ARGS__)

◆ vloxseg2ei16_v_u8mf8_m

#define vloxseg2ei16_v_u8mf8_m ( ... ) __riscv_vloxseg2ei16_v_u8mf8_tumu(__VA_ARGS__)

◆ vloxseg2ei32_v_f16m1

#define vloxseg2ei32_v_f16m1 ( ... ) __riscv_vloxseg2ei32_v_f16m1(__VA_ARGS__)

◆ vloxseg2ei32_v_f16m1_m

#define vloxseg2ei32_v_f16m1_m ( ... ) __riscv_vloxseg2ei32_v_f16m1_tumu(__VA_ARGS__)

◆ vloxseg2ei32_v_f16m2

#define vloxseg2ei32_v_f16m2 ( ... ) __riscv_vloxseg2ei32_v_f16m2(__VA_ARGS__)

◆ vloxseg2ei32_v_f16m2_m

#define vloxseg2ei32_v_f16m2_m ( ... ) __riscv_vloxseg2ei32_v_f16m2_tumu(__VA_ARGS__)

◆ vloxseg2ei32_v_f16m4

#define vloxseg2ei32_v_f16m4 ( ... ) __riscv_vloxseg2ei32_v_f16m4(__VA_ARGS__)

◆ vloxseg2ei32_v_f16m4_m

#define vloxseg2ei32_v_f16m4_m ( ... ) __riscv_vloxseg2ei32_v_f16m4_tumu(__VA_ARGS__)

◆ vloxseg2ei32_v_f16mf2

#define vloxseg2ei32_v_f16mf2 ( ... ) __riscv_vloxseg2ei32_v_f16mf2(__VA_ARGS__)

◆ vloxseg2ei32_v_f16mf2_m

#define vloxseg2ei32_v_f16mf2_m ( ... ) __riscv_vloxseg2ei32_v_f16mf2_tumu(__VA_ARGS__)

◆ vloxseg2ei32_v_f16mf4

#define vloxseg2ei32_v_f16mf4 ( ... ) __riscv_vloxseg2ei32_v_f16mf4(__VA_ARGS__)

◆ vloxseg2ei32_v_f16mf4_m

#define vloxseg2ei32_v_f16mf4_m ( ... ) __riscv_vloxseg2ei32_v_f16mf4_tumu(__VA_ARGS__)

◆ vloxseg2ei32_v_f32m1

#define vloxseg2ei32_v_f32m1 ( ... ) __riscv_vloxseg2ei32_v_f32m1(__VA_ARGS__)

◆ vloxseg2ei32_v_f32m1_m

#define vloxseg2ei32_v_f32m1_m ( ... ) __riscv_vloxseg2ei32_v_f32m1_tumu(__VA_ARGS__)

◆ vloxseg2ei32_v_f32m2

#define vloxseg2ei32_v_f32m2 ( ... ) __riscv_vloxseg2ei32_v_f32m2(__VA_ARGS__)

◆ vloxseg2ei32_v_f32m2_m

#define vloxseg2ei32_v_f32m2_m ( ... ) __riscv_vloxseg2ei32_v_f32m2_tumu(__VA_ARGS__)

◆ vloxseg2ei32_v_f32m4

#define vloxseg2ei32_v_f32m4 ( ... ) __riscv_vloxseg2ei32_v_f32m4(__VA_ARGS__)

◆ vloxseg2ei32_v_f32m4_m

#define vloxseg2ei32_v_f32m4_m ( ... ) __riscv_vloxseg2ei32_v_f32m4_tumu(__VA_ARGS__)

◆ vloxseg2ei32_v_f32mf2

#define vloxseg2ei32_v_f32mf2 ( ... ) __riscv_vloxseg2ei32_v_f32mf2(__VA_ARGS__)

◆ vloxseg2ei32_v_f32mf2_m

#define vloxseg2ei32_v_f32mf2_m ( ... ) __riscv_vloxseg2ei32_v_f32mf2_tumu(__VA_ARGS__)

◆ vloxseg2ei32_v_f64m1

#define vloxseg2ei32_v_f64m1 ( ... ) __riscv_vloxseg2ei32_v_f64m1(__VA_ARGS__)

◆ vloxseg2ei32_v_f64m1_m

#define vloxseg2ei32_v_f64m1_m ( ... ) __riscv_vloxseg2ei32_v_f64m1_tumu(__VA_ARGS__)

◆ vloxseg2ei32_v_f64m2

#define vloxseg2ei32_v_f64m2 ( ... ) __riscv_vloxseg2ei32_v_f64m2(__VA_ARGS__)

◆ vloxseg2ei32_v_f64m2_m

#define vloxseg2ei32_v_f64m2_m ( ... ) __riscv_vloxseg2ei32_v_f64m2_tumu(__VA_ARGS__)

◆ vloxseg2ei32_v_f64m4

#define vloxseg2ei32_v_f64m4 ( ... ) __riscv_vloxseg2ei32_v_f64m4(__VA_ARGS__)

◆ vloxseg2ei32_v_f64m4_m

#define vloxseg2ei32_v_f64m4_m ( ... ) __riscv_vloxseg2ei32_v_f64m4_tumu(__VA_ARGS__)

◆ vloxseg2ei32_v_i16m1

#define vloxseg2ei32_v_i16m1 ( ... ) __riscv_vloxseg2ei32_v_i16m1(__VA_ARGS__)

◆ vloxseg2ei32_v_i16m1_m

#define vloxseg2ei32_v_i16m1_m ( ... ) __riscv_vloxseg2ei32_v_i16m1_tumu(__VA_ARGS__)

◆ vloxseg2ei32_v_i16m2

#define vloxseg2ei32_v_i16m2 ( ... ) __riscv_vloxseg2ei32_v_i16m2(__VA_ARGS__)

◆ vloxseg2ei32_v_i16m2_m

#define vloxseg2ei32_v_i16m2_m ( ... ) __riscv_vloxseg2ei32_v_i16m2_tumu(__VA_ARGS__)

◆ vloxseg2ei32_v_i16m4

#define vloxseg2ei32_v_i16m4 ( ... ) __riscv_vloxseg2ei32_v_i16m4(__VA_ARGS__)

◆ vloxseg2ei32_v_i16m4_m

#define vloxseg2ei32_v_i16m4_m ( ... ) __riscv_vloxseg2ei32_v_i16m4_tumu(__VA_ARGS__)

◆ vloxseg2ei32_v_i16mf2

#define vloxseg2ei32_v_i16mf2 ( ... ) __riscv_vloxseg2ei32_v_i16mf2(__VA_ARGS__)

◆ vloxseg2ei32_v_i16mf2_m

#define vloxseg2ei32_v_i16mf2_m ( ... ) __riscv_vloxseg2ei32_v_i16mf2_tumu(__VA_ARGS__)

◆ vloxseg2ei32_v_i16mf4

#define vloxseg2ei32_v_i16mf4 ( ... ) __riscv_vloxseg2ei32_v_i16mf4(__VA_ARGS__)

◆ vloxseg2ei32_v_i16mf4_m

#define vloxseg2ei32_v_i16mf4_m ( ... ) __riscv_vloxseg2ei32_v_i16mf4_tumu(__VA_ARGS__)

◆ vloxseg2ei32_v_i32m1

#define vloxseg2ei32_v_i32m1 ( ... ) __riscv_vloxseg2ei32_v_i32m1(__VA_ARGS__)

◆ vloxseg2ei32_v_i32m1_m

#define vloxseg2ei32_v_i32m1_m ( ... ) __riscv_vloxseg2ei32_v_i32m1_tumu(__VA_ARGS__)

◆ vloxseg2ei32_v_i32m2

#define vloxseg2ei32_v_i32m2 ( ... ) __riscv_vloxseg2ei32_v_i32m2(__VA_ARGS__)

◆ vloxseg2ei32_v_i32m2_m

#define vloxseg2ei32_v_i32m2_m ( ... ) __riscv_vloxseg2ei32_v_i32m2_tumu(__VA_ARGS__)

◆ vloxseg2ei32_v_i32m4

#define vloxseg2ei32_v_i32m4 ( ... ) __riscv_vloxseg2ei32_v_i32m4(__VA_ARGS__)

◆ vloxseg2ei32_v_i32m4_m

#define vloxseg2ei32_v_i32m4_m ( ... ) __riscv_vloxseg2ei32_v_i32m4_tumu(__VA_ARGS__)

◆ vloxseg2ei32_v_i32mf2

#define vloxseg2ei32_v_i32mf2 ( ... ) __riscv_vloxseg2ei32_v_i32mf2(__VA_ARGS__)

◆ vloxseg2ei32_v_i32mf2_m

#define vloxseg2ei32_v_i32mf2_m ( ... ) __riscv_vloxseg2ei32_v_i32mf2_tumu(__VA_ARGS__)

◆ vloxseg2ei32_v_i64m1

#define vloxseg2ei32_v_i64m1 ( ... ) __riscv_vloxseg2ei32_v_i64m1(__VA_ARGS__)

◆ vloxseg2ei32_v_i64m1_m

#define vloxseg2ei32_v_i64m1_m ( ... ) __riscv_vloxseg2ei32_v_i64m1_tumu(__VA_ARGS__)

◆ vloxseg2ei32_v_i64m2

#define vloxseg2ei32_v_i64m2 ( ... ) __riscv_vloxseg2ei32_v_i64m2(__VA_ARGS__)

◆ vloxseg2ei32_v_i64m2_m

#define vloxseg2ei32_v_i64m2_m ( ... ) __riscv_vloxseg2ei32_v_i64m2_tumu(__VA_ARGS__)

◆ vloxseg2ei32_v_i64m4

#define vloxseg2ei32_v_i64m4 ( ... ) __riscv_vloxseg2ei32_v_i64m4(__VA_ARGS__)

◆ vloxseg2ei32_v_i64m4_m

#define vloxseg2ei32_v_i64m4_m ( ... ) __riscv_vloxseg2ei32_v_i64m4_tumu(__VA_ARGS__)

◆ vloxseg2ei32_v_i8m1

#define vloxseg2ei32_v_i8m1 ( ... ) __riscv_vloxseg2ei32_v_i8m1(__VA_ARGS__)

◆ vloxseg2ei32_v_i8m1_m

#define vloxseg2ei32_v_i8m1_m ( ... ) __riscv_vloxseg2ei32_v_i8m1_tumu(__VA_ARGS__)

◆ vloxseg2ei32_v_i8m2

#define vloxseg2ei32_v_i8m2 ( ... ) __riscv_vloxseg2ei32_v_i8m2(__VA_ARGS__)

◆ vloxseg2ei32_v_i8m2_m

#define vloxseg2ei32_v_i8m2_m ( ... ) __riscv_vloxseg2ei32_v_i8m2_tumu(__VA_ARGS__)

◆ vloxseg2ei32_v_i8mf2

#define vloxseg2ei32_v_i8mf2 ( ... ) __riscv_vloxseg2ei32_v_i8mf2(__VA_ARGS__)

◆ vloxseg2ei32_v_i8mf2_m

#define vloxseg2ei32_v_i8mf2_m ( ... ) __riscv_vloxseg2ei32_v_i8mf2_tumu(__VA_ARGS__)

◆ vloxseg2ei32_v_i8mf4

#define vloxseg2ei32_v_i8mf4 ( ... ) __riscv_vloxseg2ei32_v_i8mf4(__VA_ARGS__)

◆ vloxseg2ei32_v_i8mf4_m

#define vloxseg2ei32_v_i8mf4_m ( ... ) __riscv_vloxseg2ei32_v_i8mf4_tumu(__VA_ARGS__)

◆ vloxseg2ei32_v_i8mf8

#define vloxseg2ei32_v_i8mf8 ( ... ) __riscv_vloxseg2ei32_v_i8mf8(__VA_ARGS__)

◆ vloxseg2ei32_v_i8mf8_m

#define vloxseg2ei32_v_i8mf8_m ( ... ) __riscv_vloxseg2ei32_v_i8mf8_tumu(__VA_ARGS__)

◆ vloxseg2ei32_v_u16m1

#define vloxseg2ei32_v_u16m1 ( ... ) __riscv_vloxseg2ei32_v_u16m1(__VA_ARGS__)

◆ vloxseg2ei32_v_u16m1_m

#define vloxseg2ei32_v_u16m1_m ( ... ) __riscv_vloxseg2ei32_v_u16m1_tumu(__VA_ARGS__)

◆ vloxseg2ei32_v_u16m2

#define vloxseg2ei32_v_u16m2 ( ... ) __riscv_vloxseg2ei32_v_u16m2(__VA_ARGS__)

◆ vloxseg2ei32_v_u16m2_m

#define vloxseg2ei32_v_u16m2_m ( ... ) __riscv_vloxseg2ei32_v_u16m2_tumu(__VA_ARGS__)

◆ vloxseg2ei32_v_u16m4

#define vloxseg2ei32_v_u16m4 ( ... ) __riscv_vloxseg2ei32_v_u16m4(__VA_ARGS__)

◆ vloxseg2ei32_v_u16m4_m

#define vloxseg2ei32_v_u16m4_m ( ... ) __riscv_vloxseg2ei32_v_u16m4_tumu(__VA_ARGS__)

◆ vloxseg2ei32_v_u16mf2

#define vloxseg2ei32_v_u16mf2 ( ... ) __riscv_vloxseg2ei32_v_u16mf2(__VA_ARGS__)

◆ vloxseg2ei32_v_u16mf2_m

#define vloxseg2ei32_v_u16mf2_m ( ... ) __riscv_vloxseg2ei32_v_u16mf2_tumu(__VA_ARGS__)

◆ vloxseg2ei32_v_u16mf4

#define vloxseg2ei32_v_u16mf4 ( ... ) __riscv_vloxseg2ei32_v_u16mf4(__VA_ARGS__)

◆ vloxseg2ei32_v_u16mf4_m

#define vloxseg2ei32_v_u16mf4_m ( ... ) __riscv_vloxseg2ei32_v_u16mf4_tumu(__VA_ARGS__)

◆ vloxseg2ei32_v_u32m1

#define vloxseg2ei32_v_u32m1 ( ... ) __riscv_vloxseg2ei32_v_u32m1(__VA_ARGS__)

◆ vloxseg2ei32_v_u32m1_m

#define vloxseg2ei32_v_u32m1_m ( ... ) __riscv_vloxseg2ei32_v_u32m1_tumu(__VA_ARGS__)

◆ vloxseg2ei32_v_u32m2

#define vloxseg2ei32_v_u32m2 ( ... ) __riscv_vloxseg2ei32_v_u32m2(__VA_ARGS__)

◆ vloxseg2ei32_v_u32m2_m

#define vloxseg2ei32_v_u32m2_m ( ... ) __riscv_vloxseg2ei32_v_u32m2_tumu(__VA_ARGS__)

◆ vloxseg2ei32_v_u32m4

#define vloxseg2ei32_v_u32m4 ( ... ) __riscv_vloxseg2ei32_v_u32m4(__VA_ARGS__)

◆ vloxseg2ei32_v_u32m4_m

#define vloxseg2ei32_v_u32m4_m ( ... ) __riscv_vloxseg2ei32_v_u32m4_tumu(__VA_ARGS__)

◆ vloxseg2ei32_v_u32mf2

#define vloxseg2ei32_v_u32mf2 ( ... ) __riscv_vloxseg2ei32_v_u32mf2(__VA_ARGS__)

◆ vloxseg2ei32_v_u32mf2_m

#define vloxseg2ei32_v_u32mf2_m ( ... ) __riscv_vloxseg2ei32_v_u32mf2_tumu(__VA_ARGS__)

◆ vloxseg2ei32_v_u64m1

#define vloxseg2ei32_v_u64m1 ( ... ) __riscv_vloxseg2ei32_v_u64m1(__VA_ARGS__)

◆ vloxseg2ei32_v_u64m1_m

#define vloxseg2ei32_v_u64m1_m ( ... ) __riscv_vloxseg2ei32_v_u64m1_tumu(__VA_ARGS__)

◆ vloxseg2ei32_v_u64m2

#define vloxseg2ei32_v_u64m2 ( ... ) __riscv_vloxseg2ei32_v_u64m2(__VA_ARGS__)

◆ vloxseg2ei32_v_u64m2_m

#define vloxseg2ei32_v_u64m2_m ( ... ) __riscv_vloxseg2ei32_v_u64m2_tumu(__VA_ARGS__)

◆ vloxseg2ei32_v_u64m4

#define vloxseg2ei32_v_u64m4 ( ... ) __riscv_vloxseg2ei32_v_u64m4(__VA_ARGS__)

◆ vloxseg2ei32_v_u64m4_m

#define vloxseg2ei32_v_u64m4_m ( ... ) __riscv_vloxseg2ei32_v_u64m4_tumu(__VA_ARGS__)

◆ vloxseg2ei32_v_u8m1

#define vloxseg2ei32_v_u8m1 ( ... ) __riscv_vloxseg2ei32_v_u8m1(__VA_ARGS__)

◆ vloxseg2ei32_v_u8m1_m

#define vloxseg2ei32_v_u8m1_m ( ... ) __riscv_vloxseg2ei32_v_u8m1_tumu(__VA_ARGS__)

◆ vloxseg2ei32_v_u8m2

#define vloxseg2ei32_v_u8m2 ( ... ) __riscv_vloxseg2ei32_v_u8m2(__VA_ARGS__)

◆ vloxseg2ei32_v_u8m2_m

#define vloxseg2ei32_v_u8m2_m ( ... ) __riscv_vloxseg2ei32_v_u8m2_tumu(__VA_ARGS__)

◆ vloxseg2ei32_v_u8mf2

#define vloxseg2ei32_v_u8mf2 ( ... ) __riscv_vloxseg2ei32_v_u8mf2(__VA_ARGS__)

◆ vloxseg2ei32_v_u8mf2_m

#define vloxseg2ei32_v_u8mf2_m ( ... ) __riscv_vloxseg2ei32_v_u8mf2_tumu(__VA_ARGS__)

◆ vloxseg2ei32_v_u8mf4

#define vloxseg2ei32_v_u8mf4 ( ... ) __riscv_vloxseg2ei32_v_u8mf4(__VA_ARGS__)

◆ vloxseg2ei32_v_u8mf4_m

#define vloxseg2ei32_v_u8mf4_m ( ... ) __riscv_vloxseg2ei32_v_u8mf4_tumu(__VA_ARGS__)

◆ vloxseg2ei32_v_u8mf8

#define vloxseg2ei32_v_u8mf8 ( ... ) __riscv_vloxseg2ei32_v_u8mf8(__VA_ARGS__)

◆ vloxseg2ei32_v_u8mf8_m

#define vloxseg2ei32_v_u8mf8_m ( ... ) __riscv_vloxseg2ei32_v_u8mf8_tumu(__VA_ARGS__)

◆ vloxseg2ei64_v_f16m1

#define vloxseg2ei64_v_f16m1 ( ... ) __riscv_vloxseg2ei64_v_f16m1(__VA_ARGS__)

◆ vloxseg2ei64_v_f16m1_m

#define vloxseg2ei64_v_f16m1_m ( ... ) __riscv_vloxseg2ei64_v_f16m1_tumu(__VA_ARGS__)

◆ vloxseg2ei64_v_f16m2

#define vloxseg2ei64_v_f16m2 ( ... ) __riscv_vloxseg2ei64_v_f16m2(__VA_ARGS__)

◆ vloxseg2ei64_v_f16m2_m

#define vloxseg2ei64_v_f16m2_m ( ... ) __riscv_vloxseg2ei64_v_f16m2_tumu(__VA_ARGS__)

◆ vloxseg2ei64_v_f16mf2

#define vloxseg2ei64_v_f16mf2 ( ... ) __riscv_vloxseg2ei64_v_f16mf2(__VA_ARGS__)

◆ vloxseg2ei64_v_f16mf2_m

#define vloxseg2ei64_v_f16mf2_m ( ... ) __riscv_vloxseg2ei64_v_f16mf2_tumu(__VA_ARGS__)

◆ vloxseg2ei64_v_f16mf4

#define vloxseg2ei64_v_f16mf4 ( ... ) __riscv_vloxseg2ei64_v_f16mf4(__VA_ARGS__)

◆ vloxseg2ei64_v_f16mf4_m

#define vloxseg2ei64_v_f16mf4_m ( ... ) __riscv_vloxseg2ei64_v_f16mf4_tumu(__VA_ARGS__)

◆ vloxseg2ei64_v_f32m1

#define vloxseg2ei64_v_f32m1 ( ... ) __riscv_vloxseg2ei64_v_f32m1(__VA_ARGS__)

◆ vloxseg2ei64_v_f32m1_m

#define vloxseg2ei64_v_f32m1_m ( ... ) __riscv_vloxseg2ei64_v_f32m1_tumu(__VA_ARGS__)

◆ vloxseg2ei64_v_f32m2

#define vloxseg2ei64_v_f32m2 ( ... ) __riscv_vloxseg2ei64_v_f32m2(__VA_ARGS__)

◆ vloxseg2ei64_v_f32m2_m

#define vloxseg2ei64_v_f32m2_m ( ... ) __riscv_vloxseg2ei64_v_f32m2_tumu(__VA_ARGS__)

◆ vloxseg2ei64_v_f32m4

#define vloxseg2ei64_v_f32m4 ( ... ) __riscv_vloxseg2ei64_v_f32m4(__VA_ARGS__)

◆ vloxseg2ei64_v_f32m4_m

#define vloxseg2ei64_v_f32m4_m ( ... ) __riscv_vloxseg2ei64_v_f32m4_tumu(__VA_ARGS__)

◆ vloxseg2ei64_v_f32mf2

#define vloxseg2ei64_v_f32mf2 ( ... ) __riscv_vloxseg2ei64_v_f32mf2(__VA_ARGS__)

◆ vloxseg2ei64_v_f32mf2_m

#define vloxseg2ei64_v_f32mf2_m ( ... ) __riscv_vloxseg2ei64_v_f32mf2_tumu(__VA_ARGS__)

◆ vloxseg2ei64_v_f64m1

#define vloxseg2ei64_v_f64m1 ( ... ) __riscv_vloxseg2ei64_v_f64m1(__VA_ARGS__)

◆ vloxseg2ei64_v_f64m1_m

#define vloxseg2ei64_v_f64m1_m ( ... ) __riscv_vloxseg2ei64_v_f64m1_tumu(__VA_ARGS__)

◆ vloxseg2ei64_v_f64m2

#define vloxseg2ei64_v_f64m2 ( ... ) __riscv_vloxseg2ei64_v_f64m2(__VA_ARGS__)

◆ vloxseg2ei64_v_f64m2_m

#define vloxseg2ei64_v_f64m2_m ( ... ) __riscv_vloxseg2ei64_v_f64m2_tumu(__VA_ARGS__)

◆ vloxseg2ei64_v_f64m4

#define vloxseg2ei64_v_f64m4 ( ... ) __riscv_vloxseg2ei64_v_f64m4(__VA_ARGS__)

◆ vloxseg2ei64_v_f64m4_m

#define vloxseg2ei64_v_f64m4_m ( ... ) __riscv_vloxseg2ei64_v_f64m4_tumu(__VA_ARGS__)

◆ vloxseg2ei64_v_i16m1

#define vloxseg2ei64_v_i16m1 ( ... ) __riscv_vloxseg2ei64_v_i16m1(__VA_ARGS__)

◆ vloxseg2ei64_v_i16m1_m

#define vloxseg2ei64_v_i16m1_m ( ... ) __riscv_vloxseg2ei64_v_i16m1_tumu(__VA_ARGS__)

◆ vloxseg2ei64_v_i16m2

#define vloxseg2ei64_v_i16m2 ( ... ) __riscv_vloxseg2ei64_v_i16m2(__VA_ARGS__)

◆ vloxseg2ei64_v_i16m2_m

#define vloxseg2ei64_v_i16m2_m ( ... ) __riscv_vloxseg2ei64_v_i16m2_tumu(__VA_ARGS__)

◆ vloxseg2ei64_v_i16mf2

#define vloxseg2ei64_v_i16mf2 ( ... ) __riscv_vloxseg2ei64_v_i16mf2(__VA_ARGS__)

◆ vloxseg2ei64_v_i16mf2_m

#define vloxseg2ei64_v_i16mf2_m ( ... ) __riscv_vloxseg2ei64_v_i16mf2_tumu(__VA_ARGS__)

◆ vloxseg2ei64_v_i16mf4

#define vloxseg2ei64_v_i16mf4 ( ... ) __riscv_vloxseg2ei64_v_i16mf4(__VA_ARGS__)

◆ vloxseg2ei64_v_i16mf4_m

#define vloxseg2ei64_v_i16mf4_m ( ... ) __riscv_vloxseg2ei64_v_i16mf4_tumu(__VA_ARGS__)

◆ vloxseg2ei64_v_i32m1

#define vloxseg2ei64_v_i32m1 ( ... ) __riscv_vloxseg2ei64_v_i32m1(__VA_ARGS__)

◆ vloxseg2ei64_v_i32m1_m

#define vloxseg2ei64_v_i32m1_m ( ... ) __riscv_vloxseg2ei64_v_i32m1_tumu(__VA_ARGS__)

◆ vloxseg2ei64_v_i32m2

#define vloxseg2ei64_v_i32m2 ( ... ) __riscv_vloxseg2ei64_v_i32m2(__VA_ARGS__)

◆ vloxseg2ei64_v_i32m2_m

#define vloxseg2ei64_v_i32m2_m ( ... ) __riscv_vloxseg2ei64_v_i32m2_tumu(__VA_ARGS__)

◆ vloxseg2ei64_v_i32m4

#define vloxseg2ei64_v_i32m4 ( ... ) __riscv_vloxseg2ei64_v_i32m4(__VA_ARGS__)

◆ vloxseg2ei64_v_i32m4_m

#define vloxseg2ei64_v_i32m4_m ( ... ) __riscv_vloxseg2ei64_v_i32m4_tumu(__VA_ARGS__)

◆ vloxseg2ei64_v_i32mf2

#define vloxseg2ei64_v_i32mf2 ( ... ) __riscv_vloxseg2ei64_v_i32mf2(__VA_ARGS__)

◆ vloxseg2ei64_v_i32mf2_m

#define vloxseg2ei64_v_i32mf2_m ( ... ) __riscv_vloxseg2ei64_v_i32mf2_tumu(__VA_ARGS__)

◆ vloxseg2ei64_v_i64m1

#define vloxseg2ei64_v_i64m1 ( ... ) __riscv_vloxseg2ei64_v_i64m1(__VA_ARGS__)

◆ vloxseg2ei64_v_i64m1_m

#define vloxseg2ei64_v_i64m1_m ( ... ) __riscv_vloxseg2ei64_v_i64m1_tumu(__VA_ARGS__)

◆ vloxseg2ei64_v_i64m2

#define vloxseg2ei64_v_i64m2 ( ... ) __riscv_vloxseg2ei64_v_i64m2(__VA_ARGS__)

◆ vloxseg2ei64_v_i64m2_m

#define vloxseg2ei64_v_i64m2_m ( ... ) __riscv_vloxseg2ei64_v_i64m2_tumu(__VA_ARGS__)

◆ vloxseg2ei64_v_i64m4

#define vloxseg2ei64_v_i64m4 ( ... ) __riscv_vloxseg2ei64_v_i64m4(__VA_ARGS__)

◆ vloxseg2ei64_v_i64m4_m

#define vloxseg2ei64_v_i64m4_m ( ... ) __riscv_vloxseg2ei64_v_i64m4_tumu(__VA_ARGS__)

◆ vloxseg2ei64_v_i8m1

#define vloxseg2ei64_v_i8m1 ( ... ) __riscv_vloxseg2ei64_v_i8m1(__VA_ARGS__)

◆ vloxseg2ei64_v_i8m1_m

#define vloxseg2ei64_v_i8m1_m ( ... ) __riscv_vloxseg2ei64_v_i8m1_tumu(__VA_ARGS__)

◆ vloxseg2ei64_v_i8mf2

#define vloxseg2ei64_v_i8mf2 ( ... ) __riscv_vloxseg2ei64_v_i8mf2(__VA_ARGS__)

◆ vloxseg2ei64_v_i8mf2_m

#define vloxseg2ei64_v_i8mf2_m ( ... ) __riscv_vloxseg2ei64_v_i8mf2_tumu(__VA_ARGS__)

◆ vloxseg2ei64_v_i8mf4

#define vloxseg2ei64_v_i8mf4 ( ... ) __riscv_vloxseg2ei64_v_i8mf4(__VA_ARGS__)

◆ vloxseg2ei64_v_i8mf4_m

#define vloxseg2ei64_v_i8mf4_m ( ... ) __riscv_vloxseg2ei64_v_i8mf4_tumu(__VA_ARGS__)

◆ vloxseg2ei64_v_i8mf8

#define vloxseg2ei64_v_i8mf8 ( ... ) __riscv_vloxseg2ei64_v_i8mf8(__VA_ARGS__)

◆ vloxseg2ei64_v_i8mf8_m

#define vloxseg2ei64_v_i8mf8_m ( ... ) __riscv_vloxseg2ei64_v_i8mf8_tumu(__VA_ARGS__)

◆ vloxseg2ei64_v_u16m1

#define vloxseg2ei64_v_u16m1 ( ... ) __riscv_vloxseg2ei64_v_u16m1(__VA_ARGS__)

◆ vloxseg2ei64_v_u16m1_m

#define vloxseg2ei64_v_u16m1_m ( ... ) __riscv_vloxseg2ei64_v_u16m1_tumu(__VA_ARGS__)

◆ vloxseg2ei64_v_u16m2

#define vloxseg2ei64_v_u16m2 ( ... ) __riscv_vloxseg2ei64_v_u16m2(__VA_ARGS__)

◆ vloxseg2ei64_v_u16m2_m

#define vloxseg2ei64_v_u16m2_m ( ... ) __riscv_vloxseg2ei64_v_u16m2_tumu(__VA_ARGS__)

◆ vloxseg2ei64_v_u16mf2

#define vloxseg2ei64_v_u16mf2 ( ... ) __riscv_vloxseg2ei64_v_u16mf2(__VA_ARGS__)

◆ vloxseg2ei64_v_u16mf2_m

#define vloxseg2ei64_v_u16mf2_m ( ... ) __riscv_vloxseg2ei64_v_u16mf2_tumu(__VA_ARGS__)

◆ vloxseg2ei64_v_u16mf4

#define vloxseg2ei64_v_u16mf4 ( ... ) __riscv_vloxseg2ei64_v_u16mf4(__VA_ARGS__)

◆ vloxseg2ei64_v_u16mf4_m

#define vloxseg2ei64_v_u16mf4_m ( ... ) __riscv_vloxseg2ei64_v_u16mf4_tumu(__VA_ARGS__)

◆ vloxseg2ei64_v_u32m1

#define vloxseg2ei64_v_u32m1 ( ... ) __riscv_vloxseg2ei64_v_u32m1(__VA_ARGS__)

◆ vloxseg2ei64_v_u32m1_m

#define vloxseg2ei64_v_u32m1_m ( ... ) __riscv_vloxseg2ei64_v_u32m1_tumu(__VA_ARGS__)

◆ vloxseg2ei64_v_u32m2

#define vloxseg2ei64_v_u32m2 ( ... ) __riscv_vloxseg2ei64_v_u32m2(__VA_ARGS__)

◆ vloxseg2ei64_v_u32m2_m

#define vloxseg2ei64_v_u32m2_m ( ... ) __riscv_vloxseg2ei64_v_u32m2_tumu(__VA_ARGS__)

◆ vloxseg2ei64_v_u32m4

#define vloxseg2ei64_v_u32m4 ( ... ) __riscv_vloxseg2ei64_v_u32m4(__VA_ARGS__)

◆ vloxseg2ei64_v_u32m4_m

#define vloxseg2ei64_v_u32m4_m ( ... ) __riscv_vloxseg2ei64_v_u32m4_tumu(__VA_ARGS__)

◆ vloxseg2ei64_v_u32mf2

#define vloxseg2ei64_v_u32mf2 ( ... ) __riscv_vloxseg2ei64_v_u32mf2(__VA_ARGS__)

◆ vloxseg2ei64_v_u32mf2_m

#define vloxseg2ei64_v_u32mf2_m ( ... ) __riscv_vloxseg2ei64_v_u32mf2_tumu(__VA_ARGS__)

◆ vloxseg2ei64_v_u64m1

#define vloxseg2ei64_v_u64m1 ( ... ) __riscv_vloxseg2ei64_v_u64m1(__VA_ARGS__)

◆ vloxseg2ei64_v_u64m1_m

#define vloxseg2ei64_v_u64m1_m ( ... ) __riscv_vloxseg2ei64_v_u64m1_tumu(__VA_ARGS__)

◆ vloxseg2ei64_v_u64m2

#define vloxseg2ei64_v_u64m2 ( ... ) __riscv_vloxseg2ei64_v_u64m2(__VA_ARGS__)

◆ vloxseg2ei64_v_u64m2_m

#define vloxseg2ei64_v_u64m2_m ( ... ) __riscv_vloxseg2ei64_v_u64m2_tumu(__VA_ARGS__)

◆ vloxseg2ei64_v_u64m4

#define vloxseg2ei64_v_u64m4 ( ... ) __riscv_vloxseg2ei64_v_u64m4(__VA_ARGS__)

◆ vloxseg2ei64_v_u64m4_m

#define vloxseg2ei64_v_u64m4_m ( ... ) __riscv_vloxseg2ei64_v_u64m4_tumu(__VA_ARGS__)

◆ vloxseg2ei64_v_u8m1

#define vloxseg2ei64_v_u8m1 ( ... ) __riscv_vloxseg2ei64_v_u8m1(__VA_ARGS__)

◆ vloxseg2ei64_v_u8m1_m

#define vloxseg2ei64_v_u8m1_m ( ... ) __riscv_vloxseg2ei64_v_u8m1_tumu(__VA_ARGS__)

◆ vloxseg2ei64_v_u8mf2

#define vloxseg2ei64_v_u8mf2 ( ... ) __riscv_vloxseg2ei64_v_u8mf2(__VA_ARGS__)

◆ vloxseg2ei64_v_u8mf2_m

#define vloxseg2ei64_v_u8mf2_m ( ... ) __riscv_vloxseg2ei64_v_u8mf2_tumu(__VA_ARGS__)

◆ vloxseg2ei64_v_u8mf4

#define vloxseg2ei64_v_u8mf4 ( ... ) __riscv_vloxseg2ei64_v_u8mf4(__VA_ARGS__)

◆ vloxseg2ei64_v_u8mf4_m

#define vloxseg2ei64_v_u8mf4_m ( ... ) __riscv_vloxseg2ei64_v_u8mf4_tumu(__VA_ARGS__)

◆ vloxseg2ei64_v_u8mf8

#define vloxseg2ei64_v_u8mf8 ( ... ) __riscv_vloxseg2ei64_v_u8mf8(__VA_ARGS__)

◆ vloxseg2ei64_v_u8mf8_m

#define vloxseg2ei64_v_u8mf8_m ( ... ) __riscv_vloxseg2ei64_v_u8mf8_tumu(__VA_ARGS__)

◆ vloxseg2ei8_v_f16m1

#define vloxseg2ei8_v_f16m1 ( ... ) __riscv_vloxseg2ei8_v_f16m1(__VA_ARGS__)

◆ vloxseg2ei8_v_f16m1_m

#define vloxseg2ei8_v_f16m1_m ( ... ) __riscv_vloxseg2ei8_v_f16m1_tumu(__VA_ARGS__)

◆ vloxseg2ei8_v_f16m2

#define vloxseg2ei8_v_f16m2 ( ... ) __riscv_vloxseg2ei8_v_f16m2(__VA_ARGS__)

◆ vloxseg2ei8_v_f16m2_m

#define vloxseg2ei8_v_f16m2_m ( ... ) __riscv_vloxseg2ei8_v_f16m2_tumu(__VA_ARGS__)

◆ vloxseg2ei8_v_f16m4

#define vloxseg2ei8_v_f16m4 ( ... ) __riscv_vloxseg2ei8_v_f16m4(__VA_ARGS__)

◆ vloxseg2ei8_v_f16m4_m

#define vloxseg2ei8_v_f16m4_m ( ... ) __riscv_vloxseg2ei8_v_f16m4_tumu(__VA_ARGS__)

◆ vloxseg2ei8_v_f16mf2

#define vloxseg2ei8_v_f16mf2 ( ... ) __riscv_vloxseg2ei8_v_f16mf2(__VA_ARGS__)

◆ vloxseg2ei8_v_f16mf2_m

#define vloxseg2ei8_v_f16mf2_m ( ... ) __riscv_vloxseg2ei8_v_f16mf2_tumu(__VA_ARGS__)

◆ vloxseg2ei8_v_f16mf4

#define vloxseg2ei8_v_f16mf4 ( ... ) __riscv_vloxseg2ei8_v_f16mf4(__VA_ARGS__)

◆ vloxseg2ei8_v_f16mf4_m

#define vloxseg2ei8_v_f16mf4_m ( ... ) __riscv_vloxseg2ei8_v_f16mf4_tumu(__VA_ARGS__)

◆ vloxseg2ei8_v_f32m1

#define vloxseg2ei8_v_f32m1 ( ... ) __riscv_vloxseg2ei8_v_f32m1(__VA_ARGS__)

◆ vloxseg2ei8_v_f32m1_m

#define vloxseg2ei8_v_f32m1_m ( ... ) __riscv_vloxseg2ei8_v_f32m1_tumu(__VA_ARGS__)

◆ vloxseg2ei8_v_f32m2

#define vloxseg2ei8_v_f32m2 ( ... ) __riscv_vloxseg2ei8_v_f32m2(__VA_ARGS__)

◆ vloxseg2ei8_v_f32m2_m

#define vloxseg2ei8_v_f32m2_m ( ... ) __riscv_vloxseg2ei8_v_f32m2_tumu(__VA_ARGS__)

◆ vloxseg2ei8_v_f32m4

#define vloxseg2ei8_v_f32m4 ( ... ) __riscv_vloxseg2ei8_v_f32m4(__VA_ARGS__)

◆ vloxseg2ei8_v_f32m4_m

#define vloxseg2ei8_v_f32m4_m ( ... ) __riscv_vloxseg2ei8_v_f32m4_tumu(__VA_ARGS__)

◆ vloxseg2ei8_v_f32mf2

#define vloxseg2ei8_v_f32mf2 ( ... ) __riscv_vloxseg2ei8_v_f32mf2(__VA_ARGS__)

◆ vloxseg2ei8_v_f32mf2_m

#define vloxseg2ei8_v_f32mf2_m ( ... ) __riscv_vloxseg2ei8_v_f32mf2_tumu(__VA_ARGS__)

◆ vloxseg2ei8_v_f64m1

#define vloxseg2ei8_v_f64m1 ( ... ) __riscv_vloxseg2ei8_v_f64m1(__VA_ARGS__)

◆ vloxseg2ei8_v_f64m1_m

#define vloxseg2ei8_v_f64m1_m ( ... ) __riscv_vloxseg2ei8_v_f64m1_tumu(__VA_ARGS__)

◆ vloxseg2ei8_v_f64m2

#define vloxseg2ei8_v_f64m2 ( ... ) __riscv_vloxseg2ei8_v_f64m2(__VA_ARGS__)

◆ vloxseg2ei8_v_f64m2_m

#define vloxseg2ei8_v_f64m2_m ( ... ) __riscv_vloxseg2ei8_v_f64m2_tumu(__VA_ARGS__)

◆ vloxseg2ei8_v_f64m4

#define vloxseg2ei8_v_f64m4 ( ... ) __riscv_vloxseg2ei8_v_f64m4(__VA_ARGS__)

◆ vloxseg2ei8_v_f64m4_m

#define vloxseg2ei8_v_f64m4_m ( ... ) __riscv_vloxseg2ei8_v_f64m4_tumu(__VA_ARGS__)

◆ vloxseg2ei8_v_i16m1

#define vloxseg2ei8_v_i16m1 ( ... ) __riscv_vloxseg2ei8_v_i16m1(__VA_ARGS__)

◆ vloxseg2ei8_v_i16m1_m

#define vloxseg2ei8_v_i16m1_m ( ... ) __riscv_vloxseg2ei8_v_i16m1_tumu(__VA_ARGS__)

◆ vloxseg2ei8_v_i16m2

#define vloxseg2ei8_v_i16m2 ( ... ) __riscv_vloxseg2ei8_v_i16m2(__VA_ARGS__)

◆ vloxseg2ei8_v_i16m2_m

#define vloxseg2ei8_v_i16m2_m ( ... ) __riscv_vloxseg2ei8_v_i16m2_tumu(__VA_ARGS__)

◆ vloxseg2ei8_v_i16m4

#define vloxseg2ei8_v_i16m4 ( ... ) __riscv_vloxseg2ei8_v_i16m4(__VA_ARGS__)

◆ vloxseg2ei8_v_i16m4_m

#define vloxseg2ei8_v_i16m4_m ( ... ) __riscv_vloxseg2ei8_v_i16m4_tumu(__VA_ARGS__)

◆ vloxseg2ei8_v_i16mf2

#define vloxseg2ei8_v_i16mf2 ( ... ) __riscv_vloxseg2ei8_v_i16mf2(__VA_ARGS__)

◆ vloxseg2ei8_v_i16mf2_m

#define vloxseg2ei8_v_i16mf2_m ( ... ) __riscv_vloxseg2ei8_v_i16mf2_tumu(__VA_ARGS__)

◆ vloxseg2ei8_v_i16mf4

#define vloxseg2ei8_v_i16mf4 ( ... ) __riscv_vloxseg2ei8_v_i16mf4(__VA_ARGS__)

◆ vloxseg2ei8_v_i16mf4_m

#define vloxseg2ei8_v_i16mf4_m ( ... ) __riscv_vloxseg2ei8_v_i16mf4_tumu(__VA_ARGS__)

◆ vloxseg2ei8_v_i32m1

#define vloxseg2ei8_v_i32m1 ( ... ) __riscv_vloxseg2ei8_v_i32m1(__VA_ARGS__)

◆ vloxseg2ei8_v_i32m1_m

#define vloxseg2ei8_v_i32m1_m ( ... ) __riscv_vloxseg2ei8_v_i32m1_tumu(__VA_ARGS__)

◆ vloxseg2ei8_v_i32m2

#define vloxseg2ei8_v_i32m2 ( ... ) __riscv_vloxseg2ei8_v_i32m2(__VA_ARGS__)

◆ vloxseg2ei8_v_i32m2_m

#define vloxseg2ei8_v_i32m2_m ( ... ) __riscv_vloxseg2ei8_v_i32m2_tumu(__VA_ARGS__)

◆ vloxseg2ei8_v_i32m4

#define vloxseg2ei8_v_i32m4 ( ... ) __riscv_vloxseg2ei8_v_i32m4(__VA_ARGS__)

◆ vloxseg2ei8_v_i32m4_m

#define vloxseg2ei8_v_i32m4_m ( ... ) __riscv_vloxseg2ei8_v_i32m4_tumu(__VA_ARGS__)

◆ vloxseg2ei8_v_i32mf2

#define vloxseg2ei8_v_i32mf2 ( ... ) __riscv_vloxseg2ei8_v_i32mf2(__VA_ARGS__)

◆ vloxseg2ei8_v_i32mf2_m

#define vloxseg2ei8_v_i32mf2_m ( ... ) __riscv_vloxseg2ei8_v_i32mf2_tumu(__VA_ARGS__)

◆ vloxseg2ei8_v_i64m1

#define vloxseg2ei8_v_i64m1 ( ... ) __riscv_vloxseg2ei8_v_i64m1(__VA_ARGS__)

◆ vloxseg2ei8_v_i64m1_m

#define vloxseg2ei8_v_i64m1_m ( ... ) __riscv_vloxseg2ei8_v_i64m1_tumu(__VA_ARGS__)

◆ vloxseg2ei8_v_i64m2

#define vloxseg2ei8_v_i64m2 ( ... ) __riscv_vloxseg2ei8_v_i64m2(__VA_ARGS__)

◆ vloxseg2ei8_v_i64m2_m

#define vloxseg2ei8_v_i64m2_m ( ... ) __riscv_vloxseg2ei8_v_i64m2_tumu(__VA_ARGS__)

◆ vloxseg2ei8_v_i64m4

#define vloxseg2ei8_v_i64m4 ( ... ) __riscv_vloxseg2ei8_v_i64m4(__VA_ARGS__)

◆ vloxseg2ei8_v_i64m4_m

#define vloxseg2ei8_v_i64m4_m ( ... ) __riscv_vloxseg2ei8_v_i64m4_tumu(__VA_ARGS__)

◆ vloxseg2ei8_v_i8m1

#define vloxseg2ei8_v_i8m1 ( ... ) __riscv_vloxseg2ei8_v_i8m1(__VA_ARGS__)

◆ vloxseg2ei8_v_i8m1_m

#define vloxseg2ei8_v_i8m1_m ( ... ) __riscv_vloxseg2ei8_v_i8m1_tumu(__VA_ARGS__)

◆ vloxseg2ei8_v_i8m2

#define vloxseg2ei8_v_i8m2 ( ... ) __riscv_vloxseg2ei8_v_i8m2(__VA_ARGS__)

◆ vloxseg2ei8_v_i8m2_m

#define vloxseg2ei8_v_i8m2_m ( ... ) __riscv_vloxseg2ei8_v_i8m2_tumu(__VA_ARGS__)

◆ vloxseg2ei8_v_i8m4

#define vloxseg2ei8_v_i8m4 ( ... ) __riscv_vloxseg2ei8_v_i8m4(__VA_ARGS__)

◆ vloxseg2ei8_v_i8m4_m

#define vloxseg2ei8_v_i8m4_m ( ... ) __riscv_vloxseg2ei8_v_i8m4_tumu(__VA_ARGS__)

◆ vloxseg2ei8_v_i8mf2

#define vloxseg2ei8_v_i8mf2 ( ... ) __riscv_vloxseg2ei8_v_i8mf2(__VA_ARGS__)

◆ vloxseg2ei8_v_i8mf2_m

#define vloxseg2ei8_v_i8mf2_m ( ... ) __riscv_vloxseg2ei8_v_i8mf2_tumu(__VA_ARGS__)

◆ vloxseg2ei8_v_i8mf4

#define vloxseg2ei8_v_i8mf4 ( ... ) __riscv_vloxseg2ei8_v_i8mf4(__VA_ARGS__)

◆ vloxseg2ei8_v_i8mf4_m

#define vloxseg2ei8_v_i8mf4_m ( ... ) __riscv_vloxseg2ei8_v_i8mf4_tumu(__VA_ARGS__)

◆ vloxseg2ei8_v_i8mf8

#define vloxseg2ei8_v_i8mf8 ( ... ) __riscv_vloxseg2ei8_v_i8mf8(__VA_ARGS__)

◆ vloxseg2ei8_v_i8mf8_m

#define vloxseg2ei8_v_i8mf8_m ( ... ) __riscv_vloxseg2ei8_v_i8mf8_tumu(__VA_ARGS__)

◆ vloxseg2ei8_v_u16m1

#define vloxseg2ei8_v_u16m1 ( ... ) __riscv_vloxseg2ei8_v_u16m1(__VA_ARGS__)

◆ vloxseg2ei8_v_u16m1_m

#define vloxseg2ei8_v_u16m1_m ( ... ) __riscv_vloxseg2ei8_v_u16m1_tumu(__VA_ARGS__)

◆ vloxseg2ei8_v_u16m2

#define vloxseg2ei8_v_u16m2 ( ... ) __riscv_vloxseg2ei8_v_u16m2(__VA_ARGS__)

◆ vloxseg2ei8_v_u16m2_m

#define vloxseg2ei8_v_u16m2_m ( ... ) __riscv_vloxseg2ei8_v_u16m2_tumu(__VA_ARGS__)

◆ vloxseg2ei8_v_u16m4

#define vloxseg2ei8_v_u16m4 ( ... ) __riscv_vloxseg2ei8_v_u16m4(__VA_ARGS__)

◆ vloxseg2ei8_v_u16m4_m

#define vloxseg2ei8_v_u16m4_m ( ... ) __riscv_vloxseg2ei8_v_u16m4_tumu(__VA_ARGS__)

◆ vloxseg2ei8_v_u16mf2

#define vloxseg2ei8_v_u16mf2 ( ... ) __riscv_vloxseg2ei8_v_u16mf2(__VA_ARGS__)

◆ vloxseg2ei8_v_u16mf2_m

#define vloxseg2ei8_v_u16mf2_m ( ... ) __riscv_vloxseg2ei8_v_u16mf2_tumu(__VA_ARGS__)

◆ vloxseg2ei8_v_u16mf4

#define vloxseg2ei8_v_u16mf4 ( ... ) __riscv_vloxseg2ei8_v_u16mf4(__VA_ARGS__)

◆ vloxseg2ei8_v_u16mf4_m

#define vloxseg2ei8_v_u16mf4_m ( ... ) __riscv_vloxseg2ei8_v_u16mf4_tumu(__VA_ARGS__)

◆ vloxseg2ei8_v_u32m1

#define vloxseg2ei8_v_u32m1 ( ... ) __riscv_vloxseg2ei8_v_u32m1(__VA_ARGS__)

◆ vloxseg2ei8_v_u32m1_m

#define vloxseg2ei8_v_u32m1_m ( ... ) __riscv_vloxseg2ei8_v_u32m1_tumu(__VA_ARGS__)

◆ vloxseg2ei8_v_u32m2

#define vloxseg2ei8_v_u32m2 ( ... ) __riscv_vloxseg2ei8_v_u32m2(__VA_ARGS__)

◆ vloxseg2ei8_v_u32m2_m

#define vloxseg2ei8_v_u32m2_m ( ... ) __riscv_vloxseg2ei8_v_u32m2_tumu(__VA_ARGS__)

◆ vloxseg2ei8_v_u32m4

#define vloxseg2ei8_v_u32m4 ( ... ) __riscv_vloxseg2ei8_v_u32m4(__VA_ARGS__)

◆ vloxseg2ei8_v_u32m4_m

#define vloxseg2ei8_v_u32m4_m ( ... ) __riscv_vloxseg2ei8_v_u32m4_tumu(__VA_ARGS__)

◆ vloxseg2ei8_v_u32mf2

#define vloxseg2ei8_v_u32mf2 ( ... ) __riscv_vloxseg2ei8_v_u32mf2(__VA_ARGS__)

◆ vloxseg2ei8_v_u32mf2_m

#define vloxseg2ei8_v_u32mf2_m ( ... ) __riscv_vloxseg2ei8_v_u32mf2_tumu(__VA_ARGS__)

◆ vloxseg2ei8_v_u64m1

#define vloxseg2ei8_v_u64m1 ( ... ) __riscv_vloxseg2ei8_v_u64m1(__VA_ARGS__)

◆ vloxseg2ei8_v_u64m1_m

#define vloxseg2ei8_v_u64m1_m ( ... ) __riscv_vloxseg2ei8_v_u64m1_tumu(__VA_ARGS__)

◆ vloxseg2ei8_v_u64m2

#define vloxseg2ei8_v_u64m2 ( ... ) __riscv_vloxseg2ei8_v_u64m2(__VA_ARGS__)

◆ vloxseg2ei8_v_u64m2_m

#define vloxseg2ei8_v_u64m2_m ( ... ) __riscv_vloxseg2ei8_v_u64m2_tumu(__VA_ARGS__)

◆ vloxseg2ei8_v_u64m4

#define vloxseg2ei8_v_u64m4 ( ... ) __riscv_vloxseg2ei8_v_u64m4(__VA_ARGS__)

◆ vloxseg2ei8_v_u64m4_m

#define vloxseg2ei8_v_u64m4_m ( ... ) __riscv_vloxseg2ei8_v_u64m4_tumu(__VA_ARGS__)

◆ vloxseg2ei8_v_u8m1

#define vloxseg2ei8_v_u8m1 ( ... ) __riscv_vloxseg2ei8_v_u8m1(__VA_ARGS__)

◆ vloxseg2ei8_v_u8m1_m

#define vloxseg2ei8_v_u8m1_m ( ... ) __riscv_vloxseg2ei8_v_u8m1_tumu(__VA_ARGS__)

◆ vloxseg2ei8_v_u8m2

#define vloxseg2ei8_v_u8m2 ( ... ) __riscv_vloxseg2ei8_v_u8m2(__VA_ARGS__)

◆ vloxseg2ei8_v_u8m2_m

#define vloxseg2ei8_v_u8m2_m ( ... ) __riscv_vloxseg2ei8_v_u8m2_tumu(__VA_ARGS__)

◆ vloxseg2ei8_v_u8m4

#define vloxseg2ei8_v_u8m4 ( ... ) __riscv_vloxseg2ei8_v_u8m4(__VA_ARGS__)

◆ vloxseg2ei8_v_u8m4_m

#define vloxseg2ei8_v_u8m4_m ( ... ) __riscv_vloxseg2ei8_v_u8m4_tumu(__VA_ARGS__)

◆ vloxseg2ei8_v_u8mf2

#define vloxseg2ei8_v_u8mf2 ( ... ) __riscv_vloxseg2ei8_v_u8mf2(__VA_ARGS__)

◆ vloxseg2ei8_v_u8mf2_m

#define vloxseg2ei8_v_u8mf2_m ( ... ) __riscv_vloxseg2ei8_v_u8mf2_tumu(__VA_ARGS__)

◆ vloxseg2ei8_v_u8mf4

#define vloxseg2ei8_v_u8mf4 ( ... ) __riscv_vloxseg2ei8_v_u8mf4(__VA_ARGS__)

◆ vloxseg2ei8_v_u8mf4_m

#define vloxseg2ei8_v_u8mf4_m ( ... ) __riscv_vloxseg2ei8_v_u8mf4_tumu(__VA_ARGS__)

◆ vloxseg2ei8_v_u8mf8

#define vloxseg2ei8_v_u8mf8 ( ... ) __riscv_vloxseg2ei8_v_u8mf8(__VA_ARGS__)

◆ vloxseg2ei8_v_u8mf8_m

#define vloxseg2ei8_v_u8mf8_m ( ... ) __riscv_vloxseg2ei8_v_u8mf8_tumu(__VA_ARGS__)

◆ vloxseg3ei16_v_f16m1

#define vloxseg3ei16_v_f16m1 ( ... ) __riscv_vloxseg3ei16_v_f16m1(__VA_ARGS__)

◆ vloxseg3ei16_v_f16m1_m

#define vloxseg3ei16_v_f16m1_m ( ... ) __riscv_vloxseg3ei16_v_f16m1_tumu(__VA_ARGS__)

◆ vloxseg3ei16_v_f16m2

#define vloxseg3ei16_v_f16m2 ( ... ) __riscv_vloxseg3ei16_v_f16m2(__VA_ARGS__)

◆ vloxseg3ei16_v_f16m2_m

#define vloxseg3ei16_v_f16m2_m ( ... ) __riscv_vloxseg3ei16_v_f16m2_tumu(__VA_ARGS__)

◆ vloxseg3ei16_v_f16mf2

#define vloxseg3ei16_v_f16mf2 ( ... ) __riscv_vloxseg3ei16_v_f16mf2(__VA_ARGS__)

◆ vloxseg3ei16_v_f16mf2_m

#define vloxseg3ei16_v_f16mf2_m ( ... ) __riscv_vloxseg3ei16_v_f16mf2_tumu(__VA_ARGS__)

◆ vloxseg3ei16_v_f16mf4

#define vloxseg3ei16_v_f16mf4 ( ... ) __riscv_vloxseg3ei16_v_f16mf4(__VA_ARGS__)

◆ vloxseg3ei16_v_f16mf4_m

#define vloxseg3ei16_v_f16mf4_m ( ... ) __riscv_vloxseg3ei16_v_f16mf4_tumu(__VA_ARGS__)

◆ vloxseg3ei16_v_f32m1

#define vloxseg3ei16_v_f32m1 ( ... ) __riscv_vloxseg3ei16_v_f32m1(__VA_ARGS__)

◆ vloxseg3ei16_v_f32m1_m

#define vloxseg3ei16_v_f32m1_m ( ... ) __riscv_vloxseg3ei16_v_f32m1_tumu(__VA_ARGS__)

◆ vloxseg3ei16_v_f32m2

#define vloxseg3ei16_v_f32m2 ( ... ) __riscv_vloxseg3ei16_v_f32m2(__VA_ARGS__)

◆ vloxseg3ei16_v_f32m2_m

#define vloxseg3ei16_v_f32m2_m ( ... ) __riscv_vloxseg3ei16_v_f32m2_tumu(__VA_ARGS__)

◆ vloxseg3ei16_v_f32mf2

#define vloxseg3ei16_v_f32mf2 ( ... ) __riscv_vloxseg3ei16_v_f32mf2(__VA_ARGS__)

◆ vloxseg3ei16_v_f32mf2_m

#define vloxseg3ei16_v_f32mf2_m ( ... ) __riscv_vloxseg3ei16_v_f32mf2_tumu(__VA_ARGS__)

◆ vloxseg3ei16_v_f64m1

#define vloxseg3ei16_v_f64m1 ( ... ) __riscv_vloxseg3ei16_v_f64m1(__VA_ARGS__)

◆ vloxseg3ei16_v_f64m1_m

#define vloxseg3ei16_v_f64m1_m ( ... ) __riscv_vloxseg3ei16_v_f64m1_tumu(__VA_ARGS__)

◆ vloxseg3ei16_v_f64m2

#define vloxseg3ei16_v_f64m2 ( ... ) __riscv_vloxseg3ei16_v_f64m2(__VA_ARGS__)

◆ vloxseg3ei16_v_f64m2_m

#define vloxseg3ei16_v_f64m2_m ( ... ) __riscv_vloxseg3ei16_v_f64m2_tumu(__VA_ARGS__)

◆ vloxseg3ei16_v_i16m1

#define vloxseg3ei16_v_i16m1 ( ... ) __riscv_vloxseg3ei16_v_i16m1(__VA_ARGS__)

◆ vloxseg3ei16_v_i16m1_m

#define vloxseg3ei16_v_i16m1_m ( ... ) __riscv_vloxseg3ei16_v_i16m1_tumu(__VA_ARGS__)

◆ vloxseg3ei16_v_i16m2

#define vloxseg3ei16_v_i16m2 ( ... ) __riscv_vloxseg3ei16_v_i16m2(__VA_ARGS__)

◆ vloxseg3ei16_v_i16m2_m

#define vloxseg3ei16_v_i16m2_m ( ... ) __riscv_vloxseg3ei16_v_i16m2_tumu(__VA_ARGS__)

◆ vloxseg3ei16_v_i16mf2

#define vloxseg3ei16_v_i16mf2 ( ... ) __riscv_vloxseg3ei16_v_i16mf2(__VA_ARGS__)

◆ vloxseg3ei16_v_i16mf2_m

#define vloxseg3ei16_v_i16mf2_m ( ... ) __riscv_vloxseg3ei16_v_i16mf2_tumu(__VA_ARGS__)

◆ vloxseg3ei16_v_i16mf4

#define vloxseg3ei16_v_i16mf4 ( ... ) __riscv_vloxseg3ei16_v_i16mf4(__VA_ARGS__)

◆ vloxseg3ei16_v_i16mf4_m

#define vloxseg3ei16_v_i16mf4_m ( ... ) __riscv_vloxseg3ei16_v_i16mf4_tumu(__VA_ARGS__)

◆ vloxseg3ei16_v_i32m1

#define vloxseg3ei16_v_i32m1 ( ... ) __riscv_vloxseg3ei16_v_i32m1(__VA_ARGS__)

◆ vloxseg3ei16_v_i32m1_m

#define vloxseg3ei16_v_i32m1_m ( ... ) __riscv_vloxseg3ei16_v_i32m1_tumu(__VA_ARGS__)

◆ vloxseg3ei16_v_i32m2

#define vloxseg3ei16_v_i32m2 ( ... ) __riscv_vloxseg3ei16_v_i32m2(__VA_ARGS__)

◆ vloxseg3ei16_v_i32m2_m

#define vloxseg3ei16_v_i32m2_m ( ... ) __riscv_vloxseg3ei16_v_i32m2_tumu(__VA_ARGS__)

◆ vloxseg3ei16_v_i32mf2

#define vloxseg3ei16_v_i32mf2 ( ... ) __riscv_vloxseg3ei16_v_i32mf2(__VA_ARGS__)

◆ vloxseg3ei16_v_i32mf2_m

#define vloxseg3ei16_v_i32mf2_m ( ... ) __riscv_vloxseg3ei16_v_i32mf2_tumu(__VA_ARGS__)

◆ vloxseg3ei16_v_i64m1

#define vloxseg3ei16_v_i64m1 ( ... ) __riscv_vloxseg3ei16_v_i64m1(__VA_ARGS__)

◆ vloxseg3ei16_v_i64m1_m

#define vloxseg3ei16_v_i64m1_m ( ... ) __riscv_vloxseg3ei16_v_i64m1_tumu(__VA_ARGS__)

◆ vloxseg3ei16_v_i64m2

#define vloxseg3ei16_v_i64m2 ( ... ) __riscv_vloxseg3ei16_v_i64m2(__VA_ARGS__)

◆ vloxseg3ei16_v_i64m2_m

#define vloxseg3ei16_v_i64m2_m ( ... ) __riscv_vloxseg3ei16_v_i64m2_tumu(__VA_ARGS__)

◆ vloxseg3ei16_v_i8m1

#define vloxseg3ei16_v_i8m1 ( ... ) __riscv_vloxseg3ei16_v_i8m1(__VA_ARGS__)

◆ vloxseg3ei16_v_i8m1_m

#define vloxseg3ei16_v_i8m1_m ( ... ) __riscv_vloxseg3ei16_v_i8m1_tumu(__VA_ARGS__)

◆ vloxseg3ei16_v_i8m2

#define vloxseg3ei16_v_i8m2 ( ... ) __riscv_vloxseg3ei16_v_i8m2(__VA_ARGS__)

◆ vloxseg3ei16_v_i8m2_m

#define vloxseg3ei16_v_i8m2_m ( ... ) __riscv_vloxseg3ei16_v_i8m2_tumu(__VA_ARGS__)

◆ vloxseg3ei16_v_i8mf2

#define vloxseg3ei16_v_i8mf2 ( ... ) __riscv_vloxseg3ei16_v_i8mf2(__VA_ARGS__)

◆ vloxseg3ei16_v_i8mf2_m

#define vloxseg3ei16_v_i8mf2_m ( ... ) __riscv_vloxseg3ei16_v_i8mf2_tumu(__VA_ARGS__)

◆ vloxseg3ei16_v_i8mf4

#define vloxseg3ei16_v_i8mf4 ( ... ) __riscv_vloxseg3ei16_v_i8mf4(__VA_ARGS__)

◆ vloxseg3ei16_v_i8mf4_m

#define vloxseg3ei16_v_i8mf4_m ( ... ) __riscv_vloxseg3ei16_v_i8mf4_tumu(__VA_ARGS__)

◆ vloxseg3ei16_v_i8mf8

#define vloxseg3ei16_v_i8mf8 ( ... ) __riscv_vloxseg3ei16_v_i8mf8(__VA_ARGS__)

◆ vloxseg3ei16_v_i8mf8_m

#define vloxseg3ei16_v_i8mf8_m ( ... ) __riscv_vloxseg3ei16_v_i8mf8_tumu(__VA_ARGS__)

◆ vloxseg3ei16_v_u16m1

#define vloxseg3ei16_v_u16m1 ( ... ) __riscv_vloxseg3ei16_v_u16m1(__VA_ARGS__)

◆ vloxseg3ei16_v_u16m1_m

#define vloxseg3ei16_v_u16m1_m ( ... ) __riscv_vloxseg3ei16_v_u16m1_tumu(__VA_ARGS__)

◆ vloxseg3ei16_v_u16m2

#define vloxseg3ei16_v_u16m2 ( ... ) __riscv_vloxseg3ei16_v_u16m2(__VA_ARGS__)

◆ vloxseg3ei16_v_u16m2_m

#define vloxseg3ei16_v_u16m2_m ( ... ) __riscv_vloxseg3ei16_v_u16m2_tumu(__VA_ARGS__)

◆ vloxseg3ei16_v_u16mf2

#define vloxseg3ei16_v_u16mf2 ( ... ) __riscv_vloxseg3ei16_v_u16mf2(__VA_ARGS__)

◆ vloxseg3ei16_v_u16mf2_m

#define vloxseg3ei16_v_u16mf2_m ( ... ) __riscv_vloxseg3ei16_v_u16mf2_tumu(__VA_ARGS__)

◆ vloxseg3ei16_v_u16mf4

#define vloxseg3ei16_v_u16mf4 ( ... ) __riscv_vloxseg3ei16_v_u16mf4(__VA_ARGS__)

◆ vloxseg3ei16_v_u16mf4_m

#define vloxseg3ei16_v_u16mf4_m ( ... ) __riscv_vloxseg3ei16_v_u16mf4_tumu(__VA_ARGS__)

◆ vloxseg3ei16_v_u32m1

#define vloxseg3ei16_v_u32m1 ( ... ) __riscv_vloxseg3ei16_v_u32m1(__VA_ARGS__)

◆ vloxseg3ei16_v_u32m1_m

#define vloxseg3ei16_v_u32m1_m ( ... ) __riscv_vloxseg3ei16_v_u32m1_tumu(__VA_ARGS__)

◆ vloxseg3ei16_v_u32m2

#define vloxseg3ei16_v_u32m2 ( ... ) __riscv_vloxseg3ei16_v_u32m2(__VA_ARGS__)

◆ vloxseg3ei16_v_u32m2_m

#define vloxseg3ei16_v_u32m2_m ( ... ) __riscv_vloxseg3ei16_v_u32m2_tumu(__VA_ARGS__)

◆ vloxseg3ei16_v_u32mf2

#define vloxseg3ei16_v_u32mf2 ( ... ) __riscv_vloxseg3ei16_v_u32mf2(__VA_ARGS__)

◆ vloxseg3ei16_v_u32mf2_m

#define vloxseg3ei16_v_u32mf2_m ( ... ) __riscv_vloxseg3ei16_v_u32mf2_tumu(__VA_ARGS__)

◆ vloxseg3ei16_v_u64m1

#define vloxseg3ei16_v_u64m1 ( ... ) __riscv_vloxseg3ei16_v_u64m1(__VA_ARGS__)

◆ vloxseg3ei16_v_u64m1_m

#define vloxseg3ei16_v_u64m1_m ( ... ) __riscv_vloxseg3ei16_v_u64m1_tumu(__VA_ARGS__)

◆ vloxseg3ei16_v_u64m2

#define vloxseg3ei16_v_u64m2 ( ... ) __riscv_vloxseg3ei16_v_u64m2(__VA_ARGS__)

◆ vloxseg3ei16_v_u64m2_m

#define vloxseg3ei16_v_u64m2_m ( ... ) __riscv_vloxseg3ei16_v_u64m2_tumu(__VA_ARGS__)

◆ vloxseg3ei16_v_u8m1

#define vloxseg3ei16_v_u8m1 ( ... ) __riscv_vloxseg3ei16_v_u8m1(__VA_ARGS__)

◆ vloxseg3ei16_v_u8m1_m

#define vloxseg3ei16_v_u8m1_m ( ... ) __riscv_vloxseg3ei16_v_u8m1_tumu(__VA_ARGS__)

◆ vloxseg3ei16_v_u8m2

#define vloxseg3ei16_v_u8m2 ( ... ) __riscv_vloxseg3ei16_v_u8m2(__VA_ARGS__)

◆ vloxseg3ei16_v_u8m2_m

#define vloxseg3ei16_v_u8m2_m ( ... ) __riscv_vloxseg3ei16_v_u8m2_tumu(__VA_ARGS__)

◆ vloxseg3ei16_v_u8mf2

#define vloxseg3ei16_v_u8mf2 ( ... ) __riscv_vloxseg3ei16_v_u8mf2(__VA_ARGS__)

◆ vloxseg3ei16_v_u8mf2_m

#define vloxseg3ei16_v_u8mf2_m ( ... ) __riscv_vloxseg3ei16_v_u8mf2_tumu(__VA_ARGS__)

◆ vloxseg3ei16_v_u8mf4

#define vloxseg3ei16_v_u8mf4 ( ... ) __riscv_vloxseg3ei16_v_u8mf4(__VA_ARGS__)

◆ vloxseg3ei16_v_u8mf4_m

#define vloxseg3ei16_v_u8mf4_m ( ... ) __riscv_vloxseg3ei16_v_u8mf4_tumu(__VA_ARGS__)

◆ vloxseg3ei16_v_u8mf8

#define vloxseg3ei16_v_u8mf8 ( ... ) __riscv_vloxseg3ei16_v_u8mf8(__VA_ARGS__)

◆ vloxseg3ei16_v_u8mf8_m

#define vloxseg3ei16_v_u8mf8_m ( ... ) __riscv_vloxseg3ei16_v_u8mf8_tumu(__VA_ARGS__)

◆ vloxseg3ei32_v_f16m1

#define vloxseg3ei32_v_f16m1 ( ... ) __riscv_vloxseg3ei32_v_f16m1(__VA_ARGS__)

◆ vloxseg3ei32_v_f16m1_m

#define vloxseg3ei32_v_f16m1_m ( ... ) __riscv_vloxseg3ei32_v_f16m1_tumu(__VA_ARGS__)

◆ vloxseg3ei32_v_f16m2

#define vloxseg3ei32_v_f16m2 ( ... ) __riscv_vloxseg3ei32_v_f16m2(__VA_ARGS__)

◆ vloxseg3ei32_v_f16m2_m

#define vloxseg3ei32_v_f16m2_m ( ... ) __riscv_vloxseg3ei32_v_f16m2_tumu(__VA_ARGS__)

◆ vloxseg3ei32_v_f16mf2

#define vloxseg3ei32_v_f16mf2 ( ... ) __riscv_vloxseg3ei32_v_f16mf2(__VA_ARGS__)

◆ vloxseg3ei32_v_f16mf2_m

#define vloxseg3ei32_v_f16mf2_m ( ... ) __riscv_vloxseg3ei32_v_f16mf2_tumu(__VA_ARGS__)

◆ vloxseg3ei32_v_f16mf4

#define vloxseg3ei32_v_f16mf4 ( ... ) __riscv_vloxseg3ei32_v_f16mf4(__VA_ARGS__)

◆ vloxseg3ei32_v_f16mf4_m

#define vloxseg3ei32_v_f16mf4_m ( ... ) __riscv_vloxseg3ei32_v_f16mf4_tumu(__VA_ARGS__)

◆ vloxseg3ei32_v_f32m1

#define vloxseg3ei32_v_f32m1 ( ... ) __riscv_vloxseg3ei32_v_f32m1(__VA_ARGS__)

◆ vloxseg3ei32_v_f32m1_m

#define vloxseg3ei32_v_f32m1_m ( ... ) __riscv_vloxseg3ei32_v_f32m1_tumu(__VA_ARGS__)

◆ vloxseg3ei32_v_f32m2

#define vloxseg3ei32_v_f32m2 ( ... ) __riscv_vloxseg3ei32_v_f32m2(__VA_ARGS__)

◆ vloxseg3ei32_v_f32m2_m

#define vloxseg3ei32_v_f32m2_m ( ... ) __riscv_vloxseg3ei32_v_f32m2_tumu(__VA_ARGS__)

◆ vloxseg3ei32_v_f32mf2

#define vloxseg3ei32_v_f32mf2 ( ... ) __riscv_vloxseg3ei32_v_f32mf2(__VA_ARGS__)

◆ vloxseg3ei32_v_f32mf2_m

#define vloxseg3ei32_v_f32mf2_m ( ... ) __riscv_vloxseg3ei32_v_f32mf2_tumu(__VA_ARGS__)

◆ vloxseg3ei32_v_f64m1

#define vloxseg3ei32_v_f64m1 ( ... ) __riscv_vloxseg3ei32_v_f64m1(__VA_ARGS__)

◆ vloxseg3ei32_v_f64m1_m

#define vloxseg3ei32_v_f64m1_m ( ... ) __riscv_vloxseg3ei32_v_f64m1_tumu(__VA_ARGS__)

◆ vloxseg3ei32_v_f64m2

#define vloxseg3ei32_v_f64m2 ( ... ) __riscv_vloxseg3ei32_v_f64m2(__VA_ARGS__)

◆ vloxseg3ei32_v_f64m2_m

#define vloxseg3ei32_v_f64m2_m ( ... ) __riscv_vloxseg3ei32_v_f64m2_tumu(__VA_ARGS__)

◆ vloxseg3ei32_v_i16m1

#define vloxseg3ei32_v_i16m1 ( ... ) __riscv_vloxseg3ei32_v_i16m1(__VA_ARGS__)

◆ vloxseg3ei32_v_i16m1_m

#define vloxseg3ei32_v_i16m1_m ( ... ) __riscv_vloxseg3ei32_v_i16m1_tumu(__VA_ARGS__)

◆ vloxseg3ei32_v_i16m2

#define vloxseg3ei32_v_i16m2 ( ... ) __riscv_vloxseg3ei32_v_i16m2(__VA_ARGS__)

◆ vloxseg3ei32_v_i16m2_m

#define vloxseg3ei32_v_i16m2_m ( ... ) __riscv_vloxseg3ei32_v_i16m2_tumu(__VA_ARGS__)

◆ vloxseg3ei32_v_i16mf2

#define vloxseg3ei32_v_i16mf2 ( ... ) __riscv_vloxseg3ei32_v_i16mf2(__VA_ARGS__)

◆ vloxseg3ei32_v_i16mf2_m

#define vloxseg3ei32_v_i16mf2_m ( ... ) __riscv_vloxseg3ei32_v_i16mf2_tumu(__VA_ARGS__)

◆ vloxseg3ei32_v_i16mf4

#define vloxseg3ei32_v_i16mf4 ( ... ) __riscv_vloxseg3ei32_v_i16mf4(__VA_ARGS__)

◆ vloxseg3ei32_v_i16mf4_m

#define vloxseg3ei32_v_i16mf4_m ( ... ) __riscv_vloxseg3ei32_v_i16mf4_tumu(__VA_ARGS__)

◆ vloxseg3ei32_v_i32m1

#define vloxseg3ei32_v_i32m1 ( ... ) __riscv_vloxseg3ei32_v_i32m1(__VA_ARGS__)

◆ vloxseg3ei32_v_i32m1_m

#define vloxseg3ei32_v_i32m1_m ( ... ) __riscv_vloxseg3ei32_v_i32m1_tumu(__VA_ARGS__)

◆ vloxseg3ei32_v_i32m2

#define vloxseg3ei32_v_i32m2 ( ... ) __riscv_vloxseg3ei32_v_i32m2(__VA_ARGS__)

◆ vloxseg3ei32_v_i32m2_m

#define vloxseg3ei32_v_i32m2_m ( ... ) __riscv_vloxseg3ei32_v_i32m2_tumu(__VA_ARGS__)

◆ vloxseg3ei32_v_i32mf2

#define vloxseg3ei32_v_i32mf2 ( ... ) __riscv_vloxseg3ei32_v_i32mf2(__VA_ARGS__)

◆ vloxseg3ei32_v_i32mf2_m

#define vloxseg3ei32_v_i32mf2_m ( ... ) __riscv_vloxseg3ei32_v_i32mf2_tumu(__VA_ARGS__)

◆ vloxseg3ei32_v_i64m1

#define vloxseg3ei32_v_i64m1 ( ... ) __riscv_vloxseg3ei32_v_i64m1(__VA_ARGS__)

◆ vloxseg3ei32_v_i64m1_m

#define vloxseg3ei32_v_i64m1_m ( ... ) __riscv_vloxseg3ei32_v_i64m1_tumu(__VA_ARGS__)

◆ vloxseg3ei32_v_i64m2

#define vloxseg3ei32_v_i64m2 ( ... ) __riscv_vloxseg3ei32_v_i64m2(__VA_ARGS__)

◆ vloxseg3ei32_v_i64m2_m

#define vloxseg3ei32_v_i64m2_m ( ... ) __riscv_vloxseg3ei32_v_i64m2_tumu(__VA_ARGS__)

◆ vloxseg3ei32_v_i8m1

#define vloxseg3ei32_v_i8m1 ( ... ) __riscv_vloxseg3ei32_v_i8m1(__VA_ARGS__)

◆ vloxseg3ei32_v_i8m1_m

#define vloxseg3ei32_v_i8m1_m ( ... ) __riscv_vloxseg3ei32_v_i8m1_tumu(__VA_ARGS__)

◆ vloxseg3ei32_v_i8m2

#define vloxseg3ei32_v_i8m2 ( ... ) __riscv_vloxseg3ei32_v_i8m2(__VA_ARGS__)

◆ vloxseg3ei32_v_i8m2_m

#define vloxseg3ei32_v_i8m2_m ( ... ) __riscv_vloxseg3ei32_v_i8m2_tumu(__VA_ARGS__)

◆ vloxseg3ei32_v_i8mf2

#define vloxseg3ei32_v_i8mf2 ( ... ) __riscv_vloxseg3ei32_v_i8mf2(__VA_ARGS__)

◆ vloxseg3ei32_v_i8mf2_m

#define vloxseg3ei32_v_i8mf2_m ( ... ) __riscv_vloxseg3ei32_v_i8mf2_tumu(__VA_ARGS__)

◆ vloxseg3ei32_v_i8mf4

#define vloxseg3ei32_v_i8mf4 ( ... ) __riscv_vloxseg3ei32_v_i8mf4(__VA_ARGS__)

◆ vloxseg3ei32_v_i8mf4_m

#define vloxseg3ei32_v_i8mf4_m ( ... ) __riscv_vloxseg3ei32_v_i8mf4_tumu(__VA_ARGS__)

◆ vloxseg3ei32_v_i8mf8

#define vloxseg3ei32_v_i8mf8 ( ... ) __riscv_vloxseg3ei32_v_i8mf8(__VA_ARGS__)

◆ vloxseg3ei32_v_i8mf8_m

#define vloxseg3ei32_v_i8mf8_m ( ... ) __riscv_vloxseg3ei32_v_i8mf8_tumu(__VA_ARGS__)

◆ vloxseg3ei32_v_u16m1

#define vloxseg3ei32_v_u16m1 ( ... ) __riscv_vloxseg3ei32_v_u16m1(__VA_ARGS__)

◆ vloxseg3ei32_v_u16m1_m

#define vloxseg3ei32_v_u16m1_m ( ... ) __riscv_vloxseg3ei32_v_u16m1_tumu(__VA_ARGS__)

◆ vloxseg3ei32_v_u16m2

#define vloxseg3ei32_v_u16m2 ( ... ) __riscv_vloxseg3ei32_v_u16m2(__VA_ARGS__)

◆ vloxseg3ei32_v_u16m2_m

#define vloxseg3ei32_v_u16m2_m ( ... ) __riscv_vloxseg3ei32_v_u16m2_tumu(__VA_ARGS__)

◆ vloxseg3ei32_v_u16mf2

#define vloxseg3ei32_v_u16mf2 ( ... ) __riscv_vloxseg3ei32_v_u16mf2(__VA_ARGS__)

◆ vloxseg3ei32_v_u16mf2_m

#define vloxseg3ei32_v_u16mf2_m ( ... ) __riscv_vloxseg3ei32_v_u16mf2_tumu(__VA_ARGS__)

◆ vloxseg3ei32_v_u16mf4

#define vloxseg3ei32_v_u16mf4 ( ... ) __riscv_vloxseg3ei32_v_u16mf4(__VA_ARGS__)

◆ vloxseg3ei32_v_u16mf4_m

#define vloxseg3ei32_v_u16mf4_m ( ... ) __riscv_vloxseg3ei32_v_u16mf4_tumu(__VA_ARGS__)

◆ vloxseg3ei32_v_u32m1

#define vloxseg3ei32_v_u32m1 ( ... ) __riscv_vloxseg3ei32_v_u32m1(__VA_ARGS__)

◆ vloxseg3ei32_v_u32m1_m

#define vloxseg3ei32_v_u32m1_m ( ... ) __riscv_vloxseg3ei32_v_u32m1_tumu(__VA_ARGS__)

◆ vloxseg3ei32_v_u32m2

#define vloxseg3ei32_v_u32m2 ( ... ) __riscv_vloxseg3ei32_v_u32m2(__VA_ARGS__)

◆ vloxseg3ei32_v_u32m2_m

#define vloxseg3ei32_v_u32m2_m ( ... ) __riscv_vloxseg3ei32_v_u32m2_tumu(__VA_ARGS__)

◆ vloxseg3ei32_v_u32mf2

#define vloxseg3ei32_v_u32mf2 ( ... ) __riscv_vloxseg3ei32_v_u32mf2(__VA_ARGS__)

◆ vloxseg3ei32_v_u32mf2_m

#define vloxseg3ei32_v_u32mf2_m ( ... ) __riscv_vloxseg3ei32_v_u32mf2_tumu(__VA_ARGS__)

◆ vloxseg3ei32_v_u64m1

#define vloxseg3ei32_v_u64m1 ( ... ) __riscv_vloxseg3ei32_v_u64m1(__VA_ARGS__)

◆ vloxseg3ei32_v_u64m1_m

#define vloxseg3ei32_v_u64m1_m ( ... ) __riscv_vloxseg3ei32_v_u64m1_tumu(__VA_ARGS__)

◆ vloxseg3ei32_v_u64m2

#define vloxseg3ei32_v_u64m2 ( ... ) __riscv_vloxseg3ei32_v_u64m2(__VA_ARGS__)

◆ vloxseg3ei32_v_u64m2_m

#define vloxseg3ei32_v_u64m2_m ( ... ) __riscv_vloxseg3ei32_v_u64m2_tumu(__VA_ARGS__)

◆ vloxseg3ei32_v_u8m1

#define vloxseg3ei32_v_u8m1 ( ... ) __riscv_vloxseg3ei32_v_u8m1(__VA_ARGS__)

◆ vloxseg3ei32_v_u8m1_m

#define vloxseg3ei32_v_u8m1_m ( ... ) __riscv_vloxseg3ei32_v_u8m1_tumu(__VA_ARGS__)

◆ vloxseg3ei32_v_u8m2

#define vloxseg3ei32_v_u8m2 ( ... ) __riscv_vloxseg3ei32_v_u8m2(__VA_ARGS__)

◆ vloxseg3ei32_v_u8m2_m

#define vloxseg3ei32_v_u8m2_m ( ... ) __riscv_vloxseg3ei32_v_u8m2_tumu(__VA_ARGS__)

◆ vloxseg3ei32_v_u8mf2

#define vloxseg3ei32_v_u8mf2 ( ... ) __riscv_vloxseg3ei32_v_u8mf2(__VA_ARGS__)

◆ vloxseg3ei32_v_u8mf2_m

#define vloxseg3ei32_v_u8mf2_m ( ... ) __riscv_vloxseg3ei32_v_u8mf2_tumu(__VA_ARGS__)

◆ vloxseg3ei32_v_u8mf4

#define vloxseg3ei32_v_u8mf4 ( ... ) __riscv_vloxseg3ei32_v_u8mf4(__VA_ARGS__)

◆ vloxseg3ei32_v_u8mf4_m

#define vloxseg3ei32_v_u8mf4_m ( ... ) __riscv_vloxseg3ei32_v_u8mf4_tumu(__VA_ARGS__)

◆ vloxseg3ei32_v_u8mf8

#define vloxseg3ei32_v_u8mf8 ( ... ) __riscv_vloxseg3ei32_v_u8mf8(__VA_ARGS__)

◆ vloxseg3ei32_v_u8mf8_m

#define vloxseg3ei32_v_u8mf8_m ( ... ) __riscv_vloxseg3ei32_v_u8mf8_tumu(__VA_ARGS__)

◆ vloxseg3ei64_v_f16m1

#define vloxseg3ei64_v_f16m1 ( ... ) __riscv_vloxseg3ei64_v_f16m1(__VA_ARGS__)

◆ vloxseg3ei64_v_f16m1_m

#define vloxseg3ei64_v_f16m1_m ( ... ) __riscv_vloxseg3ei64_v_f16m1_tumu(__VA_ARGS__)

◆ vloxseg3ei64_v_f16m2

#define vloxseg3ei64_v_f16m2 ( ... ) __riscv_vloxseg3ei64_v_f16m2(__VA_ARGS__)

◆ vloxseg3ei64_v_f16m2_m

#define vloxseg3ei64_v_f16m2_m ( ... ) __riscv_vloxseg3ei64_v_f16m2_tumu(__VA_ARGS__)

◆ vloxseg3ei64_v_f16mf2

#define vloxseg3ei64_v_f16mf2 ( ... ) __riscv_vloxseg3ei64_v_f16mf2(__VA_ARGS__)

◆ vloxseg3ei64_v_f16mf2_m

#define vloxseg3ei64_v_f16mf2_m ( ... ) __riscv_vloxseg3ei64_v_f16mf2_tumu(__VA_ARGS__)

◆ vloxseg3ei64_v_f16mf4

#define vloxseg3ei64_v_f16mf4 ( ... ) __riscv_vloxseg3ei64_v_f16mf4(__VA_ARGS__)

◆ vloxseg3ei64_v_f16mf4_m

#define vloxseg3ei64_v_f16mf4_m ( ... ) __riscv_vloxseg3ei64_v_f16mf4_tumu(__VA_ARGS__)

◆ vloxseg3ei64_v_f32m1

#define vloxseg3ei64_v_f32m1 ( ... ) __riscv_vloxseg3ei64_v_f32m1(__VA_ARGS__)

◆ vloxseg3ei64_v_f32m1_m

#define vloxseg3ei64_v_f32m1_m ( ... ) __riscv_vloxseg3ei64_v_f32m1_tumu(__VA_ARGS__)

◆ vloxseg3ei64_v_f32m2

#define vloxseg3ei64_v_f32m2 ( ... ) __riscv_vloxseg3ei64_v_f32m2(__VA_ARGS__)

◆ vloxseg3ei64_v_f32m2_m

#define vloxseg3ei64_v_f32m2_m ( ... ) __riscv_vloxseg3ei64_v_f32m2_tumu(__VA_ARGS__)

◆ vloxseg3ei64_v_f32mf2

#define vloxseg3ei64_v_f32mf2 ( ... ) __riscv_vloxseg3ei64_v_f32mf2(__VA_ARGS__)

◆ vloxseg3ei64_v_f32mf2_m

#define vloxseg3ei64_v_f32mf2_m ( ... ) __riscv_vloxseg3ei64_v_f32mf2_tumu(__VA_ARGS__)

◆ vloxseg3ei64_v_f64m1

#define vloxseg3ei64_v_f64m1 ( ... ) __riscv_vloxseg3ei64_v_f64m1(__VA_ARGS__)

◆ vloxseg3ei64_v_f64m1_m

#define vloxseg3ei64_v_f64m1_m ( ... ) __riscv_vloxseg3ei64_v_f64m1_tumu(__VA_ARGS__)

◆ vloxseg3ei64_v_f64m2

#define vloxseg3ei64_v_f64m2 ( ... ) __riscv_vloxseg3ei64_v_f64m2(__VA_ARGS__)

◆ vloxseg3ei64_v_f64m2_m

#define vloxseg3ei64_v_f64m2_m ( ... ) __riscv_vloxseg3ei64_v_f64m2_tumu(__VA_ARGS__)

◆ vloxseg3ei64_v_i16m1

#define vloxseg3ei64_v_i16m1 ( ... ) __riscv_vloxseg3ei64_v_i16m1(__VA_ARGS__)

◆ vloxseg3ei64_v_i16m1_m

#define vloxseg3ei64_v_i16m1_m ( ... ) __riscv_vloxseg3ei64_v_i16m1_tumu(__VA_ARGS__)

◆ vloxseg3ei64_v_i16m2

#define vloxseg3ei64_v_i16m2 ( ... ) __riscv_vloxseg3ei64_v_i16m2(__VA_ARGS__)

◆ vloxseg3ei64_v_i16m2_m

#define vloxseg3ei64_v_i16m2_m ( ... ) __riscv_vloxseg3ei64_v_i16m2_tumu(__VA_ARGS__)

◆ vloxseg3ei64_v_i16mf2

#define vloxseg3ei64_v_i16mf2 ( ... ) __riscv_vloxseg3ei64_v_i16mf2(__VA_ARGS__)

◆ vloxseg3ei64_v_i16mf2_m

#define vloxseg3ei64_v_i16mf2_m ( ... ) __riscv_vloxseg3ei64_v_i16mf2_tumu(__VA_ARGS__)

◆ vloxseg3ei64_v_i16mf4

#define vloxseg3ei64_v_i16mf4 ( ... ) __riscv_vloxseg3ei64_v_i16mf4(__VA_ARGS__)

◆ vloxseg3ei64_v_i16mf4_m

#define vloxseg3ei64_v_i16mf4_m ( ... ) __riscv_vloxseg3ei64_v_i16mf4_tumu(__VA_ARGS__)

◆ vloxseg3ei64_v_i32m1

#define vloxseg3ei64_v_i32m1 ( ... ) __riscv_vloxseg3ei64_v_i32m1(__VA_ARGS__)

◆ vloxseg3ei64_v_i32m1_m

#define vloxseg3ei64_v_i32m1_m ( ... ) __riscv_vloxseg3ei64_v_i32m1_tumu(__VA_ARGS__)

◆ vloxseg3ei64_v_i32m2

#define vloxseg3ei64_v_i32m2 ( ... ) __riscv_vloxseg3ei64_v_i32m2(__VA_ARGS__)

◆ vloxseg3ei64_v_i32m2_m

#define vloxseg3ei64_v_i32m2_m ( ... ) __riscv_vloxseg3ei64_v_i32m2_tumu(__VA_ARGS__)

◆ vloxseg3ei64_v_i32mf2

#define vloxseg3ei64_v_i32mf2 ( ... ) __riscv_vloxseg3ei64_v_i32mf2(__VA_ARGS__)

◆ vloxseg3ei64_v_i32mf2_m

#define vloxseg3ei64_v_i32mf2_m ( ... ) __riscv_vloxseg3ei64_v_i32mf2_tumu(__VA_ARGS__)

◆ vloxseg3ei64_v_i64m1

#define vloxseg3ei64_v_i64m1 ( ... ) __riscv_vloxseg3ei64_v_i64m1(__VA_ARGS__)

◆ vloxseg3ei64_v_i64m1_m

#define vloxseg3ei64_v_i64m1_m ( ... ) __riscv_vloxseg3ei64_v_i64m1_tumu(__VA_ARGS__)

◆ vloxseg3ei64_v_i64m2

#define vloxseg3ei64_v_i64m2 ( ... ) __riscv_vloxseg3ei64_v_i64m2(__VA_ARGS__)

◆ vloxseg3ei64_v_i64m2_m

#define vloxseg3ei64_v_i64m2_m ( ... ) __riscv_vloxseg3ei64_v_i64m2_tumu(__VA_ARGS__)

◆ vloxseg3ei64_v_i8m1

#define vloxseg3ei64_v_i8m1 ( ... ) __riscv_vloxseg3ei64_v_i8m1(__VA_ARGS__)

◆ vloxseg3ei64_v_i8m1_m

#define vloxseg3ei64_v_i8m1_m ( ... ) __riscv_vloxseg3ei64_v_i8m1_tumu(__VA_ARGS__)

◆ vloxseg3ei64_v_i8mf2

#define vloxseg3ei64_v_i8mf2 ( ... ) __riscv_vloxseg3ei64_v_i8mf2(__VA_ARGS__)

◆ vloxseg3ei64_v_i8mf2_m

#define vloxseg3ei64_v_i8mf2_m ( ... ) __riscv_vloxseg3ei64_v_i8mf2_tumu(__VA_ARGS__)

◆ vloxseg3ei64_v_i8mf4

#define vloxseg3ei64_v_i8mf4 ( ... ) __riscv_vloxseg3ei64_v_i8mf4(__VA_ARGS__)

◆ vloxseg3ei64_v_i8mf4_m

#define vloxseg3ei64_v_i8mf4_m ( ... ) __riscv_vloxseg3ei64_v_i8mf4_tumu(__VA_ARGS__)

◆ vloxseg3ei64_v_i8mf8

#define vloxseg3ei64_v_i8mf8 ( ... ) __riscv_vloxseg3ei64_v_i8mf8(__VA_ARGS__)

◆ vloxseg3ei64_v_i8mf8_m

#define vloxseg3ei64_v_i8mf8_m ( ... ) __riscv_vloxseg3ei64_v_i8mf8_tumu(__VA_ARGS__)

◆ vloxseg3ei64_v_u16m1

#define vloxseg3ei64_v_u16m1 ( ... ) __riscv_vloxseg3ei64_v_u16m1(__VA_ARGS__)

◆ vloxseg3ei64_v_u16m1_m

#define vloxseg3ei64_v_u16m1_m ( ... ) __riscv_vloxseg3ei64_v_u16m1_tumu(__VA_ARGS__)

◆ vloxseg3ei64_v_u16m2

#define vloxseg3ei64_v_u16m2 ( ... ) __riscv_vloxseg3ei64_v_u16m2(__VA_ARGS__)

◆ vloxseg3ei64_v_u16m2_m

#define vloxseg3ei64_v_u16m2_m ( ... ) __riscv_vloxseg3ei64_v_u16m2_tumu(__VA_ARGS__)

◆ vloxseg3ei64_v_u16mf2

#define vloxseg3ei64_v_u16mf2 ( ... ) __riscv_vloxseg3ei64_v_u16mf2(__VA_ARGS__)

◆ vloxseg3ei64_v_u16mf2_m

#define vloxseg3ei64_v_u16mf2_m ( ... ) __riscv_vloxseg3ei64_v_u16mf2_tumu(__VA_ARGS__)

◆ vloxseg3ei64_v_u16mf4

#define vloxseg3ei64_v_u16mf4 ( ... ) __riscv_vloxseg3ei64_v_u16mf4(__VA_ARGS__)

◆ vloxseg3ei64_v_u16mf4_m

#define vloxseg3ei64_v_u16mf4_m ( ... ) __riscv_vloxseg3ei64_v_u16mf4_tumu(__VA_ARGS__)

◆ vloxseg3ei64_v_u32m1

#define vloxseg3ei64_v_u32m1 ( ... ) __riscv_vloxseg3ei64_v_u32m1(__VA_ARGS__)

◆ vloxseg3ei64_v_u32m1_m

#define vloxseg3ei64_v_u32m1_m ( ... ) __riscv_vloxseg3ei64_v_u32m1_tumu(__VA_ARGS__)

◆ vloxseg3ei64_v_u32m2

#define vloxseg3ei64_v_u32m2 ( ... ) __riscv_vloxseg3ei64_v_u32m2(__VA_ARGS__)

◆ vloxseg3ei64_v_u32m2_m

#define vloxseg3ei64_v_u32m2_m ( ... ) __riscv_vloxseg3ei64_v_u32m2_tumu(__VA_ARGS__)

◆ vloxseg3ei64_v_u32mf2

#define vloxseg3ei64_v_u32mf2 ( ... ) __riscv_vloxseg3ei64_v_u32mf2(__VA_ARGS__)

◆ vloxseg3ei64_v_u32mf2_m

#define vloxseg3ei64_v_u32mf2_m ( ... ) __riscv_vloxseg3ei64_v_u32mf2_tumu(__VA_ARGS__)

◆ vloxseg3ei64_v_u64m1

#define vloxseg3ei64_v_u64m1 ( ... ) __riscv_vloxseg3ei64_v_u64m1(__VA_ARGS__)

◆ vloxseg3ei64_v_u64m1_m

#define vloxseg3ei64_v_u64m1_m ( ... ) __riscv_vloxseg3ei64_v_u64m1_tumu(__VA_ARGS__)

◆ vloxseg3ei64_v_u64m2

#define vloxseg3ei64_v_u64m2 ( ... ) __riscv_vloxseg3ei64_v_u64m2(__VA_ARGS__)

◆ vloxseg3ei64_v_u64m2_m

#define vloxseg3ei64_v_u64m2_m ( ... ) __riscv_vloxseg3ei64_v_u64m2_tumu(__VA_ARGS__)

◆ vloxseg3ei64_v_u8m1

#define vloxseg3ei64_v_u8m1 ( ... ) __riscv_vloxseg3ei64_v_u8m1(__VA_ARGS__)

◆ vloxseg3ei64_v_u8m1_m

#define vloxseg3ei64_v_u8m1_m ( ... ) __riscv_vloxseg3ei64_v_u8m1_tumu(__VA_ARGS__)

◆ vloxseg3ei64_v_u8mf2

#define vloxseg3ei64_v_u8mf2 ( ... ) __riscv_vloxseg3ei64_v_u8mf2(__VA_ARGS__)

◆ vloxseg3ei64_v_u8mf2_m

#define vloxseg3ei64_v_u8mf2_m ( ... ) __riscv_vloxseg3ei64_v_u8mf2_tumu(__VA_ARGS__)

◆ vloxseg3ei64_v_u8mf4

#define vloxseg3ei64_v_u8mf4 ( ... ) __riscv_vloxseg3ei64_v_u8mf4(__VA_ARGS__)

◆ vloxseg3ei64_v_u8mf4_m

#define vloxseg3ei64_v_u8mf4_m ( ... ) __riscv_vloxseg3ei64_v_u8mf4_tumu(__VA_ARGS__)

◆ vloxseg3ei64_v_u8mf8

#define vloxseg3ei64_v_u8mf8 ( ... ) __riscv_vloxseg3ei64_v_u8mf8(__VA_ARGS__)

◆ vloxseg3ei64_v_u8mf8_m

#define vloxseg3ei64_v_u8mf8_m ( ... ) __riscv_vloxseg3ei64_v_u8mf8_tumu(__VA_ARGS__)

◆ vloxseg3ei8_v_f16m1

#define vloxseg3ei8_v_f16m1 ( ... ) __riscv_vloxseg3ei8_v_f16m1(__VA_ARGS__)

◆ vloxseg3ei8_v_f16m1_m

#define vloxseg3ei8_v_f16m1_m ( ... ) __riscv_vloxseg3ei8_v_f16m1_tumu(__VA_ARGS__)

◆ vloxseg3ei8_v_f16m2

#define vloxseg3ei8_v_f16m2 ( ... ) __riscv_vloxseg3ei8_v_f16m2(__VA_ARGS__)

◆ vloxseg3ei8_v_f16m2_m

#define vloxseg3ei8_v_f16m2_m ( ... ) __riscv_vloxseg3ei8_v_f16m2_tumu(__VA_ARGS__)

◆ vloxseg3ei8_v_f16mf2

#define vloxseg3ei8_v_f16mf2 ( ... ) __riscv_vloxseg3ei8_v_f16mf2(__VA_ARGS__)

◆ vloxseg3ei8_v_f16mf2_m

#define vloxseg3ei8_v_f16mf2_m ( ... ) __riscv_vloxseg3ei8_v_f16mf2_tumu(__VA_ARGS__)

◆ vloxseg3ei8_v_f16mf4

#define vloxseg3ei8_v_f16mf4 ( ... ) __riscv_vloxseg3ei8_v_f16mf4(__VA_ARGS__)

◆ vloxseg3ei8_v_f16mf4_m

#define vloxseg3ei8_v_f16mf4_m ( ... ) __riscv_vloxseg3ei8_v_f16mf4_tumu(__VA_ARGS__)

◆ vloxseg3ei8_v_f32m1

#define vloxseg3ei8_v_f32m1 ( ... ) __riscv_vloxseg3ei8_v_f32m1(__VA_ARGS__)

◆ vloxseg3ei8_v_f32m1_m

#define vloxseg3ei8_v_f32m1_m ( ... ) __riscv_vloxseg3ei8_v_f32m1_tumu(__VA_ARGS__)

◆ vloxseg3ei8_v_f32m2

#define vloxseg3ei8_v_f32m2 ( ... ) __riscv_vloxseg3ei8_v_f32m2(__VA_ARGS__)

◆ vloxseg3ei8_v_f32m2_m

#define vloxseg3ei8_v_f32m2_m ( ... ) __riscv_vloxseg3ei8_v_f32m2_tumu(__VA_ARGS__)

◆ vloxseg3ei8_v_f32mf2

#define vloxseg3ei8_v_f32mf2 ( ... ) __riscv_vloxseg3ei8_v_f32mf2(__VA_ARGS__)

◆ vloxseg3ei8_v_f32mf2_m

#define vloxseg3ei8_v_f32mf2_m ( ... ) __riscv_vloxseg3ei8_v_f32mf2_tumu(__VA_ARGS__)

◆ vloxseg3ei8_v_f64m1

#define vloxseg3ei8_v_f64m1 ( ... ) __riscv_vloxseg3ei8_v_f64m1(__VA_ARGS__)

◆ vloxseg3ei8_v_f64m1_m

#define vloxseg3ei8_v_f64m1_m ( ... ) __riscv_vloxseg3ei8_v_f64m1_tumu(__VA_ARGS__)

◆ vloxseg3ei8_v_f64m2

#define vloxseg3ei8_v_f64m2 ( ... ) __riscv_vloxseg3ei8_v_f64m2(__VA_ARGS__)

◆ vloxseg3ei8_v_f64m2_m

#define vloxseg3ei8_v_f64m2_m ( ... ) __riscv_vloxseg3ei8_v_f64m2_tumu(__VA_ARGS__)

◆ vloxseg3ei8_v_i16m1

#define vloxseg3ei8_v_i16m1 ( ... ) __riscv_vloxseg3ei8_v_i16m1(__VA_ARGS__)

◆ vloxseg3ei8_v_i16m1_m

#define vloxseg3ei8_v_i16m1_m ( ... ) __riscv_vloxseg3ei8_v_i16m1_tumu(__VA_ARGS__)

◆ vloxseg3ei8_v_i16m2

#define vloxseg3ei8_v_i16m2 ( ... ) __riscv_vloxseg3ei8_v_i16m2(__VA_ARGS__)

◆ vloxseg3ei8_v_i16m2_m

#define vloxseg3ei8_v_i16m2_m ( ... ) __riscv_vloxseg3ei8_v_i16m2_tumu(__VA_ARGS__)

◆ vloxseg3ei8_v_i16mf2

#define vloxseg3ei8_v_i16mf2 ( ... ) __riscv_vloxseg3ei8_v_i16mf2(__VA_ARGS__)

◆ vloxseg3ei8_v_i16mf2_m

#define vloxseg3ei8_v_i16mf2_m ( ... ) __riscv_vloxseg3ei8_v_i16mf2_tumu(__VA_ARGS__)

◆ vloxseg3ei8_v_i16mf4

#define vloxseg3ei8_v_i16mf4 ( ... ) __riscv_vloxseg3ei8_v_i16mf4(__VA_ARGS__)

◆ vloxseg3ei8_v_i16mf4_m

#define vloxseg3ei8_v_i16mf4_m ( ... ) __riscv_vloxseg3ei8_v_i16mf4_tumu(__VA_ARGS__)

◆ vloxseg3ei8_v_i32m1

#define vloxseg3ei8_v_i32m1 ( ... ) __riscv_vloxseg3ei8_v_i32m1(__VA_ARGS__)

◆ vloxseg3ei8_v_i32m1_m

#define vloxseg3ei8_v_i32m1_m ( ... ) __riscv_vloxseg3ei8_v_i32m1_tumu(__VA_ARGS__)

◆ vloxseg3ei8_v_i32m2

#define vloxseg3ei8_v_i32m2 ( ... ) __riscv_vloxseg3ei8_v_i32m2(__VA_ARGS__)

◆ vloxseg3ei8_v_i32m2_m

#define vloxseg3ei8_v_i32m2_m ( ... ) __riscv_vloxseg3ei8_v_i32m2_tumu(__VA_ARGS__)

◆ vloxseg3ei8_v_i32mf2

#define vloxseg3ei8_v_i32mf2 ( ... ) __riscv_vloxseg3ei8_v_i32mf2(__VA_ARGS__)

◆ vloxseg3ei8_v_i32mf2_m

#define vloxseg3ei8_v_i32mf2_m ( ... ) __riscv_vloxseg3ei8_v_i32mf2_tumu(__VA_ARGS__)

◆ vloxseg3ei8_v_i64m1

#define vloxseg3ei8_v_i64m1 ( ... ) __riscv_vloxseg3ei8_v_i64m1(__VA_ARGS__)

◆ vloxseg3ei8_v_i64m1_m

#define vloxseg3ei8_v_i64m1_m ( ... ) __riscv_vloxseg3ei8_v_i64m1_tumu(__VA_ARGS__)

◆ vloxseg3ei8_v_i64m2

#define vloxseg3ei8_v_i64m2 ( ... ) __riscv_vloxseg3ei8_v_i64m2(__VA_ARGS__)

◆ vloxseg3ei8_v_i64m2_m

#define vloxseg3ei8_v_i64m2_m ( ... ) __riscv_vloxseg3ei8_v_i64m2_tumu(__VA_ARGS__)

◆ vloxseg3ei8_v_i8m1

#define vloxseg3ei8_v_i8m1 ( ... ) __riscv_vloxseg3ei8_v_i8m1(__VA_ARGS__)

◆ vloxseg3ei8_v_i8m1_m

#define vloxseg3ei8_v_i8m1_m ( ... ) __riscv_vloxseg3ei8_v_i8m1_tumu(__VA_ARGS__)

◆ vloxseg3ei8_v_i8m2

#define vloxseg3ei8_v_i8m2 ( ... ) __riscv_vloxseg3ei8_v_i8m2(__VA_ARGS__)

◆ vloxseg3ei8_v_i8m2_m

#define vloxseg3ei8_v_i8m2_m ( ... ) __riscv_vloxseg3ei8_v_i8m2_tumu(__VA_ARGS__)

◆ vloxseg3ei8_v_i8mf2

#define vloxseg3ei8_v_i8mf2 ( ... ) __riscv_vloxseg3ei8_v_i8mf2(__VA_ARGS__)

◆ vloxseg3ei8_v_i8mf2_m

#define vloxseg3ei8_v_i8mf2_m ( ... ) __riscv_vloxseg3ei8_v_i8mf2_tumu(__VA_ARGS__)

◆ vloxseg3ei8_v_i8mf4

#define vloxseg3ei8_v_i8mf4 ( ... ) __riscv_vloxseg3ei8_v_i8mf4(__VA_ARGS__)

◆ vloxseg3ei8_v_i8mf4_m

#define vloxseg3ei8_v_i8mf4_m ( ... ) __riscv_vloxseg3ei8_v_i8mf4_tumu(__VA_ARGS__)

◆ vloxseg3ei8_v_i8mf8

#define vloxseg3ei8_v_i8mf8 ( ... ) __riscv_vloxseg3ei8_v_i8mf8(__VA_ARGS__)

◆ vloxseg3ei8_v_i8mf8_m

#define vloxseg3ei8_v_i8mf8_m ( ... ) __riscv_vloxseg3ei8_v_i8mf8_tumu(__VA_ARGS__)

◆ vloxseg3ei8_v_u16m1

#define vloxseg3ei8_v_u16m1 ( ... ) __riscv_vloxseg3ei8_v_u16m1(__VA_ARGS__)

◆ vloxseg3ei8_v_u16m1_m

#define vloxseg3ei8_v_u16m1_m ( ... ) __riscv_vloxseg3ei8_v_u16m1_tumu(__VA_ARGS__)

◆ vloxseg3ei8_v_u16m2

#define vloxseg3ei8_v_u16m2 ( ... ) __riscv_vloxseg3ei8_v_u16m2(__VA_ARGS__)

◆ vloxseg3ei8_v_u16m2_m

#define vloxseg3ei8_v_u16m2_m ( ... ) __riscv_vloxseg3ei8_v_u16m2_tumu(__VA_ARGS__)

◆ vloxseg3ei8_v_u16mf2

#define vloxseg3ei8_v_u16mf2 ( ... ) __riscv_vloxseg3ei8_v_u16mf2(__VA_ARGS__)

◆ vloxseg3ei8_v_u16mf2_m

#define vloxseg3ei8_v_u16mf2_m ( ... ) __riscv_vloxseg3ei8_v_u16mf2_tumu(__VA_ARGS__)

◆ vloxseg3ei8_v_u16mf4

#define vloxseg3ei8_v_u16mf4 ( ... ) __riscv_vloxseg3ei8_v_u16mf4(__VA_ARGS__)

◆ vloxseg3ei8_v_u16mf4_m

#define vloxseg3ei8_v_u16mf4_m ( ... ) __riscv_vloxseg3ei8_v_u16mf4_tumu(__VA_ARGS__)

◆ vloxseg3ei8_v_u32m1

#define vloxseg3ei8_v_u32m1 ( ... ) __riscv_vloxseg3ei8_v_u32m1(__VA_ARGS__)

◆ vloxseg3ei8_v_u32m1_m

#define vloxseg3ei8_v_u32m1_m ( ... ) __riscv_vloxseg3ei8_v_u32m1_tumu(__VA_ARGS__)

◆ vloxseg3ei8_v_u32m2

#define vloxseg3ei8_v_u32m2 ( ... ) __riscv_vloxseg3ei8_v_u32m2(__VA_ARGS__)

◆ vloxseg3ei8_v_u32m2_m

#define vloxseg3ei8_v_u32m2_m ( ... ) __riscv_vloxseg3ei8_v_u32m2_tumu(__VA_ARGS__)

◆ vloxseg3ei8_v_u32mf2

#define vloxseg3ei8_v_u32mf2 ( ... ) __riscv_vloxseg3ei8_v_u32mf2(__VA_ARGS__)

◆ vloxseg3ei8_v_u32mf2_m

#define vloxseg3ei8_v_u32mf2_m ( ... ) __riscv_vloxseg3ei8_v_u32mf2_tumu(__VA_ARGS__)

◆ vloxseg3ei8_v_u64m1

#define vloxseg3ei8_v_u64m1 ( ... ) __riscv_vloxseg3ei8_v_u64m1(__VA_ARGS__)

◆ vloxseg3ei8_v_u64m1_m

#define vloxseg3ei8_v_u64m1_m ( ... ) __riscv_vloxseg3ei8_v_u64m1_tumu(__VA_ARGS__)

◆ vloxseg3ei8_v_u64m2

#define vloxseg3ei8_v_u64m2 ( ... ) __riscv_vloxseg3ei8_v_u64m2(__VA_ARGS__)

◆ vloxseg3ei8_v_u64m2_m

#define vloxseg3ei8_v_u64m2_m ( ... ) __riscv_vloxseg3ei8_v_u64m2_tumu(__VA_ARGS__)

◆ vloxseg3ei8_v_u8m1

#define vloxseg3ei8_v_u8m1 ( ... ) __riscv_vloxseg3ei8_v_u8m1(__VA_ARGS__)

◆ vloxseg3ei8_v_u8m1_m

#define vloxseg3ei8_v_u8m1_m ( ... ) __riscv_vloxseg3ei8_v_u8m1_tumu(__VA_ARGS__)

◆ vloxseg3ei8_v_u8m2

#define vloxseg3ei8_v_u8m2 ( ... ) __riscv_vloxseg3ei8_v_u8m2(__VA_ARGS__)

◆ vloxseg3ei8_v_u8m2_m

#define vloxseg3ei8_v_u8m2_m ( ... ) __riscv_vloxseg3ei8_v_u8m2_tumu(__VA_ARGS__)

◆ vloxseg3ei8_v_u8mf2

#define vloxseg3ei8_v_u8mf2 ( ... ) __riscv_vloxseg3ei8_v_u8mf2(__VA_ARGS__)

◆ vloxseg3ei8_v_u8mf2_m

#define vloxseg3ei8_v_u8mf2_m ( ... ) __riscv_vloxseg3ei8_v_u8mf2_tumu(__VA_ARGS__)

◆ vloxseg3ei8_v_u8mf4

#define vloxseg3ei8_v_u8mf4 ( ... ) __riscv_vloxseg3ei8_v_u8mf4(__VA_ARGS__)

◆ vloxseg3ei8_v_u8mf4_m

#define vloxseg3ei8_v_u8mf4_m ( ... ) __riscv_vloxseg3ei8_v_u8mf4_tumu(__VA_ARGS__)

◆ vloxseg3ei8_v_u8mf8

#define vloxseg3ei8_v_u8mf8 ( ... ) __riscv_vloxseg3ei8_v_u8mf8(__VA_ARGS__)

◆ vloxseg3ei8_v_u8mf8_m

#define vloxseg3ei8_v_u8mf8_m ( ... ) __riscv_vloxseg3ei8_v_u8mf8_tumu(__VA_ARGS__)

◆ vloxseg4ei16_v_f16m1

#define vloxseg4ei16_v_f16m1 ( ... ) __riscv_vloxseg4ei16_v_f16m1(__VA_ARGS__)

◆ vloxseg4ei16_v_f16m1_m

#define vloxseg4ei16_v_f16m1_m ( ... ) __riscv_vloxseg4ei16_v_f16m1_tumu(__VA_ARGS__)

◆ vloxseg4ei16_v_f16m2

#define vloxseg4ei16_v_f16m2 ( ... ) __riscv_vloxseg4ei16_v_f16m2(__VA_ARGS__)

◆ vloxseg4ei16_v_f16m2_m

#define vloxseg4ei16_v_f16m2_m ( ... ) __riscv_vloxseg4ei16_v_f16m2_tumu(__VA_ARGS__)

◆ vloxseg4ei16_v_f16mf2

#define vloxseg4ei16_v_f16mf2 ( ... ) __riscv_vloxseg4ei16_v_f16mf2(__VA_ARGS__)

◆ vloxseg4ei16_v_f16mf2_m

#define vloxseg4ei16_v_f16mf2_m ( ... ) __riscv_vloxseg4ei16_v_f16mf2_tumu(__VA_ARGS__)

◆ vloxseg4ei16_v_f16mf4

#define vloxseg4ei16_v_f16mf4 ( ... ) __riscv_vloxseg4ei16_v_f16mf4(__VA_ARGS__)

◆ vloxseg4ei16_v_f16mf4_m

#define vloxseg4ei16_v_f16mf4_m ( ... ) __riscv_vloxseg4ei16_v_f16mf4_tumu(__VA_ARGS__)

◆ vloxseg4ei16_v_f32m1

#define vloxseg4ei16_v_f32m1 ( ... ) __riscv_vloxseg4ei16_v_f32m1(__VA_ARGS__)

◆ vloxseg4ei16_v_f32m1_m

#define vloxseg4ei16_v_f32m1_m ( ... ) __riscv_vloxseg4ei16_v_f32m1_tumu(__VA_ARGS__)

◆ vloxseg4ei16_v_f32m2

#define vloxseg4ei16_v_f32m2 ( ... ) __riscv_vloxseg4ei16_v_f32m2(__VA_ARGS__)

◆ vloxseg4ei16_v_f32m2_m

#define vloxseg4ei16_v_f32m2_m ( ... ) __riscv_vloxseg4ei16_v_f32m2_tumu(__VA_ARGS__)

◆ vloxseg4ei16_v_f32mf2

#define vloxseg4ei16_v_f32mf2 ( ... ) __riscv_vloxseg4ei16_v_f32mf2(__VA_ARGS__)

◆ vloxseg4ei16_v_f32mf2_m

#define vloxseg4ei16_v_f32mf2_m ( ... ) __riscv_vloxseg4ei16_v_f32mf2_tumu(__VA_ARGS__)

◆ vloxseg4ei16_v_f64m1

#define vloxseg4ei16_v_f64m1 ( ... ) __riscv_vloxseg4ei16_v_f64m1(__VA_ARGS__)

◆ vloxseg4ei16_v_f64m1_m

#define vloxseg4ei16_v_f64m1_m ( ... ) __riscv_vloxseg4ei16_v_f64m1_tumu(__VA_ARGS__)

◆ vloxseg4ei16_v_f64m2

#define vloxseg4ei16_v_f64m2 ( ... ) __riscv_vloxseg4ei16_v_f64m2(__VA_ARGS__)

◆ vloxseg4ei16_v_f64m2_m

#define vloxseg4ei16_v_f64m2_m ( ... ) __riscv_vloxseg4ei16_v_f64m2_tumu(__VA_ARGS__)

◆ vloxseg4ei16_v_i16m1

#define vloxseg4ei16_v_i16m1 ( ... ) __riscv_vloxseg4ei16_v_i16m1(__VA_ARGS__)

◆ vloxseg4ei16_v_i16m1_m

#define vloxseg4ei16_v_i16m1_m ( ... ) __riscv_vloxseg4ei16_v_i16m1_tumu(__VA_ARGS__)

◆ vloxseg4ei16_v_i16m2

#define vloxseg4ei16_v_i16m2 ( ... ) __riscv_vloxseg4ei16_v_i16m2(__VA_ARGS__)

◆ vloxseg4ei16_v_i16m2_m

#define vloxseg4ei16_v_i16m2_m ( ... ) __riscv_vloxseg4ei16_v_i16m2_tumu(__VA_ARGS__)

◆ vloxseg4ei16_v_i16mf2

#define vloxseg4ei16_v_i16mf2 ( ... ) __riscv_vloxseg4ei16_v_i16mf2(__VA_ARGS__)

◆ vloxseg4ei16_v_i16mf2_m

#define vloxseg4ei16_v_i16mf2_m ( ... ) __riscv_vloxseg4ei16_v_i16mf2_tumu(__VA_ARGS__)

◆ vloxseg4ei16_v_i16mf4

#define vloxseg4ei16_v_i16mf4 ( ... ) __riscv_vloxseg4ei16_v_i16mf4(__VA_ARGS__)

◆ vloxseg4ei16_v_i16mf4_m

#define vloxseg4ei16_v_i16mf4_m ( ... ) __riscv_vloxseg4ei16_v_i16mf4_tumu(__VA_ARGS__)

◆ vloxseg4ei16_v_i32m1

#define vloxseg4ei16_v_i32m1 ( ... ) __riscv_vloxseg4ei16_v_i32m1(__VA_ARGS__)

◆ vloxseg4ei16_v_i32m1_m

#define vloxseg4ei16_v_i32m1_m ( ... ) __riscv_vloxseg4ei16_v_i32m1_tumu(__VA_ARGS__)

◆ vloxseg4ei16_v_i32m2

#define vloxseg4ei16_v_i32m2 ( ... ) __riscv_vloxseg4ei16_v_i32m2(__VA_ARGS__)

◆ vloxseg4ei16_v_i32m2_m

#define vloxseg4ei16_v_i32m2_m ( ... ) __riscv_vloxseg4ei16_v_i32m2_tumu(__VA_ARGS__)

◆ vloxseg4ei16_v_i32mf2

#define vloxseg4ei16_v_i32mf2 ( ... ) __riscv_vloxseg4ei16_v_i32mf2(__VA_ARGS__)

◆ vloxseg4ei16_v_i32mf2_m

#define vloxseg4ei16_v_i32mf2_m ( ... ) __riscv_vloxseg4ei16_v_i32mf2_tumu(__VA_ARGS__)

◆ vloxseg4ei16_v_i64m1

#define vloxseg4ei16_v_i64m1 ( ... ) __riscv_vloxseg4ei16_v_i64m1(__VA_ARGS__)

◆ vloxseg4ei16_v_i64m1_m

#define vloxseg4ei16_v_i64m1_m ( ... ) __riscv_vloxseg4ei16_v_i64m1_tumu(__VA_ARGS__)

◆ vloxseg4ei16_v_i64m2

#define vloxseg4ei16_v_i64m2 ( ... ) __riscv_vloxseg4ei16_v_i64m2(__VA_ARGS__)

◆ vloxseg4ei16_v_i64m2_m

#define vloxseg4ei16_v_i64m2_m ( ... ) __riscv_vloxseg4ei16_v_i64m2_tumu(__VA_ARGS__)

◆ vloxseg4ei16_v_i8m1

#define vloxseg4ei16_v_i8m1 ( ... ) __riscv_vloxseg4ei16_v_i8m1(__VA_ARGS__)

◆ vloxseg4ei16_v_i8m1_m

#define vloxseg4ei16_v_i8m1_m ( ... ) __riscv_vloxseg4ei16_v_i8m1_tumu(__VA_ARGS__)

◆ vloxseg4ei16_v_i8m2

#define vloxseg4ei16_v_i8m2 ( ... ) __riscv_vloxseg4ei16_v_i8m2(__VA_ARGS__)

◆ vloxseg4ei16_v_i8m2_m

#define vloxseg4ei16_v_i8m2_m ( ... ) __riscv_vloxseg4ei16_v_i8m2_tumu(__VA_ARGS__)

◆ vloxseg4ei16_v_i8mf2

#define vloxseg4ei16_v_i8mf2 ( ... ) __riscv_vloxseg4ei16_v_i8mf2(__VA_ARGS__)

◆ vloxseg4ei16_v_i8mf2_m

#define vloxseg4ei16_v_i8mf2_m ( ... ) __riscv_vloxseg4ei16_v_i8mf2_tumu(__VA_ARGS__)

◆ vloxseg4ei16_v_i8mf4

#define vloxseg4ei16_v_i8mf4 ( ... ) __riscv_vloxseg4ei16_v_i8mf4(__VA_ARGS__)

◆ vloxseg4ei16_v_i8mf4_m

#define vloxseg4ei16_v_i8mf4_m ( ... ) __riscv_vloxseg4ei16_v_i8mf4_tumu(__VA_ARGS__)

◆ vloxseg4ei16_v_i8mf8

#define vloxseg4ei16_v_i8mf8 ( ... ) __riscv_vloxseg4ei16_v_i8mf8(__VA_ARGS__)

◆ vloxseg4ei16_v_i8mf8_m

#define vloxseg4ei16_v_i8mf8_m ( ... ) __riscv_vloxseg4ei16_v_i8mf8_tumu(__VA_ARGS__)

◆ vloxseg4ei16_v_u16m1

#define vloxseg4ei16_v_u16m1 ( ... ) __riscv_vloxseg4ei16_v_u16m1(__VA_ARGS__)

◆ vloxseg4ei16_v_u16m1_m

#define vloxseg4ei16_v_u16m1_m ( ... ) __riscv_vloxseg4ei16_v_u16m1_tumu(__VA_ARGS__)

◆ vloxseg4ei16_v_u16m2

#define vloxseg4ei16_v_u16m2 ( ... ) __riscv_vloxseg4ei16_v_u16m2(__VA_ARGS__)

◆ vloxseg4ei16_v_u16m2_m

#define vloxseg4ei16_v_u16m2_m ( ... ) __riscv_vloxseg4ei16_v_u16m2_tumu(__VA_ARGS__)

◆ vloxseg4ei16_v_u16mf2

#define vloxseg4ei16_v_u16mf2 ( ... ) __riscv_vloxseg4ei16_v_u16mf2(__VA_ARGS__)

◆ vloxseg4ei16_v_u16mf2_m

#define vloxseg4ei16_v_u16mf2_m ( ... ) __riscv_vloxseg4ei16_v_u16mf2_tumu(__VA_ARGS__)

◆ vloxseg4ei16_v_u16mf4

#define vloxseg4ei16_v_u16mf4 ( ... ) __riscv_vloxseg4ei16_v_u16mf4(__VA_ARGS__)

◆ vloxseg4ei16_v_u16mf4_m

#define vloxseg4ei16_v_u16mf4_m ( ... ) __riscv_vloxseg4ei16_v_u16mf4_tumu(__VA_ARGS__)

◆ vloxseg4ei16_v_u32m1

#define vloxseg4ei16_v_u32m1 ( ... ) __riscv_vloxseg4ei16_v_u32m1(__VA_ARGS__)

◆ vloxseg4ei16_v_u32m1_m

#define vloxseg4ei16_v_u32m1_m ( ... ) __riscv_vloxseg4ei16_v_u32m1_tumu(__VA_ARGS__)

◆ vloxseg4ei16_v_u32m2

#define vloxseg4ei16_v_u32m2 ( ... ) __riscv_vloxseg4ei16_v_u32m2(__VA_ARGS__)

◆ vloxseg4ei16_v_u32m2_m

#define vloxseg4ei16_v_u32m2_m ( ... ) __riscv_vloxseg4ei16_v_u32m2_tumu(__VA_ARGS__)

◆ vloxseg4ei16_v_u32mf2

#define vloxseg4ei16_v_u32mf2 ( ... ) __riscv_vloxseg4ei16_v_u32mf2(__VA_ARGS__)

◆ vloxseg4ei16_v_u32mf2_m

#define vloxseg4ei16_v_u32mf2_m ( ... ) __riscv_vloxseg4ei16_v_u32mf2_tumu(__VA_ARGS__)

◆ vloxseg4ei16_v_u64m1

#define vloxseg4ei16_v_u64m1 ( ... ) __riscv_vloxseg4ei16_v_u64m1(__VA_ARGS__)

◆ vloxseg4ei16_v_u64m1_m

#define vloxseg4ei16_v_u64m1_m ( ... ) __riscv_vloxseg4ei16_v_u64m1_tumu(__VA_ARGS__)

◆ vloxseg4ei16_v_u64m2

#define vloxseg4ei16_v_u64m2 ( ... ) __riscv_vloxseg4ei16_v_u64m2(__VA_ARGS__)

◆ vloxseg4ei16_v_u64m2_m

#define vloxseg4ei16_v_u64m2_m ( ... ) __riscv_vloxseg4ei16_v_u64m2_tumu(__VA_ARGS__)

◆ vloxseg4ei16_v_u8m1

#define vloxseg4ei16_v_u8m1 ( ... ) __riscv_vloxseg4ei16_v_u8m1(__VA_ARGS__)

◆ vloxseg4ei16_v_u8m1_m

#define vloxseg4ei16_v_u8m1_m ( ... ) __riscv_vloxseg4ei16_v_u8m1_tumu(__VA_ARGS__)

◆ vloxseg4ei16_v_u8m2

#define vloxseg4ei16_v_u8m2 ( ... ) __riscv_vloxseg4ei16_v_u8m2(__VA_ARGS__)

◆ vloxseg4ei16_v_u8m2_m

#define vloxseg4ei16_v_u8m2_m ( ... ) __riscv_vloxseg4ei16_v_u8m2_tumu(__VA_ARGS__)

◆ vloxseg4ei16_v_u8mf2

#define vloxseg4ei16_v_u8mf2 ( ... ) __riscv_vloxseg4ei16_v_u8mf2(__VA_ARGS__)

◆ vloxseg4ei16_v_u8mf2_m

#define vloxseg4ei16_v_u8mf2_m ( ... ) __riscv_vloxseg4ei16_v_u8mf2_tumu(__VA_ARGS__)

◆ vloxseg4ei16_v_u8mf4

#define vloxseg4ei16_v_u8mf4 ( ... ) __riscv_vloxseg4ei16_v_u8mf4(__VA_ARGS__)

◆ vloxseg4ei16_v_u8mf4_m

#define vloxseg4ei16_v_u8mf4_m ( ... ) __riscv_vloxseg4ei16_v_u8mf4_tumu(__VA_ARGS__)

◆ vloxseg4ei16_v_u8mf8

#define vloxseg4ei16_v_u8mf8 ( ... ) __riscv_vloxseg4ei16_v_u8mf8(__VA_ARGS__)

◆ vloxseg4ei16_v_u8mf8_m

#define vloxseg4ei16_v_u8mf8_m ( ... ) __riscv_vloxseg4ei16_v_u8mf8_tumu(__VA_ARGS__)

◆ vloxseg4ei32_v_f16m1

#define vloxseg4ei32_v_f16m1 ( ... ) __riscv_vloxseg4ei32_v_f16m1(__VA_ARGS__)

◆ vloxseg4ei32_v_f16m1_m

#define vloxseg4ei32_v_f16m1_m ( ... ) __riscv_vloxseg4ei32_v_f16m1_tumu(__VA_ARGS__)

◆ vloxseg4ei32_v_f16m2

#define vloxseg4ei32_v_f16m2 ( ... ) __riscv_vloxseg4ei32_v_f16m2(__VA_ARGS__)

◆ vloxseg4ei32_v_f16m2_m

#define vloxseg4ei32_v_f16m2_m ( ... ) __riscv_vloxseg4ei32_v_f16m2_tumu(__VA_ARGS__)

◆ vloxseg4ei32_v_f16mf2

#define vloxseg4ei32_v_f16mf2 ( ... ) __riscv_vloxseg4ei32_v_f16mf2(__VA_ARGS__)

◆ vloxseg4ei32_v_f16mf2_m

#define vloxseg4ei32_v_f16mf2_m ( ... ) __riscv_vloxseg4ei32_v_f16mf2_tumu(__VA_ARGS__)

◆ vloxseg4ei32_v_f16mf4

#define vloxseg4ei32_v_f16mf4 ( ... ) __riscv_vloxseg4ei32_v_f16mf4(__VA_ARGS__)

◆ vloxseg4ei32_v_f16mf4_m

#define vloxseg4ei32_v_f16mf4_m ( ... ) __riscv_vloxseg4ei32_v_f16mf4_tumu(__VA_ARGS__)

◆ vloxseg4ei32_v_f32m1

#define vloxseg4ei32_v_f32m1 ( ... ) __riscv_vloxseg4ei32_v_f32m1(__VA_ARGS__)

◆ vloxseg4ei32_v_f32m1_m

#define vloxseg4ei32_v_f32m1_m ( ... ) __riscv_vloxseg4ei32_v_f32m1_tumu(__VA_ARGS__)

◆ vloxseg4ei32_v_f32m2

#define vloxseg4ei32_v_f32m2 ( ... ) __riscv_vloxseg4ei32_v_f32m2(__VA_ARGS__)

◆ vloxseg4ei32_v_f32m2_m

#define vloxseg4ei32_v_f32m2_m ( ... ) __riscv_vloxseg4ei32_v_f32m2_tumu(__VA_ARGS__)

◆ vloxseg4ei32_v_f32mf2

#define vloxseg4ei32_v_f32mf2 ( ... ) __riscv_vloxseg4ei32_v_f32mf2(__VA_ARGS__)

◆ vloxseg4ei32_v_f32mf2_m

#define vloxseg4ei32_v_f32mf2_m ( ... ) __riscv_vloxseg4ei32_v_f32mf2_tumu(__VA_ARGS__)

◆ vloxseg4ei32_v_f64m1

#define vloxseg4ei32_v_f64m1 ( ... ) __riscv_vloxseg4ei32_v_f64m1(__VA_ARGS__)

◆ vloxseg4ei32_v_f64m1_m

#define vloxseg4ei32_v_f64m1_m ( ... ) __riscv_vloxseg4ei32_v_f64m1_tumu(__VA_ARGS__)

◆ vloxseg4ei32_v_f64m2

#define vloxseg4ei32_v_f64m2 ( ... ) __riscv_vloxseg4ei32_v_f64m2(__VA_ARGS__)

◆ vloxseg4ei32_v_f64m2_m

#define vloxseg4ei32_v_f64m2_m ( ... ) __riscv_vloxseg4ei32_v_f64m2_tumu(__VA_ARGS__)

◆ vloxseg4ei32_v_i16m1

#define vloxseg4ei32_v_i16m1 ( ... ) __riscv_vloxseg4ei32_v_i16m1(__VA_ARGS__)

◆ vloxseg4ei32_v_i16m1_m

#define vloxseg4ei32_v_i16m1_m ( ... ) __riscv_vloxseg4ei32_v_i16m1_tumu(__VA_ARGS__)

◆ vloxseg4ei32_v_i16m2

#define vloxseg4ei32_v_i16m2 ( ... ) __riscv_vloxseg4ei32_v_i16m2(__VA_ARGS__)

◆ vloxseg4ei32_v_i16m2_m

#define vloxseg4ei32_v_i16m2_m ( ... ) __riscv_vloxseg4ei32_v_i16m2_tumu(__VA_ARGS__)

◆ vloxseg4ei32_v_i16mf2

#define vloxseg4ei32_v_i16mf2 ( ... ) __riscv_vloxseg4ei32_v_i16mf2(__VA_ARGS__)

◆ vloxseg4ei32_v_i16mf2_m

#define vloxseg4ei32_v_i16mf2_m ( ... ) __riscv_vloxseg4ei32_v_i16mf2_tumu(__VA_ARGS__)

◆ vloxseg4ei32_v_i16mf4

#define vloxseg4ei32_v_i16mf4 ( ... ) __riscv_vloxseg4ei32_v_i16mf4(__VA_ARGS__)

◆ vloxseg4ei32_v_i16mf4_m

#define vloxseg4ei32_v_i16mf4_m ( ... ) __riscv_vloxseg4ei32_v_i16mf4_tumu(__VA_ARGS__)

◆ vloxseg4ei32_v_i32m1

#define vloxseg4ei32_v_i32m1 ( ... ) __riscv_vloxseg4ei32_v_i32m1(__VA_ARGS__)

◆ vloxseg4ei32_v_i32m1_m

#define vloxseg4ei32_v_i32m1_m ( ... ) __riscv_vloxseg4ei32_v_i32m1_tumu(__VA_ARGS__)

◆ vloxseg4ei32_v_i32m2

#define vloxseg4ei32_v_i32m2 ( ... ) __riscv_vloxseg4ei32_v_i32m2(__VA_ARGS__)

◆ vloxseg4ei32_v_i32m2_m

#define vloxseg4ei32_v_i32m2_m ( ... ) __riscv_vloxseg4ei32_v_i32m2_tumu(__VA_ARGS__)

◆ vloxseg4ei32_v_i32mf2

#define vloxseg4ei32_v_i32mf2 ( ... ) __riscv_vloxseg4ei32_v_i32mf2(__VA_ARGS__)

◆ vloxseg4ei32_v_i32mf2_m

#define vloxseg4ei32_v_i32mf2_m ( ... ) __riscv_vloxseg4ei32_v_i32mf2_tumu(__VA_ARGS__)

◆ vloxseg4ei32_v_i64m1

#define vloxseg4ei32_v_i64m1 ( ... ) __riscv_vloxseg4ei32_v_i64m1(__VA_ARGS__)

◆ vloxseg4ei32_v_i64m1_m

#define vloxseg4ei32_v_i64m1_m ( ... ) __riscv_vloxseg4ei32_v_i64m1_tumu(__VA_ARGS__)

◆ vloxseg4ei32_v_i64m2

#define vloxseg4ei32_v_i64m2 ( ... ) __riscv_vloxseg4ei32_v_i64m2(__VA_ARGS__)

◆ vloxseg4ei32_v_i64m2_m

#define vloxseg4ei32_v_i64m2_m ( ... ) __riscv_vloxseg4ei32_v_i64m2_tumu(__VA_ARGS__)

◆ vloxseg4ei32_v_i8m1

#define vloxseg4ei32_v_i8m1 ( ... ) __riscv_vloxseg4ei32_v_i8m1(__VA_ARGS__)

◆ vloxseg4ei32_v_i8m1_m

#define vloxseg4ei32_v_i8m1_m ( ... ) __riscv_vloxseg4ei32_v_i8m1_tumu(__VA_ARGS__)

◆ vloxseg4ei32_v_i8m2

#define vloxseg4ei32_v_i8m2 ( ... ) __riscv_vloxseg4ei32_v_i8m2(__VA_ARGS__)

◆ vloxseg4ei32_v_i8m2_m

#define vloxseg4ei32_v_i8m2_m ( ... ) __riscv_vloxseg4ei32_v_i8m2_tumu(__VA_ARGS__)

◆ vloxseg4ei32_v_i8mf2

#define vloxseg4ei32_v_i8mf2 ( ... ) __riscv_vloxseg4ei32_v_i8mf2(__VA_ARGS__)

◆ vloxseg4ei32_v_i8mf2_m

#define vloxseg4ei32_v_i8mf2_m ( ... ) __riscv_vloxseg4ei32_v_i8mf2_tumu(__VA_ARGS__)

◆ vloxseg4ei32_v_i8mf4

#define vloxseg4ei32_v_i8mf4 ( ... ) __riscv_vloxseg4ei32_v_i8mf4(__VA_ARGS__)

◆ vloxseg4ei32_v_i8mf4_m

#define vloxseg4ei32_v_i8mf4_m ( ... ) __riscv_vloxseg4ei32_v_i8mf4_tumu(__VA_ARGS__)

◆ vloxseg4ei32_v_i8mf8

#define vloxseg4ei32_v_i8mf8 ( ... ) __riscv_vloxseg4ei32_v_i8mf8(__VA_ARGS__)

◆ vloxseg4ei32_v_i8mf8_m

#define vloxseg4ei32_v_i8mf8_m ( ... ) __riscv_vloxseg4ei32_v_i8mf8_tumu(__VA_ARGS__)

◆ vloxseg4ei32_v_u16m1

#define vloxseg4ei32_v_u16m1 ( ... ) __riscv_vloxseg4ei32_v_u16m1(__VA_ARGS__)

◆ vloxseg4ei32_v_u16m1_m

#define vloxseg4ei32_v_u16m1_m ( ... ) __riscv_vloxseg4ei32_v_u16m1_tumu(__VA_ARGS__)

◆ vloxseg4ei32_v_u16m2

#define vloxseg4ei32_v_u16m2 ( ... ) __riscv_vloxseg4ei32_v_u16m2(__VA_ARGS__)

◆ vloxseg4ei32_v_u16m2_m

#define vloxseg4ei32_v_u16m2_m ( ... ) __riscv_vloxseg4ei32_v_u16m2_tumu(__VA_ARGS__)

◆ vloxseg4ei32_v_u16mf2

#define vloxseg4ei32_v_u16mf2 ( ... ) __riscv_vloxseg4ei32_v_u16mf2(__VA_ARGS__)

◆ vloxseg4ei32_v_u16mf2_m

#define vloxseg4ei32_v_u16mf2_m ( ... ) __riscv_vloxseg4ei32_v_u16mf2_tumu(__VA_ARGS__)

◆ vloxseg4ei32_v_u16mf4

#define vloxseg4ei32_v_u16mf4 ( ... ) __riscv_vloxseg4ei32_v_u16mf4(__VA_ARGS__)

◆ vloxseg4ei32_v_u16mf4_m

#define vloxseg4ei32_v_u16mf4_m ( ... ) __riscv_vloxseg4ei32_v_u16mf4_tumu(__VA_ARGS__)

◆ vloxseg4ei32_v_u32m1

#define vloxseg4ei32_v_u32m1 ( ... ) __riscv_vloxseg4ei32_v_u32m1(__VA_ARGS__)

◆ vloxseg4ei32_v_u32m1_m

#define vloxseg4ei32_v_u32m1_m ( ... ) __riscv_vloxseg4ei32_v_u32m1_tumu(__VA_ARGS__)

◆ vloxseg4ei32_v_u32m2

#define vloxseg4ei32_v_u32m2 ( ... ) __riscv_vloxseg4ei32_v_u32m2(__VA_ARGS__)

◆ vloxseg4ei32_v_u32m2_m

#define vloxseg4ei32_v_u32m2_m ( ... ) __riscv_vloxseg4ei32_v_u32m2_tumu(__VA_ARGS__)

◆ vloxseg4ei32_v_u32mf2

#define vloxseg4ei32_v_u32mf2 ( ... ) __riscv_vloxseg4ei32_v_u32mf2(__VA_ARGS__)

◆ vloxseg4ei32_v_u32mf2_m

#define vloxseg4ei32_v_u32mf2_m ( ... ) __riscv_vloxseg4ei32_v_u32mf2_tumu(__VA_ARGS__)

◆ vloxseg4ei32_v_u64m1

#define vloxseg4ei32_v_u64m1 ( ... ) __riscv_vloxseg4ei32_v_u64m1(__VA_ARGS__)

◆ vloxseg4ei32_v_u64m1_m

#define vloxseg4ei32_v_u64m1_m ( ... ) __riscv_vloxseg4ei32_v_u64m1_tumu(__VA_ARGS__)

◆ vloxseg4ei32_v_u64m2

#define vloxseg4ei32_v_u64m2 ( ... ) __riscv_vloxseg4ei32_v_u64m2(__VA_ARGS__)

◆ vloxseg4ei32_v_u64m2_m

#define vloxseg4ei32_v_u64m2_m ( ... ) __riscv_vloxseg4ei32_v_u64m2_tumu(__VA_ARGS__)

◆ vloxseg4ei32_v_u8m1

#define vloxseg4ei32_v_u8m1 ( ... ) __riscv_vloxseg4ei32_v_u8m1(__VA_ARGS__)

◆ vloxseg4ei32_v_u8m1_m

#define vloxseg4ei32_v_u8m1_m ( ... ) __riscv_vloxseg4ei32_v_u8m1_tumu(__VA_ARGS__)

◆ vloxseg4ei32_v_u8m2

#define vloxseg4ei32_v_u8m2 ( ... ) __riscv_vloxseg4ei32_v_u8m2(__VA_ARGS__)

◆ vloxseg4ei32_v_u8m2_m

#define vloxseg4ei32_v_u8m2_m ( ... ) __riscv_vloxseg4ei32_v_u8m2_tumu(__VA_ARGS__)

◆ vloxseg4ei32_v_u8mf2

#define vloxseg4ei32_v_u8mf2 ( ... ) __riscv_vloxseg4ei32_v_u8mf2(__VA_ARGS__)

◆ vloxseg4ei32_v_u8mf2_m

#define vloxseg4ei32_v_u8mf2_m ( ... ) __riscv_vloxseg4ei32_v_u8mf2_tumu(__VA_ARGS__)

◆ vloxseg4ei32_v_u8mf4

#define vloxseg4ei32_v_u8mf4 ( ... ) __riscv_vloxseg4ei32_v_u8mf4(__VA_ARGS__)

◆ vloxseg4ei32_v_u8mf4_m

#define vloxseg4ei32_v_u8mf4_m ( ... ) __riscv_vloxseg4ei32_v_u8mf4_tumu(__VA_ARGS__)

◆ vloxseg4ei32_v_u8mf8

#define vloxseg4ei32_v_u8mf8 ( ... ) __riscv_vloxseg4ei32_v_u8mf8(__VA_ARGS__)

◆ vloxseg4ei32_v_u8mf8_m

#define vloxseg4ei32_v_u8mf8_m ( ... ) __riscv_vloxseg4ei32_v_u8mf8_tumu(__VA_ARGS__)

◆ vloxseg4ei64_v_f16m1

#define vloxseg4ei64_v_f16m1 ( ... ) __riscv_vloxseg4ei64_v_f16m1(__VA_ARGS__)

◆ vloxseg4ei64_v_f16m1_m

#define vloxseg4ei64_v_f16m1_m ( ... ) __riscv_vloxseg4ei64_v_f16m1_tumu(__VA_ARGS__)

◆ vloxseg4ei64_v_f16m2

#define vloxseg4ei64_v_f16m2 ( ... ) __riscv_vloxseg4ei64_v_f16m2(__VA_ARGS__)

◆ vloxseg4ei64_v_f16m2_m

#define vloxseg4ei64_v_f16m2_m ( ... ) __riscv_vloxseg4ei64_v_f16m2_tumu(__VA_ARGS__)

◆ vloxseg4ei64_v_f16mf2

#define vloxseg4ei64_v_f16mf2 ( ... ) __riscv_vloxseg4ei64_v_f16mf2(__VA_ARGS__)

◆ vloxseg4ei64_v_f16mf2_m

#define vloxseg4ei64_v_f16mf2_m ( ... ) __riscv_vloxseg4ei64_v_f16mf2_tumu(__VA_ARGS__)

◆ vloxseg4ei64_v_f16mf4

#define vloxseg4ei64_v_f16mf4 ( ... ) __riscv_vloxseg4ei64_v_f16mf4(__VA_ARGS__)

◆ vloxseg4ei64_v_f16mf4_m

#define vloxseg4ei64_v_f16mf4_m ( ... ) __riscv_vloxseg4ei64_v_f16mf4_tumu(__VA_ARGS__)

◆ vloxseg4ei64_v_f32m1

#define vloxseg4ei64_v_f32m1 ( ... ) __riscv_vloxseg4ei64_v_f32m1(__VA_ARGS__)

◆ vloxseg4ei64_v_f32m1_m

#define vloxseg4ei64_v_f32m1_m ( ... ) __riscv_vloxseg4ei64_v_f32m1_tumu(__VA_ARGS__)

◆ vloxseg4ei64_v_f32m2

#define vloxseg4ei64_v_f32m2 ( ... ) __riscv_vloxseg4ei64_v_f32m2(__VA_ARGS__)

◆ vloxseg4ei64_v_f32m2_m

#define vloxseg4ei64_v_f32m2_m ( ... ) __riscv_vloxseg4ei64_v_f32m2_tumu(__VA_ARGS__)

◆ vloxseg4ei64_v_f32mf2

#define vloxseg4ei64_v_f32mf2 ( ... ) __riscv_vloxseg4ei64_v_f32mf2(__VA_ARGS__)

◆ vloxseg4ei64_v_f32mf2_m

#define vloxseg4ei64_v_f32mf2_m ( ... ) __riscv_vloxseg4ei64_v_f32mf2_tumu(__VA_ARGS__)

◆ vloxseg4ei64_v_f64m1

#define vloxseg4ei64_v_f64m1 ( ... ) __riscv_vloxseg4ei64_v_f64m1(__VA_ARGS__)

◆ vloxseg4ei64_v_f64m1_m

#define vloxseg4ei64_v_f64m1_m ( ... ) __riscv_vloxseg4ei64_v_f64m1_tumu(__VA_ARGS__)

◆ vloxseg4ei64_v_f64m2

#define vloxseg4ei64_v_f64m2 ( ... ) __riscv_vloxseg4ei64_v_f64m2(__VA_ARGS__)

◆ vloxseg4ei64_v_f64m2_m

#define vloxseg4ei64_v_f64m2_m ( ... ) __riscv_vloxseg4ei64_v_f64m2_tumu(__VA_ARGS__)

◆ vloxseg4ei64_v_i16m1

#define vloxseg4ei64_v_i16m1 ( ... ) __riscv_vloxseg4ei64_v_i16m1(__VA_ARGS__)

◆ vloxseg4ei64_v_i16m1_m

#define vloxseg4ei64_v_i16m1_m ( ... ) __riscv_vloxseg4ei64_v_i16m1_tumu(__VA_ARGS__)

◆ vloxseg4ei64_v_i16m2

#define vloxseg4ei64_v_i16m2 ( ... ) __riscv_vloxseg4ei64_v_i16m2(__VA_ARGS__)

◆ vloxseg4ei64_v_i16m2_m

#define vloxseg4ei64_v_i16m2_m ( ... ) __riscv_vloxseg4ei64_v_i16m2_tumu(__VA_ARGS__)

◆ vloxseg4ei64_v_i16mf2

#define vloxseg4ei64_v_i16mf2 ( ... ) __riscv_vloxseg4ei64_v_i16mf2(__VA_ARGS__)

◆ vloxseg4ei64_v_i16mf2_m

#define vloxseg4ei64_v_i16mf2_m ( ... ) __riscv_vloxseg4ei64_v_i16mf2_tumu(__VA_ARGS__)

◆ vloxseg4ei64_v_i16mf4

#define vloxseg4ei64_v_i16mf4 ( ... ) __riscv_vloxseg4ei64_v_i16mf4(__VA_ARGS__)

◆ vloxseg4ei64_v_i16mf4_m

#define vloxseg4ei64_v_i16mf4_m ( ... ) __riscv_vloxseg4ei64_v_i16mf4_tumu(__VA_ARGS__)

◆ vloxseg4ei64_v_i32m1

#define vloxseg4ei64_v_i32m1 ( ... ) __riscv_vloxseg4ei64_v_i32m1(__VA_ARGS__)

◆ vloxseg4ei64_v_i32m1_m

#define vloxseg4ei64_v_i32m1_m ( ... ) __riscv_vloxseg4ei64_v_i32m1_tumu(__VA_ARGS__)

◆ vloxseg4ei64_v_i32m2

#define vloxseg4ei64_v_i32m2 ( ... ) __riscv_vloxseg4ei64_v_i32m2(__VA_ARGS__)

◆ vloxseg4ei64_v_i32m2_m

#define vloxseg4ei64_v_i32m2_m ( ... ) __riscv_vloxseg4ei64_v_i32m2_tumu(__VA_ARGS__)

◆ vloxseg4ei64_v_i32mf2

#define vloxseg4ei64_v_i32mf2 ( ... ) __riscv_vloxseg4ei64_v_i32mf2(__VA_ARGS__)

◆ vloxseg4ei64_v_i32mf2_m

#define vloxseg4ei64_v_i32mf2_m ( ... ) __riscv_vloxseg4ei64_v_i32mf2_tumu(__VA_ARGS__)

◆ vloxseg4ei64_v_i64m1

#define vloxseg4ei64_v_i64m1 ( ... ) __riscv_vloxseg4ei64_v_i64m1(__VA_ARGS__)

◆ vloxseg4ei64_v_i64m1_m

#define vloxseg4ei64_v_i64m1_m ( ... ) __riscv_vloxseg4ei64_v_i64m1_tumu(__VA_ARGS__)

◆ vloxseg4ei64_v_i64m2

#define vloxseg4ei64_v_i64m2 ( ... ) __riscv_vloxseg4ei64_v_i64m2(__VA_ARGS__)

◆ vloxseg4ei64_v_i64m2_m

#define vloxseg4ei64_v_i64m2_m ( ... ) __riscv_vloxseg4ei64_v_i64m2_tumu(__VA_ARGS__)

◆ vloxseg4ei64_v_i8m1

#define vloxseg4ei64_v_i8m1 ( ... ) __riscv_vloxseg4ei64_v_i8m1(__VA_ARGS__)

◆ vloxseg4ei64_v_i8m1_m

#define vloxseg4ei64_v_i8m1_m ( ... ) __riscv_vloxseg4ei64_v_i8m1_tumu(__VA_ARGS__)

◆ vloxseg4ei64_v_i8mf2

#define vloxseg4ei64_v_i8mf2 ( ... ) __riscv_vloxseg4ei64_v_i8mf2(__VA_ARGS__)

◆ vloxseg4ei64_v_i8mf2_m

#define vloxseg4ei64_v_i8mf2_m ( ... ) __riscv_vloxseg4ei64_v_i8mf2_tumu(__VA_ARGS__)

◆ vloxseg4ei64_v_i8mf4

#define vloxseg4ei64_v_i8mf4 ( ... ) __riscv_vloxseg4ei64_v_i8mf4(__VA_ARGS__)

◆ vloxseg4ei64_v_i8mf4_m

#define vloxseg4ei64_v_i8mf4_m ( ... ) __riscv_vloxseg4ei64_v_i8mf4_tumu(__VA_ARGS__)

◆ vloxseg4ei64_v_i8mf8

#define vloxseg4ei64_v_i8mf8 ( ... ) __riscv_vloxseg4ei64_v_i8mf8(__VA_ARGS__)

◆ vloxseg4ei64_v_i8mf8_m

#define vloxseg4ei64_v_i8mf8_m ( ... ) __riscv_vloxseg4ei64_v_i8mf8_tumu(__VA_ARGS__)

◆ vloxseg4ei64_v_u16m1

#define vloxseg4ei64_v_u16m1 ( ... ) __riscv_vloxseg4ei64_v_u16m1(__VA_ARGS__)

◆ vloxseg4ei64_v_u16m1_m

#define vloxseg4ei64_v_u16m1_m ( ... ) __riscv_vloxseg4ei64_v_u16m1_tumu(__VA_ARGS__)

◆ vloxseg4ei64_v_u16m2

#define vloxseg4ei64_v_u16m2 ( ... ) __riscv_vloxseg4ei64_v_u16m2(__VA_ARGS__)

◆ vloxseg4ei64_v_u16m2_m

#define vloxseg4ei64_v_u16m2_m ( ... ) __riscv_vloxseg4ei64_v_u16m2_tumu(__VA_ARGS__)

◆ vloxseg4ei64_v_u16mf2

#define vloxseg4ei64_v_u16mf2 ( ... ) __riscv_vloxseg4ei64_v_u16mf2(__VA_ARGS__)

◆ vloxseg4ei64_v_u16mf2_m

#define vloxseg4ei64_v_u16mf2_m ( ... ) __riscv_vloxseg4ei64_v_u16mf2_tumu(__VA_ARGS__)

◆ vloxseg4ei64_v_u16mf4

#define vloxseg4ei64_v_u16mf4 ( ... ) __riscv_vloxseg4ei64_v_u16mf4(__VA_ARGS__)

◆ vloxseg4ei64_v_u16mf4_m

#define vloxseg4ei64_v_u16mf4_m ( ... ) __riscv_vloxseg4ei64_v_u16mf4_tumu(__VA_ARGS__)

◆ vloxseg4ei64_v_u32m1

#define vloxseg4ei64_v_u32m1 ( ... ) __riscv_vloxseg4ei64_v_u32m1(__VA_ARGS__)

◆ vloxseg4ei64_v_u32m1_m

#define vloxseg4ei64_v_u32m1_m ( ... ) __riscv_vloxseg4ei64_v_u32m1_tumu(__VA_ARGS__)

◆ vloxseg4ei64_v_u32m2

#define vloxseg4ei64_v_u32m2 ( ... ) __riscv_vloxseg4ei64_v_u32m2(__VA_ARGS__)

◆ vloxseg4ei64_v_u32m2_m

#define vloxseg4ei64_v_u32m2_m ( ... ) __riscv_vloxseg4ei64_v_u32m2_tumu(__VA_ARGS__)

◆ vloxseg4ei64_v_u32mf2

#define vloxseg4ei64_v_u32mf2 ( ... ) __riscv_vloxseg4ei64_v_u32mf2(__VA_ARGS__)

◆ vloxseg4ei64_v_u32mf2_m

#define vloxseg4ei64_v_u32mf2_m ( ... ) __riscv_vloxseg4ei64_v_u32mf2_tumu(__VA_ARGS__)

◆ vloxseg4ei64_v_u64m1

#define vloxseg4ei64_v_u64m1 ( ... ) __riscv_vloxseg4ei64_v_u64m1(__VA_ARGS__)

◆ vloxseg4ei64_v_u64m1_m

#define vloxseg4ei64_v_u64m1_m ( ... ) __riscv_vloxseg4ei64_v_u64m1_tumu(__VA_ARGS__)

◆ vloxseg4ei64_v_u64m2

#define vloxseg4ei64_v_u64m2 ( ... ) __riscv_vloxseg4ei64_v_u64m2(__VA_ARGS__)

◆ vloxseg4ei64_v_u64m2_m

#define vloxseg4ei64_v_u64m2_m ( ... ) __riscv_vloxseg4ei64_v_u64m2_tumu(__VA_ARGS__)

◆ vloxseg4ei64_v_u8m1

#define vloxseg4ei64_v_u8m1 ( ... ) __riscv_vloxseg4ei64_v_u8m1(__VA_ARGS__)

◆ vloxseg4ei64_v_u8m1_m

#define vloxseg4ei64_v_u8m1_m ( ... ) __riscv_vloxseg4ei64_v_u8m1_tumu(__VA_ARGS__)

◆ vloxseg4ei64_v_u8mf2

#define vloxseg4ei64_v_u8mf2 ( ... ) __riscv_vloxseg4ei64_v_u8mf2(__VA_ARGS__)

◆ vloxseg4ei64_v_u8mf2_m

#define vloxseg4ei64_v_u8mf2_m ( ... ) __riscv_vloxseg4ei64_v_u8mf2_tumu(__VA_ARGS__)

◆ vloxseg4ei64_v_u8mf4

#define vloxseg4ei64_v_u8mf4 ( ... ) __riscv_vloxseg4ei64_v_u8mf4(__VA_ARGS__)

◆ vloxseg4ei64_v_u8mf4_m

#define vloxseg4ei64_v_u8mf4_m ( ... ) __riscv_vloxseg4ei64_v_u8mf4_tumu(__VA_ARGS__)

◆ vloxseg4ei64_v_u8mf8

#define vloxseg4ei64_v_u8mf8 ( ... ) __riscv_vloxseg4ei64_v_u8mf8(__VA_ARGS__)

◆ vloxseg4ei64_v_u8mf8_m

#define vloxseg4ei64_v_u8mf8_m ( ... ) __riscv_vloxseg4ei64_v_u8mf8_tumu(__VA_ARGS__)

◆ vloxseg4ei8_v_f16m1

#define vloxseg4ei8_v_f16m1 ( ... ) __riscv_vloxseg4ei8_v_f16m1(__VA_ARGS__)

◆ vloxseg4ei8_v_f16m1_m

#define vloxseg4ei8_v_f16m1_m ( ... ) __riscv_vloxseg4ei8_v_f16m1_tumu(__VA_ARGS__)

◆ vloxseg4ei8_v_f16m2

#define vloxseg4ei8_v_f16m2 ( ... ) __riscv_vloxseg4ei8_v_f16m2(__VA_ARGS__)

◆ vloxseg4ei8_v_f16m2_m

#define vloxseg4ei8_v_f16m2_m ( ... ) __riscv_vloxseg4ei8_v_f16m2_tumu(__VA_ARGS__)

◆ vloxseg4ei8_v_f16mf2

#define vloxseg4ei8_v_f16mf2 ( ... ) __riscv_vloxseg4ei8_v_f16mf2(__VA_ARGS__)

◆ vloxseg4ei8_v_f16mf2_m

#define vloxseg4ei8_v_f16mf2_m ( ... ) __riscv_vloxseg4ei8_v_f16mf2_tumu(__VA_ARGS__)

◆ vloxseg4ei8_v_f16mf4

#define vloxseg4ei8_v_f16mf4 ( ... ) __riscv_vloxseg4ei8_v_f16mf4(__VA_ARGS__)

◆ vloxseg4ei8_v_f16mf4_m

#define vloxseg4ei8_v_f16mf4_m ( ... ) __riscv_vloxseg4ei8_v_f16mf4_tumu(__VA_ARGS__)

◆ vloxseg4ei8_v_f32m1

#define vloxseg4ei8_v_f32m1 ( ... ) __riscv_vloxseg4ei8_v_f32m1(__VA_ARGS__)

◆ vloxseg4ei8_v_f32m1_m

#define vloxseg4ei8_v_f32m1_m ( ... ) __riscv_vloxseg4ei8_v_f32m1_tumu(__VA_ARGS__)

◆ vloxseg4ei8_v_f32m2

#define vloxseg4ei8_v_f32m2 ( ... ) __riscv_vloxseg4ei8_v_f32m2(__VA_ARGS__)

◆ vloxseg4ei8_v_f32m2_m

#define vloxseg4ei8_v_f32m2_m ( ... ) __riscv_vloxseg4ei8_v_f32m2_tumu(__VA_ARGS__)

◆ vloxseg4ei8_v_f32mf2

#define vloxseg4ei8_v_f32mf2 ( ... ) __riscv_vloxseg4ei8_v_f32mf2(__VA_ARGS__)

◆ vloxseg4ei8_v_f32mf2_m

#define vloxseg4ei8_v_f32mf2_m ( ... ) __riscv_vloxseg4ei8_v_f32mf2_tumu(__VA_ARGS__)

◆ vloxseg4ei8_v_f64m1

#define vloxseg4ei8_v_f64m1 ( ... ) __riscv_vloxseg4ei8_v_f64m1(__VA_ARGS__)

◆ vloxseg4ei8_v_f64m1_m

#define vloxseg4ei8_v_f64m1_m ( ... ) __riscv_vloxseg4ei8_v_f64m1_tumu(__VA_ARGS__)

◆ vloxseg4ei8_v_f64m2

#define vloxseg4ei8_v_f64m2 ( ... ) __riscv_vloxseg4ei8_v_f64m2(__VA_ARGS__)

◆ vloxseg4ei8_v_f64m2_m

#define vloxseg4ei8_v_f64m2_m ( ... ) __riscv_vloxseg4ei8_v_f64m2_tumu(__VA_ARGS__)

◆ vloxseg4ei8_v_i16m1

#define vloxseg4ei8_v_i16m1 ( ... ) __riscv_vloxseg4ei8_v_i16m1(__VA_ARGS__)

◆ vloxseg4ei8_v_i16m1_m

#define vloxseg4ei8_v_i16m1_m ( ... ) __riscv_vloxseg4ei8_v_i16m1_tumu(__VA_ARGS__)

◆ vloxseg4ei8_v_i16m2

#define vloxseg4ei8_v_i16m2 ( ... ) __riscv_vloxseg4ei8_v_i16m2(__VA_ARGS__)

◆ vloxseg4ei8_v_i16m2_m

#define vloxseg4ei8_v_i16m2_m ( ... ) __riscv_vloxseg4ei8_v_i16m2_tumu(__VA_ARGS__)

◆ vloxseg4ei8_v_i16mf2

#define vloxseg4ei8_v_i16mf2 ( ... ) __riscv_vloxseg4ei8_v_i16mf2(__VA_ARGS__)

◆ vloxseg4ei8_v_i16mf2_m

#define vloxseg4ei8_v_i16mf2_m ( ... ) __riscv_vloxseg4ei8_v_i16mf2_tumu(__VA_ARGS__)

◆ vloxseg4ei8_v_i16mf4

#define vloxseg4ei8_v_i16mf4 ( ... ) __riscv_vloxseg4ei8_v_i16mf4(__VA_ARGS__)

◆ vloxseg4ei8_v_i16mf4_m

#define vloxseg4ei8_v_i16mf4_m ( ... ) __riscv_vloxseg4ei8_v_i16mf4_tumu(__VA_ARGS__)

◆ vloxseg4ei8_v_i32m1

#define vloxseg4ei8_v_i32m1 ( ... ) __riscv_vloxseg4ei8_v_i32m1(__VA_ARGS__)

◆ vloxseg4ei8_v_i32m1_m

#define vloxseg4ei8_v_i32m1_m ( ... ) __riscv_vloxseg4ei8_v_i32m1_tumu(__VA_ARGS__)

◆ vloxseg4ei8_v_i32m2

#define vloxseg4ei8_v_i32m2 ( ... ) __riscv_vloxseg4ei8_v_i32m2(__VA_ARGS__)

◆ vloxseg4ei8_v_i32m2_m

#define vloxseg4ei8_v_i32m2_m ( ... ) __riscv_vloxseg4ei8_v_i32m2_tumu(__VA_ARGS__)

◆ vloxseg4ei8_v_i32mf2

#define vloxseg4ei8_v_i32mf2 ( ... ) __riscv_vloxseg4ei8_v_i32mf2(__VA_ARGS__)

◆ vloxseg4ei8_v_i32mf2_m

#define vloxseg4ei8_v_i32mf2_m ( ... ) __riscv_vloxseg4ei8_v_i32mf2_tumu(__VA_ARGS__)

◆ vloxseg4ei8_v_i64m1

#define vloxseg4ei8_v_i64m1 ( ... ) __riscv_vloxseg4ei8_v_i64m1(__VA_ARGS__)

◆ vloxseg4ei8_v_i64m1_m

#define vloxseg4ei8_v_i64m1_m ( ... ) __riscv_vloxseg4ei8_v_i64m1_tumu(__VA_ARGS__)

◆ vloxseg4ei8_v_i64m2

#define vloxseg4ei8_v_i64m2 ( ... ) __riscv_vloxseg4ei8_v_i64m2(__VA_ARGS__)

◆ vloxseg4ei8_v_i64m2_m

#define vloxseg4ei8_v_i64m2_m ( ... ) __riscv_vloxseg4ei8_v_i64m2_tumu(__VA_ARGS__)

◆ vloxseg4ei8_v_i8m1

#define vloxseg4ei8_v_i8m1 ( ... ) __riscv_vloxseg4ei8_v_i8m1(__VA_ARGS__)

◆ vloxseg4ei8_v_i8m1_m

#define vloxseg4ei8_v_i8m1_m ( ... ) __riscv_vloxseg4ei8_v_i8m1_tumu(__VA_ARGS__)

◆ vloxseg4ei8_v_i8m2

#define vloxseg4ei8_v_i8m2 ( ... ) __riscv_vloxseg4ei8_v_i8m2(__VA_ARGS__)

◆ vloxseg4ei8_v_i8m2_m

#define vloxseg4ei8_v_i8m2_m ( ... ) __riscv_vloxseg4ei8_v_i8m2_tumu(__VA_ARGS__)

◆ vloxseg4ei8_v_i8mf2

#define vloxseg4ei8_v_i8mf2 ( ... ) __riscv_vloxseg4ei8_v_i8mf2(__VA_ARGS__)

◆ vloxseg4ei8_v_i8mf2_m

#define vloxseg4ei8_v_i8mf2_m ( ... ) __riscv_vloxseg4ei8_v_i8mf2_tumu(__VA_ARGS__)

◆ vloxseg4ei8_v_i8mf4

#define vloxseg4ei8_v_i8mf4 ( ... ) __riscv_vloxseg4ei8_v_i8mf4(__VA_ARGS__)

◆ vloxseg4ei8_v_i8mf4_m

#define vloxseg4ei8_v_i8mf4_m ( ... ) __riscv_vloxseg4ei8_v_i8mf4_tumu(__VA_ARGS__)

◆ vloxseg4ei8_v_i8mf8

#define vloxseg4ei8_v_i8mf8 ( ... ) __riscv_vloxseg4ei8_v_i8mf8(__VA_ARGS__)

◆ vloxseg4ei8_v_i8mf8_m

#define vloxseg4ei8_v_i8mf8_m ( ... ) __riscv_vloxseg4ei8_v_i8mf8_tumu(__VA_ARGS__)

◆ vloxseg4ei8_v_u16m1

#define vloxseg4ei8_v_u16m1 ( ... ) __riscv_vloxseg4ei8_v_u16m1(__VA_ARGS__)

◆ vloxseg4ei8_v_u16m1_m

#define vloxseg4ei8_v_u16m1_m ( ... ) __riscv_vloxseg4ei8_v_u16m1_tumu(__VA_ARGS__)

◆ vloxseg4ei8_v_u16m2

#define vloxseg4ei8_v_u16m2 ( ... ) __riscv_vloxseg4ei8_v_u16m2(__VA_ARGS__)

◆ vloxseg4ei8_v_u16m2_m

#define vloxseg4ei8_v_u16m2_m ( ... ) __riscv_vloxseg4ei8_v_u16m2_tumu(__VA_ARGS__)

◆ vloxseg4ei8_v_u16mf2

#define vloxseg4ei8_v_u16mf2 ( ... ) __riscv_vloxseg4ei8_v_u16mf2(__VA_ARGS__)

◆ vloxseg4ei8_v_u16mf2_m

#define vloxseg4ei8_v_u16mf2_m ( ... ) __riscv_vloxseg4ei8_v_u16mf2_tumu(__VA_ARGS__)

◆ vloxseg4ei8_v_u16mf4

#define vloxseg4ei8_v_u16mf4 ( ... ) __riscv_vloxseg4ei8_v_u16mf4(__VA_ARGS__)

◆ vloxseg4ei8_v_u16mf4_m

#define vloxseg4ei8_v_u16mf4_m ( ... ) __riscv_vloxseg4ei8_v_u16mf4_tumu(__VA_ARGS__)

◆ vloxseg4ei8_v_u32m1

#define vloxseg4ei8_v_u32m1 ( ... ) __riscv_vloxseg4ei8_v_u32m1(__VA_ARGS__)

◆ vloxseg4ei8_v_u32m1_m

#define vloxseg4ei8_v_u32m1_m ( ... ) __riscv_vloxseg4ei8_v_u32m1_tumu(__VA_ARGS__)

◆ vloxseg4ei8_v_u32m2

#define vloxseg4ei8_v_u32m2 ( ... ) __riscv_vloxseg4ei8_v_u32m2(__VA_ARGS__)

◆ vloxseg4ei8_v_u32m2_m

#define vloxseg4ei8_v_u32m2_m ( ... ) __riscv_vloxseg4ei8_v_u32m2_tumu(__VA_ARGS__)

◆ vloxseg4ei8_v_u32mf2

#define vloxseg4ei8_v_u32mf2 ( ... ) __riscv_vloxseg4ei8_v_u32mf2(__VA_ARGS__)

◆ vloxseg4ei8_v_u32mf2_m

#define vloxseg4ei8_v_u32mf2_m ( ... ) __riscv_vloxseg4ei8_v_u32mf2_tumu(__VA_ARGS__)

◆ vloxseg4ei8_v_u64m1

#define vloxseg4ei8_v_u64m1 ( ... ) __riscv_vloxseg4ei8_v_u64m1(__VA_ARGS__)

◆ vloxseg4ei8_v_u64m1_m

#define vloxseg4ei8_v_u64m1_m ( ... ) __riscv_vloxseg4ei8_v_u64m1_tumu(__VA_ARGS__)

◆ vloxseg4ei8_v_u64m2

#define vloxseg4ei8_v_u64m2 ( ... ) __riscv_vloxseg4ei8_v_u64m2(__VA_ARGS__)

◆ vloxseg4ei8_v_u64m2_m

#define vloxseg4ei8_v_u64m2_m ( ... ) __riscv_vloxseg4ei8_v_u64m2_tumu(__VA_ARGS__)

◆ vloxseg4ei8_v_u8m1

#define vloxseg4ei8_v_u8m1 ( ... ) __riscv_vloxseg4ei8_v_u8m1(__VA_ARGS__)

◆ vloxseg4ei8_v_u8m1_m

#define vloxseg4ei8_v_u8m1_m ( ... ) __riscv_vloxseg4ei8_v_u8m1_tumu(__VA_ARGS__)

◆ vloxseg4ei8_v_u8m2

#define vloxseg4ei8_v_u8m2 ( ... ) __riscv_vloxseg4ei8_v_u8m2(__VA_ARGS__)

◆ vloxseg4ei8_v_u8m2_m

#define vloxseg4ei8_v_u8m2_m ( ... ) __riscv_vloxseg4ei8_v_u8m2_tumu(__VA_ARGS__)

◆ vloxseg4ei8_v_u8mf2

#define vloxseg4ei8_v_u8mf2 ( ... ) __riscv_vloxseg4ei8_v_u8mf2(__VA_ARGS__)

◆ vloxseg4ei8_v_u8mf2_m

#define vloxseg4ei8_v_u8mf2_m ( ... ) __riscv_vloxseg4ei8_v_u8mf2_tumu(__VA_ARGS__)

◆ vloxseg4ei8_v_u8mf4

#define vloxseg4ei8_v_u8mf4 ( ... ) __riscv_vloxseg4ei8_v_u8mf4(__VA_ARGS__)

◆ vloxseg4ei8_v_u8mf4_m

#define vloxseg4ei8_v_u8mf4_m ( ... ) __riscv_vloxseg4ei8_v_u8mf4_tumu(__VA_ARGS__)

◆ vloxseg4ei8_v_u8mf8

#define vloxseg4ei8_v_u8mf8 ( ... ) __riscv_vloxseg4ei8_v_u8mf8(__VA_ARGS__)

◆ vloxseg4ei8_v_u8mf8_m

#define vloxseg4ei8_v_u8mf8_m ( ... ) __riscv_vloxseg4ei8_v_u8mf8_tumu(__VA_ARGS__)

◆ vloxseg5ei16_v_f16m1

#define vloxseg5ei16_v_f16m1 ( ... ) __riscv_vloxseg5ei16_v_f16m1(__VA_ARGS__)

◆ vloxseg5ei16_v_f16m1_m

#define vloxseg5ei16_v_f16m1_m ( ... ) __riscv_vloxseg5ei16_v_f16m1_tumu(__VA_ARGS__)

◆ vloxseg5ei16_v_f16mf2

#define vloxseg5ei16_v_f16mf2 ( ... ) __riscv_vloxseg5ei16_v_f16mf2(__VA_ARGS__)

◆ vloxseg5ei16_v_f16mf2_m

#define vloxseg5ei16_v_f16mf2_m ( ... ) __riscv_vloxseg5ei16_v_f16mf2_tumu(__VA_ARGS__)

◆ vloxseg5ei16_v_f16mf4

#define vloxseg5ei16_v_f16mf4 ( ... ) __riscv_vloxseg5ei16_v_f16mf4(__VA_ARGS__)

◆ vloxseg5ei16_v_f16mf4_m

#define vloxseg5ei16_v_f16mf4_m ( ... ) __riscv_vloxseg5ei16_v_f16mf4_tumu(__VA_ARGS__)

◆ vloxseg5ei16_v_f32m1

#define vloxseg5ei16_v_f32m1 ( ... ) __riscv_vloxseg5ei16_v_f32m1(__VA_ARGS__)

◆ vloxseg5ei16_v_f32m1_m

#define vloxseg5ei16_v_f32m1_m ( ... ) __riscv_vloxseg5ei16_v_f32m1_tumu(__VA_ARGS__)

◆ vloxseg5ei16_v_f32mf2

#define vloxseg5ei16_v_f32mf2 ( ... ) __riscv_vloxseg5ei16_v_f32mf2(__VA_ARGS__)

◆ vloxseg5ei16_v_f32mf2_m

#define vloxseg5ei16_v_f32mf2_m ( ... ) __riscv_vloxseg5ei16_v_f32mf2_tumu(__VA_ARGS__)

◆ vloxseg5ei16_v_f64m1

#define vloxseg5ei16_v_f64m1 ( ... ) __riscv_vloxseg5ei16_v_f64m1(__VA_ARGS__)

◆ vloxseg5ei16_v_f64m1_m

#define vloxseg5ei16_v_f64m1_m ( ... ) __riscv_vloxseg5ei16_v_f64m1_tumu(__VA_ARGS__)

◆ vloxseg5ei16_v_i16m1

#define vloxseg5ei16_v_i16m1 ( ... ) __riscv_vloxseg5ei16_v_i16m1(__VA_ARGS__)

◆ vloxseg5ei16_v_i16m1_m

#define vloxseg5ei16_v_i16m1_m ( ... ) __riscv_vloxseg5ei16_v_i16m1_tumu(__VA_ARGS__)

◆ vloxseg5ei16_v_i16mf2

#define vloxseg5ei16_v_i16mf2 ( ... ) __riscv_vloxseg5ei16_v_i16mf2(__VA_ARGS__)

◆ vloxseg5ei16_v_i16mf2_m

#define vloxseg5ei16_v_i16mf2_m ( ... ) __riscv_vloxseg5ei16_v_i16mf2_tumu(__VA_ARGS__)

◆ vloxseg5ei16_v_i16mf4

#define vloxseg5ei16_v_i16mf4 ( ... ) __riscv_vloxseg5ei16_v_i16mf4(__VA_ARGS__)

◆ vloxseg5ei16_v_i16mf4_m

#define vloxseg5ei16_v_i16mf4_m ( ... ) __riscv_vloxseg5ei16_v_i16mf4_tumu(__VA_ARGS__)

◆ vloxseg5ei16_v_i32m1

#define vloxseg5ei16_v_i32m1 ( ... ) __riscv_vloxseg5ei16_v_i32m1(__VA_ARGS__)

◆ vloxseg5ei16_v_i32m1_m

#define vloxseg5ei16_v_i32m1_m ( ... ) __riscv_vloxseg5ei16_v_i32m1_tumu(__VA_ARGS__)

◆ vloxseg5ei16_v_i32mf2

#define vloxseg5ei16_v_i32mf2 ( ... ) __riscv_vloxseg5ei16_v_i32mf2(__VA_ARGS__)

◆ vloxseg5ei16_v_i32mf2_m

#define vloxseg5ei16_v_i32mf2_m ( ... ) __riscv_vloxseg5ei16_v_i32mf2_tumu(__VA_ARGS__)

◆ vloxseg5ei16_v_i64m1

#define vloxseg5ei16_v_i64m1 ( ... ) __riscv_vloxseg5ei16_v_i64m1(__VA_ARGS__)

◆ vloxseg5ei16_v_i64m1_m

#define vloxseg5ei16_v_i64m1_m ( ... ) __riscv_vloxseg5ei16_v_i64m1_tumu(__VA_ARGS__)

◆ vloxseg5ei16_v_i8m1

#define vloxseg5ei16_v_i8m1 ( ... ) __riscv_vloxseg5ei16_v_i8m1(__VA_ARGS__)

◆ vloxseg5ei16_v_i8m1_m

#define vloxseg5ei16_v_i8m1_m ( ... ) __riscv_vloxseg5ei16_v_i8m1_tumu(__VA_ARGS__)

◆ vloxseg5ei16_v_i8mf2

#define vloxseg5ei16_v_i8mf2 ( ... ) __riscv_vloxseg5ei16_v_i8mf2(__VA_ARGS__)

◆ vloxseg5ei16_v_i8mf2_m

#define vloxseg5ei16_v_i8mf2_m ( ... ) __riscv_vloxseg5ei16_v_i8mf2_tumu(__VA_ARGS__)

◆ vloxseg5ei16_v_i8mf4

#define vloxseg5ei16_v_i8mf4 ( ... ) __riscv_vloxseg5ei16_v_i8mf4(__VA_ARGS__)

◆ vloxseg5ei16_v_i8mf4_m

#define vloxseg5ei16_v_i8mf4_m ( ... ) __riscv_vloxseg5ei16_v_i8mf4_tumu(__VA_ARGS__)

◆ vloxseg5ei16_v_i8mf8

#define vloxseg5ei16_v_i8mf8 ( ... ) __riscv_vloxseg5ei16_v_i8mf8(__VA_ARGS__)

◆ vloxseg5ei16_v_i8mf8_m

#define vloxseg5ei16_v_i8mf8_m ( ... ) __riscv_vloxseg5ei16_v_i8mf8_tumu(__VA_ARGS__)

◆ vloxseg5ei16_v_u16m1

#define vloxseg5ei16_v_u16m1 ( ... ) __riscv_vloxseg5ei16_v_u16m1(__VA_ARGS__)

◆ vloxseg5ei16_v_u16m1_m

#define vloxseg5ei16_v_u16m1_m ( ... ) __riscv_vloxseg5ei16_v_u16m1_tumu(__VA_ARGS__)

◆ vloxseg5ei16_v_u16mf2

#define vloxseg5ei16_v_u16mf2 ( ... ) __riscv_vloxseg5ei16_v_u16mf2(__VA_ARGS__)

◆ vloxseg5ei16_v_u16mf2_m

#define vloxseg5ei16_v_u16mf2_m ( ... ) __riscv_vloxseg5ei16_v_u16mf2_tumu(__VA_ARGS__)

◆ vloxseg5ei16_v_u16mf4

#define vloxseg5ei16_v_u16mf4 ( ... ) __riscv_vloxseg5ei16_v_u16mf4(__VA_ARGS__)

◆ vloxseg5ei16_v_u16mf4_m

#define vloxseg5ei16_v_u16mf4_m ( ... ) __riscv_vloxseg5ei16_v_u16mf4_tumu(__VA_ARGS__)

◆ vloxseg5ei16_v_u32m1

#define vloxseg5ei16_v_u32m1 ( ... ) __riscv_vloxseg5ei16_v_u32m1(__VA_ARGS__)

◆ vloxseg5ei16_v_u32m1_m

#define vloxseg5ei16_v_u32m1_m ( ... ) __riscv_vloxseg5ei16_v_u32m1_tumu(__VA_ARGS__)

◆ vloxseg5ei16_v_u32mf2

#define vloxseg5ei16_v_u32mf2 ( ... ) __riscv_vloxseg5ei16_v_u32mf2(__VA_ARGS__)

◆ vloxseg5ei16_v_u32mf2_m

#define vloxseg5ei16_v_u32mf2_m ( ... ) __riscv_vloxseg5ei16_v_u32mf2_tumu(__VA_ARGS__)

◆ vloxseg5ei16_v_u64m1

#define vloxseg5ei16_v_u64m1 ( ... ) __riscv_vloxseg5ei16_v_u64m1(__VA_ARGS__)

◆ vloxseg5ei16_v_u64m1_m

#define vloxseg5ei16_v_u64m1_m ( ... ) __riscv_vloxseg5ei16_v_u64m1_tumu(__VA_ARGS__)

◆ vloxseg5ei16_v_u8m1

#define vloxseg5ei16_v_u8m1 ( ... ) __riscv_vloxseg5ei16_v_u8m1(__VA_ARGS__)

◆ vloxseg5ei16_v_u8m1_m

#define vloxseg5ei16_v_u8m1_m ( ... ) __riscv_vloxseg5ei16_v_u8m1_tumu(__VA_ARGS__)

◆ vloxseg5ei16_v_u8mf2

#define vloxseg5ei16_v_u8mf2 ( ... ) __riscv_vloxseg5ei16_v_u8mf2(__VA_ARGS__)

◆ vloxseg5ei16_v_u8mf2_m

#define vloxseg5ei16_v_u8mf2_m ( ... ) __riscv_vloxseg5ei16_v_u8mf2_tumu(__VA_ARGS__)

◆ vloxseg5ei16_v_u8mf4

#define vloxseg5ei16_v_u8mf4 ( ... ) __riscv_vloxseg5ei16_v_u8mf4(__VA_ARGS__)

◆ vloxseg5ei16_v_u8mf4_m

#define vloxseg5ei16_v_u8mf4_m ( ... ) __riscv_vloxseg5ei16_v_u8mf4_tumu(__VA_ARGS__)

◆ vloxseg5ei16_v_u8mf8

#define vloxseg5ei16_v_u8mf8 ( ... ) __riscv_vloxseg5ei16_v_u8mf8(__VA_ARGS__)

◆ vloxseg5ei16_v_u8mf8_m

#define vloxseg5ei16_v_u8mf8_m ( ... ) __riscv_vloxseg5ei16_v_u8mf8_tumu(__VA_ARGS__)

◆ vloxseg5ei32_v_f16m1

#define vloxseg5ei32_v_f16m1 ( ... ) __riscv_vloxseg5ei32_v_f16m1(__VA_ARGS__)

◆ vloxseg5ei32_v_f16m1_m

#define vloxseg5ei32_v_f16m1_m ( ... ) __riscv_vloxseg5ei32_v_f16m1_tumu(__VA_ARGS__)

◆ vloxseg5ei32_v_f16mf2

#define vloxseg5ei32_v_f16mf2 ( ... ) __riscv_vloxseg5ei32_v_f16mf2(__VA_ARGS__)

◆ vloxseg5ei32_v_f16mf2_m

#define vloxseg5ei32_v_f16mf2_m ( ... ) __riscv_vloxseg5ei32_v_f16mf2_tumu(__VA_ARGS__)

◆ vloxseg5ei32_v_f16mf4

#define vloxseg5ei32_v_f16mf4 ( ... ) __riscv_vloxseg5ei32_v_f16mf4(__VA_ARGS__)

◆ vloxseg5ei32_v_f16mf4_m

#define vloxseg5ei32_v_f16mf4_m ( ... ) __riscv_vloxseg5ei32_v_f16mf4_tumu(__VA_ARGS__)

◆ vloxseg5ei32_v_f32m1

#define vloxseg5ei32_v_f32m1 ( ... ) __riscv_vloxseg5ei32_v_f32m1(__VA_ARGS__)

◆ vloxseg5ei32_v_f32m1_m

#define vloxseg5ei32_v_f32m1_m ( ... ) __riscv_vloxseg5ei32_v_f32m1_tumu(__VA_ARGS__)

◆ vloxseg5ei32_v_f32mf2

#define vloxseg5ei32_v_f32mf2 ( ... ) __riscv_vloxseg5ei32_v_f32mf2(__VA_ARGS__)

◆ vloxseg5ei32_v_f32mf2_m

#define vloxseg5ei32_v_f32mf2_m ( ... ) __riscv_vloxseg5ei32_v_f32mf2_tumu(__VA_ARGS__)

◆ vloxseg5ei32_v_f64m1

#define vloxseg5ei32_v_f64m1 ( ... ) __riscv_vloxseg5ei32_v_f64m1(__VA_ARGS__)

◆ vloxseg5ei32_v_f64m1_m

#define vloxseg5ei32_v_f64m1_m ( ... ) __riscv_vloxseg5ei32_v_f64m1_tumu(__VA_ARGS__)

◆ vloxseg5ei32_v_i16m1

#define vloxseg5ei32_v_i16m1 ( ... ) __riscv_vloxseg5ei32_v_i16m1(__VA_ARGS__)

◆ vloxseg5ei32_v_i16m1_m

#define vloxseg5ei32_v_i16m1_m ( ... ) __riscv_vloxseg5ei32_v_i16m1_tumu(__VA_ARGS__)

◆ vloxseg5ei32_v_i16mf2

#define vloxseg5ei32_v_i16mf2 ( ... ) __riscv_vloxseg5ei32_v_i16mf2(__VA_ARGS__)

◆ vloxseg5ei32_v_i16mf2_m

#define vloxseg5ei32_v_i16mf2_m ( ... ) __riscv_vloxseg5ei32_v_i16mf2_tumu(__VA_ARGS__)

◆ vloxseg5ei32_v_i16mf4

#define vloxseg5ei32_v_i16mf4 ( ... ) __riscv_vloxseg5ei32_v_i16mf4(__VA_ARGS__)

◆ vloxseg5ei32_v_i16mf4_m

#define vloxseg5ei32_v_i16mf4_m ( ... ) __riscv_vloxseg5ei32_v_i16mf4_tumu(__VA_ARGS__)

◆ vloxseg5ei32_v_i32m1

#define vloxseg5ei32_v_i32m1 ( ... ) __riscv_vloxseg5ei32_v_i32m1(__VA_ARGS__)

◆ vloxseg5ei32_v_i32m1_m

#define vloxseg5ei32_v_i32m1_m ( ... ) __riscv_vloxseg5ei32_v_i32m1_tumu(__VA_ARGS__)

◆ vloxseg5ei32_v_i32mf2

#define vloxseg5ei32_v_i32mf2 ( ... ) __riscv_vloxseg5ei32_v_i32mf2(__VA_ARGS__)

◆ vloxseg5ei32_v_i32mf2_m

#define vloxseg5ei32_v_i32mf2_m ( ... ) __riscv_vloxseg5ei32_v_i32mf2_tumu(__VA_ARGS__)

◆ vloxseg5ei32_v_i64m1

#define vloxseg5ei32_v_i64m1 ( ... ) __riscv_vloxseg5ei32_v_i64m1(__VA_ARGS__)

◆ vloxseg5ei32_v_i64m1_m

#define vloxseg5ei32_v_i64m1_m ( ... ) __riscv_vloxseg5ei32_v_i64m1_tumu(__VA_ARGS__)

◆ vloxseg5ei32_v_i8m1

#define vloxseg5ei32_v_i8m1 ( ... ) __riscv_vloxseg5ei32_v_i8m1(__VA_ARGS__)

◆ vloxseg5ei32_v_i8m1_m

#define vloxseg5ei32_v_i8m1_m ( ... ) __riscv_vloxseg5ei32_v_i8m1_tumu(__VA_ARGS__)

◆ vloxseg5ei32_v_i8mf2

#define vloxseg5ei32_v_i8mf2 ( ... ) __riscv_vloxseg5ei32_v_i8mf2(__VA_ARGS__)

◆ vloxseg5ei32_v_i8mf2_m

#define vloxseg5ei32_v_i8mf2_m ( ... ) __riscv_vloxseg5ei32_v_i8mf2_tumu(__VA_ARGS__)

◆ vloxseg5ei32_v_i8mf4

#define vloxseg5ei32_v_i8mf4 ( ... ) __riscv_vloxseg5ei32_v_i8mf4(__VA_ARGS__)

◆ vloxseg5ei32_v_i8mf4_m

#define vloxseg5ei32_v_i8mf4_m ( ... ) __riscv_vloxseg5ei32_v_i8mf4_tumu(__VA_ARGS__)

◆ vloxseg5ei32_v_i8mf8

#define vloxseg5ei32_v_i8mf8 ( ... ) __riscv_vloxseg5ei32_v_i8mf8(__VA_ARGS__)

◆ vloxseg5ei32_v_i8mf8_m

#define vloxseg5ei32_v_i8mf8_m ( ... ) __riscv_vloxseg5ei32_v_i8mf8_tumu(__VA_ARGS__)

◆ vloxseg5ei32_v_u16m1

#define vloxseg5ei32_v_u16m1 ( ... ) __riscv_vloxseg5ei32_v_u16m1(__VA_ARGS__)

◆ vloxseg5ei32_v_u16m1_m

#define vloxseg5ei32_v_u16m1_m ( ... ) __riscv_vloxseg5ei32_v_u16m1_tumu(__VA_ARGS__)

◆ vloxseg5ei32_v_u16mf2

#define vloxseg5ei32_v_u16mf2 ( ... ) __riscv_vloxseg5ei32_v_u16mf2(__VA_ARGS__)

◆ vloxseg5ei32_v_u16mf2_m

#define vloxseg5ei32_v_u16mf2_m ( ... ) __riscv_vloxseg5ei32_v_u16mf2_tumu(__VA_ARGS__)

◆ vloxseg5ei32_v_u16mf4

#define vloxseg5ei32_v_u16mf4 ( ... ) __riscv_vloxseg5ei32_v_u16mf4(__VA_ARGS__)

◆ vloxseg5ei32_v_u16mf4_m

#define vloxseg5ei32_v_u16mf4_m ( ... ) __riscv_vloxseg5ei32_v_u16mf4_tumu(__VA_ARGS__)

◆ vloxseg5ei32_v_u32m1

#define vloxseg5ei32_v_u32m1 ( ... ) __riscv_vloxseg5ei32_v_u32m1(__VA_ARGS__)

◆ vloxseg5ei32_v_u32m1_m

#define vloxseg5ei32_v_u32m1_m ( ... ) __riscv_vloxseg5ei32_v_u32m1_tumu(__VA_ARGS__)

◆ vloxseg5ei32_v_u32mf2

#define vloxseg5ei32_v_u32mf2 ( ... ) __riscv_vloxseg5ei32_v_u32mf2(__VA_ARGS__)

◆ vloxseg5ei32_v_u32mf2_m

#define vloxseg5ei32_v_u32mf2_m ( ... ) __riscv_vloxseg5ei32_v_u32mf2_tumu(__VA_ARGS__)

◆ vloxseg5ei32_v_u64m1

#define vloxseg5ei32_v_u64m1 ( ... ) __riscv_vloxseg5ei32_v_u64m1(__VA_ARGS__)

◆ vloxseg5ei32_v_u64m1_m

#define vloxseg5ei32_v_u64m1_m ( ... ) __riscv_vloxseg5ei32_v_u64m1_tumu(__VA_ARGS__)

◆ vloxseg5ei32_v_u8m1

#define vloxseg5ei32_v_u8m1 ( ... ) __riscv_vloxseg5ei32_v_u8m1(__VA_ARGS__)

◆ vloxseg5ei32_v_u8m1_m

#define vloxseg5ei32_v_u8m1_m ( ... ) __riscv_vloxseg5ei32_v_u8m1_tumu(__VA_ARGS__)

◆ vloxseg5ei32_v_u8mf2

#define vloxseg5ei32_v_u8mf2 ( ... ) __riscv_vloxseg5ei32_v_u8mf2(__VA_ARGS__)

◆ vloxseg5ei32_v_u8mf2_m

#define vloxseg5ei32_v_u8mf2_m ( ... ) __riscv_vloxseg5ei32_v_u8mf2_tumu(__VA_ARGS__)

◆ vloxseg5ei32_v_u8mf4

#define vloxseg5ei32_v_u8mf4 ( ... ) __riscv_vloxseg5ei32_v_u8mf4(__VA_ARGS__)

◆ vloxseg5ei32_v_u8mf4_m

#define vloxseg5ei32_v_u8mf4_m ( ... ) __riscv_vloxseg5ei32_v_u8mf4_tumu(__VA_ARGS__)

◆ vloxseg5ei32_v_u8mf8

#define vloxseg5ei32_v_u8mf8 ( ... ) __riscv_vloxseg5ei32_v_u8mf8(__VA_ARGS__)

◆ vloxseg5ei32_v_u8mf8_m

#define vloxseg5ei32_v_u8mf8_m ( ... ) __riscv_vloxseg5ei32_v_u8mf8_tumu(__VA_ARGS__)

◆ vloxseg5ei64_v_f16m1

#define vloxseg5ei64_v_f16m1 ( ... ) __riscv_vloxseg5ei64_v_f16m1(__VA_ARGS__)

◆ vloxseg5ei64_v_f16m1_m

#define vloxseg5ei64_v_f16m1_m ( ... ) __riscv_vloxseg5ei64_v_f16m1_tumu(__VA_ARGS__)

◆ vloxseg5ei64_v_f16mf2

#define vloxseg5ei64_v_f16mf2 ( ... ) __riscv_vloxseg5ei64_v_f16mf2(__VA_ARGS__)

◆ vloxseg5ei64_v_f16mf2_m

#define vloxseg5ei64_v_f16mf2_m ( ... ) __riscv_vloxseg5ei64_v_f16mf2_tumu(__VA_ARGS__)

◆ vloxseg5ei64_v_f16mf4

#define vloxseg5ei64_v_f16mf4 ( ... ) __riscv_vloxseg5ei64_v_f16mf4(__VA_ARGS__)

◆ vloxseg5ei64_v_f16mf4_m

#define vloxseg5ei64_v_f16mf4_m ( ... ) __riscv_vloxseg5ei64_v_f16mf4_tumu(__VA_ARGS__)

◆ vloxseg5ei64_v_f32m1

#define vloxseg5ei64_v_f32m1 ( ... ) __riscv_vloxseg5ei64_v_f32m1(__VA_ARGS__)

◆ vloxseg5ei64_v_f32m1_m

#define vloxseg5ei64_v_f32m1_m ( ... ) __riscv_vloxseg5ei64_v_f32m1_tumu(__VA_ARGS__)

◆ vloxseg5ei64_v_f32mf2

#define vloxseg5ei64_v_f32mf2 ( ... ) __riscv_vloxseg5ei64_v_f32mf2(__VA_ARGS__)

◆ vloxseg5ei64_v_f32mf2_m

#define vloxseg5ei64_v_f32mf2_m ( ... ) __riscv_vloxseg5ei64_v_f32mf2_tumu(__VA_ARGS__)

◆ vloxseg5ei64_v_f64m1

#define vloxseg5ei64_v_f64m1 ( ... ) __riscv_vloxseg5ei64_v_f64m1(__VA_ARGS__)

◆ vloxseg5ei64_v_f64m1_m

#define vloxseg5ei64_v_f64m1_m ( ... ) __riscv_vloxseg5ei64_v_f64m1_tumu(__VA_ARGS__)

◆ vloxseg5ei64_v_i16m1

#define vloxseg5ei64_v_i16m1 ( ... ) __riscv_vloxseg5ei64_v_i16m1(__VA_ARGS__)

◆ vloxseg5ei64_v_i16m1_m

#define vloxseg5ei64_v_i16m1_m ( ... ) __riscv_vloxseg5ei64_v_i16m1_tumu(__VA_ARGS__)

◆ vloxseg5ei64_v_i16mf2

#define vloxseg5ei64_v_i16mf2 ( ... ) __riscv_vloxseg5ei64_v_i16mf2(__VA_ARGS__)

◆ vloxseg5ei64_v_i16mf2_m

#define vloxseg5ei64_v_i16mf2_m ( ... ) __riscv_vloxseg5ei64_v_i16mf2_tumu(__VA_ARGS__)

◆ vloxseg5ei64_v_i16mf4

#define vloxseg5ei64_v_i16mf4 ( ... ) __riscv_vloxseg5ei64_v_i16mf4(__VA_ARGS__)

◆ vloxseg5ei64_v_i16mf4_m

#define vloxseg5ei64_v_i16mf4_m ( ... ) __riscv_vloxseg5ei64_v_i16mf4_tumu(__VA_ARGS__)

◆ vloxseg5ei64_v_i32m1

#define vloxseg5ei64_v_i32m1 ( ... ) __riscv_vloxseg5ei64_v_i32m1(__VA_ARGS__)

◆ vloxseg5ei64_v_i32m1_m

#define vloxseg5ei64_v_i32m1_m ( ... ) __riscv_vloxseg5ei64_v_i32m1_tumu(__VA_ARGS__)

◆ vloxseg5ei64_v_i32mf2

#define vloxseg5ei64_v_i32mf2 ( ... ) __riscv_vloxseg5ei64_v_i32mf2(__VA_ARGS__)

◆ vloxseg5ei64_v_i32mf2_m

#define vloxseg5ei64_v_i32mf2_m ( ... ) __riscv_vloxseg5ei64_v_i32mf2_tumu(__VA_ARGS__)

◆ vloxseg5ei64_v_i64m1

#define vloxseg5ei64_v_i64m1 ( ... ) __riscv_vloxseg5ei64_v_i64m1(__VA_ARGS__)

◆ vloxseg5ei64_v_i64m1_m

#define vloxseg5ei64_v_i64m1_m ( ... ) __riscv_vloxseg5ei64_v_i64m1_tumu(__VA_ARGS__)

◆ vloxseg5ei64_v_i8m1

#define vloxseg5ei64_v_i8m1 ( ... ) __riscv_vloxseg5ei64_v_i8m1(__VA_ARGS__)

◆ vloxseg5ei64_v_i8m1_m

#define vloxseg5ei64_v_i8m1_m ( ... ) __riscv_vloxseg5ei64_v_i8m1_tumu(__VA_ARGS__)

◆ vloxseg5ei64_v_i8mf2

#define vloxseg5ei64_v_i8mf2 ( ... ) __riscv_vloxseg5ei64_v_i8mf2(__VA_ARGS__)

◆ vloxseg5ei64_v_i8mf2_m

#define vloxseg5ei64_v_i8mf2_m ( ... ) __riscv_vloxseg5ei64_v_i8mf2_tumu(__VA_ARGS__)

◆ vloxseg5ei64_v_i8mf4

#define vloxseg5ei64_v_i8mf4 ( ... ) __riscv_vloxseg5ei64_v_i8mf4(__VA_ARGS__)

◆ vloxseg5ei64_v_i8mf4_m

#define vloxseg5ei64_v_i8mf4_m ( ... ) __riscv_vloxseg5ei64_v_i8mf4_tumu(__VA_ARGS__)

◆ vloxseg5ei64_v_i8mf8

#define vloxseg5ei64_v_i8mf8 ( ... ) __riscv_vloxseg5ei64_v_i8mf8(__VA_ARGS__)

◆ vloxseg5ei64_v_i8mf8_m

#define vloxseg5ei64_v_i8mf8_m ( ... ) __riscv_vloxseg5ei64_v_i8mf8_tumu(__VA_ARGS__)

◆ vloxseg5ei64_v_u16m1

#define vloxseg5ei64_v_u16m1 ( ... ) __riscv_vloxseg5ei64_v_u16m1(__VA_ARGS__)

◆ vloxseg5ei64_v_u16m1_m

#define vloxseg5ei64_v_u16m1_m ( ... ) __riscv_vloxseg5ei64_v_u16m1_tumu(__VA_ARGS__)

◆ vloxseg5ei64_v_u16mf2

#define vloxseg5ei64_v_u16mf2 ( ... ) __riscv_vloxseg5ei64_v_u16mf2(__VA_ARGS__)

◆ vloxseg5ei64_v_u16mf2_m

#define vloxseg5ei64_v_u16mf2_m ( ... ) __riscv_vloxseg5ei64_v_u16mf2_tumu(__VA_ARGS__)

◆ vloxseg5ei64_v_u16mf4

#define vloxseg5ei64_v_u16mf4 ( ... ) __riscv_vloxseg5ei64_v_u16mf4(__VA_ARGS__)

◆ vloxseg5ei64_v_u16mf4_m

#define vloxseg5ei64_v_u16mf4_m ( ... ) __riscv_vloxseg5ei64_v_u16mf4_tumu(__VA_ARGS__)

◆ vloxseg5ei64_v_u32m1

#define vloxseg5ei64_v_u32m1 ( ... ) __riscv_vloxseg5ei64_v_u32m1(__VA_ARGS__)

◆ vloxseg5ei64_v_u32m1_m

#define vloxseg5ei64_v_u32m1_m ( ... ) __riscv_vloxseg5ei64_v_u32m1_tumu(__VA_ARGS__)

◆ vloxseg5ei64_v_u32mf2

#define vloxseg5ei64_v_u32mf2 ( ... ) __riscv_vloxseg5ei64_v_u32mf2(__VA_ARGS__)

◆ vloxseg5ei64_v_u32mf2_m

#define vloxseg5ei64_v_u32mf2_m ( ... ) __riscv_vloxseg5ei64_v_u32mf2_tumu(__VA_ARGS__)

◆ vloxseg5ei64_v_u64m1

#define vloxseg5ei64_v_u64m1 ( ... ) __riscv_vloxseg5ei64_v_u64m1(__VA_ARGS__)

◆ vloxseg5ei64_v_u64m1_m

#define vloxseg5ei64_v_u64m1_m ( ... ) __riscv_vloxseg5ei64_v_u64m1_tumu(__VA_ARGS__)

◆ vloxseg5ei64_v_u8m1

#define vloxseg5ei64_v_u8m1 ( ... ) __riscv_vloxseg5ei64_v_u8m1(__VA_ARGS__)

◆ vloxseg5ei64_v_u8m1_m

#define vloxseg5ei64_v_u8m1_m ( ... ) __riscv_vloxseg5ei64_v_u8m1_tumu(__VA_ARGS__)

◆ vloxseg5ei64_v_u8mf2

#define vloxseg5ei64_v_u8mf2 ( ... ) __riscv_vloxseg5ei64_v_u8mf2(__VA_ARGS__)

◆ vloxseg5ei64_v_u8mf2_m

#define vloxseg5ei64_v_u8mf2_m ( ... ) __riscv_vloxseg5ei64_v_u8mf2_tumu(__VA_ARGS__)

◆ vloxseg5ei64_v_u8mf4

#define vloxseg5ei64_v_u8mf4 ( ... ) __riscv_vloxseg5ei64_v_u8mf4(__VA_ARGS__)

◆ vloxseg5ei64_v_u8mf4_m

#define vloxseg5ei64_v_u8mf4_m ( ... ) __riscv_vloxseg5ei64_v_u8mf4_tumu(__VA_ARGS__)

◆ vloxseg5ei64_v_u8mf8

#define vloxseg5ei64_v_u8mf8 ( ... ) __riscv_vloxseg5ei64_v_u8mf8(__VA_ARGS__)

◆ vloxseg5ei64_v_u8mf8_m

#define vloxseg5ei64_v_u8mf8_m ( ... ) __riscv_vloxseg5ei64_v_u8mf8_tumu(__VA_ARGS__)

◆ vloxseg5ei8_v_f16m1

#define vloxseg5ei8_v_f16m1 ( ... ) __riscv_vloxseg5ei8_v_f16m1(__VA_ARGS__)

◆ vloxseg5ei8_v_f16m1_m

#define vloxseg5ei8_v_f16m1_m ( ... ) __riscv_vloxseg5ei8_v_f16m1_tumu(__VA_ARGS__)

◆ vloxseg5ei8_v_f16mf2

#define vloxseg5ei8_v_f16mf2 ( ... ) __riscv_vloxseg5ei8_v_f16mf2(__VA_ARGS__)

◆ vloxseg5ei8_v_f16mf2_m

#define vloxseg5ei8_v_f16mf2_m ( ... ) __riscv_vloxseg5ei8_v_f16mf2_tumu(__VA_ARGS__)

◆ vloxseg5ei8_v_f16mf4

#define vloxseg5ei8_v_f16mf4 ( ... ) __riscv_vloxseg5ei8_v_f16mf4(__VA_ARGS__)

◆ vloxseg5ei8_v_f16mf4_m

#define vloxseg5ei8_v_f16mf4_m ( ... ) __riscv_vloxseg5ei8_v_f16mf4_tumu(__VA_ARGS__)

◆ vloxseg5ei8_v_f32m1

#define vloxseg5ei8_v_f32m1 ( ... ) __riscv_vloxseg5ei8_v_f32m1(__VA_ARGS__)

◆ vloxseg5ei8_v_f32m1_m

#define vloxseg5ei8_v_f32m1_m ( ... ) __riscv_vloxseg5ei8_v_f32m1_tumu(__VA_ARGS__)

◆ vloxseg5ei8_v_f32mf2

#define vloxseg5ei8_v_f32mf2 ( ... ) __riscv_vloxseg5ei8_v_f32mf2(__VA_ARGS__)

◆ vloxseg5ei8_v_f32mf2_m

#define vloxseg5ei8_v_f32mf2_m ( ... ) __riscv_vloxseg5ei8_v_f32mf2_tumu(__VA_ARGS__)

◆ vloxseg5ei8_v_f64m1

#define vloxseg5ei8_v_f64m1 ( ... ) __riscv_vloxseg5ei8_v_f64m1(__VA_ARGS__)

◆ vloxseg5ei8_v_f64m1_m

#define vloxseg5ei8_v_f64m1_m ( ... ) __riscv_vloxseg5ei8_v_f64m1_tumu(__VA_ARGS__)

◆ vloxseg5ei8_v_i16m1

#define vloxseg5ei8_v_i16m1 ( ... ) __riscv_vloxseg5ei8_v_i16m1(__VA_ARGS__)

◆ vloxseg5ei8_v_i16m1_m

#define vloxseg5ei8_v_i16m1_m ( ... ) __riscv_vloxseg5ei8_v_i16m1_tumu(__VA_ARGS__)

◆ vloxseg5ei8_v_i16mf2

#define vloxseg5ei8_v_i16mf2 ( ... ) __riscv_vloxseg5ei8_v_i16mf2(__VA_ARGS__)

◆ vloxseg5ei8_v_i16mf2_m

#define vloxseg5ei8_v_i16mf2_m ( ... ) __riscv_vloxseg5ei8_v_i16mf2_tumu(__VA_ARGS__)

◆ vloxseg5ei8_v_i16mf4

#define vloxseg5ei8_v_i16mf4 ( ... ) __riscv_vloxseg5ei8_v_i16mf4(__VA_ARGS__)

◆ vloxseg5ei8_v_i16mf4_m

#define vloxseg5ei8_v_i16mf4_m ( ... ) __riscv_vloxseg5ei8_v_i16mf4_tumu(__VA_ARGS__)

◆ vloxseg5ei8_v_i32m1

#define vloxseg5ei8_v_i32m1 ( ... ) __riscv_vloxseg5ei8_v_i32m1(__VA_ARGS__)

◆ vloxseg5ei8_v_i32m1_m

#define vloxseg5ei8_v_i32m1_m ( ... ) __riscv_vloxseg5ei8_v_i32m1_tumu(__VA_ARGS__)

◆ vloxseg5ei8_v_i32mf2

#define vloxseg5ei8_v_i32mf2 ( ... ) __riscv_vloxseg5ei8_v_i32mf2(__VA_ARGS__)

◆ vloxseg5ei8_v_i32mf2_m

#define vloxseg5ei8_v_i32mf2_m ( ... ) __riscv_vloxseg5ei8_v_i32mf2_tumu(__VA_ARGS__)

◆ vloxseg5ei8_v_i64m1

#define vloxseg5ei8_v_i64m1 ( ... ) __riscv_vloxseg5ei8_v_i64m1(__VA_ARGS__)

◆ vloxseg5ei8_v_i64m1_m

#define vloxseg5ei8_v_i64m1_m ( ... ) __riscv_vloxseg5ei8_v_i64m1_tumu(__VA_ARGS__)

◆ vloxseg5ei8_v_i8m1

#define vloxseg5ei8_v_i8m1 ( ... ) __riscv_vloxseg5ei8_v_i8m1(__VA_ARGS__)

◆ vloxseg5ei8_v_i8m1_m

#define vloxseg5ei8_v_i8m1_m ( ... ) __riscv_vloxseg5ei8_v_i8m1_tumu(__VA_ARGS__)

◆ vloxseg5ei8_v_i8mf2

#define vloxseg5ei8_v_i8mf2 ( ... ) __riscv_vloxseg5ei8_v_i8mf2(__VA_ARGS__)

◆ vloxseg5ei8_v_i8mf2_m

#define vloxseg5ei8_v_i8mf2_m ( ... ) __riscv_vloxseg5ei8_v_i8mf2_tumu(__VA_ARGS__)

◆ vloxseg5ei8_v_i8mf4

#define vloxseg5ei8_v_i8mf4 ( ... ) __riscv_vloxseg5ei8_v_i8mf4(__VA_ARGS__)

◆ vloxseg5ei8_v_i8mf4_m

#define vloxseg5ei8_v_i8mf4_m ( ... ) __riscv_vloxseg5ei8_v_i8mf4_tumu(__VA_ARGS__)

◆ vloxseg5ei8_v_i8mf8

#define vloxseg5ei8_v_i8mf8 ( ... ) __riscv_vloxseg5ei8_v_i8mf8(__VA_ARGS__)

◆ vloxseg5ei8_v_i8mf8_m

#define vloxseg5ei8_v_i8mf8_m ( ... ) __riscv_vloxseg5ei8_v_i8mf8_tumu(__VA_ARGS__)

◆ vloxseg5ei8_v_u16m1

#define vloxseg5ei8_v_u16m1 ( ... ) __riscv_vloxseg5ei8_v_u16m1(__VA_ARGS__)

◆ vloxseg5ei8_v_u16m1_m

#define vloxseg5ei8_v_u16m1_m ( ... ) __riscv_vloxseg5ei8_v_u16m1_tumu(__VA_ARGS__)

◆ vloxseg5ei8_v_u16mf2

#define vloxseg5ei8_v_u16mf2 ( ... ) __riscv_vloxseg5ei8_v_u16mf2(__VA_ARGS__)

◆ vloxseg5ei8_v_u16mf2_m

#define vloxseg5ei8_v_u16mf2_m ( ... ) __riscv_vloxseg5ei8_v_u16mf2_tumu(__VA_ARGS__)

◆ vloxseg5ei8_v_u16mf4

#define vloxseg5ei8_v_u16mf4 ( ... ) __riscv_vloxseg5ei8_v_u16mf4(__VA_ARGS__)

◆ vloxseg5ei8_v_u16mf4_m

#define vloxseg5ei8_v_u16mf4_m ( ... ) __riscv_vloxseg5ei8_v_u16mf4_tumu(__VA_ARGS__)

◆ vloxseg5ei8_v_u32m1

#define vloxseg5ei8_v_u32m1 ( ... ) __riscv_vloxseg5ei8_v_u32m1(__VA_ARGS__)

◆ vloxseg5ei8_v_u32m1_m

#define vloxseg5ei8_v_u32m1_m ( ... ) __riscv_vloxseg5ei8_v_u32m1_tumu(__VA_ARGS__)

◆ vloxseg5ei8_v_u32mf2

#define vloxseg5ei8_v_u32mf2 ( ... ) __riscv_vloxseg5ei8_v_u32mf2(__VA_ARGS__)

◆ vloxseg5ei8_v_u32mf2_m

#define vloxseg5ei8_v_u32mf2_m ( ... ) __riscv_vloxseg5ei8_v_u32mf2_tumu(__VA_ARGS__)

◆ vloxseg5ei8_v_u64m1

#define vloxseg5ei8_v_u64m1 ( ... ) __riscv_vloxseg5ei8_v_u64m1(__VA_ARGS__)

◆ vloxseg5ei8_v_u64m1_m

#define vloxseg5ei8_v_u64m1_m ( ... ) __riscv_vloxseg5ei8_v_u64m1_tumu(__VA_ARGS__)

◆ vloxseg5ei8_v_u8m1

#define vloxseg5ei8_v_u8m1 ( ... ) __riscv_vloxseg5ei8_v_u8m1(__VA_ARGS__)

◆ vloxseg5ei8_v_u8m1_m

#define vloxseg5ei8_v_u8m1_m ( ... ) __riscv_vloxseg5ei8_v_u8m1_tumu(__VA_ARGS__)

◆ vloxseg5ei8_v_u8mf2

#define vloxseg5ei8_v_u8mf2 ( ... ) __riscv_vloxseg5ei8_v_u8mf2(__VA_ARGS__)

◆ vloxseg5ei8_v_u8mf2_m

#define vloxseg5ei8_v_u8mf2_m ( ... ) __riscv_vloxseg5ei8_v_u8mf2_tumu(__VA_ARGS__)

◆ vloxseg5ei8_v_u8mf4

#define vloxseg5ei8_v_u8mf4 ( ... ) __riscv_vloxseg5ei8_v_u8mf4(__VA_ARGS__)

◆ vloxseg5ei8_v_u8mf4_m

#define vloxseg5ei8_v_u8mf4_m ( ... ) __riscv_vloxseg5ei8_v_u8mf4_tumu(__VA_ARGS__)

◆ vloxseg5ei8_v_u8mf8

#define vloxseg5ei8_v_u8mf8 ( ... ) __riscv_vloxseg5ei8_v_u8mf8(__VA_ARGS__)

◆ vloxseg5ei8_v_u8mf8_m

#define vloxseg5ei8_v_u8mf8_m ( ... ) __riscv_vloxseg5ei8_v_u8mf8_tumu(__VA_ARGS__)

◆ vloxseg6ei16_v_f16m1

#define vloxseg6ei16_v_f16m1 ( ... ) __riscv_vloxseg6ei16_v_f16m1(__VA_ARGS__)

◆ vloxseg6ei16_v_f16m1_m

#define vloxseg6ei16_v_f16m1_m ( ... ) __riscv_vloxseg6ei16_v_f16m1_tumu(__VA_ARGS__)

◆ vloxseg6ei16_v_f16mf2

#define vloxseg6ei16_v_f16mf2 ( ... ) __riscv_vloxseg6ei16_v_f16mf2(__VA_ARGS__)

◆ vloxseg6ei16_v_f16mf2_m

#define vloxseg6ei16_v_f16mf2_m ( ... ) __riscv_vloxseg6ei16_v_f16mf2_tumu(__VA_ARGS__)

◆ vloxseg6ei16_v_f16mf4

#define vloxseg6ei16_v_f16mf4 ( ... ) __riscv_vloxseg6ei16_v_f16mf4(__VA_ARGS__)

◆ vloxseg6ei16_v_f16mf4_m

#define vloxseg6ei16_v_f16mf4_m ( ... ) __riscv_vloxseg6ei16_v_f16mf4_tumu(__VA_ARGS__)

◆ vloxseg6ei16_v_f32m1

#define vloxseg6ei16_v_f32m1 ( ... ) __riscv_vloxseg6ei16_v_f32m1(__VA_ARGS__)

◆ vloxseg6ei16_v_f32m1_m

#define vloxseg6ei16_v_f32m1_m ( ... ) __riscv_vloxseg6ei16_v_f32m1_tumu(__VA_ARGS__)

◆ vloxseg6ei16_v_f32mf2

#define vloxseg6ei16_v_f32mf2 ( ... ) __riscv_vloxseg6ei16_v_f32mf2(__VA_ARGS__)

◆ vloxseg6ei16_v_f32mf2_m

#define vloxseg6ei16_v_f32mf2_m ( ... ) __riscv_vloxseg6ei16_v_f32mf2_tumu(__VA_ARGS__)

◆ vloxseg6ei16_v_f64m1

#define vloxseg6ei16_v_f64m1 ( ... ) __riscv_vloxseg6ei16_v_f64m1(__VA_ARGS__)

◆ vloxseg6ei16_v_f64m1_m

#define vloxseg6ei16_v_f64m1_m ( ... ) __riscv_vloxseg6ei16_v_f64m1_tumu(__VA_ARGS__)

◆ vloxseg6ei16_v_i16m1

#define vloxseg6ei16_v_i16m1 ( ... ) __riscv_vloxseg6ei16_v_i16m1(__VA_ARGS__)

◆ vloxseg6ei16_v_i16m1_m

#define vloxseg6ei16_v_i16m1_m ( ... ) __riscv_vloxseg6ei16_v_i16m1_tumu(__VA_ARGS__)

◆ vloxseg6ei16_v_i16mf2

#define vloxseg6ei16_v_i16mf2 ( ... ) __riscv_vloxseg6ei16_v_i16mf2(__VA_ARGS__)

◆ vloxseg6ei16_v_i16mf2_m

#define vloxseg6ei16_v_i16mf2_m ( ... ) __riscv_vloxseg6ei16_v_i16mf2_tumu(__VA_ARGS__)

◆ vloxseg6ei16_v_i16mf4

#define vloxseg6ei16_v_i16mf4 ( ... ) __riscv_vloxseg6ei16_v_i16mf4(__VA_ARGS__)

◆ vloxseg6ei16_v_i16mf4_m

#define vloxseg6ei16_v_i16mf4_m ( ... ) __riscv_vloxseg6ei16_v_i16mf4_tumu(__VA_ARGS__)

◆ vloxseg6ei16_v_i32m1

#define vloxseg6ei16_v_i32m1 ( ... ) __riscv_vloxseg6ei16_v_i32m1(__VA_ARGS__)

◆ vloxseg6ei16_v_i32m1_m

#define vloxseg6ei16_v_i32m1_m ( ... ) __riscv_vloxseg6ei16_v_i32m1_tumu(__VA_ARGS__)

◆ vloxseg6ei16_v_i32mf2

#define vloxseg6ei16_v_i32mf2 ( ... ) __riscv_vloxseg6ei16_v_i32mf2(__VA_ARGS__)

◆ vloxseg6ei16_v_i32mf2_m

#define vloxseg6ei16_v_i32mf2_m ( ... ) __riscv_vloxseg6ei16_v_i32mf2_tumu(__VA_ARGS__)

◆ vloxseg6ei16_v_i64m1

#define vloxseg6ei16_v_i64m1 ( ... ) __riscv_vloxseg6ei16_v_i64m1(__VA_ARGS__)

◆ vloxseg6ei16_v_i64m1_m

#define vloxseg6ei16_v_i64m1_m ( ... ) __riscv_vloxseg6ei16_v_i64m1_tumu(__VA_ARGS__)

◆ vloxseg6ei16_v_i8m1

#define vloxseg6ei16_v_i8m1 ( ... ) __riscv_vloxseg6ei16_v_i8m1(__VA_ARGS__)

◆ vloxseg6ei16_v_i8m1_m

#define vloxseg6ei16_v_i8m1_m ( ... ) __riscv_vloxseg6ei16_v_i8m1_tumu(__VA_ARGS__)

◆ vloxseg6ei16_v_i8mf2

#define vloxseg6ei16_v_i8mf2 ( ... ) __riscv_vloxseg6ei16_v_i8mf2(__VA_ARGS__)

◆ vloxseg6ei16_v_i8mf2_m

#define vloxseg6ei16_v_i8mf2_m ( ... ) __riscv_vloxseg6ei16_v_i8mf2_tumu(__VA_ARGS__)

◆ vloxseg6ei16_v_i8mf4

#define vloxseg6ei16_v_i8mf4 ( ... ) __riscv_vloxseg6ei16_v_i8mf4(__VA_ARGS__)

◆ vloxseg6ei16_v_i8mf4_m

#define vloxseg6ei16_v_i8mf4_m ( ... ) __riscv_vloxseg6ei16_v_i8mf4_tumu(__VA_ARGS__)

◆ vloxseg6ei16_v_i8mf8

#define vloxseg6ei16_v_i8mf8 ( ... ) __riscv_vloxseg6ei16_v_i8mf8(__VA_ARGS__)

◆ vloxseg6ei16_v_i8mf8_m

#define vloxseg6ei16_v_i8mf8_m ( ... ) __riscv_vloxseg6ei16_v_i8mf8_tumu(__VA_ARGS__)

◆ vloxseg6ei16_v_u16m1

#define vloxseg6ei16_v_u16m1 ( ... ) __riscv_vloxseg6ei16_v_u16m1(__VA_ARGS__)

◆ vloxseg6ei16_v_u16m1_m

#define vloxseg6ei16_v_u16m1_m ( ... ) __riscv_vloxseg6ei16_v_u16m1_tumu(__VA_ARGS__)

◆ vloxseg6ei16_v_u16mf2

#define vloxseg6ei16_v_u16mf2 ( ... ) __riscv_vloxseg6ei16_v_u16mf2(__VA_ARGS__)

◆ vloxseg6ei16_v_u16mf2_m

#define vloxseg6ei16_v_u16mf2_m ( ... ) __riscv_vloxseg6ei16_v_u16mf2_tumu(__VA_ARGS__)

◆ vloxseg6ei16_v_u16mf4

#define vloxseg6ei16_v_u16mf4 ( ... ) __riscv_vloxseg6ei16_v_u16mf4(__VA_ARGS__)

◆ vloxseg6ei16_v_u16mf4_m

#define vloxseg6ei16_v_u16mf4_m ( ... ) __riscv_vloxseg6ei16_v_u16mf4_tumu(__VA_ARGS__)

◆ vloxseg6ei16_v_u32m1

#define vloxseg6ei16_v_u32m1 ( ... ) __riscv_vloxseg6ei16_v_u32m1(__VA_ARGS__)

◆ vloxseg6ei16_v_u32m1_m

#define vloxseg6ei16_v_u32m1_m ( ... ) __riscv_vloxseg6ei16_v_u32m1_tumu(__VA_ARGS__)

◆ vloxseg6ei16_v_u32mf2

#define vloxseg6ei16_v_u32mf2 ( ... ) __riscv_vloxseg6ei16_v_u32mf2(__VA_ARGS__)

◆ vloxseg6ei16_v_u32mf2_m

#define vloxseg6ei16_v_u32mf2_m ( ... ) __riscv_vloxseg6ei16_v_u32mf2_tumu(__VA_ARGS__)

◆ vloxseg6ei16_v_u64m1

#define vloxseg6ei16_v_u64m1 ( ... ) __riscv_vloxseg6ei16_v_u64m1(__VA_ARGS__)

◆ vloxseg6ei16_v_u64m1_m

#define vloxseg6ei16_v_u64m1_m ( ... ) __riscv_vloxseg6ei16_v_u64m1_tumu(__VA_ARGS__)

◆ vloxseg6ei16_v_u8m1

#define vloxseg6ei16_v_u8m1 ( ... ) __riscv_vloxseg6ei16_v_u8m1(__VA_ARGS__)

◆ vloxseg6ei16_v_u8m1_m

#define vloxseg6ei16_v_u8m1_m ( ... ) __riscv_vloxseg6ei16_v_u8m1_tumu(__VA_ARGS__)

◆ vloxseg6ei16_v_u8mf2

#define vloxseg6ei16_v_u8mf2 ( ... ) __riscv_vloxseg6ei16_v_u8mf2(__VA_ARGS__)

◆ vloxseg6ei16_v_u8mf2_m

#define vloxseg6ei16_v_u8mf2_m ( ... ) __riscv_vloxseg6ei16_v_u8mf2_tumu(__VA_ARGS__)

◆ vloxseg6ei16_v_u8mf4

#define vloxseg6ei16_v_u8mf4 ( ... ) __riscv_vloxseg6ei16_v_u8mf4(__VA_ARGS__)

◆ vloxseg6ei16_v_u8mf4_m

#define vloxseg6ei16_v_u8mf4_m ( ... ) __riscv_vloxseg6ei16_v_u8mf4_tumu(__VA_ARGS__)

◆ vloxseg6ei16_v_u8mf8

#define vloxseg6ei16_v_u8mf8 ( ... ) __riscv_vloxseg6ei16_v_u8mf8(__VA_ARGS__)

◆ vloxseg6ei16_v_u8mf8_m

#define vloxseg6ei16_v_u8mf8_m ( ... ) __riscv_vloxseg6ei16_v_u8mf8_tumu(__VA_ARGS__)

◆ vloxseg6ei32_v_f16m1

#define vloxseg6ei32_v_f16m1 ( ... ) __riscv_vloxseg6ei32_v_f16m1(__VA_ARGS__)

◆ vloxseg6ei32_v_f16m1_m

#define vloxseg6ei32_v_f16m1_m ( ... ) __riscv_vloxseg6ei32_v_f16m1_tumu(__VA_ARGS__)

◆ vloxseg6ei32_v_f16mf2

#define vloxseg6ei32_v_f16mf2 ( ... ) __riscv_vloxseg6ei32_v_f16mf2(__VA_ARGS__)

◆ vloxseg6ei32_v_f16mf2_m

#define vloxseg6ei32_v_f16mf2_m ( ... ) __riscv_vloxseg6ei32_v_f16mf2_tumu(__VA_ARGS__)

◆ vloxseg6ei32_v_f16mf4

#define vloxseg6ei32_v_f16mf4 ( ... ) __riscv_vloxseg6ei32_v_f16mf4(__VA_ARGS__)

◆ vloxseg6ei32_v_f16mf4_m

#define vloxseg6ei32_v_f16mf4_m ( ... ) __riscv_vloxseg6ei32_v_f16mf4_tumu(__VA_ARGS__)

◆ vloxseg6ei32_v_f32m1

#define vloxseg6ei32_v_f32m1 ( ... ) __riscv_vloxseg6ei32_v_f32m1(__VA_ARGS__)

◆ vloxseg6ei32_v_f32m1_m

#define vloxseg6ei32_v_f32m1_m ( ... ) __riscv_vloxseg6ei32_v_f32m1_tumu(__VA_ARGS__)

◆ vloxseg6ei32_v_f32mf2

#define vloxseg6ei32_v_f32mf2 ( ... ) __riscv_vloxseg6ei32_v_f32mf2(__VA_ARGS__)

◆ vloxseg6ei32_v_f32mf2_m

#define vloxseg6ei32_v_f32mf2_m ( ... ) __riscv_vloxseg6ei32_v_f32mf2_tumu(__VA_ARGS__)

◆ vloxseg6ei32_v_f64m1

#define vloxseg6ei32_v_f64m1 ( ... ) __riscv_vloxseg6ei32_v_f64m1(__VA_ARGS__)

◆ vloxseg6ei32_v_f64m1_m

#define vloxseg6ei32_v_f64m1_m ( ... ) __riscv_vloxseg6ei32_v_f64m1_tumu(__VA_ARGS__)

◆ vloxseg6ei32_v_i16m1

#define vloxseg6ei32_v_i16m1 ( ... ) __riscv_vloxseg6ei32_v_i16m1(__VA_ARGS__)

◆ vloxseg6ei32_v_i16m1_m

#define vloxseg6ei32_v_i16m1_m ( ... ) __riscv_vloxseg6ei32_v_i16m1_tumu(__VA_ARGS__)

◆ vloxseg6ei32_v_i16mf2

#define vloxseg6ei32_v_i16mf2 ( ... ) __riscv_vloxseg6ei32_v_i16mf2(__VA_ARGS__)

◆ vloxseg6ei32_v_i16mf2_m

#define vloxseg6ei32_v_i16mf2_m ( ... ) __riscv_vloxseg6ei32_v_i16mf2_tumu(__VA_ARGS__)

◆ vloxseg6ei32_v_i16mf4

#define vloxseg6ei32_v_i16mf4 ( ... ) __riscv_vloxseg6ei32_v_i16mf4(__VA_ARGS__)

◆ vloxseg6ei32_v_i16mf4_m

#define vloxseg6ei32_v_i16mf4_m ( ... ) __riscv_vloxseg6ei32_v_i16mf4_tumu(__VA_ARGS__)

◆ vloxseg6ei32_v_i32m1

#define vloxseg6ei32_v_i32m1 ( ... ) __riscv_vloxseg6ei32_v_i32m1(__VA_ARGS__)

◆ vloxseg6ei32_v_i32m1_m

#define vloxseg6ei32_v_i32m1_m ( ... ) __riscv_vloxseg6ei32_v_i32m1_tumu(__VA_ARGS__)

◆ vloxseg6ei32_v_i32mf2

#define vloxseg6ei32_v_i32mf2 ( ... ) __riscv_vloxseg6ei32_v_i32mf2(__VA_ARGS__)

◆ vloxseg6ei32_v_i32mf2_m

#define vloxseg6ei32_v_i32mf2_m ( ... ) __riscv_vloxseg6ei32_v_i32mf2_tumu(__VA_ARGS__)

◆ vloxseg6ei32_v_i64m1

#define vloxseg6ei32_v_i64m1 ( ... ) __riscv_vloxseg6ei32_v_i64m1(__VA_ARGS__)

◆ vloxseg6ei32_v_i64m1_m

#define vloxseg6ei32_v_i64m1_m ( ... ) __riscv_vloxseg6ei32_v_i64m1_tumu(__VA_ARGS__)

◆ vloxseg6ei32_v_i8m1

#define vloxseg6ei32_v_i8m1 ( ... ) __riscv_vloxseg6ei32_v_i8m1(__VA_ARGS__)

◆ vloxseg6ei32_v_i8m1_m

#define vloxseg6ei32_v_i8m1_m ( ... ) __riscv_vloxseg6ei32_v_i8m1_tumu(__VA_ARGS__)

◆ vloxseg6ei32_v_i8mf2

#define vloxseg6ei32_v_i8mf2 ( ... ) __riscv_vloxseg6ei32_v_i8mf2(__VA_ARGS__)

◆ vloxseg6ei32_v_i8mf2_m

#define vloxseg6ei32_v_i8mf2_m ( ... ) __riscv_vloxseg6ei32_v_i8mf2_tumu(__VA_ARGS__)

◆ vloxseg6ei32_v_i8mf4

#define vloxseg6ei32_v_i8mf4 ( ... ) __riscv_vloxseg6ei32_v_i8mf4(__VA_ARGS__)

◆ vloxseg6ei32_v_i8mf4_m

#define vloxseg6ei32_v_i8mf4_m ( ... ) __riscv_vloxseg6ei32_v_i8mf4_tumu(__VA_ARGS__)

◆ vloxseg6ei32_v_i8mf8

#define vloxseg6ei32_v_i8mf8 ( ... ) __riscv_vloxseg6ei32_v_i8mf8(__VA_ARGS__)

◆ vloxseg6ei32_v_i8mf8_m

#define vloxseg6ei32_v_i8mf8_m ( ... ) __riscv_vloxseg6ei32_v_i8mf8_tumu(__VA_ARGS__)

◆ vloxseg6ei32_v_u16m1

#define vloxseg6ei32_v_u16m1 ( ... ) __riscv_vloxseg6ei32_v_u16m1(__VA_ARGS__)

◆ vloxseg6ei32_v_u16m1_m

#define vloxseg6ei32_v_u16m1_m ( ... ) __riscv_vloxseg6ei32_v_u16m1_tumu(__VA_ARGS__)

◆ vloxseg6ei32_v_u16mf2

#define vloxseg6ei32_v_u16mf2 ( ... ) __riscv_vloxseg6ei32_v_u16mf2(__VA_ARGS__)

◆ vloxseg6ei32_v_u16mf2_m

#define vloxseg6ei32_v_u16mf2_m ( ... ) __riscv_vloxseg6ei32_v_u16mf2_tumu(__VA_ARGS__)

◆ vloxseg6ei32_v_u16mf4

#define vloxseg6ei32_v_u16mf4 ( ... ) __riscv_vloxseg6ei32_v_u16mf4(__VA_ARGS__)

◆ vloxseg6ei32_v_u16mf4_m

#define vloxseg6ei32_v_u16mf4_m ( ... ) __riscv_vloxseg6ei32_v_u16mf4_tumu(__VA_ARGS__)

◆ vloxseg6ei32_v_u32m1

#define vloxseg6ei32_v_u32m1 ( ... ) __riscv_vloxseg6ei32_v_u32m1(__VA_ARGS__)

◆ vloxseg6ei32_v_u32m1_m

#define vloxseg6ei32_v_u32m1_m ( ... ) __riscv_vloxseg6ei32_v_u32m1_tumu(__VA_ARGS__)

◆ vloxseg6ei32_v_u32mf2

#define vloxseg6ei32_v_u32mf2 ( ... ) __riscv_vloxseg6ei32_v_u32mf2(__VA_ARGS__)

◆ vloxseg6ei32_v_u32mf2_m

#define vloxseg6ei32_v_u32mf2_m ( ... ) __riscv_vloxseg6ei32_v_u32mf2_tumu(__VA_ARGS__)

◆ vloxseg6ei32_v_u64m1

#define vloxseg6ei32_v_u64m1 ( ... ) __riscv_vloxseg6ei32_v_u64m1(__VA_ARGS__)

◆ vloxseg6ei32_v_u64m1_m

#define vloxseg6ei32_v_u64m1_m ( ... ) __riscv_vloxseg6ei32_v_u64m1_tumu(__VA_ARGS__)

◆ vloxseg6ei32_v_u8m1

#define vloxseg6ei32_v_u8m1 ( ... ) __riscv_vloxseg6ei32_v_u8m1(__VA_ARGS__)

◆ vloxseg6ei32_v_u8m1_m

#define vloxseg6ei32_v_u8m1_m ( ... ) __riscv_vloxseg6ei32_v_u8m1_tumu(__VA_ARGS__)

◆ vloxseg6ei32_v_u8mf2

#define vloxseg6ei32_v_u8mf2 ( ... ) __riscv_vloxseg6ei32_v_u8mf2(__VA_ARGS__)

◆ vloxseg6ei32_v_u8mf2_m

#define vloxseg6ei32_v_u8mf2_m ( ... ) __riscv_vloxseg6ei32_v_u8mf2_tumu(__VA_ARGS__)

◆ vloxseg6ei32_v_u8mf4

#define vloxseg6ei32_v_u8mf4 ( ... ) __riscv_vloxseg6ei32_v_u8mf4(__VA_ARGS__)

◆ vloxseg6ei32_v_u8mf4_m

#define vloxseg6ei32_v_u8mf4_m ( ... ) __riscv_vloxseg6ei32_v_u8mf4_tumu(__VA_ARGS__)

◆ vloxseg6ei32_v_u8mf8

#define vloxseg6ei32_v_u8mf8 ( ... ) __riscv_vloxseg6ei32_v_u8mf8(__VA_ARGS__)

◆ vloxseg6ei32_v_u8mf8_m

#define vloxseg6ei32_v_u8mf8_m ( ... ) __riscv_vloxseg6ei32_v_u8mf8_tumu(__VA_ARGS__)

◆ vloxseg6ei64_v_f16m1

#define vloxseg6ei64_v_f16m1 ( ... ) __riscv_vloxseg6ei64_v_f16m1(__VA_ARGS__)

◆ vloxseg6ei64_v_f16m1_m

#define vloxseg6ei64_v_f16m1_m ( ... ) __riscv_vloxseg6ei64_v_f16m1_tumu(__VA_ARGS__)

◆ vloxseg6ei64_v_f16mf2

#define vloxseg6ei64_v_f16mf2 ( ... ) __riscv_vloxseg6ei64_v_f16mf2(__VA_ARGS__)

◆ vloxseg6ei64_v_f16mf2_m

#define vloxseg6ei64_v_f16mf2_m ( ... ) __riscv_vloxseg6ei64_v_f16mf2_tumu(__VA_ARGS__)

◆ vloxseg6ei64_v_f16mf4

#define vloxseg6ei64_v_f16mf4 ( ... ) __riscv_vloxseg6ei64_v_f16mf4(__VA_ARGS__)

◆ vloxseg6ei64_v_f16mf4_m

#define vloxseg6ei64_v_f16mf4_m ( ... ) __riscv_vloxseg6ei64_v_f16mf4_tumu(__VA_ARGS__)

◆ vloxseg6ei64_v_f32m1

#define vloxseg6ei64_v_f32m1 ( ... ) __riscv_vloxseg6ei64_v_f32m1(__VA_ARGS__)

◆ vloxseg6ei64_v_f32m1_m

#define vloxseg6ei64_v_f32m1_m ( ... ) __riscv_vloxseg6ei64_v_f32m1_tumu(__VA_ARGS__)

◆ vloxseg6ei64_v_f32mf2

#define vloxseg6ei64_v_f32mf2 ( ... ) __riscv_vloxseg6ei64_v_f32mf2(__VA_ARGS__)

◆ vloxseg6ei64_v_f32mf2_m

#define vloxseg6ei64_v_f32mf2_m ( ... ) __riscv_vloxseg6ei64_v_f32mf2_tumu(__VA_ARGS__)

◆ vloxseg6ei64_v_f64m1

#define vloxseg6ei64_v_f64m1 ( ... ) __riscv_vloxseg6ei64_v_f64m1(__VA_ARGS__)

◆ vloxseg6ei64_v_f64m1_m

#define vloxseg6ei64_v_f64m1_m ( ... ) __riscv_vloxseg6ei64_v_f64m1_tumu(__VA_ARGS__)

◆ vloxseg6ei64_v_i16m1

#define vloxseg6ei64_v_i16m1 ( ... ) __riscv_vloxseg6ei64_v_i16m1(__VA_ARGS__)

◆ vloxseg6ei64_v_i16m1_m

#define vloxseg6ei64_v_i16m1_m ( ... ) __riscv_vloxseg6ei64_v_i16m1_tumu(__VA_ARGS__)

◆ vloxseg6ei64_v_i16mf2

#define vloxseg6ei64_v_i16mf2 ( ... ) __riscv_vloxseg6ei64_v_i16mf2(__VA_ARGS__)

◆ vloxseg6ei64_v_i16mf2_m

#define vloxseg6ei64_v_i16mf2_m ( ... ) __riscv_vloxseg6ei64_v_i16mf2_tumu(__VA_ARGS__)

◆ vloxseg6ei64_v_i16mf4

#define vloxseg6ei64_v_i16mf4 ( ... ) __riscv_vloxseg6ei64_v_i16mf4(__VA_ARGS__)

◆ vloxseg6ei64_v_i16mf4_m

#define vloxseg6ei64_v_i16mf4_m ( ... ) __riscv_vloxseg6ei64_v_i16mf4_tumu(__VA_ARGS__)

◆ vloxseg6ei64_v_i32m1

#define vloxseg6ei64_v_i32m1 ( ... ) __riscv_vloxseg6ei64_v_i32m1(__VA_ARGS__)

◆ vloxseg6ei64_v_i32m1_m

#define vloxseg6ei64_v_i32m1_m ( ... ) __riscv_vloxseg6ei64_v_i32m1_tumu(__VA_ARGS__)

◆ vloxseg6ei64_v_i32mf2

#define vloxseg6ei64_v_i32mf2 ( ... ) __riscv_vloxseg6ei64_v_i32mf2(__VA_ARGS__)

◆ vloxseg6ei64_v_i32mf2_m

#define vloxseg6ei64_v_i32mf2_m ( ... ) __riscv_vloxseg6ei64_v_i32mf2_tumu(__VA_ARGS__)

◆ vloxseg6ei64_v_i64m1

#define vloxseg6ei64_v_i64m1 ( ... ) __riscv_vloxseg6ei64_v_i64m1(__VA_ARGS__)

◆ vloxseg6ei64_v_i64m1_m

#define vloxseg6ei64_v_i64m1_m ( ... ) __riscv_vloxseg6ei64_v_i64m1_tumu(__VA_ARGS__)

◆ vloxseg6ei64_v_i8m1

#define vloxseg6ei64_v_i8m1 ( ... ) __riscv_vloxseg6ei64_v_i8m1(__VA_ARGS__)

◆ vloxseg6ei64_v_i8m1_m

#define vloxseg6ei64_v_i8m1_m ( ... ) __riscv_vloxseg6ei64_v_i8m1_tumu(__VA_ARGS__)

◆ vloxseg6ei64_v_i8mf2

#define vloxseg6ei64_v_i8mf2 ( ... ) __riscv_vloxseg6ei64_v_i8mf2(__VA_ARGS__)

◆ vloxseg6ei64_v_i8mf2_m

#define vloxseg6ei64_v_i8mf2_m ( ... ) __riscv_vloxseg6ei64_v_i8mf2_tumu(__VA_ARGS__)

◆ vloxseg6ei64_v_i8mf4

#define vloxseg6ei64_v_i8mf4 ( ... ) __riscv_vloxseg6ei64_v_i8mf4(__VA_ARGS__)

◆ vloxseg6ei64_v_i8mf4_m

#define vloxseg6ei64_v_i8mf4_m ( ... ) __riscv_vloxseg6ei64_v_i8mf4_tumu(__VA_ARGS__)

◆ vloxseg6ei64_v_i8mf8

#define vloxseg6ei64_v_i8mf8 ( ... ) __riscv_vloxseg6ei64_v_i8mf8(__VA_ARGS__)

◆ vloxseg6ei64_v_i8mf8_m

#define vloxseg6ei64_v_i8mf8_m ( ... ) __riscv_vloxseg6ei64_v_i8mf8_tumu(__VA_ARGS__)

◆ vloxseg6ei64_v_u16m1

#define vloxseg6ei64_v_u16m1 ( ... ) __riscv_vloxseg6ei64_v_u16m1(__VA_ARGS__)

◆ vloxseg6ei64_v_u16m1_m

#define vloxseg6ei64_v_u16m1_m ( ... ) __riscv_vloxseg6ei64_v_u16m1_tumu(__VA_ARGS__)

◆ vloxseg6ei64_v_u16mf2

#define vloxseg6ei64_v_u16mf2 ( ... ) __riscv_vloxseg6ei64_v_u16mf2(__VA_ARGS__)

◆ vloxseg6ei64_v_u16mf2_m

#define vloxseg6ei64_v_u16mf2_m ( ... ) __riscv_vloxseg6ei64_v_u16mf2_tumu(__VA_ARGS__)

◆ vloxseg6ei64_v_u16mf4

#define vloxseg6ei64_v_u16mf4 ( ... ) __riscv_vloxseg6ei64_v_u16mf4(__VA_ARGS__)

◆ vloxseg6ei64_v_u16mf4_m

#define vloxseg6ei64_v_u16mf4_m ( ... ) __riscv_vloxseg6ei64_v_u16mf4_tumu(__VA_ARGS__)

◆ vloxseg6ei64_v_u32m1

#define vloxseg6ei64_v_u32m1 ( ... ) __riscv_vloxseg6ei64_v_u32m1(__VA_ARGS__)

◆ vloxseg6ei64_v_u32m1_m

#define vloxseg6ei64_v_u32m1_m ( ... ) __riscv_vloxseg6ei64_v_u32m1_tumu(__VA_ARGS__)

◆ vloxseg6ei64_v_u32mf2

#define vloxseg6ei64_v_u32mf2 ( ... ) __riscv_vloxseg6ei64_v_u32mf2(__VA_ARGS__)

◆ vloxseg6ei64_v_u32mf2_m

#define vloxseg6ei64_v_u32mf2_m ( ... ) __riscv_vloxseg6ei64_v_u32mf2_tumu(__VA_ARGS__)

◆ vloxseg6ei64_v_u64m1

#define vloxseg6ei64_v_u64m1 ( ... ) __riscv_vloxseg6ei64_v_u64m1(__VA_ARGS__)

◆ vloxseg6ei64_v_u64m1_m

#define vloxseg6ei64_v_u64m1_m ( ... ) __riscv_vloxseg6ei64_v_u64m1_tumu(__VA_ARGS__)

◆ vloxseg6ei64_v_u8m1

#define vloxseg6ei64_v_u8m1 ( ... ) __riscv_vloxseg6ei64_v_u8m1(__VA_ARGS__)

◆ vloxseg6ei64_v_u8m1_m

#define vloxseg6ei64_v_u8m1_m ( ... ) __riscv_vloxseg6ei64_v_u8m1_tumu(__VA_ARGS__)

◆ vloxseg6ei64_v_u8mf2

#define vloxseg6ei64_v_u8mf2 ( ... ) __riscv_vloxseg6ei64_v_u8mf2(__VA_ARGS__)

◆ vloxseg6ei64_v_u8mf2_m

#define vloxseg6ei64_v_u8mf2_m ( ... ) __riscv_vloxseg6ei64_v_u8mf2_tumu(__VA_ARGS__)

◆ vloxseg6ei64_v_u8mf4

#define vloxseg6ei64_v_u8mf4 ( ... ) __riscv_vloxseg6ei64_v_u8mf4(__VA_ARGS__)

◆ vloxseg6ei64_v_u8mf4_m

#define vloxseg6ei64_v_u8mf4_m ( ... ) __riscv_vloxseg6ei64_v_u8mf4_tumu(__VA_ARGS__)

◆ vloxseg6ei64_v_u8mf8

#define vloxseg6ei64_v_u8mf8 ( ... ) __riscv_vloxseg6ei64_v_u8mf8(__VA_ARGS__)

◆ vloxseg6ei64_v_u8mf8_m

#define vloxseg6ei64_v_u8mf8_m ( ... ) __riscv_vloxseg6ei64_v_u8mf8_tumu(__VA_ARGS__)

◆ vloxseg6ei8_v_f16m1

#define vloxseg6ei8_v_f16m1 ( ... ) __riscv_vloxseg6ei8_v_f16m1(__VA_ARGS__)

◆ vloxseg6ei8_v_f16m1_m

#define vloxseg6ei8_v_f16m1_m ( ... ) __riscv_vloxseg6ei8_v_f16m1_tumu(__VA_ARGS__)

◆ vloxseg6ei8_v_f16mf2

#define vloxseg6ei8_v_f16mf2 ( ... ) __riscv_vloxseg6ei8_v_f16mf2(__VA_ARGS__)

◆ vloxseg6ei8_v_f16mf2_m

#define vloxseg6ei8_v_f16mf2_m ( ... ) __riscv_vloxseg6ei8_v_f16mf2_tumu(__VA_ARGS__)

◆ vloxseg6ei8_v_f16mf4

#define vloxseg6ei8_v_f16mf4 ( ... ) __riscv_vloxseg6ei8_v_f16mf4(__VA_ARGS__)

◆ vloxseg6ei8_v_f16mf4_m

#define vloxseg6ei8_v_f16mf4_m ( ... ) __riscv_vloxseg6ei8_v_f16mf4_tumu(__VA_ARGS__)

◆ vloxseg6ei8_v_f32m1

#define vloxseg6ei8_v_f32m1 ( ... ) __riscv_vloxseg6ei8_v_f32m1(__VA_ARGS__)

◆ vloxseg6ei8_v_f32m1_m

#define vloxseg6ei8_v_f32m1_m ( ... ) __riscv_vloxseg6ei8_v_f32m1_tumu(__VA_ARGS__)

◆ vloxseg6ei8_v_f32mf2

#define vloxseg6ei8_v_f32mf2 ( ... ) __riscv_vloxseg6ei8_v_f32mf2(__VA_ARGS__)

◆ vloxseg6ei8_v_f32mf2_m

#define vloxseg6ei8_v_f32mf2_m ( ... ) __riscv_vloxseg6ei8_v_f32mf2_tumu(__VA_ARGS__)

◆ vloxseg6ei8_v_f64m1

#define vloxseg6ei8_v_f64m1 ( ... ) __riscv_vloxseg6ei8_v_f64m1(__VA_ARGS__)

◆ vloxseg6ei8_v_f64m1_m

#define vloxseg6ei8_v_f64m1_m ( ... ) __riscv_vloxseg6ei8_v_f64m1_tumu(__VA_ARGS__)

◆ vloxseg6ei8_v_i16m1

#define vloxseg6ei8_v_i16m1 ( ... ) __riscv_vloxseg6ei8_v_i16m1(__VA_ARGS__)

◆ vloxseg6ei8_v_i16m1_m

#define vloxseg6ei8_v_i16m1_m ( ... ) __riscv_vloxseg6ei8_v_i16m1_tumu(__VA_ARGS__)

◆ vloxseg6ei8_v_i16mf2

#define vloxseg6ei8_v_i16mf2 ( ... ) __riscv_vloxseg6ei8_v_i16mf2(__VA_ARGS__)

◆ vloxseg6ei8_v_i16mf2_m

#define vloxseg6ei8_v_i16mf2_m ( ... ) __riscv_vloxseg6ei8_v_i16mf2_tumu(__VA_ARGS__)

◆ vloxseg6ei8_v_i16mf4

#define vloxseg6ei8_v_i16mf4 ( ... ) __riscv_vloxseg6ei8_v_i16mf4(__VA_ARGS__)

◆ vloxseg6ei8_v_i16mf4_m

#define vloxseg6ei8_v_i16mf4_m ( ... ) __riscv_vloxseg6ei8_v_i16mf4_tumu(__VA_ARGS__)

◆ vloxseg6ei8_v_i32m1

#define vloxseg6ei8_v_i32m1 ( ... ) __riscv_vloxseg6ei8_v_i32m1(__VA_ARGS__)

◆ vloxseg6ei8_v_i32m1_m

#define vloxseg6ei8_v_i32m1_m ( ... ) __riscv_vloxseg6ei8_v_i32m1_tumu(__VA_ARGS__)

◆ vloxseg6ei8_v_i32mf2

#define vloxseg6ei8_v_i32mf2 ( ... ) __riscv_vloxseg6ei8_v_i32mf2(__VA_ARGS__)

◆ vloxseg6ei8_v_i32mf2_m

#define vloxseg6ei8_v_i32mf2_m ( ... ) __riscv_vloxseg6ei8_v_i32mf2_tumu(__VA_ARGS__)

◆ vloxseg6ei8_v_i64m1

#define vloxseg6ei8_v_i64m1 ( ... ) __riscv_vloxseg6ei8_v_i64m1(__VA_ARGS__)

◆ vloxseg6ei8_v_i64m1_m

#define vloxseg6ei8_v_i64m1_m ( ... ) __riscv_vloxseg6ei8_v_i64m1_tumu(__VA_ARGS__)

◆ vloxseg6ei8_v_i8m1

#define vloxseg6ei8_v_i8m1 ( ... ) __riscv_vloxseg6ei8_v_i8m1(__VA_ARGS__)

◆ vloxseg6ei8_v_i8m1_m

#define vloxseg6ei8_v_i8m1_m ( ... ) __riscv_vloxseg6ei8_v_i8m1_tumu(__VA_ARGS__)

◆ vloxseg6ei8_v_i8mf2

#define vloxseg6ei8_v_i8mf2 ( ... ) __riscv_vloxseg6ei8_v_i8mf2(__VA_ARGS__)

◆ vloxseg6ei8_v_i8mf2_m

#define vloxseg6ei8_v_i8mf2_m ( ... ) __riscv_vloxseg6ei8_v_i8mf2_tumu(__VA_ARGS__)

◆ vloxseg6ei8_v_i8mf4

#define vloxseg6ei8_v_i8mf4 ( ... ) __riscv_vloxseg6ei8_v_i8mf4(__VA_ARGS__)

◆ vloxseg6ei8_v_i8mf4_m

#define vloxseg6ei8_v_i8mf4_m ( ... ) __riscv_vloxseg6ei8_v_i8mf4_tumu(__VA_ARGS__)

◆ vloxseg6ei8_v_i8mf8

#define vloxseg6ei8_v_i8mf8 ( ... ) __riscv_vloxseg6ei8_v_i8mf8(__VA_ARGS__)

◆ vloxseg6ei8_v_i8mf8_m

#define vloxseg6ei8_v_i8mf8_m ( ... ) __riscv_vloxseg6ei8_v_i8mf8_tumu(__VA_ARGS__)

◆ vloxseg6ei8_v_u16m1

#define vloxseg6ei8_v_u16m1 ( ... ) __riscv_vloxseg6ei8_v_u16m1(__VA_ARGS__)

◆ vloxseg6ei8_v_u16m1_m

#define vloxseg6ei8_v_u16m1_m ( ... ) __riscv_vloxseg6ei8_v_u16m1_tumu(__VA_ARGS__)

◆ vloxseg6ei8_v_u16mf2

#define vloxseg6ei8_v_u16mf2 ( ... ) __riscv_vloxseg6ei8_v_u16mf2(__VA_ARGS__)

◆ vloxseg6ei8_v_u16mf2_m

#define vloxseg6ei8_v_u16mf2_m ( ... ) __riscv_vloxseg6ei8_v_u16mf2_tumu(__VA_ARGS__)

◆ vloxseg6ei8_v_u16mf4

#define vloxseg6ei8_v_u16mf4 ( ... ) __riscv_vloxseg6ei8_v_u16mf4(__VA_ARGS__)

◆ vloxseg6ei8_v_u16mf4_m

#define vloxseg6ei8_v_u16mf4_m ( ... ) __riscv_vloxseg6ei8_v_u16mf4_tumu(__VA_ARGS__)

◆ vloxseg6ei8_v_u32m1

#define vloxseg6ei8_v_u32m1 ( ... ) __riscv_vloxseg6ei8_v_u32m1(__VA_ARGS__)

◆ vloxseg6ei8_v_u32m1_m

#define vloxseg6ei8_v_u32m1_m ( ... ) __riscv_vloxseg6ei8_v_u32m1_tumu(__VA_ARGS__)

◆ vloxseg6ei8_v_u32mf2

#define vloxseg6ei8_v_u32mf2 ( ... ) __riscv_vloxseg6ei8_v_u32mf2(__VA_ARGS__)

◆ vloxseg6ei8_v_u32mf2_m

#define vloxseg6ei8_v_u32mf2_m ( ... ) __riscv_vloxseg6ei8_v_u32mf2_tumu(__VA_ARGS__)

◆ vloxseg6ei8_v_u64m1

#define vloxseg6ei8_v_u64m1 ( ... ) __riscv_vloxseg6ei8_v_u64m1(__VA_ARGS__)

◆ vloxseg6ei8_v_u64m1_m

#define vloxseg6ei8_v_u64m1_m ( ... ) __riscv_vloxseg6ei8_v_u64m1_tumu(__VA_ARGS__)

◆ vloxseg6ei8_v_u8m1

#define vloxseg6ei8_v_u8m1 ( ... ) __riscv_vloxseg6ei8_v_u8m1(__VA_ARGS__)

◆ vloxseg6ei8_v_u8m1_m

#define vloxseg6ei8_v_u8m1_m ( ... ) __riscv_vloxseg6ei8_v_u8m1_tumu(__VA_ARGS__)

◆ vloxseg6ei8_v_u8mf2

#define vloxseg6ei8_v_u8mf2 ( ... ) __riscv_vloxseg6ei8_v_u8mf2(__VA_ARGS__)

◆ vloxseg6ei8_v_u8mf2_m

#define vloxseg6ei8_v_u8mf2_m ( ... ) __riscv_vloxseg6ei8_v_u8mf2_tumu(__VA_ARGS__)

◆ vloxseg6ei8_v_u8mf4

#define vloxseg6ei8_v_u8mf4 ( ... ) __riscv_vloxseg6ei8_v_u8mf4(__VA_ARGS__)

◆ vloxseg6ei8_v_u8mf4_m

#define vloxseg6ei8_v_u8mf4_m ( ... ) __riscv_vloxseg6ei8_v_u8mf4_tumu(__VA_ARGS__)

◆ vloxseg6ei8_v_u8mf8

#define vloxseg6ei8_v_u8mf8 ( ... ) __riscv_vloxseg6ei8_v_u8mf8(__VA_ARGS__)

◆ vloxseg6ei8_v_u8mf8_m

#define vloxseg6ei8_v_u8mf8_m ( ... ) __riscv_vloxseg6ei8_v_u8mf8_tumu(__VA_ARGS__)

◆ vloxseg7ei16_v_f16m1

#define vloxseg7ei16_v_f16m1 ( ... ) __riscv_vloxseg7ei16_v_f16m1(__VA_ARGS__)

◆ vloxseg7ei16_v_f16m1_m

#define vloxseg7ei16_v_f16m1_m ( ... ) __riscv_vloxseg7ei16_v_f16m1_tumu(__VA_ARGS__)

◆ vloxseg7ei16_v_f16mf2

#define vloxseg7ei16_v_f16mf2 ( ... ) __riscv_vloxseg7ei16_v_f16mf2(__VA_ARGS__)

◆ vloxseg7ei16_v_f16mf2_m

#define vloxseg7ei16_v_f16mf2_m ( ... ) __riscv_vloxseg7ei16_v_f16mf2_tumu(__VA_ARGS__)

◆ vloxseg7ei16_v_f16mf4

#define vloxseg7ei16_v_f16mf4 ( ... ) __riscv_vloxseg7ei16_v_f16mf4(__VA_ARGS__)

◆ vloxseg7ei16_v_f16mf4_m

#define vloxseg7ei16_v_f16mf4_m ( ... ) __riscv_vloxseg7ei16_v_f16mf4_tumu(__VA_ARGS__)

◆ vloxseg7ei16_v_f32m1

#define vloxseg7ei16_v_f32m1 ( ... ) __riscv_vloxseg7ei16_v_f32m1(__VA_ARGS__)

◆ vloxseg7ei16_v_f32m1_m

#define vloxseg7ei16_v_f32m1_m ( ... ) __riscv_vloxseg7ei16_v_f32m1_tumu(__VA_ARGS__)

◆ vloxseg7ei16_v_f32mf2

#define vloxseg7ei16_v_f32mf2 ( ... ) __riscv_vloxseg7ei16_v_f32mf2(__VA_ARGS__)

◆ vloxseg7ei16_v_f32mf2_m

#define vloxseg7ei16_v_f32mf2_m ( ... ) __riscv_vloxseg7ei16_v_f32mf2_tumu(__VA_ARGS__)

◆ vloxseg7ei16_v_f64m1

#define vloxseg7ei16_v_f64m1 ( ... ) __riscv_vloxseg7ei16_v_f64m1(__VA_ARGS__)

◆ vloxseg7ei16_v_f64m1_m

#define vloxseg7ei16_v_f64m1_m ( ... ) __riscv_vloxseg7ei16_v_f64m1_tumu(__VA_ARGS__)

◆ vloxseg7ei16_v_i16m1

#define vloxseg7ei16_v_i16m1 ( ... ) __riscv_vloxseg7ei16_v_i16m1(__VA_ARGS__)

◆ vloxseg7ei16_v_i16m1_m

#define vloxseg7ei16_v_i16m1_m ( ... ) __riscv_vloxseg7ei16_v_i16m1_tumu(__VA_ARGS__)

◆ vloxseg7ei16_v_i16mf2

#define vloxseg7ei16_v_i16mf2 ( ... ) __riscv_vloxseg7ei16_v_i16mf2(__VA_ARGS__)

◆ vloxseg7ei16_v_i16mf2_m

#define vloxseg7ei16_v_i16mf2_m ( ... ) __riscv_vloxseg7ei16_v_i16mf2_tumu(__VA_ARGS__)

◆ vloxseg7ei16_v_i16mf4

#define vloxseg7ei16_v_i16mf4 ( ... ) __riscv_vloxseg7ei16_v_i16mf4(__VA_ARGS__)

◆ vloxseg7ei16_v_i16mf4_m

#define vloxseg7ei16_v_i16mf4_m ( ... ) __riscv_vloxseg7ei16_v_i16mf4_tumu(__VA_ARGS__)

◆ vloxseg7ei16_v_i32m1

#define vloxseg7ei16_v_i32m1 ( ... ) __riscv_vloxseg7ei16_v_i32m1(__VA_ARGS__)

◆ vloxseg7ei16_v_i32m1_m

#define vloxseg7ei16_v_i32m1_m ( ... ) __riscv_vloxseg7ei16_v_i32m1_tumu(__VA_ARGS__)

◆ vloxseg7ei16_v_i32mf2

#define vloxseg7ei16_v_i32mf2 ( ... ) __riscv_vloxseg7ei16_v_i32mf2(__VA_ARGS__)

◆ vloxseg7ei16_v_i32mf2_m

#define vloxseg7ei16_v_i32mf2_m ( ... ) __riscv_vloxseg7ei16_v_i32mf2_tumu(__VA_ARGS__)

◆ vloxseg7ei16_v_i64m1

#define vloxseg7ei16_v_i64m1 ( ... ) __riscv_vloxseg7ei16_v_i64m1(__VA_ARGS__)

◆ vloxseg7ei16_v_i64m1_m

#define vloxseg7ei16_v_i64m1_m ( ... ) __riscv_vloxseg7ei16_v_i64m1_tumu(__VA_ARGS__)

◆ vloxseg7ei16_v_i8m1

#define vloxseg7ei16_v_i8m1 ( ... ) __riscv_vloxseg7ei16_v_i8m1(__VA_ARGS__)

◆ vloxseg7ei16_v_i8m1_m

#define vloxseg7ei16_v_i8m1_m ( ... ) __riscv_vloxseg7ei16_v_i8m1_tumu(__VA_ARGS__)

◆ vloxseg7ei16_v_i8mf2

#define vloxseg7ei16_v_i8mf2 ( ... ) __riscv_vloxseg7ei16_v_i8mf2(__VA_ARGS__)

◆ vloxseg7ei16_v_i8mf2_m

#define vloxseg7ei16_v_i8mf2_m ( ... ) __riscv_vloxseg7ei16_v_i8mf2_tumu(__VA_ARGS__)

◆ vloxseg7ei16_v_i8mf4

#define vloxseg7ei16_v_i8mf4 ( ... ) __riscv_vloxseg7ei16_v_i8mf4(__VA_ARGS__)

◆ vloxseg7ei16_v_i8mf4_m

#define vloxseg7ei16_v_i8mf4_m ( ... ) __riscv_vloxseg7ei16_v_i8mf4_tumu(__VA_ARGS__)

◆ vloxseg7ei16_v_i8mf8

#define vloxseg7ei16_v_i8mf8 ( ... ) __riscv_vloxseg7ei16_v_i8mf8(__VA_ARGS__)

◆ vloxseg7ei16_v_i8mf8_m

#define vloxseg7ei16_v_i8mf8_m ( ... ) __riscv_vloxseg7ei16_v_i8mf8_tumu(__VA_ARGS__)

◆ vloxseg7ei16_v_u16m1

#define vloxseg7ei16_v_u16m1 ( ... ) __riscv_vloxseg7ei16_v_u16m1(__VA_ARGS__)

◆ vloxseg7ei16_v_u16m1_m

#define vloxseg7ei16_v_u16m1_m ( ... ) __riscv_vloxseg7ei16_v_u16m1_tumu(__VA_ARGS__)

◆ vloxseg7ei16_v_u16mf2

#define vloxseg7ei16_v_u16mf2 ( ... ) __riscv_vloxseg7ei16_v_u16mf2(__VA_ARGS__)

◆ vloxseg7ei16_v_u16mf2_m

#define vloxseg7ei16_v_u16mf2_m ( ... ) __riscv_vloxseg7ei16_v_u16mf2_tumu(__VA_ARGS__)

◆ vloxseg7ei16_v_u16mf4

#define vloxseg7ei16_v_u16mf4 ( ... ) __riscv_vloxseg7ei16_v_u16mf4(__VA_ARGS__)

◆ vloxseg7ei16_v_u16mf4_m

#define vloxseg7ei16_v_u16mf4_m ( ... ) __riscv_vloxseg7ei16_v_u16mf4_tumu(__VA_ARGS__)

◆ vloxseg7ei16_v_u32m1

#define vloxseg7ei16_v_u32m1 ( ... ) __riscv_vloxseg7ei16_v_u32m1(__VA_ARGS__)

◆ vloxseg7ei16_v_u32m1_m

#define vloxseg7ei16_v_u32m1_m ( ... ) __riscv_vloxseg7ei16_v_u32m1_tumu(__VA_ARGS__)

◆ vloxseg7ei16_v_u32mf2

#define vloxseg7ei16_v_u32mf2 ( ... ) __riscv_vloxseg7ei16_v_u32mf2(__VA_ARGS__)

◆ vloxseg7ei16_v_u32mf2_m

#define vloxseg7ei16_v_u32mf2_m ( ... ) __riscv_vloxseg7ei16_v_u32mf2_tumu(__VA_ARGS__)

◆ vloxseg7ei16_v_u64m1

#define vloxseg7ei16_v_u64m1 ( ... ) __riscv_vloxseg7ei16_v_u64m1(__VA_ARGS__)

◆ vloxseg7ei16_v_u64m1_m

#define vloxseg7ei16_v_u64m1_m ( ... ) __riscv_vloxseg7ei16_v_u64m1_tumu(__VA_ARGS__)

◆ vloxseg7ei16_v_u8m1

#define vloxseg7ei16_v_u8m1 ( ... ) __riscv_vloxseg7ei16_v_u8m1(__VA_ARGS__)

◆ vloxseg7ei16_v_u8m1_m

#define vloxseg7ei16_v_u8m1_m ( ... ) __riscv_vloxseg7ei16_v_u8m1_tumu(__VA_ARGS__)

◆ vloxseg7ei16_v_u8mf2

#define vloxseg7ei16_v_u8mf2 ( ... ) __riscv_vloxseg7ei16_v_u8mf2(__VA_ARGS__)

◆ vloxseg7ei16_v_u8mf2_m

#define vloxseg7ei16_v_u8mf2_m ( ... ) __riscv_vloxseg7ei16_v_u8mf2_tumu(__VA_ARGS__)

◆ vloxseg7ei16_v_u8mf4

#define vloxseg7ei16_v_u8mf4 ( ... ) __riscv_vloxseg7ei16_v_u8mf4(__VA_ARGS__)

◆ vloxseg7ei16_v_u8mf4_m

#define vloxseg7ei16_v_u8mf4_m ( ... ) __riscv_vloxseg7ei16_v_u8mf4_tumu(__VA_ARGS__)

◆ vloxseg7ei16_v_u8mf8

#define vloxseg7ei16_v_u8mf8 ( ... ) __riscv_vloxseg7ei16_v_u8mf8(__VA_ARGS__)

◆ vloxseg7ei16_v_u8mf8_m

#define vloxseg7ei16_v_u8mf8_m ( ... ) __riscv_vloxseg7ei16_v_u8mf8_tumu(__VA_ARGS__)

◆ vloxseg7ei32_v_f16m1

#define vloxseg7ei32_v_f16m1 ( ... ) __riscv_vloxseg7ei32_v_f16m1(__VA_ARGS__)

◆ vloxseg7ei32_v_f16m1_m

#define vloxseg7ei32_v_f16m1_m ( ... ) __riscv_vloxseg7ei32_v_f16m1_tumu(__VA_ARGS__)

◆ vloxseg7ei32_v_f16mf2

#define vloxseg7ei32_v_f16mf2 ( ... ) __riscv_vloxseg7ei32_v_f16mf2(__VA_ARGS__)

◆ vloxseg7ei32_v_f16mf2_m

#define vloxseg7ei32_v_f16mf2_m ( ... ) __riscv_vloxseg7ei32_v_f16mf2_tumu(__VA_ARGS__)

◆ vloxseg7ei32_v_f16mf4

#define vloxseg7ei32_v_f16mf4 ( ... ) __riscv_vloxseg7ei32_v_f16mf4(__VA_ARGS__)

◆ vloxseg7ei32_v_f16mf4_m

#define vloxseg7ei32_v_f16mf4_m ( ... ) __riscv_vloxseg7ei32_v_f16mf4_tumu(__VA_ARGS__)

◆ vloxseg7ei32_v_f32m1

#define vloxseg7ei32_v_f32m1 ( ... ) __riscv_vloxseg7ei32_v_f32m1(__VA_ARGS__)

◆ vloxseg7ei32_v_f32m1_m

#define vloxseg7ei32_v_f32m1_m ( ... ) __riscv_vloxseg7ei32_v_f32m1_tumu(__VA_ARGS__)

◆ vloxseg7ei32_v_f32mf2

#define vloxseg7ei32_v_f32mf2 ( ... ) __riscv_vloxseg7ei32_v_f32mf2(__VA_ARGS__)

◆ vloxseg7ei32_v_f32mf2_m

#define vloxseg7ei32_v_f32mf2_m ( ... ) __riscv_vloxseg7ei32_v_f32mf2_tumu(__VA_ARGS__)

◆ vloxseg7ei32_v_f64m1

#define vloxseg7ei32_v_f64m1 ( ... ) __riscv_vloxseg7ei32_v_f64m1(__VA_ARGS__)

◆ vloxseg7ei32_v_f64m1_m

#define vloxseg7ei32_v_f64m1_m ( ... ) __riscv_vloxseg7ei32_v_f64m1_tumu(__VA_ARGS__)

◆ vloxseg7ei32_v_i16m1

#define vloxseg7ei32_v_i16m1 ( ... ) __riscv_vloxseg7ei32_v_i16m1(__VA_ARGS__)

◆ vloxseg7ei32_v_i16m1_m

#define vloxseg7ei32_v_i16m1_m ( ... ) __riscv_vloxseg7ei32_v_i16m1_tumu(__VA_ARGS__)

◆ vloxseg7ei32_v_i16mf2

#define vloxseg7ei32_v_i16mf2 ( ... ) __riscv_vloxseg7ei32_v_i16mf2(__VA_ARGS__)

◆ vloxseg7ei32_v_i16mf2_m

#define vloxseg7ei32_v_i16mf2_m ( ... ) __riscv_vloxseg7ei32_v_i16mf2_tumu(__VA_ARGS__)

◆ vloxseg7ei32_v_i16mf4

#define vloxseg7ei32_v_i16mf4 ( ... ) __riscv_vloxseg7ei32_v_i16mf4(__VA_ARGS__)

◆ vloxseg7ei32_v_i16mf4_m

#define vloxseg7ei32_v_i16mf4_m ( ... ) __riscv_vloxseg7ei32_v_i16mf4_tumu(__VA_ARGS__)

◆ vloxseg7ei32_v_i32m1

#define vloxseg7ei32_v_i32m1 ( ... ) __riscv_vloxseg7ei32_v_i32m1(__VA_ARGS__)

◆ vloxseg7ei32_v_i32m1_m

#define vloxseg7ei32_v_i32m1_m ( ... ) __riscv_vloxseg7ei32_v_i32m1_tumu(__VA_ARGS__)

◆ vloxseg7ei32_v_i32mf2

#define vloxseg7ei32_v_i32mf2 ( ... ) __riscv_vloxseg7ei32_v_i32mf2(__VA_ARGS__)

◆ vloxseg7ei32_v_i32mf2_m

#define vloxseg7ei32_v_i32mf2_m ( ... ) __riscv_vloxseg7ei32_v_i32mf2_tumu(__VA_ARGS__)

◆ vloxseg7ei32_v_i64m1

#define vloxseg7ei32_v_i64m1 ( ... ) __riscv_vloxseg7ei32_v_i64m1(__VA_ARGS__)

◆ vloxseg7ei32_v_i64m1_m

#define vloxseg7ei32_v_i64m1_m ( ... ) __riscv_vloxseg7ei32_v_i64m1_tumu(__VA_ARGS__)

◆ vloxseg7ei32_v_i8m1

#define vloxseg7ei32_v_i8m1 ( ... ) __riscv_vloxseg7ei32_v_i8m1(__VA_ARGS__)

◆ vloxseg7ei32_v_i8m1_m

#define vloxseg7ei32_v_i8m1_m ( ... ) __riscv_vloxseg7ei32_v_i8m1_tumu(__VA_ARGS__)

◆ vloxseg7ei32_v_i8mf2

#define vloxseg7ei32_v_i8mf2 ( ... ) __riscv_vloxseg7ei32_v_i8mf2(__VA_ARGS__)

◆ vloxseg7ei32_v_i8mf2_m

#define vloxseg7ei32_v_i8mf2_m ( ... ) __riscv_vloxseg7ei32_v_i8mf2_tumu(__VA_ARGS__)

◆ vloxseg7ei32_v_i8mf4

#define vloxseg7ei32_v_i8mf4 ( ... ) __riscv_vloxseg7ei32_v_i8mf4(__VA_ARGS__)

◆ vloxseg7ei32_v_i8mf4_m

#define vloxseg7ei32_v_i8mf4_m ( ... ) __riscv_vloxseg7ei32_v_i8mf4_tumu(__VA_ARGS__)

◆ vloxseg7ei32_v_i8mf8

#define vloxseg7ei32_v_i8mf8 ( ... ) __riscv_vloxseg7ei32_v_i8mf8(__VA_ARGS__)

◆ vloxseg7ei32_v_i8mf8_m

#define vloxseg7ei32_v_i8mf8_m ( ... ) __riscv_vloxseg7ei32_v_i8mf8_tumu(__VA_ARGS__)

◆ vloxseg7ei32_v_u16m1

#define vloxseg7ei32_v_u16m1 ( ... ) __riscv_vloxseg7ei32_v_u16m1(__VA_ARGS__)

◆ vloxseg7ei32_v_u16m1_m

#define vloxseg7ei32_v_u16m1_m ( ... ) __riscv_vloxseg7ei32_v_u16m1_tumu(__VA_ARGS__)

◆ vloxseg7ei32_v_u16mf2

#define vloxseg7ei32_v_u16mf2 ( ... ) __riscv_vloxseg7ei32_v_u16mf2(__VA_ARGS__)

◆ vloxseg7ei32_v_u16mf2_m

#define vloxseg7ei32_v_u16mf2_m ( ... ) __riscv_vloxseg7ei32_v_u16mf2_tumu(__VA_ARGS__)

◆ vloxseg7ei32_v_u16mf4

#define vloxseg7ei32_v_u16mf4 ( ... ) __riscv_vloxseg7ei32_v_u16mf4(__VA_ARGS__)

◆ vloxseg7ei32_v_u16mf4_m

#define vloxseg7ei32_v_u16mf4_m ( ... ) __riscv_vloxseg7ei32_v_u16mf4_tumu(__VA_ARGS__)

◆ vloxseg7ei32_v_u32m1

#define vloxseg7ei32_v_u32m1 ( ... ) __riscv_vloxseg7ei32_v_u32m1(__VA_ARGS__)

◆ vloxseg7ei32_v_u32m1_m

#define vloxseg7ei32_v_u32m1_m ( ... ) __riscv_vloxseg7ei32_v_u32m1_tumu(__VA_ARGS__)

◆ vloxseg7ei32_v_u32mf2

#define vloxseg7ei32_v_u32mf2 ( ... ) __riscv_vloxseg7ei32_v_u32mf2(__VA_ARGS__)

◆ vloxseg7ei32_v_u32mf2_m

#define vloxseg7ei32_v_u32mf2_m ( ... ) __riscv_vloxseg7ei32_v_u32mf2_tumu(__VA_ARGS__)

◆ vloxseg7ei32_v_u64m1

#define vloxseg7ei32_v_u64m1 ( ... ) __riscv_vloxseg7ei32_v_u64m1(__VA_ARGS__)

◆ vloxseg7ei32_v_u64m1_m

#define vloxseg7ei32_v_u64m1_m ( ... ) __riscv_vloxseg7ei32_v_u64m1_tumu(__VA_ARGS__)

◆ vloxseg7ei32_v_u8m1

#define vloxseg7ei32_v_u8m1 ( ... ) __riscv_vloxseg7ei32_v_u8m1(__VA_ARGS__)

◆ vloxseg7ei32_v_u8m1_m

#define vloxseg7ei32_v_u8m1_m ( ... ) __riscv_vloxseg7ei32_v_u8m1_tumu(__VA_ARGS__)

◆ vloxseg7ei32_v_u8mf2

#define vloxseg7ei32_v_u8mf2 ( ... ) __riscv_vloxseg7ei32_v_u8mf2(__VA_ARGS__)

◆ vloxseg7ei32_v_u8mf2_m

#define vloxseg7ei32_v_u8mf2_m ( ... ) __riscv_vloxseg7ei32_v_u8mf2_tumu(__VA_ARGS__)

◆ vloxseg7ei32_v_u8mf4

#define vloxseg7ei32_v_u8mf4 ( ... ) __riscv_vloxseg7ei32_v_u8mf4(__VA_ARGS__)

◆ vloxseg7ei32_v_u8mf4_m

#define vloxseg7ei32_v_u8mf4_m ( ... ) __riscv_vloxseg7ei32_v_u8mf4_tumu(__VA_ARGS__)

◆ vloxseg7ei32_v_u8mf8

#define vloxseg7ei32_v_u8mf8 ( ... ) __riscv_vloxseg7ei32_v_u8mf8(__VA_ARGS__)

◆ vloxseg7ei32_v_u8mf8_m

#define vloxseg7ei32_v_u8mf8_m ( ... ) __riscv_vloxseg7ei32_v_u8mf8_tumu(__VA_ARGS__)

◆ vloxseg7ei64_v_f16m1

#define vloxseg7ei64_v_f16m1 ( ... ) __riscv_vloxseg7ei64_v_f16m1(__VA_ARGS__)

◆ vloxseg7ei64_v_f16m1_m

#define vloxseg7ei64_v_f16m1_m ( ... ) __riscv_vloxseg7ei64_v_f16m1_tumu(__VA_ARGS__)

◆ vloxseg7ei64_v_f16mf2

#define vloxseg7ei64_v_f16mf2 ( ... ) __riscv_vloxseg7ei64_v_f16mf2(__VA_ARGS__)

◆ vloxseg7ei64_v_f16mf2_m

#define vloxseg7ei64_v_f16mf2_m ( ... ) __riscv_vloxseg7ei64_v_f16mf2_tumu(__VA_ARGS__)

◆ vloxseg7ei64_v_f16mf4

#define vloxseg7ei64_v_f16mf4 ( ... ) __riscv_vloxseg7ei64_v_f16mf4(__VA_ARGS__)

◆ vloxseg7ei64_v_f16mf4_m

#define vloxseg7ei64_v_f16mf4_m ( ... ) __riscv_vloxseg7ei64_v_f16mf4_tumu(__VA_ARGS__)

◆ vloxseg7ei64_v_f32m1

#define vloxseg7ei64_v_f32m1 ( ... ) __riscv_vloxseg7ei64_v_f32m1(__VA_ARGS__)

◆ vloxseg7ei64_v_f32m1_m

#define vloxseg7ei64_v_f32m1_m ( ... ) __riscv_vloxseg7ei64_v_f32m1_tumu(__VA_ARGS__)

◆ vloxseg7ei64_v_f32mf2

#define vloxseg7ei64_v_f32mf2 ( ... ) __riscv_vloxseg7ei64_v_f32mf2(__VA_ARGS__)

◆ vloxseg7ei64_v_f32mf2_m

#define vloxseg7ei64_v_f32mf2_m ( ... ) __riscv_vloxseg7ei64_v_f32mf2_tumu(__VA_ARGS__)

◆ vloxseg7ei64_v_f64m1

#define vloxseg7ei64_v_f64m1 ( ... ) __riscv_vloxseg7ei64_v_f64m1(__VA_ARGS__)

◆ vloxseg7ei64_v_f64m1_m

#define vloxseg7ei64_v_f64m1_m ( ... ) __riscv_vloxseg7ei64_v_f64m1_tumu(__VA_ARGS__)

◆ vloxseg7ei64_v_i16m1

#define vloxseg7ei64_v_i16m1 ( ... ) __riscv_vloxseg7ei64_v_i16m1(__VA_ARGS__)

◆ vloxseg7ei64_v_i16m1_m

#define vloxseg7ei64_v_i16m1_m ( ... ) __riscv_vloxseg7ei64_v_i16m1_tumu(__VA_ARGS__)

◆ vloxseg7ei64_v_i16mf2

#define vloxseg7ei64_v_i16mf2 ( ... ) __riscv_vloxseg7ei64_v_i16mf2(__VA_ARGS__)

◆ vloxseg7ei64_v_i16mf2_m

#define vloxseg7ei64_v_i16mf2_m ( ... ) __riscv_vloxseg7ei64_v_i16mf2_tumu(__VA_ARGS__)

◆ vloxseg7ei64_v_i16mf4

#define vloxseg7ei64_v_i16mf4 ( ... ) __riscv_vloxseg7ei64_v_i16mf4(__VA_ARGS__)

◆ vloxseg7ei64_v_i16mf4_m

#define vloxseg7ei64_v_i16mf4_m ( ... ) __riscv_vloxseg7ei64_v_i16mf4_tumu(__VA_ARGS__)

◆ vloxseg7ei64_v_i32m1

#define vloxseg7ei64_v_i32m1 ( ... ) __riscv_vloxseg7ei64_v_i32m1(__VA_ARGS__)

◆ vloxseg7ei64_v_i32m1_m

#define vloxseg7ei64_v_i32m1_m ( ... ) __riscv_vloxseg7ei64_v_i32m1_tumu(__VA_ARGS__)

◆ vloxseg7ei64_v_i32mf2

#define vloxseg7ei64_v_i32mf2 ( ... ) __riscv_vloxseg7ei64_v_i32mf2(__VA_ARGS__)

◆ vloxseg7ei64_v_i32mf2_m

#define vloxseg7ei64_v_i32mf2_m ( ... ) __riscv_vloxseg7ei64_v_i32mf2_tumu(__VA_ARGS__)

◆ vloxseg7ei64_v_i64m1

#define vloxseg7ei64_v_i64m1 ( ... ) __riscv_vloxseg7ei64_v_i64m1(__VA_ARGS__)

◆ vloxseg7ei64_v_i64m1_m

#define vloxseg7ei64_v_i64m1_m ( ... ) __riscv_vloxseg7ei64_v_i64m1_tumu(__VA_ARGS__)

◆ vloxseg7ei64_v_i8m1

#define vloxseg7ei64_v_i8m1 ( ... ) __riscv_vloxseg7ei64_v_i8m1(__VA_ARGS__)

◆ vloxseg7ei64_v_i8m1_m

#define vloxseg7ei64_v_i8m1_m ( ... ) __riscv_vloxseg7ei64_v_i8m1_tumu(__VA_ARGS__)

◆ vloxseg7ei64_v_i8mf2

#define vloxseg7ei64_v_i8mf2 ( ... ) __riscv_vloxseg7ei64_v_i8mf2(__VA_ARGS__)

◆ vloxseg7ei64_v_i8mf2_m

#define vloxseg7ei64_v_i8mf2_m ( ... ) __riscv_vloxseg7ei64_v_i8mf2_tumu(__VA_ARGS__)

◆ vloxseg7ei64_v_i8mf4

#define vloxseg7ei64_v_i8mf4 ( ... ) __riscv_vloxseg7ei64_v_i8mf4(__VA_ARGS__)

◆ vloxseg7ei64_v_i8mf4_m

#define vloxseg7ei64_v_i8mf4_m ( ... ) __riscv_vloxseg7ei64_v_i8mf4_tumu(__VA_ARGS__)

◆ vloxseg7ei64_v_i8mf8

#define vloxseg7ei64_v_i8mf8 ( ... ) __riscv_vloxseg7ei64_v_i8mf8(__VA_ARGS__)

◆ vloxseg7ei64_v_i8mf8_m

#define vloxseg7ei64_v_i8mf8_m ( ... ) __riscv_vloxseg7ei64_v_i8mf8_tumu(__VA_ARGS__)

◆ vloxseg7ei64_v_u16m1

#define vloxseg7ei64_v_u16m1 ( ... ) __riscv_vloxseg7ei64_v_u16m1(__VA_ARGS__)

◆ vloxseg7ei64_v_u16m1_m

#define vloxseg7ei64_v_u16m1_m ( ... ) __riscv_vloxseg7ei64_v_u16m1_tumu(__VA_ARGS__)

◆ vloxseg7ei64_v_u16mf2

#define vloxseg7ei64_v_u16mf2 ( ... ) __riscv_vloxseg7ei64_v_u16mf2(__VA_ARGS__)

◆ vloxseg7ei64_v_u16mf2_m

#define vloxseg7ei64_v_u16mf2_m ( ... ) __riscv_vloxseg7ei64_v_u16mf2_tumu(__VA_ARGS__)

◆ vloxseg7ei64_v_u16mf4

#define vloxseg7ei64_v_u16mf4 ( ... ) __riscv_vloxseg7ei64_v_u16mf4(__VA_ARGS__)

◆ vloxseg7ei64_v_u16mf4_m

#define vloxseg7ei64_v_u16mf4_m ( ... ) __riscv_vloxseg7ei64_v_u16mf4_tumu(__VA_ARGS__)

◆ vloxseg7ei64_v_u32m1

#define vloxseg7ei64_v_u32m1 ( ... ) __riscv_vloxseg7ei64_v_u32m1(__VA_ARGS__)

◆ vloxseg7ei64_v_u32m1_m

#define vloxseg7ei64_v_u32m1_m ( ... ) __riscv_vloxseg7ei64_v_u32m1_tumu(__VA_ARGS__)

◆ vloxseg7ei64_v_u32mf2

#define vloxseg7ei64_v_u32mf2 ( ... ) __riscv_vloxseg7ei64_v_u32mf2(__VA_ARGS__)

◆ vloxseg7ei64_v_u32mf2_m

#define vloxseg7ei64_v_u32mf2_m ( ... ) __riscv_vloxseg7ei64_v_u32mf2_tumu(__VA_ARGS__)

◆ vloxseg7ei64_v_u64m1

#define vloxseg7ei64_v_u64m1 ( ... ) __riscv_vloxseg7ei64_v_u64m1(__VA_ARGS__)

◆ vloxseg7ei64_v_u64m1_m

#define vloxseg7ei64_v_u64m1_m ( ... ) __riscv_vloxseg7ei64_v_u64m1_tumu(__VA_ARGS__)

◆ vloxseg7ei64_v_u8m1

#define vloxseg7ei64_v_u8m1 ( ... ) __riscv_vloxseg7ei64_v_u8m1(__VA_ARGS__)

◆ vloxseg7ei64_v_u8m1_m

#define vloxseg7ei64_v_u8m1_m ( ... ) __riscv_vloxseg7ei64_v_u8m1_tumu(__VA_ARGS__)

◆ vloxseg7ei64_v_u8mf2

#define vloxseg7ei64_v_u8mf2 ( ... ) __riscv_vloxseg7ei64_v_u8mf2(__VA_ARGS__)

◆ vloxseg7ei64_v_u8mf2_m

#define vloxseg7ei64_v_u8mf2_m ( ... ) __riscv_vloxseg7ei64_v_u8mf2_tumu(__VA_ARGS__)

◆ vloxseg7ei64_v_u8mf4

#define vloxseg7ei64_v_u8mf4 ( ... ) __riscv_vloxseg7ei64_v_u8mf4(__VA_ARGS__)

◆ vloxseg7ei64_v_u8mf4_m

#define vloxseg7ei64_v_u8mf4_m ( ... ) __riscv_vloxseg7ei64_v_u8mf4_tumu(__VA_ARGS__)

◆ vloxseg7ei64_v_u8mf8

#define vloxseg7ei64_v_u8mf8 ( ... ) __riscv_vloxseg7ei64_v_u8mf8(__VA_ARGS__)

◆ vloxseg7ei64_v_u8mf8_m

#define vloxseg7ei64_v_u8mf8_m ( ... ) __riscv_vloxseg7ei64_v_u8mf8_tumu(__VA_ARGS__)

◆ vloxseg7ei8_v_f16m1

#define vloxseg7ei8_v_f16m1 ( ... ) __riscv_vloxseg7ei8_v_f16m1(__VA_ARGS__)

◆ vloxseg7ei8_v_f16m1_m

#define vloxseg7ei8_v_f16m1_m ( ... ) __riscv_vloxseg7ei8_v_f16m1_tumu(__VA_ARGS__)

◆ vloxseg7ei8_v_f16mf2

#define vloxseg7ei8_v_f16mf2 ( ... ) __riscv_vloxseg7ei8_v_f16mf2(__VA_ARGS__)

◆ vloxseg7ei8_v_f16mf2_m

#define vloxseg7ei8_v_f16mf2_m ( ... ) __riscv_vloxseg7ei8_v_f16mf2_tumu(__VA_ARGS__)

◆ vloxseg7ei8_v_f16mf4

#define vloxseg7ei8_v_f16mf4 ( ... ) __riscv_vloxseg7ei8_v_f16mf4(__VA_ARGS__)

◆ vloxseg7ei8_v_f16mf4_m

#define vloxseg7ei8_v_f16mf4_m ( ... ) __riscv_vloxseg7ei8_v_f16mf4_tumu(__VA_ARGS__)

◆ vloxseg7ei8_v_f32m1

#define vloxseg7ei8_v_f32m1 ( ... ) __riscv_vloxseg7ei8_v_f32m1(__VA_ARGS__)

◆ vloxseg7ei8_v_f32m1_m

#define vloxseg7ei8_v_f32m1_m ( ... ) __riscv_vloxseg7ei8_v_f32m1_tumu(__VA_ARGS__)

◆ vloxseg7ei8_v_f32mf2

#define vloxseg7ei8_v_f32mf2 ( ... ) __riscv_vloxseg7ei8_v_f32mf2(__VA_ARGS__)

◆ vloxseg7ei8_v_f32mf2_m

#define vloxseg7ei8_v_f32mf2_m ( ... ) __riscv_vloxseg7ei8_v_f32mf2_tumu(__VA_ARGS__)

◆ vloxseg7ei8_v_f64m1

#define vloxseg7ei8_v_f64m1 ( ... ) __riscv_vloxseg7ei8_v_f64m1(__VA_ARGS__)

◆ vloxseg7ei8_v_f64m1_m

#define vloxseg7ei8_v_f64m1_m ( ... ) __riscv_vloxseg7ei8_v_f64m1_tumu(__VA_ARGS__)

◆ vloxseg7ei8_v_i16m1

#define vloxseg7ei8_v_i16m1 ( ... ) __riscv_vloxseg7ei8_v_i16m1(__VA_ARGS__)

◆ vloxseg7ei8_v_i16m1_m

#define vloxseg7ei8_v_i16m1_m ( ... ) __riscv_vloxseg7ei8_v_i16m1_tumu(__VA_ARGS__)

◆ vloxseg7ei8_v_i16mf2

#define vloxseg7ei8_v_i16mf2 ( ... ) __riscv_vloxseg7ei8_v_i16mf2(__VA_ARGS__)

◆ vloxseg7ei8_v_i16mf2_m

#define vloxseg7ei8_v_i16mf2_m ( ... ) __riscv_vloxseg7ei8_v_i16mf2_tumu(__VA_ARGS__)

◆ vloxseg7ei8_v_i16mf4

#define vloxseg7ei8_v_i16mf4 ( ... ) __riscv_vloxseg7ei8_v_i16mf4(__VA_ARGS__)

◆ vloxseg7ei8_v_i16mf4_m

#define vloxseg7ei8_v_i16mf4_m ( ... ) __riscv_vloxseg7ei8_v_i16mf4_tumu(__VA_ARGS__)

◆ vloxseg7ei8_v_i32m1

#define vloxseg7ei8_v_i32m1 ( ... ) __riscv_vloxseg7ei8_v_i32m1(__VA_ARGS__)

◆ vloxseg7ei8_v_i32m1_m

#define vloxseg7ei8_v_i32m1_m ( ... ) __riscv_vloxseg7ei8_v_i32m1_tumu(__VA_ARGS__)

◆ vloxseg7ei8_v_i32mf2

#define vloxseg7ei8_v_i32mf2 ( ... ) __riscv_vloxseg7ei8_v_i32mf2(__VA_ARGS__)

◆ vloxseg7ei8_v_i32mf2_m

#define vloxseg7ei8_v_i32mf2_m ( ... ) __riscv_vloxseg7ei8_v_i32mf2_tumu(__VA_ARGS__)

◆ vloxseg7ei8_v_i64m1

#define vloxseg7ei8_v_i64m1 ( ... ) __riscv_vloxseg7ei8_v_i64m1(__VA_ARGS__)

◆ vloxseg7ei8_v_i64m1_m

#define vloxseg7ei8_v_i64m1_m ( ... ) __riscv_vloxseg7ei8_v_i64m1_tumu(__VA_ARGS__)

◆ vloxseg7ei8_v_i8m1

#define vloxseg7ei8_v_i8m1 ( ... ) __riscv_vloxseg7ei8_v_i8m1(__VA_ARGS__)

◆ vloxseg7ei8_v_i8m1_m

#define vloxseg7ei8_v_i8m1_m ( ... ) __riscv_vloxseg7ei8_v_i8m1_tumu(__VA_ARGS__)

◆ vloxseg7ei8_v_i8mf2

#define vloxseg7ei8_v_i8mf2 ( ... ) __riscv_vloxseg7ei8_v_i8mf2(__VA_ARGS__)

◆ vloxseg7ei8_v_i8mf2_m

#define vloxseg7ei8_v_i8mf2_m ( ... ) __riscv_vloxseg7ei8_v_i8mf2_tumu(__VA_ARGS__)

◆ vloxseg7ei8_v_i8mf4

#define vloxseg7ei8_v_i8mf4 ( ... ) __riscv_vloxseg7ei8_v_i8mf4(__VA_ARGS__)

◆ vloxseg7ei8_v_i8mf4_m

#define vloxseg7ei8_v_i8mf4_m ( ... ) __riscv_vloxseg7ei8_v_i8mf4_tumu(__VA_ARGS__)

◆ vloxseg7ei8_v_i8mf8

#define vloxseg7ei8_v_i8mf8 ( ... ) __riscv_vloxseg7ei8_v_i8mf8(__VA_ARGS__)

◆ vloxseg7ei8_v_i8mf8_m

#define vloxseg7ei8_v_i8mf8_m ( ... ) __riscv_vloxseg7ei8_v_i8mf8_tumu(__VA_ARGS__)

◆ vloxseg7ei8_v_u16m1

#define vloxseg7ei8_v_u16m1 ( ... ) __riscv_vloxseg7ei8_v_u16m1(__VA_ARGS__)

◆ vloxseg7ei8_v_u16m1_m

#define vloxseg7ei8_v_u16m1_m ( ... ) __riscv_vloxseg7ei8_v_u16m1_tumu(__VA_ARGS__)

◆ vloxseg7ei8_v_u16mf2

#define vloxseg7ei8_v_u16mf2 ( ... ) __riscv_vloxseg7ei8_v_u16mf2(__VA_ARGS__)

◆ vloxseg7ei8_v_u16mf2_m

#define vloxseg7ei8_v_u16mf2_m ( ... ) __riscv_vloxseg7ei8_v_u16mf2_tumu(__VA_ARGS__)

◆ vloxseg7ei8_v_u16mf4

#define vloxseg7ei8_v_u16mf4 ( ... ) __riscv_vloxseg7ei8_v_u16mf4(__VA_ARGS__)

◆ vloxseg7ei8_v_u16mf4_m

#define vloxseg7ei8_v_u16mf4_m ( ... ) __riscv_vloxseg7ei8_v_u16mf4_tumu(__VA_ARGS__)

◆ vloxseg7ei8_v_u32m1

#define vloxseg7ei8_v_u32m1 ( ... ) __riscv_vloxseg7ei8_v_u32m1(__VA_ARGS__)

◆ vloxseg7ei8_v_u32m1_m

#define vloxseg7ei8_v_u32m1_m ( ... ) __riscv_vloxseg7ei8_v_u32m1_tumu(__VA_ARGS__)

◆ vloxseg7ei8_v_u32mf2

#define vloxseg7ei8_v_u32mf2 ( ... ) __riscv_vloxseg7ei8_v_u32mf2(__VA_ARGS__)

◆ vloxseg7ei8_v_u32mf2_m

#define vloxseg7ei8_v_u32mf2_m ( ... ) __riscv_vloxseg7ei8_v_u32mf2_tumu(__VA_ARGS__)

◆ vloxseg7ei8_v_u64m1

#define vloxseg7ei8_v_u64m1 ( ... ) __riscv_vloxseg7ei8_v_u64m1(__VA_ARGS__)

◆ vloxseg7ei8_v_u64m1_m

#define vloxseg7ei8_v_u64m1_m ( ... ) __riscv_vloxseg7ei8_v_u64m1_tumu(__VA_ARGS__)

◆ vloxseg7ei8_v_u8m1

#define vloxseg7ei8_v_u8m1 ( ... ) __riscv_vloxseg7ei8_v_u8m1(__VA_ARGS__)

◆ vloxseg7ei8_v_u8m1_m

#define vloxseg7ei8_v_u8m1_m ( ... ) __riscv_vloxseg7ei8_v_u8m1_tumu(__VA_ARGS__)

◆ vloxseg7ei8_v_u8mf2

#define vloxseg7ei8_v_u8mf2 ( ... ) __riscv_vloxseg7ei8_v_u8mf2(__VA_ARGS__)

◆ vloxseg7ei8_v_u8mf2_m

#define vloxseg7ei8_v_u8mf2_m ( ... ) __riscv_vloxseg7ei8_v_u8mf2_tumu(__VA_ARGS__)

◆ vloxseg7ei8_v_u8mf4

#define vloxseg7ei8_v_u8mf4 ( ... ) __riscv_vloxseg7ei8_v_u8mf4(__VA_ARGS__)

◆ vloxseg7ei8_v_u8mf4_m

#define vloxseg7ei8_v_u8mf4_m ( ... ) __riscv_vloxseg7ei8_v_u8mf4_tumu(__VA_ARGS__)

◆ vloxseg7ei8_v_u8mf8

#define vloxseg7ei8_v_u8mf8 ( ... ) __riscv_vloxseg7ei8_v_u8mf8(__VA_ARGS__)

◆ vloxseg7ei8_v_u8mf8_m

#define vloxseg7ei8_v_u8mf8_m ( ... ) __riscv_vloxseg7ei8_v_u8mf8_tumu(__VA_ARGS__)

◆ vloxseg8ei16_v_f16m1

#define vloxseg8ei16_v_f16m1 ( ... ) __riscv_vloxseg8ei16_v_f16m1(__VA_ARGS__)

◆ vloxseg8ei16_v_f16m1_m

#define vloxseg8ei16_v_f16m1_m ( ... ) __riscv_vloxseg8ei16_v_f16m1_tumu(__VA_ARGS__)

◆ vloxseg8ei16_v_f16mf2

#define vloxseg8ei16_v_f16mf2 ( ... ) __riscv_vloxseg8ei16_v_f16mf2(__VA_ARGS__)

◆ vloxseg8ei16_v_f16mf2_m

#define vloxseg8ei16_v_f16mf2_m ( ... ) __riscv_vloxseg8ei16_v_f16mf2_tumu(__VA_ARGS__)

◆ vloxseg8ei16_v_f16mf4

#define vloxseg8ei16_v_f16mf4 ( ... ) __riscv_vloxseg8ei16_v_f16mf4(__VA_ARGS__)

◆ vloxseg8ei16_v_f16mf4_m

#define vloxseg8ei16_v_f16mf4_m ( ... ) __riscv_vloxseg8ei16_v_f16mf4_tumu(__VA_ARGS__)

◆ vloxseg8ei16_v_f32m1

#define vloxseg8ei16_v_f32m1 ( ... ) __riscv_vloxseg8ei16_v_f32m1(__VA_ARGS__)

◆ vloxseg8ei16_v_f32m1_m

#define vloxseg8ei16_v_f32m1_m ( ... ) __riscv_vloxseg8ei16_v_f32m1_tumu(__VA_ARGS__)

◆ vloxseg8ei16_v_f32mf2

#define vloxseg8ei16_v_f32mf2 ( ... ) __riscv_vloxseg8ei16_v_f32mf2(__VA_ARGS__)

◆ vloxseg8ei16_v_f32mf2_m

#define vloxseg8ei16_v_f32mf2_m ( ... ) __riscv_vloxseg8ei16_v_f32mf2_tumu(__VA_ARGS__)

◆ vloxseg8ei16_v_f64m1

#define vloxseg8ei16_v_f64m1 ( ... ) __riscv_vloxseg8ei16_v_f64m1(__VA_ARGS__)

◆ vloxseg8ei16_v_f64m1_m

#define vloxseg8ei16_v_f64m1_m ( ... ) __riscv_vloxseg8ei16_v_f64m1_tumu(__VA_ARGS__)

◆ vloxseg8ei16_v_i16m1

#define vloxseg8ei16_v_i16m1 ( ... ) __riscv_vloxseg8ei16_v_i16m1(__VA_ARGS__)

◆ vloxseg8ei16_v_i16m1_m

#define vloxseg8ei16_v_i16m1_m ( ... ) __riscv_vloxseg8ei16_v_i16m1_tumu(__VA_ARGS__)

◆ vloxseg8ei16_v_i16mf2

#define vloxseg8ei16_v_i16mf2 ( ... ) __riscv_vloxseg8ei16_v_i16mf2(__VA_ARGS__)

◆ vloxseg8ei16_v_i16mf2_m

#define vloxseg8ei16_v_i16mf2_m ( ... ) __riscv_vloxseg8ei16_v_i16mf2_tumu(__VA_ARGS__)

◆ vloxseg8ei16_v_i16mf4

#define vloxseg8ei16_v_i16mf4 ( ... ) __riscv_vloxseg8ei16_v_i16mf4(__VA_ARGS__)

◆ vloxseg8ei16_v_i16mf4_m

#define vloxseg8ei16_v_i16mf4_m ( ... ) __riscv_vloxseg8ei16_v_i16mf4_tumu(__VA_ARGS__)

◆ vloxseg8ei16_v_i32m1

#define vloxseg8ei16_v_i32m1 ( ... ) __riscv_vloxseg8ei16_v_i32m1(__VA_ARGS__)

◆ vloxseg8ei16_v_i32m1_m

#define vloxseg8ei16_v_i32m1_m ( ... ) __riscv_vloxseg8ei16_v_i32m1_tumu(__VA_ARGS__)

◆ vloxseg8ei16_v_i32mf2

#define vloxseg8ei16_v_i32mf2 ( ... ) __riscv_vloxseg8ei16_v_i32mf2(__VA_ARGS__)

◆ vloxseg8ei16_v_i32mf2_m

#define vloxseg8ei16_v_i32mf2_m ( ... ) __riscv_vloxseg8ei16_v_i32mf2_tumu(__VA_ARGS__)

◆ vloxseg8ei16_v_i64m1

#define vloxseg8ei16_v_i64m1 ( ... ) __riscv_vloxseg8ei16_v_i64m1(__VA_ARGS__)

◆ vloxseg8ei16_v_i64m1_m

#define vloxseg8ei16_v_i64m1_m ( ... ) __riscv_vloxseg8ei16_v_i64m1_tumu(__VA_ARGS__)

◆ vloxseg8ei16_v_i8m1

#define vloxseg8ei16_v_i8m1 ( ... ) __riscv_vloxseg8ei16_v_i8m1(__VA_ARGS__)

◆ vloxseg8ei16_v_i8m1_m

#define vloxseg8ei16_v_i8m1_m ( ... ) __riscv_vloxseg8ei16_v_i8m1_tumu(__VA_ARGS__)

◆ vloxseg8ei16_v_i8mf2

#define vloxseg8ei16_v_i8mf2 ( ... ) __riscv_vloxseg8ei16_v_i8mf2(__VA_ARGS__)

◆ vloxseg8ei16_v_i8mf2_m

#define vloxseg8ei16_v_i8mf2_m ( ... ) __riscv_vloxseg8ei16_v_i8mf2_tumu(__VA_ARGS__)

◆ vloxseg8ei16_v_i8mf4

#define vloxseg8ei16_v_i8mf4 ( ... ) __riscv_vloxseg8ei16_v_i8mf4(__VA_ARGS__)

◆ vloxseg8ei16_v_i8mf4_m

#define vloxseg8ei16_v_i8mf4_m ( ... ) __riscv_vloxseg8ei16_v_i8mf4_tumu(__VA_ARGS__)

◆ vloxseg8ei16_v_i8mf8

#define vloxseg8ei16_v_i8mf8 ( ... ) __riscv_vloxseg8ei16_v_i8mf8(__VA_ARGS__)

◆ vloxseg8ei16_v_i8mf8_m

#define vloxseg8ei16_v_i8mf8_m ( ... ) __riscv_vloxseg8ei16_v_i8mf8_tumu(__VA_ARGS__)

◆ vloxseg8ei16_v_u16m1

#define vloxseg8ei16_v_u16m1 ( ... ) __riscv_vloxseg8ei16_v_u16m1(__VA_ARGS__)

◆ vloxseg8ei16_v_u16m1_m

#define vloxseg8ei16_v_u16m1_m ( ... ) __riscv_vloxseg8ei16_v_u16m1_tumu(__VA_ARGS__)

◆ vloxseg8ei16_v_u16mf2

#define vloxseg8ei16_v_u16mf2 ( ... ) __riscv_vloxseg8ei16_v_u16mf2(__VA_ARGS__)

◆ vloxseg8ei16_v_u16mf2_m

#define vloxseg8ei16_v_u16mf2_m ( ... ) __riscv_vloxseg8ei16_v_u16mf2_tumu(__VA_ARGS__)

◆ vloxseg8ei16_v_u16mf4

#define vloxseg8ei16_v_u16mf4 ( ... ) __riscv_vloxseg8ei16_v_u16mf4(__VA_ARGS__)

◆ vloxseg8ei16_v_u16mf4_m

#define vloxseg8ei16_v_u16mf4_m ( ... ) __riscv_vloxseg8ei16_v_u16mf4_tumu(__VA_ARGS__)

◆ vloxseg8ei16_v_u32m1

#define vloxseg8ei16_v_u32m1 ( ... ) __riscv_vloxseg8ei16_v_u32m1(__VA_ARGS__)

◆ vloxseg8ei16_v_u32m1_m

#define vloxseg8ei16_v_u32m1_m ( ... ) __riscv_vloxseg8ei16_v_u32m1_tumu(__VA_ARGS__)

◆ vloxseg8ei16_v_u32mf2

#define vloxseg8ei16_v_u32mf2 ( ... ) __riscv_vloxseg8ei16_v_u32mf2(__VA_ARGS__)

◆ vloxseg8ei16_v_u32mf2_m

#define vloxseg8ei16_v_u32mf2_m ( ... ) __riscv_vloxseg8ei16_v_u32mf2_tumu(__VA_ARGS__)

◆ vloxseg8ei16_v_u64m1

#define vloxseg8ei16_v_u64m1 ( ... ) __riscv_vloxseg8ei16_v_u64m1(__VA_ARGS__)

◆ vloxseg8ei16_v_u64m1_m

#define vloxseg8ei16_v_u64m1_m ( ... ) __riscv_vloxseg8ei16_v_u64m1_tumu(__VA_ARGS__)

◆ vloxseg8ei16_v_u8m1

#define vloxseg8ei16_v_u8m1 ( ... ) __riscv_vloxseg8ei16_v_u8m1(__VA_ARGS__)

◆ vloxseg8ei16_v_u8m1_m

#define vloxseg8ei16_v_u8m1_m ( ... ) __riscv_vloxseg8ei16_v_u8m1_tumu(__VA_ARGS__)

◆ vloxseg8ei16_v_u8mf2

#define vloxseg8ei16_v_u8mf2 ( ... ) __riscv_vloxseg8ei16_v_u8mf2(__VA_ARGS__)

◆ vloxseg8ei16_v_u8mf2_m

#define vloxseg8ei16_v_u8mf2_m ( ... ) __riscv_vloxseg8ei16_v_u8mf2_tumu(__VA_ARGS__)

◆ vloxseg8ei16_v_u8mf4

#define vloxseg8ei16_v_u8mf4 ( ... ) __riscv_vloxseg8ei16_v_u8mf4(__VA_ARGS__)

◆ vloxseg8ei16_v_u8mf4_m

#define vloxseg8ei16_v_u8mf4_m ( ... ) __riscv_vloxseg8ei16_v_u8mf4_tumu(__VA_ARGS__)

◆ vloxseg8ei16_v_u8mf8

#define vloxseg8ei16_v_u8mf8 ( ... ) __riscv_vloxseg8ei16_v_u8mf8(__VA_ARGS__)

◆ vloxseg8ei16_v_u8mf8_m

#define vloxseg8ei16_v_u8mf8_m ( ... ) __riscv_vloxseg8ei16_v_u8mf8_tumu(__VA_ARGS__)

◆ vloxseg8ei32_v_f16m1

#define vloxseg8ei32_v_f16m1 ( ... ) __riscv_vloxseg8ei32_v_f16m1(__VA_ARGS__)

◆ vloxseg8ei32_v_f16m1_m

#define vloxseg8ei32_v_f16m1_m ( ... ) __riscv_vloxseg8ei32_v_f16m1_tumu(__VA_ARGS__)

◆ vloxseg8ei32_v_f16mf2

#define vloxseg8ei32_v_f16mf2 ( ... ) __riscv_vloxseg8ei32_v_f16mf2(__VA_ARGS__)

◆ vloxseg8ei32_v_f16mf2_m

#define vloxseg8ei32_v_f16mf2_m ( ... ) __riscv_vloxseg8ei32_v_f16mf2_tumu(__VA_ARGS__)

◆ vloxseg8ei32_v_f16mf4

#define vloxseg8ei32_v_f16mf4 ( ... ) __riscv_vloxseg8ei32_v_f16mf4(__VA_ARGS__)

◆ vloxseg8ei32_v_f16mf4_m

#define vloxseg8ei32_v_f16mf4_m ( ... ) __riscv_vloxseg8ei32_v_f16mf4_tumu(__VA_ARGS__)

◆ vloxseg8ei32_v_f32m1

#define vloxseg8ei32_v_f32m1 ( ... ) __riscv_vloxseg8ei32_v_f32m1(__VA_ARGS__)

◆ vloxseg8ei32_v_f32m1_m

#define vloxseg8ei32_v_f32m1_m ( ... ) __riscv_vloxseg8ei32_v_f32m1_tumu(__VA_ARGS__)

◆ vloxseg8ei32_v_f32mf2

#define vloxseg8ei32_v_f32mf2 ( ... ) __riscv_vloxseg8ei32_v_f32mf2(__VA_ARGS__)

◆ vloxseg8ei32_v_f32mf2_m

#define vloxseg8ei32_v_f32mf2_m ( ... ) __riscv_vloxseg8ei32_v_f32mf2_tumu(__VA_ARGS__)

◆ vloxseg8ei32_v_f64m1

#define vloxseg8ei32_v_f64m1 ( ... ) __riscv_vloxseg8ei32_v_f64m1(__VA_ARGS__)

◆ vloxseg8ei32_v_f64m1_m

#define vloxseg8ei32_v_f64m1_m ( ... ) __riscv_vloxseg8ei32_v_f64m1_tumu(__VA_ARGS__)

◆ vloxseg8ei32_v_i16m1

#define vloxseg8ei32_v_i16m1 ( ... ) __riscv_vloxseg8ei32_v_i16m1(__VA_ARGS__)

◆ vloxseg8ei32_v_i16m1_m

#define vloxseg8ei32_v_i16m1_m ( ... ) __riscv_vloxseg8ei32_v_i16m1_tumu(__VA_ARGS__)

◆ vloxseg8ei32_v_i16mf2

#define vloxseg8ei32_v_i16mf2 ( ... ) __riscv_vloxseg8ei32_v_i16mf2(__VA_ARGS__)

◆ vloxseg8ei32_v_i16mf2_m

#define vloxseg8ei32_v_i16mf2_m ( ... ) __riscv_vloxseg8ei32_v_i16mf2_tumu(__VA_ARGS__)

◆ vloxseg8ei32_v_i16mf4

#define vloxseg8ei32_v_i16mf4 ( ... ) __riscv_vloxseg8ei32_v_i16mf4(__VA_ARGS__)

◆ vloxseg8ei32_v_i16mf4_m

#define vloxseg8ei32_v_i16mf4_m ( ... ) __riscv_vloxseg8ei32_v_i16mf4_tumu(__VA_ARGS__)

◆ vloxseg8ei32_v_i32m1

#define vloxseg8ei32_v_i32m1 ( ... ) __riscv_vloxseg8ei32_v_i32m1(__VA_ARGS__)

◆ vloxseg8ei32_v_i32m1_m

#define vloxseg8ei32_v_i32m1_m ( ... ) __riscv_vloxseg8ei32_v_i32m1_tumu(__VA_ARGS__)

◆ vloxseg8ei32_v_i32mf2

#define vloxseg8ei32_v_i32mf2 ( ... ) __riscv_vloxseg8ei32_v_i32mf2(__VA_ARGS__)

◆ vloxseg8ei32_v_i32mf2_m

#define vloxseg8ei32_v_i32mf2_m ( ... ) __riscv_vloxseg8ei32_v_i32mf2_tumu(__VA_ARGS__)

◆ vloxseg8ei32_v_i64m1

#define vloxseg8ei32_v_i64m1 ( ... ) __riscv_vloxseg8ei32_v_i64m1(__VA_ARGS__)

◆ vloxseg8ei32_v_i64m1_m

#define vloxseg8ei32_v_i64m1_m ( ... ) __riscv_vloxseg8ei32_v_i64m1_tumu(__VA_ARGS__)

◆ vloxseg8ei32_v_i8m1

#define vloxseg8ei32_v_i8m1 ( ... ) __riscv_vloxseg8ei32_v_i8m1(__VA_ARGS__)

◆ vloxseg8ei32_v_i8m1_m

#define vloxseg8ei32_v_i8m1_m ( ... ) __riscv_vloxseg8ei32_v_i8m1_tumu(__VA_ARGS__)

◆ vloxseg8ei32_v_i8mf2

#define vloxseg8ei32_v_i8mf2 ( ... ) __riscv_vloxseg8ei32_v_i8mf2(__VA_ARGS__)

◆ vloxseg8ei32_v_i8mf2_m

#define vloxseg8ei32_v_i8mf2_m ( ... ) __riscv_vloxseg8ei32_v_i8mf2_tumu(__VA_ARGS__)

◆ vloxseg8ei32_v_i8mf4

#define vloxseg8ei32_v_i8mf4 ( ... ) __riscv_vloxseg8ei32_v_i8mf4(__VA_ARGS__)

◆ vloxseg8ei32_v_i8mf4_m

#define vloxseg8ei32_v_i8mf4_m ( ... ) __riscv_vloxseg8ei32_v_i8mf4_tumu(__VA_ARGS__)

◆ vloxseg8ei32_v_i8mf8

#define vloxseg8ei32_v_i8mf8 ( ... ) __riscv_vloxseg8ei32_v_i8mf8(__VA_ARGS__)

◆ vloxseg8ei32_v_i8mf8_m

#define vloxseg8ei32_v_i8mf8_m ( ... ) __riscv_vloxseg8ei32_v_i8mf8_tumu(__VA_ARGS__)

◆ vloxseg8ei32_v_u16m1

#define vloxseg8ei32_v_u16m1 ( ... ) __riscv_vloxseg8ei32_v_u16m1(__VA_ARGS__)

◆ vloxseg8ei32_v_u16m1_m

#define vloxseg8ei32_v_u16m1_m ( ... ) __riscv_vloxseg8ei32_v_u16m1_tumu(__VA_ARGS__)

◆ vloxseg8ei32_v_u16mf2

#define vloxseg8ei32_v_u16mf2 ( ... ) __riscv_vloxseg8ei32_v_u16mf2(__VA_ARGS__)

◆ vloxseg8ei32_v_u16mf2_m

#define vloxseg8ei32_v_u16mf2_m ( ... ) __riscv_vloxseg8ei32_v_u16mf2_tumu(__VA_ARGS__)

◆ vloxseg8ei32_v_u16mf4

#define vloxseg8ei32_v_u16mf4 ( ... ) __riscv_vloxseg8ei32_v_u16mf4(__VA_ARGS__)

◆ vloxseg8ei32_v_u16mf4_m

#define vloxseg8ei32_v_u16mf4_m ( ... ) __riscv_vloxseg8ei32_v_u16mf4_tumu(__VA_ARGS__)

◆ vloxseg8ei32_v_u32m1

#define vloxseg8ei32_v_u32m1 ( ... ) __riscv_vloxseg8ei32_v_u32m1(__VA_ARGS__)

◆ vloxseg8ei32_v_u32m1_m

#define vloxseg8ei32_v_u32m1_m ( ... ) __riscv_vloxseg8ei32_v_u32m1_tumu(__VA_ARGS__)

◆ vloxseg8ei32_v_u32mf2

#define vloxseg8ei32_v_u32mf2 ( ... ) __riscv_vloxseg8ei32_v_u32mf2(__VA_ARGS__)

◆ vloxseg8ei32_v_u32mf2_m

#define vloxseg8ei32_v_u32mf2_m ( ... ) __riscv_vloxseg8ei32_v_u32mf2_tumu(__VA_ARGS__)

◆ vloxseg8ei32_v_u64m1

#define vloxseg8ei32_v_u64m1 ( ... ) __riscv_vloxseg8ei32_v_u64m1(__VA_ARGS__)

◆ vloxseg8ei32_v_u64m1_m

#define vloxseg8ei32_v_u64m1_m ( ... ) __riscv_vloxseg8ei32_v_u64m1_tumu(__VA_ARGS__)

◆ vloxseg8ei32_v_u8m1

#define vloxseg8ei32_v_u8m1 ( ... ) __riscv_vloxseg8ei32_v_u8m1(__VA_ARGS__)

◆ vloxseg8ei32_v_u8m1_m

#define vloxseg8ei32_v_u8m1_m ( ... ) __riscv_vloxseg8ei32_v_u8m1_tumu(__VA_ARGS__)

◆ vloxseg8ei32_v_u8mf2

#define vloxseg8ei32_v_u8mf2 ( ... ) __riscv_vloxseg8ei32_v_u8mf2(__VA_ARGS__)

◆ vloxseg8ei32_v_u8mf2_m

#define vloxseg8ei32_v_u8mf2_m ( ... ) __riscv_vloxseg8ei32_v_u8mf2_tumu(__VA_ARGS__)

◆ vloxseg8ei32_v_u8mf4

#define vloxseg8ei32_v_u8mf4 ( ... ) __riscv_vloxseg8ei32_v_u8mf4(__VA_ARGS__)

◆ vloxseg8ei32_v_u8mf4_m

#define vloxseg8ei32_v_u8mf4_m ( ... ) __riscv_vloxseg8ei32_v_u8mf4_tumu(__VA_ARGS__)

◆ vloxseg8ei32_v_u8mf8

#define vloxseg8ei32_v_u8mf8 ( ... ) __riscv_vloxseg8ei32_v_u8mf8(__VA_ARGS__)

◆ vloxseg8ei32_v_u8mf8_m

#define vloxseg8ei32_v_u8mf8_m ( ... ) __riscv_vloxseg8ei32_v_u8mf8_tumu(__VA_ARGS__)

◆ vloxseg8ei64_v_f16m1

#define vloxseg8ei64_v_f16m1 ( ... ) __riscv_vloxseg8ei64_v_f16m1(__VA_ARGS__)

◆ vloxseg8ei64_v_f16m1_m

#define vloxseg8ei64_v_f16m1_m ( ... ) __riscv_vloxseg8ei64_v_f16m1_tumu(__VA_ARGS__)

◆ vloxseg8ei64_v_f16mf2

#define vloxseg8ei64_v_f16mf2 ( ... ) __riscv_vloxseg8ei64_v_f16mf2(__VA_ARGS__)

◆ vloxseg8ei64_v_f16mf2_m

#define vloxseg8ei64_v_f16mf2_m ( ... ) __riscv_vloxseg8ei64_v_f16mf2_tumu(__VA_ARGS__)

◆ vloxseg8ei64_v_f16mf4

#define vloxseg8ei64_v_f16mf4 ( ... ) __riscv_vloxseg8ei64_v_f16mf4(__VA_ARGS__)

◆ vloxseg8ei64_v_f16mf4_m

#define vloxseg8ei64_v_f16mf4_m ( ... ) __riscv_vloxseg8ei64_v_f16mf4_tumu(__VA_ARGS__)

◆ vloxseg8ei64_v_f32m1

#define vloxseg8ei64_v_f32m1 ( ... ) __riscv_vloxseg8ei64_v_f32m1(__VA_ARGS__)

◆ vloxseg8ei64_v_f32m1_m

#define vloxseg8ei64_v_f32m1_m ( ... ) __riscv_vloxseg8ei64_v_f32m1_tumu(__VA_ARGS__)

◆ vloxseg8ei64_v_f32mf2

#define vloxseg8ei64_v_f32mf2 ( ... ) __riscv_vloxseg8ei64_v_f32mf2(__VA_ARGS__)

◆ vloxseg8ei64_v_f32mf2_m

#define vloxseg8ei64_v_f32mf2_m ( ... ) __riscv_vloxseg8ei64_v_f32mf2_tumu(__VA_ARGS__)

◆ vloxseg8ei64_v_f64m1

#define vloxseg8ei64_v_f64m1 ( ... ) __riscv_vloxseg8ei64_v_f64m1(__VA_ARGS__)

◆ vloxseg8ei64_v_f64m1_m

#define vloxseg8ei64_v_f64m1_m ( ... ) __riscv_vloxseg8ei64_v_f64m1_tumu(__VA_ARGS__)

◆ vloxseg8ei64_v_i16m1

#define vloxseg8ei64_v_i16m1 ( ... ) __riscv_vloxseg8ei64_v_i16m1(__VA_ARGS__)

◆ vloxseg8ei64_v_i16m1_m

#define vloxseg8ei64_v_i16m1_m ( ... ) __riscv_vloxseg8ei64_v_i16m1_tumu(__VA_ARGS__)

◆ vloxseg8ei64_v_i16mf2

#define vloxseg8ei64_v_i16mf2 ( ... ) __riscv_vloxseg8ei64_v_i16mf2(__VA_ARGS__)

◆ vloxseg8ei64_v_i16mf2_m

#define vloxseg8ei64_v_i16mf2_m ( ... ) __riscv_vloxseg8ei64_v_i16mf2_tumu(__VA_ARGS__)

◆ vloxseg8ei64_v_i16mf4

#define vloxseg8ei64_v_i16mf4 ( ... ) __riscv_vloxseg8ei64_v_i16mf4(__VA_ARGS__)

◆ vloxseg8ei64_v_i16mf4_m

#define vloxseg8ei64_v_i16mf4_m ( ... ) __riscv_vloxseg8ei64_v_i16mf4_tumu(__VA_ARGS__)

◆ vloxseg8ei64_v_i32m1

#define vloxseg8ei64_v_i32m1 ( ... ) __riscv_vloxseg8ei64_v_i32m1(__VA_ARGS__)

◆ vloxseg8ei64_v_i32m1_m

#define vloxseg8ei64_v_i32m1_m ( ... ) __riscv_vloxseg8ei64_v_i32m1_tumu(__VA_ARGS__)

◆ vloxseg8ei64_v_i32mf2

#define vloxseg8ei64_v_i32mf2 ( ... ) __riscv_vloxseg8ei64_v_i32mf2(__VA_ARGS__)

◆ vloxseg8ei64_v_i32mf2_m

#define vloxseg8ei64_v_i32mf2_m ( ... ) __riscv_vloxseg8ei64_v_i32mf2_tumu(__VA_ARGS__)

◆ vloxseg8ei64_v_i64m1

#define vloxseg8ei64_v_i64m1 ( ... ) __riscv_vloxseg8ei64_v_i64m1(__VA_ARGS__)

◆ vloxseg8ei64_v_i64m1_m

#define vloxseg8ei64_v_i64m1_m ( ... ) __riscv_vloxseg8ei64_v_i64m1_tumu(__VA_ARGS__)

◆ vloxseg8ei64_v_i8m1

#define vloxseg8ei64_v_i8m1 ( ... ) __riscv_vloxseg8ei64_v_i8m1(__VA_ARGS__)

◆ vloxseg8ei64_v_i8m1_m

#define vloxseg8ei64_v_i8m1_m ( ... ) __riscv_vloxseg8ei64_v_i8m1_tumu(__VA_ARGS__)

◆ vloxseg8ei64_v_i8mf2

#define vloxseg8ei64_v_i8mf2 ( ... ) __riscv_vloxseg8ei64_v_i8mf2(__VA_ARGS__)

◆ vloxseg8ei64_v_i8mf2_m

#define vloxseg8ei64_v_i8mf2_m ( ... ) __riscv_vloxseg8ei64_v_i8mf2_tumu(__VA_ARGS__)

◆ vloxseg8ei64_v_i8mf4

#define vloxseg8ei64_v_i8mf4 ( ... ) __riscv_vloxseg8ei64_v_i8mf4(__VA_ARGS__)

◆ vloxseg8ei64_v_i8mf4_m

#define vloxseg8ei64_v_i8mf4_m ( ... ) __riscv_vloxseg8ei64_v_i8mf4_tumu(__VA_ARGS__)

◆ vloxseg8ei64_v_i8mf8

#define vloxseg8ei64_v_i8mf8 ( ... ) __riscv_vloxseg8ei64_v_i8mf8(__VA_ARGS__)

◆ vloxseg8ei64_v_i8mf8_m

#define vloxseg8ei64_v_i8mf8_m ( ... ) __riscv_vloxseg8ei64_v_i8mf8_tumu(__VA_ARGS__)

◆ vloxseg8ei64_v_u16m1

#define vloxseg8ei64_v_u16m1 ( ... ) __riscv_vloxseg8ei64_v_u16m1(__VA_ARGS__)

◆ vloxseg8ei64_v_u16m1_m

#define vloxseg8ei64_v_u16m1_m ( ... ) __riscv_vloxseg8ei64_v_u16m1_tumu(__VA_ARGS__)

◆ vloxseg8ei64_v_u16mf2

#define vloxseg8ei64_v_u16mf2 ( ... ) __riscv_vloxseg8ei64_v_u16mf2(__VA_ARGS__)

◆ vloxseg8ei64_v_u16mf2_m

#define vloxseg8ei64_v_u16mf2_m ( ... ) __riscv_vloxseg8ei64_v_u16mf2_tumu(__VA_ARGS__)

◆ vloxseg8ei64_v_u16mf4

#define vloxseg8ei64_v_u16mf4 ( ... ) __riscv_vloxseg8ei64_v_u16mf4(__VA_ARGS__)

◆ vloxseg8ei64_v_u16mf4_m

#define vloxseg8ei64_v_u16mf4_m ( ... ) __riscv_vloxseg8ei64_v_u16mf4_tumu(__VA_ARGS__)

◆ vloxseg8ei64_v_u32m1

#define vloxseg8ei64_v_u32m1 ( ... ) __riscv_vloxseg8ei64_v_u32m1(__VA_ARGS__)

◆ vloxseg8ei64_v_u32m1_m

#define vloxseg8ei64_v_u32m1_m ( ... ) __riscv_vloxseg8ei64_v_u32m1_tumu(__VA_ARGS__)

◆ vloxseg8ei64_v_u32mf2

#define vloxseg8ei64_v_u32mf2 ( ... ) __riscv_vloxseg8ei64_v_u32mf2(__VA_ARGS__)

◆ vloxseg8ei64_v_u32mf2_m

#define vloxseg8ei64_v_u32mf2_m ( ... ) __riscv_vloxseg8ei64_v_u32mf2_tumu(__VA_ARGS__)

◆ vloxseg8ei64_v_u64m1

#define vloxseg8ei64_v_u64m1 ( ... ) __riscv_vloxseg8ei64_v_u64m1(__VA_ARGS__)

◆ vloxseg8ei64_v_u64m1_m

#define vloxseg8ei64_v_u64m1_m ( ... ) __riscv_vloxseg8ei64_v_u64m1_tumu(__VA_ARGS__)

◆ vloxseg8ei64_v_u8m1

#define vloxseg8ei64_v_u8m1 ( ... ) __riscv_vloxseg8ei64_v_u8m1(__VA_ARGS__)

◆ vloxseg8ei64_v_u8m1_m

#define vloxseg8ei64_v_u8m1_m ( ... ) __riscv_vloxseg8ei64_v_u8m1_tumu(__VA_ARGS__)

◆ vloxseg8ei64_v_u8mf2

#define vloxseg8ei64_v_u8mf2 ( ... ) __riscv_vloxseg8ei64_v_u8mf2(__VA_ARGS__)

◆ vloxseg8ei64_v_u8mf2_m

#define vloxseg8ei64_v_u8mf2_m ( ... ) __riscv_vloxseg8ei64_v_u8mf2_tumu(__VA_ARGS__)

◆ vloxseg8ei64_v_u8mf4

#define vloxseg8ei64_v_u8mf4 ( ... ) __riscv_vloxseg8ei64_v_u8mf4(__VA_ARGS__)

◆ vloxseg8ei64_v_u8mf4_m

#define vloxseg8ei64_v_u8mf4_m ( ... ) __riscv_vloxseg8ei64_v_u8mf4_tumu(__VA_ARGS__)

◆ vloxseg8ei64_v_u8mf8

#define vloxseg8ei64_v_u8mf8 ( ... ) __riscv_vloxseg8ei64_v_u8mf8(__VA_ARGS__)

◆ vloxseg8ei64_v_u8mf8_m

#define vloxseg8ei64_v_u8mf8_m ( ... ) __riscv_vloxseg8ei64_v_u8mf8_tumu(__VA_ARGS__)

◆ vloxseg8ei8_v_f16m1

#define vloxseg8ei8_v_f16m1 ( ... ) __riscv_vloxseg8ei8_v_f16m1(__VA_ARGS__)

◆ vloxseg8ei8_v_f16m1_m

#define vloxseg8ei8_v_f16m1_m ( ... ) __riscv_vloxseg8ei8_v_f16m1_tumu(__VA_ARGS__)

◆ vloxseg8ei8_v_f16mf2

#define vloxseg8ei8_v_f16mf2 ( ... ) __riscv_vloxseg8ei8_v_f16mf2(__VA_ARGS__)

◆ vloxseg8ei8_v_f16mf2_m

#define vloxseg8ei8_v_f16mf2_m ( ... ) __riscv_vloxseg8ei8_v_f16mf2_tumu(__VA_ARGS__)

◆ vloxseg8ei8_v_f16mf4

#define vloxseg8ei8_v_f16mf4 ( ... ) __riscv_vloxseg8ei8_v_f16mf4(__VA_ARGS__)

◆ vloxseg8ei8_v_f16mf4_m

#define vloxseg8ei8_v_f16mf4_m ( ... ) __riscv_vloxseg8ei8_v_f16mf4_tumu(__VA_ARGS__)

◆ vloxseg8ei8_v_f32m1

#define vloxseg8ei8_v_f32m1 ( ... ) __riscv_vloxseg8ei8_v_f32m1(__VA_ARGS__)

◆ vloxseg8ei8_v_f32m1_m

#define vloxseg8ei8_v_f32m1_m ( ... ) __riscv_vloxseg8ei8_v_f32m1_tumu(__VA_ARGS__)

◆ vloxseg8ei8_v_f32mf2

#define vloxseg8ei8_v_f32mf2 ( ... ) __riscv_vloxseg8ei8_v_f32mf2(__VA_ARGS__)

◆ vloxseg8ei8_v_f32mf2_m

#define vloxseg8ei8_v_f32mf2_m ( ... ) __riscv_vloxseg8ei8_v_f32mf2_tumu(__VA_ARGS__)

◆ vloxseg8ei8_v_f64m1

#define vloxseg8ei8_v_f64m1 ( ... ) __riscv_vloxseg8ei8_v_f64m1(__VA_ARGS__)

◆ vloxseg8ei8_v_f64m1_m

#define vloxseg8ei8_v_f64m1_m ( ... ) __riscv_vloxseg8ei8_v_f64m1_tumu(__VA_ARGS__)

◆ vloxseg8ei8_v_i16m1

#define vloxseg8ei8_v_i16m1 ( ... ) __riscv_vloxseg8ei8_v_i16m1(__VA_ARGS__)

◆ vloxseg8ei8_v_i16m1_m

#define vloxseg8ei8_v_i16m1_m ( ... ) __riscv_vloxseg8ei8_v_i16m1_tumu(__VA_ARGS__)

◆ vloxseg8ei8_v_i16mf2

#define vloxseg8ei8_v_i16mf2 ( ... ) __riscv_vloxseg8ei8_v_i16mf2(__VA_ARGS__)

◆ vloxseg8ei8_v_i16mf2_m

#define vloxseg8ei8_v_i16mf2_m ( ... ) __riscv_vloxseg8ei8_v_i16mf2_tumu(__VA_ARGS__)

◆ vloxseg8ei8_v_i16mf4

#define vloxseg8ei8_v_i16mf4 ( ... ) __riscv_vloxseg8ei8_v_i16mf4(__VA_ARGS__)

◆ vloxseg8ei8_v_i16mf4_m

#define vloxseg8ei8_v_i16mf4_m ( ... ) __riscv_vloxseg8ei8_v_i16mf4_tumu(__VA_ARGS__)

◆ vloxseg8ei8_v_i32m1

#define vloxseg8ei8_v_i32m1 ( ... ) __riscv_vloxseg8ei8_v_i32m1(__VA_ARGS__)

◆ vloxseg8ei8_v_i32m1_m

#define vloxseg8ei8_v_i32m1_m ( ... ) __riscv_vloxseg8ei8_v_i32m1_tumu(__VA_ARGS__)

◆ vloxseg8ei8_v_i32mf2

#define vloxseg8ei8_v_i32mf2 ( ... ) __riscv_vloxseg8ei8_v_i32mf2(__VA_ARGS__)

◆ vloxseg8ei8_v_i32mf2_m

#define vloxseg8ei8_v_i32mf2_m ( ... ) __riscv_vloxseg8ei8_v_i32mf2_tumu(__VA_ARGS__)

◆ vloxseg8ei8_v_i64m1

#define vloxseg8ei8_v_i64m1 ( ... ) __riscv_vloxseg8ei8_v_i64m1(__VA_ARGS__)

◆ vloxseg8ei8_v_i64m1_m

#define vloxseg8ei8_v_i64m1_m ( ... ) __riscv_vloxseg8ei8_v_i64m1_tumu(__VA_ARGS__)

◆ vloxseg8ei8_v_i8m1

#define vloxseg8ei8_v_i8m1 ( ... ) __riscv_vloxseg8ei8_v_i8m1(__VA_ARGS__)

◆ vloxseg8ei8_v_i8m1_m

#define vloxseg8ei8_v_i8m1_m ( ... ) __riscv_vloxseg8ei8_v_i8m1_tumu(__VA_ARGS__)

◆ vloxseg8ei8_v_i8mf2

#define vloxseg8ei8_v_i8mf2 ( ... ) __riscv_vloxseg8ei8_v_i8mf2(__VA_ARGS__)

◆ vloxseg8ei8_v_i8mf2_m

#define vloxseg8ei8_v_i8mf2_m ( ... ) __riscv_vloxseg8ei8_v_i8mf2_tumu(__VA_ARGS__)

◆ vloxseg8ei8_v_i8mf4

#define vloxseg8ei8_v_i8mf4 ( ... ) __riscv_vloxseg8ei8_v_i8mf4(__VA_ARGS__)

◆ vloxseg8ei8_v_i8mf4_m

#define vloxseg8ei8_v_i8mf4_m ( ... ) __riscv_vloxseg8ei8_v_i8mf4_tumu(__VA_ARGS__)

◆ vloxseg8ei8_v_i8mf8

#define vloxseg8ei8_v_i8mf8 ( ... ) __riscv_vloxseg8ei8_v_i8mf8(__VA_ARGS__)

◆ vloxseg8ei8_v_i8mf8_m

#define vloxseg8ei8_v_i8mf8_m ( ... ) __riscv_vloxseg8ei8_v_i8mf8_tumu(__VA_ARGS__)

◆ vloxseg8ei8_v_u16m1

#define vloxseg8ei8_v_u16m1 ( ... ) __riscv_vloxseg8ei8_v_u16m1(__VA_ARGS__)

◆ vloxseg8ei8_v_u16m1_m

#define vloxseg8ei8_v_u16m1_m ( ... ) __riscv_vloxseg8ei8_v_u16m1_tumu(__VA_ARGS__)

◆ vloxseg8ei8_v_u16mf2

#define vloxseg8ei8_v_u16mf2 ( ... ) __riscv_vloxseg8ei8_v_u16mf2(__VA_ARGS__)

◆ vloxseg8ei8_v_u16mf2_m

#define vloxseg8ei8_v_u16mf2_m ( ... ) __riscv_vloxseg8ei8_v_u16mf2_tumu(__VA_ARGS__)

◆ vloxseg8ei8_v_u16mf4

#define vloxseg8ei8_v_u16mf4 ( ... ) __riscv_vloxseg8ei8_v_u16mf4(__VA_ARGS__)

◆ vloxseg8ei8_v_u16mf4_m

#define vloxseg8ei8_v_u16mf4_m ( ... ) __riscv_vloxseg8ei8_v_u16mf4_tumu(__VA_ARGS__)

◆ vloxseg8ei8_v_u32m1

#define vloxseg8ei8_v_u32m1 ( ... ) __riscv_vloxseg8ei8_v_u32m1(__VA_ARGS__)

◆ vloxseg8ei8_v_u32m1_m

#define vloxseg8ei8_v_u32m1_m ( ... ) __riscv_vloxseg8ei8_v_u32m1_tumu(__VA_ARGS__)

◆ vloxseg8ei8_v_u32mf2

#define vloxseg8ei8_v_u32mf2 ( ... ) __riscv_vloxseg8ei8_v_u32mf2(__VA_ARGS__)

◆ vloxseg8ei8_v_u32mf2_m

#define vloxseg8ei8_v_u32mf2_m ( ... ) __riscv_vloxseg8ei8_v_u32mf2_tumu(__VA_ARGS__)

◆ vloxseg8ei8_v_u64m1

#define vloxseg8ei8_v_u64m1 ( ... ) __riscv_vloxseg8ei8_v_u64m1(__VA_ARGS__)

◆ vloxseg8ei8_v_u64m1_m

#define vloxseg8ei8_v_u64m1_m ( ... ) __riscv_vloxseg8ei8_v_u64m1_tumu(__VA_ARGS__)

◆ vloxseg8ei8_v_u8m1

#define vloxseg8ei8_v_u8m1 ( ... ) __riscv_vloxseg8ei8_v_u8m1(__VA_ARGS__)

◆ vloxseg8ei8_v_u8m1_m

#define vloxseg8ei8_v_u8m1_m ( ... ) __riscv_vloxseg8ei8_v_u8m1_tumu(__VA_ARGS__)

◆ vloxseg8ei8_v_u8mf2

#define vloxseg8ei8_v_u8mf2 ( ... ) __riscv_vloxseg8ei8_v_u8mf2(__VA_ARGS__)

◆ vloxseg8ei8_v_u8mf2_m

#define vloxseg8ei8_v_u8mf2_m ( ... ) __riscv_vloxseg8ei8_v_u8mf2_tumu(__VA_ARGS__)

◆ vloxseg8ei8_v_u8mf4

#define vloxseg8ei8_v_u8mf4 ( ... ) __riscv_vloxseg8ei8_v_u8mf4(__VA_ARGS__)

◆ vloxseg8ei8_v_u8mf4_m

#define vloxseg8ei8_v_u8mf4_m ( ... ) __riscv_vloxseg8ei8_v_u8mf4_tumu(__VA_ARGS__)

◆ vloxseg8ei8_v_u8mf8

#define vloxseg8ei8_v_u8mf8 ( ... ) __riscv_vloxseg8ei8_v_u8mf8(__VA_ARGS__)

◆ vloxseg8ei8_v_u8mf8_m

#define vloxseg8ei8_v_u8mf8_m ( ... ) __riscv_vloxseg8ei8_v_u8mf8_tumu(__VA_ARGS__)

◆ vlse16_v_f16m1

#define vlse16_v_f16m1 ( ... ) __riscv_vlse16_v_f16m1(__VA_ARGS__)

◆ vlse16_v_f16m1_m

#define vlse16_v_f16m1_m ( ... ) __riscv_vlse16_v_f16m1_tumu(__VA_ARGS__)

◆ vlse16_v_f16m2

#define vlse16_v_f16m2 ( ... ) __riscv_vlse16_v_f16m2(__VA_ARGS__)

◆ vlse16_v_f16m2_m

#define vlse16_v_f16m2_m ( ... ) __riscv_vlse16_v_f16m2_tumu(__VA_ARGS__)

◆ vlse16_v_f16m4

#define vlse16_v_f16m4 ( ... ) __riscv_vlse16_v_f16m4(__VA_ARGS__)

◆ vlse16_v_f16m4_m

#define vlse16_v_f16m4_m ( ... ) __riscv_vlse16_v_f16m4_tumu(__VA_ARGS__)

◆ vlse16_v_f16m8

#define vlse16_v_f16m8 ( ... ) __riscv_vlse16_v_f16m8(__VA_ARGS__)

◆ vlse16_v_f16m8_m

#define vlse16_v_f16m8_m ( ... ) __riscv_vlse16_v_f16m8_tumu(__VA_ARGS__)

◆ vlse16_v_f16mf2

#define vlse16_v_f16mf2 ( ... ) __riscv_vlse16_v_f16mf2(__VA_ARGS__)

◆ vlse16_v_f16mf2_m

#define vlse16_v_f16mf2_m ( ... ) __riscv_vlse16_v_f16mf2_tumu(__VA_ARGS__)

◆ vlse16_v_f16mf4

#define vlse16_v_f16mf4 ( ... ) __riscv_vlse16_v_f16mf4(__VA_ARGS__)

◆ vlse16_v_f16mf4_m

#define vlse16_v_f16mf4_m ( ... ) __riscv_vlse16_v_f16mf4_tumu(__VA_ARGS__)

◆ vlse16_v_i16m1

#define vlse16_v_i16m1 ( ... ) __riscv_vlse16_v_i16m1(__VA_ARGS__)

◆ vlse16_v_i16m1_m

#define vlse16_v_i16m1_m ( ... ) __riscv_vlse16_v_i16m1_tumu(__VA_ARGS__)

◆ vlse16_v_i16m2

#define vlse16_v_i16m2 ( ... ) __riscv_vlse16_v_i16m2(__VA_ARGS__)

◆ vlse16_v_i16m2_m

#define vlse16_v_i16m2_m ( ... ) __riscv_vlse16_v_i16m2_tumu(__VA_ARGS__)

◆ vlse16_v_i16m4

#define vlse16_v_i16m4 ( ... ) __riscv_vlse16_v_i16m4(__VA_ARGS__)

◆ vlse16_v_i16m4_m

#define vlse16_v_i16m4_m ( ... ) __riscv_vlse16_v_i16m4_tumu(__VA_ARGS__)

◆ vlse16_v_i16m8

#define vlse16_v_i16m8 ( ... ) __riscv_vlse16_v_i16m8(__VA_ARGS__)

◆ vlse16_v_i16m8_m

#define vlse16_v_i16m8_m ( ... ) __riscv_vlse16_v_i16m8_tumu(__VA_ARGS__)

◆ vlse16_v_i16mf2

#define vlse16_v_i16mf2 ( ... ) __riscv_vlse16_v_i16mf2(__VA_ARGS__)

◆ vlse16_v_i16mf2_m

#define vlse16_v_i16mf2_m ( ... ) __riscv_vlse16_v_i16mf2_tumu(__VA_ARGS__)

◆ vlse16_v_i16mf4

#define vlse16_v_i16mf4 ( ... ) __riscv_vlse16_v_i16mf4(__VA_ARGS__)

◆ vlse16_v_i16mf4_m

#define vlse16_v_i16mf4_m ( ... ) __riscv_vlse16_v_i16mf4_tumu(__VA_ARGS__)

◆ vlse16_v_u16m1

#define vlse16_v_u16m1 ( ... ) __riscv_vlse16_v_u16m1(__VA_ARGS__)

◆ vlse16_v_u16m1_m

#define vlse16_v_u16m1_m ( ... ) __riscv_vlse16_v_u16m1_tumu(__VA_ARGS__)

◆ vlse16_v_u16m2

#define vlse16_v_u16m2 ( ... ) __riscv_vlse16_v_u16m2(__VA_ARGS__)

◆ vlse16_v_u16m2_m

#define vlse16_v_u16m2_m ( ... ) __riscv_vlse16_v_u16m2_tumu(__VA_ARGS__)

◆ vlse16_v_u16m4

#define vlse16_v_u16m4 ( ... ) __riscv_vlse16_v_u16m4(__VA_ARGS__)

◆ vlse16_v_u16m4_m

#define vlse16_v_u16m4_m ( ... ) __riscv_vlse16_v_u16m4_tumu(__VA_ARGS__)

◆ vlse16_v_u16m8

#define vlse16_v_u16m8 ( ... ) __riscv_vlse16_v_u16m8(__VA_ARGS__)

◆ vlse16_v_u16m8_m

#define vlse16_v_u16m8_m ( ... ) __riscv_vlse16_v_u16m8_tumu(__VA_ARGS__)

◆ vlse16_v_u16mf2

#define vlse16_v_u16mf2 ( ... ) __riscv_vlse16_v_u16mf2(__VA_ARGS__)

◆ vlse16_v_u16mf2_m

#define vlse16_v_u16mf2_m ( ... ) __riscv_vlse16_v_u16mf2_tumu(__VA_ARGS__)

◆ vlse16_v_u16mf4

#define vlse16_v_u16mf4 ( ... ) __riscv_vlse16_v_u16mf4(__VA_ARGS__)

◆ vlse16_v_u16mf4_m

#define vlse16_v_u16mf4_m ( ... ) __riscv_vlse16_v_u16mf4_tumu(__VA_ARGS__)

◆ vlse32_v_f32m1

#define vlse32_v_f32m1 ( ... ) __riscv_vlse32_v_f32m1(__VA_ARGS__)

◆ vlse32_v_f32m1_m

#define vlse32_v_f32m1_m ( ... ) __riscv_vlse32_v_f32m1_tumu(__VA_ARGS__)

◆ vlse32_v_f32m2

#define vlse32_v_f32m2 ( ... ) __riscv_vlse32_v_f32m2(__VA_ARGS__)

◆ vlse32_v_f32m2_m

#define vlse32_v_f32m2_m ( ... ) __riscv_vlse32_v_f32m2_tumu(__VA_ARGS__)

◆ vlse32_v_f32m4

#define vlse32_v_f32m4 ( ... ) __riscv_vlse32_v_f32m4(__VA_ARGS__)

◆ vlse32_v_f32m4_m

#define vlse32_v_f32m4_m ( ... ) __riscv_vlse32_v_f32m4_tumu(__VA_ARGS__)

◆ vlse32_v_f32m8

#define vlse32_v_f32m8 ( ... ) __riscv_vlse32_v_f32m8(__VA_ARGS__)

◆ vlse32_v_f32m8_m

#define vlse32_v_f32m8_m ( ... ) __riscv_vlse32_v_f32m8_tumu(__VA_ARGS__)

◆ vlse32_v_f32mf2

#define vlse32_v_f32mf2 ( ... ) __riscv_vlse32_v_f32mf2(__VA_ARGS__)

◆ vlse32_v_f32mf2_m

#define vlse32_v_f32mf2_m ( ... ) __riscv_vlse32_v_f32mf2_tumu(__VA_ARGS__)

◆ vlse32_v_i32m1

#define vlse32_v_i32m1 ( ... ) __riscv_vlse32_v_i32m1(__VA_ARGS__)

◆ vlse32_v_i32m1_m

#define vlse32_v_i32m1_m ( ... ) __riscv_vlse32_v_i32m1_tumu(__VA_ARGS__)

◆ vlse32_v_i32m2

#define vlse32_v_i32m2 ( ... ) __riscv_vlse32_v_i32m2(__VA_ARGS__)

◆ vlse32_v_i32m2_m

#define vlse32_v_i32m2_m ( ... ) __riscv_vlse32_v_i32m2_tumu(__VA_ARGS__)

◆ vlse32_v_i32m4

#define vlse32_v_i32m4 ( ... ) __riscv_vlse32_v_i32m4(__VA_ARGS__)

◆ vlse32_v_i32m4_m

#define vlse32_v_i32m4_m ( ... ) __riscv_vlse32_v_i32m4_tumu(__VA_ARGS__)

◆ vlse32_v_i32m8

#define vlse32_v_i32m8 ( ... ) __riscv_vlse32_v_i32m8(__VA_ARGS__)

◆ vlse32_v_i32m8_m

#define vlse32_v_i32m8_m ( ... ) __riscv_vlse32_v_i32m8_tumu(__VA_ARGS__)

◆ vlse32_v_i32mf2

#define vlse32_v_i32mf2 ( ... ) __riscv_vlse32_v_i32mf2(__VA_ARGS__)

◆ vlse32_v_i32mf2_m

#define vlse32_v_i32mf2_m ( ... ) __riscv_vlse32_v_i32mf2_tumu(__VA_ARGS__)

◆ vlse32_v_u32m1

#define vlse32_v_u32m1 ( ... ) __riscv_vlse32_v_u32m1(__VA_ARGS__)

◆ vlse32_v_u32m1_m

#define vlse32_v_u32m1_m ( ... ) __riscv_vlse32_v_u32m1_tumu(__VA_ARGS__)

◆ vlse32_v_u32m2

#define vlse32_v_u32m2 ( ... ) __riscv_vlse32_v_u32m2(__VA_ARGS__)

◆ vlse32_v_u32m2_m

#define vlse32_v_u32m2_m ( ... ) __riscv_vlse32_v_u32m2_tumu(__VA_ARGS__)

◆ vlse32_v_u32m4

#define vlse32_v_u32m4 ( ... ) __riscv_vlse32_v_u32m4(__VA_ARGS__)

◆ vlse32_v_u32m4_m

#define vlse32_v_u32m4_m ( ... ) __riscv_vlse32_v_u32m4_tumu(__VA_ARGS__)

◆ vlse32_v_u32m8

#define vlse32_v_u32m8 ( ... ) __riscv_vlse32_v_u32m8(__VA_ARGS__)

◆ vlse32_v_u32m8_m

#define vlse32_v_u32m8_m ( ... ) __riscv_vlse32_v_u32m8_tumu(__VA_ARGS__)

◆ vlse32_v_u32mf2

#define vlse32_v_u32mf2 ( ... ) __riscv_vlse32_v_u32mf2(__VA_ARGS__)

◆ vlse32_v_u32mf2_m

#define vlse32_v_u32mf2_m ( ... ) __riscv_vlse32_v_u32mf2_tumu(__VA_ARGS__)

◆ vlse64_v_f64m1

#define vlse64_v_f64m1 ( ... ) __riscv_vlse64_v_f64m1(__VA_ARGS__)

◆ vlse64_v_f64m1_m

#define vlse64_v_f64m1_m ( ... ) __riscv_vlse64_v_f64m1_tumu(__VA_ARGS__)

◆ vlse64_v_f64m2

#define vlse64_v_f64m2 ( ... ) __riscv_vlse64_v_f64m2(__VA_ARGS__)

◆ vlse64_v_f64m2_m

#define vlse64_v_f64m2_m ( ... ) __riscv_vlse64_v_f64m2_tumu(__VA_ARGS__)

◆ vlse64_v_f64m4

#define vlse64_v_f64m4 ( ... ) __riscv_vlse64_v_f64m4(__VA_ARGS__)

◆ vlse64_v_f64m4_m

#define vlse64_v_f64m4_m ( ... ) __riscv_vlse64_v_f64m4_tumu(__VA_ARGS__)

◆ vlse64_v_f64m8

#define vlse64_v_f64m8 ( ... ) __riscv_vlse64_v_f64m8(__VA_ARGS__)

◆ vlse64_v_f64m8_m

#define vlse64_v_f64m8_m ( ... ) __riscv_vlse64_v_f64m8_tumu(__VA_ARGS__)

◆ vlse64_v_i64m1

#define vlse64_v_i64m1 ( ... ) __riscv_vlse64_v_i64m1(__VA_ARGS__)

◆ vlse64_v_i64m1_m

#define vlse64_v_i64m1_m ( ... ) __riscv_vlse64_v_i64m1_tumu(__VA_ARGS__)

◆ vlse64_v_i64m2

#define vlse64_v_i64m2 ( ... ) __riscv_vlse64_v_i64m2(__VA_ARGS__)

◆ vlse64_v_i64m2_m

#define vlse64_v_i64m2_m ( ... ) __riscv_vlse64_v_i64m2_tumu(__VA_ARGS__)

◆ vlse64_v_i64m4

#define vlse64_v_i64m4 ( ... ) __riscv_vlse64_v_i64m4(__VA_ARGS__)

◆ vlse64_v_i64m4_m

#define vlse64_v_i64m4_m ( ... ) __riscv_vlse64_v_i64m4_tumu(__VA_ARGS__)

◆ vlse64_v_i64m8

#define vlse64_v_i64m8 ( ... ) __riscv_vlse64_v_i64m8(__VA_ARGS__)

◆ vlse64_v_i64m8_m

#define vlse64_v_i64m8_m ( ... ) __riscv_vlse64_v_i64m8_tumu(__VA_ARGS__)

◆ vlse64_v_u64m1

#define vlse64_v_u64m1 ( ... ) __riscv_vlse64_v_u64m1(__VA_ARGS__)

◆ vlse64_v_u64m1_m

#define vlse64_v_u64m1_m ( ... ) __riscv_vlse64_v_u64m1_tumu(__VA_ARGS__)

◆ vlse64_v_u64m2

#define vlse64_v_u64m2 ( ... ) __riscv_vlse64_v_u64m2(__VA_ARGS__)

◆ vlse64_v_u64m2_m

#define vlse64_v_u64m2_m ( ... ) __riscv_vlse64_v_u64m2_tumu(__VA_ARGS__)

◆ vlse64_v_u64m4

#define vlse64_v_u64m4 ( ... ) __riscv_vlse64_v_u64m4(__VA_ARGS__)

◆ vlse64_v_u64m4_m

#define vlse64_v_u64m4_m ( ... ) __riscv_vlse64_v_u64m4_tumu(__VA_ARGS__)

◆ vlse64_v_u64m8

#define vlse64_v_u64m8 ( ... ) __riscv_vlse64_v_u64m8(__VA_ARGS__)

◆ vlse64_v_u64m8_m

#define vlse64_v_u64m8_m ( ... ) __riscv_vlse64_v_u64m8_tumu(__VA_ARGS__)

◆ vlse8_v_i8m1

#define vlse8_v_i8m1 ( ... ) __riscv_vlse8_v_i8m1(__VA_ARGS__)

◆ vlse8_v_i8m1_m

#define vlse8_v_i8m1_m ( ... ) __riscv_vlse8_v_i8m1_tumu(__VA_ARGS__)

◆ vlse8_v_i8m2

#define vlse8_v_i8m2 ( ... ) __riscv_vlse8_v_i8m2(__VA_ARGS__)

◆ vlse8_v_i8m2_m

#define vlse8_v_i8m2_m ( ... ) __riscv_vlse8_v_i8m2_tumu(__VA_ARGS__)

◆ vlse8_v_i8m4

#define vlse8_v_i8m4 ( ... ) __riscv_vlse8_v_i8m4(__VA_ARGS__)

◆ vlse8_v_i8m4_m

#define vlse8_v_i8m4_m ( ... ) __riscv_vlse8_v_i8m4_tumu(__VA_ARGS__)

◆ vlse8_v_i8m8

#define vlse8_v_i8m8 ( ... ) __riscv_vlse8_v_i8m8(__VA_ARGS__)

◆ vlse8_v_i8m8_m

#define vlse8_v_i8m8_m ( ... ) __riscv_vlse8_v_i8m8_tumu(__VA_ARGS__)

◆ vlse8_v_i8mf2

#define vlse8_v_i8mf2 ( ... ) __riscv_vlse8_v_i8mf2(__VA_ARGS__)

◆ vlse8_v_i8mf2_m

#define vlse8_v_i8mf2_m ( ... ) __riscv_vlse8_v_i8mf2_tumu(__VA_ARGS__)

◆ vlse8_v_i8mf4

#define vlse8_v_i8mf4 ( ... ) __riscv_vlse8_v_i8mf4(__VA_ARGS__)

◆ vlse8_v_i8mf4_m

#define vlse8_v_i8mf4_m ( ... ) __riscv_vlse8_v_i8mf4_tumu(__VA_ARGS__)

◆ vlse8_v_i8mf8

#define vlse8_v_i8mf8 ( ... ) __riscv_vlse8_v_i8mf8(__VA_ARGS__)

◆ vlse8_v_i8mf8_m

#define vlse8_v_i8mf8_m ( ... ) __riscv_vlse8_v_i8mf8_tumu(__VA_ARGS__)

◆ vlse8_v_u8m1

#define vlse8_v_u8m1 ( ... ) __riscv_vlse8_v_u8m1(__VA_ARGS__)

◆ vlse8_v_u8m1_m

#define vlse8_v_u8m1_m ( ... ) __riscv_vlse8_v_u8m1_tumu(__VA_ARGS__)

◆ vlse8_v_u8m2

#define vlse8_v_u8m2 ( ... ) __riscv_vlse8_v_u8m2(__VA_ARGS__)

◆ vlse8_v_u8m2_m

#define vlse8_v_u8m2_m ( ... ) __riscv_vlse8_v_u8m2_tumu(__VA_ARGS__)

◆ vlse8_v_u8m4

#define vlse8_v_u8m4 ( ... ) __riscv_vlse8_v_u8m4(__VA_ARGS__)

◆ vlse8_v_u8m4_m

#define vlse8_v_u8m4_m ( ... ) __riscv_vlse8_v_u8m4_tumu(__VA_ARGS__)

◆ vlse8_v_u8m8

#define vlse8_v_u8m8 ( ... ) __riscv_vlse8_v_u8m8(__VA_ARGS__)

◆ vlse8_v_u8m8_m

#define vlse8_v_u8m8_m ( ... ) __riscv_vlse8_v_u8m8_tumu(__VA_ARGS__)

◆ vlse8_v_u8mf2

#define vlse8_v_u8mf2 ( ... ) __riscv_vlse8_v_u8mf2(__VA_ARGS__)

◆ vlse8_v_u8mf2_m

#define vlse8_v_u8mf2_m ( ... ) __riscv_vlse8_v_u8mf2_tumu(__VA_ARGS__)

◆ vlse8_v_u8mf4

#define vlse8_v_u8mf4 ( ... ) __riscv_vlse8_v_u8mf4(__VA_ARGS__)

◆ vlse8_v_u8mf4_m

#define vlse8_v_u8mf4_m ( ... ) __riscv_vlse8_v_u8mf4_tumu(__VA_ARGS__)

◆ vlse8_v_u8mf8

#define vlse8_v_u8mf8 ( ... ) __riscv_vlse8_v_u8mf8(__VA_ARGS__)

◆ vlse8_v_u8mf8_m

#define vlse8_v_u8mf8_m ( ... ) __riscv_vlse8_v_u8mf8_tumu(__VA_ARGS__)

◆ vlseg2e16_v_f16m1

#define vlseg2e16_v_f16m1 ( ... ) __riscv_vlseg2e16_v_f16m1(__VA_ARGS__)

◆ vlseg2e16_v_f16m1_m

#define vlseg2e16_v_f16m1_m ( ... ) __riscv_vlseg2e16_v_f16m1_tumu(__VA_ARGS__)

◆ vlseg2e16_v_f16m2

#define vlseg2e16_v_f16m2 ( ... ) __riscv_vlseg2e16_v_f16m2(__VA_ARGS__)

◆ vlseg2e16_v_f16m2_m

#define vlseg2e16_v_f16m2_m ( ... ) __riscv_vlseg2e16_v_f16m2_tumu(__VA_ARGS__)

◆ vlseg2e16_v_f16m4

#define vlseg2e16_v_f16m4 ( ... ) __riscv_vlseg2e16_v_f16m4(__VA_ARGS__)

◆ vlseg2e16_v_f16m4_m

#define vlseg2e16_v_f16m4_m ( ... ) __riscv_vlseg2e16_v_f16m4_tumu(__VA_ARGS__)

◆ vlseg2e16_v_f16mf2

#define vlseg2e16_v_f16mf2 ( ... ) __riscv_vlseg2e16_v_f16mf2(__VA_ARGS__)

◆ vlseg2e16_v_f16mf2_m

#define vlseg2e16_v_f16mf2_m ( ... ) __riscv_vlseg2e16_v_f16mf2_tumu(__VA_ARGS__)

◆ vlseg2e16_v_f16mf4

#define vlseg2e16_v_f16mf4 ( ... ) __riscv_vlseg2e16_v_f16mf4(__VA_ARGS__)

◆ vlseg2e16_v_f16mf4_m

#define vlseg2e16_v_f16mf4_m ( ... ) __riscv_vlseg2e16_v_f16mf4_tumu(__VA_ARGS__)

◆ vlseg2e16_v_i16m1

#define vlseg2e16_v_i16m1 ( ... ) __riscv_vlseg2e16_v_i16m1(__VA_ARGS__)

◆ vlseg2e16_v_i16m1_m

#define vlseg2e16_v_i16m1_m ( ... ) __riscv_vlseg2e16_v_i16m1_tumu(__VA_ARGS__)

◆ vlseg2e16_v_i16m2

#define vlseg2e16_v_i16m2 ( ... ) __riscv_vlseg2e16_v_i16m2(__VA_ARGS__)

◆ vlseg2e16_v_i16m2_m

#define vlseg2e16_v_i16m2_m ( ... ) __riscv_vlseg2e16_v_i16m2_tumu(__VA_ARGS__)

◆ vlseg2e16_v_i16m4

#define vlseg2e16_v_i16m4 ( ... ) __riscv_vlseg2e16_v_i16m4(__VA_ARGS__)

◆ vlseg2e16_v_i16m4_m

#define vlseg2e16_v_i16m4_m ( ... ) __riscv_vlseg2e16_v_i16m4_tumu(__VA_ARGS__)

◆ vlseg2e16_v_i16mf2

#define vlseg2e16_v_i16mf2 ( ... ) __riscv_vlseg2e16_v_i16mf2(__VA_ARGS__)

◆ vlseg2e16_v_i16mf2_m

#define vlseg2e16_v_i16mf2_m ( ... ) __riscv_vlseg2e16_v_i16mf2_tumu(__VA_ARGS__)

◆ vlseg2e16_v_i16mf4

#define vlseg2e16_v_i16mf4 ( ... ) __riscv_vlseg2e16_v_i16mf4(__VA_ARGS__)

◆ vlseg2e16_v_i16mf4_m

#define vlseg2e16_v_i16mf4_m ( ... ) __riscv_vlseg2e16_v_i16mf4_tumu(__VA_ARGS__)

◆ vlseg2e16_v_u16m1

#define vlseg2e16_v_u16m1 ( ... ) __riscv_vlseg2e16_v_u16m1(__VA_ARGS__)

◆ vlseg2e16_v_u16m1_m

#define vlseg2e16_v_u16m1_m ( ... ) __riscv_vlseg2e16_v_u16m1_tumu(__VA_ARGS__)

◆ vlseg2e16_v_u16m2

#define vlseg2e16_v_u16m2 ( ... ) __riscv_vlseg2e16_v_u16m2(__VA_ARGS__)

◆ vlseg2e16_v_u16m2_m

#define vlseg2e16_v_u16m2_m ( ... ) __riscv_vlseg2e16_v_u16m2_tumu(__VA_ARGS__)

◆ vlseg2e16_v_u16m4

#define vlseg2e16_v_u16m4 ( ... ) __riscv_vlseg2e16_v_u16m4(__VA_ARGS__)

◆ vlseg2e16_v_u16m4_m

#define vlseg2e16_v_u16m4_m ( ... ) __riscv_vlseg2e16_v_u16m4_tumu(__VA_ARGS__)

◆ vlseg2e16_v_u16mf2

#define vlseg2e16_v_u16mf2 ( ... ) __riscv_vlseg2e16_v_u16mf2(__VA_ARGS__)

◆ vlseg2e16_v_u16mf2_m

#define vlseg2e16_v_u16mf2_m ( ... ) __riscv_vlseg2e16_v_u16mf2_tumu(__VA_ARGS__)

◆ vlseg2e16_v_u16mf4

#define vlseg2e16_v_u16mf4 ( ... ) __riscv_vlseg2e16_v_u16mf4(__VA_ARGS__)

◆ vlseg2e16_v_u16mf4_m

#define vlseg2e16_v_u16mf4_m ( ... ) __riscv_vlseg2e16_v_u16mf4_tumu(__VA_ARGS__)

◆ vlseg2e16ff_v_f16m1

#define vlseg2e16ff_v_f16m1 ( ... ) __riscv_vlseg2e16ff_v_f16m1(__VA_ARGS__)

◆ vlseg2e16ff_v_f16m1_m

#define vlseg2e16ff_v_f16m1_m ( ... ) __riscv_vlseg2e16ff_v_f16m1_tumu(__VA_ARGS__)

◆ vlseg2e16ff_v_f16m2

#define vlseg2e16ff_v_f16m2 ( ... ) __riscv_vlseg2e16ff_v_f16m2(__VA_ARGS__)

◆ vlseg2e16ff_v_f16m2_m

#define vlseg2e16ff_v_f16m2_m ( ... ) __riscv_vlseg2e16ff_v_f16m2_tumu(__VA_ARGS__)

◆ vlseg2e16ff_v_f16m4

#define vlseg2e16ff_v_f16m4 ( ... ) __riscv_vlseg2e16ff_v_f16m4(__VA_ARGS__)

◆ vlseg2e16ff_v_f16m4_m

#define vlseg2e16ff_v_f16m4_m ( ... ) __riscv_vlseg2e16ff_v_f16m4_tumu(__VA_ARGS__)

◆ vlseg2e16ff_v_f16mf2

#define vlseg2e16ff_v_f16mf2 ( ... ) __riscv_vlseg2e16ff_v_f16mf2(__VA_ARGS__)

◆ vlseg2e16ff_v_f16mf2_m

#define vlseg2e16ff_v_f16mf2_m ( ... ) __riscv_vlseg2e16ff_v_f16mf2_tumu(__VA_ARGS__)

◆ vlseg2e16ff_v_f16mf4

#define vlseg2e16ff_v_f16mf4 ( ... ) __riscv_vlseg2e16ff_v_f16mf4(__VA_ARGS__)

◆ vlseg2e16ff_v_f16mf4_m

#define vlseg2e16ff_v_f16mf4_m ( ... ) __riscv_vlseg2e16ff_v_f16mf4_tumu(__VA_ARGS__)

◆ vlseg2e16ff_v_i16m1

#define vlseg2e16ff_v_i16m1 ( ... ) __riscv_vlseg2e16ff_v_i16m1(__VA_ARGS__)

◆ vlseg2e16ff_v_i16m1_m

#define vlseg2e16ff_v_i16m1_m ( ... ) __riscv_vlseg2e16ff_v_i16m1_tumu(__VA_ARGS__)

◆ vlseg2e16ff_v_i16m2

#define vlseg2e16ff_v_i16m2 ( ... ) __riscv_vlseg2e16ff_v_i16m2(__VA_ARGS__)

◆ vlseg2e16ff_v_i16m2_m

#define vlseg2e16ff_v_i16m2_m ( ... ) __riscv_vlseg2e16ff_v_i16m2_tumu(__VA_ARGS__)

◆ vlseg2e16ff_v_i16m4

#define vlseg2e16ff_v_i16m4 ( ... ) __riscv_vlseg2e16ff_v_i16m4(__VA_ARGS__)

◆ vlseg2e16ff_v_i16m4_m

#define vlseg2e16ff_v_i16m4_m ( ... ) __riscv_vlseg2e16ff_v_i16m4_tumu(__VA_ARGS__)

◆ vlseg2e16ff_v_i16mf2

#define vlseg2e16ff_v_i16mf2 ( ... ) __riscv_vlseg2e16ff_v_i16mf2(__VA_ARGS__)

◆ vlseg2e16ff_v_i16mf2_m

#define vlseg2e16ff_v_i16mf2_m ( ... ) __riscv_vlseg2e16ff_v_i16mf2_tumu(__VA_ARGS__)

◆ vlseg2e16ff_v_i16mf4

#define vlseg2e16ff_v_i16mf4 ( ... ) __riscv_vlseg2e16ff_v_i16mf4(__VA_ARGS__)

◆ vlseg2e16ff_v_i16mf4_m

#define vlseg2e16ff_v_i16mf4_m ( ... ) __riscv_vlseg2e16ff_v_i16mf4_tumu(__VA_ARGS__)

◆ vlseg2e16ff_v_u16m1

#define vlseg2e16ff_v_u16m1 ( ... ) __riscv_vlseg2e16ff_v_u16m1(__VA_ARGS__)

◆ vlseg2e16ff_v_u16m1_m

#define vlseg2e16ff_v_u16m1_m ( ... ) __riscv_vlseg2e16ff_v_u16m1_tumu(__VA_ARGS__)

◆ vlseg2e16ff_v_u16m2

#define vlseg2e16ff_v_u16m2 ( ... ) __riscv_vlseg2e16ff_v_u16m2(__VA_ARGS__)

◆ vlseg2e16ff_v_u16m2_m

#define vlseg2e16ff_v_u16m2_m ( ... ) __riscv_vlseg2e16ff_v_u16m2_tumu(__VA_ARGS__)

◆ vlseg2e16ff_v_u16m4

#define vlseg2e16ff_v_u16m4 ( ... ) __riscv_vlseg2e16ff_v_u16m4(__VA_ARGS__)

◆ vlseg2e16ff_v_u16m4_m

#define vlseg2e16ff_v_u16m4_m ( ... ) __riscv_vlseg2e16ff_v_u16m4_tumu(__VA_ARGS__)

◆ vlseg2e16ff_v_u16mf2

#define vlseg2e16ff_v_u16mf2 ( ... ) __riscv_vlseg2e16ff_v_u16mf2(__VA_ARGS__)

◆ vlseg2e16ff_v_u16mf2_m

#define vlseg2e16ff_v_u16mf2_m ( ... ) __riscv_vlseg2e16ff_v_u16mf2_tumu(__VA_ARGS__)

◆ vlseg2e16ff_v_u16mf4

#define vlseg2e16ff_v_u16mf4 ( ... ) __riscv_vlseg2e16ff_v_u16mf4(__VA_ARGS__)

◆ vlseg2e16ff_v_u16mf4_m

#define vlseg2e16ff_v_u16mf4_m ( ... ) __riscv_vlseg2e16ff_v_u16mf4_tumu(__VA_ARGS__)

◆ vlseg2e32_v_f32m1

#define vlseg2e32_v_f32m1 ( ... ) __riscv_vlseg2e32_v_f32m1(__VA_ARGS__)

◆ vlseg2e32_v_f32m1_m

#define vlseg2e32_v_f32m1_m ( ... ) __riscv_vlseg2e32_v_f32m1_tumu(__VA_ARGS__)

◆ vlseg2e32_v_f32m2

#define vlseg2e32_v_f32m2 ( ... ) __riscv_vlseg2e32_v_f32m2(__VA_ARGS__)

◆ vlseg2e32_v_f32m2_m

#define vlseg2e32_v_f32m2_m ( ... ) __riscv_vlseg2e32_v_f32m2_tumu(__VA_ARGS__)

◆ vlseg2e32_v_f32m4

#define vlseg2e32_v_f32m4 ( ... ) __riscv_vlseg2e32_v_f32m4(__VA_ARGS__)

◆ vlseg2e32_v_f32m4_m

#define vlseg2e32_v_f32m4_m ( ... ) __riscv_vlseg2e32_v_f32m4_tumu(__VA_ARGS__)

◆ vlseg2e32_v_f32mf2

#define vlseg2e32_v_f32mf2 ( ... ) __riscv_vlseg2e32_v_f32mf2(__VA_ARGS__)

◆ vlseg2e32_v_f32mf2_m

#define vlseg2e32_v_f32mf2_m ( ... ) __riscv_vlseg2e32_v_f32mf2_tumu(__VA_ARGS__)

◆ vlseg2e32_v_i32m1

#define vlseg2e32_v_i32m1 ( ... ) __riscv_vlseg2e32_v_i32m1(__VA_ARGS__)

◆ vlseg2e32_v_i32m1_m

#define vlseg2e32_v_i32m1_m ( ... ) __riscv_vlseg2e32_v_i32m1_tumu(__VA_ARGS__)

◆ vlseg2e32_v_i32m2

#define vlseg2e32_v_i32m2 ( ... ) __riscv_vlseg2e32_v_i32m2(__VA_ARGS__)

◆ vlseg2e32_v_i32m2_m

#define vlseg2e32_v_i32m2_m ( ... ) __riscv_vlseg2e32_v_i32m2_tumu(__VA_ARGS__)

◆ vlseg2e32_v_i32m4

#define vlseg2e32_v_i32m4 ( ... ) __riscv_vlseg2e32_v_i32m4(__VA_ARGS__)

◆ vlseg2e32_v_i32m4_m

#define vlseg2e32_v_i32m4_m ( ... ) __riscv_vlseg2e32_v_i32m4_tumu(__VA_ARGS__)

◆ vlseg2e32_v_i32mf2

#define vlseg2e32_v_i32mf2 ( ... ) __riscv_vlseg2e32_v_i32mf2(__VA_ARGS__)

◆ vlseg2e32_v_i32mf2_m

#define vlseg2e32_v_i32mf2_m ( ... ) __riscv_vlseg2e32_v_i32mf2_tumu(__VA_ARGS__)

◆ vlseg2e32_v_u32m1

#define vlseg2e32_v_u32m1 ( ... ) __riscv_vlseg2e32_v_u32m1(__VA_ARGS__)

◆ vlseg2e32_v_u32m1_m

#define vlseg2e32_v_u32m1_m ( ... ) __riscv_vlseg2e32_v_u32m1_tumu(__VA_ARGS__)

◆ vlseg2e32_v_u32m2

#define vlseg2e32_v_u32m2 ( ... ) __riscv_vlseg2e32_v_u32m2(__VA_ARGS__)

◆ vlseg2e32_v_u32m2_m

#define vlseg2e32_v_u32m2_m ( ... ) __riscv_vlseg2e32_v_u32m2_tumu(__VA_ARGS__)

◆ vlseg2e32_v_u32m4

#define vlseg2e32_v_u32m4 ( ... ) __riscv_vlseg2e32_v_u32m4(__VA_ARGS__)

◆ vlseg2e32_v_u32m4_m

#define vlseg2e32_v_u32m4_m ( ... ) __riscv_vlseg2e32_v_u32m4_tumu(__VA_ARGS__)

◆ vlseg2e32_v_u32mf2

#define vlseg2e32_v_u32mf2 ( ... ) __riscv_vlseg2e32_v_u32mf2(__VA_ARGS__)

◆ vlseg2e32_v_u32mf2_m

#define vlseg2e32_v_u32mf2_m ( ... ) __riscv_vlseg2e32_v_u32mf2_tumu(__VA_ARGS__)

◆ vlseg2e32ff_v_f32m1

#define vlseg2e32ff_v_f32m1 ( ... ) __riscv_vlseg2e32ff_v_f32m1(__VA_ARGS__)

◆ vlseg2e32ff_v_f32m1_m

#define vlseg2e32ff_v_f32m1_m ( ... ) __riscv_vlseg2e32ff_v_f32m1_tumu(__VA_ARGS__)

◆ vlseg2e32ff_v_f32m2

#define vlseg2e32ff_v_f32m2 ( ... ) __riscv_vlseg2e32ff_v_f32m2(__VA_ARGS__)

◆ vlseg2e32ff_v_f32m2_m

#define vlseg2e32ff_v_f32m2_m ( ... ) __riscv_vlseg2e32ff_v_f32m2_tumu(__VA_ARGS__)

◆ vlseg2e32ff_v_f32m4

#define vlseg2e32ff_v_f32m4 ( ... ) __riscv_vlseg2e32ff_v_f32m4(__VA_ARGS__)

◆ vlseg2e32ff_v_f32m4_m

#define vlseg2e32ff_v_f32m4_m ( ... ) __riscv_vlseg2e32ff_v_f32m4_tumu(__VA_ARGS__)

◆ vlseg2e32ff_v_f32mf2

#define vlseg2e32ff_v_f32mf2 ( ... ) __riscv_vlseg2e32ff_v_f32mf2(__VA_ARGS__)

◆ vlseg2e32ff_v_f32mf2_m

#define vlseg2e32ff_v_f32mf2_m ( ... ) __riscv_vlseg2e32ff_v_f32mf2_tumu(__VA_ARGS__)

◆ vlseg2e32ff_v_i32m1

#define vlseg2e32ff_v_i32m1 ( ... ) __riscv_vlseg2e32ff_v_i32m1(__VA_ARGS__)

◆ vlseg2e32ff_v_i32m1_m

#define vlseg2e32ff_v_i32m1_m ( ... ) __riscv_vlseg2e32ff_v_i32m1_tumu(__VA_ARGS__)

◆ vlseg2e32ff_v_i32m2

#define vlseg2e32ff_v_i32m2 ( ... ) __riscv_vlseg2e32ff_v_i32m2(__VA_ARGS__)

◆ vlseg2e32ff_v_i32m2_m

#define vlseg2e32ff_v_i32m2_m ( ... ) __riscv_vlseg2e32ff_v_i32m2_tumu(__VA_ARGS__)

◆ vlseg2e32ff_v_i32m4

#define vlseg2e32ff_v_i32m4 ( ... ) __riscv_vlseg2e32ff_v_i32m4(__VA_ARGS__)

◆ vlseg2e32ff_v_i32m4_m

#define vlseg2e32ff_v_i32m4_m ( ... ) __riscv_vlseg2e32ff_v_i32m4_tumu(__VA_ARGS__)

◆ vlseg2e32ff_v_i32mf2

#define vlseg2e32ff_v_i32mf2 ( ... ) __riscv_vlseg2e32ff_v_i32mf2(__VA_ARGS__)

◆ vlseg2e32ff_v_i32mf2_m

#define vlseg2e32ff_v_i32mf2_m ( ... ) __riscv_vlseg2e32ff_v_i32mf2_tumu(__VA_ARGS__)

◆ vlseg2e32ff_v_u32m1

#define vlseg2e32ff_v_u32m1 ( ... ) __riscv_vlseg2e32ff_v_u32m1(__VA_ARGS__)

◆ vlseg2e32ff_v_u32m1_m

#define vlseg2e32ff_v_u32m1_m ( ... ) __riscv_vlseg2e32ff_v_u32m1_tumu(__VA_ARGS__)

◆ vlseg2e32ff_v_u32m2

#define vlseg2e32ff_v_u32m2 ( ... ) __riscv_vlseg2e32ff_v_u32m2(__VA_ARGS__)

◆ vlseg2e32ff_v_u32m2_m

#define vlseg2e32ff_v_u32m2_m ( ... ) __riscv_vlseg2e32ff_v_u32m2_tumu(__VA_ARGS__)

◆ vlseg2e32ff_v_u32m4

#define vlseg2e32ff_v_u32m4 ( ... ) __riscv_vlseg2e32ff_v_u32m4(__VA_ARGS__)

◆ vlseg2e32ff_v_u32m4_m

#define vlseg2e32ff_v_u32m4_m ( ... ) __riscv_vlseg2e32ff_v_u32m4_tumu(__VA_ARGS__)

◆ vlseg2e32ff_v_u32mf2

#define vlseg2e32ff_v_u32mf2 ( ... ) __riscv_vlseg2e32ff_v_u32mf2(__VA_ARGS__)

◆ vlseg2e32ff_v_u32mf2_m

#define vlseg2e32ff_v_u32mf2_m ( ... ) __riscv_vlseg2e32ff_v_u32mf2_tumu(__VA_ARGS__)

◆ vlseg2e64_v_f64m1

#define vlseg2e64_v_f64m1 ( ... ) __riscv_vlseg2e64_v_f64m1(__VA_ARGS__)

◆ vlseg2e64_v_f64m1_m

#define vlseg2e64_v_f64m1_m ( ... ) __riscv_vlseg2e64_v_f64m1_tumu(__VA_ARGS__)

◆ vlseg2e64_v_f64m2

#define vlseg2e64_v_f64m2 ( ... ) __riscv_vlseg2e64_v_f64m2(__VA_ARGS__)

◆ vlseg2e64_v_f64m2_m

#define vlseg2e64_v_f64m2_m ( ... ) __riscv_vlseg2e64_v_f64m2_tumu(__VA_ARGS__)

◆ vlseg2e64_v_f64m4

#define vlseg2e64_v_f64m4 ( ... ) __riscv_vlseg2e64_v_f64m4(__VA_ARGS__)

◆ vlseg2e64_v_f64m4_m

#define vlseg2e64_v_f64m4_m ( ... ) __riscv_vlseg2e64_v_f64m4_tumu(__VA_ARGS__)

◆ vlseg2e64_v_i64m1

#define vlseg2e64_v_i64m1 ( ... ) __riscv_vlseg2e64_v_i64m1(__VA_ARGS__)

◆ vlseg2e64_v_i64m1_m

#define vlseg2e64_v_i64m1_m ( ... ) __riscv_vlseg2e64_v_i64m1_tumu(__VA_ARGS__)

◆ vlseg2e64_v_i64m2

#define vlseg2e64_v_i64m2 ( ... ) __riscv_vlseg2e64_v_i64m2(__VA_ARGS__)

◆ vlseg2e64_v_i64m2_m

#define vlseg2e64_v_i64m2_m ( ... ) __riscv_vlseg2e64_v_i64m2_tumu(__VA_ARGS__)

◆ vlseg2e64_v_i64m4

#define vlseg2e64_v_i64m4 ( ... ) __riscv_vlseg2e64_v_i64m4(__VA_ARGS__)

◆ vlseg2e64_v_i64m4_m

#define vlseg2e64_v_i64m4_m ( ... ) __riscv_vlseg2e64_v_i64m4_tumu(__VA_ARGS__)

◆ vlseg2e64_v_u64m1

#define vlseg2e64_v_u64m1 ( ... ) __riscv_vlseg2e64_v_u64m1(__VA_ARGS__)

◆ vlseg2e64_v_u64m1_m

#define vlseg2e64_v_u64m1_m ( ... ) __riscv_vlseg2e64_v_u64m1_tumu(__VA_ARGS__)

◆ vlseg2e64_v_u64m2

#define vlseg2e64_v_u64m2 ( ... ) __riscv_vlseg2e64_v_u64m2(__VA_ARGS__)

◆ vlseg2e64_v_u64m2_m

#define vlseg2e64_v_u64m2_m ( ... ) __riscv_vlseg2e64_v_u64m2_tumu(__VA_ARGS__)

◆ vlseg2e64_v_u64m4

#define vlseg2e64_v_u64m4 ( ... ) __riscv_vlseg2e64_v_u64m4(__VA_ARGS__)

◆ vlseg2e64_v_u64m4_m

#define vlseg2e64_v_u64m4_m ( ... ) __riscv_vlseg2e64_v_u64m4_tumu(__VA_ARGS__)

◆ vlseg2e64ff_v_f64m1

#define vlseg2e64ff_v_f64m1 ( ... ) __riscv_vlseg2e64ff_v_f64m1(__VA_ARGS__)

◆ vlseg2e64ff_v_f64m1_m

#define vlseg2e64ff_v_f64m1_m ( ... ) __riscv_vlseg2e64ff_v_f64m1_tumu(__VA_ARGS__)

◆ vlseg2e64ff_v_f64m2

#define vlseg2e64ff_v_f64m2 ( ... ) __riscv_vlseg2e64ff_v_f64m2(__VA_ARGS__)

◆ vlseg2e64ff_v_f64m2_m

#define vlseg2e64ff_v_f64m2_m ( ... ) __riscv_vlseg2e64ff_v_f64m2_tumu(__VA_ARGS__)

◆ vlseg2e64ff_v_f64m4

#define vlseg2e64ff_v_f64m4 ( ... ) __riscv_vlseg2e64ff_v_f64m4(__VA_ARGS__)

◆ vlseg2e64ff_v_f64m4_m

#define vlseg2e64ff_v_f64m4_m ( ... ) __riscv_vlseg2e64ff_v_f64m4_tumu(__VA_ARGS__)

◆ vlseg2e64ff_v_i64m1

#define vlseg2e64ff_v_i64m1 ( ... ) __riscv_vlseg2e64ff_v_i64m1(__VA_ARGS__)

◆ vlseg2e64ff_v_i64m1_m

#define vlseg2e64ff_v_i64m1_m ( ... ) __riscv_vlseg2e64ff_v_i64m1_tumu(__VA_ARGS__)

◆ vlseg2e64ff_v_i64m2

#define vlseg2e64ff_v_i64m2 ( ... ) __riscv_vlseg2e64ff_v_i64m2(__VA_ARGS__)

◆ vlseg2e64ff_v_i64m2_m

#define vlseg2e64ff_v_i64m2_m ( ... ) __riscv_vlseg2e64ff_v_i64m2_tumu(__VA_ARGS__)

◆ vlseg2e64ff_v_i64m4

#define vlseg2e64ff_v_i64m4 ( ... ) __riscv_vlseg2e64ff_v_i64m4(__VA_ARGS__)

◆ vlseg2e64ff_v_i64m4_m

#define vlseg2e64ff_v_i64m4_m ( ... ) __riscv_vlseg2e64ff_v_i64m4_tumu(__VA_ARGS__)

◆ vlseg2e64ff_v_u64m1

#define vlseg2e64ff_v_u64m1 ( ... ) __riscv_vlseg2e64ff_v_u64m1(__VA_ARGS__)

◆ vlseg2e64ff_v_u64m1_m

#define vlseg2e64ff_v_u64m1_m ( ... ) __riscv_vlseg2e64ff_v_u64m1_tumu(__VA_ARGS__)

◆ vlseg2e64ff_v_u64m2

#define vlseg2e64ff_v_u64m2 ( ... ) __riscv_vlseg2e64ff_v_u64m2(__VA_ARGS__)

◆ vlseg2e64ff_v_u64m2_m

#define vlseg2e64ff_v_u64m2_m ( ... ) __riscv_vlseg2e64ff_v_u64m2_tumu(__VA_ARGS__)

◆ vlseg2e64ff_v_u64m4

#define vlseg2e64ff_v_u64m4 ( ... ) __riscv_vlseg2e64ff_v_u64m4(__VA_ARGS__)

◆ vlseg2e64ff_v_u64m4_m

#define vlseg2e64ff_v_u64m4_m ( ... ) __riscv_vlseg2e64ff_v_u64m4_tumu(__VA_ARGS__)

◆ vlseg2e8_v_i8m1

#define vlseg2e8_v_i8m1 ( ... ) __riscv_vlseg2e8_v_i8m1(__VA_ARGS__)

◆ vlseg2e8_v_i8m1_m

#define vlseg2e8_v_i8m1_m ( ... ) __riscv_vlseg2e8_v_i8m1_tumu(__VA_ARGS__)

◆ vlseg2e8_v_i8m2

#define vlseg2e8_v_i8m2 ( ... ) __riscv_vlseg2e8_v_i8m2(__VA_ARGS__)

◆ vlseg2e8_v_i8m2_m

#define vlseg2e8_v_i8m2_m ( ... ) __riscv_vlseg2e8_v_i8m2_tumu(__VA_ARGS__)

◆ vlseg2e8_v_i8m4

#define vlseg2e8_v_i8m4 ( ... ) __riscv_vlseg2e8_v_i8m4(__VA_ARGS__)

◆ vlseg2e8_v_i8m4_m

#define vlseg2e8_v_i8m4_m ( ... ) __riscv_vlseg2e8_v_i8m4_tumu(__VA_ARGS__)

◆ vlseg2e8_v_i8mf2

#define vlseg2e8_v_i8mf2 ( ... ) __riscv_vlseg2e8_v_i8mf2(__VA_ARGS__)

◆ vlseg2e8_v_i8mf2_m

#define vlseg2e8_v_i8mf2_m ( ... ) __riscv_vlseg2e8_v_i8mf2_tumu(__VA_ARGS__)

◆ vlseg2e8_v_i8mf4

#define vlseg2e8_v_i8mf4 ( ... ) __riscv_vlseg2e8_v_i8mf4(__VA_ARGS__)

◆ vlseg2e8_v_i8mf4_m

#define vlseg2e8_v_i8mf4_m ( ... ) __riscv_vlseg2e8_v_i8mf4_tumu(__VA_ARGS__)

◆ vlseg2e8_v_i8mf8

#define vlseg2e8_v_i8mf8 ( ... ) __riscv_vlseg2e8_v_i8mf8(__VA_ARGS__)

◆ vlseg2e8_v_i8mf8_m

#define vlseg2e8_v_i8mf8_m ( ... ) __riscv_vlseg2e8_v_i8mf8_tumu(__VA_ARGS__)

◆ vlseg2e8_v_u8m1

#define vlseg2e8_v_u8m1 ( ... ) __riscv_vlseg2e8_v_u8m1(__VA_ARGS__)

◆ vlseg2e8_v_u8m1_m

#define vlseg2e8_v_u8m1_m ( ... ) __riscv_vlseg2e8_v_u8m1_tumu(__VA_ARGS__)

◆ vlseg2e8_v_u8m2

#define vlseg2e8_v_u8m2 ( ... ) __riscv_vlseg2e8_v_u8m2(__VA_ARGS__)

◆ vlseg2e8_v_u8m2_m

#define vlseg2e8_v_u8m2_m ( ... ) __riscv_vlseg2e8_v_u8m2_tumu(__VA_ARGS__)

◆ vlseg2e8_v_u8m4

#define vlseg2e8_v_u8m4 ( ... ) __riscv_vlseg2e8_v_u8m4(__VA_ARGS__)

◆ vlseg2e8_v_u8m4_m

#define vlseg2e8_v_u8m4_m ( ... ) __riscv_vlseg2e8_v_u8m4_tumu(__VA_ARGS__)

◆ vlseg2e8_v_u8mf2

#define vlseg2e8_v_u8mf2 ( ... ) __riscv_vlseg2e8_v_u8mf2(__VA_ARGS__)

◆ vlseg2e8_v_u8mf2_m

#define vlseg2e8_v_u8mf2_m ( ... ) __riscv_vlseg2e8_v_u8mf2_tumu(__VA_ARGS__)

◆ vlseg2e8_v_u8mf4

#define vlseg2e8_v_u8mf4 ( ... ) __riscv_vlseg2e8_v_u8mf4(__VA_ARGS__)

◆ vlseg2e8_v_u8mf4_m

#define vlseg2e8_v_u8mf4_m ( ... ) __riscv_vlseg2e8_v_u8mf4_tumu(__VA_ARGS__)

◆ vlseg2e8_v_u8mf8

#define vlseg2e8_v_u8mf8 ( ... ) __riscv_vlseg2e8_v_u8mf8(__VA_ARGS__)

◆ vlseg2e8_v_u8mf8_m

#define vlseg2e8_v_u8mf8_m ( ... ) __riscv_vlseg2e8_v_u8mf8_tumu(__VA_ARGS__)

◆ vlseg2e8ff_v_i8m1

#define vlseg2e8ff_v_i8m1 ( ... ) __riscv_vlseg2e8ff_v_i8m1(__VA_ARGS__)

◆ vlseg2e8ff_v_i8m1_m

#define vlseg2e8ff_v_i8m1_m ( ... ) __riscv_vlseg2e8ff_v_i8m1_tumu(__VA_ARGS__)

◆ vlseg2e8ff_v_i8m2

#define vlseg2e8ff_v_i8m2 ( ... ) __riscv_vlseg2e8ff_v_i8m2(__VA_ARGS__)

◆ vlseg2e8ff_v_i8m2_m

#define vlseg2e8ff_v_i8m2_m ( ... ) __riscv_vlseg2e8ff_v_i8m2_tumu(__VA_ARGS__)

◆ vlseg2e8ff_v_i8m4

#define vlseg2e8ff_v_i8m4 ( ... ) __riscv_vlseg2e8ff_v_i8m4(__VA_ARGS__)

◆ vlseg2e8ff_v_i8m4_m

#define vlseg2e8ff_v_i8m4_m ( ... ) __riscv_vlseg2e8ff_v_i8m4_tumu(__VA_ARGS__)

◆ vlseg2e8ff_v_i8mf2

#define vlseg2e8ff_v_i8mf2 ( ... ) __riscv_vlseg2e8ff_v_i8mf2(__VA_ARGS__)

◆ vlseg2e8ff_v_i8mf2_m

#define vlseg2e8ff_v_i8mf2_m ( ... ) __riscv_vlseg2e8ff_v_i8mf2_tumu(__VA_ARGS__)

◆ vlseg2e8ff_v_i8mf4

#define vlseg2e8ff_v_i8mf4 ( ... ) __riscv_vlseg2e8ff_v_i8mf4(__VA_ARGS__)

◆ vlseg2e8ff_v_i8mf4_m

#define vlseg2e8ff_v_i8mf4_m ( ... ) __riscv_vlseg2e8ff_v_i8mf4_tumu(__VA_ARGS__)

◆ vlseg2e8ff_v_i8mf8

#define vlseg2e8ff_v_i8mf8 ( ... ) __riscv_vlseg2e8ff_v_i8mf8(__VA_ARGS__)

◆ vlseg2e8ff_v_i8mf8_m

#define vlseg2e8ff_v_i8mf8_m ( ... ) __riscv_vlseg2e8ff_v_i8mf8_tumu(__VA_ARGS__)

◆ vlseg2e8ff_v_u8m1

#define vlseg2e8ff_v_u8m1 ( ... ) __riscv_vlseg2e8ff_v_u8m1(__VA_ARGS__)

◆ vlseg2e8ff_v_u8m1_m

#define vlseg2e8ff_v_u8m1_m ( ... ) __riscv_vlseg2e8ff_v_u8m1_tumu(__VA_ARGS__)

◆ vlseg2e8ff_v_u8m2

#define vlseg2e8ff_v_u8m2 ( ... ) __riscv_vlseg2e8ff_v_u8m2(__VA_ARGS__)

◆ vlseg2e8ff_v_u8m2_m

#define vlseg2e8ff_v_u8m2_m ( ... ) __riscv_vlseg2e8ff_v_u8m2_tumu(__VA_ARGS__)

◆ vlseg2e8ff_v_u8m4

#define vlseg2e8ff_v_u8m4 ( ... ) __riscv_vlseg2e8ff_v_u8m4(__VA_ARGS__)

◆ vlseg2e8ff_v_u8m4_m

#define vlseg2e8ff_v_u8m4_m ( ... ) __riscv_vlseg2e8ff_v_u8m4_tumu(__VA_ARGS__)

◆ vlseg2e8ff_v_u8mf2

#define vlseg2e8ff_v_u8mf2 ( ... ) __riscv_vlseg2e8ff_v_u8mf2(__VA_ARGS__)

◆ vlseg2e8ff_v_u8mf2_m

#define vlseg2e8ff_v_u8mf2_m ( ... ) __riscv_vlseg2e8ff_v_u8mf2_tumu(__VA_ARGS__)

◆ vlseg2e8ff_v_u8mf4

#define vlseg2e8ff_v_u8mf4 ( ... ) __riscv_vlseg2e8ff_v_u8mf4(__VA_ARGS__)

◆ vlseg2e8ff_v_u8mf4_m

#define vlseg2e8ff_v_u8mf4_m ( ... ) __riscv_vlseg2e8ff_v_u8mf4_tumu(__VA_ARGS__)

◆ vlseg2e8ff_v_u8mf8

#define vlseg2e8ff_v_u8mf8 ( ... ) __riscv_vlseg2e8ff_v_u8mf8(__VA_ARGS__)

◆ vlseg2e8ff_v_u8mf8_m

#define vlseg2e8ff_v_u8mf8_m ( ... ) __riscv_vlseg2e8ff_v_u8mf8_tumu(__VA_ARGS__)

◆ vlseg3e16_v_f16m1

#define vlseg3e16_v_f16m1 ( ... ) __riscv_vlseg3e16_v_f16m1(__VA_ARGS__)

◆ vlseg3e16_v_f16m1_m

#define vlseg3e16_v_f16m1_m ( ... ) __riscv_vlseg3e16_v_f16m1_tumu(__VA_ARGS__)

◆ vlseg3e16_v_f16m2

#define vlseg3e16_v_f16m2 ( ... ) __riscv_vlseg3e16_v_f16m2(__VA_ARGS__)

◆ vlseg3e16_v_f16m2_m

#define vlseg3e16_v_f16m2_m ( ... ) __riscv_vlseg3e16_v_f16m2_tumu(__VA_ARGS__)

◆ vlseg3e16_v_f16mf2

#define vlseg3e16_v_f16mf2 ( ... ) __riscv_vlseg3e16_v_f16mf2(__VA_ARGS__)

◆ vlseg3e16_v_f16mf2_m

#define vlseg3e16_v_f16mf2_m ( ... ) __riscv_vlseg3e16_v_f16mf2_tumu(__VA_ARGS__)

◆ vlseg3e16_v_f16mf4

#define vlseg3e16_v_f16mf4 ( ... ) __riscv_vlseg3e16_v_f16mf4(__VA_ARGS__)

◆ vlseg3e16_v_f16mf4_m

#define vlseg3e16_v_f16mf4_m ( ... ) __riscv_vlseg3e16_v_f16mf4_tumu(__VA_ARGS__)

◆ vlseg3e16_v_i16m1

#define vlseg3e16_v_i16m1 ( ... ) __riscv_vlseg3e16_v_i16m1(__VA_ARGS__)

◆ vlseg3e16_v_i16m1_m

#define vlseg3e16_v_i16m1_m ( ... ) __riscv_vlseg3e16_v_i16m1_tumu(__VA_ARGS__)

◆ vlseg3e16_v_i16m2

#define vlseg3e16_v_i16m2 ( ... ) __riscv_vlseg3e16_v_i16m2(__VA_ARGS__)

◆ vlseg3e16_v_i16m2_m

#define vlseg3e16_v_i16m2_m ( ... ) __riscv_vlseg3e16_v_i16m2_tumu(__VA_ARGS__)

◆ vlseg3e16_v_i16mf2

#define vlseg3e16_v_i16mf2 ( ... ) __riscv_vlseg3e16_v_i16mf2(__VA_ARGS__)

◆ vlseg3e16_v_i16mf2_m

#define vlseg3e16_v_i16mf2_m ( ... ) __riscv_vlseg3e16_v_i16mf2_tumu(__VA_ARGS__)

◆ vlseg3e16_v_i16mf4

#define vlseg3e16_v_i16mf4 ( ... ) __riscv_vlseg3e16_v_i16mf4(__VA_ARGS__)

◆ vlseg3e16_v_i16mf4_m

#define vlseg3e16_v_i16mf4_m ( ... ) __riscv_vlseg3e16_v_i16mf4_tumu(__VA_ARGS__)

◆ vlseg3e16_v_u16m1

#define vlseg3e16_v_u16m1 ( ... ) __riscv_vlseg3e16_v_u16m1(__VA_ARGS__)

◆ vlseg3e16_v_u16m1_m

#define vlseg3e16_v_u16m1_m ( ... ) __riscv_vlseg3e16_v_u16m1_tumu(__VA_ARGS__)

◆ vlseg3e16_v_u16m2

#define vlseg3e16_v_u16m2 ( ... ) __riscv_vlseg3e16_v_u16m2(__VA_ARGS__)

◆ vlseg3e16_v_u16m2_m

#define vlseg3e16_v_u16m2_m ( ... ) __riscv_vlseg3e16_v_u16m2_tumu(__VA_ARGS__)

◆ vlseg3e16_v_u16mf2

#define vlseg3e16_v_u16mf2 ( ... ) __riscv_vlseg3e16_v_u16mf2(__VA_ARGS__)

◆ vlseg3e16_v_u16mf2_m

#define vlseg3e16_v_u16mf2_m ( ... ) __riscv_vlseg3e16_v_u16mf2_tumu(__VA_ARGS__)

◆ vlseg3e16_v_u16mf4

#define vlseg3e16_v_u16mf4 ( ... ) __riscv_vlseg3e16_v_u16mf4(__VA_ARGS__)

◆ vlseg3e16_v_u16mf4_m

#define vlseg3e16_v_u16mf4_m ( ... ) __riscv_vlseg3e16_v_u16mf4_tumu(__VA_ARGS__)

◆ vlseg3e16ff_v_f16m1

#define vlseg3e16ff_v_f16m1 ( ... ) __riscv_vlseg3e16ff_v_f16m1(__VA_ARGS__)

◆ vlseg3e16ff_v_f16m1_m

#define vlseg3e16ff_v_f16m1_m ( ... ) __riscv_vlseg3e16ff_v_f16m1_tumu(__VA_ARGS__)

◆ vlseg3e16ff_v_f16m2

#define vlseg3e16ff_v_f16m2 ( ... ) __riscv_vlseg3e16ff_v_f16m2(__VA_ARGS__)

◆ vlseg3e16ff_v_f16m2_m

#define vlseg3e16ff_v_f16m2_m ( ... ) __riscv_vlseg3e16ff_v_f16m2_tumu(__VA_ARGS__)

◆ vlseg3e16ff_v_f16mf2

#define vlseg3e16ff_v_f16mf2 ( ... ) __riscv_vlseg3e16ff_v_f16mf2(__VA_ARGS__)

◆ vlseg3e16ff_v_f16mf2_m

#define vlseg3e16ff_v_f16mf2_m ( ... ) __riscv_vlseg3e16ff_v_f16mf2_tumu(__VA_ARGS__)

◆ vlseg3e16ff_v_f16mf4

#define vlseg3e16ff_v_f16mf4 ( ... ) __riscv_vlseg3e16ff_v_f16mf4(__VA_ARGS__)

◆ vlseg3e16ff_v_f16mf4_m

#define vlseg3e16ff_v_f16mf4_m ( ... ) __riscv_vlseg3e16ff_v_f16mf4_tumu(__VA_ARGS__)

◆ vlseg3e16ff_v_i16m1

#define vlseg3e16ff_v_i16m1 ( ... ) __riscv_vlseg3e16ff_v_i16m1(__VA_ARGS__)

◆ vlseg3e16ff_v_i16m1_m

#define vlseg3e16ff_v_i16m1_m ( ... ) __riscv_vlseg3e16ff_v_i16m1_tumu(__VA_ARGS__)

◆ vlseg3e16ff_v_i16m2

#define vlseg3e16ff_v_i16m2 ( ... ) __riscv_vlseg3e16ff_v_i16m2(__VA_ARGS__)

◆ vlseg3e16ff_v_i16m2_m

#define vlseg3e16ff_v_i16m2_m ( ... ) __riscv_vlseg3e16ff_v_i16m2_tumu(__VA_ARGS__)

◆ vlseg3e16ff_v_i16mf2

#define vlseg3e16ff_v_i16mf2 ( ... ) __riscv_vlseg3e16ff_v_i16mf2(__VA_ARGS__)

◆ vlseg3e16ff_v_i16mf2_m

#define vlseg3e16ff_v_i16mf2_m ( ... ) __riscv_vlseg3e16ff_v_i16mf2_tumu(__VA_ARGS__)

◆ vlseg3e16ff_v_i16mf4

#define vlseg3e16ff_v_i16mf4 ( ... ) __riscv_vlseg3e16ff_v_i16mf4(__VA_ARGS__)

◆ vlseg3e16ff_v_i16mf4_m

#define vlseg3e16ff_v_i16mf4_m ( ... ) __riscv_vlseg3e16ff_v_i16mf4_tumu(__VA_ARGS__)

◆ vlseg3e16ff_v_u16m1

#define vlseg3e16ff_v_u16m1 ( ... ) __riscv_vlseg3e16ff_v_u16m1(__VA_ARGS__)

◆ vlseg3e16ff_v_u16m1_m

#define vlseg3e16ff_v_u16m1_m ( ... ) __riscv_vlseg3e16ff_v_u16m1_tumu(__VA_ARGS__)

◆ vlseg3e16ff_v_u16m2

#define vlseg3e16ff_v_u16m2 ( ... ) __riscv_vlseg3e16ff_v_u16m2(__VA_ARGS__)

◆ vlseg3e16ff_v_u16m2_m

#define vlseg3e16ff_v_u16m2_m ( ... ) __riscv_vlseg3e16ff_v_u16m2_tumu(__VA_ARGS__)

◆ vlseg3e16ff_v_u16mf2

#define vlseg3e16ff_v_u16mf2 ( ... ) __riscv_vlseg3e16ff_v_u16mf2(__VA_ARGS__)

◆ vlseg3e16ff_v_u16mf2_m

#define vlseg3e16ff_v_u16mf2_m ( ... ) __riscv_vlseg3e16ff_v_u16mf2_tumu(__VA_ARGS__)

◆ vlseg3e16ff_v_u16mf4

#define vlseg3e16ff_v_u16mf4 ( ... ) __riscv_vlseg3e16ff_v_u16mf4(__VA_ARGS__)

◆ vlseg3e16ff_v_u16mf4_m

#define vlseg3e16ff_v_u16mf4_m ( ... ) __riscv_vlseg3e16ff_v_u16mf4_tumu(__VA_ARGS__)

◆ vlseg3e32_v_f32m1

#define vlseg3e32_v_f32m1 ( ... ) __riscv_vlseg3e32_v_f32m1(__VA_ARGS__)

◆ vlseg3e32_v_f32m1_m

#define vlseg3e32_v_f32m1_m ( ... ) __riscv_vlseg3e32_v_f32m1_tumu(__VA_ARGS__)

◆ vlseg3e32_v_f32m2

#define vlseg3e32_v_f32m2 ( ... ) __riscv_vlseg3e32_v_f32m2(__VA_ARGS__)

◆ vlseg3e32_v_f32m2_m

#define vlseg3e32_v_f32m2_m ( ... ) __riscv_vlseg3e32_v_f32m2_tumu(__VA_ARGS__)

◆ vlseg3e32_v_f32mf2

#define vlseg3e32_v_f32mf2 ( ... ) __riscv_vlseg3e32_v_f32mf2(__VA_ARGS__)

◆ vlseg3e32_v_f32mf2_m

#define vlseg3e32_v_f32mf2_m ( ... ) __riscv_vlseg3e32_v_f32mf2_tumu(__VA_ARGS__)

◆ vlseg3e32_v_i32m1

#define vlseg3e32_v_i32m1 ( ... ) __riscv_vlseg3e32_v_i32m1(__VA_ARGS__)

◆ vlseg3e32_v_i32m1_m

#define vlseg3e32_v_i32m1_m ( ... ) __riscv_vlseg3e32_v_i32m1_tumu(__VA_ARGS__)

◆ vlseg3e32_v_i32m2

#define vlseg3e32_v_i32m2 ( ... ) __riscv_vlseg3e32_v_i32m2(__VA_ARGS__)

◆ vlseg3e32_v_i32m2_m

#define vlseg3e32_v_i32m2_m ( ... ) __riscv_vlseg3e32_v_i32m2_tumu(__VA_ARGS__)

◆ vlseg3e32_v_i32mf2

#define vlseg3e32_v_i32mf2 ( ... ) __riscv_vlseg3e32_v_i32mf2(__VA_ARGS__)

◆ vlseg3e32_v_i32mf2_m

#define vlseg3e32_v_i32mf2_m ( ... ) __riscv_vlseg3e32_v_i32mf2_tumu(__VA_ARGS__)

◆ vlseg3e32_v_u32m1

#define vlseg3e32_v_u32m1 ( ... ) __riscv_vlseg3e32_v_u32m1(__VA_ARGS__)

◆ vlseg3e32_v_u32m1_m

#define vlseg3e32_v_u32m1_m ( ... ) __riscv_vlseg3e32_v_u32m1_tumu(__VA_ARGS__)

◆ vlseg3e32_v_u32m2

#define vlseg3e32_v_u32m2 ( ... ) __riscv_vlseg3e32_v_u32m2(__VA_ARGS__)

◆ vlseg3e32_v_u32m2_m

#define vlseg3e32_v_u32m2_m ( ... ) __riscv_vlseg3e32_v_u32m2_tumu(__VA_ARGS__)

◆ vlseg3e32_v_u32mf2

#define vlseg3e32_v_u32mf2 ( ... ) __riscv_vlseg3e32_v_u32mf2(__VA_ARGS__)

◆ vlseg3e32_v_u32mf2_m

#define vlseg3e32_v_u32mf2_m ( ... ) __riscv_vlseg3e32_v_u32mf2_tumu(__VA_ARGS__)

◆ vlseg3e32ff_v_f32m1

#define vlseg3e32ff_v_f32m1 ( ... ) __riscv_vlseg3e32ff_v_f32m1(__VA_ARGS__)

◆ vlseg3e32ff_v_f32m1_m

#define vlseg3e32ff_v_f32m1_m ( ... ) __riscv_vlseg3e32ff_v_f32m1_tumu(__VA_ARGS__)

◆ vlseg3e32ff_v_f32m2

#define vlseg3e32ff_v_f32m2 ( ... ) __riscv_vlseg3e32ff_v_f32m2(__VA_ARGS__)

◆ vlseg3e32ff_v_f32m2_m

#define vlseg3e32ff_v_f32m2_m ( ... ) __riscv_vlseg3e32ff_v_f32m2_tumu(__VA_ARGS__)

◆ vlseg3e32ff_v_f32mf2

#define vlseg3e32ff_v_f32mf2 ( ... ) __riscv_vlseg3e32ff_v_f32mf2(__VA_ARGS__)

◆ vlseg3e32ff_v_f32mf2_m

#define vlseg3e32ff_v_f32mf2_m ( ... ) __riscv_vlseg3e32ff_v_f32mf2_tumu(__VA_ARGS__)

◆ vlseg3e32ff_v_i32m1

#define vlseg3e32ff_v_i32m1 ( ... ) __riscv_vlseg3e32ff_v_i32m1(__VA_ARGS__)

◆ vlseg3e32ff_v_i32m1_m

#define vlseg3e32ff_v_i32m1_m ( ... ) __riscv_vlseg3e32ff_v_i32m1_tumu(__VA_ARGS__)

◆ vlseg3e32ff_v_i32m2

#define vlseg3e32ff_v_i32m2 ( ... ) __riscv_vlseg3e32ff_v_i32m2(__VA_ARGS__)

◆ vlseg3e32ff_v_i32m2_m

#define vlseg3e32ff_v_i32m2_m ( ... ) __riscv_vlseg3e32ff_v_i32m2_tumu(__VA_ARGS__)

◆ vlseg3e32ff_v_i32mf2

#define vlseg3e32ff_v_i32mf2 ( ... ) __riscv_vlseg3e32ff_v_i32mf2(__VA_ARGS__)

◆ vlseg3e32ff_v_i32mf2_m

#define vlseg3e32ff_v_i32mf2_m ( ... ) __riscv_vlseg3e32ff_v_i32mf2_tumu(__VA_ARGS__)

◆ vlseg3e32ff_v_u32m1

#define vlseg3e32ff_v_u32m1 ( ... ) __riscv_vlseg3e32ff_v_u32m1(__VA_ARGS__)

◆ vlseg3e32ff_v_u32m1_m

#define vlseg3e32ff_v_u32m1_m ( ... ) __riscv_vlseg3e32ff_v_u32m1_tumu(__VA_ARGS__)

◆ vlseg3e32ff_v_u32m2

#define vlseg3e32ff_v_u32m2 ( ... ) __riscv_vlseg3e32ff_v_u32m2(__VA_ARGS__)

◆ vlseg3e32ff_v_u32m2_m

#define vlseg3e32ff_v_u32m2_m ( ... ) __riscv_vlseg3e32ff_v_u32m2_tumu(__VA_ARGS__)

◆ vlseg3e32ff_v_u32mf2

#define vlseg3e32ff_v_u32mf2 ( ... ) __riscv_vlseg3e32ff_v_u32mf2(__VA_ARGS__)

◆ vlseg3e32ff_v_u32mf2_m

#define vlseg3e32ff_v_u32mf2_m ( ... ) __riscv_vlseg3e32ff_v_u32mf2_tumu(__VA_ARGS__)

◆ vlseg3e64_v_f64m1

#define vlseg3e64_v_f64m1 ( ... ) __riscv_vlseg3e64_v_f64m1(__VA_ARGS__)

◆ vlseg3e64_v_f64m1_m

#define vlseg3e64_v_f64m1_m ( ... ) __riscv_vlseg3e64_v_f64m1_tumu(__VA_ARGS__)

◆ vlseg3e64_v_f64m2

#define vlseg3e64_v_f64m2 ( ... ) __riscv_vlseg3e64_v_f64m2(__VA_ARGS__)

◆ vlseg3e64_v_f64m2_m

#define vlseg3e64_v_f64m2_m ( ... ) __riscv_vlseg3e64_v_f64m2_tumu(__VA_ARGS__)

◆ vlseg3e64_v_i64m1

#define vlseg3e64_v_i64m1 ( ... ) __riscv_vlseg3e64_v_i64m1(__VA_ARGS__)

◆ vlseg3e64_v_i64m1_m

#define vlseg3e64_v_i64m1_m ( ... ) __riscv_vlseg3e64_v_i64m1_tumu(__VA_ARGS__)

◆ vlseg3e64_v_i64m2

#define vlseg3e64_v_i64m2 ( ... ) __riscv_vlseg3e64_v_i64m2(__VA_ARGS__)

◆ vlseg3e64_v_i64m2_m

#define vlseg3e64_v_i64m2_m ( ... ) __riscv_vlseg3e64_v_i64m2_tumu(__VA_ARGS__)

◆ vlseg3e64_v_u64m1

#define vlseg3e64_v_u64m1 ( ... ) __riscv_vlseg3e64_v_u64m1(__VA_ARGS__)

◆ vlseg3e64_v_u64m1_m

#define vlseg3e64_v_u64m1_m ( ... ) __riscv_vlseg3e64_v_u64m1_tumu(__VA_ARGS__)

◆ vlseg3e64_v_u64m2

#define vlseg3e64_v_u64m2 ( ... ) __riscv_vlseg3e64_v_u64m2(__VA_ARGS__)

◆ vlseg3e64_v_u64m2_m

#define vlseg3e64_v_u64m2_m ( ... ) __riscv_vlseg3e64_v_u64m2_tumu(__VA_ARGS__)

◆ vlseg3e64ff_v_f64m1

#define vlseg3e64ff_v_f64m1 ( ... ) __riscv_vlseg3e64ff_v_f64m1(__VA_ARGS__)

◆ vlseg3e64ff_v_f64m1_m

#define vlseg3e64ff_v_f64m1_m ( ... ) __riscv_vlseg3e64ff_v_f64m1_tumu(__VA_ARGS__)

◆ vlseg3e64ff_v_f64m2

#define vlseg3e64ff_v_f64m2 ( ... ) __riscv_vlseg3e64ff_v_f64m2(__VA_ARGS__)

◆ vlseg3e64ff_v_f64m2_m

#define vlseg3e64ff_v_f64m2_m ( ... ) __riscv_vlseg3e64ff_v_f64m2_tumu(__VA_ARGS__)

◆ vlseg3e64ff_v_i64m1

#define vlseg3e64ff_v_i64m1 ( ... ) __riscv_vlseg3e64ff_v_i64m1(__VA_ARGS__)

◆ vlseg3e64ff_v_i64m1_m

#define vlseg3e64ff_v_i64m1_m ( ... ) __riscv_vlseg3e64ff_v_i64m1_tumu(__VA_ARGS__)

◆ vlseg3e64ff_v_i64m2

#define vlseg3e64ff_v_i64m2 ( ... ) __riscv_vlseg3e64ff_v_i64m2(__VA_ARGS__)

◆ vlseg3e64ff_v_i64m2_m

#define vlseg3e64ff_v_i64m2_m ( ... ) __riscv_vlseg3e64ff_v_i64m2_tumu(__VA_ARGS__)

◆ vlseg3e64ff_v_u64m1

#define vlseg3e64ff_v_u64m1 ( ... ) __riscv_vlseg3e64ff_v_u64m1(__VA_ARGS__)

◆ vlseg3e64ff_v_u64m1_m

#define vlseg3e64ff_v_u64m1_m ( ... ) __riscv_vlseg3e64ff_v_u64m1_tumu(__VA_ARGS__)

◆ vlseg3e64ff_v_u64m2

#define vlseg3e64ff_v_u64m2 ( ... ) __riscv_vlseg3e64ff_v_u64m2(__VA_ARGS__)

◆ vlseg3e64ff_v_u64m2_m

#define vlseg3e64ff_v_u64m2_m ( ... ) __riscv_vlseg3e64ff_v_u64m2_tumu(__VA_ARGS__)

◆ vlseg3e8_v_i8m1

#define vlseg3e8_v_i8m1 ( ... ) __riscv_vlseg3e8_v_i8m1(__VA_ARGS__)

◆ vlseg3e8_v_i8m1_m

#define vlseg3e8_v_i8m1_m ( ... ) __riscv_vlseg3e8_v_i8m1_tumu(__VA_ARGS__)

◆ vlseg3e8_v_i8m2

#define vlseg3e8_v_i8m2 ( ... ) __riscv_vlseg3e8_v_i8m2(__VA_ARGS__)

◆ vlseg3e8_v_i8m2_m

#define vlseg3e8_v_i8m2_m ( ... ) __riscv_vlseg3e8_v_i8m2_tumu(__VA_ARGS__)

◆ vlseg3e8_v_i8mf2

#define vlseg3e8_v_i8mf2 ( ... ) __riscv_vlseg3e8_v_i8mf2(__VA_ARGS__)

◆ vlseg3e8_v_i8mf2_m

#define vlseg3e8_v_i8mf2_m ( ... ) __riscv_vlseg3e8_v_i8mf2_tumu(__VA_ARGS__)

◆ vlseg3e8_v_i8mf4

#define vlseg3e8_v_i8mf4 ( ... ) __riscv_vlseg3e8_v_i8mf4(__VA_ARGS__)

◆ vlseg3e8_v_i8mf4_m

#define vlseg3e8_v_i8mf4_m ( ... ) __riscv_vlseg3e8_v_i8mf4_tumu(__VA_ARGS__)

◆ vlseg3e8_v_i8mf8

#define vlseg3e8_v_i8mf8 ( ... ) __riscv_vlseg3e8_v_i8mf8(__VA_ARGS__)

◆ vlseg3e8_v_i8mf8_m

#define vlseg3e8_v_i8mf8_m ( ... ) __riscv_vlseg3e8_v_i8mf8_tumu(__VA_ARGS__)

◆ vlseg3e8_v_u8m1

#define vlseg3e8_v_u8m1 ( ... ) __riscv_vlseg3e8_v_u8m1(__VA_ARGS__)

◆ vlseg3e8_v_u8m1_m

#define vlseg3e8_v_u8m1_m ( ... ) __riscv_vlseg3e8_v_u8m1_tumu(__VA_ARGS__)

◆ vlseg3e8_v_u8m2

#define vlseg3e8_v_u8m2 ( ... ) __riscv_vlseg3e8_v_u8m2(__VA_ARGS__)

◆ vlseg3e8_v_u8m2_m

#define vlseg3e8_v_u8m2_m ( ... ) __riscv_vlseg3e8_v_u8m2_tumu(__VA_ARGS__)

◆ vlseg3e8_v_u8mf2

#define vlseg3e8_v_u8mf2 ( ... ) __riscv_vlseg3e8_v_u8mf2(__VA_ARGS__)

◆ vlseg3e8_v_u8mf2_m

#define vlseg3e8_v_u8mf2_m ( ... ) __riscv_vlseg3e8_v_u8mf2_tumu(__VA_ARGS__)

◆ vlseg3e8_v_u8mf4

#define vlseg3e8_v_u8mf4 ( ... ) __riscv_vlseg3e8_v_u8mf4(__VA_ARGS__)

◆ vlseg3e8_v_u8mf4_m

#define vlseg3e8_v_u8mf4_m ( ... ) __riscv_vlseg3e8_v_u8mf4_tumu(__VA_ARGS__)

◆ vlseg3e8_v_u8mf8

#define vlseg3e8_v_u8mf8 ( ... ) __riscv_vlseg3e8_v_u8mf8(__VA_ARGS__)

◆ vlseg3e8_v_u8mf8_m

#define vlseg3e8_v_u8mf8_m ( ... ) __riscv_vlseg3e8_v_u8mf8_tumu(__VA_ARGS__)

◆ vlseg3e8ff_v_i8m1

#define vlseg3e8ff_v_i8m1 ( ... ) __riscv_vlseg3e8ff_v_i8m1(__VA_ARGS__)

◆ vlseg3e8ff_v_i8m1_m

#define vlseg3e8ff_v_i8m1_m ( ... ) __riscv_vlseg3e8ff_v_i8m1_tumu(__VA_ARGS__)

◆ vlseg3e8ff_v_i8m2

#define vlseg3e8ff_v_i8m2 ( ... ) __riscv_vlseg3e8ff_v_i8m2(__VA_ARGS__)

◆ vlseg3e8ff_v_i8m2_m

#define vlseg3e8ff_v_i8m2_m ( ... ) __riscv_vlseg3e8ff_v_i8m2_tumu(__VA_ARGS__)

◆ vlseg3e8ff_v_i8mf2

#define vlseg3e8ff_v_i8mf2 ( ... ) __riscv_vlseg3e8ff_v_i8mf2(__VA_ARGS__)

◆ vlseg3e8ff_v_i8mf2_m

#define vlseg3e8ff_v_i8mf2_m ( ... ) __riscv_vlseg3e8ff_v_i8mf2_tumu(__VA_ARGS__)

◆ vlseg3e8ff_v_i8mf4

#define vlseg3e8ff_v_i8mf4 ( ... ) __riscv_vlseg3e8ff_v_i8mf4(__VA_ARGS__)

◆ vlseg3e8ff_v_i8mf4_m

#define vlseg3e8ff_v_i8mf4_m ( ... ) __riscv_vlseg3e8ff_v_i8mf4_tumu(__VA_ARGS__)

◆ vlseg3e8ff_v_i8mf8

#define vlseg3e8ff_v_i8mf8 ( ... ) __riscv_vlseg3e8ff_v_i8mf8(__VA_ARGS__)

◆ vlseg3e8ff_v_i8mf8_m

#define vlseg3e8ff_v_i8mf8_m ( ... ) __riscv_vlseg3e8ff_v_i8mf8_tumu(__VA_ARGS__)

◆ vlseg3e8ff_v_u8m1

#define vlseg3e8ff_v_u8m1 ( ... ) __riscv_vlseg3e8ff_v_u8m1(__VA_ARGS__)

◆ vlseg3e8ff_v_u8m1_m

#define vlseg3e8ff_v_u8m1_m ( ... ) __riscv_vlseg3e8ff_v_u8m1_tumu(__VA_ARGS__)

◆ vlseg3e8ff_v_u8m2

#define vlseg3e8ff_v_u8m2 ( ... ) __riscv_vlseg3e8ff_v_u8m2(__VA_ARGS__)

◆ vlseg3e8ff_v_u8m2_m

#define vlseg3e8ff_v_u8m2_m ( ... ) __riscv_vlseg3e8ff_v_u8m2_tumu(__VA_ARGS__)

◆ vlseg3e8ff_v_u8mf2

#define vlseg3e8ff_v_u8mf2 ( ... ) __riscv_vlseg3e8ff_v_u8mf2(__VA_ARGS__)

◆ vlseg3e8ff_v_u8mf2_m

#define vlseg3e8ff_v_u8mf2_m ( ... ) __riscv_vlseg3e8ff_v_u8mf2_tumu(__VA_ARGS__)

◆ vlseg3e8ff_v_u8mf4

#define vlseg3e8ff_v_u8mf4 ( ... ) __riscv_vlseg3e8ff_v_u8mf4(__VA_ARGS__)

◆ vlseg3e8ff_v_u8mf4_m

#define vlseg3e8ff_v_u8mf4_m ( ... ) __riscv_vlseg3e8ff_v_u8mf4_tumu(__VA_ARGS__)

◆ vlseg3e8ff_v_u8mf8

#define vlseg3e8ff_v_u8mf8 ( ... ) __riscv_vlseg3e8ff_v_u8mf8(__VA_ARGS__)

◆ vlseg3e8ff_v_u8mf8_m

#define vlseg3e8ff_v_u8mf8_m ( ... ) __riscv_vlseg3e8ff_v_u8mf8_tumu(__VA_ARGS__)

◆ vlseg4e16_v_f16m1

#define vlseg4e16_v_f16m1 ( ... ) __riscv_vlseg4e16_v_f16m1(__VA_ARGS__)

◆ vlseg4e16_v_f16m1_m

#define vlseg4e16_v_f16m1_m ( ... ) __riscv_vlseg4e16_v_f16m1_tumu(__VA_ARGS__)

◆ vlseg4e16_v_f16m2

#define vlseg4e16_v_f16m2 ( ... ) __riscv_vlseg4e16_v_f16m2(__VA_ARGS__)

◆ vlseg4e16_v_f16m2_m

#define vlseg4e16_v_f16m2_m ( ... ) __riscv_vlseg4e16_v_f16m2_tumu(__VA_ARGS__)

◆ vlseg4e16_v_f16mf2

#define vlseg4e16_v_f16mf2 ( ... ) __riscv_vlseg4e16_v_f16mf2(__VA_ARGS__)

◆ vlseg4e16_v_f16mf2_m

#define vlseg4e16_v_f16mf2_m ( ... ) __riscv_vlseg4e16_v_f16mf2_tumu(__VA_ARGS__)

◆ vlseg4e16_v_f16mf4

#define vlseg4e16_v_f16mf4 ( ... ) __riscv_vlseg4e16_v_f16mf4(__VA_ARGS__)

◆ vlseg4e16_v_f16mf4_m

#define vlseg4e16_v_f16mf4_m ( ... ) __riscv_vlseg4e16_v_f16mf4_tumu(__VA_ARGS__)

◆ vlseg4e16_v_i16m1

#define vlseg4e16_v_i16m1 ( ... ) __riscv_vlseg4e16_v_i16m1(__VA_ARGS__)

◆ vlseg4e16_v_i16m1_m

#define vlseg4e16_v_i16m1_m ( ... ) __riscv_vlseg4e16_v_i16m1_tumu(__VA_ARGS__)

◆ vlseg4e16_v_i16m2

#define vlseg4e16_v_i16m2 ( ... ) __riscv_vlseg4e16_v_i16m2(__VA_ARGS__)

◆ vlseg4e16_v_i16m2_m

#define vlseg4e16_v_i16m2_m ( ... ) __riscv_vlseg4e16_v_i16m2_tumu(__VA_ARGS__)

◆ vlseg4e16_v_i16mf2

#define vlseg4e16_v_i16mf2 ( ... ) __riscv_vlseg4e16_v_i16mf2(__VA_ARGS__)

◆ vlseg4e16_v_i16mf2_m

#define vlseg4e16_v_i16mf2_m ( ... ) __riscv_vlseg4e16_v_i16mf2_tumu(__VA_ARGS__)

◆ vlseg4e16_v_i16mf4

#define vlseg4e16_v_i16mf4 ( ... ) __riscv_vlseg4e16_v_i16mf4(__VA_ARGS__)

◆ vlseg4e16_v_i16mf4_m

#define vlseg4e16_v_i16mf4_m ( ... ) __riscv_vlseg4e16_v_i16mf4_tumu(__VA_ARGS__)

◆ vlseg4e16_v_u16m1

#define vlseg4e16_v_u16m1 ( ... ) __riscv_vlseg4e16_v_u16m1(__VA_ARGS__)

◆ vlseg4e16_v_u16m1_m

#define vlseg4e16_v_u16m1_m ( ... ) __riscv_vlseg4e16_v_u16m1_tumu(__VA_ARGS__)

◆ vlseg4e16_v_u16m2

#define vlseg4e16_v_u16m2 ( ... ) __riscv_vlseg4e16_v_u16m2(__VA_ARGS__)

◆ vlseg4e16_v_u16m2_m

#define vlseg4e16_v_u16m2_m ( ... ) __riscv_vlseg4e16_v_u16m2_tumu(__VA_ARGS__)

◆ vlseg4e16_v_u16mf2

#define vlseg4e16_v_u16mf2 ( ... ) __riscv_vlseg4e16_v_u16mf2(__VA_ARGS__)

◆ vlseg4e16_v_u16mf2_m

#define vlseg4e16_v_u16mf2_m ( ... ) __riscv_vlseg4e16_v_u16mf2_tumu(__VA_ARGS__)

◆ vlseg4e16_v_u16mf4

#define vlseg4e16_v_u16mf4 ( ... ) __riscv_vlseg4e16_v_u16mf4(__VA_ARGS__)

◆ vlseg4e16_v_u16mf4_m

#define vlseg4e16_v_u16mf4_m ( ... ) __riscv_vlseg4e16_v_u16mf4_tumu(__VA_ARGS__)

◆ vlseg4e16ff_v_f16m1

#define vlseg4e16ff_v_f16m1 ( ... ) __riscv_vlseg4e16ff_v_f16m1(__VA_ARGS__)

◆ vlseg4e16ff_v_f16m1_m

#define vlseg4e16ff_v_f16m1_m ( ... ) __riscv_vlseg4e16ff_v_f16m1_tumu(__VA_ARGS__)

◆ vlseg4e16ff_v_f16m2

#define vlseg4e16ff_v_f16m2 ( ... ) __riscv_vlseg4e16ff_v_f16m2(__VA_ARGS__)

◆ vlseg4e16ff_v_f16m2_m

#define vlseg4e16ff_v_f16m2_m ( ... ) __riscv_vlseg4e16ff_v_f16m2_tumu(__VA_ARGS__)

◆ vlseg4e16ff_v_f16mf2

#define vlseg4e16ff_v_f16mf2 ( ... ) __riscv_vlseg4e16ff_v_f16mf2(__VA_ARGS__)

◆ vlseg4e16ff_v_f16mf2_m

#define vlseg4e16ff_v_f16mf2_m ( ... ) __riscv_vlseg4e16ff_v_f16mf2_tumu(__VA_ARGS__)

◆ vlseg4e16ff_v_f16mf4

#define vlseg4e16ff_v_f16mf4 ( ... ) __riscv_vlseg4e16ff_v_f16mf4(__VA_ARGS__)

◆ vlseg4e16ff_v_f16mf4_m

#define vlseg4e16ff_v_f16mf4_m ( ... ) __riscv_vlseg4e16ff_v_f16mf4_tumu(__VA_ARGS__)

◆ vlseg4e16ff_v_i16m1

#define vlseg4e16ff_v_i16m1 ( ... ) __riscv_vlseg4e16ff_v_i16m1(__VA_ARGS__)

◆ vlseg4e16ff_v_i16m1_m

#define vlseg4e16ff_v_i16m1_m ( ... ) __riscv_vlseg4e16ff_v_i16m1_tumu(__VA_ARGS__)

◆ vlseg4e16ff_v_i16m2

#define vlseg4e16ff_v_i16m2 ( ... ) __riscv_vlseg4e16ff_v_i16m2(__VA_ARGS__)

◆ vlseg4e16ff_v_i16m2_m

#define vlseg4e16ff_v_i16m2_m ( ... ) __riscv_vlseg4e16ff_v_i16m2_tumu(__VA_ARGS__)

◆ vlseg4e16ff_v_i16mf2

#define vlseg4e16ff_v_i16mf2 ( ... ) __riscv_vlseg4e16ff_v_i16mf2(__VA_ARGS__)

◆ vlseg4e16ff_v_i16mf2_m

#define vlseg4e16ff_v_i16mf2_m ( ... ) __riscv_vlseg4e16ff_v_i16mf2_tumu(__VA_ARGS__)

◆ vlseg4e16ff_v_i16mf4

#define vlseg4e16ff_v_i16mf4 ( ... ) __riscv_vlseg4e16ff_v_i16mf4(__VA_ARGS__)

◆ vlseg4e16ff_v_i16mf4_m

#define vlseg4e16ff_v_i16mf4_m ( ... ) __riscv_vlseg4e16ff_v_i16mf4_tumu(__VA_ARGS__)

◆ vlseg4e16ff_v_u16m1

#define vlseg4e16ff_v_u16m1 ( ... ) __riscv_vlseg4e16ff_v_u16m1(__VA_ARGS__)

◆ vlseg4e16ff_v_u16m1_m

#define vlseg4e16ff_v_u16m1_m ( ... ) __riscv_vlseg4e16ff_v_u16m1_tumu(__VA_ARGS__)

◆ vlseg4e16ff_v_u16m2

#define vlseg4e16ff_v_u16m2 ( ... ) __riscv_vlseg4e16ff_v_u16m2(__VA_ARGS__)

◆ vlseg4e16ff_v_u16m2_m

#define vlseg4e16ff_v_u16m2_m ( ... ) __riscv_vlseg4e16ff_v_u16m2_tumu(__VA_ARGS__)

◆ vlseg4e16ff_v_u16mf2

#define vlseg4e16ff_v_u16mf2 ( ... ) __riscv_vlseg4e16ff_v_u16mf2(__VA_ARGS__)

◆ vlseg4e16ff_v_u16mf2_m

#define vlseg4e16ff_v_u16mf2_m ( ... ) __riscv_vlseg4e16ff_v_u16mf2_tumu(__VA_ARGS__)

◆ vlseg4e16ff_v_u16mf4

#define vlseg4e16ff_v_u16mf4 ( ... ) __riscv_vlseg4e16ff_v_u16mf4(__VA_ARGS__)

◆ vlseg4e16ff_v_u16mf4_m

#define vlseg4e16ff_v_u16mf4_m ( ... ) __riscv_vlseg4e16ff_v_u16mf4_tumu(__VA_ARGS__)

◆ vlseg4e32_v_f32m1

#define vlseg4e32_v_f32m1 ( ... ) __riscv_vlseg4e32_v_f32m1(__VA_ARGS__)

◆ vlseg4e32_v_f32m1_m

#define vlseg4e32_v_f32m1_m ( ... ) __riscv_vlseg4e32_v_f32m1_tumu(__VA_ARGS__)

◆ vlseg4e32_v_f32m2

#define vlseg4e32_v_f32m2 ( ... ) __riscv_vlseg4e32_v_f32m2(__VA_ARGS__)

◆ vlseg4e32_v_f32m2_m

#define vlseg4e32_v_f32m2_m ( ... ) __riscv_vlseg4e32_v_f32m2_tumu(__VA_ARGS__)

◆ vlseg4e32_v_f32mf2

#define vlseg4e32_v_f32mf2 ( ... ) __riscv_vlseg4e32_v_f32mf2(__VA_ARGS__)

◆ vlseg4e32_v_f32mf2_m

#define vlseg4e32_v_f32mf2_m ( ... ) __riscv_vlseg4e32_v_f32mf2_tumu(__VA_ARGS__)

◆ vlseg4e32_v_i32m1

#define vlseg4e32_v_i32m1 ( ... ) __riscv_vlseg4e32_v_i32m1(__VA_ARGS__)

◆ vlseg4e32_v_i32m1_m

#define vlseg4e32_v_i32m1_m ( ... ) __riscv_vlseg4e32_v_i32m1_tumu(__VA_ARGS__)

◆ vlseg4e32_v_i32m2

#define vlseg4e32_v_i32m2 ( ... ) __riscv_vlseg4e32_v_i32m2(__VA_ARGS__)

◆ vlseg4e32_v_i32m2_m

#define vlseg4e32_v_i32m2_m ( ... ) __riscv_vlseg4e32_v_i32m2_tumu(__VA_ARGS__)

◆ vlseg4e32_v_i32mf2

#define vlseg4e32_v_i32mf2 ( ... ) __riscv_vlseg4e32_v_i32mf2(__VA_ARGS__)

◆ vlseg4e32_v_i32mf2_m

#define vlseg4e32_v_i32mf2_m ( ... ) __riscv_vlseg4e32_v_i32mf2_tumu(__VA_ARGS__)

◆ vlseg4e32_v_u32m1

#define vlseg4e32_v_u32m1 ( ... ) __riscv_vlseg4e32_v_u32m1(__VA_ARGS__)

◆ vlseg4e32_v_u32m1_m

#define vlseg4e32_v_u32m1_m ( ... ) __riscv_vlseg4e32_v_u32m1_tumu(__VA_ARGS__)

◆ vlseg4e32_v_u32m2

#define vlseg4e32_v_u32m2 ( ... ) __riscv_vlseg4e32_v_u32m2(__VA_ARGS__)

◆ vlseg4e32_v_u32m2_m

#define vlseg4e32_v_u32m2_m ( ... ) __riscv_vlseg4e32_v_u32m2_tumu(__VA_ARGS__)

◆ vlseg4e32_v_u32mf2

#define vlseg4e32_v_u32mf2 ( ... ) __riscv_vlseg4e32_v_u32mf2(__VA_ARGS__)

◆ vlseg4e32_v_u32mf2_m

#define vlseg4e32_v_u32mf2_m ( ... ) __riscv_vlseg4e32_v_u32mf2_tumu(__VA_ARGS__)

◆ vlseg4e32ff_v_f32m1

#define vlseg4e32ff_v_f32m1 ( ... ) __riscv_vlseg4e32ff_v_f32m1(__VA_ARGS__)

◆ vlseg4e32ff_v_f32m1_m

#define vlseg4e32ff_v_f32m1_m ( ... ) __riscv_vlseg4e32ff_v_f32m1_tumu(__VA_ARGS__)

◆ vlseg4e32ff_v_f32m2

#define vlseg4e32ff_v_f32m2 ( ... ) __riscv_vlseg4e32ff_v_f32m2(__VA_ARGS__)

◆ vlseg4e32ff_v_f32m2_m

#define vlseg4e32ff_v_f32m2_m ( ... ) __riscv_vlseg4e32ff_v_f32m2_tumu(__VA_ARGS__)

◆ vlseg4e32ff_v_f32mf2

#define vlseg4e32ff_v_f32mf2 ( ... ) __riscv_vlseg4e32ff_v_f32mf2(__VA_ARGS__)

◆ vlseg4e32ff_v_f32mf2_m

#define vlseg4e32ff_v_f32mf2_m ( ... ) __riscv_vlseg4e32ff_v_f32mf2_tumu(__VA_ARGS__)

◆ vlseg4e32ff_v_i32m1

#define vlseg4e32ff_v_i32m1 ( ... ) __riscv_vlseg4e32ff_v_i32m1(__VA_ARGS__)

◆ vlseg4e32ff_v_i32m1_m

#define vlseg4e32ff_v_i32m1_m ( ... ) __riscv_vlseg4e32ff_v_i32m1_tumu(__VA_ARGS__)

◆ vlseg4e32ff_v_i32m2

#define vlseg4e32ff_v_i32m2 ( ... ) __riscv_vlseg4e32ff_v_i32m2(__VA_ARGS__)

◆ vlseg4e32ff_v_i32m2_m

#define vlseg4e32ff_v_i32m2_m ( ... ) __riscv_vlseg4e32ff_v_i32m2_tumu(__VA_ARGS__)

◆ vlseg4e32ff_v_i32mf2

#define vlseg4e32ff_v_i32mf2 ( ... ) __riscv_vlseg4e32ff_v_i32mf2(__VA_ARGS__)

◆ vlseg4e32ff_v_i32mf2_m

#define vlseg4e32ff_v_i32mf2_m ( ... ) __riscv_vlseg4e32ff_v_i32mf2_tumu(__VA_ARGS__)

◆ vlseg4e32ff_v_u32m1

#define vlseg4e32ff_v_u32m1 ( ... ) __riscv_vlseg4e32ff_v_u32m1(__VA_ARGS__)

◆ vlseg4e32ff_v_u32m1_m

#define vlseg4e32ff_v_u32m1_m ( ... ) __riscv_vlseg4e32ff_v_u32m1_tumu(__VA_ARGS__)

◆ vlseg4e32ff_v_u32m2

#define vlseg4e32ff_v_u32m2 ( ... ) __riscv_vlseg4e32ff_v_u32m2(__VA_ARGS__)

◆ vlseg4e32ff_v_u32m2_m

#define vlseg4e32ff_v_u32m2_m ( ... ) __riscv_vlseg4e32ff_v_u32m2_tumu(__VA_ARGS__)

◆ vlseg4e32ff_v_u32mf2

#define vlseg4e32ff_v_u32mf2 ( ... ) __riscv_vlseg4e32ff_v_u32mf2(__VA_ARGS__)

◆ vlseg4e32ff_v_u32mf2_m

#define vlseg4e32ff_v_u32mf2_m ( ... ) __riscv_vlseg4e32ff_v_u32mf2_tumu(__VA_ARGS__)

◆ vlseg4e64_v_f64m1

#define vlseg4e64_v_f64m1 ( ... ) __riscv_vlseg4e64_v_f64m1(__VA_ARGS__)

◆ vlseg4e64_v_f64m1_m

#define vlseg4e64_v_f64m1_m ( ... ) __riscv_vlseg4e64_v_f64m1_tumu(__VA_ARGS__)

◆ vlseg4e64_v_f64m2

#define vlseg4e64_v_f64m2 ( ... ) __riscv_vlseg4e64_v_f64m2(__VA_ARGS__)

◆ vlseg4e64_v_f64m2_m

#define vlseg4e64_v_f64m2_m ( ... ) __riscv_vlseg4e64_v_f64m2_tumu(__VA_ARGS__)

◆ vlseg4e64_v_i64m1

#define vlseg4e64_v_i64m1 ( ... ) __riscv_vlseg4e64_v_i64m1(__VA_ARGS__)

◆ vlseg4e64_v_i64m1_m

#define vlseg4e64_v_i64m1_m ( ... ) __riscv_vlseg4e64_v_i64m1_tumu(__VA_ARGS__)

◆ vlseg4e64_v_i64m2

#define vlseg4e64_v_i64m2 ( ... ) __riscv_vlseg4e64_v_i64m2(__VA_ARGS__)

◆ vlseg4e64_v_i64m2_m

#define vlseg4e64_v_i64m2_m ( ... ) __riscv_vlseg4e64_v_i64m2_tumu(__VA_ARGS__)

◆ vlseg4e64_v_u64m1

#define vlseg4e64_v_u64m1 ( ... ) __riscv_vlseg4e64_v_u64m1(__VA_ARGS__)

◆ vlseg4e64_v_u64m1_m

#define vlseg4e64_v_u64m1_m ( ... ) __riscv_vlseg4e64_v_u64m1_tumu(__VA_ARGS__)

◆ vlseg4e64_v_u64m2

#define vlseg4e64_v_u64m2 ( ... ) __riscv_vlseg4e64_v_u64m2(__VA_ARGS__)

◆ vlseg4e64_v_u64m2_m

#define vlseg4e64_v_u64m2_m ( ... ) __riscv_vlseg4e64_v_u64m2_tumu(__VA_ARGS__)

◆ vlseg4e64ff_v_f64m1

#define vlseg4e64ff_v_f64m1 ( ... ) __riscv_vlseg4e64ff_v_f64m1(__VA_ARGS__)

◆ vlseg4e64ff_v_f64m1_m

#define vlseg4e64ff_v_f64m1_m ( ... ) __riscv_vlseg4e64ff_v_f64m1_tumu(__VA_ARGS__)

◆ vlseg4e64ff_v_f64m2

#define vlseg4e64ff_v_f64m2 ( ... ) __riscv_vlseg4e64ff_v_f64m2(__VA_ARGS__)

◆ vlseg4e64ff_v_f64m2_m

#define vlseg4e64ff_v_f64m2_m ( ... ) __riscv_vlseg4e64ff_v_f64m2_tumu(__VA_ARGS__)

◆ vlseg4e64ff_v_i64m1

#define vlseg4e64ff_v_i64m1 ( ... ) __riscv_vlseg4e64ff_v_i64m1(__VA_ARGS__)

◆ vlseg4e64ff_v_i64m1_m

#define vlseg4e64ff_v_i64m1_m ( ... ) __riscv_vlseg4e64ff_v_i64m1_tumu(__VA_ARGS__)

◆ vlseg4e64ff_v_i64m2

#define vlseg4e64ff_v_i64m2 ( ... ) __riscv_vlseg4e64ff_v_i64m2(__VA_ARGS__)

◆ vlseg4e64ff_v_i64m2_m

#define vlseg4e64ff_v_i64m2_m ( ... ) __riscv_vlseg4e64ff_v_i64m2_tumu(__VA_ARGS__)

◆ vlseg4e64ff_v_u64m1

#define vlseg4e64ff_v_u64m1 ( ... ) __riscv_vlseg4e64ff_v_u64m1(__VA_ARGS__)

◆ vlseg4e64ff_v_u64m1_m

#define vlseg4e64ff_v_u64m1_m ( ... ) __riscv_vlseg4e64ff_v_u64m1_tumu(__VA_ARGS__)

◆ vlseg4e64ff_v_u64m2

#define vlseg4e64ff_v_u64m2 ( ... ) __riscv_vlseg4e64ff_v_u64m2(__VA_ARGS__)

◆ vlseg4e64ff_v_u64m2_m

#define vlseg4e64ff_v_u64m2_m ( ... ) __riscv_vlseg4e64ff_v_u64m2_tumu(__VA_ARGS__)

◆ vlseg4e8_v_i8m1

#define vlseg4e8_v_i8m1 ( ... ) __riscv_vlseg4e8_v_i8m1(__VA_ARGS__)

◆ vlseg4e8_v_i8m1_m

#define vlseg4e8_v_i8m1_m ( ... ) __riscv_vlseg4e8_v_i8m1_tumu(__VA_ARGS__)

◆ vlseg4e8_v_i8m2

#define vlseg4e8_v_i8m2 ( ... ) __riscv_vlseg4e8_v_i8m2(__VA_ARGS__)

◆ vlseg4e8_v_i8m2_m

#define vlseg4e8_v_i8m2_m ( ... ) __riscv_vlseg4e8_v_i8m2_tumu(__VA_ARGS__)

◆ vlseg4e8_v_i8mf2

#define vlseg4e8_v_i8mf2 ( ... ) __riscv_vlseg4e8_v_i8mf2(__VA_ARGS__)

◆ vlseg4e8_v_i8mf2_m

#define vlseg4e8_v_i8mf2_m ( ... ) __riscv_vlseg4e8_v_i8mf2_tumu(__VA_ARGS__)

◆ vlseg4e8_v_i8mf4

#define vlseg4e8_v_i8mf4 ( ... ) __riscv_vlseg4e8_v_i8mf4(__VA_ARGS__)

◆ vlseg4e8_v_i8mf4_m

#define vlseg4e8_v_i8mf4_m ( ... ) __riscv_vlseg4e8_v_i8mf4_tumu(__VA_ARGS__)

◆ vlseg4e8_v_i8mf8

#define vlseg4e8_v_i8mf8 ( ... ) __riscv_vlseg4e8_v_i8mf8(__VA_ARGS__)

◆ vlseg4e8_v_i8mf8_m

#define vlseg4e8_v_i8mf8_m ( ... ) __riscv_vlseg4e8_v_i8mf8_tumu(__VA_ARGS__)

◆ vlseg4e8_v_u8m1

#define vlseg4e8_v_u8m1 ( ... ) __riscv_vlseg4e8_v_u8m1(__VA_ARGS__)

◆ vlseg4e8_v_u8m1_m

#define vlseg4e8_v_u8m1_m ( ... ) __riscv_vlseg4e8_v_u8m1_tumu(__VA_ARGS__)

◆ vlseg4e8_v_u8m2

#define vlseg4e8_v_u8m2 ( ... ) __riscv_vlseg4e8_v_u8m2(__VA_ARGS__)

◆ vlseg4e8_v_u8m2_m

#define vlseg4e8_v_u8m2_m ( ... ) __riscv_vlseg4e8_v_u8m2_tumu(__VA_ARGS__)

◆ vlseg4e8_v_u8mf2

#define vlseg4e8_v_u8mf2 ( ... ) __riscv_vlseg4e8_v_u8mf2(__VA_ARGS__)

◆ vlseg4e8_v_u8mf2_m

#define vlseg4e8_v_u8mf2_m ( ... ) __riscv_vlseg4e8_v_u8mf2_tumu(__VA_ARGS__)

◆ vlseg4e8_v_u8mf4

#define vlseg4e8_v_u8mf4 ( ... ) __riscv_vlseg4e8_v_u8mf4(__VA_ARGS__)

◆ vlseg4e8_v_u8mf4_m

#define vlseg4e8_v_u8mf4_m ( ... ) __riscv_vlseg4e8_v_u8mf4_tumu(__VA_ARGS__)

◆ vlseg4e8_v_u8mf8

#define vlseg4e8_v_u8mf8 ( ... ) __riscv_vlseg4e8_v_u8mf8(__VA_ARGS__)

◆ vlseg4e8_v_u8mf8_m

#define vlseg4e8_v_u8mf8_m ( ... ) __riscv_vlseg4e8_v_u8mf8_tumu(__VA_ARGS__)

◆ vlseg4e8ff_v_i8m1

#define vlseg4e8ff_v_i8m1 ( ... ) __riscv_vlseg4e8ff_v_i8m1(__VA_ARGS__)

◆ vlseg4e8ff_v_i8m1_m

#define vlseg4e8ff_v_i8m1_m ( ... ) __riscv_vlseg4e8ff_v_i8m1_tumu(__VA_ARGS__)

◆ vlseg4e8ff_v_i8m2

#define vlseg4e8ff_v_i8m2 ( ... ) __riscv_vlseg4e8ff_v_i8m2(__VA_ARGS__)

◆ vlseg4e8ff_v_i8m2_m

#define vlseg4e8ff_v_i8m2_m ( ... ) __riscv_vlseg4e8ff_v_i8m2_tumu(__VA_ARGS__)

◆ vlseg4e8ff_v_i8mf2

#define vlseg4e8ff_v_i8mf2 ( ... ) __riscv_vlseg4e8ff_v_i8mf2(__VA_ARGS__)

◆ vlseg4e8ff_v_i8mf2_m

#define vlseg4e8ff_v_i8mf2_m ( ... ) __riscv_vlseg4e8ff_v_i8mf2_tumu(__VA_ARGS__)

◆ vlseg4e8ff_v_i8mf4

#define vlseg4e8ff_v_i8mf4 ( ... ) __riscv_vlseg4e8ff_v_i8mf4(__VA_ARGS__)

◆ vlseg4e8ff_v_i8mf4_m

#define vlseg4e8ff_v_i8mf4_m ( ... ) __riscv_vlseg4e8ff_v_i8mf4_tumu(__VA_ARGS__)

◆ vlseg4e8ff_v_i8mf8

#define vlseg4e8ff_v_i8mf8 ( ... ) __riscv_vlseg4e8ff_v_i8mf8(__VA_ARGS__)

◆ vlseg4e8ff_v_i8mf8_m

#define vlseg4e8ff_v_i8mf8_m ( ... ) __riscv_vlseg4e8ff_v_i8mf8_tumu(__VA_ARGS__)

◆ vlseg4e8ff_v_u8m1

#define vlseg4e8ff_v_u8m1 ( ... ) __riscv_vlseg4e8ff_v_u8m1(__VA_ARGS__)

◆ vlseg4e8ff_v_u8m1_m

#define vlseg4e8ff_v_u8m1_m ( ... ) __riscv_vlseg4e8ff_v_u8m1_tumu(__VA_ARGS__)

◆ vlseg4e8ff_v_u8m2

#define vlseg4e8ff_v_u8m2 ( ... ) __riscv_vlseg4e8ff_v_u8m2(__VA_ARGS__)

◆ vlseg4e8ff_v_u8m2_m

#define vlseg4e8ff_v_u8m2_m ( ... ) __riscv_vlseg4e8ff_v_u8m2_tumu(__VA_ARGS__)

◆ vlseg4e8ff_v_u8mf2

#define vlseg4e8ff_v_u8mf2 ( ... ) __riscv_vlseg4e8ff_v_u8mf2(__VA_ARGS__)

◆ vlseg4e8ff_v_u8mf2_m

#define vlseg4e8ff_v_u8mf2_m ( ... ) __riscv_vlseg4e8ff_v_u8mf2_tumu(__VA_ARGS__)

◆ vlseg4e8ff_v_u8mf4

#define vlseg4e8ff_v_u8mf4 ( ... ) __riscv_vlseg4e8ff_v_u8mf4(__VA_ARGS__)

◆ vlseg4e8ff_v_u8mf4_m

#define vlseg4e8ff_v_u8mf4_m ( ... ) __riscv_vlseg4e8ff_v_u8mf4_tumu(__VA_ARGS__)

◆ vlseg4e8ff_v_u8mf8

#define vlseg4e8ff_v_u8mf8 ( ... ) __riscv_vlseg4e8ff_v_u8mf8(__VA_ARGS__)

◆ vlseg4e8ff_v_u8mf8_m

#define vlseg4e8ff_v_u8mf8_m ( ... ) __riscv_vlseg4e8ff_v_u8mf8_tumu(__VA_ARGS__)

◆ vlseg5e16_v_f16m1

#define vlseg5e16_v_f16m1 ( ... ) __riscv_vlseg5e16_v_f16m1(__VA_ARGS__)

◆ vlseg5e16_v_f16m1_m

#define vlseg5e16_v_f16m1_m ( ... ) __riscv_vlseg5e16_v_f16m1_tumu(__VA_ARGS__)

◆ vlseg5e16_v_f16mf2

#define vlseg5e16_v_f16mf2 ( ... ) __riscv_vlseg5e16_v_f16mf2(__VA_ARGS__)

◆ vlseg5e16_v_f16mf2_m

#define vlseg5e16_v_f16mf2_m ( ... ) __riscv_vlseg5e16_v_f16mf2_tumu(__VA_ARGS__)

◆ vlseg5e16_v_f16mf4

#define vlseg5e16_v_f16mf4 ( ... ) __riscv_vlseg5e16_v_f16mf4(__VA_ARGS__)

◆ vlseg5e16_v_f16mf4_m

#define vlseg5e16_v_f16mf4_m ( ... ) __riscv_vlseg5e16_v_f16mf4_tumu(__VA_ARGS__)

◆ vlseg5e16_v_i16m1

#define vlseg5e16_v_i16m1 ( ... ) __riscv_vlseg5e16_v_i16m1(__VA_ARGS__)

◆ vlseg5e16_v_i16m1_m

#define vlseg5e16_v_i16m1_m ( ... ) __riscv_vlseg5e16_v_i16m1_tumu(__VA_ARGS__)

◆ vlseg5e16_v_i16mf2

#define vlseg5e16_v_i16mf2 ( ... ) __riscv_vlseg5e16_v_i16mf2(__VA_ARGS__)

◆ vlseg5e16_v_i16mf2_m

#define vlseg5e16_v_i16mf2_m ( ... ) __riscv_vlseg5e16_v_i16mf2_tumu(__VA_ARGS__)

◆ vlseg5e16_v_i16mf4

#define vlseg5e16_v_i16mf4 ( ... ) __riscv_vlseg5e16_v_i16mf4(__VA_ARGS__)

◆ vlseg5e16_v_i16mf4_m

#define vlseg5e16_v_i16mf4_m ( ... ) __riscv_vlseg5e16_v_i16mf4_tumu(__VA_ARGS__)

◆ vlseg5e16_v_u16m1

#define vlseg5e16_v_u16m1 ( ... ) __riscv_vlseg5e16_v_u16m1(__VA_ARGS__)

◆ vlseg5e16_v_u16m1_m

#define vlseg5e16_v_u16m1_m ( ... ) __riscv_vlseg5e16_v_u16m1_tumu(__VA_ARGS__)

◆ vlseg5e16_v_u16mf2

#define vlseg5e16_v_u16mf2 ( ... ) __riscv_vlseg5e16_v_u16mf2(__VA_ARGS__)

◆ vlseg5e16_v_u16mf2_m

#define vlseg5e16_v_u16mf2_m ( ... ) __riscv_vlseg5e16_v_u16mf2_tumu(__VA_ARGS__)

◆ vlseg5e16_v_u16mf4

#define vlseg5e16_v_u16mf4 ( ... ) __riscv_vlseg5e16_v_u16mf4(__VA_ARGS__)

◆ vlseg5e16_v_u16mf4_m

#define vlseg5e16_v_u16mf4_m ( ... ) __riscv_vlseg5e16_v_u16mf4_tumu(__VA_ARGS__)

◆ vlseg5e16ff_v_f16m1

#define vlseg5e16ff_v_f16m1 ( ... ) __riscv_vlseg5e16ff_v_f16m1(__VA_ARGS__)

◆ vlseg5e16ff_v_f16m1_m

#define vlseg5e16ff_v_f16m1_m ( ... ) __riscv_vlseg5e16ff_v_f16m1_tumu(__VA_ARGS__)

◆ vlseg5e16ff_v_f16mf2

#define vlseg5e16ff_v_f16mf2 ( ... ) __riscv_vlseg5e16ff_v_f16mf2(__VA_ARGS__)

◆ vlseg5e16ff_v_f16mf2_m

#define vlseg5e16ff_v_f16mf2_m ( ... ) __riscv_vlseg5e16ff_v_f16mf2_tumu(__VA_ARGS__)

◆ vlseg5e16ff_v_f16mf4

#define vlseg5e16ff_v_f16mf4 ( ... ) __riscv_vlseg5e16ff_v_f16mf4(__VA_ARGS__)

◆ vlseg5e16ff_v_f16mf4_m

#define vlseg5e16ff_v_f16mf4_m ( ... ) __riscv_vlseg5e16ff_v_f16mf4_tumu(__VA_ARGS__)

◆ vlseg5e16ff_v_i16m1

#define vlseg5e16ff_v_i16m1 ( ... ) __riscv_vlseg5e16ff_v_i16m1(__VA_ARGS__)

◆ vlseg5e16ff_v_i16m1_m

#define vlseg5e16ff_v_i16m1_m ( ... ) __riscv_vlseg5e16ff_v_i16m1_tumu(__VA_ARGS__)

◆ vlseg5e16ff_v_i16mf2

#define vlseg5e16ff_v_i16mf2 ( ... ) __riscv_vlseg5e16ff_v_i16mf2(__VA_ARGS__)

◆ vlseg5e16ff_v_i16mf2_m

#define vlseg5e16ff_v_i16mf2_m ( ... ) __riscv_vlseg5e16ff_v_i16mf2_tumu(__VA_ARGS__)

◆ vlseg5e16ff_v_i16mf4

#define vlseg5e16ff_v_i16mf4 ( ... ) __riscv_vlseg5e16ff_v_i16mf4(__VA_ARGS__)

◆ vlseg5e16ff_v_i16mf4_m

#define vlseg5e16ff_v_i16mf4_m ( ... ) __riscv_vlseg5e16ff_v_i16mf4_tumu(__VA_ARGS__)

◆ vlseg5e16ff_v_u16m1

#define vlseg5e16ff_v_u16m1 ( ... ) __riscv_vlseg5e16ff_v_u16m1(__VA_ARGS__)

◆ vlseg5e16ff_v_u16m1_m

#define vlseg5e16ff_v_u16m1_m ( ... ) __riscv_vlseg5e16ff_v_u16m1_tumu(__VA_ARGS__)

◆ vlseg5e16ff_v_u16mf2

#define vlseg5e16ff_v_u16mf2 ( ... ) __riscv_vlseg5e16ff_v_u16mf2(__VA_ARGS__)

◆ vlseg5e16ff_v_u16mf2_m

#define vlseg5e16ff_v_u16mf2_m ( ... ) __riscv_vlseg5e16ff_v_u16mf2_tumu(__VA_ARGS__)

◆ vlseg5e16ff_v_u16mf4

#define vlseg5e16ff_v_u16mf4 ( ... ) __riscv_vlseg5e16ff_v_u16mf4(__VA_ARGS__)

◆ vlseg5e16ff_v_u16mf4_m

#define vlseg5e16ff_v_u16mf4_m ( ... ) __riscv_vlseg5e16ff_v_u16mf4_tumu(__VA_ARGS__)

◆ vlseg5e32_v_f32m1

#define vlseg5e32_v_f32m1 ( ... ) __riscv_vlseg5e32_v_f32m1(__VA_ARGS__)

◆ vlseg5e32_v_f32m1_m

#define vlseg5e32_v_f32m1_m ( ... ) __riscv_vlseg5e32_v_f32m1_tumu(__VA_ARGS__)

◆ vlseg5e32_v_f32mf2

#define vlseg5e32_v_f32mf2 ( ... ) __riscv_vlseg5e32_v_f32mf2(__VA_ARGS__)

◆ vlseg5e32_v_f32mf2_m

#define vlseg5e32_v_f32mf2_m ( ... ) __riscv_vlseg5e32_v_f32mf2_tumu(__VA_ARGS__)

◆ vlseg5e32_v_i32m1

#define vlseg5e32_v_i32m1 ( ... ) __riscv_vlseg5e32_v_i32m1(__VA_ARGS__)

◆ vlseg5e32_v_i32m1_m

#define vlseg5e32_v_i32m1_m ( ... ) __riscv_vlseg5e32_v_i32m1_tumu(__VA_ARGS__)

◆ vlseg5e32_v_i32mf2

#define vlseg5e32_v_i32mf2 ( ... ) __riscv_vlseg5e32_v_i32mf2(__VA_ARGS__)

◆ vlseg5e32_v_i32mf2_m

#define vlseg5e32_v_i32mf2_m ( ... ) __riscv_vlseg5e32_v_i32mf2_tumu(__VA_ARGS__)

◆ vlseg5e32_v_u32m1

#define vlseg5e32_v_u32m1 ( ... ) __riscv_vlseg5e32_v_u32m1(__VA_ARGS__)

◆ vlseg5e32_v_u32m1_m

#define vlseg5e32_v_u32m1_m ( ... ) __riscv_vlseg5e32_v_u32m1_tumu(__VA_ARGS__)

◆ vlseg5e32_v_u32mf2

#define vlseg5e32_v_u32mf2 ( ... ) __riscv_vlseg5e32_v_u32mf2(__VA_ARGS__)

◆ vlseg5e32_v_u32mf2_m

#define vlseg5e32_v_u32mf2_m ( ... ) __riscv_vlseg5e32_v_u32mf2_tumu(__VA_ARGS__)

◆ vlseg5e32ff_v_f32m1

#define vlseg5e32ff_v_f32m1 ( ... ) __riscv_vlseg5e32ff_v_f32m1(__VA_ARGS__)

◆ vlseg5e32ff_v_f32m1_m

#define vlseg5e32ff_v_f32m1_m ( ... ) __riscv_vlseg5e32ff_v_f32m1_tumu(__VA_ARGS__)

◆ vlseg5e32ff_v_f32mf2

#define vlseg5e32ff_v_f32mf2 ( ... ) __riscv_vlseg5e32ff_v_f32mf2(__VA_ARGS__)

◆ vlseg5e32ff_v_f32mf2_m

#define vlseg5e32ff_v_f32mf2_m ( ... ) __riscv_vlseg5e32ff_v_f32mf2_tumu(__VA_ARGS__)

◆ vlseg5e32ff_v_i32m1

#define vlseg5e32ff_v_i32m1 ( ... ) __riscv_vlseg5e32ff_v_i32m1(__VA_ARGS__)

◆ vlseg5e32ff_v_i32m1_m

#define vlseg5e32ff_v_i32m1_m ( ... ) __riscv_vlseg5e32ff_v_i32m1_tumu(__VA_ARGS__)

◆ vlseg5e32ff_v_i32mf2

#define vlseg5e32ff_v_i32mf2 ( ... ) __riscv_vlseg5e32ff_v_i32mf2(__VA_ARGS__)

◆ vlseg5e32ff_v_i32mf2_m

#define vlseg5e32ff_v_i32mf2_m ( ... ) __riscv_vlseg5e32ff_v_i32mf2_tumu(__VA_ARGS__)

◆ vlseg5e32ff_v_u32m1

#define vlseg5e32ff_v_u32m1 ( ... ) __riscv_vlseg5e32ff_v_u32m1(__VA_ARGS__)

◆ vlseg5e32ff_v_u32m1_m

#define vlseg5e32ff_v_u32m1_m ( ... ) __riscv_vlseg5e32ff_v_u32m1_tumu(__VA_ARGS__)

◆ vlseg5e32ff_v_u32mf2

#define vlseg5e32ff_v_u32mf2 ( ... ) __riscv_vlseg5e32ff_v_u32mf2(__VA_ARGS__)

◆ vlseg5e32ff_v_u32mf2_m

#define vlseg5e32ff_v_u32mf2_m ( ... ) __riscv_vlseg5e32ff_v_u32mf2_tumu(__VA_ARGS__)

◆ vlseg5e64_v_f64m1

#define vlseg5e64_v_f64m1 ( ... ) __riscv_vlseg5e64_v_f64m1(__VA_ARGS__)

◆ vlseg5e64_v_f64m1_m

#define vlseg5e64_v_f64m1_m ( ... ) __riscv_vlseg5e64_v_f64m1_tumu(__VA_ARGS__)

◆ vlseg5e64_v_i64m1

#define vlseg5e64_v_i64m1 ( ... ) __riscv_vlseg5e64_v_i64m1(__VA_ARGS__)

◆ vlseg5e64_v_i64m1_m

#define vlseg5e64_v_i64m1_m ( ... ) __riscv_vlseg5e64_v_i64m1_tumu(__VA_ARGS__)

◆ vlseg5e64_v_u64m1

#define vlseg5e64_v_u64m1 ( ... ) __riscv_vlseg5e64_v_u64m1(__VA_ARGS__)

◆ vlseg5e64_v_u64m1_m

#define vlseg5e64_v_u64m1_m ( ... ) __riscv_vlseg5e64_v_u64m1_tumu(__VA_ARGS__)

◆ vlseg5e64ff_v_f64m1

#define vlseg5e64ff_v_f64m1 ( ... ) __riscv_vlseg5e64ff_v_f64m1(__VA_ARGS__)

◆ vlseg5e64ff_v_f64m1_m

#define vlseg5e64ff_v_f64m1_m ( ... ) __riscv_vlseg5e64ff_v_f64m1_tumu(__VA_ARGS__)

◆ vlseg5e64ff_v_i64m1

#define vlseg5e64ff_v_i64m1 ( ... ) __riscv_vlseg5e64ff_v_i64m1(__VA_ARGS__)

◆ vlseg5e64ff_v_i64m1_m

#define vlseg5e64ff_v_i64m1_m ( ... ) __riscv_vlseg5e64ff_v_i64m1_tumu(__VA_ARGS__)

◆ vlseg5e64ff_v_u64m1

#define vlseg5e64ff_v_u64m1 ( ... ) __riscv_vlseg5e64ff_v_u64m1(__VA_ARGS__)

◆ vlseg5e64ff_v_u64m1_m

#define vlseg5e64ff_v_u64m1_m ( ... ) __riscv_vlseg5e64ff_v_u64m1_tumu(__VA_ARGS__)

◆ vlseg5e8_v_i8m1

#define vlseg5e8_v_i8m1 ( ... ) __riscv_vlseg5e8_v_i8m1(__VA_ARGS__)

◆ vlseg5e8_v_i8m1_m

#define vlseg5e8_v_i8m1_m ( ... ) __riscv_vlseg5e8_v_i8m1_tumu(__VA_ARGS__)

◆ vlseg5e8_v_i8mf2

#define vlseg5e8_v_i8mf2 ( ... ) __riscv_vlseg5e8_v_i8mf2(__VA_ARGS__)

◆ vlseg5e8_v_i8mf2_m

#define vlseg5e8_v_i8mf2_m ( ... ) __riscv_vlseg5e8_v_i8mf2_tumu(__VA_ARGS__)

◆ vlseg5e8_v_i8mf4

#define vlseg5e8_v_i8mf4 ( ... ) __riscv_vlseg5e8_v_i8mf4(__VA_ARGS__)

◆ vlseg5e8_v_i8mf4_m

#define vlseg5e8_v_i8mf4_m ( ... ) __riscv_vlseg5e8_v_i8mf4_tumu(__VA_ARGS__)

◆ vlseg5e8_v_i8mf8

#define vlseg5e8_v_i8mf8 ( ... ) __riscv_vlseg5e8_v_i8mf8(__VA_ARGS__)

◆ vlseg5e8_v_i8mf8_m

#define vlseg5e8_v_i8mf8_m ( ... ) __riscv_vlseg5e8_v_i8mf8_tumu(__VA_ARGS__)

◆ vlseg5e8_v_u8m1

#define vlseg5e8_v_u8m1 ( ... ) __riscv_vlseg5e8_v_u8m1(__VA_ARGS__)

◆ vlseg5e8_v_u8m1_m

#define vlseg5e8_v_u8m1_m ( ... ) __riscv_vlseg5e8_v_u8m1_tumu(__VA_ARGS__)

◆ vlseg5e8_v_u8mf2

#define vlseg5e8_v_u8mf2 ( ... ) __riscv_vlseg5e8_v_u8mf2(__VA_ARGS__)

◆ vlseg5e8_v_u8mf2_m

#define vlseg5e8_v_u8mf2_m ( ... ) __riscv_vlseg5e8_v_u8mf2_tumu(__VA_ARGS__)

◆ vlseg5e8_v_u8mf4

#define vlseg5e8_v_u8mf4 ( ... ) __riscv_vlseg5e8_v_u8mf4(__VA_ARGS__)

◆ vlseg5e8_v_u8mf4_m

#define vlseg5e8_v_u8mf4_m ( ... ) __riscv_vlseg5e8_v_u8mf4_tumu(__VA_ARGS__)

◆ vlseg5e8_v_u8mf8

#define vlseg5e8_v_u8mf8 ( ... ) __riscv_vlseg5e8_v_u8mf8(__VA_ARGS__)

◆ vlseg5e8_v_u8mf8_m

#define vlseg5e8_v_u8mf8_m ( ... ) __riscv_vlseg5e8_v_u8mf8_tumu(__VA_ARGS__)

◆ vlseg5e8ff_v_i8m1

#define vlseg5e8ff_v_i8m1 ( ... ) __riscv_vlseg5e8ff_v_i8m1(__VA_ARGS__)

◆ vlseg5e8ff_v_i8m1_m

#define vlseg5e8ff_v_i8m1_m ( ... ) __riscv_vlseg5e8ff_v_i8m1_tumu(__VA_ARGS__)

◆ vlseg5e8ff_v_i8mf2

#define vlseg5e8ff_v_i8mf2 ( ... ) __riscv_vlseg5e8ff_v_i8mf2(__VA_ARGS__)

◆ vlseg5e8ff_v_i8mf2_m

#define vlseg5e8ff_v_i8mf2_m ( ... ) __riscv_vlseg5e8ff_v_i8mf2_tumu(__VA_ARGS__)

◆ vlseg5e8ff_v_i8mf4

#define vlseg5e8ff_v_i8mf4 ( ... ) __riscv_vlseg5e8ff_v_i8mf4(__VA_ARGS__)

◆ vlseg5e8ff_v_i8mf4_m

#define vlseg5e8ff_v_i8mf4_m ( ... ) __riscv_vlseg5e8ff_v_i8mf4_tumu(__VA_ARGS__)

◆ vlseg5e8ff_v_i8mf8

#define vlseg5e8ff_v_i8mf8 ( ... ) __riscv_vlseg5e8ff_v_i8mf8(__VA_ARGS__)

◆ vlseg5e8ff_v_i8mf8_m

#define vlseg5e8ff_v_i8mf8_m ( ... ) __riscv_vlseg5e8ff_v_i8mf8_tumu(__VA_ARGS__)

◆ vlseg5e8ff_v_u8m1

#define vlseg5e8ff_v_u8m1 ( ... ) __riscv_vlseg5e8ff_v_u8m1(__VA_ARGS__)

◆ vlseg5e8ff_v_u8m1_m

#define vlseg5e8ff_v_u8m1_m ( ... ) __riscv_vlseg5e8ff_v_u8m1_tumu(__VA_ARGS__)

◆ vlseg5e8ff_v_u8mf2

#define vlseg5e8ff_v_u8mf2 ( ... ) __riscv_vlseg5e8ff_v_u8mf2(__VA_ARGS__)

◆ vlseg5e8ff_v_u8mf2_m

#define vlseg5e8ff_v_u8mf2_m ( ... ) __riscv_vlseg5e8ff_v_u8mf2_tumu(__VA_ARGS__)

◆ vlseg5e8ff_v_u8mf4

#define vlseg5e8ff_v_u8mf4 ( ... ) __riscv_vlseg5e8ff_v_u8mf4(__VA_ARGS__)

◆ vlseg5e8ff_v_u8mf4_m

#define vlseg5e8ff_v_u8mf4_m ( ... ) __riscv_vlseg5e8ff_v_u8mf4_tumu(__VA_ARGS__)

◆ vlseg5e8ff_v_u8mf8

#define vlseg5e8ff_v_u8mf8 ( ... ) __riscv_vlseg5e8ff_v_u8mf8(__VA_ARGS__)

◆ vlseg5e8ff_v_u8mf8_m

#define vlseg5e8ff_v_u8mf8_m ( ... ) __riscv_vlseg5e8ff_v_u8mf8_tumu(__VA_ARGS__)

◆ vlseg6e16_v_f16m1

#define vlseg6e16_v_f16m1 ( ... ) __riscv_vlseg6e16_v_f16m1(__VA_ARGS__)

◆ vlseg6e16_v_f16m1_m

#define vlseg6e16_v_f16m1_m ( ... ) __riscv_vlseg6e16_v_f16m1_tumu(__VA_ARGS__)

◆ vlseg6e16_v_f16mf2

#define vlseg6e16_v_f16mf2 ( ... ) __riscv_vlseg6e16_v_f16mf2(__VA_ARGS__)

◆ vlseg6e16_v_f16mf2_m

#define vlseg6e16_v_f16mf2_m ( ... ) __riscv_vlseg6e16_v_f16mf2_tumu(__VA_ARGS__)

◆ vlseg6e16_v_f16mf4

#define vlseg6e16_v_f16mf4 ( ... ) __riscv_vlseg6e16_v_f16mf4(__VA_ARGS__)

◆ vlseg6e16_v_f16mf4_m

#define vlseg6e16_v_f16mf4_m ( ... ) __riscv_vlseg6e16_v_f16mf4_tumu(__VA_ARGS__)

◆ vlseg6e16_v_i16m1

#define vlseg6e16_v_i16m1 ( ... ) __riscv_vlseg6e16_v_i16m1(__VA_ARGS__)

◆ vlseg6e16_v_i16m1_m

#define vlseg6e16_v_i16m1_m ( ... ) __riscv_vlseg6e16_v_i16m1_tumu(__VA_ARGS__)

◆ vlseg6e16_v_i16mf2

#define vlseg6e16_v_i16mf2 ( ... ) __riscv_vlseg6e16_v_i16mf2(__VA_ARGS__)

◆ vlseg6e16_v_i16mf2_m

#define vlseg6e16_v_i16mf2_m ( ... ) __riscv_vlseg6e16_v_i16mf2_tumu(__VA_ARGS__)

◆ vlseg6e16_v_i16mf4

#define vlseg6e16_v_i16mf4 ( ... ) __riscv_vlseg6e16_v_i16mf4(__VA_ARGS__)

◆ vlseg6e16_v_i16mf4_m

#define vlseg6e16_v_i16mf4_m ( ... ) __riscv_vlseg6e16_v_i16mf4_tumu(__VA_ARGS__)

◆ vlseg6e16_v_u16m1

#define vlseg6e16_v_u16m1 ( ... ) __riscv_vlseg6e16_v_u16m1(__VA_ARGS__)

◆ vlseg6e16_v_u16m1_m

#define vlseg6e16_v_u16m1_m ( ... ) __riscv_vlseg6e16_v_u16m1_tumu(__VA_ARGS__)

◆ vlseg6e16_v_u16mf2

#define vlseg6e16_v_u16mf2 ( ... ) __riscv_vlseg6e16_v_u16mf2(__VA_ARGS__)

◆ vlseg6e16_v_u16mf2_m

#define vlseg6e16_v_u16mf2_m ( ... ) __riscv_vlseg6e16_v_u16mf2_tumu(__VA_ARGS__)

◆ vlseg6e16_v_u16mf4

#define vlseg6e16_v_u16mf4 ( ... ) __riscv_vlseg6e16_v_u16mf4(__VA_ARGS__)

◆ vlseg6e16_v_u16mf4_m

#define vlseg6e16_v_u16mf4_m ( ... ) __riscv_vlseg6e16_v_u16mf4_tumu(__VA_ARGS__)

◆ vlseg6e16ff_v_f16m1

#define vlseg6e16ff_v_f16m1 ( ... ) __riscv_vlseg6e16ff_v_f16m1(__VA_ARGS__)

◆ vlseg6e16ff_v_f16m1_m

#define vlseg6e16ff_v_f16m1_m ( ... ) __riscv_vlseg6e16ff_v_f16m1_tumu(__VA_ARGS__)

◆ vlseg6e16ff_v_f16mf2

#define vlseg6e16ff_v_f16mf2 ( ... ) __riscv_vlseg6e16ff_v_f16mf2(__VA_ARGS__)

◆ vlseg6e16ff_v_f16mf2_m

#define vlseg6e16ff_v_f16mf2_m ( ... ) __riscv_vlseg6e16ff_v_f16mf2_tumu(__VA_ARGS__)

◆ vlseg6e16ff_v_f16mf4

#define vlseg6e16ff_v_f16mf4 ( ... ) __riscv_vlseg6e16ff_v_f16mf4(__VA_ARGS__)

◆ vlseg6e16ff_v_f16mf4_m

#define vlseg6e16ff_v_f16mf4_m ( ... ) __riscv_vlseg6e16ff_v_f16mf4_tumu(__VA_ARGS__)

◆ vlseg6e16ff_v_i16m1

#define vlseg6e16ff_v_i16m1 ( ... ) __riscv_vlseg6e16ff_v_i16m1(__VA_ARGS__)

◆ vlseg6e16ff_v_i16m1_m

#define vlseg6e16ff_v_i16m1_m ( ... ) __riscv_vlseg6e16ff_v_i16m1_tumu(__VA_ARGS__)

◆ vlseg6e16ff_v_i16mf2

#define vlseg6e16ff_v_i16mf2 ( ... ) __riscv_vlseg6e16ff_v_i16mf2(__VA_ARGS__)

◆ vlseg6e16ff_v_i16mf2_m

#define vlseg6e16ff_v_i16mf2_m ( ... ) __riscv_vlseg6e16ff_v_i16mf2_tumu(__VA_ARGS__)

◆ vlseg6e16ff_v_i16mf4

#define vlseg6e16ff_v_i16mf4 ( ... ) __riscv_vlseg6e16ff_v_i16mf4(__VA_ARGS__)

◆ vlseg6e16ff_v_i16mf4_m

#define vlseg6e16ff_v_i16mf4_m ( ... ) __riscv_vlseg6e16ff_v_i16mf4_tumu(__VA_ARGS__)

◆ vlseg6e16ff_v_u16m1

#define vlseg6e16ff_v_u16m1 ( ... ) __riscv_vlseg6e16ff_v_u16m1(__VA_ARGS__)

◆ vlseg6e16ff_v_u16m1_m

#define vlseg6e16ff_v_u16m1_m ( ... ) __riscv_vlseg6e16ff_v_u16m1_tumu(__VA_ARGS__)

◆ vlseg6e16ff_v_u16mf2

#define vlseg6e16ff_v_u16mf2 ( ... ) __riscv_vlseg6e16ff_v_u16mf2(__VA_ARGS__)

◆ vlseg6e16ff_v_u16mf2_m

#define vlseg6e16ff_v_u16mf2_m ( ... ) __riscv_vlseg6e16ff_v_u16mf2_tumu(__VA_ARGS__)

◆ vlseg6e16ff_v_u16mf4

#define vlseg6e16ff_v_u16mf4 ( ... ) __riscv_vlseg6e16ff_v_u16mf4(__VA_ARGS__)

◆ vlseg6e16ff_v_u16mf4_m

#define vlseg6e16ff_v_u16mf4_m ( ... ) __riscv_vlseg6e16ff_v_u16mf4_tumu(__VA_ARGS__)

◆ vlseg6e32_v_f32m1

#define vlseg6e32_v_f32m1 ( ... ) __riscv_vlseg6e32_v_f32m1(__VA_ARGS__)

◆ vlseg6e32_v_f32m1_m

#define vlseg6e32_v_f32m1_m ( ... ) __riscv_vlseg6e32_v_f32m1_tumu(__VA_ARGS__)

◆ vlseg6e32_v_f32mf2

#define vlseg6e32_v_f32mf2 ( ... ) __riscv_vlseg6e32_v_f32mf2(__VA_ARGS__)

◆ vlseg6e32_v_f32mf2_m

#define vlseg6e32_v_f32mf2_m ( ... ) __riscv_vlseg6e32_v_f32mf2_tumu(__VA_ARGS__)

◆ vlseg6e32_v_i32m1

#define vlseg6e32_v_i32m1 ( ... ) __riscv_vlseg6e32_v_i32m1(__VA_ARGS__)

◆ vlseg6e32_v_i32m1_m

#define vlseg6e32_v_i32m1_m ( ... ) __riscv_vlseg6e32_v_i32m1_tumu(__VA_ARGS__)

◆ vlseg6e32_v_i32mf2

#define vlseg6e32_v_i32mf2 ( ... ) __riscv_vlseg6e32_v_i32mf2(__VA_ARGS__)

◆ vlseg6e32_v_i32mf2_m

#define vlseg6e32_v_i32mf2_m ( ... ) __riscv_vlseg6e32_v_i32mf2_tumu(__VA_ARGS__)

◆ vlseg6e32_v_u32m1

#define vlseg6e32_v_u32m1 ( ... ) __riscv_vlseg6e32_v_u32m1(__VA_ARGS__)

◆ vlseg6e32_v_u32m1_m

#define vlseg6e32_v_u32m1_m ( ... ) __riscv_vlseg6e32_v_u32m1_tumu(__VA_ARGS__)

◆ vlseg6e32_v_u32mf2

#define vlseg6e32_v_u32mf2 ( ... ) __riscv_vlseg6e32_v_u32mf2(__VA_ARGS__)

◆ vlseg6e32_v_u32mf2_m

#define vlseg6e32_v_u32mf2_m ( ... ) __riscv_vlseg6e32_v_u32mf2_tumu(__VA_ARGS__)

◆ vlseg6e32ff_v_f32m1

#define vlseg6e32ff_v_f32m1 ( ... ) __riscv_vlseg6e32ff_v_f32m1(__VA_ARGS__)

◆ vlseg6e32ff_v_f32m1_m

#define vlseg6e32ff_v_f32m1_m ( ... ) __riscv_vlseg6e32ff_v_f32m1_tumu(__VA_ARGS__)

◆ vlseg6e32ff_v_f32mf2

#define vlseg6e32ff_v_f32mf2 ( ... ) __riscv_vlseg6e32ff_v_f32mf2(__VA_ARGS__)

◆ vlseg6e32ff_v_f32mf2_m

#define vlseg6e32ff_v_f32mf2_m ( ... ) __riscv_vlseg6e32ff_v_f32mf2_tumu(__VA_ARGS__)

◆ vlseg6e32ff_v_i32m1

#define vlseg6e32ff_v_i32m1 ( ... ) __riscv_vlseg6e32ff_v_i32m1(__VA_ARGS__)

◆ vlseg6e32ff_v_i32m1_m

#define vlseg6e32ff_v_i32m1_m ( ... ) __riscv_vlseg6e32ff_v_i32m1_tumu(__VA_ARGS__)

◆ vlseg6e32ff_v_i32mf2

#define vlseg6e32ff_v_i32mf2 ( ... ) __riscv_vlseg6e32ff_v_i32mf2(__VA_ARGS__)

◆ vlseg6e32ff_v_i32mf2_m

#define vlseg6e32ff_v_i32mf2_m ( ... ) __riscv_vlseg6e32ff_v_i32mf2_tumu(__VA_ARGS__)

◆ vlseg6e32ff_v_u32m1

#define vlseg6e32ff_v_u32m1 ( ... ) __riscv_vlseg6e32ff_v_u32m1(__VA_ARGS__)

◆ vlseg6e32ff_v_u32m1_m

#define vlseg6e32ff_v_u32m1_m ( ... ) __riscv_vlseg6e32ff_v_u32m1_tumu(__VA_ARGS__)

◆ vlseg6e32ff_v_u32mf2

#define vlseg6e32ff_v_u32mf2 ( ... ) __riscv_vlseg6e32ff_v_u32mf2(__VA_ARGS__)

◆ vlseg6e32ff_v_u32mf2_m

#define vlseg6e32ff_v_u32mf2_m ( ... ) __riscv_vlseg6e32ff_v_u32mf2_tumu(__VA_ARGS__)

◆ vlseg6e64_v_f64m1

#define vlseg6e64_v_f64m1 ( ... ) __riscv_vlseg6e64_v_f64m1(__VA_ARGS__)

◆ vlseg6e64_v_f64m1_m

#define vlseg6e64_v_f64m1_m ( ... ) __riscv_vlseg6e64_v_f64m1_tumu(__VA_ARGS__)

◆ vlseg6e64_v_i64m1

#define vlseg6e64_v_i64m1 ( ... ) __riscv_vlseg6e64_v_i64m1(__VA_ARGS__)

◆ vlseg6e64_v_i64m1_m

#define vlseg6e64_v_i64m1_m ( ... ) __riscv_vlseg6e64_v_i64m1_tumu(__VA_ARGS__)

◆ vlseg6e64_v_u64m1

#define vlseg6e64_v_u64m1 ( ... ) __riscv_vlseg6e64_v_u64m1(__VA_ARGS__)

◆ vlseg6e64_v_u64m1_m

#define vlseg6e64_v_u64m1_m ( ... ) __riscv_vlseg6e64_v_u64m1_tumu(__VA_ARGS__)

◆ vlseg6e64ff_v_f64m1

#define vlseg6e64ff_v_f64m1 ( ... ) __riscv_vlseg6e64ff_v_f64m1(__VA_ARGS__)

◆ vlseg6e64ff_v_f64m1_m

#define vlseg6e64ff_v_f64m1_m ( ... ) __riscv_vlseg6e64ff_v_f64m1_tumu(__VA_ARGS__)

◆ vlseg6e64ff_v_i64m1

#define vlseg6e64ff_v_i64m1 ( ... ) __riscv_vlseg6e64ff_v_i64m1(__VA_ARGS__)

◆ vlseg6e64ff_v_i64m1_m

#define vlseg6e64ff_v_i64m1_m ( ... ) __riscv_vlseg6e64ff_v_i64m1_tumu(__VA_ARGS__)

◆ vlseg6e64ff_v_u64m1

#define vlseg6e64ff_v_u64m1 ( ... ) __riscv_vlseg6e64ff_v_u64m1(__VA_ARGS__)

◆ vlseg6e64ff_v_u64m1_m

#define vlseg6e64ff_v_u64m1_m ( ... ) __riscv_vlseg6e64ff_v_u64m1_tumu(__VA_ARGS__)

◆ vlseg6e8_v_i8m1

#define vlseg6e8_v_i8m1 ( ... ) __riscv_vlseg6e8_v_i8m1(__VA_ARGS__)

◆ vlseg6e8_v_i8m1_m

#define vlseg6e8_v_i8m1_m ( ... ) __riscv_vlseg6e8_v_i8m1_tumu(__VA_ARGS__)

◆ vlseg6e8_v_i8mf2

#define vlseg6e8_v_i8mf2 ( ... ) __riscv_vlseg6e8_v_i8mf2(__VA_ARGS__)

◆ vlseg6e8_v_i8mf2_m

#define vlseg6e8_v_i8mf2_m ( ... ) __riscv_vlseg6e8_v_i8mf2_tumu(__VA_ARGS__)

◆ vlseg6e8_v_i8mf4

#define vlseg6e8_v_i8mf4 ( ... ) __riscv_vlseg6e8_v_i8mf4(__VA_ARGS__)

◆ vlseg6e8_v_i8mf4_m

#define vlseg6e8_v_i8mf4_m ( ... ) __riscv_vlseg6e8_v_i8mf4_tumu(__VA_ARGS__)

◆ vlseg6e8_v_i8mf8

#define vlseg6e8_v_i8mf8 ( ... ) __riscv_vlseg6e8_v_i8mf8(__VA_ARGS__)

◆ vlseg6e8_v_i8mf8_m

#define vlseg6e8_v_i8mf8_m ( ... ) __riscv_vlseg6e8_v_i8mf8_tumu(__VA_ARGS__)

◆ vlseg6e8_v_u8m1

#define vlseg6e8_v_u8m1 ( ... ) __riscv_vlseg6e8_v_u8m1(__VA_ARGS__)

◆ vlseg6e8_v_u8m1_m

#define vlseg6e8_v_u8m1_m ( ... ) __riscv_vlseg6e8_v_u8m1_tumu(__VA_ARGS__)

◆ vlseg6e8_v_u8mf2

#define vlseg6e8_v_u8mf2 ( ... ) __riscv_vlseg6e8_v_u8mf2(__VA_ARGS__)

◆ vlseg6e8_v_u8mf2_m

#define vlseg6e8_v_u8mf2_m ( ... ) __riscv_vlseg6e8_v_u8mf2_tumu(__VA_ARGS__)

◆ vlseg6e8_v_u8mf4

#define vlseg6e8_v_u8mf4 ( ... ) __riscv_vlseg6e8_v_u8mf4(__VA_ARGS__)

◆ vlseg6e8_v_u8mf4_m

#define vlseg6e8_v_u8mf4_m ( ... ) __riscv_vlseg6e8_v_u8mf4_tumu(__VA_ARGS__)

◆ vlseg6e8_v_u8mf8

#define vlseg6e8_v_u8mf8 ( ... ) __riscv_vlseg6e8_v_u8mf8(__VA_ARGS__)

◆ vlseg6e8_v_u8mf8_m

#define vlseg6e8_v_u8mf8_m ( ... ) __riscv_vlseg6e8_v_u8mf8_tumu(__VA_ARGS__)

◆ vlseg6e8ff_v_i8m1

#define vlseg6e8ff_v_i8m1 ( ... ) __riscv_vlseg6e8ff_v_i8m1(__VA_ARGS__)

◆ vlseg6e8ff_v_i8m1_m

#define vlseg6e8ff_v_i8m1_m ( ... ) __riscv_vlseg6e8ff_v_i8m1_tumu(__VA_ARGS__)

◆ vlseg6e8ff_v_i8mf2

#define vlseg6e8ff_v_i8mf2 ( ... ) __riscv_vlseg6e8ff_v_i8mf2(__VA_ARGS__)

◆ vlseg6e8ff_v_i8mf2_m

#define vlseg6e8ff_v_i8mf2_m ( ... ) __riscv_vlseg6e8ff_v_i8mf2_tumu(__VA_ARGS__)

◆ vlseg6e8ff_v_i8mf4

#define vlseg6e8ff_v_i8mf4 ( ... ) __riscv_vlseg6e8ff_v_i8mf4(__VA_ARGS__)

◆ vlseg6e8ff_v_i8mf4_m

#define vlseg6e8ff_v_i8mf4_m ( ... ) __riscv_vlseg6e8ff_v_i8mf4_tumu(__VA_ARGS__)

◆ vlseg6e8ff_v_i8mf8

#define vlseg6e8ff_v_i8mf8 ( ... ) __riscv_vlseg6e8ff_v_i8mf8(__VA_ARGS__)

◆ vlseg6e8ff_v_i8mf8_m

#define vlseg6e8ff_v_i8mf8_m ( ... ) __riscv_vlseg6e8ff_v_i8mf8_tumu(__VA_ARGS__)

◆ vlseg6e8ff_v_u8m1

#define vlseg6e8ff_v_u8m1 ( ... ) __riscv_vlseg6e8ff_v_u8m1(__VA_ARGS__)

◆ vlseg6e8ff_v_u8m1_m

#define vlseg6e8ff_v_u8m1_m ( ... ) __riscv_vlseg6e8ff_v_u8m1_tumu(__VA_ARGS__)

◆ vlseg6e8ff_v_u8mf2

#define vlseg6e8ff_v_u8mf2 ( ... ) __riscv_vlseg6e8ff_v_u8mf2(__VA_ARGS__)

◆ vlseg6e8ff_v_u8mf2_m

#define vlseg6e8ff_v_u8mf2_m ( ... ) __riscv_vlseg6e8ff_v_u8mf2_tumu(__VA_ARGS__)

◆ vlseg6e8ff_v_u8mf4

#define vlseg6e8ff_v_u8mf4 ( ... ) __riscv_vlseg6e8ff_v_u8mf4(__VA_ARGS__)

◆ vlseg6e8ff_v_u8mf4_m

#define vlseg6e8ff_v_u8mf4_m ( ... ) __riscv_vlseg6e8ff_v_u8mf4_tumu(__VA_ARGS__)

◆ vlseg6e8ff_v_u8mf8

#define vlseg6e8ff_v_u8mf8 ( ... ) __riscv_vlseg6e8ff_v_u8mf8(__VA_ARGS__)

◆ vlseg6e8ff_v_u8mf8_m

#define vlseg6e8ff_v_u8mf8_m ( ... ) __riscv_vlseg6e8ff_v_u8mf8_tumu(__VA_ARGS__)

◆ vlseg7e16_v_f16m1

#define vlseg7e16_v_f16m1 ( ... ) __riscv_vlseg7e16_v_f16m1(__VA_ARGS__)

◆ vlseg7e16_v_f16m1_m

#define vlseg7e16_v_f16m1_m ( ... ) __riscv_vlseg7e16_v_f16m1_tumu(__VA_ARGS__)

◆ vlseg7e16_v_f16mf2

#define vlseg7e16_v_f16mf2 ( ... ) __riscv_vlseg7e16_v_f16mf2(__VA_ARGS__)

◆ vlseg7e16_v_f16mf2_m

#define vlseg7e16_v_f16mf2_m ( ... ) __riscv_vlseg7e16_v_f16mf2_tumu(__VA_ARGS__)

◆ vlseg7e16_v_f16mf4

#define vlseg7e16_v_f16mf4 ( ... ) __riscv_vlseg7e16_v_f16mf4(__VA_ARGS__)

◆ vlseg7e16_v_f16mf4_m

#define vlseg7e16_v_f16mf4_m ( ... ) __riscv_vlseg7e16_v_f16mf4_tumu(__VA_ARGS__)

◆ vlseg7e16_v_i16m1

#define vlseg7e16_v_i16m1 ( ... ) __riscv_vlseg7e16_v_i16m1(__VA_ARGS__)

◆ vlseg7e16_v_i16m1_m

#define vlseg7e16_v_i16m1_m ( ... ) __riscv_vlseg7e16_v_i16m1_tumu(__VA_ARGS__)

◆ vlseg7e16_v_i16mf2

#define vlseg7e16_v_i16mf2 ( ... ) __riscv_vlseg7e16_v_i16mf2(__VA_ARGS__)

◆ vlseg7e16_v_i16mf2_m

#define vlseg7e16_v_i16mf2_m ( ... ) __riscv_vlseg7e16_v_i16mf2_tumu(__VA_ARGS__)

◆ vlseg7e16_v_i16mf4

#define vlseg7e16_v_i16mf4 ( ... ) __riscv_vlseg7e16_v_i16mf4(__VA_ARGS__)

◆ vlseg7e16_v_i16mf4_m

#define vlseg7e16_v_i16mf4_m ( ... ) __riscv_vlseg7e16_v_i16mf4_tumu(__VA_ARGS__)

◆ vlseg7e16_v_u16m1

#define vlseg7e16_v_u16m1 ( ... ) __riscv_vlseg7e16_v_u16m1(__VA_ARGS__)

◆ vlseg7e16_v_u16m1_m

#define vlseg7e16_v_u16m1_m ( ... ) __riscv_vlseg7e16_v_u16m1_tumu(__VA_ARGS__)

◆ vlseg7e16_v_u16mf2

#define vlseg7e16_v_u16mf2 ( ... ) __riscv_vlseg7e16_v_u16mf2(__VA_ARGS__)

◆ vlseg7e16_v_u16mf2_m

#define vlseg7e16_v_u16mf2_m ( ... ) __riscv_vlseg7e16_v_u16mf2_tumu(__VA_ARGS__)

◆ vlseg7e16_v_u16mf4

#define vlseg7e16_v_u16mf4 ( ... ) __riscv_vlseg7e16_v_u16mf4(__VA_ARGS__)

◆ vlseg7e16_v_u16mf4_m

#define vlseg7e16_v_u16mf4_m ( ... ) __riscv_vlseg7e16_v_u16mf4_tumu(__VA_ARGS__)

◆ vlseg7e16ff_v_f16m1

#define vlseg7e16ff_v_f16m1 ( ... ) __riscv_vlseg7e16ff_v_f16m1(__VA_ARGS__)

◆ vlseg7e16ff_v_f16m1_m

#define vlseg7e16ff_v_f16m1_m ( ... ) __riscv_vlseg7e16ff_v_f16m1_tumu(__VA_ARGS__)

◆ vlseg7e16ff_v_f16mf2

#define vlseg7e16ff_v_f16mf2 ( ... ) __riscv_vlseg7e16ff_v_f16mf2(__VA_ARGS__)

◆ vlseg7e16ff_v_f16mf2_m

#define vlseg7e16ff_v_f16mf2_m ( ... ) __riscv_vlseg7e16ff_v_f16mf2_tumu(__VA_ARGS__)

◆ vlseg7e16ff_v_f16mf4

#define vlseg7e16ff_v_f16mf4 ( ... ) __riscv_vlseg7e16ff_v_f16mf4(__VA_ARGS__)

◆ vlseg7e16ff_v_f16mf4_m

#define vlseg7e16ff_v_f16mf4_m ( ... ) __riscv_vlseg7e16ff_v_f16mf4_tumu(__VA_ARGS__)

◆ vlseg7e16ff_v_i16m1

#define vlseg7e16ff_v_i16m1 ( ... ) __riscv_vlseg7e16ff_v_i16m1(__VA_ARGS__)

◆ vlseg7e16ff_v_i16m1_m

#define vlseg7e16ff_v_i16m1_m ( ... ) __riscv_vlseg7e16ff_v_i16m1_tumu(__VA_ARGS__)

◆ vlseg7e16ff_v_i16mf2

#define vlseg7e16ff_v_i16mf2 ( ... ) __riscv_vlseg7e16ff_v_i16mf2(__VA_ARGS__)

◆ vlseg7e16ff_v_i16mf2_m

#define vlseg7e16ff_v_i16mf2_m ( ... ) __riscv_vlseg7e16ff_v_i16mf2_tumu(__VA_ARGS__)

◆ vlseg7e16ff_v_i16mf4

#define vlseg7e16ff_v_i16mf4 ( ... ) __riscv_vlseg7e16ff_v_i16mf4(__VA_ARGS__)

◆ vlseg7e16ff_v_i16mf4_m

#define vlseg7e16ff_v_i16mf4_m ( ... ) __riscv_vlseg7e16ff_v_i16mf4_tumu(__VA_ARGS__)

◆ vlseg7e16ff_v_u16m1

#define vlseg7e16ff_v_u16m1 ( ... ) __riscv_vlseg7e16ff_v_u16m1(__VA_ARGS__)

◆ vlseg7e16ff_v_u16m1_m

#define vlseg7e16ff_v_u16m1_m ( ... ) __riscv_vlseg7e16ff_v_u16m1_tumu(__VA_ARGS__)

◆ vlseg7e16ff_v_u16mf2

#define vlseg7e16ff_v_u16mf2 ( ... ) __riscv_vlseg7e16ff_v_u16mf2(__VA_ARGS__)

◆ vlseg7e16ff_v_u16mf2_m

#define vlseg7e16ff_v_u16mf2_m ( ... ) __riscv_vlseg7e16ff_v_u16mf2_tumu(__VA_ARGS__)

◆ vlseg7e16ff_v_u16mf4

#define vlseg7e16ff_v_u16mf4 ( ... ) __riscv_vlseg7e16ff_v_u16mf4(__VA_ARGS__)

◆ vlseg7e16ff_v_u16mf4_m

#define vlseg7e16ff_v_u16mf4_m ( ... ) __riscv_vlseg7e16ff_v_u16mf4_tumu(__VA_ARGS__)

◆ vlseg7e32_v_f32m1

#define vlseg7e32_v_f32m1 ( ... ) __riscv_vlseg7e32_v_f32m1(__VA_ARGS__)

◆ vlseg7e32_v_f32m1_m

#define vlseg7e32_v_f32m1_m ( ... ) __riscv_vlseg7e32_v_f32m1_tumu(__VA_ARGS__)

◆ vlseg7e32_v_f32mf2

#define vlseg7e32_v_f32mf2 ( ... ) __riscv_vlseg7e32_v_f32mf2(__VA_ARGS__)

◆ vlseg7e32_v_f32mf2_m

#define vlseg7e32_v_f32mf2_m ( ... ) __riscv_vlseg7e32_v_f32mf2_tumu(__VA_ARGS__)

◆ vlseg7e32_v_i32m1

#define vlseg7e32_v_i32m1 ( ... ) __riscv_vlseg7e32_v_i32m1(__VA_ARGS__)

◆ vlseg7e32_v_i32m1_m

#define vlseg7e32_v_i32m1_m ( ... ) __riscv_vlseg7e32_v_i32m1_tumu(__VA_ARGS__)

◆ vlseg7e32_v_i32mf2

#define vlseg7e32_v_i32mf2 ( ... ) __riscv_vlseg7e32_v_i32mf2(__VA_ARGS__)

◆ vlseg7e32_v_i32mf2_m

#define vlseg7e32_v_i32mf2_m ( ... ) __riscv_vlseg7e32_v_i32mf2_tumu(__VA_ARGS__)

◆ vlseg7e32_v_u32m1

#define vlseg7e32_v_u32m1 ( ... ) __riscv_vlseg7e32_v_u32m1(__VA_ARGS__)

◆ vlseg7e32_v_u32m1_m

#define vlseg7e32_v_u32m1_m ( ... ) __riscv_vlseg7e32_v_u32m1_tumu(__VA_ARGS__)

◆ vlseg7e32_v_u32mf2

#define vlseg7e32_v_u32mf2 ( ... ) __riscv_vlseg7e32_v_u32mf2(__VA_ARGS__)

◆ vlseg7e32_v_u32mf2_m

#define vlseg7e32_v_u32mf2_m ( ... ) __riscv_vlseg7e32_v_u32mf2_tumu(__VA_ARGS__)

◆ vlseg7e32ff_v_f32m1

#define vlseg7e32ff_v_f32m1 ( ... ) __riscv_vlseg7e32ff_v_f32m1(__VA_ARGS__)

◆ vlseg7e32ff_v_f32m1_m

#define vlseg7e32ff_v_f32m1_m ( ... ) __riscv_vlseg7e32ff_v_f32m1_tumu(__VA_ARGS__)

◆ vlseg7e32ff_v_f32mf2

#define vlseg7e32ff_v_f32mf2 ( ... ) __riscv_vlseg7e32ff_v_f32mf2(__VA_ARGS__)

◆ vlseg7e32ff_v_f32mf2_m

#define vlseg7e32ff_v_f32mf2_m ( ... ) __riscv_vlseg7e32ff_v_f32mf2_tumu(__VA_ARGS__)

◆ vlseg7e32ff_v_i32m1

#define vlseg7e32ff_v_i32m1 ( ... ) __riscv_vlseg7e32ff_v_i32m1(__VA_ARGS__)

◆ vlseg7e32ff_v_i32m1_m

#define vlseg7e32ff_v_i32m1_m ( ... ) __riscv_vlseg7e32ff_v_i32m1_tumu(__VA_ARGS__)

◆ vlseg7e32ff_v_i32mf2

#define vlseg7e32ff_v_i32mf2 ( ... ) __riscv_vlseg7e32ff_v_i32mf2(__VA_ARGS__)

◆ vlseg7e32ff_v_i32mf2_m

#define vlseg7e32ff_v_i32mf2_m ( ... ) __riscv_vlseg7e32ff_v_i32mf2_tumu(__VA_ARGS__)

◆ vlseg7e32ff_v_u32m1

#define vlseg7e32ff_v_u32m1 ( ... ) __riscv_vlseg7e32ff_v_u32m1(__VA_ARGS__)

◆ vlseg7e32ff_v_u32m1_m

#define vlseg7e32ff_v_u32m1_m ( ... ) __riscv_vlseg7e32ff_v_u32m1_tumu(__VA_ARGS__)

◆ vlseg7e32ff_v_u32mf2

#define vlseg7e32ff_v_u32mf2 ( ... ) __riscv_vlseg7e32ff_v_u32mf2(__VA_ARGS__)

◆ vlseg7e32ff_v_u32mf2_m

#define vlseg7e32ff_v_u32mf2_m ( ... ) __riscv_vlseg7e32ff_v_u32mf2_tumu(__VA_ARGS__)

◆ vlseg7e64_v_f64m1

#define vlseg7e64_v_f64m1 ( ... ) __riscv_vlseg7e64_v_f64m1(__VA_ARGS__)

◆ vlseg7e64_v_f64m1_m

#define vlseg7e64_v_f64m1_m ( ... ) __riscv_vlseg7e64_v_f64m1_tumu(__VA_ARGS__)

◆ vlseg7e64_v_i64m1

#define vlseg7e64_v_i64m1 ( ... ) __riscv_vlseg7e64_v_i64m1(__VA_ARGS__)

◆ vlseg7e64_v_i64m1_m

#define vlseg7e64_v_i64m1_m ( ... ) __riscv_vlseg7e64_v_i64m1_tumu(__VA_ARGS__)

◆ vlseg7e64_v_u64m1

#define vlseg7e64_v_u64m1 ( ... ) __riscv_vlseg7e64_v_u64m1(__VA_ARGS__)

◆ vlseg7e64_v_u64m1_m

#define vlseg7e64_v_u64m1_m ( ... ) __riscv_vlseg7e64_v_u64m1_tumu(__VA_ARGS__)

◆ vlseg7e64ff_v_f64m1

#define vlseg7e64ff_v_f64m1 ( ... ) __riscv_vlseg7e64ff_v_f64m1(__VA_ARGS__)

◆ vlseg7e64ff_v_f64m1_m

#define vlseg7e64ff_v_f64m1_m ( ... ) __riscv_vlseg7e64ff_v_f64m1_tumu(__VA_ARGS__)

◆ vlseg7e64ff_v_i64m1

#define vlseg7e64ff_v_i64m1 ( ... ) __riscv_vlseg7e64ff_v_i64m1(__VA_ARGS__)

◆ vlseg7e64ff_v_i64m1_m

#define vlseg7e64ff_v_i64m1_m ( ... ) __riscv_vlseg7e64ff_v_i64m1_tumu(__VA_ARGS__)

◆ vlseg7e64ff_v_u64m1

#define vlseg7e64ff_v_u64m1 ( ... ) __riscv_vlseg7e64ff_v_u64m1(__VA_ARGS__)

◆ vlseg7e64ff_v_u64m1_m

#define vlseg7e64ff_v_u64m1_m ( ... ) __riscv_vlseg7e64ff_v_u64m1_tumu(__VA_ARGS__)

◆ vlseg7e8_v_i8m1

#define vlseg7e8_v_i8m1 ( ... ) __riscv_vlseg7e8_v_i8m1(__VA_ARGS__)

◆ vlseg7e8_v_i8m1_m

#define vlseg7e8_v_i8m1_m ( ... ) __riscv_vlseg7e8_v_i8m1_tumu(__VA_ARGS__)

◆ vlseg7e8_v_i8mf2

#define vlseg7e8_v_i8mf2 ( ... ) __riscv_vlseg7e8_v_i8mf2(__VA_ARGS__)

◆ vlseg7e8_v_i8mf2_m

#define vlseg7e8_v_i8mf2_m ( ... ) __riscv_vlseg7e8_v_i8mf2_tumu(__VA_ARGS__)

◆ vlseg7e8_v_i8mf4

#define vlseg7e8_v_i8mf4 ( ... ) __riscv_vlseg7e8_v_i8mf4(__VA_ARGS__)

◆ vlseg7e8_v_i8mf4_m

#define vlseg7e8_v_i8mf4_m ( ... ) __riscv_vlseg7e8_v_i8mf4_tumu(__VA_ARGS__)

◆ vlseg7e8_v_i8mf8

#define vlseg7e8_v_i8mf8 ( ... ) __riscv_vlseg7e8_v_i8mf8(__VA_ARGS__)

◆ vlseg7e8_v_i8mf8_m

#define vlseg7e8_v_i8mf8_m ( ... ) __riscv_vlseg7e8_v_i8mf8_tumu(__VA_ARGS__)

◆ vlseg7e8_v_u8m1

#define vlseg7e8_v_u8m1 ( ... ) __riscv_vlseg7e8_v_u8m1(__VA_ARGS__)

◆ vlseg7e8_v_u8m1_m

#define vlseg7e8_v_u8m1_m ( ... ) __riscv_vlseg7e8_v_u8m1_tumu(__VA_ARGS__)

◆ vlseg7e8_v_u8mf2

#define vlseg7e8_v_u8mf2 ( ... ) __riscv_vlseg7e8_v_u8mf2(__VA_ARGS__)

◆ vlseg7e8_v_u8mf2_m

#define vlseg7e8_v_u8mf2_m ( ... ) __riscv_vlseg7e8_v_u8mf2_tumu(__VA_ARGS__)

◆ vlseg7e8_v_u8mf4

#define vlseg7e8_v_u8mf4 ( ... ) __riscv_vlseg7e8_v_u8mf4(__VA_ARGS__)

◆ vlseg7e8_v_u8mf4_m

#define vlseg7e8_v_u8mf4_m ( ... ) __riscv_vlseg7e8_v_u8mf4_tumu(__VA_ARGS__)

◆ vlseg7e8_v_u8mf8

#define vlseg7e8_v_u8mf8 ( ... ) __riscv_vlseg7e8_v_u8mf8(__VA_ARGS__)

◆ vlseg7e8_v_u8mf8_m

#define vlseg7e8_v_u8mf8_m ( ... ) __riscv_vlseg7e8_v_u8mf8_tumu(__VA_ARGS__)

◆ vlseg7e8ff_v_i8m1

#define vlseg7e8ff_v_i8m1 ( ... ) __riscv_vlseg7e8ff_v_i8m1(__VA_ARGS__)

◆ vlseg7e8ff_v_i8m1_m

#define vlseg7e8ff_v_i8m1_m ( ... ) __riscv_vlseg7e8ff_v_i8m1_tumu(__VA_ARGS__)

◆ vlseg7e8ff_v_i8mf2

#define vlseg7e8ff_v_i8mf2 ( ... ) __riscv_vlseg7e8ff_v_i8mf2(__VA_ARGS__)

◆ vlseg7e8ff_v_i8mf2_m

#define vlseg7e8ff_v_i8mf2_m ( ... ) __riscv_vlseg7e8ff_v_i8mf2_tumu(__VA_ARGS__)

◆ vlseg7e8ff_v_i8mf4

#define vlseg7e8ff_v_i8mf4 ( ... ) __riscv_vlseg7e8ff_v_i8mf4(__VA_ARGS__)

◆ vlseg7e8ff_v_i8mf4_m

#define vlseg7e8ff_v_i8mf4_m ( ... ) __riscv_vlseg7e8ff_v_i8mf4_tumu(__VA_ARGS__)

◆ vlseg7e8ff_v_i8mf8

#define vlseg7e8ff_v_i8mf8 ( ... ) __riscv_vlseg7e8ff_v_i8mf8(__VA_ARGS__)

◆ vlseg7e8ff_v_i8mf8_m

#define vlseg7e8ff_v_i8mf8_m ( ... ) __riscv_vlseg7e8ff_v_i8mf8_tumu(__VA_ARGS__)

◆ vlseg7e8ff_v_u8m1

#define vlseg7e8ff_v_u8m1 ( ... ) __riscv_vlseg7e8ff_v_u8m1(__VA_ARGS__)

◆ vlseg7e8ff_v_u8m1_m

#define vlseg7e8ff_v_u8m1_m ( ... ) __riscv_vlseg7e8ff_v_u8m1_tumu(__VA_ARGS__)

◆ vlseg7e8ff_v_u8mf2

#define vlseg7e8ff_v_u8mf2 ( ... ) __riscv_vlseg7e8ff_v_u8mf2(__VA_ARGS__)

◆ vlseg7e8ff_v_u8mf2_m

#define vlseg7e8ff_v_u8mf2_m ( ... ) __riscv_vlseg7e8ff_v_u8mf2_tumu(__VA_ARGS__)

◆ vlseg7e8ff_v_u8mf4

#define vlseg7e8ff_v_u8mf4 ( ... ) __riscv_vlseg7e8ff_v_u8mf4(__VA_ARGS__)

◆ vlseg7e8ff_v_u8mf4_m

#define vlseg7e8ff_v_u8mf4_m ( ... ) __riscv_vlseg7e8ff_v_u8mf4_tumu(__VA_ARGS__)

◆ vlseg7e8ff_v_u8mf8

#define vlseg7e8ff_v_u8mf8 ( ... ) __riscv_vlseg7e8ff_v_u8mf8(__VA_ARGS__)

◆ vlseg7e8ff_v_u8mf8_m

#define vlseg7e8ff_v_u8mf8_m ( ... ) __riscv_vlseg7e8ff_v_u8mf8_tumu(__VA_ARGS__)

◆ vlseg8e16_v_f16m1

#define vlseg8e16_v_f16m1 ( ... ) __riscv_vlseg8e16_v_f16m1(__VA_ARGS__)

◆ vlseg8e16_v_f16m1_m

#define vlseg8e16_v_f16m1_m ( ... ) __riscv_vlseg8e16_v_f16m1_tumu(__VA_ARGS__)

◆ vlseg8e16_v_f16mf2

#define vlseg8e16_v_f16mf2 ( ... ) __riscv_vlseg8e16_v_f16mf2(__VA_ARGS__)

◆ vlseg8e16_v_f16mf2_m

#define vlseg8e16_v_f16mf2_m ( ... ) __riscv_vlseg8e16_v_f16mf2_tumu(__VA_ARGS__)

◆ vlseg8e16_v_f16mf4

#define vlseg8e16_v_f16mf4 ( ... ) __riscv_vlseg8e16_v_f16mf4(__VA_ARGS__)

◆ vlseg8e16_v_f16mf4_m

#define vlseg8e16_v_f16mf4_m ( ... ) __riscv_vlseg8e16_v_f16mf4_tumu(__VA_ARGS__)

◆ vlseg8e16_v_i16m1

#define vlseg8e16_v_i16m1 ( ... ) __riscv_vlseg8e16_v_i16m1(__VA_ARGS__)

◆ vlseg8e16_v_i16m1_m

#define vlseg8e16_v_i16m1_m ( ... ) __riscv_vlseg8e16_v_i16m1_tumu(__VA_ARGS__)

◆ vlseg8e16_v_i16mf2

#define vlseg8e16_v_i16mf2 ( ... ) __riscv_vlseg8e16_v_i16mf2(__VA_ARGS__)

◆ vlseg8e16_v_i16mf2_m

#define vlseg8e16_v_i16mf2_m ( ... ) __riscv_vlseg8e16_v_i16mf2_tumu(__VA_ARGS__)

◆ vlseg8e16_v_i16mf4

#define vlseg8e16_v_i16mf4 ( ... ) __riscv_vlseg8e16_v_i16mf4(__VA_ARGS__)

◆ vlseg8e16_v_i16mf4_m

#define vlseg8e16_v_i16mf4_m ( ... ) __riscv_vlseg8e16_v_i16mf4_tumu(__VA_ARGS__)

◆ vlseg8e16_v_u16m1

#define vlseg8e16_v_u16m1 ( ... ) __riscv_vlseg8e16_v_u16m1(__VA_ARGS__)

◆ vlseg8e16_v_u16m1_m

#define vlseg8e16_v_u16m1_m ( ... ) __riscv_vlseg8e16_v_u16m1_tumu(__VA_ARGS__)

◆ vlseg8e16_v_u16mf2

#define vlseg8e16_v_u16mf2 ( ... ) __riscv_vlseg8e16_v_u16mf2(__VA_ARGS__)

◆ vlseg8e16_v_u16mf2_m

#define vlseg8e16_v_u16mf2_m ( ... ) __riscv_vlseg8e16_v_u16mf2_tumu(__VA_ARGS__)

◆ vlseg8e16_v_u16mf4

#define vlseg8e16_v_u16mf4 ( ... ) __riscv_vlseg8e16_v_u16mf4(__VA_ARGS__)

◆ vlseg8e16_v_u16mf4_m

#define vlseg8e16_v_u16mf4_m ( ... ) __riscv_vlseg8e16_v_u16mf4_tumu(__VA_ARGS__)

◆ vlseg8e16ff_v_f16m1

#define vlseg8e16ff_v_f16m1 ( ... ) __riscv_vlseg8e16ff_v_f16m1(__VA_ARGS__)

◆ vlseg8e16ff_v_f16m1_m

#define vlseg8e16ff_v_f16m1_m ( ... ) __riscv_vlseg8e16ff_v_f16m1_tumu(__VA_ARGS__)

◆ vlseg8e16ff_v_f16mf2

#define vlseg8e16ff_v_f16mf2 ( ... ) __riscv_vlseg8e16ff_v_f16mf2(__VA_ARGS__)

◆ vlseg8e16ff_v_f16mf2_m

#define vlseg8e16ff_v_f16mf2_m ( ... ) __riscv_vlseg8e16ff_v_f16mf2_tumu(__VA_ARGS__)

◆ vlseg8e16ff_v_f16mf4

#define vlseg8e16ff_v_f16mf4 ( ... ) __riscv_vlseg8e16ff_v_f16mf4(__VA_ARGS__)

◆ vlseg8e16ff_v_f16mf4_m

#define vlseg8e16ff_v_f16mf4_m ( ... ) __riscv_vlseg8e16ff_v_f16mf4_tumu(__VA_ARGS__)

◆ vlseg8e16ff_v_i16m1

#define vlseg8e16ff_v_i16m1 ( ... ) __riscv_vlseg8e16ff_v_i16m1(__VA_ARGS__)

◆ vlseg8e16ff_v_i16m1_m

#define vlseg8e16ff_v_i16m1_m ( ... ) __riscv_vlseg8e16ff_v_i16m1_tumu(__VA_ARGS__)

◆ vlseg8e16ff_v_i16mf2

#define vlseg8e16ff_v_i16mf2 ( ... ) __riscv_vlseg8e16ff_v_i16mf2(__VA_ARGS__)

◆ vlseg8e16ff_v_i16mf2_m

#define vlseg8e16ff_v_i16mf2_m ( ... ) __riscv_vlseg8e16ff_v_i16mf2_tumu(__VA_ARGS__)

◆ vlseg8e16ff_v_i16mf4

#define vlseg8e16ff_v_i16mf4 ( ... ) __riscv_vlseg8e16ff_v_i16mf4(__VA_ARGS__)

◆ vlseg8e16ff_v_i16mf4_m

#define vlseg8e16ff_v_i16mf4_m ( ... ) __riscv_vlseg8e16ff_v_i16mf4_tumu(__VA_ARGS__)

◆ vlseg8e16ff_v_u16m1

#define vlseg8e16ff_v_u16m1 ( ... ) __riscv_vlseg8e16ff_v_u16m1(__VA_ARGS__)

◆ vlseg8e16ff_v_u16m1_m

#define vlseg8e16ff_v_u16m1_m ( ... ) __riscv_vlseg8e16ff_v_u16m1_tumu(__VA_ARGS__)

◆ vlseg8e16ff_v_u16mf2

#define vlseg8e16ff_v_u16mf2 ( ... ) __riscv_vlseg8e16ff_v_u16mf2(__VA_ARGS__)

◆ vlseg8e16ff_v_u16mf2_m

#define vlseg8e16ff_v_u16mf2_m ( ... ) __riscv_vlseg8e16ff_v_u16mf2_tumu(__VA_ARGS__)

◆ vlseg8e16ff_v_u16mf4

#define vlseg8e16ff_v_u16mf4 ( ... ) __riscv_vlseg8e16ff_v_u16mf4(__VA_ARGS__)

◆ vlseg8e16ff_v_u16mf4_m

#define vlseg8e16ff_v_u16mf4_m ( ... ) __riscv_vlseg8e16ff_v_u16mf4_tumu(__VA_ARGS__)

◆ vlseg8e32_v_f32m1

#define vlseg8e32_v_f32m1 ( ... ) __riscv_vlseg8e32_v_f32m1(__VA_ARGS__)

◆ vlseg8e32_v_f32m1_m

#define vlseg8e32_v_f32m1_m ( ... ) __riscv_vlseg8e32_v_f32m1_tumu(__VA_ARGS__)

◆ vlseg8e32_v_f32mf2

#define vlseg8e32_v_f32mf2 ( ... ) __riscv_vlseg8e32_v_f32mf2(__VA_ARGS__)

◆ vlseg8e32_v_f32mf2_m

#define vlseg8e32_v_f32mf2_m ( ... ) __riscv_vlseg8e32_v_f32mf2_tumu(__VA_ARGS__)

◆ vlseg8e32_v_i32m1

#define vlseg8e32_v_i32m1 ( ... ) __riscv_vlseg8e32_v_i32m1(__VA_ARGS__)

◆ vlseg8e32_v_i32m1_m

#define vlseg8e32_v_i32m1_m ( ... ) __riscv_vlseg8e32_v_i32m1_tumu(__VA_ARGS__)

◆ vlseg8e32_v_i32mf2

#define vlseg8e32_v_i32mf2 ( ... ) __riscv_vlseg8e32_v_i32mf2(__VA_ARGS__)

◆ vlseg8e32_v_i32mf2_m

#define vlseg8e32_v_i32mf2_m ( ... ) __riscv_vlseg8e32_v_i32mf2_tumu(__VA_ARGS__)

◆ vlseg8e32_v_u32m1

#define vlseg8e32_v_u32m1 ( ... ) __riscv_vlseg8e32_v_u32m1(__VA_ARGS__)

◆ vlseg8e32_v_u32m1_m

#define vlseg8e32_v_u32m1_m ( ... ) __riscv_vlseg8e32_v_u32m1_tumu(__VA_ARGS__)

◆ vlseg8e32_v_u32mf2

#define vlseg8e32_v_u32mf2 ( ... ) __riscv_vlseg8e32_v_u32mf2(__VA_ARGS__)

◆ vlseg8e32_v_u32mf2_m

#define vlseg8e32_v_u32mf2_m ( ... ) __riscv_vlseg8e32_v_u32mf2_tumu(__VA_ARGS__)

◆ vlseg8e32ff_v_f32m1

#define vlseg8e32ff_v_f32m1 ( ... ) __riscv_vlseg8e32ff_v_f32m1(__VA_ARGS__)

◆ vlseg8e32ff_v_f32m1_m

#define vlseg8e32ff_v_f32m1_m ( ... ) __riscv_vlseg8e32ff_v_f32m1_tumu(__VA_ARGS__)

◆ vlseg8e32ff_v_f32mf2

#define vlseg8e32ff_v_f32mf2 ( ... ) __riscv_vlseg8e32ff_v_f32mf2(__VA_ARGS__)

◆ vlseg8e32ff_v_f32mf2_m

#define vlseg8e32ff_v_f32mf2_m ( ... ) __riscv_vlseg8e32ff_v_f32mf2_tumu(__VA_ARGS__)

◆ vlseg8e32ff_v_i32m1

#define vlseg8e32ff_v_i32m1 ( ... ) __riscv_vlseg8e32ff_v_i32m1(__VA_ARGS__)

◆ vlseg8e32ff_v_i32m1_m

#define vlseg8e32ff_v_i32m1_m ( ... ) __riscv_vlseg8e32ff_v_i32m1_tumu(__VA_ARGS__)

◆ vlseg8e32ff_v_i32mf2

#define vlseg8e32ff_v_i32mf2 ( ... ) __riscv_vlseg8e32ff_v_i32mf2(__VA_ARGS__)

◆ vlseg8e32ff_v_i32mf2_m

#define vlseg8e32ff_v_i32mf2_m ( ... ) __riscv_vlseg8e32ff_v_i32mf2_tumu(__VA_ARGS__)

◆ vlseg8e32ff_v_u32m1

#define vlseg8e32ff_v_u32m1 ( ... ) __riscv_vlseg8e32ff_v_u32m1(__VA_ARGS__)

◆ vlseg8e32ff_v_u32m1_m

#define vlseg8e32ff_v_u32m1_m ( ... ) __riscv_vlseg8e32ff_v_u32m1_tumu(__VA_ARGS__)

◆ vlseg8e32ff_v_u32mf2

#define vlseg8e32ff_v_u32mf2 ( ... ) __riscv_vlseg8e32ff_v_u32mf2(__VA_ARGS__)

◆ vlseg8e32ff_v_u32mf2_m

#define vlseg8e32ff_v_u32mf2_m ( ... ) __riscv_vlseg8e32ff_v_u32mf2_tumu(__VA_ARGS__)

◆ vlseg8e64_v_f64m1

#define vlseg8e64_v_f64m1 ( ... ) __riscv_vlseg8e64_v_f64m1(__VA_ARGS__)

◆ vlseg8e64_v_f64m1_m

#define vlseg8e64_v_f64m1_m ( ... ) __riscv_vlseg8e64_v_f64m1_tumu(__VA_ARGS__)

◆ vlseg8e64_v_i64m1

#define vlseg8e64_v_i64m1 ( ... ) __riscv_vlseg8e64_v_i64m1(__VA_ARGS__)

◆ vlseg8e64_v_i64m1_m

#define vlseg8e64_v_i64m1_m ( ... ) __riscv_vlseg8e64_v_i64m1_tumu(__VA_ARGS__)

◆ vlseg8e64_v_u64m1

#define vlseg8e64_v_u64m1 ( ... ) __riscv_vlseg8e64_v_u64m1(__VA_ARGS__)

◆ vlseg8e64_v_u64m1_m

#define vlseg8e64_v_u64m1_m ( ... ) __riscv_vlseg8e64_v_u64m1_tumu(__VA_ARGS__)

◆ vlseg8e64ff_v_f64m1

#define vlseg8e64ff_v_f64m1 ( ... ) __riscv_vlseg8e64ff_v_f64m1(__VA_ARGS__)

◆ vlseg8e64ff_v_f64m1_m

#define vlseg8e64ff_v_f64m1_m ( ... ) __riscv_vlseg8e64ff_v_f64m1_tumu(__VA_ARGS__)

◆ vlseg8e64ff_v_i64m1

#define vlseg8e64ff_v_i64m1 ( ... ) __riscv_vlseg8e64ff_v_i64m1(__VA_ARGS__)

◆ vlseg8e64ff_v_i64m1_m

#define vlseg8e64ff_v_i64m1_m ( ... ) __riscv_vlseg8e64ff_v_i64m1_tumu(__VA_ARGS__)

◆ vlseg8e64ff_v_u64m1

#define vlseg8e64ff_v_u64m1 ( ... ) __riscv_vlseg8e64ff_v_u64m1(__VA_ARGS__)

◆ vlseg8e64ff_v_u64m1_m

#define vlseg8e64ff_v_u64m1_m ( ... ) __riscv_vlseg8e64ff_v_u64m1_tumu(__VA_ARGS__)

◆ vlseg8e8_v_i8m1

#define vlseg8e8_v_i8m1 ( ... ) __riscv_vlseg8e8_v_i8m1(__VA_ARGS__)

◆ vlseg8e8_v_i8m1_m

#define vlseg8e8_v_i8m1_m ( ... ) __riscv_vlseg8e8_v_i8m1_tumu(__VA_ARGS__)

◆ vlseg8e8_v_i8mf2

#define vlseg8e8_v_i8mf2 ( ... ) __riscv_vlseg8e8_v_i8mf2(__VA_ARGS__)

◆ vlseg8e8_v_i8mf2_m

#define vlseg8e8_v_i8mf2_m ( ... ) __riscv_vlseg8e8_v_i8mf2_tumu(__VA_ARGS__)

◆ vlseg8e8_v_i8mf4

#define vlseg8e8_v_i8mf4 ( ... ) __riscv_vlseg8e8_v_i8mf4(__VA_ARGS__)

◆ vlseg8e8_v_i8mf4_m

#define vlseg8e8_v_i8mf4_m ( ... ) __riscv_vlseg8e8_v_i8mf4_tumu(__VA_ARGS__)

◆ vlseg8e8_v_i8mf8

#define vlseg8e8_v_i8mf8 ( ... ) __riscv_vlseg8e8_v_i8mf8(__VA_ARGS__)

◆ vlseg8e8_v_i8mf8_m

#define vlseg8e8_v_i8mf8_m ( ... ) __riscv_vlseg8e8_v_i8mf8_tumu(__VA_ARGS__)

◆ vlseg8e8_v_u8m1

#define vlseg8e8_v_u8m1 ( ... ) __riscv_vlseg8e8_v_u8m1(__VA_ARGS__)

◆ vlseg8e8_v_u8m1_m

#define vlseg8e8_v_u8m1_m ( ... ) __riscv_vlseg8e8_v_u8m1_tumu(__VA_ARGS__)

◆ vlseg8e8_v_u8mf2

#define vlseg8e8_v_u8mf2 ( ... ) __riscv_vlseg8e8_v_u8mf2(__VA_ARGS__)

◆ vlseg8e8_v_u8mf2_m

#define vlseg8e8_v_u8mf2_m ( ... ) __riscv_vlseg8e8_v_u8mf2_tumu(__VA_ARGS__)

◆ vlseg8e8_v_u8mf4

#define vlseg8e8_v_u8mf4 ( ... ) __riscv_vlseg8e8_v_u8mf4(__VA_ARGS__)

◆ vlseg8e8_v_u8mf4_m

#define vlseg8e8_v_u8mf4_m ( ... ) __riscv_vlseg8e8_v_u8mf4_tumu(__VA_ARGS__)

◆ vlseg8e8_v_u8mf8

#define vlseg8e8_v_u8mf8 ( ... ) __riscv_vlseg8e8_v_u8mf8(__VA_ARGS__)

◆ vlseg8e8_v_u8mf8_m

#define vlseg8e8_v_u8mf8_m ( ... ) __riscv_vlseg8e8_v_u8mf8_tumu(__VA_ARGS__)

◆ vlseg8e8ff_v_i8m1

#define vlseg8e8ff_v_i8m1 ( ... ) __riscv_vlseg8e8ff_v_i8m1(__VA_ARGS__)

◆ vlseg8e8ff_v_i8m1_m

#define vlseg8e8ff_v_i8m1_m ( ... ) __riscv_vlseg8e8ff_v_i8m1_tumu(__VA_ARGS__)

◆ vlseg8e8ff_v_i8mf2

#define vlseg8e8ff_v_i8mf2 ( ... ) __riscv_vlseg8e8ff_v_i8mf2(__VA_ARGS__)

◆ vlseg8e8ff_v_i8mf2_m

#define vlseg8e8ff_v_i8mf2_m ( ... ) __riscv_vlseg8e8ff_v_i8mf2_tumu(__VA_ARGS__)

◆ vlseg8e8ff_v_i8mf4

#define vlseg8e8ff_v_i8mf4 ( ... ) __riscv_vlseg8e8ff_v_i8mf4(__VA_ARGS__)

◆ vlseg8e8ff_v_i8mf4_m

#define vlseg8e8ff_v_i8mf4_m ( ... ) __riscv_vlseg8e8ff_v_i8mf4_tumu(__VA_ARGS__)

◆ vlseg8e8ff_v_i8mf8

#define vlseg8e8ff_v_i8mf8 ( ... ) __riscv_vlseg8e8ff_v_i8mf8(__VA_ARGS__)

◆ vlseg8e8ff_v_i8mf8_m

#define vlseg8e8ff_v_i8mf8_m ( ... ) __riscv_vlseg8e8ff_v_i8mf8_tumu(__VA_ARGS__)

◆ vlseg8e8ff_v_u8m1

#define vlseg8e8ff_v_u8m1 ( ... ) __riscv_vlseg8e8ff_v_u8m1(__VA_ARGS__)

◆ vlseg8e8ff_v_u8m1_m

#define vlseg8e8ff_v_u8m1_m ( ... ) __riscv_vlseg8e8ff_v_u8m1_tumu(__VA_ARGS__)

◆ vlseg8e8ff_v_u8mf2

#define vlseg8e8ff_v_u8mf2 ( ... ) __riscv_vlseg8e8ff_v_u8mf2(__VA_ARGS__)

◆ vlseg8e8ff_v_u8mf2_m

#define vlseg8e8ff_v_u8mf2_m ( ... ) __riscv_vlseg8e8ff_v_u8mf2_tumu(__VA_ARGS__)

◆ vlseg8e8ff_v_u8mf4

#define vlseg8e8ff_v_u8mf4 ( ... ) __riscv_vlseg8e8ff_v_u8mf4(__VA_ARGS__)

◆ vlseg8e8ff_v_u8mf4_m

#define vlseg8e8ff_v_u8mf4_m ( ... ) __riscv_vlseg8e8ff_v_u8mf4_tumu(__VA_ARGS__)

◆ vlseg8e8ff_v_u8mf8

#define vlseg8e8ff_v_u8mf8 ( ... ) __riscv_vlseg8e8ff_v_u8mf8(__VA_ARGS__)

◆ vlseg8e8ff_v_u8mf8_m

#define vlseg8e8ff_v_u8mf8_m ( ... ) __riscv_vlseg8e8ff_v_u8mf8_tumu(__VA_ARGS__)

◆ vlsseg2e16_v_f16m1

#define vlsseg2e16_v_f16m1 ( ... ) __riscv_vlsseg2e16_v_f16m1(__VA_ARGS__)

◆ vlsseg2e16_v_f16m1_m

#define vlsseg2e16_v_f16m1_m ( ... ) __riscv_vlsseg2e16_v_f16m1_tumu(__VA_ARGS__)

◆ vlsseg2e16_v_f16m2

#define vlsseg2e16_v_f16m2 ( ... ) __riscv_vlsseg2e16_v_f16m2(__VA_ARGS__)

◆ vlsseg2e16_v_f16m2_m

#define vlsseg2e16_v_f16m2_m ( ... ) __riscv_vlsseg2e16_v_f16m2_tumu(__VA_ARGS__)

◆ vlsseg2e16_v_f16m4

#define vlsseg2e16_v_f16m4 ( ... ) __riscv_vlsseg2e16_v_f16m4(__VA_ARGS__)

◆ vlsseg2e16_v_f16m4_m

#define vlsseg2e16_v_f16m4_m ( ... ) __riscv_vlsseg2e16_v_f16m4_tumu(__VA_ARGS__)

◆ vlsseg2e16_v_f16mf2

#define vlsseg2e16_v_f16mf2 ( ... ) __riscv_vlsseg2e16_v_f16mf2(__VA_ARGS__)

◆ vlsseg2e16_v_f16mf2_m

#define vlsseg2e16_v_f16mf2_m ( ... ) __riscv_vlsseg2e16_v_f16mf2_tumu(__VA_ARGS__)

◆ vlsseg2e16_v_f16mf4

#define vlsseg2e16_v_f16mf4 ( ... ) __riscv_vlsseg2e16_v_f16mf4(__VA_ARGS__)

◆ vlsseg2e16_v_f16mf4_m

#define vlsseg2e16_v_f16mf4_m ( ... ) __riscv_vlsseg2e16_v_f16mf4_tumu(__VA_ARGS__)

◆ vlsseg2e16_v_i16m1

#define vlsseg2e16_v_i16m1 ( ... ) __riscv_vlsseg2e16_v_i16m1(__VA_ARGS__)

◆ vlsseg2e16_v_i16m1_m

#define vlsseg2e16_v_i16m1_m ( ... ) __riscv_vlsseg2e16_v_i16m1_tumu(__VA_ARGS__)

◆ vlsseg2e16_v_i16m2

#define vlsseg2e16_v_i16m2 ( ... ) __riscv_vlsseg2e16_v_i16m2(__VA_ARGS__)

◆ vlsseg2e16_v_i16m2_m

#define vlsseg2e16_v_i16m2_m ( ... ) __riscv_vlsseg2e16_v_i16m2_tumu(__VA_ARGS__)

◆ vlsseg2e16_v_i16m4

#define vlsseg2e16_v_i16m4 ( ... ) __riscv_vlsseg2e16_v_i16m4(__VA_ARGS__)

◆ vlsseg2e16_v_i16m4_m

#define vlsseg2e16_v_i16m4_m ( ... ) __riscv_vlsseg2e16_v_i16m4_tumu(__VA_ARGS__)

◆ vlsseg2e16_v_i16mf2

#define vlsseg2e16_v_i16mf2 ( ... ) __riscv_vlsseg2e16_v_i16mf2(__VA_ARGS__)

◆ vlsseg2e16_v_i16mf2_m

#define vlsseg2e16_v_i16mf2_m ( ... ) __riscv_vlsseg2e16_v_i16mf2_tumu(__VA_ARGS__)

◆ vlsseg2e16_v_i16mf4

#define vlsseg2e16_v_i16mf4 ( ... ) __riscv_vlsseg2e16_v_i16mf4(__VA_ARGS__)

◆ vlsseg2e16_v_i16mf4_m

#define vlsseg2e16_v_i16mf4_m ( ... ) __riscv_vlsseg2e16_v_i16mf4_tumu(__VA_ARGS__)

◆ vlsseg2e16_v_u16m1

#define vlsseg2e16_v_u16m1 ( ... ) __riscv_vlsseg2e16_v_u16m1(__VA_ARGS__)

◆ vlsseg2e16_v_u16m1_m

#define vlsseg2e16_v_u16m1_m ( ... ) __riscv_vlsseg2e16_v_u16m1_tumu(__VA_ARGS__)

◆ vlsseg2e16_v_u16m2

#define vlsseg2e16_v_u16m2 ( ... ) __riscv_vlsseg2e16_v_u16m2(__VA_ARGS__)

◆ vlsseg2e16_v_u16m2_m

#define vlsseg2e16_v_u16m2_m ( ... ) __riscv_vlsseg2e16_v_u16m2_tumu(__VA_ARGS__)

◆ vlsseg2e16_v_u16m4

#define vlsseg2e16_v_u16m4 ( ... ) __riscv_vlsseg2e16_v_u16m4(__VA_ARGS__)

◆ vlsseg2e16_v_u16m4_m

#define vlsseg2e16_v_u16m4_m ( ... ) __riscv_vlsseg2e16_v_u16m4_tumu(__VA_ARGS__)

◆ vlsseg2e16_v_u16mf2

#define vlsseg2e16_v_u16mf2 ( ... ) __riscv_vlsseg2e16_v_u16mf2(__VA_ARGS__)

◆ vlsseg2e16_v_u16mf2_m

#define vlsseg2e16_v_u16mf2_m ( ... ) __riscv_vlsseg2e16_v_u16mf2_tumu(__VA_ARGS__)

◆ vlsseg2e16_v_u16mf4

#define vlsseg2e16_v_u16mf4 ( ... ) __riscv_vlsseg2e16_v_u16mf4(__VA_ARGS__)

◆ vlsseg2e16_v_u16mf4_m

#define vlsseg2e16_v_u16mf4_m ( ... ) __riscv_vlsseg2e16_v_u16mf4_tumu(__VA_ARGS__)

◆ vlsseg2e32_v_f32m1

#define vlsseg2e32_v_f32m1 ( ... ) __riscv_vlsseg2e32_v_f32m1(__VA_ARGS__)

◆ vlsseg2e32_v_f32m1_m

#define vlsseg2e32_v_f32m1_m ( ... ) __riscv_vlsseg2e32_v_f32m1_tumu(__VA_ARGS__)

◆ vlsseg2e32_v_f32m2

#define vlsseg2e32_v_f32m2 ( ... ) __riscv_vlsseg2e32_v_f32m2(__VA_ARGS__)

◆ vlsseg2e32_v_f32m2_m

#define vlsseg2e32_v_f32m2_m ( ... ) __riscv_vlsseg2e32_v_f32m2_tumu(__VA_ARGS__)

◆ vlsseg2e32_v_f32m4

#define vlsseg2e32_v_f32m4 ( ... ) __riscv_vlsseg2e32_v_f32m4(__VA_ARGS__)

◆ vlsseg2e32_v_f32m4_m

#define vlsseg2e32_v_f32m4_m ( ... ) __riscv_vlsseg2e32_v_f32m4_tumu(__VA_ARGS__)

◆ vlsseg2e32_v_f32mf2

#define vlsseg2e32_v_f32mf2 ( ... ) __riscv_vlsseg2e32_v_f32mf2(__VA_ARGS__)

◆ vlsseg2e32_v_f32mf2_m

#define vlsseg2e32_v_f32mf2_m ( ... ) __riscv_vlsseg2e32_v_f32mf2_tumu(__VA_ARGS__)

◆ vlsseg2e32_v_i32m1

#define vlsseg2e32_v_i32m1 ( ... ) __riscv_vlsseg2e32_v_i32m1(__VA_ARGS__)

◆ vlsseg2e32_v_i32m1_m

#define vlsseg2e32_v_i32m1_m ( ... ) __riscv_vlsseg2e32_v_i32m1_tumu(__VA_ARGS__)

◆ vlsseg2e32_v_i32m2

#define vlsseg2e32_v_i32m2 ( ... ) __riscv_vlsseg2e32_v_i32m2(__VA_ARGS__)

◆ vlsseg2e32_v_i32m2_m

#define vlsseg2e32_v_i32m2_m ( ... ) __riscv_vlsseg2e32_v_i32m2_tumu(__VA_ARGS__)

◆ vlsseg2e32_v_i32m4

#define vlsseg2e32_v_i32m4 ( ... ) __riscv_vlsseg2e32_v_i32m4(__VA_ARGS__)

◆ vlsseg2e32_v_i32m4_m

#define vlsseg2e32_v_i32m4_m ( ... ) __riscv_vlsseg2e32_v_i32m4_tumu(__VA_ARGS__)

◆ vlsseg2e32_v_i32mf2

#define vlsseg2e32_v_i32mf2 ( ... ) __riscv_vlsseg2e32_v_i32mf2(__VA_ARGS__)

◆ vlsseg2e32_v_i32mf2_m

#define vlsseg2e32_v_i32mf2_m ( ... ) __riscv_vlsseg2e32_v_i32mf2_tumu(__VA_ARGS__)

◆ vlsseg2e32_v_u32m1

#define vlsseg2e32_v_u32m1 ( ... ) __riscv_vlsseg2e32_v_u32m1(__VA_ARGS__)

◆ vlsseg2e32_v_u32m1_m

#define vlsseg2e32_v_u32m1_m ( ... ) __riscv_vlsseg2e32_v_u32m1_tumu(__VA_ARGS__)

◆ vlsseg2e32_v_u32m2

#define vlsseg2e32_v_u32m2 ( ... ) __riscv_vlsseg2e32_v_u32m2(__VA_ARGS__)

◆ vlsseg2e32_v_u32m2_m

#define vlsseg2e32_v_u32m2_m ( ... ) __riscv_vlsseg2e32_v_u32m2_tumu(__VA_ARGS__)

◆ vlsseg2e32_v_u32m4

#define vlsseg2e32_v_u32m4 ( ... ) __riscv_vlsseg2e32_v_u32m4(__VA_ARGS__)

◆ vlsseg2e32_v_u32m4_m

#define vlsseg2e32_v_u32m4_m ( ... ) __riscv_vlsseg2e32_v_u32m4_tumu(__VA_ARGS__)

◆ vlsseg2e32_v_u32mf2

#define vlsseg2e32_v_u32mf2 ( ... ) __riscv_vlsseg2e32_v_u32mf2(__VA_ARGS__)

◆ vlsseg2e32_v_u32mf2_m

#define vlsseg2e32_v_u32mf2_m ( ... ) __riscv_vlsseg2e32_v_u32mf2_tumu(__VA_ARGS__)

◆ vlsseg2e64_v_f64m1

#define vlsseg2e64_v_f64m1 ( ... ) __riscv_vlsseg2e64_v_f64m1(__VA_ARGS__)

◆ vlsseg2e64_v_f64m1_m

#define vlsseg2e64_v_f64m1_m ( ... ) __riscv_vlsseg2e64_v_f64m1_tumu(__VA_ARGS__)

◆ vlsseg2e64_v_f64m2

#define vlsseg2e64_v_f64m2 ( ... ) __riscv_vlsseg2e64_v_f64m2(__VA_ARGS__)

◆ vlsseg2e64_v_f64m2_m

#define vlsseg2e64_v_f64m2_m ( ... ) __riscv_vlsseg2e64_v_f64m2_tumu(__VA_ARGS__)

◆ vlsseg2e64_v_f64m4

#define vlsseg2e64_v_f64m4 ( ... ) __riscv_vlsseg2e64_v_f64m4(__VA_ARGS__)

◆ vlsseg2e64_v_f64m4_m

#define vlsseg2e64_v_f64m4_m ( ... ) __riscv_vlsseg2e64_v_f64m4_tumu(__VA_ARGS__)

◆ vlsseg2e64_v_i64m1

#define vlsseg2e64_v_i64m1 ( ... ) __riscv_vlsseg2e64_v_i64m1(__VA_ARGS__)

◆ vlsseg2e64_v_i64m1_m

#define vlsseg2e64_v_i64m1_m ( ... ) __riscv_vlsseg2e64_v_i64m1_tumu(__VA_ARGS__)

◆ vlsseg2e64_v_i64m2

#define vlsseg2e64_v_i64m2 ( ... ) __riscv_vlsseg2e64_v_i64m2(__VA_ARGS__)

◆ vlsseg2e64_v_i64m2_m

#define vlsseg2e64_v_i64m2_m ( ... ) __riscv_vlsseg2e64_v_i64m2_tumu(__VA_ARGS__)

◆ vlsseg2e64_v_i64m4

#define vlsseg2e64_v_i64m4 ( ... ) __riscv_vlsseg2e64_v_i64m4(__VA_ARGS__)

◆ vlsseg2e64_v_i64m4_m

#define vlsseg2e64_v_i64m4_m ( ... ) __riscv_vlsseg2e64_v_i64m4_tumu(__VA_ARGS__)

◆ vlsseg2e64_v_u64m1

#define vlsseg2e64_v_u64m1 ( ... ) __riscv_vlsseg2e64_v_u64m1(__VA_ARGS__)

◆ vlsseg2e64_v_u64m1_m

#define vlsseg2e64_v_u64m1_m ( ... ) __riscv_vlsseg2e64_v_u64m1_tumu(__VA_ARGS__)

◆ vlsseg2e64_v_u64m2

#define vlsseg2e64_v_u64m2 ( ... ) __riscv_vlsseg2e64_v_u64m2(__VA_ARGS__)

◆ vlsseg2e64_v_u64m2_m

#define vlsseg2e64_v_u64m2_m ( ... ) __riscv_vlsseg2e64_v_u64m2_tumu(__VA_ARGS__)

◆ vlsseg2e64_v_u64m4

#define vlsseg2e64_v_u64m4 ( ... ) __riscv_vlsseg2e64_v_u64m4(__VA_ARGS__)

◆ vlsseg2e64_v_u64m4_m

#define vlsseg2e64_v_u64m4_m ( ... ) __riscv_vlsseg2e64_v_u64m4_tumu(__VA_ARGS__)

◆ vlsseg2e8_v_i8m1

#define vlsseg2e8_v_i8m1 ( ... ) __riscv_vlsseg2e8_v_i8m1(__VA_ARGS__)

◆ vlsseg2e8_v_i8m1_m

#define vlsseg2e8_v_i8m1_m ( ... ) __riscv_vlsseg2e8_v_i8m1_tumu(__VA_ARGS__)

◆ vlsseg2e8_v_i8m2

#define vlsseg2e8_v_i8m2 ( ... ) __riscv_vlsseg2e8_v_i8m2(__VA_ARGS__)

◆ vlsseg2e8_v_i8m2_m

#define vlsseg2e8_v_i8m2_m ( ... ) __riscv_vlsseg2e8_v_i8m2_tumu(__VA_ARGS__)

◆ vlsseg2e8_v_i8m4

#define vlsseg2e8_v_i8m4 ( ... ) __riscv_vlsseg2e8_v_i8m4(__VA_ARGS__)

◆ vlsseg2e8_v_i8m4_m

#define vlsseg2e8_v_i8m4_m ( ... ) __riscv_vlsseg2e8_v_i8m4_tumu(__VA_ARGS__)

◆ vlsseg2e8_v_i8mf2

#define vlsseg2e8_v_i8mf2 ( ... ) __riscv_vlsseg2e8_v_i8mf2(__VA_ARGS__)

◆ vlsseg2e8_v_i8mf2_m

#define vlsseg2e8_v_i8mf2_m ( ... ) __riscv_vlsseg2e8_v_i8mf2_tumu(__VA_ARGS__)

◆ vlsseg2e8_v_i8mf4

#define vlsseg2e8_v_i8mf4 ( ... ) __riscv_vlsseg2e8_v_i8mf4(__VA_ARGS__)

◆ vlsseg2e8_v_i8mf4_m

#define vlsseg2e8_v_i8mf4_m ( ... ) __riscv_vlsseg2e8_v_i8mf4_tumu(__VA_ARGS__)

◆ vlsseg2e8_v_i8mf8

#define vlsseg2e8_v_i8mf8 ( ... ) __riscv_vlsseg2e8_v_i8mf8(__VA_ARGS__)

◆ vlsseg2e8_v_i8mf8_m

#define vlsseg2e8_v_i8mf8_m ( ... ) __riscv_vlsseg2e8_v_i8mf8_tumu(__VA_ARGS__)

◆ vlsseg2e8_v_u8m1

#define vlsseg2e8_v_u8m1 ( ... ) __riscv_vlsseg2e8_v_u8m1(__VA_ARGS__)

◆ vlsseg2e8_v_u8m1_m

#define vlsseg2e8_v_u8m1_m ( ... ) __riscv_vlsseg2e8_v_u8m1_tumu(__VA_ARGS__)

◆ vlsseg2e8_v_u8m2

#define vlsseg2e8_v_u8m2 ( ... ) __riscv_vlsseg2e8_v_u8m2(__VA_ARGS__)

◆ vlsseg2e8_v_u8m2_m

#define vlsseg2e8_v_u8m2_m ( ... ) __riscv_vlsseg2e8_v_u8m2_tumu(__VA_ARGS__)

◆ vlsseg2e8_v_u8m4

#define vlsseg2e8_v_u8m4 ( ... ) __riscv_vlsseg2e8_v_u8m4(__VA_ARGS__)

◆ vlsseg2e8_v_u8m4_m

#define vlsseg2e8_v_u8m4_m ( ... ) __riscv_vlsseg2e8_v_u8m4_tumu(__VA_ARGS__)

◆ vlsseg2e8_v_u8mf2

#define vlsseg2e8_v_u8mf2 ( ... ) __riscv_vlsseg2e8_v_u8mf2(__VA_ARGS__)

◆ vlsseg2e8_v_u8mf2_m

#define vlsseg2e8_v_u8mf2_m ( ... ) __riscv_vlsseg2e8_v_u8mf2_tumu(__VA_ARGS__)

◆ vlsseg2e8_v_u8mf4

#define vlsseg2e8_v_u8mf4 ( ... ) __riscv_vlsseg2e8_v_u8mf4(__VA_ARGS__)

◆ vlsseg2e8_v_u8mf4_m

#define vlsseg2e8_v_u8mf4_m ( ... ) __riscv_vlsseg2e8_v_u8mf4_tumu(__VA_ARGS__)

◆ vlsseg2e8_v_u8mf8

#define vlsseg2e8_v_u8mf8 ( ... ) __riscv_vlsseg2e8_v_u8mf8(__VA_ARGS__)

◆ vlsseg2e8_v_u8mf8_m

#define vlsseg2e8_v_u8mf8_m ( ... ) __riscv_vlsseg2e8_v_u8mf8_tumu(__VA_ARGS__)

◆ vlsseg3e16_v_f16m1

#define vlsseg3e16_v_f16m1 ( ... ) __riscv_vlsseg3e16_v_f16m1(__VA_ARGS__)

◆ vlsseg3e16_v_f16m1_m

#define vlsseg3e16_v_f16m1_m ( ... ) __riscv_vlsseg3e16_v_f16m1_tumu(__VA_ARGS__)

◆ vlsseg3e16_v_f16m2

#define vlsseg3e16_v_f16m2 ( ... ) __riscv_vlsseg3e16_v_f16m2(__VA_ARGS__)

◆ vlsseg3e16_v_f16m2_m

#define vlsseg3e16_v_f16m2_m ( ... ) __riscv_vlsseg3e16_v_f16m2_tumu(__VA_ARGS__)

◆ vlsseg3e16_v_f16mf2

#define vlsseg3e16_v_f16mf2 ( ... ) __riscv_vlsseg3e16_v_f16mf2(__VA_ARGS__)

◆ vlsseg3e16_v_f16mf2_m

#define vlsseg3e16_v_f16mf2_m ( ... ) __riscv_vlsseg3e16_v_f16mf2_tumu(__VA_ARGS__)

◆ vlsseg3e16_v_f16mf4

#define vlsseg3e16_v_f16mf4 ( ... ) __riscv_vlsseg3e16_v_f16mf4(__VA_ARGS__)

◆ vlsseg3e16_v_f16mf4_m

#define vlsseg3e16_v_f16mf4_m ( ... ) __riscv_vlsseg3e16_v_f16mf4_tumu(__VA_ARGS__)

◆ vlsseg3e16_v_i16m1

#define vlsseg3e16_v_i16m1 ( ... ) __riscv_vlsseg3e16_v_i16m1(__VA_ARGS__)

◆ vlsseg3e16_v_i16m1_m

#define vlsseg3e16_v_i16m1_m ( ... ) __riscv_vlsseg3e16_v_i16m1_tumu(__VA_ARGS__)

◆ vlsseg3e16_v_i16m2

#define vlsseg3e16_v_i16m2 ( ... ) __riscv_vlsseg3e16_v_i16m2(__VA_ARGS__)

◆ vlsseg3e16_v_i16m2_m

#define vlsseg3e16_v_i16m2_m ( ... ) __riscv_vlsseg3e16_v_i16m2_tumu(__VA_ARGS__)

◆ vlsseg3e16_v_i16mf2

#define vlsseg3e16_v_i16mf2 ( ... ) __riscv_vlsseg3e16_v_i16mf2(__VA_ARGS__)

◆ vlsseg3e16_v_i16mf2_m

#define vlsseg3e16_v_i16mf2_m ( ... ) __riscv_vlsseg3e16_v_i16mf2_tumu(__VA_ARGS__)

◆ vlsseg3e16_v_i16mf4

#define vlsseg3e16_v_i16mf4 ( ... ) __riscv_vlsseg3e16_v_i16mf4(__VA_ARGS__)

◆ vlsseg3e16_v_i16mf4_m

#define vlsseg3e16_v_i16mf4_m ( ... ) __riscv_vlsseg3e16_v_i16mf4_tumu(__VA_ARGS__)

◆ vlsseg3e16_v_u16m1

#define vlsseg3e16_v_u16m1 ( ... ) __riscv_vlsseg3e16_v_u16m1(__VA_ARGS__)

◆ vlsseg3e16_v_u16m1_m

#define vlsseg3e16_v_u16m1_m ( ... ) __riscv_vlsseg3e16_v_u16m1_tumu(__VA_ARGS__)

◆ vlsseg3e16_v_u16m2

#define vlsseg3e16_v_u16m2 ( ... ) __riscv_vlsseg3e16_v_u16m2(__VA_ARGS__)

◆ vlsseg3e16_v_u16m2_m

#define vlsseg3e16_v_u16m2_m ( ... ) __riscv_vlsseg3e16_v_u16m2_tumu(__VA_ARGS__)

◆ vlsseg3e16_v_u16mf2

#define vlsseg3e16_v_u16mf2 ( ... ) __riscv_vlsseg3e16_v_u16mf2(__VA_ARGS__)

◆ vlsseg3e16_v_u16mf2_m

#define vlsseg3e16_v_u16mf2_m ( ... ) __riscv_vlsseg3e16_v_u16mf2_tumu(__VA_ARGS__)

◆ vlsseg3e16_v_u16mf4

#define vlsseg3e16_v_u16mf4 ( ... ) __riscv_vlsseg3e16_v_u16mf4(__VA_ARGS__)

◆ vlsseg3e16_v_u16mf4_m

#define vlsseg3e16_v_u16mf4_m ( ... ) __riscv_vlsseg3e16_v_u16mf4_tumu(__VA_ARGS__)

◆ vlsseg3e32_v_f32m1

#define vlsseg3e32_v_f32m1 ( ... ) __riscv_vlsseg3e32_v_f32m1(__VA_ARGS__)

◆ vlsseg3e32_v_f32m1_m

#define vlsseg3e32_v_f32m1_m ( ... ) __riscv_vlsseg3e32_v_f32m1_tumu(__VA_ARGS__)

◆ vlsseg3e32_v_f32m2

#define vlsseg3e32_v_f32m2 ( ... ) __riscv_vlsseg3e32_v_f32m2(__VA_ARGS__)

◆ vlsseg3e32_v_f32m2_m

#define vlsseg3e32_v_f32m2_m ( ... ) __riscv_vlsseg3e32_v_f32m2_tumu(__VA_ARGS__)

◆ vlsseg3e32_v_f32mf2

#define vlsseg3e32_v_f32mf2 ( ... ) __riscv_vlsseg3e32_v_f32mf2(__VA_ARGS__)

◆ vlsseg3e32_v_f32mf2_m

#define vlsseg3e32_v_f32mf2_m ( ... ) __riscv_vlsseg3e32_v_f32mf2_tumu(__VA_ARGS__)

◆ vlsseg3e32_v_i32m1

#define vlsseg3e32_v_i32m1 ( ... ) __riscv_vlsseg3e32_v_i32m1(__VA_ARGS__)

◆ vlsseg3e32_v_i32m1_m

#define vlsseg3e32_v_i32m1_m ( ... ) __riscv_vlsseg3e32_v_i32m1_tumu(__VA_ARGS__)

◆ vlsseg3e32_v_i32m2

#define vlsseg3e32_v_i32m2 ( ... ) __riscv_vlsseg3e32_v_i32m2(__VA_ARGS__)

◆ vlsseg3e32_v_i32m2_m

#define vlsseg3e32_v_i32m2_m ( ... ) __riscv_vlsseg3e32_v_i32m2_tumu(__VA_ARGS__)

◆ vlsseg3e32_v_i32mf2

#define vlsseg3e32_v_i32mf2 ( ... ) __riscv_vlsseg3e32_v_i32mf2(__VA_ARGS__)

◆ vlsseg3e32_v_i32mf2_m

#define vlsseg3e32_v_i32mf2_m ( ... ) __riscv_vlsseg3e32_v_i32mf2_tumu(__VA_ARGS__)

◆ vlsseg3e32_v_u32m1

#define vlsseg3e32_v_u32m1 ( ... ) __riscv_vlsseg3e32_v_u32m1(__VA_ARGS__)

◆ vlsseg3e32_v_u32m1_m

#define vlsseg3e32_v_u32m1_m ( ... ) __riscv_vlsseg3e32_v_u32m1_tumu(__VA_ARGS__)

◆ vlsseg3e32_v_u32m2

#define vlsseg3e32_v_u32m2 ( ... ) __riscv_vlsseg3e32_v_u32m2(__VA_ARGS__)

◆ vlsseg3e32_v_u32m2_m

#define vlsseg3e32_v_u32m2_m ( ... ) __riscv_vlsseg3e32_v_u32m2_tumu(__VA_ARGS__)

◆ vlsseg3e32_v_u32mf2

#define vlsseg3e32_v_u32mf2 ( ... ) __riscv_vlsseg3e32_v_u32mf2(__VA_ARGS__)

◆ vlsseg3e32_v_u32mf2_m

#define vlsseg3e32_v_u32mf2_m ( ... ) __riscv_vlsseg3e32_v_u32mf2_tumu(__VA_ARGS__)

◆ vlsseg3e64_v_f64m1

#define vlsseg3e64_v_f64m1 ( ... ) __riscv_vlsseg3e64_v_f64m1(__VA_ARGS__)

◆ vlsseg3e64_v_f64m1_m

#define vlsseg3e64_v_f64m1_m ( ... ) __riscv_vlsseg3e64_v_f64m1_tumu(__VA_ARGS__)

◆ vlsseg3e64_v_f64m2

#define vlsseg3e64_v_f64m2 ( ... ) __riscv_vlsseg3e64_v_f64m2(__VA_ARGS__)

◆ vlsseg3e64_v_f64m2_m

#define vlsseg3e64_v_f64m2_m ( ... ) __riscv_vlsseg3e64_v_f64m2_tumu(__VA_ARGS__)

◆ vlsseg3e64_v_i64m1

#define vlsseg3e64_v_i64m1 ( ... ) __riscv_vlsseg3e64_v_i64m1(__VA_ARGS__)

◆ vlsseg3e64_v_i64m1_m

#define vlsseg3e64_v_i64m1_m ( ... ) __riscv_vlsseg3e64_v_i64m1_tumu(__VA_ARGS__)

◆ vlsseg3e64_v_i64m2

#define vlsseg3e64_v_i64m2 ( ... ) __riscv_vlsseg3e64_v_i64m2(__VA_ARGS__)

◆ vlsseg3e64_v_i64m2_m

#define vlsseg3e64_v_i64m2_m ( ... ) __riscv_vlsseg3e64_v_i64m2_tumu(__VA_ARGS__)

◆ vlsseg3e64_v_u64m1

#define vlsseg3e64_v_u64m1 ( ... ) __riscv_vlsseg3e64_v_u64m1(__VA_ARGS__)

◆ vlsseg3e64_v_u64m1_m

#define vlsseg3e64_v_u64m1_m ( ... ) __riscv_vlsseg3e64_v_u64m1_tumu(__VA_ARGS__)

◆ vlsseg3e64_v_u64m2

#define vlsseg3e64_v_u64m2 ( ... ) __riscv_vlsseg3e64_v_u64m2(__VA_ARGS__)

◆ vlsseg3e64_v_u64m2_m

#define vlsseg3e64_v_u64m2_m ( ... ) __riscv_vlsseg3e64_v_u64m2_tumu(__VA_ARGS__)

◆ vlsseg3e8_v_i8m1

#define vlsseg3e8_v_i8m1 ( ... ) __riscv_vlsseg3e8_v_i8m1(__VA_ARGS__)

◆ vlsseg3e8_v_i8m1_m

#define vlsseg3e8_v_i8m1_m ( ... ) __riscv_vlsseg3e8_v_i8m1_tumu(__VA_ARGS__)

◆ vlsseg3e8_v_i8m2

#define vlsseg3e8_v_i8m2 ( ... ) __riscv_vlsseg3e8_v_i8m2(__VA_ARGS__)

◆ vlsseg3e8_v_i8m2_m

#define vlsseg3e8_v_i8m2_m ( ... ) __riscv_vlsseg3e8_v_i8m2_tumu(__VA_ARGS__)

◆ vlsseg3e8_v_i8mf2

#define vlsseg3e8_v_i8mf2 ( ... ) __riscv_vlsseg3e8_v_i8mf2(__VA_ARGS__)

◆ vlsseg3e8_v_i8mf2_m

#define vlsseg3e8_v_i8mf2_m ( ... ) __riscv_vlsseg3e8_v_i8mf2_tumu(__VA_ARGS__)

◆ vlsseg3e8_v_i8mf4

#define vlsseg3e8_v_i8mf4 ( ... ) __riscv_vlsseg3e8_v_i8mf4(__VA_ARGS__)

◆ vlsseg3e8_v_i8mf4_m

#define vlsseg3e8_v_i8mf4_m ( ... ) __riscv_vlsseg3e8_v_i8mf4_tumu(__VA_ARGS__)

◆ vlsseg3e8_v_i8mf8

#define vlsseg3e8_v_i8mf8 ( ... ) __riscv_vlsseg3e8_v_i8mf8(__VA_ARGS__)

◆ vlsseg3e8_v_i8mf8_m

#define vlsseg3e8_v_i8mf8_m ( ... ) __riscv_vlsseg3e8_v_i8mf8_tumu(__VA_ARGS__)

◆ vlsseg3e8_v_u8m1

#define vlsseg3e8_v_u8m1 ( ... ) __riscv_vlsseg3e8_v_u8m1(__VA_ARGS__)

◆ vlsseg3e8_v_u8m1_m

#define vlsseg3e8_v_u8m1_m ( ... ) __riscv_vlsseg3e8_v_u8m1_tumu(__VA_ARGS__)

◆ vlsseg3e8_v_u8m2

#define vlsseg3e8_v_u8m2 ( ... ) __riscv_vlsseg3e8_v_u8m2(__VA_ARGS__)

◆ vlsseg3e8_v_u8m2_m

#define vlsseg3e8_v_u8m2_m ( ... ) __riscv_vlsseg3e8_v_u8m2_tumu(__VA_ARGS__)

◆ vlsseg3e8_v_u8mf2

#define vlsseg3e8_v_u8mf2 ( ... ) __riscv_vlsseg3e8_v_u8mf2(__VA_ARGS__)

◆ vlsseg3e8_v_u8mf2_m

#define vlsseg3e8_v_u8mf2_m ( ... ) __riscv_vlsseg3e8_v_u8mf2_tumu(__VA_ARGS__)

◆ vlsseg3e8_v_u8mf4

#define vlsseg3e8_v_u8mf4 ( ... ) __riscv_vlsseg3e8_v_u8mf4(__VA_ARGS__)

◆ vlsseg3e8_v_u8mf4_m

#define vlsseg3e8_v_u8mf4_m ( ... ) __riscv_vlsseg3e8_v_u8mf4_tumu(__VA_ARGS__)

◆ vlsseg3e8_v_u8mf8

#define vlsseg3e8_v_u8mf8 ( ... ) __riscv_vlsseg3e8_v_u8mf8(__VA_ARGS__)

◆ vlsseg3e8_v_u8mf8_m

#define vlsseg3e8_v_u8mf8_m ( ... ) __riscv_vlsseg3e8_v_u8mf8_tumu(__VA_ARGS__)

◆ vlsseg4e16_v_f16m1

#define vlsseg4e16_v_f16m1 ( ... ) __riscv_vlsseg4e16_v_f16m1(__VA_ARGS__)

◆ vlsseg4e16_v_f16m1_m

#define vlsseg4e16_v_f16m1_m ( ... ) __riscv_vlsseg4e16_v_f16m1_tumu(__VA_ARGS__)

◆ vlsseg4e16_v_f16m2

#define vlsseg4e16_v_f16m2 ( ... ) __riscv_vlsseg4e16_v_f16m2(__VA_ARGS__)

◆ vlsseg4e16_v_f16m2_m

#define vlsseg4e16_v_f16m2_m ( ... ) __riscv_vlsseg4e16_v_f16m2_tumu(__VA_ARGS__)

◆ vlsseg4e16_v_f16mf2

#define vlsseg4e16_v_f16mf2 ( ... ) __riscv_vlsseg4e16_v_f16mf2(__VA_ARGS__)

◆ vlsseg4e16_v_f16mf2_m

#define vlsseg4e16_v_f16mf2_m ( ... ) __riscv_vlsseg4e16_v_f16mf2_tumu(__VA_ARGS__)

◆ vlsseg4e16_v_f16mf4

#define vlsseg4e16_v_f16mf4 ( ... ) __riscv_vlsseg4e16_v_f16mf4(__VA_ARGS__)

◆ vlsseg4e16_v_f16mf4_m

#define vlsseg4e16_v_f16mf4_m ( ... ) __riscv_vlsseg4e16_v_f16mf4_tumu(__VA_ARGS__)

◆ vlsseg4e16_v_i16m1

#define vlsseg4e16_v_i16m1 ( ... ) __riscv_vlsseg4e16_v_i16m1(__VA_ARGS__)

◆ vlsseg4e16_v_i16m1_m

#define vlsseg4e16_v_i16m1_m ( ... ) __riscv_vlsseg4e16_v_i16m1_tumu(__VA_ARGS__)

◆ vlsseg4e16_v_i16m2

#define vlsseg4e16_v_i16m2 ( ... ) __riscv_vlsseg4e16_v_i16m2(__VA_ARGS__)

◆ vlsseg4e16_v_i16m2_m

#define vlsseg4e16_v_i16m2_m ( ... ) __riscv_vlsseg4e16_v_i16m2_tumu(__VA_ARGS__)

◆ vlsseg4e16_v_i16mf2

#define vlsseg4e16_v_i16mf2 ( ... ) __riscv_vlsseg4e16_v_i16mf2(__VA_ARGS__)

◆ vlsseg4e16_v_i16mf2_m

#define vlsseg4e16_v_i16mf2_m ( ... ) __riscv_vlsseg4e16_v_i16mf2_tumu(__VA_ARGS__)

◆ vlsseg4e16_v_i16mf4

#define vlsseg4e16_v_i16mf4 ( ... ) __riscv_vlsseg4e16_v_i16mf4(__VA_ARGS__)

◆ vlsseg4e16_v_i16mf4_m

#define vlsseg4e16_v_i16mf4_m ( ... ) __riscv_vlsseg4e16_v_i16mf4_tumu(__VA_ARGS__)

◆ vlsseg4e16_v_u16m1

#define vlsseg4e16_v_u16m1 ( ... ) __riscv_vlsseg4e16_v_u16m1(__VA_ARGS__)

◆ vlsseg4e16_v_u16m1_m

#define vlsseg4e16_v_u16m1_m ( ... ) __riscv_vlsseg4e16_v_u16m1_tumu(__VA_ARGS__)

◆ vlsseg4e16_v_u16m2

#define vlsseg4e16_v_u16m2 ( ... ) __riscv_vlsseg4e16_v_u16m2(__VA_ARGS__)

◆ vlsseg4e16_v_u16m2_m

#define vlsseg4e16_v_u16m2_m ( ... ) __riscv_vlsseg4e16_v_u16m2_tumu(__VA_ARGS__)

◆ vlsseg4e16_v_u16mf2

#define vlsseg4e16_v_u16mf2 ( ... ) __riscv_vlsseg4e16_v_u16mf2(__VA_ARGS__)

◆ vlsseg4e16_v_u16mf2_m

#define vlsseg4e16_v_u16mf2_m ( ... ) __riscv_vlsseg4e16_v_u16mf2_tumu(__VA_ARGS__)

◆ vlsseg4e16_v_u16mf4

#define vlsseg4e16_v_u16mf4 ( ... ) __riscv_vlsseg4e16_v_u16mf4(__VA_ARGS__)

◆ vlsseg4e16_v_u16mf4_m

#define vlsseg4e16_v_u16mf4_m ( ... ) __riscv_vlsseg4e16_v_u16mf4_tumu(__VA_ARGS__)

◆ vlsseg4e32_v_f32m1

#define vlsseg4e32_v_f32m1 ( ... ) __riscv_vlsseg4e32_v_f32m1(__VA_ARGS__)

◆ vlsseg4e32_v_f32m1_m

#define vlsseg4e32_v_f32m1_m ( ... ) __riscv_vlsseg4e32_v_f32m1_tumu(__VA_ARGS__)

◆ vlsseg4e32_v_f32m2

#define vlsseg4e32_v_f32m2 ( ... ) __riscv_vlsseg4e32_v_f32m2(__VA_ARGS__)

◆ vlsseg4e32_v_f32m2_m

#define vlsseg4e32_v_f32m2_m ( ... ) __riscv_vlsseg4e32_v_f32m2_tumu(__VA_ARGS__)

◆ vlsseg4e32_v_f32mf2

#define vlsseg4e32_v_f32mf2 ( ... ) __riscv_vlsseg4e32_v_f32mf2(__VA_ARGS__)

◆ vlsseg4e32_v_f32mf2_m

#define vlsseg4e32_v_f32mf2_m ( ... ) __riscv_vlsseg4e32_v_f32mf2_tumu(__VA_ARGS__)

◆ vlsseg4e32_v_i32m1

#define vlsseg4e32_v_i32m1 ( ... ) __riscv_vlsseg4e32_v_i32m1(__VA_ARGS__)

◆ vlsseg4e32_v_i32m1_m

#define vlsseg4e32_v_i32m1_m ( ... ) __riscv_vlsseg4e32_v_i32m1_tumu(__VA_ARGS__)

◆ vlsseg4e32_v_i32m2

#define vlsseg4e32_v_i32m2 ( ... ) __riscv_vlsseg4e32_v_i32m2(__VA_ARGS__)

◆ vlsseg4e32_v_i32m2_m

#define vlsseg4e32_v_i32m2_m ( ... ) __riscv_vlsseg4e32_v_i32m2_tumu(__VA_ARGS__)

◆ vlsseg4e32_v_i32mf2

#define vlsseg4e32_v_i32mf2 ( ... ) __riscv_vlsseg4e32_v_i32mf2(__VA_ARGS__)

◆ vlsseg4e32_v_i32mf2_m

#define vlsseg4e32_v_i32mf2_m ( ... ) __riscv_vlsseg4e32_v_i32mf2_tumu(__VA_ARGS__)

◆ vlsseg4e32_v_u32m1

#define vlsseg4e32_v_u32m1 ( ... ) __riscv_vlsseg4e32_v_u32m1(__VA_ARGS__)

◆ vlsseg4e32_v_u32m1_m

#define vlsseg4e32_v_u32m1_m ( ... ) __riscv_vlsseg4e32_v_u32m1_tumu(__VA_ARGS__)

◆ vlsseg4e32_v_u32m2

#define vlsseg4e32_v_u32m2 ( ... ) __riscv_vlsseg4e32_v_u32m2(__VA_ARGS__)

◆ vlsseg4e32_v_u32m2_m

#define vlsseg4e32_v_u32m2_m ( ... ) __riscv_vlsseg4e32_v_u32m2_tumu(__VA_ARGS__)

◆ vlsseg4e32_v_u32mf2

#define vlsseg4e32_v_u32mf2 ( ... ) __riscv_vlsseg4e32_v_u32mf2(__VA_ARGS__)

◆ vlsseg4e32_v_u32mf2_m

#define vlsseg4e32_v_u32mf2_m ( ... ) __riscv_vlsseg4e32_v_u32mf2_tumu(__VA_ARGS__)

◆ vlsseg4e64_v_f64m1

#define vlsseg4e64_v_f64m1 ( ... ) __riscv_vlsseg4e64_v_f64m1(__VA_ARGS__)

◆ vlsseg4e64_v_f64m1_m

#define vlsseg4e64_v_f64m1_m ( ... ) __riscv_vlsseg4e64_v_f64m1_tumu(__VA_ARGS__)

◆ vlsseg4e64_v_f64m2

#define vlsseg4e64_v_f64m2 ( ... ) __riscv_vlsseg4e64_v_f64m2(__VA_ARGS__)

◆ vlsseg4e64_v_f64m2_m

#define vlsseg4e64_v_f64m2_m ( ... ) __riscv_vlsseg4e64_v_f64m2_tumu(__VA_ARGS__)

◆ vlsseg4e64_v_i64m1

#define vlsseg4e64_v_i64m1 ( ... ) __riscv_vlsseg4e64_v_i64m1(__VA_ARGS__)

◆ vlsseg4e64_v_i64m1_m

#define vlsseg4e64_v_i64m1_m ( ... ) __riscv_vlsseg4e64_v_i64m1_tumu(__VA_ARGS__)

◆ vlsseg4e64_v_i64m2

#define vlsseg4e64_v_i64m2 ( ... ) __riscv_vlsseg4e64_v_i64m2(__VA_ARGS__)

◆ vlsseg4e64_v_i64m2_m

#define vlsseg4e64_v_i64m2_m ( ... ) __riscv_vlsseg4e64_v_i64m2_tumu(__VA_ARGS__)

◆ vlsseg4e64_v_u64m1

#define vlsseg4e64_v_u64m1 ( ... ) __riscv_vlsseg4e64_v_u64m1(__VA_ARGS__)

◆ vlsseg4e64_v_u64m1_m

#define vlsseg4e64_v_u64m1_m ( ... ) __riscv_vlsseg4e64_v_u64m1_tumu(__VA_ARGS__)

◆ vlsseg4e64_v_u64m2

#define vlsseg4e64_v_u64m2 ( ... ) __riscv_vlsseg4e64_v_u64m2(__VA_ARGS__)

◆ vlsseg4e64_v_u64m2_m

#define vlsseg4e64_v_u64m2_m ( ... ) __riscv_vlsseg4e64_v_u64m2_tumu(__VA_ARGS__)

◆ vlsseg4e8_v_i8m1

#define vlsseg4e8_v_i8m1 ( ... ) __riscv_vlsseg4e8_v_i8m1(__VA_ARGS__)

◆ vlsseg4e8_v_i8m1_m

#define vlsseg4e8_v_i8m1_m ( ... ) __riscv_vlsseg4e8_v_i8m1_tumu(__VA_ARGS__)

◆ vlsseg4e8_v_i8m2

#define vlsseg4e8_v_i8m2 ( ... ) __riscv_vlsseg4e8_v_i8m2(__VA_ARGS__)

◆ vlsseg4e8_v_i8m2_m

#define vlsseg4e8_v_i8m2_m ( ... ) __riscv_vlsseg4e8_v_i8m2_tumu(__VA_ARGS__)

◆ vlsseg4e8_v_i8mf2

#define vlsseg4e8_v_i8mf2 ( ... ) __riscv_vlsseg4e8_v_i8mf2(__VA_ARGS__)

◆ vlsseg4e8_v_i8mf2_m

#define vlsseg4e8_v_i8mf2_m ( ... ) __riscv_vlsseg4e8_v_i8mf2_tumu(__VA_ARGS__)

◆ vlsseg4e8_v_i8mf4

#define vlsseg4e8_v_i8mf4 ( ... ) __riscv_vlsseg4e8_v_i8mf4(__VA_ARGS__)

◆ vlsseg4e8_v_i8mf4_m

#define vlsseg4e8_v_i8mf4_m ( ... ) __riscv_vlsseg4e8_v_i8mf4_tumu(__VA_ARGS__)

◆ vlsseg4e8_v_i8mf8

#define vlsseg4e8_v_i8mf8 ( ... ) __riscv_vlsseg4e8_v_i8mf8(__VA_ARGS__)

◆ vlsseg4e8_v_i8mf8_m

#define vlsseg4e8_v_i8mf8_m ( ... ) __riscv_vlsseg4e8_v_i8mf8_tumu(__VA_ARGS__)

◆ vlsseg4e8_v_u8m1

#define vlsseg4e8_v_u8m1 ( ... ) __riscv_vlsseg4e8_v_u8m1(__VA_ARGS__)

◆ vlsseg4e8_v_u8m1_m

#define vlsseg4e8_v_u8m1_m ( ... ) __riscv_vlsseg4e8_v_u8m1_tumu(__VA_ARGS__)

◆ vlsseg4e8_v_u8m2

#define vlsseg4e8_v_u8m2 ( ... ) __riscv_vlsseg4e8_v_u8m2(__VA_ARGS__)

◆ vlsseg4e8_v_u8m2_m

#define vlsseg4e8_v_u8m2_m ( ... ) __riscv_vlsseg4e8_v_u8m2_tumu(__VA_ARGS__)

◆ vlsseg4e8_v_u8mf2

#define vlsseg4e8_v_u8mf2 ( ... ) __riscv_vlsseg4e8_v_u8mf2(__VA_ARGS__)

◆ vlsseg4e8_v_u8mf2_m

#define vlsseg4e8_v_u8mf2_m ( ... ) __riscv_vlsseg4e8_v_u8mf2_tumu(__VA_ARGS__)

◆ vlsseg4e8_v_u8mf4

#define vlsseg4e8_v_u8mf4 ( ... ) __riscv_vlsseg4e8_v_u8mf4(__VA_ARGS__)

◆ vlsseg4e8_v_u8mf4_m

#define vlsseg4e8_v_u8mf4_m ( ... ) __riscv_vlsseg4e8_v_u8mf4_tumu(__VA_ARGS__)

◆ vlsseg4e8_v_u8mf8

#define vlsseg4e8_v_u8mf8 ( ... ) __riscv_vlsseg4e8_v_u8mf8(__VA_ARGS__)

◆ vlsseg4e8_v_u8mf8_m

#define vlsseg4e8_v_u8mf8_m ( ... ) __riscv_vlsseg4e8_v_u8mf8_tumu(__VA_ARGS__)

◆ vlsseg5e16_v_f16m1

#define vlsseg5e16_v_f16m1 ( ... ) __riscv_vlsseg5e16_v_f16m1(__VA_ARGS__)

◆ vlsseg5e16_v_f16m1_m

#define vlsseg5e16_v_f16m1_m ( ... ) __riscv_vlsseg5e16_v_f16m1_tumu(__VA_ARGS__)

◆ vlsseg5e16_v_f16mf2

#define vlsseg5e16_v_f16mf2 ( ... ) __riscv_vlsseg5e16_v_f16mf2(__VA_ARGS__)

◆ vlsseg5e16_v_f16mf2_m

#define vlsseg5e16_v_f16mf2_m ( ... ) __riscv_vlsseg5e16_v_f16mf2_tumu(__VA_ARGS__)

◆ vlsseg5e16_v_f16mf4

#define vlsseg5e16_v_f16mf4 ( ... ) __riscv_vlsseg5e16_v_f16mf4(__VA_ARGS__)

◆ vlsseg5e16_v_f16mf4_m

#define vlsseg5e16_v_f16mf4_m ( ... ) __riscv_vlsseg5e16_v_f16mf4_tumu(__VA_ARGS__)

◆ vlsseg5e16_v_i16m1

#define vlsseg5e16_v_i16m1 ( ... ) __riscv_vlsseg5e16_v_i16m1(__VA_ARGS__)

◆ vlsseg5e16_v_i16m1_m

#define vlsseg5e16_v_i16m1_m ( ... ) __riscv_vlsseg5e16_v_i16m1_tumu(__VA_ARGS__)

◆ vlsseg5e16_v_i16mf2

#define vlsseg5e16_v_i16mf2 ( ... ) __riscv_vlsseg5e16_v_i16mf2(__VA_ARGS__)

◆ vlsseg5e16_v_i16mf2_m

#define vlsseg5e16_v_i16mf2_m ( ... ) __riscv_vlsseg5e16_v_i16mf2_tumu(__VA_ARGS__)

◆ vlsseg5e16_v_i16mf4

#define vlsseg5e16_v_i16mf4 ( ... ) __riscv_vlsseg5e16_v_i16mf4(__VA_ARGS__)

◆ vlsseg5e16_v_i16mf4_m

#define vlsseg5e16_v_i16mf4_m ( ... ) __riscv_vlsseg5e16_v_i16mf4_tumu(__VA_ARGS__)

◆ vlsseg5e16_v_u16m1

#define vlsseg5e16_v_u16m1 ( ... ) __riscv_vlsseg5e16_v_u16m1(__VA_ARGS__)

◆ vlsseg5e16_v_u16m1_m

#define vlsseg5e16_v_u16m1_m ( ... ) __riscv_vlsseg5e16_v_u16m1_tumu(__VA_ARGS__)

◆ vlsseg5e16_v_u16mf2

#define vlsseg5e16_v_u16mf2 ( ... ) __riscv_vlsseg5e16_v_u16mf2(__VA_ARGS__)

◆ vlsseg5e16_v_u16mf2_m

#define vlsseg5e16_v_u16mf2_m ( ... ) __riscv_vlsseg5e16_v_u16mf2_tumu(__VA_ARGS__)

◆ vlsseg5e16_v_u16mf4

#define vlsseg5e16_v_u16mf4 ( ... ) __riscv_vlsseg5e16_v_u16mf4(__VA_ARGS__)

◆ vlsseg5e16_v_u16mf4_m

#define vlsseg5e16_v_u16mf4_m ( ... ) __riscv_vlsseg5e16_v_u16mf4_tumu(__VA_ARGS__)

◆ vlsseg5e32_v_f32m1

#define vlsseg5e32_v_f32m1 ( ... ) __riscv_vlsseg5e32_v_f32m1(__VA_ARGS__)

◆ vlsseg5e32_v_f32m1_m

#define vlsseg5e32_v_f32m1_m ( ... ) __riscv_vlsseg5e32_v_f32m1_tumu(__VA_ARGS__)

◆ vlsseg5e32_v_f32mf2

#define vlsseg5e32_v_f32mf2 ( ... ) __riscv_vlsseg5e32_v_f32mf2(__VA_ARGS__)

◆ vlsseg5e32_v_f32mf2_m

#define vlsseg5e32_v_f32mf2_m ( ... ) __riscv_vlsseg5e32_v_f32mf2_tumu(__VA_ARGS__)

◆ vlsseg5e32_v_i32m1

#define vlsseg5e32_v_i32m1 ( ... ) __riscv_vlsseg5e32_v_i32m1(__VA_ARGS__)

◆ vlsseg5e32_v_i32m1_m

#define vlsseg5e32_v_i32m1_m ( ... ) __riscv_vlsseg5e32_v_i32m1_tumu(__VA_ARGS__)

◆ vlsseg5e32_v_i32mf2

#define vlsseg5e32_v_i32mf2 ( ... ) __riscv_vlsseg5e32_v_i32mf2(__VA_ARGS__)

◆ vlsseg5e32_v_i32mf2_m

#define vlsseg5e32_v_i32mf2_m ( ... ) __riscv_vlsseg5e32_v_i32mf2_tumu(__VA_ARGS__)

◆ vlsseg5e32_v_u32m1

#define vlsseg5e32_v_u32m1 ( ... ) __riscv_vlsseg5e32_v_u32m1(__VA_ARGS__)

◆ vlsseg5e32_v_u32m1_m

#define vlsseg5e32_v_u32m1_m ( ... ) __riscv_vlsseg5e32_v_u32m1_tumu(__VA_ARGS__)

◆ vlsseg5e32_v_u32mf2

#define vlsseg5e32_v_u32mf2 ( ... ) __riscv_vlsseg5e32_v_u32mf2(__VA_ARGS__)

◆ vlsseg5e32_v_u32mf2_m

#define vlsseg5e32_v_u32mf2_m ( ... ) __riscv_vlsseg5e32_v_u32mf2_tumu(__VA_ARGS__)

◆ vlsseg5e64_v_f64m1

#define vlsseg5e64_v_f64m1 ( ... ) __riscv_vlsseg5e64_v_f64m1(__VA_ARGS__)

◆ vlsseg5e64_v_f64m1_m

#define vlsseg5e64_v_f64m1_m ( ... ) __riscv_vlsseg5e64_v_f64m1_tumu(__VA_ARGS__)

◆ vlsseg5e64_v_i64m1

#define vlsseg5e64_v_i64m1 ( ... ) __riscv_vlsseg5e64_v_i64m1(__VA_ARGS__)

◆ vlsseg5e64_v_i64m1_m

#define vlsseg5e64_v_i64m1_m ( ... ) __riscv_vlsseg5e64_v_i64m1_tumu(__VA_ARGS__)

◆ vlsseg5e64_v_u64m1

#define vlsseg5e64_v_u64m1 ( ... ) __riscv_vlsseg5e64_v_u64m1(__VA_ARGS__)

◆ vlsseg5e64_v_u64m1_m

#define vlsseg5e64_v_u64m1_m ( ... ) __riscv_vlsseg5e64_v_u64m1_tumu(__VA_ARGS__)

◆ vlsseg5e8_v_i8m1

#define vlsseg5e8_v_i8m1 ( ... ) __riscv_vlsseg5e8_v_i8m1(__VA_ARGS__)

◆ vlsseg5e8_v_i8m1_m

#define vlsseg5e8_v_i8m1_m ( ... ) __riscv_vlsseg5e8_v_i8m1_tumu(__VA_ARGS__)

◆ vlsseg5e8_v_i8mf2

#define vlsseg5e8_v_i8mf2 ( ... ) __riscv_vlsseg5e8_v_i8mf2(__VA_ARGS__)

◆ vlsseg5e8_v_i8mf2_m

#define vlsseg5e8_v_i8mf2_m ( ... ) __riscv_vlsseg5e8_v_i8mf2_tumu(__VA_ARGS__)

◆ vlsseg5e8_v_i8mf4

#define vlsseg5e8_v_i8mf4 ( ... ) __riscv_vlsseg5e8_v_i8mf4(__VA_ARGS__)

◆ vlsseg5e8_v_i8mf4_m

#define vlsseg5e8_v_i8mf4_m ( ... ) __riscv_vlsseg5e8_v_i8mf4_tumu(__VA_ARGS__)

◆ vlsseg5e8_v_i8mf8

#define vlsseg5e8_v_i8mf8 ( ... ) __riscv_vlsseg5e8_v_i8mf8(__VA_ARGS__)

◆ vlsseg5e8_v_i8mf8_m

#define vlsseg5e8_v_i8mf8_m ( ... ) __riscv_vlsseg5e8_v_i8mf8_tumu(__VA_ARGS__)

◆ vlsseg5e8_v_u8m1

#define vlsseg5e8_v_u8m1 ( ... ) __riscv_vlsseg5e8_v_u8m1(__VA_ARGS__)

◆ vlsseg5e8_v_u8m1_m

#define vlsseg5e8_v_u8m1_m ( ... ) __riscv_vlsseg5e8_v_u8m1_tumu(__VA_ARGS__)

◆ vlsseg5e8_v_u8mf2

#define vlsseg5e8_v_u8mf2 ( ... ) __riscv_vlsseg5e8_v_u8mf2(__VA_ARGS__)

◆ vlsseg5e8_v_u8mf2_m

#define vlsseg5e8_v_u8mf2_m ( ... ) __riscv_vlsseg5e8_v_u8mf2_tumu(__VA_ARGS__)

◆ vlsseg5e8_v_u8mf4

#define vlsseg5e8_v_u8mf4 ( ... ) __riscv_vlsseg5e8_v_u8mf4(__VA_ARGS__)

◆ vlsseg5e8_v_u8mf4_m

#define vlsseg5e8_v_u8mf4_m ( ... ) __riscv_vlsseg5e8_v_u8mf4_tumu(__VA_ARGS__)

◆ vlsseg5e8_v_u8mf8

#define vlsseg5e8_v_u8mf8 ( ... ) __riscv_vlsseg5e8_v_u8mf8(__VA_ARGS__)

◆ vlsseg5e8_v_u8mf8_m

#define vlsseg5e8_v_u8mf8_m ( ... ) __riscv_vlsseg5e8_v_u8mf8_tumu(__VA_ARGS__)

◆ vlsseg6e16_v_f16m1

#define vlsseg6e16_v_f16m1 ( ... ) __riscv_vlsseg6e16_v_f16m1(__VA_ARGS__)

◆ vlsseg6e16_v_f16m1_m

#define vlsseg6e16_v_f16m1_m ( ... ) __riscv_vlsseg6e16_v_f16m1_tumu(__VA_ARGS__)

◆ vlsseg6e16_v_f16mf2

#define vlsseg6e16_v_f16mf2 ( ... ) __riscv_vlsseg6e16_v_f16mf2(__VA_ARGS__)

◆ vlsseg6e16_v_f16mf2_m

#define vlsseg6e16_v_f16mf2_m ( ... ) __riscv_vlsseg6e16_v_f16mf2_tumu(__VA_ARGS__)

◆ vlsseg6e16_v_f16mf4

#define vlsseg6e16_v_f16mf4 ( ... ) __riscv_vlsseg6e16_v_f16mf4(__VA_ARGS__)

◆ vlsseg6e16_v_f16mf4_m

#define vlsseg6e16_v_f16mf4_m ( ... ) __riscv_vlsseg6e16_v_f16mf4_tumu(__VA_ARGS__)

◆ vlsseg6e16_v_i16m1

#define vlsseg6e16_v_i16m1 ( ... ) __riscv_vlsseg6e16_v_i16m1(__VA_ARGS__)

◆ vlsseg6e16_v_i16m1_m

#define vlsseg6e16_v_i16m1_m ( ... ) __riscv_vlsseg6e16_v_i16m1_tumu(__VA_ARGS__)

◆ vlsseg6e16_v_i16mf2

#define vlsseg6e16_v_i16mf2 ( ... ) __riscv_vlsseg6e16_v_i16mf2(__VA_ARGS__)

◆ vlsseg6e16_v_i16mf2_m

#define vlsseg6e16_v_i16mf2_m ( ... ) __riscv_vlsseg6e16_v_i16mf2_tumu(__VA_ARGS__)

◆ vlsseg6e16_v_i16mf4

#define vlsseg6e16_v_i16mf4 ( ... ) __riscv_vlsseg6e16_v_i16mf4(__VA_ARGS__)

◆ vlsseg6e16_v_i16mf4_m

#define vlsseg6e16_v_i16mf4_m ( ... ) __riscv_vlsseg6e16_v_i16mf4_tumu(__VA_ARGS__)

◆ vlsseg6e16_v_u16m1

#define vlsseg6e16_v_u16m1 ( ... ) __riscv_vlsseg6e16_v_u16m1(__VA_ARGS__)

◆ vlsseg6e16_v_u16m1_m

#define vlsseg6e16_v_u16m1_m ( ... ) __riscv_vlsseg6e16_v_u16m1_tumu(__VA_ARGS__)

◆ vlsseg6e16_v_u16mf2

#define vlsseg6e16_v_u16mf2 ( ... ) __riscv_vlsseg6e16_v_u16mf2(__VA_ARGS__)

◆ vlsseg6e16_v_u16mf2_m

#define vlsseg6e16_v_u16mf2_m ( ... ) __riscv_vlsseg6e16_v_u16mf2_tumu(__VA_ARGS__)

◆ vlsseg6e16_v_u16mf4

#define vlsseg6e16_v_u16mf4 ( ... ) __riscv_vlsseg6e16_v_u16mf4(__VA_ARGS__)

◆ vlsseg6e16_v_u16mf4_m

#define vlsseg6e16_v_u16mf4_m ( ... ) __riscv_vlsseg6e16_v_u16mf4_tumu(__VA_ARGS__)

◆ vlsseg6e32_v_f32m1

#define vlsseg6e32_v_f32m1 ( ... ) __riscv_vlsseg6e32_v_f32m1(__VA_ARGS__)

◆ vlsseg6e32_v_f32m1_m

#define vlsseg6e32_v_f32m1_m ( ... ) __riscv_vlsseg6e32_v_f32m1_tumu(__VA_ARGS__)

◆ vlsseg6e32_v_f32mf2

#define vlsseg6e32_v_f32mf2 ( ... ) __riscv_vlsseg6e32_v_f32mf2(__VA_ARGS__)

◆ vlsseg6e32_v_f32mf2_m

#define vlsseg6e32_v_f32mf2_m ( ... ) __riscv_vlsseg6e32_v_f32mf2_tumu(__VA_ARGS__)

◆ vlsseg6e32_v_i32m1

#define vlsseg6e32_v_i32m1 ( ... ) __riscv_vlsseg6e32_v_i32m1(__VA_ARGS__)

◆ vlsseg6e32_v_i32m1_m

#define vlsseg6e32_v_i32m1_m ( ... ) __riscv_vlsseg6e32_v_i32m1_tumu(__VA_ARGS__)

◆ vlsseg6e32_v_i32mf2

#define vlsseg6e32_v_i32mf2 ( ... ) __riscv_vlsseg6e32_v_i32mf2(__VA_ARGS__)

◆ vlsseg6e32_v_i32mf2_m

#define vlsseg6e32_v_i32mf2_m ( ... ) __riscv_vlsseg6e32_v_i32mf2_tumu(__VA_ARGS__)

◆ vlsseg6e32_v_u32m1

#define vlsseg6e32_v_u32m1 ( ... ) __riscv_vlsseg6e32_v_u32m1(__VA_ARGS__)

◆ vlsseg6e32_v_u32m1_m

#define vlsseg6e32_v_u32m1_m ( ... ) __riscv_vlsseg6e32_v_u32m1_tumu(__VA_ARGS__)

◆ vlsseg6e32_v_u32mf2

#define vlsseg6e32_v_u32mf2 ( ... ) __riscv_vlsseg6e32_v_u32mf2(__VA_ARGS__)

◆ vlsseg6e32_v_u32mf2_m

#define vlsseg6e32_v_u32mf2_m ( ... ) __riscv_vlsseg6e32_v_u32mf2_tumu(__VA_ARGS__)

◆ vlsseg6e64_v_f64m1

#define vlsseg6e64_v_f64m1 ( ... ) __riscv_vlsseg6e64_v_f64m1(__VA_ARGS__)

◆ vlsseg6e64_v_f64m1_m

#define vlsseg6e64_v_f64m1_m ( ... ) __riscv_vlsseg6e64_v_f64m1_tumu(__VA_ARGS__)

◆ vlsseg6e64_v_i64m1

#define vlsseg6e64_v_i64m1 ( ... ) __riscv_vlsseg6e64_v_i64m1(__VA_ARGS__)

◆ vlsseg6e64_v_i64m1_m

#define vlsseg6e64_v_i64m1_m ( ... ) __riscv_vlsseg6e64_v_i64m1_tumu(__VA_ARGS__)

◆ vlsseg6e64_v_u64m1

#define vlsseg6e64_v_u64m1 ( ... ) __riscv_vlsseg6e64_v_u64m1(__VA_ARGS__)

◆ vlsseg6e64_v_u64m1_m

#define vlsseg6e64_v_u64m1_m ( ... ) __riscv_vlsseg6e64_v_u64m1_tumu(__VA_ARGS__)

◆ vlsseg6e8_v_i8m1

#define vlsseg6e8_v_i8m1 ( ... ) __riscv_vlsseg6e8_v_i8m1(__VA_ARGS__)

◆ vlsseg6e8_v_i8m1_m

#define vlsseg6e8_v_i8m1_m ( ... ) __riscv_vlsseg6e8_v_i8m1_tumu(__VA_ARGS__)

◆ vlsseg6e8_v_i8mf2

#define vlsseg6e8_v_i8mf2 ( ... ) __riscv_vlsseg6e8_v_i8mf2(__VA_ARGS__)

◆ vlsseg6e8_v_i8mf2_m

#define vlsseg6e8_v_i8mf2_m ( ... ) __riscv_vlsseg6e8_v_i8mf2_tumu(__VA_ARGS__)

◆ vlsseg6e8_v_i8mf4

#define vlsseg6e8_v_i8mf4 ( ... ) __riscv_vlsseg6e8_v_i8mf4(__VA_ARGS__)

◆ vlsseg6e8_v_i8mf4_m

#define vlsseg6e8_v_i8mf4_m ( ... ) __riscv_vlsseg6e8_v_i8mf4_tumu(__VA_ARGS__)

◆ vlsseg6e8_v_i8mf8

#define vlsseg6e8_v_i8mf8 ( ... ) __riscv_vlsseg6e8_v_i8mf8(__VA_ARGS__)

◆ vlsseg6e8_v_i8mf8_m

#define vlsseg6e8_v_i8mf8_m ( ... ) __riscv_vlsseg6e8_v_i8mf8_tumu(__VA_ARGS__)

◆ vlsseg6e8_v_u8m1

#define vlsseg6e8_v_u8m1 ( ... ) __riscv_vlsseg6e8_v_u8m1(__VA_ARGS__)

◆ vlsseg6e8_v_u8m1_m

#define vlsseg6e8_v_u8m1_m ( ... ) __riscv_vlsseg6e8_v_u8m1_tumu(__VA_ARGS__)

◆ vlsseg6e8_v_u8mf2

#define vlsseg6e8_v_u8mf2 ( ... ) __riscv_vlsseg6e8_v_u8mf2(__VA_ARGS__)

◆ vlsseg6e8_v_u8mf2_m

#define vlsseg6e8_v_u8mf2_m ( ... ) __riscv_vlsseg6e8_v_u8mf2_tumu(__VA_ARGS__)

◆ vlsseg6e8_v_u8mf4

#define vlsseg6e8_v_u8mf4 ( ... ) __riscv_vlsseg6e8_v_u8mf4(__VA_ARGS__)

◆ vlsseg6e8_v_u8mf4_m

#define vlsseg6e8_v_u8mf4_m ( ... ) __riscv_vlsseg6e8_v_u8mf4_tumu(__VA_ARGS__)

◆ vlsseg6e8_v_u8mf8

#define vlsseg6e8_v_u8mf8 ( ... ) __riscv_vlsseg6e8_v_u8mf8(__VA_ARGS__)

◆ vlsseg6e8_v_u8mf8_m

#define vlsseg6e8_v_u8mf8_m ( ... ) __riscv_vlsseg6e8_v_u8mf8_tumu(__VA_ARGS__)

◆ vlsseg7e16_v_f16m1

#define vlsseg7e16_v_f16m1 ( ... ) __riscv_vlsseg7e16_v_f16m1(__VA_ARGS__)

◆ vlsseg7e16_v_f16m1_m

#define vlsseg7e16_v_f16m1_m ( ... ) __riscv_vlsseg7e16_v_f16m1_tumu(__VA_ARGS__)

◆ vlsseg7e16_v_f16mf2

#define vlsseg7e16_v_f16mf2 ( ... ) __riscv_vlsseg7e16_v_f16mf2(__VA_ARGS__)

◆ vlsseg7e16_v_f16mf2_m

#define vlsseg7e16_v_f16mf2_m ( ... ) __riscv_vlsseg7e16_v_f16mf2_tumu(__VA_ARGS__)

◆ vlsseg7e16_v_f16mf4

#define vlsseg7e16_v_f16mf4 ( ... ) __riscv_vlsseg7e16_v_f16mf4(__VA_ARGS__)

◆ vlsseg7e16_v_f16mf4_m

#define vlsseg7e16_v_f16mf4_m ( ... ) __riscv_vlsseg7e16_v_f16mf4_tumu(__VA_ARGS__)

◆ vlsseg7e16_v_i16m1

#define vlsseg7e16_v_i16m1 ( ... ) __riscv_vlsseg7e16_v_i16m1(__VA_ARGS__)

◆ vlsseg7e16_v_i16m1_m

#define vlsseg7e16_v_i16m1_m ( ... ) __riscv_vlsseg7e16_v_i16m1_tumu(__VA_ARGS__)

◆ vlsseg7e16_v_i16mf2

#define vlsseg7e16_v_i16mf2 ( ... ) __riscv_vlsseg7e16_v_i16mf2(__VA_ARGS__)

◆ vlsseg7e16_v_i16mf2_m

#define vlsseg7e16_v_i16mf2_m ( ... ) __riscv_vlsseg7e16_v_i16mf2_tumu(__VA_ARGS__)

◆ vlsseg7e16_v_i16mf4

#define vlsseg7e16_v_i16mf4 ( ... ) __riscv_vlsseg7e16_v_i16mf4(__VA_ARGS__)

◆ vlsseg7e16_v_i16mf4_m

#define vlsseg7e16_v_i16mf4_m ( ... ) __riscv_vlsseg7e16_v_i16mf4_tumu(__VA_ARGS__)

◆ vlsseg7e16_v_u16m1

#define vlsseg7e16_v_u16m1 ( ... ) __riscv_vlsseg7e16_v_u16m1(__VA_ARGS__)

◆ vlsseg7e16_v_u16m1_m

#define vlsseg7e16_v_u16m1_m ( ... ) __riscv_vlsseg7e16_v_u16m1_tumu(__VA_ARGS__)

◆ vlsseg7e16_v_u16mf2

#define vlsseg7e16_v_u16mf2 ( ... ) __riscv_vlsseg7e16_v_u16mf2(__VA_ARGS__)

◆ vlsseg7e16_v_u16mf2_m

#define vlsseg7e16_v_u16mf2_m ( ... ) __riscv_vlsseg7e16_v_u16mf2_tumu(__VA_ARGS__)

◆ vlsseg7e16_v_u16mf4

#define vlsseg7e16_v_u16mf4 ( ... ) __riscv_vlsseg7e16_v_u16mf4(__VA_ARGS__)

◆ vlsseg7e16_v_u16mf4_m

#define vlsseg7e16_v_u16mf4_m ( ... ) __riscv_vlsseg7e16_v_u16mf4_tumu(__VA_ARGS__)

◆ vlsseg7e32_v_f32m1

#define vlsseg7e32_v_f32m1 ( ... ) __riscv_vlsseg7e32_v_f32m1(__VA_ARGS__)

◆ vlsseg7e32_v_f32m1_m

#define vlsseg7e32_v_f32m1_m ( ... ) __riscv_vlsseg7e32_v_f32m1_tumu(__VA_ARGS__)

◆ vlsseg7e32_v_f32mf2

#define vlsseg7e32_v_f32mf2 ( ... ) __riscv_vlsseg7e32_v_f32mf2(__VA_ARGS__)

◆ vlsseg7e32_v_f32mf2_m

#define vlsseg7e32_v_f32mf2_m ( ... ) __riscv_vlsseg7e32_v_f32mf2_tumu(__VA_ARGS__)

◆ vlsseg7e32_v_i32m1

#define vlsseg7e32_v_i32m1 ( ... ) __riscv_vlsseg7e32_v_i32m1(__VA_ARGS__)

◆ vlsseg7e32_v_i32m1_m

#define vlsseg7e32_v_i32m1_m ( ... ) __riscv_vlsseg7e32_v_i32m1_tumu(__VA_ARGS__)

◆ vlsseg7e32_v_i32mf2

#define vlsseg7e32_v_i32mf2 ( ... ) __riscv_vlsseg7e32_v_i32mf2(__VA_ARGS__)

◆ vlsseg7e32_v_i32mf2_m

#define vlsseg7e32_v_i32mf2_m ( ... ) __riscv_vlsseg7e32_v_i32mf2_tumu(__VA_ARGS__)

◆ vlsseg7e32_v_u32m1

#define vlsseg7e32_v_u32m1 ( ... ) __riscv_vlsseg7e32_v_u32m1(__VA_ARGS__)

◆ vlsseg7e32_v_u32m1_m

#define vlsseg7e32_v_u32m1_m ( ... ) __riscv_vlsseg7e32_v_u32m1_tumu(__VA_ARGS__)

◆ vlsseg7e32_v_u32mf2

#define vlsseg7e32_v_u32mf2 ( ... ) __riscv_vlsseg7e32_v_u32mf2(__VA_ARGS__)

◆ vlsseg7e32_v_u32mf2_m

#define vlsseg7e32_v_u32mf2_m ( ... ) __riscv_vlsseg7e32_v_u32mf2_tumu(__VA_ARGS__)

◆ vlsseg7e64_v_f64m1

#define vlsseg7e64_v_f64m1 ( ... ) __riscv_vlsseg7e64_v_f64m1(__VA_ARGS__)

◆ vlsseg7e64_v_f64m1_m

#define vlsseg7e64_v_f64m1_m ( ... ) __riscv_vlsseg7e64_v_f64m1_tumu(__VA_ARGS__)

◆ vlsseg7e64_v_i64m1

#define vlsseg7e64_v_i64m1 ( ... ) __riscv_vlsseg7e64_v_i64m1(__VA_ARGS__)

◆ vlsseg7e64_v_i64m1_m

#define vlsseg7e64_v_i64m1_m ( ... ) __riscv_vlsseg7e64_v_i64m1_tumu(__VA_ARGS__)

◆ vlsseg7e64_v_u64m1

#define vlsseg7e64_v_u64m1 ( ... ) __riscv_vlsseg7e64_v_u64m1(__VA_ARGS__)

◆ vlsseg7e64_v_u64m1_m

#define vlsseg7e64_v_u64m1_m ( ... ) __riscv_vlsseg7e64_v_u64m1_tumu(__VA_ARGS__)

◆ vlsseg7e8_v_i8m1

#define vlsseg7e8_v_i8m1 ( ... ) __riscv_vlsseg7e8_v_i8m1(__VA_ARGS__)

◆ vlsseg7e8_v_i8m1_m

#define vlsseg7e8_v_i8m1_m ( ... ) __riscv_vlsseg7e8_v_i8m1_tumu(__VA_ARGS__)

◆ vlsseg7e8_v_i8mf2

#define vlsseg7e8_v_i8mf2 ( ... ) __riscv_vlsseg7e8_v_i8mf2(__VA_ARGS__)

◆ vlsseg7e8_v_i8mf2_m

#define vlsseg7e8_v_i8mf2_m ( ... ) __riscv_vlsseg7e8_v_i8mf2_tumu(__VA_ARGS__)

◆ vlsseg7e8_v_i8mf4

#define vlsseg7e8_v_i8mf4 ( ... ) __riscv_vlsseg7e8_v_i8mf4(__VA_ARGS__)

◆ vlsseg7e8_v_i8mf4_m

#define vlsseg7e8_v_i8mf4_m ( ... ) __riscv_vlsseg7e8_v_i8mf4_tumu(__VA_ARGS__)

◆ vlsseg7e8_v_i8mf8

#define vlsseg7e8_v_i8mf8 ( ... ) __riscv_vlsseg7e8_v_i8mf8(__VA_ARGS__)

◆ vlsseg7e8_v_i8mf8_m

#define vlsseg7e8_v_i8mf8_m ( ... ) __riscv_vlsseg7e8_v_i8mf8_tumu(__VA_ARGS__)

◆ vlsseg7e8_v_u8m1

#define vlsseg7e8_v_u8m1 ( ... ) __riscv_vlsseg7e8_v_u8m1(__VA_ARGS__)

◆ vlsseg7e8_v_u8m1_m

#define vlsseg7e8_v_u8m1_m ( ... ) __riscv_vlsseg7e8_v_u8m1_tumu(__VA_ARGS__)

◆ vlsseg7e8_v_u8mf2

#define vlsseg7e8_v_u8mf2 ( ... ) __riscv_vlsseg7e8_v_u8mf2(__VA_ARGS__)

◆ vlsseg7e8_v_u8mf2_m

#define vlsseg7e8_v_u8mf2_m ( ... ) __riscv_vlsseg7e8_v_u8mf2_tumu(__VA_ARGS__)

◆ vlsseg7e8_v_u8mf4

#define vlsseg7e8_v_u8mf4 ( ... ) __riscv_vlsseg7e8_v_u8mf4(__VA_ARGS__)

◆ vlsseg7e8_v_u8mf4_m

#define vlsseg7e8_v_u8mf4_m ( ... ) __riscv_vlsseg7e8_v_u8mf4_tumu(__VA_ARGS__)

◆ vlsseg7e8_v_u8mf8

#define vlsseg7e8_v_u8mf8 ( ... ) __riscv_vlsseg7e8_v_u8mf8(__VA_ARGS__)

◆ vlsseg7e8_v_u8mf8_m

#define vlsseg7e8_v_u8mf8_m ( ... ) __riscv_vlsseg7e8_v_u8mf8_tumu(__VA_ARGS__)

◆ vlsseg8e16_v_f16m1

#define vlsseg8e16_v_f16m1 ( ... ) __riscv_vlsseg8e16_v_f16m1(__VA_ARGS__)

◆ vlsseg8e16_v_f16m1_m

#define vlsseg8e16_v_f16m1_m ( ... ) __riscv_vlsseg8e16_v_f16m1_tumu(__VA_ARGS__)

◆ vlsseg8e16_v_f16mf2

#define vlsseg8e16_v_f16mf2 ( ... ) __riscv_vlsseg8e16_v_f16mf2(__VA_ARGS__)

◆ vlsseg8e16_v_f16mf2_m

#define vlsseg8e16_v_f16mf2_m ( ... ) __riscv_vlsseg8e16_v_f16mf2_tumu(__VA_ARGS__)

◆ vlsseg8e16_v_f16mf4

#define vlsseg8e16_v_f16mf4 ( ... ) __riscv_vlsseg8e16_v_f16mf4(__VA_ARGS__)

◆ vlsseg8e16_v_f16mf4_m

#define vlsseg8e16_v_f16mf4_m ( ... ) __riscv_vlsseg8e16_v_f16mf4_tumu(__VA_ARGS__)

◆ vlsseg8e16_v_i16m1

#define vlsseg8e16_v_i16m1 ( ... ) __riscv_vlsseg8e16_v_i16m1(__VA_ARGS__)

◆ vlsseg8e16_v_i16m1_m

#define vlsseg8e16_v_i16m1_m ( ... ) __riscv_vlsseg8e16_v_i16m1_tumu(__VA_ARGS__)

◆ vlsseg8e16_v_i16mf2

#define vlsseg8e16_v_i16mf2 ( ... ) __riscv_vlsseg8e16_v_i16mf2(__VA_ARGS__)

◆ vlsseg8e16_v_i16mf2_m

#define vlsseg8e16_v_i16mf2_m ( ... ) __riscv_vlsseg8e16_v_i16mf2_tumu(__VA_ARGS__)

◆ vlsseg8e16_v_i16mf4

#define vlsseg8e16_v_i16mf4 ( ... ) __riscv_vlsseg8e16_v_i16mf4(__VA_ARGS__)

◆ vlsseg8e16_v_i16mf4_m

#define vlsseg8e16_v_i16mf4_m ( ... ) __riscv_vlsseg8e16_v_i16mf4_tumu(__VA_ARGS__)

◆ vlsseg8e16_v_u16m1

#define vlsseg8e16_v_u16m1 ( ... ) __riscv_vlsseg8e16_v_u16m1(__VA_ARGS__)

◆ vlsseg8e16_v_u16m1_m

#define vlsseg8e16_v_u16m1_m ( ... ) __riscv_vlsseg8e16_v_u16m1_tumu(__VA_ARGS__)

◆ vlsseg8e16_v_u16mf2

#define vlsseg8e16_v_u16mf2 ( ... ) __riscv_vlsseg8e16_v_u16mf2(__VA_ARGS__)

◆ vlsseg8e16_v_u16mf2_m

#define vlsseg8e16_v_u16mf2_m ( ... ) __riscv_vlsseg8e16_v_u16mf2_tumu(__VA_ARGS__)

◆ vlsseg8e16_v_u16mf4

#define vlsseg8e16_v_u16mf4 ( ... ) __riscv_vlsseg8e16_v_u16mf4(__VA_ARGS__)

◆ vlsseg8e16_v_u16mf4_m

#define vlsseg8e16_v_u16mf4_m ( ... ) __riscv_vlsseg8e16_v_u16mf4_tumu(__VA_ARGS__)

◆ vlsseg8e32_v_f32m1

#define vlsseg8e32_v_f32m1 ( ... ) __riscv_vlsseg8e32_v_f32m1(__VA_ARGS__)

◆ vlsseg8e32_v_f32m1_m

#define vlsseg8e32_v_f32m1_m ( ... ) __riscv_vlsseg8e32_v_f32m1_tumu(__VA_ARGS__)

◆ vlsseg8e32_v_f32mf2

#define vlsseg8e32_v_f32mf2 ( ... ) __riscv_vlsseg8e32_v_f32mf2(__VA_ARGS__)

◆ vlsseg8e32_v_f32mf2_m

#define vlsseg8e32_v_f32mf2_m ( ... ) __riscv_vlsseg8e32_v_f32mf2_tumu(__VA_ARGS__)

◆ vlsseg8e32_v_i32m1

#define vlsseg8e32_v_i32m1 ( ... ) __riscv_vlsseg8e32_v_i32m1(__VA_ARGS__)

◆ vlsseg8e32_v_i32m1_m

#define vlsseg8e32_v_i32m1_m ( ... ) __riscv_vlsseg8e32_v_i32m1_tumu(__VA_ARGS__)

◆ vlsseg8e32_v_i32mf2

#define vlsseg8e32_v_i32mf2 ( ... ) __riscv_vlsseg8e32_v_i32mf2(__VA_ARGS__)

◆ vlsseg8e32_v_i32mf2_m

#define vlsseg8e32_v_i32mf2_m ( ... ) __riscv_vlsseg8e32_v_i32mf2_tumu(__VA_ARGS__)

◆ vlsseg8e32_v_u32m1

#define vlsseg8e32_v_u32m1 ( ... ) __riscv_vlsseg8e32_v_u32m1(__VA_ARGS__)

◆ vlsseg8e32_v_u32m1_m

#define vlsseg8e32_v_u32m1_m ( ... ) __riscv_vlsseg8e32_v_u32m1_tumu(__VA_ARGS__)

◆ vlsseg8e32_v_u32mf2

#define vlsseg8e32_v_u32mf2 ( ... ) __riscv_vlsseg8e32_v_u32mf2(__VA_ARGS__)

◆ vlsseg8e32_v_u32mf2_m

#define vlsseg8e32_v_u32mf2_m ( ... ) __riscv_vlsseg8e32_v_u32mf2_tumu(__VA_ARGS__)

◆ vlsseg8e64_v_f64m1

#define vlsseg8e64_v_f64m1 ( ... ) __riscv_vlsseg8e64_v_f64m1(__VA_ARGS__)

◆ vlsseg8e64_v_f64m1_m

#define vlsseg8e64_v_f64m1_m ( ... ) __riscv_vlsseg8e64_v_f64m1_tumu(__VA_ARGS__)

◆ vlsseg8e64_v_i64m1

#define vlsseg8e64_v_i64m1 ( ... ) __riscv_vlsseg8e64_v_i64m1(__VA_ARGS__)

◆ vlsseg8e64_v_i64m1_m

#define vlsseg8e64_v_i64m1_m ( ... ) __riscv_vlsseg8e64_v_i64m1_tumu(__VA_ARGS__)

◆ vlsseg8e64_v_u64m1

#define vlsseg8e64_v_u64m1 ( ... ) __riscv_vlsseg8e64_v_u64m1(__VA_ARGS__)

◆ vlsseg8e64_v_u64m1_m

#define vlsseg8e64_v_u64m1_m ( ... ) __riscv_vlsseg8e64_v_u64m1_tumu(__VA_ARGS__)

◆ vlsseg8e8_v_i8m1

#define vlsseg8e8_v_i8m1 ( ... ) __riscv_vlsseg8e8_v_i8m1(__VA_ARGS__)

◆ vlsseg8e8_v_i8m1_m

#define vlsseg8e8_v_i8m1_m ( ... ) __riscv_vlsseg8e8_v_i8m1_tumu(__VA_ARGS__)

◆ vlsseg8e8_v_i8mf2

#define vlsseg8e8_v_i8mf2 ( ... ) __riscv_vlsseg8e8_v_i8mf2(__VA_ARGS__)

◆ vlsseg8e8_v_i8mf2_m

#define vlsseg8e8_v_i8mf2_m ( ... ) __riscv_vlsseg8e8_v_i8mf2_tumu(__VA_ARGS__)

◆ vlsseg8e8_v_i8mf4

#define vlsseg8e8_v_i8mf4 ( ... ) __riscv_vlsseg8e8_v_i8mf4(__VA_ARGS__)

◆ vlsseg8e8_v_i8mf4_m

#define vlsseg8e8_v_i8mf4_m ( ... ) __riscv_vlsseg8e8_v_i8mf4_tumu(__VA_ARGS__)

◆ vlsseg8e8_v_i8mf8

#define vlsseg8e8_v_i8mf8 ( ... ) __riscv_vlsseg8e8_v_i8mf8(__VA_ARGS__)

◆ vlsseg8e8_v_i8mf8_m

#define vlsseg8e8_v_i8mf8_m ( ... ) __riscv_vlsseg8e8_v_i8mf8_tumu(__VA_ARGS__)

◆ vlsseg8e8_v_u8m1

#define vlsseg8e8_v_u8m1 ( ... ) __riscv_vlsseg8e8_v_u8m1(__VA_ARGS__)

◆ vlsseg8e8_v_u8m1_m

#define vlsseg8e8_v_u8m1_m ( ... ) __riscv_vlsseg8e8_v_u8m1_tumu(__VA_ARGS__)

◆ vlsseg8e8_v_u8mf2

#define vlsseg8e8_v_u8mf2 ( ... ) __riscv_vlsseg8e8_v_u8mf2(__VA_ARGS__)

◆ vlsseg8e8_v_u8mf2_m

#define vlsseg8e8_v_u8mf2_m ( ... ) __riscv_vlsseg8e8_v_u8mf2_tumu(__VA_ARGS__)

◆ vlsseg8e8_v_u8mf4

#define vlsseg8e8_v_u8mf4 ( ... ) __riscv_vlsseg8e8_v_u8mf4(__VA_ARGS__)

◆ vlsseg8e8_v_u8mf4_m

#define vlsseg8e8_v_u8mf4_m ( ... ) __riscv_vlsseg8e8_v_u8mf4_tumu(__VA_ARGS__)

◆ vlsseg8e8_v_u8mf8

#define vlsseg8e8_v_u8mf8 ( ... ) __riscv_vlsseg8e8_v_u8mf8(__VA_ARGS__)

◆ vlsseg8e8_v_u8mf8_m

#define vlsseg8e8_v_u8mf8_m ( ... ) __riscv_vlsseg8e8_v_u8mf8_tumu(__VA_ARGS__)

◆ vluxei16_v_f16m1

#define vluxei16_v_f16m1 ( ... ) __riscv_vluxei16_v_f16m1(__VA_ARGS__)

◆ vluxei16_v_f16m1_m

#define vluxei16_v_f16m1_m ( ... ) __riscv_vluxei16_v_f16m1_tumu(__VA_ARGS__)

◆ vluxei16_v_f16m2

#define vluxei16_v_f16m2 ( ... ) __riscv_vluxei16_v_f16m2(__VA_ARGS__)

◆ vluxei16_v_f16m2_m

#define vluxei16_v_f16m2_m ( ... ) __riscv_vluxei16_v_f16m2_tumu(__VA_ARGS__)

◆ vluxei16_v_f16m4

#define vluxei16_v_f16m4 ( ... ) __riscv_vluxei16_v_f16m4(__VA_ARGS__)

◆ vluxei16_v_f16m4_m

#define vluxei16_v_f16m4_m ( ... ) __riscv_vluxei16_v_f16m4_tumu(__VA_ARGS__)

◆ vluxei16_v_f16m8

#define vluxei16_v_f16m8 ( ... ) __riscv_vluxei16_v_f16m8(__VA_ARGS__)

◆ vluxei16_v_f16m8_m

#define vluxei16_v_f16m8_m ( ... ) __riscv_vluxei16_v_f16m8_tumu(__VA_ARGS__)

◆ vluxei16_v_f16mf2

#define vluxei16_v_f16mf2 ( ... ) __riscv_vluxei16_v_f16mf2(__VA_ARGS__)

◆ vluxei16_v_f16mf2_m

#define vluxei16_v_f16mf2_m ( ... ) __riscv_vluxei16_v_f16mf2_tumu(__VA_ARGS__)

◆ vluxei16_v_f16mf4

#define vluxei16_v_f16mf4 ( ... ) __riscv_vluxei16_v_f16mf4(__VA_ARGS__)

◆ vluxei16_v_f16mf4_m

#define vluxei16_v_f16mf4_m ( ... ) __riscv_vluxei16_v_f16mf4_tumu(__VA_ARGS__)

◆ vluxei16_v_f32m1

#define vluxei16_v_f32m1 ( ... ) __riscv_vluxei16_v_f32m1(__VA_ARGS__)

◆ vluxei16_v_f32m1_m

#define vluxei16_v_f32m1_m ( ... ) __riscv_vluxei16_v_f32m1_tumu(__VA_ARGS__)

◆ vluxei16_v_f32m2

#define vluxei16_v_f32m2 ( ... ) __riscv_vluxei16_v_f32m2(__VA_ARGS__)

◆ vluxei16_v_f32m2_m

#define vluxei16_v_f32m2_m ( ... ) __riscv_vluxei16_v_f32m2_tumu(__VA_ARGS__)

◆ vluxei16_v_f32m4

#define vluxei16_v_f32m4 ( ... ) __riscv_vluxei16_v_f32m4(__VA_ARGS__)

◆ vluxei16_v_f32m4_m

#define vluxei16_v_f32m4_m ( ... ) __riscv_vluxei16_v_f32m4_tumu(__VA_ARGS__)

◆ vluxei16_v_f32m8

#define vluxei16_v_f32m8 ( ... ) __riscv_vluxei16_v_f32m8(__VA_ARGS__)

◆ vluxei16_v_f32m8_m

#define vluxei16_v_f32m8_m ( ... ) __riscv_vluxei16_v_f32m8_tumu(__VA_ARGS__)

◆ vluxei16_v_f32mf2

#define vluxei16_v_f32mf2 ( ... ) __riscv_vluxei16_v_f32mf2(__VA_ARGS__)

◆ vluxei16_v_f32mf2_m

#define vluxei16_v_f32mf2_m ( ... ) __riscv_vluxei16_v_f32mf2_tumu(__VA_ARGS__)

◆ vluxei16_v_f64m1

#define vluxei16_v_f64m1 ( ... ) __riscv_vluxei16_v_f64m1(__VA_ARGS__)

◆ vluxei16_v_f64m1_m

#define vluxei16_v_f64m1_m ( ... ) __riscv_vluxei16_v_f64m1_tumu(__VA_ARGS__)

◆ vluxei16_v_f64m2

#define vluxei16_v_f64m2 ( ... ) __riscv_vluxei16_v_f64m2(__VA_ARGS__)

◆ vluxei16_v_f64m2_m

#define vluxei16_v_f64m2_m ( ... ) __riscv_vluxei16_v_f64m2_tumu(__VA_ARGS__)

◆ vluxei16_v_f64m4

#define vluxei16_v_f64m4 ( ... ) __riscv_vluxei16_v_f64m4(__VA_ARGS__)

◆ vluxei16_v_f64m4_m

#define vluxei16_v_f64m4_m ( ... ) __riscv_vluxei16_v_f64m4_tumu(__VA_ARGS__)

◆ vluxei16_v_f64m8

#define vluxei16_v_f64m8 ( ... ) __riscv_vluxei16_v_f64m8(__VA_ARGS__)

◆ vluxei16_v_f64m8_m

#define vluxei16_v_f64m8_m ( ... ) __riscv_vluxei16_v_f64m8_tumu(__VA_ARGS__)

◆ vluxei16_v_i16m1

#define vluxei16_v_i16m1 ( ... ) __riscv_vluxei16_v_i16m1(__VA_ARGS__)

◆ vluxei16_v_i16m1_m

#define vluxei16_v_i16m1_m ( ... ) __riscv_vluxei16_v_i16m1_tumu(__VA_ARGS__)

◆ vluxei16_v_i16m2

#define vluxei16_v_i16m2 ( ... ) __riscv_vluxei16_v_i16m2(__VA_ARGS__)

◆ vluxei16_v_i16m2_m

#define vluxei16_v_i16m2_m ( ... ) __riscv_vluxei16_v_i16m2_tumu(__VA_ARGS__)

◆ vluxei16_v_i16m4

#define vluxei16_v_i16m4 ( ... ) __riscv_vluxei16_v_i16m4(__VA_ARGS__)

◆ vluxei16_v_i16m4_m

#define vluxei16_v_i16m4_m ( ... ) __riscv_vluxei16_v_i16m4_tumu(__VA_ARGS__)

◆ vluxei16_v_i16m8

#define vluxei16_v_i16m8 ( ... ) __riscv_vluxei16_v_i16m8(__VA_ARGS__)

◆ vluxei16_v_i16m8_m

#define vluxei16_v_i16m8_m ( ... ) __riscv_vluxei16_v_i16m8_tumu(__VA_ARGS__)

◆ vluxei16_v_i16mf2

#define vluxei16_v_i16mf2 ( ... ) __riscv_vluxei16_v_i16mf2(__VA_ARGS__)

◆ vluxei16_v_i16mf2_m

#define vluxei16_v_i16mf2_m ( ... ) __riscv_vluxei16_v_i16mf2_tumu(__VA_ARGS__)

◆ vluxei16_v_i16mf4

#define vluxei16_v_i16mf4 ( ... ) __riscv_vluxei16_v_i16mf4(__VA_ARGS__)

◆ vluxei16_v_i16mf4_m

#define vluxei16_v_i16mf4_m ( ... ) __riscv_vluxei16_v_i16mf4_tumu(__VA_ARGS__)

◆ vluxei16_v_i32m1

#define vluxei16_v_i32m1 ( ... ) __riscv_vluxei16_v_i32m1(__VA_ARGS__)

◆ vluxei16_v_i32m1_m

#define vluxei16_v_i32m1_m ( ... ) __riscv_vluxei16_v_i32m1_tumu(__VA_ARGS__)

◆ vluxei16_v_i32m2

#define vluxei16_v_i32m2 ( ... ) __riscv_vluxei16_v_i32m2(__VA_ARGS__)

◆ vluxei16_v_i32m2_m

#define vluxei16_v_i32m2_m ( ... ) __riscv_vluxei16_v_i32m2_tumu(__VA_ARGS__)

◆ vluxei16_v_i32m4

#define vluxei16_v_i32m4 ( ... ) __riscv_vluxei16_v_i32m4(__VA_ARGS__)

◆ vluxei16_v_i32m4_m

#define vluxei16_v_i32m4_m ( ... ) __riscv_vluxei16_v_i32m4_tumu(__VA_ARGS__)

◆ vluxei16_v_i32m8

#define vluxei16_v_i32m8 ( ... ) __riscv_vluxei16_v_i32m8(__VA_ARGS__)

◆ vluxei16_v_i32m8_m

#define vluxei16_v_i32m8_m ( ... ) __riscv_vluxei16_v_i32m8_tumu(__VA_ARGS__)

◆ vluxei16_v_i32mf2

#define vluxei16_v_i32mf2 ( ... ) __riscv_vluxei16_v_i32mf2(__VA_ARGS__)

◆ vluxei16_v_i32mf2_m

#define vluxei16_v_i32mf2_m ( ... ) __riscv_vluxei16_v_i32mf2_tumu(__VA_ARGS__)

◆ vluxei16_v_i64m1

#define vluxei16_v_i64m1 ( ... ) __riscv_vluxei16_v_i64m1(__VA_ARGS__)

◆ vluxei16_v_i64m1_m

#define vluxei16_v_i64m1_m ( ... ) __riscv_vluxei16_v_i64m1_tumu(__VA_ARGS__)

◆ vluxei16_v_i64m2

#define vluxei16_v_i64m2 ( ... ) __riscv_vluxei16_v_i64m2(__VA_ARGS__)

◆ vluxei16_v_i64m2_m

#define vluxei16_v_i64m2_m ( ... ) __riscv_vluxei16_v_i64m2_tumu(__VA_ARGS__)

◆ vluxei16_v_i64m4

#define vluxei16_v_i64m4 ( ... ) __riscv_vluxei16_v_i64m4(__VA_ARGS__)

◆ vluxei16_v_i64m4_m

#define vluxei16_v_i64m4_m ( ... ) __riscv_vluxei16_v_i64m4_tumu(__VA_ARGS__)

◆ vluxei16_v_i64m8

#define vluxei16_v_i64m8 ( ... ) __riscv_vluxei16_v_i64m8(__VA_ARGS__)

◆ vluxei16_v_i64m8_m

#define vluxei16_v_i64m8_m ( ... ) __riscv_vluxei16_v_i64m8_tumu(__VA_ARGS__)

◆ vluxei16_v_i8m1

#define vluxei16_v_i8m1 ( ... ) __riscv_vluxei16_v_i8m1(__VA_ARGS__)

◆ vluxei16_v_i8m1_m

#define vluxei16_v_i8m1_m ( ... ) __riscv_vluxei16_v_i8m1_tumu(__VA_ARGS__)

◆ vluxei16_v_i8m2

#define vluxei16_v_i8m2 ( ... ) __riscv_vluxei16_v_i8m2(__VA_ARGS__)

◆ vluxei16_v_i8m2_m

#define vluxei16_v_i8m2_m ( ... ) __riscv_vluxei16_v_i8m2_tumu(__VA_ARGS__)

◆ vluxei16_v_i8m4

#define vluxei16_v_i8m4 ( ... ) __riscv_vluxei16_v_i8m4(__VA_ARGS__)

◆ vluxei16_v_i8m4_m

#define vluxei16_v_i8m4_m ( ... ) __riscv_vluxei16_v_i8m4_tumu(__VA_ARGS__)

◆ vluxei16_v_i8mf2

#define vluxei16_v_i8mf2 ( ... ) __riscv_vluxei16_v_i8mf2(__VA_ARGS__)

◆ vluxei16_v_i8mf2_m

#define vluxei16_v_i8mf2_m ( ... ) __riscv_vluxei16_v_i8mf2_tumu(__VA_ARGS__)

◆ vluxei16_v_i8mf4

#define vluxei16_v_i8mf4 ( ... ) __riscv_vluxei16_v_i8mf4(__VA_ARGS__)

◆ vluxei16_v_i8mf4_m

#define vluxei16_v_i8mf4_m ( ... ) __riscv_vluxei16_v_i8mf4_tumu(__VA_ARGS__)

◆ vluxei16_v_i8mf8

#define vluxei16_v_i8mf8 ( ... ) __riscv_vluxei16_v_i8mf8(__VA_ARGS__)

◆ vluxei16_v_i8mf8_m

#define vluxei16_v_i8mf8_m ( ... ) __riscv_vluxei16_v_i8mf8_tumu(__VA_ARGS__)

◆ vluxei16_v_u16m1

#define vluxei16_v_u16m1 ( ... ) __riscv_vluxei16_v_u16m1(__VA_ARGS__)

◆ vluxei16_v_u16m1_m

#define vluxei16_v_u16m1_m ( ... ) __riscv_vluxei16_v_u16m1_tumu(__VA_ARGS__)

◆ vluxei16_v_u16m2

#define vluxei16_v_u16m2 ( ... ) __riscv_vluxei16_v_u16m2(__VA_ARGS__)

◆ vluxei16_v_u16m2_m

#define vluxei16_v_u16m2_m ( ... ) __riscv_vluxei16_v_u16m2_tumu(__VA_ARGS__)

◆ vluxei16_v_u16m4

#define vluxei16_v_u16m4 ( ... ) __riscv_vluxei16_v_u16m4(__VA_ARGS__)

◆ vluxei16_v_u16m4_m

#define vluxei16_v_u16m4_m ( ... ) __riscv_vluxei16_v_u16m4_tumu(__VA_ARGS__)

◆ vluxei16_v_u16m8

#define vluxei16_v_u16m8 ( ... ) __riscv_vluxei16_v_u16m8(__VA_ARGS__)

◆ vluxei16_v_u16m8_m

#define vluxei16_v_u16m8_m ( ... ) __riscv_vluxei16_v_u16m8_tumu(__VA_ARGS__)

◆ vluxei16_v_u16mf2

#define vluxei16_v_u16mf2 ( ... ) __riscv_vluxei16_v_u16mf2(__VA_ARGS__)

◆ vluxei16_v_u16mf2_m

#define vluxei16_v_u16mf2_m ( ... ) __riscv_vluxei16_v_u16mf2_tumu(__VA_ARGS__)

◆ vluxei16_v_u16mf4

#define vluxei16_v_u16mf4 ( ... ) __riscv_vluxei16_v_u16mf4(__VA_ARGS__)

◆ vluxei16_v_u16mf4_m

#define vluxei16_v_u16mf4_m ( ... ) __riscv_vluxei16_v_u16mf4_tumu(__VA_ARGS__)

◆ vluxei16_v_u32m1

#define vluxei16_v_u32m1 ( ... ) __riscv_vluxei16_v_u32m1(__VA_ARGS__)

◆ vluxei16_v_u32m1_m

#define vluxei16_v_u32m1_m ( ... ) __riscv_vluxei16_v_u32m1_tumu(__VA_ARGS__)

◆ vluxei16_v_u32m2

#define vluxei16_v_u32m2 ( ... ) __riscv_vluxei16_v_u32m2(__VA_ARGS__)

◆ vluxei16_v_u32m2_m

#define vluxei16_v_u32m2_m ( ... ) __riscv_vluxei16_v_u32m2_tumu(__VA_ARGS__)

◆ vluxei16_v_u32m4

#define vluxei16_v_u32m4 ( ... ) __riscv_vluxei16_v_u32m4(__VA_ARGS__)

◆ vluxei16_v_u32m4_m

#define vluxei16_v_u32m4_m ( ... ) __riscv_vluxei16_v_u32m4_tumu(__VA_ARGS__)

◆ vluxei16_v_u32m8

#define vluxei16_v_u32m8 ( ... ) __riscv_vluxei16_v_u32m8(__VA_ARGS__)

◆ vluxei16_v_u32m8_m

#define vluxei16_v_u32m8_m ( ... ) __riscv_vluxei16_v_u32m8_tumu(__VA_ARGS__)

◆ vluxei16_v_u32mf2

#define vluxei16_v_u32mf2 ( ... ) __riscv_vluxei16_v_u32mf2(__VA_ARGS__)

◆ vluxei16_v_u32mf2_m

#define vluxei16_v_u32mf2_m ( ... ) __riscv_vluxei16_v_u32mf2_tumu(__VA_ARGS__)

◆ vluxei16_v_u64m1

#define vluxei16_v_u64m1 ( ... ) __riscv_vluxei16_v_u64m1(__VA_ARGS__)

◆ vluxei16_v_u64m1_m

#define vluxei16_v_u64m1_m ( ... ) __riscv_vluxei16_v_u64m1_tumu(__VA_ARGS__)

◆ vluxei16_v_u64m2

#define vluxei16_v_u64m2 ( ... ) __riscv_vluxei16_v_u64m2(__VA_ARGS__)

◆ vluxei16_v_u64m2_m

#define vluxei16_v_u64m2_m ( ... ) __riscv_vluxei16_v_u64m2_tumu(__VA_ARGS__)

◆ vluxei16_v_u64m4

#define vluxei16_v_u64m4 ( ... ) __riscv_vluxei16_v_u64m4(__VA_ARGS__)

◆ vluxei16_v_u64m4_m

#define vluxei16_v_u64m4_m ( ... ) __riscv_vluxei16_v_u64m4_tumu(__VA_ARGS__)

◆ vluxei16_v_u64m8

#define vluxei16_v_u64m8 ( ... ) __riscv_vluxei16_v_u64m8(__VA_ARGS__)

◆ vluxei16_v_u64m8_m

#define vluxei16_v_u64m8_m ( ... ) __riscv_vluxei16_v_u64m8_tumu(__VA_ARGS__)

◆ vluxei16_v_u8m1

#define vluxei16_v_u8m1 ( ... ) __riscv_vluxei16_v_u8m1(__VA_ARGS__)

◆ vluxei16_v_u8m1_m

#define vluxei16_v_u8m1_m ( ... ) __riscv_vluxei16_v_u8m1_tumu(__VA_ARGS__)

◆ vluxei16_v_u8m2

#define vluxei16_v_u8m2 ( ... ) __riscv_vluxei16_v_u8m2(__VA_ARGS__)

◆ vluxei16_v_u8m2_m

#define vluxei16_v_u8m2_m ( ... ) __riscv_vluxei16_v_u8m2_tumu(__VA_ARGS__)

◆ vluxei16_v_u8m4

#define vluxei16_v_u8m4 ( ... ) __riscv_vluxei16_v_u8m4(__VA_ARGS__)

◆ vluxei16_v_u8m4_m

#define vluxei16_v_u8m4_m ( ... ) __riscv_vluxei16_v_u8m4_tumu(__VA_ARGS__)

◆ vluxei16_v_u8mf2

#define vluxei16_v_u8mf2 ( ... ) __riscv_vluxei16_v_u8mf2(__VA_ARGS__)

◆ vluxei16_v_u8mf2_m

#define vluxei16_v_u8mf2_m ( ... ) __riscv_vluxei16_v_u8mf2_tumu(__VA_ARGS__)

◆ vluxei16_v_u8mf4

#define vluxei16_v_u8mf4 ( ... ) __riscv_vluxei16_v_u8mf4(__VA_ARGS__)

◆ vluxei16_v_u8mf4_m

#define vluxei16_v_u8mf4_m ( ... ) __riscv_vluxei16_v_u8mf4_tumu(__VA_ARGS__)

◆ vluxei16_v_u8mf8

#define vluxei16_v_u8mf8 ( ... ) __riscv_vluxei16_v_u8mf8(__VA_ARGS__)

◆ vluxei16_v_u8mf8_m

#define vluxei16_v_u8mf8_m ( ... ) __riscv_vluxei16_v_u8mf8_tumu(__VA_ARGS__)

◆ vluxei32_v_f16m1

#define vluxei32_v_f16m1 ( ... ) __riscv_vluxei32_v_f16m1(__VA_ARGS__)

◆ vluxei32_v_f16m1_m

#define vluxei32_v_f16m1_m ( ... ) __riscv_vluxei32_v_f16m1_tumu(__VA_ARGS__)

◆ vluxei32_v_f16m2

#define vluxei32_v_f16m2 ( ... ) __riscv_vluxei32_v_f16m2(__VA_ARGS__)

◆ vluxei32_v_f16m2_m

#define vluxei32_v_f16m2_m ( ... ) __riscv_vluxei32_v_f16m2_tumu(__VA_ARGS__)

◆ vluxei32_v_f16m4

#define vluxei32_v_f16m4 ( ... ) __riscv_vluxei32_v_f16m4(__VA_ARGS__)

◆ vluxei32_v_f16m4_m

#define vluxei32_v_f16m4_m ( ... ) __riscv_vluxei32_v_f16m4_tumu(__VA_ARGS__)

◆ vluxei32_v_f16mf2

#define vluxei32_v_f16mf2 ( ... ) __riscv_vluxei32_v_f16mf2(__VA_ARGS__)

◆ vluxei32_v_f16mf2_m

#define vluxei32_v_f16mf2_m ( ... ) __riscv_vluxei32_v_f16mf2_tumu(__VA_ARGS__)

◆ vluxei32_v_f16mf4

#define vluxei32_v_f16mf4 ( ... ) __riscv_vluxei32_v_f16mf4(__VA_ARGS__)

◆ vluxei32_v_f16mf4_m

#define vluxei32_v_f16mf4_m ( ... ) __riscv_vluxei32_v_f16mf4_tumu(__VA_ARGS__)

◆ vluxei32_v_f32m1

#define vluxei32_v_f32m1 ( ... ) __riscv_vluxei32_v_f32m1(__VA_ARGS__)

◆ vluxei32_v_f32m1_m

#define vluxei32_v_f32m1_m ( ... ) __riscv_vluxei32_v_f32m1_tumu(__VA_ARGS__)

◆ vluxei32_v_f32m2

#define vluxei32_v_f32m2 ( ... ) __riscv_vluxei32_v_f32m2(__VA_ARGS__)

◆ vluxei32_v_f32m2_m

#define vluxei32_v_f32m2_m ( ... ) __riscv_vluxei32_v_f32m2_tumu(__VA_ARGS__)

◆ vluxei32_v_f32m4

#define vluxei32_v_f32m4 ( ... ) __riscv_vluxei32_v_f32m4(__VA_ARGS__)

◆ vluxei32_v_f32m4_m

#define vluxei32_v_f32m4_m ( ... ) __riscv_vluxei32_v_f32m4_tumu(__VA_ARGS__)

◆ vluxei32_v_f32m8

#define vluxei32_v_f32m8 ( ... ) __riscv_vluxei32_v_f32m8(__VA_ARGS__)

◆ vluxei32_v_f32m8_m

#define vluxei32_v_f32m8_m ( ... ) __riscv_vluxei32_v_f32m8_tumu(__VA_ARGS__)

◆ vluxei32_v_f32mf2

#define vluxei32_v_f32mf2 ( ... ) __riscv_vluxei32_v_f32mf2(__VA_ARGS__)

◆ vluxei32_v_f32mf2_m

#define vluxei32_v_f32mf2_m ( ... ) __riscv_vluxei32_v_f32mf2_tumu(__VA_ARGS__)

◆ vluxei32_v_f64m1

#define vluxei32_v_f64m1 ( ... ) __riscv_vluxei32_v_f64m1(__VA_ARGS__)

◆ vluxei32_v_f64m1_m

#define vluxei32_v_f64m1_m ( ... ) __riscv_vluxei32_v_f64m1_tumu(__VA_ARGS__)

◆ vluxei32_v_f64m2

#define vluxei32_v_f64m2 ( ... ) __riscv_vluxei32_v_f64m2(__VA_ARGS__)

◆ vluxei32_v_f64m2_m

#define vluxei32_v_f64m2_m ( ... ) __riscv_vluxei32_v_f64m2_tumu(__VA_ARGS__)

◆ vluxei32_v_f64m4

#define vluxei32_v_f64m4 ( ... ) __riscv_vluxei32_v_f64m4(__VA_ARGS__)

◆ vluxei32_v_f64m4_m

#define vluxei32_v_f64m4_m ( ... ) __riscv_vluxei32_v_f64m4_tumu(__VA_ARGS__)

◆ vluxei32_v_f64m8

#define vluxei32_v_f64m8 ( ... ) __riscv_vluxei32_v_f64m8(__VA_ARGS__)

◆ vluxei32_v_f64m8_m

#define vluxei32_v_f64m8_m ( ... ) __riscv_vluxei32_v_f64m8_tumu(__VA_ARGS__)

◆ vluxei32_v_i16m1

#define vluxei32_v_i16m1 ( ... ) __riscv_vluxei32_v_i16m1(__VA_ARGS__)

◆ vluxei32_v_i16m1_m

#define vluxei32_v_i16m1_m ( ... ) __riscv_vluxei32_v_i16m1_tumu(__VA_ARGS__)

◆ vluxei32_v_i16m2

#define vluxei32_v_i16m2 ( ... ) __riscv_vluxei32_v_i16m2(__VA_ARGS__)

◆ vluxei32_v_i16m2_m

#define vluxei32_v_i16m2_m ( ... ) __riscv_vluxei32_v_i16m2_tumu(__VA_ARGS__)

◆ vluxei32_v_i16m4

#define vluxei32_v_i16m4 ( ... ) __riscv_vluxei32_v_i16m4(__VA_ARGS__)

◆ vluxei32_v_i16m4_m

#define vluxei32_v_i16m4_m ( ... ) __riscv_vluxei32_v_i16m4_tumu(__VA_ARGS__)

◆ vluxei32_v_i16mf2

#define vluxei32_v_i16mf2 ( ... ) __riscv_vluxei32_v_i16mf2(__VA_ARGS__)

◆ vluxei32_v_i16mf2_m

#define vluxei32_v_i16mf2_m ( ... ) __riscv_vluxei32_v_i16mf2_tumu(__VA_ARGS__)

◆ vluxei32_v_i16mf4

#define vluxei32_v_i16mf4 ( ... ) __riscv_vluxei32_v_i16mf4(__VA_ARGS__)

◆ vluxei32_v_i16mf4_m

#define vluxei32_v_i16mf4_m ( ... ) __riscv_vluxei32_v_i16mf4_tumu(__VA_ARGS__)

◆ vluxei32_v_i32m1

#define vluxei32_v_i32m1 ( ... ) __riscv_vluxei32_v_i32m1(__VA_ARGS__)

◆ vluxei32_v_i32m1_m

#define vluxei32_v_i32m1_m ( ... ) __riscv_vluxei32_v_i32m1_tumu(__VA_ARGS__)

◆ vluxei32_v_i32m2

#define vluxei32_v_i32m2 ( ... ) __riscv_vluxei32_v_i32m2(__VA_ARGS__)

◆ vluxei32_v_i32m2_m

#define vluxei32_v_i32m2_m ( ... ) __riscv_vluxei32_v_i32m2_tumu(__VA_ARGS__)

◆ vluxei32_v_i32m4

#define vluxei32_v_i32m4 ( ... ) __riscv_vluxei32_v_i32m4(__VA_ARGS__)

◆ vluxei32_v_i32m4_m

#define vluxei32_v_i32m4_m ( ... ) __riscv_vluxei32_v_i32m4_tumu(__VA_ARGS__)

◆ vluxei32_v_i32m8

#define vluxei32_v_i32m8 ( ... ) __riscv_vluxei32_v_i32m8(__VA_ARGS__)

◆ vluxei32_v_i32m8_m

#define vluxei32_v_i32m8_m ( ... ) __riscv_vluxei32_v_i32m8_tumu(__VA_ARGS__)

◆ vluxei32_v_i32mf2

#define vluxei32_v_i32mf2 ( ... ) __riscv_vluxei32_v_i32mf2(__VA_ARGS__)

◆ vluxei32_v_i32mf2_m

#define vluxei32_v_i32mf2_m ( ... ) __riscv_vluxei32_v_i32mf2_tumu(__VA_ARGS__)

◆ vluxei32_v_i64m1

#define vluxei32_v_i64m1 ( ... ) __riscv_vluxei32_v_i64m1(__VA_ARGS__)

◆ vluxei32_v_i64m1_m

#define vluxei32_v_i64m1_m ( ... ) __riscv_vluxei32_v_i64m1_tumu(__VA_ARGS__)

◆ vluxei32_v_i64m2

#define vluxei32_v_i64m2 ( ... ) __riscv_vluxei32_v_i64m2(__VA_ARGS__)

◆ vluxei32_v_i64m2_m

#define vluxei32_v_i64m2_m ( ... ) __riscv_vluxei32_v_i64m2_tumu(__VA_ARGS__)

◆ vluxei32_v_i64m4

#define vluxei32_v_i64m4 ( ... ) __riscv_vluxei32_v_i64m4(__VA_ARGS__)

◆ vluxei32_v_i64m4_m

#define vluxei32_v_i64m4_m ( ... ) __riscv_vluxei32_v_i64m4_tumu(__VA_ARGS__)

◆ vluxei32_v_i64m8

#define vluxei32_v_i64m8 ( ... ) __riscv_vluxei32_v_i64m8(__VA_ARGS__)

◆ vluxei32_v_i64m8_m

#define vluxei32_v_i64m8_m ( ... ) __riscv_vluxei32_v_i64m8_tumu(__VA_ARGS__)

◆ vluxei32_v_i8m1

#define vluxei32_v_i8m1 ( ... ) __riscv_vluxei32_v_i8m1(__VA_ARGS__)

◆ vluxei32_v_i8m1_m

#define vluxei32_v_i8m1_m ( ... ) __riscv_vluxei32_v_i8m1_tumu(__VA_ARGS__)

◆ vluxei32_v_i8m2

#define vluxei32_v_i8m2 ( ... ) __riscv_vluxei32_v_i8m2(__VA_ARGS__)

◆ vluxei32_v_i8m2_m

#define vluxei32_v_i8m2_m ( ... ) __riscv_vluxei32_v_i8m2_tumu(__VA_ARGS__)

◆ vluxei32_v_i8mf2

#define vluxei32_v_i8mf2 ( ... ) __riscv_vluxei32_v_i8mf2(__VA_ARGS__)

◆ vluxei32_v_i8mf2_m

#define vluxei32_v_i8mf2_m ( ... ) __riscv_vluxei32_v_i8mf2_tumu(__VA_ARGS__)

◆ vluxei32_v_i8mf4

#define vluxei32_v_i8mf4 ( ... ) __riscv_vluxei32_v_i8mf4(__VA_ARGS__)

◆ vluxei32_v_i8mf4_m

#define vluxei32_v_i8mf4_m ( ... ) __riscv_vluxei32_v_i8mf4_tumu(__VA_ARGS__)

◆ vluxei32_v_i8mf8

#define vluxei32_v_i8mf8 ( ... ) __riscv_vluxei32_v_i8mf8(__VA_ARGS__)

◆ vluxei32_v_i8mf8_m

#define vluxei32_v_i8mf8_m ( ... ) __riscv_vluxei32_v_i8mf8_tumu(__VA_ARGS__)

◆ vluxei32_v_u16m1

#define vluxei32_v_u16m1 ( ... ) __riscv_vluxei32_v_u16m1(__VA_ARGS__)

◆ vluxei32_v_u16m1_m

#define vluxei32_v_u16m1_m ( ... ) __riscv_vluxei32_v_u16m1_tumu(__VA_ARGS__)

◆ vluxei32_v_u16m2

#define vluxei32_v_u16m2 ( ... ) __riscv_vluxei32_v_u16m2(__VA_ARGS__)

◆ vluxei32_v_u16m2_m

#define vluxei32_v_u16m2_m ( ... ) __riscv_vluxei32_v_u16m2_tumu(__VA_ARGS__)

◆ vluxei32_v_u16m4

#define vluxei32_v_u16m4 ( ... ) __riscv_vluxei32_v_u16m4(__VA_ARGS__)

◆ vluxei32_v_u16m4_m

#define vluxei32_v_u16m4_m ( ... ) __riscv_vluxei32_v_u16m4_tumu(__VA_ARGS__)

◆ vluxei32_v_u16mf2

#define vluxei32_v_u16mf2 ( ... ) __riscv_vluxei32_v_u16mf2(__VA_ARGS__)

◆ vluxei32_v_u16mf2_m

#define vluxei32_v_u16mf2_m ( ... ) __riscv_vluxei32_v_u16mf2_tumu(__VA_ARGS__)

◆ vluxei32_v_u16mf4

#define vluxei32_v_u16mf4 ( ... ) __riscv_vluxei32_v_u16mf4(__VA_ARGS__)

◆ vluxei32_v_u16mf4_m

#define vluxei32_v_u16mf4_m ( ... ) __riscv_vluxei32_v_u16mf4_tumu(__VA_ARGS__)

◆ vluxei32_v_u32m1

#define vluxei32_v_u32m1 ( ... ) __riscv_vluxei32_v_u32m1(__VA_ARGS__)

◆ vluxei32_v_u32m1_m

#define vluxei32_v_u32m1_m ( ... ) __riscv_vluxei32_v_u32m1_tumu(__VA_ARGS__)

◆ vluxei32_v_u32m2

#define vluxei32_v_u32m2 ( ... ) __riscv_vluxei32_v_u32m2(__VA_ARGS__)

◆ vluxei32_v_u32m2_m

#define vluxei32_v_u32m2_m ( ... ) __riscv_vluxei32_v_u32m2_tumu(__VA_ARGS__)

◆ vluxei32_v_u32m4

#define vluxei32_v_u32m4 ( ... ) __riscv_vluxei32_v_u32m4(__VA_ARGS__)

◆ vluxei32_v_u32m4_m

#define vluxei32_v_u32m4_m ( ... ) __riscv_vluxei32_v_u32m4_tumu(__VA_ARGS__)

◆ vluxei32_v_u32m8

#define vluxei32_v_u32m8 ( ... ) __riscv_vluxei32_v_u32m8(__VA_ARGS__)

◆ vluxei32_v_u32m8_m

#define vluxei32_v_u32m8_m ( ... ) __riscv_vluxei32_v_u32m8_tumu(__VA_ARGS__)

◆ vluxei32_v_u32mf2

#define vluxei32_v_u32mf2 ( ... ) __riscv_vluxei32_v_u32mf2(__VA_ARGS__)

◆ vluxei32_v_u32mf2_m

#define vluxei32_v_u32mf2_m ( ... ) __riscv_vluxei32_v_u32mf2_tumu(__VA_ARGS__)

◆ vluxei32_v_u64m1

#define vluxei32_v_u64m1 ( ... ) __riscv_vluxei32_v_u64m1(__VA_ARGS__)

◆ vluxei32_v_u64m1_m

#define vluxei32_v_u64m1_m ( ... ) __riscv_vluxei32_v_u64m1_tumu(__VA_ARGS__)

◆ vluxei32_v_u64m2

#define vluxei32_v_u64m2 ( ... ) __riscv_vluxei32_v_u64m2(__VA_ARGS__)

◆ vluxei32_v_u64m2_m

#define vluxei32_v_u64m2_m ( ... ) __riscv_vluxei32_v_u64m2_tumu(__VA_ARGS__)

◆ vluxei32_v_u64m4

#define vluxei32_v_u64m4 ( ... ) __riscv_vluxei32_v_u64m4(__VA_ARGS__)

◆ vluxei32_v_u64m4_m

#define vluxei32_v_u64m4_m ( ... ) __riscv_vluxei32_v_u64m4_tumu(__VA_ARGS__)

◆ vluxei32_v_u64m8

#define vluxei32_v_u64m8 ( ... ) __riscv_vluxei32_v_u64m8(__VA_ARGS__)

◆ vluxei32_v_u64m8_m

#define vluxei32_v_u64m8_m ( ... ) __riscv_vluxei32_v_u64m8_tumu(__VA_ARGS__)

◆ vluxei32_v_u8m1

#define vluxei32_v_u8m1 ( ... ) __riscv_vluxei32_v_u8m1(__VA_ARGS__)

◆ vluxei32_v_u8m1_m

#define vluxei32_v_u8m1_m ( ... ) __riscv_vluxei32_v_u8m1_tumu(__VA_ARGS__)

◆ vluxei32_v_u8m2

#define vluxei32_v_u8m2 ( ... ) __riscv_vluxei32_v_u8m2(__VA_ARGS__)

◆ vluxei32_v_u8m2_m

#define vluxei32_v_u8m2_m ( ... ) __riscv_vluxei32_v_u8m2_tumu(__VA_ARGS__)

◆ vluxei32_v_u8mf2

#define vluxei32_v_u8mf2 ( ... ) __riscv_vluxei32_v_u8mf2(__VA_ARGS__)

◆ vluxei32_v_u8mf2_m

#define vluxei32_v_u8mf2_m ( ... ) __riscv_vluxei32_v_u8mf2_tumu(__VA_ARGS__)

◆ vluxei32_v_u8mf4

#define vluxei32_v_u8mf4 ( ... ) __riscv_vluxei32_v_u8mf4(__VA_ARGS__)

◆ vluxei32_v_u8mf4_m

#define vluxei32_v_u8mf4_m ( ... ) __riscv_vluxei32_v_u8mf4_tumu(__VA_ARGS__)

◆ vluxei32_v_u8mf8

#define vluxei32_v_u8mf8 ( ... ) __riscv_vluxei32_v_u8mf8(__VA_ARGS__)

◆ vluxei32_v_u8mf8_m

#define vluxei32_v_u8mf8_m ( ... ) __riscv_vluxei32_v_u8mf8_tumu(__VA_ARGS__)

◆ vluxei64_v_f16m1

#define vluxei64_v_f16m1 ( ... ) __riscv_vluxei64_v_f16m1(__VA_ARGS__)

◆ vluxei64_v_f16m1_m

#define vluxei64_v_f16m1_m ( ... ) __riscv_vluxei64_v_f16m1_tumu(__VA_ARGS__)

◆ vluxei64_v_f16m2

#define vluxei64_v_f16m2 ( ... ) __riscv_vluxei64_v_f16m2(__VA_ARGS__)

◆ vluxei64_v_f16m2_m

#define vluxei64_v_f16m2_m ( ... ) __riscv_vluxei64_v_f16m2_tumu(__VA_ARGS__)

◆ vluxei64_v_f16mf2

#define vluxei64_v_f16mf2 ( ... ) __riscv_vluxei64_v_f16mf2(__VA_ARGS__)

◆ vluxei64_v_f16mf2_m

#define vluxei64_v_f16mf2_m ( ... ) __riscv_vluxei64_v_f16mf2_tumu(__VA_ARGS__)

◆ vluxei64_v_f16mf4

#define vluxei64_v_f16mf4 ( ... ) __riscv_vluxei64_v_f16mf4(__VA_ARGS__)

◆ vluxei64_v_f16mf4_m

#define vluxei64_v_f16mf4_m ( ... ) __riscv_vluxei64_v_f16mf4_tumu(__VA_ARGS__)

◆ vluxei64_v_f32m1

#define vluxei64_v_f32m1 ( ... ) __riscv_vluxei64_v_f32m1(__VA_ARGS__)

◆ vluxei64_v_f32m1_m

#define vluxei64_v_f32m1_m ( ... ) __riscv_vluxei64_v_f32m1_tumu(__VA_ARGS__)

◆ vluxei64_v_f32m2

#define vluxei64_v_f32m2 ( ... ) __riscv_vluxei64_v_f32m2(__VA_ARGS__)

◆ vluxei64_v_f32m2_m

#define vluxei64_v_f32m2_m ( ... ) __riscv_vluxei64_v_f32m2_tumu(__VA_ARGS__)

◆ vluxei64_v_f32m4

#define vluxei64_v_f32m4 ( ... ) __riscv_vluxei64_v_f32m4(__VA_ARGS__)

◆ vluxei64_v_f32m4_m

#define vluxei64_v_f32m4_m ( ... ) __riscv_vluxei64_v_f32m4_tumu(__VA_ARGS__)

◆ vluxei64_v_f32mf2

#define vluxei64_v_f32mf2 ( ... ) __riscv_vluxei64_v_f32mf2(__VA_ARGS__)

◆ vluxei64_v_f32mf2_m

#define vluxei64_v_f32mf2_m ( ... ) __riscv_vluxei64_v_f32mf2_tumu(__VA_ARGS__)

◆ vluxei64_v_f64m1

#define vluxei64_v_f64m1 ( ... ) __riscv_vluxei64_v_f64m1(__VA_ARGS__)

◆ vluxei64_v_f64m1_m

#define vluxei64_v_f64m1_m ( ... ) __riscv_vluxei64_v_f64m1_tumu(__VA_ARGS__)

◆ vluxei64_v_f64m2

#define vluxei64_v_f64m2 ( ... ) __riscv_vluxei64_v_f64m2(__VA_ARGS__)

◆ vluxei64_v_f64m2_m

#define vluxei64_v_f64m2_m ( ... ) __riscv_vluxei64_v_f64m2_tumu(__VA_ARGS__)

◆ vluxei64_v_f64m4

#define vluxei64_v_f64m4 ( ... ) __riscv_vluxei64_v_f64m4(__VA_ARGS__)

◆ vluxei64_v_f64m4_m

#define vluxei64_v_f64m4_m ( ... ) __riscv_vluxei64_v_f64m4_tumu(__VA_ARGS__)

◆ vluxei64_v_f64m8

#define vluxei64_v_f64m8 ( ... ) __riscv_vluxei64_v_f64m8(__VA_ARGS__)

◆ vluxei64_v_f64m8_m

#define vluxei64_v_f64m8_m ( ... ) __riscv_vluxei64_v_f64m8_tumu(__VA_ARGS__)

◆ vluxei64_v_i16m1

#define vluxei64_v_i16m1 ( ... ) __riscv_vluxei64_v_i16m1(__VA_ARGS__)

◆ vluxei64_v_i16m1_m

#define vluxei64_v_i16m1_m ( ... ) __riscv_vluxei64_v_i16m1_tumu(__VA_ARGS__)

◆ vluxei64_v_i16m2

#define vluxei64_v_i16m2 ( ... ) __riscv_vluxei64_v_i16m2(__VA_ARGS__)

◆ vluxei64_v_i16m2_m

#define vluxei64_v_i16m2_m ( ... ) __riscv_vluxei64_v_i16m2_tumu(__VA_ARGS__)

◆ vluxei64_v_i16mf2

#define vluxei64_v_i16mf2 ( ... ) __riscv_vluxei64_v_i16mf2(__VA_ARGS__)

◆ vluxei64_v_i16mf2_m

#define vluxei64_v_i16mf2_m ( ... ) __riscv_vluxei64_v_i16mf2_tumu(__VA_ARGS__)

◆ vluxei64_v_i16mf4

#define vluxei64_v_i16mf4 ( ... ) __riscv_vluxei64_v_i16mf4(__VA_ARGS__)

◆ vluxei64_v_i16mf4_m

#define vluxei64_v_i16mf4_m ( ... ) __riscv_vluxei64_v_i16mf4_tumu(__VA_ARGS__)

◆ vluxei64_v_i32m1

#define vluxei64_v_i32m1 ( ... ) __riscv_vluxei64_v_i32m1(__VA_ARGS__)

◆ vluxei64_v_i32m1_m

#define vluxei64_v_i32m1_m ( ... ) __riscv_vluxei64_v_i32m1_tumu(__VA_ARGS__)

◆ vluxei64_v_i32m2

#define vluxei64_v_i32m2 ( ... ) __riscv_vluxei64_v_i32m2(__VA_ARGS__)

◆ vluxei64_v_i32m2_m

#define vluxei64_v_i32m2_m ( ... ) __riscv_vluxei64_v_i32m2_tumu(__VA_ARGS__)

◆ vluxei64_v_i32m4

#define vluxei64_v_i32m4 ( ... ) __riscv_vluxei64_v_i32m4(__VA_ARGS__)

◆ vluxei64_v_i32m4_m

#define vluxei64_v_i32m4_m ( ... ) __riscv_vluxei64_v_i32m4_tumu(__VA_ARGS__)

◆ vluxei64_v_i32mf2

#define vluxei64_v_i32mf2 ( ... ) __riscv_vluxei64_v_i32mf2(__VA_ARGS__)

◆ vluxei64_v_i32mf2_m

#define vluxei64_v_i32mf2_m ( ... ) __riscv_vluxei64_v_i32mf2_tumu(__VA_ARGS__)

◆ vluxei64_v_i64m1

#define vluxei64_v_i64m1 ( ... ) __riscv_vluxei64_v_i64m1(__VA_ARGS__)

◆ vluxei64_v_i64m1_m

#define vluxei64_v_i64m1_m ( ... ) __riscv_vluxei64_v_i64m1_tumu(__VA_ARGS__)

◆ vluxei64_v_i64m2

#define vluxei64_v_i64m2 ( ... ) __riscv_vluxei64_v_i64m2(__VA_ARGS__)

◆ vluxei64_v_i64m2_m

#define vluxei64_v_i64m2_m ( ... ) __riscv_vluxei64_v_i64m2_tumu(__VA_ARGS__)

◆ vluxei64_v_i64m4

#define vluxei64_v_i64m4 ( ... ) __riscv_vluxei64_v_i64m4(__VA_ARGS__)

◆ vluxei64_v_i64m4_m

#define vluxei64_v_i64m4_m ( ... ) __riscv_vluxei64_v_i64m4_tumu(__VA_ARGS__)

◆ vluxei64_v_i64m8

#define vluxei64_v_i64m8 ( ... ) __riscv_vluxei64_v_i64m8(__VA_ARGS__)

◆ vluxei64_v_i64m8_m

#define vluxei64_v_i64m8_m ( ... ) __riscv_vluxei64_v_i64m8_tumu(__VA_ARGS__)

◆ vluxei64_v_i8m1

#define vluxei64_v_i8m1 ( ... ) __riscv_vluxei64_v_i8m1(__VA_ARGS__)

◆ vluxei64_v_i8m1_m

#define vluxei64_v_i8m1_m ( ... ) __riscv_vluxei64_v_i8m1_tumu(__VA_ARGS__)

◆ vluxei64_v_i8mf2

#define vluxei64_v_i8mf2 ( ... ) __riscv_vluxei64_v_i8mf2(__VA_ARGS__)

◆ vluxei64_v_i8mf2_m

#define vluxei64_v_i8mf2_m ( ... ) __riscv_vluxei64_v_i8mf2_tumu(__VA_ARGS__)

◆ vluxei64_v_i8mf4

#define vluxei64_v_i8mf4 ( ... ) __riscv_vluxei64_v_i8mf4(__VA_ARGS__)

◆ vluxei64_v_i8mf4_m

#define vluxei64_v_i8mf4_m ( ... ) __riscv_vluxei64_v_i8mf4_tumu(__VA_ARGS__)

◆ vluxei64_v_i8mf8

#define vluxei64_v_i8mf8 ( ... ) __riscv_vluxei64_v_i8mf8(__VA_ARGS__)

◆ vluxei64_v_i8mf8_m

#define vluxei64_v_i8mf8_m ( ... ) __riscv_vluxei64_v_i8mf8_tumu(__VA_ARGS__)

◆ vluxei64_v_u16m1

#define vluxei64_v_u16m1 ( ... ) __riscv_vluxei64_v_u16m1(__VA_ARGS__)

◆ vluxei64_v_u16m1_m

#define vluxei64_v_u16m1_m ( ... ) __riscv_vluxei64_v_u16m1_tumu(__VA_ARGS__)

◆ vluxei64_v_u16m2

#define vluxei64_v_u16m2 ( ... ) __riscv_vluxei64_v_u16m2(__VA_ARGS__)

◆ vluxei64_v_u16m2_m

#define vluxei64_v_u16m2_m ( ... ) __riscv_vluxei64_v_u16m2_tumu(__VA_ARGS__)

◆ vluxei64_v_u16mf2

#define vluxei64_v_u16mf2 ( ... ) __riscv_vluxei64_v_u16mf2(__VA_ARGS__)

◆ vluxei64_v_u16mf2_m

#define vluxei64_v_u16mf2_m ( ... ) __riscv_vluxei64_v_u16mf2_tumu(__VA_ARGS__)

◆ vluxei64_v_u16mf4

#define vluxei64_v_u16mf4 ( ... ) __riscv_vluxei64_v_u16mf4(__VA_ARGS__)

◆ vluxei64_v_u16mf4_m

#define vluxei64_v_u16mf4_m ( ... ) __riscv_vluxei64_v_u16mf4_tumu(__VA_ARGS__)

◆ vluxei64_v_u32m1

#define vluxei64_v_u32m1 ( ... ) __riscv_vluxei64_v_u32m1(__VA_ARGS__)

◆ vluxei64_v_u32m1_m

#define vluxei64_v_u32m1_m ( ... ) __riscv_vluxei64_v_u32m1_tumu(__VA_ARGS__)

◆ vluxei64_v_u32m2

#define vluxei64_v_u32m2 ( ... ) __riscv_vluxei64_v_u32m2(__VA_ARGS__)

◆ vluxei64_v_u32m2_m

#define vluxei64_v_u32m2_m ( ... ) __riscv_vluxei64_v_u32m2_tumu(__VA_ARGS__)

◆ vluxei64_v_u32m4

#define vluxei64_v_u32m4 ( ... ) __riscv_vluxei64_v_u32m4(__VA_ARGS__)

◆ vluxei64_v_u32m4_m

#define vluxei64_v_u32m4_m ( ... ) __riscv_vluxei64_v_u32m4_tumu(__VA_ARGS__)

◆ vluxei64_v_u32mf2

#define vluxei64_v_u32mf2 ( ... ) __riscv_vluxei64_v_u32mf2(__VA_ARGS__)

◆ vluxei64_v_u32mf2_m

#define vluxei64_v_u32mf2_m ( ... ) __riscv_vluxei64_v_u32mf2_tumu(__VA_ARGS__)

◆ vluxei64_v_u64m1

#define vluxei64_v_u64m1 ( ... ) __riscv_vluxei64_v_u64m1(__VA_ARGS__)

◆ vluxei64_v_u64m1_m

#define vluxei64_v_u64m1_m ( ... ) __riscv_vluxei64_v_u64m1_tumu(__VA_ARGS__)

◆ vluxei64_v_u64m2

#define vluxei64_v_u64m2 ( ... ) __riscv_vluxei64_v_u64m2(__VA_ARGS__)

◆ vluxei64_v_u64m2_m

#define vluxei64_v_u64m2_m ( ... ) __riscv_vluxei64_v_u64m2_tumu(__VA_ARGS__)

◆ vluxei64_v_u64m4

#define vluxei64_v_u64m4 ( ... ) __riscv_vluxei64_v_u64m4(__VA_ARGS__)

◆ vluxei64_v_u64m4_m

#define vluxei64_v_u64m4_m ( ... ) __riscv_vluxei64_v_u64m4_tumu(__VA_ARGS__)

◆ vluxei64_v_u64m8

#define vluxei64_v_u64m8 ( ... ) __riscv_vluxei64_v_u64m8(__VA_ARGS__)

◆ vluxei64_v_u64m8_m

#define vluxei64_v_u64m8_m ( ... ) __riscv_vluxei64_v_u64m8_tumu(__VA_ARGS__)

◆ vluxei64_v_u8m1

#define vluxei64_v_u8m1 ( ... ) __riscv_vluxei64_v_u8m1(__VA_ARGS__)

◆ vluxei64_v_u8m1_m

#define vluxei64_v_u8m1_m ( ... ) __riscv_vluxei64_v_u8m1_tumu(__VA_ARGS__)

◆ vluxei64_v_u8mf2

#define vluxei64_v_u8mf2 ( ... ) __riscv_vluxei64_v_u8mf2(__VA_ARGS__)

◆ vluxei64_v_u8mf2_m

#define vluxei64_v_u8mf2_m ( ... ) __riscv_vluxei64_v_u8mf2_tumu(__VA_ARGS__)

◆ vluxei64_v_u8mf4

#define vluxei64_v_u8mf4 ( ... ) __riscv_vluxei64_v_u8mf4(__VA_ARGS__)

◆ vluxei64_v_u8mf4_m

#define vluxei64_v_u8mf4_m ( ... ) __riscv_vluxei64_v_u8mf4_tumu(__VA_ARGS__)

◆ vluxei64_v_u8mf8

#define vluxei64_v_u8mf8 ( ... ) __riscv_vluxei64_v_u8mf8(__VA_ARGS__)

◆ vluxei64_v_u8mf8_m

#define vluxei64_v_u8mf8_m ( ... ) __riscv_vluxei64_v_u8mf8_tumu(__VA_ARGS__)

◆ vluxei8_v_f16m1

#define vluxei8_v_f16m1 ( ... ) __riscv_vluxei8_v_f16m1(__VA_ARGS__)

◆ vluxei8_v_f16m1_m

#define vluxei8_v_f16m1_m ( ... ) __riscv_vluxei8_v_f16m1_tumu(__VA_ARGS__)

◆ vluxei8_v_f16m2

#define vluxei8_v_f16m2 ( ... ) __riscv_vluxei8_v_f16m2(__VA_ARGS__)

◆ vluxei8_v_f16m2_m

#define vluxei8_v_f16m2_m ( ... ) __riscv_vluxei8_v_f16m2_tumu(__VA_ARGS__)

◆ vluxei8_v_f16m4

#define vluxei8_v_f16m4 ( ... ) __riscv_vluxei8_v_f16m4(__VA_ARGS__)

◆ vluxei8_v_f16m4_m

#define vluxei8_v_f16m4_m ( ... ) __riscv_vluxei8_v_f16m4_tumu(__VA_ARGS__)

◆ vluxei8_v_f16m8

#define vluxei8_v_f16m8 ( ... ) __riscv_vluxei8_v_f16m8(__VA_ARGS__)

◆ vluxei8_v_f16m8_m

#define vluxei8_v_f16m8_m ( ... ) __riscv_vluxei8_v_f16m8_tumu(__VA_ARGS__)

◆ vluxei8_v_f16mf2

#define vluxei8_v_f16mf2 ( ... ) __riscv_vluxei8_v_f16mf2(__VA_ARGS__)

◆ vluxei8_v_f16mf2_m

#define vluxei8_v_f16mf2_m ( ... ) __riscv_vluxei8_v_f16mf2_tumu(__VA_ARGS__)

◆ vluxei8_v_f16mf4

#define vluxei8_v_f16mf4 ( ... ) __riscv_vluxei8_v_f16mf4(__VA_ARGS__)

◆ vluxei8_v_f16mf4_m

#define vluxei8_v_f16mf4_m ( ... ) __riscv_vluxei8_v_f16mf4_tumu(__VA_ARGS__)

◆ vluxei8_v_f32m1

#define vluxei8_v_f32m1 ( ... ) __riscv_vluxei8_v_f32m1(__VA_ARGS__)

◆ vluxei8_v_f32m1_m

#define vluxei8_v_f32m1_m ( ... ) __riscv_vluxei8_v_f32m1_tumu(__VA_ARGS__)

◆ vluxei8_v_f32m2

#define vluxei8_v_f32m2 ( ... ) __riscv_vluxei8_v_f32m2(__VA_ARGS__)

◆ vluxei8_v_f32m2_m

#define vluxei8_v_f32m2_m ( ... ) __riscv_vluxei8_v_f32m2_tumu(__VA_ARGS__)

◆ vluxei8_v_f32m4

#define vluxei8_v_f32m4 ( ... ) __riscv_vluxei8_v_f32m4(__VA_ARGS__)

◆ vluxei8_v_f32m4_m

#define vluxei8_v_f32m4_m ( ... ) __riscv_vluxei8_v_f32m4_tumu(__VA_ARGS__)

◆ vluxei8_v_f32m8

#define vluxei8_v_f32m8 ( ... ) __riscv_vluxei8_v_f32m8(__VA_ARGS__)

◆ vluxei8_v_f32m8_m

#define vluxei8_v_f32m8_m ( ... ) __riscv_vluxei8_v_f32m8_tumu(__VA_ARGS__)

◆ vluxei8_v_f32mf2

#define vluxei8_v_f32mf2 ( ... ) __riscv_vluxei8_v_f32mf2(__VA_ARGS__)

◆ vluxei8_v_f32mf2_m

#define vluxei8_v_f32mf2_m ( ... ) __riscv_vluxei8_v_f32mf2_tumu(__VA_ARGS__)

◆ vluxei8_v_f64m1

#define vluxei8_v_f64m1 ( ... ) __riscv_vluxei8_v_f64m1(__VA_ARGS__)

◆ vluxei8_v_f64m1_m

#define vluxei8_v_f64m1_m ( ... ) __riscv_vluxei8_v_f64m1_tumu(__VA_ARGS__)

◆ vluxei8_v_f64m2

#define vluxei8_v_f64m2 ( ... ) __riscv_vluxei8_v_f64m2(__VA_ARGS__)

◆ vluxei8_v_f64m2_m

#define vluxei8_v_f64m2_m ( ... ) __riscv_vluxei8_v_f64m2_tumu(__VA_ARGS__)

◆ vluxei8_v_f64m4

#define vluxei8_v_f64m4 ( ... ) __riscv_vluxei8_v_f64m4(__VA_ARGS__)

◆ vluxei8_v_f64m4_m

#define vluxei8_v_f64m4_m ( ... ) __riscv_vluxei8_v_f64m4_tumu(__VA_ARGS__)

◆ vluxei8_v_f64m8

#define vluxei8_v_f64m8 ( ... ) __riscv_vluxei8_v_f64m8(__VA_ARGS__)

◆ vluxei8_v_f64m8_m

#define vluxei8_v_f64m8_m ( ... ) __riscv_vluxei8_v_f64m8_tumu(__VA_ARGS__)

◆ vluxei8_v_i16m1

#define vluxei8_v_i16m1 ( ... ) __riscv_vluxei8_v_i16m1(__VA_ARGS__)

◆ vluxei8_v_i16m1_m

#define vluxei8_v_i16m1_m ( ... ) __riscv_vluxei8_v_i16m1_tumu(__VA_ARGS__)

◆ vluxei8_v_i16m2

#define vluxei8_v_i16m2 ( ... ) __riscv_vluxei8_v_i16m2(__VA_ARGS__)

◆ vluxei8_v_i16m2_m

#define vluxei8_v_i16m2_m ( ... ) __riscv_vluxei8_v_i16m2_tumu(__VA_ARGS__)

◆ vluxei8_v_i16m4

#define vluxei8_v_i16m4 ( ... ) __riscv_vluxei8_v_i16m4(__VA_ARGS__)

◆ vluxei8_v_i16m4_m

#define vluxei8_v_i16m4_m ( ... ) __riscv_vluxei8_v_i16m4_tumu(__VA_ARGS__)

◆ vluxei8_v_i16m8

#define vluxei8_v_i16m8 ( ... ) __riscv_vluxei8_v_i16m8(__VA_ARGS__)

◆ vluxei8_v_i16m8_m

#define vluxei8_v_i16m8_m ( ... ) __riscv_vluxei8_v_i16m8_tumu(__VA_ARGS__)

◆ vluxei8_v_i16mf2

#define vluxei8_v_i16mf2 ( ... ) __riscv_vluxei8_v_i16mf2(__VA_ARGS__)

◆ vluxei8_v_i16mf2_m

#define vluxei8_v_i16mf2_m ( ... ) __riscv_vluxei8_v_i16mf2_tumu(__VA_ARGS__)

◆ vluxei8_v_i16mf4

#define vluxei8_v_i16mf4 ( ... ) __riscv_vluxei8_v_i16mf4(__VA_ARGS__)

◆ vluxei8_v_i16mf4_m

#define vluxei8_v_i16mf4_m ( ... ) __riscv_vluxei8_v_i16mf4_tumu(__VA_ARGS__)

◆ vluxei8_v_i32m1

#define vluxei8_v_i32m1 ( ... ) __riscv_vluxei8_v_i32m1(__VA_ARGS__)

◆ vluxei8_v_i32m1_m

#define vluxei8_v_i32m1_m ( ... ) __riscv_vluxei8_v_i32m1_tumu(__VA_ARGS__)

◆ vluxei8_v_i32m2

#define vluxei8_v_i32m2 ( ... ) __riscv_vluxei8_v_i32m2(__VA_ARGS__)

◆ vluxei8_v_i32m2_m

#define vluxei8_v_i32m2_m ( ... ) __riscv_vluxei8_v_i32m2_tumu(__VA_ARGS__)

◆ vluxei8_v_i32m4

#define vluxei8_v_i32m4 ( ... ) __riscv_vluxei8_v_i32m4(__VA_ARGS__)

◆ vluxei8_v_i32m4_m

#define vluxei8_v_i32m4_m ( ... ) __riscv_vluxei8_v_i32m4_tumu(__VA_ARGS__)

◆ vluxei8_v_i32m8

#define vluxei8_v_i32m8 ( ... ) __riscv_vluxei8_v_i32m8(__VA_ARGS__)

◆ vluxei8_v_i32m8_m

#define vluxei8_v_i32m8_m ( ... ) __riscv_vluxei8_v_i32m8_tumu(__VA_ARGS__)

◆ vluxei8_v_i32mf2

#define vluxei8_v_i32mf2 ( ... ) __riscv_vluxei8_v_i32mf2(__VA_ARGS__)

◆ vluxei8_v_i32mf2_m

#define vluxei8_v_i32mf2_m ( ... ) __riscv_vluxei8_v_i32mf2_tumu(__VA_ARGS__)

◆ vluxei8_v_i64m1

#define vluxei8_v_i64m1 ( ... ) __riscv_vluxei8_v_i64m1(__VA_ARGS__)

◆ vluxei8_v_i64m1_m

#define vluxei8_v_i64m1_m ( ... ) __riscv_vluxei8_v_i64m1_tumu(__VA_ARGS__)

◆ vluxei8_v_i64m2

#define vluxei8_v_i64m2 ( ... ) __riscv_vluxei8_v_i64m2(__VA_ARGS__)

◆ vluxei8_v_i64m2_m

#define vluxei8_v_i64m2_m ( ... ) __riscv_vluxei8_v_i64m2_tumu(__VA_ARGS__)

◆ vluxei8_v_i64m4

#define vluxei8_v_i64m4 ( ... ) __riscv_vluxei8_v_i64m4(__VA_ARGS__)

◆ vluxei8_v_i64m4_m

#define vluxei8_v_i64m4_m ( ... ) __riscv_vluxei8_v_i64m4_tumu(__VA_ARGS__)

◆ vluxei8_v_i64m8

#define vluxei8_v_i64m8 ( ... ) __riscv_vluxei8_v_i64m8(__VA_ARGS__)

◆ vluxei8_v_i64m8_m

#define vluxei8_v_i64m8_m ( ... ) __riscv_vluxei8_v_i64m8_tumu(__VA_ARGS__)

◆ vluxei8_v_i8m1

#define vluxei8_v_i8m1 ( ... ) __riscv_vluxei8_v_i8m1(__VA_ARGS__)

◆ vluxei8_v_i8m1_m

#define vluxei8_v_i8m1_m ( ... ) __riscv_vluxei8_v_i8m1_tumu(__VA_ARGS__)

◆ vluxei8_v_i8m2

#define vluxei8_v_i8m2 ( ... ) __riscv_vluxei8_v_i8m2(__VA_ARGS__)

◆ vluxei8_v_i8m2_m

#define vluxei8_v_i8m2_m ( ... ) __riscv_vluxei8_v_i8m2_tumu(__VA_ARGS__)

◆ vluxei8_v_i8m4

#define vluxei8_v_i8m4 ( ... ) __riscv_vluxei8_v_i8m4(__VA_ARGS__)

◆ vluxei8_v_i8m4_m

#define vluxei8_v_i8m4_m ( ... ) __riscv_vluxei8_v_i8m4_tumu(__VA_ARGS__)

◆ vluxei8_v_i8m8

#define vluxei8_v_i8m8 ( ... ) __riscv_vluxei8_v_i8m8(__VA_ARGS__)

◆ vluxei8_v_i8m8_m

#define vluxei8_v_i8m8_m ( ... ) __riscv_vluxei8_v_i8m8_tumu(__VA_ARGS__)

◆ vluxei8_v_i8mf2

#define vluxei8_v_i8mf2 ( ... ) __riscv_vluxei8_v_i8mf2(__VA_ARGS__)

◆ vluxei8_v_i8mf2_m

#define vluxei8_v_i8mf2_m ( ... ) __riscv_vluxei8_v_i8mf2_tumu(__VA_ARGS__)

◆ vluxei8_v_i8mf4

#define vluxei8_v_i8mf4 ( ... ) __riscv_vluxei8_v_i8mf4(__VA_ARGS__)

◆ vluxei8_v_i8mf4_m

#define vluxei8_v_i8mf4_m ( ... ) __riscv_vluxei8_v_i8mf4_tumu(__VA_ARGS__)

◆ vluxei8_v_i8mf8

#define vluxei8_v_i8mf8 ( ... ) __riscv_vluxei8_v_i8mf8(__VA_ARGS__)

◆ vluxei8_v_i8mf8_m

#define vluxei8_v_i8mf8_m ( ... ) __riscv_vluxei8_v_i8mf8_tumu(__VA_ARGS__)

◆ vluxei8_v_u16m1

#define vluxei8_v_u16m1 ( ... ) __riscv_vluxei8_v_u16m1(__VA_ARGS__)

◆ vluxei8_v_u16m1_m

#define vluxei8_v_u16m1_m ( ... ) __riscv_vluxei8_v_u16m1_tumu(__VA_ARGS__)

◆ vluxei8_v_u16m2

#define vluxei8_v_u16m2 ( ... ) __riscv_vluxei8_v_u16m2(__VA_ARGS__)

◆ vluxei8_v_u16m2_m

#define vluxei8_v_u16m2_m ( ... ) __riscv_vluxei8_v_u16m2_tumu(__VA_ARGS__)

◆ vluxei8_v_u16m4

#define vluxei8_v_u16m4 ( ... ) __riscv_vluxei8_v_u16m4(__VA_ARGS__)

◆ vluxei8_v_u16m4_m

#define vluxei8_v_u16m4_m ( ... ) __riscv_vluxei8_v_u16m4_tumu(__VA_ARGS__)

◆ vluxei8_v_u16m8

#define vluxei8_v_u16m8 ( ... ) __riscv_vluxei8_v_u16m8(__VA_ARGS__)

◆ vluxei8_v_u16m8_m

#define vluxei8_v_u16m8_m ( ... ) __riscv_vluxei8_v_u16m8_tumu(__VA_ARGS__)

◆ vluxei8_v_u16mf2

#define vluxei8_v_u16mf2 ( ... ) __riscv_vluxei8_v_u16mf2(__VA_ARGS__)

◆ vluxei8_v_u16mf2_m

#define vluxei8_v_u16mf2_m ( ... ) __riscv_vluxei8_v_u16mf2_tumu(__VA_ARGS__)

◆ vluxei8_v_u16mf4

#define vluxei8_v_u16mf4 ( ... ) __riscv_vluxei8_v_u16mf4(__VA_ARGS__)

◆ vluxei8_v_u16mf4_m

#define vluxei8_v_u16mf4_m ( ... ) __riscv_vluxei8_v_u16mf4_tumu(__VA_ARGS__)

◆ vluxei8_v_u32m1

#define vluxei8_v_u32m1 ( ... ) __riscv_vluxei8_v_u32m1(__VA_ARGS__)

◆ vluxei8_v_u32m1_m

#define vluxei8_v_u32m1_m ( ... ) __riscv_vluxei8_v_u32m1_tumu(__VA_ARGS__)

◆ vluxei8_v_u32m2

#define vluxei8_v_u32m2 ( ... ) __riscv_vluxei8_v_u32m2(__VA_ARGS__)

◆ vluxei8_v_u32m2_m

#define vluxei8_v_u32m2_m ( ... ) __riscv_vluxei8_v_u32m2_tumu(__VA_ARGS__)

◆ vluxei8_v_u32m4

#define vluxei8_v_u32m4 ( ... ) __riscv_vluxei8_v_u32m4(__VA_ARGS__)

◆ vluxei8_v_u32m4_m

#define vluxei8_v_u32m4_m ( ... ) __riscv_vluxei8_v_u32m4_tumu(__VA_ARGS__)

◆ vluxei8_v_u32m8

#define vluxei8_v_u32m8 ( ... ) __riscv_vluxei8_v_u32m8(__VA_ARGS__)

◆ vluxei8_v_u32m8_m

#define vluxei8_v_u32m8_m ( ... ) __riscv_vluxei8_v_u32m8_tumu(__VA_ARGS__)

◆ vluxei8_v_u32mf2

#define vluxei8_v_u32mf2 ( ... ) __riscv_vluxei8_v_u32mf2(__VA_ARGS__)

◆ vluxei8_v_u32mf2_m

#define vluxei8_v_u32mf2_m ( ... ) __riscv_vluxei8_v_u32mf2_tumu(__VA_ARGS__)

◆ vluxei8_v_u64m1

#define vluxei8_v_u64m1 ( ... ) __riscv_vluxei8_v_u64m1(__VA_ARGS__)

◆ vluxei8_v_u64m1_m

#define vluxei8_v_u64m1_m ( ... ) __riscv_vluxei8_v_u64m1_tumu(__VA_ARGS__)

◆ vluxei8_v_u64m2

#define vluxei8_v_u64m2 ( ... ) __riscv_vluxei8_v_u64m2(__VA_ARGS__)

◆ vluxei8_v_u64m2_m

#define vluxei8_v_u64m2_m ( ... ) __riscv_vluxei8_v_u64m2_tumu(__VA_ARGS__)

◆ vluxei8_v_u64m4

#define vluxei8_v_u64m4 ( ... ) __riscv_vluxei8_v_u64m4(__VA_ARGS__)

◆ vluxei8_v_u64m4_m

#define vluxei8_v_u64m4_m ( ... ) __riscv_vluxei8_v_u64m4_tumu(__VA_ARGS__)

◆ vluxei8_v_u64m8

#define vluxei8_v_u64m8 ( ... ) __riscv_vluxei8_v_u64m8(__VA_ARGS__)

◆ vluxei8_v_u64m8_m

#define vluxei8_v_u64m8_m ( ... ) __riscv_vluxei8_v_u64m8_tumu(__VA_ARGS__)

◆ vluxei8_v_u8m1

#define vluxei8_v_u8m1 ( ... ) __riscv_vluxei8_v_u8m1(__VA_ARGS__)

◆ vluxei8_v_u8m1_m

#define vluxei8_v_u8m1_m ( ... ) __riscv_vluxei8_v_u8m1_tumu(__VA_ARGS__)

◆ vluxei8_v_u8m2

#define vluxei8_v_u8m2 ( ... ) __riscv_vluxei8_v_u8m2(__VA_ARGS__)

◆ vluxei8_v_u8m2_m

#define vluxei8_v_u8m2_m ( ... ) __riscv_vluxei8_v_u8m2_tumu(__VA_ARGS__)

◆ vluxei8_v_u8m4

#define vluxei8_v_u8m4 ( ... ) __riscv_vluxei8_v_u8m4(__VA_ARGS__)

◆ vluxei8_v_u8m4_m

#define vluxei8_v_u8m4_m ( ... ) __riscv_vluxei8_v_u8m4_tumu(__VA_ARGS__)

◆ vluxei8_v_u8m8

#define vluxei8_v_u8m8 ( ... ) __riscv_vluxei8_v_u8m8(__VA_ARGS__)

◆ vluxei8_v_u8m8_m

#define vluxei8_v_u8m8_m ( ... ) __riscv_vluxei8_v_u8m8_tumu(__VA_ARGS__)

◆ vluxei8_v_u8mf2

#define vluxei8_v_u8mf2 ( ... ) __riscv_vluxei8_v_u8mf2(__VA_ARGS__)

◆ vluxei8_v_u8mf2_m

#define vluxei8_v_u8mf2_m ( ... ) __riscv_vluxei8_v_u8mf2_tumu(__VA_ARGS__)

◆ vluxei8_v_u8mf4

#define vluxei8_v_u8mf4 ( ... ) __riscv_vluxei8_v_u8mf4(__VA_ARGS__)

◆ vluxei8_v_u8mf4_m

#define vluxei8_v_u8mf4_m ( ... ) __riscv_vluxei8_v_u8mf4_tumu(__VA_ARGS__)

◆ vluxei8_v_u8mf8

#define vluxei8_v_u8mf8 ( ... ) __riscv_vluxei8_v_u8mf8(__VA_ARGS__)

◆ vluxei8_v_u8mf8_m

#define vluxei8_v_u8mf8_m ( ... ) __riscv_vluxei8_v_u8mf8_tumu(__VA_ARGS__)

◆ vluxseg2ei16_v_f16m1

#define vluxseg2ei16_v_f16m1 ( ... ) __riscv_vluxseg2ei16_v_f16m1(__VA_ARGS__)

◆ vluxseg2ei16_v_f16m1_m

#define vluxseg2ei16_v_f16m1_m ( ... ) __riscv_vluxseg2ei16_v_f16m1_tumu(__VA_ARGS__)

◆ vluxseg2ei16_v_f16m2

#define vluxseg2ei16_v_f16m2 ( ... ) __riscv_vluxseg2ei16_v_f16m2(__VA_ARGS__)

◆ vluxseg2ei16_v_f16m2_m

#define vluxseg2ei16_v_f16m2_m ( ... ) __riscv_vluxseg2ei16_v_f16m2_tumu(__VA_ARGS__)

◆ vluxseg2ei16_v_f16m4

#define vluxseg2ei16_v_f16m4 ( ... ) __riscv_vluxseg2ei16_v_f16m4(__VA_ARGS__)

◆ vluxseg2ei16_v_f16m4_m

#define vluxseg2ei16_v_f16m4_m ( ... ) __riscv_vluxseg2ei16_v_f16m4_tumu(__VA_ARGS__)

◆ vluxseg2ei16_v_f16mf2

#define vluxseg2ei16_v_f16mf2 ( ... ) __riscv_vluxseg2ei16_v_f16mf2(__VA_ARGS__)

◆ vluxseg2ei16_v_f16mf2_m

#define vluxseg2ei16_v_f16mf2_m ( ... ) __riscv_vluxseg2ei16_v_f16mf2_tumu(__VA_ARGS__)

◆ vluxseg2ei16_v_f16mf4

#define vluxseg2ei16_v_f16mf4 ( ... ) __riscv_vluxseg2ei16_v_f16mf4(__VA_ARGS__)

◆ vluxseg2ei16_v_f16mf4_m

#define vluxseg2ei16_v_f16mf4_m ( ... ) __riscv_vluxseg2ei16_v_f16mf4_tumu(__VA_ARGS__)

◆ vluxseg2ei16_v_f32m1

#define vluxseg2ei16_v_f32m1 ( ... ) __riscv_vluxseg2ei16_v_f32m1(__VA_ARGS__)

◆ vluxseg2ei16_v_f32m1_m

#define vluxseg2ei16_v_f32m1_m ( ... ) __riscv_vluxseg2ei16_v_f32m1_tumu(__VA_ARGS__)

◆ vluxseg2ei16_v_f32m2

#define vluxseg2ei16_v_f32m2 ( ... ) __riscv_vluxseg2ei16_v_f32m2(__VA_ARGS__)

◆ vluxseg2ei16_v_f32m2_m

#define vluxseg2ei16_v_f32m2_m ( ... ) __riscv_vluxseg2ei16_v_f32m2_tumu(__VA_ARGS__)

◆ vluxseg2ei16_v_f32m4

#define vluxseg2ei16_v_f32m4 ( ... ) __riscv_vluxseg2ei16_v_f32m4(__VA_ARGS__)

◆ vluxseg2ei16_v_f32m4_m

#define vluxseg2ei16_v_f32m4_m ( ... ) __riscv_vluxseg2ei16_v_f32m4_tumu(__VA_ARGS__)

◆ vluxseg2ei16_v_f32mf2

#define vluxseg2ei16_v_f32mf2 ( ... ) __riscv_vluxseg2ei16_v_f32mf2(__VA_ARGS__)

◆ vluxseg2ei16_v_f32mf2_m

#define vluxseg2ei16_v_f32mf2_m ( ... ) __riscv_vluxseg2ei16_v_f32mf2_tumu(__VA_ARGS__)

◆ vluxseg2ei16_v_f64m1

#define vluxseg2ei16_v_f64m1 ( ... ) __riscv_vluxseg2ei16_v_f64m1(__VA_ARGS__)

◆ vluxseg2ei16_v_f64m1_m

#define vluxseg2ei16_v_f64m1_m ( ... ) __riscv_vluxseg2ei16_v_f64m1_tumu(__VA_ARGS__)

◆ vluxseg2ei16_v_f64m2

#define vluxseg2ei16_v_f64m2 ( ... ) __riscv_vluxseg2ei16_v_f64m2(__VA_ARGS__)

◆ vluxseg2ei16_v_f64m2_m

#define vluxseg2ei16_v_f64m2_m ( ... ) __riscv_vluxseg2ei16_v_f64m2_tumu(__VA_ARGS__)

◆ vluxseg2ei16_v_f64m4

#define vluxseg2ei16_v_f64m4 ( ... ) __riscv_vluxseg2ei16_v_f64m4(__VA_ARGS__)

◆ vluxseg2ei16_v_f64m4_m

#define vluxseg2ei16_v_f64m4_m ( ... ) __riscv_vluxseg2ei16_v_f64m4_tumu(__VA_ARGS__)

◆ vluxseg2ei16_v_i16m1

#define vluxseg2ei16_v_i16m1 ( ... ) __riscv_vluxseg2ei16_v_i16m1(__VA_ARGS__)

◆ vluxseg2ei16_v_i16m1_m

#define vluxseg2ei16_v_i16m1_m ( ... ) __riscv_vluxseg2ei16_v_i16m1_tumu(__VA_ARGS__)

◆ vluxseg2ei16_v_i16m2

#define vluxseg2ei16_v_i16m2 ( ... ) __riscv_vluxseg2ei16_v_i16m2(__VA_ARGS__)

◆ vluxseg2ei16_v_i16m2_m

#define vluxseg2ei16_v_i16m2_m ( ... ) __riscv_vluxseg2ei16_v_i16m2_tumu(__VA_ARGS__)

◆ vluxseg2ei16_v_i16m4

#define vluxseg2ei16_v_i16m4 ( ... ) __riscv_vluxseg2ei16_v_i16m4(__VA_ARGS__)

◆ vluxseg2ei16_v_i16m4_m

#define vluxseg2ei16_v_i16m4_m ( ... ) __riscv_vluxseg2ei16_v_i16m4_tumu(__VA_ARGS__)

◆ vluxseg2ei16_v_i16mf2

#define vluxseg2ei16_v_i16mf2 ( ... ) __riscv_vluxseg2ei16_v_i16mf2(__VA_ARGS__)

◆ vluxseg2ei16_v_i16mf2_m

#define vluxseg2ei16_v_i16mf2_m ( ... ) __riscv_vluxseg2ei16_v_i16mf2_tumu(__VA_ARGS__)

◆ vluxseg2ei16_v_i16mf4

#define vluxseg2ei16_v_i16mf4 ( ... ) __riscv_vluxseg2ei16_v_i16mf4(__VA_ARGS__)

◆ vluxseg2ei16_v_i16mf4_m

#define vluxseg2ei16_v_i16mf4_m ( ... ) __riscv_vluxseg2ei16_v_i16mf4_tumu(__VA_ARGS__)

◆ vluxseg2ei16_v_i32m1

#define vluxseg2ei16_v_i32m1 ( ... ) __riscv_vluxseg2ei16_v_i32m1(__VA_ARGS__)

◆ vluxseg2ei16_v_i32m1_m

#define vluxseg2ei16_v_i32m1_m ( ... ) __riscv_vluxseg2ei16_v_i32m1_tumu(__VA_ARGS__)

◆ vluxseg2ei16_v_i32m2

#define vluxseg2ei16_v_i32m2 ( ... ) __riscv_vluxseg2ei16_v_i32m2(__VA_ARGS__)

◆ vluxseg2ei16_v_i32m2_m

#define vluxseg2ei16_v_i32m2_m ( ... ) __riscv_vluxseg2ei16_v_i32m2_tumu(__VA_ARGS__)

◆ vluxseg2ei16_v_i32m4

#define vluxseg2ei16_v_i32m4 ( ... ) __riscv_vluxseg2ei16_v_i32m4(__VA_ARGS__)

◆ vluxseg2ei16_v_i32m4_m

#define vluxseg2ei16_v_i32m4_m ( ... ) __riscv_vluxseg2ei16_v_i32m4_tumu(__VA_ARGS__)

◆ vluxseg2ei16_v_i32mf2

#define vluxseg2ei16_v_i32mf2 ( ... ) __riscv_vluxseg2ei16_v_i32mf2(__VA_ARGS__)

◆ vluxseg2ei16_v_i32mf2_m

#define vluxseg2ei16_v_i32mf2_m ( ... ) __riscv_vluxseg2ei16_v_i32mf2_tumu(__VA_ARGS__)

◆ vluxseg2ei16_v_i64m1

#define vluxseg2ei16_v_i64m1 ( ... ) __riscv_vluxseg2ei16_v_i64m1(__VA_ARGS__)

◆ vluxseg2ei16_v_i64m1_m

#define vluxseg2ei16_v_i64m1_m ( ... ) __riscv_vluxseg2ei16_v_i64m1_tumu(__VA_ARGS__)

◆ vluxseg2ei16_v_i64m2

#define vluxseg2ei16_v_i64m2 ( ... ) __riscv_vluxseg2ei16_v_i64m2(__VA_ARGS__)

◆ vluxseg2ei16_v_i64m2_m

#define vluxseg2ei16_v_i64m2_m ( ... ) __riscv_vluxseg2ei16_v_i64m2_tumu(__VA_ARGS__)

◆ vluxseg2ei16_v_i64m4

#define vluxseg2ei16_v_i64m4 ( ... ) __riscv_vluxseg2ei16_v_i64m4(__VA_ARGS__)

◆ vluxseg2ei16_v_i64m4_m

#define vluxseg2ei16_v_i64m4_m ( ... ) __riscv_vluxseg2ei16_v_i64m4_tumu(__VA_ARGS__)

◆ vluxseg2ei16_v_i8m1

#define vluxseg2ei16_v_i8m1 ( ... ) __riscv_vluxseg2ei16_v_i8m1(__VA_ARGS__)

◆ vluxseg2ei16_v_i8m1_m

#define vluxseg2ei16_v_i8m1_m ( ... ) __riscv_vluxseg2ei16_v_i8m1_tumu(__VA_ARGS__)

◆ vluxseg2ei16_v_i8m2

#define vluxseg2ei16_v_i8m2 ( ... ) __riscv_vluxseg2ei16_v_i8m2(__VA_ARGS__)

◆ vluxseg2ei16_v_i8m2_m

#define vluxseg2ei16_v_i8m2_m ( ... ) __riscv_vluxseg2ei16_v_i8m2_tumu(__VA_ARGS__)

◆ vluxseg2ei16_v_i8m4

#define vluxseg2ei16_v_i8m4 ( ... ) __riscv_vluxseg2ei16_v_i8m4(__VA_ARGS__)

◆ vluxseg2ei16_v_i8m4_m

#define vluxseg2ei16_v_i8m4_m ( ... ) __riscv_vluxseg2ei16_v_i8m4_tumu(__VA_ARGS__)

◆ vluxseg2ei16_v_i8mf2

#define vluxseg2ei16_v_i8mf2 ( ... ) __riscv_vluxseg2ei16_v_i8mf2(__VA_ARGS__)

◆ vluxseg2ei16_v_i8mf2_m

#define vluxseg2ei16_v_i8mf2_m ( ... ) __riscv_vluxseg2ei16_v_i8mf2_tumu(__VA_ARGS__)

◆ vluxseg2ei16_v_i8mf4

#define vluxseg2ei16_v_i8mf4 ( ... ) __riscv_vluxseg2ei16_v_i8mf4(__VA_ARGS__)

◆ vluxseg2ei16_v_i8mf4_m

#define vluxseg2ei16_v_i8mf4_m ( ... ) __riscv_vluxseg2ei16_v_i8mf4_tumu(__VA_ARGS__)

◆ vluxseg2ei16_v_i8mf8

#define vluxseg2ei16_v_i8mf8 ( ... ) __riscv_vluxseg2ei16_v_i8mf8(__VA_ARGS__)

◆ vluxseg2ei16_v_i8mf8_m

#define vluxseg2ei16_v_i8mf8_m ( ... ) __riscv_vluxseg2ei16_v_i8mf8_tumu(__VA_ARGS__)

◆ vluxseg2ei16_v_u16m1

#define vluxseg2ei16_v_u16m1 ( ... ) __riscv_vluxseg2ei16_v_u16m1(__VA_ARGS__)

◆ vluxseg2ei16_v_u16m1_m

#define vluxseg2ei16_v_u16m1_m ( ... ) __riscv_vluxseg2ei16_v_u16m1_tumu(__VA_ARGS__)

◆ vluxseg2ei16_v_u16m2

#define vluxseg2ei16_v_u16m2 ( ... ) __riscv_vluxseg2ei16_v_u16m2(__VA_ARGS__)

◆ vluxseg2ei16_v_u16m2_m

#define vluxseg2ei16_v_u16m2_m ( ... ) __riscv_vluxseg2ei16_v_u16m2_tumu(__VA_ARGS__)

◆ vluxseg2ei16_v_u16m4

#define vluxseg2ei16_v_u16m4 ( ... ) __riscv_vluxseg2ei16_v_u16m4(__VA_ARGS__)

◆ vluxseg2ei16_v_u16m4_m

#define vluxseg2ei16_v_u16m4_m ( ... ) __riscv_vluxseg2ei16_v_u16m4_tumu(__VA_ARGS__)

◆ vluxseg2ei16_v_u16mf2

#define vluxseg2ei16_v_u16mf2 ( ... ) __riscv_vluxseg2ei16_v_u16mf2(__VA_ARGS__)

◆ vluxseg2ei16_v_u16mf2_m

#define vluxseg2ei16_v_u16mf2_m ( ... ) __riscv_vluxseg2ei16_v_u16mf2_tumu(__VA_ARGS__)

◆ vluxseg2ei16_v_u16mf4

#define vluxseg2ei16_v_u16mf4 ( ... ) __riscv_vluxseg2ei16_v_u16mf4(__VA_ARGS__)

◆ vluxseg2ei16_v_u16mf4_m

#define vluxseg2ei16_v_u16mf4_m ( ... ) __riscv_vluxseg2ei16_v_u16mf4_tumu(__VA_ARGS__)

◆ vluxseg2ei16_v_u32m1

#define vluxseg2ei16_v_u32m1 ( ... ) __riscv_vluxseg2ei16_v_u32m1(__VA_ARGS__)

◆ vluxseg2ei16_v_u32m1_m

#define vluxseg2ei16_v_u32m1_m ( ... ) __riscv_vluxseg2ei16_v_u32m1_tumu(__VA_ARGS__)

◆ vluxseg2ei16_v_u32m2

#define vluxseg2ei16_v_u32m2 ( ... ) __riscv_vluxseg2ei16_v_u32m2(__VA_ARGS__)

◆ vluxseg2ei16_v_u32m2_m

#define vluxseg2ei16_v_u32m2_m ( ... ) __riscv_vluxseg2ei16_v_u32m2_tumu(__VA_ARGS__)

◆ vluxseg2ei16_v_u32m4

#define vluxseg2ei16_v_u32m4 ( ... ) __riscv_vluxseg2ei16_v_u32m4(__VA_ARGS__)

◆ vluxseg2ei16_v_u32m4_m

#define vluxseg2ei16_v_u32m4_m ( ... ) __riscv_vluxseg2ei16_v_u32m4_tumu(__VA_ARGS__)

◆ vluxseg2ei16_v_u32mf2

#define vluxseg2ei16_v_u32mf2 ( ... ) __riscv_vluxseg2ei16_v_u32mf2(__VA_ARGS__)

◆ vluxseg2ei16_v_u32mf2_m

#define vluxseg2ei16_v_u32mf2_m ( ... ) __riscv_vluxseg2ei16_v_u32mf2_tumu(__VA_ARGS__)

◆ vluxseg2ei16_v_u64m1

#define vluxseg2ei16_v_u64m1 ( ... ) __riscv_vluxseg2ei16_v_u64m1(__VA_ARGS__)

◆ vluxseg2ei16_v_u64m1_m

#define vluxseg2ei16_v_u64m1_m ( ... ) __riscv_vluxseg2ei16_v_u64m1_tumu(__VA_ARGS__)

◆ vluxseg2ei16_v_u64m2

#define vluxseg2ei16_v_u64m2 ( ... ) __riscv_vluxseg2ei16_v_u64m2(__VA_ARGS__)

◆ vluxseg2ei16_v_u64m2_m

#define vluxseg2ei16_v_u64m2_m ( ... ) __riscv_vluxseg2ei16_v_u64m2_tumu(__VA_ARGS__)

◆ vluxseg2ei16_v_u64m4

#define vluxseg2ei16_v_u64m4 ( ... ) __riscv_vluxseg2ei16_v_u64m4(__VA_ARGS__)

◆ vluxseg2ei16_v_u64m4_m

#define vluxseg2ei16_v_u64m4_m ( ... ) __riscv_vluxseg2ei16_v_u64m4_tumu(__VA_ARGS__)

◆ vluxseg2ei16_v_u8m1

#define vluxseg2ei16_v_u8m1 ( ... ) __riscv_vluxseg2ei16_v_u8m1(__VA_ARGS__)

◆ vluxseg2ei16_v_u8m1_m

#define vluxseg2ei16_v_u8m1_m ( ... ) __riscv_vluxseg2ei16_v_u8m1_tumu(__VA_ARGS__)

◆ vluxseg2ei16_v_u8m2

#define vluxseg2ei16_v_u8m2 ( ... ) __riscv_vluxseg2ei16_v_u8m2(__VA_ARGS__)

◆ vluxseg2ei16_v_u8m2_m

#define vluxseg2ei16_v_u8m2_m ( ... ) __riscv_vluxseg2ei16_v_u8m2_tumu(__VA_ARGS__)

◆ vluxseg2ei16_v_u8m4

#define vluxseg2ei16_v_u8m4 ( ... ) __riscv_vluxseg2ei16_v_u8m4(__VA_ARGS__)

◆ vluxseg2ei16_v_u8m4_m

#define vluxseg2ei16_v_u8m4_m ( ... ) __riscv_vluxseg2ei16_v_u8m4_tumu(__VA_ARGS__)

◆ vluxseg2ei16_v_u8mf2

#define vluxseg2ei16_v_u8mf2 ( ... ) __riscv_vluxseg2ei16_v_u8mf2(__VA_ARGS__)

◆ vluxseg2ei16_v_u8mf2_m

#define vluxseg2ei16_v_u8mf2_m ( ... ) __riscv_vluxseg2ei16_v_u8mf2_tumu(__VA_ARGS__)

◆ vluxseg2ei16_v_u8mf4

#define vluxseg2ei16_v_u8mf4 ( ... ) __riscv_vluxseg2ei16_v_u8mf4(__VA_ARGS__)

◆ vluxseg2ei16_v_u8mf4_m

#define vluxseg2ei16_v_u8mf4_m ( ... ) __riscv_vluxseg2ei16_v_u8mf4_tumu(__VA_ARGS__)

◆ vluxseg2ei16_v_u8mf8

#define vluxseg2ei16_v_u8mf8 ( ... ) __riscv_vluxseg2ei16_v_u8mf8(__VA_ARGS__)

◆ vluxseg2ei16_v_u8mf8_m

#define vluxseg2ei16_v_u8mf8_m ( ... ) __riscv_vluxseg2ei16_v_u8mf8_tumu(__VA_ARGS__)

◆ vluxseg2ei32_v_f16m1

#define vluxseg2ei32_v_f16m1 ( ... ) __riscv_vluxseg2ei32_v_f16m1(__VA_ARGS__)

◆ vluxseg2ei32_v_f16m1_m

#define vluxseg2ei32_v_f16m1_m ( ... ) __riscv_vluxseg2ei32_v_f16m1_tumu(__VA_ARGS__)

◆ vluxseg2ei32_v_f16m2

#define vluxseg2ei32_v_f16m2 ( ... ) __riscv_vluxseg2ei32_v_f16m2(__VA_ARGS__)

◆ vluxseg2ei32_v_f16m2_m

#define vluxseg2ei32_v_f16m2_m ( ... ) __riscv_vluxseg2ei32_v_f16m2_tumu(__VA_ARGS__)

◆ vluxseg2ei32_v_f16m4

#define vluxseg2ei32_v_f16m4 ( ... ) __riscv_vluxseg2ei32_v_f16m4(__VA_ARGS__)

◆ vluxseg2ei32_v_f16m4_m

#define vluxseg2ei32_v_f16m4_m ( ... ) __riscv_vluxseg2ei32_v_f16m4_tumu(__VA_ARGS__)

◆ vluxseg2ei32_v_f16mf2

#define vluxseg2ei32_v_f16mf2 ( ... ) __riscv_vluxseg2ei32_v_f16mf2(__VA_ARGS__)

◆ vluxseg2ei32_v_f16mf2_m

#define vluxseg2ei32_v_f16mf2_m ( ... ) __riscv_vluxseg2ei32_v_f16mf2_tumu(__VA_ARGS__)

◆ vluxseg2ei32_v_f16mf4

#define vluxseg2ei32_v_f16mf4 ( ... ) __riscv_vluxseg2ei32_v_f16mf4(__VA_ARGS__)

◆ vluxseg2ei32_v_f16mf4_m

#define vluxseg2ei32_v_f16mf4_m ( ... ) __riscv_vluxseg2ei32_v_f16mf4_tumu(__VA_ARGS__)

◆ vluxseg2ei32_v_f32m1

#define vluxseg2ei32_v_f32m1 ( ... ) __riscv_vluxseg2ei32_v_f32m1(__VA_ARGS__)

◆ vluxseg2ei32_v_f32m1_m

#define vluxseg2ei32_v_f32m1_m ( ... ) __riscv_vluxseg2ei32_v_f32m1_tumu(__VA_ARGS__)

◆ vluxseg2ei32_v_f32m2

#define vluxseg2ei32_v_f32m2 ( ... ) __riscv_vluxseg2ei32_v_f32m2(__VA_ARGS__)

◆ vluxseg2ei32_v_f32m2_m

#define vluxseg2ei32_v_f32m2_m ( ... ) __riscv_vluxseg2ei32_v_f32m2_tumu(__VA_ARGS__)

◆ vluxseg2ei32_v_f32m4

#define vluxseg2ei32_v_f32m4 ( ... ) __riscv_vluxseg2ei32_v_f32m4(__VA_ARGS__)

◆ vluxseg2ei32_v_f32m4_m

#define vluxseg2ei32_v_f32m4_m ( ... ) __riscv_vluxseg2ei32_v_f32m4_tumu(__VA_ARGS__)

◆ vluxseg2ei32_v_f32mf2

#define vluxseg2ei32_v_f32mf2 ( ... ) __riscv_vluxseg2ei32_v_f32mf2(__VA_ARGS__)

◆ vluxseg2ei32_v_f32mf2_m

#define vluxseg2ei32_v_f32mf2_m ( ... ) __riscv_vluxseg2ei32_v_f32mf2_tumu(__VA_ARGS__)

◆ vluxseg2ei32_v_f64m1

#define vluxseg2ei32_v_f64m1 ( ... ) __riscv_vluxseg2ei32_v_f64m1(__VA_ARGS__)

◆ vluxseg2ei32_v_f64m1_m

#define vluxseg2ei32_v_f64m1_m ( ... ) __riscv_vluxseg2ei32_v_f64m1_tumu(__VA_ARGS__)

◆ vluxseg2ei32_v_f64m2

#define vluxseg2ei32_v_f64m2 ( ... ) __riscv_vluxseg2ei32_v_f64m2(__VA_ARGS__)

◆ vluxseg2ei32_v_f64m2_m

#define vluxseg2ei32_v_f64m2_m ( ... ) __riscv_vluxseg2ei32_v_f64m2_tumu(__VA_ARGS__)

◆ vluxseg2ei32_v_f64m4

#define vluxseg2ei32_v_f64m4 ( ... ) __riscv_vluxseg2ei32_v_f64m4(__VA_ARGS__)

◆ vluxseg2ei32_v_f64m4_m

#define vluxseg2ei32_v_f64m4_m ( ... ) __riscv_vluxseg2ei32_v_f64m4_tumu(__VA_ARGS__)

◆ vluxseg2ei32_v_i16m1

#define vluxseg2ei32_v_i16m1 ( ... ) __riscv_vluxseg2ei32_v_i16m1(__VA_ARGS__)

◆ vluxseg2ei32_v_i16m1_m

#define vluxseg2ei32_v_i16m1_m ( ... ) __riscv_vluxseg2ei32_v_i16m1_tumu(__VA_ARGS__)

◆ vluxseg2ei32_v_i16m2

#define vluxseg2ei32_v_i16m2 ( ... ) __riscv_vluxseg2ei32_v_i16m2(__VA_ARGS__)

◆ vluxseg2ei32_v_i16m2_m

#define vluxseg2ei32_v_i16m2_m ( ... ) __riscv_vluxseg2ei32_v_i16m2_tumu(__VA_ARGS__)

◆ vluxseg2ei32_v_i16m4

#define vluxseg2ei32_v_i16m4 ( ... ) __riscv_vluxseg2ei32_v_i16m4(__VA_ARGS__)

◆ vluxseg2ei32_v_i16m4_m

#define vluxseg2ei32_v_i16m4_m ( ... ) __riscv_vluxseg2ei32_v_i16m4_tumu(__VA_ARGS__)

◆ vluxseg2ei32_v_i16mf2

#define vluxseg2ei32_v_i16mf2 ( ... ) __riscv_vluxseg2ei32_v_i16mf2(__VA_ARGS__)

◆ vluxseg2ei32_v_i16mf2_m

#define vluxseg2ei32_v_i16mf2_m ( ... ) __riscv_vluxseg2ei32_v_i16mf2_tumu(__VA_ARGS__)

◆ vluxseg2ei32_v_i16mf4

#define vluxseg2ei32_v_i16mf4 ( ... ) __riscv_vluxseg2ei32_v_i16mf4(__VA_ARGS__)

◆ vluxseg2ei32_v_i16mf4_m

#define vluxseg2ei32_v_i16mf4_m ( ... ) __riscv_vluxseg2ei32_v_i16mf4_tumu(__VA_ARGS__)

◆ vluxseg2ei32_v_i32m1

#define vluxseg2ei32_v_i32m1 ( ... ) __riscv_vluxseg2ei32_v_i32m1(__VA_ARGS__)

◆ vluxseg2ei32_v_i32m1_m

#define vluxseg2ei32_v_i32m1_m ( ... ) __riscv_vluxseg2ei32_v_i32m1_tumu(__VA_ARGS__)

◆ vluxseg2ei32_v_i32m2

#define vluxseg2ei32_v_i32m2 ( ... ) __riscv_vluxseg2ei32_v_i32m2(__VA_ARGS__)

◆ vluxseg2ei32_v_i32m2_m

#define vluxseg2ei32_v_i32m2_m ( ... ) __riscv_vluxseg2ei32_v_i32m2_tumu(__VA_ARGS__)

◆ vluxseg2ei32_v_i32m4

#define vluxseg2ei32_v_i32m4 ( ... ) __riscv_vluxseg2ei32_v_i32m4(__VA_ARGS__)

◆ vluxseg2ei32_v_i32m4_m

#define vluxseg2ei32_v_i32m4_m ( ... ) __riscv_vluxseg2ei32_v_i32m4_tumu(__VA_ARGS__)

◆ vluxseg2ei32_v_i32mf2

#define vluxseg2ei32_v_i32mf2 ( ... ) __riscv_vluxseg2ei32_v_i32mf2(__VA_ARGS__)

◆ vluxseg2ei32_v_i32mf2_m

#define vluxseg2ei32_v_i32mf2_m ( ... ) __riscv_vluxseg2ei32_v_i32mf2_tumu(__VA_ARGS__)

◆ vluxseg2ei32_v_i64m1

#define vluxseg2ei32_v_i64m1 ( ... ) __riscv_vluxseg2ei32_v_i64m1(__VA_ARGS__)

◆ vluxseg2ei32_v_i64m1_m

#define vluxseg2ei32_v_i64m1_m ( ... ) __riscv_vluxseg2ei32_v_i64m1_tumu(__VA_ARGS__)

◆ vluxseg2ei32_v_i64m2

#define vluxseg2ei32_v_i64m2 ( ... ) __riscv_vluxseg2ei32_v_i64m2(__VA_ARGS__)

◆ vluxseg2ei32_v_i64m2_m

#define vluxseg2ei32_v_i64m2_m ( ... ) __riscv_vluxseg2ei32_v_i64m2_tumu(__VA_ARGS__)

◆ vluxseg2ei32_v_i64m4

#define vluxseg2ei32_v_i64m4 ( ... ) __riscv_vluxseg2ei32_v_i64m4(__VA_ARGS__)

◆ vluxseg2ei32_v_i64m4_m

#define vluxseg2ei32_v_i64m4_m ( ... ) __riscv_vluxseg2ei32_v_i64m4_tumu(__VA_ARGS__)

◆ vluxseg2ei32_v_i8m1

#define vluxseg2ei32_v_i8m1 ( ... ) __riscv_vluxseg2ei32_v_i8m1(__VA_ARGS__)

◆ vluxseg2ei32_v_i8m1_m

#define vluxseg2ei32_v_i8m1_m ( ... ) __riscv_vluxseg2ei32_v_i8m1_tumu(__VA_ARGS__)

◆ vluxseg2ei32_v_i8m2

#define vluxseg2ei32_v_i8m2 ( ... ) __riscv_vluxseg2ei32_v_i8m2(__VA_ARGS__)

◆ vluxseg2ei32_v_i8m2_m

#define vluxseg2ei32_v_i8m2_m ( ... ) __riscv_vluxseg2ei32_v_i8m2_tumu(__VA_ARGS__)

◆ vluxseg2ei32_v_i8mf2

#define vluxseg2ei32_v_i8mf2 ( ... ) __riscv_vluxseg2ei32_v_i8mf2(__VA_ARGS__)

◆ vluxseg2ei32_v_i8mf2_m

#define vluxseg2ei32_v_i8mf2_m ( ... ) __riscv_vluxseg2ei32_v_i8mf2_tumu(__VA_ARGS__)

◆ vluxseg2ei32_v_i8mf4

#define vluxseg2ei32_v_i8mf4 ( ... ) __riscv_vluxseg2ei32_v_i8mf4(__VA_ARGS__)

◆ vluxseg2ei32_v_i8mf4_m

#define vluxseg2ei32_v_i8mf4_m ( ... ) __riscv_vluxseg2ei32_v_i8mf4_tumu(__VA_ARGS__)

◆ vluxseg2ei32_v_i8mf8

#define vluxseg2ei32_v_i8mf8 ( ... ) __riscv_vluxseg2ei32_v_i8mf8(__VA_ARGS__)

◆ vluxseg2ei32_v_i8mf8_m

#define vluxseg2ei32_v_i8mf8_m ( ... ) __riscv_vluxseg2ei32_v_i8mf8_tumu(__VA_ARGS__)

◆ vluxseg2ei32_v_u16m1

#define vluxseg2ei32_v_u16m1 ( ... ) __riscv_vluxseg2ei32_v_u16m1(__VA_ARGS__)

◆ vluxseg2ei32_v_u16m1_m

#define vluxseg2ei32_v_u16m1_m ( ... ) __riscv_vluxseg2ei32_v_u16m1_tumu(__VA_ARGS__)

◆ vluxseg2ei32_v_u16m2

#define vluxseg2ei32_v_u16m2 ( ... ) __riscv_vluxseg2ei32_v_u16m2(__VA_ARGS__)

◆ vluxseg2ei32_v_u16m2_m

#define vluxseg2ei32_v_u16m2_m ( ... ) __riscv_vluxseg2ei32_v_u16m2_tumu(__VA_ARGS__)

◆ vluxseg2ei32_v_u16m4

#define vluxseg2ei32_v_u16m4 ( ... ) __riscv_vluxseg2ei32_v_u16m4(__VA_ARGS__)

◆ vluxseg2ei32_v_u16m4_m

#define vluxseg2ei32_v_u16m4_m ( ... ) __riscv_vluxseg2ei32_v_u16m4_tumu(__VA_ARGS__)

◆ vluxseg2ei32_v_u16mf2

#define vluxseg2ei32_v_u16mf2 ( ... ) __riscv_vluxseg2ei32_v_u16mf2(__VA_ARGS__)

◆ vluxseg2ei32_v_u16mf2_m

#define vluxseg2ei32_v_u16mf2_m ( ... ) __riscv_vluxseg2ei32_v_u16mf2_tumu(__VA_ARGS__)

◆ vluxseg2ei32_v_u16mf4

#define vluxseg2ei32_v_u16mf4 ( ... ) __riscv_vluxseg2ei32_v_u16mf4(__VA_ARGS__)

◆ vluxseg2ei32_v_u16mf4_m

#define vluxseg2ei32_v_u16mf4_m ( ... ) __riscv_vluxseg2ei32_v_u16mf4_tumu(__VA_ARGS__)

◆ vluxseg2ei32_v_u32m1

#define vluxseg2ei32_v_u32m1 ( ... ) __riscv_vluxseg2ei32_v_u32m1(__VA_ARGS__)

◆ vluxseg2ei32_v_u32m1_m

#define vluxseg2ei32_v_u32m1_m ( ... ) __riscv_vluxseg2ei32_v_u32m1_tumu(__VA_ARGS__)

◆ vluxseg2ei32_v_u32m2

#define vluxseg2ei32_v_u32m2 ( ... ) __riscv_vluxseg2ei32_v_u32m2(__VA_ARGS__)

◆ vluxseg2ei32_v_u32m2_m

#define vluxseg2ei32_v_u32m2_m ( ... ) __riscv_vluxseg2ei32_v_u32m2_tumu(__VA_ARGS__)

◆ vluxseg2ei32_v_u32m4

#define vluxseg2ei32_v_u32m4 ( ... ) __riscv_vluxseg2ei32_v_u32m4(__VA_ARGS__)

◆ vluxseg2ei32_v_u32m4_m

#define vluxseg2ei32_v_u32m4_m ( ... ) __riscv_vluxseg2ei32_v_u32m4_tumu(__VA_ARGS__)

◆ vluxseg2ei32_v_u32mf2

#define vluxseg2ei32_v_u32mf2 ( ... ) __riscv_vluxseg2ei32_v_u32mf2(__VA_ARGS__)

◆ vluxseg2ei32_v_u32mf2_m

#define vluxseg2ei32_v_u32mf2_m ( ... ) __riscv_vluxseg2ei32_v_u32mf2_tumu(__VA_ARGS__)

◆ vluxseg2ei32_v_u64m1

#define vluxseg2ei32_v_u64m1 ( ... ) __riscv_vluxseg2ei32_v_u64m1(__VA_ARGS__)

◆ vluxseg2ei32_v_u64m1_m

#define vluxseg2ei32_v_u64m1_m ( ... ) __riscv_vluxseg2ei32_v_u64m1_tumu(__VA_ARGS__)

◆ vluxseg2ei32_v_u64m2

#define vluxseg2ei32_v_u64m2 ( ... ) __riscv_vluxseg2ei32_v_u64m2(__VA_ARGS__)

◆ vluxseg2ei32_v_u64m2_m

#define vluxseg2ei32_v_u64m2_m ( ... ) __riscv_vluxseg2ei32_v_u64m2_tumu(__VA_ARGS__)

◆ vluxseg2ei32_v_u64m4

#define vluxseg2ei32_v_u64m4 ( ... ) __riscv_vluxseg2ei32_v_u64m4(__VA_ARGS__)

◆ vluxseg2ei32_v_u64m4_m

#define vluxseg2ei32_v_u64m4_m ( ... ) __riscv_vluxseg2ei32_v_u64m4_tumu(__VA_ARGS__)

◆ vluxseg2ei32_v_u8m1

#define vluxseg2ei32_v_u8m1 ( ... ) __riscv_vluxseg2ei32_v_u8m1(__VA_ARGS__)

◆ vluxseg2ei32_v_u8m1_m

#define vluxseg2ei32_v_u8m1_m ( ... ) __riscv_vluxseg2ei32_v_u8m1_tumu(__VA_ARGS__)

◆ vluxseg2ei32_v_u8m2

#define vluxseg2ei32_v_u8m2 ( ... ) __riscv_vluxseg2ei32_v_u8m2(__VA_ARGS__)

◆ vluxseg2ei32_v_u8m2_m

#define vluxseg2ei32_v_u8m2_m ( ... ) __riscv_vluxseg2ei32_v_u8m2_tumu(__VA_ARGS__)

◆ vluxseg2ei32_v_u8mf2

#define vluxseg2ei32_v_u8mf2 ( ... ) __riscv_vluxseg2ei32_v_u8mf2(__VA_ARGS__)

◆ vluxseg2ei32_v_u8mf2_m

#define vluxseg2ei32_v_u8mf2_m ( ... ) __riscv_vluxseg2ei32_v_u8mf2_tumu(__VA_ARGS__)

◆ vluxseg2ei32_v_u8mf4

#define vluxseg2ei32_v_u8mf4 ( ... ) __riscv_vluxseg2ei32_v_u8mf4(__VA_ARGS__)

◆ vluxseg2ei32_v_u8mf4_m

#define vluxseg2ei32_v_u8mf4_m ( ... ) __riscv_vluxseg2ei32_v_u8mf4_tumu(__VA_ARGS__)

◆ vluxseg2ei32_v_u8mf8

#define vluxseg2ei32_v_u8mf8 ( ... ) __riscv_vluxseg2ei32_v_u8mf8(__VA_ARGS__)

◆ vluxseg2ei32_v_u8mf8_m

#define vluxseg2ei32_v_u8mf8_m ( ... ) __riscv_vluxseg2ei32_v_u8mf8_tumu(__VA_ARGS__)

◆ vluxseg2ei64_v_f16m1

#define vluxseg2ei64_v_f16m1 ( ... ) __riscv_vluxseg2ei64_v_f16m1(__VA_ARGS__)

◆ vluxseg2ei64_v_f16m1_m

#define vluxseg2ei64_v_f16m1_m ( ... ) __riscv_vluxseg2ei64_v_f16m1_tumu(__VA_ARGS__)

◆ vluxseg2ei64_v_f16m2

#define vluxseg2ei64_v_f16m2 ( ... ) __riscv_vluxseg2ei64_v_f16m2(__VA_ARGS__)

◆ vluxseg2ei64_v_f16m2_m

#define vluxseg2ei64_v_f16m2_m ( ... ) __riscv_vluxseg2ei64_v_f16m2_tumu(__VA_ARGS__)

◆ vluxseg2ei64_v_f16mf2

#define vluxseg2ei64_v_f16mf2 ( ... ) __riscv_vluxseg2ei64_v_f16mf2(__VA_ARGS__)

◆ vluxseg2ei64_v_f16mf2_m

#define vluxseg2ei64_v_f16mf2_m ( ... ) __riscv_vluxseg2ei64_v_f16mf2_tumu(__VA_ARGS__)

◆ vluxseg2ei64_v_f16mf4

#define vluxseg2ei64_v_f16mf4 ( ... ) __riscv_vluxseg2ei64_v_f16mf4(__VA_ARGS__)

◆ vluxseg2ei64_v_f16mf4_m

#define vluxseg2ei64_v_f16mf4_m ( ... ) __riscv_vluxseg2ei64_v_f16mf4_tumu(__VA_ARGS__)

◆ vluxseg2ei64_v_f32m1

#define vluxseg2ei64_v_f32m1 ( ... ) __riscv_vluxseg2ei64_v_f32m1(__VA_ARGS__)

◆ vluxseg2ei64_v_f32m1_m

#define vluxseg2ei64_v_f32m1_m ( ... ) __riscv_vluxseg2ei64_v_f32m1_tumu(__VA_ARGS__)

◆ vluxseg2ei64_v_f32m2

#define vluxseg2ei64_v_f32m2 ( ... ) __riscv_vluxseg2ei64_v_f32m2(__VA_ARGS__)

◆ vluxseg2ei64_v_f32m2_m

#define vluxseg2ei64_v_f32m2_m ( ... ) __riscv_vluxseg2ei64_v_f32m2_tumu(__VA_ARGS__)

◆ vluxseg2ei64_v_f32m4

#define vluxseg2ei64_v_f32m4 ( ... ) __riscv_vluxseg2ei64_v_f32m4(__VA_ARGS__)

◆ vluxseg2ei64_v_f32m4_m

#define vluxseg2ei64_v_f32m4_m ( ... ) __riscv_vluxseg2ei64_v_f32m4_tumu(__VA_ARGS__)

◆ vluxseg2ei64_v_f32mf2

#define vluxseg2ei64_v_f32mf2 ( ... ) __riscv_vluxseg2ei64_v_f32mf2(__VA_ARGS__)

◆ vluxseg2ei64_v_f32mf2_m

#define vluxseg2ei64_v_f32mf2_m ( ... ) __riscv_vluxseg2ei64_v_f32mf2_tumu(__VA_ARGS__)

◆ vluxseg2ei64_v_f64m1

#define vluxseg2ei64_v_f64m1 ( ... ) __riscv_vluxseg2ei64_v_f64m1(__VA_ARGS__)

◆ vluxseg2ei64_v_f64m1_m

#define vluxseg2ei64_v_f64m1_m ( ... ) __riscv_vluxseg2ei64_v_f64m1_tumu(__VA_ARGS__)

◆ vluxseg2ei64_v_f64m2

#define vluxseg2ei64_v_f64m2 ( ... ) __riscv_vluxseg2ei64_v_f64m2(__VA_ARGS__)

◆ vluxseg2ei64_v_f64m2_m

#define vluxseg2ei64_v_f64m2_m ( ... ) __riscv_vluxseg2ei64_v_f64m2_tumu(__VA_ARGS__)

◆ vluxseg2ei64_v_f64m4

#define vluxseg2ei64_v_f64m4 ( ... ) __riscv_vluxseg2ei64_v_f64m4(__VA_ARGS__)

◆ vluxseg2ei64_v_f64m4_m

#define vluxseg2ei64_v_f64m4_m ( ... ) __riscv_vluxseg2ei64_v_f64m4_tumu(__VA_ARGS__)

◆ vluxseg2ei64_v_i16m1

#define vluxseg2ei64_v_i16m1 ( ... ) __riscv_vluxseg2ei64_v_i16m1(__VA_ARGS__)

◆ vluxseg2ei64_v_i16m1_m

#define vluxseg2ei64_v_i16m1_m ( ... ) __riscv_vluxseg2ei64_v_i16m1_tumu(__VA_ARGS__)

◆ vluxseg2ei64_v_i16m2

#define vluxseg2ei64_v_i16m2 ( ... ) __riscv_vluxseg2ei64_v_i16m2(__VA_ARGS__)

◆ vluxseg2ei64_v_i16m2_m

#define vluxseg2ei64_v_i16m2_m ( ... ) __riscv_vluxseg2ei64_v_i16m2_tumu(__VA_ARGS__)

◆ vluxseg2ei64_v_i16mf2

#define vluxseg2ei64_v_i16mf2 ( ... ) __riscv_vluxseg2ei64_v_i16mf2(__VA_ARGS__)

◆ vluxseg2ei64_v_i16mf2_m

#define vluxseg2ei64_v_i16mf2_m ( ... ) __riscv_vluxseg2ei64_v_i16mf2_tumu(__VA_ARGS__)

◆ vluxseg2ei64_v_i16mf4

#define vluxseg2ei64_v_i16mf4 ( ... ) __riscv_vluxseg2ei64_v_i16mf4(__VA_ARGS__)

◆ vluxseg2ei64_v_i16mf4_m

#define vluxseg2ei64_v_i16mf4_m ( ... ) __riscv_vluxseg2ei64_v_i16mf4_tumu(__VA_ARGS__)

◆ vluxseg2ei64_v_i32m1

#define vluxseg2ei64_v_i32m1 ( ... ) __riscv_vluxseg2ei64_v_i32m1(__VA_ARGS__)

◆ vluxseg2ei64_v_i32m1_m

#define vluxseg2ei64_v_i32m1_m ( ... ) __riscv_vluxseg2ei64_v_i32m1_tumu(__VA_ARGS__)

◆ vluxseg2ei64_v_i32m2

#define vluxseg2ei64_v_i32m2 ( ... ) __riscv_vluxseg2ei64_v_i32m2(__VA_ARGS__)

◆ vluxseg2ei64_v_i32m2_m

#define vluxseg2ei64_v_i32m2_m ( ... ) __riscv_vluxseg2ei64_v_i32m2_tumu(__VA_ARGS__)

◆ vluxseg2ei64_v_i32m4

#define vluxseg2ei64_v_i32m4 ( ... ) __riscv_vluxseg2ei64_v_i32m4(__VA_ARGS__)

◆ vluxseg2ei64_v_i32m4_m

#define vluxseg2ei64_v_i32m4_m ( ... ) __riscv_vluxseg2ei64_v_i32m4_tumu(__VA_ARGS__)

◆ vluxseg2ei64_v_i32mf2

#define vluxseg2ei64_v_i32mf2 ( ... ) __riscv_vluxseg2ei64_v_i32mf2(__VA_ARGS__)

◆ vluxseg2ei64_v_i32mf2_m

#define vluxseg2ei64_v_i32mf2_m ( ... ) __riscv_vluxseg2ei64_v_i32mf2_tumu(__VA_ARGS__)

◆ vluxseg2ei64_v_i64m1

#define vluxseg2ei64_v_i64m1 ( ... ) __riscv_vluxseg2ei64_v_i64m1(__VA_ARGS__)

◆ vluxseg2ei64_v_i64m1_m

#define vluxseg2ei64_v_i64m1_m ( ... ) __riscv_vluxseg2ei64_v_i64m1_tumu(__VA_ARGS__)

◆ vluxseg2ei64_v_i64m2

#define vluxseg2ei64_v_i64m2 ( ... ) __riscv_vluxseg2ei64_v_i64m2(__VA_ARGS__)

◆ vluxseg2ei64_v_i64m2_m

#define vluxseg2ei64_v_i64m2_m ( ... ) __riscv_vluxseg2ei64_v_i64m2_tumu(__VA_ARGS__)

◆ vluxseg2ei64_v_i64m4

#define vluxseg2ei64_v_i64m4 ( ... ) __riscv_vluxseg2ei64_v_i64m4(__VA_ARGS__)

◆ vluxseg2ei64_v_i64m4_m

#define vluxseg2ei64_v_i64m4_m ( ... ) __riscv_vluxseg2ei64_v_i64m4_tumu(__VA_ARGS__)

◆ vluxseg2ei64_v_i8m1

#define vluxseg2ei64_v_i8m1 ( ... ) __riscv_vluxseg2ei64_v_i8m1(__VA_ARGS__)

◆ vluxseg2ei64_v_i8m1_m

#define vluxseg2ei64_v_i8m1_m ( ... ) __riscv_vluxseg2ei64_v_i8m1_tumu(__VA_ARGS__)

◆ vluxseg2ei64_v_i8mf2

#define vluxseg2ei64_v_i8mf2 ( ... ) __riscv_vluxseg2ei64_v_i8mf2(__VA_ARGS__)

◆ vluxseg2ei64_v_i8mf2_m

#define vluxseg2ei64_v_i8mf2_m ( ... ) __riscv_vluxseg2ei64_v_i8mf2_tumu(__VA_ARGS__)

◆ vluxseg2ei64_v_i8mf4

#define vluxseg2ei64_v_i8mf4 ( ... ) __riscv_vluxseg2ei64_v_i8mf4(__VA_ARGS__)

◆ vluxseg2ei64_v_i8mf4_m

#define vluxseg2ei64_v_i8mf4_m ( ... ) __riscv_vluxseg2ei64_v_i8mf4_tumu(__VA_ARGS__)

◆ vluxseg2ei64_v_i8mf8

#define vluxseg2ei64_v_i8mf8 ( ... ) __riscv_vluxseg2ei64_v_i8mf8(__VA_ARGS__)

◆ vluxseg2ei64_v_i8mf8_m

#define vluxseg2ei64_v_i8mf8_m ( ... ) __riscv_vluxseg2ei64_v_i8mf8_tumu(__VA_ARGS__)

◆ vluxseg2ei64_v_u16m1

#define vluxseg2ei64_v_u16m1 ( ... ) __riscv_vluxseg2ei64_v_u16m1(__VA_ARGS__)

◆ vluxseg2ei64_v_u16m1_m

#define vluxseg2ei64_v_u16m1_m ( ... ) __riscv_vluxseg2ei64_v_u16m1_tumu(__VA_ARGS__)

◆ vluxseg2ei64_v_u16m2

#define vluxseg2ei64_v_u16m2 ( ... ) __riscv_vluxseg2ei64_v_u16m2(__VA_ARGS__)

◆ vluxseg2ei64_v_u16m2_m

#define vluxseg2ei64_v_u16m2_m ( ... ) __riscv_vluxseg2ei64_v_u16m2_tumu(__VA_ARGS__)

◆ vluxseg2ei64_v_u16mf2

#define vluxseg2ei64_v_u16mf2 ( ... ) __riscv_vluxseg2ei64_v_u16mf2(__VA_ARGS__)

◆ vluxseg2ei64_v_u16mf2_m

#define vluxseg2ei64_v_u16mf2_m ( ... ) __riscv_vluxseg2ei64_v_u16mf2_tumu(__VA_ARGS__)

◆ vluxseg2ei64_v_u16mf4

#define vluxseg2ei64_v_u16mf4 ( ... ) __riscv_vluxseg2ei64_v_u16mf4(__VA_ARGS__)

◆ vluxseg2ei64_v_u16mf4_m

#define vluxseg2ei64_v_u16mf4_m ( ... ) __riscv_vluxseg2ei64_v_u16mf4_tumu(__VA_ARGS__)

◆ vluxseg2ei64_v_u32m1

#define vluxseg2ei64_v_u32m1 ( ... ) __riscv_vluxseg2ei64_v_u32m1(__VA_ARGS__)

◆ vluxseg2ei64_v_u32m1_m

#define vluxseg2ei64_v_u32m1_m ( ... ) __riscv_vluxseg2ei64_v_u32m1_tumu(__VA_ARGS__)

◆ vluxseg2ei64_v_u32m2

#define vluxseg2ei64_v_u32m2 ( ... ) __riscv_vluxseg2ei64_v_u32m2(__VA_ARGS__)

◆ vluxseg2ei64_v_u32m2_m

#define vluxseg2ei64_v_u32m2_m ( ... ) __riscv_vluxseg2ei64_v_u32m2_tumu(__VA_ARGS__)

◆ vluxseg2ei64_v_u32m4

#define vluxseg2ei64_v_u32m4 ( ... ) __riscv_vluxseg2ei64_v_u32m4(__VA_ARGS__)

◆ vluxseg2ei64_v_u32m4_m

#define vluxseg2ei64_v_u32m4_m ( ... ) __riscv_vluxseg2ei64_v_u32m4_tumu(__VA_ARGS__)

◆ vluxseg2ei64_v_u32mf2

#define vluxseg2ei64_v_u32mf2 ( ... ) __riscv_vluxseg2ei64_v_u32mf2(__VA_ARGS__)

◆ vluxseg2ei64_v_u32mf2_m

#define vluxseg2ei64_v_u32mf2_m ( ... ) __riscv_vluxseg2ei64_v_u32mf2_tumu(__VA_ARGS__)

◆ vluxseg2ei64_v_u64m1

#define vluxseg2ei64_v_u64m1 ( ... ) __riscv_vluxseg2ei64_v_u64m1(__VA_ARGS__)

◆ vluxseg2ei64_v_u64m1_m

#define vluxseg2ei64_v_u64m1_m ( ... ) __riscv_vluxseg2ei64_v_u64m1_tumu(__VA_ARGS__)

◆ vluxseg2ei64_v_u64m2

#define vluxseg2ei64_v_u64m2 ( ... ) __riscv_vluxseg2ei64_v_u64m2(__VA_ARGS__)

◆ vluxseg2ei64_v_u64m2_m

#define vluxseg2ei64_v_u64m2_m ( ... ) __riscv_vluxseg2ei64_v_u64m2_tumu(__VA_ARGS__)

◆ vluxseg2ei64_v_u64m4

#define vluxseg2ei64_v_u64m4 ( ... ) __riscv_vluxseg2ei64_v_u64m4(__VA_ARGS__)

◆ vluxseg2ei64_v_u64m4_m

#define vluxseg2ei64_v_u64m4_m ( ... ) __riscv_vluxseg2ei64_v_u64m4_tumu(__VA_ARGS__)

◆ vluxseg2ei64_v_u8m1

#define vluxseg2ei64_v_u8m1 ( ... ) __riscv_vluxseg2ei64_v_u8m1(__VA_ARGS__)

◆ vluxseg2ei64_v_u8m1_m

#define vluxseg2ei64_v_u8m1_m ( ... ) __riscv_vluxseg2ei64_v_u8m1_tumu(__VA_ARGS__)

◆ vluxseg2ei64_v_u8mf2

#define vluxseg2ei64_v_u8mf2 ( ... ) __riscv_vluxseg2ei64_v_u8mf2(__VA_ARGS__)

◆ vluxseg2ei64_v_u8mf2_m

#define vluxseg2ei64_v_u8mf2_m ( ... ) __riscv_vluxseg2ei64_v_u8mf2_tumu(__VA_ARGS__)

◆ vluxseg2ei64_v_u8mf4

#define vluxseg2ei64_v_u8mf4 ( ... ) __riscv_vluxseg2ei64_v_u8mf4(__VA_ARGS__)

◆ vluxseg2ei64_v_u8mf4_m

#define vluxseg2ei64_v_u8mf4_m ( ... ) __riscv_vluxseg2ei64_v_u8mf4_tumu(__VA_ARGS__)

◆ vluxseg2ei64_v_u8mf8

#define vluxseg2ei64_v_u8mf8 ( ... ) __riscv_vluxseg2ei64_v_u8mf8(__VA_ARGS__)

◆ vluxseg2ei64_v_u8mf8_m

#define vluxseg2ei64_v_u8mf8_m ( ... ) __riscv_vluxseg2ei64_v_u8mf8_tumu(__VA_ARGS__)

◆ vluxseg2ei8_v_f16m1

#define vluxseg2ei8_v_f16m1 ( ... ) __riscv_vluxseg2ei8_v_f16m1(__VA_ARGS__)

◆ vluxseg2ei8_v_f16m1_m

#define vluxseg2ei8_v_f16m1_m ( ... ) __riscv_vluxseg2ei8_v_f16m1_tumu(__VA_ARGS__)

◆ vluxseg2ei8_v_f16m2

#define vluxseg2ei8_v_f16m2 ( ... ) __riscv_vluxseg2ei8_v_f16m2(__VA_ARGS__)

◆ vluxseg2ei8_v_f16m2_m

#define vluxseg2ei8_v_f16m2_m ( ... ) __riscv_vluxseg2ei8_v_f16m2_tumu(__VA_ARGS__)

◆ vluxseg2ei8_v_f16m4

#define vluxseg2ei8_v_f16m4 ( ... ) __riscv_vluxseg2ei8_v_f16m4(__VA_ARGS__)

◆ vluxseg2ei8_v_f16m4_m

#define vluxseg2ei8_v_f16m4_m ( ... ) __riscv_vluxseg2ei8_v_f16m4_tumu(__VA_ARGS__)

◆ vluxseg2ei8_v_f16mf2

#define vluxseg2ei8_v_f16mf2 ( ... ) __riscv_vluxseg2ei8_v_f16mf2(__VA_ARGS__)

◆ vluxseg2ei8_v_f16mf2_m

#define vluxseg2ei8_v_f16mf2_m ( ... ) __riscv_vluxseg2ei8_v_f16mf2_tumu(__VA_ARGS__)

◆ vluxseg2ei8_v_f16mf4

#define vluxseg2ei8_v_f16mf4 ( ... ) __riscv_vluxseg2ei8_v_f16mf4(__VA_ARGS__)

◆ vluxseg2ei8_v_f16mf4_m

#define vluxseg2ei8_v_f16mf4_m ( ... ) __riscv_vluxseg2ei8_v_f16mf4_tumu(__VA_ARGS__)

◆ vluxseg2ei8_v_f32m1

#define vluxseg2ei8_v_f32m1 ( ... ) __riscv_vluxseg2ei8_v_f32m1(__VA_ARGS__)

◆ vluxseg2ei8_v_f32m1_m

#define vluxseg2ei8_v_f32m1_m ( ... ) __riscv_vluxseg2ei8_v_f32m1_tumu(__VA_ARGS__)

◆ vluxseg2ei8_v_f32m2

#define vluxseg2ei8_v_f32m2 ( ... ) __riscv_vluxseg2ei8_v_f32m2(__VA_ARGS__)

◆ vluxseg2ei8_v_f32m2_m

#define vluxseg2ei8_v_f32m2_m ( ... ) __riscv_vluxseg2ei8_v_f32m2_tumu(__VA_ARGS__)

◆ vluxseg2ei8_v_f32m4

#define vluxseg2ei8_v_f32m4 ( ... ) __riscv_vluxseg2ei8_v_f32m4(__VA_ARGS__)

◆ vluxseg2ei8_v_f32m4_m

#define vluxseg2ei8_v_f32m4_m ( ... ) __riscv_vluxseg2ei8_v_f32m4_tumu(__VA_ARGS__)

◆ vluxseg2ei8_v_f32mf2

#define vluxseg2ei8_v_f32mf2 ( ... ) __riscv_vluxseg2ei8_v_f32mf2(__VA_ARGS__)

◆ vluxseg2ei8_v_f32mf2_m

#define vluxseg2ei8_v_f32mf2_m ( ... ) __riscv_vluxseg2ei8_v_f32mf2_tumu(__VA_ARGS__)

◆ vluxseg2ei8_v_f64m1

#define vluxseg2ei8_v_f64m1 ( ... ) __riscv_vluxseg2ei8_v_f64m1(__VA_ARGS__)

◆ vluxseg2ei8_v_f64m1_m

#define vluxseg2ei8_v_f64m1_m ( ... ) __riscv_vluxseg2ei8_v_f64m1_tumu(__VA_ARGS__)

◆ vluxseg2ei8_v_f64m2

#define vluxseg2ei8_v_f64m2 ( ... ) __riscv_vluxseg2ei8_v_f64m2(__VA_ARGS__)

◆ vluxseg2ei8_v_f64m2_m

#define vluxseg2ei8_v_f64m2_m ( ... ) __riscv_vluxseg2ei8_v_f64m2_tumu(__VA_ARGS__)

◆ vluxseg2ei8_v_f64m4

#define vluxseg2ei8_v_f64m4 ( ... ) __riscv_vluxseg2ei8_v_f64m4(__VA_ARGS__)

◆ vluxseg2ei8_v_f64m4_m

#define vluxseg2ei8_v_f64m4_m ( ... ) __riscv_vluxseg2ei8_v_f64m4_tumu(__VA_ARGS__)

◆ vluxseg2ei8_v_i16m1

#define vluxseg2ei8_v_i16m1 ( ... ) __riscv_vluxseg2ei8_v_i16m1(__VA_ARGS__)

◆ vluxseg2ei8_v_i16m1_m

#define vluxseg2ei8_v_i16m1_m ( ... ) __riscv_vluxseg2ei8_v_i16m1_tumu(__VA_ARGS__)

◆ vluxseg2ei8_v_i16m2

#define vluxseg2ei8_v_i16m2 ( ... ) __riscv_vluxseg2ei8_v_i16m2(__VA_ARGS__)

◆ vluxseg2ei8_v_i16m2_m

#define vluxseg2ei8_v_i16m2_m ( ... ) __riscv_vluxseg2ei8_v_i16m2_tumu(__VA_ARGS__)

◆ vluxseg2ei8_v_i16m4

#define vluxseg2ei8_v_i16m4 ( ... ) __riscv_vluxseg2ei8_v_i16m4(__VA_ARGS__)

◆ vluxseg2ei8_v_i16m4_m

#define vluxseg2ei8_v_i16m4_m ( ... ) __riscv_vluxseg2ei8_v_i16m4_tumu(__VA_ARGS__)

◆ vluxseg2ei8_v_i16mf2

#define vluxseg2ei8_v_i16mf2 ( ... ) __riscv_vluxseg2ei8_v_i16mf2(__VA_ARGS__)

◆ vluxseg2ei8_v_i16mf2_m

#define vluxseg2ei8_v_i16mf2_m ( ... ) __riscv_vluxseg2ei8_v_i16mf2_tumu(__VA_ARGS__)

◆ vluxseg2ei8_v_i16mf4

#define vluxseg2ei8_v_i16mf4 ( ... ) __riscv_vluxseg2ei8_v_i16mf4(__VA_ARGS__)

◆ vluxseg2ei8_v_i16mf4_m

#define vluxseg2ei8_v_i16mf4_m ( ... ) __riscv_vluxseg2ei8_v_i16mf4_tumu(__VA_ARGS__)

◆ vluxseg2ei8_v_i32m1

#define vluxseg2ei8_v_i32m1 ( ... ) __riscv_vluxseg2ei8_v_i32m1(__VA_ARGS__)

◆ vluxseg2ei8_v_i32m1_m

#define vluxseg2ei8_v_i32m1_m ( ... ) __riscv_vluxseg2ei8_v_i32m1_tumu(__VA_ARGS__)

◆ vluxseg2ei8_v_i32m2

#define vluxseg2ei8_v_i32m2 ( ... ) __riscv_vluxseg2ei8_v_i32m2(__VA_ARGS__)

◆ vluxseg2ei8_v_i32m2_m

#define vluxseg2ei8_v_i32m2_m ( ... ) __riscv_vluxseg2ei8_v_i32m2_tumu(__VA_ARGS__)

◆ vluxseg2ei8_v_i32m4

#define vluxseg2ei8_v_i32m4 ( ... ) __riscv_vluxseg2ei8_v_i32m4(__VA_ARGS__)

◆ vluxseg2ei8_v_i32m4_m

#define vluxseg2ei8_v_i32m4_m ( ... ) __riscv_vluxseg2ei8_v_i32m4_tumu(__VA_ARGS__)

◆ vluxseg2ei8_v_i32mf2

#define vluxseg2ei8_v_i32mf2 ( ... ) __riscv_vluxseg2ei8_v_i32mf2(__VA_ARGS__)

◆ vluxseg2ei8_v_i32mf2_m

#define vluxseg2ei8_v_i32mf2_m ( ... ) __riscv_vluxseg2ei8_v_i32mf2_tumu(__VA_ARGS__)

◆ vluxseg2ei8_v_i64m1

#define vluxseg2ei8_v_i64m1 ( ... ) __riscv_vluxseg2ei8_v_i64m1(__VA_ARGS__)

◆ vluxseg2ei8_v_i64m1_m

#define vluxseg2ei8_v_i64m1_m ( ... ) __riscv_vluxseg2ei8_v_i64m1_tumu(__VA_ARGS__)

◆ vluxseg2ei8_v_i64m2

#define vluxseg2ei8_v_i64m2 ( ... ) __riscv_vluxseg2ei8_v_i64m2(__VA_ARGS__)

◆ vluxseg2ei8_v_i64m2_m

#define vluxseg2ei8_v_i64m2_m ( ... ) __riscv_vluxseg2ei8_v_i64m2_tumu(__VA_ARGS__)

◆ vluxseg2ei8_v_i64m4

#define vluxseg2ei8_v_i64m4 ( ... ) __riscv_vluxseg2ei8_v_i64m4(__VA_ARGS__)

◆ vluxseg2ei8_v_i64m4_m

#define vluxseg2ei8_v_i64m4_m ( ... ) __riscv_vluxseg2ei8_v_i64m4_tumu(__VA_ARGS__)

◆ vluxseg2ei8_v_i8m1

#define vluxseg2ei8_v_i8m1 ( ... ) __riscv_vluxseg2ei8_v_i8m1(__VA_ARGS__)

◆ vluxseg2ei8_v_i8m1_m

#define vluxseg2ei8_v_i8m1_m ( ... ) __riscv_vluxseg2ei8_v_i8m1_tumu(__VA_ARGS__)

◆ vluxseg2ei8_v_i8m2

#define vluxseg2ei8_v_i8m2 ( ... ) __riscv_vluxseg2ei8_v_i8m2(__VA_ARGS__)

◆ vluxseg2ei8_v_i8m2_m

#define vluxseg2ei8_v_i8m2_m ( ... ) __riscv_vluxseg2ei8_v_i8m2_tumu(__VA_ARGS__)

◆ vluxseg2ei8_v_i8m4

#define vluxseg2ei8_v_i8m4 ( ... ) __riscv_vluxseg2ei8_v_i8m4(__VA_ARGS__)

◆ vluxseg2ei8_v_i8m4_m

#define vluxseg2ei8_v_i8m4_m ( ... ) __riscv_vluxseg2ei8_v_i8m4_tumu(__VA_ARGS__)

◆ vluxseg2ei8_v_i8mf2

#define vluxseg2ei8_v_i8mf2 ( ... ) __riscv_vluxseg2ei8_v_i8mf2(__VA_ARGS__)

◆ vluxseg2ei8_v_i8mf2_m

#define vluxseg2ei8_v_i8mf2_m ( ... ) __riscv_vluxseg2ei8_v_i8mf2_tumu(__VA_ARGS__)

◆ vluxseg2ei8_v_i8mf4

#define vluxseg2ei8_v_i8mf4 ( ... ) __riscv_vluxseg2ei8_v_i8mf4(__VA_ARGS__)

◆ vluxseg2ei8_v_i8mf4_m

#define vluxseg2ei8_v_i8mf4_m ( ... ) __riscv_vluxseg2ei8_v_i8mf4_tumu(__VA_ARGS__)

◆ vluxseg2ei8_v_i8mf8

#define vluxseg2ei8_v_i8mf8 ( ... ) __riscv_vluxseg2ei8_v_i8mf8(__VA_ARGS__)

◆ vluxseg2ei8_v_i8mf8_m

#define vluxseg2ei8_v_i8mf8_m ( ... ) __riscv_vluxseg2ei8_v_i8mf8_tumu(__VA_ARGS__)

◆ vluxseg2ei8_v_u16m1

#define vluxseg2ei8_v_u16m1 ( ... ) __riscv_vluxseg2ei8_v_u16m1(__VA_ARGS__)

◆ vluxseg2ei8_v_u16m1_m

#define vluxseg2ei8_v_u16m1_m ( ... ) __riscv_vluxseg2ei8_v_u16m1_tumu(__VA_ARGS__)

◆ vluxseg2ei8_v_u16m2

#define vluxseg2ei8_v_u16m2 ( ... ) __riscv_vluxseg2ei8_v_u16m2(__VA_ARGS__)

◆ vluxseg2ei8_v_u16m2_m

#define vluxseg2ei8_v_u16m2_m ( ... ) __riscv_vluxseg2ei8_v_u16m2_tumu(__VA_ARGS__)

◆ vluxseg2ei8_v_u16m4

#define vluxseg2ei8_v_u16m4 ( ... ) __riscv_vluxseg2ei8_v_u16m4(__VA_ARGS__)

◆ vluxseg2ei8_v_u16m4_m

#define vluxseg2ei8_v_u16m4_m ( ... ) __riscv_vluxseg2ei8_v_u16m4_tumu(__VA_ARGS__)

◆ vluxseg2ei8_v_u16mf2

#define vluxseg2ei8_v_u16mf2 ( ... ) __riscv_vluxseg2ei8_v_u16mf2(__VA_ARGS__)

◆ vluxseg2ei8_v_u16mf2_m

#define vluxseg2ei8_v_u16mf2_m ( ... ) __riscv_vluxseg2ei8_v_u16mf2_tumu(__VA_ARGS__)

◆ vluxseg2ei8_v_u16mf4

#define vluxseg2ei8_v_u16mf4 ( ... ) __riscv_vluxseg2ei8_v_u16mf4(__VA_ARGS__)

◆ vluxseg2ei8_v_u16mf4_m

#define vluxseg2ei8_v_u16mf4_m ( ... ) __riscv_vluxseg2ei8_v_u16mf4_tumu(__VA_ARGS__)

◆ vluxseg2ei8_v_u32m1

#define vluxseg2ei8_v_u32m1 ( ... ) __riscv_vluxseg2ei8_v_u32m1(__VA_ARGS__)

◆ vluxseg2ei8_v_u32m1_m

#define vluxseg2ei8_v_u32m1_m ( ... ) __riscv_vluxseg2ei8_v_u32m1_tumu(__VA_ARGS__)

◆ vluxseg2ei8_v_u32m2

#define vluxseg2ei8_v_u32m2 ( ... ) __riscv_vluxseg2ei8_v_u32m2(__VA_ARGS__)

◆ vluxseg2ei8_v_u32m2_m

#define vluxseg2ei8_v_u32m2_m ( ... ) __riscv_vluxseg2ei8_v_u32m2_tumu(__VA_ARGS__)

◆ vluxseg2ei8_v_u32m4

#define vluxseg2ei8_v_u32m4 ( ... ) __riscv_vluxseg2ei8_v_u32m4(__VA_ARGS__)

◆ vluxseg2ei8_v_u32m4_m

#define vluxseg2ei8_v_u32m4_m ( ... ) __riscv_vluxseg2ei8_v_u32m4_tumu(__VA_ARGS__)

◆ vluxseg2ei8_v_u32mf2

#define vluxseg2ei8_v_u32mf2 ( ... ) __riscv_vluxseg2ei8_v_u32mf2(__VA_ARGS__)

◆ vluxseg2ei8_v_u32mf2_m

#define vluxseg2ei8_v_u32mf2_m ( ... ) __riscv_vluxseg2ei8_v_u32mf2_tumu(__VA_ARGS__)

◆ vluxseg2ei8_v_u64m1

#define vluxseg2ei8_v_u64m1 ( ... ) __riscv_vluxseg2ei8_v_u64m1(__VA_ARGS__)

◆ vluxseg2ei8_v_u64m1_m

#define vluxseg2ei8_v_u64m1_m ( ... ) __riscv_vluxseg2ei8_v_u64m1_tumu(__VA_ARGS__)

◆ vluxseg2ei8_v_u64m2

#define vluxseg2ei8_v_u64m2 ( ... ) __riscv_vluxseg2ei8_v_u64m2(__VA_ARGS__)

◆ vluxseg2ei8_v_u64m2_m

#define vluxseg2ei8_v_u64m2_m ( ... ) __riscv_vluxseg2ei8_v_u64m2_tumu(__VA_ARGS__)

◆ vluxseg2ei8_v_u64m4

#define vluxseg2ei8_v_u64m4 ( ... ) __riscv_vluxseg2ei8_v_u64m4(__VA_ARGS__)

◆ vluxseg2ei8_v_u64m4_m

#define vluxseg2ei8_v_u64m4_m ( ... ) __riscv_vluxseg2ei8_v_u64m4_tumu(__VA_ARGS__)

◆ vluxseg2ei8_v_u8m1

#define vluxseg2ei8_v_u8m1 ( ... ) __riscv_vluxseg2ei8_v_u8m1(__VA_ARGS__)

◆ vluxseg2ei8_v_u8m1_m

#define vluxseg2ei8_v_u8m1_m ( ... ) __riscv_vluxseg2ei8_v_u8m1_tumu(__VA_ARGS__)

◆ vluxseg2ei8_v_u8m2

#define vluxseg2ei8_v_u8m2 ( ... ) __riscv_vluxseg2ei8_v_u8m2(__VA_ARGS__)

◆ vluxseg2ei8_v_u8m2_m

#define vluxseg2ei8_v_u8m2_m ( ... ) __riscv_vluxseg2ei8_v_u8m2_tumu(__VA_ARGS__)

◆ vluxseg2ei8_v_u8m4

#define vluxseg2ei8_v_u8m4 ( ... ) __riscv_vluxseg2ei8_v_u8m4(__VA_ARGS__)

◆ vluxseg2ei8_v_u8m4_m

#define vluxseg2ei8_v_u8m4_m ( ... ) __riscv_vluxseg2ei8_v_u8m4_tumu(__VA_ARGS__)

◆ vluxseg2ei8_v_u8mf2

#define vluxseg2ei8_v_u8mf2 ( ... ) __riscv_vluxseg2ei8_v_u8mf2(__VA_ARGS__)

◆ vluxseg2ei8_v_u8mf2_m

#define vluxseg2ei8_v_u8mf2_m ( ... ) __riscv_vluxseg2ei8_v_u8mf2_tumu(__VA_ARGS__)

◆ vluxseg2ei8_v_u8mf4

#define vluxseg2ei8_v_u8mf4 ( ... ) __riscv_vluxseg2ei8_v_u8mf4(__VA_ARGS__)

◆ vluxseg2ei8_v_u8mf4_m

#define vluxseg2ei8_v_u8mf4_m ( ... ) __riscv_vluxseg2ei8_v_u8mf4_tumu(__VA_ARGS__)

◆ vluxseg2ei8_v_u8mf8

#define vluxseg2ei8_v_u8mf8 ( ... ) __riscv_vluxseg2ei8_v_u8mf8(__VA_ARGS__)

◆ vluxseg2ei8_v_u8mf8_m

#define vluxseg2ei8_v_u8mf8_m ( ... ) __riscv_vluxseg2ei8_v_u8mf8_tumu(__VA_ARGS__)

◆ vluxseg3ei16_v_f16m1

#define vluxseg3ei16_v_f16m1 ( ... ) __riscv_vluxseg3ei16_v_f16m1(__VA_ARGS__)

◆ vluxseg3ei16_v_f16m1_m

#define vluxseg3ei16_v_f16m1_m ( ... ) __riscv_vluxseg3ei16_v_f16m1_tumu(__VA_ARGS__)

◆ vluxseg3ei16_v_f16m2

#define vluxseg3ei16_v_f16m2 ( ... ) __riscv_vluxseg3ei16_v_f16m2(__VA_ARGS__)

◆ vluxseg3ei16_v_f16m2_m

#define vluxseg3ei16_v_f16m2_m ( ... ) __riscv_vluxseg3ei16_v_f16m2_tumu(__VA_ARGS__)

◆ vluxseg3ei16_v_f16mf2

#define vluxseg3ei16_v_f16mf2 ( ... ) __riscv_vluxseg3ei16_v_f16mf2(__VA_ARGS__)

◆ vluxseg3ei16_v_f16mf2_m

#define vluxseg3ei16_v_f16mf2_m ( ... ) __riscv_vluxseg3ei16_v_f16mf2_tumu(__VA_ARGS__)

◆ vluxseg3ei16_v_f16mf4

#define vluxseg3ei16_v_f16mf4 ( ... ) __riscv_vluxseg3ei16_v_f16mf4(__VA_ARGS__)

◆ vluxseg3ei16_v_f16mf4_m

#define vluxseg3ei16_v_f16mf4_m ( ... ) __riscv_vluxseg3ei16_v_f16mf4_tumu(__VA_ARGS__)

◆ vluxseg3ei16_v_f32m1

#define vluxseg3ei16_v_f32m1 ( ... ) __riscv_vluxseg3ei16_v_f32m1(__VA_ARGS__)

◆ vluxseg3ei16_v_f32m1_m

#define vluxseg3ei16_v_f32m1_m ( ... ) __riscv_vluxseg3ei16_v_f32m1_tumu(__VA_ARGS__)

◆ vluxseg3ei16_v_f32m2

#define vluxseg3ei16_v_f32m2 ( ... ) __riscv_vluxseg3ei16_v_f32m2(__VA_ARGS__)

◆ vluxseg3ei16_v_f32m2_m

#define vluxseg3ei16_v_f32m2_m ( ... ) __riscv_vluxseg3ei16_v_f32m2_tumu(__VA_ARGS__)

◆ vluxseg3ei16_v_f32mf2

#define vluxseg3ei16_v_f32mf2 ( ... ) __riscv_vluxseg3ei16_v_f32mf2(__VA_ARGS__)

◆ vluxseg3ei16_v_f32mf2_m

#define vluxseg3ei16_v_f32mf2_m ( ... ) __riscv_vluxseg3ei16_v_f32mf2_tumu(__VA_ARGS__)

◆ vluxseg3ei16_v_f64m1

#define vluxseg3ei16_v_f64m1 ( ... ) __riscv_vluxseg3ei16_v_f64m1(__VA_ARGS__)

◆ vluxseg3ei16_v_f64m1_m

#define vluxseg3ei16_v_f64m1_m ( ... ) __riscv_vluxseg3ei16_v_f64m1_tumu(__VA_ARGS__)

◆ vluxseg3ei16_v_f64m2

#define vluxseg3ei16_v_f64m2 ( ... ) __riscv_vluxseg3ei16_v_f64m2(__VA_ARGS__)

◆ vluxseg3ei16_v_f64m2_m

#define vluxseg3ei16_v_f64m2_m ( ... ) __riscv_vluxseg3ei16_v_f64m2_tumu(__VA_ARGS__)

◆ vluxseg3ei16_v_i16m1

#define vluxseg3ei16_v_i16m1 ( ... ) __riscv_vluxseg3ei16_v_i16m1(__VA_ARGS__)

◆ vluxseg3ei16_v_i16m1_m

#define vluxseg3ei16_v_i16m1_m ( ... ) __riscv_vluxseg3ei16_v_i16m1_tumu(__VA_ARGS__)

◆ vluxseg3ei16_v_i16m2

#define vluxseg3ei16_v_i16m2 ( ... ) __riscv_vluxseg3ei16_v_i16m2(__VA_ARGS__)

◆ vluxseg3ei16_v_i16m2_m

#define vluxseg3ei16_v_i16m2_m ( ... ) __riscv_vluxseg3ei16_v_i16m2_tumu(__VA_ARGS__)

◆ vluxseg3ei16_v_i16mf2

#define vluxseg3ei16_v_i16mf2 ( ... ) __riscv_vluxseg3ei16_v_i16mf2(__VA_ARGS__)

◆ vluxseg3ei16_v_i16mf2_m

#define vluxseg3ei16_v_i16mf2_m ( ... ) __riscv_vluxseg3ei16_v_i16mf2_tumu(__VA_ARGS__)

◆ vluxseg3ei16_v_i16mf4

#define vluxseg3ei16_v_i16mf4 ( ... ) __riscv_vluxseg3ei16_v_i16mf4(__VA_ARGS__)

◆ vluxseg3ei16_v_i16mf4_m

#define vluxseg3ei16_v_i16mf4_m ( ... ) __riscv_vluxseg3ei16_v_i16mf4_tumu(__VA_ARGS__)

◆ vluxseg3ei16_v_i32m1

#define vluxseg3ei16_v_i32m1 ( ... ) __riscv_vluxseg3ei16_v_i32m1(__VA_ARGS__)

◆ vluxseg3ei16_v_i32m1_m

#define vluxseg3ei16_v_i32m1_m ( ... ) __riscv_vluxseg3ei16_v_i32m1_tumu(__VA_ARGS__)

◆ vluxseg3ei16_v_i32m2

#define vluxseg3ei16_v_i32m2 ( ... ) __riscv_vluxseg3ei16_v_i32m2(__VA_ARGS__)

◆ vluxseg3ei16_v_i32m2_m

#define vluxseg3ei16_v_i32m2_m ( ... ) __riscv_vluxseg3ei16_v_i32m2_tumu(__VA_ARGS__)

◆ vluxseg3ei16_v_i32mf2

#define vluxseg3ei16_v_i32mf2 ( ... ) __riscv_vluxseg3ei16_v_i32mf2(__VA_ARGS__)

◆ vluxseg3ei16_v_i32mf2_m

#define vluxseg3ei16_v_i32mf2_m ( ... ) __riscv_vluxseg3ei16_v_i32mf2_tumu(__VA_ARGS__)

◆ vluxseg3ei16_v_i64m1

#define vluxseg3ei16_v_i64m1 ( ... ) __riscv_vluxseg3ei16_v_i64m1(__VA_ARGS__)

◆ vluxseg3ei16_v_i64m1_m

#define vluxseg3ei16_v_i64m1_m ( ... ) __riscv_vluxseg3ei16_v_i64m1_tumu(__VA_ARGS__)

◆ vluxseg3ei16_v_i64m2

#define vluxseg3ei16_v_i64m2 ( ... ) __riscv_vluxseg3ei16_v_i64m2(__VA_ARGS__)

◆ vluxseg3ei16_v_i64m2_m

#define vluxseg3ei16_v_i64m2_m ( ... ) __riscv_vluxseg3ei16_v_i64m2_tumu(__VA_ARGS__)

◆ vluxseg3ei16_v_i8m1

#define vluxseg3ei16_v_i8m1 ( ... ) __riscv_vluxseg3ei16_v_i8m1(__VA_ARGS__)

◆ vluxseg3ei16_v_i8m1_m

#define vluxseg3ei16_v_i8m1_m ( ... ) __riscv_vluxseg3ei16_v_i8m1_tumu(__VA_ARGS__)

◆ vluxseg3ei16_v_i8m2

#define vluxseg3ei16_v_i8m2 ( ... ) __riscv_vluxseg3ei16_v_i8m2(__VA_ARGS__)

◆ vluxseg3ei16_v_i8m2_m

#define vluxseg3ei16_v_i8m2_m ( ... ) __riscv_vluxseg3ei16_v_i8m2_tumu(__VA_ARGS__)

◆ vluxseg3ei16_v_i8mf2

#define vluxseg3ei16_v_i8mf2 ( ... ) __riscv_vluxseg3ei16_v_i8mf2(__VA_ARGS__)

◆ vluxseg3ei16_v_i8mf2_m

#define vluxseg3ei16_v_i8mf2_m ( ... ) __riscv_vluxseg3ei16_v_i8mf2_tumu(__VA_ARGS__)

◆ vluxseg3ei16_v_i8mf4

#define vluxseg3ei16_v_i8mf4 ( ... ) __riscv_vluxseg3ei16_v_i8mf4(__VA_ARGS__)

◆ vluxseg3ei16_v_i8mf4_m

#define vluxseg3ei16_v_i8mf4_m ( ... ) __riscv_vluxseg3ei16_v_i8mf4_tumu(__VA_ARGS__)

◆ vluxseg3ei16_v_i8mf8

#define vluxseg3ei16_v_i8mf8 ( ... ) __riscv_vluxseg3ei16_v_i8mf8(__VA_ARGS__)

◆ vluxseg3ei16_v_i8mf8_m

#define vluxseg3ei16_v_i8mf8_m ( ... ) __riscv_vluxseg3ei16_v_i8mf8_tumu(__VA_ARGS__)

◆ vluxseg3ei16_v_u16m1

#define vluxseg3ei16_v_u16m1 ( ... ) __riscv_vluxseg3ei16_v_u16m1(__VA_ARGS__)

◆ vluxseg3ei16_v_u16m1_m

#define vluxseg3ei16_v_u16m1_m ( ... ) __riscv_vluxseg3ei16_v_u16m1_tumu(__VA_ARGS__)

◆ vluxseg3ei16_v_u16m2

#define vluxseg3ei16_v_u16m2 ( ... ) __riscv_vluxseg3ei16_v_u16m2(__VA_ARGS__)

◆ vluxseg3ei16_v_u16m2_m

#define vluxseg3ei16_v_u16m2_m ( ... ) __riscv_vluxseg3ei16_v_u16m2_tumu(__VA_ARGS__)

◆ vluxseg3ei16_v_u16mf2

#define vluxseg3ei16_v_u16mf2 ( ... ) __riscv_vluxseg3ei16_v_u16mf2(__VA_ARGS__)

◆ vluxseg3ei16_v_u16mf2_m

#define vluxseg3ei16_v_u16mf2_m ( ... ) __riscv_vluxseg3ei16_v_u16mf2_tumu(__VA_ARGS__)

◆ vluxseg3ei16_v_u16mf4

#define vluxseg3ei16_v_u16mf4 ( ... ) __riscv_vluxseg3ei16_v_u16mf4(__VA_ARGS__)

◆ vluxseg3ei16_v_u16mf4_m

#define vluxseg3ei16_v_u16mf4_m ( ... ) __riscv_vluxseg3ei16_v_u16mf4_tumu(__VA_ARGS__)

◆ vluxseg3ei16_v_u32m1

#define vluxseg3ei16_v_u32m1 ( ... ) __riscv_vluxseg3ei16_v_u32m1(__VA_ARGS__)

◆ vluxseg3ei16_v_u32m1_m

#define vluxseg3ei16_v_u32m1_m ( ... ) __riscv_vluxseg3ei16_v_u32m1_tumu(__VA_ARGS__)

◆ vluxseg3ei16_v_u32m2

#define vluxseg3ei16_v_u32m2 ( ... ) __riscv_vluxseg3ei16_v_u32m2(__VA_ARGS__)

◆ vluxseg3ei16_v_u32m2_m

#define vluxseg3ei16_v_u32m2_m ( ... ) __riscv_vluxseg3ei16_v_u32m2_tumu(__VA_ARGS__)

◆ vluxseg3ei16_v_u32mf2

#define vluxseg3ei16_v_u32mf2 ( ... ) __riscv_vluxseg3ei16_v_u32mf2(__VA_ARGS__)

◆ vluxseg3ei16_v_u32mf2_m

#define vluxseg3ei16_v_u32mf2_m ( ... ) __riscv_vluxseg3ei16_v_u32mf2_tumu(__VA_ARGS__)

◆ vluxseg3ei16_v_u64m1

#define vluxseg3ei16_v_u64m1 ( ... ) __riscv_vluxseg3ei16_v_u64m1(__VA_ARGS__)

◆ vluxseg3ei16_v_u64m1_m

#define vluxseg3ei16_v_u64m1_m ( ... ) __riscv_vluxseg3ei16_v_u64m1_tumu(__VA_ARGS__)

◆ vluxseg3ei16_v_u64m2

#define vluxseg3ei16_v_u64m2 ( ... ) __riscv_vluxseg3ei16_v_u64m2(__VA_ARGS__)

◆ vluxseg3ei16_v_u64m2_m

#define vluxseg3ei16_v_u64m2_m ( ... ) __riscv_vluxseg3ei16_v_u64m2_tumu(__VA_ARGS__)

◆ vluxseg3ei16_v_u8m1

#define vluxseg3ei16_v_u8m1 ( ... ) __riscv_vluxseg3ei16_v_u8m1(__VA_ARGS__)

◆ vluxseg3ei16_v_u8m1_m

#define vluxseg3ei16_v_u8m1_m ( ... ) __riscv_vluxseg3ei16_v_u8m1_tumu(__VA_ARGS__)

◆ vluxseg3ei16_v_u8m2

#define vluxseg3ei16_v_u8m2 ( ... ) __riscv_vluxseg3ei16_v_u8m2(__VA_ARGS__)

◆ vluxseg3ei16_v_u8m2_m

#define vluxseg3ei16_v_u8m2_m ( ... ) __riscv_vluxseg3ei16_v_u8m2_tumu(__VA_ARGS__)

◆ vluxseg3ei16_v_u8mf2

#define vluxseg3ei16_v_u8mf2 ( ... ) __riscv_vluxseg3ei16_v_u8mf2(__VA_ARGS__)

◆ vluxseg3ei16_v_u8mf2_m

#define vluxseg3ei16_v_u8mf2_m ( ... ) __riscv_vluxseg3ei16_v_u8mf2_tumu(__VA_ARGS__)

◆ vluxseg3ei16_v_u8mf4

#define vluxseg3ei16_v_u8mf4 ( ... ) __riscv_vluxseg3ei16_v_u8mf4(__VA_ARGS__)

◆ vluxseg3ei16_v_u8mf4_m

#define vluxseg3ei16_v_u8mf4_m ( ... ) __riscv_vluxseg3ei16_v_u8mf4_tumu(__VA_ARGS__)

◆ vluxseg3ei16_v_u8mf8

#define vluxseg3ei16_v_u8mf8 ( ... ) __riscv_vluxseg3ei16_v_u8mf8(__VA_ARGS__)

◆ vluxseg3ei16_v_u8mf8_m

#define vluxseg3ei16_v_u8mf8_m ( ... ) __riscv_vluxseg3ei16_v_u8mf8_tumu(__VA_ARGS__)

◆ vluxseg3ei32_v_f16m1

#define vluxseg3ei32_v_f16m1 ( ... ) __riscv_vluxseg3ei32_v_f16m1(__VA_ARGS__)

◆ vluxseg3ei32_v_f16m1_m

#define vluxseg3ei32_v_f16m1_m ( ... ) __riscv_vluxseg3ei32_v_f16m1_tumu(__VA_ARGS__)

◆ vluxseg3ei32_v_f16m2

#define vluxseg3ei32_v_f16m2 ( ... ) __riscv_vluxseg3ei32_v_f16m2(__VA_ARGS__)

◆ vluxseg3ei32_v_f16m2_m

#define vluxseg3ei32_v_f16m2_m ( ... ) __riscv_vluxseg3ei32_v_f16m2_tumu(__VA_ARGS__)

◆ vluxseg3ei32_v_f16mf2

#define vluxseg3ei32_v_f16mf2 ( ... ) __riscv_vluxseg3ei32_v_f16mf2(__VA_ARGS__)

◆ vluxseg3ei32_v_f16mf2_m

#define vluxseg3ei32_v_f16mf2_m ( ... ) __riscv_vluxseg3ei32_v_f16mf2_tumu(__VA_ARGS__)

◆ vluxseg3ei32_v_f16mf4

#define vluxseg3ei32_v_f16mf4 ( ... ) __riscv_vluxseg3ei32_v_f16mf4(__VA_ARGS__)

◆ vluxseg3ei32_v_f16mf4_m

#define vluxseg3ei32_v_f16mf4_m ( ... ) __riscv_vluxseg3ei32_v_f16mf4_tumu(__VA_ARGS__)

◆ vluxseg3ei32_v_f32m1

#define vluxseg3ei32_v_f32m1 ( ... ) __riscv_vluxseg3ei32_v_f32m1(__VA_ARGS__)

◆ vluxseg3ei32_v_f32m1_m

#define vluxseg3ei32_v_f32m1_m ( ... ) __riscv_vluxseg3ei32_v_f32m1_tumu(__VA_ARGS__)

◆ vluxseg3ei32_v_f32m2

#define vluxseg3ei32_v_f32m2 ( ... ) __riscv_vluxseg3ei32_v_f32m2(__VA_ARGS__)

◆ vluxseg3ei32_v_f32m2_m

#define vluxseg3ei32_v_f32m2_m ( ... ) __riscv_vluxseg3ei32_v_f32m2_tumu(__VA_ARGS__)

◆ vluxseg3ei32_v_f32mf2

#define vluxseg3ei32_v_f32mf2 ( ... ) __riscv_vluxseg3ei32_v_f32mf2(__VA_ARGS__)

◆ vluxseg3ei32_v_f32mf2_m

#define vluxseg3ei32_v_f32mf2_m ( ... ) __riscv_vluxseg3ei32_v_f32mf2_tumu(__VA_ARGS__)

◆ vluxseg3ei32_v_f64m1

#define vluxseg3ei32_v_f64m1 ( ... ) __riscv_vluxseg3ei32_v_f64m1(__VA_ARGS__)

◆ vluxseg3ei32_v_f64m1_m

#define vluxseg3ei32_v_f64m1_m ( ... ) __riscv_vluxseg3ei32_v_f64m1_tumu(__VA_ARGS__)

◆ vluxseg3ei32_v_f64m2

#define vluxseg3ei32_v_f64m2 ( ... ) __riscv_vluxseg3ei32_v_f64m2(__VA_ARGS__)

◆ vluxseg3ei32_v_f64m2_m

#define vluxseg3ei32_v_f64m2_m ( ... ) __riscv_vluxseg3ei32_v_f64m2_tumu(__VA_ARGS__)

◆ vluxseg3ei32_v_i16m1

#define vluxseg3ei32_v_i16m1 ( ... ) __riscv_vluxseg3ei32_v_i16m1(__VA_ARGS__)

◆ vluxseg3ei32_v_i16m1_m

#define vluxseg3ei32_v_i16m1_m ( ... ) __riscv_vluxseg3ei32_v_i16m1_tumu(__VA_ARGS__)

◆ vluxseg3ei32_v_i16m2

#define vluxseg3ei32_v_i16m2 ( ... ) __riscv_vluxseg3ei32_v_i16m2(__VA_ARGS__)

◆ vluxseg3ei32_v_i16m2_m

#define vluxseg3ei32_v_i16m2_m ( ... ) __riscv_vluxseg3ei32_v_i16m2_tumu(__VA_ARGS__)

◆ vluxseg3ei32_v_i16mf2

#define vluxseg3ei32_v_i16mf2 ( ... ) __riscv_vluxseg3ei32_v_i16mf2(__VA_ARGS__)

◆ vluxseg3ei32_v_i16mf2_m

#define vluxseg3ei32_v_i16mf2_m ( ... ) __riscv_vluxseg3ei32_v_i16mf2_tumu(__VA_ARGS__)

◆ vluxseg3ei32_v_i16mf4

#define vluxseg3ei32_v_i16mf4 ( ... ) __riscv_vluxseg3ei32_v_i16mf4(__VA_ARGS__)

◆ vluxseg3ei32_v_i16mf4_m

#define vluxseg3ei32_v_i16mf4_m ( ... ) __riscv_vluxseg3ei32_v_i16mf4_tumu(__VA_ARGS__)

◆ vluxseg3ei32_v_i32m1

#define vluxseg3ei32_v_i32m1 ( ... ) __riscv_vluxseg3ei32_v_i32m1(__VA_ARGS__)

◆ vluxseg3ei32_v_i32m1_m

#define vluxseg3ei32_v_i32m1_m ( ... ) __riscv_vluxseg3ei32_v_i32m1_tumu(__VA_ARGS__)

◆ vluxseg3ei32_v_i32m2

#define vluxseg3ei32_v_i32m2 ( ... ) __riscv_vluxseg3ei32_v_i32m2(__VA_ARGS__)

◆ vluxseg3ei32_v_i32m2_m

#define vluxseg3ei32_v_i32m2_m ( ... ) __riscv_vluxseg3ei32_v_i32m2_tumu(__VA_ARGS__)

◆ vluxseg3ei32_v_i32mf2

#define vluxseg3ei32_v_i32mf2 ( ... ) __riscv_vluxseg3ei32_v_i32mf2(__VA_ARGS__)

◆ vluxseg3ei32_v_i32mf2_m

#define vluxseg3ei32_v_i32mf2_m ( ... ) __riscv_vluxseg3ei32_v_i32mf2_tumu(__VA_ARGS__)

◆ vluxseg3ei32_v_i64m1

#define vluxseg3ei32_v_i64m1 ( ... ) __riscv_vluxseg3ei32_v_i64m1(__VA_ARGS__)

◆ vluxseg3ei32_v_i64m1_m

#define vluxseg3ei32_v_i64m1_m ( ... ) __riscv_vluxseg3ei32_v_i64m1_tumu(__VA_ARGS__)

◆ vluxseg3ei32_v_i64m2

#define vluxseg3ei32_v_i64m2 ( ... ) __riscv_vluxseg3ei32_v_i64m2(__VA_ARGS__)

◆ vluxseg3ei32_v_i64m2_m

#define vluxseg3ei32_v_i64m2_m ( ... ) __riscv_vluxseg3ei32_v_i64m2_tumu(__VA_ARGS__)

◆ vluxseg3ei32_v_i8m1

#define vluxseg3ei32_v_i8m1 ( ... ) __riscv_vluxseg3ei32_v_i8m1(__VA_ARGS__)

◆ vluxseg3ei32_v_i8m1_m

#define vluxseg3ei32_v_i8m1_m ( ... ) __riscv_vluxseg3ei32_v_i8m1_tumu(__VA_ARGS__)

◆ vluxseg3ei32_v_i8m2

#define vluxseg3ei32_v_i8m2 ( ... ) __riscv_vluxseg3ei32_v_i8m2(__VA_ARGS__)

◆ vluxseg3ei32_v_i8m2_m

#define vluxseg3ei32_v_i8m2_m ( ... ) __riscv_vluxseg3ei32_v_i8m2_tumu(__VA_ARGS__)

◆ vluxseg3ei32_v_i8mf2

#define vluxseg3ei32_v_i8mf2 ( ... ) __riscv_vluxseg3ei32_v_i8mf2(__VA_ARGS__)

◆ vluxseg3ei32_v_i8mf2_m

#define vluxseg3ei32_v_i8mf2_m ( ... ) __riscv_vluxseg3ei32_v_i8mf2_tumu(__VA_ARGS__)

◆ vluxseg3ei32_v_i8mf4

#define vluxseg3ei32_v_i8mf4 ( ... ) __riscv_vluxseg3ei32_v_i8mf4(__VA_ARGS__)

◆ vluxseg3ei32_v_i8mf4_m

#define vluxseg3ei32_v_i8mf4_m ( ... ) __riscv_vluxseg3ei32_v_i8mf4_tumu(__VA_ARGS__)

◆ vluxseg3ei32_v_i8mf8

#define vluxseg3ei32_v_i8mf8 ( ... ) __riscv_vluxseg3ei32_v_i8mf8(__VA_ARGS__)

◆ vluxseg3ei32_v_i8mf8_m

#define vluxseg3ei32_v_i8mf8_m ( ... ) __riscv_vluxseg3ei32_v_i8mf8_tumu(__VA_ARGS__)

◆ vluxseg3ei32_v_u16m1

#define vluxseg3ei32_v_u16m1 ( ... ) __riscv_vluxseg3ei32_v_u16m1(__VA_ARGS__)

◆ vluxseg3ei32_v_u16m1_m

#define vluxseg3ei32_v_u16m1_m ( ... ) __riscv_vluxseg3ei32_v_u16m1_tumu(__VA_ARGS__)

◆ vluxseg3ei32_v_u16m2

#define vluxseg3ei32_v_u16m2 ( ... ) __riscv_vluxseg3ei32_v_u16m2(__VA_ARGS__)

◆ vluxseg3ei32_v_u16m2_m

#define vluxseg3ei32_v_u16m2_m ( ... ) __riscv_vluxseg3ei32_v_u16m2_tumu(__VA_ARGS__)

◆ vluxseg3ei32_v_u16mf2

#define vluxseg3ei32_v_u16mf2 ( ... ) __riscv_vluxseg3ei32_v_u16mf2(__VA_ARGS__)

◆ vluxseg3ei32_v_u16mf2_m

#define vluxseg3ei32_v_u16mf2_m ( ... ) __riscv_vluxseg3ei32_v_u16mf2_tumu(__VA_ARGS__)

◆ vluxseg3ei32_v_u16mf4

#define vluxseg3ei32_v_u16mf4 ( ... ) __riscv_vluxseg3ei32_v_u16mf4(__VA_ARGS__)

◆ vluxseg3ei32_v_u16mf4_m

#define vluxseg3ei32_v_u16mf4_m ( ... ) __riscv_vluxseg3ei32_v_u16mf4_tumu(__VA_ARGS__)

◆ vluxseg3ei32_v_u32m1

#define vluxseg3ei32_v_u32m1 ( ... ) __riscv_vluxseg3ei32_v_u32m1(__VA_ARGS__)

◆ vluxseg3ei32_v_u32m1_m

#define vluxseg3ei32_v_u32m1_m ( ... ) __riscv_vluxseg3ei32_v_u32m1_tumu(__VA_ARGS__)

◆ vluxseg3ei32_v_u32m2

#define vluxseg3ei32_v_u32m2 ( ... ) __riscv_vluxseg3ei32_v_u32m2(__VA_ARGS__)

◆ vluxseg3ei32_v_u32m2_m

#define vluxseg3ei32_v_u32m2_m ( ... ) __riscv_vluxseg3ei32_v_u32m2_tumu(__VA_ARGS__)

◆ vluxseg3ei32_v_u32mf2

#define vluxseg3ei32_v_u32mf2 ( ... ) __riscv_vluxseg3ei32_v_u32mf2(__VA_ARGS__)

◆ vluxseg3ei32_v_u32mf2_m

#define vluxseg3ei32_v_u32mf2_m ( ... ) __riscv_vluxseg3ei32_v_u32mf2_tumu(__VA_ARGS__)

◆ vluxseg3ei32_v_u64m1

#define vluxseg3ei32_v_u64m1 ( ... ) __riscv_vluxseg3ei32_v_u64m1(__VA_ARGS__)

◆ vluxseg3ei32_v_u64m1_m

#define vluxseg3ei32_v_u64m1_m ( ... ) __riscv_vluxseg3ei32_v_u64m1_tumu(__VA_ARGS__)

◆ vluxseg3ei32_v_u64m2

#define vluxseg3ei32_v_u64m2 ( ... ) __riscv_vluxseg3ei32_v_u64m2(__VA_ARGS__)

◆ vluxseg3ei32_v_u64m2_m

#define vluxseg3ei32_v_u64m2_m ( ... ) __riscv_vluxseg3ei32_v_u64m2_tumu(__VA_ARGS__)

◆ vluxseg3ei32_v_u8m1

#define vluxseg3ei32_v_u8m1 ( ... ) __riscv_vluxseg3ei32_v_u8m1(__VA_ARGS__)

◆ vluxseg3ei32_v_u8m1_m

#define vluxseg3ei32_v_u8m1_m ( ... ) __riscv_vluxseg3ei32_v_u8m1_tumu(__VA_ARGS__)

◆ vluxseg3ei32_v_u8m2

#define vluxseg3ei32_v_u8m2 ( ... ) __riscv_vluxseg3ei32_v_u8m2(__VA_ARGS__)

◆ vluxseg3ei32_v_u8m2_m

#define vluxseg3ei32_v_u8m2_m ( ... ) __riscv_vluxseg3ei32_v_u8m2_tumu(__VA_ARGS__)

◆ vluxseg3ei32_v_u8mf2

#define vluxseg3ei32_v_u8mf2 ( ... ) __riscv_vluxseg3ei32_v_u8mf2(__VA_ARGS__)

◆ vluxseg3ei32_v_u8mf2_m

#define vluxseg3ei32_v_u8mf2_m ( ... ) __riscv_vluxseg3ei32_v_u8mf2_tumu(__VA_ARGS__)

◆ vluxseg3ei32_v_u8mf4

#define vluxseg3ei32_v_u8mf4 ( ... ) __riscv_vluxseg3ei32_v_u8mf4(__VA_ARGS__)

◆ vluxseg3ei32_v_u8mf4_m

#define vluxseg3ei32_v_u8mf4_m ( ... ) __riscv_vluxseg3ei32_v_u8mf4_tumu(__VA_ARGS__)

◆ vluxseg3ei32_v_u8mf8

#define vluxseg3ei32_v_u8mf8 ( ... ) __riscv_vluxseg3ei32_v_u8mf8(__VA_ARGS__)

◆ vluxseg3ei32_v_u8mf8_m

#define vluxseg3ei32_v_u8mf8_m ( ... ) __riscv_vluxseg3ei32_v_u8mf8_tumu(__VA_ARGS__)

◆ vluxseg3ei64_v_f16m1

#define vluxseg3ei64_v_f16m1 ( ... ) __riscv_vluxseg3ei64_v_f16m1(__VA_ARGS__)

◆ vluxseg3ei64_v_f16m1_m

#define vluxseg3ei64_v_f16m1_m ( ... ) __riscv_vluxseg3ei64_v_f16m1_tumu(__VA_ARGS__)

◆ vluxseg3ei64_v_f16m2

#define vluxseg3ei64_v_f16m2 ( ... ) __riscv_vluxseg3ei64_v_f16m2(__VA_ARGS__)

◆ vluxseg3ei64_v_f16m2_m

#define vluxseg3ei64_v_f16m2_m ( ... ) __riscv_vluxseg3ei64_v_f16m2_tumu(__VA_ARGS__)

◆ vluxseg3ei64_v_f16mf2

#define vluxseg3ei64_v_f16mf2 ( ... ) __riscv_vluxseg3ei64_v_f16mf2(__VA_ARGS__)

◆ vluxseg3ei64_v_f16mf2_m

#define vluxseg3ei64_v_f16mf2_m ( ... ) __riscv_vluxseg3ei64_v_f16mf2_tumu(__VA_ARGS__)

◆ vluxseg3ei64_v_f16mf4

#define vluxseg3ei64_v_f16mf4 ( ... ) __riscv_vluxseg3ei64_v_f16mf4(__VA_ARGS__)

◆ vluxseg3ei64_v_f16mf4_m

#define vluxseg3ei64_v_f16mf4_m ( ... ) __riscv_vluxseg3ei64_v_f16mf4_tumu(__VA_ARGS__)

◆ vluxseg3ei64_v_f32m1

#define vluxseg3ei64_v_f32m1 ( ... ) __riscv_vluxseg3ei64_v_f32m1(__VA_ARGS__)

◆ vluxseg3ei64_v_f32m1_m

#define vluxseg3ei64_v_f32m1_m ( ... ) __riscv_vluxseg3ei64_v_f32m1_tumu(__VA_ARGS__)

◆ vluxseg3ei64_v_f32m2

#define vluxseg3ei64_v_f32m2 ( ... ) __riscv_vluxseg3ei64_v_f32m2(__VA_ARGS__)

◆ vluxseg3ei64_v_f32m2_m

#define vluxseg3ei64_v_f32m2_m ( ... ) __riscv_vluxseg3ei64_v_f32m2_tumu(__VA_ARGS__)

◆ vluxseg3ei64_v_f32mf2

#define vluxseg3ei64_v_f32mf2 ( ... ) __riscv_vluxseg3ei64_v_f32mf2(__VA_ARGS__)

◆ vluxseg3ei64_v_f32mf2_m

#define vluxseg3ei64_v_f32mf2_m ( ... ) __riscv_vluxseg3ei64_v_f32mf2_tumu(__VA_ARGS__)

◆ vluxseg3ei64_v_f64m1

#define vluxseg3ei64_v_f64m1 ( ... ) __riscv_vluxseg3ei64_v_f64m1(__VA_ARGS__)

◆ vluxseg3ei64_v_f64m1_m

#define vluxseg3ei64_v_f64m1_m ( ... ) __riscv_vluxseg3ei64_v_f64m1_tumu(__VA_ARGS__)

◆ vluxseg3ei64_v_f64m2

#define vluxseg3ei64_v_f64m2 ( ... ) __riscv_vluxseg3ei64_v_f64m2(__VA_ARGS__)

◆ vluxseg3ei64_v_f64m2_m

#define vluxseg3ei64_v_f64m2_m ( ... ) __riscv_vluxseg3ei64_v_f64m2_tumu(__VA_ARGS__)

◆ vluxseg3ei64_v_i16m1

#define vluxseg3ei64_v_i16m1 ( ... ) __riscv_vluxseg3ei64_v_i16m1(__VA_ARGS__)

◆ vluxseg3ei64_v_i16m1_m

#define vluxseg3ei64_v_i16m1_m ( ... ) __riscv_vluxseg3ei64_v_i16m1_tumu(__VA_ARGS__)

◆ vluxseg3ei64_v_i16m2

#define vluxseg3ei64_v_i16m2 ( ... ) __riscv_vluxseg3ei64_v_i16m2(__VA_ARGS__)

◆ vluxseg3ei64_v_i16m2_m

#define vluxseg3ei64_v_i16m2_m ( ... ) __riscv_vluxseg3ei64_v_i16m2_tumu(__VA_ARGS__)

◆ vluxseg3ei64_v_i16mf2

#define vluxseg3ei64_v_i16mf2 ( ... ) __riscv_vluxseg3ei64_v_i16mf2(__VA_ARGS__)

◆ vluxseg3ei64_v_i16mf2_m

#define vluxseg3ei64_v_i16mf2_m ( ... ) __riscv_vluxseg3ei64_v_i16mf2_tumu(__VA_ARGS__)

◆ vluxseg3ei64_v_i16mf4

#define vluxseg3ei64_v_i16mf4 ( ... ) __riscv_vluxseg3ei64_v_i16mf4(__VA_ARGS__)

◆ vluxseg3ei64_v_i16mf4_m

#define vluxseg3ei64_v_i16mf4_m ( ... ) __riscv_vluxseg3ei64_v_i16mf4_tumu(__VA_ARGS__)

◆ vluxseg3ei64_v_i32m1

#define vluxseg3ei64_v_i32m1 ( ... ) __riscv_vluxseg3ei64_v_i32m1(__VA_ARGS__)

◆ vluxseg3ei64_v_i32m1_m

#define vluxseg3ei64_v_i32m1_m ( ... ) __riscv_vluxseg3ei64_v_i32m1_tumu(__VA_ARGS__)

◆ vluxseg3ei64_v_i32m2

#define vluxseg3ei64_v_i32m2 ( ... ) __riscv_vluxseg3ei64_v_i32m2(__VA_ARGS__)

◆ vluxseg3ei64_v_i32m2_m

#define vluxseg3ei64_v_i32m2_m ( ... ) __riscv_vluxseg3ei64_v_i32m2_tumu(__VA_ARGS__)

◆ vluxseg3ei64_v_i32mf2

#define vluxseg3ei64_v_i32mf2 ( ... ) __riscv_vluxseg3ei64_v_i32mf2(__VA_ARGS__)

◆ vluxseg3ei64_v_i32mf2_m

#define vluxseg3ei64_v_i32mf2_m ( ... ) __riscv_vluxseg3ei64_v_i32mf2_tumu(__VA_ARGS__)

◆ vluxseg3ei64_v_i64m1

#define vluxseg3ei64_v_i64m1 ( ... ) __riscv_vluxseg3ei64_v_i64m1(__VA_ARGS__)

◆ vluxseg3ei64_v_i64m1_m

#define vluxseg3ei64_v_i64m1_m ( ... ) __riscv_vluxseg3ei64_v_i64m1_tumu(__VA_ARGS__)

◆ vluxseg3ei64_v_i64m2

#define vluxseg3ei64_v_i64m2 ( ... ) __riscv_vluxseg3ei64_v_i64m2(__VA_ARGS__)

◆ vluxseg3ei64_v_i64m2_m

#define vluxseg3ei64_v_i64m2_m ( ... ) __riscv_vluxseg3ei64_v_i64m2_tumu(__VA_ARGS__)

◆ vluxseg3ei64_v_i8m1

#define vluxseg3ei64_v_i8m1 ( ... ) __riscv_vluxseg3ei64_v_i8m1(__VA_ARGS__)

◆ vluxseg3ei64_v_i8m1_m

#define vluxseg3ei64_v_i8m1_m ( ... ) __riscv_vluxseg3ei64_v_i8m1_tumu(__VA_ARGS__)

◆ vluxseg3ei64_v_i8mf2

#define vluxseg3ei64_v_i8mf2 ( ... ) __riscv_vluxseg3ei64_v_i8mf2(__VA_ARGS__)

◆ vluxseg3ei64_v_i8mf2_m

#define vluxseg3ei64_v_i8mf2_m ( ... ) __riscv_vluxseg3ei64_v_i8mf2_tumu(__VA_ARGS__)

◆ vluxseg3ei64_v_i8mf4

#define vluxseg3ei64_v_i8mf4 ( ... ) __riscv_vluxseg3ei64_v_i8mf4(__VA_ARGS__)

◆ vluxseg3ei64_v_i8mf4_m

#define vluxseg3ei64_v_i8mf4_m ( ... ) __riscv_vluxseg3ei64_v_i8mf4_tumu(__VA_ARGS__)

◆ vluxseg3ei64_v_i8mf8

#define vluxseg3ei64_v_i8mf8 ( ... ) __riscv_vluxseg3ei64_v_i8mf8(__VA_ARGS__)

◆ vluxseg3ei64_v_i8mf8_m

#define vluxseg3ei64_v_i8mf8_m ( ... ) __riscv_vluxseg3ei64_v_i8mf8_tumu(__VA_ARGS__)

◆ vluxseg3ei64_v_u16m1

#define vluxseg3ei64_v_u16m1 ( ... ) __riscv_vluxseg3ei64_v_u16m1(__VA_ARGS__)

◆ vluxseg3ei64_v_u16m1_m

#define vluxseg3ei64_v_u16m1_m ( ... ) __riscv_vluxseg3ei64_v_u16m1_tumu(__VA_ARGS__)

◆ vluxseg3ei64_v_u16m2

#define vluxseg3ei64_v_u16m2 ( ... ) __riscv_vluxseg3ei64_v_u16m2(__VA_ARGS__)

◆ vluxseg3ei64_v_u16m2_m

#define vluxseg3ei64_v_u16m2_m ( ... ) __riscv_vluxseg3ei64_v_u16m2_tumu(__VA_ARGS__)

◆ vluxseg3ei64_v_u16mf2

#define vluxseg3ei64_v_u16mf2 ( ... ) __riscv_vluxseg3ei64_v_u16mf2(__VA_ARGS__)

◆ vluxseg3ei64_v_u16mf2_m

#define vluxseg3ei64_v_u16mf2_m ( ... ) __riscv_vluxseg3ei64_v_u16mf2_tumu(__VA_ARGS__)

◆ vluxseg3ei64_v_u16mf4

#define vluxseg3ei64_v_u16mf4 ( ... ) __riscv_vluxseg3ei64_v_u16mf4(__VA_ARGS__)

◆ vluxseg3ei64_v_u16mf4_m

#define vluxseg3ei64_v_u16mf4_m ( ... ) __riscv_vluxseg3ei64_v_u16mf4_tumu(__VA_ARGS__)

◆ vluxseg3ei64_v_u32m1

#define vluxseg3ei64_v_u32m1 ( ... ) __riscv_vluxseg3ei64_v_u32m1(__VA_ARGS__)

◆ vluxseg3ei64_v_u32m1_m

#define vluxseg3ei64_v_u32m1_m ( ... ) __riscv_vluxseg3ei64_v_u32m1_tumu(__VA_ARGS__)

◆ vluxseg3ei64_v_u32m2

#define vluxseg3ei64_v_u32m2 ( ... ) __riscv_vluxseg3ei64_v_u32m2(__VA_ARGS__)

◆ vluxseg3ei64_v_u32m2_m

#define vluxseg3ei64_v_u32m2_m ( ... ) __riscv_vluxseg3ei64_v_u32m2_tumu(__VA_ARGS__)

◆ vluxseg3ei64_v_u32mf2

#define vluxseg3ei64_v_u32mf2 ( ... ) __riscv_vluxseg3ei64_v_u32mf2(__VA_ARGS__)

◆ vluxseg3ei64_v_u32mf2_m

#define vluxseg3ei64_v_u32mf2_m ( ... ) __riscv_vluxseg3ei64_v_u32mf2_tumu(__VA_ARGS__)

◆ vluxseg3ei64_v_u64m1

#define vluxseg3ei64_v_u64m1 ( ... ) __riscv_vluxseg3ei64_v_u64m1(__VA_ARGS__)

◆ vluxseg3ei64_v_u64m1_m

#define vluxseg3ei64_v_u64m1_m ( ... ) __riscv_vluxseg3ei64_v_u64m1_tumu(__VA_ARGS__)

◆ vluxseg3ei64_v_u64m2

#define vluxseg3ei64_v_u64m2 ( ... ) __riscv_vluxseg3ei64_v_u64m2(__VA_ARGS__)

◆ vluxseg3ei64_v_u64m2_m

#define vluxseg3ei64_v_u64m2_m ( ... ) __riscv_vluxseg3ei64_v_u64m2_tumu(__VA_ARGS__)

◆ vluxseg3ei64_v_u8m1

#define vluxseg3ei64_v_u8m1 ( ... ) __riscv_vluxseg3ei64_v_u8m1(__VA_ARGS__)

◆ vluxseg3ei64_v_u8m1_m

#define vluxseg3ei64_v_u8m1_m ( ... ) __riscv_vluxseg3ei64_v_u8m1_tumu(__VA_ARGS__)

◆ vluxseg3ei64_v_u8mf2

#define vluxseg3ei64_v_u8mf2 ( ... ) __riscv_vluxseg3ei64_v_u8mf2(__VA_ARGS__)

◆ vluxseg3ei64_v_u8mf2_m

#define vluxseg3ei64_v_u8mf2_m ( ... ) __riscv_vluxseg3ei64_v_u8mf2_tumu(__VA_ARGS__)

◆ vluxseg3ei64_v_u8mf4

#define vluxseg3ei64_v_u8mf4 ( ... ) __riscv_vluxseg3ei64_v_u8mf4(__VA_ARGS__)

◆ vluxseg3ei64_v_u8mf4_m

#define vluxseg3ei64_v_u8mf4_m ( ... ) __riscv_vluxseg3ei64_v_u8mf4_tumu(__VA_ARGS__)

◆ vluxseg3ei64_v_u8mf8

#define vluxseg3ei64_v_u8mf8 ( ... ) __riscv_vluxseg3ei64_v_u8mf8(__VA_ARGS__)

◆ vluxseg3ei64_v_u8mf8_m

#define vluxseg3ei64_v_u8mf8_m ( ... ) __riscv_vluxseg3ei64_v_u8mf8_tumu(__VA_ARGS__)

◆ vluxseg3ei8_v_f16m1

#define vluxseg3ei8_v_f16m1 ( ... ) __riscv_vluxseg3ei8_v_f16m1(__VA_ARGS__)

◆ vluxseg3ei8_v_f16m1_m

#define vluxseg3ei8_v_f16m1_m ( ... ) __riscv_vluxseg3ei8_v_f16m1_tumu(__VA_ARGS__)

◆ vluxseg3ei8_v_f16m2

#define vluxseg3ei8_v_f16m2 ( ... ) __riscv_vluxseg3ei8_v_f16m2(__VA_ARGS__)

◆ vluxseg3ei8_v_f16m2_m

#define vluxseg3ei8_v_f16m2_m ( ... ) __riscv_vluxseg3ei8_v_f16m2_tumu(__VA_ARGS__)

◆ vluxseg3ei8_v_f16mf2

#define vluxseg3ei8_v_f16mf2 ( ... ) __riscv_vluxseg3ei8_v_f16mf2(__VA_ARGS__)

◆ vluxseg3ei8_v_f16mf2_m

#define vluxseg3ei8_v_f16mf2_m ( ... ) __riscv_vluxseg3ei8_v_f16mf2_tumu(__VA_ARGS__)

◆ vluxseg3ei8_v_f16mf4

#define vluxseg3ei8_v_f16mf4 ( ... ) __riscv_vluxseg3ei8_v_f16mf4(__VA_ARGS__)

◆ vluxseg3ei8_v_f16mf4_m

#define vluxseg3ei8_v_f16mf4_m ( ... ) __riscv_vluxseg3ei8_v_f16mf4_tumu(__VA_ARGS__)

◆ vluxseg3ei8_v_f32m1

#define vluxseg3ei8_v_f32m1 ( ... ) __riscv_vluxseg3ei8_v_f32m1(__VA_ARGS__)

◆ vluxseg3ei8_v_f32m1_m

#define vluxseg3ei8_v_f32m1_m ( ... ) __riscv_vluxseg3ei8_v_f32m1_tumu(__VA_ARGS__)

◆ vluxseg3ei8_v_f32m2

#define vluxseg3ei8_v_f32m2 ( ... ) __riscv_vluxseg3ei8_v_f32m2(__VA_ARGS__)

◆ vluxseg3ei8_v_f32m2_m

#define vluxseg3ei8_v_f32m2_m ( ... ) __riscv_vluxseg3ei8_v_f32m2_tumu(__VA_ARGS__)

◆ vluxseg3ei8_v_f32mf2

#define vluxseg3ei8_v_f32mf2 ( ... ) __riscv_vluxseg3ei8_v_f32mf2(__VA_ARGS__)

◆ vluxseg3ei8_v_f32mf2_m

#define vluxseg3ei8_v_f32mf2_m ( ... ) __riscv_vluxseg3ei8_v_f32mf2_tumu(__VA_ARGS__)

◆ vluxseg3ei8_v_f64m1

#define vluxseg3ei8_v_f64m1 ( ... ) __riscv_vluxseg3ei8_v_f64m1(__VA_ARGS__)

◆ vluxseg3ei8_v_f64m1_m

#define vluxseg3ei8_v_f64m1_m ( ... ) __riscv_vluxseg3ei8_v_f64m1_tumu(__VA_ARGS__)

◆ vluxseg3ei8_v_f64m2

#define vluxseg3ei8_v_f64m2 ( ... ) __riscv_vluxseg3ei8_v_f64m2(__VA_ARGS__)

◆ vluxseg3ei8_v_f64m2_m

#define vluxseg3ei8_v_f64m2_m ( ... ) __riscv_vluxseg3ei8_v_f64m2_tumu(__VA_ARGS__)

◆ vluxseg3ei8_v_i16m1

#define vluxseg3ei8_v_i16m1 ( ... ) __riscv_vluxseg3ei8_v_i16m1(__VA_ARGS__)

◆ vluxseg3ei8_v_i16m1_m

#define vluxseg3ei8_v_i16m1_m ( ... ) __riscv_vluxseg3ei8_v_i16m1_tumu(__VA_ARGS__)

◆ vluxseg3ei8_v_i16m2

#define vluxseg3ei8_v_i16m2 ( ... ) __riscv_vluxseg3ei8_v_i16m2(__VA_ARGS__)

◆ vluxseg3ei8_v_i16m2_m

#define vluxseg3ei8_v_i16m2_m ( ... ) __riscv_vluxseg3ei8_v_i16m2_tumu(__VA_ARGS__)

◆ vluxseg3ei8_v_i16mf2

#define vluxseg3ei8_v_i16mf2 ( ... ) __riscv_vluxseg3ei8_v_i16mf2(__VA_ARGS__)

◆ vluxseg3ei8_v_i16mf2_m

#define vluxseg3ei8_v_i16mf2_m ( ... ) __riscv_vluxseg3ei8_v_i16mf2_tumu(__VA_ARGS__)

◆ vluxseg3ei8_v_i16mf4

#define vluxseg3ei8_v_i16mf4 ( ... ) __riscv_vluxseg3ei8_v_i16mf4(__VA_ARGS__)

◆ vluxseg3ei8_v_i16mf4_m

#define vluxseg3ei8_v_i16mf4_m ( ... ) __riscv_vluxseg3ei8_v_i16mf4_tumu(__VA_ARGS__)

◆ vluxseg3ei8_v_i32m1

#define vluxseg3ei8_v_i32m1 ( ... ) __riscv_vluxseg3ei8_v_i32m1(__VA_ARGS__)

◆ vluxseg3ei8_v_i32m1_m

#define vluxseg3ei8_v_i32m1_m ( ... ) __riscv_vluxseg3ei8_v_i32m1_tumu(__VA_ARGS__)

◆ vluxseg3ei8_v_i32m2

#define vluxseg3ei8_v_i32m2 ( ... ) __riscv_vluxseg3ei8_v_i32m2(__VA_ARGS__)

◆ vluxseg3ei8_v_i32m2_m

#define vluxseg3ei8_v_i32m2_m ( ... ) __riscv_vluxseg3ei8_v_i32m2_tumu(__VA_ARGS__)

◆ vluxseg3ei8_v_i32mf2

#define vluxseg3ei8_v_i32mf2 ( ... ) __riscv_vluxseg3ei8_v_i32mf2(__VA_ARGS__)

◆ vluxseg3ei8_v_i32mf2_m

#define vluxseg3ei8_v_i32mf2_m ( ... ) __riscv_vluxseg3ei8_v_i32mf2_tumu(__VA_ARGS__)

◆ vluxseg3ei8_v_i64m1

#define vluxseg3ei8_v_i64m1 ( ... ) __riscv_vluxseg3ei8_v_i64m1(__VA_ARGS__)

◆ vluxseg3ei8_v_i64m1_m

#define vluxseg3ei8_v_i64m1_m ( ... ) __riscv_vluxseg3ei8_v_i64m1_tumu(__VA_ARGS__)

◆ vluxseg3ei8_v_i64m2

#define vluxseg3ei8_v_i64m2 ( ... ) __riscv_vluxseg3ei8_v_i64m2(__VA_ARGS__)

◆ vluxseg3ei8_v_i64m2_m

#define vluxseg3ei8_v_i64m2_m ( ... ) __riscv_vluxseg3ei8_v_i64m2_tumu(__VA_ARGS__)

◆ vluxseg3ei8_v_i8m1

#define vluxseg3ei8_v_i8m1 ( ... ) __riscv_vluxseg3ei8_v_i8m1(__VA_ARGS__)

◆ vluxseg3ei8_v_i8m1_m

#define vluxseg3ei8_v_i8m1_m ( ... ) __riscv_vluxseg3ei8_v_i8m1_tumu(__VA_ARGS__)

◆ vluxseg3ei8_v_i8m2

#define vluxseg3ei8_v_i8m2 ( ... ) __riscv_vluxseg3ei8_v_i8m2(__VA_ARGS__)

◆ vluxseg3ei8_v_i8m2_m

#define vluxseg3ei8_v_i8m2_m ( ... ) __riscv_vluxseg3ei8_v_i8m2_tumu(__VA_ARGS__)

◆ vluxseg3ei8_v_i8mf2

#define vluxseg3ei8_v_i8mf2 ( ... ) __riscv_vluxseg3ei8_v_i8mf2(__VA_ARGS__)

◆ vluxseg3ei8_v_i8mf2_m

#define vluxseg3ei8_v_i8mf2_m ( ... ) __riscv_vluxseg3ei8_v_i8mf2_tumu(__VA_ARGS__)

◆ vluxseg3ei8_v_i8mf4

#define vluxseg3ei8_v_i8mf4 ( ... ) __riscv_vluxseg3ei8_v_i8mf4(__VA_ARGS__)

◆ vluxseg3ei8_v_i8mf4_m

#define vluxseg3ei8_v_i8mf4_m ( ... ) __riscv_vluxseg3ei8_v_i8mf4_tumu(__VA_ARGS__)

◆ vluxseg3ei8_v_i8mf8

#define vluxseg3ei8_v_i8mf8 ( ... ) __riscv_vluxseg3ei8_v_i8mf8(__VA_ARGS__)

◆ vluxseg3ei8_v_i8mf8_m

#define vluxseg3ei8_v_i8mf8_m ( ... ) __riscv_vluxseg3ei8_v_i8mf8_tumu(__VA_ARGS__)

◆ vluxseg3ei8_v_u16m1

#define vluxseg3ei8_v_u16m1 ( ... ) __riscv_vluxseg3ei8_v_u16m1(__VA_ARGS__)

◆ vluxseg3ei8_v_u16m1_m

#define vluxseg3ei8_v_u16m1_m ( ... ) __riscv_vluxseg3ei8_v_u16m1_tumu(__VA_ARGS__)

◆ vluxseg3ei8_v_u16m2

#define vluxseg3ei8_v_u16m2 ( ... ) __riscv_vluxseg3ei8_v_u16m2(__VA_ARGS__)

◆ vluxseg3ei8_v_u16m2_m

#define vluxseg3ei8_v_u16m2_m ( ... ) __riscv_vluxseg3ei8_v_u16m2_tumu(__VA_ARGS__)

◆ vluxseg3ei8_v_u16mf2

#define vluxseg3ei8_v_u16mf2 ( ... ) __riscv_vluxseg3ei8_v_u16mf2(__VA_ARGS__)

◆ vluxseg3ei8_v_u16mf2_m

#define vluxseg3ei8_v_u16mf2_m ( ... ) __riscv_vluxseg3ei8_v_u16mf2_tumu(__VA_ARGS__)

◆ vluxseg3ei8_v_u16mf4

#define vluxseg3ei8_v_u16mf4 ( ... ) __riscv_vluxseg3ei8_v_u16mf4(__VA_ARGS__)

◆ vluxseg3ei8_v_u16mf4_m

#define vluxseg3ei8_v_u16mf4_m ( ... ) __riscv_vluxseg3ei8_v_u16mf4_tumu(__VA_ARGS__)

◆ vluxseg3ei8_v_u32m1

#define vluxseg3ei8_v_u32m1 ( ... ) __riscv_vluxseg3ei8_v_u32m1(__VA_ARGS__)

◆ vluxseg3ei8_v_u32m1_m

#define vluxseg3ei8_v_u32m1_m ( ... ) __riscv_vluxseg3ei8_v_u32m1_tumu(__VA_ARGS__)

◆ vluxseg3ei8_v_u32m2

#define vluxseg3ei8_v_u32m2 ( ... ) __riscv_vluxseg3ei8_v_u32m2(__VA_ARGS__)

◆ vluxseg3ei8_v_u32m2_m

#define vluxseg3ei8_v_u32m2_m ( ... ) __riscv_vluxseg3ei8_v_u32m2_tumu(__VA_ARGS__)

◆ vluxseg3ei8_v_u32mf2

#define vluxseg3ei8_v_u32mf2 ( ... ) __riscv_vluxseg3ei8_v_u32mf2(__VA_ARGS__)

◆ vluxseg3ei8_v_u32mf2_m

#define vluxseg3ei8_v_u32mf2_m ( ... ) __riscv_vluxseg3ei8_v_u32mf2_tumu(__VA_ARGS__)

◆ vluxseg3ei8_v_u64m1

#define vluxseg3ei8_v_u64m1 ( ... ) __riscv_vluxseg3ei8_v_u64m1(__VA_ARGS__)

◆ vluxseg3ei8_v_u64m1_m

#define vluxseg3ei8_v_u64m1_m ( ... ) __riscv_vluxseg3ei8_v_u64m1_tumu(__VA_ARGS__)

◆ vluxseg3ei8_v_u64m2

#define vluxseg3ei8_v_u64m2 ( ... ) __riscv_vluxseg3ei8_v_u64m2(__VA_ARGS__)

◆ vluxseg3ei8_v_u64m2_m

#define vluxseg3ei8_v_u64m2_m ( ... ) __riscv_vluxseg3ei8_v_u64m2_tumu(__VA_ARGS__)

◆ vluxseg3ei8_v_u8m1

#define vluxseg3ei8_v_u8m1 ( ... ) __riscv_vluxseg3ei8_v_u8m1(__VA_ARGS__)

◆ vluxseg3ei8_v_u8m1_m

#define vluxseg3ei8_v_u8m1_m ( ... ) __riscv_vluxseg3ei8_v_u8m1_tumu(__VA_ARGS__)

◆ vluxseg3ei8_v_u8m2

#define vluxseg3ei8_v_u8m2 ( ... ) __riscv_vluxseg3ei8_v_u8m2(__VA_ARGS__)

◆ vluxseg3ei8_v_u8m2_m

#define vluxseg3ei8_v_u8m2_m ( ... ) __riscv_vluxseg3ei8_v_u8m2_tumu(__VA_ARGS__)

◆ vluxseg3ei8_v_u8mf2

#define vluxseg3ei8_v_u8mf2 ( ... ) __riscv_vluxseg3ei8_v_u8mf2(__VA_ARGS__)

◆ vluxseg3ei8_v_u8mf2_m

#define vluxseg3ei8_v_u8mf2_m ( ... ) __riscv_vluxseg3ei8_v_u8mf2_tumu(__VA_ARGS__)

◆ vluxseg3ei8_v_u8mf4

#define vluxseg3ei8_v_u8mf4 ( ... ) __riscv_vluxseg3ei8_v_u8mf4(__VA_ARGS__)

◆ vluxseg3ei8_v_u8mf4_m

#define vluxseg3ei8_v_u8mf4_m ( ... ) __riscv_vluxseg3ei8_v_u8mf4_tumu(__VA_ARGS__)

◆ vluxseg3ei8_v_u8mf8

#define vluxseg3ei8_v_u8mf8 ( ... ) __riscv_vluxseg3ei8_v_u8mf8(__VA_ARGS__)

◆ vluxseg3ei8_v_u8mf8_m

#define vluxseg3ei8_v_u8mf8_m ( ... ) __riscv_vluxseg3ei8_v_u8mf8_tumu(__VA_ARGS__)

◆ vluxseg4ei16_v_f16m1

#define vluxseg4ei16_v_f16m1 ( ... ) __riscv_vluxseg4ei16_v_f16m1(__VA_ARGS__)

◆ vluxseg4ei16_v_f16m1_m

#define vluxseg4ei16_v_f16m1_m ( ... ) __riscv_vluxseg4ei16_v_f16m1_tumu(__VA_ARGS__)

◆ vluxseg4ei16_v_f16m2

#define vluxseg4ei16_v_f16m2 ( ... ) __riscv_vluxseg4ei16_v_f16m2(__VA_ARGS__)

◆ vluxseg4ei16_v_f16m2_m

#define vluxseg4ei16_v_f16m2_m ( ... ) __riscv_vluxseg4ei16_v_f16m2_tumu(__VA_ARGS__)

◆ vluxseg4ei16_v_f16mf2

#define vluxseg4ei16_v_f16mf2 ( ... ) __riscv_vluxseg4ei16_v_f16mf2(__VA_ARGS__)

◆ vluxseg4ei16_v_f16mf2_m

#define vluxseg4ei16_v_f16mf2_m ( ... ) __riscv_vluxseg4ei16_v_f16mf2_tumu(__VA_ARGS__)

◆ vluxseg4ei16_v_f16mf4

#define vluxseg4ei16_v_f16mf4 ( ... ) __riscv_vluxseg4ei16_v_f16mf4(__VA_ARGS__)

◆ vluxseg4ei16_v_f16mf4_m

#define vluxseg4ei16_v_f16mf4_m ( ... ) __riscv_vluxseg4ei16_v_f16mf4_tumu(__VA_ARGS__)

◆ vluxseg4ei16_v_f32m1

#define vluxseg4ei16_v_f32m1 ( ... ) __riscv_vluxseg4ei16_v_f32m1(__VA_ARGS__)

◆ vluxseg4ei16_v_f32m1_m

#define vluxseg4ei16_v_f32m1_m ( ... ) __riscv_vluxseg4ei16_v_f32m1_tumu(__VA_ARGS__)

◆ vluxseg4ei16_v_f32m2

#define vluxseg4ei16_v_f32m2 ( ... ) __riscv_vluxseg4ei16_v_f32m2(__VA_ARGS__)

◆ vluxseg4ei16_v_f32m2_m

#define vluxseg4ei16_v_f32m2_m ( ... ) __riscv_vluxseg4ei16_v_f32m2_tumu(__VA_ARGS__)

◆ vluxseg4ei16_v_f32mf2

#define vluxseg4ei16_v_f32mf2 ( ... ) __riscv_vluxseg4ei16_v_f32mf2(__VA_ARGS__)

◆ vluxseg4ei16_v_f32mf2_m

#define vluxseg4ei16_v_f32mf2_m ( ... ) __riscv_vluxseg4ei16_v_f32mf2_tumu(__VA_ARGS__)

◆ vluxseg4ei16_v_f64m1

#define vluxseg4ei16_v_f64m1 ( ... ) __riscv_vluxseg4ei16_v_f64m1(__VA_ARGS__)

◆ vluxseg4ei16_v_f64m1_m

#define vluxseg4ei16_v_f64m1_m ( ... ) __riscv_vluxseg4ei16_v_f64m1_tumu(__VA_ARGS__)

◆ vluxseg4ei16_v_f64m2

#define vluxseg4ei16_v_f64m2 ( ... ) __riscv_vluxseg4ei16_v_f64m2(__VA_ARGS__)

◆ vluxseg4ei16_v_f64m2_m

#define vluxseg4ei16_v_f64m2_m ( ... ) __riscv_vluxseg4ei16_v_f64m2_tumu(__VA_ARGS__)

◆ vluxseg4ei16_v_i16m1

#define vluxseg4ei16_v_i16m1 ( ... ) __riscv_vluxseg4ei16_v_i16m1(__VA_ARGS__)

◆ vluxseg4ei16_v_i16m1_m

#define vluxseg4ei16_v_i16m1_m ( ... ) __riscv_vluxseg4ei16_v_i16m1_tumu(__VA_ARGS__)

◆ vluxseg4ei16_v_i16m2

#define vluxseg4ei16_v_i16m2 ( ... ) __riscv_vluxseg4ei16_v_i16m2(__VA_ARGS__)

◆ vluxseg4ei16_v_i16m2_m

#define vluxseg4ei16_v_i16m2_m ( ... ) __riscv_vluxseg4ei16_v_i16m2_tumu(__VA_ARGS__)

◆ vluxseg4ei16_v_i16mf2

#define vluxseg4ei16_v_i16mf2 ( ... ) __riscv_vluxseg4ei16_v_i16mf2(__VA_ARGS__)

◆ vluxseg4ei16_v_i16mf2_m

#define vluxseg4ei16_v_i16mf2_m ( ... ) __riscv_vluxseg4ei16_v_i16mf2_tumu(__VA_ARGS__)

◆ vluxseg4ei16_v_i16mf4

#define vluxseg4ei16_v_i16mf4 ( ... ) __riscv_vluxseg4ei16_v_i16mf4(__VA_ARGS__)

◆ vluxseg4ei16_v_i16mf4_m

#define vluxseg4ei16_v_i16mf4_m ( ... ) __riscv_vluxseg4ei16_v_i16mf4_tumu(__VA_ARGS__)

◆ vluxseg4ei16_v_i32m1

#define vluxseg4ei16_v_i32m1 ( ... ) __riscv_vluxseg4ei16_v_i32m1(__VA_ARGS__)

◆ vluxseg4ei16_v_i32m1_m

#define vluxseg4ei16_v_i32m1_m ( ... ) __riscv_vluxseg4ei16_v_i32m1_tumu(__VA_ARGS__)

◆ vluxseg4ei16_v_i32m2

#define vluxseg4ei16_v_i32m2 ( ... ) __riscv_vluxseg4ei16_v_i32m2(__VA_ARGS__)

◆ vluxseg4ei16_v_i32m2_m

#define vluxseg4ei16_v_i32m2_m ( ... ) __riscv_vluxseg4ei16_v_i32m2_tumu(__VA_ARGS__)

◆ vluxseg4ei16_v_i32mf2

#define vluxseg4ei16_v_i32mf2 ( ... ) __riscv_vluxseg4ei16_v_i32mf2(__VA_ARGS__)

◆ vluxseg4ei16_v_i32mf2_m

#define vluxseg4ei16_v_i32mf2_m ( ... ) __riscv_vluxseg4ei16_v_i32mf2_tumu(__VA_ARGS__)

◆ vluxseg4ei16_v_i64m1

#define vluxseg4ei16_v_i64m1 ( ... ) __riscv_vluxseg4ei16_v_i64m1(__VA_ARGS__)

◆ vluxseg4ei16_v_i64m1_m

#define vluxseg4ei16_v_i64m1_m ( ... ) __riscv_vluxseg4ei16_v_i64m1_tumu(__VA_ARGS__)

◆ vluxseg4ei16_v_i64m2

#define vluxseg4ei16_v_i64m2 ( ... ) __riscv_vluxseg4ei16_v_i64m2(__VA_ARGS__)

◆ vluxseg4ei16_v_i64m2_m

#define vluxseg4ei16_v_i64m2_m ( ... ) __riscv_vluxseg4ei16_v_i64m2_tumu(__VA_ARGS__)

◆ vluxseg4ei16_v_i8m1

#define vluxseg4ei16_v_i8m1 ( ... ) __riscv_vluxseg4ei16_v_i8m1(__VA_ARGS__)

◆ vluxseg4ei16_v_i8m1_m

#define vluxseg4ei16_v_i8m1_m ( ... ) __riscv_vluxseg4ei16_v_i8m1_tumu(__VA_ARGS__)

◆ vluxseg4ei16_v_i8m2

#define vluxseg4ei16_v_i8m2 ( ... ) __riscv_vluxseg4ei16_v_i8m2(__VA_ARGS__)

◆ vluxseg4ei16_v_i8m2_m

#define vluxseg4ei16_v_i8m2_m ( ... ) __riscv_vluxseg4ei16_v_i8m2_tumu(__VA_ARGS__)

◆ vluxseg4ei16_v_i8mf2

#define vluxseg4ei16_v_i8mf2 ( ... ) __riscv_vluxseg4ei16_v_i8mf2(__VA_ARGS__)

◆ vluxseg4ei16_v_i8mf2_m

#define vluxseg4ei16_v_i8mf2_m ( ... ) __riscv_vluxseg4ei16_v_i8mf2_tumu(__VA_ARGS__)

◆ vluxseg4ei16_v_i8mf4

#define vluxseg4ei16_v_i8mf4 ( ... ) __riscv_vluxseg4ei16_v_i8mf4(__VA_ARGS__)

◆ vluxseg4ei16_v_i8mf4_m

#define vluxseg4ei16_v_i8mf4_m ( ... ) __riscv_vluxseg4ei16_v_i8mf4_tumu(__VA_ARGS__)

◆ vluxseg4ei16_v_i8mf8

#define vluxseg4ei16_v_i8mf8 ( ... ) __riscv_vluxseg4ei16_v_i8mf8(__VA_ARGS__)

◆ vluxseg4ei16_v_i8mf8_m

#define vluxseg4ei16_v_i8mf8_m ( ... ) __riscv_vluxseg4ei16_v_i8mf8_tumu(__VA_ARGS__)

◆ vluxseg4ei16_v_u16m1

#define vluxseg4ei16_v_u16m1 ( ... ) __riscv_vluxseg4ei16_v_u16m1(__VA_ARGS__)

◆ vluxseg4ei16_v_u16m1_m

#define vluxseg4ei16_v_u16m1_m ( ... ) __riscv_vluxseg4ei16_v_u16m1_tumu(__VA_ARGS__)

◆ vluxseg4ei16_v_u16m2

#define vluxseg4ei16_v_u16m2 ( ... ) __riscv_vluxseg4ei16_v_u16m2(__VA_ARGS__)

◆ vluxseg4ei16_v_u16m2_m

#define vluxseg4ei16_v_u16m2_m ( ... ) __riscv_vluxseg4ei16_v_u16m2_tumu(__VA_ARGS__)

◆ vluxseg4ei16_v_u16mf2

#define vluxseg4ei16_v_u16mf2 ( ... ) __riscv_vluxseg4ei16_v_u16mf2(__VA_ARGS__)

◆ vluxseg4ei16_v_u16mf2_m

#define vluxseg4ei16_v_u16mf2_m ( ... ) __riscv_vluxseg4ei16_v_u16mf2_tumu(__VA_ARGS__)

◆ vluxseg4ei16_v_u16mf4

#define vluxseg4ei16_v_u16mf4 ( ... ) __riscv_vluxseg4ei16_v_u16mf4(__VA_ARGS__)

◆ vluxseg4ei16_v_u16mf4_m

#define vluxseg4ei16_v_u16mf4_m ( ... ) __riscv_vluxseg4ei16_v_u16mf4_tumu(__VA_ARGS__)

◆ vluxseg4ei16_v_u32m1

#define vluxseg4ei16_v_u32m1 ( ... ) __riscv_vluxseg4ei16_v_u32m1(__VA_ARGS__)

◆ vluxseg4ei16_v_u32m1_m

#define vluxseg4ei16_v_u32m1_m ( ... ) __riscv_vluxseg4ei16_v_u32m1_tumu(__VA_ARGS__)

◆ vluxseg4ei16_v_u32m2

#define vluxseg4ei16_v_u32m2 ( ... ) __riscv_vluxseg4ei16_v_u32m2(__VA_ARGS__)

◆ vluxseg4ei16_v_u32m2_m

#define vluxseg4ei16_v_u32m2_m ( ... ) __riscv_vluxseg4ei16_v_u32m2_tumu(__VA_ARGS__)

◆ vluxseg4ei16_v_u32mf2

#define vluxseg4ei16_v_u32mf2 ( ... ) __riscv_vluxseg4ei16_v_u32mf2(__VA_ARGS__)

◆ vluxseg4ei16_v_u32mf2_m

#define vluxseg4ei16_v_u32mf2_m ( ... ) __riscv_vluxseg4ei16_v_u32mf2_tumu(__VA_ARGS__)

◆ vluxseg4ei16_v_u64m1

#define vluxseg4ei16_v_u64m1 ( ... ) __riscv_vluxseg4ei16_v_u64m1(__VA_ARGS__)

◆ vluxseg4ei16_v_u64m1_m

#define vluxseg4ei16_v_u64m1_m ( ... ) __riscv_vluxseg4ei16_v_u64m1_tumu(__VA_ARGS__)

◆ vluxseg4ei16_v_u64m2

#define vluxseg4ei16_v_u64m2 ( ... ) __riscv_vluxseg4ei16_v_u64m2(__VA_ARGS__)

◆ vluxseg4ei16_v_u64m2_m

#define vluxseg4ei16_v_u64m2_m ( ... ) __riscv_vluxseg4ei16_v_u64m2_tumu(__VA_ARGS__)

◆ vluxseg4ei16_v_u8m1

#define vluxseg4ei16_v_u8m1 ( ... ) __riscv_vluxseg4ei16_v_u8m1(__VA_ARGS__)

◆ vluxseg4ei16_v_u8m1_m

#define vluxseg4ei16_v_u8m1_m ( ... ) __riscv_vluxseg4ei16_v_u8m1_tumu(__VA_ARGS__)

◆ vluxseg4ei16_v_u8m2

#define vluxseg4ei16_v_u8m2 ( ... ) __riscv_vluxseg4ei16_v_u8m2(__VA_ARGS__)

◆ vluxseg4ei16_v_u8m2_m

#define vluxseg4ei16_v_u8m2_m ( ... ) __riscv_vluxseg4ei16_v_u8m2_tumu(__VA_ARGS__)

◆ vluxseg4ei16_v_u8mf2

#define vluxseg4ei16_v_u8mf2 ( ... ) __riscv_vluxseg4ei16_v_u8mf2(__VA_ARGS__)

◆ vluxseg4ei16_v_u8mf2_m

#define vluxseg4ei16_v_u8mf2_m ( ... ) __riscv_vluxseg4ei16_v_u8mf2_tumu(__VA_ARGS__)

◆ vluxseg4ei16_v_u8mf4

#define vluxseg4ei16_v_u8mf4 ( ... ) __riscv_vluxseg4ei16_v_u8mf4(__VA_ARGS__)

◆ vluxseg4ei16_v_u8mf4_m

#define vluxseg4ei16_v_u8mf4_m ( ... ) __riscv_vluxseg4ei16_v_u8mf4_tumu(__VA_ARGS__)

◆ vluxseg4ei16_v_u8mf8

#define vluxseg4ei16_v_u8mf8 ( ... ) __riscv_vluxseg4ei16_v_u8mf8(__VA_ARGS__)

◆ vluxseg4ei16_v_u8mf8_m

#define vluxseg4ei16_v_u8mf8_m ( ... ) __riscv_vluxseg4ei16_v_u8mf8_tumu(__VA_ARGS__)

◆ vluxseg4ei32_v_f16m1

#define vluxseg4ei32_v_f16m1 ( ... ) __riscv_vluxseg4ei32_v_f16m1(__VA_ARGS__)

◆ vluxseg4ei32_v_f16m1_m

#define vluxseg4ei32_v_f16m1_m ( ... ) __riscv_vluxseg4ei32_v_f16m1_tumu(__VA_ARGS__)

◆ vluxseg4ei32_v_f16m2

#define vluxseg4ei32_v_f16m2 ( ... ) __riscv_vluxseg4ei32_v_f16m2(__VA_ARGS__)

◆ vluxseg4ei32_v_f16m2_m

#define vluxseg4ei32_v_f16m2_m ( ... ) __riscv_vluxseg4ei32_v_f16m2_tumu(__VA_ARGS__)

◆ vluxseg4ei32_v_f16mf2

#define vluxseg4ei32_v_f16mf2 ( ... ) __riscv_vluxseg4ei32_v_f16mf2(__VA_ARGS__)

◆ vluxseg4ei32_v_f16mf2_m

#define vluxseg4ei32_v_f16mf2_m ( ... ) __riscv_vluxseg4ei32_v_f16mf2_tumu(__VA_ARGS__)

◆ vluxseg4ei32_v_f16mf4

#define vluxseg4ei32_v_f16mf4 ( ... ) __riscv_vluxseg4ei32_v_f16mf4(__VA_ARGS__)

◆ vluxseg4ei32_v_f16mf4_m

#define vluxseg4ei32_v_f16mf4_m ( ... ) __riscv_vluxseg4ei32_v_f16mf4_tumu(__VA_ARGS__)

◆ vluxseg4ei32_v_f32m1

#define vluxseg4ei32_v_f32m1 ( ... ) __riscv_vluxseg4ei32_v_f32m1(__VA_ARGS__)

◆ vluxseg4ei32_v_f32m1_m

#define vluxseg4ei32_v_f32m1_m ( ... ) __riscv_vluxseg4ei32_v_f32m1_tumu(__VA_ARGS__)

◆ vluxseg4ei32_v_f32m2

#define vluxseg4ei32_v_f32m2 ( ... ) __riscv_vluxseg4ei32_v_f32m2(__VA_ARGS__)

◆ vluxseg4ei32_v_f32m2_m

#define vluxseg4ei32_v_f32m2_m ( ... ) __riscv_vluxseg4ei32_v_f32m2_tumu(__VA_ARGS__)

◆ vluxseg4ei32_v_f32mf2

#define vluxseg4ei32_v_f32mf2 ( ... ) __riscv_vluxseg4ei32_v_f32mf2(__VA_ARGS__)

◆ vluxseg4ei32_v_f32mf2_m

#define vluxseg4ei32_v_f32mf2_m ( ... ) __riscv_vluxseg4ei32_v_f32mf2_tumu(__VA_ARGS__)

◆ vluxseg4ei32_v_f64m1

#define vluxseg4ei32_v_f64m1 ( ... ) __riscv_vluxseg4ei32_v_f64m1(__VA_ARGS__)

◆ vluxseg4ei32_v_f64m1_m

#define vluxseg4ei32_v_f64m1_m ( ... ) __riscv_vluxseg4ei32_v_f64m1_tumu(__VA_ARGS__)

◆ vluxseg4ei32_v_f64m2

#define vluxseg4ei32_v_f64m2 ( ... ) __riscv_vluxseg4ei32_v_f64m2(__VA_ARGS__)

◆ vluxseg4ei32_v_f64m2_m

#define vluxseg4ei32_v_f64m2_m ( ... ) __riscv_vluxseg4ei32_v_f64m2_tumu(__VA_ARGS__)

◆ vluxseg4ei32_v_i16m1

#define vluxseg4ei32_v_i16m1 ( ... ) __riscv_vluxseg4ei32_v_i16m1(__VA_ARGS__)

◆ vluxseg4ei32_v_i16m1_m

#define vluxseg4ei32_v_i16m1_m ( ... ) __riscv_vluxseg4ei32_v_i16m1_tumu(__VA_ARGS__)

◆ vluxseg4ei32_v_i16m2

#define vluxseg4ei32_v_i16m2 ( ... ) __riscv_vluxseg4ei32_v_i16m2(__VA_ARGS__)

◆ vluxseg4ei32_v_i16m2_m

#define vluxseg4ei32_v_i16m2_m ( ... ) __riscv_vluxseg4ei32_v_i16m2_tumu(__VA_ARGS__)

◆ vluxseg4ei32_v_i16mf2

#define vluxseg4ei32_v_i16mf2 ( ... ) __riscv_vluxseg4ei32_v_i16mf2(__VA_ARGS__)

◆ vluxseg4ei32_v_i16mf2_m

#define vluxseg4ei32_v_i16mf2_m ( ... ) __riscv_vluxseg4ei32_v_i16mf2_tumu(__VA_ARGS__)

◆ vluxseg4ei32_v_i16mf4

#define vluxseg4ei32_v_i16mf4 ( ... ) __riscv_vluxseg4ei32_v_i16mf4(__VA_ARGS__)

◆ vluxseg4ei32_v_i16mf4_m

#define vluxseg4ei32_v_i16mf4_m ( ... ) __riscv_vluxseg4ei32_v_i16mf4_tumu(__VA_ARGS__)

◆ vluxseg4ei32_v_i32m1

#define vluxseg4ei32_v_i32m1 ( ... ) __riscv_vluxseg4ei32_v_i32m1(__VA_ARGS__)

◆ vluxseg4ei32_v_i32m1_m

#define vluxseg4ei32_v_i32m1_m ( ... ) __riscv_vluxseg4ei32_v_i32m1_tumu(__VA_ARGS__)

◆ vluxseg4ei32_v_i32m2

#define vluxseg4ei32_v_i32m2 ( ... ) __riscv_vluxseg4ei32_v_i32m2(__VA_ARGS__)

◆ vluxseg4ei32_v_i32m2_m

#define vluxseg4ei32_v_i32m2_m ( ... ) __riscv_vluxseg4ei32_v_i32m2_tumu(__VA_ARGS__)

◆ vluxseg4ei32_v_i32mf2

#define vluxseg4ei32_v_i32mf2 ( ... ) __riscv_vluxseg4ei32_v_i32mf2(__VA_ARGS__)

◆ vluxseg4ei32_v_i32mf2_m

#define vluxseg4ei32_v_i32mf2_m ( ... ) __riscv_vluxseg4ei32_v_i32mf2_tumu(__VA_ARGS__)

◆ vluxseg4ei32_v_i64m1

#define vluxseg4ei32_v_i64m1 ( ... ) __riscv_vluxseg4ei32_v_i64m1(__VA_ARGS__)

◆ vluxseg4ei32_v_i64m1_m

#define vluxseg4ei32_v_i64m1_m ( ... ) __riscv_vluxseg4ei32_v_i64m1_tumu(__VA_ARGS__)

◆ vluxseg4ei32_v_i64m2

#define vluxseg4ei32_v_i64m2 ( ... ) __riscv_vluxseg4ei32_v_i64m2(__VA_ARGS__)

◆ vluxseg4ei32_v_i64m2_m

#define vluxseg4ei32_v_i64m2_m ( ... ) __riscv_vluxseg4ei32_v_i64m2_tumu(__VA_ARGS__)

◆ vluxseg4ei32_v_i8m1

#define vluxseg4ei32_v_i8m1 ( ... ) __riscv_vluxseg4ei32_v_i8m1(__VA_ARGS__)

◆ vluxseg4ei32_v_i8m1_m

#define vluxseg4ei32_v_i8m1_m ( ... ) __riscv_vluxseg4ei32_v_i8m1_tumu(__VA_ARGS__)

◆ vluxseg4ei32_v_i8m2

#define vluxseg4ei32_v_i8m2 ( ... ) __riscv_vluxseg4ei32_v_i8m2(__VA_ARGS__)

◆ vluxseg4ei32_v_i8m2_m

#define vluxseg4ei32_v_i8m2_m ( ... ) __riscv_vluxseg4ei32_v_i8m2_tumu(__VA_ARGS__)

◆ vluxseg4ei32_v_i8mf2

#define vluxseg4ei32_v_i8mf2 ( ... ) __riscv_vluxseg4ei32_v_i8mf2(__VA_ARGS__)

◆ vluxseg4ei32_v_i8mf2_m

#define vluxseg4ei32_v_i8mf2_m ( ... ) __riscv_vluxseg4ei32_v_i8mf2_tumu(__VA_ARGS__)

◆ vluxseg4ei32_v_i8mf4

#define vluxseg4ei32_v_i8mf4 ( ... ) __riscv_vluxseg4ei32_v_i8mf4(__VA_ARGS__)

◆ vluxseg4ei32_v_i8mf4_m

#define vluxseg4ei32_v_i8mf4_m ( ... ) __riscv_vluxseg4ei32_v_i8mf4_tumu(__VA_ARGS__)

◆ vluxseg4ei32_v_i8mf8

#define vluxseg4ei32_v_i8mf8 ( ... ) __riscv_vluxseg4ei32_v_i8mf8(__VA_ARGS__)

◆ vluxseg4ei32_v_i8mf8_m

#define vluxseg4ei32_v_i8mf8_m ( ... ) __riscv_vluxseg4ei32_v_i8mf8_tumu(__VA_ARGS__)

◆ vluxseg4ei32_v_u16m1

#define vluxseg4ei32_v_u16m1 ( ... ) __riscv_vluxseg4ei32_v_u16m1(__VA_ARGS__)

◆ vluxseg4ei32_v_u16m1_m

#define vluxseg4ei32_v_u16m1_m ( ... ) __riscv_vluxseg4ei32_v_u16m1_tumu(__VA_ARGS__)

◆ vluxseg4ei32_v_u16m2

#define vluxseg4ei32_v_u16m2 ( ... ) __riscv_vluxseg4ei32_v_u16m2(__VA_ARGS__)

◆ vluxseg4ei32_v_u16m2_m

#define vluxseg4ei32_v_u16m2_m ( ... ) __riscv_vluxseg4ei32_v_u16m2_tumu(__VA_ARGS__)

◆ vluxseg4ei32_v_u16mf2

#define vluxseg4ei32_v_u16mf2 ( ... ) __riscv_vluxseg4ei32_v_u16mf2(__VA_ARGS__)

◆ vluxseg4ei32_v_u16mf2_m

#define vluxseg4ei32_v_u16mf2_m ( ... ) __riscv_vluxseg4ei32_v_u16mf2_tumu(__VA_ARGS__)

◆ vluxseg4ei32_v_u16mf4

#define vluxseg4ei32_v_u16mf4 ( ... ) __riscv_vluxseg4ei32_v_u16mf4(__VA_ARGS__)

◆ vluxseg4ei32_v_u16mf4_m

#define vluxseg4ei32_v_u16mf4_m ( ... ) __riscv_vluxseg4ei32_v_u16mf4_tumu(__VA_ARGS__)

◆ vluxseg4ei32_v_u32m1

#define vluxseg4ei32_v_u32m1 ( ... ) __riscv_vluxseg4ei32_v_u32m1(__VA_ARGS__)

◆ vluxseg4ei32_v_u32m1_m

#define vluxseg4ei32_v_u32m1_m ( ... ) __riscv_vluxseg4ei32_v_u32m1_tumu(__VA_ARGS__)

◆ vluxseg4ei32_v_u32m2

#define vluxseg4ei32_v_u32m2 ( ... ) __riscv_vluxseg4ei32_v_u32m2(__VA_ARGS__)

◆ vluxseg4ei32_v_u32m2_m

#define vluxseg4ei32_v_u32m2_m ( ... ) __riscv_vluxseg4ei32_v_u32m2_tumu(__VA_ARGS__)

◆ vluxseg4ei32_v_u32mf2

#define vluxseg4ei32_v_u32mf2 ( ... ) __riscv_vluxseg4ei32_v_u32mf2(__VA_ARGS__)

◆ vluxseg4ei32_v_u32mf2_m

#define vluxseg4ei32_v_u32mf2_m ( ... ) __riscv_vluxseg4ei32_v_u32mf2_tumu(__VA_ARGS__)

◆ vluxseg4ei32_v_u64m1

#define vluxseg4ei32_v_u64m1 ( ... ) __riscv_vluxseg4ei32_v_u64m1(__VA_ARGS__)

◆ vluxseg4ei32_v_u64m1_m

#define vluxseg4ei32_v_u64m1_m ( ... ) __riscv_vluxseg4ei32_v_u64m1_tumu(__VA_ARGS__)

◆ vluxseg4ei32_v_u64m2

#define vluxseg4ei32_v_u64m2 ( ... ) __riscv_vluxseg4ei32_v_u64m2(__VA_ARGS__)

◆ vluxseg4ei32_v_u64m2_m

#define vluxseg4ei32_v_u64m2_m ( ... ) __riscv_vluxseg4ei32_v_u64m2_tumu(__VA_ARGS__)

◆ vluxseg4ei32_v_u8m1

#define vluxseg4ei32_v_u8m1 ( ... ) __riscv_vluxseg4ei32_v_u8m1(__VA_ARGS__)

◆ vluxseg4ei32_v_u8m1_m

#define vluxseg4ei32_v_u8m1_m ( ... ) __riscv_vluxseg4ei32_v_u8m1_tumu(__VA_ARGS__)

◆ vluxseg4ei32_v_u8m2

#define vluxseg4ei32_v_u8m2 ( ... ) __riscv_vluxseg4ei32_v_u8m2(__VA_ARGS__)

◆ vluxseg4ei32_v_u8m2_m

#define vluxseg4ei32_v_u8m2_m ( ... ) __riscv_vluxseg4ei32_v_u8m2_tumu(__VA_ARGS__)

◆ vluxseg4ei32_v_u8mf2

#define vluxseg4ei32_v_u8mf2 ( ... ) __riscv_vluxseg4ei32_v_u8mf2(__VA_ARGS__)

◆ vluxseg4ei32_v_u8mf2_m

#define vluxseg4ei32_v_u8mf2_m ( ... ) __riscv_vluxseg4ei32_v_u8mf2_tumu(__VA_ARGS__)

◆ vluxseg4ei32_v_u8mf4

#define vluxseg4ei32_v_u8mf4 ( ... ) __riscv_vluxseg4ei32_v_u8mf4(__VA_ARGS__)

◆ vluxseg4ei32_v_u8mf4_m

#define vluxseg4ei32_v_u8mf4_m ( ... ) __riscv_vluxseg4ei32_v_u8mf4_tumu(__VA_ARGS__)

◆ vluxseg4ei32_v_u8mf8

#define vluxseg4ei32_v_u8mf8 ( ... ) __riscv_vluxseg4ei32_v_u8mf8(__VA_ARGS__)

◆ vluxseg4ei32_v_u8mf8_m

#define vluxseg4ei32_v_u8mf8_m ( ... ) __riscv_vluxseg4ei32_v_u8mf8_tumu(__VA_ARGS__)

◆ vluxseg4ei64_v_f16m1

#define vluxseg4ei64_v_f16m1 ( ... ) __riscv_vluxseg4ei64_v_f16m1(__VA_ARGS__)

◆ vluxseg4ei64_v_f16m1_m

#define vluxseg4ei64_v_f16m1_m ( ... ) __riscv_vluxseg4ei64_v_f16m1_tumu(__VA_ARGS__)

◆ vluxseg4ei64_v_f16m2

#define vluxseg4ei64_v_f16m2 ( ... ) __riscv_vluxseg4ei64_v_f16m2(__VA_ARGS__)

◆ vluxseg4ei64_v_f16m2_m

#define vluxseg4ei64_v_f16m2_m ( ... ) __riscv_vluxseg4ei64_v_f16m2_tumu(__VA_ARGS__)

◆ vluxseg4ei64_v_f16mf2

#define vluxseg4ei64_v_f16mf2 ( ... ) __riscv_vluxseg4ei64_v_f16mf2(__VA_ARGS__)

◆ vluxseg4ei64_v_f16mf2_m

#define vluxseg4ei64_v_f16mf2_m ( ... ) __riscv_vluxseg4ei64_v_f16mf2_tumu(__VA_ARGS__)

◆ vluxseg4ei64_v_f16mf4

#define vluxseg4ei64_v_f16mf4 ( ... ) __riscv_vluxseg4ei64_v_f16mf4(__VA_ARGS__)

◆ vluxseg4ei64_v_f16mf4_m

#define vluxseg4ei64_v_f16mf4_m ( ... ) __riscv_vluxseg4ei64_v_f16mf4_tumu(__VA_ARGS__)

◆ vluxseg4ei64_v_f32m1

#define vluxseg4ei64_v_f32m1 ( ... ) __riscv_vluxseg4ei64_v_f32m1(__VA_ARGS__)

◆ vluxseg4ei64_v_f32m1_m

#define vluxseg4ei64_v_f32m1_m ( ... ) __riscv_vluxseg4ei64_v_f32m1_tumu(__VA_ARGS__)

◆ vluxseg4ei64_v_f32m2

#define vluxseg4ei64_v_f32m2 ( ... ) __riscv_vluxseg4ei64_v_f32m2(__VA_ARGS__)

◆ vluxseg4ei64_v_f32m2_m

#define vluxseg4ei64_v_f32m2_m ( ... ) __riscv_vluxseg4ei64_v_f32m2_tumu(__VA_ARGS__)

◆ vluxseg4ei64_v_f32mf2

#define vluxseg4ei64_v_f32mf2 ( ... ) __riscv_vluxseg4ei64_v_f32mf2(__VA_ARGS__)

◆ vluxseg4ei64_v_f32mf2_m

#define vluxseg4ei64_v_f32mf2_m ( ... ) __riscv_vluxseg4ei64_v_f32mf2_tumu(__VA_ARGS__)

◆ vluxseg4ei64_v_f64m1

#define vluxseg4ei64_v_f64m1 ( ... ) __riscv_vluxseg4ei64_v_f64m1(__VA_ARGS__)

◆ vluxseg4ei64_v_f64m1_m

#define vluxseg4ei64_v_f64m1_m ( ... ) __riscv_vluxseg4ei64_v_f64m1_tumu(__VA_ARGS__)

◆ vluxseg4ei64_v_f64m2

#define vluxseg4ei64_v_f64m2 ( ... ) __riscv_vluxseg4ei64_v_f64m2(__VA_ARGS__)

◆ vluxseg4ei64_v_f64m2_m

#define vluxseg4ei64_v_f64m2_m ( ... ) __riscv_vluxseg4ei64_v_f64m2_tumu(__VA_ARGS__)

◆ vluxseg4ei64_v_i16m1

#define vluxseg4ei64_v_i16m1 ( ... ) __riscv_vluxseg4ei64_v_i16m1(__VA_ARGS__)

◆ vluxseg4ei64_v_i16m1_m

#define vluxseg4ei64_v_i16m1_m ( ... ) __riscv_vluxseg4ei64_v_i16m1_tumu(__VA_ARGS__)

◆ vluxseg4ei64_v_i16m2

#define vluxseg4ei64_v_i16m2 ( ... ) __riscv_vluxseg4ei64_v_i16m2(__VA_ARGS__)

◆ vluxseg4ei64_v_i16m2_m

#define vluxseg4ei64_v_i16m2_m ( ... ) __riscv_vluxseg4ei64_v_i16m2_tumu(__VA_ARGS__)

◆ vluxseg4ei64_v_i16mf2

#define vluxseg4ei64_v_i16mf2 ( ... ) __riscv_vluxseg4ei64_v_i16mf2(__VA_ARGS__)

◆ vluxseg4ei64_v_i16mf2_m

#define vluxseg4ei64_v_i16mf2_m ( ... ) __riscv_vluxseg4ei64_v_i16mf2_tumu(__VA_ARGS__)

◆ vluxseg4ei64_v_i16mf4

#define vluxseg4ei64_v_i16mf4 ( ... ) __riscv_vluxseg4ei64_v_i16mf4(__VA_ARGS__)

◆ vluxseg4ei64_v_i16mf4_m

#define vluxseg4ei64_v_i16mf4_m ( ... ) __riscv_vluxseg4ei64_v_i16mf4_tumu(__VA_ARGS__)

◆ vluxseg4ei64_v_i32m1

#define vluxseg4ei64_v_i32m1 ( ... ) __riscv_vluxseg4ei64_v_i32m1(__VA_ARGS__)

◆ vluxseg4ei64_v_i32m1_m

#define vluxseg4ei64_v_i32m1_m ( ... ) __riscv_vluxseg4ei64_v_i32m1_tumu(__VA_ARGS__)

◆ vluxseg4ei64_v_i32m2

#define vluxseg4ei64_v_i32m2 ( ... ) __riscv_vluxseg4ei64_v_i32m2(__VA_ARGS__)

◆ vluxseg4ei64_v_i32m2_m

#define vluxseg4ei64_v_i32m2_m ( ... ) __riscv_vluxseg4ei64_v_i32m2_tumu(__VA_ARGS__)

◆ vluxseg4ei64_v_i32mf2

#define vluxseg4ei64_v_i32mf2 ( ... ) __riscv_vluxseg4ei64_v_i32mf2(__VA_ARGS__)

◆ vluxseg4ei64_v_i32mf2_m

#define vluxseg4ei64_v_i32mf2_m ( ... ) __riscv_vluxseg4ei64_v_i32mf2_tumu(__VA_ARGS__)

◆ vluxseg4ei64_v_i64m1

#define vluxseg4ei64_v_i64m1 ( ... ) __riscv_vluxseg4ei64_v_i64m1(__VA_ARGS__)

◆ vluxseg4ei64_v_i64m1_m

#define vluxseg4ei64_v_i64m1_m ( ... ) __riscv_vluxseg4ei64_v_i64m1_tumu(__VA_ARGS__)

◆ vluxseg4ei64_v_i64m2

#define vluxseg4ei64_v_i64m2 ( ... ) __riscv_vluxseg4ei64_v_i64m2(__VA_ARGS__)

◆ vluxseg4ei64_v_i64m2_m

#define vluxseg4ei64_v_i64m2_m ( ... ) __riscv_vluxseg4ei64_v_i64m2_tumu(__VA_ARGS__)

◆ vluxseg4ei64_v_i8m1

#define vluxseg4ei64_v_i8m1 ( ... ) __riscv_vluxseg4ei64_v_i8m1(__VA_ARGS__)

◆ vluxseg4ei64_v_i8m1_m

#define vluxseg4ei64_v_i8m1_m ( ... ) __riscv_vluxseg4ei64_v_i8m1_tumu(__VA_ARGS__)

◆ vluxseg4ei64_v_i8mf2

#define vluxseg4ei64_v_i8mf2 ( ... ) __riscv_vluxseg4ei64_v_i8mf2(__VA_ARGS__)

◆ vluxseg4ei64_v_i8mf2_m

#define vluxseg4ei64_v_i8mf2_m ( ... ) __riscv_vluxseg4ei64_v_i8mf2_tumu(__VA_ARGS__)

◆ vluxseg4ei64_v_i8mf4

#define vluxseg4ei64_v_i8mf4 ( ... ) __riscv_vluxseg4ei64_v_i8mf4(__VA_ARGS__)

◆ vluxseg4ei64_v_i8mf4_m

#define vluxseg4ei64_v_i8mf4_m ( ... ) __riscv_vluxseg4ei64_v_i8mf4_tumu(__VA_ARGS__)

◆ vluxseg4ei64_v_i8mf8

#define vluxseg4ei64_v_i8mf8 ( ... ) __riscv_vluxseg4ei64_v_i8mf8(__VA_ARGS__)

◆ vluxseg4ei64_v_i8mf8_m

#define vluxseg4ei64_v_i8mf8_m ( ... ) __riscv_vluxseg4ei64_v_i8mf8_tumu(__VA_ARGS__)

◆ vluxseg4ei64_v_u16m1

#define vluxseg4ei64_v_u16m1 ( ... ) __riscv_vluxseg4ei64_v_u16m1(__VA_ARGS__)

◆ vluxseg4ei64_v_u16m1_m

#define vluxseg4ei64_v_u16m1_m ( ... ) __riscv_vluxseg4ei64_v_u16m1_tumu(__VA_ARGS__)

◆ vluxseg4ei64_v_u16m2

#define vluxseg4ei64_v_u16m2 ( ... ) __riscv_vluxseg4ei64_v_u16m2(__VA_ARGS__)

◆ vluxseg4ei64_v_u16m2_m

#define vluxseg4ei64_v_u16m2_m ( ... ) __riscv_vluxseg4ei64_v_u16m2_tumu(__VA_ARGS__)

◆ vluxseg4ei64_v_u16mf2

#define vluxseg4ei64_v_u16mf2 ( ... ) __riscv_vluxseg4ei64_v_u16mf2(__VA_ARGS__)

◆ vluxseg4ei64_v_u16mf2_m

#define vluxseg4ei64_v_u16mf2_m ( ... ) __riscv_vluxseg4ei64_v_u16mf2_tumu(__VA_ARGS__)

◆ vluxseg4ei64_v_u16mf4

#define vluxseg4ei64_v_u16mf4 ( ... ) __riscv_vluxseg4ei64_v_u16mf4(__VA_ARGS__)

◆ vluxseg4ei64_v_u16mf4_m

#define vluxseg4ei64_v_u16mf4_m ( ... ) __riscv_vluxseg4ei64_v_u16mf4_tumu(__VA_ARGS__)

◆ vluxseg4ei64_v_u32m1

#define vluxseg4ei64_v_u32m1 ( ... ) __riscv_vluxseg4ei64_v_u32m1(__VA_ARGS__)

◆ vluxseg4ei64_v_u32m1_m

#define vluxseg4ei64_v_u32m1_m ( ... ) __riscv_vluxseg4ei64_v_u32m1_tumu(__VA_ARGS__)

◆ vluxseg4ei64_v_u32m2

#define vluxseg4ei64_v_u32m2 ( ... ) __riscv_vluxseg4ei64_v_u32m2(__VA_ARGS__)

◆ vluxseg4ei64_v_u32m2_m

#define vluxseg4ei64_v_u32m2_m ( ... ) __riscv_vluxseg4ei64_v_u32m2_tumu(__VA_ARGS__)

◆ vluxseg4ei64_v_u32mf2

#define vluxseg4ei64_v_u32mf2 ( ... ) __riscv_vluxseg4ei64_v_u32mf2(__VA_ARGS__)

◆ vluxseg4ei64_v_u32mf2_m

#define vluxseg4ei64_v_u32mf2_m ( ... ) __riscv_vluxseg4ei64_v_u32mf2_tumu(__VA_ARGS__)

◆ vluxseg4ei64_v_u64m1

#define vluxseg4ei64_v_u64m1 ( ... ) __riscv_vluxseg4ei64_v_u64m1(__VA_ARGS__)

◆ vluxseg4ei64_v_u64m1_m

#define vluxseg4ei64_v_u64m1_m ( ... ) __riscv_vluxseg4ei64_v_u64m1_tumu(__VA_ARGS__)

◆ vluxseg4ei64_v_u64m2

#define vluxseg4ei64_v_u64m2 ( ... ) __riscv_vluxseg4ei64_v_u64m2(__VA_ARGS__)

◆ vluxseg4ei64_v_u64m2_m

#define vluxseg4ei64_v_u64m2_m ( ... ) __riscv_vluxseg4ei64_v_u64m2_tumu(__VA_ARGS__)

◆ vluxseg4ei64_v_u8m1

#define vluxseg4ei64_v_u8m1 ( ... ) __riscv_vluxseg4ei64_v_u8m1(__VA_ARGS__)

◆ vluxseg4ei64_v_u8m1_m

#define vluxseg4ei64_v_u8m1_m ( ... ) __riscv_vluxseg4ei64_v_u8m1_tumu(__VA_ARGS__)

◆ vluxseg4ei64_v_u8mf2

#define vluxseg4ei64_v_u8mf2 ( ... ) __riscv_vluxseg4ei64_v_u8mf2(__VA_ARGS__)

◆ vluxseg4ei64_v_u8mf2_m

#define vluxseg4ei64_v_u8mf2_m ( ... ) __riscv_vluxseg4ei64_v_u8mf2_tumu(__VA_ARGS__)

◆ vluxseg4ei64_v_u8mf4

#define vluxseg4ei64_v_u8mf4 ( ... ) __riscv_vluxseg4ei64_v_u8mf4(__VA_ARGS__)

◆ vluxseg4ei64_v_u8mf4_m

#define vluxseg4ei64_v_u8mf4_m ( ... ) __riscv_vluxseg4ei64_v_u8mf4_tumu(__VA_ARGS__)

◆ vluxseg4ei64_v_u8mf8

#define vluxseg4ei64_v_u8mf8 ( ... ) __riscv_vluxseg4ei64_v_u8mf8(__VA_ARGS__)

◆ vluxseg4ei64_v_u8mf8_m

#define vluxseg4ei64_v_u8mf8_m ( ... ) __riscv_vluxseg4ei64_v_u8mf8_tumu(__VA_ARGS__)

◆ vluxseg4ei8_v_f16m1

#define vluxseg4ei8_v_f16m1 ( ... ) __riscv_vluxseg4ei8_v_f16m1(__VA_ARGS__)

◆ vluxseg4ei8_v_f16m1_m

#define vluxseg4ei8_v_f16m1_m ( ... ) __riscv_vluxseg4ei8_v_f16m1_tumu(__VA_ARGS__)

◆ vluxseg4ei8_v_f16m2

#define vluxseg4ei8_v_f16m2 ( ... ) __riscv_vluxseg4ei8_v_f16m2(__VA_ARGS__)

◆ vluxseg4ei8_v_f16m2_m

#define vluxseg4ei8_v_f16m2_m ( ... ) __riscv_vluxseg4ei8_v_f16m2_tumu(__VA_ARGS__)

◆ vluxseg4ei8_v_f16mf2

#define vluxseg4ei8_v_f16mf2 ( ... ) __riscv_vluxseg4ei8_v_f16mf2(__VA_ARGS__)

◆ vluxseg4ei8_v_f16mf2_m

#define vluxseg4ei8_v_f16mf2_m ( ... ) __riscv_vluxseg4ei8_v_f16mf2_tumu(__VA_ARGS__)

◆ vluxseg4ei8_v_f16mf4

#define vluxseg4ei8_v_f16mf4 ( ... ) __riscv_vluxseg4ei8_v_f16mf4(__VA_ARGS__)

◆ vluxseg4ei8_v_f16mf4_m

#define vluxseg4ei8_v_f16mf4_m ( ... ) __riscv_vluxseg4ei8_v_f16mf4_tumu(__VA_ARGS__)

◆ vluxseg4ei8_v_f32m1

#define vluxseg4ei8_v_f32m1 ( ... ) __riscv_vluxseg4ei8_v_f32m1(__VA_ARGS__)

◆ vluxseg4ei8_v_f32m1_m

#define vluxseg4ei8_v_f32m1_m ( ... ) __riscv_vluxseg4ei8_v_f32m1_tumu(__VA_ARGS__)

◆ vluxseg4ei8_v_f32m2

#define vluxseg4ei8_v_f32m2 ( ... ) __riscv_vluxseg4ei8_v_f32m2(__VA_ARGS__)

◆ vluxseg4ei8_v_f32m2_m

#define vluxseg4ei8_v_f32m2_m ( ... ) __riscv_vluxseg4ei8_v_f32m2_tumu(__VA_ARGS__)

◆ vluxseg4ei8_v_f32mf2

#define vluxseg4ei8_v_f32mf2 ( ... ) __riscv_vluxseg4ei8_v_f32mf2(__VA_ARGS__)

◆ vluxseg4ei8_v_f32mf2_m

#define vluxseg4ei8_v_f32mf2_m ( ... ) __riscv_vluxseg4ei8_v_f32mf2_tumu(__VA_ARGS__)

◆ vluxseg4ei8_v_f64m1

#define vluxseg4ei8_v_f64m1 ( ... ) __riscv_vluxseg4ei8_v_f64m1(__VA_ARGS__)

◆ vluxseg4ei8_v_f64m1_m

#define vluxseg4ei8_v_f64m1_m ( ... ) __riscv_vluxseg4ei8_v_f64m1_tumu(__VA_ARGS__)

◆ vluxseg4ei8_v_f64m2

#define vluxseg4ei8_v_f64m2 ( ... ) __riscv_vluxseg4ei8_v_f64m2(__VA_ARGS__)

◆ vluxseg4ei8_v_f64m2_m

#define vluxseg4ei8_v_f64m2_m ( ... ) __riscv_vluxseg4ei8_v_f64m2_tumu(__VA_ARGS__)

◆ vluxseg4ei8_v_i16m1

#define vluxseg4ei8_v_i16m1 ( ... ) __riscv_vluxseg4ei8_v_i16m1(__VA_ARGS__)

◆ vluxseg4ei8_v_i16m1_m

#define vluxseg4ei8_v_i16m1_m ( ... ) __riscv_vluxseg4ei8_v_i16m1_tumu(__VA_ARGS__)

◆ vluxseg4ei8_v_i16m2

#define vluxseg4ei8_v_i16m2 ( ... ) __riscv_vluxseg4ei8_v_i16m2(__VA_ARGS__)

◆ vluxseg4ei8_v_i16m2_m

#define vluxseg4ei8_v_i16m2_m ( ... ) __riscv_vluxseg4ei8_v_i16m2_tumu(__VA_ARGS__)

◆ vluxseg4ei8_v_i16mf2

#define vluxseg4ei8_v_i16mf2 ( ... ) __riscv_vluxseg4ei8_v_i16mf2(__VA_ARGS__)

◆ vluxseg4ei8_v_i16mf2_m

#define vluxseg4ei8_v_i16mf2_m ( ... ) __riscv_vluxseg4ei8_v_i16mf2_tumu(__VA_ARGS__)

◆ vluxseg4ei8_v_i16mf4

#define vluxseg4ei8_v_i16mf4 ( ... ) __riscv_vluxseg4ei8_v_i16mf4(__VA_ARGS__)

◆ vluxseg4ei8_v_i16mf4_m

#define vluxseg4ei8_v_i16mf4_m ( ... ) __riscv_vluxseg4ei8_v_i16mf4_tumu(__VA_ARGS__)

◆ vluxseg4ei8_v_i32m1

#define vluxseg4ei8_v_i32m1 ( ... ) __riscv_vluxseg4ei8_v_i32m1(__VA_ARGS__)

◆ vluxseg4ei8_v_i32m1_m

#define vluxseg4ei8_v_i32m1_m ( ... ) __riscv_vluxseg4ei8_v_i32m1_tumu(__VA_ARGS__)

◆ vluxseg4ei8_v_i32m2

#define vluxseg4ei8_v_i32m2 ( ... ) __riscv_vluxseg4ei8_v_i32m2(__VA_ARGS__)

◆ vluxseg4ei8_v_i32m2_m

#define vluxseg4ei8_v_i32m2_m ( ... ) __riscv_vluxseg4ei8_v_i32m2_tumu(__VA_ARGS__)

◆ vluxseg4ei8_v_i32mf2

#define vluxseg4ei8_v_i32mf2 ( ... ) __riscv_vluxseg4ei8_v_i32mf2(__VA_ARGS__)

◆ vluxseg4ei8_v_i32mf2_m

#define vluxseg4ei8_v_i32mf2_m ( ... ) __riscv_vluxseg4ei8_v_i32mf2_tumu(__VA_ARGS__)

◆ vluxseg4ei8_v_i64m1

#define vluxseg4ei8_v_i64m1 ( ... ) __riscv_vluxseg4ei8_v_i64m1(__VA_ARGS__)

◆ vluxseg4ei8_v_i64m1_m

#define vluxseg4ei8_v_i64m1_m ( ... ) __riscv_vluxseg4ei8_v_i64m1_tumu(__VA_ARGS__)

◆ vluxseg4ei8_v_i64m2

#define vluxseg4ei8_v_i64m2 ( ... ) __riscv_vluxseg4ei8_v_i64m2(__VA_ARGS__)

◆ vluxseg4ei8_v_i64m2_m

#define vluxseg4ei8_v_i64m2_m ( ... ) __riscv_vluxseg4ei8_v_i64m2_tumu(__VA_ARGS__)

◆ vluxseg4ei8_v_i8m1

#define vluxseg4ei8_v_i8m1 ( ... ) __riscv_vluxseg4ei8_v_i8m1(__VA_ARGS__)

◆ vluxseg4ei8_v_i8m1_m

#define vluxseg4ei8_v_i8m1_m ( ... ) __riscv_vluxseg4ei8_v_i8m1_tumu(__VA_ARGS__)

◆ vluxseg4ei8_v_i8m2

#define vluxseg4ei8_v_i8m2 ( ... ) __riscv_vluxseg4ei8_v_i8m2(__VA_ARGS__)

◆ vluxseg4ei8_v_i8m2_m

#define vluxseg4ei8_v_i8m2_m ( ... ) __riscv_vluxseg4ei8_v_i8m2_tumu(__VA_ARGS__)

◆ vluxseg4ei8_v_i8mf2

#define vluxseg4ei8_v_i8mf2 ( ... ) __riscv_vluxseg4ei8_v_i8mf2(__VA_ARGS__)

◆ vluxseg4ei8_v_i8mf2_m

#define vluxseg4ei8_v_i8mf2_m ( ... ) __riscv_vluxseg4ei8_v_i8mf2_tumu(__VA_ARGS__)

◆ vluxseg4ei8_v_i8mf4

#define vluxseg4ei8_v_i8mf4 ( ... ) __riscv_vluxseg4ei8_v_i8mf4(__VA_ARGS__)

◆ vluxseg4ei8_v_i8mf4_m

#define vluxseg4ei8_v_i8mf4_m ( ... ) __riscv_vluxseg4ei8_v_i8mf4_tumu(__VA_ARGS__)

◆ vluxseg4ei8_v_i8mf8

#define vluxseg4ei8_v_i8mf8 ( ... ) __riscv_vluxseg4ei8_v_i8mf8(__VA_ARGS__)

◆ vluxseg4ei8_v_i8mf8_m

#define vluxseg4ei8_v_i8mf8_m ( ... ) __riscv_vluxseg4ei8_v_i8mf8_tumu(__VA_ARGS__)

◆ vluxseg4ei8_v_u16m1

#define vluxseg4ei8_v_u16m1 ( ... ) __riscv_vluxseg4ei8_v_u16m1(__VA_ARGS__)

◆ vluxseg4ei8_v_u16m1_m

#define vluxseg4ei8_v_u16m1_m ( ... ) __riscv_vluxseg4ei8_v_u16m1_tumu(__VA_ARGS__)

◆ vluxseg4ei8_v_u16m2

#define vluxseg4ei8_v_u16m2 ( ... ) __riscv_vluxseg4ei8_v_u16m2(__VA_ARGS__)

◆ vluxseg4ei8_v_u16m2_m

#define vluxseg4ei8_v_u16m2_m ( ... ) __riscv_vluxseg4ei8_v_u16m2_tumu(__VA_ARGS__)

◆ vluxseg4ei8_v_u16mf2

#define vluxseg4ei8_v_u16mf2 ( ... ) __riscv_vluxseg4ei8_v_u16mf2(__VA_ARGS__)

◆ vluxseg4ei8_v_u16mf2_m

#define vluxseg4ei8_v_u16mf2_m ( ... ) __riscv_vluxseg4ei8_v_u16mf2_tumu(__VA_ARGS__)

◆ vluxseg4ei8_v_u16mf4

#define vluxseg4ei8_v_u16mf4 ( ... ) __riscv_vluxseg4ei8_v_u16mf4(__VA_ARGS__)

◆ vluxseg4ei8_v_u16mf4_m

#define vluxseg4ei8_v_u16mf4_m ( ... ) __riscv_vluxseg4ei8_v_u16mf4_tumu(__VA_ARGS__)

◆ vluxseg4ei8_v_u32m1

#define vluxseg4ei8_v_u32m1 ( ... ) __riscv_vluxseg4ei8_v_u32m1(__VA_ARGS__)

◆ vluxseg4ei8_v_u32m1_m

#define vluxseg4ei8_v_u32m1_m ( ... ) __riscv_vluxseg4ei8_v_u32m1_tumu(__VA_ARGS__)

◆ vluxseg4ei8_v_u32m2

#define vluxseg4ei8_v_u32m2 ( ... ) __riscv_vluxseg4ei8_v_u32m2(__VA_ARGS__)

◆ vluxseg4ei8_v_u32m2_m

#define vluxseg4ei8_v_u32m2_m ( ... ) __riscv_vluxseg4ei8_v_u32m2_tumu(__VA_ARGS__)

◆ vluxseg4ei8_v_u32mf2

#define vluxseg4ei8_v_u32mf2 ( ... ) __riscv_vluxseg4ei8_v_u32mf2(__VA_ARGS__)

◆ vluxseg4ei8_v_u32mf2_m

#define vluxseg4ei8_v_u32mf2_m ( ... ) __riscv_vluxseg4ei8_v_u32mf2_tumu(__VA_ARGS__)

◆ vluxseg4ei8_v_u64m1

#define vluxseg4ei8_v_u64m1 ( ... ) __riscv_vluxseg4ei8_v_u64m1(__VA_ARGS__)

◆ vluxseg4ei8_v_u64m1_m

#define vluxseg4ei8_v_u64m1_m ( ... ) __riscv_vluxseg4ei8_v_u64m1_tumu(__VA_ARGS__)

◆ vluxseg4ei8_v_u64m2

#define vluxseg4ei8_v_u64m2 ( ... ) __riscv_vluxseg4ei8_v_u64m2(__VA_ARGS__)

◆ vluxseg4ei8_v_u64m2_m

#define vluxseg4ei8_v_u64m2_m ( ... ) __riscv_vluxseg4ei8_v_u64m2_tumu(__VA_ARGS__)

◆ vluxseg4ei8_v_u8m1

#define vluxseg4ei8_v_u8m1 ( ... ) __riscv_vluxseg4ei8_v_u8m1(__VA_ARGS__)

◆ vluxseg4ei8_v_u8m1_m

#define vluxseg4ei8_v_u8m1_m ( ... ) __riscv_vluxseg4ei8_v_u8m1_tumu(__VA_ARGS__)

◆ vluxseg4ei8_v_u8m2

#define vluxseg4ei8_v_u8m2 ( ... ) __riscv_vluxseg4ei8_v_u8m2(__VA_ARGS__)

◆ vluxseg4ei8_v_u8m2_m

#define vluxseg4ei8_v_u8m2_m ( ... ) __riscv_vluxseg4ei8_v_u8m2_tumu(__VA_ARGS__)

◆ vluxseg4ei8_v_u8mf2

#define vluxseg4ei8_v_u8mf2 ( ... ) __riscv_vluxseg4ei8_v_u8mf2(__VA_ARGS__)

◆ vluxseg4ei8_v_u8mf2_m

#define vluxseg4ei8_v_u8mf2_m ( ... ) __riscv_vluxseg4ei8_v_u8mf2_tumu(__VA_ARGS__)

◆ vluxseg4ei8_v_u8mf4

#define vluxseg4ei8_v_u8mf4 ( ... ) __riscv_vluxseg4ei8_v_u8mf4(__VA_ARGS__)

◆ vluxseg4ei8_v_u8mf4_m

#define vluxseg4ei8_v_u8mf4_m ( ... ) __riscv_vluxseg4ei8_v_u8mf4_tumu(__VA_ARGS__)

◆ vluxseg4ei8_v_u8mf8

#define vluxseg4ei8_v_u8mf8 ( ... ) __riscv_vluxseg4ei8_v_u8mf8(__VA_ARGS__)

◆ vluxseg4ei8_v_u8mf8_m

#define vluxseg4ei8_v_u8mf8_m ( ... ) __riscv_vluxseg4ei8_v_u8mf8_tumu(__VA_ARGS__)

◆ vluxseg5ei16_v_f16m1

#define vluxseg5ei16_v_f16m1 ( ... ) __riscv_vluxseg5ei16_v_f16m1(__VA_ARGS__)

◆ vluxseg5ei16_v_f16m1_m

#define vluxseg5ei16_v_f16m1_m ( ... ) __riscv_vluxseg5ei16_v_f16m1_tumu(__VA_ARGS__)

◆ vluxseg5ei16_v_f16mf2

#define vluxseg5ei16_v_f16mf2 ( ... ) __riscv_vluxseg5ei16_v_f16mf2(__VA_ARGS__)

◆ vluxseg5ei16_v_f16mf2_m

#define vluxseg5ei16_v_f16mf2_m ( ... ) __riscv_vluxseg5ei16_v_f16mf2_tumu(__VA_ARGS__)

◆ vluxseg5ei16_v_f16mf4

#define vluxseg5ei16_v_f16mf4 ( ... ) __riscv_vluxseg5ei16_v_f16mf4(__VA_ARGS__)

◆ vluxseg5ei16_v_f16mf4_m

#define vluxseg5ei16_v_f16mf4_m ( ... ) __riscv_vluxseg5ei16_v_f16mf4_tumu(__VA_ARGS__)

◆ vluxseg5ei16_v_f32m1

#define vluxseg5ei16_v_f32m1 ( ... ) __riscv_vluxseg5ei16_v_f32m1(__VA_ARGS__)

◆ vluxseg5ei16_v_f32m1_m

#define vluxseg5ei16_v_f32m1_m ( ... ) __riscv_vluxseg5ei16_v_f32m1_tumu(__VA_ARGS__)

◆ vluxseg5ei16_v_f32mf2

#define vluxseg5ei16_v_f32mf2 ( ... ) __riscv_vluxseg5ei16_v_f32mf2(__VA_ARGS__)

◆ vluxseg5ei16_v_f32mf2_m

#define vluxseg5ei16_v_f32mf2_m ( ... ) __riscv_vluxseg5ei16_v_f32mf2_tumu(__VA_ARGS__)

◆ vluxseg5ei16_v_f64m1

#define vluxseg5ei16_v_f64m1 ( ... ) __riscv_vluxseg5ei16_v_f64m1(__VA_ARGS__)

◆ vluxseg5ei16_v_f64m1_m

#define vluxseg5ei16_v_f64m1_m ( ... ) __riscv_vluxseg5ei16_v_f64m1_tumu(__VA_ARGS__)

◆ vluxseg5ei16_v_i16m1

#define vluxseg5ei16_v_i16m1 ( ... ) __riscv_vluxseg5ei16_v_i16m1(__VA_ARGS__)

◆ vluxseg5ei16_v_i16m1_m

#define vluxseg5ei16_v_i16m1_m ( ... ) __riscv_vluxseg5ei16_v_i16m1_tumu(__VA_ARGS__)

◆ vluxseg5ei16_v_i16mf2

#define vluxseg5ei16_v_i16mf2 ( ... ) __riscv_vluxseg5ei16_v_i16mf2(__VA_ARGS__)

◆ vluxseg5ei16_v_i16mf2_m

#define vluxseg5ei16_v_i16mf2_m ( ... ) __riscv_vluxseg5ei16_v_i16mf2_tumu(__VA_ARGS__)

◆ vluxseg5ei16_v_i16mf4

#define vluxseg5ei16_v_i16mf4 ( ... ) __riscv_vluxseg5ei16_v_i16mf4(__VA_ARGS__)

◆ vluxseg5ei16_v_i16mf4_m

#define vluxseg5ei16_v_i16mf4_m ( ... ) __riscv_vluxseg5ei16_v_i16mf4_tumu(__VA_ARGS__)

◆ vluxseg5ei16_v_i32m1

#define vluxseg5ei16_v_i32m1 ( ... ) __riscv_vluxseg5ei16_v_i32m1(__VA_ARGS__)

◆ vluxseg5ei16_v_i32m1_m

#define vluxseg5ei16_v_i32m1_m ( ... ) __riscv_vluxseg5ei16_v_i32m1_tumu(__VA_ARGS__)

◆ vluxseg5ei16_v_i32mf2

#define vluxseg5ei16_v_i32mf2 ( ... ) __riscv_vluxseg5ei16_v_i32mf2(__VA_ARGS__)

◆ vluxseg5ei16_v_i32mf2_m

#define vluxseg5ei16_v_i32mf2_m ( ... ) __riscv_vluxseg5ei16_v_i32mf2_tumu(__VA_ARGS__)

◆ vluxseg5ei16_v_i64m1

#define vluxseg5ei16_v_i64m1 ( ... ) __riscv_vluxseg5ei16_v_i64m1(__VA_ARGS__)

◆ vluxseg5ei16_v_i64m1_m

#define vluxseg5ei16_v_i64m1_m ( ... ) __riscv_vluxseg5ei16_v_i64m1_tumu(__VA_ARGS__)

◆ vluxseg5ei16_v_i8m1

#define vluxseg5ei16_v_i8m1 ( ... ) __riscv_vluxseg5ei16_v_i8m1(__VA_ARGS__)

◆ vluxseg5ei16_v_i8m1_m

#define vluxseg5ei16_v_i8m1_m ( ... ) __riscv_vluxseg5ei16_v_i8m1_tumu(__VA_ARGS__)

◆ vluxseg5ei16_v_i8mf2

#define vluxseg5ei16_v_i8mf2 ( ... ) __riscv_vluxseg5ei16_v_i8mf2(__VA_ARGS__)

◆ vluxseg5ei16_v_i8mf2_m

#define vluxseg5ei16_v_i8mf2_m ( ... ) __riscv_vluxseg5ei16_v_i8mf2_tumu(__VA_ARGS__)

◆ vluxseg5ei16_v_i8mf4

#define vluxseg5ei16_v_i8mf4 ( ... ) __riscv_vluxseg5ei16_v_i8mf4(__VA_ARGS__)

◆ vluxseg5ei16_v_i8mf4_m

#define vluxseg5ei16_v_i8mf4_m ( ... ) __riscv_vluxseg5ei16_v_i8mf4_tumu(__VA_ARGS__)

◆ vluxseg5ei16_v_i8mf8

#define vluxseg5ei16_v_i8mf8 ( ... ) __riscv_vluxseg5ei16_v_i8mf8(__VA_ARGS__)

◆ vluxseg5ei16_v_i8mf8_m

#define vluxseg5ei16_v_i8mf8_m ( ... ) __riscv_vluxseg5ei16_v_i8mf8_tumu(__VA_ARGS__)

◆ vluxseg5ei16_v_u16m1

#define vluxseg5ei16_v_u16m1 ( ... ) __riscv_vluxseg5ei16_v_u16m1(__VA_ARGS__)

◆ vluxseg5ei16_v_u16m1_m

#define vluxseg5ei16_v_u16m1_m ( ... ) __riscv_vluxseg5ei16_v_u16m1_tumu(__VA_ARGS__)

◆ vluxseg5ei16_v_u16mf2

#define vluxseg5ei16_v_u16mf2 ( ... ) __riscv_vluxseg5ei16_v_u16mf2(__VA_ARGS__)

◆ vluxseg5ei16_v_u16mf2_m

#define vluxseg5ei16_v_u16mf2_m ( ... ) __riscv_vluxseg5ei16_v_u16mf2_tumu(__VA_ARGS__)

◆ vluxseg5ei16_v_u16mf4

#define vluxseg5ei16_v_u16mf4 ( ... ) __riscv_vluxseg5ei16_v_u16mf4(__VA_ARGS__)

◆ vluxseg5ei16_v_u16mf4_m

#define vluxseg5ei16_v_u16mf4_m ( ... ) __riscv_vluxseg5ei16_v_u16mf4_tumu(__VA_ARGS__)

◆ vluxseg5ei16_v_u32m1

#define vluxseg5ei16_v_u32m1 ( ... ) __riscv_vluxseg5ei16_v_u32m1(__VA_ARGS__)

◆ vluxseg5ei16_v_u32m1_m

#define vluxseg5ei16_v_u32m1_m ( ... ) __riscv_vluxseg5ei16_v_u32m1_tumu(__VA_ARGS__)

◆ vluxseg5ei16_v_u32mf2

#define vluxseg5ei16_v_u32mf2 ( ... ) __riscv_vluxseg5ei16_v_u32mf2(__VA_ARGS__)

◆ vluxseg5ei16_v_u32mf2_m

#define vluxseg5ei16_v_u32mf2_m ( ... ) __riscv_vluxseg5ei16_v_u32mf2_tumu(__VA_ARGS__)

◆ vluxseg5ei16_v_u64m1

#define vluxseg5ei16_v_u64m1 ( ... ) __riscv_vluxseg5ei16_v_u64m1(__VA_ARGS__)

◆ vluxseg5ei16_v_u64m1_m

#define vluxseg5ei16_v_u64m1_m ( ... ) __riscv_vluxseg5ei16_v_u64m1_tumu(__VA_ARGS__)

◆ vluxseg5ei16_v_u8m1

#define vluxseg5ei16_v_u8m1 ( ... ) __riscv_vluxseg5ei16_v_u8m1(__VA_ARGS__)

◆ vluxseg5ei16_v_u8m1_m

#define vluxseg5ei16_v_u8m1_m ( ... ) __riscv_vluxseg5ei16_v_u8m1_tumu(__VA_ARGS__)

◆ vluxseg5ei16_v_u8mf2

#define vluxseg5ei16_v_u8mf2 ( ... ) __riscv_vluxseg5ei16_v_u8mf2(__VA_ARGS__)

◆ vluxseg5ei16_v_u8mf2_m

#define vluxseg5ei16_v_u8mf2_m ( ... ) __riscv_vluxseg5ei16_v_u8mf2_tumu(__VA_ARGS__)

◆ vluxseg5ei16_v_u8mf4

#define vluxseg5ei16_v_u8mf4 ( ... ) __riscv_vluxseg5ei16_v_u8mf4(__VA_ARGS__)

◆ vluxseg5ei16_v_u8mf4_m

#define vluxseg5ei16_v_u8mf4_m ( ... ) __riscv_vluxseg5ei16_v_u8mf4_tumu(__VA_ARGS__)

◆ vluxseg5ei16_v_u8mf8

#define vluxseg5ei16_v_u8mf8 ( ... ) __riscv_vluxseg5ei16_v_u8mf8(__VA_ARGS__)

◆ vluxseg5ei16_v_u8mf8_m

#define vluxseg5ei16_v_u8mf8_m ( ... ) __riscv_vluxseg5ei16_v_u8mf8_tumu(__VA_ARGS__)

◆ vluxseg5ei32_v_f16m1

#define vluxseg5ei32_v_f16m1 ( ... ) __riscv_vluxseg5ei32_v_f16m1(__VA_ARGS__)

◆ vluxseg5ei32_v_f16m1_m

#define vluxseg5ei32_v_f16m1_m ( ... ) __riscv_vluxseg5ei32_v_f16m1_tumu(__VA_ARGS__)

◆ vluxseg5ei32_v_f16mf2

#define vluxseg5ei32_v_f16mf2 ( ... ) __riscv_vluxseg5ei32_v_f16mf2(__VA_ARGS__)

◆ vluxseg5ei32_v_f16mf2_m

#define vluxseg5ei32_v_f16mf2_m ( ... ) __riscv_vluxseg5ei32_v_f16mf2_tumu(__VA_ARGS__)

◆ vluxseg5ei32_v_f16mf4

#define vluxseg5ei32_v_f16mf4 ( ... ) __riscv_vluxseg5ei32_v_f16mf4(__VA_ARGS__)

◆ vluxseg5ei32_v_f16mf4_m

#define vluxseg5ei32_v_f16mf4_m ( ... ) __riscv_vluxseg5ei32_v_f16mf4_tumu(__VA_ARGS__)

◆ vluxseg5ei32_v_f32m1

#define vluxseg5ei32_v_f32m1 ( ... ) __riscv_vluxseg5ei32_v_f32m1(__VA_ARGS__)

◆ vluxseg5ei32_v_f32m1_m

#define vluxseg5ei32_v_f32m1_m ( ... ) __riscv_vluxseg5ei32_v_f32m1_tumu(__VA_ARGS__)

◆ vluxseg5ei32_v_f32mf2

#define vluxseg5ei32_v_f32mf2 ( ... ) __riscv_vluxseg5ei32_v_f32mf2(__VA_ARGS__)

◆ vluxseg5ei32_v_f32mf2_m

#define vluxseg5ei32_v_f32mf2_m ( ... ) __riscv_vluxseg5ei32_v_f32mf2_tumu(__VA_ARGS__)

◆ vluxseg5ei32_v_f64m1

#define vluxseg5ei32_v_f64m1 ( ... ) __riscv_vluxseg5ei32_v_f64m1(__VA_ARGS__)

◆ vluxseg5ei32_v_f64m1_m

#define vluxseg5ei32_v_f64m1_m ( ... ) __riscv_vluxseg5ei32_v_f64m1_tumu(__VA_ARGS__)

◆ vluxseg5ei32_v_i16m1

#define vluxseg5ei32_v_i16m1 ( ... ) __riscv_vluxseg5ei32_v_i16m1(__VA_ARGS__)

◆ vluxseg5ei32_v_i16m1_m

#define vluxseg5ei32_v_i16m1_m ( ... ) __riscv_vluxseg5ei32_v_i16m1_tumu(__VA_ARGS__)

◆ vluxseg5ei32_v_i16mf2

#define vluxseg5ei32_v_i16mf2 ( ... ) __riscv_vluxseg5ei32_v_i16mf2(__VA_ARGS__)

◆ vluxseg5ei32_v_i16mf2_m

#define vluxseg5ei32_v_i16mf2_m ( ... ) __riscv_vluxseg5ei32_v_i16mf2_tumu(__VA_ARGS__)

◆ vluxseg5ei32_v_i16mf4

#define vluxseg5ei32_v_i16mf4 ( ... ) __riscv_vluxseg5ei32_v_i16mf4(__VA_ARGS__)

◆ vluxseg5ei32_v_i16mf4_m

#define vluxseg5ei32_v_i16mf4_m ( ... ) __riscv_vluxseg5ei32_v_i16mf4_tumu(__VA_ARGS__)

◆ vluxseg5ei32_v_i32m1

#define vluxseg5ei32_v_i32m1 ( ... ) __riscv_vluxseg5ei32_v_i32m1(__VA_ARGS__)

◆ vluxseg5ei32_v_i32m1_m

#define vluxseg5ei32_v_i32m1_m ( ... ) __riscv_vluxseg5ei32_v_i32m1_tumu(__VA_ARGS__)

◆ vluxseg5ei32_v_i32mf2

#define vluxseg5ei32_v_i32mf2 ( ... ) __riscv_vluxseg5ei32_v_i32mf2(__VA_ARGS__)

◆ vluxseg5ei32_v_i32mf2_m

#define vluxseg5ei32_v_i32mf2_m ( ... ) __riscv_vluxseg5ei32_v_i32mf2_tumu(__VA_ARGS__)

◆ vluxseg5ei32_v_i64m1

#define vluxseg5ei32_v_i64m1 ( ... ) __riscv_vluxseg5ei32_v_i64m1(__VA_ARGS__)

◆ vluxseg5ei32_v_i64m1_m

#define vluxseg5ei32_v_i64m1_m ( ... ) __riscv_vluxseg5ei32_v_i64m1_tumu(__VA_ARGS__)

◆ vluxseg5ei32_v_i8m1

#define vluxseg5ei32_v_i8m1 ( ... ) __riscv_vluxseg5ei32_v_i8m1(__VA_ARGS__)

◆ vluxseg5ei32_v_i8m1_m

#define vluxseg5ei32_v_i8m1_m ( ... ) __riscv_vluxseg5ei32_v_i8m1_tumu(__VA_ARGS__)

◆ vluxseg5ei32_v_i8mf2

#define vluxseg5ei32_v_i8mf2 ( ... ) __riscv_vluxseg5ei32_v_i8mf2(__VA_ARGS__)

◆ vluxseg5ei32_v_i8mf2_m

#define vluxseg5ei32_v_i8mf2_m ( ... ) __riscv_vluxseg5ei32_v_i8mf2_tumu(__VA_ARGS__)

◆ vluxseg5ei32_v_i8mf4

#define vluxseg5ei32_v_i8mf4 ( ... ) __riscv_vluxseg5ei32_v_i8mf4(__VA_ARGS__)

◆ vluxseg5ei32_v_i8mf4_m

#define vluxseg5ei32_v_i8mf4_m ( ... ) __riscv_vluxseg5ei32_v_i8mf4_tumu(__VA_ARGS__)

◆ vluxseg5ei32_v_i8mf8

#define vluxseg5ei32_v_i8mf8 ( ... ) __riscv_vluxseg5ei32_v_i8mf8(__VA_ARGS__)

◆ vluxseg5ei32_v_i8mf8_m

#define vluxseg5ei32_v_i8mf8_m ( ... ) __riscv_vluxseg5ei32_v_i8mf8_tumu(__VA_ARGS__)

◆ vluxseg5ei32_v_u16m1

#define vluxseg5ei32_v_u16m1 ( ... ) __riscv_vluxseg5ei32_v_u16m1(__VA_ARGS__)

◆ vluxseg5ei32_v_u16m1_m

#define vluxseg5ei32_v_u16m1_m ( ... ) __riscv_vluxseg5ei32_v_u16m1_tumu(__VA_ARGS__)

◆ vluxseg5ei32_v_u16mf2

#define vluxseg5ei32_v_u16mf2 ( ... ) __riscv_vluxseg5ei32_v_u16mf2(__VA_ARGS__)

◆ vluxseg5ei32_v_u16mf2_m

#define vluxseg5ei32_v_u16mf2_m ( ... ) __riscv_vluxseg5ei32_v_u16mf2_tumu(__VA_ARGS__)

◆ vluxseg5ei32_v_u16mf4

#define vluxseg5ei32_v_u16mf4 ( ... ) __riscv_vluxseg5ei32_v_u16mf4(__VA_ARGS__)

◆ vluxseg5ei32_v_u16mf4_m

#define vluxseg5ei32_v_u16mf4_m ( ... ) __riscv_vluxseg5ei32_v_u16mf4_tumu(__VA_ARGS__)

◆ vluxseg5ei32_v_u32m1

#define vluxseg5ei32_v_u32m1 ( ... ) __riscv_vluxseg5ei32_v_u32m1(__VA_ARGS__)

◆ vluxseg5ei32_v_u32m1_m

#define vluxseg5ei32_v_u32m1_m ( ... ) __riscv_vluxseg5ei32_v_u32m1_tumu(__VA_ARGS__)

◆ vluxseg5ei32_v_u32mf2

#define vluxseg5ei32_v_u32mf2 ( ... ) __riscv_vluxseg5ei32_v_u32mf2(__VA_ARGS__)

◆ vluxseg5ei32_v_u32mf2_m

#define vluxseg5ei32_v_u32mf2_m ( ... ) __riscv_vluxseg5ei32_v_u32mf2_tumu(__VA_ARGS__)

◆ vluxseg5ei32_v_u64m1

#define vluxseg5ei32_v_u64m1 ( ... ) __riscv_vluxseg5ei32_v_u64m1(__VA_ARGS__)

◆ vluxseg5ei32_v_u64m1_m

#define vluxseg5ei32_v_u64m1_m ( ... ) __riscv_vluxseg5ei32_v_u64m1_tumu(__VA_ARGS__)

◆ vluxseg5ei32_v_u8m1

#define vluxseg5ei32_v_u8m1 ( ... ) __riscv_vluxseg5ei32_v_u8m1(__VA_ARGS__)

◆ vluxseg5ei32_v_u8m1_m

#define vluxseg5ei32_v_u8m1_m ( ... ) __riscv_vluxseg5ei32_v_u8m1_tumu(__VA_ARGS__)

◆ vluxseg5ei32_v_u8mf2

#define vluxseg5ei32_v_u8mf2 ( ... ) __riscv_vluxseg5ei32_v_u8mf2(__VA_ARGS__)

◆ vluxseg5ei32_v_u8mf2_m

#define vluxseg5ei32_v_u8mf2_m ( ... ) __riscv_vluxseg5ei32_v_u8mf2_tumu(__VA_ARGS__)

◆ vluxseg5ei32_v_u8mf4

#define vluxseg5ei32_v_u8mf4 ( ... ) __riscv_vluxseg5ei32_v_u8mf4(__VA_ARGS__)

◆ vluxseg5ei32_v_u8mf4_m

#define vluxseg5ei32_v_u8mf4_m ( ... ) __riscv_vluxseg5ei32_v_u8mf4_tumu(__VA_ARGS__)

◆ vluxseg5ei32_v_u8mf8

#define vluxseg5ei32_v_u8mf8 ( ... ) __riscv_vluxseg5ei32_v_u8mf8(__VA_ARGS__)

◆ vluxseg5ei32_v_u8mf8_m

#define vluxseg5ei32_v_u8mf8_m ( ... ) __riscv_vluxseg5ei32_v_u8mf8_tumu(__VA_ARGS__)

◆ vluxseg5ei64_v_f16m1

#define vluxseg5ei64_v_f16m1 ( ... ) __riscv_vluxseg5ei64_v_f16m1(__VA_ARGS__)

◆ vluxseg5ei64_v_f16m1_m

#define vluxseg5ei64_v_f16m1_m ( ... ) __riscv_vluxseg5ei64_v_f16m1_tumu(__VA_ARGS__)

◆ vluxseg5ei64_v_f16mf2

#define vluxseg5ei64_v_f16mf2 ( ... ) __riscv_vluxseg5ei64_v_f16mf2(__VA_ARGS__)

◆ vluxseg5ei64_v_f16mf2_m

#define vluxseg5ei64_v_f16mf2_m ( ... ) __riscv_vluxseg5ei64_v_f16mf2_tumu(__VA_ARGS__)

◆ vluxseg5ei64_v_f16mf4

#define vluxseg5ei64_v_f16mf4 ( ... ) __riscv_vluxseg5ei64_v_f16mf4(__VA_ARGS__)

◆ vluxseg5ei64_v_f16mf4_m

#define vluxseg5ei64_v_f16mf4_m ( ... ) __riscv_vluxseg5ei64_v_f16mf4_tumu(__VA_ARGS__)

◆ vluxseg5ei64_v_f32m1

#define vluxseg5ei64_v_f32m1 ( ... ) __riscv_vluxseg5ei64_v_f32m1(__VA_ARGS__)

◆ vluxseg5ei64_v_f32m1_m

#define vluxseg5ei64_v_f32m1_m ( ... ) __riscv_vluxseg5ei64_v_f32m1_tumu(__VA_ARGS__)

◆ vluxseg5ei64_v_f32mf2

#define vluxseg5ei64_v_f32mf2 ( ... ) __riscv_vluxseg5ei64_v_f32mf2(__VA_ARGS__)

◆ vluxseg5ei64_v_f32mf2_m

#define vluxseg5ei64_v_f32mf2_m ( ... ) __riscv_vluxseg5ei64_v_f32mf2_tumu(__VA_ARGS__)

◆ vluxseg5ei64_v_f64m1

#define vluxseg5ei64_v_f64m1 ( ... ) __riscv_vluxseg5ei64_v_f64m1(__VA_ARGS__)

◆ vluxseg5ei64_v_f64m1_m

#define vluxseg5ei64_v_f64m1_m ( ... ) __riscv_vluxseg5ei64_v_f64m1_tumu(__VA_ARGS__)

◆ vluxseg5ei64_v_i16m1

#define vluxseg5ei64_v_i16m1 ( ... ) __riscv_vluxseg5ei64_v_i16m1(__VA_ARGS__)

◆ vluxseg5ei64_v_i16m1_m

#define vluxseg5ei64_v_i16m1_m ( ... ) __riscv_vluxseg5ei64_v_i16m1_tumu(__VA_ARGS__)

◆ vluxseg5ei64_v_i16mf2

#define vluxseg5ei64_v_i16mf2 ( ... ) __riscv_vluxseg5ei64_v_i16mf2(__VA_ARGS__)

◆ vluxseg5ei64_v_i16mf2_m

#define vluxseg5ei64_v_i16mf2_m ( ... ) __riscv_vluxseg5ei64_v_i16mf2_tumu(__VA_ARGS__)

◆ vluxseg5ei64_v_i16mf4

#define vluxseg5ei64_v_i16mf4 ( ... ) __riscv_vluxseg5ei64_v_i16mf4(__VA_ARGS__)

◆ vluxseg5ei64_v_i16mf4_m

#define vluxseg5ei64_v_i16mf4_m ( ... ) __riscv_vluxseg5ei64_v_i16mf4_tumu(__VA_ARGS__)

◆ vluxseg5ei64_v_i32m1

#define vluxseg5ei64_v_i32m1 ( ... ) __riscv_vluxseg5ei64_v_i32m1(__VA_ARGS__)

◆ vluxseg5ei64_v_i32m1_m

#define vluxseg5ei64_v_i32m1_m ( ... ) __riscv_vluxseg5ei64_v_i32m1_tumu(__VA_ARGS__)

◆ vluxseg5ei64_v_i32mf2

#define vluxseg5ei64_v_i32mf2 ( ... ) __riscv_vluxseg5ei64_v_i32mf2(__VA_ARGS__)

◆ vluxseg5ei64_v_i32mf2_m

#define vluxseg5ei64_v_i32mf2_m ( ... ) __riscv_vluxseg5ei64_v_i32mf2_tumu(__VA_ARGS__)

◆ vluxseg5ei64_v_i64m1

#define vluxseg5ei64_v_i64m1 ( ... ) __riscv_vluxseg5ei64_v_i64m1(__VA_ARGS__)

◆ vluxseg5ei64_v_i64m1_m

#define vluxseg5ei64_v_i64m1_m ( ... ) __riscv_vluxseg5ei64_v_i64m1_tumu(__VA_ARGS__)

◆ vluxseg5ei64_v_i8m1

#define vluxseg5ei64_v_i8m1 ( ... ) __riscv_vluxseg5ei64_v_i8m1(__VA_ARGS__)

◆ vluxseg5ei64_v_i8m1_m

#define vluxseg5ei64_v_i8m1_m ( ... ) __riscv_vluxseg5ei64_v_i8m1_tumu(__VA_ARGS__)

◆ vluxseg5ei64_v_i8mf2

#define vluxseg5ei64_v_i8mf2 ( ... ) __riscv_vluxseg5ei64_v_i8mf2(__VA_ARGS__)

◆ vluxseg5ei64_v_i8mf2_m

#define vluxseg5ei64_v_i8mf2_m ( ... ) __riscv_vluxseg5ei64_v_i8mf2_tumu(__VA_ARGS__)

◆ vluxseg5ei64_v_i8mf4

#define vluxseg5ei64_v_i8mf4 ( ... ) __riscv_vluxseg5ei64_v_i8mf4(__VA_ARGS__)

◆ vluxseg5ei64_v_i8mf4_m

#define vluxseg5ei64_v_i8mf4_m ( ... ) __riscv_vluxseg5ei64_v_i8mf4_tumu(__VA_ARGS__)

◆ vluxseg5ei64_v_i8mf8

#define vluxseg5ei64_v_i8mf8 ( ... ) __riscv_vluxseg5ei64_v_i8mf8(__VA_ARGS__)

◆ vluxseg5ei64_v_i8mf8_m

#define vluxseg5ei64_v_i8mf8_m ( ... ) __riscv_vluxseg5ei64_v_i8mf8_tumu(__VA_ARGS__)

◆ vluxseg5ei64_v_u16m1

#define vluxseg5ei64_v_u16m1 ( ... ) __riscv_vluxseg5ei64_v_u16m1(__VA_ARGS__)

◆ vluxseg5ei64_v_u16m1_m

#define vluxseg5ei64_v_u16m1_m ( ... ) __riscv_vluxseg5ei64_v_u16m1_tumu(__VA_ARGS__)

◆ vluxseg5ei64_v_u16mf2

#define vluxseg5ei64_v_u16mf2 ( ... ) __riscv_vluxseg5ei64_v_u16mf2(__VA_ARGS__)

◆ vluxseg5ei64_v_u16mf2_m

#define vluxseg5ei64_v_u16mf2_m ( ... ) __riscv_vluxseg5ei64_v_u16mf2_tumu(__VA_ARGS__)

◆ vluxseg5ei64_v_u16mf4

#define vluxseg5ei64_v_u16mf4 ( ... ) __riscv_vluxseg5ei64_v_u16mf4(__VA_ARGS__)

◆ vluxseg5ei64_v_u16mf4_m

#define vluxseg5ei64_v_u16mf4_m ( ... ) __riscv_vluxseg5ei64_v_u16mf4_tumu(__VA_ARGS__)

◆ vluxseg5ei64_v_u32m1

#define vluxseg5ei64_v_u32m1 ( ... ) __riscv_vluxseg5ei64_v_u32m1(__VA_ARGS__)

◆ vluxseg5ei64_v_u32m1_m

#define vluxseg5ei64_v_u32m1_m ( ... ) __riscv_vluxseg5ei64_v_u32m1_tumu(__VA_ARGS__)

◆ vluxseg5ei64_v_u32mf2

#define vluxseg5ei64_v_u32mf2 ( ... ) __riscv_vluxseg5ei64_v_u32mf2(__VA_ARGS__)

◆ vluxseg5ei64_v_u32mf2_m

#define vluxseg5ei64_v_u32mf2_m ( ... ) __riscv_vluxseg5ei64_v_u32mf2_tumu(__VA_ARGS__)

◆ vluxseg5ei64_v_u64m1

#define vluxseg5ei64_v_u64m1 ( ... ) __riscv_vluxseg5ei64_v_u64m1(__VA_ARGS__)

◆ vluxseg5ei64_v_u64m1_m

#define vluxseg5ei64_v_u64m1_m ( ... ) __riscv_vluxseg5ei64_v_u64m1_tumu(__VA_ARGS__)

◆ vluxseg5ei64_v_u8m1

#define vluxseg5ei64_v_u8m1 ( ... ) __riscv_vluxseg5ei64_v_u8m1(__VA_ARGS__)

◆ vluxseg5ei64_v_u8m1_m

#define vluxseg5ei64_v_u8m1_m ( ... ) __riscv_vluxseg5ei64_v_u8m1_tumu(__VA_ARGS__)

◆ vluxseg5ei64_v_u8mf2

#define vluxseg5ei64_v_u8mf2 ( ... ) __riscv_vluxseg5ei64_v_u8mf2(__VA_ARGS__)

◆ vluxseg5ei64_v_u8mf2_m

#define vluxseg5ei64_v_u8mf2_m ( ... ) __riscv_vluxseg5ei64_v_u8mf2_tumu(__VA_ARGS__)

◆ vluxseg5ei64_v_u8mf4

#define vluxseg5ei64_v_u8mf4 ( ... ) __riscv_vluxseg5ei64_v_u8mf4(__VA_ARGS__)

◆ vluxseg5ei64_v_u8mf4_m

#define vluxseg5ei64_v_u8mf4_m ( ... ) __riscv_vluxseg5ei64_v_u8mf4_tumu(__VA_ARGS__)

◆ vluxseg5ei64_v_u8mf8

#define vluxseg5ei64_v_u8mf8 ( ... ) __riscv_vluxseg5ei64_v_u8mf8(__VA_ARGS__)

◆ vluxseg5ei64_v_u8mf8_m

#define vluxseg5ei64_v_u8mf8_m ( ... ) __riscv_vluxseg5ei64_v_u8mf8_tumu(__VA_ARGS__)

◆ vluxseg5ei8_v_f16m1

#define vluxseg5ei8_v_f16m1 ( ... ) __riscv_vluxseg5ei8_v_f16m1(__VA_ARGS__)

◆ vluxseg5ei8_v_f16m1_m

#define vluxseg5ei8_v_f16m1_m ( ... ) __riscv_vluxseg5ei8_v_f16m1_tumu(__VA_ARGS__)

◆ vluxseg5ei8_v_f16mf2

#define vluxseg5ei8_v_f16mf2 ( ... ) __riscv_vluxseg5ei8_v_f16mf2(__VA_ARGS__)

◆ vluxseg5ei8_v_f16mf2_m

#define vluxseg5ei8_v_f16mf2_m ( ... ) __riscv_vluxseg5ei8_v_f16mf2_tumu(__VA_ARGS__)

◆ vluxseg5ei8_v_f16mf4

#define vluxseg5ei8_v_f16mf4 ( ... ) __riscv_vluxseg5ei8_v_f16mf4(__VA_ARGS__)

◆ vluxseg5ei8_v_f16mf4_m

#define vluxseg5ei8_v_f16mf4_m ( ... ) __riscv_vluxseg5ei8_v_f16mf4_tumu(__VA_ARGS__)

◆ vluxseg5ei8_v_f32m1

#define vluxseg5ei8_v_f32m1 ( ... ) __riscv_vluxseg5ei8_v_f32m1(__VA_ARGS__)

◆ vluxseg5ei8_v_f32m1_m

#define vluxseg5ei8_v_f32m1_m ( ... ) __riscv_vluxseg5ei8_v_f32m1_tumu(__VA_ARGS__)

◆ vluxseg5ei8_v_f32mf2

#define vluxseg5ei8_v_f32mf2 ( ... ) __riscv_vluxseg5ei8_v_f32mf2(__VA_ARGS__)

◆ vluxseg5ei8_v_f32mf2_m

#define vluxseg5ei8_v_f32mf2_m ( ... ) __riscv_vluxseg5ei8_v_f32mf2_tumu(__VA_ARGS__)

◆ vluxseg5ei8_v_f64m1

#define vluxseg5ei8_v_f64m1 ( ... ) __riscv_vluxseg5ei8_v_f64m1(__VA_ARGS__)

◆ vluxseg5ei8_v_f64m1_m

#define vluxseg5ei8_v_f64m1_m ( ... ) __riscv_vluxseg5ei8_v_f64m1_tumu(__VA_ARGS__)

◆ vluxseg5ei8_v_i16m1

#define vluxseg5ei8_v_i16m1 ( ... ) __riscv_vluxseg5ei8_v_i16m1(__VA_ARGS__)

◆ vluxseg5ei8_v_i16m1_m

#define vluxseg5ei8_v_i16m1_m ( ... ) __riscv_vluxseg5ei8_v_i16m1_tumu(__VA_ARGS__)

◆ vluxseg5ei8_v_i16mf2

#define vluxseg5ei8_v_i16mf2 ( ... ) __riscv_vluxseg5ei8_v_i16mf2(__VA_ARGS__)

◆ vluxseg5ei8_v_i16mf2_m

#define vluxseg5ei8_v_i16mf2_m ( ... ) __riscv_vluxseg5ei8_v_i16mf2_tumu(__VA_ARGS__)

◆ vluxseg5ei8_v_i16mf4

#define vluxseg5ei8_v_i16mf4 ( ... ) __riscv_vluxseg5ei8_v_i16mf4(__VA_ARGS__)

◆ vluxseg5ei8_v_i16mf4_m

#define vluxseg5ei8_v_i16mf4_m ( ... ) __riscv_vluxseg5ei8_v_i16mf4_tumu(__VA_ARGS__)

◆ vluxseg5ei8_v_i32m1

#define vluxseg5ei8_v_i32m1 ( ... ) __riscv_vluxseg5ei8_v_i32m1(__VA_ARGS__)

◆ vluxseg5ei8_v_i32m1_m

#define vluxseg5ei8_v_i32m1_m ( ... ) __riscv_vluxseg5ei8_v_i32m1_tumu(__VA_ARGS__)

◆ vluxseg5ei8_v_i32mf2

#define vluxseg5ei8_v_i32mf2 ( ... ) __riscv_vluxseg5ei8_v_i32mf2(__VA_ARGS__)

◆ vluxseg5ei8_v_i32mf2_m

#define vluxseg5ei8_v_i32mf2_m ( ... ) __riscv_vluxseg5ei8_v_i32mf2_tumu(__VA_ARGS__)

◆ vluxseg5ei8_v_i64m1

#define vluxseg5ei8_v_i64m1 ( ... ) __riscv_vluxseg5ei8_v_i64m1(__VA_ARGS__)

◆ vluxseg5ei8_v_i64m1_m

#define vluxseg5ei8_v_i64m1_m ( ... ) __riscv_vluxseg5ei8_v_i64m1_tumu(__VA_ARGS__)

◆ vluxseg5ei8_v_i8m1

#define vluxseg5ei8_v_i8m1 ( ... ) __riscv_vluxseg5ei8_v_i8m1(__VA_ARGS__)

◆ vluxseg5ei8_v_i8m1_m

#define vluxseg5ei8_v_i8m1_m ( ... ) __riscv_vluxseg5ei8_v_i8m1_tumu(__VA_ARGS__)

◆ vluxseg5ei8_v_i8mf2

#define vluxseg5ei8_v_i8mf2 ( ... ) __riscv_vluxseg5ei8_v_i8mf2(__VA_ARGS__)

◆ vluxseg5ei8_v_i8mf2_m

#define vluxseg5ei8_v_i8mf2_m ( ... ) __riscv_vluxseg5ei8_v_i8mf2_tumu(__VA_ARGS__)

◆ vluxseg5ei8_v_i8mf4

#define vluxseg5ei8_v_i8mf4 ( ... ) __riscv_vluxseg5ei8_v_i8mf4(__VA_ARGS__)

◆ vluxseg5ei8_v_i8mf4_m

#define vluxseg5ei8_v_i8mf4_m ( ... ) __riscv_vluxseg5ei8_v_i8mf4_tumu(__VA_ARGS__)

◆ vluxseg5ei8_v_i8mf8

#define vluxseg5ei8_v_i8mf8 ( ... ) __riscv_vluxseg5ei8_v_i8mf8(__VA_ARGS__)

◆ vluxseg5ei8_v_i8mf8_m

#define vluxseg5ei8_v_i8mf8_m ( ... ) __riscv_vluxseg5ei8_v_i8mf8_tumu(__VA_ARGS__)

◆ vluxseg5ei8_v_u16m1

#define vluxseg5ei8_v_u16m1 ( ... ) __riscv_vluxseg5ei8_v_u16m1(__VA_ARGS__)

◆ vluxseg5ei8_v_u16m1_m

#define vluxseg5ei8_v_u16m1_m ( ... ) __riscv_vluxseg5ei8_v_u16m1_tumu(__VA_ARGS__)

◆ vluxseg5ei8_v_u16mf2

#define vluxseg5ei8_v_u16mf2 ( ... ) __riscv_vluxseg5ei8_v_u16mf2(__VA_ARGS__)

◆ vluxseg5ei8_v_u16mf2_m

#define vluxseg5ei8_v_u16mf2_m ( ... ) __riscv_vluxseg5ei8_v_u16mf2_tumu(__VA_ARGS__)

◆ vluxseg5ei8_v_u16mf4

#define vluxseg5ei8_v_u16mf4 ( ... ) __riscv_vluxseg5ei8_v_u16mf4(__VA_ARGS__)

◆ vluxseg5ei8_v_u16mf4_m

#define vluxseg5ei8_v_u16mf4_m ( ... ) __riscv_vluxseg5ei8_v_u16mf4_tumu(__VA_ARGS__)

◆ vluxseg5ei8_v_u32m1

#define vluxseg5ei8_v_u32m1 ( ... ) __riscv_vluxseg5ei8_v_u32m1(__VA_ARGS__)

◆ vluxseg5ei8_v_u32m1_m

#define vluxseg5ei8_v_u32m1_m ( ... ) __riscv_vluxseg5ei8_v_u32m1_tumu(__VA_ARGS__)

◆ vluxseg5ei8_v_u32mf2

#define vluxseg5ei8_v_u32mf2 ( ... ) __riscv_vluxseg5ei8_v_u32mf2(__VA_ARGS__)

◆ vluxseg5ei8_v_u32mf2_m

#define vluxseg5ei8_v_u32mf2_m ( ... ) __riscv_vluxseg5ei8_v_u32mf2_tumu(__VA_ARGS__)

◆ vluxseg5ei8_v_u64m1

#define vluxseg5ei8_v_u64m1 ( ... ) __riscv_vluxseg5ei8_v_u64m1(__VA_ARGS__)

◆ vluxseg5ei8_v_u64m1_m

#define vluxseg5ei8_v_u64m1_m ( ... ) __riscv_vluxseg5ei8_v_u64m1_tumu(__VA_ARGS__)

◆ vluxseg5ei8_v_u8m1

#define vluxseg5ei8_v_u8m1 ( ... ) __riscv_vluxseg5ei8_v_u8m1(__VA_ARGS__)

◆ vluxseg5ei8_v_u8m1_m

#define vluxseg5ei8_v_u8m1_m ( ... ) __riscv_vluxseg5ei8_v_u8m1_tumu(__VA_ARGS__)

◆ vluxseg5ei8_v_u8mf2

#define vluxseg5ei8_v_u8mf2 ( ... ) __riscv_vluxseg5ei8_v_u8mf2(__VA_ARGS__)

◆ vluxseg5ei8_v_u8mf2_m

#define vluxseg5ei8_v_u8mf2_m ( ... ) __riscv_vluxseg5ei8_v_u8mf2_tumu(__VA_ARGS__)

◆ vluxseg5ei8_v_u8mf4

#define vluxseg5ei8_v_u8mf4 ( ... ) __riscv_vluxseg5ei8_v_u8mf4(__VA_ARGS__)

◆ vluxseg5ei8_v_u8mf4_m

#define vluxseg5ei8_v_u8mf4_m ( ... ) __riscv_vluxseg5ei8_v_u8mf4_tumu(__VA_ARGS__)

◆ vluxseg5ei8_v_u8mf8

#define vluxseg5ei8_v_u8mf8 ( ... ) __riscv_vluxseg5ei8_v_u8mf8(__VA_ARGS__)

◆ vluxseg5ei8_v_u8mf8_m

#define vluxseg5ei8_v_u8mf8_m ( ... ) __riscv_vluxseg5ei8_v_u8mf8_tumu(__VA_ARGS__)

◆ vluxseg6ei16_v_f16m1

#define vluxseg6ei16_v_f16m1 ( ... ) __riscv_vluxseg6ei16_v_f16m1(__VA_ARGS__)

◆ vluxseg6ei16_v_f16m1_m

#define vluxseg6ei16_v_f16m1_m ( ... ) __riscv_vluxseg6ei16_v_f16m1_tumu(__VA_ARGS__)

◆ vluxseg6ei16_v_f16mf2

#define vluxseg6ei16_v_f16mf2 ( ... ) __riscv_vluxseg6ei16_v_f16mf2(__VA_ARGS__)

◆ vluxseg6ei16_v_f16mf2_m

#define vluxseg6ei16_v_f16mf2_m ( ... ) __riscv_vluxseg6ei16_v_f16mf2_tumu(__VA_ARGS__)

◆ vluxseg6ei16_v_f16mf4

#define vluxseg6ei16_v_f16mf4 ( ... ) __riscv_vluxseg6ei16_v_f16mf4(__VA_ARGS__)

◆ vluxseg6ei16_v_f16mf4_m

#define vluxseg6ei16_v_f16mf4_m ( ... ) __riscv_vluxseg6ei16_v_f16mf4_tumu(__VA_ARGS__)

◆ vluxseg6ei16_v_f32m1

#define vluxseg6ei16_v_f32m1 ( ... ) __riscv_vluxseg6ei16_v_f32m1(__VA_ARGS__)

◆ vluxseg6ei16_v_f32m1_m

#define vluxseg6ei16_v_f32m1_m ( ... ) __riscv_vluxseg6ei16_v_f32m1_tumu(__VA_ARGS__)

◆ vluxseg6ei16_v_f32mf2

#define vluxseg6ei16_v_f32mf2 ( ... ) __riscv_vluxseg6ei16_v_f32mf2(__VA_ARGS__)

◆ vluxseg6ei16_v_f32mf2_m

#define vluxseg6ei16_v_f32mf2_m ( ... ) __riscv_vluxseg6ei16_v_f32mf2_tumu(__VA_ARGS__)

◆ vluxseg6ei16_v_f64m1

#define vluxseg6ei16_v_f64m1 ( ... ) __riscv_vluxseg6ei16_v_f64m1(__VA_ARGS__)

◆ vluxseg6ei16_v_f64m1_m

#define vluxseg6ei16_v_f64m1_m ( ... ) __riscv_vluxseg6ei16_v_f64m1_tumu(__VA_ARGS__)

◆ vluxseg6ei16_v_i16m1

#define vluxseg6ei16_v_i16m1 ( ... ) __riscv_vluxseg6ei16_v_i16m1(__VA_ARGS__)

◆ vluxseg6ei16_v_i16m1_m

#define vluxseg6ei16_v_i16m1_m ( ... ) __riscv_vluxseg6ei16_v_i16m1_tumu(__VA_ARGS__)

◆ vluxseg6ei16_v_i16mf2

#define vluxseg6ei16_v_i16mf2 ( ... ) __riscv_vluxseg6ei16_v_i16mf2(__VA_ARGS__)

◆ vluxseg6ei16_v_i16mf2_m

#define vluxseg6ei16_v_i16mf2_m ( ... ) __riscv_vluxseg6ei16_v_i16mf2_tumu(__VA_ARGS__)

◆ vluxseg6ei16_v_i16mf4

#define vluxseg6ei16_v_i16mf4 ( ... ) __riscv_vluxseg6ei16_v_i16mf4(__VA_ARGS__)

◆ vluxseg6ei16_v_i16mf4_m

#define vluxseg6ei16_v_i16mf4_m ( ... ) __riscv_vluxseg6ei16_v_i16mf4_tumu(__VA_ARGS__)

◆ vluxseg6ei16_v_i32m1

#define vluxseg6ei16_v_i32m1 ( ... ) __riscv_vluxseg6ei16_v_i32m1(__VA_ARGS__)

◆ vluxseg6ei16_v_i32m1_m

#define vluxseg6ei16_v_i32m1_m ( ... ) __riscv_vluxseg6ei16_v_i32m1_tumu(__VA_ARGS__)

◆ vluxseg6ei16_v_i32mf2

#define vluxseg6ei16_v_i32mf2 ( ... ) __riscv_vluxseg6ei16_v_i32mf2(__VA_ARGS__)

◆ vluxseg6ei16_v_i32mf2_m

#define vluxseg6ei16_v_i32mf2_m ( ... ) __riscv_vluxseg6ei16_v_i32mf2_tumu(__VA_ARGS__)

◆ vluxseg6ei16_v_i64m1

#define vluxseg6ei16_v_i64m1 ( ... ) __riscv_vluxseg6ei16_v_i64m1(__VA_ARGS__)

◆ vluxseg6ei16_v_i64m1_m

#define vluxseg6ei16_v_i64m1_m ( ... ) __riscv_vluxseg6ei16_v_i64m1_tumu(__VA_ARGS__)

◆ vluxseg6ei16_v_i8m1

#define vluxseg6ei16_v_i8m1 ( ... ) __riscv_vluxseg6ei16_v_i8m1(__VA_ARGS__)

◆ vluxseg6ei16_v_i8m1_m

#define vluxseg6ei16_v_i8m1_m ( ... ) __riscv_vluxseg6ei16_v_i8m1_tumu(__VA_ARGS__)

◆ vluxseg6ei16_v_i8mf2

#define vluxseg6ei16_v_i8mf2 ( ... ) __riscv_vluxseg6ei16_v_i8mf2(__VA_ARGS__)

◆ vluxseg6ei16_v_i8mf2_m

#define vluxseg6ei16_v_i8mf2_m ( ... ) __riscv_vluxseg6ei16_v_i8mf2_tumu(__VA_ARGS__)

◆ vluxseg6ei16_v_i8mf4

#define vluxseg6ei16_v_i8mf4 ( ... ) __riscv_vluxseg6ei16_v_i8mf4(__VA_ARGS__)

◆ vluxseg6ei16_v_i8mf4_m

#define vluxseg6ei16_v_i8mf4_m ( ... ) __riscv_vluxseg6ei16_v_i8mf4_tumu(__VA_ARGS__)

◆ vluxseg6ei16_v_i8mf8

#define vluxseg6ei16_v_i8mf8 ( ... ) __riscv_vluxseg6ei16_v_i8mf8(__VA_ARGS__)

◆ vluxseg6ei16_v_i8mf8_m

#define vluxseg6ei16_v_i8mf8_m ( ... ) __riscv_vluxseg6ei16_v_i8mf8_tumu(__VA_ARGS__)

◆ vluxseg6ei16_v_u16m1

#define vluxseg6ei16_v_u16m1 ( ... ) __riscv_vluxseg6ei16_v_u16m1(__VA_ARGS__)

◆ vluxseg6ei16_v_u16m1_m

#define vluxseg6ei16_v_u16m1_m ( ... ) __riscv_vluxseg6ei16_v_u16m1_tumu(__VA_ARGS__)

◆ vluxseg6ei16_v_u16mf2

#define vluxseg6ei16_v_u16mf2 ( ... ) __riscv_vluxseg6ei16_v_u16mf2(__VA_ARGS__)

◆ vluxseg6ei16_v_u16mf2_m

#define vluxseg6ei16_v_u16mf2_m ( ... ) __riscv_vluxseg6ei16_v_u16mf2_tumu(__VA_ARGS__)

◆ vluxseg6ei16_v_u16mf4

#define vluxseg6ei16_v_u16mf4 ( ... ) __riscv_vluxseg6ei16_v_u16mf4(__VA_ARGS__)

◆ vluxseg6ei16_v_u16mf4_m

#define vluxseg6ei16_v_u16mf4_m ( ... ) __riscv_vluxseg6ei16_v_u16mf4_tumu(__VA_ARGS__)

◆ vluxseg6ei16_v_u32m1

#define vluxseg6ei16_v_u32m1 ( ... ) __riscv_vluxseg6ei16_v_u32m1(__VA_ARGS__)

◆ vluxseg6ei16_v_u32m1_m

#define vluxseg6ei16_v_u32m1_m ( ... ) __riscv_vluxseg6ei16_v_u32m1_tumu(__VA_ARGS__)

◆ vluxseg6ei16_v_u32mf2

#define vluxseg6ei16_v_u32mf2 ( ... ) __riscv_vluxseg6ei16_v_u32mf2(__VA_ARGS__)

◆ vluxseg6ei16_v_u32mf2_m

#define vluxseg6ei16_v_u32mf2_m ( ... ) __riscv_vluxseg6ei16_v_u32mf2_tumu(__VA_ARGS__)

◆ vluxseg6ei16_v_u64m1

#define vluxseg6ei16_v_u64m1 ( ... ) __riscv_vluxseg6ei16_v_u64m1(__VA_ARGS__)

◆ vluxseg6ei16_v_u64m1_m

#define vluxseg6ei16_v_u64m1_m ( ... ) __riscv_vluxseg6ei16_v_u64m1_tumu(__VA_ARGS__)

◆ vluxseg6ei16_v_u8m1

#define vluxseg6ei16_v_u8m1 ( ... ) __riscv_vluxseg6ei16_v_u8m1(__VA_ARGS__)

◆ vluxseg6ei16_v_u8m1_m

#define vluxseg6ei16_v_u8m1_m ( ... ) __riscv_vluxseg6ei16_v_u8m1_tumu(__VA_ARGS__)

◆ vluxseg6ei16_v_u8mf2

#define vluxseg6ei16_v_u8mf2 ( ... ) __riscv_vluxseg6ei16_v_u8mf2(__VA_ARGS__)

◆ vluxseg6ei16_v_u8mf2_m

#define vluxseg6ei16_v_u8mf2_m ( ... ) __riscv_vluxseg6ei16_v_u8mf2_tumu(__VA_ARGS__)

◆ vluxseg6ei16_v_u8mf4

#define vluxseg6ei16_v_u8mf4 ( ... ) __riscv_vluxseg6ei16_v_u8mf4(__VA_ARGS__)

◆ vluxseg6ei16_v_u8mf4_m

#define vluxseg6ei16_v_u8mf4_m ( ... ) __riscv_vluxseg6ei16_v_u8mf4_tumu(__VA_ARGS__)

◆ vluxseg6ei16_v_u8mf8

#define vluxseg6ei16_v_u8mf8 ( ... ) __riscv_vluxseg6ei16_v_u8mf8(__VA_ARGS__)

◆ vluxseg6ei16_v_u8mf8_m

#define vluxseg6ei16_v_u8mf8_m ( ... ) __riscv_vluxseg6ei16_v_u8mf8_tumu(__VA_ARGS__)

◆ vluxseg6ei32_v_f16m1

#define vluxseg6ei32_v_f16m1 ( ... ) __riscv_vluxseg6ei32_v_f16m1(__VA_ARGS__)

◆ vluxseg6ei32_v_f16m1_m

#define vluxseg6ei32_v_f16m1_m ( ... ) __riscv_vluxseg6ei32_v_f16m1_tumu(__VA_ARGS__)

◆ vluxseg6ei32_v_f16mf2

#define vluxseg6ei32_v_f16mf2 ( ... ) __riscv_vluxseg6ei32_v_f16mf2(__VA_ARGS__)

◆ vluxseg6ei32_v_f16mf2_m

#define vluxseg6ei32_v_f16mf2_m ( ... ) __riscv_vluxseg6ei32_v_f16mf2_tumu(__VA_ARGS__)

◆ vluxseg6ei32_v_f16mf4

#define vluxseg6ei32_v_f16mf4 ( ... ) __riscv_vluxseg6ei32_v_f16mf4(__VA_ARGS__)

◆ vluxseg6ei32_v_f16mf4_m

#define vluxseg6ei32_v_f16mf4_m ( ... ) __riscv_vluxseg6ei32_v_f16mf4_tumu(__VA_ARGS__)

◆ vluxseg6ei32_v_f32m1

#define vluxseg6ei32_v_f32m1 ( ... ) __riscv_vluxseg6ei32_v_f32m1(__VA_ARGS__)

◆ vluxseg6ei32_v_f32m1_m

#define vluxseg6ei32_v_f32m1_m ( ... ) __riscv_vluxseg6ei32_v_f32m1_tumu(__VA_ARGS__)

◆ vluxseg6ei32_v_f32mf2

#define vluxseg6ei32_v_f32mf2 ( ... ) __riscv_vluxseg6ei32_v_f32mf2(__VA_ARGS__)

◆ vluxseg6ei32_v_f32mf2_m

#define vluxseg6ei32_v_f32mf2_m ( ... ) __riscv_vluxseg6ei32_v_f32mf2_tumu(__VA_ARGS__)

◆ vluxseg6ei32_v_f64m1

#define vluxseg6ei32_v_f64m1 ( ... ) __riscv_vluxseg6ei32_v_f64m1(__VA_ARGS__)

◆ vluxseg6ei32_v_f64m1_m

#define vluxseg6ei32_v_f64m1_m ( ... ) __riscv_vluxseg6ei32_v_f64m1_tumu(__VA_ARGS__)

◆ vluxseg6ei32_v_i16m1

#define vluxseg6ei32_v_i16m1 ( ... ) __riscv_vluxseg6ei32_v_i16m1(__VA_ARGS__)

◆ vluxseg6ei32_v_i16m1_m

#define vluxseg6ei32_v_i16m1_m ( ... ) __riscv_vluxseg6ei32_v_i16m1_tumu(__VA_ARGS__)

◆ vluxseg6ei32_v_i16mf2

#define vluxseg6ei32_v_i16mf2 ( ... ) __riscv_vluxseg6ei32_v_i16mf2(__VA_ARGS__)

◆ vluxseg6ei32_v_i16mf2_m

#define vluxseg6ei32_v_i16mf2_m ( ... ) __riscv_vluxseg6ei32_v_i16mf2_tumu(__VA_ARGS__)

◆ vluxseg6ei32_v_i16mf4

#define vluxseg6ei32_v_i16mf4 ( ... ) __riscv_vluxseg6ei32_v_i16mf4(__VA_ARGS__)

◆ vluxseg6ei32_v_i16mf4_m

#define vluxseg6ei32_v_i16mf4_m ( ... ) __riscv_vluxseg6ei32_v_i16mf4_tumu(__VA_ARGS__)

◆ vluxseg6ei32_v_i32m1

#define vluxseg6ei32_v_i32m1 ( ... ) __riscv_vluxseg6ei32_v_i32m1(__VA_ARGS__)

◆ vluxseg6ei32_v_i32m1_m

#define vluxseg6ei32_v_i32m1_m ( ... ) __riscv_vluxseg6ei32_v_i32m1_tumu(__VA_ARGS__)

◆ vluxseg6ei32_v_i32mf2

#define vluxseg6ei32_v_i32mf2 ( ... ) __riscv_vluxseg6ei32_v_i32mf2(__VA_ARGS__)

◆ vluxseg6ei32_v_i32mf2_m

#define vluxseg6ei32_v_i32mf2_m ( ... ) __riscv_vluxseg6ei32_v_i32mf2_tumu(__VA_ARGS__)

◆ vluxseg6ei32_v_i64m1

#define vluxseg6ei32_v_i64m1 ( ... ) __riscv_vluxseg6ei32_v_i64m1(__VA_ARGS__)

◆ vluxseg6ei32_v_i64m1_m

#define vluxseg6ei32_v_i64m1_m ( ... ) __riscv_vluxseg6ei32_v_i64m1_tumu(__VA_ARGS__)

◆ vluxseg6ei32_v_i8m1

#define vluxseg6ei32_v_i8m1 ( ... ) __riscv_vluxseg6ei32_v_i8m1(__VA_ARGS__)

◆ vluxseg6ei32_v_i8m1_m

#define vluxseg6ei32_v_i8m1_m ( ... ) __riscv_vluxseg6ei32_v_i8m1_tumu(__VA_ARGS__)

◆ vluxseg6ei32_v_i8mf2

#define vluxseg6ei32_v_i8mf2 ( ... ) __riscv_vluxseg6ei32_v_i8mf2(__VA_ARGS__)

◆ vluxseg6ei32_v_i8mf2_m

#define vluxseg6ei32_v_i8mf2_m ( ... ) __riscv_vluxseg6ei32_v_i8mf2_tumu(__VA_ARGS__)

◆ vluxseg6ei32_v_i8mf4

#define vluxseg6ei32_v_i8mf4 ( ... ) __riscv_vluxseg6ei32_v_i8mf4(__VA_ARGS__)

◆ vluxseg6ei32_v_i8mf4_m

#define vluxseg6ei32_v_i8mf4_m ( ... ) __riscv_vluxseg6ei32_v_i8mf4_tumu(__VA_ARGS__)

◆ vluxseg6ei32_v_i8mf8

#define vluxseg6ei32_v_i8mf8 ( ... ) __riscv_vluxseg6ei32_v_i8mf8(__VA_ARGS__)

◆ vluxseg6ei32_v_i8mf8_m

#define vluxseg6ei32_v_i8mf8_m ( ... ) __riscv_vluxseg6ei32_v_i8mf8_tumu(__VA_ARGS__)

◆ vluxseg6ei32_v_u16m1

#define vluxseg6ei32_v_u16m1 ( ... ) __riscv_vluxseg6ei32_v_u16m1(__VA_ARGS__)

◆ vluxseg6ei32_v_u16m1_m

#define vluxseg6ei32_v_u16m1_m ( ... ) __riscv_vluxseg6ei32_v_u16m1_tumu(__VA_ARGS__)

◆ vluxseg6ei32_v_u16mf2

#define vluxseg6ei32_v_u16mf2 ( ... ) __riscv_vluxseg6ei32_v_u16mf2(__VA_ARGS__)

◆ vluxseg6ei32_v_u16mf2_m

#define vluxseg6ei32_v_u16mf2_m ( ... ) __riscv_vluxseg6ei32_v_u16mf2_tumu(__VA_ARGS__)

◆ vluxseg6ei32_v_u16mf4

#define vluxseg6ei32_v_u16mf4 ( ... ) __riscv_vluxseg6ei32_v_u16mf4(__VA_ARGS__)

◆ vluxseg6ei32_v_u16mf4_m

#define vluxseg6ei32_v_u16mf4_m ( ... ) __riscv_vluxseg6ei32_v_u16mf4_tumu(__VA_ARGS__)

◆ vluxseg6ei32_v_u32m1

#define vluxseg6ei32_v_u32m1 ( ... ) __riscv_vluxseg6ei32_v_u32m1(__VA_ARGS__)

◆ vluxseg6ei32_v_u32m1_m

#define vluxseg6ei32_v_u32m1_m ( ... ) __riscv_vluxseg6ei32_v_u32m1_tumu(__VA_ARGS__)

◆ vluxseg6ei32_v_u32mf2

#define vluxseg6ei32_v_u32mf2 ( ... ) __riscv_vluxseg6ei32_v_u32mf2(__VA_ARGS__)

◆ vluxseg6ei32_v_u32mf2_m

#define vluxseg6ei32_v_u32mf2_m ( ... ) __riscv_vluxseg6ei32_v_u32mf2_tumu(__VA_ARGS__)

◆ vluxseg6ei32_v_u64m1

#define vluxseg6ei32_v_u64m1 ( ... ) __riscv_vluxseg6ei32_v_u64m1(__VA_ARGS__)

◆ vluxseg6ei32_v_u64m1_m

#define vluxseg6ei32_v_u64m1_m ( ... ) __riscv_vluxseg6ei32_v_u64m1_tumu(__VA_ARGS__)

◆ vluxseg6ei32_v_u8m1

#define vluxseg6ei32_v_u8m1 ( ... ) __riscv_vluxseg6ei32_v_u8m1(__VA_ARGS__)

◆ vluxseg6ei32_v_u8m1_m

#define vluxseg6ei32_v_u8m1_m ( ... ) __riscv_vluxseg6ei32_v_u8m1_tumu(__VA_ARGS__)

◆ vluxseg6ei32_v_u8mf2

#define vluxseg6ei32_v_u8mf2 ( ... ) __riscv_vluxseg6ei32_v_u8mf2(__VA_ARGS__)

◆ vluxseg6ei32_v_u8mf2_m

#define vluxseg6ei32_v_u8mf2_m ( ... ) __riscv_vluxseg6ei32_v_u8mf2_tumu(__VA_ARGS__)

◆ vluxseg6ei32_v_u8mf4

#define vluxseg6ei32_v_u8mf4 ( ... ) __riscv_vluxseg6ei32_v_u8mf4(__VA_ARGS__)

◆ vluxseg6ei32_v_u8mf4_m

#define vluxseg6ei32_v_u8mf4_m ( ... ) __riscv_vluxseg6ei32_v_u8mf4_tumu(__VA_ARGS__)

◆ vluxseg6ei32_v_u8mf8

#define vluxseg6ei32_v_u8mf8 ( ... ) __riscv_vluxseg6ei32_v_u8mf8(__VA_ARGS__)

◆ vluxseg6ei32_v_u8mf8_m

#define vluxseg6ei32_v_u8mf8_m ( ... ) __riscv_vluxseg6ei32_v_u8mf8_tumu(__VA_ARGS__)

◆ vluxseg6ei64_v_f16m1

#define vluxseg6ei64_v_f16m1 ( ... ) __riscv_vluxseg6ei64_v_f16m1(__VA_ARGS__)

◆ vluxseg6ei64_v_f16m1_m

#define vluxseg6ei64_v_f16m1_m ( ... ) __riscv_vluxseg6ei64_v_f16m1_tumu(__VA_ARGS__)

◆ vluxseg6ei64_v_f16mf2

#define vluxseg6ei64_v_f16mf2 ( ... ) __riscv_vluxseg6ei64_v_f16mf2(__VA_ARGS__)

◆ vluxseg6ei64_v_f16mf2_m

#define vluxseg6ei64_v_f16mf2_m ( ... ) __riscv_vluxseg6ei64_v_f16mf2_tumu(__VA_ARGS__)

◆ vluxseg6ei64_v_f16mf4

#define vluxseg6ei64_v_f16mf4 ( ... ) __riscv_vluxseg6ei64_v_f16mf4(__VA_ARGS__)

◆ vluxseg6ei64_v_f16mf4_m

#define vluxseg6ei64_v_f16mf4_m ( ... ) __riscv_vluxseg6ei64_v_f16mf4_tumu(__VA_ARGS__)

◆ vluxseg6ei64_v_f32m1

#define vluxseg6ei64_v_f32m1 ( ... ) __riscv_vluxseg6ei64_v_f32m1(__VA_ARGS__)

◆ vluxseg6ei64_v_f32m1_m

#define vluxseg6ei64_v_f32m1_m ( ... ) __riscv_vluxseg6ei64_v_f32m1_tumu(__VA_ARGS__)

◆ vluxseg6ei64_v_f32mf2

#define vluxseg6ei64_v_f32mf2 ( ... ) __riscv_vluxseg6ei64_v_f32mf2(__VA_ARGS__)

◆ vluxseg6ei64_v_f32mf2_m

#define vluxseg6ei64_v_f32mf2_m ( ... ) __riscv_vluxseg6ei64_v_f32mf2_tumu(__VA_ARGS__)

◆ vluxseg6ei64_v_f64m1

#define vluxseg6ei64_v_f64m1 ( ... ) __riscv_vluxseg6ei64_v_f64m1(__VA_ARGS__)

◆ vluxseg6ei64_v_f64m1_m

#define vluxseg6ei64_v_f64m1_m ( ... ) __riscv_vluxseg6ei64_v_f64m1_tumu(__VA_ARGS__)

◆ vluxseg6ei64_v_i16m1

#define vluxseg6ei64_v_i16m1 ( ... ) __riscv_vluxseg6ei64_v_i16m1(__VA_ARGS__)

◆ vluxseg6ei64_v_i16m1_m

#define vluxseg6ei64_v_i16m1_m ( ... ) __riscv_vluxseg6ei64_v_i16m1_tumu(__VA_ARGS__)

◆ vluxseg6ei64_v_i16mf2

#define vluxseg6ei64_v_i16mf2 ( ... ) __riscv_vluxseg6ei64_v_i16mf2(__VA_ARGS__)

◆ vluxseg6ei64_v_i16mf2_m

#define vluxseg6ei64_v_i16mf2_m ( ... ) __riscv_vluxseg6ei64_v_i16mf2_tumu(__VA_ARGS__)

◆ vluxseg6ei64_v_i16mf4

#define vluxseg6ei64_v_i16mf4 ( ... ) __riscv_vluxseg6ei64_v_i16mf4(__VA_ARGS__)

◆ vluxseg6ei64_v_i16mf4_m

#define vluxseg6ei64_v_i16mf4_m ( ... ) __riscv_vluxseg6ei64_v_i16mf4_tumu(__VA_ARGS__)

◆ vluxseg6ei64_v_i32m1

#define vluxseg6ei64_v_i32m1 ( ... ) __riscv_vluxseg6ei64_v_i32m1(__VA_ARGS__)

◆ vluxseg6ei64_v_i32m1_m

#define vluxseg6ei64_v_i32m1_m ( ... ) __riscv_vluxseg6ei64_v_i32m1_tumu(__VA_ARGS__)

◆ vluxseg6ei64_v_i32mf2

#define vluxseg6ei64_v_i32mf2 ( ... ) __riscv_vluxseg6ei64_v_i32mf2(__VA_ARGS__)

◆ vluxseg6ei64_v_i32mf2_m

#define vluxseg6ei64_v_i32mf2_m ( ... ) __riscv_vluxseg6ei64_v_i32mf2_tumu(__VA_ARGS__)

◆ vluxseg6ei64_v_i64m1

#define vluxseg6ei64_v_i64m1 ( ... ) __riscv_vluxseg6ei64_v_i64m1(__VA_ARGS__)

◆ vluxseg6ei64_v_i64m1_m

#define vluxseg6ei64_v_i64m1_m ( ... ) __riscv_vluxseg6ei64_v_i64m1_tumu(__VA_ARGS__)

◆ vluxseg6ei64_v_i8m1

#define vluxseg6ei64_v_i8m1 ( ... ) __riscv_vluxseg6ei64_v_i8m1(__VA_ARGS__)

◆ vluxseg6ei64_v_i8m1_m

#define vluxseg6ei64_v_i8m1_m ( ... ) __riscv_vluxseg6ei64_v_i8m1_tumu(__VA_ARGS__)

◆ vluxseg6ei64_v_i8mf2

#define vluxseg6ei64_v_i8mf2 ( ... ) __riscv_vluxseg6ei64_v_i8mf2(__VA_ARGS__)

◆ vluxseg6ei64_v_i8mf2_m

#define vluxseg6ei64_v_i8mf2_m ( ... ) __riscv_vluxseg6ei64_v_i8mf2_tumu(__VA_ARGS__)

◆ vluxseg6ei64_v_i8mf4

#define vluxseg6ei64_v_i8mf4 ( ... ) __riscv_vluxseg6ei64_v_i8mf4(__VA_ARGS__)

◆ vluxseg6ei64_v_i8mf4_m

#define vluxseg6ei64_v_i8mf4_m ( ... ) __riscv_vluxseg6ei64_v_i8mf4_tumu(__VA_ARGS__)

◆ vluxseg6ei64_v_i8mf8

#define vluxseg6ei64_v_i8mf8 ( ... ) __riscv_vluxseg6ei64_v_i8mf8(__VA_ARGS__)

◆ vluxseg6ei64_v_i8mf8_m

#define vluxseg6ei64_v_i8mf8_m ( ... ) __riscv_vluxseg6ei64_v_i8mf8_tumu(__VA_ARGS__)

◆ vluxseg6ei64_v_u16m1

#define vluxseg6ei64_v_u16m1 ( ... ) __riscv_vluxseg6ei64_v_u16m1(__VA_ARGS__)

◆ vluxseg6ei64_v_u16m1_m

#define vluxseg6ei64_v_u16m1_m ( ... ) __riscv_vluxseg6ei64_v_u16m1_tumu(__VA_ARGS__)

◆ vluxseg6ei64_v_u16mf2

#define vluxseg6ei64_v_u16mf2 ( ... ) __riscv_vluxseg6ei64_v_u16mf2(__VA_ARGS__)

◆ vluxseg6ei64_v_u16mf2_m

#define vluxseg6ei64_v_u16mf2_m ( ... ) __riscv_vluxseg6ei64_v_u16mf2_tumu(__VA_ARGS__)

◆ vluxseg6ei64_v_u16mf4

#define vluxseg6ei64_v_u16mf4 ( ... ) __riscv_vluxseg6ei64_v_u16mf4(__VA_ARGS__)

◆ vluxseg6ei64_v_u16mf4_m

#define vluxseg6ei64_v_u16mf4_m ( ... ) __riscv_vluxseg6ei64_v_u16mf4_tumu(__VA_ARGS__)

◆ vluxseg6ei64_v_u32m1

#define vluxseg6ei64_v_u32m1 ( ... ) __riscv_vluxseg6ei64_v_u32m1(__VA_ARGS__)

◆ vluxseg6ei64_v_u32m1_m

#define vluxseg6ei64_v_u32m1_m ( ... ) __riscv_vluxseg6ei64_v_u32m1_tumu(__VA_ARGS__)

◆ vluxseg6ei64_v_u32mf2

#define vluxseg6ei64_v_u32mf2 ( ... ) __riscv_vluxseg6ei64_v_u32mf2(__VA_ARGS__)

◆ vluxseg6ei64_v_u32mf2_m

#define vluxseg6ei64_v_u32mf2_m ( ... ) __riscv_vluxseg6ei64_v_u32mf2_tumu(__VA_ARGS__)

◆ vluxseg6ei64_v_u64m1

#define vluxseg6ei64_v_u64m1 ( ... ) __riscv_vluxseg6ei64_v_u64m1(__VA_ARGS__)

◆ vluxseg6ei64_v_u64m1_m

#define vluxseg6ei64_v_u64m1_m ( ... ) __riscv_vluxseg6ei64_v_u64m1_tumu(__VA_ARGS__)

◆ vluxseg6ei64_v_u8m1

#define vluxseg6ei64_v_u8m1 ( ... ) __riscv_vluxseg6ei64_v_u8m1(__VA_ARGS__)

◆ vluxseg6ei64_v_u8m1_m

#define vluxseg6ei64_v_u8m1_m ( ... ) __riscv_vluxseg6ei64_v_u8m1_tumu(__VA_ARGS__)

◆ vluxseg6ei64_v_u8mf2

#define vluxseg6ei64_v_u8mf2 ( ... ) __riscv_vluxseg6ei64_v_u8mf2(__VA_ARGS__)

◆ vluxseg6ei64_v_u8mf2_m

#define vluxseg6ei64_v_u8mf2_m ( ... ) __riscv_vluxseg6ei64_v_u8mf2_tumu(__VA_ARGS__)

◆ vluxseg6ei64_v_u8mf4

#define vluxseg6ei64_v_u8mf4 ( ... ) __riscv_vluxseg6ei64_v_u8mf4(__VA_ARGS__)

◆ vluxseg6ei64_v_u8mf4_m

#define vluxseg6ei64_v_u8mf4_m ( ... ) __riscv_vluxseg6ei64_v_u8mf4_tumu(__VA_ARGS__)

◆ vluxseg6ei64_v_u8mf8

#define vluxseg6ei64_v_u8mf8 ( ... ) __riscv_vluxseg6ei64_v_u8mf8(__VA_ARGS__)

◆ vluxseg6ei64_v_u8mf8_m

#define vluxseg6ei64_v_u8mf8_m ( ... ) __riscv_vluxseg6ei64_v_u8mf8_tumu(__VA_ARGS__)

◆ vluxseg6ei8_v_f16m1

#define vluxseg6ei8_v_f16m1 ( ... ) __riscv_vluxseg6ei8_v_f16m1(__VA_ARGS__)

◆ vluxseg6ei8_v_f16m1_m

#define vluxseg6ei8_v_f16m1_m ( ... ) __riscv_vluxseg6ei8_v_f16m1_tumu(__VA_ARGS__)

◆ vluxseg6ei8_v_f16mf2

#define vluxseg6ei8_v_f16mf2 ( ... ) __riscv_vluxseg6ei8_v_f16mf2(__VA_ARGS__)

◆ vluxseg6ei8_v_f16mf2_m

#define vluxseg6ei8_v_f16mf2_m ( ... ) __riscv_vluxseg6ei8_v_f16mf2_tumu(__VA_ARGS__)

◆ vluxseg6ei8_v_f16mf4

#define vluxseg6ei8_v_f16mf4 ( ... ) __riscv_vluxseg6ei8_v_f16mf4(__VA_ARGS__)

◆ vluxseg6ei8_v_f16mf4_m

#define vluxseg6ei8_v_f16mf4_m ( ... ) __riscv_vluxseg6ei8_v_f16mf4_tumu(__VA_ARGS__)

◆ vluxseg6ei8_v_f32m1

#define vluxseg6ei8_v_f32m1 ( ... ) __riscv_vluxseg6ei8_v_f32m1(__VA_ARGS__)

◆ vluxseg6ei8_v_f32m1_m

#define vluxseg6ei8_v_f32m1_m ( ... ) __riscv_vluxseg6ei8_v_f32m1_tumu(__VA_ARGS__)

◆ vluxseg6ei8_v_f32mf2

#define vluxseg6ei8_v_f32mf2 ( ... ) __riscv_vluxseg6ei8_v_f32mf2(__VA_ARGS__)

◆ vluxseg6ei8_v_f32mf2_m

#define vluxseg6ei8_v_f32mf2_m ( ... ) __riscv_vluxseg6ei8_v_f32mf2_tumu(__VA_ARGS__)

◆ vluxseg6ei8_v_f64m1

#define vluxseg6ei8_v_f64m1 ( ... ) __riscv_vluxseg6ei8_v_f64m1(__VA_ARGS__)

◆ vluxseg6ei8_v_f64m1_m

#define vluxseg6ei8_v_f64m1_m ( ... ) __riscv_vluxseg6ei8_v_f64m1_tumu(__VA_ARGS__)

◆ vluxseg6ei8_v_i16m1

#define vluxseg6ei8_v_i16m1 ( ... ) __riscv_vluxseg6ei8_v_i16m1(__VA_ARGS__)

◆ vluxseg6ei8_v_i16m1_m

#define vluxseg6ei8_v_i16m1_m ( ... ) __riscv_vluxseg6ei8_v_i16m1_tumu(__VA_ARGS__)

◆ vluxseg6ei8_v_i16mf2

#define vluxseg6ei8_v_i16mf2 ( ... ) __riscv_vluxseg6ei8_v_i16mf2(__VA_ARGS__)

◆ vluxseg6ei8_v_i16mf2_m

#define vluxseg6ei8_v_i16mf2_m ( ... ) __riscv_vluxseg6ei8_v_i16mf2_tumu(__VA_ARGS__)

◆ vluxseg6ei8_v_i16mf4

#define vluxseg6ei8_v_i16mf4 ( ... ) __riscv_vluxseg6ei8_v_i16mf4(__VA_ARGS__)

◆ vluxseg6ei8_v_i16mf4_m

#define vluxseg6ei8_v_i16mf4_m ( ... ) __riscv_vluxseg6ei8_v_i16mf4_tumu(__VA_ARGS__)

◆ vluxseg6ei8_v_i32m1

#define vluxseg6ei8_v_i32m1 ( ... ) __riscv_vluxseg6ei8_v_i32m1(__VA_ARGS__)

◆ vluxseg6ei8_v_i32m1_m

#define vluxseg6ei8_v_i32m1_m ( ... ) __riscv_vluxseg6ei8_v_i32m1_tumu(__VA_ARGS__)

◆ vluxseg6ei8_v_i32mf2

#define vluxseg6ei8_v_i32mf2 ( ... ) __riscv_vluxseg6ei8_v_i32mf2(__VA_ARGS__)

◆ vluxseg6ei8_v_i32mf2_m

#define vluxseg6ei8_v_i32mf2_m ( ... ) __riscv_vluxseg6ei8_v_i32mf2_tumu(__VA_ARGS__)

◆ vluxseg6ei8_v_i64m1

#define vluxseg6ei8_v_i64m1 ( ... ) __riscv_vluxseg6ei8_v_i64m1(__VA_ARGS__)

◆ vluxseg6ei8_v_i64m1_m

#define vluxseg6ei8_v_i64m1_m ( ... ) __riscv_vluxseg6ei8_v_i64m1_tumu(__VA_ARGS__)

◆ vluxseg6ei8_v_i8m1

#define vluxseg6ei8_v_i8m1 ( ... ) __riscv_vluxseg6ei8_v_i8m1(__VA_ARGS__)

◆ vluxseg6ei8_v_i8m1_m

#define vluxseg6ei8_v_i8m1_m ( ... ) __riscv_vluxseg6ei8_v_i8m1_tumu(__VA_ARGS__)

◆ vluxseg6ei8_v_i8mf2

#define vluxseg6ei8_v_i8mf2 ( ... ) __riscv_vluxseg6ei8_v_i8mf2(__VA_ARGS__)

◆ vluxseg6ei8_v_i8mf2_m

#define vluxseg6ei8_v_i8mf2_m ( ... ) __riscv_vluxseg6ei8_v_i8mf2_tumu(__VA_ARGS__)

◆ vluxseg6ei8_v_i8mf4

#define vluxseg6ei8_v_i8mf4 ( ... ) __riscv_vluxseg6ei8_v_i8mf4(__VA_ARGS__)

◆ vluxseg6ei8_v_i8mf4_m

#define vluxseg6ei8_v_i8mf4_m ( ... ) __riscv_vluxseg6ei8_v_i8mf4_tumu(__VA_ARGS__)

◆ vluxseg6ei8_v_i8mf8

#define vluxseg6ei8_v_i8mf8 ( ... ) __riscv_vluxseg6ei8_v_i8mf8(__VA_ARGS__)

◆ vluxseg6ei8_v_i8mf8_m

#define vluxseg6ei8_v_i8mf8_m ( ... ) __riscv_vluxseg6ei8_v_i8mf8_tumu(__VA_ARGS__)

◆ vluxseg6ei8_v_u16m1

#define vluxseg6ei8_v_u16m1 ( ... ) __riscv_vluxseg6ei8_v_u16m1(__VA_ARGS__)

◆ vluxseg6ei8_v_u16m1_m

#define vluxseg6ei8_v_u16m1_m ( ... ) __riscv_vluxseg6ei8_v_u16m1_tumu(__VA_ARGS__)

◆ vluxseg6ei8_v_u16mf2

#define vluxseg6ei8_v_u16mf2 ( ... ) __riscv_vluxseg6ei8_v_u16mf2(__VA_ARGS__)

◆ vluxseg6ei8_v_u16mf2_m

#define vluxseg6ei8_v_u16mf2_m ( ... ) __riscv_vluxseg6ei8_v_u16mf2_tumu(__VA_ARGS__)

◆ vluxseg6ei8_v_u16mf4

#define vluxseg6ei8_v_u16mf4 ( ... ) __riscv_vluxseg6ei8_v_u16mf4(__VA_ARGS__)

◆ vluxseg6ei8_v_u16mf4_m

#define vluxseg6ei8_v_u16mf4_m ( ... ) __riscv_vluxseg6ei8_v_u16mf4_tumu(__VA_ARGS__)

◆ vluxseg6ei8_v_u32m1

#define vluxseg6ei8_v_u32m1 ( ... ) __riscv_vluxseg6ei8_v_u32m1(__VA_ARGS__)

◆ vluxseg6ei8_v_u32m1_m

#define vluxseg6ei8_v_u32m1_m ( ... ) __riscv_vluxseg6ei8_v_u32m1_tumu(__VA_ARGS__)

◆ vluxseg6ei8_v_u32mf2

#define vluxseg6ei8_v_u32mf2 ( ... ) __riscv_vluxseg6ei8_v_u32mf2(__VA_ARGS__)

◆ vluxseg6ei8_v_u32mf2_m

#define vluxseg6ei8_v_u32mf2_m ( ... ) __riscv_vluxseg6ei8_v_u32mf2_tumu(__VA_ARGS__)

◆ vluxseg6ei8_v_u64m1

#define vluxseg6ei8_v_u64m1 ( ... ) __riscv_vluxseg6ei8_v_u64m1(__VA_ARGS__)

◆ vluxseg6ei8_v_u64m1_m

#define vluxseg6ei8_v_u64m1_m ( ... ) __riscv_vluxseg6ei8_v_u64m1_tumu(__VA_ARGS__)

◆ vluxseg6ei8_v_u8m1

#define vluxseg6ei8_v_u8m1 ( ... ) __riscv_vluxseg6ei8_v_u8m1(__VA_ARGS__)

◆ vluxseg6ei8_v_u8m1_m

#define vluxseg6ei8_v_u8m1_m ( ... ) __riscv_vluxseg6ei8_v_u8m1_tumu(__VA_ARGS__)

◆ vluxseg6ei8_v_u8mf2

#define vluxseg6ei8_v_u8mf2 ( ... ) __riscv_vluxseg6ei8_v_u8mf2(__VA_ARGS__)

◆ vluxseg6ei8_v_u8mf2_m

#define vluxseg6ei8_v_u8mf2_m ( ... ) __riscv_vluxseg6ei8_v_u8mf2_tumu(__VA_ARGS__)

◆ vluxseg6ei8_v_u8mf4

#define vluxseg6ei8_v_u8mf4 ( ... ) __riscv_vluxseg6ei8_v_u8mf4(__VA_ARGS__)

◆ vluxseg6ei8_v_u8mf4_m

#define vluxseg6ei8_v_u8mf4_m ( ... ) __riscv_vluxseg6ei8_v_u8mf4_tumu(__VA_ARGS__)

◆ vluxseg6ei8_v_u8mf8

#define vluxseg6ei8_v_u8mf8 ( ... ) __riscv_vluxseg6ei8_v_u8mf8(__VA_ARGS__)

◆ vluxseg6ei8_v_u8mf8_m

#define vluxseg6ei8_v_u8mf8_m ( ... ) __riscv_vluxseg6ei8_v_u8mf8_tumu(__VA_ARGS__)

◆ vluxseg7ei16_v_f16m1

#define vluxseg7ei16_v_f16m1 ( ... ) __riscv_vluxseg7ei16_v_f16m1(__VA_ARGS__)

◆ vluxseg7ei16_v_f16m1_m

#define vluxseg7ei16_v_f16m1_m ( ... ) __riscv_vluxseg7ei16_v_f16m1_tumu(__VA_ARGS__)

◆ vluxseg7ei16_v_f16mf2

#define vluxseg7ei16_v_f16mf2 ( ... ) __riscv_vluxseg7ei16_v_f16mf2(__VA_ARGS__)

◆ vluxseg7ei16_v_f16mf2_m

#define vluxseg7ei16_v_f16mf2_m ( ... ) __riscv_vluxseg7ei16_v_f16mf2_tumu(__VA_ARGS__)

◆ vluxseg7ei16_v_f16mf4

#define vluxseg7ei16_v_f16mf4 ( ... ) __riscv_vluxseg7ei16_v_f16mf4(__VA_ARGS__)

◆ vluxseg7ei16_v_f16mf4_m

#define vluxseg7ei16_v_f16mf4_m ( ... ) __riscv_vluxseg7ei16_v_f16mf4_tumu(__VA_ARGS__)

◆ vluxseg7ei16_v_f32m1

#define vluxseg7ei16_v_f32m1 ( ... ) __riscv_vluxseg7ei16_v_f32m1(__VA_ARGS__)

◆ vluxseg7ei16_v_f32m1_m

#define vluxseg7ei16_v_f32m1_m ( ... ) __riscv_vluxseg7ei16_v_f32m1_tumu(__VA_ARGS__)

◆ vluxseg7ei16_v_f32mf2

#define vluxseg7ei16_v_f32mf2 ( ... ) __riscv_vluxseg7ei16_v_f32mf2(__VA_ARGS__)

◆ vluxseg7ei16_v_f32mf2_m

#define vluxseg7ei16_v_f32mf2_m ( ... ) __riscv_vluxseg7ei16_v_f32mf2_tumu(__VA_ARGS__)

◆ vluxseg7ei16_v_f64m1

#define vluxseg7ei16_v_f64m1 ( ... ) __riscv_vluxseg7ei16_v_f64m1(__VA_ARGS__)

◆ vluxseg7ei16_v_f64m1_m

#define vluxseg7ei16_v_f64m1_m ( ... ) __riscv_vluxseg7ei16_v_f64m1_tumu(__VA_ARGS__)

◆ vluxseg7ei16_v_i16m1

#define vluxseg7ei16_v_i16m1 ( ... ) __riscv_vluxseg7ei16_v_i16m1(__VA_ARGS__)

◆ vluxseg7ei16_v_i16m1_m

#define vluxseg7ei16_v_i16m1_m ( ... ) __riscv_vluxseg7ei16_v_i16m1_tumu(__VA_ARGS__)

◆ vluxseg7ei16_v_i16mf2

#define vluxseg7ei16_v_i16mf2 ( ... ) __riscv_vluxseg7ei16_v_i16mf2(__VA_ARGS__)

◆ vluxseg7ei16_v_i16mf2_m

#define vluxseg7ei16_v_i16mf2_m ( ... ) __riscv_vluxseg7ei16_v_i16mf2_tumu(__VA_ARGS__)

◆ vluxseg7ei16_v_i16mf4

#define vluxseg7ei16_v_i16mf4 ( ... ) __riscv_vluxseg7ei16_v_i16mf4(__VA_ARGS__)

◆ vluxseg7ei16_v_i16mf4_m

#define vluxseg7ei16_v_i16mf4_m ( ... ) __riscv_vluxseg7ei16_v_i16mf4_tumu(__VA_ARGS__)

◆ vluxseg7ei16_v_i32m1

#define vluxseg7ei16_v_i32m1 ( ... ) __riscv_vluxseg7ei16_v_i32m1(__VA_ARGS__)

◆ vluxseg7ei16_v_i32m1_m

#define vluxseg7ei16_v_i32m1_m ( ... ) __riscv_vluxseg7ei16_v_i32m1_tumu(__VA_ARGS__)

◆ vluxseg7ei16_v_i32mf2

#define vluxseg7ei16_v_i32mf2 ( ... ) __riscv_vluxseg7ei16_v_i32mf2(__VA_ARGS__)

◆ vluxseg7ei16_v_i32mf2_m

#define vluxseg7ei16_v_i32mf2_m ( ... ) __riscv_vluxseg7ei16_v_i32mf2_tumu(__VA_ARGS__)

◆ vluxseg7ei16_v_i64m1

#define vluxseg7ei16_v_i64m1 ( ... ) __riscv_vluxseg7ei16_v_i64m1(__VA_ARGS__)

◆ vluxseg7ei16_v_i64m1_m

#define vluxseg7ei16_v_i64m1_m ( ... ) __riscv_vluxseg7ei16_v_i64m1_tumu(__VA_ARGS__)

◆ vluxseg7ei16_v_i8m1

#define vluxseg7ei16_v_i8m1 ( ... ) __riscv_vluxseg7ei16_v_i8m1(__VA_ARGS__)

◆ vluxseg7ei16_v_i8m1_m

#define vluxseg7ei16_v_i8m1_m ( ... ) __riscv_vluxseg7ei16_v_i8m1_tumu(__VA_ARGS__)

◆ vluxseg7ei16_v_i8mf2

#define vluxseg7ei16_v_i8mf2 ( ... ) __riscv_vluxseg7ei16_v_i8mf2(__VA_ARGS__)

◆ vluxseg7ei16_v_i8mf2_m

#define vluxseg7ei16_v_i8mf2_m ( ... ) __riscv_vluxseg7ei16_v_i8mf2_tumu(__VA_ARGS__)

◆ vluxseg7ei16_v_i8mf4

#define vluxseg7ei16_v_i8mf4 ( ... ) __riscv_vluxseg7ei16_v_i8mf4(__VA_ARGS__)

◆ vluxseg7ei16_v_i8mf4_m

#define vluxseg7ei16_v_i8mf4_m ( ... ) __riscv_vluxseg7ei16_v_i8mf4_tumu(__VA_ARGS__)

◆ vluxseg7ei16_v_i8mf8

#define vluxseg7ei16_v_i8mf8 ( ... ) __riscv_vluxseg7ei16_v_i8mf8(__VA_ARGS__)

◆ vluxseg7ei16_v_i8mf8_m

#define vluxseg7ei16_v_i8mf8_m ( ... ) __riscv_vluxseg7ei16_v_i8mf8_tumu(__VA_ARGS__)

◆ vluxseg7ei16_v_u16m1

#define vluxseg7ei16_v_u16m1 ( ... ) __riscv_vluxseg7ei16_v_u16m1(__VA_ARGS__)

◆ vluxseg7ei16_v_u16m1_m

#define vluxseg7ei16_v_u16m1_m ( ... ) __riscv_vluxseg7ei16_v_u16m1_tumu(__VA_ARGS__)

◆ vluxseg7ei16_v_u16mf2

#define vluxseg7ei16_v_u16mf2 ( ... ) __riscv_vluxseg7ei16_v_u16mf2(__VA_ARGS__)

◆ vluxseg7ei16_v_u16mf2_m

#define vluxseg7ei16_v_u16mf2_m ( ... ) __riscv_vluxseg7ei16_v_u16mf2_tumu(__VA_ARGS__)

◆ vluxseg7ei16_v_u16mf4

#define vluxseg7ei16_v_u16mf4 ( ... ) __riscv_vluxseg7ei16_v_u16mf4(__VA_ARGS__)

◆ vluxseg7ei16_v_u16mf4_m

#define vluxseg7ei16_v_u16mf4_m ( ... ) __riscv_vluxseg7ei16_v_u16mf4_tumu(__VA_ARGS__)

◆ vluxseg7ei16_v_u32m1

#define vluxseg7ei16_v_u32m1 ( ... ) __riscv_vluxseg7ei16_v_u32m1(__VA_ARGS__)

◆ vluxseg7ei16_v_u32m1_m

#define vluxseg7ei16_v_u32m1_m ( ... ) __riscv_vluxseg7ei16_v_u32m1_tumu(__VA_ARGS__)

◆ vluxseg7ei16_v_u32mf2

#define vluxseg7ei16_v_u32mf2 ( ... ) __riscv_vluxseg7ei16_v_u32mf2(__VA_ARGS__)

◆ vluxseg7ei16_v_u32mf2_m

#define vluxseg7ei16_v_u32mf2_m ( ... ) __riscv_vluxseg7ei16_v_u32mf2_tumu(__VA_ARGS__)

◆ vluxseg7ei16_v_u64m1

#define vluxseg7ei16_v_u64m1 ( ... ) __riscv_vluxseg7ei16_v_u64m1(__VA_ARGS__)

◆ vluxseg7ei16_v_u64m1_m

#define vluxseg7ei16_v_u64m1_m ( ... ) __riscv_vluxseg7ei16_v_u64m1_tumu(__VA_ARGS__)

◆ vluxseg7ei16_v_u8m1

#define vluxseg7ei16_v_u8m1 ( ... ) __riscv_vluxseg7ei16_v_u8m1(__VA_ARGS__)

◆ vluxseg7ei16_v_u8m1_m

#define vluxseg7ei16_v_u8m1_m ( ... ) __riscv_vluxseg7ei16_v_u8m1_tumu(__VA_ARGS__)

◆ vluxseg7ei16_v_u8mf2

#define vluxseg7ei16_v_u8mf2 ( ... ) __riscv_vluxseg7ei16_v_u8mf2(__VA_ARGS__)

◆ vluxseg7ei16_v_u8mf2_m

#define vluxseg7ei16_v_u8mf2_m ( ... ) __riscv_vluxseg7ei16_v_u8mf2_tumu(__VA_ARGS__)

◆ vluxseg7ei16_v_u8mf4

#define vluxseg7ei16_v_u8mf4 ( ... ) __riscv_vluxseg7ei16_v_u8mf4(__VA_ARGS__)

◆ vluxseg7ei16_v_u8mf4_m

#define vluxseg7ei16_v_u8mf4_m ( ... ) __riscv_vluxseg7ei16_v_u8mf4_tumu(__VA_ARGS__)

◆ vluxseg7ei16_v_u8mf8

#define vluxseg7ei16_v_u8mf8 ( ... ) __riscv_vluxseg7ei16_v_u8mf8(__VA_ARGS__)

◆ vluxseg7ei16_v_u8mf8_m

#define vluxseg7ei16_v_u8mf8_m ( ... ) __riscv_vluxseg7ei16_v_u8mf8_tumu(__VA_ARGS__)

◆ vluxseg7ei32_v_f16m1

#define vluxseg7ei32_v_f16m1 ( ... ) __riscv_vluxseg7ei32_v_f16m1(__VA_ARGS__)

◆ vluxseg7ei32_v_f16m1_m

#define vluxseg7ei32_v_f16m1_m ( ... ) __riscv_vluxseg7ei32_v_f16m1_tumu(__VA_ARGS__)

◆ vluxseg7ei32_v_f16mf2

#define vluxseg7ei32_v_f16mf2 ( ... ) __riscv_vluxseg7ei32_v_f16mf2(__VA_ARGS__)

◆ vluxseg7ei32_v_f16mf2_m

#define vluxseg7ei32_v_f16mf2_m ( ... ) __riscv_vluxseg7ei32_v_f16mf2_tumu(__VA_ARGS__)

◆ vluxseg7ei32_v_f16mf4

#define vluxseg7ei32_v_f16mf4 ( ... ) __riscv_vluxseg7ei32_v_f16mf4(__VA_ARGS__)

◆ vluxseg7ei32_v_f16mf4_m

#define vluxseg7ei32_v_f16mf4_m ( ... ) __riscv_vluxseg7ei32_v_f16mf4_tumu(__VA_ARGS__)

◆ vluxseg7ei32_v_f32m1

#define vluxseg7ei32_v_f32m1 ( ... ) __riscv_vluxseg7ei32_v_f32m1(__VA_ARGS__)

◆ vluxseg7ei32_v_f32m1_m

#define vluxseg7ei32_v_f32m1_m ( ... ) __riscv_vluxseg7ei32_v_f32m1_tumu(__VA_ARGS__)

◆ vluxseg7ei32_v_f32mf2

#define vluxseg7ei32_v_f32mf2 ( ... ) __riscv_vluxseg7ei32_v_f32mf2(__VA_ARGS__)

◆ vluxseg7ei32_v_f32mf2_m

#define vluxseg7ei32_v_f32mf2_m ( ... ) __riscv_vluxseg7ei32_v_f32mf2_tumu(__VA_ARGS__)

◆ vluxseg7ei32_v_f64m1

#define vluxseg7ei32_v_f64m1 ( ... ) __riscv_vluxseg7ei32_v_f64m1(__VA_ARGS__)

◆ vluxseg7ei32_v_f64m1_m

#define vluxseg7ei32_v_f64m1_m ( ... ) __riscv_vluxseg7ei32_v_f64m1_tumu(__VA_ARGS__)

◆ vluxseg7ei32_v_i16m1

#define vluxseg7ei32_v_i16m1 ( ... ) __riscv_vluxseg7ei32_v_i16m1(__VA_ARGS__)

◆ vluxseg7ei32_v_i16m1_m

#define vluxseg7ei32_v_i16m1_m ( ... ) __riscv_vluxseg7ei32_v_i16m1_tumu(__VA_ARGS__)

◆ vluxseg7ei32_v_i16mf2

#define vluxseg7ei32_v_i16mf2 ( ... ) __riscv_vluxseg7ei32_v_i16mf2(__VA_ARGS__)

◆ vluxseg7ei32_v_i16mf2_m

#define vluxseg7ei32_v_i16mf2_m ( ... ) __riscv_vluxseg7ei32_v_i16mf2_tumu(__VA_ARGS__)

◆ vluxseg7ei32_v_i16mf4

#define vluxseg7ei32_v_i16mf4 ( ... ) __riscv_vluxseg7ei32_v_i16mf4(__VA_ARGS__)

◆ vluxseg7ei32_v_i16mf4_m

#define vluxseg7ei32_v_i16mf4_m ( ... ) __riscv_vluxseg7ei32_v_i16mf4_tumu(__VA_ARGS__)

◆ vluxseg7ei32_v_i32m1

#define vluxseg7ei32_v_i32m1 ( ... ) __riscv_vluxseg7ei32_v_i32m1(__VA_ARGS__)

◆ vluxseg7ei32_v_i32m1_m

#define vluxseg7ei32_v_i32m1_m ( ... ) __riscv_vluxseg7ei32_v_i32m1_tumu(__VA_ARGS__)

◆ vluxseg7ei32_v_i32mf2

#define vluxseg7ei32_v_i32mf2 ( ... ) __riscv_vluxseg7ei32_v_i32mf2(__VA_ARGS__)

◆ vluxseg7ei32_v_i32mf2_m

#define vluxseg7ei32_v_i32mf2_m ( ... ) __riscv_vluxseg7ei32_v_i32mf2_tumu(__VA_ARGS__)

◆ vluxseg7ei32_v_i64m1

#define vluxseg7ei32_v_i64m1 ( ... ) __riscv_vluxseg7ei32_v_i64m1(__VA_ARGS__)

◆ vluxseg7ei32_v_i64m1_m

#define vluxseg7ei32_v_i64m1_m ( ... ) __riscv_vluxseg7ei32_v_i64m1_tumu(__VA_ARGS__)

◆ vluxseg7ei32_v_i8m1

#define vluxseg7ei32_v_i8m1 ( ... ) __riscv_vluxseg7ei32_v_i8m1(__VA_ARGS__)

◆ vluxseg7ei32_v_i8m1_m

#define vluxseg7ei32_v_i8m1_m ( ... ) __riscv_vluxseg7ei32_v_i8m1_tumu(__VA_ARGS__)

◆ vluxseg7ei32_v_i8mf2

#define vluxseg7ei32_v_i8mf2 ( ... ) __riscv_vluxseg7ei32_v_i8mf2(__VA_ARGS__)

◆ vluxseg7ei32_v_i8mf2_m

#define vluxseg7ei32_v_i8mf2_m ( ... ) __riscv_vluxseg7ei32_v_i8mf2_tumu(__VA_ARGS__)

◆ vluxseg7ei32_v_i8mf4

#define vluxseg7ei32_v_i8mf4 ( ... ) __riscv_vluxseg7ei32_v_i8mf4(__VA_ARGS__)

◆ vluxseg7ei32_v_i8mf4_m

#define vluxseg7ei32_v_i8mf4_m ( ... ) __riscv_vluxseg7ei32_v_i8mf4_tumu(__VA_ARGS__)

◆ vluxseg7ei32_v_i8mf8

#define vluxseg7ei32_v_i8mf8 ( ... ) __riscv_vluxseg7ei32_v_i8mf8(__VA_ARGS__)

◆ vluxseg7ei32_v_i8mf8_m

#define vluxseg7ei32_v_i8mf8_m ( ... ) __riscv_vluxseg7ei32_v_i8mf8_tumu(__VA_ARGS__)

◆ vluxseg7ei32_v_u16m1

#define vluxseg7ei32_v_u16m1 ( ... ) __riscv_vluxseg7ei32_v_u16m1(__VA_ARGS__)

◆ vluxseg7ei32_v_u16m1_m

#define vluxseg7ei32_v_u16m1_m ( ... ) __riscv_vluxseg7ei32_v_u16m1_tumu(__VA_ARGS__)

◆ vluxseg7ei32_v_u16mf2

#define vluxseg7ei32_v_u16mf2 ( ... ) __riscv_vluxseg7ei32_v_u16mf2(__VA_ARGS__)

◆ vluxseg7ei32_v_u16mf2_m

#define vluxseg7ei32_v_u16mf2_m ( ... ) __riscv_vluxseg7ei32_v_u16mf2_tumu(__VA_ARGS__)

◆ vluxseg7ei32_v_u16mf4

#define vluxseg7ei32_v_u16mf4 ( ... ) __riscv_vluxseg7ei32_v_u16mf4(__VA_ARGS__)

◆ vluxseg7ei32_v_u16mf4_m

#define vluxseg7ei32_v_u16mf4_m ( ... ) __riscv_vluxseg7ei32_v_u16mf4_tumu(__VA_ARGS__)

◆ vluxseg7ei32_v_u32m1

#define vluxseg7ei32_v_u32m1 ( ... ) __riscv_vluxseg7ei32_v_u32m1(__VA_ARGS__)

◆ vluxseg7ei32_v_u32m1_m

#define vluxseg7ei32_v_u32m1_m ( ... ) __riscv_vluxseg7ei32_v_u32m1_tumu(__VA_ARGS__)

◆ vluxseg7ei32_v_u32mf2

#define vluxseg7ei32_v_u32mf2 ( ... ) __riscv_vluxseg7ei32_v_u32mf2(__VA_ARGS__)

◆ vluxseg7ei32_v_u32mf2_m

#define vluxseg7ei32_v_u32mf2_m ( ... ) __riscv_vluxseg7ei32_v_u32mf2_tumu(__VA_ARGS__)

◆ vluxseg7ei32_v_u64m1

#define vluxseg7ei32_v_u64m1 ( ... ) __riscv_vluxseg7ei32_v_u64m1(__VA_ARGS__)

◆ vluxseg7ei32_v_u64m1_m

#define vluxseg7ei32_v_u64m1_m ( ... ) __riscv_vluxseg7ei32_v_u64m1_tumu(__VA_ARGS__)

◆ vluxseg7ei32_v_u8m1

#define vluxseg7ei32_v_u8m1 ( ... ) __riscv_vluxseg7ei32_v_u8m1(__VA_ARGS__)

◆ vluxseg7ei32_v_u8m1_m

#define vluxseg7ei32_v_u8m1_m ( ... ) __riscv_vluxseg7ei32_v_u8m1_tumu(__VA_ARGS__)

◆ vluxseg7ei32_v_u8mf2

#define vluxseg7ei32_v_u8mf2 ( ... ) __riscv_vluxseg7ei32_v_u8mf2(__VA_ARGS__)

◆ vluxseg7ei32_v_u8mf2_m

#define vluxseg7ei32_v_u8mf2_m ( ... ) __riscv_vluxseg7ei32_v_u8mf2_tumu(__VA_ARGS__)

◆ vluxseg7ei32_v_u8mf4

#define vluxseg7ei32_v_u8mf4 ( ... ) __riscv_vluxseg7ei32_v_u8mf4(__VA_ARGS__)

◆ vluxseg7ei32_v_u8mf4_m

#define vluxseg7ei32_v_u8mf4_m ( ... ) __riscv_vluxseg7ei32_v_u8mf4_tumu(__VA_ARGS__)

◆ vluxseg7ei32_v_u8mf8

#define vluxseg7ei32_v_u8mf8 ( ... ) __riscv_vluxseg7ei32_v_u8mf8(__VA_ARGS__)

◆ vluxseg7ei32_v_u8mf8_m

#define vluxseg7ei32_v_u8mf8_m ( ... ) __riscv_vluxseg7ei32_v_u8mf8_tumu(__VA_ARGS__)

◆ vluxseg7ei64_v_f16m1

#define vluxseg7ei64_v_f16m1 ( ... ) __riscv_vluxseg7ei64_v_f16m1(__VA_ARGS__)

◆ vluxseg7ei64_v_f16m1_m

#define vluxseg7ei64_v_f16m1_m ( ... ) __riscv_vluxseg7ei64_v_f16m1_tumu(__VA_ARGS__)

◆ vluxseg7ei64_v_f16mf2

#define vluxseg7ei64_v_f16mf2 ( ... ) __riscv_vluxseg7ei64_v_f16mf2(__VA_ARGS__)

◆ vluxseg7ei64_v_f16mf2_m

#define vluxseg7ei64_v_f16mf2_m ( ... ) __riscv_vluxseg7ei64_v_f16mf2_tumu(__VA_ARGS__)

◆ vluxseg7ei64_v_f16mf4

#define vluxseg7ei64_v_f16mf4 ( ... ) __riscv_vluxseg7ei64_v_f16mf4(__VA_ARGS__)

◆ vluxseg7ei64_v_f16mf4_m

#define vluxseg7ei64_v_f16mf4_m ( ... ) __riscv_vluxseg7ei64_v_f16mf4_tumu(__VA_ARGS__)

◆ vluxseg7ei64_v_f32m1

#define vluxseg7ei64_v_f32m1 ( ... ) __riscv_vluxseg7ei64_v_f32m1(__VA_ARGS__)

◆ vluxseg7ei64_v_f32m1_m

#define vluxseg7ei64_v_f32m1_m ( ... ) __riscv_vluxseg7ei64_v_f32m1_tumu(__VA_ARGS__)

◆ vluxseg7ei64_v_f32mf2

#define vluxseg7ei64_v_f32mf2 ( ... ) __riscv_vluxseg7ei64_v_f32mf2(__VA_ARGS__)

◆ vluxseg7ei64_v_f32mf2_m

#define vluxseg7ei64_v_f32mf2_m ( ... ) __riscv_vluxseg7ei64_v_f32mf2_tumu(__VA_ARGS__)

◆ vluxseg7ei64_v_f64m1

#define vluxseg7ei64_v_f64m1 ( ... ) __riscv_vluxseg7ei64_v_f64m1(__VA_ARGS__)

◆ vluxseg7ei64_v_f64m1_m

#define vluxseg7ei64_v_f64m1_m ( ... ) __riscv_vluxseg7ei64_v_f64m1_tumu(__VA_ARGS__)

◆ vluxseg7ei64_v_i16m1

#define vluxseg7ei64_v_i16m1 ( ... ) __riscv_vluxseg7ei64_v_i16m1(__VA_ARGS__)

◆ vluxseg7ei64_v_i16m1_m

#define vluxseg7ei64_v_i16m1_m ( ... ) __riscv_vluxseg7ei64_v_i16m1_tumu(__VA_ARGS__)

◆ vluxseg7ei64_v_i16mf2

#define vluxseg7ei64_v_i16mf2 ( ... ) __riscv_vluxseg7ei64_v_i16mf2(__VA_ARGS__)

◆ vluxseg7ei64_v_i16mf2_m

#define vluxseg7ei64_v_i16mf2_m ( ... ) __riscv_vluxseg7ei64_v_i16mf2_tumu(__VA_ARGS__)

◆ vluxseg7ei64_v_i16mf4

#define vluxseg7ei64_v_i16mf4 ( ... ) __riscv_vluxseg7ei64_v_i16mf4(__VA_ARGS__)

◆ vluxseg7ei64_v_i16mf4_m

#define vluxseg7ei64_v_i16mf4_m ( ... ) __riscv_vluxseg7ei64_v_i16mf4_tumu(__VA_ARGS__)

◆ vluxseg7ei64_v_i32m1

#define vluxseg7ei64_v_i32m1 ( ... ) __riscv_vluxseg7ei64_v_i32m1(__VA_ARGS__)

◆ vluxseg7ei64_v_i32m1_m

#define vluxseg7ei64_v_i32m1_m ( ... ) __riscv_vluxseg7ei64_v_i32m1_tumu(__VA_ARGS__)

◆ vluxseg7ei64_v_i32mf2

#define vluxseg7ei64_v_i32mf2 ( ... ) __riscv_vluxseg7ei64_v_i32mf2(__VA_ARGS__)

◆ vluxseg7ei64_v_i32mf2_m

#define vluxseg7ei64_v_i32mf2_m ( ... ) __riscv_vluxseg7ei64_v_i32mf2_tumu(__VA_ARGS__)

◆ vluxseg7ei64_v_i64m1

#define vluxseg7ei64_v_i64m1 ( ... ) __riscv_vluxseg7ei64_v_i64m1(__VA_ARGS__)

◆ vluxseg7ei64_v_i64m1_m

#define vluxseg7ei64_v_i64m1_m ( ... ) __riscv_vluxseg7ei64_v_i64m1_tumu(__VA_ARGS__)

◆ vluxseg7ei64_v_i8m1

#define vluxseg7ei64_v_i8m1 ( ... ) __riscv_vluxseg7ei64_v_i8m1(__VA_ARGS__)

◆ vluxseg7ei64_v_i8m1_m

#define vluxseg7ei64_v_i8m1_m ( ... ) __riscv_vluxseg7ei64_v_i8m1_tumu(__VA_ARGS__)

◆ vluxseg7ei64_v_i8mf2

#define vluxseg7ei64_v_i8mf2 ( ... ) __riscv_vluxseg7ei64_v_i8mf2(__VA_ARGS__)

◆ vluxseg7ei64_v_i8mf2_m

#define vluxseg7ei64_v_i8mf2_m ( ... ) __riscv_vluxseg7ei64_v_i8mf2_tumu(__VA_ARGS__)

◆ vluxseg7ei64_v_i8mf4

#define vluxseg7ei64_v_i8mf4 ( ... ) __riscv_vluxseg7ei64_v_i8mf4(__VA_ARGS__)

◆ vluxseg7ei64_v_i8mf4_m

#define vluxseg7ei64_v_i8mf4_m ( ... ) __riscv_vluxseg7ei64_v_i8mf4_tumu(__VA_ARGS__)

◆ vluxseg7ei64_v_i8mf8

#define vluxseg7ei64_v_i8mf8 ( ... ) __riscv_vluxseg7ei64_v_i8mf8(__VA_ARGS__)

◆ vluxseg7ei64_v_i8mf8_m

#define vluxseg7ei64_v_i8mf8_m ( ... ) __riscv_vluxseg7ei64_v_i8mf8_tumu(__VA_ARGS__)

◆ vluxseg7ei64_v_u16m1

#define vluxseg7ei64_v_u16m1 ( ... ) __riscv_vluxseg7ei64_v_u16m1(__VA_ARGS__)

◆ vluxseg7ei64_v_u16m1_m

#define vluxseg7ei64_v_u16m1_m ( ... ) __riscv_vluxseg7ei64_v_u16m1_tumu(__VA_ARGS__)

◆ vluxseg7ei64_v_u16mf2

#define vluxseg7ei64_v_u16mf2 ( ... ) __riscv_vluxseg7ei64_v_u16mf2(__VA_ARGS__)

◆ vluxseg7ei64_v_u16mf2_m

#define vluxseg7ei64_v_u16mf2_m ( ... ) __riscv_vluxseg7ei64_v_u16mf2_tumu(__VA_ARGS__)

◆ vluxseg7ei64_v_u16mf4

#define vluxseg7ei64_v_u16mf4 ( ... ) __riscv_vluxseg7ei64_v_u16mf4(__VA_ARGS__)

◆ vluxseg7ei64_v_u16mf4_m

#define vluxseg7ei64_v_u16mf4_m ( ... ) __riscv_vluxseg7ei64_v_u16mf4_tumu(__VA_ARGS__)

◆ vluxseg7ei64_v_u32m1

#define vluxseg7ei64_v_u32m1 ( ... ) __riscv_vluxseg7ei64_v_u32m1(__VA_ARGS__)

◆ vluxseg7ei64_v_u32m1_m

#define vluxseg7ei64_v_u32m1_m ( ... ) __riscv_vluxseg7ei64_v_u32m1_tumu(__VA_ARGS__)

◆ vluxseg7ei64_v_u32mf2

#define vluxseg7ei64_v_u32mf2 ( ... ) __riscv_vluxseg7ei64_v_u32mf2(__VA_ARGS__)

◆ vluxseg7ei64_v_u32mf2_m

#define vluxseg7ei64_v_u32mf2_m ( ... ) __riscv_vluxseg7ei64_v_u32mf2_tumu(__VA_ARGS__)

◆ vluxseg7ei64_v_u64m1

#define vluxseg7ei64_v_u64m1 ( ... ) __riscv_vluxseg7ei64_v_u64m1(__VA_ARGS__)

◆ vluxseg7ei64_v_u64m1_m

#define vluxseg7ei64_v_u64m1_m ( ... ) __riscv_vluxseg7ei64_v_u64m1_tumu(__VA_ARGS__)

◆ vluxseg7ei64_v_u8m1

#define vluxseg7ei64_v_u8m1 ( ... ) __riscv_vluxseg7ei64_v_u8m1(__VA_ARGS__)

◆ vluxseg7ei64_v_u8m1_m

#define vluxseg7ei64_v_u8m1_m ( ... ) __riscv_vluxseg7ei64_v_u8m1_tumu(__VA_ARGS__)

◆ vluxseg7ei64_v_u8mf2

#define vluxseg7ei64_v_u8mf2 ( ... ) __riscv_vluxseg7ei64_v_u8mf2(__VA_ARGS__)

◆ vluxseg7ei64_v_u8mf2_m

#define vluxseg7ei64_v_u8mf2_m ( ... ) __riscv_vluxseg7ei64_v_u8mf2_tumu(__VA_ARGS__)

◆ vluxseg7ei64_v_u8mf4

#define vluxseg7ei64_v_u8mf4 ( ... ) __riscv_vluxseg7ei64_v_u8mf4(__VA_ARGS__)

◆ vluxseg7ei64_v_u8mf4_m

#define vluxseg7ei64_v_u8mf4_m ( ... ) __riscv_vluxseg7ei64_v_u8mf4_tumu(__VA_ARGS__)

◆ vluxseg7ei64_v_u8mf8

#define vluxseg7ei64_v_u8mf8 ( ... ) __riscv_vluxseg7ei64_v_u8mf8(__VA_ARGS__)

◆ vluxseg7ei64_v_u8mf8_m

#define vluxseg7ei64_v_u8mf8_m ( ... ) __riscv_vluxseg7ei64_v_u8mf8_tumu(__VA_ARGS__)

◆ vluxseg7ei8_v_f16m1

#define vluxseg7ei8_v_f16m1 ( ... ) __riscv_vluxseg7ei8_v_f16m1(__VA_ARGS__)

◆ vluxseg7ei8_v_f16m1_m

#define vluxseg7ei8_v_f16m1_m ( ... ) __riscv_vluxseg7ei8_v_f16m1_tumu(__VA_ARGS__)

◆ vluxseg7ei8_v_f16mf2

#define vluxseg7ei8_v_f16mf2 ( ... ) __riscv_vluxseg7ei8_v_f16mf2(__VA_ARGS__)

◆ vluxseg7ei8_v_f16mf2_m

#define vluxseg7ei8_v_f16mf2_m ( ... ) __riscv_vluxseg7ei8_v_f16mf2_tumu(__VA_ARGS__)

◆ vluxseg7ei8_v_f16mf4

#define vluxseg7ei8_v_f16mf4 ( ... ) __riscv_vluxseg7ei8_v_f16mf4(__VA_ARGS__)

◆ vluxseg7ei8_v_f16mf4_m

#define vluxseg7ei8_v_f16mf4_m ( ... ) __riscv_vluxseg7ei8_v_f16mf4_tumu(__VA_ARGS__)

◆ vluxseg7ei8_v_f32m1

#define vluxseg7ei8_v_f32m1 ( ... ) __riscv_vluxseg7ei8_v_f32m1(__VA_ARGS__)

◆ vluxseg7ei8_v_f32m1_m

#define vluxseg7ei8_v_f32m1_m ( ... ) __riscv_vluxseg7ei8_v_f32m1_tumu(__VA_ARGS__)

◆ vluxseg7ei8_v_f32mf2

#define vluxseg7ei8_v_f32mf2 ( ... ) __riscv_vluxseg7ei8_v_f32mf2(__VA_ARGS__)

◆ vluxseg7ei8_v_f32mf2_m

#define vluxseg7ei8_v_f32mf2_m ( ... ) __riscv_vluxseg7ei8_v_f32mf2_tumu(__VA_ARGS__)

◆ vluxseg7ei8_v_f64m1

#define vluxseg7ei8_v_f64m1 ( ... ) __riscv_vluxseg7ei8_v_f64m1(__VA_ARGS__)

◆ vluxseg7ei8_v_f64m1_m

#define vluxseg7ei8_v_f64m1_m ( ... ) __riscv_vluxseg7ei8_v_f64m1_tumu(__VA_ARGS__)

◆ vluxseg7ei8_v_i16m1

#define vluxseg7ei8_v_i16m1 ( ... ) __riscv_vluxseg7ei8_v_i16m1(__VA_ARGS__)

◆ vluxseg7ei8_v_i16m1_m

#define vluxseg7ei8_v_i16m1_m ( ... ) __riscv_vluxseg7ei8_v_i16m1_tumu(__VA_ARGS__)

◆ vluxseg7ei8_v_i16mf2

#define vluxseg7ei8_v_i16mf2 ( ... ) __riscv_vluxseg7ei8_v_i16mf2(__VA_ARGS__)

◆ vluxseg7ei8_v_i16mf2_m

#define vluxseg7ei8_v_i16mf2_m ( ... ) __riscv_vluxseg7ei8_v_i16mf2_tumu(__VA_ARGS__)

◆ vluxseg7ei8_v_i16mf4

#define vluxseg7ei8_v_i16mf4 ( ... ) __riscv_vluxseg7ei8_v_i16mf4(__VA_ARGS__)

◆ vluxseg7ei8_v_i16mf4_m

#define vluxseg7ei8_v_i16mf4_m ( ... ) __riscv_vluxseg7ei8_v_i16mf4_tumu(__VA_ARGS__)

◆ vluxseg7ei8_v_i32m1

#define vluxseg7ei8_v_i32m1 ( ... ) __riscv_vluxseg7ei8_v_i32m1(__VA_ARGS__)

◆ vluxseg7ei8_v_i32m1_m

#define vluxseg7ei8_v_i32m1_m ( ... ) __riscv_vluxseg7ei8_v_i32m1_tumu(__VA_ARGS__)

◆ vluxseg7ei8_v_i32mf2

#define vluxseg7ei8_v_i32mf2 ( ... ) __riscv_vluxseg7ei8_v_i32mf2(__VA_ARGS__)

◆ vluxseg7ei8_v_i32mf2_m

#define vluxseg7ei8_v_i32mf2_m ( ... ) __riscv_vluxseg7ei8_v_i32mf2_tumu(__VA_ARGS__)

◆ vluxseg7ei8_v_i64m1

#define vluxseg7ei8_v_i64m1 ( ... ) __riscv_vluxseg7ei8_v_i64m1(__VA_ARGS__)

◆ vluxseg7ei8_v_i64m1_m

#define vluxseg7ei8_v_i64m1_m ( ... ) __riscv_vluxseg7ei8_v_i64m1_tumu(__VA_ARGS__)

◆ vluxseg7ei8_v_i8m1

#define vluxseg7ei8_v_i8m1 ( ... ) __riscv_vluxseg7ei8_v_i8m1(__VA_ARGS__)

◆ vluxseg7ei8_v_i8m1_m

#define vluxseg7ei8_v_i8m1_m ( ... ) __riscv_vluxseg7ei8_v_i8m1_tumu(__VA_ARGS__)

◆ vluxseg7ei8_v_i8mf2

#define vluxseg7ei8_v_i8mf2 ( ... ) __riscv_vluxseg7ei8_v_i8mf2(__VA_ARGS__)

◆ vluxseg7ei8_v_i8mf2_m

#define vluxseg7ei8_v_i8mf2_m ( ... ) __riscv_vluxseg7ei8_v_i8mf2_tumu(__VA_ARGS__)

◆ vluxseg7ei8_v_i8mf4

#define vluxseg7ei8_v_i8mf4 ( ... ) __riscv_vluxseg7ei8_v_i8mf4(__VA_ARGS__)

◆ vluxseg7ei8_v_i8mf4_m

#define vluxseg7ei8_v_i8mf4_m ( ... ) __riscv_vluxseg7ei8_v_i8mf4_tumu(__VA_ARGS__)

◆ vluxseg7ei8_v_i8mf8

#define vluxseg7ei8_v_i8mf8 ( ... ) __riscv_vluxseg7ei8_v_i8mf8(__VA_ARGS__)

◆ vluxseg7ei8_v_i8mf8_m

#define vluxseg7ei8_v_i8mf8_m ( ... ) __riscv_vluxseg7ei8_v_i8mf8_tumu(__VA_ARGS__)

◆ vluxseg7ei8_v_u16m1

#define vluxseg7ei8_v_u16m1 ( ... ) __riscv_vluxseg7ei8_v_u16m1(__VA_ARGS__)

◆ vluxseg7ei8_v_u16m1_m

#define vluxseg7ei8_v_u16m1_m ( ... ) __riscv_vluxseg7ei8_v_u16m1_tumu(__VA_ARGS__)

◆ vluxseg7ei8_v_u16mf2

#define vluxseg7ei8_v_u16mf2 ( ... ) __riscv_vluxseg7ei8_v_u16mf2(__VA_ARGS__)

◆ vluxseg7ei8_v_u16mf2_m

#define vluxseg7ei8_v_u16mf2_m ( ... ) __riscv_vluxseg7ei8_v_u16mf2_tumu(__VA_ARGS__)

◆ vluxseg7ei8_v_u16mf4

#define vluxseg7ei8_v_u16mf4 ( ... ) __riscv_vluxseg7ei8_v_u16mf4(__VA_ARGS__)

◆ vluxseg7ei8_v_u16mf4_m

#define vluxseg7ei8_v_u16mf4_m ( ... ) __riscv_vluxseg7ei8_v_u16mf4_tumu(__VA_ARGS__)

◆ vluxseg7ei8_v_u32m1

#define vluxseg7ei8_v_u32m1 ( ... ) __riscv_vluxseg7ei8_v_u32m1(__VA_ARGS__)

◆ vluxseg7ei8_v_u32m1_m

#define vluxseg7ei8_v_u32m1_m ( ... ) __riscv_vluxseg7ei8_v_u32m1_tumu(__VA_ARGS__)

◆ vluxseg7ei8_v_u32mf2

#define vluxseg7ei8_v_u32mf2 ( ... ) __riscv_vluxseg7ei8_v_u32mf2(__VA_ARGS__)

◆ vluxseg7ei8_v_u32mf2_m

#define vluxseg7ei8_v_u32mf2_m ( ... ) __riscv_vluxseg7ei8_v_u32mf2_tumu(__VA_ARGS__)

◆ vluxseg7ei8_v_u64m1

#define vluxseg7ei8_v_u64m1 ( ... ) __riscv_vluxseg7ei8_v_u64m1(__VA_ARGS__)

◆ vluxseg7ei8_v_u64m1_m

#define vluxseg7ei8_v_u64m1_m ( ... ) __riscv_vluxseg7ei8_v_u64m1_tumu(__VA_ARGS__)

◆ vluxseg7ei8_v_u8m1

#define vluxseg7ei8_v_u8m1 ( ... ) __riscv_vluxseg7ei8_v_u8m1(__VA_ARGS__)

◆ vluxseg7ei8_v_u8m1_m

#define vluxseg7ei8_v_u8m1_m ( ... ) __riscv_vluxseg7ei8_v_u8m1_tumu(__VA_ARGS__)

◆ vluxseg7ei8_v_u8mf2

#define vluxseg7ei8_v_u8mf2 ( ... ) __riscv_vluxseg7ei8_v_u8mf2(__VA_ARGS__)

◆ vluxseg7ei8_v_u8mf2_m

#define vluxseg7ei8_v_u8mf2_m ( ... ) __riscv_vluxseg7ei8_v_u8mf2_tumu(__VA_ARGS__)

◆ vluxseg7ei8_v_u8mf4

#define vluxseg7ei8_v_u8mf4 ( ... ) __riscv_vluxseg7ei8_v_u8mf4(__VA_ARGS__)

◆ vluxseg7ei8_v_u8mf4_m

#define vluxseg7ei8_v_u8mf4_m ( ... ) __riscv_vluxseg7ei8_v_u8mf4_tumu(__VA_ARGS__)

◆ vluxseg7ei8_v_u8mf8

#define vluxseg7ei8_v_u8mf8 ( ... ) __riscv_vluxseg7ei8_v_u8mf8(__VA_ARGS__)

◆ vluxseg7ei8_v_u8mf8_m

#define vluxseg7ei8_v_u8mf8_m ( ... ) __riscv_vluxseg7ei8_v_u8mf8_tumu(__VA_ARGS__)

◆ vluxseg8ei16_v_f16m1

#define vluxseg8ei16_v_f16m1 ( ... ) __riscv_vluxseg8ei16_v_f16m1(__VA_ARGS__)

◆ vluxseg8ei16_v_f16m1_m

#define vluxseg8ei16_v_f16m1_m ( ... ) __riscv_vluxseg8ei16_v_f16m1_tumu(__VA_ARGS__)

◆ vluxseg8ei16_v_f16mf2

#define vluxseg8ei16_v_f16mf2 ( ... ) __riscv_vluxseg8ei16_v_f16mf2(__VA_ARGS__)

◆ vluxseg8ei16_v_f16mf2_m

#define vluxseg8ei16_v_f16mf2_m ( ... ) __riscv_vluxseg8ei16_v_f16mf2_tumu(__VA_ARGS__)

◆ vluxseg8ei16_v_f16mf4

#define vluxseg8ei16_v_f16mf4 ( ... ) __riscv_vluxseg8ei16_v_f16mf4(__VA_ARGS__)

◆ vluxseg8ei16_v_f16mf4_m

#define vluxseg8ei16_v_f16mf4_m ( ... ) __riscv_vluxseg8ei16_v_f16mf4_tumu(__VA_ARGS__)

◆ vluxseg8ei16_v_f32m1

#define vluxseg8ei16_v_f32m1 ( ... ) __riscv_vluxseg8ei16_v_f32m1(__VA_ARGS__)

◆ vluxseg8ei16_v_f32m1_m

#define vluxseg8ei16_v_f32m1_m ( ... ) __riscv_vluxseg8ei16_v_f32m1_tumu(__VA_ARGS__)

◆ vluxseg8ei16_v_f32mf2

#define vluxseg8ei16_v_f32mf2 ( ... ) __riscv_vluxseg8ei16_v_f32mf2(__VA_ARGS__)

◆ vluxseg8ei16_v_f32mf2_m

#define vluxseg8ei16_v_f32mf2_m ( ... ) __riscv_vluxseg8ei16_v_f32mf2_tumu(__VA_ARGS__)

◆ vluxseg8ei16_v_f64m1

#define vluxseg8ei16_v_f64m1 ( ... ) __riscv_vluxseg8ei16_v_f64m1(__VA_ARGS__)

◆ vluxseg8ei16_v_f64m1_m

#define vluxseg8ei16_v_f64m1_m ( ... ) __riscv_vluxseg8ei16_v_f64m1_tumu(__VA_ARGS__)

◆ vluxseg8ei16_v_i16m1

#define vluxseg8ei16_v_i16m1 ( ... ) __riscv_vluxseg8ei16_v_i16m1(__VA_ARGS__)

◆ vluxseg8ei16_v_i16m1_m

#define vluxseg8ei16_v_i16m1_m ( ... ) __riscv_vluxseg8ei16_v_i16m1_tumu(__VA_ARGS__)

◆ vluxseg8ei16_v_i16mf2

#define vluxseg8ei16_v_i16mf2 ( ... ) __riscv_vluxseg8ei16_v_i16mf2(__VA_ARGS__)

◆ vluxseg8ei16_v_i16mf2_m

#define vluxseg8ei16_v_i16mf2_m ( ... ) __riscv_vluxseg8ei16_v_i16mf2_tumu(__VA_ARGS__)

◆ vluxseg8ei16_v_i16mf4

#define vluxseg8ei16_v_i16mf4 ( ... ) __riscv_vluxseg8ei16_v_i16mf4(__VA_ARGS__)

◆ vluxseg8ei16_v_i16mf4_m

#define vluxseg8ei16_v_i16mf4_m ( ... ) __riscv_vluxseg8ei16_v_i16mf4_tumu(__VA_ARGS__)

◆ vluxseg8ei16_v_i32m1

#define vluxseg8ei16_v_i32m1 ( ... ) __riscv_vluxseg8ei16_v_i32m1(__VA_ARGS__)

◆ vluxseg8ei16_v_i32m1_m

#define vluxseg8ei16_v_i32m1_m ( ... ) __riscv_vluxseg8ei16_v_i32m1_tumu(__VA_ARGS__)

◆ vluxseg8ei16_v_i32mf2

#define vluxseg8ei16_v_i32mf2 ( ... ) __riscv_vluxseg8ei16_v_i32mf2(__VA_ARGS__)

◆ vluxseg8ei16_v_i32mf2_m

#define vluxseg8ei16_v_i32mf2_m ( ... ) __riscv_vluxseg8ei16_v_i32mf2_tumu(__VA_ARGS__)

◆ vluxseg8ei16_v_i64m1

#define vluxseg8ei16_v_i64m1 ( ... ) __riscv_vluxseg8ei16_v_i64m1(__VA_ARGS__)

◆ vluxseg8ei16_v_i64m1_m

#define vluxseg8ei16_v_i64m1_m ( ... ) __riscv_vluxseg8ei16_v_i64m1_tumu(__VA_ARGS__)

◆ vluxseg8ei16_v_i8m1

#define vluxseg8ei16_v_i8m1 ( ... ) __riscv_vluxseg8ei16_v_i8m1(__VA_ARGS__)

◆ vluxseg8ei16_v_i8m1_m

#define vluxseg8ei16_v_i8m1_m ( ... ) __riscv_vluxseg8ei16_v_i8m1_tumu(__VA_ARGS__)

◆ vluxseg8ei16_v_i8mf2

#define vluxseg8ei16_v_i8mf2 ( ... ) __riscv_vluxseg8ei16_v_i8mf2(__VA_ARGS__)

◆ vluxseg8ei16_v_i8mf2_m

#define vluxseg8ei16_v_i8mf2_m ( ... ) __riscv_vluxseg8ei16_v_i8mf2_tumu(__VA_ARGS__)

◆ vluxseg8ei16_v_i8mf4

#define vluxseg8ei16_v_i8mf4 ( ... ) __riscv_vluxseg8ei16_v_i8mf4(__VA_ARGS__)

◆ vluxseg8ei16_v_i8mf4_m

#define vluxseg8ei16_v_i8mf4_m ( ... ) __riscv_vluxseg8ei16_v_i8mf4_tumu(__VA_ARGS__)

◆ vluxseg8ei16_v_i8mf8

#define vluxseg8ei16_v_i8mf8 ( ... ) __riscv_vluxseg8ei16_v_i8mf8(__VA_ARGS__)

◆ vluxseg8ei16_v_i8mf8_m

#define vluxseg8ei16_v_i8mf8_m ( ... ) __riscv_vluxseg8ei16_v_i8mf8_tumu(__VA_ARGS__)

◆ vluxseg8ei16_v_u16m1

#define vluxseg8ei16_v_u16m1 ( ... ) __riscv_vluxseg8ei16_v_u16m1(__VA_ARGS__)

◆ vluxseg8ei16_v_u16m1_m

#define vluxseg8ei16_v_u16m1_m ( ... ) __riscv_vluxseg8ei16_v_u16m1_tumu(__VA_ARGS__)

◆ vluxseg8ei16_v_u16mf2

#define vluxseg8ei16_v_u16mf2 ( ... ) __riscv_vluxseg8ei16_v_u16mf2(__VA_ARGS__)

◆ vluxseg8ei16_v_u16mf2_m

#define vluxseg8ei16_v_u16mf2_m ( ... ) __riscv_vluxseg8ei16_v_u16mf2_tumu(__VA_ARGS__)

◆ vluxseg8ei16_v_u16mf4

#define vluxseg8ei16_v_u16mf4 ( ... ) __riscv_vluxseg8ei16_v_u16mf4(__VA_ARGS__)

◆ vluxseg8ei16_v_u16mf4_m

#define vluxseg8ei16_v_u16mf4_m ( ... ) __riscv_vluxseg8ei16_v_u16mf4_tumu(__VA_ARGS__)

◆ vluxseg8ei16_v_u32m1

#define vluxseg8ei16_v_u32m1 ( ... ) __riscv_vluxseg8ei16_v_u32m1(__VA_ARGS__)

◆ vluxseg8ei16_v_u32m1_m

#define vluxseg8ei16_v_u32m1_m ( ... ) __riscv_vluxseg8ei16_v_u32m1_tumu(__VA_ARGS__)

◆ vluxseg8ei16_v_u32mf2

#define vluxseg8ei16_v_u32mf2 ( ... ) __riscv_vluxseg8ei16_v_u32mf2(__VA_ARGS__)

◆ vluxseg8ei16_v_u32mf2_m

#define vluxseg8ei16_v_u32mf2_m ( ... ) __riscv_vluxseg8ei16_v_u32mf2_tumu(__VA_ARGS__)

◆ vluxseg8ei16_v_u64m1

#define vluxseg8ei16_v_u64m1 ( ... ) __riscv_vluxseg8ei16_v_u64m1(__VA_ARGS__)

◆ vluxseg8ei16_v_u64m1_m

#define vluxseg8ei16_v_u64m1_m ( ... ) __riscv_vluxseg8ei16_v_u64m1_tumu(__VA_ARGS__)

◆ vluxseg8ei16_v_u8m1

#define vluxseg8ei16_v_u8m1 ( ... ) __riscv_vluxseg8ei16_v_u8m1(__VA_ARGS__)

◆ vluxseg8ei16_v_u8m1_m

#define vluxseg8ei16_v_u8m1_m ( ... ) __riscv_vluxseg8ei16_v_u8m1_tumu(__VA_ARGS__)

◆ vluxseg8ei16_v_u8mf2

#define vluxseg8ei16_v_u8mf2 ( ... ) __riscv_vluxseg8ei16_v_u8mf2(__VA_ARGS__)

◆ vluxseg8ei16_v_u8mf2_m

#define vluxseg8ei16_v_u8mf2_m ( ... ) __riscv_vluxseg8ei16_v_u8mf2_tumu(__VA_ARGS__)

◆ vluxseg8ei16_v_u8mf4

#define vluxseg8ei16_v_u8mf4 ( ... ) __riscv_vluxseg8ei16_v_u8mf4(__VA_ARGS__)

◆ vluxseg8ei16_v_u8mf4_m

#define vluxseg8ei16_v_u8mf4_m ( ... ) __riscv_vluxseg8ei16_v_u8mf4_tumu(__VA_ARGS__)

◆ vluxseg8ei16_v_u8mf8

#define vluxseg8ei16_v_u8mf8 ( ... ) __riscv_vluxseg8ei16_v_u8mf8(__VA_ARGS__)

◆ vluxseg8ei16_v_u8mf8_m

#define vluxseg8ei16_v_u8mf8_m ( ... ) __riscv_vluxseg8ei16_v_u8mf8_tumu(__VA_ARGS__)

◆ vluxseg8ei32_v_f16m1

#define vluxseg8ei32_v_f16m1 ( ... ) __riscv_vluxseg8ei32_v_f16m1(__VA_ARGS__)

◆ vluxseg8ei32_v_f16m1_m

#define vluxseg8ei32_v_f16m1_m ( ... ) __riscv_vluxseg8ei32_v_f16m1_tumu(__VA_ARGS__)

◆ vluxseg8ei32_v_f16mf2

#define vluxseg8ei32_v_f16mf2 ( ... ) __riscv_vluxseg8ei32_v_f16mf2(__VA_ARGS__)

◆ vluxseg8ei32_v_f16mf2_m

#define vluxseg8ei32_v_f16mf2_m ( ... ) __riscv_vluxseg8ei32_v_f16mf2_tumu(__VA_ARGS__)

◆ vluxseg8ei32_v_f16mf4

#define vluxseg8ei32_v_f16mf4 ( ... ) __riscv_vluxseg8ei32_v_f16mf4(__VA_ARGS__)

◆ vluxseg8ei32_v_f16mf4_m

#define vluxseg8ei32_v_f16mf4_m ( ... ) __riscv_vluxseg8ei32_v_f16mf4_tumu(__VA_ARGS__)

◆ vluxseg8ei32_v_f32m1

#define vluxseg8ei32_v_f32m1 ( ... ) __riscv_vluxseg8ei32_v_f32m1(__VA_ARGS__)

◆ vluxseg8ei32_v_f32m1_m

#define vluxseg8ei32_v_f32m1_m ( ... ) __riscv_vluxseg8ei32_v_f32m1_tumu(__VA_ARGS__)

◆ vluxseg8ei32_v_f32mf2

#define vluxseg8ei32_v_f32mf2 ( ... ) __riscv_vluxseg8ei32_v_f32mf2(__VA_ARGS__)

◆ vluxseg8ei32_v_f32mf2_m

#define vluxseg8ei32_v_f32mf2_m ( ... ) __riscv_vluxseg8ei32_v_f32mf2_tumu(__VA_ARGS__)

◆ vluxseg8ei32_v_f64m1

#define vluxseg8ei32_v_f64m1 ( ... ) __riscv_vluxseg8ei32_v_f64m1(__VA_ARGS__)

◆ vluxseg8ei32_v_f64m1_m

#define vluxseg8ei32_v_f64m1_m ( ... ) __riscv_vluxseg8ei32_v_f64m1_tumu(__VA_ARGS__)

◆ vluxseg8ei32_v_i16m1

#define vluxseg8ei32_v_i16m1 ( ... ) __riscv_vluxseg8ei32_v_i16m1(__VA_ARGS__)

◆ vluxseg8ei32_v_i16m1_m

#define vluxseg8ei32_v_i16m1_m ( ... ) __riscv_vluxseg8ei32_v_i16m1_tumu(__VA_ARGS__)

◆ vluxseg8ei32_v_i16mf2

#define vluxseg8ei32_v_i16mf2 ( ... ) __riscv_vluxseg8ei32_v_i16mf2(__VA_ARGS__)

◆ vluxseg8ei32_v_i16mf2_m

#define vluxseg8ei32_v_i16mf2_m ( ... ) __riscv_vluxseg8ei32_v_i16mf2_tumu(__VA_ARGS__)

◆ vluxseg8ei32_v_i16mf4

#define vluxseg8ei32_v_i16mf4 ( ... ) __riscv_vluxseg8ei32_v_i16mf4(__VA_ARGS__)

◆ vluxseg8ei32_v_i16mf4_m

#define vluxseg8ei32_v_i16mf4_m ( ... ) __riscv_vluxseg8ei32_v_i16mf4_tumu(__VA_ARGS__)

◆ vluxseg8ei32_v_i32m1

#define vluxseg8ei32_v_i32m1 ( ... ) __riscv_vluxseg8ei32_v_i32m1(__VA_ARGS__)

◆ vluxseg8ei32_v_i32m1_m

#define vluxseg8ei32_v_i32m1_m ( ... ) __riscv_vluxseg8ei32_v_i32m1_tumu(__VA_ARGS__)

◆ vluxseg8ei32_v_i32mf2

#define vluxseg8ei32_v_i32mf2 ( ... ) __riscv_vluxseg8ei32_v_i32mf2(__VA_ARGS__)

◆ vluxseg8ei32_v_i32mf2_m

#define vluxseg8ei32_v_i32mf2_m ( ... ) __riscv_vluxseg8ei32_v_i32mf2_tumu(__VA_ARGS__)

◆ vluxseg8ei32_v_i64m1

#define vluxseg8ei32_v_i64m1 ( ... ) __riscv_vluxseg8ei32_v_i64m1(__VA_ARGS__)

◆ vluxseg8ei32_v_i64m1_m

#define vluxseg8ei32_v_i64m1_m ( ... ) __riscv_vluxseg8ei32_v_i64m1_tumu(__VA_ARGS__)

◆ vluxseg8ei32_v_i8m1

#define vluxseg8ei32_v_i8m1 ( ... ) __riscv_vluxseg8ei32_v_i8m1(__VA_ARGS__)

◆ vluxseg8ei32_v_i8m1_m

#define vluxseg8ei32_v_i8m1_m ( ... ) __riscv_vluxseg8ei32_v_i8m1_tumu(__VA_ARGS__)

◆ vluxseg8ei32_v_i8mf2

#define vluxseg8ei32_v_i8mf2 ( ... ) __riscv_vluxseg8ei32_v_i8mf2(__VA_ARGS__)

◆ vluxseg8ei32_v_i8mf2_m

#define vluxseg8ei32_v_i8mf2_m ( ... ) __riscv_vluxseg8ei32_v_i8mf2_tumu(__VA_ARGS__)

◆ vluxseg8ei32_v_i8mf4

#define vluxseg8ei32_v_i8mf4 ( ... ) __riscv_vluxseg8ei32_v_i8mf4(__VA_ARGS__)

◆ vluxseg8ei32_v_i8mf4_m

#define vluxseg8ei32_v_i8mf4_m ( ... ) __riscv_vluxseg8ei32_v_i8mf4_tumu(__VA_ARGS__)

◆ vluxseg8ei32_v_i8mf8

#define vluxseg8ei32_v_i8mf8 ( ... ) __riscv_vluxseg8ei32_v_i8mf8(__VA_ARGS__)

◆ vluxseg8ei32_v_i8mf8_m

#define vluxseg8ei32_v_i8mf8_m ( ... ) __riscv_vluxseg8ei32_v_i8mf8_tumu(__VA_ARGS__)

◆ vluxseg8ei32_v_u16m1

#define vluxseg8ei32_v_u16m1 ( ... ) __riscv_vluxseg8ei32_v_u16m1(__VA_ARGS__)

◆ vluxseg8ei32_v_u16m1_m

#define vluxseg8ei32_v_u16m1_m ( ... ) __riscv_vluxseg8ei32_v_u16m1_tumu(__VA_ARGS__)

◆ vluxseg8ei32_v_u16mf2

#define vluxseg8ei32_v_u16mf2 ( ... ) __riscv_vluxseg8ei32_v_u16mf2(__VA_ARGS__)

◆ vluxseg8ei32_v_u16mf2_m

#define vluxseg8ei32_v_u16mf2_m ( ... ) __riscv_vluxseg8ei32_v_u16mf2_tumu(__VA_ARGS__)

◆ vluxseg8ei32_v_u16mf4

#define vluxseg8ei32_v_u16mf4 ( ... ) __riscv_vluxseg8ei32_v_u16mf4(__VA_ARGS__)

◆ vluxseg8ei32_v_u16mf4_m

#define vluxseg8ei32_v_u16mf4_m ( ... ) __riscv_vluxseg8ei32_v_u16mf4_tumu(__VA_ARGS__)

◆ vluxseg8ei32_v_u32m1

#define vluxseg8ei32_v_u32m1 ( ... ) __riscv_vluxseg8ei32_v_u32m1(__VA_ARGS__)

◆ vluxseg8ei32_v_u32m1_m

#define vluxseg8ei32_v_u32m1_m ( ... ) __riscv_vluxseg8ei32_v_u32m1_tumu(__VA_ARGS__)

◆ vluxseg8ei32_v_u32mf2

#define vluxseg8ei32_v_u32mf2 ( ... ) __riscv_vluxseg8ei32_v_u32mf2(__VA_ARGS__)

◆ vluxseg8ei32_v_u32mf2_m

#define vluxseg8ei32_v_u32mf2_m ( ... ) __riscv_vluxseg8ei32_v_u32mf2_tumu(__VA_ARGS__)

◆ vluxseg8ei32_v_u64m1

#define vluxseg8ei32_v_u64m1 ( ... ) __riscv_vluxseg8ei32_v_u64m1(__VA_ARGS__)

◆ vluxseg8ei32_v_u64m1_m

#define vluxseg8ei32_v_u64m1_m ( ... ) __riscv_vluxseg8ei32_v_u64m1_tumu(__VA_ARGS__)

◆ vluxseg8ei32_v_u8m1

#define vluxseg8ei32_v_u8m1 ( ... ) __riscv_vluxseg8ei32_v_u8m1(__VA_ARGS__)

◆ vluxseg8ei32_v_u8m1_m

#define vluxseg8ei32_v_u8m1_m ( ... ) __riscv_vluxseg8ei32_v_u8m1_tumu(__VA_ARGS__)

◆ vluxseg8ei32_v_u8mf2

#define vluxseg8ei32_v_u8mf2 ( ... ) __riscv_vluxseg8ei32_v_u8mf2(__VA_ARGS__)

◆ vluxseg8ei32_v_u8mf2_m

#define vluxseg8ei32_v_u8mf2_m ( ... ) __riscv_vluxseg8ei32_v_u8mf2_tumu(__VA_ARGS__)

◆ vluxseg8ei32_v_u8mf4

#define vluxseg8ei32_v_u8mf4 ( ... ) __riscv_vluxseg8ei32_v_u8mf4(__VA_ARGS__)

◆ vluxseg8ei32_v_u8mf4_m

#define vluxseg8ei32_v_u8mf4_m ( ... ) __riscv_vluxseg8ei32_v_u8mf4_tumu(__VA_ARGS__)

◆ vluxseg8ei32_v_u8mf8

#define vluxseg8ei32_v_u8mf8 ( ... ) __riscv_vluxseg8ei32_v_u8mf8(__VA_ARGS__)

◆ vluxseg8ei32_v_u8mf8_m

#define vluxseg8ei32_v_u8mf8_m ( ... ) __riscv_vluxseg8ei32_v_u8mf8_tumu(__VA_ARGS__)

◆ vluxseg8ei64_v_f16m1

#define vluxseg8ei64_v_f16m1 ( ... ) __riscv_vluxseg8ei64_v_f16m1(__VA_ARGS__)

◆ vluxseg8ei64_v_f16m1_m

#define vluxseg8ei64_v_f16m1_m ( ... ) __riscv_vluxseg8ei64_v_f16m1_tumu(__VA_ARGS__)

◆ vluxseg8ei64_v_f16mf2

#define vluxseg8ei64_v_f16mf2 ( ... ) __riscv_vluxseg8ei64_v_f16mf2(__VA_ARGS__)

◆ vluxseg8ei64_v_f16mf2_m

#define vluxseg8ei64_v_f16mf2_m ( ... ) __riscv_vluxseg8ei64_v_f16mf2_tumu(__VA_ARGS__)

◆ vluxseg8ei64_v_f16mf4

#define vluxseg8ei64_v_f16mf4 ( ... ) __riscv_vluxseg8ei64_v_f16mf4(__VA_ARGS__)

◆ vluxseg8ei64_v_f16mf4_m

#define vluxseg8ei64_v_f16mf4_m ( ... ) __riscv_vluxseg8ei64_v_f16mf4_tumu(__VA_ARGS__)

◆ vluxseg8ei64_v_f32m1

#define vluxseg8ei64_v_f32m1 ( ... ) __riscv_vluxseg8ei64_v_f32m1(__VA_ARGS__)

◆ vluxseg8ei64_v_f32m1_m

#define vluxseg8ei64_v_f32m1_m ( ... ) __riscv_vluxseg8ei64_v_f32m1_tumu(__VA_ARGS__)

◆ vluxseg8ei64_v_f32mf2

#define vluxseg8ei64_v_f32mf2 ( ... ) __riscv_vluxseg8ei64_v_f32mf2(__VA_ARGS__)

◆ vluxseg8ei64_v_f32mf2_m

#define vluxseg8ei64_v_f32mf2_m ( ... ) __riscv_vluxseg8ei64_v_f32mf2_tumu(__VA_ARGS__)

◆ vluxseg8ei64_v_f64m1

#define vluxseg8ei64_v_f64m1 ( ... ) __riscv_vluxseg8ei64_v_f64m1(__VA_ARGS__)

◆ vluxseg8ei64_v_f64m1_m

#define vluxseg8ei64_v_f64m1_m ( ... ) __riscv_vluxseg8ei64_v_f64m1_tumu(__VA_ARGS__)

◆ vluxseg8ei64_v_i16m1

#define vluxseg8ei64_v_i16m1 ( ... ) __riscv_vluxseg8ei64_v_i16m1(__VA_ARGS__)

◆ vluxseg8ei64_v_i16m1_m

#define vluxseg8ei64_v_i16m1_m ( ... ) __riscv_vluxseg8ei64_v_i16m1_tumu(__VA_ARGS__)

◆ vluxseg8ei64_v_i16mf2

#define vluxseg8ei64_v_i16mf2 ( ... ) __riscv_vluxseg8ei64_v_i16mf2(__VA_ARGS__)

◆ vluxseg8ei64_v_i16mf2_m

#define vluxseg8ei64_v_i16mf2_m ( ... ) __riscv_vluxseg8ei64_v_i16mf2_tumu(__VA_ARGS__)

◆ vluxseg8ei64_v_i16mf4

#define vluxseg8ei64_v_i16mf4 ( ... ) __riscv_vluxseg8ei64_v_i16mf4(__VA_ARGS__)

◆ vluxseg8ei64_v_i16mf4_m

#define vluxseg8ei64_v_i16mf4_m ( ... ) __riscv_vluxseg8ei64_v_i16mf4_tumu(__VA_ARGS__)

◆ vluxseg8ei64_v_i32m1

#define vluxseg8ei64_v_i32m1 ( ... ) __riscv_vluxseg8ei64_v_i32m1(__VA_ARGS__)

◆ vluxseg8ei64_v_i32m1_m

#define vluxseg8ei64_v_i32m1_m ( ... ) __riscv_vluxseg8ei64_v_i32m1_tumu(__VA_ARGS__)

◆ vluxseg8ei64_v_i32mf2

#define vluxseg8ei64_v_i32mf2 ( ... ) __riscv_vluxseg8ei64_v_i32mf2(__VA_ARGS__)

◆ vluxseg8ei64_v_i32mf2_m

#define vluxseg8ei64_v_i32mf2_m ( ... ) __riscv_vluxseg8ei64_v_i32mf2_tumu(__VA_ARGS__)

◆ vluxseg8ei64_v_i64m1

#define vluxseg8ei64_v_i64m1 ( ... ) __riscv_vluxseg8ei64_v_i64m1(__VA_ARGS__)

◆ vluxseg8ei64_v_i64m1_m

#define vluxseg8ei64_v_i64m1_m ( ... ) __riscv_vluxseg8ei64_v_i64m1_tumu(__VA_ARGS__)

◆ vluxseg8ei64_v_i8m1

#define vluxseg8ei64_v_i8m1 ( ... ) __riscv_vluxseg8ei64_v_i8m1(__VA_ARGS__)

◆ vluxseg8ei64_v_i8m1_m

#define vluxseg8ei64_v_i8m1_m ( ... ) __riscv_vluxseg8ei64_v_i8m1_tumu(__VA_ARGS__)

◆ vluxseg8ei64_v_i8mf2

#define vluxseg8ei64_v_i8mf2 ( ... ) __riscv_vluxseg8ei64_v_i8mf2(__VA_ARGS__)

◆ vluxseg8ei64_v_i8mf2_m

#define vluxseg8ei64_v_i8mf2_m ( ... ) __riscv_vluxseg8ei64_v_i8mf2_tumu(__VA_ARGS__)

◆ vluxseg8ei64_v_i8mf4

#define vluxseg8ei64_v_i8mf4 ( ... ) __riscv_vluxseg8ei64_v_i8mf4(__VA_ARGS__)

◆ vluxseg8ei64_v_i8mf4_m

#define vluxseg8ei64_v_i8mf4_m ( ... ) __riscv_vluxseg8ei64_v_i8mf4_tumu(__VA_ARGS__)

◆ vluxseg8ei64_v_i8mf8

#define vluxseg8ei64_v_i8mf8 ( ... ) __riscv_vluxseg8ei64_v_i8mf8(__VA_ARGS__)

◆ vluxseg8ei64_v_i8mf8_m

#define vluxseg8ei64_v_i8mf8_m ( ... ) __riscv_vluxseg8ei64_v_i8mf8_tumu(__VA_ARGS__)

◆ vluxseg8ei64_v_u16m1

#define vluxseg8ei64_v_u16m1 ( ... ) __riscv_vluxseg8ei64_v_u16m1(__VA_ARGS__)

◆ vluxseg8ei64_v_u16m1_m

#define vluxseg8ei64_v_u16m1_m ( ... ) __riscv_vluxseg8ei64_v_u16m1_tumu(__VA_ARGS__)

◆ vluxseg8ei64_v_u16mf2

#define vluxseg8ei64_v_u16mf2 ( ... ) __riscv_vluxseg8ei64_v_u16mf2(__VA_ARGS__)

◆ vluxseg8ei64_v_u16mf2_m

#define vluxseg8ei64_v_u16mf2_m ( ... ) __riscv_vluxseg8ei64_v_u16mf2_tumu(__VA_ARGS__)

◆ vluxseg8ei64_v_u16mf4

#define vluxseg8ei64_v_u16mf4 ( ... ) __riscv_vluxseg8ei64_v_u16mf4(__VA_ARGS__)

◆ vluxseg8ei64_v_u16mf4_m

#define vluxseg8ei64_v_u16mf4_m ( ... ) __riscv_vluxseg8ei64_v_u16mf4_tumu(__VA_ARGS__)

◆ vluxseg8ei64_v_u32m1

#define vluxseg8ei64_v_u32m1 ( ... ) __riscv_vluxseg8ei64_v_u32m1(__VA_ARGS__)

◆ vluxseg8ei64_v_u32m1_m

#define vluxseg8ei64_v_u32m1_m ( ... ) __riscv_vluxseg8ei64_v_u32m1_tumu(__VA_ARGS__)

◆ vluxseg8ei64_v_u32mf2

#define vluxseg8ei64_v_u32mf2 ( ... ) __riscv_vluxseg8ei64_v_u32mf2(__VA_ARGS__)

◆ vluxseg8ei64_v_u32mf2_m

#define vluxseg8ei64_v_u32mf2_m ( ... ) __riscv_vluxseg8ei64_v_u32mf2_tumu(__VA_ARGS__)

◆ vluxseg8ei64_v_u64m1

#define vluxseg8ei64_v_u64m1 ( ... ) __riscv_vluxseg8ei64_v_u64m1(__VA_ARGS__)

◆ vluxseg8ei64_v_u64m1_m

#define vluxseg8ei64_v_u64m1_m ( ... ) __riscv_vluxseg8ei64_v_u64m1_tumu(__VA_ARGS__)

◆ vluxseg8ei64_v_u8m1

#define vluxseg8ei64_v_u8m1 ( ... ) __riscv_vluxseg8ei64_v_u8m1(__VA_ARGS__)

◆ vluxseg8ei64_v_u8m1_m

#define vluxseg8ei64_v_u8m1_m ( ... ) __riscv_vluxseg8ei64_v_u8m1_tumu(__VA_ARGS__)

◆ vluxseg8ei64_v_u8mf2

#define vluxseg8ei64_v_u8mf2 ( ... ) __riscv_vluxseg8ei64_v_u8mf2(__VA_ARGS__)

◆ vluxseg8ei64_v_u8mf2_m

#define vluxseg8ei64_v_u8mf2_m ( ... ) __riscv_vluxseg8ei64_v_u8mf2_tumu(__VA_ARGS__)

◆ vluxseg8ei64_v_u8mf4

#define vluxseg8ei64_v_u8mf4 ( ... ) __riscv_vluxseg8ei64_v_u8mf4(__VA_ARGS__)

◆ vluxseg8ei64_v_u8mf4_m

#define vluxseg8ei64_v_u8mf4_m ( ... ) __riscv_vluxseg8ei64_v_u8mf4_tumu(__VA_ARGS__)

◆ vluxseg8ei64_v_u8mf8

#define vluxseg8ei64_v_u8mf8 ( ... ) __riscv_vluxseg8ei64_v_u8mf8(__VA_ARGS__)

◆ vluxseg8ei64_v_u8mf8_m

#define vluxseg8ei64_v_u8mf8_m ( ... ) __riscv_vluxseg8ei64_v_u8mf8_tumu(__VA_ARGS__)

◆ vluxseg8ei8_v_f16m1

#define vluxseg8ei8_v_f16m1 ( ... ) __riscv_vluxseg8ei8_v_f16m1(__VA_ARGS__)

◆ vluxseg8ei8_v_f16m1_m

#define vluxseg8ei8_v_f16m1_m ( ... ) __riscv_vluxseg8ei8_v_f16m1_tumu(__VA_ARGS__)

◆ vluxseg8ei8_v_f16mf2

#define vluxseg8ei8_v_f16mf2 ( ... ) __riscv_vluxseg8ei8_v_f16mf2(__VA_ARGS__)

◆ vluxseg8ei8_v_f16mf2_m

#define vluxseg8ei8_v_f16mf2_m ( ... ) __riscv_vluxseg8ei8_v_f16mf2_tumu(__VA_ARGS__)

◆ vluxseg8ei8_v_f16mf4

#define vluxseg8ei8_v_f16mf4 ( ... ) __riscv_vluxseg8ei8_v_f16mf4(__VA_ARGS__)

◆ vluxseg8ei8_v_f16mf4_m

#define vluxseg8ei8_v_f16mf4_m ( ... ) __riscv_vluxseg8ei8_v_f16mf4_tumu(__VA_ARGS__)

◆ vluxseg8ei8_v_f32m1

#define vluxseg8ei8_v_f32m1 ( ... ) __riscv_vluxseg8ei8_v_f32m1(__VA_ARGS__)

◆ vluxseg8ei8_v_f32m1_m

#define vluxseg8ei8_v_f32m1_m ( ... ) __riscv_vluxseg8ei8_v_f32m1_tumu(__VA_ARGS__)

◆ vluxseg8ei8_v_f32mf2

#define vluxseg8ei8_v_f32mf2 ( ... ) __riscv_vluxseg8ei8_v_f32mf2(__VA_ARGS__)

◆ vluxseg8ei8_v_f32mf2_m

#define vluxseg8ei8_v_f32mf2_m ( ... ) __riscv_vluxseg8ei8_v_f32mf2_tumu(__VA_ARGS__)

◆ vluxseg8ei8_v_f64m1

#define vluxseg8ei8_v_f64m1 ( ... ) __riscv_vluxseg8ei8_v_f64m1(__VA_ARGS__)

◆ vluxseg8ei8_v_f64m1_m

#define vluxseg8ei8_v_f64m1_m ( ... ) __riscv_vluxseg8ei8_v_f64m1_tumu(__VA_ARGS__)

◆ vluxseg8ei8_v_i16m1

#define vluxseg8ei8_v_i16m1 ( ... ) __riscv_vluxseg8ei8_v_i16m1(__VA_ARGS__)

◆ vluxseg8ei8_v_i16m1_m

#define vluxseg8ei8_v_i16m1_m ( ... ) __riscv_vluxseg8ei8_v_i16m1_tumu(__VA_ARGS__)

◆ vluxseg8ei8_v_i16mf2

#define vluxseg8ei8_v_i16mf2 ( ... ) __riscv_vluxseg8ei8_v_i16mf2(__VA_ARGS__)

◆ vluxseg8ei8_v_i16mf2_m

#define vluxseg8ei8_v_i16mf2_m ( ... ) __riscv_vluxseg8ei8_v_i16mf2_tumu(__VA_ARGS__)

◆ vluxseg8ei8_v_i16mf4

#define vluxseg8ei8_v_i16mf4 ( ... ) __riscv_vluxseg8ei8_v_i16mf4(__VA_ARGS__)

◆ vluxseg8ei8_v_i16mf4_m

#define vluxseg8ei8_v_i16mf4_m ( ... ) __riscv_vluxseg8ei8_v_i16mf4_tumu(__VA_ARGS__)

◆ vluxseg8ei8_v_i32m1

#define vluxseg8ei8_v_i32m1 ( ... ) __riscv_vluxseg8ei8_v_i32m1(__VA_ARGS__)

◆ vluxseg8ei8_v_i32m1_m

#define vluxseg8ei8_v_i32m1_m ( ... ) __riscv_vluxseg8ei8_v_i32m1_tumu(__VA_ARGS__)

◆ vluxseg8ei8_v_i32mf2

#define vluxseg8ei8_v_i32mf2 ( ... ) __riscv_vluxseg8ei8_v_i32mf2(__VA_ARGS__)

◆ vluxseg8ei8_v_i32mf2_m

#define vluxseg8ei8_v_i32mf2_m ( ... ) __riscv_vluxseg8ei8_v_i32mf2_tumu(__VA_ARGS__)

◆ vluxseg8ei8_v_i64m1

#define vluxseg8ei8_v_i64m1 ( ... ) __riscv_vluxseg8ei8_v_i64m1(__VA_ARGS__)

◆ vluxseg8ei8_v_i64m1_m

#define vluxseg8ei8_v_i64m1_m ( ... ) __riscv_vluxseg8ei8_v_i64m1_tumu(__VA_ARGS__)

◆ vluxseg8ei8_v_i8m1

#define vluxseg8ei8_v_i8m1 ( ... ) __riscv_vluxseg8ei8_v_i8m1(__VA_ARGS__)

◆ vluxseg8ei8_v_i8m1_m

#define vluxseg8ei8_v_i8m1_m ( ... ) __riscv_vluxseg8ei8_v_i8m1_tumu(__VA_ARGS__)

◆ vluxseg8ei8_v_i8mf2

#define vluxseg8ei8_v_i8mf2 ( ... ) __riscv_vluxseg8ei8_v_i8mf2(__VA_ARGS__)

◆ vluxseg8ei8_v_i8mf2_m

#define vluxseg8ei8_v_i8mf2_m ( ... ) __riscv_vluxseg8ei8_v_i8mf2_tumu(__VA_ARGS__)

◆ vluxseg8ei8_v_i8mf4

#define vluxseg8ei8_v_i8mf4 ( ... ) __riscv_vluxseg8ei8_v_i8mf4(__VA_ARGS__)

◆ vluxseg8ei8_v_i8mf4_m

#define vluxseg8ei8_v_i8mf4_m ( ... ) __riscv_vluxseg8ei8_v_i8mf4_tumu(__VA_ARGS__)

◆ vluxseg8ei8_v_i8mf8

#define vluxseg8ei8_v_i8mf8 ( ... ) __riscv_vluxseg8ei8_v_i8mf8(__VA_ARGS__)

◆ vluxseg8ei8_v_i8mf8_m

#define vluxseg8ei8_v_i8mf8_m ( ... ) __riscv_vluxseg8ei8_v_i8mf8_tumu(__VA_ARGS__)

◆ vluxseg8ei8_v_u16m1

#define vluxseg8ei8_v_u16m1 ( ... ) __riscv_vluxseg8ei8_v_u16m1(__VA_ARGS__)

◆ vluxseg8ei8_v_u16m1_m

#define vluxseg8ei8_v_u16m1_m ( ... ) __riscv_vluxseg8ei8_v_u16m1_tumu(__VA_ARGS__)

◆ vluxseg8ei8_v_u16mf2

#define vluxseg8ei8_v_u16mf2 ( ... ) __riscv_vluxseg8ei8_v_u16mf2(__VA_ARGS__)

◆ vluxseg8ei8_v_u16mf2_m

#define vluxseg8ei8_v_u16mf2_m ( ... ) __riscv_vluxseg8ei8_v_u16mf2_tumu(__VA_ARGS__)

◆ vluxseg8ei8_v_u16mf4

#define vluxseg8ei8_v_u16mf4 ( ... ) __riscv_vluxseg8ei8_v_u16mf4(__VA_ARGS__)

◆ vluxseg8ei8_v_u16mf4_m

#define vluxseg8ei8_v_u16mf4_m ( ... ) __riscv_vluxseg8ei8_v_u16mf4_tumu(__VA_ARGS__)

◆ vluxseg8ei8_v_u32m1

#define vluxseg8ei8_v_u32m1 ( ... ) __riscv_vluxseg8ei8_v_u32m1(__VA_ARGS__)

◆ vluxseg8ei8_v_u32m1_m

#define vluxseg8ei8_v_u32m1_m ( ... ) __riscv_vluxseg8ei8_v_u32m1_tumu(__VA_ARGS__)

◆ vluxseg8ei8_v_u32mf2

#define vluxseg8ei8_v_u32mf2 ( ... ) __riscv_vluxseg8ei8_v_u32mf2(__VA_ARGS__)

◆ vluxseg8ei8_v_u32mf2_m

#define vluxseg8ei8_v_u32mf2_m ( ... ) __riscv_vluxseg8ei8_v_u32mf2_tumu(__VA_ARGS__)

◆ vluxseg8ei8_v_u64m1

#define vluxseg8ei8_v_u64m1 ( ... ) __riscv_vluxseg8ei8_v_u64m1(__VA_ARGS__)

◆ vluxseg8ei8_v_u64m1_m

#define vluxseg8ei8_v_u64m1_m ( ... ) __riscv_vluxseg8ei8_v_u64m1_tumu(__VA_ARGS__)

◆ vluxseg8ei8_v_u8m1

#define vluxseg8ei8_v_u8m1 ( ... ) __riscv_vluxseg8ei8_v_u8m1(__VA_ARGS__)

◆ vluxseg8ei8_v_u8m1_m

#define vluxseg8ei8_v_u8m1_m ( ... ) __riscv_vluxseg8ei8_v_u8m1_tumu(__VA_ARGS__)

◆ vluxseg8ei8_v_u8mf2

#define vluxseg8ei8_v_u8mf2 ( ... ) __riscv_vluxseg8ei8_v_u8mf2(__VA_ARGS__)

◆ vluxseg8ei8_v_u8mf2_m

#define vluxseg8ei8_v_u8mf2_m ( ... ) __riscv_vluxseg8ei8_v_u8mf2_tumu(__VA_ARGS__)

◆ vluxseg8ei8_v_u8mf4

#define vluxseg8ei8_v_u8mf4 ( ... ) __riscv_vluxseg8ei8_v_u8mf4(__VA_ARGS__)

◆ vluxseg8ei8_v_u8mf4_m

#define vluxseg8ei8_v_u8mf4_m ( ... ) __riscv_vluxseg8ei8_v_u8mf4_tumu(__VA_ARGS__)

◆ vluxseg8ei8_v_u8mf8

#define vluxseg8ei8_v_u8mf8 ( ... ) __riscv_vluxseg8ei8_v_u8mf8(__VA_ARGS__)

◆ vluxseg8ei8_v_u8mf8_m

#define vluxseg8ei8_v_u8mf8_m ( ... ) __riscv_vluxseg8ei8_v_u8mf8_tumu(__VA_ARGS__)

◆ vmacc_vv_i16m1

#define vmacc_vv_i16m1 ( ... ) __riscv_vmacc_vv_i16m1_tu(__VA_ARGS__)

◆ vmacc_vv_i16m1_m

#define vmacc_vv_i16m1_m ( ... ) __riscv_vmacc_vv_i16m1_tumu(__VA_ARGS__)

◆ vmacc_vv_i16m2

#define vmacc_vv_i16m2 ( ... ) __riscv_vmacc_vv_i16m2_tu(__VA_ARGS__)

◆ vmacc_vv_i16m2_m

#define vmacc_vv_i16m2_m ( ... ) __riscv_vmacc_vv_i16m2_tumu(__VA_ARGS__)

◆ vmacc_vv_i16m4

#define vmacc_vv_i16m4 ( ... ) __riscv_vmacc_vv_i16m4_tu(__VA_ARGS__)

◆ vmacc_vv_i16m4_m

#define vmacc_vv_i16m4_m ( ... ) __riscv_vmacc_vv_i16m4_tumu(__VA_ARGS__)

◆ vmacc_vv_i16m8

#define vmacc_vv_i16m8 ( ... ) __riscv_vmacc_vv_i16m8_tu(__VA_ARGS__)

◆ vmacc_vv_i16m8_m

#define vmacc_vv_i16m8_m ( ... ) __riscv_vmacc_vv_i16m8_tumu(__VA_ARGS__)

◆ vmacc_vv_i16mf2

#define vmacc_vv_i16mf2 ( ... ) __riscv_vmacc_vv_i16mf2_tu(__VA_ARGS__)

◆ vmacc_vv_i16mf2_m

#define vmacc_vv_i16mf2_m ( ... ) __riscv_vmacc_vv_i16mf2_tumu(__VA_ARGS__)

◆ vmacc_vv_i16mf4

#define vmacc_vv_i16mf4 ( ... ) __riscv_vmacc_vv_i16mf4_tu(__VA_ARGS__)

◆ vmacc_vv_i16mf4_m

#define vmacc_vv_i16mf4_m ( ... ) __riscv_vmacc_vv_i16mf4_tumu(__VA_ARGS__)

◆ vmacc_vv_i32m1

#define vmacc_vv_i32m1 ( ... ) __riscv_vmacc_vv_i32m1_tu(__VA_ARGS__)

◆ vmacc_vv_i32m1_m

#define vmacc_vv_i32m1_m ( ... ) __riscv_vmacc_vv_i32m1_tumu(__VA_ARGS__)

◆ vmacc_vv_i32m2

#define vmacc_vv_i32m2 ( ... ) __riscv_vmacc_vv_i32m2_tu(__VA_ARGS__)

◆ vmacc_vv_i32m2_m

#define vmacc_vv_i32m2_m ( ... ) __riscv_vmacc_vv_i32m2_tumu(__VA_ARGS__)

◆ vmacc_vv_i32m4

#define vmacc_vv_i32m4 ( ... ) __riscv_vmacc_vv_i32m4_tu(__VA_ARGS__)

◆ vmacc_vv_i32m4_m

#define vmacc_vv_i32m4_m ( ... ) __riscv_vmacc_vv_i32m4_tumu(__VA_ARGS__)

◆ vmacc_vv_i32m8

#define vmacc_vv_i32m8 ( ... ) __riscv_vmacc_vv_i32m8_tu(__VA_ARGS__)

◆ vmacc_vv_i32m8_m

#define vmacc_vv_i32m8_m ( ... ) __riscv_vmacc_vv_i32m8_tumu(__VA_ARGS__)

◆ vmacc_vv_i32mf2

#define vmacc_vv_i32mf2 ( ... ) __riscv_vmacc_vv_i32mf2_tu(__VA_ARGS__)

◆ vmacc_vv_i32mf2_m

#define vmacc_vv_i32mf2_m ( ... ) __riscv_vmacc_vv_i32mf2_tumu(__VA_ARGS__)

◆ vmacc_vv_i64m1

#define vmacc_vv_i64m1 ( ... ) __riscv_vmacc_vv_i64m1_tu(__VA_ARGS__)

◆ vmacc_vv_i64m1_m

#define vmacc_vv_i64m1_m ( ... ) __riscv_vmacc_vv_i64m1_tumu(__VA_ARGS__)

◆ vmacc_vv_i64m2

#define vmacc_vv_i64m2 ( ... ) __riscv_vmacc_vv_i64m2_tu(__VA_ARGS__)

◆ vmacc_vv_i64m2_m

#define vmacc_vv_i64m2_m ( ... ) __riscv_vmacc_vv_i64m2_tumu(__VA_ARGS__)

◆ vmacc_vv_i64m4

#define vmacc_vv_i64m4 ( ... ) __riscv_vmacc_vv_i64m4_tu(__VA_ARGS__)

◆ vmacc_vv_i64m4_m

#define vmacc_vv_i64m4_m ( ... ) __riscv_vmacc_vv_i64m4_tumu(__VA_ARGS__)

◆ vmacc_vv_i64m8

#define vmacc_vv_i64m8 ( ... ) __riscv_vmacc_vv_i64m8_tu(__VA_ARGS__)

◆ vmacc_vv_i64m8_m

#define vmacc_vv_i64m8_m ( ... ) __riscv_vmacc_vv_i64m8_tumu(__VA_ARGS__)

◆ vmacc_vv_i8m1

#define vmacc_vv_i8m1 ( ... ) __riscv_vmacc_vv_i8m1_tu(__VA_ARGS__)

◆ vmacc_vv_i8m1_m

#define vmacc_vv_i8m1_m ( ... ) __riscv_vmacc_vv_i8m1_tumu(__VA_ARGS__)

◆ vmacc_vv_i8m2

#define vmacc_vv_i8m2 ( ... ) __riscv_vmacc_vv_i8m2_tu(__VA_ARGS__)

◆ vmacc_vv_i8m2_m

#define vmacc_vv_i8m2_m ( ... ) __riscv_vmacc_vv_i8m2_tumu(__VA_ARGS__)

◆ vmacc_vv_i8m4

#define vmacc_vv_i8m4 ( ... ) __riscv_vmacc_vv_i8m4_tu(__VA_ARGS__)

◆ vmacc_vv_i8m4_m

#define vmacc_vv_i8m4_m ( ... ) __riscv_vmacc_vv_i8m4_tumu(__VA_ARGS__)

◆ vmacc_vv_i8m8

#define vmacc_vv_i8m8 ( ... ) __riscv_vmacc_vv_i8m8_tu(__VA_ARGS__)

◆ vmacc_vv_i8m8_m

#define vmacc_vv_i8m8_m ( ... ) __riscv_vmacc_vv_i8m8_tumu(__VA_ARGS__)

◆ vmacc_vv_i8mf2

#define vmacc_vv_i8mf2 ( ... ) __riscv_vmacc_vv_i8mf2_tu(__VA_ARGS__)

◆ vmacc_vv_i8mf2_m

#define vmacc_vv_i8mf2_m ( ... ) __riscv_vmacc_vv_i8mf2_tumu(__VA_ARGS__)

◆ vmacc_vv_i8mf4

#define vmacc_vv_i8mf4 ( ... ) __riscv_vmacc_vv_i8mf4_tu(__VA_ARGS__)

◆ vmacc_vv_i8mf4_m

#define vmacc_vv_i8mf4_m ( ... ) __riscv_vmacc_vv_i8mf4_tumu(__VA_ARGS__)

◆ vmacc_vv_i8mf8

#define vmacc_vv_i8mf8 ( ... ) __riscv_vmacc_vv_i8mf8_tu(__VA_ARGS__)

◆ vmacc_vv_i8mf8_m

#define vmacc_vv_i8mf8_m ( ... ) __riscv_vmacc_vv_i8mf8_tumu(__VA_ARGS__)

◆ vmacc_vv_u16m1

#define vmacc_vv_u16m1 ( ... ) __riscv_vmacc_vv_u16m1_tu(__VA_ARGS__)

◆ vmacc_vv_u16m1_m

#define vmacc_vv_u16m1_m ( ... ) __riscv_vmacc_vv_u16m1_tumu(__VA_ARGS__)

◆ vmacc_vv_u16m2

#define vmacc_vv_u16m2 ( ... ) __riscv_vmacc_vv_u16m2_tu(__VA_ARGS__)

◆ vmacc_vv_u16m2_m

#define vmacc_vv_u16m2_m ( ... ) __riscv_vmacc_vv_u16m2_tumu(__VA_ARGS__)

◆ vmacc_vv_u16m4

#define vmacc_vv_u16m4 ( ... ) __riscv_vmacc_vv_u16m4_tu(__VA_ARGS__)

◆ vmacc_vv_u16m4_m

#define vmacc_vv_u16m4_m ( ... ) __riscv_vmacc_vv_u16m4_tumu(__VA_ARGS__)

◆ vmacc_vv_u16m8

#define vmacc_vv_u16m8 ( ... ) __riscv_vmacc_vv_u16m8_tu(__VA_ARGS__)

◆ vmacc_vv_u16m8_m

#define vmacc_vv_u16m8_m ( ... ) __riscv_vmacc_vv_u16m8_tumu(__VA_ARGS__)

◆ vmacc_vv_u16mf2

#define vmacc_vv_u16mf2 ( ... ) __riscv_vmacc_vv_u16mf2_tu(__VA_ARGS__)

◆ vmacc_vv_u16mf2_m

#define vmacc_vv_u16mf2_m ( ... ) __riscv_vmacc_vv_u16mf2_tumu(__VA_ARGS__)

◆ vmacc_vv_u16mf4

#define vmacc_vv_u16mf4 ( ... ) __riscv_vmacc_vv_u16mf4_tu(__VA_ARGS__)

◆ vmacc_vv_u16mf4_m

#define vmacc_vv_u16mf4_m ( ... ) __riscv_vmacc_vv_u16mf4_tumu(__VA_ARGS__)

◆ vmacc_vv_u32m1

#define vmacc_vv_u32m1 ( ... ) __riscv_vmacc_vv_u32m1_tu(__VA_ARGS__)

◆ vmacc_vv_u32m1_m

#define vmacc_vv_u32m1_m ( ... ) __riscv_vmacc_vv_u32m1_tumu(__VA_ARGS__)

◆ vmacc_vv_u32m2

#define vmacc_vv_u32m2 ( ... ) __riscv_vmacc_vv_u32m2_tu(__VA_ARGS__)

◆ vmacc_vv_u32m2_m

#define vmacc_vv_u32m2_m ( ... ) __riscv_vmacc_vv_u32m2_tumu(__VA_ARGS__)

◆ vmacc_vv_u32m4

#define vmacc_vv_u32m4 ( ... ) __riscv_vmacc_vv_u32m4_tu(__VA_ARGS__)

◆ vmacc_vv_u32m4_m

#define vmacc_vv_u32m4_m ( ... ) __riscv_vmacc_vv_u32m4_tumu(__VA_ARGS__)

◆ vmacc_vv_u32m8

#define vmacc_vv_u32m8 ( ... ) __riscv_vmacc_vv_u32m8_tu(__VA_ARGS__)

◆ vmacc_vv_u32m8_m

#define vmacc_vv_u32m8_m ( ... ) __riscv_vmacc_vv_u32m8_tumu(__VA_ARGS__)

◆ vmacc_vv_u32mf2

#define vmacc_vv_u32mf2 ( ... ) __riscv_vmacc_vv_u32mf2_tu(__VA_ARGS__)

◆ vmacc_vv_u32mf2_m

#define vmacc_vv_u32mf2_m ( ... ) __riscv_vmacc_vv_u32mf2_tumu(__VA_ARGS__)

◆ vmacc_vv_u64m1

#define vmacc_vv_u64m1 ( ... ) __riscv_vmacc_vv_u64m1_tu(__VA_ARGS__)

◆ vmacc_vv_u64m1_m

#define vmacc_vv_u64m1_m ( ... ) __riscv_vmacc_vv_u64m1_tumu(__VA_ARGS__)

◆ vmacc_vv_u64m2

#define vmacc_vv_u64m2 ( ... ) __riscv_vmacc_vv_u64m2_tu(__VA_ARGS__)

◆ vmacc_vv_u64m2_m

#define vmacc_vv_u64m2_m ( ... ) __riscv_vmacc_vv_u64m2_tumu(__VA_ARGS__)

◆ vmacc_vv_u64m4

#define vmacc_vv_u64m4 ( ... ) __riscv_vmacc_vv_u64m4_tu(__VA_ARGS__)

◆ vmacc_vv_u64m4_m

#define vmacc_vv_u64m4_m ( ... ) __riscv_vmacc_vv_u64m4_tumu(__VA_ARGS__)

◆ vmacc_vv_u64m8

#define vmacc_vv_u64m8 ( ... ) __riscv_vmacc_vv_u64m8_tu(__VA_ARGS__)

◆ vmacc_vv_u64m8_m

#define vmacc_vv_u64m8_m ( ... ) __riscv_vmacc_vv_u64m8_tumu(__VA_ARGS__)

◆ vmacc_vv_u8m1

#define vmacc_vv_u8m1 ( ... ) __riscv_vmacc_vv_u8m1_tu(__VA_ARGS__)

◆ vmacc_vv_u8m1_m

#define vmacc_vv_u8m1_m ( ... ) __riscv_vmacc_vv_u8m1_tumu(__VA_ARGS__)

◆ vmacc_vv_u8m2

#define vmacc_vv_u8m2 ( ... ) __riscv_vmacc_vv_u8m2_tu(__VA_ARGS__)

◆ vmacc_vv_u8m2_m

#define vmacc_vv_u8m2_m ( ... ) __riscv_vmacc_vv_u8m2_tumu(__VA_ARGS__)

◆ vmacc_vv_u8m4

#define vmacc_vv_u8m4 ( ... ) __riscv_vmacc_vv_u8m4_tu(__VA_ARGS__)

◆ vmacc_vv_u8m4_m

#define vmacc_vv_u8m4_m ( ... ) __riscv_vmacc_vv_u8m4_tumu(__VA_ARGS__)

◆ vmacc_vv_u8m8

#define vmacc_vv_u8m8 ( ... ) __riscv_vmacc_vv_u8m8_tu(__VA_ARGS__)

◆ vmacc_vv_u8m8_m

#define vmacc_vv_u8m8_m ( ... ) __riscv_vmacc_vv_u8m8_tumu(__VA_ARGS__)

◆ vmacc_vv_u8mf2

#define vmacc_vv_u8mf2 ( ... ) __riscv_vmacc_vv_u8mf2_tu(__VA_ARGS__)

◆ vmacc_vv_u8mf2_m

#define vmacc_vv_u8mf2_m ( ... ) __riscv_vmacc_vv_u8mf2_tumu(__VA_ARGS__)

◆ vmacc_vv_u8mf4

#define vmacc_vv_u8mf4 ( ... ) __riscv_vmacc_vv_u8mf4_tu(__VA_ARGS__)

◆ vmacc_vv_u8mf4_m

#define vmacc_vv_u8mf4_m ( ... ) __riscv_vmacc_vv_u8mf4_tumu(__VA_ARGS__)

◆ vmacc_vv_u8mf8

#define vmacc_vv_u8mf8 ( ... ) __riscv_vmacc_vv_u8mf8_tu(__VA_ARGS__)

◆ vmacc_vv_u8mf8_m

#define vmacc_vv_u8mf8_m ( ... ) __riscv_vmacc_vv_u8mf8_tumu(__VA_ARGS__)

◆ vmacc_vx_i16m1

#define vmacc_vx_i16m1 ( ... ) __riscv_vmacc_vx_i16m1_tu(__VA_ARGS__)

◆ vmacc_vx_i16m1_m

#define vmacc_vx_i16m1_m ( ... ) __riscv_vmacc_vx_i16m1_tumu(__VA_ARGS__)

◆ vmacc_vx_i16m2

#define vmacc_vx_i16m2 ( ... ) __riscv_vmacc_vx_i16m2_tu(__VA_ARGS__)

◆ vmacc_vx_i16m2_m

#define vmacc_vx_i16m2_m ( ... ) __riscv_vmacc_vx_i16m2_tumu(__VA_ARGS__)

◆ vmacc_vx_i16m4

#define vmacc_vx_i16m4 ( ... ) __riscv_vmacc_vx_i16m4_tu(__VA_ARGS__)

◆ vmacc_vx_i16m4_m

#define vmacc_vx_i16m4_m ( ... ) __riscv_vmacc_vx_i16m4_tumu(__VA_ARGS__)

◆ vmacc_vx_i16m8

#define vmacc_vx_i16m8 ( ... ) __riscv_vmacc_vx_i16m8_tu(__VA_ARGS__)

◆ vmacc_vx_i16m8_m

#define vmacc_vx_i16m8_m ( ... ) __riscv_vmacc_vx_i16m8_tumu(__VA_ARGS__)

◆ vmacc_vx_i16mf2

#define vmacc_vx_i16mf2 ( ... ) __riscv_vmacc_vx_i16mf2_tu(__VA_ARGS__)

◆ vmacc_vx_i16mf2_m

#define vmacc_vx_i16mf2_m ( ... ) __riscv_vmacc_vx_i16mf2_tumu(__VA_ARGS__)

◆ vmacc_vx_i16mf4

#define vmacc_vx_i16mf4 ( ... ) __riscv_vmacc_vx_i16mf4_tu(__VA_ARGS__)

◆ vmacc_vx_i16mf4_m

#define vmacc_vx_i16mf4_m ( ... ) __riscv_vmacc_vx_i16mf4_tumu(__VA_ARGS__)

◆ vmacc_vx_i32m1

#define vmacc_vx_i32m1 ( ... ) __riscv_vmacc_vx_i32m1_tu(__VA_ARGS__)

◆ vmacc_vx_i32m1_m

#define vmacc_vx_i32m1_m ( ... ) __riscv_vmacc_vx_i32m1_tumu(__VA_ARGS__)

◆ vmacc_vx_i32m2

#define vmacc_vx_i32m2 ( ... ) __riscv_vmacc_vx_i32m2_tu(__VA_ARGS__)

◆ vmacc_vx_i32m2_m

#define vmacc_vx_i32m2_m ( ... ) __riscv_vmacc_vx_i32m2_tumu(__VA_ARGS__)

◆ vmacc_vx_i32m4

#define vmacc_vx_i32m4 ( ... ) __riscv_vmacc_vx_i32m4_tu(__VA_ARGS__)

◆ vmacc_vx_i32m4_m

#define vmacc_vx_i32m4_m ( ... ) __riscv_vmacc_vx_i32m4_tumu(__VA_ARGS__)

◆ vmacc_vx_i32m8

#define vmacc_vx_i32m8 ( ... ) __riscv_vmacc_vx_i32m8_tu(__VA_ARGS__)

◆ vmacc_vx_i32m8_m

#define vmacc_vx_i32m8_m ( ... ) __riscv_vmacc_vx_i32m8_tumu(__VA_ARGS__)

◆ vmacc_vx_i32mf2

#define vmacc_vx_i32mf2 ( ... ) __riscv_vmacc_vx_i32mf2_tu(__VA_ARGS__)

◆ vmacc_vx_i32mf2_m

#define vmacc_vx_i32mf2_m ( ... ) __riscv_vmacc_vx_i32mf2_tumu(__VA_ARGS__)

◆ vmacc_vx_i64m1

#define vmacc_vx_i64m1 ( ... ) __riscv_vmacc_vx_i64m1_tu(__VA_ARGS__)

◆ vmacc_vx_i64m1_m

#define vmacc_vx_i64m1_m ( ... ) __riscv_vmacc_vx_i64m1_tumu(__VA_ARGS__)

◆ vmacc_vx_i64m2

#define vmacc_vx_i64m2 ( ... ) __riscv_vmacc_vx_i64m2_tu(__VA_ARGS__)

◆ vmacc_vx_i64m2_m

#define vmacc_vx_i64m2_m ( ... ) __riscv_vmacc_vx_i64m2_tumu(__VA_ARGS__)

◆ vmacc_vx_i64m4

#define vmacc_vx_i64m4 ( ... ) __riscv_vmacc_vx_i64m4_tu(__VA_ARGS__)

◆ vmacc_vx_i64m4_m

#define vmacc_vx_i64m4_m ( ... ) __riscv_vmacc_vx_i64m4_tumu(__VA_ARGS__)

◆ vmacc_vx_i64m8

#define vmacc_vx_i64m8 ( ... ) __riscv_vmacc_vx_i64m8_tu(__VA_ARGS__)

◆ vmacc_vx_i64m8_m

#define vmacc_vx_i64m8_m ( ... ) __riscv_vmacc_vx_i64m8_tumu(__VA_ARGS__)

◆ vmacc_vx_i8m1

#define vmacc_vx_i8m1 ( ... ) __riscv_vmacc_vx_i8m1_tu(__VA_ARGS__)

◆ vmacc_vx_i8m1_m

#define vmacc_vx_i8m1_m ( ... ) __riscv_vmacc_vx_i8m1_tumu(__VA_ARGS__)

◆ vmacc_vx_i8m2

#define vmacc_vx_i8m2 ( ... ) __riscv_vmacc_vx_i8m2_tu(__VA_ARGS__)

◆ vmacc_vx_i8m2_m

#define vmacc_vx_i8m2_m ( ... ) __riscv_vmacc_vx_i8m2_tumu(__VA_ARGS__)

◆ vmacc_vx_i8m4

#define vmacc_vx_i8m4 ( ... ) __riscv_vmacc_vx_i8m4_tu(__VA_ARGS__)

◆ vmacc_vx_i8m4_m

#define vmacc_vx_i8m4_m ( ... ) __riscv_vmacc_vx_i8m4_tumu(__VA_ARGS__)

◆ vmacc_vx_i8m8

#define vmacc_vx_i8m8 ( ... ) __riscv_vmacc_vx_i8m8_tu(__VA_ARGS__)

◆ vmacc_vx_i8m8_m

#define vmacc_vx_i8m8_m ( ... ) __riscv_vmacc_vx_i8m8_tumu(__VA_ARGS__)

◆ vmacc_vx_i8mf2

#define vmacc_vx_i8mf2 ( ... ) __riscv_vmacc_vx_i8mf2_tu(__VA_ARGS__)

◆ vmacc_vx_i8mf2_m

#define vmacc_vx_i8mf2_m ( ... ) __riscv_vmacc_vx_i8mf2_tumu(__VA_ARGS__)

◆ vmacc_vx_i8mf4

#define vmacc_vx_i8mf4 ( ... ) __riscv_vmacc_vx_i8mf4_tu(__VA_ARGS__)

◆ vmacc_vx_i8mf4_m

#define vmacc_vx_i8mf4_m ( ... ) __riscv_vmacc_vx_i8mf4_tumu(__VA_ARGS__)

◆ vmacc_vx_i8mf8

#define vmacc_vx_i8mf8 ( ... ) __riscv_vmacc_vx_i8mf8_tu(__VA_ARGS__)

◆ vmacc_vx_i8mf8_m

#define vmacc_vx_i8mf8_m ( ... ) __riscv_vmacc_vx_i8mf8_tumu(__VA_ARGS__)

◆ vmacc_vx_u16m1

#define vmacc_vx_u16m1 ( ... ) __riscv_vmacc_vx_u16m1_tu(__VA_ARGS__)

◆ vmacc_vx_u16m1_m

#define vmacc_vx_u16m1_m ( ... ) __riscv_vmacc_vx_u16m1_tumu(__VA_ARGS__)

◆ vmacc_vx_u16m2

#define vmacc_vx_u16m2 ( ... ) __riscv_vmacc_vx_u16m2_tu(__VA_ARGS__)

◆ vmacc_vx_u16m2_m

#define vmacc_vx_u16m2_m ( ... ) __riscv_vmacc_vx_u16m2_tumu(__VA_ARGS__)

◆ vmacc_vx_u16m4

#define vmacc_vx_u16m4 ( ... ) __riscv_vmacc_vx_u16m4_tu(__VA_ARGS__)

◆ vmacc_vx_u16m4_m

#define vmacc_vx_u16m4_m ( ... ) __riscv_vmacc_vx_u16m4_tumu(__VA_ARGS__)

◆ vmacc_vx_u16m8

#define vmacc_vx_u16m8 ( ... ) __riscv_vmacc_vx_u16m8_tu(__VA_ARGS__)

◆ vmacc_vx_u16m8_m

#define vmacc_vx_u16m8_m ( ... ) __riscv_vmacc_vx_u16m8_tumu(__VA_ARGS__)

◆ vmacc_vx_u16mf2

#define vmacc_vx_u16mf2 ( ... ) __riscv_vmacc_vx_u16mf2_tu(__VA_ARGS__)

◆ vmacc_vx_u16mf2_m

#define vmacc_vx_u16mf2_m ( ... ) __riscv_vmacc_vx_u16mf2_tumu(__VA_ARGS__)

◆ vmacc_vx_u16mf4

#define vmacc_vx_u16mf4 ( ... ) __riscv_vmacc_vx_u16mf4_tu(__VA_ARGS__)

◆ vmacc_vx_u16mf4_m

#define vmacc_vx_u16mf4_m ( ... ) __riscv_vmacc_vx_u16mf4_tumu(__VA_ARGS__)

◆ vmacc_vx_u32m1

#define vmacc_vx_u32m1 ( ... ) __riscv_vmacc_vx_u32m1_tu(__VA_ARGS__)

◆ vmacc_vx_u32m1_m

#define vmacc_vx_u32m1_m ( ... ) __riscv_vmacc_vx_u32m1_tumu(__VA_ARGS__)

◆ vmacc_vx_u32m2

#define vmacc_vx_u32m2 ( ... ) __riscv_vmacc_vx_u32m2_tu(__VA_ARGS__)

◆ vmacc_vx_u32m2_m

#define vmacc_vx_u32m2_m ( ... ) __riscv_vmacc_vx_u32m2_tumu(__VA_ARGS__)

◆ vmacc_vx_u32m4

#define vmacc_vx_u32m4 ( ... ) __riscv_vmacc_vx_u32m4_tu(__VA_ARGS__)

◆ vmacc_vx_u32m4_m

#define vmacc_vx_u32m4_m ( ... ) __riscv_vmacc_vx_u32m4_tumu(__VA_ARGS__)

◆ vmacc_vx_u32m8

#define vmacc_vx_u32m8 ( ... ) __riscv_vmacc_vx_u32m8_tu(__VA_ARGS__)

◆ vmacc_vx_u32m8_m

#define vmacc_vx_u32m8_m ( ... ) __riscv_vmacc_vx_u32m8_tumu(__VA_ARGS__)

◆ vmacc_vx_u32mf2

#define vmacc_vx_u32mf2 ( ... ) __riscv_vmacc_vx_u32mf2_tu(__VA_ARGS__)

◆ vmacc_vx_u32mf2_m

#define vmacc_vx_u32mf2_m ( ... ) __riscv_vmacc_vx_u32mf2_tumu(__VA_ARGS__)

◆ vmacc_vx_u64m1

#define vmacc_vx_u64m1 ( ... ) __riscv_vmacc_vx_u64m1_tu(__VA_ARGS__)

◆ vmacc_vx_u64m1_m

#define vmacc_vx_u64m1_m ( ... ) __riscv_vmacc_vx_u64m1_tumu(__VA_ARGS__)

◆ vmacc_vx_u64m2

#define vmacc_vx_u64m2 ( ... ) __riscv_vmacc_vx_u64m2_tu(__VA_ARGS__)

◆ vmacc_vx_u64m2_m

#define vmacc_vx_u64m2_m ( ... ) __riscv_vmacc_vx_u64m2_tumu(__VA_ARGS__)

◆ vmacc_vx_u64m4

#define vmacc_vx_u64m4 ( ... ) __riscv_vmacc_vx_u64m4_tu(__VA_ARGS__)

◆ vmacc_vx_u64m4_m

#define vmacc_vx_u64m4_m ( ... ) __riscv_vmacc_vx_u64m4_tumu(__VA_ARGS__)

◆ vmacc_vx_u64m8

#define vmacc_vx_u64m8 ( ... ) __riscv_vmacc_vx_u64m8_tu(__VA_ARGS__)

◆ vmacc_vx_u64m8_m

#define vmacc_vx_u64m8_m ( ... ) __riscv_vmacc_vx_u64m8_tumu(__VA_ARGS__)

◆ vmacc_vx_u8m1

#define vmacc_vx_u8m1 ( ... ) __riscv_vmacc_vx_u8m1_tu(__VA_ARGS__)

◆ vmacc_vx_u8m1_m

#define vmacc_vx_u8m1_m ( ... ) __riscv_vmacc_vx_u8m1_tumu(__VA_ARGS__)

◆ vmacc_vx_u8m2

#define vmacc_vx_u8m2 ( ... ) __riscv_vmacc_vx_u8m2_tu(__VA_ARGS__)

◆ vmacc_vx_u8m2_m

#define vmacc_vx_u8m2_m ( ... ) __riscv_vmacc_vx_u8m2_tumu(__VA_ARGS__)

◆ vmacc_vx_u8m4

#define vmacc_vx_u8m4 ( ... ) __riscv_vmacc_vx_u8m4_tu(__VA_ARGS__)

◆ vmacc_vx_u8m4_m

#define vmacc_vx_u8m4_m ( ... ) __riscv_vmacc_vx_u8m4_tumu(__VA_ARGS__)

◆ vmacc_vx_u8m8

#define vmacc_vx_u8m8 ( ... ) __riscv_vmacc_vx_u8m8_tu(__VA_ARGS__)

◆ vmacc_vx_u8m8_m

#define vmacc_vx_u8m8_m ( ... ) __riscv_vmacc_vx_u8m8_tumu(__VA_ARGS__)

◆ vmacc_vx_u8mf2

#define vmacc_vx_u8mf2 ( ... ) __riscv_vmacc_vx_u8mf2_tu(__VA_ARGS__)

◆ vmacc_vx_u8mf2_m

#define vmacc_vx_u8mf2_m ( ... ) __riscv_vmacc_vx_u8mf2_tumu(__VA_ARGS__)

◆ vmacc_vx_u8mf4

#define vmacc_vx_u8mf4 ( ... ) __riscv_vmacc_vx_u8mf4_tu(__VA_ARGS__)

◆ vmacc_vx_u8mf4_m

#define vmacc_vx_u8mf4_m ( ... ) __riscv_vmacc_vx_u8mf4_tumu(__VA_ARGS__)

◆ vmacc_vx_u8mf8

#define vmacc_vx_u8mf8 ( ... ) __riscv_vmacc_vx_u8mf8_tu(__VA_ARGS__)

◆ vmacc_vx_u8mf8_m

#define vmacc_vx_u8mf8_m ( ... ) __riscv_vmacc_vx_u8mf8_tumu(__VA_ARGS__)

◆ vmadc_vv_i16m1_b16

#define vmadc_vv_i16m1_b16 ( ... ) __riscv_vmadc_vv_i16m1_b16(__VA_ARGS__)

◆ vmadc_vv_i16m2_b8

#define vmadc_vv_i16m2_b8 ( ... ) __riscv_vmadc_vv_i16m2_b8(__VA_ARGS__)

◆ vmadc_vv_i16m4_b4

#define vmadc_vv_i16m4_b4 ( ... ) __riscv_vmadc_vv_i16m4_b4(__VA_ARGS__)

◆ vmadc_vv_i16m8_b2

#define vmadc_vv_i16m8_b2 ( ... ) __riscv_vmadc_vv_i16m8_b2(__VA_ARGS__)

◆ vmadc_vv_i16mf2_b32

#define vmadc_vv_i16mf2_b32 ( ... ) __riscv_vmadc_vv_i16mf2_b32(__VA_ARGS__)

◆ vmadc_vv_i16mf4_b64

#define vmadc_vv_i16mf4_b64 ( ... ) __riscv_vmadc_vv_i16mf4_b64(__VA_ARGS__)

◆ vmadc_vv_i32m1_b32

#define vmadc_vv_i32m1_b32 ( ... ) __riscv_vmadc_vv_i32m1_b32(__VA_ARGS__)

◆ vmadc_vv_i32m2_b16

#define vmadc_vv_i32m2_b16 ( ... ) __riscv_vmadc_vv_i32m2_b16(__VA_ARGS__)

◆ vmadc_vv_i32m4_b8

#define vmadc_vv_i32m4_b8 ( ... ) __riscv_vmadc_vv_i32m4_b8(__VA_ARGS__)

◆ vmadc_vv_i32m8_b4

#define vmadc_vv_i32m8_b4 ( ... ) __riscv_vmadc_vv_i32m8_b4(__VA_ARGS__)

◆ vmadc_vv_i32mf2_b64

#define vmadc_vv_i32mf2_b64 ( ... ) __riscv_vmadc_vv_i32mf2_b64(__VA_ARGS__)

◆ vmadc_vv_i64m1_b64

#define vmadc_vv_i64m1_b64 ( ... ) __riscv_vmadc_vv_i64m1_b64(__VA_ARGS__)

◆ vmadc_vv_i64m2_b32

#define vmadc_vv_i64m2_b32 ( ... ) __riscv_vmadc_vv_i64m2_b32(__VA_ARGS__)

◆ vmadc_vv_i64m4_b16

#define vmadc_vv_i64m4_b16 ( ... ) __riscv_vmadc_vv_i64m4_b16(__VA_ARGS__)

◆ vmadc_vv_i64m8_b8

#define vmadc_vv_i64m8_b8 ( ... ) __riscv_vmadc_vv_i64m8_b8(__VA_ARGS__)

◆ vmadc_vv_i8m1_b8

#define vmadc_vv_i8m1_b8 ( ... ) __riscv_vmadc_vv_i8m1_b8(__VA_ARGS__)

◆ vmadc_vv_i8m2_b4

#define vmadc_vv_i8m2_b4 ( ... ) __riscv_vmadc_vv_i8m2_b4(__VA_ARGS__)

◆ vmadc_vv_i8m4_b2

#define vmadc_vv_i8m4_b2 ( ... ) __riscv_vmadc_vv_i8m4_b2(__VA_ARGS__)

◆ vmadc_vv_i8m8_b1

#define vmadc_vv_i8m8_b1 ( ... ) __riscv_vmadc_vv_i8m8_b1(__VA_ARGS__)

◆ vmadc_vv_i8mf2_b16

#define vmadc_vv_i8mf2_b16 ( ... ) __riscv_vmadc_vv_i8mf2_b16(__VA_ARGS__)

◆ vmadc_vv_i8mf4_b32

#define vmadc_vv_i8mf4_b32 ( ... ) __riscv_vmadc_vv_i8mf4_b32(__VA_ARGS__)

◆ vmadc_vv_i8mf8_b64

#define vmadc_vv_i8mf8_b64 ( ... ) __riscv_vmadc_vv_i8mf8_b64(__VA_ARGS__)

◆ vmadc_vv_u16m1_b16

#define vmadc_vv_u16m1_b16 ( ... ) __riscv_vmadc_vv_u16m1_b16(__VA_ARGS__)

◆ vmadc_vv_u16m2_b8

#define vmadc_vv_u16m2_b8 ( ... ) __riscv_vmadc_vv_u16m2_b8(__VA_ARGS__)

◆ vmadc_vv_u16m4_b4

#define vmadc_vv_u16m4_b4 ( ... ) __riscv_vmadc_vv_u16m4_b4(__VA_ARGS__)

◆ vmadc_vv_u16m8_b2

#define vmadc_vv_u16m8_b2 ( ... ) __riscv_vmadc_vv_u16m8_b2(__VA_ARGS__)

◆ vmadc_vv_u16mf2_b32

#define vmadc_vv_u16mf2_b32 ( ... ) __riscv_vmadc_vv_u16mf2_b32(__VA_ARGS__)

◆ vmadc_vv_u16mf4_b64

#define vmadc_vv_u16mf4_b64 ( ... ) __riscv_vmadc_vv_u16mf4_b64(__VA_ARGS__)

◆ vmadc_vv_u32m1_b32

#define vmadc_vv_u32m1_b32 ( ... ) __riscv_vmadc_vv_u32m1_b32(__VA_ARGS__)

◆ vmadc_vv_u32m2_b16

#define vmadc_vv_u32m2_b16 ( ... ) __riscv_vmadc_vv_u32m2_b16(__VA_ARGS__)

◆ vmadc_vv_u32m4_b8

#define vmadc_vv_u32m4_b8 ( ... ) __riscv_vmadc_vv_u32m4_b8(__VA_ARGS__)

◆ vmadc_vv_u32m8_b4

#define vmadc_vv_u32m8_b4 ( ... ) __riscv_vmadc_vv_u32m8_b4(__VA_ARGS__)

◆ vmadc_vv_u32mf2_b64

#define vmadc_vv_u32mf2_b64 ( ... ) __riscv_vmadc_vv_u32mf2_b64(__VA_ARGS__)

◆ vmadc_vv_u64m1_b64

#define vmadc_vv_u64m1_b64 ( ... ) __riscv_vmadc_vv_u64m1_b64(__VA_ARGS__)

◆ vmadc_vv_u64m2_b32

#define vmadc_vv_u64m2_b32 ( ... ) __riscv_vmadc_vv_u64m2_b32(__VA_ARGS__)

◆ vmadc_vv_u64m4_b16

#define vmadc_vv_u64m4_b16 ( ... ) __riscv_vmadc_vv_u64m4_b16(__VA_ARGS__)

◆ vmadc_vv_u64m8_b8

#define vmadc_vv_u64m8_b8 ( ... ) __riscv_vmadc_vv_u64m8_b8(__VA_ARGS__)

◆ vmadc_vv_u8m1_b8

#define vmadc_vv_u8m1_b8 ( ... ) __riscv_vmadc_vv_u8m1_b8(__VA_ARGS__)

◆ vmadc_vv_u8m2_b4

#define vmadc_vv_u8m2_b4 ( ... ) __riscv_vmadc_vv_u8m2_b4(__VA_ARGS__)

◆ vmadc_vv_u8m4_b2

#define vmadc_vv_u8m4_b2 ( ... ) __riscv_vmadc_vv_u8m4_b2(__VA_ARGS__)

◆ vmadc_vv_u8m8_b1

#define vmadc_vv_u8m8_b1 ( ... ) __riscv_vmadc_vv_u8m8_b1(__VA_ARGS__)

◆ vmadc_vv_u8mf2_b16

#define vmadc_vv_u8mf2_b16 ( ... ) __riscv_vmadc_vv_u8mf2_b16(__VA_ARGS__)

◆ vmadc_vv_u8mf4_b32

#define vmadc_vv_u8mf4_b32 ( ... ) __riscv_vmadc_vv_u8mf4_b32(__VA_ARGS__)

◆ vmadc_vv_u8mf8_b64

#define vmadc_vv_u8mf8_b64 ( ... ) __riscv_vmadc_vv_u8mf8_b64(__VA_ARGS__)

◆ vmadc_vvm_i16m1_b16

#define vmadc_vvm_i16m1_b16 ( ... ) __riscv_vmadc_vvm_i16m1_b16(__VA_ARGS__)

◆ vmadc_vvm_i16m2_b8

#define vmadc_vvm_i16m2_b8 ( ... ) __riscv_vmadc_vvm_i16m2_b8(__VA_ARGS__)

◆ vmadc_vvm_i16m4_b4

#define vmadc_vvm_i16m4_b4 ( ... ) __riscv_vmadc_vvm_i16m4_b4(__VA_ARGS__)

◆ vmadc_vvm_i16m8_b2

#define vmadc_vvm_i16m8_b2 ( ... ) __riscv_vmadc_vvm_i16m8_b2(__VA_ARGS__)

◆ vmadc_vvm_i16mf2_b32

#define vmadc_vvm_i16mf2_b32 ( ... ) __riscv_vmadc_vvm_i16mf2_b32(__VA_ARGS__)

◆ vmadc_vvm_i16mf4_b64

#define vmadc_vvm_i16mf4_b64 ( ... ) __riscv_vmadc_vvm_i16mf4_b64(__VA_ARGS__)

◆ vmadc_vvm_i32m1_b32

#define vmadc_vvm_i32m1_b32 ( ... ) __riscv_vmadc_vvm_i32m1_b32(__VA_ARGS__)

◆ vmadc_vvm_i32m2_b16

#define vmadc_vvm_i32m2_b16 ( ... ) __riscv_vmadc_vvm_i32m2_b16(__VA_ARGS__)

◆ vmadc_vvm_i32m4_b8

#define vmadc_vvm_i32m4_b8 ( ... ) __riscv_vmadc_vvm_i32m4_b8(__VA_ARGS__)

◆ vmadc_vvm_i32m8_b4

#define vmadc_vvm_i32m8_b4 ( ... ) __riscv_vmadc_vvm_i32m8_b4(__VA_ARGS__)

◆ vmadc_vvm_i32mf2_b64

#define vmadc_vvm_i32mf2_b64 ( ... ) __riscv_vmadc_vvm_i32mf2_b64(__VA_ARGS__)

◆ vmadc_vvm_i64m1_b64

#define vmadc_vvm_i64m1_b64 ( ... ) __riscv_vmadc_vvm_i64m1_b64(__VA_ARGS__)

◆ vmadc_vvm_i64m2_b32

#define vmadc_vvm_i64m2_b32 ( ... ) __riscv_vmadc_vvm_i64m2_b32(__VA_ARGS__)

◆ vmadc_vvm_i64m4_b16

#define vmadc_vvm_i64m4_b16 ( ... ) __riscv_vmadc_vvm_i64m4_b16(__VA_ARGS__)

◆ vmadc_vvm_i64m8_b8

#define vmadc_vvm_i64m8_b8 ( ... ) __riscv_vmadc_vvm_i64m8_b8(__VA_ARGS__)

◆ vmadc_vvm_i8m1_b8

#define vmadc_vvm_i8m1_b8 ( ... ) __riscv_vmadc_vvm_i8m1_b8(__VA_ARGS__)

◆ vmadc_vvm_i8m2_b4

#define vmadc_vvm_i8m2_b4 ( ... ) __riscv_vmadc_vvm_i8m2_b4(__VA_ARGS__)

◆ vmadc_vvm_i8m4_b2

#define vmadc_vvm_i8m4_b2 ( ... ) __riscv_vmadc_vvm_i8m4_b2(__VA_ARGS__)

◆ vmadc_vvm_i8m8_b1

#define vmadc_vvm_i8m8_b1 ( ... ) __riscv_vmadc_vvm_i8m8_b1(__VA_ARGS__)

◆ vmadc_vvm_i8mf2_b16

#define vmadc_vvm_i8mf2_b16 ( ... ) __riscv_vmadc_vvm_i8mf2_b16(__VA_ARGS__)

◆ vmadc_vvm_i8mf4_b32

#define vmadc_vvm_i8mf4_b32 ( ... ) __riscv_vmadc_vvm_i8mf4_b32(__VA_ARGS__)

◆ vmadc_vvm_i8mf8_b64

#define vmadc_vvm_i8mf8_b64 ( ... ) __riscv_vmadc_vvm_i8mf8_b64(__VA_ARGS__)

◆ vmadc_vvm_u16m1_b16

#define vmadc_vvm_u16m1_b16 ( ... ) __riscv_vmadc_vvm_u16m1_b16(__VA_ARGS__)

◆ vmadc_vvm_u16m2_b8

#define vmadc_vvm_u16m2_b8 ( ... ) __riscv_vmadc_vvm_u16m2_b8(__VA_ARGS__)

◆ vmadc_vvm_u16m4_b4

#define vmadc_vvm_u16m4_b4 ( ... ) __riscv_vmadc_vvm_u16m4_b4(__VA_ARGS__)

◆ vmadc_vvm_u16m8_b2

#define vmadc_vvm_u16m8_b2 ( ... ) __riscv_vmadc_vvm_u16m8_b2(__VA_ARGS__)

◆ vmadc_vvm_u16mf2_b32

#define vmadc_vvm_u16mf2_b32 ( ... ) __riscv_vmadc_vvm_u16mf2_b32(__VA_ARGS__)

◆ vmadc_vvm_u16mf4_b64

#define vmadc_vvm_u16mf4_b64 ( ... ) __riscv_vmadc_vvm_u16mf4_b64(__VA_ARGS__)

◆ vmadc_vvm_u32m1_b32

#define vmadc_vvm_u32m1_b32 ( ... ) __riscv_vmadc_vvm_u32m1_b32(__VA_ARGS__)

◆ vmadc_vvm_u32m2_b16

#define vmadc_vvm_u32m2_b16 ( ... ) __riscv_vmadc_vvm_u32m2_b16(__VA_ARGS__)

◆ vmadc_vvm_u32m4_b8

#define vmadc_vvm_u32m4_b8 ( ... ) __riscv_vmadc_vvm_u32m4_b8(__VA_ARGS__)

◆ vmadc_vvm_u32m8_b4

#define vmadc_vvm_u32m8_b4 ( ... ) __riscv_vmadc_vvm_u32m8_b4(__VA_ARGS__)

◆ vmadc_vvm_u32mf2_b64

#define vmadc_vvm_u32mf2_b64 ( ... ) __riscv_vmadc_vvm_u32mf2_b64(__VA_ARGS__)

◆ vmadc_vvm_u64m1_b64

#define vmadc_vvm_u64m1_b64 ( ... ) __riscv_vmadc_vvm_u64m1_b64(__VA_ARGS__)

◆ vmadc_vvm_u64m2_b32

#define vmadc_vvm_u64m2_b32 ( ... ) __riscv_vmadc_vvm_u64m2_b32(__VA_ARGS__)

◆ vmadc_vvm_u64m4_b16

#define vmadc_vvm_u64m4_b16 ( ... ) __riscv_vmadc_vvm_u64m4_b16(__VA_ARGS__)

◆ vmadc_vvm_u64m8_b8

#define vmadc_vvm_u64m8_b8 ( ... ) __riscv_vmadc_vvm_u64m8_b8(__VA_ARGS__)

◆ vmadc_vvm_u8m1_b8

#define vmadc_vvm_u8m1_b8 ( ... ) __riscv_vmadc_vvm_u8m1_b8(__VA_ARGS__)

◆ vmadc_vvm_u8m2_b4

#define vmadc_vvm_u8m2_b4 ( ... ) __riscv_vmadc_vvm_u8m2_b4(__VA_ARGS__)

◆ vmadc_vvm_u8m4_b2

#define vmadc_vvm_u8m4_b2 ( ... ) __riscv_vmadc_vvm_u8m4_b2(__VA_ARGS__)

◆ vmadc_vvm_u8m8_b1

#define vmadc_vvm_u8m8_b1 ( ... ) __riscv_vmadc_vvm_u8m8_b1(__VA_ARGS__)

◆ vmadc_vvm_u8mf2_b16

#define vmadc_vvm_u8mf2_b16 ( ... ) __riscv_vmadc_vvm_u8mf2_b16(__VA_ARGS__)

◆ vmadc_vvm_u8mf4_b32

#define vmadc_vvm_u8mf4_b32 ( ... ) __riscv_vmadc_vvm_u8mf4_b32(__VA_ARGS__)

◆ vmadc_vvm_u8mf8_b64

#define vmadc_vvm_u8mf8_b64 ( ... ) __riscv_vmadc_vvm_u8mf8_b64(__VA_ARGS__)

◆ vmadc_vx_i16m1_b16

#define vmadc_vx_i16m1_b16 ( ... ) __riscv_vmadc_vx_i16m1_b16(__VA_ARGS__)

◆ vmadc_vx_i16m2_b8

#define vmadc_vx_i16m2_b8 ( ... ) __riscv_vmadc_vx_i16m2_b8(__VA_ARGS__)

◆ vmadc_vx_i16m4_b4

#define vmadc_vx_i16m4_b4 ( ... ) __riscv_vmadc_vx_i16m4_b4(__VA_ARGS__)

◆ vmadc_vx_i16m8_b2

#define vmadc_vx_i16m8_b2 ( ... ) __riscv_vmadc_vx_i16m8_b2(__VA_ARGS__)

◆ vmadc_vx_i16mf2_b32

#define vmadc_vx_i16mf2_b32 ( ... ) __riscv_vmadc_vx_i16mf2_b32(__VA_ARGS__)

◆ vmadc_vx_i16mf4_b64

#define vmadc_vx_i16mf4_b64 ( ... ) __riscv_vmadc_vx_i16mf4_b64(__VA_ARGS__)

◆ vmadc_vx_i32m1_b32

#define vmadc_vx_i32m1_b32 ( ... ) __riscv_vmadc_vx_i32m1_b32(__VA_ARGS__)

◆ vmadc_vx_i32m2_b16

#define vmadc_vx_i32m2_b16 ( ... ) __riscv_vmadc_vx_i32m2_b16(__VA_ARGS__)

◆ vmadc_vx_i32m4_b8

#define vmadc_vx_i32m4_b8 ( ... ) __riscv_vmadc_vx_i32m4_b8(__VA_ARGS__)

◆ vmadc_vx_i32m8_b4

#define vmadc_vx_i32m8_b4 ( ... ) __riscv_vmadc_vx_i32m8_b4(__VA_ARGS__)

◆ vmadc_vx_i32mf2_b64

#define vmadc_vx_i32mf2_b64 ( ... ) __riscv_vmadc_vx_i32mf2_b64(__VA_ARGS__)

◆ vmadc_vx_i64m1_b64

#define vmadc_vx_i64m1_b64 ( ... ) __riscv_vmadc_vx_i64m1_b64(__VA_ARGS__)

◆ vmadc_vx_i64m2_b32

#define vmadc_vx_i64m2_b32 ( ... ) __riscv_vmadc_vx_i64m2_b32(__VA_ARGS__)

◆ vmadc_vx_i64m4_b16

#define vmadc_vx_i64m4_b16 ( ... ) __riscv_vmadc_vx_i64m4_b16(__VA_ARGS__)

◆ vmadc_vx_i64m8_b8

#define vmadc_vx_i64m8_b8 ( ... ) __riscv_vmadc_vx_i64m8_b8(__VA_ARGS__)

◆ vmadc_vx_i8m1_b8

#define vmadc_vx_i8m1_b8 ( ... ) __riscv_vmadc_vx_i8m1_b8(__VA_ARGS__)

◆ vmadc_vx_i8m2_b4

#define vmadc_vx_i8m2_b4 ( ... ) __riscv_vmadc_vx_i8m2_b4(__VA_ARGS__)

◆ vmadc_vx_i8m4_b2

#define vmadc_vx_i8m4_b2 ( ... ) __riscv_vmadc_vx_i8m4_b2(__VA_ARGS__)

◆ vmadc_vx_i8m8_b1

#define vmadc_vx_i8m8_b1 ( ... ) __riscv_vmadc_vx_i8m8_b1(__VA_ARGS__)

◆ vmadc_vx_i8mf2_b16

#define vmadc_vx_i8mf2_b16 ( ... ) __riscv_vmadc_vx_i8mf2_b16(__VA_ARGS__)

◆ vmadc_vx_i8mf4_b32

#define vmadc_vx_i8mf4_b32 ( ... ) __riscv_vmadc_vx_i8mf4_b32(__VA_ARGS__)

◆ vmadc_vx_i8mf8_b64

#define vmadc_vx_i8mf8_b64 ( ... ) __riscv_vmadc_vx_i8mf8_b64(__VA_ARGS__)

◆ vmadc_vx_u16m1_b16

#define vmadc_vx_u16m1_b16 ( ... ) __riscv_vmadc_vx_u16m1_b16(__VA_ARGS__)

◆ vmadc_vx_u16m2_b8

#define vmadc_vx_u16m2_b8 ( ... ) __riscv_vmadc_vx_u16m2_b8(__VA_ARGS__)

◆ vmadc_vx_u16m4_b4

#define vmadc_vx_u16m4_b4 ( ... ) __riscv_vmadc_vx_u16m4_b4(__VA_ARGS__)

◆ vmadc_vx_u16m8_b2

#define vmadc_vx_u16m8_b2 ( ... ) __riscv_vmadc_vx_u16m8_b2(__VA_ARGS__)

◆ vmadc_vx_u16mf2_b32

#define vmadc_vx_u16mf2_b32 ( ... ) __riscv_vmadc_vx_u16mf2_b32(__VA_ARGS__)

◆ vmadc_vx_u16mf4_b64

#define vmadc_vx_u16mf4_b64 ( ... ) __riscv_vmadc_vx_u16mf4_b64(__VA_ARGS__)

◆ vmadc_vx_u32m1_b32

#define vmadc_vx_u32m1_b32 ( ... ) __riscv_vmadc_vx_u32m1_b32(__VA_ARGS__)

◆ vmadc_vx_u32m2_b16

#define vmadc_vx_u32m2_b16 ( ... ) __riscv_vmadc_vx_u32m2_b16(__VA_ARGS__)

◆ vmadc_vx_u32m4_b8

#define vmadc_vx_u32m4_b8 ( ... ) __riscv_vmadc_vx_u32m4_b8(__VA_ARGS__)

◆ vmadc_vx_u32m8_b4

#define vmadc_vx_u32m8_b4 ( ... ) __riscv_vmadc_vx_u32m8_b4(__VA_ARGS__)

◆ vmadc_vx_u32mf2_b64

#define vmadc_vx_u32mf2_b64 ( ... ) __riscv_vmadc_vx_u32mf2_b64(__VA_ARGS__)

◆ vmadc_vx_u64m1_b64

#define vmadc_vx_u64m1_b64 ( ... ) __riscv_vmadc_vx_u64m1_b64(__VA_ARGS__)

◆ vmadc_vx_u64m2_b32

#define vmadc_vx_u64m2_b32 ( ... ) __riscv_vmadc_vx_u64m2_b32(__VA_ARGS__)

◆ vmadc_vx_u64m4_b16

#define vmadc_vx_u64m4_b16 ( ... ) __riscv_vmadc_vx_u64m4_b16(__VA_ARGS__)

◆ vmadc_vx_u64m8_b8

#define vmadc_vx_u64m8_b8 ( ... ) __riscv_vmadc_vx_u64m8_b8(__VA_ARGS__)

◆ vmadc_vx_u8m1_b8

#define vmadc_vx_u8m1_b8 ( ... ) __riscv_vmadc_vx_u8m1_b8(__VA_ARGS__)

◆ vmadc_vx_u8m2_b4

#define vmadc_vx_u8m2_b4 ( ... ) __riscv_vmadc_vx_u8m2_b4(__VA_ARGS__)

◆ vmadc_vx_u8m4_b2

#define vmadc_vx_u8m4_b2 ( ... ) __riscv_vmadc_vx_u8m4_b2(__VA_ARGS__)

◆ vmadc_vx_u8m8_b1

#define vmadc_vx_u8m8_b1 ( ... ) __riscv_vmadc_vx_u8m8_b1(__VA_ARGS__)

◆ vmadc_vx_u8mf2_b16

#define vmadc_vx_u8mf2_b16 ( ... ) __riscv_vmadc_vx_u8mf2_b16(__VA_ARGS__)

◆ vmadc_vx_u8mf4_b32

#define vmadc_vx_u8mf4_b32 ( ... ) __riscv_vmadc_vx_u8mf4_b32(__VA_ARGS__)

◆ vmadc_vx_u8mf8_b64

#define vmadc_vx_u8mf8_b64 ( ... ) __riscv_vmadc_vx_u8mf8_b64(__VA_ARGS__)

◆ vmadc_vxm_i16m1_b16

#define vmadc_vxm_i16m1_b16 ( ... ) __riscv_vmadc_vxm_i16m1_b16(__VA_ARGS__)

◆ vmadc_vxm_i16m2_b8

#define vmadc_vxm_i16m2_b8 ( ... ) __riscv_vmadc_vxm_i16m2_b8(__VA_ARGS__)

◆ vmadc_vxm_i16m4_b4

#define vmadc_vxm_i16m4_b4 ( ... ) __riscv_vmadc_vxm_i16m4_b4(__VA_ARGS__)

◆ vmadc_vxm_i16m8_b2

#define vmadc_vxm_i16m8_b2 ( ... ) __riscv_vmadc_vxm_i16m8_b2(__VA_ARGS__)

◆ vmadc_vxm_i16mf2_b32

#define vmadc_vxm_i16mf2_b32 ( ... ) __riscv_vmadc_vxm_i16mf2_b32(__VA_ARGS__)

◆ vmadc_vxm_i16mf4_b64

#define vmadc_vxm_i16mf4_b64 ( ... ) __riscv_vmadc_vxm_i16mf4_b64(__VA_ARGS__)

◆ vmadc_vxm_i32m1_b32

#define vmadc_vxm_i32m1_b32 ( ... ) __riscv_vmadc_vxm_i32m1_b32(__VA_ARGS__)

◆ vmadc_vxm_i32m2_b16

#define vmadc_vxm_i32m2_b16 ( ... ) __riscv_vmadc_vxm_i32m2_b16(__VA_ARGS__)

◆ vmadc_vxm_i32m4_b8

#define vmadc_vxm_i32m4_b8 ( ... ) __riscv_vmadc_vxm_i32m4_b8(__VA_ARGS__)

◆ vmadc_vxm_i32m8_b4

#define vmadc_vxm_i32m8_b4 ( ... ) __riscv_vmadc_vxm_i32m8_b4(__VA_ARGS__)

◆ vmadc_vxm_i32mf2_b64

#define vmadc_vxm_i32mf2_b64 ( ... ) __riscv_vmadc_vxm_i32mf2_b64(__VA_ARGS__)

◆ vmadc_vxm_i64m1_b64

#define vmadc_vxm_i64m1_b64 ( ... ) __riscv_vmadc_vxm_i64m1_b64(__VA_ARGS__)

◆ vmadc_vxm_i64m2_b32

#define vmadc_vxm_i64m2_b32 ( ... ) __riscv_vmadc_vxm_i64m2_b32(__VA_ARGS__)

◆ vmadc_vxm_i64m4_b16

#define vmadc_vxm_i64m4_b16 ( ... ) __riscv_vmadc_vxm_i64m4_b16(__VA_ARGS__)

◆ vmadc_vxm_i64m8_b8

#define vmadc_vxm_i64m8_b8 ( ... ) __riscv_vmadc_vxm_i64m8_b8(__VA_ARGS__)

◆ vmadc_vxm_i8m1_b8

#define vmadc_vxm_i8m1_b8 ( ... ) __riscv_vmadc_vxm_i8m1_b8(__VA_ARGS__)

◆ vmadc_vxm_i8m2_b4

#define vmadc_vxm_i8m2_b4 ( ... ) __riscv_vmadc_vxm_i8m2_b4(__VA_ARGS__)

◆ vmadc_vxm_i8m4_b2

#define vmadc_vxm_i8m4_b2 ( ... ) __riscv_vmadc_vxm_i8m4_b2(__VA_ARGS__)

◆ vmadc_vxm_i8m8_b1

#define vmadc_vxm_i8m8_b1 ( ... ) __riscv_vmadc_vxm_i8m8_b1(__VA_ARGS__)

◆ vmadc_vxm_i8mf2_b16

#define vmadc_vxm_i8mf2_b16 ( ... ) __riscv_vmadc_vxm_i8mf2_b16(__VA_ARGS__)

◆ vmadc_vxm_i8mf4_b32

#define vmadc_vxm_i8mf4_b32 ( ... ) __riscv_vmadc_vxm_i8mf4_b32(__VA_ARGS__)

◆ vmadc_vxm_i8mf8_b64

#define vmadc_vxm_i8mf8_b64 ( ... ) __riscv_vmadc_vxm_i8mf8_b64(__VA_ARGS__)

◆ vmadc_vxm_u16m1_b16

#define vmadc_vxm_u16m1_b16 ( ... ) __riscv_vmadc_vxm_u16m1_b16(__VA_ARGS__)

◆ vmadc_vxm_u16m2_b8

#define vmadc_vxm_u16m2_b8 ( ... ) __riscv_vmadc_vxm_u16m2_b8(__VA_ARGS__)

◆ vmadc_vxm_u16m4_b4

#define vmadc_vxm_u16m4_b4 ( ... ) __riscv_vmadc_vxm_u16m4_b4(__VA_ARGS__)

◆ vmadc_vxm_u16m8_b2

#define vmadc_vxm_u16m8_b2 ( ... ) __riscv_vmadc_vxm_u16m8_b2(__VA_ARGS__)

◆ vmadc_vxm_u16mf2_b32

#define vmadc_vxm_u16mf2_b32 ( ... ) __riscv_vmadc_vxm_u16mf2_b32(__VA_ARGS__)

◆ vmadc_vxm_u16mf4_b64

#define vmadc_vxm_u16mf4_b64 ( ... ) __riscv_vmadc_vxm_u16mf4_b64(__VA_ARGS__)

◆ vmadc_vxm_u32m1_b32

#define vmadc_vxm_u32m1_b32 ( ... ) __riscv_vmadc_vxm_u32m1_b32(__VA_ARGS__)

◆ vmadc_vxm_u32m2_b16

#define vmadc_vxm_u32m2_b16 ( ... ) __riscv_vmadc_vxm_u32m2_b16(__VA_ARGS__)

◆ vmadc_vxm_u32m4_b8

#define vmadc_vxm_u32m4_b8 ( ... ) __riscv_vmadc_vxm_u32m4_b8(__VA_ARGS__)

◆ vmadc_vxm_u32m8_b4

#define vmadc_vxm_u32m8_b4 ( ... ) __riscv_vmadc_vxm_u32m8_b4(__VA_ARGS__)

◆ vmadc_vxm_u32mf2_b64

#define vmadc_vxm_u32mf2_b64 ( ... ) __riscv_vmadc_vxm_u32mf2_b64(__VA_ARGS__)

◆ vmadc_vxm_u64m1_b64

#define vmadc_vxm_u64m1_b64 ( ... ) __riscv_vmadc_vxm_u64m1_b64(__VA_ARGS__)

◆ vmadc_vxm_u64m2_b32

#define vmadc_vxm_u64m2_b32 ( ... ) __riscv_vmadc_vxm_u64m2_b32(__VA_ARGS__)

◆ vmadc_vxm_u64m4_b16

#define vmadc_vxm_u64m4_b16 ( ... ) __riscv_vmadc_vxm_u64m4_b16(__VA_ARGS__)

◆ vmadc_vxm_u64m8_b8

#define vmadc_vxm_u64m8_b8 ( ... ) __riscv_vmadc_vxm_u64m8_b8(__VA_ARGS__)

◆ vmadc_vxm_u8m1_b8

#define vmadc_vxm_u8m1_b8 ( ... ) __riscv_vmadc_vxm_u8m1_b8(__VA_ARGS__)

◆ vmadc_vxm_u8m2_b4

#define vmadc_vxm_u8m2_b4 ( ... ) __riscv_vmadc_vxm_u8m2_b4(__VA_ARGS__)

◆ vmadc_vxm_u8m4_b2

#define vmadc_vxm_u8m4_b2 ( ... ) __riscv_vmadc_vxm_u8m4_b2(__VA_ARGS__)

◆ vmadc_vxm_u8m8_b1

#define vmadc_vxm_u8m8_b1 ( ... ) __riscv_vmadc_vxm_u8m8_b1(__VA_ARGS__)

◆ vmadc_vxm_u8mf2_b16

#define vmadc_vxm_u8mf2_b16 ( ... ) __riscv_vmadc_vxm_u8mf2_b16(__VA_ARGS__)

◆ vmadc_vxm_u8mf4_b32

#define vmadc_vxm_u8mf4_b32 ( ... ) __riscv_vmadc_vxm_u8mf4_b32(__VA_ARGS__)

◆ vmadc_vxm_u8mf8_b64

#define vmadc_vxm_u8mf8_b64 ( ... ) __riscv_vmadc_vxm_u8mf8_b64(__VA_ARGS__)

◆ vmadd_vv_i16m1

#define vmadd_vv_i16m1 ( ... ) __riscv_vmadd_vv_i16m1_tu(__VA_ARGS__)

◆ vmadd_vv_i16m1_m

#define vmadd_vv_i16m1_m ( ... ) __riscv_vmadd_vv_i16m1_tumu(__VA_ARGS__)

◆ vmadd_vv_i16m2

#define vmadd_vv_i16m2 ( ... ) __riscv_vmadd_vv_i16m2_tu(__VA_ARGS__)

◆ vmadd_vv_i16m2_m

#define vmadd_vv_i16m2_m ( ... ) __riscv_vmadd_vv_i16m2_tumu(__VA_ARGS__)

◆ vmadd_vv_i16m4

#define vmadd_vv_i16m4 ( ... ) __riscv_vmadd_vv_i16m4_tu(__VA_ARGS__)

◆ vmadd_vv_i16m4_m

#define vmadd_vv_i16m4_m ( ... ) __riscv_vmadd_vv_i16m4_tumu(__VA_ARGS__)

◆ vmadd_vv_i16m8

#define vmadd_vv_i16m8 ( ... ) __riscv_vmadd_vv_i16m8_tu(__VA_ARGS__)

◆ vmadd_vv_i16m8_m

#define vmadd_vv_i16m8_m ( ... ) __riscv_vmadd_vv_i16m8_tumu(__VA_ARGS__)

◆ vmadd_vv_i16mf2

#define vmadd_vv_i16mf2 ( ... ) __riscv_vmadd_vv_i16mf2_tu(__VA_ARGS__)

◆ vmadd_vv_i16mf2_m

#define vmadd_vv_i16mf2_m ( ... ) __riscv_vmadd_vv_i16mf2_tumu(__VA_ARGS__)

◆ vmadd_vv_i16mf4

#define vmadd_vv_i16mf4 ( ... ) __riscv_vmadd_vv_i16mf4_tu(__VA_ARGS__)

◆ vmadd_vv_i16mf4_m

#define vmadd_vv_i16mf4_m ( ... ) __riscv_vmadd_vv_i16mf4_tumu(__VA_ARGS__)

◆ vmadd_vv_i32m1

#define vmadd_vv_i32m1 ( ... ) __riscv_vmadd_vv_i32m1_tu(__VA_ARGS__)

◆ vmadd_vv_i32m1_m

#define vmadd_vv_i32m1_m ( ... ) __riscv_vmadd_vv_i32m1_tumu(__VA_ARGS__)

◆ vmadd_vv_i32m2

#define vmadd_vv_i32m2 ( ... ) __riscv_vmadd_vv_i32m2_tu(__VA_ARGS__)

◆ vmadd_vv_i32m2_m

#define vmadd_vv_i32m2_m ( ... ) __riscv_vmadd_vv_i32m2_tumu(__VA_ARGS__)

◆ vmadd_vv_i32m4

#define vmadd_vv_i32m4 ( ... ) __riscv_vmadd_vv_i32m4_tu(__VA_ARGS__)

◆ vmadd_vv_i32m4_m

#define vmadd_vv_i32m4_m ( ... ) __riscv_vmadd_vv_i32m4_tumu(__VA_ARGS__)

◆ vmadd_vv_i32m8

#define vmadd_vv_i32m8 ( ... ) __riscv_vmadd_vv_i32m8_tu(__VA_ARGS__)

◆ vmadd_vv_i32m8_m

#define vmadd_vv_i32m8_m ( ... ) __riscv_vmadd_vv_i32m8_tumu(__VA_ARGS__)

◆ vmadd_vv_i32mf2

#define vmadd_vv_i32mf2 ( ... ) __riscv_vmadd_vv_i32mf2_tu(__VA_ARGS__)

◆ vmadd_vv_i32mf2_m

#define vmadd_vv_i32mf2_m ( ... ) __riscv_vmadd_vv_i32mf2_tumu(__VA_ARGS__)

◆ vmadd_vv_i64m1

#define vmadd_vv_i64m1 ( ... ) __riscv_vmadd_vv_i64m1_tu(__VA_ARGS__)

◆ vmadd_vv_i64m1_m

#define vmadd_vv_i64m1_m ( ... ) __riscv_vmadd_vv_i64m1_tumu(__VA_ARGS__)

◆ vmadd_vv_i64m2

#define vmadd_vv_i64m2 ( ... ) __riscv_vmadd_vv_i64m2_tu(__VA_ARGS__)

◆ vmadd_vv_i64m2_m

#define vmadd_vv_i64m2_m ( ... ) __riscv_vmadd_vv_i64m2_tumu(__VA_ARGS__)

◆ vmadd_vv_i64m4

#define vmadd_vv_i64m4 ( ... ) __riscv_vmadd_vv_i64m4_tu(__VA_ARGS__)

◆ vmadd_vv_i64m4_m

#define vmadd_vv_i64m4_m ( ... ) __riscv_vmadd_vv_i64m4_tumu(__VA_ARGS__)

◆ vmadd_vv_i64m8

#define vmadd_vv_i64m8 ( ... ) __riscv_vmadd_vv_i64m8_tu(__VA_ARGS__)

◆ vmadd_vv_i64m8_m

#define vmadd_vv_i64m8_m ( ... ) __riscv_vmadd_vv_i64m8_tumu(__VA_ARGS__)

◆ vmadd_vv_i8m1

#define vmadd_vv_i8m1 ( ... ) __riscv_vmadd_vv_i8m1_tu(__VA_ARGS__)

◆ vmadd_vv_i8m1_m

#define vmadd_vv_i8m1_m ( ... ) __riscv_vmadd_vv_i8m1_tumu(__VA_ARGS__)

◆ vmadd_vv_i8m2

#define vmadd_vv_i8m2 ( ... ) __riscv_vmadd_vv_i8m2_tu(__VA_ARGS__)

◆ vmadd_vv_i8m2_m

#define vmadd_vv_i8m2_m ( ... ) __riscv_vmadd_vv_i8m2_tumu(__VA_ARGS__)

◆ vmadd_vv_i8m4

#define vmadd_vv_i8m4 ( ... ) __riscv_vmadd_vv_i8m4_tu(__VA_ARGS__)

◆ vmadd_vv_i8m4_m

#define vmadd_vv_i8m4_m ( ... ) __riscv_vmadd_vv_i8m4_tumu(__VA_ARGS__)

◆ vmadd_vv_i8m8

#define vmadd_vv_i8m8 ( ... ) __riscv_vmadd_vv_i8m8_tu(__VA_ARGS__)

◆ vmadd_vv_i8m8_m

#define vmadd_vv_i8m8_m ( ... ) __riscv_vmadd_vv_i8m8_tumu(__VA_ARGS__)

◆ vmadd_vv_i8mf2

#define vmadd_vv_i8mf2 ( ... ) __riscv_vmadd_vv_i8mf2_tu(__VA_ARGS__)

◆ vmadd_vv_i8mf2_m

#define vmadd_vv_i8mf2_m ( ... ) __riscv_vmadd_vv_i8mf2_tumu(__VA_ARGS__)

◆ vmadd_vv_i8mf4

#define vmadd_vv_i8mf4 ( ... ) __riscv_vmadd_vv_i8mf4_tu(__VA_ARGS__)

◆ vmadd_vv_i8mf4_m

#define vmadd_vv_i8mf4_m ( ... ) __riscv_vmadd_vv_i8mf4_tumu(__VA_ARGS__)

◆ vmadd_vv_i8mf8

#define vmadd_vv_i8mf8 ( ... ) __riscv_vmadd_vv_i8mf8_tu(__VA_ARGS__)

◆ vmadd_vv_i8mf8_m

#define vmadd_vv_i8mf8_m ( ... ) __riscv_vmadd_vv_i8mf8_tumu(__VA_ARGS__)

◆ vmadd_vv_u16m1

#define vmadd_vv_u16m1 ( ... ) __riscv_vmadd_vv_u16m1_tu(__VA_ARGS__)

◆ vmadd_vv_u16m1_m

#define vmadd_vv_u16m1_m ( ... ) __riscv_vmadd_vv_u16m1_tumu(__VA_ARGS__)

◆ vmadd_vv_u16m2

#define vmadd_vv_u16m2 ( ... ) __riscv_vmadd_vv_u16m2_tu(__VA_ARGS__)

◆ vmadd_vv_u16m2_m

#define vmadd_vv_u16m2_m ( ... ) __riscv_vmadd_vv_u16m2_tumu(__VA_ARGS__)

◆ vmadd_vv_u16m4

#define vmadd_vv_u16m4 ( ... ) __riscv_vmadd_vv_u16m4_tu(__VA_ARGS__)

◆ vmadd_vv_u16m4_m

#define vmadd_vv_u16m4_m ( ... ) __riscv_vmadd_vv_u16m4_tumu(__VA_ARGS__)

◆ vmadd_vv_u16m8

#define vmadd_vv_u16m8 ( ... ) __riscv_vmadd_vv_u16m8_tu(__VA_ARGS__)

◆ vmadd_vv_u16m8_m

#define vmadd_vv_u16m8_m ( ... ) __riscv_vmadd_vv_u16m8_tumu(__VA_ARGS__)

◆ vmadd_vv_u16mf2

#define vmadd_vv_u16mf2 ( ... ) __riscv_vmadd_vv_u16mf2_tu(__VA_ARGS__)

◆ vmadd_vv_u16mf2_m

#define vmadd_vv_u16mf2_m ( ... ) __riscv_vmadd_vv_u16mf2_tumu(__VA_ARGS__)

◆ vmadd_vv_u16mf4

#define vmadd_vv_u16mf4 ( ... ) __riscv_vmadd_vv_u16mf4_tu(__VA_ARGS__)

◆ vmadd_vv_u16mf4_m

#define vmadd_vv_u16mf4_m ( ... ) __riscv_vmadd_vv_u16mf4_tumu(__VA_ARGS__)

◆ vmadd_vv_u32m1

#define vmadd_vv_u32m1 ( ... ) __riscv_vmadd_vv_u32m1_tu(__VA_ARGS__)

◆ vmadd_vv_u32m1_m

#define vmadd_vv_u32m1_m ( ... ) __riscv_vmadd_vv_u32m1_tumu(__VA_ARGS__)

◆ vmadd_vv_u32m2

#define vmadd_vv_u32m2 ( ... ) __riscv_vmadd_vv_u32m2_tu(__VA_ARGS__)

◆ vmadd_vv_u32m2_m

#define vmadd_vv_u32m2_m ( ... ) __riscv_vmadd_vv_u32m2_tumu(__VA_ARGS__)

◆ vmadd_vv_u32m4

#define vmadd_vv_u32m4 ( ... ) __riscv_vmadd_vv_u32m4_tu(__VA_ARGS__)

◆ vmadd_vv_u32m4_m

#define vmadd_vv_u32m4_m ( ... ) __riscv_vmadd_vv_u32m4_tumu(__VA_ARGS__)

◆ vmadd_vv_u32m8

#define vmadd_vv_u32m8 ( ... ) __riscv_vmadd_vv_u32m8_tu(__VA_ARGS__)

◆ vmadd_vv_u32m8_m

#define vmadd_vv_u32m8_m ( ... ) __riscv_vmadd_vv_u32m8_tumu(__VA_ARGS__)

◆ vmadd_vv_u32mf2

#define vmadd_vv_u32mf2 ( ... ) __riscv_vmadd_vv_u32mf2_tu(__VA_ARGS__)

◆ vmadd_vv_u32mf2_m

#define vmadd_vv_u32mf2_m ( ... ) __riscv_vmadd_vv_u32mf2_tumu(__VA_ARGS__)

◆ vmadd_vv_u64m1

#define vmadd_vv_u64m1 ( ... ) __riscv_vmadd_vv_u64m1_tu(__VA_ARGS__)

◆ vmadd_vv_u64m1_m

#define vmadd_vv_u64m1_m ( ... ) __riscv_vmadd_vv_u64m1_tumu(__VA_ARGS__)

◆ vmadd_vv_u64m2

#define vmadd_vv_u64m2 ( ... ) __riscv_vmadd_vv_u64m2_tu(__VA_ARGS__)

◆ vmadd_vv_u64m2_m

#define vmadd_vv_u64m2_m ( ... ) __riscv_vmadd_vv_u64m2_tumu(__VA_ARGS__)

◆ vmadd_vv_u64m4

#define vmadd_vv_u64m4 ( ... ) __riscv_vmadd_vv_u64m4_tu(__VA_ARGS__)

◆ vmadd_vv_u64m4_m

#define vmadd_vv_u64m4_m ( ... ) __riscv_vmadd_vv_u64m4_tumu(__VA_ARGS__)

◆ vmadd_vv_u64m8

#define vmadd_vv_u64m8 ( ... ) __riscv_vmadd_vv_u64m8_tu(__VA_ARGS__)

◆ vmadd_vv_u64m8_m

#define vmadd_vv_u64m8_m ( ... ) __riscv_vmadd_vv_u64m8_tumu(__VA_ARGS__)

◆ vmadd_vv_u8m1

#define vmadd_vv_u8m1 ( ... ) __riscv_vmadd_vv_u8m1_tu(__VA_ARGS__)

◆ vmadd_vv_u8m1_m

#define vmadd_vv_u8m1_m ( ... ) __riscv_vmadd_vv_u8m1_tumu(__VA_ARGS__)

◆ vmadd_vv_u8m2

#define vmadd_vv_u8m2 ( ... ) __riscv_vmadd_vv_u8m2_tu(__VA_ARGS__)

◆ vmadd_vv_u8m2_m

#define vmadd_vv_u8m2_m ( ... ) __riscv_vmadd_vv_u8m2_tumu(__VA_ARGS__)

◆ vmadd_vv_u8m4

#define vmadd_vv_u8m4 ( ... ) __riscv_vmadd_vv_u8m4_tu(__VA_ARGS__)

◆ vmadd_vv_u8m4_m

#define vmadd_vv_u8m4_m ( ... ) __riscv_vmadd_vv_u8m4_tumu(__VA_ARGS__)

◆ vmadd_vv_u8m8

#define vmadd_vv_u8m8 ( ... ) __riscv_vmadd_vv_u8m8_tu(__VA_ARGS__)

◆ vmadd_vv_u8m8_m

#define vmadd_vv_u8m8_m ( ... ) __riscv_vmadd_vv_u8m8_tumu(__VA_ARGS__)

◆ vmadd_vv_u8mf2

#define vmadd_vv_u8mf2 ( ... ) __riscv_vmadd_vv_u8mf2_tu(__VA_ARGS__)

◆ vmadd_vv_u8mf2_m

#define vmadd_vv_u8mf2_m ( ... ) __riscv_vmadd_vv_u8mf2_tumu(__VA_ARGS__)

◆ vmadd_vv_u8mf4

#define vmadd_vv_u8mf4 ( ... ) __riscv_vmadd_vv_u8mf4_tu(__VA_ARGS__)

◆ vmadd_vv_u8mf4_m

#define vmadd_vv_u8mf4_m ( ... ) __riscv_vmadd_vv_u8mf4_tumu(__VA_ARGS__)

◆ vmadd_vv_u8mf8

#define vmadd_vv_u8mf8 ( ... ) __riscv_vmadd_vv_u8mf8_tu(__VA_ARGS__)

◆ vmadd_vv_u8mf8_m

#define vmadd_vv_u8mf8_m ( ... ) __riscv_vmadd_vv_u8mf8_tumu(__VA_ARGS__)

◆ vmadd_vx_i16m1

#define vmadd_vx_i16m1 ( ... ) __riscv_vmadd_vx_i16m1_tu(__VA_ARGS__)

◆ vmadd_vx_i16m1_m

#define vmadd_vx_i16m1_m ( ... ) __riscv_vmadd_vx_i16m1_tumu(__VA_ARGS__)

◆ vmadd_vx_i16m2

#define vmadd_vx_i16m2 ( ... ) __riscv_vmadd_vx_i16m2_tu(__VA_ARGS__)

◆ vmadd_vx_i16m2_m

#define vmadd_vx_i16m2_m ( ... ) __riscv_vmadd_vx_i16m2_tumu(__VA_ARGS__)

◆ vmadd_vx_i16m4

#define vmadd_vx_i16m4 ( ... ) __riscv_vmadd_vx_i16m4_tu(__VA_ARGS__)

◆ vmadd_vx_i16m4_m

#define vmadd_vx_i16m4_m ( ... ) __riscv_vmadd_vx_i16m4_tumu(__VA_ARGS__)

◆ vmadd_vx_i16m8

#define vmadd_vx_i16m8 ( ... ) __riscv_vmadd_vx_i16m8_tu(__VA_ARGS__)

◆ vmadd_vx_i16m8_m

#define vmadd_vx_i16m8_m ( ... ) __riscv_vmadd_vx_i16m8_tumu(__VA_ARGS__)

◆ vmadd_vx_i16mf2

#define vmadd_vx_i16mf2 ( ... ) __riscv_vmadd_vx_i16mf2_tu(__VA_ARGS__)

◆ vmadd_vx_i16mf2_m

#define vmadd_vx_i16mf2_m ( ... ) __riscv_vmadd_vx_i16mf2_tumu(__VA_ARGS__)

◆ vmadd_vx_i16mf4

#define vmadd_vx_i16mf4 ( ... ) __riscv_vmadd_vx_i16mf4_tu(__VA_ARGS__)

◆ vmadd_vx_i16mf4_m

#define vmadd_vx_i16mf4_m ( ... ) __riscv_vmadd_vx_i16mf4_tumu(__VA_ARGS__)

◆ vmadd_vx_i32m1

#define vmadd_vx_i32m1 ( ... ) __riscv_vmadd_vx_i32m1_tu(__VA_ARGS__)

◆ vmadd_vx_i32m1_m

#define vmadd_vx_i32m1_m ( ... ) __riscv_vmadd_vx_i32m1_tumu(__VA_ARGS__)

◆ vmadd_vx_i32m2

#define vmadd_vx_i32m2 ( ... ) __riscv_vmadd_vx_i32m2_tu(__VA_ARGS__)

◆ vmadd_vx_i32m2_m

#define vmadd_vx_i32m2_m ( ... ) __riscv_vmadd_vx_i32m2_tumu(__VA_ARGS__)

◆ vmadd_vx_i32m4

#define vmadd_vx_i32m4 ( ... ) __riscv_vmadd_vx_i32m4_tu(__VA_ARGS__)

◆ vmadd_vx_i32m4_m

#define vmadd_vx_i32m4_m ( ... ) __riscv_vmadd_vx_i32m4_tumu(__VA_ARGS__)

◆ vmadd_vx_i32m8

#define vmadd_vx_i32m8 ( ... ) __riscv_vmadd_vx_i32m8_tu(__VA_ARGS__)

◆ vmadd_vx_i32m8_m

#define vmadd_vx_i32m8_m ( ... ) __riscv_vmadd_vx_i32m8_tumu(__VA_ARGS__)

◆ vmadd_vx_i32mf2

#define vmadd_vx_i32mf2 ( ... ) __riscv_vmadd_vx_i32mf2_tu(__VA_ARGS__)

◆ vmadd_vx_i32mf2_m

#define vmadd_vx_i32mf2_m ( ... ) __riscv_vmadd_vx_i32mf2_tumu(__VA_ARGS__)

◆ vmadd_vx_i64m1

#define vmadd_vx_i64m1 ( ... ) __riscv_vmadd_vx_i64m1_tu(__VA_ARGS__)

◆ vmadd_vx_i64m1_m

#define vmadd_vx_i64m1_m ( ... ) __riscv_vmadd_vx_i64m1_tumu(__VA_ARGS__)

◆ vmadd_vx_i64m2

#define vmadd_vx_i64m2 ( ... ) __riscv_vmadd_vx_i64m2_tu(__VA_ARGS__)

◆ vmadd_vx_i64m2_m

#define vmadd_vx_i64m2_m ( ... ) __riscv_vmadd_vx_i64m2_tumu(__VA_ARGS__)

◆ vmadd_vx_i64m4

#define vmadd_vx_i64m4 ( ... ) __riscv_vmadd_vx_i64m4_tu(__VA_ARGS__)

◆ vmadd_vx_i64m4_m

#define vmadd_vx_i64m4_m ( ... ) __riscv_vmadd_vx_i64m4_tumu(__VA_ARGS__)

◆ vmadd_vx_i64m8

#define vmadd_vx_i64m8 ( ... ) __riscv_vmadd_vx_i64m8_tu(__VA_ARGS__)

◆ vmadd_vx_i64m8_m

#define vmadd_vx_i64m8_m ( ... ) __riscv_vmadd_vx_i64m8_tumu(__VA_ARGS__)

◆ vmadd_vx_i8m1

#define vmadd_vx_i8m1 ( ... ) __riscv_vmadd_vx_i8m1_tu(__VA_ARGS__)

◆ vmadd_vx_i8m1_m

#define vmadd_vx_i8m1_m ( ... ) __riscv_vmadd_vx_i8m1_tumu(__VA_ARGS__)

◆ vmadd_vx_i8m2

#define vmadd_vx_i8m2 ( ... ) __riscv_vmadd_vx_i8m2_tu(__VA_ARGS__)

◆ vmadd_vx_i8m2_m

#define vmadd_vx_i8m2_m ( ... ) __riscv_vmadd_vx_i8m2_tumu(__VA_ARGS__)

◆ vmadd_vx_i8m4

#define vmadd_vx_i8m4 ( ... ) __riscv_vmadd_vx_i8m4_tu(__VA_ARGS__)

◆ vmadd_vx_i8m4_m

#define vmadd_vx_i8m4_m ( ... ) __riscv_vmadd_vx_i8m4_tumu(__VA_ARGS__)

◆ vmadd_vx_i8m8

#define vmadd_vx_i8m8 ( ... ) __riscv_vmadd_vx_i8m8_tu(__VA_ARGS__)

◆ vmadd_vx_i8m8_m

#define vmadd_vx_i8m8_m ( ... ) __riscv_vmadd_vx_i8m8_tumu(__VA_ARGS__)

◆ vmadd_vx_i8mf2

#define vmadd_vx_i8mf2 ( ... ) __riscv_vmadd_vx_i8mf2_tu(__VA_ARGS__)

◆ vmadd_vx_i8mf2_m

#define vmadd_vx_i8mf2_m ( ... ) __riscv_vmadd_vx_i8mf2_tumu(__VA_ARGS__)

◆ vmadd_vx_i8mf4

#define vmadd_vx_i8mf4 ( ... ) __riscv_vmadd_vx_i8mf4_tu(__VA_ARGS__)

◆ vmadd_vx_i8mf4_m

#define vmadd_vx_i8mf4_m ( ... ) __riscv_vmadd_vx_i8mf4_tumu(__VA_ARGS__)

◆ vmadd_vx_i8mf8

#define vmadd_vx_i8mf8 ( ... ) __riscv_vmadd_vx_i8mf8_tu(__VA_ARGS__)

◆ vmadd_vx_i8mf8_m

#define vmadd_vx_i8mf8_m ( ... ) __riscv_vmadd_vx_i8mf8_tumu(__VA_ARGS__)

◆ vmadd_vx_u16m1

#define vmadd_vx_u16m1 ( ... ) __riscv_vmadd_vx_u16m1_tu(__VA_ARGS__)

◆ vmadd_vx_u16m1_m

#define vmadd_vx_u16m1_m ( ... ) __riscv_vmadd_vx_u16m1_tumu(__VA_ARGS__)

◆ vmadd_vx_u16m2

#define vmadd_vx_u16m2 ( ... ) __riscv_vmadd_vx_u16m2_tu(__VA_ARGS__)

◆ vmadd_vx_u16m2_m

#define vmadd_vx_u16m2_m ( ... ) __riscv_vmadd_vx_u16m2_tumu(__VA_ARGS__)

◆ vmadd_vx_u16m4

#define vmadd_vx_u16m4 ( ... ) __riscv_vmadd_vx_u16m4_tu(__VA_ARGS__)

◆ vmadd_vx_u16m4_m

#define vmadd_vx_u16m4_m ( ... ) __riscv_vmadd_vx_u16m4_tumu(__VA_ARGS__)

◆ vmadd_vx_u16m8

#define vmadd_vx_u16m8 ( ... ) __riscv_vmadd_vx_u16m8_tu(__VA_ARGS__)

◆ vmadd_vx_u16m8_m

#define vmadd_vx_u16m8_m ( ... ) __riscv_vmadd_vx_u16m8_tumu(__VA_ARGS__)

◆ vmadd_vx_u16mf2

#define vmadd_vx_u16mf2 ( ... ) __riscv_vmadd_vx_u16mf2_tu(__VA_ARGS__)

◆ vmadd_vx_u16mf2_m

#define vmadd_vx_u16mf2_m ( ... ) __riscv_vmadd_vx_u16mf2_tumu(__VA_ARGS__)

◆ vmadd_vx_u16mf4

#define vmadd_vx_u16mf4 ( ... ) __riscv_vmadd_vx_u16mf4_tu(__VA_ARGS__)

◆ vmadd_vx_u16mf4_m

#define vmadd_vx_u16mf4_m ( ... ) __riscv_vmadd_vx_u16mf4_tumu(__VA_ARGS__)

◆ vmadd_vx_u32m1

#define vmadd_vx_u32m1 ( ... ) __riscv_vmadd_vx_u32m1_tu(__VA_ARGS__)

◆ vmadd_vx_u32m1_m

#define vmadd_vx_u32m1_m ( ... ) __riscv_vmadd_vx_u32m1_tumu(__VA_ARGS__)

◆ vmadd_vx_u32m2

#define vmadd_vx_u32m2 ( ... ) __riscv_vmadd_vx_u32m2_tu(__VA_ARGS__)

◆ vmadd_vx_u32m2_m

#define vmadd_vx_u32m2_m ( ... ) __riscv_vmadd_vx_u32m2_tumu(__VA_ARGS__)

◆ vmadd_vx_u32m4

#define vmadd_vx_u32m4 ( ... ) __riscv_vmadd_vx_u32m4_tu(__VA_ARGS__)

◆ vmadd_vx_u32m4_m

#define vmadd_vx_u32m4_m ( ... ) __riscv_vmadd_vx_u32m4_tumu(__VA_ARGS__)

◆ vmadd_vx_u32m8

#define vmadd_vx_u32m8 ( ... ) __riscv_vmadd_vx_u32m8_tu(__VA_ARGS__)

◆ vmadd_vx_u32m8_m

#define vmadd_vx_u32m8_m ( ... ) __riscv_vmadd_vx_u32m8_tumu(__VA_ARGS__)

◆ vmadd_vx_u32mf2

#define vmadd_vx_u32mf2 ( ... ) __riscv_vmadd_vx_u32mf2_tu(__VA_ARGS__)

◆ vmadd_vx_u32mf2_m

#define vmadd_vx_u32mf2_m ( ... ) __riscv_vmadd_vx_u32mf2_tumu(__VA_ARGS__)

◆ vmadd_vx_u64m1

#define vmadd_vx_u64m1 ( ... ) __riscv_vmadd_vx_u64m1_tu(__VA_ARGS__)

◆ vmadd_vx_u64m1_m

#define vmadd_vx_u64m1_m ( ... ) __riscv_vmadd_vx_u64m1_tumu(__VA_ARGS__)

◆ vmadd_vx_u64m2

#define vmadd_vx_u64m2 ( ... ) __riscv_vmadd_vx_u64m2_tu(__VA_ARGS__)

◆ vmadd_vx_u64m2_m

#define vmadd_vx_u64m2_m ( ... ) __riscv_vmadd_vx_u64m2_tumu(__VA_ARGS__)

◆ vmadd_vx_u64m4

#define vmadd_vx_u64m4 ( ... ) __riscv_vmadd_vx_u64m4_tu(__VA_ARGS__)

◆ vmadd_vx_u64m4_m

#define vmadd_vx_u64m4_m ( ... ) __riscv_vmadd_vx_u64m4_tumu(__VA_ARGS__)

◆ vmadd_vx_u64m8

#define vmadd_vx_u64m8 ( ... ) __riscv_vmadd_vx_u64m8_tu(__VA_ARGS__)

◆ vmadd_vx_u64m8_m

#define vmadd_vx_u64m8_m ( ... ) __riscv_vmadd_vx_u64m8_tumu(__VA_ARGS__)

◆ vmadd_vx_u8m1

#define vmadd_vx_u8m1 ( ... ) __riscv_vmadd_vx_u8m1_tu(__VA_ARGS__)

◆ vmadd_vx_u8m1_m

#define vmadd_vx_u8m1_m ( ... ) __riscv_vmadd_vx_u8m1_tumu(__VA_ARGS__)

◆ vmadd_vx_u8m2

#define vmadd_vx_u8m2 ( ... ) __riscv_vmadd_vx_u8m2_tu(__VA_ARGS__)

◆ vmadd_vx_u8m2_m

#define vmadd_vx_u8m2_m ( ... ) __riscv_vmadd_vx_u8m2_tumu(__VA_ARGS__)

◆ vmadd_vx_u8m4

#define vmadd_vx_u8m4 ( ... ) __riscv_vmadd_vx_u8m4_tu(__VA_ARGS__)

◆ vmadd_vx_u8m4_m

#define vmadd_vx_u8m4_m ( ... ) __riscv_vmadd_vx_u8m4_tumu(__VA_ARGS__)

◆ vmadd_vx_u8m8

#define vmadd_vx_u8m8 ( ... ) __riscv_vmadd_vx_u8m8_tu(__VA_ARGS__)

◆ vmadd_vx_u8m8_m

#define vmadd_vx_u8m8_m ( ... ) __riscv_vmadd_vx_u8m8_tumu(__VA_ARGS__)

◆ vmadd_vx_u8mf2

#define vmadd_vx_u8mf2 ( ... ) __riscv_vmadd_vx_u8mf2_tu(__VA_ARGS__)

◆ vmadd_vx_u8mf2_m

#define vmadd_vx_u8mf2_m ( ... ) __riscv_vmadd_vx_u8mf2_tumu(__VA_ARGS__)

◆ vmadd_vx_u8mf4

#define vmadd_vx_u8mf4 ( ... ) __riscv_vmadd_vx_u8mf4_tu(__VA_ARGS__)

◆ vmadd_vx_u8mf4_m

#define vmadd_vx_u8mf4_m ( ... ) __riscv_vmadd_vx_u8mf4_tumu(__VA_ARGS__)

◆ vmadd_vx_u8mf8

#define vmadd_vx_u8mf8 ( ... ) __riscv_vmadd_vx_u8mf8_tu(__VA_ARGS__)

◆ vmadd_vx_u8mf8_m

#define vmadd_vx_u8mf8_m ( ... ) __riscv_vmadd_vx_u8mf8_tumu(__VA_ARGS__)

◆ vmand_mm_b1

#define vmand_mm_b1 ( ... ) __riscv_vmand_mm_b1(__VA_ARGS__)

◆ vmand_mm_b16

#define vmand_mm_b16 ( ... ) __riscv_vmand_mm_b16(__VA_ARGS__)

◆ vmand_mm_b2

#define vmand_mm_b2 ( ... ) __riscv_vmand_mm_b2(__VA_ARGS__)

◆ vmand_mm_b32

#define vmand_mm_b32 ( ... ) __riscv_vmand_mm_b32(__VA_ARGS__)

◆ vmand_mm_b4

#define vmand_mm_b4 ( ... ) __riscv_vmand_mm_b4(__VA_ARGS__)

◆ vmand_mm_b64

#define vmand_mm_b64 ( ... ) __riscv_vmand_mm_b64(__VA_ARGS__)

◆ vmand_mm_b8

#define vmand_mm_b8 ( ... ) __riscv_vmand_mm_b8(__VA_ARGS__)

◆ vmandn_mm_b1

#define vmandn_mm_b1 ( ... ) __riscv_vmandn_mm_b1(__VA_ARGS__)

◆ vmandn_mm_b16

#define vmandn_mm_b16 ( ... ) __riscv_vmandn_mm_b16(__VA_ARGS__)

◆ vmandn_mm_b2

#define vmandn_mm_b2 ( ... ) __riscv_vmandn_mm_b2(__VA_ARGS__)

◆ vmandn_mm_b32

#define vmandn_mm_b32 ( ... ) __riscv_vmandn_mm_b32(__VA_ARGS__)

◆ vmandn_mm_b4

#define vmandn_mm_b4 ( ... ) __riscv_vmandn_mm_b4(__VA_ARGS__)

◆ vmandn_mm_b64

#define vmandn_mm_b64 ( ... ) __riscv_vmandn_mm_b64(__VA_ARGS__)

◆ vmandn_mm_b8

#define vmandn_mm_b8 ( ... ) __riscv_vmandn_mm_b8(__VA_ARGS__)

◆ vmax_vv_i16m1

#define vmax_vv_i16m1 ( ... ) __riscv_vmax_vv_i16m1(__VA_ARGS__)

◆ vmax_vv_i16m1_m

#define vmax_vv_i16m1_m ( ... ) __riscv_vmax_vv_i16m1_tumu(__VA_ARGS__)

◆ vmax_vv_i16m2

#define vmax_vv_i16m2 ( ... ) __riscv_vmax_vv_i16m2(__VA_ARGS__)

◆ vmax_vv_i16m2_m

#define vmax_vv_i16m2_m ( ... ) __riscv_vmax_vv_i16m2_tumu(__VA_ARGS__)

◆ vmax_vv_i16m4

#define vmax_vv_i16m4 ( ... ) __riscv_vmax_vv_i16m4(__VA_ARGS__)

◆ vmax_vv_i16m4_m

#define vmax_vv_i16m4_m ( ... ) __riscv_vmax_vv_i16m4_tumu(__VA_ARGS__)

◆ vmax_vv_i16m8

#define vmax_vv_i16m8 ( ... ) __riscv_vmax_vv_i16m8(__VA_ARGS__)

◆ vmax_vv_i16m8_m

#define vmax_vv_i16m8_m ( ... ) __riscv_vmax_vv_i16m8_tumu(__VA_ARGS__)

◆ vmax_vv_i16mf2

#define vmax_vv_i16mf2 ( ... ) __riscv_vmax_vv_i16mf2(__VA_ARGS__)

◆ vmax_vv_i16mf2_m

#define vmax_vv_i16mf2_m ( ... ) __riscv_vmax_vv_i16mf2_tumu(__VA_ARGS__)

◆ vmax_vv_i16mf4

#define vmax_vv_i16mf4 ( ... ) __riscv_vmax_vv_i16mf4(__VA_ARGS__)

◆ vmax_vv_i16mf4_m

#define vmax_vv_i16mf4_m ( ... ) __riscv_vmax_vv_i16mf4_tumu(__VA_ARGS__)

◆ vmax_vv_i32m1

#define vmax_vv_i32m1 ( ... ) __riscv_vmax_vv_i32m1(__VA_ARGS__)

◆ vmax_vv_i32m1_m

#define vmax_vv_i32m1_m ( ... ) __riscv_vmax_vv_i32m1_tumu(__VA_ARGS__)

◆ vmax_vv_i32m2

#define vmax_vv_i32m2 ( ... ) __riscv_vmax_vv_i32m2(__VA_ARGS__)

◆ vmax_vv_i32m2_m

#define vmax_vv_i32m2_m ( ... ) __riscv_vmax_vv_i32m2_tumu(__VA_ARGS__)

◆ vmax_vv_i32m4

#define vmax_vv_i32m4 ( ... ) __riscv_vmax_vv_i32m4(__VA_ARGS__)

◆ vmax_vv_i32m4_m

#define vmax_vv_i32m4_m ( ... ) __riscv_vmax_vv_i32m4_tumu(__VA_ARGS__)

◆ vmax_vv_i32m8

#define vmax_vv_i32m8 ( ... ) __riscv_vmax_vv_i32m8(__VA_ARGS__)

◆ vmax_vv_i32m8_m

#define vmax_vv_i32m8_m ( ... ) __riscv_vmax_vv_i32m8_tumu(__VA_ARGS__)

◆ vmax_vv_i32mf2

#define vmax_vv_i32mf2 ( ... ) __riscv_vmax_vv_i32mf2(__VA_ARGS__)

◆ vmax_vv_i32mf2_m

#define vmax_vv_i32mf2_m ( ... ) __riscv_vmax_vv_i32mf2_tumu(__VA_ARGS__)

◆ vmax_vv_i64m1

#define vmax_vv_i64m1 ( ... ) __riscv_vmax_vv_i64m1(__VA_ARGS__)

◆ vmax_vv_i64m1_m

#define vmax_vv_i64m1_m ( ... ) __riscv_vmax_vv_i64m1_tumu(__VA_ARGS__)

◆ vmax_vv_i64m2

#define vmax_vv_i64m2 ( ... ) __riscv_vmax_vv_i64m2(__VA_ARGS__)

◆ vmax_vv_i64m2_m

#define vmax_vv_i64m2_m ( ... ) __riscv_vmax_vv_i64m2_tumu(__VA_ARGS__)

◆ vmax_vv_i64m4

#define vmax_vv_i64m4 ( ... ) __riscv_vmax_vv_i64m4(__VA_ARGS__)

◆ vmax_vv_i64m4_m

#define vmax_vv_i64m4_m ( ... ) __riscv_vmax_vv_i64m4_tumu(__VA_ARGS__)

◆ vmax_vv_i64m8

#define vmax_vv_i64m8 ( ... ) __riscv_vmax_vv_i64m8(__VA_ARGS__)

◆ vmax_vv_i64m8_m

#define vmax_vv_i64m8_m ( ... ) __riscv_vmax_vv_i64m8_tumu(__VA_ARGS__)

◆ vmax_vv_i8m1

#define vmax_vv_i8m1 ( ... ) __riscv_vmax_vv_i8m1(__VA_ARGS__)

◆ vmax_vv_i8m1_m

#define vmax_vv_i8m1_m ( ... ) __riscv_vmax_vv_i8m1_tumu(__VA_ARGS__)

◆ vmax_vv_i8m2

#define vmax_vv_i8m2 ( ... ) __riscv_vmax_vv_i8m2(__VA_ARGS__)

◆ vmax_vv_i8m2_m

#define vmax_vv_i8m2_m ( ... ) __riscv_vmax_vv_i8m2_tumu(__VA_ARGS__)

◆ vmax_vv_i8m4

#define vmax_vv_i8m4 ( ... ) __riscv_vmax_vv_i8m4(__VA_ARGS__)

◆ vmax_vv_i8m4_m

#define vmax_vv_i8m4_m ( ... ) __riscv_vmax_vv_i8m4_tumu(__VA_ARGS__)

◆ vmax_vv_i8m8

#define vmax_vv_i8m8 ( ... ) __riscv_vmax_vv_i8m8(__VA_ARGS__)

◆ vmax_vv_i8m8_m

#define vmax_vv_i8m8_m ( ... ) __riscv_vmax_vv_i8m8_tumu(__VA_ARGS__)

◆ vmax_vv_i8mf2

#define vmax_vv_i8mf2 ( ... ) __riscv_vmax_vv_i8mf2(__VA_ARGS__)

◆ vmax_vv_i8mf2_m

#define vmax_vv_i8mf2_m ( ... ) __riscv_vmax_vv_i8mf2_tumu(__VA_ARGS__)

◆ vmax_vv_i8mf4

#define vmax_vv_i8mf4 ( ... ) __riscv_vmax_vv_i8mf4(__VA_ARGS__)

◆ vmax_vv_i8mf4_m

#define vmax_vv_i8mf4_m ( ... ) __riscv_vmax_vv_i8mf4_tumu(__VA_ARGS__)

◆ vmax_vv_i8mf8

#define vmax_vv_i8mf8 ( ... ) __riscv_vmax_vv_i8mf8(__VA_ARGS__)

◆ vmax_vv_i8mf8_m

#define vmax_vv_i8mf8_m ( ... ) __riscv_vmax_vv_i8mf8_tumu(__VA_ARGS__)

◆ vmax_vx_i16m1

#define vmax_vx_i16m1 ( ... ) __riscv_vmax_vx_i16m1(__VA_ARGS__)

◆ vmax_vx_i16m1_m

#define vmax_vx_i16m1_m ( ... ) __riscv_vmax_vx_i16m1_tumu(__VA_ARGS__)

◆ vmax_vx_i16m2

#define vmax_vx_i16m2 ( ... ) __riscv_vmax_vx_i16m2(__VA_ARGS__)

◆ vmax_vx_i16m2_m

#define vmax_vx_i16m2_m ( ... ) __riscv_vmax_vx_i16m2_tumu(__VA_ARGS__)

◆ vmax_vx_i16m4

#define vmax_vx_i16m4 ( ... ) __riscv_vmax_vx_i16m4(__VA_ARGS__)

◆ vmax_vx_i16m4_m

#define vmax_vx_i16m4_m ( ... ) __riscv_vmax_vx_i16m4_tumu(__VA_ARGS__)

◆ vmax_vx_i16m8

#define vmax_vx_i16m8 ( ... ) __riscv_vmax_vx_i16m8(__VA_ARGS__)

◆ vmax_vx_i16m8_m

#define vmax_vx_i16m8_m ( ... ) __riscv_vmax_vx_i16m8_tumu(__VA_ARGS__)

◆ vmax_vx_i16mf2

#define vmax_vx_i16mf2 ( ... ) __riscv_vmax_vx_i16mf2(__VA_ARGS__)

◆ vmax_vx_i16mf2_m

#define vmax_vx_i16mf2_m ( ... ) __riscv_vmax_vx_i16mf2_tumu(__VA_ARGS__)

◆ vmax_vx_i16mf4

#define vmax_vx_i16mf4 ( ... ) __riscv_vmax_vx_i16mf4(__VA_ARGS__)

◆ vmax_vx_i16mf4_m

#define vmax_vx_i16mf4_m ( ... ) __riscv_vmax_vx_i16mf4_tumu(__VA_ARGS__)

◆ vmax_vx_i32m1

#define vmax_vx_i32m1 ( ... ) __riscv_vmax_vx_i32m1(__VA_ARGS__)

◆ vmax_vx_i32m1_m

#define vmax_vx_i32m1_m ( ... ) __riscv_vmax_vx_i32m1_tumu(__VA_ARGS__)

◆ vmax_vx_i32m2

#define vmax_vx_i32m2 ( ... ) __riscv_vmax_vx_i32m2(__VA_ARGS__)

◆ vmax_vx_i32m2_m

#define vmax_vx_i32m2_m ( ... ) __riscv_vmax_vx_i32m2_tumu(__VA_ARGS__)

◆ vmax_vx_i32m4

#define vmax_vx_i32m4 ( ... ) __riscv_vmax_vx_i32m4(__VA_ARGS__)

◆ vmax_vx_i32m4_m

#define vmax_vx_i32m4_m ( ... ) __riscv_vmax_vx_i32m4_tumu(__VA_ARGS__)

◆ vmax_vx_i32m8

#define vmax_vx_i32m8 ( ... ) __riscv_vmax_vx_i32m8(__VA_ARGS__)

◆ vmax_vx_i32m8_m

#define vmax_vx_i32m8_m ( ... ) __riscv_vmax_vx_i32m8_tumu(__VA_ARGS__)

◆ vmax_vx_i32mf2

#define vmax_vx_i32mf2 ( ... ) __riscv_vmax_vx_i32mf2(__VA_ARGS__)

◆ vmax_vx_i32mf2_m

#define vmax_vx_i32mf2_m ( ... ) __riscv_vmax_vx_i32mf2_tumu(__VA_ARGS__)

◆ vmax_vx_i64m1

#define vmax_vx_i64m1 ( ... ) __riscv_vmax_vx_i64m1(__VA_ARGS__)

◆ vmax_vx_i64m1_m

#define vmax_vx_i64m1_m ( ... ) __riscv_vmax_vx_i64m1_tumu(__VA_ARGS__)

◆ vmax_vx_i64m2

#define vmax_vx_i64m2 ( ... ) __riscv_vmax_vx_i64m2(__VA_ARGS__)

◆ vmax_vx_i64m2_m

#define vmax_vx_i64m2_m ( ... ) __riscv_vmax_vx_i64m2_tumu(__VA_ARGS__)

◆ vmax_vx_i64m4

#define vmax_vx_i64m4 ( ... ) __riscv_vmax_vx_i64m4(__VA_ARGS__)

◆ vmax_vx_i64m4_m

#define vmax_vx_i64m4_m ( ... ) __riscv_vmax_vx_i64m4_tumu(__VA_ARGS__)

◆ vmax_vx_i64m8

#define vmax_vx_i64m8 ( ... ) __riscv_vmax_vx_i64m8(__VA_ARGS__)

◆ vmax_vx_i64m8_m

#define vmax_vx_i64m8_m ( ... ) __riscv_vmax_vx_i64m8_tumu(__VA_ARGS__)

◆ vmax_vx_i8m1

#define vmax_vx_i8m1 ( ... ) __riscv_vmax_vx_i8m1(__VA_ARGS__)

◆ vmax_vx_i8m1_m

#define vmax_vx_i8m1_m ( ... ) __riscv_vmax_vx_i8m1_tumu(__VA_ARGS__)

◆ vmax_vx_i8m2

#define vmax_vx_i8m2 ( ... ) __riscv_vmax_vx_i8m2(__VA_ARGS__)

◆ vmax_vx_i8m2_m

#define vmax_vx_i8m2_m ( ... ) __riscv_vmax_vx_i8m2_tumu(__VA_ARGS__)

◆ vmax_vx_i8m4

#define vmax_vx_i8m4 ( ... ) __riscv_vmax_vx_i8m4(__VA_ARGS__)

◆ vmax_vx_i8m4_m

#define vmax_vx_i8m4_m ( ... ) __riscv_vmax_vx_i8m4_tumu(__VA_ARGS__)

◆ vmax_vx_i8m8

#define vmax_vx_i8m8 ( ... ) __riscv_vmax_vx_i8m8(__VA_ARGS__)

◆ vmax_vx_i8m8_m

#define vmax_vx_i8m8_m ( ... ) __riscv_vmax_vx_i8m8_tumu(__VA_ARGS__)

◆ vmax_vx_i8mf2

#define vmax_vx_i8mf2 ( ... ) __riscv_vmax_vx_i8mf2(__VA_ARGS__)

◆ vmax_vx_i8mf2_m

#define vmax_vx_i8mf2_m ( ... ) __riscv_vmax_vx_i8mf2_tumu(__VA_ARGS__)

◆ vmax_vx_i8mf4

#define vmax_vx_i8mf4 ( ... ) __riscv_vmax_vx_i8mf4(__VA_ARGS__)

◆ vmax_vx_i8mf4_m

#define vmax_vx_i8mf4_m ( ... ) __riscv_vmax_vx_i8mf4_tumu(__VA_ARGS__)

◆ vmax_vx_i8mf8

#define vmax_vx_i8mf8 ( ... ) __riscv_vmax_vx_i8mf8(__VA_ARGS__)

◆ vmax_vx_i8mf8_m

#define vmax_vx_i8mf8_m ( ... ) __riscv_vmax_vx_i8mf8_tumu(__VA_ARGS__)

◆ vmaxu_vv_u16m1

#define vmaxu_vv_u16m1 ( ... ) __riscv_vmaxu_vv_u16m1(__VA_ARGS__)

◆ vmaxu_vv_u16m1_m

#define vmaxu_vv_u16m1_m ( ... ) __riscv_vmaxu_vv_u16m1_tumu(__VA_ARGS__)

◆ vmaxu_vv_u16m2

#define vmaxu_vv_u16m2 ( ... ) __riscv_vmaxu_vv_u16m2(__VA_ARGS__)

◆ vmaxu_vv_u16m2_m

#define vmaxu_vv_u16m2_m ( ... ) __riscv_vmaxu_vv_u16m2_tumu(__VA_ARGS__)

◆ vmaxu_vv_u16m4

#define vmaxu_vv_u16m4 ( ... ) __riscv_vmaxu_vv_u16m4(__VA_ARGS__)

◆ vmaxu_vv_u16m4_m

#define vmaxu_vv_u16m4_m ( ... ) __riscv_vmaxu_vv_u16m4_tumu(__VA_ARGS__)

◆ vmaxu_vv_u16m8

#define vmaxu_vv_u16m8 ( ... ) __riscv_vmaxu_vv_u16m8(__VA_ARGS__)

◆ vmaxu_vv_u16m8_m

#define vmaxu_vv_u16m8_m ( ... ) __riscv_vmaxu_vv_u16m8_tumu(__VA_ARGS__)

◆ vmaxu_vv_u16mf2

#define vmaxu_vv_u16mf2 ( ... ) __riscv_vmaxu_vv_u16mf2(__VA_ARGS__)

◆ vmaxu_vv_u16mf2_m

#define vmaxu_vv_u16mf2_m ( ... ) __riscv_vmaxu_vv_u16mf2_tumu(__VA_ARGS__)

◆ vmaxu_vv_u16mf4

#define vmaxu_vv_u16mf4 ( ... ) __riscv_vmaxu_vv_u16mf4(__VA_ARGS__)

◆ vmaxu_vv_u16mf4_m

#define vmaxu_vv_u16mf4_m ( ... ) __riscv_vmaxu_vv_u16mf4_tumu(__VA_ARGS__)

◆ vmaxu_vv_u32m1

#define vmaxu_vv_u32m1 ( ... ) __riscv_vmaxu_vv_u32m1(__VA_ARGS__)

◆ vmaxu_vv_u32m1_m

#define vmaxu_vv_u32m1_m ( ... ) __riscv_vmaxu_vv_u32m1_tumu(__VA_ARGS__)

◆ vmaxu_vv_u32m2

#define vmaxu_vv_u32m2 ( ... ) __riscv_vmaxu_vv_u32m2(__VA_ARGS__)

◆ vmaxu_vv_u32m2_m

#define vmaxu_vv_u32m2_m ( ... ) __riscv_vmaxu_vv_u32m2_tumu(__VA_ARGS__)

◆ vmaxu_vv_u32m4

#define vmaxu_vv_u32m4 ( ... ) __riscv_vmaxu_vv_u32m4(__VA_ARGS__)

◆ vmaxu_vv_u32m4_m

#define vmaxu_vv_u32m4_m ( ... ) __riscv_vmaxu_vv_u32m4_tumu(__VA_ARGS__)

◆ vmaxu_vv_u32m8

#define vmaxu_vv_u32m8 ( ... ) __riscv_vmaxu_vv_u32m8(__VA_ARGS__)

◆ vmaxu_vv_u32m8_m

#define vmaxu_vv_u32m8_m ( ... ) __riscv_vmaxu_vv_u32m8_tumu(__VA_ARGS__)

◆ vmaxu_vv_u32mf2

#define vmaxu_vv_u32mf2 ( ... ) __riscv_vmaxu_vv_u32mf2(__VA_ARGS__)

◆ vmaxu_vv_u32mf2_m

#define vmaxu_vv_u32mf2_m ( ... ) __riscv_vmaxu_vv_u32mf2_tumu(__VA_ARGS__)

◆ vmaxu_vv_u64m1

#define vmaxu_vv_u64m1 ( ... ) __riscv_vmaxu_vv_u64m1(__VA_ARGS__)

◆ vmaxu_vv_u64m1_m

#define vmaxu_vv_u64m1_m ( ... ) __riscv_vmaxu_vv_u64m1_tumu(__VA_ARGS__)

◆ vmaxu_vv_u64m2

#define vmaxu_vv_u64m2 ( ... ) __riscv_vmaxu_vv_u64m2(__VA_ARGS__)

◆ vmaxu_vv_u64m2_m

#define vmaxu_vv_u64m2_m ( ... ) __riscv_vmaxu_vv_u64m2_tumu(__VA_ARGS__)

◆ vmaxu_vv_u64m4

#define vmaxu_vv_u64m4 ( ... ) __riscv_vmaxu_vv_u64m4(__VA_ARGS__)

◆ vmaxu_vv_u64m4_m

#define vmaxu_vv_u64m4_m ( ... ) __riscv_vmaxu_vv_u64m4_tumu(__VA_ARGS__)

◆ vmaxu_vv_u64m8

#define vmaxu_vv_u64m8 ( ... ) __riscv_vmaxu_vv_u64m8(__VA_ARGS__)

◆ vmaxu_vv_u64m8_m

#define vmaxu_vv_u64m8_m ( ... ) __riscv_vmaxu_vv_u64m8_tumu(__VA_ARGS__)

◆ vmaxu_vv_u8m1

#define vmaxu_vv_u8m1 ( ... ) __riscv_vmaxu_vv_u8m1(__VA_ARGS__)

◆ vmaxu_vv_u8m1_m

#define vmaxu_vv_u8m1_m ( ... ) __riscv_vmaxu_vv_u8m1_tumu(__VA_ARGS__)

◆ vmaxu_vv_u8m2

#define vmaxu_vv_u8m2 ( ... ) __riscv_vmaxu_vv_u8m2(__VA_ARGS__)

◆ vmaxu_vv_u8m2_m

#define vmaxu_vv_u8m2_m ( ... ) __riscv_vmaxu_vv_u8m2_tumu(__VA_ARGS__)

◆ vmaxu_vv_u8m4

#define vmaxu_vv_u8m4 ( ... ) __riscv_vmaxu_vv_u8m4(__VA_ARGS__)

◆ vmaxu_vv_u8m4_m

#define vmaxu_vv_u8m4_m ( ... ) __riscv_vmaxu_vv_u8m4_tumu(__VA_ARGS__)

◆ vmaxu_vv_u8m8

#define vmaxu_vv_u8m8 ( ... ) __riscv_vmaxu_vv_u8m8(__VA_ARGS__)

◆ vmaxu_vv_u8m8_m

#define vmaxu_vv_u8m8_m ( ... ) __riscv_vmaxu_vv_u8m8_tumu(__VA_ARGS__)

◆ vmaxu_vv_u8mf2

#define vmaxu_vv_u8mf2 ( ... ) __riscv_vmaxu_vv_u8mf2(__VA_ARGS__)

◆ vmaxu_vv_u8mf2_m

#define vmaxu_vv_u8mf2_m ( ... ) __riscv_vmaxu_vv_u8mf2_tumu(__VA_ARGS__)

◆ vmaxu_vv_u8mf4

#define vmaxu_vv_u8mf4 ( ... ) __riscv_vmaxu_vv_u8mf4(__VA_ARGS__)

◆ vmaxu_vv_u8mf4_m

#define vmaxu_vv_u8mf4_m ( ... ) __riscv_vmaxu_vv_u8mf4_tumu(__VA_ARGS__)

◆ vmaxu_vv_u8mf8

#define vmaxu_vv_u8mf8 ( ... ) __riscv_vmaxu_vv_u8mf8(__VA_ARGS__)

◆ vmaxu_vv_u8mf8_m

#define vmaxu_vv_u8mf8_m ( ... ) __riscv_vmaxu_vv_u8mf8_tumu(__VA_ARGS__)

◆ vmaxu_vx_u16m1

#define vmaxu_vx_u16m1 ( ... ) __riscv_vmaxu_vx_u16m1(__VA_ARGS__)

◆ vmaxu_vx_u16m1_m

#define vmaxu_vx_u16m1_m ( ... ) __riscv_vmaxu_vx_u16m1_tumu(__VA_ARGS__)

◆ vmaxu_vx_u16m2

#define vmaxu_vx_u16m2 ( ... ) __riscv_vmaxu_vx_u16m2(__VA_ARGS__)

◆ vmaxu_vx_u16m2_m

#define vmaxu_vx_u16m2_m ( ... ) __riscv_vmaxu_vx_u16m2_tumu(__VA_ARGS__)

◆ vmaxu_vx_u16m4

#define vmaxu_vx_u16m4 ( ... ) __riscv_vmaxu_vx_u16m4(__VA_ARGS__)

◆ vmaxu_vx_u16m4_m

#define vmaxu_vx_u16m4_m ( ... ) __riscv_vmaxu_vx_u16m4_tumu(__VA_ARGS__)

◆ vmaxu_vx_u16m8

#define vmaxu_vx_u16m8 ( ... ) __riscv_vmaxu_vx_u16m8(__VA_ARGS__)

◆ vmaxu_vx_u16m8_m

#define vmaxu_vx_u16m8_m ( ... ) __riscv_vmaxu_vx_u16m8_tumu(__VA_ARGS__)

◆ vmaxu_vx_u16mf2

#define vmaxu_vx_u16mf2 ( ... ) __riscv_vmaxu_vx_u16mf2(__VA_ARGS__)

◆ vmaxu_vx_u16mf2_m

#define vmaxu_vx_u16mf2_m ( ... ) __riscv_vmaxu_vx_u16mf2_tumu(__VA_ARGS__)

◆ vmaxu_vx_u16mf4

#define vmaxu_vx_u16mf4 ( ... ) __riscv_vmaxu_vx_u16mf4(__VA_ARGS__)

◆ vmaxu_vx_u16mf4_m

#define vmaxu_vx_u16mf4_m ( ... ) __riscv_vmaxu_vx_u16mf4_tumu(__VA_ARGS__)

◆ vmaxu_vx_u32m1

#define vmaxu_vx_u32m1 ( ... ) __riscv_vmaxu_vx_u32m1(__VA_ARGS__)

◆ vmaxu_vx_u32m1_m

#define vmaxu_vx_u32m1_m ( ... ) __riscv_vmaxu_vx_u32m1_tumu(__VA_ARGS__)

◆ vmaxu_vx_u32m2

#define vmaxu_vx_u32m2 ( ... ) __riscv_vmaxu_vx_u32m2(__VA_ARGS__)

◆ vmaxu_vx_u32m2_m

#define vmaxu_vx_u32m2_m ( ... ) __riscv_vmaxu_vx_u32m2_tumu(__VA_ARGS__)

◆ vmaxu_vx_u32m4

#define vmaxu_vx_u32m4 ( ... ) __riscv_vmaxu_vx_u32m4(__VA_ARGS__)

◆ vmaxu_vx_u32m4_m

#define vmaxu_vx_u32m4_m ( ... ) __riscv_vmaxu_vx_u32m4_tumu(__VA_ARGS__)

◆ vmaxu_vx_u32m8

#define vmaxu_vx_u32m8 ( ... ) __riscv_vmaxu_vx_u32m8(__VA_ARGS__)

◆ vmaxu_vx_u32m8_m

#define vmaxu_vx_u32m8_m ( ... ) __riscv_vmaxu_vx_u32m8_tumu(__VA_ARGS__)

◆ vmaxu_vx_u32mf2

#define vmaxu_vx_u32mf2 ( ... ) __riscv_vmaxu_vx_u32mf2(__VA_ARGS__)

◆ vmaxu_vx_u32mf2_m

#define vmaxu_vx_u32mf2_m ( ... ) __riscv_vmaxu_vx_u32mf2_tumu(__VA_ARGS__)

◆ vmaxu_vx_u64m1

#define vmaxu_vx_u64m1 ( ... ) __riscv_vmaxu_vx_u64m1(__VA_ARGS__)

◆ vmaxu_vx_u64m1_m

#define vmaxu_vx_u64m1_m ( ... ) __riscv_vmaxu_vx_u64m1_tumu(__VA_ARGS__)

◆ vmaxu_vx_u64m2

#define vmaxu_vx_u64m2 ( ... ) __riscv_vmaxu_vx_u64m2(__VA_ARGS__)

◆ vmaxu_vx_u64m2_m

#define vmaxu_vx_u64m2_m ( ... ) __riscv_vmaxu_vx_u64m2_tumu(__VA_ARGS__)

◆ vmaxu_vx_u64m4

#define vmaxu_vx_u64m4 ( ... ) __riscv_vmaxu_vx_u64m4(__VA_ARGS__)

◆ vmaxu_vx_u64m4_m

#define vmaxu_vx_u64m4_m ( ... ) __riscv_vmaxu_vx_u64m4_tumu(__VA_ARGS__)

◆ vmaxu_vx_u64m8

#define vmaxu_vx_u64m8 ( ... ) __riscv_vmaxu_vx_u64m8(__VA_ARGS__)

◆ vmaxu_vx_u64m8_m

#define vmaxu_vx_u64m8_m ( ... ) __riscv_vmaxu_vx_u64m8_tumu(__VA_ARGS__)

◆ vmaxu_vx_u8m1

#define vmaxu_vx_u8m1 ( ... ) __riscv_vmaxu_vx_u8m1(__VA_ARGS__)

◆ vmaxu_vx_u8m1_m

#define vmaxu_vx_u8m1_m ( ... ) __riscv_vmaxu_vx_u8m1_tumu(__VA_ARGS__)

◆ vmaxu_vx_u8m2

#define vmaxu_vx_u8m2 ( ... ) __riscv_vmaxu_vx_u8m2(__VA_ARGS__)

◆ vmaxu_vx_u8m2_m

#define vmaxu_vx_u8m2_m ( ... ) __riscv_vmaxu_vx_u8m2_tumu(__VA_ARGS__)

◆ vmaxu_vx_u8m4

#define vmaxu_vx_u8m4 ( ... ) __riscv_vmaxu_vx_u8m4(__VA_ARGS__)

◆ vmaxu_vx_u8m4_m

#define vmaxu_vx_u8m4_m ( ... ) __riscv_vmaxu_vx_u8m4_tumu(__VA_ARGS__)

◆ vmaxu_vx_u8m8

#define vmaxu_vx_u8m8 ( ... ) __riscv_vmaxu_vx_u8m8(__VA_ARGS__)

◆ vmaxu_vx_u8m8_m

#define vmaxu_vx_u8m8_m ( ... ) __riscv_vmaxu_vx_u8m8_tumu(__VA_ARGS__)

◆ vmaxu_vx_u8mf2

#define vmaxu_vx_u8mf2 ( ... ) __riscv_vmaxu_vx_u8mf2(__VA_ARGS__)

◆ vmaxu_vx_u8mf2_m

#define vmaxu_vx_u8mf2_m ( ... ) __riscv_vmaxu_vx_u8mf2_tumu(__VA_ARGS__)

◆ vmaxu_vx_u8mf4

#define vmaxu_vx_u8mf4 ( ... ) __riscv_vmaxu_vx_u8mf4(__VA_ARGS__)

◆ vmaxu_vx_u8mf4_m

#define vmaxu_vx_u8mf4_m ( ... ) __riscv_vmaxu_vx_u8mf4_tumu(__VA_ARGS__)

◆ vmaxu_vx_u8mf8

#define vmaxu_vx_u8mf8 ( ... ) __riscv_vmaxu_vx_u8mf8(__VA_ARGS__)

◆ vmaxu_vx_u8mf8_m

#define vmaxu_vx_u8mf8_m ( ... ) __riscv_vmaxu_vx_u8mf8_tumu(__VA_ARGS__)

◆ vmclr_m_b1

#define vmclr_m_b1 ( ... ) __riscv_vmclr_m_b1(__VA_ARGS__)

◆ vmclr_m_b16

#define vmclr_m_b16 ( ... ) __riscv_vmclr_m_b16(__VA_ARGS__)

◆ vmclr_m_b2

#define vmclr_m_b2 ( ... ) __riscv_vmclr_m_b2(__VA_ARGS__)

◆ vmclr_m_b32

#define vmclr_m_b32 ( ... ) __riscv_vmclr_m_b32(__VA_ARGS__)

◆ vmclr_m_b4

#define vmclr_m_b4 ( ... ) __riscv_vmclr_m_b4(__VA_ARGS__)

◆ vmclr_m_b64

#define vmclr_m_b64 ( ... ) __riscv_vmclr_m_b64(__VA_ARGS__)

◆ vmclr_m_b8

#define vmclr_m_b8 ( ... ) __riscv_vmclr_m_b8(__VA_ARGS__)

◆ vmerge_vvm_f16m1

#define vmerge_vvm_f16m1	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vvm_f16m1((op1), (op2), (mask), (vl))

◆ vmerge_vvm_f16m2

#define vmerge_vvm_f16m2	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vvm_f16m2((op1), (op2), (mask), (vl))

◆ vmerge_vvm_f16m4

#define vmerge_vvm_f16m4	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vvm_f16m4((op1), (op2), (mask), (vl))

◆ vmerge_vvm_f16m8

#define vmerge_vvm_f16m8	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vvm_f16m8((op1), (op2), (mask), (vl))

◆ vmerge_vvm_f16mf2

#define vmerge_vvm_f16mf2	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vvm_f16mf2((op1), (op2), (mask), (vl))

◆ vmerge_vvm_f16mf4

#define vmerge_vvm_f16mf4	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vvm_f16mf4((op1), (op2), (mask), (vl))

◆ vmerge_vvm_f32m1

#define vmerge_vvm_f32m1	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vvm_f32m1((op1), (op2), (mask), (vl))

◆ vmerge_vvm_f32m2

#define vmerge_vvm_f32m2	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vvm_f32m2((op1), (op2), (mask), (vl))

◆ vmerge_vvm_f32m4

#define vmerge_vvm_f32m4	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vvm_f32m4((op1), (op2), (mask), (vl))

◆ vmerge_vvm_f32m8

#define vmerge_vvm_f32m8	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vvm_f32m8((op1), (op2), (mask), (vl))

◆ vmerge_vvm_f32mf2

#define vmerge_vvm_f32mf2	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vvm_f32mf2((op1), (op2), (mask), (vl))

◆ vmerge_vvm_f64m1

#define vmerge_vvm_f64m1	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vvm_f64m1((op1), (op2), (mask), (vl))

◆ vmerge_vvm_f64m2

#define vmerge_vvm_f64m2	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vvm_f64m2((op1), (op2), (mask), (vl))

◆ vmerge_vvm_f64m4

#define vmerge_vvm_f64m4	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vvm_f64m4((op1), (op2), (mask), (vl))

◆ vmerge_vvm_f64m8

#define vmerge_vvm_f64m8	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vvm_f64m8((op1), (op2), (mask), (vl))

◆ vmerge_vvm_i16m1

#define vmerge_vvm_i16m1	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vvm_i16m1((op1), (op2), (mask), (vl))

◆ vmerge_vvm_i16m2

#define vmerge_vvm_i16m2	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vvm_i16m2((op1), (op2), (mask), (vl))

◆ vmerge_vvm_i16m4

#define vmerge_vvm_i16m4	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vvm_i16m4((op1), (op2), (mask), (vl))

◆ vmerge_vvm_i16m8

#define vmerge_vvm_i16m8	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vvm_i16m8((op1), (op2), (mask), (vl))

◆ vmerge_vvm_i16mf2

#define vmerge_vvm_i16mf2	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vvm_i16mf2((op1), (op2), (mask), (vl))

◆ vmerge_vvm_i16mf4

#define vmerge_vvm_i16mf4	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vvm_i16mf4((op1), (op2), (mask), (vl))

◆ vmerge_vvm_i32m1

#define vmerge_vvm_i32m1	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vvm_i32m1((op1), (op2), (mask), (vl))

◆ vmerge_vvm_i32m2

#define vmerge_vvm_i32m2	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vvm_i32m2((op1), (op2), (mask), (vl))

◆ vmerge_vvm_i32m4

#define vmerge_vvm_i32m4	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vvm_i32m4((op1), (op2), (mask), (vl))

◆ vmerge_vvm_i32m8

#define vmerge_vvm_i32m8	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vvm_i32m8((op1), (op2), (mask), (vl))

◆ vmerge_vvm_i32mf2

#define vmerge_vvm_i32mf2	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vvm_i32mf2((op1), (op2), (mask), (vl))

◆ vmerge_vvm_i64m1

#define vmerge_vvm_i64m1	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vvm_i64m1((op1), (op2), (mask), (vl))

◆ vmerge_vvm_i64m2

#define vmerge_vvm_i64m2	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vvm_i64m2((op1), (op2), (mask), (vl))

◆ vmerge_vvm_i64m4

#define vmerge_vvm_i64m4	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vvm_i64m4((op1), (op2), (mask), (vl))

◆ vmerge_vvm_i64m8

#define vmerge_vvm_i64m8	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vvm_i64m8((op1), (op2), (mask), (vl))

◆ vmerge_vvm_i8m1

#define vmerge_vvm_i8m1	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vvm_i8m1((op1), (op2), (mask), (vl))

◆ vmerge_vvm_i8m2

#define vmerge_vvm_i8m2	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vvm_i8m2((op1), (op2), (mask), (vl))

◆ vmerge_vvm_i8m4

#define vmerge_vvm_i8m4	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vvm_i8m4((op1), (op2), (mask), (vl))

◆ vmerge_vvm_i8m8

#define vmerge_vvm_i8m8	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vvm_i8m8((op1), (op2), (mask), (vl))

◆ vmerge_vvm_i8mf2

#define vmerge_vvm_i8mf2	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vvm_i8mf2((op1), (op2), (mask), (vl))

◆ vmerge_vvm_i8mf4

#define vmerge_vvm_i8mf4	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vvm_i8mf4((op1), (op2), (mask), (vl))

◆ vmerge_vvm_i8mf8

#define vmerge_vvm_i8mf8	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vvm_i8mf8((op1), (op2), (mask), (vl))

◆ vmerge_vvm_u16m1

#define vmerge_vvm_u16m1	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vvm_u16m1((op1), (op2), (mask), (vl))

◆ vmerge_vvm_u16m2

#define vmerge_vvm_u16m2	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vvm_u16m2((op1), (op2), (mask), (vl))

◆ vmerge_vvm_u16m4

#define vmerge_vvm_u16m4	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vvm_u16m4((op1), (op2), (mask), (vl))

◆ vmerge_vvm_u16m8

#define vmerge_vvm_u16m8	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vvm_u16m8((op1), (op2), (mask), (vl))

◆ vmerge_vvm_u16mf2

#define vmerge_vvm_u16mf2	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vvm_u16mf2((op1), (op2), (mask), (vl))

◆ vmerge_vvm_u16mf4

#define vmerge_vvm_u16mf4	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vvm_u16mf4((op1), (op2), (mask), (vl))

◆ vmerge_vvm_u32m1

#define vmerge_vvm_u32m1	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vvm_u32m1((op1), (op2), (mask), (vl))

◆ vmerge_vvm_u32m2

#define vmerge_vvm_u32m2	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vvm_u32m2((op1), (op2), (mask), (vl))

◆ vmerge_vvm_u32m4

#define vmerge_vvm_u32m4	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vvm_u32m4((op1), (op2), (mask), (vl))

◆ vmerge_vvm_u32m8

#define vmerge_vvm_u32m8	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vvm_u32m8((op1), (op2), (mask), (vl))

◆ vmerge_vvm_u32mf2

#define vmerge_vvm_u32mf2	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vvm_u32mf2((op1), (op2), (mask), (vl))

◆ vmerge_vvm_u64m1

#define vmerge_vvm_u64m1	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vvm_u64m1((op1), (op2), (mask), (vl))

◆ vmerge_vvm_u64m2

#define vmerge_vvm_u64m2	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vvm_u64m2((op1), (op2), (mask), (vl))

◆ vmerge_vvm_u64m4

#define vmerge_vvm_u64m4	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vvm_u64m4((op1), (op2), (mask), (vl))

◆ vmerge_vvm_u64m8

#define vmerge_vvm_u64m8	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vvm_u64m8((op1), (op2), (mask), (vl))

◆ vmerge_vvm_u8m1

#define vmerge_vvm_u8m1	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vvm_u8m1((op1), (op2), (mask), (vl))

◆ vmerge_vvm_u8m2

#define vmerge_vvm_u8m2	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vvm_u8m2((op1), (op2), (mask), (vl))

◆ vmerge_vvm_u8m4

#define vmerge_vvm_u8m4	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vvm_u8m4((op1), (op2), (mask), (vl))

◆ vmerge_vvm_u8m8

#define vmerge_vvm_u8m8	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vvm_u8m8((op1), (op2), (mask), (vl))

◆ vmerge_vvm_u8mf2

#define vmerge_vvm_u8mf2	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vvm_u8mf2((op1), (op2), (mask), (vl))

◆ vmerge_vvm_u8mf4

#define vmerge_vvm_u8mf4	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vvm_u8mf4((op1), (op2), (mask), (vl))

◆ vmerge_vvm_u8mf8

#define vmerge_vvm_u8mf8	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vvm_u8mf8((op1), (op2), (mask), (vl))

◆ vmerge_vxm_i16m1

#define vmerge_vxm_i16m1	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vxm_i16m1((op1), (op2), (mask), (vl))

◆ vmerge_vxm_i16m2

#define vmerge_vxm_i16m2	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vxm_i16m2((op1), (op2), (mask), (vl))

◆ vmerge_vxm_i16m4

#define vmerge_vxm_i16m4	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vxm_i16m4((op1), (op2), (mask), (vl))

◆ vmerge_vxm_i16m8

#define vmerge_vxm_i16m8	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vxm_i16m8((op1), (op2), (mask), (vl))

◆ vmerge_vxm_i16mf2

#define vmerge_vxm_i16mf2	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vxm_i16mf2((op1), (op2), (mask), (vl))

◆ vmerge_vxm_i16mf4

#define vmerge_vxm_i16mf4	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vxm_i16mf4((op1), (op2), (mask), (vl))

◆ vmerge_vxm_i32m1

#define vmerge_vxm_i32m1	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vxm_i32m1((op1), (op2), (mask), (vl))

◆ vmerge_vxm_i32m2

#define vmerge_vxm_i32m2	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vxm_i32m2((op1), (op2), (mask), (vl))

◆ vmerge_vxm_i32m4

#define vmerge_vxm_i32m4	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vxm_i32m4((op1), (op2), (mask), (vl))

◆ vmerge_vxm_i32m8

#define vmerge_vxm_i32m8	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vxm_i32m8((op1), (op2), (mask), (vl))

◆ vmerge_vxm_i32mf2

#define vmerge_vxm_i32mf2	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vxm_i32mf2((op1), (op2), (mask), (vl))

◆ vmerge_vxm_i64m1

#define vmerge_vxm_i64m1	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vxm_i64m1((op1), (op2), (mask), (vl))

◆ vmerge_vxm_i64m2

#define vmerge_vxm_i64m2	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vxm_i64m2((op1), (op2), (mask), (vl))

◆ vmerge_vxm_i64m4

#define vmerge_vxm_i64m4	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vxm_i64m4((op1), (op2), (mask), (vl))

◆ vmerge_vxm_i64m8

#define vmerge_vxm_i64m8	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vxm_i64m8((op1), (op2), (mask), (vl))

◆ vmerge_vxm_i8m1

#define vmerge_vxm_i8m1	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vxm_i8m1((op1), (op2), (mask), (vl))

◆ vmerge_vxm_i8m2

#define vmerge_vxm_i8m2	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vxm_i8m2((op1), (op2), (mask), (vl))

◆ vmerge_vxm_i8m4

#define vmerge_vxm_i8m4	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vxm_i8m4((op1), (op2), (mask), (vl))

◆ vmerge_vxm_i8m8

#define vmerge_vxm_i8m8	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vxm_i8m8((op1), (op2), (mask), (vl))

◆ vmerge_vxm_i8mf2

#define vmerge_vxm_i8mf2	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vxm_i8mf2((op1), (op2), (mask), (vl))

◆ vmerge_vxm_i8mf4

#define vmerge_vxm_i8mf4	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vxm_i8mf4((op1), (op2), (mask), (vl))

◆ vmerge_vxm_i8mf8

#define vmerge_vxm_i8mf8	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vxm_i8mf8((op1), (op2), (mask), (vl))

◆ vmerge_vxm_u16m1

#define vmerge_vxm_u16m1	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vxm_u16m1((op1), (op2), (mask), (vl))

◆ vmerge_vxm_u16m2

#define vmerge_vxm_u16m2	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vxm_u16m2((op1), (op2), (mask), (vl))

◆ vmerge_vxm_u16m4

#define vmerge_vxm_u16m4	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vxm_u16m4((op1), (op2), (mask), (vl))

◆ vmerge_vxm_u16m8

#define vmerge_vxm_u16m8	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vxm_u16m8((op1), (op2), (mask), (vl))

◆ vmerge_vxm_u16mf2

#define vmerge_vxm_u16mf2	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vxm_u16mf2((op1), (op2), (mask), (vl))

◆ vmerge_vxm_u16mf4

#define vmerge_vxm_u16mf4	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vxm_u16mf4((op1), (op2), (mask), (vl))

◆ vmerge_vxm_u32m1

#define vmerge_vxm_u32m1	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vxm_u32m1((op1), (op2), (mask), (vl))

◆ vmerge_vxm_u32m2

#define vmerge_vxm_u32m2	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vxm_u32m2((op1), (op2), (mask), (vl))

◆ vmerge_vxm_u32m4

#define vmerge_vxm_u32m4	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vxm_u32m4((op1), (op2), (mask), (vl))

◆ vmerge_vxm_u32m8

#define vmerge_vxm_u32m8	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vxm_u32m8((op1), (op2), (mask), (vl))

◆ vmerge_vxm_u32mf2

#define vmerge_vxm_u32mf2	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vxm_u32mf2((op1), (op2), (mask), (vl))

◆ vmerge_vxm_u64m1

#define vmerge_vxm_u64m1	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vxm_u64m1((op1), (op2), (mask), (vl))

◆ vmerge_vxm_u64m2

#define vmerge_vxm_u64m2	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vxm_u64m2((op1), (op2), (mask), (vl))

◆ vmerge_vxm_u64m4

#define vmerge_vxm_u64m4	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vxm_u64m4((op1), (op2), (mask), (vl))

◆ vmerge_vxm_u64m8

#define vmerge_vxm_u64m8	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vxm_u64m8((op1), (op2), (mask), (vl))

◆ vmerge_vxm_u8m1

#define vmerge_vxm_u8m1	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vxm_u8m1((op1), (op2), (mask), (vl))

◆ vmerge_vxm_u8m2

#define vmerge_vxm_u8m2	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vxm_u8m2((op1), (op2), (mask), (vl))

◆ vmerge_vxm_u8m4

#define vmerge_vxm_u8m4	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vxm_u8m4((op1), (op2), (mask), (vl))

◆ vmerge_vxm_u8m8

#define vmerge_vxm_u8m8	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vxm_u8m8((op1), (op2), (mask), (vl))

◆ vmerge_vxm_u8mf2

#define vmerge_vxm_u8mf2	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vxm_u8mf2((op1), (op2), (mask), (vl))

◆ vmerge_vxm_u8mf4

#define vmerge_vxm_u8mf4	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vxm_u8mf4((op1), (op2), (mask), (vl))

◆ vmerge_vxm_u8mf8

#define vmerge_vxm_u8mf8	(	mask,
		op1,
		op2,
		vl
	)	__riscv_vmerge_vxm_u8mf8((op1), (op2), (mask), (vl))

◆ vmfeq_vf_f16m1_b16

#define vmfeq_vf_f16m1_b16 ( ... ) __riscv_vmfeq_vf_f16m1_b16(__VA_ARGS__)

◆ vmfeq_vf_f16m1_b16_m

#define vmfeq_vf_f16m1_b16_m ( ... ) __riscv_vmfeq_vf_f16m1_b16_mu(__VA_ARGS__)

◆ vmfeq_vf_f16m2_b8

#define vmfeq_vf_f16m2_b8 ( ... ) __riscv_vmfeq_vf_f16m2_b8(__VA_ARGS__)

◆ vmfeq_vf_f16m2_b8_m

#define vmfeq_vf_f16m2_b8_m ( ... ) __riscv_vmfeq_vf_f16m2_b8_mu(__VA_ARGS__)

◆ vmfeq_vf_f16m4_b4

#define vmfeq_vf_f16m4_b4 ( ... ) __riscv_vmfeq_vf_f16m4_b4(__VA_ARGS__)

◆ vmfeq_vf_f16m4_b4_m

#define vmfeq_vf_f16m4_b4_m ( ... ) __riscv_vmfeq_vf_f16m4_b4_mu(__VA_ARGS__)

◆ vmfeq_vf_f16m8_b2

#define vmfeq_vf_f16m8_b2 ( ... ) __riscv_vmfeq_vf_f16m8_b2(__VA_ARGS__)

◆ vmfeq_vf_f16m8_b2_m

#define vmfeq_vf_f16m8_b2_m ( ... ) __riscv_vmfeq_vf_f16m8_b2_mu(__VA_ARGS__)

◆ vmfeq_vf_f16mf2_b32

#define vmfeq_vf_f16mf2_b32 ( ... ) __riscv_vmfeq_vf_f16mf2_b32(__VA_ARGS__)

◆ vmfeq_vf_f16mf2_b32_m

#define vmfeq_vf_f16mf2_b32_m ( ... ) __riscv_vmfeq_vf_f16mf2_b32_mu(__VA_ARGS__)

◆ vmfeq_vf_f16mf4_b64

#define vmfeq_vf_f16mf4_b64 ( ... ) __riscv_vmfeq_vf_f16mf4_b64(__VA_ARGS__)

◆ vmfeq_vf_f16mf4_b64_m

#define vmfeq_vf_f16mf4_b64_m ( ... ) __riscv_vmfeq_vf_f16mf4_b64_mu(__VA_ARGS__)

◆ vmfeq_vf_f32m1_b32

#define vmfeq_vf_f32m1_b32 ( ... ) __riscv_vmfeq_vf_f32m1_b32(__VA_ARGS__)

◆ vmfeq_vf_f32m1_b32_m

#define vmfeq_vf_f32m1_b32_m ( ... ) __riscv_vmfeq_vf_f32m1_b32_mu(__VA_ARGS__)

◆ vmfeq_vf_f32m2_b16

#define vmfeq_vf_f32m2_b16 ( ... ) __riscv_vmfeq_vf_f32m2_b16(__VA_ARGS__)

◆ vmfeq_vf_f32m2_b16_m

#define vmfeq_vf_f32m2_b16_m ( ... ) __riscv_vmfeq_vf_f32m2_b16_mu(__VA_ARGS__)

◆ vmfeq_vf_f32m4_b8

#define vmfeq_vf_f32m4_b8 ( ... ) __riscv_vmfeq_vf_f32m4_b8(__VA_ARGS__)

◆ vmfeq_vf_f32m4_b8_m

#define vmfeq_vf_f32m4_b8_m ( ... ) __riscv_vmfeq_vf_f32m4_b8_mu(__VA_ARGS__)

◆ vmfeq_vf_f32m8_b4

#define vmfeq_vf_f32m8_b4 ( ... ) __riscv_vmfeq_vf_f32m8_b4(__VA_ARGS__)

◆ vmfeq_vf_f32m8_b4_m

#define vmfeq_vf_f32m8_b4_m ( ... ) __riscv_vmfeq_vf_f32m8_b4_mu(__VA_ARGS__)

◆ vmfeq_vf_f32mf2_b64

#define vmfeq_vf_f32mf2_b64 ( ... ) __riscv_vmfeq_vf_f32mf2_b64(__VA_ARGS__)

◆ vmfeq_vf_f32mf2_b64_m

#define vmfeq_vf_f32mf2_b64_m ( ... ) __riscv_vmfeq_vf_f32mf2_b64_mu(__VA_ARGS__)

◆ vmfeq_vf_f64m1_b64

#define vmfeq_vf_f64m1_b64 ( ... ) __riscv_vmfeq_vf_f64m1_b64(__VA_ARGS__)

◆ vmfeq_vf_f64m1_b64_m

#define vmfeq_vf_f64m1_b64_m ( ... ) __riscv_vmfeq_vf_f64m1_b64_mu(__VA_ARGS__)

◆ vmfeq_vf_f64m2_b32

#define vmfeq_vf_f64m2_b32 ( ... ) __riscv_vmfeq_vf_f64m2_b32(__VA_ARGS__)

◆ vmfeq_vf_f64m2_b32_m

#define vmfeq_vf_f64m2_b32_m ( ... ) __riscv_vmfeq_vf_f64m2_b32_mu(__VA_ARGS__)

◆ vmfeq_vf_f64m4_b16

#define vmfeq_vf_f64m4_b16 ( ... ) __riscv_vmfeq_vf_f64m4_b16(__VA_ARGS__)

◆ vmfeq_vf_f64m4_b16_m

#define vmfeq_vf_f64m4_b16_m ( ... ) __riscv_vmfeq_vf_f64m4_b16_mu(__VA_ARGS__)

◆ vmfeq_vf_f64m8_b8

#define vmfeq_vf_f64m8_b8 ( ... ) __riscv_vmfeq_vf_f64m8_b8(__VA_ARGS__)

◆ vmfeq_vf_f64m8_b8_m

#define vmfeq_vf_f64m8_b8_m ( ... ) __riscv_vmfeq_vf_f64m8_b8_mu(__VA_ARGS__)

◆ vmfeq_vv_f16m1_b16

#define vmfeq_vv_f16m1_b16 ( ... ) __riscv_vmfeq_vv_f16m1_b16(__VA_ARGS__)

◆ vmfeq_vv_f16m1_b16_m

#define vmfeq_vv_f16m1_b16_m ( ... ) __riscv_vmfeq_vv_f16m1_b16_mu(__VA_ARGS__)

◆ vmfeq_vv_f16m2_b8

#define vmfeq_vv_f16m2_b8 ( ... ) __riscv_vmfeq_vv_f16m2_b8(__VA_ARGS__)

◆ vmfeq_vv_f16m2_b8_m

#define vmfeq_vv_f16m2_b8_m ( ... ) __riscv_vmfeq_vv_f16m2_b8_mu(__VA_ARGS__)

◆ vmfeq_vv_f16m4_b4

#define vmfeq_vv_f16m4_b4 ( ... ) __riscv_vmfeq_vv_f16m4_b4(__VA_ARGS__)

◆ vmfeq_vv_f16m4_b4_m

#define vmfeq_vv_f16m4_b4_m ( ... ) __riscv_vmfeq_vv_f16m4_b4_mu(__VA_ARGS__)

◆ vmfeq_vv_f16m8_b2

#define vmfeq_vv_f16m8_b2 ( ... ) __riscv_vmfeq_vv_f16m8_b2(__VA_ARGS__)

◆ vmfeq_vv_f16m8_b2_m

#define vmfeq_vv_f16m8_b2_m ( ... ) __riscv_vmfeq_vv_f16m8_b2_mu(__VA_ARGS__)

◆ vmfeq_vv_f16mf2_b32

#define vmfeq_vv_f16mf2_b32 ( ... ) __riscv_vmfeq_vv_f16mf2_b32(__VA_ARGS__)

◆ vmfeq_vv_f16mf2_b32_m

#define vmfeq_vv_f16mf2_b32_m ( ... ) __riscv_vmfeq_vv_f16mf2_b32_mu(__VA_ARGS__)

◆ vmfeq_vv_f16mf4_b64

#define vmfeq_vv_f16mf4_b64 ( ... ) __riscv_vmfeq_vv_f16mf4_b64(__VA_ARGS__)

◆ vmfeq_vv_f16mf4_b64_m

#define vmfeq_vv_f16mf4_b64_m ( ... ) __riscv_vmfeq_vv_f16mf4_b64_mu(__VA_ARGS__)

◆ vmfeq_vv_f32m1_b32

#define vmfeq_vv_f32m1_b32 ( ... ) __riscv_vmfeq_vv_f32m1_b32(__VA_ARGS__)

◆ vmfeq_vv_f32m1_b32_m

#define vmfeq_vv_f32m1_b32_m ( ... ) __riscv_vmfeq_vv_f32m1_b32_mu(__VA_ARGS__)

◆ vmfeq_vv_f32m2_b16

#define vmfeq_vv_f32m2_b16 ( ... ) __riscv_vmfeq_vv_f32m2_b16(__VA_ARGS__)

◆ vmfeq_vv_f32m2_b16_m

#define vmfeq_vv_f32m2_b16_m ( ... ) __riscv_vmfeq_vv_f32m2_b16_mu(__VA_ARGS__)

◆ vmfeq_vv_f32m4_b8

#define vmfeq_vv_f32m4_b8 ( ... ) __riscv_vmfeq_vv_f32m4_b8(__VA_ARGS__)

◆ vmfeq_vv_f32m4_b8_m

#define vmfeq_vv_f32m4_b8_m ( ... ) __riscv_vmfeq_vv_f32m4_b8_mu(__VA_ARGS__)

◆ vmfeq_vv_f32m8_b4

#define vmfeq_vv_f32m8_b4 ( ... ) __riscv_vmfeq_vv_f32m8_b4(__VA_ARGS__)

◆ vmfeq_vv_f32m8_b4_m

#define vmfeq_vv_f32m8_b4_m ( ... ) __riscv_vmfeq_vv_f32m8_b4_mu(__VA_ARGS__)

◆ vmfeq_vv_f32mf2_b64

#define vmfeq_vv_f32mf2_b64 ( ... ) __riscv_vmfeq_vv_f32mf2_b64(__VA_ARGS__)

◆ vmfeq_vv_f32mf2_b64_m

#define vmfeq_vv_f32mf2_b64_m ( ... ) __riscv_vmfeq_vv_f32mf2_b64_mu(__VA_ARGS__)

◆ vmfeq_vv_f64m1_b64

#define vmfeq_vv_f64m1_b64 ( ... ) __riscv_vmfeq_vv_f64m1_b64(__VA_ARGS__)

◆ vmfeq_vv_f64m1_b64_m

#define vmfeq_vv_f64m1_b64_m ( ... ) __riscv_vmfeq_vv_f64m1_b64_mu(__VA_ARGS__)

◆ vmfeq_vv_f64m2_b32

#define vmfeq_vv_f64m2_b32 ( ... ) __riscv_vmfeq_vv_f64m2_b32(__VA_ARGS__)

◆ vmfeq_vv_f64m2_b32_m

#define vmfeq_vv_f64m2_b32_m ( ... ) __riscv_vmfeq_vv_f64m2_b32_mu(__VA_ARGS__)

◆ vmfeq_vv_f64m4_b16

#define vmfeq_vv_f64m4_b16 ( ... ) __riscv_vmfeq_vv_f64m4_b16(__VA_ARGS__)

◆ vmfeq_vv_f64m4_b16_m

#define vmfeq_vv_f64m4_b16_m ( ... ) __riscv_vmfeq_vv_f64m4_b16_mu(__VA_ARGS__)

◆ vmfeq_vv_f64m8_b8

#define vmfeq_vv_f64m8_b8 ( ... ) __riscv_vmfeq_vv_f64m8_b8(__VA_ARGS__)

◆ vmfeq_vv_f64m8_b8_m

#define vmfeq_vv_f64m8_b8_m ( ... ) __riscv_vmfeq_vv_f64m8_b8_mu(__VA_ARGS__)

◆ vmfge_vf_f16m1_b16

#define vmfge_vf_f16m1_b16 ( ... ) __riscv_vmfge_vf_f16m1_b16(__VA_ARGS__)

◆ vmfge_vf_f16m1_b16_m

#define vmfge_vf_f16m1_b16_m ( ... ) __riscv_vmfge_vf_f16m1_b16_mu(__VA_ARGS__)

◆ vmfge_vf_f16m2_b8

#define vmfge_vf_f16m2_b8 ( ... ) __riscv_vmfge_vf_f16m2_b8(__VA_ARGS__)

◆ vmfge_vf_f16m2_b8_m

#define vmfge_vf_f16m2_b8_m ( ... ) __riscv_vmfge_vf_f16m2_b8_mu(__VA_ARGS__)

◆ vmfge_vf_f16m4_b4

#define vmfge_vf_f16m4_b4 ( ... ) __riscv_vmfge_vf_f16m4_b4(__VA_ARGS__)

◆ vmfge_vf_f16m4_b4_m

#define vmfge_vf_f16m4_b4_m ( ... ) __riscv_vmfge_vf_f16m4_b4_mu(__VA_ARGS__)

◆ vmfge_vf_f16m8_b2

#define vmfge_vf_f16m8_b2 ( ... ) __riscv_vmfge_vf_f16m8_b2(__VA_ARGS__)

◆ vmfge_vf_f16m8_b2_m

#define vmfge_vf_f16m8_b2_m ( ... ) __riscv_vmfge_vf_f16m8_b2_mu(__VA_ARGS__)

◆ vmfge_vf_f16mf2_b32

#define vmfge_vf_f16mf2_b32 ( ... ) __riscv_vmfge_vf_f16mf2_b32(__VA_ARGS__)

◆ vmfge_vf_f16mf2_b32_m

#define vmfge_vf_f16mf2_b32_m ( ... ) __riscv_vmfge_vf_f16mf2_b32_mu(__VA_ARGS__)

◆ vmfge_vf_f16mf4_b64

#define vmfge_vf_f16mf4_b64 ( ... ) __riscv_vmfge_vf_f16mf4_b64(__VA_ARGS__)

◆ vmfge_vf_f16mf4_b64_m

#define vmfge_vf_f16mf4_b64_m ( ... ) __riscv_vmfge_vf_f16mf4_b64_mu(__VA_ARGS__)

◆ vmfge_vf_f32m1_b32

#define vmfge_vf_f32m1_b32 ( ... ) __riscv_vmfge_vf_f32m1_b32(__VA_ARGS__)

◆ vmfge_vf_f32m1_b32_m

#define vmfge_vf_f32m1_b32_m ( ... ) __riscv_vmfge_vf_f32m1_b32_mu(__VA_ARGS__)

◆ vmfge_vf_f32m2_b16

#define vmfge_vf_f32m2_b16 ( ... ) __riscv_vmfge_vf_f32m2_b16(__VA_ARGS__)

◆ vmfge_vf_f32m2_b16_m

#define vmfge_vf_f32m2_b16_m ( ... ) __riscv_vmfge_vf_f32m2_b16_mu(__VA_ARGS__)

◆ vmfge_vf_f32m4_b8

#define vmfge_vf_f32m4_b8 ( ... ) __riscv_vmfge_vf_f32m4_b8(__VA_ARGS__)

◆ vmfge_vf_f32m4_b8_m

#define vmfge_vf_f32m4_b8_m ( ... ) __riscv_vmfge_vf_f32m4_b8_mu(__VA_ARGS__)

◆ vmfge_vf_f32m8_b4

#define vmfge_vf_f32m8_b4 ( ... ) __riscv_vmfge_vf_f32m8_b4(__VA_ARGS__)

◆ vmfge_vf_f32m8_b4_m

#define vmfge_vf_f32m8_b4_m ( ... ) __riscv_vmfge_vf_f32m8_b4_mu(__VA_ARGS__)

◆ vmfge_vf_f32mf2_b64

#define vmfge_vf_f32mf2_b64 ( ... ) __riscv_vmfge_vf_f32mf2_b64(__VA_ARGS__)

◆ vmfge_vf_f32mf2_b64_m

#define vmfge_vf_f32mf2_b64_m ( ... ) __riscv_vmfge_vf_f32mf2_b64_mu(__VA_ARGS__)

◆ vmfge_vf_f64m1_b64

#define vmfge_vf_f64m1_b64 ( ... ) __riscv_vmfge_vf_f64m1_b64(__VA_ARGS__)

◆ vmfge_vf_f64m1_b64_m

#define vmfge_vf_f64m1_b64_m ( ... ) __riscv_vmfge_vf_f64m1_b64_mu(__VA_ARGS__)

◆ vmfge_vf_f64m2_b32

#define vmfge_vf_f64m2_b32 ( ... ) __riscv_vmfge_vf_f64m2_b32(__VA_ARGS__)

◆ vmfge_vf_f64m2_b32_m

#define vmfge_vf_f64m2_b32_m ( ... ) __riscv_vmfge_vf_f64m2_b32_mu(__VA_ARGS__)

◆ vmfge_vf_f64m4_b16

#define vmfge_vf_f64m4_b16 ( ... ) __riscv_vmfge_vf_f64m4_b16(__VA_ARGS__)

◆ vmfge_vf_f64m4_b16_m

#define vmfge_vf_f64m4_b16_m ( ... ) __riscv_vmfge_vf_f64m4_b16_mu(__VA_ARGS__)

◆ vmfge_vf_f64m8_b8

#define vmfge_vf_f64m8_b8 ( ... ) __riscv_vmfge_vf_f64m8_b8(__VA_ARGS__)

◆ vmfge_vf_f64m8_b8_m

#define vmfge_vf_f64m8_b8_m ( ... ) __riscv_vmfge_vf_f64m8_b8_mu(__VA_ARGS__)

◆ vmfge_vv_f16m1_b16

#define vmfge_vv_f16m1_b16 ( ... ) __riscv_vmfge_vv_f16m1_b16(__VA_ARGS__)

◆ vmfge_vv_f16m1_b16_m

#define vmfge_vv_f16m1_b16_m ( ... ) __riscv_vmfge_vv_f16m1_b16_mu(__VA_ARGS__)

◆ vmfge_vv_f16m2_b8

#define vmfge_vv_f16m2_b8 ( ... ) __riscv_vmfge_vv_f16m2_b8(__VA_ARGS__)

◆ vmfge_vv_f16m2_b8_m

#define vmfge_vv_f16m2_b8_m ( ... ) __riscv_vmfge_vv_f16m2_b8_mu(__VA_ARGS__)

◆ vmfge_vv_f16m4_b4

#define vmfge_vv_f16m4_b4 ( ... ) __riscv_vmfge_vv_f16m4_b4(__VA_ARGS__)

◆ vmfge_vv_f16m4_b4_m

#define vmfge_vv_f16m4_b4_m ( ... ) __riscv_vmfge_vv_f16m4_b4_mu(__VA_ARGS__)

◆ vmfge_vv_f16m8_b2

#define vmfge_vv_f16m8_b2 ( ... ) __riscv_vmfge_vv_f16m8_b2(__VA_ARGS__)

◆ vmfge_vv_f16m8_b2_m

#define vmfge_vv_f16m8_b2_m ( ... ) __riscv_vmfge_vv_f16m8_b2_mu(__VA_ARGS__)

◆ vmfge_vv_f16mf2_b32

#define vmfge_vv_f16mf2_b32 ( ... ) __riscv_vmfge_vv_f16mf2_b32(__VA_ARGS__)

◆ vmfge_vv_f16mf2_b32_m

#define vmfge_vv_f16mf2_b32_m ( ... ) __riscv_vmfge_vv_f16mf2_b32_mu(__VA_ARGS__)

◆ vmfge_vv_f16mf4_b64

#define vmfge_vv_f16mf4_b64 ( ... ) __riscv_vmfge_vv_f16mf4_b64(__VA_ARGS__)

◆ vmfge_vv_f16mf4_b64_m

#define vmfge_vv_f16mf4_b64_m ( ... ) __riscv_vmfge_vv_f16mf4_b64_mu(__VA_ARGS__)

◆ vmfge_vv_f32m1_b32

#define vmfge_vv_f32m1_b32 ( ... ) __riscv_vmfge_vv_f32m1_b32(__VA_ARGS__)

◆ vmfge_vv_f32m1_b32_m

#define vmfge_vv_f32m1_b32_m ( ... ) __riscv_vmfge_vv_f32m1_b32_mu(__VA_ARGS__)

◆ vmfge_vv_f32m2_b16

#define vmfge_vv_f32m2_b16 ( ... ) __riscv_vmfge_vv_f32m2_b16(__VA_ARGS__)

◆ vmfge_vv_f32m2_b16_m

#define vmfge_vv_f32m2_b16_m ( ... ) __riscv_vmfge_vv_f32m2_b16_mu(__VA_ARGS__)

◆ vmfge_vv_f32m4_b8

#define vmfge_vv_f32m4_b8 ( ... ) __riscv_vmfge_vv_f32m4_b8(__VA_ARGS__)

◆ vmfge_vv_f32m4_b8_m

#define vmfge_vv_f32m4_b8_m ( ... ) __riscv_vmfge_vv_f32m4_b8_mu(__VA_ARGS__)

◆ vmfge_vv_f32m8_b4

#define vmfge_vv_f32m8_b4 ( ... ) __riscv_vmfge_vv_f32m8_b4(__VA_ARGS__)

◆ vmfge_vv_f32m8_b4_m

#define vmfge_vv_f32m8_b4_m ( ... ) __riscv_vmfge_vv_f32m8_b4_mu(__VA_ARGS__)

◆ vmfge_vv_f32mf2_b64

#define vmfge_vv_f32mf2_b64 ( ... ) __riscv_vmfge_vv_f32mf2_b64(__VA_ARGS__)

◆ vmfge_vv_f32mf2_b64_m

#define vmfge_vv_f32mf2_b64_m ( ... ) __riscv_vmfge_vv_f32mf2_b64_mu(__VA_ARGS__)

◆ vmfge_vv_f64m1_b64

#define vmfge_vv_f64m1_b64 ( ... ) __riscv_vmfge_vv_f64m1_b64(__VA_ARGS__)

◆ vmfge_vv_f64m1_b64_m

#define vmfge_vv_f64m1_b64_m ( ... ) __riscv_vmfge_vv_f64m1_b64_mu(__VA_ARGS__)

◆ vmfge_vv_f64m2_b32

#define vmfge_vv_f64m2_b32 ( ... ) __riscv_vmfge_vv_f64m2_b32(__VA_ARGS__)

◆ vmfge_vv_f64m2_b32_m

#define vmfge_vv_f64m2_b32_m ( ... ) __riscv_vmfge_vv_f64m2_b32_mu(__VA_ARGS__)

◆ vmfge_vv_f64m4_b16

#define vmfge_vv_f64m4_b16 ( ... ) __riscv_vmfge_vv_f64m4_b16(__VA_ARGS__)

◆ vmfge_vv_f64m4_b16_m

#define vmfge_vv_f64m4_b16_m ( ... ) __riscv_vmfge_vv_f64m4_b16_mu(__VA_ARGS__)

◆ vmfge_vv_f64m8_b8

#define vmfge_vv_f64m8_b8 ( ... ) __riscv_vmfge_vv_f64m8_b8(__VA_ARGS__)

◆ vmfge_vv_f64m8_b8_m

#define vmfge_vv_f64m8_b8_m ( ... ) __riscv_vmfge_vv_f64m8_b8_mu(__VA_ARGS__)

◆ vmfgt_vf_f16m1_b16

#define vmfgt_vf_f16m1_b16 ( ... ) __riscv_vmfgt_vf_f16m1_b16(__VA_ARGS__)

◆ vmfgt_vf_f16m1_b16_m

#define vmfgt_vf_f16m1_b16_m ( ... ) __riscv_vmfgt_vf_f16m1_b16_mu(__VA_ARGS__)

◆ vmfgt_vf_f16m2_b8

#define vmfgt_vf_f16m2_b8 ( ... ) __riscv_vmfgt_vf_f16m2_b8(__VA_ARGS__)

◆ vmfgt_vf_f16m2_b8_m

#define vmfgt_vf_f16m2_b8_m ( ... ) __riscv_vmfgt_vf_f16m2_b8_mu(__VA_ARGS__)

◆ vmfgt_vf_f16m4_b4

#define vmfgt_vf_f16m4_b4 ( ... ) __riscv_vmfgt_vf_f16m4_b4(__VA_ARGS__)

◆ vmfgt_vf_f16m4_b4_m

#define vmfgt_vf_f16m4_b4_m ( ... ) __riscv_vmfgt_vf_f16m4_b4_mu(__VA_ARGS__)

◆ vmfgt_vf_f16m8_b2

#define vmfgt_vf_f16m8_b2 ( ... ) __riscv_vmfgt_vf_f16m8_b2(__VA_ARGS__)

◆ vmfgt_vf_f16m8_b2_m

#define vmfgt_vf_f16m8_b2_m ( ... ) __riscv_vmfgt_vf_f16m8_b2_mu(__VA_ARGS__)

◆ vmfgt_vf_f16mf2_b32

#define vmfgt_vf_f16mf2_b32 ( ... ) __riscv_vmfgt_vf_f16mf2_b32(__VA_ARGS__)

◆ vmfgt_vf_f16mf2_b32_m

#define vmfgt_vf_f16mf2_b32_m ( ... ) __riscv_vmfgt_vf_f16mf2_b32_mu(__VA_ARGS__)

◆ vmfgt_vf_f16mf4_b64

#define vmfgt_vf_f16mf4_b64 ( ... ) __riscv_vmfgt_vf_f16mf4_b64(__VA_ARGS__)

◆ vmfgt_vf_f16mf4_b64_m

#define vmfgt_vf_f16mf4_b64_m ( ... ) __riscv_vmfgt_vf_f16mf4_b64_mu(__VA_ARGS__)

◆ vmfgt_vf_f32m1_b32

#define vmfgt_vf_f32m1_b32 ( ... ) __riscv_vmfgt_vf_f32m1_b32(__VA_ARGS__)

◆ vmfgt_vf_f32m1_b32_m

#define vmfgt_vf_f32m1_b32_m ( ... ) __riscv_vmfgt_vf_f32m1_b32_mu(__VA_ARGS__)

◆ vmfgt_vf_f32m2_b16

#define vmfgt_vf_f32m2_b16 ( ... ) __riscv_vmfgt_vf_f32m2_b16(__VA_ARGS__)

◆ vmfgt_vf_f32m2_b16_m

#define vmfgt_vf_f32m2_b16_m ( ... ) __riscv_vmfgt_vf_f32m2_b16_mu(__VA_ARGS__)

◆ vmfgt_vf_f32m4_b8

#define vmfgt_vf_f32m4_b8 ( ... ) __riscv_vmfgt_vf_f32m4_b8(__VA_ARGS__)

◆ vmfgt_vf_f32m4_b8_m

#define vmfgt_vf_f32m4_b8_m ( ... ) __riscv_vmfgt_vf_f32m4_b8_mu(__VA_ARGS__)

◆ vmfgt_vf_f32m8_b4

#define vmfgt_vf_f32m8_b4 ( ... ) __riscv_vmfgt_vf_f32m8_b4(__VA_ARGS__)

◆ vmfgt_vf_f32m8_b4_m

#define vmfgt_vf_f32m8_b4_m ( ... ) __riscv_vmfgt_vf_f32m8_b4_mu(__VA_ARGS__)

◆ vmfgt_vf_f32mf2_b64

#define vmfgt_vf_f32mf2_b64 ( ... ) __riscv_vmfgt_vf_f32mf2_b64(__VA_ARGS__)

◆ vmfgt_vf_f32mf2_b64_m

#define vmfgt_vf_f32mf2_b64_m ( ... ) __riscv_vmfgt_vf_f32mf2_b64_mu(__VA_ARGS__)

◆ vmfgt_vf_f64m1_b64

#define vmfgt_vf_f64m1_b64 ( ... ) __riscv_vmfgt_vf_f64m1_b64(__VA_ARGS__)

◆ vmfgt_vf_f64m1_b64_m

#define vmfgt_vf_f64m1_b64_m ( ... ) __riscv_vmfgt_vf_f64m1_b64_mu(__VA_ARGS__)

◆ vmfgt_vf_f64m2_b32

#define vmfgt_vf_f64m2_b32 ( ... ) __riscv_vmfgt_vf_f64m2_b32(__VA_ARGS__)

◆ vmfgt_vf_f64m2_b32_m

#define vmfgt_vf_f64m2_b32_m ( ... ) __riscv_vmfgt_vf_f64m2_b32_mu(__VA_ARGS__)

◆ vmfgt_vf_f64m4_b16

#define vmfgt_vf_f64m4_b16 ( ... ) __riscv_vmfgt_vf_f64m4_b16(__VA_ARGS__)

◆ vmfgt_vf_f64m4_b16_m

#define vmfgt_vf_f64m4_b16_m ( ... ) __riscv_vmfgt_vf_f64m4_b16_mu(__VA_ARGS__)

◆ vmfgt_vf_f64m8_b8

#define vmfgt_vf_f64m8_b8 ( ... ) __riscv_vmfgt_vf_f64m8_b8(__VA_ARGS__)

◆ vmfgt_vf_f64m8_b8_m

#define vmfgt_vf_f64m8_b8_m ( ... ) __riscv_vmfgt_vf_f64m8_b8_mu(__VA_ARGS__)

◆ vmfgt_vv_f16m1_b16

#define vmfgt_vv_f16m1_b16 ( ... ) __riscv_vmfgt_vv_f16m1_b16(__VA_ARGS__)

◆ vmfgt_vv_f16m1_b16_m

#define vmfgt_vv_f16m1_b16_m ( ... ) __riscv_vmfgt_vv_f16m1_b16_mu(__VA_ARGS__)

◆ vmfgt_vv_f16m2_b8

#define vmfgt_vv_f16m2_b8 ( ... ) __riscv_vmfgt_vv_f16m2_b8(__VA_ARGS__)

◆ vmfgt_vv_f16m2_b8_m

#define vmfgt_vv_f16m2_b8_m ( ... ) __riscv_vmfgt_vv_f16m2_b8_mu(__VA_ARGS__)

◆ vmfgt_vv_f16m4_b4

#define vmfgt_vv_f16m4_b4 ( ... ) __riscv_vmfgt_vv_f16m4_b4(__VA_ARGS__)

◆ vmfgt_vv_f16m4_b4_m

#define vmfgt_vv_f16m4_b4_m ( ... ) __riscv_vmfgt_vv_f16m4_b4_mu(__VA_ARGS__)

◆ vmfgt_vv_f16m8_b2

#define vmfgt_vv_f16m8_b2 ( ... ) __riscv_vmfgt_vv_f16m8_b2(__VA_ARGS__)

◆ vmfgt_vv_f16m8_b2_m

#define vmfgt_vv_f16m8_b2_m ( ... ) __riscv_vmfgt_vv_f16m8_b2_mu(__VA_ARGS__)

◆ vmfgt_vv_f16mf2_b32

#define vmfgt_vv_f16mf2_b32 ( ... ) __riscv_vmfgt_vv_f16mf2_b32(__VA_ARGS__)

◆ vmfgt_vv_f16mf2_b32_m

#define vmfgt_vv_f16mf2_b32_m ( ... ) __riscv_vmfgt_vv_f16mf2_b32_mu(__VA_ARGS__)

◆ vmfgt_vv_f16mf4_b64

#define vmfgt_vv_f16mf4_b64 ( ... ) __riscv_vmfgt_vv_f16mf4_b64(__VA_ARGS__)

◆ vmfgt_vv_f16mf4_b64_m

#define vmfgt_vv_f16mf4_b64_m ( ... ) __riscv_vmfgt_vv_f16mf4_b64_mu(__VA_ARGS__)

◆ vmfgt_vv_f32m1_b32

#define vmfgt_vv_f32m1_b32 ( ... ) __riscv_vmfgt_vv_f32m1_b32(__VA_ARGS__)

◆ vmfgt_vv_f32m1_b32_m

#define vmfgt_vv_f32m1_b32_m ( ... ) __riscv_vmfgt_vv_f32m1_b32_mu(__VA_ARGS__)

◆ vmfgt_vv_f32m2_b16

#define vmfgt_vv_f32m2_b16 ( ... ) __riscv_vmfgt_vv_f32m2_b16(__VA_ARGS__)

◆ vmfgt_vv_f32m2_b16_m

#define vmfgt_vv_f32m2_b16_m ( ... ) __riscv_vmfgt_vv_f32m2_b16_mu(__VA_ARGS__)

◆ vmfgt_vv_f32m4_b8

#define vmfgt_vv_f32m4_b8 ( ... ) __riscv_vmfgt_vv_f32m4_b8(__VA_ARGS__)

◆ vmfgt_vv_f32m4_b8_m

#define vmfgt_vv_f32m4_b8_m ( ... ) __riscv_vmfgt_vv_f32m4_b8_mu(__VA_ARGS__)

◆ vmfgt_vv_f32m8_b4

#define vmfgt_vv_f32m8_b4 ( ... ) __riscv_vmfgt_vv_f32m8_b4(__VA_ARGS__)

◆ vmfgt_vv_f32m8_b4_m

#define vmfgt_vv_f32m8_b4_m ( ... ) __riscv_vmfgt_vv_f32m8_b4_mu(__VA_ARGS__)

◆ vmfgt_vv_f32mf2_b64

#define vmfgt_vv_f32mf2_b64 ( ... ) __riscv_vmfgt_vv_f32mf2_b64(__VA_ARGS__)

◆ vmfgt_vv_f32mf2_b64_m

#define vmfgt_vv_f32mf2_b64_m ( ... ) __riscv_vmfgt_vv_f32mf2_b64_mu(__VA_ARGS__)

◆ vmfgt_vv_f64m1_b64

#define vmfgt_vv_f64m1_b64 ( ... ) __riscv_vmfgt_vv_f64m1_b64(__VA_ARGS__)

◆ vmfgt_vv_f64m1_b64_m

#define vmfgt_vv_f64m1_b64_m ( ... ) __riscv_vmfgt_vv_f64m1_b64_mu(__VA_ARGS__)

◆ vmfgt_vv_f64m2_b32

#define vmfgt_vv_f64m2_b32 ( ... ) __riscv_vmfgt_vv_f64m2_b32(__VA_ARGS__)

◆ vmfgt_vv_f64m2_b32_m

#define vmfgt_vv_f64m2_b32_m ( ... ) __riscv_vmfgt_vv_f64m2_b32_mu(__VA_ARGS__)

◆ vmfgt_vv_f64m4_b16

#define vmfgt_vv_f64m4_b16 ( ... ) __riscv_vmfgt_vv_f64m4_b16(__VA_ARGS__)

◆ vmfgt_vv_f64m4_b16_m

#define vmfgt_vv_f64m4_b16_m ( ... ) __riscv_vmfgt_vv_f64m4_b16_mu(__VA_ARGS__)

◆ vmfgt_vv_f64m8_b8

#define vmfgt_vv_f64m8_b8 ( ... ) __riscv_vmfgt_vv_f64m8_b8(__VA_ARGS__)

◆ vmfgt_vv_f64m8_b8_m

#define vmfgt_vv_f64m8_b8_m ( ... ) __riscv_vmfgt_vv_f64m8_b8_mu(__VA_ARGS__)

◆ vmfle_vf_f16m1_b16

#define vmfle_vf_f16m1_b16 ( ... ) __riscv_vmfle_vf_f16m1_b16(__VA_ARGS__)

◆ vmfle_vf_f16m1_b16_m

#define vmfle_vf_f16m1_b16_m ( ... ) __riscv_vmfle_vf_f16m1_b16_mu(__VA_ARGS__)

◆ vmfle_vf_f16m2_b8

#define vmfle_vf_f16m2_b8 ( ... ) __riscv_vmfle_vf_f16m2_b8(__VA_ARGS__)

◆ vmfle_vf_f16m2_b8_m

#define vmfle_vf_f16m2_b8_m ( ... ) __riscv_vmfle_vf_f16m2_b8_mu(__VA_ARGS__)

◆ vmfle_vf_f16m4_b4

#define vmfle_vf_f16m4_b4 ( ... ) __riscv_vmfle_vf_f16m4_b4(__VA_ARGS__)

◆ vmfle_vf_f16m4_b4_m

#define vmfle_vf_f16m4_b4_m ( ... ) __riscv_vmfle_vf_f16m4_b4_mu(__VA_ARGS__)

◆ vmfle_vf_f16m8_b2

#define vmfle_vf_f16m8_b2 ( ... ) __riscv_vmfle_vf_f16m8_b2(__VA_ARGS__)

◆ vmfle_vf_f16m8_b2_m

#define vmfle_vf_f16m8_b2_m ( ... ) __riscv_vmfle_vf_f16m8_b2_mu(__VA_ARGS__)

◆ vmfle_vf_f16mf2_b32

#define vmfle_vf_f16mf2_b32 ( ... ) __riscv_vmfle_vf_f16mf2_b32(__VA_ARGS__)

◆ vmfle_vf_f16mf2_b32_m

#define vmfle_vf_f16mf2_b32_m ( ... ) __riscv_vmfle_vf_f16mf2_b32_mu(__VA_ARGS__)

◆ vmfle_vf_f16mf4_b64

#define vmfle_vf_f16mf4_b64 ( ... ) __riscv_vmfle_vf_f16mf4_b64(__VA_ARGS__)

◆ vmfle_vf_f16mf4_b64_m

#define vmfle_vf_f16mf4_b64_m ( ... ) __riscv_vmfle_vf_f16mf4_b64_mu(__VA_ARGS__)

◆ vmfle_vf_f32m1_b32

#define vmfle_vf_f32m1_b32 ( ... ) __riscv_vmfle_vf_f32m1_b32(__VA_ARGS__)

◆ vmfle_vf_f32m1_b32_m

#define vmfle_vf_f32m1_b32_m ( ... ) __riscv_vmfle_vf_f32m1_b32_mu(__VA_ARGS__)

◆ vmfle_vf_f32m2_b16

#define vmfle_vf_f32m2_b16 ( ... ) __riscv_vmfle_vf_f32m2_b16(__VA_ARGS__)

◆ vmfle_vf_f32m2_b16_m

#define vmfle_vf_f32m2_b16_m ( ... ) __riscv_vmfle_vf_f32m2_b16_mu(__VA_ARGS__)

◆ vmfle_vf_f32m4_b8

#define vmfle_vf_f32m4_b8 ( ... ) __riscv_vmfle_vf_f32m4_b8(__VA_ARGS__)

◆ vmfle_vf_f32m4_b8_m

#define vmfle_vf_f32m4_b8_m ( ... ) __riscv_vmfle_vf_f32m4_b8_mu(__VA_ARGS__)

◆ vmfle_vf_f32m8_b4

#define vmfle_vf_f32m8_b4 ( ... ) __riscv_vmfle_vf_f32m8_b4(__VA_ARGS__)

◆ vmfle_vf_f32m8_b4_m

#define vmfle_vf_f32m8_b4_m ( ... ) __riscv_vmfle_vf_f32m8_b4_mu(__VA_ARGS__)

◆ vmfle_vf_f32mf2_b64

#define vmfle_vf_f32mf2_b64 ( ... ) __riscv_vmfle_vf_f32mf2_b64(__VA_ARGS__)

◆ vmfle_vf_f32mf2_b64_m

#define vmfle_vf_f32mf2_b64_m ( ... ) __riscv_vmfle_vf_f32mf2_b64_mu(__VA_ARGS__)

◆ vmfle_vf_f64m1_b64

#define vmfle_vf_f64m1_b64 ( ... ) __riscv_vmfle_vf_f64m1_b64(__VA_ARGS__)

◆ vmfle_vf_f64m1_b64_m

#define vmfle_vf_f64m1_b64_m ( ... ) __riscv_vmfle_vf_f64m1_b64_mu(__VA_ARGS__)

◆ vmfle_vf_f64m2_b32

#define vmfle_vf_f64m2_b32 ( ... ) __riscv_vmfle_vf_f64m2_b32(__VA_ARGS__)

◆ vmfle_vf_f64m2_b32_m

#define vmfle_vf_f64m2_b32_m ( ... ) __riscv_vmfle_vf_f64m2_b32_mu(__VA_ARGS__)

◆ vmfle_vf_f64m4_b16

#define vmfle_vf_f64m4_b16 ( ... ) __riscv_vmfle_vf_f64m4_b16(__VA_ARGS__)

◆ vmfle_vf_f64m4_b16_m

#define vmfle_vf_f64m4_b16_m ( ... ) __riscv_vmfle_vf_f64m4_b16_mu(__VA_ARGS__)

◆ vmfle_vf_f64m8_b8

#define vmfle_vf_f64m8_b8 ( ... ) __riscv_vmfle_vf_f64m8_b8(__VA_ARGS__)

◆ vmfle_vf_f64m8_b8_m

#define vmfle_vf_f64m8_b8_m ( ... ) __riscv_vmfle_vf_f64m8_b8_mu(__VA_ARGS__)

◆ vmfle_vv_f16m1_b16

#define vmfle_vv_f16m1_b16 ( ... ) __riscv_vmfle_vv_f16m1_b16(__VA_ARGS__)

◆ vmfle_vv_f16m1_b16_m

#define vmfle_vv_f16m1_b16_m ( ... ) __riscv_vmfle_vv_f16m1_b16_mu(__VA_ARGS__)

◆ vmfle_vv_f16m2_b8

#define vmfle_vv_f16m2_b8 ( ... ) __riscv_vmfle_vv_f16m2_b8(__VA_ARGS__)

◆ vmfle_vv_f16m2_b8_m

#define vmfle_vv_f16m2_b8_m ( ... ) __riscv_vmfle_vv_f16m2_b8_mu(__VA_ARGS__)

◆ vmfle_vv_f16m4_b4

#define vmfle_vv_f16m4_b4 ( ... ) __riscv_vmfle_vv_f16m4_b4(__VA_ARGS__)

◆ vmfle_vv_f16m4_b4_m

#define vmfle_vv_f16m4_b4_m ( ... ) __riscv_vmfle_vv_f16m4_b4_mu(__VA_ARGS__)

◆ vmfle_vv_f16m8_b2

#define vmfle_vv_f16m8_b2 ( ... ) __riscv_vmfle_vv_f16m8_b2(__VA_ARGS__)

◆ vmfle_vv_f16m8_b2_m

#define vmfle_vv_f16m8_b2_m ( ... ) __riscv_vmfle_vv_f16m8_b2_mu(__VA_ARGS__)

◆ vmfle_vv_f16mf2_b32

#define vmfle_vv_f16mf2_b32 ( ... ) __riscv_vmfle_vv_f16mf2_b32(__VA_ARGS__)

◆ vmfle_vv_f16mf2_b32_m

#define vmfle_vv_f16mf2_b32_m ( ... ) __riscv_vmfle_vv_f16mf2_b32_mu(__VA_ARGS__)

◆ vmfle_vv_f16mf4_b64

#define vmfle_vv_f16mf4_b64 ( ... ) __riscv_vmfle_vv_f16mf4_b64(__VA_ARGS__)

◆ vmfle_vv_f16mf4_b64_m

#define vmfle_vv_f16mf4_b64_m ( ... ) __riscv_vmfle_vv_f16mf4_b64_mu(__VA_ARGS__)

◆ vmfle_vv_f32m1_b32

#define vmfle_vv_f32m1_b32 ( ... ) __riscv_vmfle_vv_f32m1_b32(__VA_ARGS__)

◆ vmfle_vv_f32m1_b32_m

#define vmfle_vv_f32m1_b32_m ( ... ) __riscv_vmfle_vv_f32m1_b32_mu(__VA_ARGS__)

◆ vmfle_vv_f32m2_b16

#define vmfle_vv_f32m2_b16 ( ... ) __riscv_vmfle_vv_f32m2_b16(__VA_ARGS__)

◆ vmfle_vv_f32m2_b16_m

#define vmfle_vv_f32m2_b16_m ( ... ) __riscv_vmfle_vv_f32m2_b16_mu(__VA_ARGS__)

◆ vmfle_vv_f32m4_b8

#define vmfle_vv_f32m4_b8 ( ... ) __riscv_vmfle_vv_f32m4_b8(__VA_ARGS__)

◆ vmfle_vv_f32m4_b8_m

#define vmfle_vv_f32m4_b8_m ( ... ) __riscv_vmfle_vv_f32m4_b8_mu(__VA_ARGS__)

◆ vmfle_vv_f32m8_b4

#define vmfle_vv_f32m8_b4 ( ... ) __riscv_vmfle_vv_f32m8_b4(__VA_ARGS__)

◆ vmfle_vv_f32m8_b4_m

#define vmfle_vv_f32m8_b4_m ( ... ) __riscv_vmfle_vv_f32m8_b4_mu(__VA_ARGS__)

◆ vmfle_vv_f32mf2_b64

#define vmfle_vv_f32mf2_b64 ( ... ) __riscv_vmfle_vv_f32mf2_b64(__VA_ARGS__)

◆ vmfle_vv_f32mf2_b64_m

#define vmfle_vv_f32mf2_b64_m ( ... ) __riscv_vmfle_vv_f32mf2_b64_mu(__VA_ARGS__)

◆ vmfle_vv_f64m1_b64

#define vmfle_vv_f64m1_b64 ( ... ) __riscv_vmfle_vv_f64m1_b64(__VA_ARGS__)

◆ vmfle_vv_f64m1_b64_m

#define vmfle_vv_f64m1_b64_m ( ... ) __riscv_vmfle_vv_f64m1_b64_mu(__VA_ARGS__)

◆ vmfle_vv_f64m2_b32

#define vmfle_vv_f64m2_b32 ( ... ) __riscv_vmfle_vv_f64m2_b32(__VA_ARGS__)

◆ vmfle_vv_f64m2_b32_m

#define vmfle_vv_f64m2_b32_m ( ... ) __riscv_vmfle_vv_f64m2_b32_mu(__VA_ARGS__)

◆ vmfle_vv_f64m4_b16

#define vmfle_vv_f64m4_b16 ( ... ) __riscv_vmfle_vv_f64m4_b16(__VA_ARGS__)

◆ vmfle_vv_f64m4_b16_m

#define vmfle_vv_f64m4_b16_m ( ... ) __riscv_vmfle_vv_f64m4_b16_mu(__VA_ARGS__)

◆ vmfle_vv_f64m8_b8

#define vmfle_vv_f64m8_b8 ( ... ) __riscv_vmfle_vv_f64m8_b8(__VA_ARGS__)

◆ vmfle_vv_f64m8_b8_m

#define vmfle_vv_f64m8_b8_m ( ... ) __riscv_vmfle_vv_f64m8_b8_mu(__VA_ARGS__)

◆ vmflt_vf_f16m1_b16

#define vmflt_vf_f16m1_b16 ( ... ) __riscv_vmflt_vf_f16m1_b16(__VA_ARGS__)

◆ vmflt_vf_f16m1_b16_m

#define vmflt_vf_f16m1_b16_m ( ... ) __riscv_vmflt_vf_f16m1_b16_mu(__VA_ARGS__)

◆ vmflt_vf_f16m2_b8

#define vmflt_vf_f16m2_b8 ( ... ) __riscv_vmflt_vf_f16m2_b8(__VA_ARGS__)

◆ vmflt_vf_f16m2_b8_m

#define vmflt_vf_f16m2_b8_m ( ... ) __riscv_vmflt_vf_f16m2_b8_mu(__VA_ARGS__)

◆ vmflt_vf_f16m4_b4

#define vmflt_vf_f16m4_b4 ( ... ) __riscv_vmflt_vf_f16m4_b4(__VA_ARGS__)

◆ vmflt_vf_f16m4_b4_m

#define vmflt_vf_f16m4_b4_m ( ... ) __riscv_vmflt_vf_f16m4_b4_mu(__VA_ARGS__)

◆ vmflt_vf_f16m8_b2

#define vmflt_vf_f16m8_b2 ( ... ) __riscv_vmflt_vf_f16m8_b2(__VA_ARGS__)

◆ vmflt_vf_f16m8_b2_m

#define vmflt_vf_f16m8_b2_m ( ... ) __riscv_vmflt_vf_f16m8_b2_mu(__VA_ARGS__)

◆ vmflt_vf_f16mf2_b32

#define vmflt_vf_f16mf2_b32 ( ... ) __riscv_vmflt_vf_f16mf2_b32(__VA_ARGS__)

◆ vmflt_vf_f16mf2_b32_m

#define vmflt_vf_f16mf2_b32_m ( ... ) __riscv_vmflt_vf_f16mf2_b32_mu(__VA_ARGS__)

◆ vmflt_vf_f16mf4_b64

#define vmflt_vf_f16mf4_b64 ( ... ) __riscv_vmflt_vf_f16mf4_b64(__VA_ARGS__)

◆ vmflt_vf_f16mf4_b64_m

#define vmflt_vf_f16mf4_b64_m ( ... ) __riscv_vmflt_vf_f16mf4_b64_mu(__VA_ARGS__)

◆ vmflt_vf_f32m1_b32

#define vmflt_vf_f32m1_b32 ( ... ) __riscv_vmflt_vf_f32m1_b32(__VA_ARGS__)

◆ vmflt_vf_f32m1_b32_m

#define vmflt_vf_f32m1_b32_m ( ... ) __riscv_vmflt_vf_f32m1_b32_mu(__VA_ARGS__)

◆ vmflt_vf_f32m2_b16

#define vmflt_vf_f32m2_b16 ( ... ) __riscv_vmflt_vf_f32m2_b16(__VA_ARGS__)

◆ vmflt_vf_f32m2_b16_m

#define vmflt_vf_f32m2_b16_m ( ... ) __riscv_vmflt_vf_f32m2_b16_mu(__VA_ARGS__)

◆ vmflt_vf_f32m4_b8

#define vmflt_vf_f32m4_b8 ( ... ) __riscv_vmflt_vf_f32m4_b8(__VA_ARGS__)

◆ vmflt_vf_f32m4_b8_m

#define vmflt_vf_f32m4_b8_m ( ... ) __riscv_vmflt_vf_f32m4_b8_mu(__VA_ARGS__)

◆ vmflt_vf_f32m8_b4

#define vmflt_vf_f32m8_b4 ( ... ) __riscv_vmflt_vf_f32m8_b4(__VA_ARGS__)

◆ vmflt_vf_f32m8_b4_m

#define vmflt_vf_f32m8_b4_m ( ... ) __riscv_vmflt_vf_f32m8_b4_mu(__VA_ARGS__)

◆ vmflt_vf_f32mf2_b64

#define vmflt_vf_f32mf2_b64 ( ... ) __riscv_vmflt_vf_f32mf2_b64(__VA_ARGS__)

◆ vmflt_vf_f32mf2_b64_m

#define vmflt_vf_f32mf2_b64_m ( ... ) __riscv_vmflt_vf_f32mf2_b64_mu(__VA_ARGS__)

◆ vmflt_vf_f64m1_b64

#define vmflt_vf_f64m1_b64 ( ... ) __riscv_vmflt_vf_f64m1_b64(__VA_ARGS__)

◆ vmflt_vf_f64m1_b64_m

#define vmflt_vf_f64m1_b64_m ( ... ) __riscv_vmflt_vf_f64m1_b64_mu(__VA_ARGS__)

◆ vmflt_vf_f64m2_b32

#define vmflt_vf_f64m2_b32 ( ... ) __riscv_vmflt_vf_f64m2_b32(__VA_ARGS__)

◆ vmflt_vf_f64m2_b32_m

#define vmflt_vf_f64m2_b32_m ( ... ) __riscv_vmflt_vf_f64m2_b32_mu(__VA_ARGS__)

◆ vmflt_vf_f64m4_b16

#define vmflt_vf_f64m4_b16 ( ... ) __riscv_vmflt_vf_f64m4_b16(__VA_ARGS__)

◆ vmflt_vf_f64m4_b16_m

#define vmflt_vf_f64m4_b16_m ( ... ) __riscv_vmflt_vf_f64m4_b16_mu(__VA_ARGS__)

◆ vmflt_vf_f64m8_b8

#define vmflt_vf_f64m8_b8 ( ... ) __riscv_vmflt_vf_f64m8_b8(__VA_ARGS__)

◆ vmflt_vf_f64m8_b8_m

#define vmflt_vf_f64m8_b8_m ( ... ) __riscv_vmflt_vf_f64m8_b8_mu(__VA_ARGS__)

◆ vmflt_vv_f16m1_b16

#define vmflt_vv_f16m1_b16 ( ... ) __riscv_vmflt_vv_f16m1_b16(__VA_ARGS__)

◆ vmflt_vv_f16m1_b16_m

#define vmflt_vv_f16m1_b16_m ( ... ) __riscv_vmflt_vv_f16m1_b16_mu(__VA_ARGS__)

◆ vmflt_vv_f16m2_b8

#define vmflt_vv_f16m2_b8 ( ... ) __riscv_vmflt_vv_f16m2_b8(__VA_ARGS__)

◆ vmflt_vv_f16m2_b8_m

#define vmflt_vv_f16m2_b8_m ( ... ) __riscv_vmflt_vv_f16m2_b8_mu(__VA_ARGS__)

◆ vmflt_vv_f16m4_b4

#define vmflt_vv_f16m4_b4 ( ... ) __riscv_vmflt_vv_f16m4_b4(__VA_ARGS__)

◆ vmflt_vv_f16m4_b4_m

#define vmflt_vv_f16m4_b4_m ( ... ) __riscv_vmflt_vv_f16m4_b4_mu(__VA_ARGS__)

◆ vmflt_vv_f16m8_b2

#define vmflt_vv_f16m8_b2 ( ... ) __riscv_vmflt_vv_f16m8_b2(__VA_ARGS__)

◆ vmflt_vv_f16m8_b2_m

#define vmflt_vv_f16m8_b2_m ( ... ) __riscv_vmflt_vv_f16m8_b2_mu(__VA_ARGS__)

◆ vmflt_vv_f16mf2_b32

#define vmflt_vv_f16mf2_b32 ( ... ) __riscv_vmflt_vv_f16mf2_b32(__VA_ARGS__)

◆ vmflt_vv_f16mf2_b32_m

#define vmflt_vv_f16mf2_b32_m ( ... ) __riscv_vmflt_vv_f16mf2_b32_mu(__VA_ARGS__)

◆ vmflt_vv_f16mf4_b64

#define vmflt_vv_f16mf4_b64 ( ... ) __riscv_vmflt_vv_f16mf4_b64(__VA_ARGS__)

◆ vmflt_vv_f16mf4_b64_m

#define vmflt_vv_f16mf4_b64_m ( ... ) __riscv_vmflt_vv_f16mf4_b64_mu(__VA_ARGS__)

◆ vmflt_vv_f32m1_b32

#define vmflt_vv_f32m1_b32 ( ... ) __riscv_vmflt_vv_f32m1_b32(__VA_ARGS__)

◆ vmflt_vv_f32m1_b32_m

#define vmflt_vv_f32m1_b32_m ( ... ) __riscv_vmflt_vv_f32m1_b32_mu(__VA_ARGS__)

◆ vmflt_vv_f32m2_b16

#define vmflt_vv_f32m2_b16 ( ... ) __riscv_vmflt_vv_f32m2_b16(__VA_ARGS__)

◆ vmflt_vv_f32m2_b16_m

#define vmflt_vv_f32m2_b16_m ( ... ) __riscv_vmflt_vv_f32m2_b16_mu(__VA_ARGS__)

◆ vmflt_vv_f32m4_b8

#define vmflt_vv_f32m4_b8 ( ... ) __riscv_vmflt_vv_f32m4_b8(__VA_ARGS__)

◆ vmflt_vv_f32m4_b8_m

#define vmflt_vv_f32m4_b8_m ( ... ) __riscv_vmflt_vv_f32m4_b8_mu(__VA_ARGS__)

◆ vmflt_vv_f32m8_b4

#define vmflt_vv_f32m8_b4 ( ... ) __riscv_vmflt_vv_f32m8_b4(__VA_ARGS__)

◆ vmflt_vv_f32m8_b4_m

#define vmflt_vv_f32m8_b4_m ( ... ) __riscv_vmflt_vv_f32m8_b4_mu(__VA_ARGS__)

◆ vmflt_vv_f32mf2_b64

#define vmflt_vv_f32mf2_b64 ( ... ) __riscv_vmflt_vv_f32mf2_b64(__VA_ARGS__)

◆ vmflt_vv_f32mf2_b64_m

#define vmflt_vv_f32mf2_b64_m ( ... ) __riscv_vmflt_vv_f32mf2_b64_mu(__VA_ARGS__)

◆ vmflt_vv_f64m1_b64

#define vmflt_vv_f64m1_b64 ( ... ) __riscv_vmflt_vv_f64m1_b64(__VA_ARGS__)

◆ vmflt_vv_f64m1_b64_m

#define vmflt_vv_f64m1_b64_m ( ... ) __riscv_vmflt_vv_f64m1_b64_mu(__VA_ARGS__)

◆ vmflt_vv_f64m2_b32

#define vmflt_vv_f64m2_b32 ( ... ) __riscv_vmflt_vv_f64m2_b32(__VA_ARGS__)

◆ vmflt_vv_f64m2_b32_m

#define vmflt_vv_f64m2_b32_m ( ... ) __riscv_vmflt_vv_f64m2_b32_mu(__VA_ARGS__)

◆ vmflt_vv_f64m4_b16

#define vmflt_vv_f64m4_b16 ( ... ) __riscv_vmflt_vv_f64m4_b16(__VA_ARGS__)

◆ vmflt_vv_f64m4_b16_m

#define vmflt_vv_f64m4_b16_m ( ... ) __riscv_vmflt_vv_f64m4_b16_mu(__VA_ARGS__)

◆ vmflt_vv_f64m8_b8

#define vmflt_vv_f64m8_b8 ( ... ) __riscv_vmflt_vv_f64m8_b8(__VA_ARGS__)

◆ vmflt_vv_f64m8_b8_m

#define vmflt_vv_f64m8_b8_m ( ... ) __riscv_vmflt_vv_f64m8_b8_mu(__VA_ARGS__)

◆ vmfne_vf_f16m1_b16

#define vmfne_vf_f16m1_b16 ( ... ) __riscv_vmfne_vf_f16m1_b16(__VA_ARGS__)

◆ vmfne_vf_f16m1_b16_m

#define vmfne_vf_f16m1_b16_m ( ... ) __riscv_vmfne_vf_f16m1_b16_mu(__VA_ARGS__)

◆ vmfne_vf_f16m2_b8

#define vmfne_vf_f16m2_b8 ( ... ) __riscv_vmfne_vf_f16m2_b8(__VA_ARGS__)

◆ vmfne_vf_f16m2_b8_m

#define vmfne_vf_f16m2_b8_m ( ... ) __riscv_vmfne_vf_f16m2_b8_mu(__VA_ARGS__)

◆ vmfne_vf_f16m4_b4

#define vmfne_vf_f16m4_b4 ( ... ) __riscv_vmfne_vf_f16m4_b4(__VA_ARGS__)

◆ vmfne_vf_f16m4_b4_m

#define vmfne_vf_f16m4_b4_m ( ... ) __riscv_vmfne_vf_f16m4_b4_mu(__VA_ARGS__)

◆ vmfne_vf_f16m8_b2

#define vmfne_vf_f16m8_b2 ( ... ) __riscv_vmfne_vf_f16m8_b2(__VA_ARGS__)

◆ vmfne_vf_f16m8_b2_m

#define vmfne_vf_f16m8_b2_m ( ... ) __riscv_vmfne_vf_f16m8_b2_mu(__VA_ARGS__)

◆ vmfne_vf_f16mf2_b32

#define vmfne_vf_f16mf2_b32 ( ... ) __riscv_vmfne_vf_f16mf2_b32(__VA_ARGS__)

◆ vmfne_vf_f16mf2_b32_m

#define vmfne_vf_f16mf2_b32_m ( ... ) __riscv_vmfne_vf_f16mf2_b32_mu(__VA_ARGS__)

◆ vmfne_vf_f16mf4_b64

#define vmfne_vf_f16mf4_b64 ( ... ) __riscv_vmfne_vf_f16mf4_b64(__VA_ARGS__)

◆ vmfne_vf_f16mf4_b64_m

#define vmfne_vf_f16mf4_b64_m ( ... ) __riscv_vmfne_vf_f16mf4_b64_mu(__VA_ARGS__)

◆ vmfne_vf_f32m1_b32

#define vmfne_vf_f32m1_b32 ( ... ) __riscv_vmfne_vf_f32m1_b32(__VA_ARGS__)

◆ vmfne_vf_f32m1_b32_m

#define vmfne_vf_f32m1_b32_m ( ... ) __riscv_vmfne_vf_f32m1_b32_mu(__VA_ARGS__)

◆ vmfne_vf_f32m2_b16

#define vmfne_vf_f32m2_b16 ( ... ) __riscv_vmfne_vf_f32m2_b16(__VA_ARGS__)

◆ vmfne_vf_f32m2_b16_m

#define vmfne_vf_f32m2_b16_m ( ... ) __riscv_vmfne_vf_f32m2_b16_mu(__VA_ARGS__)

◆ vmfne_vf_f32m4_b8

#define vmfne_vf_f32m4_b8 ( ... ) __riscv_vmfne_vf_f32m4_b8(__VA_ARGS__)

◆ vmfne_vf_f32m4_b8_m

#define vmfne_vf_f32m4_b8_m ( ... ) __riscv_vmfne_vf_f32m4_b8_mu(__VA_ARGS__)

◆ vmfne_vf_f32m8_b4

#define vmfne_vf_f32m8_b4 ( ... ) __riscv_vmfne_vf_f32m8_b4(__VA_ARGS__)

◆ vmfne_vf_f32m8_b4_m

#define vmfne_vf_f32m8_b4_m ( ... ) __riscv_vmfne_vf_f32m8_b4_mu(__VA_ARGS__)

◆ vmfne_vf_f32mf2_b64

#define vmfne_vf_f32mf2_b64 ( ... ) __riscv_vmfne_vf_f32mf2_b64(__VA_ARGS__)

◆ vmfne_vf_f32mf2_b64_m

#define vmfne_vf_f32mf2_b64_m ( ... ) __riscv_vmfne_vf_f32mf2_b64_mu(__VA_ARGS__)

◆ vmfne_vf_f64m1_b64

#define vmfne_vf_f64m1_b64 ( ... ) __riscv_vmfne_vf_f64m1_b64(__VA_ARGS__)

◆ vmfne_vf_f64m1_b64_m

#define vmfne_vf_f64m1_b64_m ( ... ) __riscv_vmfne_vf_f64m1_b64_mu(__VA_ARGS__)

◆ vmfne_vf_f64m2_b32

#define vmfne_vf_f64m2_b32 ( ... ) __riscv_vmfne_vf_f64m2_b32(__VA_ARGS__)

◆ vmfne_vf_f64m2_b32_m

#define vmfne_vf_f64m2_b32_m ( ... ) __riscv_vmfne_vf_f64m2_b32_mu(__VA_ARGS__)

◆ vmfne_vf_f64m4_b16

#define vmfne_vf_f64m4_b16 ( ... ) __riscv_vmfne_vf_f64m4_b16(__VA_ARGS__)

◆ vmfne_vf_f64m4_b16_m

#define vmfne_vf_f64m4_b16_m ( ... ) __riscv_vmfne_vf_f64m4_b16_mu(__VA_ARGS__)

◆ vmfne_vf_f64m8_b8

#define vmfne_vf_f64m8_b8 ( ... ) __riscv_vmfne_vf_f64m8_b8(__VA_ARGS__)

◆ vmfne_vf_f64m8_b8_m

#define vmfne_vf_f64m8_b8_m ( ... ) __riscv_vmfne_vf_f64m8_b8_mu(__VA_ARGS__)

◆ vmfne_vv_f16m1_b16

#define vmfne_vv_f16m1_b16 ( ... ) __riscv_vmfne_vv_f16m1_b16(__VA_ARGS__)

◆ vmfne_vv_f16m1_b16_m

#define vmfne_vv_f16m1_b16_m ( ... ) __riscv_vmfne_vv_f16m1_b16_mu(__VA_ARGS__)

◆ vmfne_vv_f16m2_b8

#define vmfne_vv_f16m2_b8 ( ... ) __riscv_vmfne_vv_f16m2_b8(__VA_ARGS__)

◆ vmfne_vv_f16m2_b8_m

#define vmfne_vv_f16m2_b8_m ( ... ) __riscv_vmfne_vv_f16m2_b8_mu(__VA_ARGS__)

◆ vmfne_vv_f16m4_b4

#define vmfne_vv_f16m4_b4 ( ... ) __riscv_vmfne_vv_f16m4_b4(__VA_ARGS__)

◆ vmfne_vv_f16m4_b4_m

#define vmfne_vv_f16m4_b4_m ( ... ) __riscv_vmfne_vv_f16m4_b4_mu(__VA_ARGS__)

◆ vmfne_vv_f16m8_b2

#define vmfne_vv_f16m8_b2 ( ... ) __riscv_vmfne_vv_f16m8_b2(__VA_ARGS__)

◆ vmfne_vv_f16m8_b2_m

#define vmfne_vv_f16m8_b2_m ( ... ) __riscv_vmfne_vv_f16m8_b2_mu(__VA_ARGS__)

◆ vmfne_vv_f16mf2_b32

#define vmfne_vv_f16mf2_b32 ( ... ) __riscv_vmfne_vv_f16mf2_b32(__VA_ARGS__)

◆ vmfne_vv_f16mf2_b32_m

#define vmfne_vv_f16mf2_b32_m ( ... ) __riscv_vmfne_vv_f16mf2_b32_mu(__VA_ARGS__)

◆ vmfne_vv_f16mf4_b64

#define vmfne_vv_f16mf4_b64 ( ... ) __riscv_vmfne_vv_f16mf4_b64(__VA_ARGS__)

◆ vmfne_vv_f16mf4_b64_m

#define vmfne_vv_f16mf4_b64_m ( ... ) __riscv_vmfne_vv_f16mf4_b64_mu(__VA_ARGS__)

◆ vmfne_vv_f32m1_b32

#define vmfne_vv_f32m1_b32 ( ... ) __riscv_vmfne_vv_f32m1_b32(__VA_ARGS__)

◆ vmfne_vv_f32m1_b32_m

#define vmfne_vv_f32m1_b32_m ( ... ) __riscv_vmfne_vv_f32m1_b32_mu(__VA_ARGS__)

◆ vmfne_vv_f32m2_b16

#define vmfne_vv_f32m2_b16 ( ... ) __riscv_vmfne_vv_f32m2_b16(__VA_ARGS__)

◆ vmfne_vv_f32m2_b16_m

#define vmfne_vv_f32m2_b16_m ( ... ) __riscv_vmfne_vv_f32m2_b16_mu(__VA_ARGS__)

◆ vmfne_vv_f32m4_b8

#define vmfne_vv_f32m4_b8 ( ... ) __riscv_vmfne_vv_f32m4_b8(__VA_ARGS__)

◆ vmfne_vv_f32m4_b8_m

#define vmfne_vv_f32m4_b8_m ( ... ) __riscv_vmfne_vv_f32m4_b8_mu(__VA_ARGS__)

◆ vmfne_vv_f32m8_b4

#define vmfne_vv_f32m8_b4 ( ... ) __riscv_vmfne_vv_f32m8_b4(__VA_ARGS__)

◆ vmfne_vv_f32m8_b4_m

#define vmfne_vv_f32m8_b4_m ( ... ) __riscv_vmfne_vv_f32m8_b4_mu(__VA_ARGS__)

◆ vmfne_vv_f32mf2_b64

#define vmfne_vv_f32mf2_b64 ( ... ) __riscv_vmfne_vv_f32mf2_b64(__VA_ARGS__)

◆ vmfne_vv_f32mf2_b64_m

#define vmfne_vv_f32mf2_b64_m ( ... ) __riscv_vmfne_vv_f32mf2_b64_mu(__VA_ARGS__)

◆ vmfne_vv_f64m1_b64

#define vmfne_vv_f64m1_b64 ( ... ) __riscv_vmfne_vv_f64m1_b64(__VA_ARGS__)

◆ vmfne_vv_f64m1_b64_m

#define vmfne_vv_f64m1_b64_m ( ... ) __riscv_vmfne_vv_f64m1_b64_mu(__VA_ARGS__)

◆ vmfne_vv_f64m2_b32

#define vmfne_vv_f64m2_b32 ( ... ) __riscv_vmfne_vv_f64m2_b32(__VA_ARGS__)

◆ vmfne_vv_f64m2_b32_m

#define vmfne_vv_f64m2_b32_m ( ... ) __riscv_vmfne_vv_f64m2_b32_mu(__VA_ARGS__)

◆ vmfne_vv_f64m4_b16

#define vmfne_vv_f64m4_b16 ( ... ) __riscv_vmfne_vv_f64m4_b16(__VA_ARGS__)

◆ vmfne_vv_f64m4_b16_m

#define vmfne_vv_f64m4_b16_m ( ... ) __riscv_vmfne_vv_f64m4_b16_mu(__VA_ARGS__)

◆ vmfne_vv_f64m8_b8

#define vmfne_vv_f64m8_b8 ( ... ) __riscv_vmfne_vv_f64m8_b8(__VA_ARGS__)

◆ vmfne_vv_f64m8_b8_m

#define vmfne_vv_f64m8_b8_m ( ... ) __riscv_vmfne_vv_f64m8_b8_mu(__VA_ARGS__)

◆ vmin_vv_i16m1

#define vmin_vv_i16m1 ( ... ) __riscv_vmin_vv_i16m1(__VA_ARGS__)

◆ vmin_vv_i16m1_m

#define vmin_vv_i16m1_m ( ... ) __riscv_vmin_vv_i16m1_tumu(__VA_ARGS__)

◆ vmin_vv_i16m2

#define vmin_vv_i16m2 ( ... ) __riscv_vmin_vv_i16m2(__VA_ARGS__)

◆ vmin_vv_i16m2_m

#define vmin_vv_i16m2_m ( ... ) __riscv_vmin_vv_i16m2_tumu(__VA_ARGS__)

◆ vmin_vv_i16m4

#define vmin_vv_i16m4 ( ... ) __riscv_vmin_vv_i16m4(__VA_ARGS__)

◆ vmin_vv_i16m4_m

#define vmin_vv_i16m4_m ( ... ) __riscv_vmin_vv_i16m4_tumu(__VA_ARGS__)

◆ vmin_vv_i16m8

#define vmin_vv_i16m8 ( ... ) __riscv_vmin_vv_i16m8(__VA_ARGS__)

◆ vmin_vv_i16m8_m

#define vmin_vv_i16m8_m ( ... ) __riscv_vmin_vv_i16m8_tumu(__VA_ARGS__)

◆ vmin_vv_i16mf2

#define vmin_vv_i16mf2 ( ... ) __riscv_vmin_vv_i16mf2(__VA_ARGS__)

◆ vmin_vv_i16mf2_m

#define vmin_vv_i16mf2_m ( ... ) __riscv_vmin_vv_i16mf2_tumu(__VA_ARGS__)

◆ vmin_vv_i16mf4

#define vmin_vv_i16mf4 ( ... ) __riscv_vmin_vv_i16mf4(__VA_ARGS__)

◆ vmin_vv_i16mf4_m

#define vmin_vv_i16mf4_m ( ... ) __riscv_vmin_vv_i16mf4_tumu(__VA_ARGS__)

◆ vmin_vv_i32m1

#define vmin_vv_i32m1 ( ... ) __riscv_vmin_vv_i32m1(__VA_ARGS__)

◆ vmin_vv_i32m1_m

#define vmin_vv_i32m1_m ( ... ) __riscv_vmin_vv_i32m1_tumu(__VA_ARGS__)

◆ vmin_vv_i32m2

#define vmin_vv_i32m2 ( ... ) __riscv_vmin_vv_i32m2(__VA_ARGS__)

◆ vmin_vv_i32m2_m

#define vmin_vv_i32m2_m ( ... ) __riscv_vmin_vv_i32m2_tumu(__VA_ARGS__)

◆ vmin_vv_i32m4

#define vmin_vv_i32m4 ( ... ) __riscv_vmin_vv_i32m4(__VA_ARGS__)

◆ vmin_vv_i32m4_m

#define vmin_vv_i32m4_m ( ... ) __riscv_vmin_vv_i32m4_tumu(__VA_ARGS__)

◆ vmin_vv_i32m8

#define vmin_vv_i32m8 ( ... ) __riscv_vmin_vv_i32m8(__VA_ARGS__)

◆ vmin_vv_i32m8_m

#define vmin_vv_i32m8_m ( ... ) __riscv_vmin_vv_i32m8_tumu(__VA_ARGS__)

◆ vmin_vv_i32mf2

#define vmin_vv_i32mf2 ( ... ) __riscv_vmin_vv_i32mf2(__VA_ARGS__)

◆ vmin_vv_i32mf2_m

#define vmin_vv_i32mf2_m ( ... ) __riscv_vmin_vv_i32mf2_tumu(__VA_ARGS__)

◆ vmin_vv_i64m1

#define vmin_vv_i64m1 ( ... ) __riscv_vmin_vv_i64m1(__VA_ARGS__)

◆ vmin_vv_i64m1_m

#define vmin_vv_i64m1_m ( ... ) __riscv_vmin_vv_i64m1_tumu(__VA_ARGS__)

◆ vmin_vv_i64m2

#define vmin_vv_i64m2 ( ... ) __riscv_vmin_vv_i64m2(__VA_ARGS__)

◆ vmin_vv_i64m2_m

#define vmin_vv_i64m2_m ( ... ) __riscv_vmin_vv_i64m2_tumu(__VA_ARGS__)

◆ vmin_vv_i64m4

#define vmin_vv_i64m4 ( ... ) __riscv_vmin_vv_i64m4(__VA_ARGS__)

◆ vmin_vv_i64m4_m

#define vmin_vv_i64m4_m ( ... ) __riscv_vmin_vv_i64m4_tumu(__VA_ARGS__)

◆ vmin_vv_i64m8

#define vmin_vv_i64m8 ( ... ) __riscv_vmin_vv_i64m8(__VA_ARGS__)

◆ vmin_vv_i64m8_m

#define vmin_vv_i64m8_m ( ... ) __riscv_vmin_vv_i64m8_tumu(__VA_ARGS__)

◆ vmin_vv_i8m1

#define vmin_vv_i8m1 ( ... ) __riscv_vmin_vv_i8m1(__VA_ARGS__)

◆ vmin_vv_i8m1_m

#define vmin_vv_i8m1_m ( ... ) __riscv_vmin_vv_i8m1_tumu(__VA_ARGS__)

◆ vmin_vv_i8m2

#define vmin_vv_i8m2 ( ... ) __riscv_vmin_vv_i8m2(__VA_ARGS__)

◆ vmin_vv_i8m2_m

#define vmin_vv_i8m2_m ( ... ) __riscv_vmin_vv_i8m2_tumu(__VA_ARGS__)

◆ vmin_vv_i8m4

#define vmin_vv_i8m4 ( ... ) __riscv_vmin_vv_i8m4(__VA_ARGS__)

◆ vmin_vv_i8m4_m

#define vmin_vv_i8m4_m ( ... ) __riscv_vmin_vv_i8m4_tumu(__VA_ARGS__)

◆ vmin_vv_i8m8

#define vmin_vv_i8m8 ( ... ) __riscv_vmin_vv_i8m8(__VA_ARGS__)

◆ vmin_vv_i8m8_m

#define vmin_vv_i8m8_m ( ... ) __riscv_vmin_vv_i8m8_tumu(__VA_ARGS__)

◆ vmin_vv_i8mf2

#define vmin_vv_i8mf2 ( ... ) __riscv_vmin_vv_i8mf2(__VA_ARGS__)

◆ vmin_vv_i8mf2_m

#define vmin_vv_i8mf2_m ( ... ) __riscv_vmin_vv_i8mf2_tumu(__VA_ARGS__)

◆ vmin_vv_i8mf4

#define vmin_vv_i8mf4 ( ... ) __riscv_vmin_vv_i8mf4(__VA_ARGS__)

◆ vmin_vv_i8mf4_m

#define vmin_vv_i8mf4_m ( ... ) __riscv_vmin_vv_i8mf4_tumu(__VA_ARGS__)

◆ vmin_vv_i8mf8

#define vmin_vv_i8mf8 ( ... ) __riscv_vmin_vv_i8mf8(__VA_ARGS__)

◆ vmin_vv_i8mf8_m

#define vmin_vv_i8mf8_m ( ... ) __riscv_vmin_vv_i8mf8_tumu(__VA_ARGS__)

◆ vmin_vx_i16m1

#define vmin_vx_i16m1 ( ... ) __riscv_vmin_vx_i16m1(__VA_ARGS__)

◆ vmin_vx_i16m1_m

#define vmin_vx_i16m1_m ( ... ) __riscv_vmin_vx_i16m1_tumu(__VA_ARGS__)

◆ vmin_vx_i16m2

#define vmin_vx_i16m2 ( ... ) __riscv_vmin_vx_i16m2(__VA_ARGS__)

◆ vmin_vx_i16m2_m

#define vmin_vx_i16m2_m ( ... ) __riscv_vmin_vx_i16m2_tumu(__VA_ARGS__)

◆ vmin_vx_i16m4

#define vmin_vx_i16m4 ( ... ) __riscv_vmin_vx_i16m4(__VA_ARGS__)

◆ vmin_vx_i16m4_m

#define vmin_vx_i16m4_m ( ... ) __riscv_vmin_vx_i16m4_tumu(__VA_ARGS__)

◆ vmin_vx_i16m8

#define vmin_vx_i16m8 ( ... ) __riscv_vmin_vx_i16m8(__VA_ARGS__)

◆ vmin_vx_i16m8_m

#define vmin_vx_i16m8_m ( ... ) __riscv_vmin_vx_i16m8_tumu(__VA_ARGS__)

◆ vmin_vx_i16mf2

#define vmin_vx_i16mf2 ( ... ) __riscv_vmin_vx_i16mf2(__VA_ARGS__)

◆ vmin_vx_i16mf2_m

#define vmin_vx_i16mf2_m ( ... ) __riscv_vmin_vx_i16mf2_tumu(__VA_ARGS__)

◆ vmin_vx_i16mf4

#define vmin_vx_i16mf4 ( ... ) __riscv_vmin_vx_i16mf4(__VA_ARGS__)

◆ vmin_vx_i16mf4_m

#define vmin_vx_i16mf4_m ( ... ) __riscv_vmin_vx_i16mf4_tumu(__VA_ARGS__)

◆ vmin_vx_i32m1

#define vmin_vx_i32m1 ( ... ) __riscv_vmin_vx_i32m1(__VA_ARGS__)

◆ vmin_vx_i32m1_m

#define vmin_vx_i32m1_m ( ... ) __riscv_vmin_vx_i32m1_tumu(__VA_ARGS__)

◆ vmin_vx_i32m2

#define vmin_vx_i32m2 ( ... ) __riscv_vmin_vx_i32m2(__VA_ARGS__)

◆ vmin_vx_i32m2_m

#define vmin_vx_i32m2_m ( ... ) __riscv_vmin_vx_i32m2_tumu(__VA_ARGS__)

◆ vmin_vx_i32m4

#define vmin_vx_i32m4 ( ... ) __riscv_vmin_vx_i32m4(__VA_ARGS__)

◆ vmin_vx_i32m4_m

#define vmin_vx_i32m4_m ( ... ) __riscv_vmin_vx_i32m4_tumu(__VA_ARGS__)

◆ vmin_vx_i32m8

#define vmin_vx_i32m8 ( ... ) __riscv_vmin_vx_i32m8(__VA_ARGS__)

◆ vmin_vx_i32m8_m

#define vmin_vx_i32m8_m ( ... ) __riscv_vmin_vx_i32m8_tumu(__VA_ARGS__)

◆ vmin_vx_i32mf2

#define vmin_vx_i32mf2 ( ... ) __riscv_vmin_vx_i32mf2(__VA_ARGS__)

◆ vmin_vx_i32mf2_m

#define vmin_vx_i32mf2_m ( ... ) __riscv_vmin_vx_i32mf2_tumu(__VA_ARGS__)

◆ vmin_vx_i64m1

#define vmin_vx_i64m1 ( ... ) __riscv_vmin_vx_i64m1(__VA_ARGS__)

◆ vmin_vx_i64m1_m

#define vmin_vx_i64m1_m ( ... ) __riscv_vmin_vx_i64m1_tumu(__VA_ARGS__)

◆ vmin_vx_i64m2

#define vmin_vx_i64m2 ( ... ) __riscv_vmin_vx_i64m2(__VA_ARGS__)

◆ vmin_vx_i64m2_m

#define vmin_vx_i64m2_m ( ... ) __riscv_vmin_vx_i64m2_tumu(__VA_ARGS__)

◆ vmin_vx_i64m4

#define vmin_vx_i64m4 ( ... ) __riscv_vmin_vx_i64m4(__VA_ARGS__)

◆ vmin_vx_i64m4_m

#define vmin_vx_i64m4_m ( ... ) __riscv_vmin_vx_i64m4_tumu(__VA_ARGS__)

◆ vmin_vx_i64m8

#define vmin_vx_i64m8 ( ... ) __riscv_vmin_vx_i64m8(__VA_ARGS__)

◆ vmin_vx_i64m8_m

#define vmin_vx_i64m8_m ( ... ) __riscv_vmin_vx_i64m8_tumu(__VA_ARGS__)

◆ vmin_vx_i8m1

#define vmin_vx_i8m1 ( ... ) __riscv_vmin_vx_i8m1(__VA_ARGS__)

◆ vmin_vx_i8m1_m

#define vmin_vx_i8m1_m ( ... ) __riscv_vmin_vx_i8m1_tumu(__VA_ARGS__)

◆ vmin_vx_i8m2

#define vmin_vx_i8m2 ( ... ) __riscv_vmin_vx_i8m2(__VA_ARGS__)

◆ vmin_vx_i8m2_m

#define vmin_vx_i8m2_m ( ... ) __riscv_vmin_vx_i8m2_tumu(__VA_ARGS__)

◆ vmin_vx_i8m4

#define vmin_vx_i8m4 ( ... ) __riscv_vmin_vx_i8m4(__VA_ARGS__)

◆ vmin_vx_i8m4_m

#define vmin_vx_i8m4_m ( ... ) __riscv_vmin_vx_i8m4_tumu(__VA_ARGS__)

◆ vmin_vx_i8m8

#define vmin_vx_i8m8 ( ... ) __riscv_vmin_vx_i8m8(__VA_ARGS__)

◆ vmin_vx_i8m8_m

#define vmin_vx_i8m8_m ( ... ) __riscv_vmin_vx_i8m8_tumu(__VA_ARGS__)

◆ vmin_vx_i8mf2

#define vmin_vx_i8mf2 ( ... ) __riscv_vmin_vx_i8mf2(__VA_ARGS__)

◆ vmin_vx_i8mf2_m

#define vmin_vx_i8mf2_m ( ... ) __riscv_vmin_vx_i8mf2_tumu(__VA_ARGS__)

◆ vmin_vx_i8mf4

#define vmin_vx_i8mf4 ( ... ) __riscv_vmin_vx_i8mf4(__VA_ARGS__)

◆ vmin_vx_i8mf4_m

#define vmin_vx_i8mf4_m ( ... ) __riscv_vmin_vx_i8mf4_tumu(__VA_ARGS__)

◆ vmin_vx_i8mf8

#define vmin_vx_i8mf8 ( ... ) __riscv_vmin_vx_i8mf8(__VA_ARGS__)

◆ vmin_vx_i8mf8_m

#define vmin_vx_i8mf8_m ( ... ) __riscv_vmin_vx_i8mf8_tumu(__VA_ARGS__)

◆ vminu_vv_u16m1

#define vminu_vv_u16m1 ( ... ) __riscv_vminu_vv_u16m1(__VA_ARGS__)

◆ vminu_vv_u16m1_m

#define vminu_vv_u16m1_m ( ... ) __riscv_vminu_vv_u16m1_tumu(__VA_ARGS__)

◆ vminu_vv_u16m2

#define vminu_vv_u16m2 ( ... ) __riscv_vminu_vv_u16m2(__VA_ARGS__)

◆ vminu_vv_u16m2_m

#define vminu_vv_u16m2_m ( ... ) __riscv_vminu_vv_u16m2_tumu(__VA_ARGS__)

◆ vminu_vv_u16m4

#define vminu_vv_u16m4 ( ... ) __riscv_vminu_vv_u16m4(__VA_ARGS__)

◆ vminu_vv_u16m4_m

#define vminu_vv_u16m4_m ( ... ) __riscv_vminu_vv_u16m4_tumu(__VA_ARGS__)

◆ vminu_vv_u16m8

#define vminu_vv_u16m8 ( ... ) __riscv_vminu_vv_u16m8(__VA_ARGS__)

◆ vminu_vv_u16m8_m

#define vminu_vv_u16m8_m ( ... ) __riscv_vminu_vv_u16m8_tumu(__VA_ARGS__)

◆ vminu_vv_u16mf2

#define vminu_vv_u16mf2 ( ... ) __riscv_vminu_vv_u16mf2(__VA_ARGS__)

◆ vminu_vv_u16mf2_m

#define vminu_vv_u16mf2_m ( ... ) __riscv_vminu_vv_u16mf2_tumu(__VA_ARGS__)

◆ vminu_vv_u16mf4

#define vminu_vv_u16mf4 ( ... ) __riscv_vminu_vv_u16mf4(__VA_ARGS__)

◆ vminu_vv_u16mf4_m

#define vminu_vv_u16mf4_m ( ... ) __riscv_vminu_vv_u16mf4_tumu(__VA_ARGS__)

◆ vminu_vv_u32m1

#define vminu_vv_u32m1 ( ... ) __riscv_vminu_vv_u32m1(__VA_ARGS__)

◆ vminu_vv_u32m1_m

#define vminu_vv_u32m1_m ( ... ) __riscv_vminu_vv_u32m1_tumu(__VA_ARGS__)

◆ vminu_vv_u32m2

#define vminu_vv_u32m2 ( ... ) __riscv_vminu_vv_u32m2(__VA_ARGS__)

◆ vminu_vv_u32m2_m

#define vminu_vv_u32m2_m ( ... ) __riscv_vminu_vv_u32m2_tumu(__VA_ARGS__)

◆ vminu_vv_u32m4

#define vminu_vv_u32m4 ( ... ) __riscv_vminu_vv_u32m4(__VA_ARGS__)

◆ vminu_vv_u32m4_m

#define vminu_vv_u32m4_m ( ... ) __riscv_vminu_vv_u32m4_tumu(__VA_ARGS__)

◆ vminu_vv_u32m8

#define vminu_vv_u32m8 ( ... ) __riscv_vminu_vv_u32m8(__VA_ARGS__)

◆ vminu_vv_u32m8_m

#define vminu_vv_u32m8_m ( ... ) __riscv_vminu_vv_u32m8_tumu(__VA_ARGS__)

◆ vminu_vv_u32mf2

#define vminu_vv_u32mf2 ( ... ) __riscv_vminu_vv_u32mf2(__VA_ARGS__)

◆ vminu_vv_u32mf2_m

#define vminu_vv_u32mf2_m ( ... ) __riscv_vminu_vv_u32mf2_tumu(__VA_ARGS__)

◆ vminu_vv_u64m1

#define vminu_vv_u64m1 ( ... ) __riscv_vminu_vv_u64m1(__VA_ARGS__)

◆ vminu_vv_u64m1_m

#define vminu_vv_u64m1_m ( ... ) __riscv_vminu_vv_u64m1_tumu(__VA_ARGS__)

◆ vminu_vv_u64m2

#define vminu_vv_u64m2 ( ... ) __riscv_vminu_vv_u64m2(__VA_ARGS__)

◆ vminu_vv_u64m2_m

#define vminu_vv_u64m2_m ( ... ) __riscv_vminu_vv_u64m2_tumu(__VA_ARGS__)

◆ vminu_vv_u64m4

#define vminu_vv_u64m4 ( ... ) __riscv_vminu_vv_u64m4(__VA_ARGS__)

◆ vminu_vv_u64m4_m

#define vminu_vv_u64m4_m ( ... ) __riscv_vminu_vv_u64m4_tumu(__VA_ARGS__)

◆ vminu_vv_u64m8

#define vminu_vv_u64m8 ( ... ) __riscv_vminu_vv_u64m8(__VA_ARGS__)

◆ vminu_vv_u64m8_m

#define vminu_vv_u64m8_m ( ... ) __riscv_vminu_vv_u64m8_tumu(__VA_ARGS__)

◆ vminu_vv_u8m1

#define vminu_vv_u8m1 ( ... ) __riscv_vminu_vv_u8m1(__VA_ARGS__)

◆ vminu_vv_u8m1_m

#define vminu_vv_u8m1_m ( ... ) __riscv_vminu_vv_u8m1_tumu(__VA_ARGS__)

◆ vminu_vv_u8m2

#define vminu_vv_u8m2 ( ... ) __riscv_vminu_vv_u8m2(__VA_ARGS__)

◆ vminu_vv_u8m2_m

#define vminu_vv_u8m2_m ( ... ) __riscv_vminu_vv_u8m2_tumu(__VA_ARGS__)

◆ vminu_vv_u8m4

#define vminu_vv_u8m4 ( ... ) __riscv_vminu_vv_u8m4(__VA_ARGS__)

◆ vminu_vv_u8m4_m

#define vminu_vv_u8m4_m ( ... ) __riscv_vminu_vv_u8m4_tumu(__VA_ARGS__)

◆ vminu_vv_u8m8

#define vminu_vv_u8m8 ( ... ) __riscv_vminu_vv_u8m8(__VA_ARGS__)

◆ vminu_vv_u8m8_m

#define vminu_vv_u8m8_m ( ... ) __riscv_vminu_vv_u8m8_tumu(__VA_ARGS__)

◆ vminu_vv_u8mf2

#define vminu_vv_u8mf2 ( ... ) __riscv_vminu_vv_u8mf2(__VA_ARGS__)

◆ vminu_vv_u8mf2_m

#define vminu_vv_u8mf2_m ( ... ) __riscv_vminu_vv_u8mf2_tumu(__VA_ARGS__)

◆ vminu_vv_u8mf4

#define vminu_vv_u8mf4 ( ... ) __riscv_vminu_vv_u8mf4(__VA_ARGS__)

◆ vminu_vv_u8mf4_m

#define vminu_vv_u8mf4_m ( ... ) __riscv_vminu_vv_u8mf4_tumu(__VA_ARGS__)

◆ vminu_vv_u8mf8

#define vminu_vv_u8mf8 ( ... ) __riscv_vminu_vv_u8mf8(__VA_ARGS__)

◆ vminu_vv_u8mf8_m

#define vminu_vv_u8mf8_m ( ... ) __riscv_vminu_vv_u8mf8_tumu(__VA_ARGS__)

◆ vminu_vx_u16m1

#define vminu_vx_u16m1 ( ... ) __riscv_vminu_vx_u16m1(__VA_ARGS__)

◆ vminu_vx_u16m1_m

#define vminu_vx_u16m1_m ( ... ) __riscv_vminu_vx_u16m1_tumu(__VA_ARGS__)

◆ vminu_vx_u16m2

#define vminu_vx_u16m2 ( ... ) __riscv_vminu_vx_u16m2(__VA_ARGS__)

◆ vminu_vx_u16m2_m

#define vminu_vx_u16m2_m ( ... ) __riscv_vminu_vx_u16m2_tumu(__VA_ARGS__)

◆ vminu_vx_u16m4

#define vminu_vx_u16m4 ( ... ) __riscv_vminu_vx_u16m4(__VA_ARGS__)

◆ vminu_vx_u16m4_m

#define vminu_vx_u16m4_m ( ... ) __riscv_vminu_vx_u16m4_tumu(__VA_ARGS__)

◆ vminu_vx_u16m8

#define vminu_vx_u16m8 ( ... ) __riscv_vminu_vx_u16m8(__VA_ARGS__)

◆ vminu_vx_u16m8_m

#define vminu_vx_u16m8_m ( ... ) __riscv_vminu_vx_u16m8_tumu(__VA_ARGS__)

◆ vminu_vx_u16mf2

#define vminu_vx_u16mf2 ( ... ) __riscv_vminu_vx_u16mf2(__VA_ARGS__)

◆ vminu_vx_u16mf2_m

#define vminu_vx_u16mf2_m ( ... ) __riscv_vminu_vx_u16mf2_tumu(__VA_ARGS__)

◆ vminu_vx_u16mf4

#define vminu_vx_u16mf4 ( ... ) __riscv_vminu_vx_u16mf4(__VA_ARGS__)

◆ vminu_vx_u16mf4_m

#define vminu_vx_u16mf4_m ( ... ) __riscv_vminu_vx_u16mf4_tumu(__VA_ARGS__)

◆ vminu_vx_u32m1

#define vminu_vx_u32m1 ( ... ) __riscv_vminu_vx_u32m1(__VA_ARGS__)

◆ vminu_vx_u32m1_m

#define vminu_vx_u32m1_m ( ... ) __riscv_vminu_vx_u32m1_tumu(__VA_ARGS__)

◆ vminu_vx_u32m2

#define vminu_vx_u32m2 ( ... ) __riscv_vminu_vx_u32m2(__VA_ARGS__)

◆ vminu_vx_u32m2_m

#define vminu_vx_u32m2_m ( ... ) __riscv_vminu_vx_u32m2_tumu(__VA_ARGS__)

◆ vminu_vx_u32m4

#define vminu_vx_u32m4 ( ... ) __riscv_vminu_vx_u32m4(__VA_ARGS__)

◆ vminu_vx_u32m4_m

#define vminu_vx_u32m4_m ( ... ) __riscv_vminu_vx_u32m4_tumu(__VA_ARGS__)

◆ vminu_vx_u32m8

#define vminu_vx_u32m8 ( ... ) __riscv_vminu_vx_u32m8(__VA_ARGS__)

◆ vminu_vx_u32m8_m

#define vminu_vx_u32m8_m ( ... ) __riscv_vminu_vx_u32m8_tumu(__VA_ARGS__)

◆ vminu_vx_u32mf2

#define vminu_vx_u32mf2 ( ... ) __riscv_vminu_vx_u32mf2(__VA_ARGS__)

◆ vminu_vx_u32mf2_m

#define vminu_vx_u32mf2_m ( ... ) __riscv_vminu_vx_u32mf2_tumu(__VA_ARGS__)

◆ vminu_vx_u64m1

#define vminu_vx_u64m1 ( ... ) __riscv_vminu_vx_u64m1(__VA_ARGS__)

◆ vminu_vx_u64m1_m

#define vminu_vx_u64m1_m ( ... ) __riscv_vminu_vx_u64m1_tumu(__VA_ARGS__)

◆ vminu_vx_u64m2

#define vminu_vx_u64m2 ( ... ) __riscv_vminu_vx_u64m2(__VA_ARGS__)

◆ vminu_vx_u64m2_m

#define vminu_vx_u64m2_m ( ... ) __riscv_vminu_vx_u64m2_tumu(__VA_ARGS__)

◆ vminu_vx_u64m4

#define vminu_vx_u64m4 ( ... ) __riscv_vminu_vx_u64m4(__VA_ARGS__)

◆ vminu_vx_u64m4_m

#define vminu_vx_u64m4_m ( ... ) __riscv_vminu_vx_u64m4_tumu(__VA_ARGS__)

◆ vminu_vx_u64m8

#define vminu_vx_u64m8 ( ... ) __riscv_vminu_vx_u64m8(__VA_ARGS__)

◆ vminu_vx_u64m8_m

#define vminu_vx_u64m8_m ( ... ) __riscv_vminu_vx_u64m8_tumu(__VA_ARGS__)

◆ vminu_vx_u8m1

#define vminu_vx_u8m1 ( ... ) __riscv_vminu_vx_u8m1(__VA_ARGS__)

◆ vminu_vx_u8m1_m

#define vminu_vx_u8m1_m ( ... ) __riscv_vminu_vx_u8m1_tumu(__VA_ARGS__)

◆ vminu_vx_u8m2

#define vminu_vx_u8m2 ( ... ) __riscv_vminu_vx_u8m2(__VA_ARGS__)

◆ vminu_vx_u8m2_m

#define vminu_vx_u8m2_m ( ... ) __riscv_vminu_vx_u8m2_tumu(__VA_ARGS__)

◆ vminu_vx_u8m4

#define vminu_vx_u8m4 ( ... ) __riscv_vminu_vx_u8m4(__VA_ARGS__)

◆ vminu_vx_u8m4_m

#define vminu_vx_u8m4_m ( ... ) __riscv_vminu_vx_u8m4_tumu(__VA_ARGS__)

◆ vminu_vx_u8m8

#define vminu_vx_u8m8 ( ... ) __riscv_vminu_vx_u8m8(__VA_ARGS__)

◆ vminu_vx_u8m8_m

#define vminu_vx_u8m8_m ( ... ) __riscv_vminu_vx_u8m8_tumu(__VA_ARGS__)

◆ vminu_vx_u8mf2

#define vminu_vx_u8mf2 ( ... ) __riscv_vminu_vx_u8mf2(__VA_ARGS__)

◆ vminu_vx_u8mf2_m

#define vminu_vx_u8mf2_m ( ... ) __riscv_vminu_vx_u8mf2_tumu(__VA_ARGS__)

◆ vminu_vx_u8mf4

#define vminu_vx_u8mf4 ( ... ) __riscv_vminu_vx_u8mf4(__VA_ARGS__)

◆ vminu_vx_u8mf4_m

#define vminu_vx_u8mf4_m ( ... ) __riscv_vminu_vx_u8mf4_tumu(__VA_ARGS__)

◆ vminu_vx_u8mf8

#define vminu_vx_u8mf8 ( ... ) __riscv_vminu_vx_u8mf8(__VA_ARGS__)

◆ vminu_vx_u8mf8_m

#define vminu_vx_u8mf8_m ( ... ) __riscv_vminu_vx_u8mf8_tumu(__VA_ARGS__)

◆ vmmv_m_b1

#define vmmv_m_b1 ( ... ) __riscv_vmmv_m_b1(__VA_ARGS__)

◆ vmmv_m_b16

#define vmmv_m_b16 ( ... ) __riscv_vmmv_m_b16(__VA_ARGS__)

◆ vmmv_m_b2

#define vmmv_m_b2 ( ... ) __riscv_vmmv_m_b2(__VA_ARGS__)

◆ vmmv_m_b32

#define vmmv_m_b32 ( ... ) __riscv_vmmv_m_b32(__VA_ARGS__)

◆ vmmv_m_b4

#define vmmv_m_b4 ( ... ) __riscv_vmmv_m_b4(__VA_ARGS__)

◆ vmmv_m_b64

#define vmmv_m_b64 ( ... ) __riscv_vmmv_m_b64(__VA_ARGS__)

◆ vmmv_m_b8

#define vmmv_m_b8 ( ... ) __riscv_vmmv_m_b8(__VA_ARGS__)

◆ vmnand_mm_b1

#define vmnand_mm_b1 ( ... ) __riscv_vmnand_mm_b1(__VA_ARGS__)

◆ vmnand_mm_b16

#define vmnand_mm_b16 ( ... ) __riscv_vmnand_mm_b16(__VA_ARGS__)

◆ vmnand_mm_b2

#define vmnand_mm_b2 ( ... ) __riscv_vmnand_mm_b2(__VA_ARGS__)

◆ vmnand_mm_b32

#define vmnand_mm_b32 ( ... ) __riscv_vmnand_mm_b32(__VA_ARGS__)

◆ vmnand_mm_b4

#define vmnand_mm_b4 ( ... ) __riscv_vmnand_mm_b4(__VA_ARGS__)

◆ vmnand_mm_b64

#define vmnand_mm_b64 ( ... ) __riscv_vmnand_mm_b64(__VA_ARGS__)

◆ vmnand_mm_b8

#define vmnand_mm_b8 ( ... ) __riscv_vmnand_mm_b8(__VA_ARGS__)

◆ vmnor_mm_b1

#define vmnor_mm_b1 ( ... ) __riscv_vmnor_mm_b1(__VA_ARGS__)

◆ vmnor_mm_b16

#define vmnor_mm_b16 ( ... ) __riscv_vmnor_mm_b16(__VA_ARGS__)

◆ vmnor_mm_b2

#define vmnor_mm_b2 ( ... ) __riscv_vmnor_mm_b2(__VA_ARGS__)

◆ vmnor_mm_b32

#define vmnor_mm_b32 ( ... ) __riscv_vmnor_mm_b32(__VA_ARGS__)

◆ vmnor_mm_b4

#define vmnor_mm_b4 ( ... ) __riscv_vmnor_mm_b4(__VA_ARGS__)

◆ vmnor_mm_b64

#define vmnor_mm_b64 ( ... ) __riscv_vmnor_mm_b64(__VA_ARGS__)

◆ vmnor_mm_b8

#define vmnor_mm_b8 ( ... ) __riscv_vmnor_mm_b8(__VA_ARGS__)

◆ vmnot_m_b1

#define vmnot_m_b1 ( ... ) __riscv_vmnot_m_b1(__VA_ARGS__)

◆ vmnot_m_b16

#define vmnot_m_b16 ( ... ) __riscv_vmnot_m_b16(__VA_ARGS__)

◆ vmnot_m_b2

#define vmnot_m_b2 ( ... ) __riscv_vmnot_m_b2(__VA_ARGS__)

◆ vmnot_m_b32

#define vmnot_m_b32 ( ... ) __riscv_vmnot_m_b32(__VA_ARGS__)

◆ vmnot_m_b4

#define vmnot_m_b4 ( ... ) __riscv_vmnot_m_b4(__VA_ARGS__)

◆ vmnot_m_b64

#define vmnot_m_b64 ( ... ) __riscv_vmnot_m_b64(__VA_ARGS__)

◆ vmnot_m_b8

#define vmnot_m_b8 ( ... ) __riscv_vmnot_m_b8(__VA_ARGS__)

◆ vmor_mm_b1

#define vmor_mm_b1 ( ... ) __riscv_vmor_mm_b1(__VA_ARGS__)

◆ vmor_mm_b16

#define vmor_mm_b16 ( ... ) __riscv_vmor_mm_b16(__VA_ARGS__)

◆ vmor_mm_b2

#define vmor_mm_b2 ( ... ) __riscv_vmor_mm_b2(__VA_ARGS__)

◆ vmor_mm_b32

#define vmor_mm_b32 ( ... ) __riscv_vmor_mm_b32(__VA_ARGS__)

◆ vmor_mm_b4

#define vmor_mm_b4 ( ... ) __riscv_vmor_mm_b4(__VA_ARGS__)

◆ vmor_mm_b64

#define vmor_mm_b64 ( ... ) __riscv_vmor_mm_b64(__VA_ARGS__)

◆ vmor_mm_b8

#define vmor_mm_b8 ( ... ) __riscv_vmor_mm_b8(__VA_ARGS__)

◆ vmorn_mm_b1

#define vmorn_mm_b1 ( ... ) __riscv_vmorn_mm_b1(__VA_ARGS__)

◆ vmorn_mm_b16

#define vmorn_mm_b16 ( ... ) __riscv_vmorn_mm_b16(__VA_ARGS__)

◆ vmorn_mm_b2

#define vmorn_mm_b2 ( ... ) __riscv_vmorn_mm_b2(__VA_ARGS__)

◆ vmorn_mm_b32

#define vmorn_mm_b32 ( ... ) __riscv_vmorn_mm_b32(__VA_ARGS__)

◆ vmorn_mm_b4

#define vmorn_mm_b4 ( ... ) __riscv_vmorn_mm_b4(__VA_ARGS__)

◆ vmorn_mm_b64

#define vmorn_mm_b64 ( ... ) __riscv_vmorn_mm_b64(__VA_ARGS__)

◆ vmorn_mm_b8

#define vmorn_mm_b8 ( ... ) __riscv_vmorn_mm_b8(__VA_ARGS__)

◆ vmsbc_vv_i16m1_b16

#define vmsbc_vv_i16m1_b16 ( ... ) __riscv_vmsbc_vv_i16m1_b16(__VA_ARGS__)

◆ vmsbc_vv_i16m2_b8

#define vmsbc_vv_i16m2_b8 ( ... ) __riscv_vmsbc_vv_i16m2_b8(__VA_ARGS__)

◆ vmsbc_vv_i16m4_b4

#define vmsbc_vv_i16m4_b4 ( ... ) __riscv_vmsbc_vv_i16m4_b4(__VA_ARGS__)

◆ vmsbc_vv_i16m8_b2

#define vmsbc_vv_i16m8_b2 ( ... ) __riscv_vmsbc_vv_i16m8_b2(__VA_ARGS__)

◆ vmsbc_vv_i16mf2_b32

#define vmsbc_vv_i16mf2_b32 ( ... ) __riscv_vmsbc_vv_i16mf2_b32(__VA_ARGS__)

◆ vmsbc_vv_i16mf4_b64

#define vmsbc_vv_i16mf4_b64 ( ... ) __riscv_vmsbc_vv_i16mf4_b64(__VA_ARGS__)

◆ vmsbc_vv_i32m1_b32

#define vmsbc_vv_i32m1_b32 ( ... ) __riscv_vmsbc_vv_i32m1_b32(__VA_ARGS__)

◆ vmsbc_vv_i32m2_b16

#define vmsbc_vv_i32m2_b16 ( ... ) __riscv_vmsbc_vv_i32m2_b16(__VA_ARGS__)

◆ vmsbc_vv_i32m4_b8

#define vmsbc_vv_i32m4_b8 ( ... ) __riscv_vmsbc_vv_i32m4_b8(__VA_ARGS__)

◆ vmsbc_vv_i32m8_b4

#define vmsbc_vv_i32m8_b4 ( ... ) __riscv_vmsbc_vv_i32m8_b4(__VA_ARGS__)

◆ vmsbc_vv_i32mf2_b64

#define vmsbc_vv_i32mf2_b64 ( ... ) __riscv_vmsbc_vv_i32mf2_b64(__VA_ARGS__)

◆ vmsbc_vv_i64m1_b64

#define vmsbc_vv_i64m1_b64 ( ... ) __riscv_vmsbc_vv_i64m1_b64(__VA_ARGS__)

◆ vmsbc_vv_i64m2_b32

#define vmsbc_vv_i64m2_b32 ( ... ) __riscv_vmsbc_vv_i64m2_b32(__VA_ARGS__)

◆ vmsbc_vv_i64m4_b16

#define vmsbc_vv_i64m4_b16 ( ... ) __riscv_vmsbc_vv_i64m4_b16(__VA_ARGS__)

◆ vmsbc_vv_i64m8_b8

#define vmsbc_vv_i64m8_b8 ( ... ) __riscv_vmsbc_vv_i64m8_b8(__VA_ARGS__)

◆ vmsbc_vv_i8m1_b8

#define vmsbc_vv_i8m1_b8 ( ... ) __riscv_vmsbc_vv_i8m1_b8(__VA_ARGS__)

◆ vmsbc_vv_i8m2_b4

#define vmsbc_vv_i8m2_b4 ( ... ) __riscv_vmsbc_vv_i8m2_b4(__VA_ARGS__)

◆ vmsbc_vv_i8m4_b2

#define vmsbc_vv_i8m4_b2 ( ... ) __riscv_vmsbc_vv_i8m4_b2(__VA_ARGS__)

◆ vmsbc_vv_i8m8_b1

#define vmsbc_vv_i8m8_b1 ( ... ) __riscv_vmsbc_vv_i8m8_b1(__VA_ARGS__)

◆ vmsbc_vv_i8mf2_b16

#define vmsbc_vv_i8mf2_b16 ( ... ) __riscv_vmsbc_vv_i8mf2_b16(__VA_ARGS__)

◆ vmsbc_vv_i8mf4_b32

#define vmsbc_vv_i8mf4_b32 ( ... ) __riscv_vmsbc_vv_i8mf4_b32(__VA_ARGS__)

◆ vmsbc_vv_i8mf8_b64

#define vmsbc_vv_i8mf8_b64 ( ... ) __riscv_vmsbc_vv_i8mf8_b64(__VA_ARGS__)

◆ vmsbc_vv_u16m1_b16

#define vmsbc_vv_u16m1_b16 ( ... ) __riscv_vmsbc_vv_u16m1_b16(__VA_ARGS__)

◆ vmsbc_vv_u16m2_b8

#define vmsbc_vv_u16m2_b8 ( ... ) __riscv_vmsbc_vv_u16m2_b8(__VA_ARGS__)

◆ vmsbc_vv_u16m4_b4

#define vmsbc_vv_u16m4_b4 ( ... ) __riscv_vmsbc_vv_u16m4_b4(__VA_ARGS__)

◆ vmsbc_vv_u16m8_b2

#define vmsbc_vv_u16m8_b2 ( ... ) __riscv_vmsbc_vv_u16m8_b2(__VA_ARGS__)

◆ vmsbc_vv_u16mf2_b32

#define vmsbc_vv_u16mf2_b32 ( ... ) __riscv_vmsbc_vv_u16mf2_b32(__VA_ARGS__)

◆ vmsbc_vv_u16mf4_b64

#define vmsbc_vv_u16mf4_b64 ( ... ) __riscv_vmsbc_vv_u16mf4_b64(__VA_ARGS__)

◆ vmsbc_vv_u32m1_b32

#define vmsbc_vv_u32m1_b32 ( ... ) __riscv_vmsbc_vv_u32m1_b32(__VA_ARGS__)

◆ vmsbc_vv_u32m2_b16

#define vmsbc_vv_u32m2_b16 ( ... ) __riscv_vmsbc_vv_u32m2_b16(__VA_ARGS__)

◆ vmsbc_vv_u32m4_b8

#define vmsbc_vv_u32m4_b8 ( ... ) __riscv_vmsbc_vv_u32m4_b8(__VA_ARGS__)

◆ vmsbc_vv_u32m8_b4

#define vmsbc_vv_u32m8_b4 ( ... ) __riscv_vmsbc_vv_u32m8_b4(__VA_ARGS__)

◆ vmsbc_vv_u32mf2_b64

#define vmsbc_vv_u32mf2_b64 ( ... ) __riscv_vmsbc_vv_u32mf2_b64(__VA_ARGS__)

◆ vmsbc_vv_u64m1_b64

#define vmsbc_vv_u64m1_b64 ( ... ) __riscv_vmsbc_vv_u64m1_b64(__VA_ARGS__)

◆ vmsbc_vv_u64m2_b32

#define vmsbc_vv_u64m2_b32 ( ... ) __riscv_vmsbc_vv_u64m2_b32(__VA_ARGS__)

◆ vmsbc_vv_u64m4_b16

#define vmsbc_vv_u64m4_b16 ( ... ) __riscv_vmsbc_vv_u64m4_b16(__VA_ARGS__)

◆ vmsbc_vv_u64m8_b8

#define vmsbc_vv_u64m8_b8 ( ... ) __riscv_vmsbc_vv_u64m8_b8(__VA_ARGS__)

◆ vmsbc_vv_u8m1_b8

#define vmsbc_vv_u8m1_b8 ( ... ) __riscv_vmsbc_vv_u8m1_b8(__VA_ARGS__)

◆ vmsbc_vv_u8m2_b4

#define vmsbc_vv_u8m2_b4 ( ... ) __riscv_vmsbc_vv_u8m2_b4(__VA_ARGS__)

◆ vmsbc_vv_u8m4_b2

#define vmsbc_vv_u8m4_b2 ( ... ) __riscv_vmsbc_vv_u8m4_b2(__VA_ARGS__)

◆ vmsbc_vv_u8m8_b1

#define vmsbc_vv_u8m8_b1 ( ... ) __riscv_vmsbc_vv_u8m8_b1(__VA_ARGS__)

◆ vmsbc_vv_u8mf2_b16

#define vmsbc_vv_u8mf2_b16 ( ... ) __riscv_vmsbc_vv_u8mf2_b16(__VA_ARGS__)

◆ vmsbc_vv_u8mf4_b32

#define vmsbc_vv_u8mf4_b32 ( ... ) __riscv_vmsbc_vv_u8mf4_b32(__VA_ARGS__)

◆ vmsbc_vv_u8mf8_b64

#define vmsbc_vv_u8mf8_b64 ( ... ) __riscv_vmsbc_vv_u8mf8_b64(__VA_ARGS__)

◆ vmsbc_vvm_i16m1_b16

#define vmsbc_vvm_i16m1_b16 ( ... ) __riscv_vmsbc_vvm_i16m1_b16(__VA_ARGS__)

◆ vmsbc_vvm_i16m2_b8

#define vmsbc_vvm_i16m2_b8 ( ... ) __riscv_vmsbc_vvm_i16m2_b8(__VA_ARGS__)

◆ vmsbc_vvm_i16m4_b4

#define vmsbc_vvm_i16m4_b4 ( ... ) __riscv_vmsbc_vvm_i16m4_b4(__VA_ARGS__)

◆ vmsbc_vvm_i16m8_b2

#define vmsbc_vvm_i16m8_b2 ( ... ) __riscv_vmsbc_vvm_i16m8_b2(__VA_ARGS__)

◆ vmsbc_vvm_i16mf2_b32

#define vmsbc_vvm_i16mf2_b32 ( ... ) __riscv_vmsbc_vvm_i16mf2_b32(__VA_ARGS__)

◆ vmsbc_vvm_i16mf4_b64

#define vmsbc_vvm_i16mf4_b64 ( ... ) __riscv_vmsbc_vvm_i16mf4_b64(__VA_ARGS__)

◆ vmsbc_vvm_i32m1_b32

#define vmsbc_vvm_i32m1_b32 ( ... ) __riscv_vmsbc_vvm_i32m1_b32(__VA_ARGS__)

◆ vmsbc_vvm_i32m2_b16

#define vmsbc_vvm_i32m2_b16 ( ... ) __riscv_vmsbc_vvm_i32m2_b16(__VA_ARGS__)

◆ vmsbc_vvm_i32m4_b8

#define vmsbc_vvm_i32m4_b8 ( ... ) __riscv_vmsbc_vvm_i32m4_b8(__VA_ARGS__)

◆ vmsbc_vvm_i32m8_b4

#define vmsbc_vvm_i32m8_b4 ( ... ) __riscv_vmsbc_vvm_i32m8_b4(__VA_ARGS__)

◆ vmsbc_vvm_i32mf2_b64

#define vmsbc_vvm_i32mf2_b64 ( ... ) __riscv_vmsbc_vvm_i32mf2_b64(__VA_ARGS__)

◆ vmsbc_vvm_i64m1_b64

#define vmsbc_vvm_i64m1_b64 ( ... ) __riscv_vmsbc_vvm_i64m1_b64(__VA_ARGS__)

◆ vmsbc_vvm_i64m2_b32

#define vmsbc_vvm_i64m2_b32 ( ... ) __riscv_vmsbc_vvm_i64m2_b32(__VA_ARGS__)

◆ vmsbc_vvm_i64m4_b16

#define vmsbc_vvm_i64m4_b16 ( ... ) __riscv_vmsbc_vvm_i64m4_b16(__VA_ARGS__)

◆ vmsbc_vvm_i64m8_b8

#define vmsbc_vvm_i64m8_b8 ( ... ) __riscv_vmsbc_vvm_i64m8_b8(__VA_ARGS__)

◆ vmsbc_vvm_i8m1_b8

#define vmsbc_vvm_i8m1_b8 ( ... ) __riscv_vmsbc_vvm_i8m1_b8(__VA_ARGS__)

◆ vmsbc_vvm_i8m2_b4

#define vmsbc_vvm_i8m2_b4 ( ... ) __riscv_vmsbc_vvm_i8m2_b4(__VA_ARGS__)

◆ vmsbc_vvm_i8m4_b2

#define vmsbc_vvm_i8m4_b2 ( ... ) __riscv_vmsbc_vvm_i8m4_b2(__VA_ARGS__)

◆ vmsbc_vvm_i8m8_b1

#define vmsbc_vvm_i8m8_b1 ( ... ) __riscv_vmsbc_vvm_i8m8_b1(__VA_ARGS__)

◆ vmsbc_vvm_i8mf2_b16

#define vmsbc_vvm_i8mf2_b16 ( ... ) __riscv_vmsbc_vvm_i8mf2_b16(__VA_ARGS__)

◆ vmsbc_vvm_i8mf4_b32

#define vmsbc_vvm_i8mf4_b32 ( ... ) __riscv_vmsbc_vvm_i8mf4_b32(__VA_ARGS__)

◆ vmsbc_vvm_i8mf8_b64

#define vmsbc_vvm_i8mf8_b64 ( ... ) __riscv_vmsbc_vvm_i8mf8_b64(__VA_ARGS__)

◆ vmsbc_vvm_u16m1_b16

#define vmsbc_vvm_u16m1_b16 ( ... ) __riscv_vmsbc_vvm_u16m1_b16(__VA_ARGS__)

◆ vmsbc_vvm_u16m2_b8

#define vmsbc_vvm_u16m2_b8 ( ... ) __riscv_vmsbc_vvm_u16m2_b8(__VA_ARGS__)

◆ vmsbc_vvm_u16m4_b4

#define vmsbc_vvm_u16m4_b4 ( ... ) __riscv_vmsbc_vvm_u16m4_b4(__VA_ARGS__)

◆ vmsbc_vvm_u16m8_b2

#define vmsbc_vvm_u16m8_b2 ( ... ) __riscv_vmsbc_vvm_u16m8_b2(__VA_ARGS__)

◆ vmsbc_vvm_u16mf2_b32

#define vmsbc_vvm_u16mf2_b32 ( ... ) __riscv_vmsbc_vvm_u16mf2_b32(__VA_ARGS__)

◆ vmsbc_vvm_u16mf4_b64

#define vmsbc_vvm_u16mf4_b64 ( ... ) __riscv_vmsbc_vvm_u16mf4_b64(__VA_ARGS__)

◆ vmsbc_vvm_u32m1_b32

#define vmsbc_vvm_u32m1_b32 ( ... ) __riscv_vmsbc_vvm_u32m1_b32(__VA_ARGS__)

◆ vmsbc_vvm_u32m2_b16

#define vmsbc_vvm_u32m2_b16 ( ... ) __riscv_vmsbc_vvm_u32m2_b16(__VA_ARGS__)

◆ vmsbc_vvm_u32m4_b8

#define vmsbc_vvm_u32m4_b8 ( ... ) __riscv_vmsbc_vvm_u32m4_b8(__VA_ARGS__)

◆ vmsbc_vvm_u32m8_b4

#define vmsbc_vvm_u32m8_b4 ( ... ) __riscv_vmsbc_vvm_u32m8_b4(__VA_ARGS__)

◆ vmsbc_vvm_u32mf2_b64

#define vmsbc_vvm_u32mf2_b64 ( ... ) __riscv_vmsbc_vvm_u32mf2_b64(__VA_ARGS__)

◆ vmsbc_vvm_u64m1_b64

#define vmsbc_vvm_u64m1_b64 ( ... ) __riscv_vmsbc_vvm_u64m1_b64(__VA_ARGS__)

◆ vmsbc_vvm_u64m2_b32

#define vmsbc_vvm_u64m2_b32 ( ... ) __riscv_vmsbc_vvm_u64m2_b32(__VA_ARGS__)

◆ vmsbc_vvm_u64m4_b16

#define vmsbc_vvm_u64m4_b16 ( ... ) __riscv_vmsbc_vvm_u64m4_b16(__VA_ARGS__)

◆ vmsbc_vvm_u64m8_b8

#define vmsbc_vvm_u64m8_b8 ( ... ) __riscv_vmsbc_vvm_u64m8_b8(__VA_ARGS__)

◆ vmsbc_vvm_u8m1_b8

#define vmsbc_vvm_u8m1_b8 ( ... ) __riscv_vmsbc_vvm_u8m1_b8(__VA_ARGS__)

◆ vmsbc_vvm_u8m2_b4

#define vmsbc_vvm_u8m2_b4 ( ... ) __riscv_vmsbc_vvm_u8m2_b4(__VA_ARGS__)

◆ vmsbc_vvm_u8m4_b2

#define vmsbc_vvm_u8m4_b2 ( ... ) __riscv_vmsbc_vvm_u8m4_b2(__VA_ARGS__)

◆ vmsbc_vvm_u8m8_b1

#define vmsbc_vvm_u8m8_b1 ( ... ) __riscv_vmsbc_vvm_u8m8_b1(__VA_ARGS__)

◆ vmsbc_vvm_u8mf2_b16

#define vmsbc_vvm_u8mf2_b16 ( ... ) __riscv_vmsbc_vvm_u8mf2_b16(__VA_ARGS__)

◆ vmsbc_vvm_u8mf4_b32

#define vmsbc_vvm_u8mf4_b32 ( ... ) __riscv_vmsbc_vvm_u8mf4_b32(__VA_ARGS__)

◆ vmsbc_vvm_u8mf8_b64

#define vmsbc_vvm_u8mf8_b64 ( ... ) __riscv_vmsbc_vvm_u8mf8_b64(__VA_ARGS__)

◆ vmsbc_vx_i16m1_b16

#define vmsbc_vx_i16m1_b16 ( ... ) __riscv_vmsbc_vx_i16m1_b16(__VA_ARGS__)

◆ vmsbc_vx_i16m2_b8

#define vmsbc_vx_i16m2_b8 ( ... ) __riscv_vmsbc_vx_i16m2_b8(__VA_ARGS__)

◆ vmsbc_vx_i16m4_b4

#define vmsbc_vx_i16m4_b4 ( ... ) __riscv_vmsbc_vx_i16m4_b4(__VA_ARGS__)

◆ vmsbc_vx_i16m8_b2

#define vmsbc_vx_i16m8_b2 ( ... ) __riscv_vmsbc_vx_i16m8_b2(__VA_ARGS__)

◆ vmsbc_vx_i16mf2_b32

#define vmsbc_vx_i16mf2_b32 ( ... ) __riscv_vmsbc_vx_i16mf2_b32(__VA_ARGS__)

◆ vmsbc_vx_i16mf4_b64

#define vmsbc_vx_i16mf4_b64 ( ... ) __riscv_vmsbc_vx_i16mf4_b64(__VA_ARGS__)

◆ vmsbc_vx_i32m1_b32

#define vmsbc_vx_i32m1_b32 ( ... ) __riscv_vmsbc_vx_i32m1_b32(__VA_ARGS__)

◆ vmsbc_vx_i32m2_b16

#define vmsbc_vx_i32m2_b16 ( ... ) __riscv_vmsbc_vx_i32m2_b16(__VA_ARGS__)

◆ vmsbc_vx_i32m4_b8

#define vmsbc_vx_i32m4_b8 ( ... ) __riscv_vmsbc_vx_i32m4_b8(__VA_ARGS__)

◆ vmsbc_vx_i32m8_b4

#define vmsbc_vx_i32m8_b4 ( ... ) __riscv_vmsbc_vx_i32m8_b4(__VA_ARGS__)

◆ vmsbc_vx_i32mf2_b64

#define vmsbc_vx_i32mf2_b64 ( ... ) __riscv_vmsbc_vx_i32mf2_b64(__VA_ARGS__)

◆ vmsbc_vx_i64m1_b64

#define vmsbc_vx_i64m1_b64 ( ... ) __riscv_vmsbc_vx_i64m1_b64(__VA_ARGS__)

◆ vmsbc_vx_i64m2_b32

#define vmsbc_vx_i64m2_b32 ( ... ) __riscv_vmsbc_vx_i64m2_b32(__VA_ARGS__)

◆ vmsbc_vx_i64m4_b16

#define vmsbc_vx_i64m4_b16 ( ... ) __riscv_vmsbc_vx_i64m4_b16(__VA_ARGS__)

◆ vmsbc_vx_i64m8_b8

#define vmsbc_vx_i64m8_b8 ( ... ) __riscv_vmsbc_vx_i64m8_b8(__VA_ARGS__)

◆ vmsbc_vx_i8m1_b8

#define vmsbc_vx_i8m1_b8 ( ... ) __riscv_vmsbc_vx_i8m1_b8(__VA_ARGS__)

◆ vmsbc_vx_i8m2_b4

#define vmsbc_vx_i8m2_b4 ( ... ) __riscv_vmsbc_vx_i8m2_b4(__VA_ARGS__)

◆ vmsbc_vx_i8m4_b2

#define vmsbc_vx_i8m4_b2 ( ... ) __riscv_vmsbc_vx_i8m4_b2(__VA_ARGS__)

◆ vmsbc_vx_i8m8_b1

#define vmsbc_vx_i8m8_b1 ( ... ) __riscv_vmsbc_vx_i8m8_b1(__VA_ARGS__)

◆ vmsbc_vx_i8mf2_b16

#define vmsbc_vx_i8mf2_b16 ( ... ) __riscv_vmsbc_vx_i8mf2_b16(__VA_ARGS__)

◆ vmsbc_vx_i8mf4_b32

#define vmsbc_vx_i8mf4_b32 ( ... ) __riscv_vmsbc_vx_i8mf4_b32(__VA_ARGS__)

◆ vmsbc_vx_i8mf8_b64

#define vmsbc_vx_i8mf8_b64 ( ... ) __riscv_vmsbc_vx_i8mf8_b64(__VA_ARGS__)

◆ vmsbc_vx_u16m1_b16

#define vmsbc_vx_u16m1_b16 ( ... ) __riscv_vmsbc_vx_u16m1_b16(__VA_ARGS__)

◆ vmsbc_vx_u16m2_b8

#define vmsbc_vx_u16m2_b8 ( ... ) __riscv_vmsbc_vx_u16m2_b8(__VA_ARGS__)

◆ vmsbc_vx_u16m4_b4

#define vmsbc_vx_u16m4_b4 ( ... ) __riscv_vmsbc_vx_u16m4_b4(__VA_ARGS__)

◆ vmsbc_vx_u16m8_b2

#define vmsbc_vx_u16m8_b2 ( ... ) __riscv_vmsbc_vx_u16m8_b2(__VA_ARGS__)

◆ vmsbc_vx_u16mf2_b32

#define vmsbc_vx_u16mf2_b32 ( ... ) __riscv_vmsbc_vx_u16mf2_b32(__VA_ARGS__)

◆ vmsbc_vx_u16mf4_b64

#define vmsbc_vx_u16mf4_b64 ( ... ) __riscv_vmsbc_vx_u16mf4_b64(__VA_ARGS__)

◆ vmsbc_vx_u32m1_b32

#define vmsbc_vx_u32m1_b32 ( ... ) __riscv_vmsbc_vx_u32m1_b32(__VA_ARGS__)

◆ vmsbc_vx_u32m2_b16

#define vmsbc_vx_u32m2_b16 ( ... ) __riscv_vmsbc_vx_u32m2_b16(__VA_ARGS__)

◆ vmsbc_vx_u32m4_b8

#define vmsbc_vx_u32m4_b8 ( ... ) __riscv_vmsbc_vx_u32m4_b8(__VA_ARGS__)

◆ vmsbc_vx_u32m8_b4

#define vmsbc_vx_u32m8_b4 ( ... ) __riscv_vmsbc_vx_u32m8_b4(__VA_ARGS__)

◆ vmsbc_vx_u32mf2_b64

#define vmsbc_vx_u32mf2_b64 ( ... ) __riscv_vmsbc_vx_u32mf2_b64(__VA_ARGS__)

◆ vmsbc_vx_u64m1_b64

#define vmsbc_vx_u64m1_b64 ( ... ) __riscv_vmsbc_vx_u64m1_b64(__VA_ARGS__)

◆ vmsbc_vx_u64m2_b32

#define vmsbc_vx_u64m2_b32 ( ... ) __riscv_vmsbc_vx_u64m2_b32(__VA_ARGS__)

◆ vmsbc_vx_u64m4_b16

#define vmsbc_vx_u64m4_b16 ( ... ) __riscv_vmsbc_vx_u64m4_b16(__VA_ARGS__)

◆ vmsbc_vx_u64m8_b8

#define vmsbc_vx_u64m8_b8 ( ... ) __riscv_vmsbc_vx_u64m8_b8(__VA_ARGS__)

◆ vmsbc_vx_u8m1_b8

#define vmsbc_vx_u8m1_b8 ( ... ) __riscv_vmsbc_vx_u8m1_b8(__VA_ARGS__)

◆ vmsbc_vx_u8m2_b4

#define vmsbc_vx_u8m2_b4 ( ... ) __riscv_vmsbc_vx_u8m2_b4(__VA_ARGS__)

◆ vmsbc_vx_u8m4_b2

#define vmsbc_vx_u8m4_b2 ( ... ) __riscv_vmsbc_vx_u8m4_b2(__VA_ARGS__)

◆ vmsbc_vx_u8m8_b1

#define vmsbc_vx_u8m8_b1 ( ... ) __riscv_vmsbc_vx_u8m8_b1(__VA_ARGS__)

◆ vmsbc_vx_u8mf2_b16

#define vmsbc_vx_u8mf2_b16 ( ... ) __riscv_vmsbc_vx_u8mf2_b16(__VA_ARGS__)

◆ vmsbc_vx_u8mf4_b32

#define vmsbc_vx_u8mf4_b32 ( ... ) __riscv_vmsbc_vx_u8mf4_b32(__VA_ARGS__)

◆ vmsbc_vx_u8mf8_b64

#define vmsbc_vx_u8mf8_b64 ( ... ) __riscv_vmsbc_vx_u8mf8_b64(__VA_ARGS__)

◆ vmsbc_vxm_i16m1_b16

#define vmsbc_vxm_i16m1_b16 ( ... ) __riscv_vmsbc_vxm_i16m1_b16(__VA_ARGS__)

◆ vmsbc_vxm_i16m2_b8

#define vmsbc_vxm_i16m2_b8 ( ... ) __riscv_vmsbc_vxm_i16m2_b8(__VA_ARGS__)

◆ vmsbc_vxm_i16m4_b4

#define vmsbc_vxm_i16m4_b4 ( ... ) __riscv_vmsbc_vxm_i16m4_b4(__VA_ARGS__)

◆ vmsbc_vxm_i16m8_b2

#define vmsbc_vxm_i16m8_b2 ( ... ) __riscv_vmsbc_vxm_i16m8_b2(__VA_ARGS__)

◆ vmsbc_vxm_i16mf2_b32

#define vmsbc_vxm_i16mf2_b32 ( ... ) __riscv_vmsbc_vxm_i16mf2_b32(__VA_ARGS__)

◆ vmsbc_vxm_i16mf4_b64

#define vmsbc_vxm_i16mf4_b64 ( ... ) __riscv_vmsbc_vxm_i16mf4_b64(__VA_ARGS__)

◆ vmsbc_vxm_i32m1_b32

#define vmsbc_vxm_i32m1_b32 ( ... ) __riscv_vmsbc_vxm_i32m1_b32(__VA_ARGS__)

◆ vmsbc_vxm_i32m2_b16

#define vmsbc_vxm_i32m2_b16 ( ... ) __riscv_vmsbc_vxm_i32m2_b16(__VA_ARGS__)

◆ vmsbc_vxm_i32m4_b8

#define vmsbc_vxm_i32m4_b8 ( ... ) __riscv_vmsbc_vxm_i32m4_b8(__VA_ARGS__)

◆ vmsbc_vxm_i32m8_b4

#define vmsbc_vxm_i32m8_b4 ( ... ) __riscv_vmsbc_vxm_i32m8_b4(__VA_ARGS__)

◆ vmsbc_vxm_i32mf2_b64

#define vmsbc_vxm_i32mf2_b64 ( ... ) __riscv_vmsbc_vxm_i32mf2_b64(__VA_ARGS__)

◆ vmsbc_vxm_i64m1_b64

#define vmsbc_vxm_i64m1_b64 ( ... ) __riscv_vmsbc_vxm_i64m1_b64(__VA_ARGS__)

◆ vmsbc_vxm_i64m2_b32

#define vmsbc_vxm_i64m2_b32 ( ... ) __riscv_vmsbc_vxm_i64m2_b32(__VA_ARGS__)

◆ vmsbc_vxm_i64m4_b16

#define vmsbc_vxm_i64m4_b16 ( ... ) __riscv_vmsbc_vxm_i64m4_b16(__VA_ARGS__)

◆ vmsbc_vxm_i64m8_b8

#define vmsbc_vxm_i64m8_b8 ( ... ) __riscv_vmsbc_vxm_i64m8_b8(__VA_ARGS__)

◆ vmsbc_vxm_i8m1_b8

#define vmsbc_vxm_i8m1_b8 ( ... ) __riscv_vmsbc_vxm_i8m1_b8(__VA_ARGS__)

◆ vmsbc_vxm_i8m2_b4

#define vmsbc_vxm_i8m2_b4 ( ... ) __riscv_vmsbc_vxm_i8m2_b4(__VA_ARGS__)

◆ vmsbc_vxm_i8m4_b2

#define vmsbc_vxm_i8m4_b2 ( ... ) __riscv_vmsbc_vxm_i8m4_b2(__VA_ARGS__)

◆ vmsbc_vxm_i8m8_b1

#define vmsbc_vxm_i8m8_b1 ( ... ) __riscv_vmsbc_vxm_i8m8_b1(__VA_ARGS__)

◆ vmsbc_vxm_i8mf2_b16

#define vmsbc_vxm_i8mf2_b16 ( ... ) __riscv_vmsbc_vxm_i8mf2_b16(__VA_ARGS__)

◆ vmsbc_vxm_i8mf4_b32

#define vmsbc_vxm_i8mf4_b32 ( ... ) __riscv_vmsbc_vxm_i8mf4_b32(__VA_ARGS__)

◆ vmsbc_vxm_i8mf8_b64

#define vmsbc_vxm_i8mf8_b64 ( ... ) __riscv_vmsbc_vxm_i8mf8_b64(__VA_ARGS__)

◆ vmsbc_vxm_u16m1_b16

#define vmsbc_vxm_u16m1_b16 ( ... ) __riscv_vmsbc_vxm_u16m1_b16(__VA_ARGS__)

◆ vmsbc_vxm_u16m2_b8

#define vmsbc_vxm_u16m2_b8 ( ... ) __riscv_vmsbc_vxm_u16m2_b8(__VA_ARGS__)

◆ vmsbc_vxm_u16m4_b4

#define vmsbc_vxm_u16m4_b4 ( ... ) __riscv_vmsbc_vxm_u16m4_b4(__VA_ARGS__)

◆ vmsbc_vxm_u16m8_b2

#define vmsbc_vxm_u16m8_b2 ( ... ) __riscv_vmsbc_vxm_u16m8_b2(__VA_ARGS__)

◆ vmsbc_vxm_u16mf2_b32

#define vmsbc_vxm_u16mf2_b32 ( ... ) __riscv_vmsbc_vxm_u16mf2_b32(__VA_ARGS__)

◆ vmsbc_vxm_u16mf4_b64

#define vmsbc_vxm_u16mf4_b64 ( ... ) __riscv_vmsbc_vxm_u16mf4_b64(__VA_ARGS__)

◆ vmsbc_vxm_u32m1_b32

#define vmsbc_vxm_u32m1_b32 ( ... ) __riscv_vmsbc_vxm_u32m1_b32(__VA_ARGS__)

◆ vmsbc_vxm_u32m2_b16

#define vmsbc_vxm_u32m2_b16 ( ... ) __riscv_vmsbc_vxm_u32m2_b16(__VA_ARGS__)

◆ vmsbc_vxm_u32m4_b8

#define vmsbc_vxm_u32m4_b8 ( ... ) __riscv_vmsbc_vxm_u32m4_b8(__VA_ARGS__)

◆ vmsbc_vxm_u32m8_b4

#define vmsbc_vxm_u32m8_b4 ( ... ) __riscv_vmsbc_vxm_u32m8_b4(__VA_ARGS__)

◆ vmsbc_vxm_u32mf2_b64

#define vmsbc_vxm_u32mf2_b64 ( ... ) __riscv_vmsbc_vxm_u32mf2_b64(__VA_ARGS__)

◆ vmsbc_vxm_u64m1_b64

#define vmsbc_vxm_u64m1_b64 ( ... ) __riscv_vmsbc_vxm_u64m1_b64(__VA_ARGS__)

◆ vmsbc_vxm_u64m2_b32

#define vmsbc_vxm_u64m2_b32 ( ... ) __riscv_vmsbc_vxm_u64m2_b32(__VA_ARGS__)

◆ vmsbc_vxm_u64m4_b16

#define vmsbc_vxm_u64m4_b16 ( ... ) __riscv_vmsbc_vxm_u64m4_b16(__VA_ARGS__)

◆ vmsbc_vxm_u64m8_b8

#define vmsbc_vxm_u64m8_b8 ( ... ) __riscv_vmsbc_vxm_u64m8_b8(__VA_ARGS__)

◆ vmsbc_vxm_u8m1_b8

#define vmsbc_vxm_u8m1_b8 ( ... ) __riscv_vmsbc_vxm_u8m1_b8(__VA_ARGS__)

◆ vmsbc_vxm_u8m2_b4

#define vmsbc_vxm_u8m2_b4 ( ... ) __riscv_vmsbc_vxm_u8m2_b4(__VA_ARGS__)

◆ vmsbc_vxm_u8m4_b2

#define vmsbc_vxm_u8m4_b2 ( ... ) __riscv_vmsbc_vxm_u8m4_b2(__VA_ARGS__)

◆ vmsbc_vxm_u8m8_b1

#define vmsbc_vxm_u8m8_b1 ( ... ) __riscv_vmsbc_vxm_u8m8_b1(__VA_ARGS__)

◆ vmsbc_vxm_u8mf2_b16

#define vmsbc_vxm_u8mf2_b16 ( ... ) __riscv_vmsbc_vxm_u8mf2_b16(__VA_ARGS__)

◆ vmsbc_vxm_u8mf4_b32

#define vmsbc_vxm_u8mf4_b32 ( ... ) __riscv_vmsbc_vxm_u8mf4_b32(__VA_ARGS__)

◆ vmsbc_vxm_u8mf8_b64

#define vmsbc_vxm_u8mf8_b64 ( ... ) __riscv_vmsbc_vxm_u8mf8_b64(__VA_ARGS__)

◆ vmsbf_m_b1

#define vmsbf_m_b1 ( ... ) __riscv_vmsbf_m_b1(__VA_ARGS__)

◆ vmsbf_m_b16

#define vmsbf_m_b16 ( ... ) __riscv_vmsbf_m_b16(__VA_ARGS__)

◆ vmsbf_m_b16_m

#define vmsbf_m_b16_m ( ... ) __riscv_vmsbf_m_b16_mu(__VA_ARGS__)

◆ vmsbf_m_b1_m

#define vmsbf_m_b1_m ( ... ) __riscv_vmsbf_m_b1_mu(__VA_ARGS__)

◆ vmsbf_m_b2

#define vmsbf_m_b2 ( ... ) __riscv_vmsbf_m_b2(__VA_ARGS__)

◆ vmsbf_m_b2_m

#define vmsbf_m_b2_m ( ... ) __riscv_vmsbf_m_b2_mu(__VA_ARGS__)

◆ vmsbf_m_b32

#define vmsbf_m_b32 ( ... ) __riscv_vmsbf_m_b32(__VA_ARGS__)

◆ vmsbf_m_b32_m

#define vmsbf_m_b32_m ( ... ) __riscv_vmsbf_m_b32_mu(__VA_ARGS__)

◆ vmsbf_m_b4

#define vmsbf_m_b4 ( ... ) __riscv_vmsbf_m_b4(__VA_ARGS__)

◆ vmsbf_m_b4_m

#define vmsbf_m_b4_m ( ... ) __riscv_vmsbf_m_b4_mu(__VA_ARGS__)

◆ vmsbf_m_b64

#define vmsbf_m_b64 ( ... ) __riscv_vmsbf_m_b64(__VA_ARGS__)

◆ vmsbf_m_b64_m

#define vmsbf_m_b64_m ( ... ) __riscv_vmsbf_m_b64_mu(__VA_ARGS__)

◆ vmsbf_m_b8

#define vmsbf_m_b8 ( ... ) __riscv_vmsbf_m_b8(__VA_ARGS__)

◆ vmsbf_m_b8_m

#define vmsbf_m_b8_m ( ... ) __riscv_vmsbf_m_b8_mu(__VA_ARGS__)

◆ vmseq_vv_i16m1_b16

#define vmseq_vv_i16m1_b16 ( ... ) __riscv_vmseq_vv_i16m1_b16(__VA_ARGS__)

◆ vmseq_vv_i16m1_b16_m

#define vmseq_vv_i16m1_b16_m ( ... ) __riscv_vmseq_vv_i16m1_b16_mu(__VA_ARGS__)

◆ vmseq_vv_i16m2_b8

#define vmseq_vv_i16m2_b8 ( ... ) __riscv_vmseq_vv_i16m2_b8(__VA_ARGS__)

◆ vmseq_vv_i16m2_b8_m

#define vmseq_vv_i16m2_b8_m ( ... ) __riscv_vmseq_vv_i16m2_b8_mu(__VA_ARGS__)

◆ vmseq_vv_i16m4_b4

#define vmseq_vv_i16m4_b4 ( ... ) __riscv_vmseq_vv_i16m4_b4(__VA_ARGS__)

◆ vmseq_vv_i16m4_b4_m

#define vmseq_vv_i16m4_b4_m ( ... ) __riscv_vmseq_vv_i16m4_b4_mu(__VA_ARGS__)

◆ vmseq_vv_i16m8_b2

#define vmseq_vv_i16m8_b2 ( ... ) __riscv_vmseq_vv_i16m8_b2(__VA_ARGS__)

◆ vmseq_vv_i16m8_b2_m

#define vmseq_vv_i16m8_b2_m ( ... ) __riscv_vmseq_vv_i16m8_b2_mu(__VA_ARGS__)

◆ vmseq_vv_i16mf2_b32

#define vmseq_vv_i16mf2_b32 ( ... ) __riscv_vmseq_vv_i16mf2_b32(__VA_ARGS__)

◆ vmseq_vv_i16mf2_b32_m

#define vmseq_vv_i16mf2_b32_m ( ... ) __riscv_vmseq_vv_i16mf2_b32_mu(__VA_ARGS__)

◆ vmseq_vv_i16mf4_b64

#define vmseq_vv_i16mf4_b64 ( ... ) __riscv_vmseq_vv_i16mf4_b64(__VA_ARGS__)

◆ vmseq_vv_i16mf4_b64_m

#define vmseq_vv_i16mf4_b64_m ( ... ) __riscv_vmseq_vv_i16mf4_b64_mu(__VA_ARGS__)

◆ vmseq_vv_i32m1_b32

#define vmseq_vv_i32m1_b32 ( ... ) __riscv_vmseq_vv_i32m1_b32(__VA_ARGS__)

◆ vmseq_vv_i32m1_b32_m

#define vmseq_vv_i32m1_b32_m ( ... ) __riscv_vmseq_vv_i32m1_b32_mu(__VA_ARGS__)

◆ vmseq_vv_i32m2_b16

#define vmseq_vv_i32m2_b16 ( ... ) __riscv_vmseq_vv_i32m2_b16(__VA_ARGS__)

◆ vmseq_vv_i32m2_b16_m

#define vmseq_vv_i32m2_b16_m ( ... ) __riscv_vmseq_vv_i32m2_b16_mu(__VA_ARGS__)

◆ vmseq_vv_i32m4_b8

#define vmseq_vv_i32m4_b8 ( ... ) __riscv_vmseq_vv_i32m4_b8(__VA_ARGS__)

◆ vmseq_vv_i32m4_b8_m

#define vmseq_vv_i32m4_b8_m ( ... ) __riscv_vmseq_vv_i32m4_b8_mu(__VA_ARGS__)

◆ vmseq_vv_i32m8_b4

#define vmseq_vv_i32m8_b4 ( ... ) __riscv_vmseq_vv_i32m8_b4(__VA_ARGS__)

◆ vmseq_vv_i32m8_b4_m

#define vmseq_vv_i32m8_b4_m ( ... ) __riscv_vmseq_vv_i32m8_b4_mu(__VA_ARGS__)

◆ vmseq_vv_i32mf2_b64

#define vmseq_vv_i32mf2_b64 ( ... ) __riscv_vmseq_vv_i32mf2_b64(__VA_ARGS__)

◆ vmseq_vv_i32mf2_b64_m

#define vmseq_vv_i32mf2_b64_m ( ... ) __riscv_vmseq_vv_i32mf2_b64_mu(__VA_ARGS__)

◆ vmseq_vv_i64m1_b64

#define vmseq_vv_i64m1_b64 ( ... ) __riscv_vmseq_vv_i64m1_b64(__VA_ARGS__)

◆ vmseq_vv_i64m1_b64_m

#define vmseq_vv_i64m1_b64_m ( ... ) __riscv_vmseq_vv_i64m1_b64_mu(__VA_ARGS__)

◆ vmseq_vv_i64m2_b32

#define vmseq_vv_i64m2_b32 ( ... ) __riscv_vmseq_vv_i64m2_b32(__VA_ARGS__)

◆ vmseq_vv_i64m2_b32_m

#define vmseq_vv_i64m2_b32_m ( ... ) __riscv_vmseq_vv_i64m2_b32_mu(__VA_ARGS__)

◆ vmseq_vv_i64m4_b16

#define vmseq_vv_i64m4_b16 ( ... ) __riscv_vmseq_vv_i64m4_b16(__VA_ARGS__)

◆ vmseq_vv_i64m4_b16_m

#define vmseq_vv_i64m4_b16_m ( ... ) __riscv_vmseq_vv_i64m4_b16_mu(__VA_ARGS__)

◆ vmseq_vv_i64m8_b8

#define vmseq_vv_i64m8_b8 ( ... ) __riscv_vmseq_vv_i64m8_b8(__VA_ARGS__)

◆ vmseq_vv_i64m8_b8_m

#define vmseq_vv_i64m8_b8_m ( ... ) __riscv_vmseq_vv_i64m8_b8_mu(__VA_ARGS__)

◆ vmseq_vv_i8m1_b8

#define vmseq_vv_i8m1_b8 ( ... ) __riscv_vmseq_vv_i8m1_b8(__VA_ARGS__)

◆ vmseq_vv_i8m1_b8_m

#define vmseq_vv_i8m1_b8_m ( ... ) __riscv_vmseq_vv_i8m1_b8_mu(__VA_ARGS__)

◆ vmseq_vv_i8m2_b4

#define vmseq_vv_i8m2_b4 ( ... ) __riscv_vmseq_vv_i8m2_b4(__VA_ARGS__)

◆ vmseq_vv_i8m2_b4_m

#define vmseq_vv_i8m2_b4_m ( ... ) __riscv_vmseq_vv_i8m2_b4_mu(__VA_ARGS__)

◆ vmseq_vv_i8m4_b2

#define vmseq_vv_i8m4_b2 ( ... ) __riscv_vmseq_vv_i8m4_b2(__VA_ARGS__)

◆ vmseq_vv_i8m4_b2_m

#define vmseq_vv_i8m4_b2_m ( ... ) __riscv_vmseq_vv_i8m4_b2_mu(__VA_ARGS__)

◆ vmseq_vv_i8m8_b1

#define vmseq_vv_i8m8_b1 ( ... ) __riscv_vmseq_vv_i8m8_b1(__VA_ARGS__)

◆ vmseq_vv_i8m8_b1_m

#define vmseq_vv_i8m8_b1_m ( ... ) __riscv_vmseq_vv_i8m8_b1_mu(__VA_ARGS__)

◆ vmseq_vv_i8mf2_b16

#define vmseq_vv_i8mf2_b16 ( ... ) __riscv_vmseq_vv_i8mf2_b16(__VA_ARGS__)

◆ vmseq_vv_i8mf2_b16_m

#define vmseq_vv_i8mf2_b16_m ( ... ) __riscv_vmseq_vv_i8mf2_b16_mu(__VA_ARGS__)

◆ vmseq_vv_i8mf4_b32

#define vmseq_vv_i8mf4_b32 ( ... ) __riscv_vmseq_vv_i8mf4_b32(__VA_ARGS__)

◆ vmseq_vv_i8mf4_b32_m

#define vmseq_vv_i8mf4_b32_m ( ... ) __riscv_vmseq_vv_i8mf4_b32_mu(__VA_ARGS__)

◆ vmseq_vv_i8mf8_b64

#define vmseq_vv_i8mf8_b64 ( ... ) __riscv_vmseq_vv_i8mf8_b64(__VA_ARGS__)

◆ vmseq_vv_i8mf8_b64_m

#define vmseq_vv_i8mf8_b64_m ( ... ) __riscv_vmseq_vv_i8mf8_b64_mu(__VA_ARGS__)

◆ vmseq_vv_u16m1_b16

#define vmseq_vv_u16m1_b16 ( ... ) __riscv_vmseq_vv_u16m1_b16(__VA_ARGS__)

◆ vmseq_vv_u16m1_b16_m

#define vmseq_vv_u16m1_b16_m ( ... ) __riscv_vmseq_vv_u16m1_b16_mu(__VA_ARGS__)

◆ vmseq_vv_u16m2_b8

#define vmseq_vv_u16m2_b8 ( ... ) __riscv_vmseq_vv_u16m2_b8(__VA_ARGS__)

◆ vmseq_vv_u16m2_b8_m

#define vmseq_vv_u16m2_b8_m ( ... ) __riscv_vmseq_vv_u16m2_b8_mu(__VA_ARGS__)

◆ vmseq_vv_u16m4_b4

#define vmseq_vv_u16m4_b4 ( ... ) __riscv_vmseq_vv_u16m4_b4(__VA_ARGS__)

◆ vmseq_vv_u16m4_b4_m

#define vmseq_vv_u16m4_b4_m ( ... ) __riscv_vmseq_vv_u16m4_b4_mu(__VA_ARGS__)

◆ vmseq_vv_u16m8_b2

#define vmseq_vv_u16m8_b2 ( ... ) __riscv_vmseq_vv_u16m8_b2(__VA_ARGS__)

◆ vmseq_vv_u16m8_b2_m

#define vmseq_vv_u16m8_b2_m ( ... ) __riscv_vmseq_vv_u16m8_b2_mu(__VA_ARGS__)

◆ vmseq_vv_u16mf2_b32

#define vmseq_vv_u16mf2_b32 ( ... ) __riscv_vmseq_vv_u16mf2_b32(__VA_ARGS__)

◆ vmseq_vv_u16mf2_b32_m

#define vmseq_vv_u16mf2_b32_m ( ... ) __riscv_vmseq_vv_u16mf2_b32_mu(__VA_ARGS__)

◆ vmseq_vv_u16mf4_b64

#define vmseq_vv_u16mf4_b64 ( ... ) __riscv_vmseq_vv_u16mf4_b64(__VA_ARGS__)

◆ vmseq_vv_u16mf4_b64_m

#define vmseq_vv_u16mf4_b64_m ( ... ) __riscv_vmseq_vv_u16mf4_b64_mu(__VA_ARGS__)

◆ vmseq_vv_u32m1_b32

#define vmseq_vv_u32m1_b32 ( ... ) __riscv_vmseq_vv_u32m1_b32(__VA_ARGS__)

◆ vmseq_vv_u32m1_b32_m

#define vmseq_vv_u32m1_b32_m ( ... ) __riscv_vmseq_vv_u32m1_b32_mu(__VA_ARGS__)

◆ vmseq_vv_u32m2_b16

#define vmseq_vv_u32m2_b16 ( ... ) __riscv_vmseq_vv_u32m2_b16(__VA_ARGS__)

◆ vmseq_vv_u32m2_b16_m

#define vmseq_vv_u32m2_b16_m ( ... ) __riscv_vmseq_vv_u32m2_b16_mu(__VA_ARGS__)

◆ vmseq_vv_u32m4_b8

#define vmseq_vv_u32m4_b8 ( ... ) __riscv_vmseq_vv_u32m4_b8(__VA_ARGS__)

◆ vmseq_vv_u32m4_b8_m

#define vmseq_vv_u32m4_b8_m ( ... ) __riscv_vmseq_vv_u32m4_b8_mu(__VA_ARGS__)

◆ vmseq_vv_u32m8_b4

#define vmseq_vv_u32m8_b4 ( ... ) __riscv_vmseq_vv_u32m8_b4(__VA_ARGS__)

◆ vmseq_vv_u32m8_b4_m

#define vmseq_vv_u32m8_b4_m ( ... ) __riscv_vmseq_vv_u32m8_b4_mu(__VA_ARGS__)

◆ vmseq_vv_u32mf2_b64

#define vmseq_vv_u32mf2_b64 ( ... ) __riscv_vmseq_vv_u32mf2_b64(__VA_ARGS__)

◆ vmseq_vv_u32mf2_b64_m

#define vmseq_vv_u32mf2_b64_m ( ... ) __riscv_vmseq_vv_u32mf2_b64_mu(__VA_ARGS__)

◆ vmseq_vv_u64m1_b64

#define vmseq_vv_u64m1_b64 ( ... ) __riscv_vmseq_vv_u64m1_b64(__VA_ARGS__)

◆ vmseq_vv_u64m1_b64_m

#define vmseq_vv_u64m1_b64_m ( ... ) __riscv_vmseq_vv_u64m1_b64_mu(__VA_ARGS__)

◆ vmseq_vv_u64m2_b32

#define vmseq_vv_u64m2_b32 ( ... ) __riscv_vmseq_vv_u64m2_b32(__VA_ARGS__)

◆ vmseq_vv_u64m2_b32_m

#define vmseq_vv_u64m2_b32_m ( ... ) __riscv_vmseq_vv_u64m2_b32_mu(__VA_ARGS__)

◆ vmseq_vv_u64m4_b16

#define vmseq_vv_u64m4_b16 ( ... ) __riscv_vmseq_vv_u64m4_b16(__VA_ARGS__)

◆ vmseq_vv_u64m4_b16_m

#define vmseq_vv_u64m4_b16_m ( ... ) __riscv_vmseq_vv_u64m4_b16_mu(__VA_ARGS__)

◆ vmseq_vv_u64m8_b8

#define vmseq_vv_u64m8_b8 ( ... ) __riscv_vmseq_vv_u64m8_b8(__VA_ARGS__)

◆ vmseq_vv_u64m8_b8_m

#define vmseq_vv_u64m8_b8_m ( ... ) __riscv_vmseq_vv_u64m8_b8_mu(__VA_ARGS__)

◆ vmseq_vv_u8m1_b8

#define vmseq_vv_u8m1_b8 ( ... ) __riscv_vmseq_vv_u8m1_b8(__VA_ARGS__)

◆ vmseq_vv_u8m1_b8_m

#define vmseq_vv_u8m1_b8_m ( ... ) __riscv_vmseq_vv_u8m1_b8_mu(__VA_ARGS__)

◆ vmseq_vv_u8m2_b4

#define vmseq_vv_u8m2_b4 ( ... ) __riscv_vmseq_vv_u8m2_b4(__VA_ARGS__)

◆ vmseq_vv_u8m2_b4_m

#define vmseq_vv_u8m2_b4_m ( ... ) __riscv_vmseq_vv_u8m2_b4_mu(__VA_ARGS__)

◆ vmseq_vv_u8m4_b2

#define vmseq_vv_u8m4_b2 ( ... ) __riscv_vmseq_vv_u8m4_b2(__VA_ARGS__)

◆ vmseq_vv_u8m4_b2_m

#define vmseq_vv_u8m4_b2_m ( ... ) __riscv_vmseq_vv_u8m4_b2_mu(__VA_ARGS__)

◆ vmseq_vv_u8m8_b1

#define vmseq_vv_u8m8_b1 ( ... ) __riscv_vmseq_vv_u8m8_b1(__VA_ARGS__)

◆ vmseq_vv_u8m8_b1_m

#define vmseq_vv_u8m8_b1_m ( ... ) __riscv_vmseq_vv_u8m8_b1_mu(__VA_ARGS__)

◆ vmseq_vv_u8mf2_b16

#define vmseq_vv_u8mf2_b16 ( ... ) __riscv_vmseq_vv_u8mf2_b16(__VA_ARGS__)

◆ vmseq_vv_u8mf2_b16_m

#define vmseq_vv_u8mf2_b16_m ( ... ) __riscv_vmseq_vv_u8mf2_b16_mu(__VA_ARGS__)

◆ vmseq_vv_u8mf4_b32

#define vmseq_vv_u8mf4_b32 ( ... ) __riscv_vmseq_vv_u8mf4_b32(__VA_ARGS__)

◆ vmseq_vv_u8mf4_b32_m

#define vmseq_vv_u8mf4_b32_m ( ... ) __riscv_vmseq_vv_u8mf4_b32_mu(__VA_ARGS__)

◆ vmseq_vv_u8mf8_b64

#define vmseq_vv_u8mf8_b64 ( ... ) __riscv_vmseq_vv_u8mf8_b64(__VA_ARGS__)

◆ vmseq_vv_u8mf8_b64_m

#define vmseq_vv_u8mf8_b64_m ( ... ) __riscv_vmseq_vv_u8mf8_b64_mu(__VA_ARGS__)

◆ vmseq_vx_i16m1_b16

#define vmseq_vx_i16m1_b16 ( ... ) __riscv_vmseq_vx_i16m1_b16(__VA_ARGS__)

◆ vmseq_vx_i16m1_b16_m

#define vmseq_vx_i16m1_b16_m ( ... ) __riscv_vmseq_vx_i16m1_b16_mu(__VA_ARGS__)

◆ vmseq_vx_i16m2_b8

#define vmseq_vx_i16m2_b8 ( ... ) __riscv_vmseq_vx_i16m2_b8(__VA_ARGS__)

◆ vmseq_vx_i16m2_b8_m

#define vmseq_vx_i16m2_b8_m ( ... ) __riscv_vmseq_vx_i16m2_b8_mu(__VA_ARGS__)

◆ vmseq_vx_i16m4_b4

#define vmseq_vx_i16m4_b4 ( ... ) __riscv_vmseq_vx_i16m4_b4(__VA_ARGS__)

◆ vmseq_vx_i16m4_b4_m

#define vmseq_vx_i16m4_b4_m ( ... ) __riscv_vmseq_vx_i16m4_b4_mu(__VA_ARGS__)

◆ vmseq_vx_i16m8_b2

#define vmseq_vx_i16m8_b2 ( ... ) __riscv_vmseq_vx_i16m8_b2(__VA_ARGS__)

◆ vmseq_vx_i16m8_b2_m

#define vmseq_vx_i16m8_b2_m ( ... ) __riscv_vmseq_vx_i16m8_b2_mu(__VA_ARGS__)

◆ vmseq_vx_i16mf2_b32

#define vmseq_vx_i16mf2_b32 ( ... ) __riscv_vmseq_vx_i16mf2_b32(__VA_ARGS__)

◆ vmseq_vx_i16mf2_b32_m

#define vmseq_vx_i16mf2_b32_m ( ... ) __riscv_vmseq_vx_i16mf2_b32_mu(__VA_ARGS__)

◆ vmseq_vx_i16mf4_b64

#define vmseq_vx_i16mf4_b64 ( ... ) __riscv_vmseq_vx_i16mf4_b64(__VA_ARGS__)

◆ vmseq_vx_i16mf4_b64_m

#define vmseq_vx_i16mf4_b64_m ( ... ) __riscv_vmseq_vx_i16mf4_b64_mu(__VA_ARGS__)

◆ vmseq_vx_i32m1_b32

#define vmseq_vx_i32m1_b32 ( ... ) __riscv_vmseq_vx_i32m1_b32(__VA_ARGS__)

◆ vmseq_vx_i32m1_b32_m

#define vmseq_vx_i32m1_b32_m ( ... ) __riscv_vmseq_vx_i32m1_b32_mu(__VA_ARGS__)

◆ vmseq_vx_i32m2_b16

#define vmseq_vx_i32m2_b16 ( ... ) __riscv_vmseq_vx_i32m2_b16(__VA_ARGS__)

◆ vmseq_vx_i32m2_b16_m

#define vmseq_vx_i32m2_b16_m ( ... ) __riscv_vmseq_vx_i32m2_b16_mu(__VA_ARGS__)

◆ vmseq_vx_i32m4_b8

#define vmseq_vx_i32m4_b8 ( ... ) __riscv_vmseq_vx_i32m4_b8(__VA_ARGS__)

◆ vmseq_vx_i32m4_b8_m

#define vmseq_vx_i32m4_b8_m ( ... ) __riscv_vmseq_vx_i32m4_b8_mu(__VA_ARGS__)

◆ vmseq_vx_i32m8_b4

#define vmseq_vx_i32m8_b4 ( ... ) __riscv_vmseq_vx_i32m8_b4(__VA_ARGS__)

◆ vmseq_vx_i32m8_b4_m

#define vmseq_vx_i32m8_b4_m ( ... ) __riscv_vmseq_vx_i32m8_b4_mu(__VA_ARGS__)

◆ vmseq_vx_i32mf2_b64

#define vmseq_vx_i32mf2_b64 ( ... ) __riscv_vmseq_vx_i32mf2_b64(__VA_ARGS__)

◆ vmseq_vx_i32mf2_b64_m

#define vmseq_vx_i32mf2_b64_m ( ... ) __riscv_vmseq_vx_i32mf2_b64_mu(__VA_ARGS__)

◆ vmseq_vx_i64m1_b64

#define vmseq_vx_i64m1_b64 ( ... ) __riscv_vmseq_vx_i64m1_b64(__VA_ARGS__)

◆ vmseq_vx_i64m1_b64_m

#define vmseq_vx_i64m1_b64_m ( ... ) __riscv_vmseq_vx_i64m1_b64_mu(__VA_ARGS__)

◆ vmseq_vx_i64m2_b32

#define vmseq_vx_i64m2_b32 ( ... ) __riscv_vmseq_vx_i64m2_b32(__VA_ARGS__)

◆ vmseq_vx_i64m2_b32_m

#define vmseq_vx_i64m2_b32_m ( ... ) __riscv_vmseq_vx_i64m2_b32_mu(__VA_ARGS__)

◆ vmseq_vx_i64m4_b16

#define vmseq_vx_i64m4_b16 ( ... ) __riscv_vmseq_vx_i64m4_b16(__VA_ARGS__)

◆ vmseq_vx_i64m4_b16_m

#define vmseq_vx_i64m4_b16_m ( ... ) __riscv_vmseq_vx_i64m4_b16_mu(__VA_ARGS__)

◆ vmseq_vx_i64m8_b8

#define vmseq_vx_i64m8_b8 ( ... ) __riscv_vmseq_vx_i64m8_b8(__VA_ARGS__)

◆ vmseq_vx_i64m8_b8_m

#define vmseq_vx_i64m8_b8_m ( ... ) __riscv_vmseq_vx_i64m8_b8_mu(__VA_ARGS__)

◆ vmseq_vx_i8m1_b8

#define vmseq_vx_i8m1_b8 ( ... ) __riscv_vmseq_vx_i8m1_b8(__VA_ARGS__)

◆ vmseq_vx_i8m1_b8_m

#define vmseq_vx_i8m1_b8_m ( ... ) __riscv_vmseq_vx_i8m1_b8_mu(__VA_ARGS__)

◆ vmseq_vx_i8m2_b4

#define vmseq_vx_i8m2_b4 ( ... ) __riscv_vmseq_vx_i8m2_b4(__VA_ARGS__)

◆ vmseq_vx_i8m2_b4_m

#define vmseq_vx_i8m2_b4_m ( ... ) __riscv_vmseq_vx_i8m2_b4_mu(__VA_ARGS__)

◆ vmseq_vx_i8m4_b2

#define vmseq_vx_i8m4_b2 ( ... ) __riscv_vmseq_vx_i8m4_b2(__VA_ARGS__)

◆ vmseq_vx_i8m4_b2_m

#define vmseq_vx_i8m4_b2_m ( ... ) __riscv_vmseq_vx_i8m4_b2_mu(__VA_ARGS__)

◆ vmseq_vx_i8m8_b1

#define vmseq_vx_i8m8_b1 ( ... ) __riscv_vmseq_vx_i8m8_b1(__VA_ARGS__)

◆ vmseq_vx_i8m8_b1_m

#define vmseq_vx_i8m8_b1_m ( ... ) __riscv_vmseq_vx_i8m8_b1_mu(__VA_ARGS__)

◆ vmseq_vx_i8mf2_b16

#define vmseq_vx_i8mf2_b16 ( ... ) __riscv_vmseq_vx_i8mf2_b16(__VA_ARGS__)

◆ vmseq_vx_i8mf2_b16_m

#define vmseq_vx_i8mf2_b16_m ( ... ) __riscv_vmseq_vx_i8mf2_b16_mu(__VA_ARGS__)

◆ vmseq_vx_i8mf4_b32

#define vmseq_vx_i8mf4_b32 ( ... ) __riscv_vmseq_vx_i8mf4_b32(__VA_ARGS__)

◆ vmseq_vx_i8mf4_b32_m

#define vmseq_vx_i8mf4_b32_m ( ... ) __riscv_vmseq_vx_i8mf4_b32_mu(__VA_ARGS__)

◆ vmseq_vx_i8mf8_b64

#define vmseq_vx_i8mf8_b64 ( ... ) __riscv_vmseq_vx_i8mf8_b64(__VA_ARGS__)

◆ vmseq_vx_i8mf8_b64_m

#define vmseq_vx_i8mf8_b64_m ( ... ) __riscv_vmseq_vx_i8mf8_b64_mu(__VA_ARGS__)

◆ vmseq_vx_u16m1_b16

#define vmseq_vx_u16m1_b16 ( ... ) __riscv_vmseq_vx_u16m1_b16(__VA_ARGS__)

◆ vmseq_vx_u16m1_b16_m

#define vmseq_vx_u16m1_b16_m ( ... ) __riscv_vmseq_vx_u16m1_b16_mu(__VA_ARGS__)

◆ vmseq_vx_u16m2_b8

#define vmseq_vx_u16m2_b8 ( ... ) __riscv_vmseq_vx_u16m2_b8(__VA_ARGS__)

◆ vmseq_vx_u16m2_b8_m

#define vmseq_vx_u16m2_b8_m ( ... ) __riscv_vmseq_vx_u16m2_b8_mu(__VA_ARGS__)

◆ vmseq_vx_u16m4_b4

#define vmseq_vx_u16m4_b4 ( ... ) __riscv_vmseq_vx_u16m4_b4(__VA_ARGS__)

◆ vmseq_vx_u16m4_b4_m

#define vmseq_vx_u16m4_b4_m ( ... ) __riscv_vmseq_vx_u16m4_b4_mu(__VA_ARGS__)

◆ vmseq_vx_u16m8_b2

#define vmseq_vx_u16m8_b2 ( ... ) __riscv_vmseq_vx_u16m8_b2(__VA_ARGS__)

◆ vmseq_vx_u16m8_b2_m

#define vmseq_vx_u16m8_b2_m ( ... ) __riscv_vmseq_vx_u16m8_b2_mu(__VA_ARGS__)

◆ vmseq_vx_u16mf2_b32

#define vmseq_vx_u16mf2_b32 ( ... ) __riscv_vmseq_vx_u16mf2_b32(__VA_ARGS__)

◆ vmseq_vx_u16mf2_b32_m

#define vmseq_vx_u16mf2_b32_m ( ... ) __riscv_vmseq_vx_u16mf2_b32_mu(__VA_ARGS__)

◆ vmseq_vx_u16mf4_b64

#define vmseq_vx_u16mf4_b64 ( ... ) __riscv_vmseq_vx_u16mf4_b64(__VA_ARGS__)

◆ vmseq_vx_u16mf4_b64_m

#define vmseq_vx_u16mf4_b64_m ( ... ) __riscv_vmseq_vx_u16mf4_b64_mu(__VA_ARGS__)

◆ vmseq_vx_u32m1_b32

#define vmseq_vx_u32m1_b32 ( ... ) __riscv_vmseq_vx_u32m1_b32(__VA_ARGS__)

◆ vmseq_vx_u32m1_b32_m

#define vmseq_vx_u32m1_b32_m ( ... ) __riscv_vmseq_vx_u32m1_b32_mu(__VA_ARGS__)

◆ vmseq_vx_u32m2_b16

#define vmseq_vx_u32m2_b16 ( ... ) __riscv_vmseq_vx_u32m2_b16(__VA_ARGS__)

◆ vmseq_vx_u32m2_b16_m

#define vmseq_vx_u32m2_b16_m ( ... ) __riscv_vmseq_vx_u32m2_b16_mu(__VA_ARGS__)

◆ vmseq_vx_u32m4_b8

#define vmseq_vx_u32m4_b8 ( ... ) __riscv_vmseq_vx_u32m4_b8(__VA_ARGS__)

◆ vmseq_vx_u32m4_b8_m

#define vmseq_vx_u32m4_b8_m ( ... ) __riscv_vmseq_vx_u32m4_b8_mu(__VA_ARGS__)

◆ vmseq_vx_u32m8_b4

#define vmseq_vx_u32m8_b4 ( ... ) __riscv_vmseq_vx_u32m8_b4(__VA_ARGS__)

◆ vmseq_vx_u32m8_b4_m

#define vmseq_vx_u32m8_b4_m ( ... ) __riscv_vmseq_vx_u32m8_b4_mu(__VA_ARGS__)

◆ vmseq_vx_u32mf2_b64

#define vmseq_vx_u32mf2_b64 ( ... ) __riscv_vmseq_vx_u32mf2_b64(__VA_ARGS__)

◆ vmseq_vx_u32mf2_b64_m

#define vmseq_vx_u32mf2_b64_m ( ... ) __riscv_vmseq_vx_u32mf2_b64_mu(__VA_ARGS__)

◆ vmseq_vx_u64m1_b64

#define vmseq_vx_u64m1_b64 ( ... ) __riscv_vmseq_vx_u64m1_b64(__VA_ARGS__)

◆ vmseq_vx_u64m1_b64_m

#define vmseq_vx_u64m1_b64_m ( ... ) __riscv_vmseq_vx_u64m1_b64_mu(__VA_ARGS__)

◆ vmseq_vx_u64m2_b32

#define vmseq_vx_u64m2_b32 ( ... ) __riscv_vmseq_vx_u64m2_b32(__VA_ARGS__)

◆ vmseq_vx_u64m2_b32_m

#define vmseq_vx_u64m2_b32_m ( ... ) __riscv_vmseq_vx_u64m2_b32_mu(__VA_ARGS__)

◆ vmseq_vx_u64m4_b16

#define vmseq_vx_u64m4_b16 ( ... ) __riscv_vmseq_vx_u64m4_b16(__VA_ARGS__)

◆ vmseq_vx_u64m4_b16_m

#define vmseq_vx_u64m4_b16_m ( ... ) __riscv_vmseq_vx_u64m4_b16_mu(__VA_ARGS__)

◆ vmseq_vx_u64m8_b8

#define vmseq_vx_u64m8_b8 ( ... ) __riscv_vmseq_vx_u64m8_b8(__VA_ARGS__)

◆ vmseq_vx_u64m8_b8_m

#define vmseq_vx_u64m8_b8_m ( ... ) __riscv_vmseq_vx_u64m8_b8_mu(__VA_ARGS__)

◆ vmseq_vx_u8m1_b8

#define vmseq_vx_u8m1_b8 ( ... ) __riscv_vmseq_vx_u8m1_b8(__VA_ARGS__)

◆ vmseq_vx_u8m1_b8_m

#define vmseq_vx_u8m1_b8_m ( ... ) __riscv_vmseq_vx_u8m1_b8_mu(__VA_ARGS__)

◆ vmseq_vx_u8m2_b4

#define vmseq_vx_u8m2_b4 ( ... ) __riscv_vmseq_vx_u8m2_b4(__VA_ARGS__)

◆ vmseq_vx_u8m2_b4_m

#define vmseq_vx_u8m2_b4_m ( ... ) __riscv_vmseq_vx_u8m2_b4_mu(__VA_ARGS__)

◆ vmseq_vx_u8m4_b2

#define vmseq_vx_u8m4_b2 ( ... ) __riscv_vmseq_vx_u8m4_b2(__VA_ARGS__)

◆ vmseq_vx_u8m4_b2_m

#define vmseq_vx_u8m4_b2_m ( ... ) __riscv_vmseq_vx_u8m4_b2_mu(__VA_ARGS__)

◆ vmseq_vx_u8m8_b1

#define vmseq_vx_u8m8_b1 ( ... ) __riscv_vmseq_vx_u8m8_b1(__VA_ARGS__)

◆ vmseq_vx_u8m8_b1_m

#define vmseq_vx_u8m8_b1_m ( ... ) __riscv_vmseq_vx_u8m8_b1_mu(__VA_ARGS__)

◆ vmseq_vx_u8mf2_b16

#define vmseq_vx_u8mf2_b16 ( ... ) __riscv_vmseq_vx_u8mf2_b16(__VA_ARGS__)

◆ vmseq_vx_u8mf2_b16_m

#define vmseq_vx_u8mf2_b16_m ( ... ) __riscv_vmseq_vx_u8mf2_b16_mu(__VA_ARGS__)

◆ vmseq_vx_u8mf4_b32

#define vmseq_vx_u8mf4_b32 ( ... ) __riscv_vmseq_vx_u8mf4_b32(__VA_ARGS__)

◆ vmseq_vx_u8mf4_b32_m

#define vmseq_vx_u8mf4_b32_m ( ... ) __riscv_vmseq_vx_u8mf4_b32_mu(__VA_ARGS__)

◆ vmseq_vx_u8mf8_b64

#define vmseq_vx_u8mf8_b64 ( ... ) __riscv_vmseq_vx_u8mf8_b64(__VA_ARGS__)

◆ vmseq_vx_u8mf8_b64_m

#define vmseq_vx_u8mf8_b64_m ( ... ) __riscv_vmseq_vx_u8mf8_b64_mu(__VA_ARGS__)

◆ vmset_m_b1

#define vmset_m_b1 ( ... ) __riscv_vmset_m_b1(__VA_ARGS__)

◆ vmset_m_b16

#define vmset_m_b16 ( ... ) __riscv_vmset_m_b16(__VA_ARGS__)

◆ vmset_m_b2

#define vmset_m_b2 ( ... ) __riscv_vmset_m_b2(__VA_ARGS__)

◆ vmset_m_b32

#define vmset_m_b32 ( ... ) __riscv_vmset_m_b32(__VA_ARGS__)

◆ vmset_m_b4

#define vmset_m_b4 ( ... ) __riscv_vmset_m_b4(__VA_ARGS__)

◆ vmset_m_b64

#define vmset_m_b64 ( ... ) __riscv_vmset_m_b64(__VA_ARGS__)

◆ vmset_m_b8

#define vmset_m_b8 ( ... ) __riscv_vmset_m_b8(__VA_ARGS__)

◆ vmsge_vv_i16m1_b16

#define vmsge_vv_i16m1_b16 ( ... ) __riscv_vmsge_vv_i16m1_b16(__VA_ARGS__)

◆ vmsge_vv_i16m1_b16_m

#define vmsge_vv_i16m1_b16_m ( ... ) __riscv_vmsge_vv_i16m1_b16_mu(__VA_ARGS__)

◆ vmsge_vv_i16m2_b8

#define vmsge_vv_i16m2_b8 ( ... ) __riscv_vmsge_vv_i16m2_b8(__VA_ARGS__)

◆ vmsge_vv_i16m2_b8_m

#define vmsge_vv_i16m2_b8_m ( ... ) __riscv_vmsge_vv_i16m2_b8_mu(__VA_ARGS__)

◆ vmsge_vv_i16m4_b4

#define vmsge_vv_i16m4_b4 ( ... ) __riscv_vmsge_vv_i16m4_b4(__VA_ARGS__)

◆ vmsge_vv_i16m4_b4_m

#define vmsge_vv_i16m4_b4_m ( ... ) __riscv_vmsge_vv_i16m4_b4_mu(__VA_ARGS__)

◆ vmsge_vv_i16m8_b2

#define vmsge_vv_i16m8_b2 ( ... ) __riscv_vmsge_vv_i16m8_b2(__VA_ARGS__)

◆ vmsge_vv_i16m8_b2_m

#define vmsge_vv_i16m8_b2_m ( ... ) __riscv_vmsge_vv_i16m8_b2_mu(__VA_ARGS__)

◆ vmsge_vv_i16mf2_b32

#define vmsge_vv_i16mf2_b32 ( ... ) __riscv_vmsge_vv_i16mf2_b32(__VA_ARGS__)

◆ vmsge_vv_i16mf2_b32_m

#define vmsge_vv_i16mf2_b32_m ( ... ) __riscv_vmsge_vv_i16mf2_b32_mu(__VA_ARGS__)

◆ vmsge_vv_i16mf4_b64

#define vmsge_vv_i16mf4_b64 ( ... ) __riscv_vmsge_vv_i16mf4_b64(__VA_ARGS__)

◆ vmsge_vv_i16mf4_b64_m

#define vmsge_vv_i16mf4_b64_m ( ... ) __riscv_vmsge_vv_i16mf4_b64_mu(__VA_ARGS__)

◆ vmsge_vv_i32m1_b32

#define vmsge_vv_i32m1_b32 ( ... ) __riscv_vmsge_vv_i32m1_b32(__VA_ARGS__)

◆ vmsge_vv_i32m1_b32_m

#define vmsge_vv_i32m1_b32_m ( ... ) __riscv_vmsge_vv_i32m1_b32_mu(__VA_ARGS__)

◆ vmsge_vv_i32m2_b16

#define vmsge_vv_i32m2_b16 ( ... ) __riscv_vmsge_vv_i32m2_b16(__VA_ARGS__)

◆ vmsge_vv_i32m2_b16_m

#define vmsge_vv_i32m2_b16_m ( ... ) __riscv_vmsge_vv_i32m2_b16_mu(__VA_ARGS__)

◆ vmsge_vv_i32m4_b8

#define vmsge_vv_i32m4_b8 ( ... ) __riscv_vmsge_vv_i32m4_b8(__VA_ARGS__)

◆ vmsge_vv_i32m4_b8_m

#define vmsge_vv_i32m4_b8_m ( ... ) __riscv_vmsge_vv_i32m4_b8_mu(__VA_ARGS__)

◆ vmsge_vv_i32m8_b4

#define vmsge_vv_i32m8_b4 ( ... ) __riscv_vmsge_vv_i32m8_b4(__VA_ARGS__)

◆ vmsge_vv_i32m8_b4_m

#define vmsge_vv_i32m8_b4_m ( ... ) __riscv_vmsge_vv_i32m8_b4_mu(__VA_ARGS__)

◆ vmsge_vv_i32mf2_b64

#define vmsge_vv_i32mf2_b64 ( ... ) __riscv_vmsge_vv_i32mf2_b64(__VA_ARGS__)

◆ vmsge_vv_i32mf2_b64_m

#define vmsge_vv_i32mf2_b64_m ( ... ) __riscv_vmsge_vv_i32mf2_b64_mu(__VA_ARGS__)

◆ vmsge_vv_i64m1_b64

#define vmsge_vv_i64m1_b64 ( ... ) __riscv_vmsge_vv_i64m1_b64(__VA_ARGS__)

◆ vmsge_vv_i64m1_b64_m

#define vmsge_vv_i64m1_b64_m ( ... ) __riscv_vmsge_vv_i64m1_b64_mu(__VA_ARGS__)

◆ vmsge_vv_i64m2_b32

#define vmsge_vv_i64m2_b32 ( ... ) __riscv_vmsge_vv_i64m2_b32(__VA_ARGS__)

◆ vmsge_vv_i64m2_b32_m

#define vmsge_vv_i64m2_b32_m ( ... ) __riscv_vmsge_vv_i64m2_b32_mu(__VA_ARGS__)

◆ vmsge_vv_i64m4_b16

#define vmsge_vv_i64m4_b16 ( ... ) __riscv_vmsge_vv_i64m4_b16(__VA_ARGS__)

◆ vmsge_vv_i64m4_b16_m

#define vmsge_vv_i64m4_b16_m ( ... ) __riscv_vmsge_vv_i64m4_b16_mu(__VA_ARGS__)

◆ vmsge_vv_i64m8_b8

#define vmsge_vv_i64m8_b8 ( ... ) __riscv_vmsge_vv_i64m8_b8(__VA_ARGS__)

◆ vmsge_vv_i64m8_b8_m

#define vmsge_vv_i64m8_b8_m ( ... ) __riscv_vmsge_vv_i64m8_b8_mu(__VA_ARGS__)

◆ vmsge_vv_i8m1_b8

#define vmsge_vv_i8m1_b8 ( ... ) __riscv_vmsge_vv_i8m1_b8(__VA_ARGS__)

◆ vmsge_vv_i8m1_b8_m

#define vmsge_vv_i8m1_b8_m ( ... ) __riscv_vmsge_vv_i8m1_b8_mu(__VA_ARGS__)

◆ vmsge_vv_i8m2_b4

#define vmsge_vv_i8m2_b4 ( ... ) __riscv_vmsge_vv_i8m2_b4(__VA_ARGS__)

◆ vmsge_vv_i8m2_b4_m

#define vmsge_vv_i8m2_b4_m ( ... ) __riscv_vmsge_vv_i8m2_b4_mu(__VA_ARGS__)

◆ vmsge_vv_i8m4_b2

#define vmsge_vv_i8m4_b2 ( ... ) __riscv_vmsge_vv_i8m4_b2(__VA_ARGS__)

◆ vmsge_vv_i8m4_b2_m

#define vmsge_vv_i8m4_b2_m ( ... ) __riscv_vmsge_vv_i8m4_b2_mu(__VA_ARGS__)

◆ vmsge_vv_i8m8_b1

#define vmsge_vv_i8m8_b1 ( ... ) __riscv_vmsge_vv_i8m8_b1(__VA_ARGS__)

◆ vmsge_vv_i8m8_b1_m

#define vmsge_vv_i8m8_b1_m ( ... ) __riscv_vmsge_vv_i8m8_b1_mu(__VA_ARGS__)

◆ vmsge_vv_i8mf2_b16

#define vmsge_vv_i8mf2_b16 ( ... ) __riscv_vmsge_vv_i8mf2_b16(__VA_ARGS__)

◆ vmsge_vv_i8mf2_b16_m

#define vmsge_vv_i8mf2_b16_m ( ... ) __riscv_vmsge_vv_i8mf2_b16_mu(__VA_ARGS__)

◆ vmsge_vv_i8mf4_b32

#define vmsge_vv_i8mf4_b32 ( ... ) __riscv_vmsge_vv_i8mf4_b32(__VA_ARGS__)

◆ vmsge_vv_i8mf4_b32_m

#define vmsge_vv_i8mf4_b32_m ( ... ) __riscv_vmsge_vv_i8mf4_b32_mu(__VA_ARGS__)

◆ vmsge_vv_i8mf8_b64

#define vmsge_vv_i8mf8_b64 ( ... ) __riscv_vmsge_vv_i8mf8_b64(__VA_ARGS__)

◆ vmsge_vv_i8mf8_b64_m

#define vmsge_vv_i8mf8_b64_m ( ... ) __riscv_vmsge_vv_i8mf8_b64_mu(__VA_ARGS__)

◆ vmsge_vx_i16m1_b16

#define vmsge_vx_i16m1_b16 ( ... ) __riscv_vmsge_vx_i16m1_b16(__VA_ARGS__)

◆ vmsge_vx_i16m1_b16_m

#define vmsge_vx_i16m1_b16_m ( ... ) __riscv_vmsge_vx_i16m1_b16_mu(__VA_ARGS__)

◆ vmsge_vx_i16m2_b8

#define vmsge_vx_i16m2_b8 ( ... ) __riscv_vmsge_vx_i16m2_b8(__VA_ARGS__)

◆ vmsge_vx_i16m2_b8_m

#define vmsge_vx_i16m2_b8_m ( ... ) __riscv_vmsge_vx_i16m2_b8_mu(__VA_ARGS__)

◆ vmsge_vx_i16m4_b4

#define vmsge_vx_i16m4_b4 ( ... ) __riscv_vmsge_vx_i16m4_b4(__VA_ARGS__)

◆ vmsge_vx_i16m4_b4_m

#define vmsge_vx_i16m4_b4_m ( ... ) __riscv_vmsge_vx_i16m4_b4_mu(__VA_ARGS__)

◆ vmsge_vx_i16m8_b2

#define vmsge_vx_i16m8_b2 ( ... ) __riscv_vmsge_vx_i16m8_b2(__VA_ARGS__)

◆ vmsge_vx_i16m8_b2_m

#define vmsge_vx_i16m8_b2_m ( ... ) __riscv_vmsge_vx_i16m8_b2_mu(__VA_ARGS__)

◆ vmsge_vx_i16mf2_b32

#define vmsge_vx_i16mf2_b32 ( ... ) __riscv_vmsge_vx_i16mf2_b32(__VA_ARGS__)

◆ vmsge_vx_i16mf2_b32_m

#define vmsge_vx_i16mf2_b32_m ( ... ) __riscv_vmsge_vx_i16mf2_b32_mu(__VA_ARGS__)

◆ vmsge_vx_i16mf4_b64

#define vmsge_vx_i16mf4_b64 ( ... ) __riscv_vmsge_vx_i16mf4_b64(__VA_ARGS__)

◆ vmsge_vx_i16mf4_b64_m

#define vmsge_vx_i16mf4_b64_m ( ... ) __riscv_vmsge_vx_i16mf4_b64_mu(__VA_ARGS__)

◆ vmsge_vx_i32m1_b32

#define vmsge_vx_i32m1_b32 ( ... ) __riscv_vmsge_vx_i32m1_b32(__VA_ARGS__)

◆ vmsge_vx_i32m1_b32_m

#define vmsge_vx_i32m1_b32_m ( ... ) __riscv_vmsge_vx_i32m1_b32_mu(__VA_ARGS__)

◆ vmsge_vx_i32m2_b16

#define vmsge_vx_i32m2_b16 ( ... ) __riscv_vmsge_vx_i32m2_b16(__VA_ARGS__)

◆ vmsge_vx_i32m2_b16_m

#define vmsge_vx_i32m2_b16_m ( ... ) __riscv_vmsge_vx_i32m2_b16_mu(__VA_ARGS__)

◆ vmsge_vx_i32m4_b8

#define vmsge_vx_i32m4_b8 ( ... ) __riscv_vmsge_vx_i32m4_b8(__VA_ARGS__)

◆ vmsge_vx_i32m4_b8_m

#define vmsge_vx_i32m4_b8_m ( ... ) __riscv_vmsge_vx_i32m4_b8_mu(__VA_ARGS__)

◆ vmsge_vx_i32m8_b4

#define vmsge_vx_i32m8_b4 ( ... ) __riscv_vmsge_vx_i32m8_b4(__VA_ARGS__)

◆ vmsge_vx_i32m8_b4_m

#define vmsge_vx_i32m8_b4_m ( ... ) __riscv_vmsge_vx_i32m8_b4_mu(__VA_ARGS__)

◆ vmsge_vx_i32mf2_b64

#define vmsge_vx_i32mf2_b64 ( ... ) __riscv_vmsge_vx_i32mf2_b64(__VA_ARGS__)

◆ vmsge_vx_i32mf2_b64_m

#define vmsge_vx_i32mf2_b64_m ( ... ) __riscv_vmsge_vx_i32mf2_b64_mu(__VA_ARGS__)

◆ vmsge_vx_i64m1_b64

#define vmsge_vx_i64m1_b64 ( ... ) __riscv_vmsge_vx_i64m1_b64(__VA_ARGS__)

◆ vmsge_vx_i64m1_b64_m

#define vmsge_vx_i64m1_b64_m ( ... ) __riscv_vmsge_vx_i64m1_b64_mu(__VA_ARGS__)

◆ vmsge_vx_i64m2_b32

#define vmsge_vx_i64m2_b32 ( ... ) __riscv_vmsge_vx_i64m2_b32(__VA_ARGS__)

◆ vmsge_vx_i64m2_b32_m

#define vmsge_vx_i64m2_b32_m ( ... ) __riscv_vmsge_vx_i64m2_b32_mu(__VA_ARGS__)

◆ vmsge_vx_i64m4_b16

#define vmsge_vx_i64m4_b16 ( ... ) __riscv_vmsge_vx_i64m4_b16(__VA_ARGS__)

◆ vmsge_vx_i64m4_b16_m

#define vmsge_vx_i64m4_b16_m ( ... ) __riscv_vmsge_vx_i64m4_b16_mu(__VA_ARGS__)

◆ vmsge_vx_i64m8_b8

#define vmsge_vx_i64m8_b8 ( ... ) __riscv_vmsge_vx_i64m8_b8(__VA_ARGS__)

◆ vmsge_vx_i64m8_b8_m

#define vmsge_vx_i64m8_b8_m ( ... ) __riscv_vmsge_vx_i64m8_b8_mu(__VA_ARGS__)

◆ vmsge_vx_i8m1_b8

#define vmsge_vx_i8m1_b8 ( ... ) __riscv_vmsge_vx_i8m1_b8(__VA_ARGS__)

◆ vmsge_vx_i8m1_b8_m

#define vmsge_vx_i8m1_b8_m ( ... ) __riscv_vmsge_vx_i8m1_b8_mu(__VA_ARGS__)

◆ vmsge_vx_i8m2_b4

#define vmsge_vx_i8m2_b4 ( ... ) __riscv_vmsge_vx_i8m2_b4(__VA_ARGS__)

◆ vmsge_vx_i8m2_b4_m

#define vmsge_vx_i8m2_b4_m ( ... ) __riscv_vmsge_vx_i8m2_b4_mu(__VA_ARGS__)

◆ vmsge_vx_i8m4_b2

#define vmsge_vx_i8m4_b2 ( ... ) __riscv_vmsge_vx_i8m4_b2(__VA_ARGS__)

◆ vmsge_vx_i8m4_b2_m

#define vmsge_vx_i8m4_b2_m ( ... ) __riscv_vmsge_vx_i8m4_b2_mu(__VA_ARGS__)

◆ vmsge_vx_i8m8_b1

#define vmsge_vx_i8m8_b1 ( ... ) __riscv_vmsge_vx_i8m8_b1(__VA_ARGS__)

◆ vmsge_vx_i8m8_b1_m

#define vmsge_vx_i8m8_b1_m ( ... ) __riscv_vmsge_vx_i8m8_b1_mu(__VA_ARGS__)

◆ vmsge_vx_i8mf2_b16

#define vmsge_vx_i8mf2_b16 ( ... ) __riscv_vmsge_vx_i8mf2_b16(__VA_ARGS__)

◆ vmsge_vx_i8mf2_b16_m

#define vmsge_vx_i8mf2_b16_m ( ... ) __riscv_vmsge_vx_i8mf2_b16_mu(__VA_ARGS__)

◆ vmsge_vx_i8mf4_b32

#define vmsge_vx_i8mf4_b32 ( ... ) __riscv_vmsge_vx_i8mf4_b32(__VA_ARGS__)

◆ vmsge_vx_i8mf4_b32_m

#define vmsge_vx_i8mf4_b32_m ( ... ) __riscv_vmsge_vx_i8mf4_b32_mu(__VA_ARGS__)

◆ vmsge_vx_i8mf8_b64

#define vmsge_vx_i8mf8_b64 ( ... ) __riscv_vmsge_vx_i8mf8_b64(__VA_ARGS__)

◆ vmsge_vx_i8mf8_b64_m

#define vmsge_vx_i8mf8_b64_m ( ... ) __riscv_vmsge_vx_i8mf8_b64_mu(__VA_ARGS__)

◆ vmsgeu_vv_u16m1_b16

#define vmsgeu_vv_u16m1_b16 ( ... ) __riscv_vmsgeu_vv_u16m1_b16(__VA_ARGS__)

◆ vmsgeu_vv_u16m1_b16_m

#define vmsgeu_vv_u16m1_b16_m ( ... ) __riscv_vmsgeu_vv_u16m1_b16_mu(__VA_ARGS__)

◆ vmsgeu_vv_u16m2_b8

#define vmsgeu_vv_u16m2_b8 ( ... ) __riscv_vmsgeu_vv_u16m2_b8(__VA_ARGS__)

◆ vmsgeu_vv_u16m2_b8_m

#define vmsgeu_vv_u16m2_b8_m ( ... ) __riscv_vmsgeu_vv_u16m2_b8_mu(__VA_ARGS__)

◆ vmsgeu_vv_u16m4_b4

#define vmsgeu_vv_u16m4_b4 ( ... ) __riscv_vmsgeu_vv_u16m4_b4(__VA_ARGS__)

◆ vmsgeu_vv_u16m4_b4_m

#define vmsgeu_vv_u16m4_b4_m ( ... ) __riscv_vmsgeu_vv_u16m4_b4_mu(__VA_ARGS__)

◆ vmsgeu_vv_u16m8_b2

#define vmsgeu_vv_u16m8_b2 ( ... ) __riscv_vmsgeu_vv_u16m8_b2(__VA_ARGS__)

◆ vmsgeu_vv_u16m8_b2_m

#define vmsgeu_vv_u16m8_b2_m ( ... ) __riscv_vmsgeu_vv_u16m8_b2_mu(__VA_ARGS__)

◆ vmsgeu_vv_u16mf2_b32

#define vmsgeu_vv_u16mf2_b32 ( ... ) __riscv_vmsgeu_vv_u16mf2_b32(__VA_ARGS__)

◆ vmsgeu_vv_u16mf2_b32_m

#define vmsgeu_vv_u16mf2_b32_m ( ... ) __riscv_vmsgeu_vv_u16mf2_b32_mu(__VA_ARGS__)

◆ vmsgeu_vv_u16mf4_b64

#define vmsgeu_vv_u16mf4_b64 ( ... ) __riscv_vmsgeu_vv_u16mf4_b64(__VA_ARGS__)

◆ vmsgeu_vv_u16mf4_b64_m

#define vmsgeu_vv_u16mf4_b64_m ( ... ) __riscv_vmsgeu_vv_u16mf4_b64_mu(__VA_ARGS__)

◆ vmsgeu_vv_u32m1_b32

#define vmsgeu_vv_u32m1_b32 ( ... ) __riscv_vmsgeu_vv_u32m1_b32(__VA_ARGS__)

◆ vmsgeu_vv_u32m1_b32_m

#define vmsgeu_vv_u32m1_b32_m ( ... ) __riscv_vmsgeu_vv_u32m1_b32_mu(__VA_ARGS__)

◆ vmsgeu_vv_u32m2_b16

#define vmsgeu_vv_u32m2_b16 ( ... ) __riscv_vmsgeu_vv_u32m2_b16(__VA_ARGS__)

◆ vmsgeu_vv_u32m2_b16_m

#define vmsgeu_vv_u32m2_b16_m ( ... ) __riscv_vmsgeu_vv_u32m2_b16_mu(__VA_ARGS__)

◆ vmsgeu_vv_u32m4_b8

#define vmsgeu_vv_u32m4_b8 ( ... ) __riscv_vmsgeu_vv_u32m4_b8(__VA_ARGS__)

◆ vmsgeu_vv_u32m4_b8_m

#define vmsgeu_vv_u32m4_b8_m ( ... ) __riscv_vmsgeu_vv_u32m4_b8_mu(__VA_ARGS__)

◆ vmsgeu_vv_u32m8_b4

#define vmsgeu_vv_u32m8_b4 ( ... ) __riscv_vmsgeu_vv_u32m8_b4(__VA_ARGS__)

◆ vmsgeu_vv_u32m8_b4_m

#define vmsgeu_vv_u32m8_b4_m ( ... ) __riscv_vmsgeu_vv_u32m8_b4_mu(__VA_ARGS__)

◆ vmsgeu_vv_u32mf2_b64

#define vmsgeu_vv_u32mf2_b64 ( ... ) __riscv_vmsgeu_vv_u32mf2_b64(__VA_ARGS__)

◆ vmsgeu_vv_u32mf2_b64_m

#define vmsgeu_vv_u32mf2_b64_m ( ... ) __riscv_vmsgeu_vv_u32mf2_b64_mu(__VA_ARGS__)

◆ vmsgeu_vv_u64m1_b64

#define vmsgeu_vv_u64m1_b64 ( ... ) __riscv_vmsgeu_vv_u64m1_b64(__VA_ARGS__)

◆ vmsgeu_vv_u64m1_b64_m

#define vmsgeu_vv_u64m1_b64_m ( ... ) __riscv_vmsgeu_vv_u64m1_b64_mu(__VA_ARGS__)

◆ vmsgeu_vv_u64m2_b32

#define vmsgeu_vv_u64m2_b32 ( ... ) __riscv_vmsgeu_vv_u64m2_b32(__VA_ARGS__)

◆ vmsgeu_vv_u64m2_b32_m

#define vmsgeu_vv_u64m2_b32_m ( ... ) __riscv_vmsgeu_vv_u64m2_b32_mu(__VA_ARGS__)

◆ vmsgeu_vv_u64m4_b16

#define vmsgeu_vv_u64m4_b16 ( ... ) __riscv_vmsgeu_vv_u64m4_b16(__VA_ARGS__)

◆ vmsgeu_vv_u64m4_b16_m

#define vmsgeu_vv_u64m4_b16_m ( ... ) __riscv_vmsgeu_vv_u64m4_b16_mu(__VA_ARGS__)

◆ vmsgeu_vv_u64m8_b8

#define vmsgeu_vv_u64m8_b8 ( ... ) __riscv_vmsgeu_vv_u64m8_b8(__VA_ARGS__)

◆ vmsgeu_vv_u64m8_b8_m

#define vmsgeu_vv_u64m8_b8_m ( ... ) __riscv_vmsgeu_vv_u64m8_b8_mu(__VA_ARGS__)

◆ vmsgeu_vv_u8m1_b8

#define vmsgeu_vv_u8m1_b8 ( ... ) __riscv_vmsgeu_vv_u8m1_b8(__VA_ARGS__)

◆ vmsgeu_vv_u8m1_b8_m

#define vmsgeu_vv_u8m1_b8_m ( ... ) __riscv_vmsgeu_vv_u8m1_b8_mu(__VA_ARGS__)

◆ vmsgeu_vv_u8m2_b4

#define vmsgeu_vv_u8m2_b4 ( ... ) __riscv_vmsgeu_vv_u8m2_b4(__VA_ARGS__)

◆ vmsgeu_vv_u8m2_b4_m

#define vmsgeu_vv_u8m2_b4_m ( ... ) __riscv_vmsgeu_vv_u8m2_b4_mu(__VA_ARGS__)

◆ vmsgeu_vv_u8m4_b2

#define vmsgeu_vv_u8m4_b2 ( ... ) __riscv_vmsgeu_vv_u8m4_b2(__VA_ARGS__)

◆ vmsgeu_vv_u8m4_b2_m

#define vmsgeu_vv_u8m4_b2_m ( ... ) __riscv_vmsgeu_vv_u8m4_b2_mu(__VA_ARGS__)

◆ vmsgeu_vv_u8m8_b1

#define vmsgeu_vv_u8m8_b1 ( ... ) __riscv_vmsgeu_vv_u8m8_b1(__VA_ARGS__)

◆ vmsgeu_vv_u8m8_b1_m

#define vmsgeu_vv_u8m8_b1_m ( ... ) __riscv_vmsgeu_vv_u8m8_b1_mu(__VA_ARGS__)

◆ vmsgeu_vv_u8mf2_b16

#define vmsgeu_vv_u8mf2_b16 ( ... ) __riscv_vmsgeu_vv_u8mf2_b16(__VA_ARGS__)

◆ vmsgeu_vv_u8mf2_b16_m

#define vmsgeu_vv_u8mf2_b16_m ( ... ) __riscv_vmsgeu_vv_u8mf2_b16_mu(__VA_ARGS__)

◆ vmsgeu_vv_u8mf4_b32

#define vmsgeu_vv_u8mf4_b32 ( ... ) __riscv_vmsgeu_vv_u8mf4_b32(__VA_ARGS__)

◆ vmsgeu_vv_u8mf4_b32_m

#define vmsgeu_vv_u8mf4_b32_m ( ... ) __riscv_vmsgeu_vv_u8mf4_b32_mu(__VA_ARGS__)

◆ vmsgeu_vv_u8mf8_b64

#define vmsgeu_vv_u8mf8_b64 ( ... ) __riscv_vmsgeu_vv_u8mf8_b64(__VA_ARGS__)

◆ vmsgeu_vv_u8mf8_b64_m

#define vmsgeu_vv_u8mf8_b64_m ( ... ) __riscv_vmsgeu_vv_u8mf8_b64_mu(__VA_ARGS__)

◆ vmsgeu_vx_u16m1_b16

#define vmsgeu_vx_u16m1_b16 ( ... ) __riscv_vmsgeu_vx_u16m1_b16(__VA_ARGS__)

◆ vmsgeu_vx_u16m1_b16_m

#define vmsgeu_vx_u16m1_b16_m ( ... ) __riscv_vmsgeu_vx_u16m1_b16_mu(__VA_ARGS__)

◆ vmsgeu_vx_u16m2_b8

#define vmsgeu_vx_u16m2_b8 ( ... ) __riscv_vmsgeu_vx_u16m2_b8(__VA_ARGS__)

◆ vmsgeu_vx_u16m2_b8_m

#define vmsgeu_vx_u16m2_b8_m ( ... ) __riscv_vmsgeu_vx_u16m2_b8_mu(__VA_ARGS__)

◆ vmsgeu_vx_u16m4_b4

#define vmsgeu_vx_u16m4_b4 ( ... ) __riscv_vmsgeu_vx_u16m4_b4(__VA_ARGS__)

◆ vmsgeu_vx_u16m4_b4_m

#define vmsgeu_vx_u16m4_b4_m ( ... ) __riscv_vmsgeu_vx_u16m4_b4_mu(__VA_ARGS__)

◆ vmsgeu_vx_u16m8_b2

#define vmsgeu_vx_u16m8_b2 ( ... ) __riscv_vmsgeu_vx_u16m8_b2(__VA_ARGS__)

◆ vmsgeu_vx_u16m8_b2_m

#define vmsgeu_vx_u16m8_b2_m ( ... ) __riscv_vmsgeu_vx_u16m8_b2_mu(__VA_ARGS__)

◆ vmsgeu_vx_u16mf2_b32

#define vmsgeu_vx_u16mf2_b32 ( ... ) __riscv_vmsgeu_vx_u16mf2_b32(__VA_ARGS__)

◆ vmsgeu_vx_u16mf2_b32_m

#define vmsgeu_vx_u16mf2_b32_m ( ... ) __riscv_vmsgeu_vx_u16mf2_b32_mu(__VA_ARGS__)

◆ vmsgeu_vx_u16mf4_b64

#define vmsgeu_vx_u16mf4_b64 ( ... ) __riscv_vmsgeu_vx_u16mf4_b64(__VA_ARGS__)

◆ vmsgeu_vx_u16mf4_b64_m

#define vmsgeu_vx_u16mf4_b64_m ( ... ) __riscv_vmsgeu_vx_u16mf4_b64_mu(__VA_ARGS__)

◆ vmsgeu_vx_u32m1_b32

#define vmsgeu_vx_u32m1_b32 ( ... ) __riscv_vmsgeu_vx_u32m1_b32(__VA_ARGS__)

◆ vmsgeu_vx_u32m1_b32_m

#define vmsgeu_vx_u32m1_b32_m ( ... ) __riscv_vmsgeu_vx_u32m1_b32_mu(__VA_ARGS__)

◆ vmsgeu_vx_u32m2_b16

#define vmsgeu_vx_u32m2_b16 ( ... ) __riscv_vmsgeu_vx_u32m2_b16(__VA_ARGS__)

◆ vmsgeu_vx_u32m2_b16_m

#define vmsgeu_vx_u32m2_b16_m ( ... ) __riscv_vmsgeu_vx_u32m2_b16_mu(__VA_ARGS__)

◆ vmsgeu_vx_u32m4_b8

#define vmsgeu_vx_u32m4_b8 ( ... ) __riscv_vmsgeu_vx_u32m4_b8(__VA_ARGS__)

◆ vmsgeu_vx_u32m4_b8_m

#define vmsgeu_vx_u32m4_b8_m ( ... ) __riscv_vmsgeu_vx_u32m4_b8_mu(__VA_ARGS__)

◆ vmsgeu_vx_u32m8_b4

#define vmsgeu_vx_u32m8_b4 ( ... ) __riscv_vmsgeu_vx_u32m8_b4(__VA_ARGS__)

◆ vmsgeu_vx_u32m8_b4_m

#define vmsgeu_vx_u32m8_b4_m ( ... ) __riscv_vmsgeu_vx_u32m8_b4_mu(__VA_ARGS__)

◆ vmsgeu_vx_u32mf2_b64

#define vmsgeu_vx_u32mf2_b64 ( ... ) __riscv_vmsgeu_vx_u32mf2_b64(__VA_ARGS__)

◆ vmsgeu_vx_u32mf2_b64_m

#define vmsgeu_vx_u32mf2_b64_m ( ... ) __riscv_vmsgeu_vx_u32mf2_b64_mu(__VA_ARGS__)

◆ vmsgeu_vx_u64m1_b64

#define vmsgeu_vx_u64m1_b64 ( ... ) __riscv_vmsgeu_vx_u64m1_b64(__VA_ARGS__)

◆ vmsgeu_vx_u64m1_b64_m

#define vmsgeu_vx_u64m1_b64_m ( ... ) __riscv_vmsgeu_vx_u64m1_b64_mu(__VA_ARGS__)

◆ vmsgeu_vx_u64m2_b32

#define vmsgeu_vx_u64m2_b32 ( ... ) __riscv_vmsgeu_vx_u64m2_b32(__VA_ARGS__)

◆ vmsgeu_vx_u64m2_b32_m

#define vmsgeu_vx_u64m2_b32_m ( ... ) __riscv_vmsgeu_vx_u64m2_b32_mu(__VA_ARGS__)

◆ vmsgeu_vx_u64m4_b16

#define vmsgeu_vx_u64m4_b16 ( ... ) __riscv_vmsgeu_vx_u64m4_b16(__VA_ARGS__)

◆ vmsgeu_vx_u64m4_b16_m

#define vmsgeu_vx_u64m4_b16_m ( ... ) __riscv_vmsgeu_vx_u64m4_b16_mu(__VA_ARGS__)

◆ vmsgeu_vx_u64m8_b8

#define vmsgeu_vx_u64m8_b8 ( ... ) __riscv_vmsgeu_vx_u64m8_b8(__VA_ARGS__)

◆ vmsgeu_vx_u64m8_b8_m

#define vmsgeu_vx_u64m8_b8_m ( ... ) __riscv_vmsgeu_vx_u64m8_b8_mu(__VA_ARGS__)

◆ vmsgeu_vx_u8m1_b8

#define vmsgeu_vx_u8m1_b8 ( ... ) __riscv_vmsgeu_vx_u8m1_b8(__VA_ARGS__)

◆ vmsgeu_vx_u8m1_b8_m

#define vmsgeu_vx_u8m1_b8_m ( ... ) __riscv_vmsgeu_vx_u8m1_b8_mu(__VA_ARGS__)

◆ vmsgeu_vx_u8m2_b4

#define vmsgeu_vx_u8m2_b4 ( ... ) __riscv_vmsgeu_vx_u8m2_b4(__VA_ARGS__)

◆ vmsgeu_vx_u8m2_b4_m

#define vmsgeu_vx_u8m2_b4_m ( ... ) __riscv_vmsgeu_vx_u8m2_b4_mu(__VA_ARGS__)

◆ vmsgeu_vx_u8m4_b2

#define vmsgeu_vx_u8m4_b2 ( ... ) __riscv_vmsgeu_vx_u8m4_b2(__VA_ARGS__)

◆ vmsgeu_vx_u8m4_b2_m

#define vmsgeu_vx_u8m4_b2_m ( ... ) __riscv_vmsgeu_vx_u8m4_b2_mu(__VA_ARGS__)

◆ vmsgeu_vx_u8m8_b1

#define vmsgeu_vx_u8m8_b1 ( ... ) __riscv_vmsgeu_vx_u8m8_b1(__VA_ARGS__)

◆ vmsgeu_vx_u8m8_b1_m

#define vmsgeu_vx_u8m8_b1_m ( ... ) __riscv_vmsgeu_vx_u8m8_b1_mu(__VA_ARGS__)

◆ vmsgeu_vx_u8mf2_b16

#define vmsgeu_vx_u8mf2_b16 ( ... ) __riscv_vmsgeu_vx_u8mf2_b16(__VA_ARGS__)

◆ vmsgeu_vx_u8mf2_b16_m

#define vmsgeu_vx_u8mf2_b16_m ( ... ) __riscv_vmsgeu_vx_u8mf2_b16_mu(__VA_ARGS__)

◆ vmsgeu_vx_u8mf4_b32

#define vmsgeu_vx_u8mf4_b32 ( ... ) __riscv_vmsgeu_vx_u8mf4_b32(__VA_ARGS__)

◆ vmsgeu_vx_u8mf4_b32_m

#define vmsgeu_vx_u8mf4_b32_m ( ... ) __riscv_vmsgeu_vx_u8mf4_b32_mu(__VA_ARGS__)

◆ vmsgeu_vx_u8mf8_b64

#define vmsgeu_vx_u8mf8_b64 ( ... ) __riscv_vmsgeu_vx_u8mf8_b64(__VA_ARGS__)

◆ vmsgeu_vx_u8mf8_b64_m

#define vmsgeu_vx_u8mf8_b64_m ( ... ) __riscv_vmsgeu_vx_u8mf8_b64_mu(__VA_ARGS__)

◆ vmsgt_vv_i16m1_b16

#define vmsgt_vv_i16m1_b16 ( ... ) __riscv_vmsgt_vv_i16m1_b16(__VA_ARGS__)

◆ vmsgt_vv_i16m1_b16_m

#define vmsgt_vv_i16m1_b16_m ( ... ) __riscv_vmsgt_vv_i16m1_b16_mu(__VA_ARGS__)

◆ vmsgt_vv_i16m2_b8

#define vmsgt_vv_i16m2_b8 ( ... ) __riscv_vmsgt_vv_i16m2_b8(__VA_ARGS__)

◆ vmsgt_vv_i16m2_b8_m

#define vmsgt_vv_i16m2_b8_m ( ... ) __riscv_vmsgt_vv_i16m2_b8_mu(__VA_ARGS__)

◆ vmsgt_vv_i16m4_b4

#define vmsgt_vv_i16m4_b4 ( ... ) __riscv_vmsgt_vv_i16m4_b4(__VA_ARGS__)

◆ vmsgt_vv_i16m4_b4_m

#define vmsgt_vv_i16m4_b4_m ( ... ) __riscv_vmsgt_vv_i16m4_b4_mu(__VA_ARGS__)

◆ vmsgt_vv_i16m8_b2

#define vmsgt_vv_i16m8_b2 ( ... ) __riscv_vmsgt_vv_i16m8_b2(__VA_ARGS__)

◆ vmsgt_vv_i16m8_b2_m

#define vmsgt_vv_i16m8_b2_m ( ... ) __riscv_vmsgt_vv_i16m8_b2_mu(__VA_ARGS__)

◆ vmsgt_vv_i16mf2_b32

#define vmsgt_vv_i16mf2_b32 ( ... ) __riscv_vmsgt_vv_i16mf2_b32(__VA_ARGS__)

◆ vmsgt_vv_i16mf2_b32_m

#define vmsgt_vv_i16mf2_b32_m ( ... ) __riscv_vmsgt_vv_i16mf2_b32_mu(__VA_ARGS__)

◆ vmsgt_vv_i16mf4_b64

#define vmsgt_vv_i16mf4_b64 ( ... ) __riscv_vmsgt_vv_i16mf4_b64(__VA_ARGS__)

◆ vmsgt_vv_i16mf4_b64_m

#define vmsgt_vv_i16mf4_b64_m ( ... ) __riscv_vmsgt_vv_i16mf4_b64_mu(__VA_ARGS__)

◆ vmsgt_vv_i32m1_b32

#define vmsgt_vv_i32m1_b32 ( ... ) __riscv_vmsgt_vv_i32m1_b32(__VA_ARGS__)

◆ vmsgt_vv_i32m1_b32_m

#define vmsgt_vv_i32m1_b32_m ( ... ) __riscv_vmsgt_vv_i32m1_b32_mu(__VA_ARGS__)

◆ vmsgt_vv_i32m2_b16

#define vmsgt_vv_i32m2_b16 ( ... ) __riscv_vmsgt_vv_i32m2_b16(__VA_ARGS__)

◆ vmsgt_vv_i32m2_b16_m

#define vmsgt_vv_i32m2_b16_m ( ... ) __riscv_vmsgt_vv_i32m2_b16_mu(__VA_ARGS__)

◆ vmsgt_vv_i32m4_b8

#define vmsgt_vv_i32m4_b8 ( ... ) __riscv_vmsgt_vv_i32m4_b8(__VA_ARGS__)

◆ vmsgt_vv_i32m4_b8_m

#define vmsgt_vv_i32m4_b8_m ( ... ) __riscv_vmsgt_vv_i32m4_b8_mu(__VA_ARGS__)

◆ vmsgt_vv_i32m8_b4

#define vmsgt_vv_i32m8_b4 ( ... ) __riscv_vmsgt_vv_i32m8_b4(__VA_ARGS__)

◆ vmsgt_vv_i32m8_b4_m

#define vmsgt_vv_i32m8_b4_m ( ... ) __riscv_vmsgt_vv_i32m8_b4_mu(__VA_ARGS__)

◆ vmsgt_vv_i32mf2_b64

#define vmsgt_vv_i32mf2_b64 ( ... ) __riscv_vmsgt_vv_i32mf2_b64(__VA_ARGS__)

◆ vmsgt_vv_i32mf2_b64_m

#define vmsgt_vv_i32mf2_b64_m ( ... ) __riscv_vmsgt_vv_i32mf2_b64_mu(__VA_ARGS__)

◆ vmsgt_vv_i64m1_b64

#define vmsgt_vv_i64m1_b64 ( ... ) __riscv_vmsgt_vv_i64m1_b64(__VA_ARGS__)

◆ vmsgt_vv_i64m1_b64_m

#define vmsgt_vv_i64m1_b64_m ( ... ) __riscv_vmsgt_vv_i64m1_b64_mu(__VA_ARGS__)

◆ vmsgt_vv_i64m2_b32

#define vmsgt_vv_i64m2_b32 ( ... ) __riscv_vmsgt_vv_i64m2_b32(__VA_ARGS__)

◆ vmsgt_vv_i64m2_b32_m

#define vmsgt_vv_i64m2_b32_m ( ... ) __riscv_vmsgt_vv_i64m2_b32_mu(__VA_ARGS__)

◆ vmsgt_vv_i64m4_b16

#define vmsgt_vv_i64m4_b16 ( ... ) __riscv_vmsgt_vv_i64m4_b16(__VA_ARGS__)

◆ vmsgt_vv_i64m4_b16_m

#define vmsgt_vv_i64m4_b16_m ( ... ) __riscv_vmsgt_vv_i64m4_b16_mu(__VA_ARGS__)

◆ vmsgt_vv_i64m8_b8

#define vmsgt_vv_i64m8_b8 ( ... ) __riscv_vmsgt_vv_i64m8_b8(__VA_ARGS__)

◆ vmsgt_vv_i64m8_b8_m

#define vmsgt_vv_i64m8_b8_m ( ... ) __riscv_vmsgt_vv_i64m8_b8_mu(__VA_ARGS__)

◆ vmsgt_vv_i8m1_b8

#define vmsgt_vv_i8m1_b8 ( ... ) __riscv_vmsgt_vv_i8m1_b8(__VA_ARGS__)

◆ vmsgt_vv_i8m1_b8_m

#define vmsgt_vv_i8m1_b8_m ( ... ) __riscv_vmsgt_vv_i8m1_b8_mu(__VA_ARGS__)

◆ vmsgt_vv_i8m2_b4

#define vmsgt_vv_i8m2_b4 ( ... ) __riscv_vmsgt_vv_i8m2_b4(__VA_ARGS__)

◆ vmsgt_vv_i8m2_b4_m

#define vmsgt_vv_i8m2_b4_m ( ... ) __riscv_vmsgt_vv_i8m2_b4_mu(__VA_ARGS__)

◆ vmsgt_vv_i8m4_b2

#define vmsgt_vv_i8m4_b2 ( ... ) __riscv_vmsgt_vv_i8m4_b2(__VA_ARGS__)

◆ vmsgt_vv_i8m4_b2_m

#define vmsgt_vv_i8m4_b2_m ( ... ) __riscv_vmsgt_vv_i8m4_b2_mu(__VA_ARGS__)

◆ vmsgt_vv_i8m8_b1

#define vmsgt_vv_i8m8_b1 ( ... ) __riscv_vmsgt_vv_i8m8_b1(__VA_ARGS__)

◆ vmsgt_vv_i8m8_b1_m

#define vmsgt_vv_i8m8_b1_m ( ... ) __riscv_vmsgt_vv_i8m8_b1_mu(__VA_ARGS__)

◆ vmsgt_vv_i8mf2_b16

#define vmsgt_vv_i8mf2_b16 ( ... ) __riscv_vmsgt_vv_i8mf2_b16(__VA_ARGS__)

◆ vmsgt_vv_i8mf2_b16_m

#define vmsgt_vv_i8mf2_b16_m ( ... ) __riscv_vmsgt_vv_i8mf2_b16_mu(__VA_ARGS__)

◆ vmsgt_vv_i8mf4_b32

#define vmsgt_vv_i8mf4_b32 ( ... ) __riscv_vmsgt_vv_i8mf4_b32(__VA_ARGS__)

◆ vmsgt_vv_i8mf4_b32_m

#define vmsgt_vv_i8mf4_b32_m ( ... ) __riscv_vmsgt_vv_i8mf4_b32_mu(__VA_ARGS__)

◆ vmsgt_vv_i8mf8_b64

#define vmsgt_vv_i8mf8_b64 ( ... ) __riscv_vmsgt_vv_i8mf8_b64(__VA_ARGS__)

◆ vmsgt_vv_i8mf8_b64_m

#define vmsgt_vv_i8mf8_b64_m ( ... ) __riscv_vmsgt_vv_i8mf8_b64_mu(__VA_ARGS__)

◆ vmsgt_vx_i16m1_b16

#define vmsgt_vx_i16m1_b16 ( ... ) __riscv_vmsgt_vx_i16m1_b16(__VA_ARGS__)

◆ vmsgt_vx_i16m1_b16_m

#define vmsgt_vx_i16m1_b16_m ( ... ) __riscv_vmsgt_vx_i16m1_b16_mu(__VA_ARGS__)

◆ vmsgt_vx_i16m2_b8

#define vmsgt_vx_i16m2_b8 ( ... ) __riscv_vmsgt_vx_i16m2_b8(__VA_ARGS__)

◆ vmsgt_vx_i16m2_b8_m

#define vmsgt_vx_i16m2_b8_m ( ... ) __riscv_vmsgt_vx_i16m2_b8_mu(__VA_ARGS__)

◆ vmsgt_vx_i16m4_b4

#define vmsgt_vx_i16m4_b4 ( ... ) __riscv_vmsgt_vx_i16m4_b4(__VA_ARGS__)

◆ vmsgt_vx_i16m4_b4_m

#define vmsgt_vx_i16m4_b4_m ( ... ) __riscv_vmsgt_vx_i16m4_b4_mu(__VA_ARGS__)

◆ vmsgt_vx_i16m8_b2

#define vmsgt_vx_i16m8_b2 ( ... ) __riscv_vmsgt_vx_i16m8_b2(__VA_ARGS__)

◆ vmsgt_vx_i16m8_b2_m

#define vmsgt_vx_i16m8_b2_m ( ... ) __riscv_vmsgt_vx_i16m8_b2_mu(__VA_ARGS__)

◆ vmsgt_vx_i16mf2_b32

#define vmsgt_vx_i16mf2_b32 ( ... ) __riscv_vmsgt_vx_i16mf2_b32(__VA_ARGS__)

◆ vmsgt_vx_i16mf2_b32_m

#define vmsgt_vx_i16mf2_b32_m ( ... ) __riscv_vmsgt_vx_i16mf2_b32_mu(__VA_ARGS__)

◆ vmsgt_vx_i16mf4_b64

#define vmsgt_vx_i16mf4_b64 ( ... ) __riscv_vmsgt_vx_i16mf4_b64(__VA_ARGS__)

◆ vmsgt_vx_i16mf4_b64_m

#define vmsgt_vx_i16mf4_b64_m ( ... ) __riscv_vmsgt_vx_i16mf4_b64_mu(__VA_ARGS__)

◆ vmsgt_vx_i32m1_b32

#define vmsgt_vx_i32m1_b32 ( ... ) __riscv_vmsgt_vx_i32m1_b32(__VA_ARGS__)

◆ vmsgt_vx_i32m1_b32_m

#define vmsgt_vx_i32m1_b32_m ( ... ) __riscv_vmsgt_vx_i32m1_b32_mu(__VA_ARGS__)

◆ vmsgt_vx_i32m2_b16

#define vmsgt_vx_i32m2_b16 ( ... ) __riscv_vmsgt_vx_i32m2_b16(__VA_ARGS__)

◆ vmsgt_vx_i32m2_b16_m

#define vmsgt_vx_i32m2_b16_m ( ... ) __riscv_vmsgt_vx_i32m2_b16_mu(__VA_ARGS__)

◆ vmsgt_vx_i32m4_b8

#define vmsgt_vx_i32m4_b8 ( ... ) __riscv_vmsgt_vx_i32m4_b8(__VA_ARGS__)

◆ vmsgt_vx_i32m4_b8_m

#define vmsgt_vx_i32m4_b8_m ( ... ) __riscv_vmsgt_vx_i32m4_b8_mu(__VA_ARGS__)

◆ vmsgt_vx_i32m8_b4

#define vmsgt_vx_i32m8_b4 ( ... ) __riscv_vmsgt_vx_i32m8_b4(__VA_ARGS__)

◆ vmsgt_vx_i32m8_b4_m

#define vmsgt_vx_i32m8_b4_m ( ... ) __riscv_vmsgt_vx_i32m8_b4_mu(__VA_ARGS__)

◆ vmsgt_vx_i32mf2_b64

#define vmsgt_vx_i32mf2_b64 ( ... ) __riscv_vmsgt_vx_i32mf2_b64(__VA_ARGS__)

◆ vmsgt_vx_i32mf2_b64_m

#define vmsgt_vx_i32mf2_b64_m ( ... ) __riscv_vmsgt_vx_i32mf2_b64_mu(__VA_ARGS__)

◆ vmsgt_vx_i64m1_b64

#define vmsgt_vx_i64m1_b64 ( ... ) __riscv_vmsgt_vx_i64m1_b64(__VA_ARGS__)

◆ vmsgt_vx_i64m1_b64_m

#define vmsgt_vx_i64m1_b64_m ( ... ) __riscv_vmsgt_vx_i64m1_b64_mu(__VA_ARGS__)

◆ vmsgt_vx_i64m2_b32

#define vmsgt_vx_i64m2_b32 ( ... ) __riscv_vmsgt_vx_i64m2_b32(__VA_ARGS__)

◆ vmsgt_vx_i64m2_b32_m

#define vmsgt_vx_i64m2_b32_m ( ... ) __riscv_vmsgt_vx_i64m2_b32_mu(__VA_ARGS__)

◆ vmsgt_vx_i64m4_b16

#define vmsgt_vx_i64m4_b16 ( ... ) __riscv_vmsgt_vx_i64m4_b16(__VA_ARGS__)

◆ vmsgt_vx_i64m4_b16_m

#define vmsgt_vx_i64m4_b16_m ( ... ) __riscv_vmsgt_vx_i64m4_b16_mu(__VA_ARGS__)

◆ vmsgt_vx_i64m8_b8

#define vmsgt_vx_i64m8_b8 ( ... ) __riscv_vmsgt_vx_i64m8_b8(__VA_ARGS__)

◆ vmsgt_vx_i64m8_b8_m

#define vmsgt_vx_i64m8_b8_m ( ... ) __riscv_vmsgt_vx_i64m8_b8_mu(__VA_ARGS__)

◆ vmsgt_vx_i8m1_b8

#define vmsgt_vx_i8m1_b8 ( ... ) __riscv_vmsgt_vx_i8m1_b8(__VA_ARGS__)

◆ vmsgt_vx_i8m1_b8_m

#define vmsgt_vx_i8m1_b8_m ( ... ) __riscv_vmsgt_vx_i8m1_b8_mu(__VA_ARGS__)

◆ vmsgt_vx_i8m2_b4

#define vmsgt_vx_i8m2_b4 ( ... ) __riscv_vmsgt_vx_i8m2_b4(__VA_ARGS__)

◆ vmsgt_vx_i8m2_b4_m

#define vmsgt_vx_i8m2_b4_m ( ... ) __riscv_vmsgt_vx_i8m2_b4_mu(__VA_ARGS__)

◆ vmsgt_vx_i8m4_b2

#define vmsgt_vx_i8m4_b2 ( ... ) __riscv_vmsgt_vx_i8m4_b2(__VA_ARGS__)

◆ vmsgt_vx_i8m4_b2_m

#define vmsgt_vx_i8m4_b2_m ( ... ) __riscv_vmsgt_vx_i8m4_b2_mu(__VA_ARGS__)

◆ vmsgt_vx_i8m8_b1

#define vmsgt_vx_i8m8_b1 ( ... ) __riscv_vmsgt_vx_i8m8_b1(__VA_ARGS__)

◆ vmsgt_vx_i8m8_b1_m

#define vmsgt_vx_i8m8_b1_m ( ... ) __riscv_vmsgt_vx_i8m8_b1_mu(__VA_ARGS__)

◆ vmsgt_vx_i8mf2_b16

#define vmsgt_vx_i8mf2_b16 ( ... ) __riscv_vmsgt_vx_i8mf2_b16(__VA_ARGS__)

◆ vmsgt_vx_i8mf2_b16_m

#define vmsgt_vx_i8mf2_b16_m ( ... ) __riscv_vmsgt_vx_i8mf2_b16_mu(__VA_ARGS__)

◆ vmsgt_vx_i8mf4_b32

#define vmsgt_vx_i8mf4_b32 ( ... ) __riscv_vmsgt_vx_i8mf4_b32(__VA_ARGS__)

◆ vmsgt_vx_i8mf4_b32_m

#define vmsgt_vx_i8mf4_b32_m ( ... ) __riscv_vmsgt_vx_i8mf4_b32_mu(__VA_ARGS__)

◆ vmsgt_vx_i8mf8_b64

#define vmsgt_vx_i8mf8_b64 ( ... ) __riscv_vmsgt_vx_i8mf8_b64(__VA_ARGS__)

◆ vmsgt_vx_i8mf8_b64_m

#define vmsgt_vx_i8mf8_b64_m ( ... ) __riscv_vmsgt_vx_i8mf8_b64_mu(__VA_ARGS__)

◆ vmsgtu_vv_u16m1_b16

#define vmsgtu_vv_u16m1_b16 ( ... ) __riscv_vmsgtu_vv_u16m1_b16(__VA_ARGS__)

◆ vmsgtu_vv_u16m1_b16_m

#define vmsgtu_vv_u16m1_b16_m ( ... ) __riscv_vmsgtu_vv_u16m1_b16_mu(__VA_ARGS__)

◆ vmsgtu_vv_u16m2_b8

#define vmsgtu_vv_u16m2_b8 ( ... ) __riscv_vmsgtu_vv_u16m2_b8(__VA_ARGS__)

◆ vmsgtu_vv_u16m2_b8_m

#define vmsgtu_vv_u16m2_b8_m ( ... ) __riscv_vmsgtu_vv_u16m2_b8_mu(__VA_ARGS__)

◆ vmsgtu_vv_u16m4_b4

#define vmsgtu_vv_u16m4_b4 ( ... ) __riscv_vmsgtu_vv_u16m4_b4(__VA_ARGS__)

◆ vmsgtu_vv_u16m4_b4_m

#define vmsgtu_vv_u16m4_b4_m ( ... ) __riscv_vmsgtu_vv_u16m4_b4_mu(__VA_ARGS__)

◆ vmsgtu_vv_u16m8_b2

#define vmsgtu_vv_u16m8_b2 ( ... ) __riscv_vmsgtu_vv_u16m8_b2(__VA_ARGS__)

◆ vmsgtu_vv_u16m8_b2_m

#define vmsgtu_vv_u16m8_b2_m ( ... ) __riscv_vmsgtu_vv_u16m8_b2_mu(__VA_ARGS__)

◆ vmsgtu_vv_u16mf2_b32

#define vmsgtu_vv_u16mf2_b32 ( ... ) __riscv_vmsgtu_vv_u16mf2_b32(__VA_ARGS__)

◆ vmsgtu_vv_u16mf2_b32_m

#define vmsgtu_vv_u16mf2_b32_m ( ... ) __riscv_vmsgtu_vv_u16mf2_b32_mu(__VA_ARGS__)

◆ vmsgtu_vv_u16mf4_b64

#define vmsgtu_vv_u16mf4_b64 ( ... ) __riscv_vmsgtu_vv_u16mf4_b64(__VA_ARGS__)

◆ vmsgtu_vv_u16mf4_b64_m

#define vmsgtu_vv_u16mf4_b64_m ( ... ) __riscv_vmsgtu_vv_u16mf4_b64_mu(__VA_ARGS__)

◆ vmsgtu_vv_u32m1_b32

#define vmsgtu_vv_u32m1_b32 ( ... ) __riscv_vmsgtu_vv_u32m1_b32(__VA_ARGS__)

◆ vmsgtu_vv_u32m1_b32_m

#define vmsgtu_vv_u32m1_b32_m ( ... ) __riscv_vmsgtu_vv_u32m1_b32_mu(__VA_ARGS__)

◆ vmsgtu_vv_u32m2_b16

#define vmsgtu_vv_u32m2_b16 ( ... ) __riscv_vmsgtu_vv_u32m2_b16(__VA_ARGS__)

◆ vmsgtu_vv_u32m2_b16_m

#define vmsgtu_vv_u32m2_b16_m ( ... ) __riscv_vmsgtu_vv_u32m2_b16_mu(__VA_ARGS__)

◆ vmsgtu_vv_u32m4_b8

#define vmsgtu_vv_u32m4_b8 ( ... ) __riscv_vmsgtu_vv_u32m4_b8(__VA_ARGS__)

◆ vmsgtu_vv_u32m4_b8_m

#define vmsgtu_vv_u32m4_b8_m ( ... ) __riscv_vmsgtu_vv_u32m4_b8_mu(__VA_ARGS__)

◆ vmsgtu_vv_u32m8_b4

#define vmsgtu_vv_u32m8_b4 ( ... ) __riscv_vmsgtu_vv_u32m8_b4(__VA_ARGS__)

◆ vmsgtu_vv_u32m8_b4_m

#define vmsgtu_vv_u32m8_b4_m ( ... ) __riscv_vmsgtu_vv_u32m8_b4_mu(__VA_ARGS__)

◆ vmsgtu_vv_u32mf2_b64

#define vmsgtu_vv_u32mf2_b64 ( ... ) __riscv_vmsgtu_vv_u32mf2_b64(__VA_ARGS__)

◆ vmsgtu_vv_u32mf2_b64_m

#define vmsgtu_vv_u32mf2_b64_m ( ... ) __riscv_vmsgtu_vv_u32mf2_b64_mu(__VA_ARGS__)

◆ vmsgtu_vv_u64m1_b64

#define vmsgtu_vv_u64m1_b64 ( ... ) __riscv_vmsgtu_vv_u64m1_b64(__VA_ARGS__)

◆ vmsgtu_vv_u64m1_b64_m

#define vmsgtu_vv_u64m1_b64_m ( ... ) __riscv_vmsgtu_vv_u64m1_b64_mu(__VA_ARGS__)

◆ vmsgtu_vv_u64m2_b32

#define vmsgtu_vv_u64m2_b32 ( ... ) __riscv_vmsgtu_vv_u64m2_b32(__VA_ARGS__)

◆ vmsgtu_vv_u64m2_b32_m

#define vmsgtu_vv_u64m2_b32_m ( ... ) __riscv_vmsgtu_vv_u64m2_b32_mu(__VA_ARGS__)

◆ vmsgtu_vv_u64m4_b16

#define vmsgtu_vv_u64m4_b16 ( ... ) __riscv_vmsgtu_vv_u64m4_b16(__VA_ARGS__)

◆ vmsgtu_vv_u64m4_b16_m

#define vmsgtu_vv_u64m4_b16_m ( ... ) __riscv_vmsgtu_vv_u64m4_b16_mu(__VA_ARGS__)

◆ vmsgtu_vv_u64m8_b8

#define vmsgtu_vv_u64m8_b8 ( ... ) __riscv_vmsgtu_vv_u64m8_b8(__VA_ARGS__)

◆ vmsgtu_vv_u64m8_b8_m

#define vmsgtu_vv_u64m8_b8_m ( ... ) __riscv_vmsgtu_vv_u64m8_b8_mu(__VA_ARGS__)

◆ vmsgtu_vv_u8m1_b8

#define vmsgtu_vv_u8m1_b8 ( ... ) __riscv_vmsgtu_vv_u8m1_b8(__VA_ARGS__)

◆ vmsgtu_vv_u8m1_b8_m

#define vmsgtu_vv_u8m1_b8_m ( ... ) __riscv_vmsgtu_vv_u8m1_b8_mu(__VA_ARGS__)

◆ vmsgtu_vv_u8m2_b4

#define vmsgtu_vv_u8m2_b4 ( ... ) __riscv_vmsgtu_vv_u8m2_b4(__VA_ARGS__)

◆ vmsgtu_vv_u8m2_b4_m

#define vmsgtu_vv_u8m2_b4_m ( ... ) __riscv_vmsgtu_vv_u8m2_b4_mu(__VA_ARGS__)

◆ vmsgtu_vv_u8m4_b2

#define vmsgtu_vv_u8m4_b2 ( ... ) __riscv_vmsgtu_vv_u8m4_b2(__VA_ARGS__)

◆ vmsgtu_vv_u8m4_b2_m

#define vmsgtu_vv_u8m4_b2_m ( ... ) __riscv_vmsgtu_vv_u8m4_b2_mu(__VA_ARGS__)

◆ vmsgtu_vv_u8m8_b1

#define vmsgtu_vv_u8m8_b1 ( ... ) __riscv_vmsgtu_vv_u8m8_b1(__VA_ARGS__)

◆ vmsgtu_vv_u8m8_b1_m

#define vmsgtu_vv_u8m8_b1_m ( ... ) __riscv_vmsgtu_vv_u8m8_b1_mu(__VA_ARGS__)

◆ vmsgtu_vv_u8mf2_b16

#define vmsgtu_vv_u8mf2_b16 ( ... ) __riscv_vmsgtu_vv_u8mf2_b16(__VA_ARGS__)

◆ vmsgtu_vv_u8mf2_b16_m

#define vmsgtu_vv_u8mf2_b16_m ( ... ) __riscv_vmsgtu_vv_u8mf2_b16_mu(__VA_ARGS__)

◆ vmsgtu_vv_u8mf4_b32

#define vmsgtu_vv_u8mf4_b32 ( ... ) __riscv_vmsgtu_vv_u8mf4_b32(__VA_ARGS__)

◆ vmsgtu_vv_u8mf4_b32_m

#define vmsgtu_vv_u8mf4_b32_m ( ... ) __riscv_vmsgtu_vv_u8mf4_b32_mu(__VA_ARGS__)

◆ vmsgtu_vv_u8mf8_b64

#define vmsgtu_vv_u8mf8_b64 ( ... ) __riscv_vmsgtu_vv_u8mf8_b64(__VA_ARGS__)

◆ vmsgtu_vv_u8mf8_b64_m

#define vmsgtu_vv_u8mf8_b64_m ( ... ) __riscv_vmsgtu_vv_u8mf8_b64_mu(__VA_ARGS__)

◆ vmsgtu_vx_u16m1_b16

#define vmsgtu_vx_u16m1_b16 ( ... ) __riscv_vmsgtu_vx_u16m1_b16(__VA_ARGS__)

◆ vmsgtu_vx_u16m1_b16_m

#define vmsgtu_vx_u16m1_b16_m ( ... ) __riscv_vmsgtu_vx_u16m1_b16_mu(__VA_ARGS__)

◆ vmsgtu_vx_u16m2_b8

#define vmsgtu_vx_u16m2_b8 ( ... ) __riscv_vmsgtu_vx_u16m2_b8(__VA_ARGS__)

◆ vmsgtu_vx_u16m2_b8_m

#define vmsgtu_vx_u16m2_b8_m ( ... ) __riscv_vmsgtu_vx_u16m2_b8_mu(__VA_ARGS__)

◆ vmsgtu_vx_u16m4_b4

#define vmsgtu_vx_u16m4_b4 ( ... ) __riscv_vmsgtu_vx_u16m4_b4(__VA_ARGS__)

◆ vmsgtu_vx_u16m4_b4_m

#define vmsgtu_vx_u16m4_b4_m ( ... ) __riscv_vmsgtu_vx_u16m4_b4_mu(__VA_ARGS__)

◆ vmsgtu_vx_u16m8_b2

#define vmsgtu_vx_u16m8_b2 ( ... ) __riscv_vmsgtu_vx_u16m8_b2(__VA_ARGS__)

◆ vmsgtu_vx_u16m8_b2_m

#define vmsgtu_vx_u16m8_b2_m ( ... ) __riscv_vmsgtu_vx_u16m8_b2_mu(__VA_ARGS__)

◆ vmsgtu_vx_u16mf2_b32

#define vmsgtu_vx_u16mf2_b32 ( ... ) __riscv_vmsgtu_vx_u16mf2_b32(__VA_ARGS__)

◆ vmsgtu_vx_u16mf2_b32_m

#define vmsgtu_vx_u16mf2_b32_m ( ... ) __riscv_vmsgtu_vx_u16mf2_b32_mu(__VA_ARGS__)

◆ vmsgtu_vx_u16mf4_b64

#define vmsgtu_vx_u16mf4_b64 ( ... ) __riscv_vmsgtu_vx_u16mf4_b64(__VA_ARGS__)

◆ vmsgtu_vx_u16mf4_b64_m

#define vmsgtu_vx_u16mf4_b64_m ( ... ) __riscv_vmsgtu_vx_u16mf4_b64_mu(__VA_ARGS__)

◆ vmsgtu_vx_u32m1_b32

#define vmsgtu_vx_u32m1_b32 ( ... ) __riscv_vmsgtu_vx_u32m1_b32(__VA_ARGS__)

◆ vmsgtu_vx_u32m1_b32_m

#define vmsgtu_vx_u32m1_b32_m ( ... ) __riscv_vmsgtu_vx_u32m1_b32_mu(__VA_ARGS__)

◆ vmsgtu_vx_u32m2_b16

#define vmsgtu_vx_u32m2_b16 ( ... ) __riscv_vmsgtu_vx_u32m2_b16(__VA_ARGS__)

◆ vmsgtu_vx_u32m2_b16_m

#define vmsgtu_vx_u32m2_b16_m ( ... ) __riscv_vmsgtu_vx_u32m2_b16_mu(__VA_ARGS__)

◆ vmsgtu_vx_u32m4_b8

#define vmsgtu_vx_u32m4_b8 ( ... ) __riscv_vmsgtu_vx_u32m4_b8(__VA_ARGS__)

◆ vmsgtu_vx_u32m4_b8_m

#define vmsgtu_vx_u32m4_b8_m ( ... ) __riscv_vmsgtu_vx_u32m4_b8_mu(__VA_ARGS__)

◆ vmsgtu_vx_u32m8_b4

#define vmsgtu_vx_u32m8_b4 ( ... ) __riscv_vmsgtu_vx_u32m8_b4(__VA_ARGS__)

◆ vmsgtu_vx_u32m8_b4_m

#define vmsgtu_vx_u32m8_b4_m ( ... ) __riscv_vmsgtu_vx_u32m8_b4_mu(__VA_ARGS__)

◆ vmsgtu_vx_u32mf2_b64

#define vmsgtu_vx_u32mf2_b64 ( ... ) __riscv_vmsgtu_vx_u32mf2_b64(__VA_ARGS__)

◆ vmsgtu_vx_u32mf2_b64_m

#define vmsgtu_vx_u32mf2_b64_m ( ... ) __riscv_vmsgtu_vx_u32mf2_b64_mu(__VA_ARGS__)

◆ vmsgtu_vx_u64m1_b64

#define vmsgtu_vx_u64m1_b64 ( ... ) __riscv_vmsgtu_vx_u64m1_b64(__VA_ARGS__)

◆ vmsgtu_vx_u64m1_b64_m

#define vmsgtu_vx_u64m1_b64_m ( ... ) __riscv_vmsgtu_vx_u64m1_b64_mu(__VA_ARGS__)

◆ vmsgtu_vx_u64m2_b32

#define vmsgtu_vx_u64m2_b32 ( ... ) __riscv_vmsgtu_vx_u64m2_b32(__VA_ARGS__)

◆ vmsgtu_vx_u64m2_b32_m

#define vmsgtu_vx_u64m2_b32_m ( ... ) __riscv_vmsgtu_vx_u64m2_b32_mu(__VA_ARGS__)

◆ vmsgtu_vx_u64m4_b16

#define vmsgtu_vx_u64m4_b16 ( ... ) __riscv_vmsgtu_vx_u64m4_b16(__VA_ARGS__)

◆ vmsgtu_vx_u64m4_b16_m

#define vmsgtu_vx_u64m4_b16_m ( ... ) __riscv_vmsgtu_vx_u64m4_b16_mu(__VA_ARGS__)

◆ vmsgtu_vx_u64m8_b8

#define vmsgtu_vx_u64m8_b8 ( ... ) __riscv_vmsgtu_vx_u64m8_b8(__VA_ARGS__)

◆ vmsgtu_vx_u64m8_b8_m

#define vmsgtu_vx_u64m8_b8_m ( ... ) __riscv_vmsgtu_vx_u64m8_b8_mu(__VA_ARGS__)

◆ vmsgtu_vx_u8m1_b8

#define vmsgtu_vx_u8m1_b8 ( ... ) __riscv_vmsgtu_vx_u8m1_b8(__VA_ARGS__)

◆ vmsgtu_vx_u8m1_b8_m

#define vmsgtu_vx_u8m1_b8_m ( ... ) __riscv_vmsgtu_vx_u8m1_b8_mu(__VA_ARGS__)

◆ vmsgtu_vx_u8m2_b4

#define vmsgtu_vx_u8m2_b4 ( ... ) __riscv_vmsgtu_vx_u8m2_b4(__VA_ARGS__)

◆ vmsgtu_vx_u8m2_b4_m

#define vmsgtu_vx_u8m2_b4_m ( ... ) __riscv_vmsgtu_vx_u8m2_b4_mu(__VA_ARGS__)

◆ vmsgtu_vx_u8m4_b2

#define vmsgtu_vx_u8m4_b2 ( ... ) __riscv_vmsgtu_vx_u8m4_b2(__VA_ARGS__)

◆ vmsgtu_vx_u8m4_b2_m

#define vmsgtu_vx_u8m4_b2_m ( ... ) __riscv_vmsgtu_vx_u8m4_b2_mu(__VA_ARGS__)

◆ vmsgtu_vx_u8m8_b1

#define vmsgtu_vx_u8m8_b1 ( ... ) __riscv_vmsgtu_vx_u8m8_b1(__VA_ARGS__)

◆ vmsgtu_vx_u8m8_b1_m

#define vmsgtu_vx_u8m8_b1_m ( ... ) __riscv_vmsgtu_vx_u8m8_b1_mu(__VA_ARGS__)

◆ vmsgtu_vx_u8mf2_b16

#define vmsgtu_vx_u8mf2_b16 ( ... ) __riscv_vmsgtu_vx_u8mf2_b16(__VA_ARGS__)

◆ vmsgtu_vx_u8mf2_b16_m

#define vmsgtu_vx_u8mf2_b16_m ( ... ) __riscv_vmsgtu_vx_u8mf2_b16_mu(__VA_ARGS__)

◆ vmsgtu_vx_u8mf4_b32

#define vmsgtu_vx_u8mf4_b32 ( ... ) __riscv_vmsgtu_vx_u8mf4_b32(__VA_ARGS__)

◆ vmsgtu_vx_u8mf4_b32_m

#define vmsgtu_vx_u8mf4_b32_m ( ... ) __riscv_vmsgtu_vx_u8mf4_b32_mu(__VA_ARGS__)

◆ vmsgtu_vx_u8mf8_b64

#define vmsgtu_vx_u8mf8_b64 ( ... ) __riscv_vmsgtu_vx_u8mf8_b64(__VA_ARGS__)

◆ vmsgtu_vx_u8mf8_b64_m

#define vmsgtu_vx_u8mf8_b64_m ( ... ) __riscv_vmsgtu_vx_u8mf8_b64_mu(__VA_ARGS__)

◆ vmsif_m_b1

#define vmsif_m_b1 ( ... ) __riscv_vmsif_m_b1(__VA_ARGS__)

◆ vmsif_m_b16

#define vmsif_m_b16 ( ... ) __riscv_vmsif_m_b16(__VA_ARGS__)

◆ vmsif_m_b16_m

#define vmsif_m_b16_m ( ... ) __riscv_vmsif_m_b16_mu(__VA_ARGS__)

◆ vmsif_m_b1_m

#define vmsif_m_b1_m ( ... ) __riscv_vmsif_m_b1_mu(__VA_ARGS__)

◆ vmsif_m_b2

#define vmsif_m_b2 ( ... ) __riscv_vmsif_m_b2(__VA_ARGS__)

◆ vmsif_m_b2_m

#define vmsif_m_b2_m ( ... ) __riscv_vmsif_m_b2_mu(__VA_ARGS__)

◆ vmsif_m_b32

#define vmsif_m_b32 ( ... ) __riscv_vmsif_m_b32(__VA_ARGS__)

◆ vmsif_m_b32_m

#define vmsif_m_b32_m ( ... ) __riscv_vmsif_m_b32_mu(__VA_ARGS__)

◆ vmsif_m_b4

#define vmsif_m_b4 ( ... ) __riscv_vmsif_m_b4(__VA_ARGS__)

◆ vmsif_m_b4_m

#define vmsif_m_b4_m ( ... ) __riscv_vmsif_m_b4_mu(__VA_ARGS__)

◆ vmsif_m_b64

#define vmsif_m_b64 ( ... ) __riscv_vmsif_m_b64(__VA_ARGS__)

◆ vmsif_m_b64_m

#define vmsif_m_b64_m ( ... ) __riscv_vmsif_m_b64_mu(__VA_ARGS__)

◆ vmsif_m_b8

#define vmsif_m_b8 ( ... ) __riscv_vmsif_m_b8(__VA_ARGS__)

◆ vmsif_m_b8_m

#define vmsif_m_b8_m ( ... ) __riscv_vmsif_m_b8_mu(__VA_ARGS__)

◆ vmsle_vv_i16m1_b16

#define vmsle_vv_i16m1_b16 ( ... ) __riscv_vmsle_vv_i16m1_b16(__VA_ARGS__)

◆ vmsle_vv_i16m1_b16_m

#define vmsle_vv_i16m1_b16_m ( ... ) __riscv_vmsle_vv_i16m1_b16_mu(__VA_ARGS__)

◆ vmsle_vv_i16m2_b8

#define vmsle_vv_i16m2_b8 ( ... ) __riscv_vmsle_vv_i16m2_b8(__VA_ARGS__)

◆ vmsle_vv_i16m2_b8_m

#define vmsle_vv_i16m2_b8_m ( ... ) __riscv_vmsle_vv_i16m2_b8_mu(__VA_ARGS__)

◆ vmsle_vv_i16m4_b4

#define vmsle_vv_i16m4_b4 ( ... ) __riscv_vmsle_vv_i16m4_b4(__VA_ARGS__)

◆ vmsle_vv_i16m4_b4_m

#define vmsle_vv_i16m4_b4_m ( ... ) __riscv_vmsle_vv_i16m4_b4_mu(__VA_ARGS__)

◆ vmsle_vv_i16m8_b2

#define vmsle_vv_i16m8_b2 ( ... ) __riscv_vmsle_vv_i16m8_b2(__VA_ARGS__)

◆ vmsle_vv_i16m8_b2_m

#define vmsle_vv_i16m8_b2_m ( ... ) __riscv_vmsle_vv_i16m8_b2_mu(__VA_ARGS__)

◆ vmsle_vv_i16mf2_b32

#define vmsle_vv_i16mf2_b32 ( ... ) __riscv_vmsle_vv_i16mf2_b32(__VA_ARGS__)

◆ vmsle_vv_i16mf2_b32_m

#define vmsle_vv_i16mf2_b32_m ( ... ) __riscv_vmsle_vv_i16mf2_b32_mu(__VA_ARGS__)

◆ vmsle_vv_i16mf4_b64

#define vmsle_vv_i16mf4_b64 ( ... ) __riscv_vmsle_vv_i16mf4_b64(__VA_ARGS__)

◆ vmsle_vv_i16mf4_b64_m

#define vmsle_vv_i16mf4_b64_m ( ... ) __riscv_vmsle_vv_i16mf4_b64_mu(__VA_ARGS__)

◆ vmsle_vv_i32m1_b32

#define vmsle_vv_i32m1_b32 ( ... ) __riscv_vmsle_vv_i32m1_b32(__VA_ARGS__)

◆ vmsle_vv_i32m1_b32_m

#define vmsle_vv_i32m1_b32_m ( ... ) __riscv_vmsle_vv_i32m1_b32_mu(__VA_ARGS__)

◆ vmsle_vv_i32m2_b16

#define vmsle_vv_i32m2_b16 ( ... ) __riscv_vmsle_vv_i32m2_b16(__VA_ARGS__)

◆ vmsle_vv_i32m2_b16_m

#define vmsle_vv_i32m2_b16_m ( ... ) __riscv_vmsle_vv_i32m2_b16_mu(__VA_ARGS__)

◆ vmsle_vv_i32m4_b8

#define vmsle_vv_i32m4_b8 ( ... ) __riscv_vmsle_vv_i32m4_b8(__VA_ARGS__)

◆ vmsle_vv_i32m4_b8_m

#define vmsle_vv_i32m4_b8_m ( ... ) __riscv_vmsle_vv_i32m4_b8_mu(__VA_ARGS__)

◆ vmsle_vv_i32m8_b4

#define vmsle_vv_i32m8_b4 ( ... ) __riscv_vmsle_vv_i32m8_b4(__VA_ARGS__)

◆ vmsle_vv_i32m8_b4_m

#define vmsle_vv_i32m8_b4_m ( ... ) __riscv_vmsle_vv_i32m8_b4_mu(__VA_ARGS__)

◆ vmsle_vv_i32mf2_b64

#define vmsle_vv_i32mf2_b64 ( ... ) __riscv_vmsle_vv_i32mf2_b64(__VA_ARGS__)

◆ vmsle_vv_i32mf2_b64_m

#define vmsle_vv_i32mf2_b64_m ( ... ) __riscv_vmsle_vv_i32mf2_b64_mu(__VA_ARGS__)

◆ vmsle_vv_i64m1_b64

#define vmsle_vv_i64m1_b64 ( ... ) __riscv_vmsle_vv_i64m1_b64(__VA_ARGS__)

◆ vmsle_vv_i64m1_b64_m

#define vmsle_vv_i64m1_b64_m ( ... ) __riscv_vmsle_vv_i64m1_b64_mu(__VA_ARGS__)

◆ vmsle_vv_i64m2_b32

#define vmsle_vv_i64m2_b32 ( ... ) __riscv_vmsle_vv_i64m2_b32(__VA_ARGS__)

◆ vmsle_vv_i64m2_b32_m

#define vmsle_vv_i64m2_b32_m ( ... ) __riscv_vmsle_vv_i64m2_b32_mu(__VA_ARGS__)

◆ vmsle_vv_i64m4_b16

#define vmsle_vv_i64m4_b16 ( ... ) __riscv_vmsle_vv_i64m4_b16(__VA_ARGS__)

◆ vmsle_vv_i64m4_b16_m

#define vmsle_vv_i64m4_b16_m ( ... ) __riscv_vmsle_vv_i64m4_b16_mu(__VA_ARGS__)

◆ vmsle_vv_i64m8_b8

#define vmsle_vv_i64m8_b8 ( ... ) __riscv_vmsle_vv_i64m8_b8(__VA_ARGS__)

◆ vmsle_vv_i64m8_b8_m

#define vmsle_vv_i64m8_b8_m ( ... ) __riscv_vmsle_vv_i64m8_b8_mu(__VA_ARGS__)

◆ vmsle_vv_i8m1_b8

#define vmsle_vv_i8m1_b8 ( ... ) __riscv_vmsle_vv_i8m1_b8(__VA_ARGS__)

◆ vmsle_vv_i8m1_b8_m

#define vmsle_vv_i8m1_b8_m ( ... ) __riscv_vmsle_vv_i8m1_b8_mu(__VA_ARGS__)

◆ vmsle_vv_i8m2_b4

#define vmsle_vv_i8m2_b4 ( ... ) __riscv_vmsle_vv_i8m2_b4(__VA_ARGS__)

◆ vmsle_vv_i8m2_b4_m

#define vmsle_vv_i8m2_b4_m ( ... ) __riscv_vmsle_vv_i8m2_b4_mu(__VA_ARGS__)

◆ vmsle_vv_i8m4_b2

#define vmsle_vv_i8m4_b2 ( ... ) __riscv_vmsle_vv_i8m4_b2(__VA_ARGS__)

◆ vmsle_vv_i8m4_b2_m

#define vmsle_vv_i8m4_b2_m ( ... ) __riscv_vmsle_vv_i8m4_b2_mu(__VA_ARGS__)

◆ vmsle_vv_i8m8_b1

#define vmsle_vv_i8m8_b1 ( ... ) __riscv_vmsle_vv_i8m8_b1(__VA_ARGS__)

◆ vmsle_vv_i8m8_b1_m

#define vmsle_vv_i8m8_b1_m ( ... ) __riscv_vmsle_vv_i8m8_b1_mu(__VA_ARGS__)

◆ vmsle_vv_i8mf2_b16

#define vmsle_vv_i8mf2_b16 ( ... ) __riscv_vmsle_vv_i8mf2_b16(__VA_ARGS__)

◆ vmsle_vv_i8mf2_b16_m

#define vmsle_vv_i8mf2_b16_m ( ... ) __riscv_vmsle_vv_i8mf2_b16_mu(__VA_ARGS__)

◆ vmsle_vv_i8mf4_b32

#define vmsle_vv_i8mf4_b32 ( ... ) __riscv_vmsle_vv_i8mf4_b32(__VA_ARGS__)

◆ vmsle_vv_i8mf4_b32_m

#define vmsle_vv_i8mf4_b32_m ( ... ) __riscv_vmsle_vv_i8mf4_b32_mu(__VA_ARGS__)

◆ vmsle_vv_i8mf8_b64

#define vmsle_vv_i8mf8_b64 ( ... ) __riscv_vmsle_vv_i8mf8_b64(__VA_ARGS__)

◆ vmsle_vv_i8mf8_b64_m

#define vmsle_vv_i8mf8_b64_m ( ... ) __riscv_vmsle_vv_i8mf8_b64_mu(__VA_ARGS__)

◆ vmsle_vx_i16m1_b16

#define vmsle_vx_i16m1_b16 ( ... ) __riscv_vmsle_vx_i16m1_b16(__VA_ARGS__)

◆ vmsle_vx_i16m1_b16_m

#define vmsle_vx_i16m1_b16_m ( ... ) __riscv_vmsle_vx_i16m1_b16_mu(__VA_ARGS__)

◆ vmsle_vx_i16m2_b8

#define vmsle_vx_i16m2_b8 ( ... ) __riscv_vmsle_vx_i16m2_b8(__VA_ARGS__)

◆ vmsle_vx_i16m2_b8_m

#define vmsle_vx_i16m2_b8_m ( ... ) __riscv_vmsle_vx_i16m2_b8_mu(__VA_ARGS__)

◆ vmsle_vx_i16m4_b4

#define vmsle_vx_i16m4_b4 ( ... ) __riscv_vmsle_vx_i16m4_b4(__VA_ARGS__)

◆ vmsle_vx_i16m4_b4_m

#define vmsle_vx_i16m4_b4_m ( ... ) __riscv_vmsle_vx_i16m4_b4_mu(__VA_ARGS__)

◆ vmsle_vx_i16m8_b2

#define vmsle_vx_i16m8_b2 ( ... ) __riscv_vmsle_vx_i16m8_b2(__VA_ARGS__)

◆ vmsle_vx_i16m8_b2_m

#define vmsle_vx_i16m8_b2_m ( ... ) __riscv_vmsle_vx_i16m8_b2_mu(__VA_ARGS__)

◆ vmsle_vx_i16mf2_b32

#define vmsle_vx_i16mf2_b32 ( ... ) __riscv_vmsle_vx_i16mf2_b32(__VA_ARGS__)

◆ vmsle_vx_i16mf2_b32_m

#define vmsle_vx_i16mf2_b32_m ( ... ) __riscv_vmsle_vx_i16mf2_b32_mu(__VA_ARGS__)

◆ vmsle_vx_i16mf4_b64

#define vmsle_vx_i16mf4_b64 ( ... ) __riscv_vmsle_vx_i16mf4_b64(__VA_ARGS__)

◆ vmsle_vx_i16mf4_b64_m

#define vmsle_vx_i16mf4_b64_m ( ... ) __riscv_vmsle_vx_i16mf4_b64_mu(__VA_ARGS__)

◆ vmsle_vx_i32m1_b32

#define vmsle_vx_i32m1_b32 ( ... ) __riscv_vmsle_vx_i32m1_b32(__VA_ARGS__)

◆ vmsle_vx_i32m1_b32_m

#define vmsle_vx_i32m1_b32_m ( ... ) __riscv_vmsle_vx_i32m1_b32_mu(__VA_ARGS__)

◆ vmsle_vx_i32m2_b16

#define vmsle_vx_i32m2_b16 ( ... ) __riscv_vmsle_vx_i32m2_b16(__VA_ARGS__)

◆ vmsle_vx_i32m2_b16_m

#define vmsle_vx_i32m2_b16_m ( ... ) __riscv_vmsle_vx_i32m2_b16_mu(__VA_ARGS__)

◆ vmsle_vx_i32m4_b8

#define vmsle_vx_i32m4_b8 ( ... ) __riscv_vmsle_vx_i32m4_b8(__VA_ARGS__)

◆ vmsle_vx_i32m4_b8_m

#define vmsle_vx_i32m4_b8_m ( ... ) __riscv_vmsle_vx_i32m4_b8_mu(__VA_ARGS__)

◆ vmsle_vx_i32m8_b4

#define vmsle_vx_i32m8_b4 ( ... ) __riscv_vmsle_vx_i32m8_b4(__VA_ARGS__)

◆ vmsle_vx_i32m8_b4_m

#define vmsle_vx_i32m8_b4_m ( ... ) __riscv_vmsle_vx_i32m8_b4_mu(__VA_ARGS__)

◆ vmsle_vx_i32mf2_b64

#define vmsle_vx_i32mf2_b64 ( ... ) __riscv_vmsle_vx_i32mf2_b64(__VA_ARGS__)

◆ vmsle_vx_i32mf2_b64_m

#define vmsle_vx_i32mf2_b64_m ( ... ) __riscv_vmsle_vx_i32mf2_b64_mu(__VA_ARGS__)

◆ vmsle_vx_i64m1_b64

#define vmsle_vx_i64m1_b64 ( ... ) __riscv_vmsle_vx_i64m1_b64(__VA_ARGS__)

◆ vmsle_vx_i64m1_b64_m

#define vmsle_vx_i64m1_b64_m ( ... ) __riscv_vmsle_vx_i64m1_b64_mu(__VA_ARGS__)

◆ vmsle_vx_i64m2_b32

#define vmsle_vx_i64m2_b32 ( ... ) __riscv_vmsle_vx_i64m2_b32(__VA_ARGS__)

◆ vmsle_vx_i64m2_b32_m

#define vmsle_vx_i64m2_b32_m ( ... ) __riscv_vmsle_vx_i64m2_b32_mu(__VA_ARGS__)

◆ vmsle_vx_i64m4_b16

#define vmsle_vx_i64m4_b16 ( ... ) __riscv_vmsle_vx_i64m4_b16(__VA_ARGS__)

◆ vmsle_vx_i64m4_b16_m

#define vmsle_vx_i64m4_b16_m ( ... ) __riscv_vmsle_vx_i64m4_b16_mu(__VA_ARGS__)

◆ vmsle_vx_i64m8_b8

#define vmsle_vx_i64m8_b8 ( ... ) __riscv_vmsle_vx_i64m8_b8(__VA_ARGS__)

◆ vmsle_vx_i64m8_b8_m

#define vmsle_vx_i64m8_b8_m ( ... ) __riscv_vmsle_vx_i64m8_b8_mu(__VA_ARGS__)

◆ vmsle_vx_i8m1_b8

#define vmsle_vx_i8m1_b8 ( ... ) __riscv_vmsle_vx_i8m1_b8(__VA_ARGS__)

◆ vmsle_vx_i8m1_b8_m

#define vmsle_vx_i8m1_b8_m ( ... ) __riscv_vmsle_vx_i8m1_b8_mu(__VA_ARGS__)

◆ vmsle_vx_i8m2_b4

#define vmsle_vx_i8m2_b4 ( ... ) __riscv_vmsle_vx_i8m2_b4(__VA_ARGS__)

◆ vmsle_vx_i8m2_b4_m

#define vmsle_vx_i8m2_b4_m ( ... ) __riscv_vmsle_vx_i8m2_b4_mu(__VA_ARGS__)

◆ vmsle_vx_i8m4_b2

#define vmsle_vx_i8m4_b2 ( ... ) __riscv_vmsle_vx_i8m4_b2(__VA_ARGS__)

◆ vmsle_vx_i8m4_b2_m

#define vmsle_vx_i8m4_b2_m ( ... ) __riscv_vmsle_vx_i8m4_b2_mu(__VA_ARGS__)

◆ vmsle_vx_i8m8_b1

#define vmsle_vx_i8m8_b1 ( ... ) __riscv_vmsle_vx_i8m8_b1(__VA_ARGS__)

◆ vmsle_vx_i8m8_b1_m

#define vmsle_vx_i8m8_b1_m ( ... ) __riscv_vmsle_vx_i8m8_b1_mu(__VA_ARGS__)

◆ vmsle_vx_i8mf2_b16

#define vmsle_vx_i8mf2_b16 ( ... ) __riscv_vmsle_vx_i8mf2_b16(__VA_ARGS__)

◆ vmsle_vx_i8mf2_b16_m

#define vmsle_vx_i8mf2_b16_m ( ... ) __riscv_vmsle_vx_i8mf2_b16_mu(__VA_ARGS__)

◆ vmsle_vx_i8mf4_b32

#define vmsle_vx_i8mf4_b32 ( ... ) __riscv_vmsle_vx_i8mf4_b32(__VA_ARGS__)

◆ vmsle_vx_i8mf4_b32_m

#define vmsle_vx_i8mf4_b32_m ( ... ) __riscv_vmsle_vx_i8mf4_b32_mu(__VA_ARGS__)

◆ vmsle_vx_i8mf8_b64

#define vmsle_vx_i8mf8_b64 ( ... ) __riscv_vmsle_vx_i8mf8_b64(__VA_ARGS__)

◆ vmsle_vx_i8mf8_b64_m

#define vmsle_vx_i8mf8_b64_m ( ... ) __riscv_vmsle_vx_i8mf8_b64_mu(__VA_ARGS__)

◆ vmsleu_vv_u16m1_b16

#define vmsleu_vv_u16m1_b16 ( ... ) __riscv_vmsleu_vv_u16m1_b16(__VA_ARGS__)

◆ vmsleu_vv_u16m1_b16_m

#define vmsleu_vv_u16m1_b16_m ( ... ) __riscv_vmsleu_vv_u16m1_b16_mu(__VA_ARGS__)

◆ vmsleu_vv_u16m2_b8

#define vmsleu_vv_u16m2_b8 ( ... ) __riscv_vmsleu_vv_u16m2_b8(__VA_ARGS__)

◆ vmsleu_vv_u16m2_b8_m

#define vmsleu_vv_u16m2_b8_m ( ... ) __riscv_vmsleu_vv_u16m2_b8_mu(__VA_ARGS__)

◆ vmsleu_vv_u16m4_b4

#define vmsleu_vv_u16m4_b4 ( ... ) __riscv_vmsleu_vv_u16m4_b4(__VA_ARGS__)

◆ vmsleu_vv_u16m4_b4_m

#define vmsleu_vv_u16m4_b4_m ( ... ) __riscv_vmsleu_vv_u16m4_b4_mu(__VA_ARGS__)

◆ vmsleu_vv_u16m8_b2

#define vmsleu_vv_u16m8_b2 ( ... ) __riscv_vmsleu_vv_u16m8_b2(__VA_ARGS__)

◆ vmsleu_vv_u16m8_b2_m

#define vmsleu_vv_u16m8_b2_m ( ... ) __riscv_vmsleu_vv_u16m8_b2_mu(__VA_ARGS__)

◆ vmsleu_vv_u16mf2_b32

#define vmsleu_vv_u16mf2_b32 ( ... ) __riscv_vmsleu_vv_u16mf2_b32(__VA_ARGS__)

◆ vmsleu_vv_u16mf2_b32_m

#define vmsleu_vv_u16mf2_b32_m ( ... ) __riscv_vmsleu_vv_u16mf2_b32_mu(__VA_ARGS__)

◆ vmsleu_vv_u16mf4_b64

#define vmsleu_vv_u16mf4_b64 ( ... ) __riscv_vmsleu_vv_u16mf4_b64(__VA_ARGS__)

◆ vmsleu_vv_u16mf4_b64_m

#define vmsleu_vv_u16mf4_b64_m ( ... ) __riscv_vmsleu_vv_u16mf4_b64_mu(__VA_ARGS__)

◆ vmsleu_vv_u32m1_b32

#define vmsleu_vv_u32m1_b32 ( ... ) __riscv_vmsleu_vv_u32m1_b32(__VA_ARGS__)

◆ vmsleu_vv_u32m1_b32_m

#define vmsleu_vv_u32m1_b32_m ( ... ) __riscv_vmsleu_vv_u32m1_b32_mu(__VA_ARGS__)

◆ vmsleu_vv_u32m2_b16

#define vmsleu_vv_u32m2_b16 ( ... ) __riscv_vmsleu_vv_u32m2_b16(__VA_ARGS__)

◆ vmsleu_vv_u32m2_b16_m

#define vmsleu_vv_u32m2_b16_m ( ... ) __riscv_vmsleu_vv_u32m2_b16_mu(__VA_ARGS__)

◆ vmsleu_vv_u32m4_b8

#define vmsleu_vv_u32m4_b8 ( ... ) __riscv_vmsleu_vv_u32m4_b8(__VA_ARGS__)

◆ vmsleu_vv_u32m4_b8_m

#define vmsleu_vv_u32m4_b8_m ( ... ) __riscv_vmsleu_vv_u32m4_b8_mu(__VA_ARGS__)

◆ vmsleu_vv_u32m8_b4

#define vmsleu_vv_u32m8_b4 ( ... ) __riscv_vmsleu_vv_u32m8_b4(__VA_ARGS__)

◆ vmsleu_vv_u32m8_b4_m

#define vmsleu_vv_u32m8_b4_m ( ... ) __riscv_vmsleu_vv_u32m8_b4_mu(__VA_ARGS__)

◆ vmsleu_vv_u32mf2_b64

#define vmsleu_vv_u32mf2_b64 ( ... ) __riscv_vmsleu_vv_u32mf2_b64(__VA_ARGS__)

◆ vmsleu_vv_u32mf2_b64_m

#define vmsleu_vv_u32mf2_b64_m ( ... ) __riscv_vmsleu_vv_u32mf2_b64_mu(__VA_ARGS__)

◆ vmsleu_vv_u64m1_b64

#define vmsleu_vv_u64m1_b64 ( ... ) __riscv_vmsleu_vv_u64m1_b64(__VA_ARGS__)

◆ vmsleu_vv_u64m1_b64_m

#define vmsleu_vv_u64m1_b64_m ( ... ) __riscv_vmsleu_vv_u64m1_b64_mu(__VA_ARGS__)

◆ vmsleu_vv_u64m2_b32

#define vmsleu_vv_u64m2_b32 ( ... ) __riscv_vmsleu_vv_u64m2_b32(__VA_ARGS__)

◆ vmsleu_vv_u64m2_b32_m

#define vmsleu_vv_u64m2_b32_m ( ... ) __riscv_vmsleu_vv_u64m2_b32_mu(__VA_ARGS__)

◆ vmsleu_vv_u64m4_b16

#define vmsleu_vv_u64m4_b16 ( ... ) __riscv_vmsleu_vv_u64m4_b16(__VA_ARGS__)

◆ vmsleu_vv_u64m4_b16_m

#define vmsleu_vv_u64m4_b16_m ( ... ) __riscv_vmsleu_vv_u64m4_b16_mu(__VA_ARGS__)

◆ vmsleu_vv_u64m8_b8

#define vmsleu_vv_u64m8_b8 ( ... ) __riscv_vmsleu_vv_u64m8_b8(__VA_ARGS__)

◆ vmsleu_vv_u64m8_b8_m

#define vmsleu_vv_u64m8_b8_m ( ... ) __riscv_vmsleu_vv_u64m8_b8_mu(__VA_ARGS__)

◆ vmsleu_vv_u8m1_b8

#define vmsleu_vv_u8m1_b8 ( ... ) __riscv_vmsleu_vv_u8m1_b8(__VA_ARGS__)

◆ vmsleu_vv_u8m1_b8_m

#define vmsleu_vv_u8m1_b8_m ( ... ) __riscv_vmsleu_vv_u8m1_b8_mu(__VA_ARGS__)

◆ vmsleu_vv_u8m2_b4

#define vmsleu_vv_u8m2_b4 ( ... ) __riscv_vmsleu_vv_u8m2_b4(__VA_ARGS__)

◆ vmsleu_vv_u8m2_b4_m

#define vmsleu_vv_u8m2_b4_m ( ... ) __riscv_vmsleu_vv_u8m2_b4_mu(__VA_ARGS__)

◆ vmsleu_vv_u8m4_b2

#define vmsleu_vv_u8m4_b2 ( ... ) __riscv_vmsleu_vv_u8m4_b2(__VA_ARGS__)

◆ vmsleu_vv_u8m4_b2_m

#define vmsleu_vv_u8m4_b2_m ( ... ) __riscv_vmsleu_vv_u8m4_b2_mu(__VA_ARGS__)

◆ vmsleu_vv_u8m8_b1

#define vmsleu_vv_u8m8_b1 ( ... ) __riscv_vmsleu_vv_u8m8_b1(__VA_ARGS__)

◆ vmsleu_vv_u8m8_b1_m

#define vmsleu_vv_u8m8_b1_m ( ... ) __riscv_vmsleu_vv_u8m8_b1_mu(__VA_ARGS__)

◆ vmsleu_vv_u8mf2_b16

#define vmsleu_vv_u8mf2_b16 ( ... ) __riscv_vmsleu_vv_u8mf2_b16(__VA_ARGS__)

◆ vmsleu_vv_u8mf2_b16_m

#define vmsleu_vv_u8mf2_b16_m ( ... ) __riscv_vmsleu_vv_u8mf2_b16_mu(__VA_ARGS__)

◆ vmsleu_vv_u8mf4_b32

#define vmsleu_vv_u8mf4_b32 ( ... ) __riscv_vmsleu_vv_u8mf4_b32(__VA_ARGS__)

◆ vmsleu_vv_u8mf4_b32_m

#define vmsleu_vv_u8mf4_b32_m ( ... ) __riscv_vmsleu_vv_u8mf4_b32_mu(__VA_ARGS__)

◆ vmsleu_vv_u8mf8_b64

#define vmsleu_vv_u8mf8_b64 ( ... ) __riscv_vmsleu_vv_u8mf8_b64(__VA_ARGS__)

◆ vmsleu_vv_u8mf8_b64_m

#define vmsleu_vv_u8mf8_b64_m ( ... ) __riscv_vmsleu_vv_u8mf8_b64_mu(__VA_ARGS__)

◆ vmsleu_vx_u16m1_b16

#define vmsleu_vx_u16m1_b16 ( ... ) __riscv_vmsleu_vx_u16m1_b16(__VA_ARGS__)

◆ vmsleu_vx_u16m1_b16_m

#define vmsleu_vx_u16m1_b16_m ( ... ) __riscv_vmsleu_vx_u16m1_b16_mu(__VA_ARGS__)

◆ vmsleu_vx_u16m2_b8

#define vmsleu_vx_u16m2_b8 ( ... ) __riscv_vmsleu_vx_u16m2_b8(__VA_ARGS__)

◆ vmsleu_vx_u16m2_b8_m

#define vmsleu_vx_u16m2_b8_m ( ... ) __riscv_vmsleu_vx_u16m2_b8_mu(__VA_ARGS__)

◆ vmsleu_vx_u16m4_b4

#define vmsleu_vx_u16m4_b4 ( ... ) __riscv_vmsleu_vx_u16m4_b4(__VA_ARGS__)

◆ vmsleu_vx_u16m4_b4_m

#define vmsleu_vx_u16m4_b4_m ( ... ) __riscv_vmsleu_vx_u16m4_b4_mu(__VA_ARGS__)

◆ vmsleu_vx_u16m8_b2

#define vmsleu_vx_u16m8_b2 ( ... ) __riscv_vmsleu_vx_u16m8_b2(__VA_ARGS__)

◆ vmsleu_vx_u16m8_b2_m

#define vmsleu_vx_u16m8_b2_m ( ... ) __riscv_vmsleu_vx_u16m8_b2_mu(__VA_ARGS__)

◆ vmsleu_vx_u16mf2_b32

#define vmsleu_vx_u16mf2_b32 ( ... ) __riscv_vmsleu_vx_u16mf2_b32(__VA_ARGS__)

◆ vmsleu_vx_u16mf2_b32_m

#define vmsleu_vx_u16mf2_b32_m ( ... ) __riscv_vmsleu_vx_u16mf2_b32_mu(__VA_ARGS__)

◆ vmsleu_vx_u16mf4_b64

#define vmsleu_vx_u16mf4_b64 ( ... ) __riscv_vmsleu_vx_u16mf4_b64(__VA_ARGS__)

◆ vmsleu_vx_u16mf4_b64_m

#define vmsleu_vx_u16mf4_b64_m ( ... ) __riscv_vmsleu_vx_u16mf4_b64_mu(__VA_ARGS__)

◆ vmsleu_vx_u32m1_b32

#define vmsleu_vx_u32m1_b32 ( ... ) __riscv_vmsleu_vx_u32m1_b32(__VA_ARGS__)

◆ vmsleu_vx_u32m1_b32_m

#define vmsleu_vx_u32m1_b32_m ( ... ) __riscv_vmsleu_vx_u32m1_b32_mu(__VA_ARGS__)

◆ vmsleu_vx_u32m2_b16

#define vmsleu_vx_u32m2_b16 ( ... ) __riscv_vmsleu_vx_u32m2_b16(__VA_ARGS__)

◆ vmsleu_vx_u32m2_b16_m

#define vmsleu_vx_u32m2_b16_m ( ... ) __riscv_vmsleu_vx_u32m2_b16_mu(__VA_ARGS__)

◆ vmsleu_vx_u32m4_b8

#define vmsleu_vx_u32m4_b8 ( ... ) __riscv_vmsleu_vx_u32m4_b8(__VA_ARGS__)

◆ vmsleu_vx_u32m4_b8_m

#define vmsleu_vx_u32m4_b8_m ( ... ) __riscv_vmsleu_vx_u32m4_b8_mu(__VA_ARGS__)

◆ vmsleu_vx_u32m8_b4

#define vmsleu_vx_u32m8_b4 ( ... ) __riscv_vmsleu_vx_u32m8_b4(__VA_ARGS__)

◆ vmsleu_vx_u32m8_b4_m

#define vmsleu_vx_u32m8_b4_m ( ... ) __riscv_vmsleu_vx_u32m8_b4_mu(__VA_ARGS__)

◆ vmsleu_vx_u32mf2_b64

#define vmsleu_vx_u32mf2_b64 ( ... ) __riscv_vmsleu_vx_u32mf2_b64(__VA_ARGS__)

◆ vmsleu_vx_u32mf2_b64_m

#define vmsleu_vx_u32mf2_b64_m ( ... ) __riscv_vmsleu_vx_u32mf2_b64_mu(__VA_ARGS__)

◆ vmsleu_vx_u64m1_b64

#define vmsleu_vx_u64m1_b64 ( ... ) __riscv_vmsleu_vx_u64m1_b64(__VA_ARGS__)

◆ vmsleu_vx_u64m1_b64_m

#define vmsleu_vx_u64m1_b64_m ( ... ) __riscv_vmsleu_vx_u64m1_b64_mu(__VA_ARGS__)

◆ vmsleu_vx_u64m2_b32

#define vmsleu_vx_u64m2_b32 ( ... ) __riscv_vmsleu_vx_u64m2_b32(__VA_ARGS__)

◆ vmsleu_vx_u64m2_b32_m

#define vmsleu_vx_u64m2_b32_m ( ... ) __riscv_vmsleu_vx_u64m2_b32_mu(__VA_ARGS__)

◆ vmsleu_vx_u64m4_b16

#define vmsleu_vx_u64m4_b16 ( ... ) __riscv_vmsleu_vx_u64m4_b16(__VA_ARGS__)

◆ vmsleu_vx_u64m4_b16_m

#define vmsleu_vx_u64m4_b16_m ( ... ) __riscv_vmsleu_vx_u64m4_b16_mu(__VA_ARGS__)

◆ vmsleu_vx_u64m8_b8

#define vmsleu_vx_u64m8_b8 ( ... ) __riscv_vmsleu_vx_u64m8_b8(__VA_ARGS__)

◆ vmsleu_vx_u64m8_b8_m

#define vmsleu_vx_u64m8_b8_m ( ... ) __riscv_vmsleu_vx_u64m8_b8_mu(__VA_ARGS__)

◆ vmsleu_vx_u8m1_b8

#define vmsleu_vx_u8m1_b8 ( ... ) __riscv_vmsleu_vx_u8m1_b8(__VA_ARGS__)

◆ vmsleu_vx_u8m1_b8_m

#define vmsleu_vx_u8m1_b8_m ( ... ) __riscv_vmsleu_vx_u8m1_b8_mu(__VA_ARGS__)

◆ vmsleu_vx_u8m2_b4

#define vmsleu_vx_u8m2_b4 ( ... ) __riscv_vmsleu_vx_u8m2_b4(__VA_ARGS__)

◆ vmsleu_vx_u8m2_b4_m

#define vmsleu_vx_u8m2_b4_m ( ... ) __riscv_vmsleu_vx_u8m2_b4_mu(__VA_ARGS__)

◆ vmsleu_vx_u8m4_b2

#define vmsleu_vx_u8m4_b2 ( ... ) __riscv_vmsleu_vx_u8m4_b2(__VA_ARGS__)

◆ vmsleu_vx_u8m4_b2_m

#define vmsleu_vx_u8m4_b2_m ( ... ) __riscv_vmsleu_vx_u8m4_b2_mu(__VA_ARGS__)

◆ vmsleu_vx_u8m8_b1

#define vmsleu_vx_u8m8_b1 ( ... ) __riscv_vmsleu_vx_u8m8_b1(__VA_ARGS__)

◆ vmsleu_vx_u8m8_b1_m

#define vmsleu_vx_u8m8_b1_m ( ... ) __riscv_vmsleu_vx_u8m8_b1_mu(__VA_ARGS__)

◆ vmsleu_vx_u8mf2_b16

#define vmsleu_vx_u8mf2_b16 ( ... ) __riscv_vmsleu_vx_u8mf2_b16(__VA_ARGS__)

◆ vmsleu_vx_u8mf2_b16_m

#define vmsleu_vx_u8mf2_b16_m ( ... ) __riscv_vmsleu_vx_u8mf2_b16_mu(__VA_ARGS__)

◆ vmsleu_vx_u8mf4_b32

#define vmsleu_vx_u8mf4_b32 ( ... ) __riscv_vmsleu_vx_u8mf4_b32(__VA_ARGS__)

◆ vmsleu_vx_u8mf4_b32_m

#define vmsleu_vx_u8mf4_b32_m ( ... ) __riscv_vmsleu_vx_u8mf4_b32_mu(__VA_ARGS__)

◆ vmsleu_vx_u8mf8_b64

#define vmsleu_vx_u8mf8_b64 ( ... ) __riscv_vmsleu_vx_u8mf8_b64(__VA_ARGS__)

◆ vmsleu_vx_u8mf8_b64_m

#define vmsleu_vx_u8mf8_b64_m ( ... ) __riscv_vmsleu_vx_u8mf8_b64_mu(__VA_ARGS__)

◆ vmslt_vv_i16m1_b16

#define vmslt_vv_i16m1_b16 ( ... ) __riscv_vmslt_vv_i16m1_b16(__VA_ARGS__)

◆ vmslt_vv_i16m1_b16_m

#define vmslt_vv_i16m1_b16_m ( ... ) __riscv_vmslt_vv_i16m1_b16_mu(__VA_ARGS__)

◆ vmslt_vv_i16m2_b8

#define vmslt_vv_i16m2_b8 ( ... ) __riscv_vmslt_vv_i16m2_b8(__VA_ARGS__)

◆ vmslt_vv_i16m2_b8_m

#define vmslt_vv_i16m2_b8_m ( ... ) __riscv_vmslt_vv_i16m2_b8_mu(__VA_ARGS__)

◆ vmslt_vv_i16m4_b4

#define vmslt_vv_i16m4_b4 ( ... ) __riscv_vmslt_vv_i16m4_b4(__VA_ARGS__)

◆ vmslt_vv_i16m4_b4_m

#define vmslt_vv_i16m4_b4_m ( ... ) __riscv_vmslt_vv_i16m4_b4_mu(__VA_ARGS__)

◆ vmslt_vv_i16m8_b2

#define vmslt_vv_i16m8_b2 ( ... ) __riscv_vmslt_vv_i16m8_b2(__VA_ARGS__)

◆ vmslt_vv_i16m8_b2_m

#define vmslt_vv_i16m8_b2_m ( ... ) __riscv_vmslt_vv_i16m8_b2_mu(__VA_ARGS__)

◆ vmslt_vv_i16mf2_b32

#define vmslt_vv_i16mf2_b32 ( ... ) __riscv_vmslt_vv_i16mf2_b32(__VA_ARGS__)

◆ vmslt_vv_i16mf2_b32_m

#define vmslt_vv_i16mf2_b32_m ( ... ) __riscv_vmslt_vv_i16mf2_b32_mu(__VA_ARGS__)

◆ vmslt_vv_i16mf4_b64

#define vmslt_vv_i16mf4_b64 ( ... ) __riscv_vmslt_vv_i16mf4_b64(__VA_ARGS__)

◆ vmslt_vv_i16mf4_b64_m

#define vmslt_vv_i16mf4_b64_m ( ... ) __riscv_vmslt_vv_i16mf4_b64_mu(__VA_ARGS__)

◆ vmslt_vv_i32m1_b32

#define vmslt_vv_i32m1_b32 ( ... ) __riscv_vmslt_vv_i32m1_b32(__VA_ARGS__)

◆ vmslt_vv_i32m1_b32_m

#define vmslt_vv_i32m1_b32_m ( ... ) __riscv_vmslt_vv_i32m1_b32_mu(__VA_ARGS__)

◆ vmslt_vv_i32m2_b16

#define vmslt_vv_i32m2_b16 ( ... ) __riscv_vmslt_vv_i32m2_b16(__VA_ARGS__)

◆ vmslt_vv_i32m2_b16_m

#define vmslt_vv_i32m2_b16_m ( ... ) __riscv_vmslt_vv_i32m2_b16_mu(__VA_ARGS__)

◆ vmslt_vv_i32m4_b8

#define vmslt_vv_i32m4_b8 ( ... ) __riscv_vmslt_vv_i32m4_b8(__VA_ARGS__)

◆ vmslt_vv_i32m4_b8_m

#define vmslt_vv_i32m4_b8_m ( ... ) __riscv_vmslt_vv_i32m4_b8_mu(__VA_ARGS__)

◆ vmslt_vv_i32m8_b4

#define vmslt_vv_i32m8_b4 ( ... ) __riscv_vmslt_vv_i32m8_b4(__VA_ARGS__)

◆ vmslt_vv_i32m8_b4_m

#define vmslt_vv_i32m8_b4_m ( ... ) __riscv_vmslt_vv_i32m8_b4_mu(__VA_ARGS__)

◆ vmslt_vv_i32mf2_b64

#define vmslt_vv_i32mf2_b64 ( ... ) __riscv_vmslt_vv_i32mf2_b64(__VA_ARGS__)

◆ vmslt_vv_i32mf2_b64_m

#define vmslt_vv_i32mf2_b64_m ( ... ) __riscv_vmslt_vv_i32mf2_b64_mu(__VA_ARGS__)

◆ vmslt_vv_i64m1_b64

#define vmslt_vv_i64m1_b64 ( ... ) __riscv_vmslt_vv_i64m1_b64(__VA_ARGS__)

◆ vmslt_vv_i64m1_b64_m

#define vmslt_vv_i64m1_b64_m ( ... ) __riscv_vmslt_vv_i64m1_b64_mu(__VA_ARGS__)

◆ vmslt_vv_i64m2_b32

#define vmslt_vv_i64m2_b32 ( ... ) __riscv_vmslt_vv_i64m2_b32(__VA_ARGS__)

◆ vmslt_vv_i64m2_b32_m

#define vmslt_vv_i64m2_b32_m ( ... ) __riscv_vmslt_vv_i64m2_b32_mu(__VA_ARGS__)

◆ vmslt_vv_i64m4_b16

#define vmslt_vv_i64m4_b16 ( ... ) __riscv_vmslt_vv_i64m4_b16(__VA_ARGS__)

◆ vmslt_vv_i64m4_b16_m

#define vmslt_vv_i64m4_b16_m ( ... ) __riscv_vmslt_vv_i64m4_b16_mu(__VA_ARGS__)

◆ vmslt_vv_i64m8_b8

#define vmslt_vv_i64m8_b8 ( ... ) __riscv_vmslt_vv_i64m8_b8(__VA_ARGS__)

◆ vmslt_vv_i64m8_b8_m

#define vmslt_vv_i64m8_b8_m ( ... ) __riscv_vmslt_vv_i64m8_b8_mu(__VA_ARGS__)

◆ vmslt_vv_i8m1_b8

#define vmslt_vv_i8m1_b8 ( ... ) __riscv_vmslt_vv_i8m1_b8(__VA_ARGS__)

◆ vmslt_vv_i8m1_b8_m

#define vmslt_vv_i8m1_b8_m ( ... ) __riscv_vmslt_vv_i8m1_b8_mu(__VA_ARGS__)

◆ vmslt_vv_i8m2_b4

#define vmslt_vv_i8m2_b4 ( ... ) __riscv_vmslt_vv_i8m2_b4(__VA_ARGS__)

◆ vmslt_vv_i8m2_b4_m

#define vmslt_vv_i8m2_b4_m ( ... ) __riscv_vmslt_vv_i8m2_b4_mu(__VA_ARGS__)

◆ vmslt_vv_i8m4_b2

#define vmslt_vv_i8m4_b2 ( ... ) __riscv_vmslt_vv_i8m4_b2(__VA_ARGS__)

◆ vmslt_vv_i8m4_b2_m

#define vmslt_vv_i8m4_b2_m ( ... ) __riscv_vmslt_vv_i8m4_b2_mu(__VA_ARGS__)

◆ vmslt_vv_i8m8_b1

#define vmslt_vv_i8m8_b1 ( ... ) __riscv_vmslt_vv_i8m8_b1(__VA_ARGS__)

◆ vmslt_vv_i8m8_b1_m

#define vmslt_vv_i8m8_b1_m ( ... ) __riscv_vmslt_vv_i8m8_b1_mu(__VA_ARGS__)

◆ vmslt_vv_i8mf2_b16

#define vmslt_vv_i8mf2_b16 ( ... ) __riscv_vmslt_vv_i8mf2_b16(__VA_ARGS__)

◆ vmslt_vv_i8mf2_b16_m

#define vmslt_vv_i8mf2_b16_m ( ... ) __riscv_vmslt_vv_i8mf2_b16_mu(__VA_ARGS__)

◆ vmslt_vv_i8mf4_b32

#define vmslt_vv_i8mf4_b32 ( ... ) __riscv_vmslt_vv_i8mf4_b32(__VA_ARGS__)

◆ vmslt_vv_i8mf4_b32_m

#define vmslt_vv_i8mf4_b32_m ( ... ) __riscv_vmslt_vv_i8mf4_b32_mu(__VA_ARGS__)

◆ vmslt_vv_i8mf8_b64

#define vmslt_vv_i8mf8_b64 ( ... ) __riscv_vmslt_vv_i8mf8_b64(__VA_ARGS__)

◆ vmslt_vv_i8mf8_b64_m

#define vmslt_vv_i8mf8_b64_m ( ... ) __riscv_vmslt_vv_i8mf8_b64_mu(__VA_ARGS__)

◆ vmslt_vx_i16m1_b16

#define vmslt_vx_i16m1_b16 ( ... ) __riscv_vmslt_vx_i16m1_b16(__VA_ARGS__)

◆ vmslt_vx_i16m1_b16_m

#define vmslt_vx_i16m1_b16_m ( ... ) __riscv_vmslt_vx_i16m1_b16_mu(__VA_ARGS__)

◆ vmslt_vx_i16m2_b8

#define vmslt_vx_i16m2_b8 ( ... ) __riscv_vmslt_vx_i16m2_b8(__VA_ARGS__)

◆ vmslt_vx_i16m2_b8_m

#define vmslt_vx_i16m2_b8_m ( ... ) __riscv_vmslt_vx_i16m2_b8_mu(__VA_ARGS__)

◆ vmslt_vx_i16m4_b4

#define vmslt_vx_i16m4_b4 ( ... ) __riscv_vmslt_vx_i16m4_b4(__VA_ARGS__)

◆ vmslt_vx_i16m4_b4_m

#define vmslt_vx_i16m4_b4_m ( ... ) __riscv_vmslt_vx_i16m4_b4_mu(__VA_ARGS__)

◆ vmslt_vx_i16m8_b2

#define vmslt_vx_i16m8_b2 ( ... ) __riscv_vmslt_vx_i16m8_b2(__VA_ARGS__)

◆ vmslt_vx_i16m8_b2_m

#define vmslt_vx_i16m8_b2_m ( ... ) __riscv_vmslt_vx_i16m8_b2_mu(__VA_ARGS__)

◆ vmslt_vx_i16mf2_b32

#define vmslt_vx_i16mf2_b32 ( ... ) __riscv_vmslt_vx_i16mf2_b32(__VA_ARGS__)

◆ vmslt_vx_i16mf2_b32_m

#define vmslt_vx_i16mf2_b32_m ( ... ) __riscv_vmslt_vx_i16mf2_b32_mu(__VA_ARGS__)

◆ vmslt_vx_i16mf4_b64

#define vmslt_vx_i16mf4_b64 ( ... ) __riscv_vmslt_vx_i16mf4_b64(__VA_ARGS__)

◆ vmslt_vx_i16mf4_b64_m

#define vmslt_vx_i16mf4_b64_m ( ... ) __riscv_vmslt_vx_i16mf4_b64_mu(__VA_ARGS__)

◆ vmslt_vx_i32m1_b32

#define vmslt_vx_i32m1_b32 ( ... ) __riscv_vmslt_vx_i32m1_b32(__VA_ARGS__)

◆ vmslt_vx_i32m1_b32_m

#define vmslt_vx_i32m1_b32_m ( ... ) __riscv_vmslt_vx_i32m1_b32_mu(__VA_ARGS__)

◆ vmslt_vx_i32m2_b16

#define vmslt_vx_i32m2_b16 ( ... ) __riscv_vmslt_vx_i32m2_b16(__VA_ARGS__)

◆ vmslt_vx_i32m2_b16_m

#define vmslt_vx_i32m2_b16_m ( ... ) __riscv_vmslt_vx_i32m2_b16_mu(__VA_ARGS__)

◆ vmslt_vx_i32m4_b8

#define vmslt_vx_i32m4_b8 ( ... ) __riscv_vmslt_vx_i32m4_b8(__VA_ARGS__)

◆ vmslt_vx_i32m4_b8_m

#define vmslt_vx_i32m4_b8_m ( ... ) __riscv_vmslt_vx_i32m4_b8_mu(__VA_ARGS__)

◆ vmslt_vx_i32m8_b4

#define vmslt_vx_i32m8_b4 ( ... ) __riscv_vmslt_vx_i32m8_b4(__VA_ARGS__)

◆ vmslt_vx_i32m8_b4_m

#define vmslt_vx_i32m8_b4_m ( ... ) __riscv_vmslt_vx_i32m8_b4_mu(__VA_ARGS__)

◆ vmslt_vx_i32mf2_b64

#define vmslt_vx_i32mf2_b64 ( ... ) __riscv_vmslt_vx_i32mf2_b64(__VA_ARGS__)

◆ vmslt_vx_i32mf2_b64_m

#define vmslt_vx_i32mf2_b64_m ( ... ) __riscv_vmslt_vx_i32mf2_b64_mu(__VA_ARGS__)

◆ vmslt_vx_i64m1_b64

#define vmslt_vx_i64m1_b64 ( ... ) __riscv_vmslt_vx_i64m1_b64(__VA_ARGS__)

◆ vmslt_vx_i64m1_b64_m

#define vmslt_vx_i64m1_b64_m ( ... ) __riscv_vmslt_vx_i64m1_b64_mu(__VA_ARGS__)

◆ vmslt_vx_i64m2_b32

#define vmslt_vx_i64m2_b32 ( ... ) __riscv_vmslt_vx_i64m2_b32(__VA_ARGS__)

◆ vmslt_vx_i64m2_b32_m

#define vmslt_vx_i64m2_b32_m ( ... ) __riscv_vmslt_vx_i64m2_b32_mu(__VA_ARGS__)

◆ vmslt_vx_i64m4_b16

#define vmslt_vx_i64m4_b16 ( ... ) __riscv_vmslt_vx_i64m4_b16(__VA_ARGS__)

◆ vmslt_vx_i64m4_b16_m

#define vmslt_vx_i64m4_b16_m ( ... ) __riscv_vmslt_vx_i64m4_b16_mu(__VA_ARGS__)

◆ vmslt_vx_i64m8_b8

#define vmslt_vx_i64m8_b8 ( ... ) __riscv_vmslt_vx_i64m8_b8(__VA_ARGS__)

◆ vmslt_vx_i64m8_b8_m

#define vmslt_vx_i64m8_b8_m ( ... ) __riscv_vmslt_vx_i64m8_b8_mu(__VA_ARGS__)

◆ vmslt_vx_i8m1_b8

#define vmslt_vx_i8m1_b8 ( ... ) __riscv_vmslt_vx_i8m1_b8(__VA_ARGS__)

◆ vmslt_vx_i8m1_b8_m

#define vmslt_vx_i8m1_b8_m ( ... ) __riscv_vmslt_vx_i8m1_b8_mu(__VA_ARGS__)

◆ vmslt_vx_i8m2_b4

#define vmslt_vx_i8m2_b4 ( ... ) __riscv_vmslt_vx_i8m2_b4(__VA_ARGS__)

◆ vmslt_vx_i8m2_b4_m

#define vmslt_vx_i8m2_b4_m ( ... ) __riscv_vmslt_vx_i8m2_b4_mu(__VA_ARGS__)

◆ vmslt_vx_i8m4_b2

#define vmslt_vx_i8m4_b2 ( ... ) __riscv_vmslt_vx_i8m4_b2(__VA_ARGS__)

◆ vmslt_vx_i8m4_b2_m

#define vmslt_vx_i8m4_b2_m ( ... ) __riscv_vmslt_vx_i8m4_b2_mu(__VA_ARGS__)

◆ vmslt_vx_i8m8_b1

#define vmslt_vx_i8m8_b1 ( ... ) __riscv_vmslt_vx_i8m8_b1(__VA_ARGS__)

◆ vmslt_vx_i8m8_b1_m

#define vmslt_vx_i8m8_b1_m ( ... ) __riscv_vmslt_vx_i8m8_b1_mu(__VA_ARGS__)

◆ vmslt_vx_i8mf2_b16

#define vmslt_vx_i8mf2_b16 ( ... ) __riscv_vmslt_vx_i8mf2_b16(__VA_ARGS__)

◆ vmslt_vx_i8mf2_b16_m

#define vmslt_vx_i8mf2_b16_m ( ... ) __riscv_vmslt_vx_i8mf2_b16_mu(__VA_ARGS__)

◆ vmslt_vx_i8mf4_b32

#define vmslt_vx_i8mf4_b32 ( ... ) __riscv_vmslt_vx_i8mf4_b32(__VA_ARGS__)

◆ vmslt_vx_i8mf4_b32_m

#define vmslt_vx_i8mf4_b32_m ( ... ) __riscv_vmslt_vx_i8mf4_b32_mu(__VA_ARGS__)

◆ vmslt_vx_i8mf8_b64

#define vmslt_vx_i8mf8_b64 ( ... ) __riscv_vmslt_vx_i8mf8_b64(__VA_ARGS__)

◆ vmslt_vx_i8mf8_b64_m

#define vmslt_vx_i8mf8_b64_m ( ... ) __riscv_vmslt_vx_i8mf8_b64_mu(__VA_ARGS__)

◆ vmsltu_vv_u16m1_b16

#define vmsltu_vv_u16m1_b16 ( ... ) __riscv_vmsltu_vv_u16m1_b16(__VA_ARGS__)

◆ vmsltu_vv_u16m1_b16_m

#define vmsltu_vv_u16m1_b16_m ( ... ) __riscv_vmsltu_vv_u16m1_b16_mu(__VA_ARGS__)

◆ vmsltu_vv_u16m2_b8

#define vmsltu_vv_u16m2_b8 ( ... ) __riscv_vmsltu_vv_u16m2_b8(__VA_ARGS__)

◆ vmsltu_vv_u16m2_b8_m

#define vmsltu_vv_u16m2_b8_m ( ... ) __riscv_vmsltu_vv_u16m2_b8_mu(__VA_ARGS__)

◆ vmsltu_vv_u16m4_b4

#define vmsltu_vv_u16m4_b4 ( ... ) __riscv_vmsltu_vv_u16m4_b4(__VA_ARGS__)

◆ vmsltu_vv_u16m4_b4_m

#define vmsltu_vv_u16m4_b4_m ( ... ) __riscv_vmsltu_vv_u16m4_b4_mu(__VA_ARGS__)

◆ vmsltu_vv_u16m8_b2

#define vmsltu_vv_u16m8_b2 ( ... ) __riscv_vmsltu_vv_u16m8_b2(__VA_ARGS__)

◆ vmsltu_vv_u16m8_b2_m

#define vmsltu_vv_u16m8_b2_m ( ... ) __riscv_vmsltu_vv_u16m8_b2_mu(__VA_ARGS__)

◆ vmsltu_vv_u16mf2_b32

#define vmsltu_vv_u16mf2_b32 ( ... ) __riscv_vmsltu_vv_u16mf2_b32(__VA_ARGS__)

◆ vmsltu_vv_u16mf2_b32_m

#define vmsltu_vv_u16mf2_b32_m ( ... ) __riscv_vmsltu_vv_u16mf2_b32_mu(__VA_ARGS__)

◆ vmsltu_vv_u16mf4_b64

#define vmsltu_vv_u16mf4_b64 ( ... ) __riscv_vmsltu_vv_u16mf4_b64(__VA_ARGS__)

◆ vmsltu_vv_u16mf4_b64_m

#define vmsltu_vv_u16mf4_b64_m ( ... ) __riscv_vmsltu_vv_u16mf4_b64_mu(__VA_ARGS__)

◆ vmsltu_vv_u32m1_b32

#define vmsltu_vv_u32m1_b32 ( ... ) __riscv_vmsltu_vv_u32m1_b32(__VA_ARGS__)

◆ vmsltu_vv_u32m1_b32_m

#define vmsltu_vv_u32m1_b32_m ( ... ) __riscv_vmsltu_vv_u32m1_b32_mu(__VA_ARGS__)

◆ vmsltu_vv_u32m2_b16

#define vmsltu_vv_u32m2_b16 ( ... ) __riscv_vmsltu_vv_u32m2_b16(__VA_ARGS__)

◆ vmsltu_vv_u32m2_b16_m

#define vmsltu_vv_u32m2_b16_m ( ... ) __riscv_vmsltu_vv_u32m2_b16_mu(__VA_ARGS__)

◆ vmsltu_vv_u32m4_b8

#define vmsltu_vv_u32m4_b8 ( ... ) __riscv_vmsltu_vv_u32m4_b8(__VA_ARGS__)

◆ vmsltu_vv_u32m4_b8_m

#define vmsltu_vv_u32m4_b8_m ( ... ) __riscv_vmsltu_vv_u32m4_b8_mu(__VA_ARGS__)

◆ vmsltu_vv_u32m8_b4

#define vmsltu_vv_u32m8_b4 ( ... ) __riscv_vmsltu_vv_u32m8_b4(__VA_ARGS__)

◆ vmsltu_vv_u32m8_b4_m

#define vmsltu_vv_u32m8_b4_m ( ... ) __riscv_vmsltu_vv_u32m8_b4_mu(__VA_ARGS__)

◆ vmsltu_vv_u32mf2_b64

#define vmsltu_vv_u32mf2_b64 ( ... ) __riscv_vmsltu_vv_u32mf2_b64(__VA_ARGS__)

◆ vmsltu_vv_u32mf2_b64_m

#define vmsltu_vv_u32mf2_b64_m ( ... ) __riscv_vmsltu_vv_u32mf2_b64_mu(__VA_ARGS__)

◆ vmsltu_vv_u64m1_b64

#define vmsltu_vv_u64m1_b64 ( ... ) __riscv_vmsltu_vv_u64m1_b64(__VA_ARGS__)

◆ vmsltu_vv_u64m1_b64_m

#define vmsltu_vv_u64m1_b64_m ( ... ) __riscv_vmsltu_vv_u64m1_b64_mu(__VA_ARGS__)

◆ vmsltu_vv_u64m2_b32

#define vmsltu_vv_u64m2_b32 ( ... ) __riscv_vmsltu_vv_u64m2_b32(__VA_ARGS__)

◆ vmsltu_vv_u64m2_b32_m

#define vmsltu_vv_u64m2_b32_m ( ... ) __riscv_vmsltu_vv_u64m2_b32_mu(__VA_ARGS__)

◆ vmsltu_vv_u64m4_b16

#define vmsltu_vv_u64m4_b16 ( ... ) __riscv_vmsltu_vv_u64m4_b16(__VA_ARGS__)

◆ vmsltu_vv_u64m4_b16_m

#define vmsltu_vv_u64m4_b16_m ( ... ) __riscv_vmsltu_vv_u64m4_b16_mu(__VA_ARGS__)

◆ vmsltu_vv_u64m8_b8

#define vmsltu_vv_u64m8_b8 ( ... ) __riscv_vmsltu_vv_u64m8_b8(__VA_ARGS__)

◆ vmsltu_vv_u64m8_b8_m

#define vmsltu_vv_u64m8_b8_m ( ... ) __riscv_vmsltu_vv_u64m8_b8_mu(__VA_ARGS__)

◆ vmsltu_vv_u8m1_b8

#define vmsltu_vv_u8m1_b8 ( ... ) __riscv_vmsltu_vv_u8m1_b8(__VA_ARGS__)

◆ vmsltu_vv_u8m1_b8_m

#define vmsltu_vv_u8m1_b8_m ( ... ) __riscv_vmsltu_vv_u8m1_b8_mu(__VA_ARGS__)

◆ vmsltu_vv_u8m2_b4

#define vmsltu_vv_u8m2_b4 ( ... ) __riscv_vmsltu_vv_u8m2_b4(__VA_ARGS__)

◆ vmsltu_vv_u8m2_b4_m

#define vmsltu_vv_u8m2_b4_m ( ... ) __riscv_vmsltu_vv_u8m2_b4_mu(__VA_ARGS__)

◆ vmsltu_vv_u8m4_b2

#define vmsltu_vv_u8m4_b2 ( ... ) __riscv_vmsltu_vv_u8m4_b2(__VA_ARGS__)

◆ vmsltu_vv_u8m4_b2_m

#define vmsltu_vv_u8m4_b2_m ( ... ) __riscv_vmsltu_vv_u8m4_b2_mu(__VA_ARGS__)

◆ vmsltu_vv_u8m8_b1

#define vmsltu_vv_u8m8_b1 ( ... ) __riscv_vmsltu_vv_u8m8_b1(__VA_ARGS__)

◆ vmsltu_vv_u8m8_b1_m

#define vmsltu_vv_u8m8_b1_m ( ... ) __riscv_vmsltu_vv_u8m8_b1_mu(__VA_ARGS__)

◆ vmsltu_vv_u8mf2_b16

#define vmsltu_vv_u8mf2_b16 ( ... ) __riscv_vmsltu_vv_u8mf2_b16(__VA_ARGS__)

◆ vmsltu_vv_u8mf2_b16_m

#define vmsltu_vv_u8mf2_b16_m ( ... ) __riscv_vmsltu_vv_u8mf2_b16_mu(__VA_ARGS__)

◆ vmsltu_vv_u8mf4_b32

#define vmsltu_vv_u8mf4_b32 ( ... ) __riscv_vmsltu_vv_u8mf4_b32(__VA_ARGS__)

◆ vmsltu_vv_u8mf4_b32_m

#define vmsltu_vv_u8mf4_b32_m ( ... ) __riscv_vmsltu_vv_u8mf4_b32_mu(__VA_ARGS__)

◆ vmsltu_vv_u8mf8_b64

#define vmsltu_vv_u8mf8_b64 ( ... ) __riscv_vmsltu_vv_u8mf8_b64(__VA_ARGS__)

◆ vmsltu_vv_u8mf8_b64_m

#define vmsltu_vv_u8mf8_b64_m ( ... ) __riscv_vmsltu_vv_u8mf8_b64_mu(__VA_ARGS__)

◆ vmsltu_vx_u16m1_b16

#define vmsltu_vx_u16m1_b16 ( ... ) __riscv_vmsltu_vx_u16m1_b16(__VA_ARGS__)

◆ vmsltu_vx_u16m1_b16_m

#define vmsltu_vx_u16m1_b16_m ( ... ) __riscv_vmsltu_vx_u16m1_b16_mu(__VA_ARGS__)

◆ vmsltu_vx_u16m2_b8

#define vmsltu_vx_u16m2_b8 ( ... ) __riscv_vmsltu_vx_u16m2_b8(__VA_ARGS__)

◆ vmsltu_vx_u16m2_b8_m

#define vmsltu_vx_u16m2_b8_m ( ... ) __riscv_vmsltu_vx_u16m2_b8_mu(__VA_ARGS__)

◆ vmsltu_vx_u16m4_b4

#define vmsltu_vx_u16m4_b4 ( ... ) __riscv_vmsltu_vx_u16m4_b4(__VA_ARGS__)

◆ vmsltu_vx_u16m4_b4_m

#define vmsltu_vx_u16m4_b4_m ( ... ) __riscv_vmsltu_vx_u16m4_b4_mu(__VA_ARGS__)

◆ vmsltu_vx_u16m8_b2

#define vmsltu_vx_u16m8_b2 ( ... ) __riscv_vmsltu_vx_u16m8_b2(__VA_ARGS__)

◆ vmsltu_vx_u16m8_b2_m

#define vmsltu_vx_u16m8_b2_m ( ... ) __riscv_vmsltu_vx_u16m8_b2_mu(__VA_ARGS__)

◆ vmsltu_vx_u16mf2_b32

#define vmsltu_vx_u16mf2_b32 ( ... ) __riscv_vmsltu_vx_u16mf2_b32(__VA_ARGS__)

◆ vmsltu_vx_u16mf2_b32_m

#define vmsltu_vx_u16mf2_b32_m ( ... ) __riscv_vmsltu_vx_u16mf2_b32_mu(__VA_ARGS__)

◆ vmsltu_vx_u16mf4_b64

#define vmsltu_vx_u16mf4_b64 ( ... ) __riscv_vmsltu_vx_u16mf4_b64(__VA_ARGS__)

◆ vmsltu_vx_u16mf4_b64_m

#define vmsltu_vx_u16mf4_b64_m ( ... ) __riscv_vmsltu_vx_u16mf4_b64_mu(__VA_ARGS__)

◆ vmsltu_vx_u32m1_b32

#define vmsltu_vx_u32m1_b32 ( ... ) __riscv_vmsltu_vx_u32m1_b32(__VA_ARGS__)

◆ vmsltu_vx_u32m1_b32_m

#define vmsltu_vx_u32m1_b32_m ( ... ) __riscv_vmsltu_vx_u32m1_b32_mu(__VA_ARGS__)

◆ vmsltu_vx_u32m2_b16

#define vmsltu_vx_u32m2_b16 ( ... ) __riscv_vmsltu_vx_u32m2_b16(__VA_ARGS__)

◆ vmsltu_vx_u32m2_b16_m

#define vmsltu_vx_u32m2_b16_m ( ... ) __riscv_vmsltu_vx_u32m2_b16_mu(__VA_ARGS__)

◆ vmsltu_vx_u32m4_b8

#define vmsltu_vx_u32m4_b8 ( ... ) __riscv_vmsltu_vx_u32m4_b8(__VA_ARGS__)

◆ vmsltu_vx_u32m4_b8_m

#define vmsltu_vx_u32m4_b8_m ( ... ) __riscv_vmsltu_vx_u32m4_b8_mu(__VA_ARGS__)

◆ vmsltu_vx_u32m8_b4

#define vmsltu_vx_u32m8_b4 ( ... ) __riscv_vmsltu_vx_u32m8_b4(__VA_ARGS__)

◆ vmsltu_vx_u32m8_b4_m

#define vmsltu_vx_u32m8_b4_m ( ... ) __riscv_vmsltu_vx_u32m8_b4_mu(__VA_ARGS__)

◆ vmsltu_vx_u32mf2_b64

#define vmsltu_vx_u32mf2_b64 ( ... ) __riscv_vmsltu_vx_u32mf2_b64(__VA_ARGS__)

◆ vmsltu_vx_u32mf2_b64_m

#define vmsltu_vx_u32mf2_b64_m ( ... ) __riscv_vmsltu_vx_u32mf2_b64_mu(__VA_ARGS__)

◆ vmsltu_vx_u64m1_b64

#define vmsltu_vx_u64m1_b64 ( ... ) __riscv_vmsltu_vx_u64m1_b64(__VA_ARGS__)

◆ vmsltu_vx_u64m1_b64_m

#define vmsltu_vx_u64m1_b64_m ( ... ) __riscv_vmsltu_vx_u64m1_b64_mu(__VA_ARGS__)

◆ vmsltu_vx_u64m2_b32

#define vmsltu_vx_u64m2_b32 ( ... ) __riscv_vmsltu_vx_u64m2_b32(__VA_ARGS__)

◆ vmsltu_vx_u64m2_b32_m

#define vmsltu_vx_u64m2_b32_m ( ... ) __riscv_vmsltu_vx_u64m2_b32_mu(__VA_ARGS__)

◆ vmsltu_vx_u64m4_b16

#define vmsltu_vx_u64m4_b16 ( ... ) __riscv_vmsltu_vx_u64m4_b16(__VA_ARGS__)

◆ vmsltu_vx_u64m4_b16_m

#define vmsltu_vx_u64m4_b16_m ( ... ) __riscv_vmsltu_vx_u64m4_b16_mu(__VA_ARGS__)

◆ vmsltu_vx_u64m8_b8

#define vmsltu_vx_u64m8_b8 ( ... ) __riscv_vmsltu_vx_u64m8_b8(__VA_ARGS__)

◆ vmsltu_vx_u64m8_b8_m

#define vmsltu_vx_u64m8_b8_m ( ... ) __riscv_vmsltu_vx_u64m8_b8_mu(__VA_ARGS__)

◆ vmsltu_vx_u8m1_b8

#define vmsltu_vx_u8m1_b8 ( ... ) __riscv_vmsltu_vx_u8m1_b8(__VA_ARGS__)

◆ vmsltu_vx_u8m1_b8_m

#define vmsltu_vx_u8m1_b8_m ( ... ) __riscv_vmsltu_vx_u8m1_b8_mu(__VA_ARGS__)

◆ vmsltu_vx_u8m2_b4

#define vmsltu_vx_u8m2_b4 ( ... ) __riscv_vmsltu_vx_u8m2_b4(__VA_ARGS__)

◆ vmsltu_vx_u8m2_b4_m

#define vmsltu_vx_u8m2_b4_m ( ... ) __riscv_vmsltu_vx_u8m2_b4_mu(__VA_ARGS__)

◆ vmsltu_vx_u8m4_b2

#define vmsltu_vx_u8m4_b2 ( ... ) __riscv_vmsltu_vx_u8m4_b2(__VA_ARGS__)

◆ vmsltu_vx_u8m4_b2_m

#define vmsltu_vx_u8m4_b2_m ( ... ) __riscv_vmsltu_vx_u8m4_b2_mu(__VA_ARGS__)

◆ vmsltu_vx_u8m8_b1

#define vmsltu_vx_u8m8_b1 ( ... ) __riscv_vmsltu_vx_u8m8_b1(__VA_ARGS__)

◆ vmsltu_vx_u8m8_b1_m

#define vmsltu_vx_u8m8_b1_m ( ... ) __riscv_vmsltu_vx_u8m8_b1_mu(__VA_ARGS__)

◆ vmsltu_vx_u8mf2_b16

#define vmsltu_vx_u8mf2_b16 ( ... ) __riscv_vmsltu_vx_u8mf2_b16(__VA_ARGS__)

◆ vmsltu_vx_u8mf2_b16_m

#define vmsltu_vx_u8mf2_b16_m ( ... ) __riscv_vmsltu_vx_u8mf2_b16_mu(__VA_ARGS__)

◆ vmsltu_vx_u8mf4_b32

#define vmsltu_vx_u8mf4_b32 ( ... ) __riscv_vmsltu_vx_u8mf4_b32(__VA_ARGS__)

◆ vmsltu_vx_u8mf4_b32_m

#define vmsltu_vx_u8mf4_b32_m ( ... ) __riscv_vmsltu_vx_u8mf4_b32_mu(__VA_ARGS__)

◆ vmsltu_vx_u8mf8_b64

#define vmsltu_vx_u8mf8_b64 ( ... ) __riscv_vmsltu_vx_u8mf8_b64(__VA_ARGS__)

◆ vmsltu_vx_u8mf8_b64_m

#define vmsltu_vx_u8mf8_b64_m ( ... ) __riscv_vmsltu_vx_u8mf8_b64_mu(__VA_ARGS__)

◆ vmsne_vv_i16m1_b16

#define vmsne_vv_i16m1_b16 ( ... ) __riscv_vmsne_vv_i16m1_b16(__VA_ARGS__)

◆ vmsne_vv_i16m1_b16_m

#define vmsne_vv_i16m1_b16_m ( ... ) __riscv_vmsne_vv_i16m1_b16_mu(__VA_ARGS__)

◆ vmsne_vv_i16m2_b8

#define vmsne_vv_i16m2_b8 ( ... ) __riscv_vmsne_vv_i16m2_b8(__VA_ARGS__)

◆ vmsne_vv_i16m2_b8_m

#define vmsne_vv_i16m2_b8_m ( ... ) __riscv_vmsne_vv_i16m2_b8_mu(__VA_ARGS__)

◆ vmsne_vv_i16m4_b4

#define vmsne_vv_i16m4_b4 ( ... ) __riscv_vmsne_vv_i16m4_b4(__VA_ARGS__)

◆ vmsne_vv_i16m4_b4_m

#define vmsne_vv_i16m4_b4_m ( ... ) __riscv_vmsne_vv_i16m4_b4_mu(__VA_ARGS__)

◆ vmsne_vv_i16m8_b2

#define vmsne_vv_i16m8_b2 ( ... ) __riscv_vmsne_vv_i16m8_b2(__VA_ARGS__)

◆ vmsne_vv_i16m8_b2_m

#define vmsne_vv_i16m8_b2_m ( ... ) __riscv_vmsne_vv_i16m8_b2_mu(__VA_ARGS__)

◆ vmsne_vv_i16mf2_b32

#define vmsne_vv_i16mf2_b32 ( ... ) __riscv_vmsne_vv_i16mf2_b32(__VA_ARGS__)

◆ vmsne_vv_i16mf2_b32_m

#define vmsne_vv_i16mf2_b32_m ( ... ) __riscv_vmsne_vv_i16mf2_b32_mu(__VA_ARGS__)

◆ vmsne_vv_i16mf4_b64

#define vmsne_vv_i16mf4_b64 ( ... ) __riscv_vmsne_vv_i16mf4_b64(__VA_ARGS__)

◆ vmsne_vv_i16mf4_b64_m

#define vmsne_vv_i16mf4_b64_m ( ... ) __riscv_vmsne_vv_i16mf4_b64_mu(__VA_ARGS__)

◆ vmsne_vv_i32m1_b32

#define vmsne_vv_i32m1_b32 ( ... ) __riscv_vmsne_vv_i32m1_b32(__VA_ARGS__)

◆ vmsne_vv_i32m1_b32_m

#define vmsne_vv_i32m1_b32_m ( ... ) __riscv_vmsne_vv_i32m1_b32_mu(__VA_ARGS__)

◆ vmsne_vv_i32m2_b16

#define vmsne_vv_i32m2_b16 ( ... ) __riscv_vmsne_vv_i32m2_b16(__VA_ARGS__)

◆ vmsne_vv_i32m2_b16_m

#define vmsne_vv_i32m2_b16_m ( ... ) __riscv_vmsne_vv_i32m2_b16_mu(__VA_ARGS__)

◆ vmsne_vv_i32m4_b8

#define vmsne_vv_i32m4_b8 ( ... ) __riscv_vmsne_vv_i32m4_b8(__VA_ARGS__)

◆ vmsne_vv_i32m4_b8_m

#define vmsne_vv_i32m4_b8_m ( ... ) __riscv_vmsne_vv_i32m4_b8_mu(__VA_ARGS__)

◆ vmsne_vv_i32m8_b4

#define vmsne_vv_i32m8_b4 ( ... ) __riscv_vmsne_vv_i32m8_b4(__VA_ARGS__)

◆ vmsne_vv_i32m8_b4_m

#define vmsne_vv_i32m8_b4_m ( ... ) __riscv_vmsne_vv_i32m8_b4_mu(__VA_ARGS__)

◆ vmsne_vv_i32mf2_b64

#define vmsne_vv_i32mf2_b64 ( ... ) __riscv_vmsne_vv_i32mf2_b64(__VA_ARGS__)

◆ vmsne_vv_i32mf2_b64_m

#define vmsne_vv_i32mf2_b64_m ( ... ) __riscv_vmsne_vv_i32mf2_b64_mu(__VA_ARGS__)

◆ vmsne_vv_i64m1_b64

#define vmsne_vv_i64m1_b64 ( ... ) __riscv_vmsne_vv_i64m1_b64(__VA_ARGS__)

◆ vmsne_vv_i64m1_b64_m

#define vmsne_vv_i64m1_b64_m ( ... ) __riscv_vmsne_vv_i64m1_b64_mu(__VA_ARGS__)

◆ vmsne_vv_i64m2_b32

#define vmsne_vv_i64m2_b32 ( ... ) __riscv_vmsne_vv_i64m2_b32(__VA_ARGS__)

◆ vmsne_vv_i64m2_b32_m

#define vmsne_vv_i64m2_b32_m ( ... ) __riscv_vmsne_vv_i64m2_b32_mu(__VA_ARGS__)

◆ vmsne_vv_i64m4_b16

#define vmsne_vv_i64m4_b16 ( ... ) __riscv_vmsne_vv_i64m4_b16(__VA_ARGS__)

◆ vmsne_vv_i64m4_b16_m

#define vmsne_vv_i64m4_b16_m ( ... ) __riscv_vmsne_vv_i64m4_b16_mu(__VA_ARGS__)

◆ vmsne_vv_i64m8_b8

#define vmsne_vv_i64m8_b8 ( ... ) __riscv_vmsne_vv_i64m8_b8(__VA_ARGS__)

◆ vmsne_vv_i64m8_b8_m

#define vmsne_vv_i64m8_b8_m ( ... ) __riscv_vmsne_vv_i64m8_b8_mu(__VA_ARGS__)

◆ vmsne_vv_i8m1_b8

#define vmsne_vv_i8m1_b8 ( ... ) __riscv_vmsne_vv_i8m1_b8(__VA_ARGS__)

◆ vmsne_vv_i8m1_b8_m

#define vmsne_vv_i8m1_b8_m ( ... ) __riscv_vmsne_vv_i8m1_b8_mu(__VA_ARGS__)

◆ vmsne_vv_i8m2_b4

#define vmsne_vv_i8m2_b4 ( ... ) __riscv_vmsne_vv_i8m2_b4(__VA_ARGS__)

◆ vmsne_vv_i8m2_b4_m

#define vmsne_vv_i8m2_b4_m ( ... ) __riscv_vmsne_vv_i8m2_b4_mu(__VA_ARGS__)

◆ vmsne_vv_i8m4_b2

#define vmsne_vv_i8m4_b2 ( ... ) __riscv_vmsne_vv_i8m4_b2(__VA_ARGS__)

◆ vmsne_vv_i8m4_b2_m

#define vmsne_vv_i8m4_b2_m ( ... ) __riscv_vmsne_vv_i8m4_b2_mu(__VA_ARGS__)

◆ vmsne_vv_i8m8_b1

#define vmsne_vv_i8m8_b1 ( ... ) __riscv_vmsne_vv_i8m8_b1(__VA_ARGS__)

◆ vmsne_vv_i8m8_b1_m

#define vmsne_vv_i8m8_b1_m ( ... ) __riscv_vmsne_vv_i8m8_b1_mu(__VA_ARGS__)

◆ vmsne_vv_i8mf2_b16

#define vmsne_vv_i8mf2_b16 ( ... ) __riscv_vmsne_vv_i8mf2_b16(__VA_ARGS__)

◆ vmsne_vv_i8mf2_b16_m

#define vmsne_vv_i8mf2_b16_m ( ... ) __riscv_vmsne_vv_i8mf2_b16_mu(__VA_ARGS__)

◆ vmsne_vv_i8mf4_b32

#define vmsne_vv_i8mf4_b32 ( ... ) __riscv_vmsne_vv_i8mf4_b32(__VA_ARGS__)

◆ vmsne_vv_i8mf4_b32_m

#define vmsne_vv_i8mf4_b32_m ( ... ) __riscv_vmsne_vv_i8mf4_b32_mu(__VA_ARGS__)

◆ vmsne_vv_i8mf8_b64

#define vmsne_vv_i8mf8_b64 ( ... ) __riscv_vmsne_vv_i8mf8_b64(__VA_ARGS__)

◆ vmsne_vv_i8mf8_b64_m

#define vmsne_vv_i8mf8_b64_m ( ... ) __riscv_vmsne_vv_i8mf8_b64_mu(__VA_ARGS__)

◆ vmsne_vv_u16m1_b16

#define vmsne_vv_u16m1_b16 ( ... ) __riscv_vmsne_vv_u16m1_b16(__VA_ARGS__)

◆ vmsne_vv_u16m1_b16_m

#define vmsne_vv_u16m1_b16_m ( ... ) __riscv_vmsne_vv_u16m1_b16_mu(__VA_ARGS__)

◆ vmsne_vv_u16m2_b8

#define vmsne_vv_u16m2_b8 ( ... ) __riscv_vmsne_vv_u16m2_b8(__VA_ARGS__)

◆ vmsne_vv_u16m2_b8_m

#define vmsne_vv_u16m2_b8_m ( ... ) __riscv_vmsne_vv_u16m2_b8_mu(__VA_ARGS__)

◆ vmsne_vv_u16m4_b4

#define vmsne_vv_u16m4_b4 ( ... ) __riscv_vmsne_vv_u16m4_b4(__VA_ARGS__)

◆ vmsne_vv_u16m4_b4_m

#define vmsne_vv_u16m4_b4_m ( ... ) __riscv_vmsne_vv_u16m4_b4_mu(__VA_ARGS__)

◆ vmsne_vv_u16m8_b2

#define vmsne_vv_u16m8_b2 ( ... ) __riscv_vmsne_vv_u16m8_b2(__VA_ARGS__)

◆ vmsne_vv_u16m8_b2_m

#define vmsne_vv_u16m8_b2_m ( ... ) __riscv_vmsne_vv_u16m8_b2_mu(__VA_ARGS__)

◆ vmsne_vv_u16mf2_b32

#define vmsne_vv_u16mf2_b32 ( ... ) __riscv_vmsne_vv_u16mf2_b32(__VA_ARGS__)

◆ vmsne_vv_u16mf2_b32_m

#define vmsne_vv_u16mf2_b32_m ( ... ) __riscv_vmsne_vv_u16mf2_b32_mu(__VA_ARGS__)

◆ vmsne_vv_u16mf4_b64

#define vmsne_vv_u16mf4_b64 ( ... ) __riscv_vmsne_vv_u16mf4_b64(__VA_ARGS__)

◆ vmsne_vv_u16mf4_b64_m

#define vmsne_vv_u16mf4_b64_m ( ... ) __riscv_vmsne_vv_u16mf4_b64_mu(__VA_ARGS__)

◆ vmsne_vv_u32m1_b32

#define vmsne_vv_u32m1_b32 ( ... ) __riscv_vmsne_vv_u32m1_b32(__VA_ARGS__)

◆ vmsne_vv_u32m1_b32_m

#define vmsne_vv_u32m1_b32_m ( ... ) __riscv_vmsne_vv_u32m1_b32_mu(__VA_ARGS__)

◆ vmsne_vv_u32m2_b16

#define vmsne_vv_u32m2_b16 ( ... ) __riscv_vmsne_vv_u32m2_b16(__VA_ARGS__)

◆ vmsne_vv_u32m2_b16_m

#define vmsne_vv_u32m2_b16_m ( ... ) __riscv_vmsne_vv_u32m2_b16_mu(__VA_ARGS__)

◆ vmsne_vv_u32m4_b8

#define vmsne_vv_u32m4_b8 ( ... ) __riscv_vmsne_vv_u32m4_b8(__VA_ARGS__)

◆ vmsne_vv_u32m4_b8_m

#define vmsne_vv_u32m4_b8_m ( ... ) __riscv_vmsne_vv_u32m4_b8_mu(__VA_ARGS__)

◆ vmsne_vv_u32m8_b4

#define vmsne_vv_u32m8_b4 ( ... ) __riscv_vmsne_vv_u32m8_b4(__VA_ARGS__)

◆ vmsne_vv_u32m8_b4_m

#define vmsne_vv_u32m8_b4_m ( ... ) __riscv_vmsne_vv_u32m8_b4_mu(__VA_ARGS__)

◆ vmsne_vv_u32mf2_b64

#define vmsne_vv_u32mf2_b64 ( ... ) __riscv_vmsne_vv_u32mf2_b64(__VA_ARGS__)

◆ vmsne_vv_u32mf2_b64_m

#define vmsne_vv_u32mf2_b64_m ( ... ) __riscv_vmsne_vv_u32mf2_b64_mu(__VA_ARGS__)

◆ vmsne_vv_u64m1_b64

#define vmsne_vv_u64m1_b64 ( ... ) __riscv_vmsne_vv_u64m1_b64(__VA_ARGS__)

◆ vmsne_vv_u64m1_b64_m

#define vmsne_vv_u64m1_b64_m ( ... ) __riscv_vmsne_vv_u64m1_b64_mu(__VA_ARGS__)

◆ vmsne_vv_u64m2_b32

#define vmsne_vv_u64m2_b32 ( ... ) __riscv_vmsne_vv_u64m2_b32(__VA_ARGS__)

◆ vmsne_vv_u64m2_b32_m

#define vmsne_vv_u64m2_b32_m ( ... ) __riscv_vmsne_vv_u64m2_b32_mu(__VA_ARGS__)

◆ vmsne_vv_u64m4_b16

#define vmsne_vv_u64m4_b16 ( ... ) __riscv_vmsne_vv_u64m4_b16(__VA_ARGS__)

◆ vmsne_vv_u64m4_b16_m

#define vmsne_vv_u64m4_b16_m ( ... ) __riscv_vmsne_vv_u64m4_b16_mu(__VA_ARGS__)

◆ vmsne_vv_u64m8_b8

#define vmsne_vv_u64m8_b8 ( ... ) __riscv_vmsne_vv_u64m8_b8(__VA_ARGS__)

◆ vmsne_vv_u64m8_b8_m

#define vmsne_vv_u64m8_b8_m ( ... ) __riscv_vmsne_vv_u64m8_b8_mu(__VA_ARGS__)

◆ vmsne_vv_u8m1_b8

#define vmsne_vv_u8m1_b8 ( ... ) __riscv_vmsne_vv_u8m1_b8(__VA_ARGS__)

◆ vmsne_vv_u8m1_b8_m

#define vmsne_vv_u8m1_b8_m ( ... ) __riscv_vmsne_vv_u8m1_b8_mu(__VA_ARGS__)

◆ vmsne_vv_u8m2_b4

#define vmsne_vv_u8m2_b4 ( ... ) __riscv_vmsne_vv_u8m2_b4(__VA_ARGS__)

◆ vmsne_vv_u8m2_b4_m

#define vmsne_vv_u8m2_b4_m ( ... ) __riscv_vmsne_vv_u8m2_b4_mu(__VA_ARGS__)

◆ vmsne_vv_u8m4_b2

#define vmsne_vv_u8m4_b2 ( ... ) __riscv_vmsne_vv_u8m4_b2(__VA_ARGS__)

◆ vmsne_vv_u8m4_b2_m

#define vmsne_vv_u8m4_b2_m ( ... ) __riscv_vmsne_vv_u8m4_b2_mu(__VA_ARGS__)

◆ vmsne_vv_u8m8_b1

#define vmsne_vv_u8m8_b1 ( ... ) __riscv_vmsne_vv_u8m8_b1(__VA_ARGS__)

◆ vmsne_vv_u8m8_b1_m

#define vmsne_vv_u8m8_b1_m ( ... ) __riscv_vmsne_vv_u8m8_b1_mu(__VA_ARGS__)

◆ vmsne_vv_u8mf2_b16

#define vmsne_vv_u8mf2_b16 ( ... ) __riscv_vmsne_vv_u8mf2_b16(__VA_ARGS__)

◆ vmsne_vv_u8mf2_b16_m

#define vmsne_vv_u8mf2_b16_m ( ... ) __riscv_vmsne_vv_u8mf2_b16_mu(__VA_ARGS__)

◆ vmsne_vv_u8mf4_b32

#define vmsne_vv_u8mf4_b32 ( ... ) __riscv_vmsne_vv_u8mf4_b32(__VA_ARGS__)

◆ vmsne_vv_u8mf4_b32_m

#define vmsne_vv_u8mf4_b32_m ( ... ) __riscv_vmsne_vv_u8mf4_b32_mu(__VA_ARGS__)

◆ vmsne_vv_u8mf8_b64

#define vmsne_vv_u8mf8_b64 ( ... ) __riscv_vmsne_vv_u8mf8_b64(__VA_ARGS__)

◆ vmsne_vv_u8mf8_b64_m

#define vmsne_vv_u8mf8_b64_m ( ... ) __riscv_vmsne_vv_u8mf8_b64_mu(__VA_ARGS__)

◆ vmsne_vx_i16m1_b16

#define vmsne_vx_i16m1_b16 ( ... ) __riscv_vmsne_vx_i16m1_b16(__VA_ARGS__)

◆ vmsne_vx_i16m1_b16_m

#define vmsne_vx_i16m1_b16_m ( ... ) __riscv_vmsne_vx_i16m1_b16_mu(__VA_ARGS__)

◆ vmsne_vx_i16m2_b8

#define vmsne_vx_i16m2_b8 ( ... ) __riscv_vmsne_vx_i16m2_b8(__VA_ARGS__)

◆ vmsne_vx_i16m2_b8_m

#define vmsne_vx_i16m2_b8_m ( ... ) __riscv_vmsne_vx_i16m2_b8_mu(__VA_ARGS__)

◆ vmsne_vx_i16m4_b4

#define vmsne_vx_i16m4_b4 ( ... ) __riscv_vmsne_vx_i16m4_b4(__VA_ARGS__)

◆ vmsne_vx_i16m4_b4_m

#define vmsne_vx_i16m4_b4_m ( ... ) __riscv_vmsne_vx_i16m4_b4_mu(__VA_ARGS__)

◆ vmsne_vx_i16m8_b2

#define vmsne_vx_i16m8_b2 ( ... ) __riscv_vmsne_vx_i16m8_b2(__VA_ARGS__)

◆ vmsne_vx_i16m8_b2_m

#define vmsne_vx_i16m8_b2_m ( ... ) __riscv_vmsne_vx_i16m8_b2_mu(__VA_ARGS__)

◆ vmsne_vx_i16mf2_b32

#define vmsne_vx_i16mf2_b32 ( ... ) __riscv_vmsne_vx_i16mf2_b32(__VA_ARGS__)

◆ vmsne_vx_i16mf2_b32_m

#define vmsne_vx_i16mf2_b32_m ( ... ) __riscv_vmsne_vx_i16mf2_b32_mu(__VA_ARGS__)

◆ vmsne_vx_i16mf4_b64

#define vmsne_vx_i16mf4_b64 ( ... ) __riscv_vmsne_vx_i16mf4_b64(__VA_ARGS__)

◆ vmsne_vx_i16mf4_b64_m

#define vmsne_vx_i16mf4_b64_m ( ... ) __riscv_vmsne_vx_i16mf4_b64_mu(__VA_ARGS__)

◆ vmsne_vx_i32m1_b32

#define vmsne_vx_i32m1_b32 ( ... ) __riscv_vmsne_vx_i32m1_b32(__VA_ARGS__)

◆ vmsne_vx_i32m1_b32_m

#define vmsne_vx_i32m1_b32_m ( ... ) __riscv_vmsne_vx_i32m1_b32_mu(__VA_ARGS__)

◆ vmsne_vx_i32m2_b16

#define vmsne_vx_i32m2_b16 ( ... ) __riscv_vmsne_vx_i32m2_b16(__VA_ARGS__)

◆ vmsne_vx_i32m2_b16_m

#define vmsne_vx_i32m2_b16_m ( ... ) __riscv_vmsne_vx_i32m2_b16_mu(__VA_ARGS__)

◆ vmsne_vx_i32m4_b8

#define vmsne_vx_i32m4_b8 ( ... ) __riscv_vmsne_vx_i32m4_b8(__VA_ARGS__)

◆ vmsne_vx_i32m4_b8_m

#define vmsne_vx_i32m4_b8_m ( ... ) __riscv_vmsne_vx_i32m4_b8_mu(__VA_ARGS__)

◆ vmsne_vx_i32m8_b4

#define vmsne_vx_i32m8_b4 ( ... ) __riscv_vmsne_vx_i32m8_b4(__VA_ARGS__)

◆ vmsne_vx_i32m8_b4_m

#define vmsne_vx_i32m8_b4_m ( ... ) __riscv_vmsne_vx_i32m8_b4_mu(__VA_ARGS__)

◆ vmsne_vx_i32mf2_b64

#define vmsne_vx_i32mf2_b64 ( ... ) __riscv_vmsne_vx_i32mf2_b64(__VA_ARGS__)

◆ vmsne_vx_i32mf2_b64_m

#define vmsne_vx_i32mf2_b64_m ( ... ) __riscv_vmsne_vx_i32mf2_b64_mu(__VA_ARGS__)

◆ vmsne_vx_i64m1_b64

#define vmsne_vx_i64m1_b64 ( ... ) __riscv_vmsne_vx_i64m1_b64(__VA_ARGS__)

◆ vmsne_vx_i64m1_b64_m

#define vmsne_vx_i64m1_b64_m ( ... ) __riscv_vmsne_vx_i64m1_b64_mu(__VA_ARGS__)

◆ vmsne_vx_i64m2_b32

#define vmsne_vx_i64m2_b32 ( ... ) __riscv_vmsne_vx_i64m2_b32(__VA_ARGS__)

◆ vmsne_vx_i64m2_b32_m

#define vmsne_vx_i64m2_b32_m ( ... ) __riscv_vmsne_vx_i64m2_b32_mu(__VA_ARGS__)

◆ vmsne_vx_i64m4_b16

#define vmsne_vx_i64m4_b16 ( ... ) __riscv_vmsne_vx_i64m4_b16(__VA_ARGS__)

◆ vmsne_vx_i64m4_b16_m

#define vmsne_vx_i64m4_b16_m ( ... ) __riscv_vmsne_vx_i64m4_b16_mu(__VA_ARGS__)

◆ vmsne_vx_i64m8_b8

#define vmsne_vx_i64m8_b8 ( ... ) __riscv_vmsne_vx_i64m8_b8(__VA_ARGS__)

◆ vmsne_vx_i64m8_b8_m

#define vmsne_vx_i64m8_b8_m ( ... ) __riscv_vmsne_vx_i64m8_b8_mu(__VA_ARGS__)

◆ vmsne_vx_i8m1_b8

#define vmsne_vx_i8m1_b8 ( ... ) __riscv_vmsne_vx_i8m1_b8(__VA_ARGS__)

◆ vmsne_vx_i8m1_b8_m

#define vmsne_vx_i8m1_b8_m ( ... ) __riscv_vmsne_vx_i8m1_b8_mu(__VA_ARGS__)

◆ vmsne_vx_i8m2_b4

#define vmsne_vx_i8m2_b4 ( ... ) __riscv_vmsne_vx_i8m2_b4(__VA_ARGS__)

◆ vmsne_vx_i8m2_b4_m

#define vmsne_vx_i8m2_b4_m ( ... ) __riscv_vmsne_vx_i8m2_b4_mu(__VA_ARGS__)

◆ vmsne_vx_i8m4_b2

#define vmsne_vx_i8m4_b2 ( ... ) __riscv_vmsne_vx_i8m4_b2(__VA_ARGS__)

◆ vmsne_vx_i8m4_b2_m

#define vmsne_vx_i8m4_b2_m ( ... ) __riscv_vmsne_vx_i8m4_b2_mu(__VA_ARGS__)

◆ vmsne_vx_i8m8_b1

#define vmsne_vx_i8m8_b1 ( ... ) __riscv_vmsne_vx_i8m8_b1(__VA_ARGS__)

◆ vmsne_vx_i8m8_b1_m

#define vmsne_vx_i8m8_b1_m ( ... ) __riscv_vmsne_vx_i8m8_b1_mu(__VA_ARGS__)

◆ vmsne_vx_i8mf2_b16

#define vmsne_vx_i8mf2_b16 ( ... ) __riscv_vmsne_vx_i8mf2_b16(__VA_ARGS__)

◆ vmsne_vx_i8mf2_b16_m

#define vmsne_vx_i8mf2_b16_m ( ... ) __riscv_vmsne_vx_i8mf2_b16_mu(__VA_ARGS__)

◆ vmsne_vx_i8mf4_b32

#define vmsne_vx_i8mf4_b32 ( ... ) __riscv_vmsne_vx_i8mf4_b32(__VA_ARGS__)

◆ vmsne_vx_i8mf4_b32_m

#define vmsne_vx_i8mf4_b32_m ( ... ) __riscv_vmsne_vx_i8mf4_b32_mu(__VA_ARGS__)

◆ vmsne_vx_i8mf8_b64

#define vmsne_vx_i8mf8_b64 ( ... ) __riscv_vmsne_vx_i8mf8_b64(__VA_ARGS__)

◆ vmsne_vx_i8mf8_b64_m

#define vmsne_vx_i8mf8_b64_m ( ... ) __riscv_vmsne_vx_i8mf8_b64_mu(__VA_ARGS__)

◆ vmsne_vx_u16m1_b16

#define vmsne_vx_u16m1_b16 ( ... ) __riscv_vmsne_vx_u16m1_b16(__VA_ARGS__)

◆ vmsne_vx_u16m1_b16_m

#define vmsne_vx_u16m1_b16_m ( ... ) __riscv_vmsne_vx_u16m1_b16_mu(__VA_ARGS__)

◆ vmsne_vx_u16m2_b8

#define vmsne_vx_u16m2_b8 ( ... ) __riscv_vmsne_vx_u16m2_b8(__VA_ARGS__)

◆ vmsne_vx_u16m2_b8_m

#define vmsne_vx_u16m2_b8_m ( ... ) __riscv_vmsne_vx_u16m2_b8_mu(__VA_ARGS__)

◆ vmsne_vx_u16m4_b4

#define vmsne_vx_u16m4_b4 ( ... ) __riscv_vmsne_vx_u16m4_b4(__VA_ARGS__)

◆ vmsne_vx_u16m4_b4_m

#define vmsne_vx_u16m4_b4_m ( ... ) __riscv_vmsne_vx_u16m4_b4_mu(__VA_ARGS__)

◆ vmsne_vx_u16m8_b2

#define vmsne_vx_u16m8_b2 ( ... ) __riscv_vmsne_vx_u16m8_b2(__VA_ARGS__)

◆ vmsne_vx_u16m8_b2_m

#define vmsne_vx_u16m8_b2_m ( ... ) __riscv_vmsne_vx_u16m8_b2_mu(__VA_ARGS__)

◆ vmsne_vx_u16mf2_b32

#define vmsne_vx_u16mf2_b32 ( ... ) __riscv_vmsne_vx_u16mf2_b32(__VA_ARGS__)

◆ vmsne_vx_u16mf2_b32_m

#define vmsne_vx_u16mf2_b32_m ( ... ) __riscv_vmsne_vx_u16mf2_b32_mu(__VA_ARGS__)

◆ vmsne_vx_u16mf4_b64

#define vmsne_vx_u16mf4_b64 ( ... ) __riscv_vmsne_vx_u16mf4_b64(__VA_ARGS__)

◆ vmsne_vx_u16mf4_b64_m

#define vmsne_vx_u16mf4_b64_m ( ... ) __riscv_vmsne_vx_u16mf4_b64_mu(__VA_ARGS__)

◆ vmsne_vx_u32m1_b32

#define vmsne_vx_u32m1_b32 ( ... ) __riscv_vmsne_vx_u32m1_b32(__VA_ARGS__)

◆ vmsne_vx_u32m1_b32_m

#define vmsne_vx_u32m1_b32_m ( ... ) __riscv_vmsne_vx_u32m1_b32_mu(__VA_ARGS__)

◆ vmsne_vx_u32m2_b16

#define vmsne_vx_u32m2_b16 ( ... ) __riscv_vmsne_vx_u32m2_b16(__VA_ARGS__)

◆ vmsne_vx_u32m2_b16_m

#define vmsne_vx_u32m2_b16_m ( ... ) __riscv_vmsne_vx_u32m2_b16_mu(__VA_ARGS__)

◆ vmsne_vx_u32m4_b8

#define vmsne_vx_u32m4_b8 ( ... ) __riscv_vmsne_vx_u32m4_b8(__VA_ARGS__)

◆ vmsne_vx_u32m4_b8_m

#define vmsne_vx_u32m4_b8_m ( ... ) __riscv_vmsne_vx_u32m4_b8_mu(__VA_ARGS__)

◆ vmsne_vx_u32m8_b4

#define vmsne_vx_u32m8_b4 ( ... ) __riscv_vmsne_vx_u32m8_b4(__VA_ARGS__)

◆ vmsne_vx_u32m8_b4_m

#define vmsne_vx_u32m8_b4_m ( ... ) __riscv_vmsne_vx_u32m8_b4_mu(__VA_ARGS__)

◆ vmsne_vx_u32mf2_b64

#define vmsne_vx_u32mf2_b64 ( ... ) __riscv_vmsne_vx_u32mf2_b64(__VA_ARGS__)

◆ vmsne_vx_u32mf2_b64_m

#define vmsne_vx_u32mf2_b64_m ( ... ) __riscv_vmsne_vx_u32mf2_b64_mu(__VA_ARGS__)

◆ vmsne_vx_u64m1_b64

#define vmsne_vx_u64m1_b64 ( ... ) __riscv_vmsne_vx_u64m1_b64(__VA_ARGS__)

◆ vmsne_vx_u64m1_b64_m

#define vmsne_vx_u64m1_b64_m ( ... ) __riscv_vmsne_vx_u64m1_b64_mu(__VA_ARGS__)

◆ vmsne_vx_u64m2_b32

#define vmsne_vx_u64m2_b32 ( ... ) __riscv_vmsne_vx_u64m2_b32(__VA_ARGS__)

◆ vmsne_vx_u64m2_b32_m

#define vmsne_vx_u64m2_b32_m ( ... ) __riscv_vmsne_vx_u64m2_b32_mu(__VA_ARGS__)

◆ vmsne_vx_u64m4_b16

#define vmsne_vx_u64m4_b16 ( ... ) __riscv_vmsne_vx_u64m4_b16(__VA_ARGS__)

◆ vmsne_vx_u64m4_b16_m

#define vmsne_vx_u64m4_b16_m ( ... ) __riscv_vmsne_vx_u64m4_b16_mu(__VA_ARGS__)

◆ vmsne_vx_u64m8_b8

#define vmsne_vx_u64m8_b8 ( ... ) __riscv_vmsne_vx_u64m8_b8(__VA_ARGS__)

◆ vmsne_vx_u64m8_b8_m

#define vmsne_vx_u64m8_b8_m ( ... ) __riscv_vmsne_vx_u64m8_b8_mu(__VA_ARGS__)

◆ vmsne_vx_u8m1_b8

#define vmsne_vx_u8m1_b8 ( ... ) __riscv_vmsne_vx_u8m1_b8(__VA_ARGS__)

◆ vmsne_vx_u8m1_b8_m

#define vmsne_vx_u8m1_b8_m ( ... ) __riscv_vmsne_vx_u8m1_b8_mu(__VA_ARGS__)

◆ vmsne_vx_u8m2_b4

#define vmsne_vx_u8m2_b4 ( ... ) __riscv_vmsne_vx_u8m2_b4(__VA_ARGS__)

◆ vmsne_vx_u8m2_b4_m

#define vmsne_vx_u8m2_b4_m ( ... ) __riscv_vmsne_vx_u8m2_b4_mu(__VA_ARGS__)

◆ vmsne_vx_u8m4_b2

#define vmsne_vx_u8m4_b2 ( ... ) __riscv_vmsne_vx_u8m4_b2(__VA_ARGS__)

◆ vmsne_vx_u8m4_b2_m

#define vmsne_vx_u8m4_b2_m ( ... ) __riscv_vmsne_vx_u8m4_b2_mu(__VA_ARGS__)

◆ vmsne_vx_u8m8_b1

#define vmsne_vx_u8m8_b1 ( ... ) __riscv_vmsne_vx_u8m8_b1(__VA_ARGS__)

◆ vmsne_vx_u8m8_b1_m

#define vmsne_vx_u8m8_b1_m ( ... ) __riscv_vmsne_vx_u8m8_b1_mu(__VA_ARGS__)

◆ vmsne_vx_u8mf2_b16

#define vmsne_vx_u8mf2_b16 ( ... ) __riscv_vmsne_vx_u8mf2_b16(__VA_ARGS__)

◆ vmsne_vx_u8mf2_b16_m

#define vmsne_vx_u8mf2_b16_m ( ... ) __riscv_vmsne_vx_u8mf2_b16_mu(__VA_ARGS__)

◆ vmsne_vx_u8mf4_b32

#define vmsne_vx_u8mf4_b32 ( ... ) __riscv_vmsne_vx_u8mf4_b32(__VA_ARGS__)

◆ vmsne_vx_u8mf4_b32_m

#define vmsne_vx_u8mf4_b32_m ( ... ) __riscv_vmsne_vx_u8mf4_b32_mu(__VA_ARGS__)

◆ vmsne_vx_u8mf8_b64

#define vmsne_vx_u8mf8_b64 ( ... ) __riscv_vmsne_vx_u8mf8_b64(__VA_ARGS__)

◆ vmsne_vx_u8mf8_b64_m

#define vmsne_vx_u8mf8_b64_m ( ... ) __riscv_vmsne_vx_u8mf8_b64_mu(__VA_ARGS__)

◆ vmsof_m_b1

#define vmsof_m_b1 ( ... ) __riscv_vmsof_m_b1(__VA_ARGS__)

◆ vmsof_m_b16

#define vmsof_m_b16 ( ... ) __riscv_vmsof_m_b16(__VA_ARGS__)

◆ vmsof_m_b16_m

#define vmsof_m_b16_m ( ... ) __riscv_vmsof_m_b16_mu(__VA_ARGS__)

◆ vmsof_m_b1_m

#define vmsof_m_b1_m ( ... ) __riscv_vmsof_m_b1_mu(__VA_ARGS__)

◆ vmsof_m_b2

#define vmsof_m_b2 ( ... ) __riscv_vmsof_m_b2(__VA_ARGS__)

◆ vmsof_m_b2_m

#define vmsof_m_b2_m ( ... ) __riscv_vmsof_m_b2_mu(__VA_ARGS__)

◆ vmsof_m_b32

#define vmsof_m_b32 ( ... ) __riscv_vmsof_m_b32(__VA_ARGS__)

◆ vmsof_m_b32_m

#define vmsof_m_b32_m ( ... ) __riscv_vmsof_m_b32_mu(__VA_ARGS__)

◆ vmsof_m_b4

#define vmsof_m_b4 ( ... ) __riscv_vmsof_m_b4(__VA_ARGS__)

◆ vmsof_m_b4_m

#define vmsof_m_b4_m ( ... ) __riscv_vmsof_m_b4_mu(__VA_ARGS__)

◆ vmsof_m_b64

#define vmsof_m_b64 ( ... ) __riscv_vmsof_m_b64(__VA_ARGS__)

◆ vmsof_m_b64_m

#define vmsof_m_b64_m ( ... ) __riscv_vmsof_m_b64_mu(__VA_ARGS__)

◆ vmsof_m_b8

#define vmsof_m_b8 ( ... ) __riscv_vmsof_m_b8(__VA_ARGS__)

◆ vmsof_m_b8_m

#define vmsof_m_b8_m ( ... ) __riscv_vmsof_m_b8_mu(__VA_ARGS__)

◆ vmul_vv_i16m1

#define vmul_vv_i16m1 ( ... ) __riscv_vmul_vv_i16m1(__VA_ARGS__)

◆ vmul_vv_i16m1_m

#define vmul_vv_i16m1_m ( ... ) __riscv_vmul_vv_i16m1_tumu(__VA_ARGS__)

◆ vmul_vv_i16m2

#define vmul_vv_i16m2 ( ... ) __riscv_vmul_vv_i16m2(__VA_ARGS__)

◆ vmul_vv_i16m2_m

#define vmul_vv_i16m2_m ( ... ) __riscv_vmul_vv_i16m2_tumu(__VA_ARGS__)

◆ vmul_vv_i16m4

#define vmul_vv_i16m4 ( ... ) __riscv_vmul_vv_i16m4(__VA_ARGS__)

◆ vmul_vv_i16m4_m

#define vmul_vv_i16m4_m ( ... ) __riscv_vmul_vv_i16m4_tumu(__VA_ARGS__)

◆ vmul_vv_i16m8

#define vmul_vv_i16m8 ( ... ) __riscv_vmul_vv_i16m8(__VA_ARGS__)

◆ vmul_vv_i16m8_m

#define vmul_vv_i16m8_m ( ... ) __riscv_vmul_vv_i16m8_tumu(__VA_ARGS__)

◆ vmul_vv_i16mf2

#define vmul_vv_i16mf2 ( ... ) __riscv_vmul_vv_i16mf2(__VA_ARGS__)

◆ vmul_vv_i16mf2_m

#define vmul_vv_i16mf2_m ( ... ) __riscv_vmul_vv_i16mf2_tumu(__VA_ARGS__)

◆ vmul_vv_i16mf4

#define vmul_vv_i16mf4 ( ... ) __riscv_vmul_vv_i16mf4(__VA_ARGS__)

◆ vmul_vv_i16mf4_m

#define vmul_vv_i16mf4_m ( ... ) __riscv_vmul_vv_i16mf4_tumu(__VA_ARGS__)

◆ vmul_vv_i32m1

#define vmul_vv_i32m1 ( ... ) __riscv_vmul_vv_i32m1(__VA_ARGS__)

◆ vmul_vv_i32m1_m

#define vmul_vv_i32m1_m ( ... ) __riscv_vmul_vv_i32m1_tumu(__VA_ARGS__)

◆ vmul_vv_i32m2

#define vmul_vv_i32m2 ( ... ) __riscv_vmul_vv_i32m2(__VA_ARGS__)

◆ vmul_vv_i32m2_m

#define vmul_vv_i32m2_m ( ... ) __riscv_vmul_vv_i32m2_tumu(__VA_ARGS__)

◆ vmul_vv_i32m4

#define vmul_vv_i32m4 ( ... ) __riscv_vmul_vv_i32m4(__VA_ARGS__)

◆ vmul_vv_i32m4_m

#define vmul_vv_i32m4_m ( ... ) __riscv_vmul_vv_i32m4_tumu(__VA_ARGS__)

◆ vmul_vv_i32m8

#define vmul_vv_i32m8 ( ... ) __riscv_vmul_vv_i32m8(__VA_ARGS__)

◆ vmul_vv_i32m8_m

#define vmul_vv_i32m8_m ( ... ) __riscv_vmul_vv_i32m8_tumu(__VA_ARGS__)

◆ vmul_vv_i32mf2

#define vmul_vv_i32mf2 ( ... ) __riscv_vmul_vv_i32mf2(__VA_ARGS__)

◆ vmul_vv_i32mf2_m

#define vmul_vv_i32mf2_m ( ... ) __riscv_vmul_vv_i32mf2_tumu(__VA_ARGS__)

◆ vmul_vv_i64m1

#define vmul_vv_i64m1 ( ... ) __riscv_vmul_vv_i64m1(__VA_ARGS__)

◆ vmul_vv_i64m1_m

#define vmul_vv_i64m1_m ( ... ) __riscv_vmul_vv_i64m1_tumu(__VA_ARGS__)

◆ vmul_vv_i64m2

#define vmul_vv_i64m2 ( ... ) __riscv_vmul_vv_i64m2(__VA_ARGS__)

◆ vmul_vv_i64m2_m

#define vmul_vv_i64m2_m ( ... ) __riscv_vmul_vv_i64m2_tumu(__VA_ARGS__)

◆ vmul_vv_i64m4

#define vmul_vv_i64m4 ( ... ) __riscv_vmul_vv_i64m4(__VA_ARGS__)

◆ vmul_vv_i64m4_m

#define vmul_vv_i64m4_m ( ... ) __riscv_vmul_vv_i64m4_tumu(__VA_ARGS__)

◆ vmul_vv_i64m8

#define vmul_vv_i64m8 ( ... ) __riscv_vmul_vv_i64m8(__VA_ARGS__)

◆ vmul_vv_i64m8_m

#define vmul_vv_i64m8_m ( ... ) __riscv_vmul_vv_i64m8_tumu(__VA_ARGS__)

◆ vmul_vv_i8m1

#define vmul_vv_i8m1 ( ... ) __riscv_vmul_vv_i8m1(__VA_ARGS__)

◆ vmul_vv_i8m1_m

#define vmul_vv_i8m1_m ( ... ) __riscv_vmul_vv_i8m1_tumu(__VA_ARGS__)

◆ vmul_vv_i8m2

#define vmul_vv_i8m2 ( ... ) __riscv_vmul_vv_i8m2(__VA_ARGS__)

◆ vmul_vv_i8m2_m

#define vmul_vv_i8m2_m ( ... ) __riscv_vmul_vv_i8m2_tumu(__VA_ARGS__)

◆ vmul_vv_i8m4

#define vmul_vv_i8m4 ( ... ) __riscv_vmul_vv_i8m4(__VA_ARGS__)

◆ vmul_vv_i8m4_m

#define vmul_vv_i8m4_m ( ... ) __riscv_vmul_vv_i8m4_tumu(__VA_ARGS__)

◆ vmul_vv_i8m8

#define vmul_vv_i8m8 ( ... ) __riscv_vmul_vv_i8m8(__VA_ARGS__)

◆ vmul_vv_i8m8_m

#define vmul_vv_i8m8_m ( ... ) __riscv_vmul_vv_i8m8_tumu(__VA_ARGS__)

◆ vmul_vv_i8mf2

#define vmul_vv_i8mf2 ( ... ) __riscv_vmul_vv_i8mf2(__VA_ARGS__)

◆ vmul_vv_i8mf2_m

#define vmul_vv_i8mf2_m ( ... ) __riscv_vmul_vv_i8mf2_tumu(__VA_ARGS__)

◆ vmul_vv_i8mf4

#define vmul_vv_i8mf4 ( ... ) __riscv_vmul_vv_i8mf4(__VA_ARGS__)

◆ vmul_vv_i8mf4_m

#define vmul_vv_i8mf4_m ( ... ) __riscv_vmul_vv_i8mf4_tumu(__VA_ARGS__)

◆ vmul_vv_i8mf8

#define vmul_vv_i8mf8 ( ... ) __riscv_vmul_vv_i8mf8(__VA_ARGS__)

◆ vmul_vv_i8mf8_m

#define vmul_vv_i8mf8_m ( ... ) __riscv_vmul_vv_i8mf8_tumu(__VA_ARGS__)

◆ vmul_vv_u16m1

#define vmul_vv_u16m1 ( ... ) __riscv_vmul_vv_u16m1(__VA_ARGS__)

◆ vmul_vv_u16m1_m

#define vmul_vv_u16m1_m ( ... ) __riscv_vmul_vv_u16m1_tumu(__VA_ARGS__)

◆ vmul_vv_u16m2

#define vmul_vv_u16m2 ( ... ) __riscv_vmul_vv_u16m2(__VA_ARGS__)

◆ vmul_vv_u16m2_m

#define vmul_vv_u16m2_m ( ... ) __riscv_vmul_vv_u16m2_tumu(__VA_ARGS__)

◆ vmul_vv_u16m4

#define vmul_vv_u16m4 ( ... ) __riscv_vmul_vv_u16m4(__VA_ARGS__)

◆ vmul_vv_u16m4_m

#define vmul_vv_u16m4_m ( ... ) __riscv_vmul_vv_u16m4_tumu(__VA_ARGS__)

◆ vmul_vv_u16m8

#define vmul_vv_u16m8 ( ... ) __riscv_vmul_vv_u16m8(__VA_ARGS__)

◆ vmul_vv_u16m8_m

#define vmul_vv_u16m8_m ( ... ) __riscv_vmul_vv_u16m8_tumu(__VA_ARGS__)

◆ vmul_vv_u16mf2

#define vmul_vv_u16mf2 ( ... ) __riscv_vmul_vv_u16mf2(__VA_ARGS__)

◆ vmul_vv_u16mf2_m

#define vmul_vv_u16mf2_m ( ... ) __riscv_vmul_vv_u16mf2_tumu(__VA_ARGS__)

◆ vmul_vv_u16mf4

#define vmul_vv_u16mf4 ( ... ) __riscv_vmul_vv_u16mf4(__VA_ARGS__)

◆ vmul_vv_u16mf4_m

#define vmul_vv_u16mf4_m ( ... ) __riscv_vmul_vv_u16mf4_tumu(__VA_ARGS__)

◆ vmul_vv_u32m1

#define vmul_vv_u32m1 ( ... ) __riscv_vmul_vv_u32m1(__VA_ARGS__)

◆ vmul_vv_u32m1_m

#define vmul_vv_u32m1_m ( ... ) __riscv_vmul_vv_u32m1_tumu(__VA_ARGS__)

◆ vmul_vv_u32m2

#define vmul_vv_u32m2 ( ... ) __riscv_vmul_vv_u32m2(__VA_ARGS__)

◆ vmul_vv_u32m2_m

#define vmul_vv_u32m2_m ( ... ) __riscv_vmul_vv_u32m2_tumu(__VA_ARGS__)

◆ vmul_vv_u32m4

#define vmul_vv_u32m4 ( ... ) __riscv_vmul_vv_u32m4(__VA_ARGS__)

◆ vmul_vv_u32m4_m

#define vmul_vv_u32m4_m ( ... ) __riscv_vmul_vv_u32m4_tumu(__VA_ARGS__)

◆ vmul_vv_u32m8

#define vmul_vv_u32m8 ( ... ) __riscv_vmul_vv_u32m8(__VA_ARGS__)

◆ vmul_vv_u32m8_m

#define vmul_vv_u32m8_m ( ... ) __riscv_vmul_vv_u32m8_tumu(__VA_ARGS__)

◆ vmul_vv_u32mf2

#define vmul_vv_u32mf2 ( ... ) __riscv_vmul_vv_u32mf2(__VA_ARGS__)

◆ vmul_vv_u32mf2_m

#define vmul_vv_u32mf2_m ( ... ) __riscv_vmul_vv_u32mf2_tumu(__VA_ARGS__)

◆ vmul_vv_u64m1

#define vmul_vv_u64m1 ( ... ) __riscv_vmul_vv_u64m1(__VA_ARGS__)

◆ vmul_vv_u64m1_m

#define vmul_vv_u64m1_m ( ... ) __riscv_vmul_vv_u64m1_tumu(__VA_ARGS__)

◆ vmul_vv_u64m2

#define vmul_vv_u64m2 ( ... ) __riscv_vmul_vv_u64m2(__VA_ARGS__)

◆ vmul_vv_u64m2_m

#define vmul_vv_u64m2_m ( ... ) __riscv_vmul_vv_u64m2_tumu(__VA_ARGS__)

◆ vmul_vv_u64m4

#define vmul_vv_u64m4 ( ... ) __riscv_vmul_vv_u64m4(__VA_ARGS__)

◆ vmul_vv_u64m4_m

#define vmul_vv_u64m4_m ( ... ) __riscv_vmul_vv_u64m4_tumu(__VA_ARGS__)

◆ vmul_vv_u64m8

#define vmul_vv_u64m8 ( ... ) __riscv_vmul_vv_u64m8(__VA_ARGS__)

◆ vmul_vv_u64m8_m

#define vmul_vv_u64m8_m ( ... ) __riscv_vmul_vv_u64m8_tumu(__VA_ARGS__)

◆ vmul_vv_u8m1

#define vmul_vv_u8m1 ( ... ) __riscv_vmul_vv_u8m1(__VA_ARGS__)

◆ vmul_vv_u8m1_m

#define vmul_vv_u8m1_m ( ... ) __riscv_vmul_vv_u8m1_tumu(__VA_ARGS__)

◆ vmul_vv_u8m2

#define vmul_vv_u8m2 ( ... ) __riscv_vmul_vv_u8m2(__VA_ARGS__)

◆ vmul_vv_u8m2_m

#define vmul_vv_u8m2_m ( ... ) __riscv_vmul_vv_u8m2_tumu(__VA_ARGS__)

◆ vmul_vv_u8m4

#define vmul_vv_u8m4 ( ... ) __riscv_vmul_vv_u8m4(__VA_ARGS__)

◆ vmul_vv_u8m4_m

#define vmul_vv_u8m4_m ( ... ) __riscv_vmul_vv_u8m4_tumu(__VA_ARGS__)

◆ vmul_vv_u8m8

#define vmul_vv_u8m8 ( ... ) __riscv_vmul_vv_u8m8(__VA_ARGS__)

◆ vmul_vv_u8m8_m

#define vmul_vv_u8m8_m ( ... ) __riscv_vmul_vv_u8m8_tumu(__VA_ARGS__)

◆ vmul_vv_u8mf2

#define vmul_vv_u8mf2 ( ... ) __riscv_vmul_vv_u8mf2(__VA_ARGS__)

◆ vmul_vv_u8mf2_m

#define vmul_vv_u8mf2_m ( ... ) __riscv_vmul_vv_u8mf2_tumu(__VA_ARGS__)

◆ vmul_vv_u8mf4

#define vmul_vv_u8mf4 ( ... ) __riscv_vmul_vv_u8mf4(__VA_ARGS__)

◆ vmul_vv_u8mf4_m

#define vmul_vv_u8mf4_m ( ... ) __riscv_vmul_vv_u8mf4_tumu(__VA_ARGS__)

◆ vmul_vv_u8mf8

#define vmul_vv_u8mf8 ( ... ) __riscv_vmul_vv_u8mf8(__VA_ARGS__)

◆ vmul_vv_u8mf8_m

#define vmul_vv_u8mf8_m ( ... ) __riscv_vmul_vv_u8mf8_tumu(__VA_ARGS__)

◆ vmul_vx_i16m1

#define vmul_vx_i16m1 ( ... ) __riscv_vmul_vx_i16m1(__VA_ARGS__)

◆ vmul_vx_i16m1_m

#define vmul_vx_i16m1_m ( ... ) __riscv_vmul_vx_i16m1_tumu(__VA_ARGS__)

◆ vmul_vx_i16m2

#define vmul_vx_i16m2 ( ... ) __riscv_vmul_vx_i16m2(__VA_ARGS__)

◆ vmul_vx_i16m2_m

#define vmul_vx_i16m2_m ( ... ) __riscv_vmul_vx_i16m2_tumu(__VA_ARGS__)

◆ vmul_vx_i16m4

#define vmul_vx_i16m4 ( ... ) __riscv_vmul_vx_i16m4(__VA_ARGS__)

◆ vmul_vx_i16m4_m

#define vmul_vx_i16m4_m ( ... ) __riscv_vmul_vx_i16m4_tumu(__VA_ARGS__)

◆ vmul_vx_i16m8

#define vmul_vx_i16m8 ( ... ) __riscv_vmul_vx_i16m8(__VA_ARGS__)

◆ vmul_vx_i16m8_m

#define vmul_vx_i16m8_m ( ... ) __riscv_vmul_vx_i16m8_tumu(__VA_ARGS__)

◆ vmul_vx_i16mf2

#define vmul_vx_i16mf2 ( ... ) __riscv_vmul_vx_i16mf2(__VA_ARGS__)

◆ vmul_vx_i16mf2_m

#define vmul_vx_i16mf2_m ( ... ) __riscv_vmul_vx_i16mf2_tumu(__VA_ARGS__)

◆ vmul_vx_i16mf4

#define vmul_vx_i16mf4 ( ... ) __riscv_vmul_vx_i16mf4(__VA_ARGS__)

◆ vmul_vx_i16mf4_m

#define vmul_vx_i16mf4_m ( ... ) __riscv_vmul_vx_i16mf4_tumu(__VA_ARGS__)

◆ vmul_vx_i32m1

#define vmul_vx_i32m1 ( ... ) __riscv_vmul_vx_i32m1(__VA_ARGS__)

◆ vmul_vx_i32m1_m

#define vmul_vx_i32m1_m ( ... ) __riscv_vmul_vx_i32m1_tumu(__VA_ARGS__)

◆ vmul_vx_i32m2

#define vmul_vx_i32m2 ( ... ) __riscv_vmul_vx_i32m2(__VA_ARGS__)

◆ vmul_vx_i32m2_m

#define vmul_vx_i32m2_m ( ... ) __riscv_vmul_vx_i32m2_tumu(__VA_ARGS__)

◆ vmul_vx_i32m4

#define vmul_vx_i32m4 ( ... ) __riscv_vmul_vx_i32m4(__VA_ARGS__)

◆ vmul_vx_i32m4_m

#define vmul_vx_i32m4_m ( ... ) __riscv_vmul_vx_i32m4_tumu(__VA_ARGS__)

◆ vmul_vx_i32m8

#define vmul_vx_i32m8 ( ... ) __riscv_vmul_vx_i32m8(__VA_ARGS__)

◆ vmul_vx_i32m8_m

#define vmul_vx_i32m8_m ( ... ) __riscv_vmul_vx_i32m8_tumu(__VA_ARGS__)

◆ vmul_vx_i32mf2

#define vmul_vx_i32mf2 ( ... ) __riscv_vmul_vx_i32mf2(__VA_ARGS__)

◆ vmul_vx_i32mf2_m

#define vmul_vx_i32mf2_m ( ... ) __riscv_vmul_vx_i32mf2_tumu(__VA_ARGS__)

◆ vmul_vx_i64m1

#define vmul_vx_i64m1 ( ... ) __riscv_vmul_vx_i64m1(__VA_ARGS__)

◆ vmul_vx_i64m1_m

#define vmul_vx_i64m1_m ( ... ) __riscv_vmul_vx_i64m1_tumu(__VA_ARGS__)

◆ vmul_vx_i64m2

#define vmul_vx_i64m2 ( ... ) __riscv_vmul_vx_i64m2(__VA_ARGS__)

◆ vmul_vx_i64m2_m

#define vmul_vx_i64m2_m ( ... ) __riscv_vmul_vx_i64m2_tumu(__VA_ARGS__)

◆ vmul_vx_i64m4

#define vmul_vx_i64m4 ( ... ) __riscv_vmul_vx_i64m4(__VA_ARGS__)

◆ vmul_vx_i64m4_m

#define vmul_vx_i64m4_m ( ... ) __riscv_vmul_vx_i64m4_tumu(__VA_ARGS__)

◆ vmul_vx_i64m8

#define vmul_vx_i64m8 ( ... ) __riscv_vmul_vx_i64m8(__VA_ARGS__)

◆ vmul_vx_i64m8_m

#define vmul_vx_i64m8_m ( ... ) __riscv_vmul_vx_i64m8_tumu(__VA_ARGS__)

◆ vmul_vx_i8m1

#define vmul_vx_i8m1 ( ... ) __riscv_vmul_vx_i8m1(__VA_ARGS__)

◆ vmul_vx_i8m1_m

#define vmul_vx_i8m1_m ( ... ) __riscv_vmul_vx_i8m1_tumu(__VA_ARGS__)

◆ vmul_vx_i8m2

#define vmul_vx_i8m2 ( ... ) __riscv_vmul_vx_i8m2(__VA_ARGS__)

◆ vmul_vx_i8m2_m

#define vmul_vx_i8m2_m ( ... ) __riscv_vmul_vx_i8m2_tumu(__VA_ARGS__)

◆ vmul_vx_i8m4

#define vmul_vx_i8m4 ( ... ) __riscv_vmul_vx_i8m4(__VA_ARGS__)

◆ vmul_vx_i8m4_m

#define vmul_vx_i8m4_m ( ... ) __riscv_vmul_vx_i8m4_tumu(__VA_ARGS__)

◆ vmul_vx_i8m8

#define vmul_vx_i8m8 ( ... ) __riscv_vmul_vx_i8m8(__VA_ARGS__)

◆ vmul_vx_i8m8_m

#define vmul_vx_i8m8_m ( ... ) __riscv_vmul_vx_i8m8_tumu(__VA_ARGS__)

◆ vmul_vx_i8mf2

#define vmul_vx_i8mf2 ( ... ) __riscv_vmul_vx_i8mf2(__VA_ARGS__)

◆ vmul_vx_i8mf2_m

#define vmul_vx_i8mf2_m ( ... ) __riscv_vmul_vx_i8mf2_tumu(__VA_ARGS__)

◆ vmul_vx_i8mf4

#define vmul_vx_i8mf4 ( ... ) __riscv_vmul_vx_i8mf4(__VA_ARGS__)

◆ vmul_vx_i8mf4_m

#define vmul_vx_i8mf4_m ( ... ) __riscv_vmul_vx_i8mf4_tumu(__VA_ARGS__)

◆ vmul_vx_i8mf8

#define vmul_vx_i8mf8 ( ... ) __riscv_vmul_vx_i8mf8(__VA_ARGS__)

◆ vmul_vx_i8mf8_m

#define vmul_vx_i8mf8_m ( ... ) __riscv_vmul_vx_i8mf8_tumu(__VA_ARGS__)

◆ vmul_vx_u16m1

#define vmul_vx_u16m1 ( ... ) __riscv_vmul_vx_u16m1(__VA_ARGS__)

◆ vmul_vx_u16m1_m

#define vmul_vx_u16m1_m ( ... ) __riscv_vmul_vx_u16m1_tumu(__VA_ARGS__)

◆ vmul_vx_u16m2

#define vmul_vx_u16m2 ( ... ) __riscv_vmul_vx_u16m2(__VA_ARGS__)

◆ vmul_vx_u16m2_m

#define vmul_vx_u16m2_m ( ... ) __riscv_vmul_vx_u16m2_tumu(__VA_ARGS__)

◆ vmul_vx_u16m4

#define vmul_vx_u16m4 ( ... ) __riscv_vmul_vx_u16m4(__VA_ARGS__)

◆ vmul_vx_u16m4_m

#define vmul_vx_u16m4_m ( ... ) __riscv_vmul_vx_u16m4_tumu(__VA_ARGS__)

◆ vmul_vx_u16m8

#define vmul_vx_u16m8 ( ... ) __riscv_vmul_vx_u16m8(__VA_ARGS__)

◆ vmul_vx_u16m8_m

#define vmul_vx_u16m8_m ( ... ) __riscv_vmul_vx_u16m8_tumu(__VA_ARGS__)

◆ vmul_vx_u16mf2

#define vmul_vx_u16mf2 ( ... ) __riscv_vmul_vx_u16mf2(__VA_ARGS__)

◆ vmul_vx_u16mf2_m

#define vmul_vx_u16mf2_m ( ... ) __riscv_vmul_vx_u16mf2_tumu(__VA_ARGS__)

◆ vmul_vx_u16mf4

#define vmul_vx_u16mf4 ( ... ) __riscv_vmul_vx_u16mf4(__VA_ARGS__)

◆ vmul_vx_u16mf4_m

#define vmul_vx_u16mf4_m ( ... ) __riscv_vmul_vx_u16mf4_tumu(__VA_ARGS__)

◆ vmul_vx_u32m1

#define vmul_vx_u32m1 ( ... ) __riscv_vmul_vx_u32m1(__VA_ARGS__)

◆ vmul_vx_u32m1_m

#define vmul_vx_u32m1_m ( ... ) __riscv_vmul_vx_u32m1_tumu(__VA_ARGS__)

◆ vmul_vx_u32m2

#define vmul_vx_u32m2 ( ... ) __riscv_vmul_vx_u32m2(__VA_ARGS__)

◆ vmul_vx_u32m2_m

#define vmul_vx_u32m2_m ( ... ) __riscv_vmul_vx_u32m2_tumu(__VA_ARGS__)

◆ vmul_vx_u32m4

#define vmul_vx_u32m4 ( ... ) __riscv_vmul_vx_u32m4(__VA_ARGS__)

◆ vmul_vx_u32m4_m

#define vmul_vx_u32m4_m ( ... ) __riscv_vmul_vx_u32m4_tumu(__VA_ARGS__)

◆ vmul_vx_u32m8

#define vmul_vx_u32m8 ( ... ) __riscv_vmul_vx_u32m8(__VA_ARGS__)

◆ vmul_vx_u32m8_m

#define vmul_vx_u32m8_m ( ... ) __riscv_vmul_vx_u32m8_tumu(__VA_ARGS__)

◆ vmul_vx_u32mf2

#define vmul_vx_u32mf2 ( ... ) __riscv_vmul_vx_u32mf2(__VA_ARGS__)

◆ vmul_vx_u32mf2_m

#define vmul_vx_u32mf2_m ( ... ) __riscv_vmul_vx_u32mf2_tumu(__VA_ARGS__)

◆ vmul_vx_u64m1

#define vmul_vx_u64m1 ( ... ) __riscv_vmul_vx_u64m1(__VA_ARGS__)

◆ vmul_vx_u64m1_m

#define vmul_vx_u64m1_m ( ... ) __riscv_vmul_vx_u64m1_tumu(__VA_ARGS__)

◆ vmul_vx_u64m2

#define vmul_vx_u64m2 ( ... ) __riscv_vmul_vx_u64m2(__VA_ARGS__)

◆ vmul_vx_u64m2_m

#define vmul_vx_u64m2_m ( ... ) __riscv_vmul_vx_u64m2_tumu(__VA_ARGS__)

◆ vmul_vx_u64m4

#define vmul_vx_u64m4 ( ... ) __riscv_vmul_vx_u64m4(__VA_ARGS__)

◆ vmul_vx_u64m4_m

#define vmul_vx_u64m4_m ( ... ) __riscv_vmul_vx_u64m4_tumu(__VA_ARGS__)

◆ vmul_vx_u64m8

#define vmul_vx_u64m8 ( ... ) __riscv_vmul_vx_u64m8(__VA_ARGS__)

◆ vmul_vx_u64m8_m

#define vmul_vx_u64m8_m ( ... ) __riscv_vmul_vx_u64m8_tumu(__VA_ARGS__)

◆ vmul_vx_u8m1

#define vmul_vx_u8m1 ( ... ) __riscv_vmul_vx_u8m1(__VA_ARGS__)

◆ vmul_vx_u8m1_m

#define vmul_vx_u8m1_m ( ... ) __riscv_vmul_vx_u8m1_tumu(__VA_ARGS__)

◆ vmul_vx_u8m2

#define vmul_vx_u8m2 ( ... ) __riscv_vmul_vx_u8m2(__VA_ARGS__)

◆ vmul_vx_u8m2_m

#define vmul_vx_u8m2_m ( ... ) __riscv_vmul_vx_u8m2_tumu(__VA_ARGS__)

◆ vmul_vx_u8m4

#define vmul_vx_u8m4 ( ... ) __riscv_vmul_vx_u8m4(__VA_ARGS__)

◆ vmul_vx_u8m4_m

#define vmul_vx_u8m4_m ( ... ) __riscv_vmul_vx_u8m4_tumu(__VA_ARGS__)

◆ vmul_vx_u8m8

#define vmul_vx_u8m8 ( ... ) __riscv_vmul_vx_u8m8(__VA_ARGS__)

◆ vmul_vx_u8m8_m

#define vmul_vx_u8m8_m ( ... ) __riscv_vmul_vx_u8m8_tumu(__VA_ARGS__)

◆ vmul_vx_u8mf2

#define vmul_vx_u8mf2 ( ... ) __riscv_vmul_vx_u8mf2(__VA_ARGS__)

◆ vmul_vx_u8mf2_m

#define vmul_vx_u8mf2_m ( ... ) __riscv_vmul_vx_u8mf2_tumu(__VA_ARGS__)

◆ vmul_vx_u8mf4

#define vmul_vx_u8mf4 ( ... ) __riscv_vmul_vx_u8mf4(__VA_ARGS__)

◆ vmul_vx_u8mf4_m

#define vmul_vx_u8mf4_m ( ... ) __riscv_vmul_vx_u8mf4_tumu(__VA_ARGS__)

◆ vmul_vx_u8mf8

#define vmul_vx_u8mf8 ( ... ) __riscv_vmul_vx_u8mf8(__VA_ARGS__)

◆ vmul_vx_u8mf8_m

#define vmul_vx_u8mf8_m ( ... ) __riscv_vmul_vx_u8mf8_tumu(__VA_ARGS__)

◆ vmulh_vv_i16m1

#define vmulh_vv_i16m1 ( ... ) __riscv_vmulh_vv_i16m1(__VA_ARGS__)

◆ vmulh_vv_i16m1_m

#define vmulh_vv_i16m1_m ( ... ) __riscv_vmulh_vv_i16m1_tumu(__VA_ARGS__)

◆ vmulh_vv_i16m2

#define vmulh_vv_i16m2 ( ... ) __riscv_vmulh_vv_i16m2(__VA_ARGS__)

◆ vmulh_vv_i16m2_m

#define vmulh_vv_i16m2_m ( ... ) __riscv_vmulh_vv_i16m2_tumu(__VA_ARGS__)

◆ vmulh_vv_i16m4

#define vmulh_vv_i16m4 ( ... ) __riscv_vmulh_vv_i16m4(__VA_ARGS__)

◆ vmulh_vv_i16m4_m

#define vmulh_vv_i16m4_m ( ... ) __riscv_vmulh_vv_i16m4_tumu(__VA_ARGS__)

◆ vmulh_vv_i16m8

#define vmulh_vv_i16m8 ( ... ) __riscv_vmulh_vv_i16m8(__VA_ARGS__)

◆ vmulh_vv_i16m8_m

#define vmulh_vv_i16m8_m ( ... ) __riscv_vmulh_vv_i16m8_tumu(__VA_ARGS__)

◆ vmulh_vv_i16mf2

#define vmulh_vv_i16mf2 ( ... ) __riscv_vmulh_vv_i16mf2(__VA_ARGS__)

◆ vmulh_vv_i16mf2_m

#define vmulh_vv_i16mf2_m ( ... ) __riscv_vmulh_vv_i16mf2_tumu(__VA_ARGS__)

◆ vmulh_vv_i16mf4

#define vmulh_vv_i16mf4 ( ... ) __riscv_vmulh_vv_i16mf4(__VA_ARGS__)

◆ vmulh_vv_i16mf4_m

#define vmulh_vv_i16mf4_m ( ... ) __riscv_vmulh_vv_i16mf4_tumu(__VA_ARGS__)

◆ vmulh_vv_i32m1

#define vmulh_vv_i32m1 ( ... ) __riscv_vmulh_vv_i32m1(__VA_ARGS__)

◆ vmulh_vv_i32m1_m

#define vmulh_vv_i32m1_m ( ... ) __riscv_vmulh_vv_i32m1_tumu(__VA_ARGS__)

◆ vmulh_vv_i32m2

#define vmulh_vv_i32m2 ( ... ) __riscv_vmulh_vv_i32m2(__VA_ARGS__)

◆ vmulh_vv_i32m2_m

#define vmulh_vv_i32m2_m ( ... ) __riscv_vmulh_vv_i32m2_tumu(__VA_ARGS__)

◆ vmulh_vv_i32m4

#define vmulh_vv_i32m4 ( ... ) __riscv_vmulh_vv_i32m4(__VA_ARGS__)

◆ vmulh_vv_i32m4_m

#define vmulh_vv_i32m4_m ( ... ) __riscv_vmulh_vv_i32m4_tumu(__VA_ARGS__)

◆ vmulh_vv_i32m8

#define vmulh_vv_i32m8 ( ... ) __riscv_vmulh_vv_i32m8(__VA_ARGS__)

◆ vmulh_vv_i32m8_m

#define vmulh_vv_i32m8_m ( ... ) __riscv_vmulh_vv_i32m8_tumu(__VA_ARGS__)

◆ vmulh_vv_i32mf2

#define vmulh_vv_i32mf2 ( ... ) __riscv_vmulh_vv_i32mf2(__VA_ARGS__)

◆ vmulh_vv_i32mf2_m

#define vmulh_vv_i32mf2_m ( ... ) __riscv_vmulh_vv_i32mf2_tumu(__VA_ARGS__)

◆ vmulh_vv_i64m1

#define vmulh_vv_i64m1 ( ... ) __riscv_vmulh_vv_i64m1(__VA_ARGS__)

◆ vmulh_vv_i64m1_m

#define vmulh_vv_i64m1_m ( ... ) __riscv_vmulh_vv_i64m1_tumu(__VA_ARGS__)

◆ vmulh_vv_i64m2

#define vmulh_vv_i64m2 ( ... ) __riscv_vmulh_vv_i64m2(__VA_ARGS__)

◆ vmulh_vv_i64m2_m

#define vmulh_vv_i64m2_m ( ... ) __riscv_vmulh_vv_i64m2_tumu(__VA_ARGS__)

◆ vmulh_vv_i64m4

#define vmulh_vv_i64m4 ( ... ) __riscv_vmulh_vv_i64m4(__VA_ARGS__)

◆ vmulh_vv_i64m4_m

#define vmulh_vv_i64m4_m ( ... ) __riscv_vmulh_vv_i64m4_tumu(__VA_ARGS__)

◆ vmulh_vv_i64m8

#define vmulh_vv_i64m8 ( ... ) __riscv_vmulh_vv_i64m8(__VA_ARGS__)

◆ vmulh_vv_i64m8_m

#define vmulh_vv_i64m8_m ( ... ) __riscv_vmulh_vv_i64m8_tumu(__VA_ARGS__)

◆ vmulh_vv_i8m1

#define vmulh_vv_i8m1 ( ... ) __riscv_vmulh_vv_i8m1(__VA_ARGS__)

◆ vmulh_vv_i8m1_m

#define vmulh_vv_i8m1_m ( ... ) __riscv_vmulh_vv_i8m1_tumu(__VA_ARGS__)

◆ vmulh_vv_i8m2

#define vmulh_vv_i8m2 ( ... ) __riscv_vmulh_vv_i8m2(__VA_ARGS__)

◆ vmulh_vv_i8m2_m

#define vmulh_vv_i8m2_m ( ... ) __riscv_vmulh_vv_i8m2_tumu(__VA_ARGS__)

◆ vmulh_vv_i8m4

#define vmulh_vv_i8m4 ( ... ) __riscv_vmulh_vv_i8m4(__VA_ARGS__)

◆ vmulh_vv_i8m4_m

#define vmulh_vv_i8m4_m ( ... ) __riscv_vmulh_vv_i8m4_tumu(__VA_ARGS__)

◆ vmulh_vv_i8m8

#define vmulh_vv_i8m8 ( ... ) __riscv_vmulh_vv_i8m8(__VA_ARGS__)

◆ vmulh_vv_i8m8_m

#define vmulh_vv_i8m8_m ( ... ) __riscv_vmulh_vv_i8m8_tumu(__VA_ARGS__)

◆ vmulh_vv_i8mf2

#define vmulh_vv_i8mf2 ( ... ) __riscv_vmulh_vv_i8mf2(__VA_ARGS__)

◆ vmulh_vv_i8mf2_m

#define vmulh_vv_i8mf2_m ( ... ) __riscv_vmulh_vv_i8mf2_tumu(__VA_ARGS__)

◆ vmulh_vv_i8mf4

#define vmulh_vv_i8mf4 ( ... ) __riscv_vmulh_vv_i8mf4(__VA_ARGS__)

◆ vmulh_vv_i8mf4_m

#define vmulh_vv_i8mf4_m ( ... ) __riscv_vmulh_vv_i8mf4_tumu(__VA_ARGS__)

◆ vmulh_vv_i8mf8

#define vmulh_vv_i8mf8 ( ... ) __riscv_vmulh_vv_i8mf8(__VA_ARGS__)

◆ vmulh_vv_i8mf8_m

#define vmulh_vv_i8mf8_m ( ... ) __riscv_vmulh_vv_i8mf8_tumu(__VA_ARGS__)

◆ vmulh_vx_i16m1

#define vmulh_vx_i16m1 ( ... ) __riscv_vmulh_vx_i16m1(__VA_ARGS__)

◆ vmulh_vx_i16m1_m

#define vmulh_vx_i16m1_m ( ... ) __riscv_vmulh_vx_i16m1_tumu(__VA_ARGS__)

◆ vmulh_vx_i16m2

#define vmulh_vx_i16m2 ( ... ) __riscv_vmulh_vx_i16m2(__VA_ARGS__)

◆ vmulh_vx_i16m2_m

#define vmulh_vx_i16m2_m ( ... ) __riscv_vmulh_vx_i16m2_tumu(__VA_ARGS__)

◆ vmulh_vx_i16m4

#define vmulh_vx_i16m4 ( ... ) __riscv_vmulh_vx_i16m4(__VA_ARGS__)

◆ vmulh_vx_i16m4_m

#define vmulh_vx_i16m4_m ( ... ) __riscv_vmulh_vx_i16m4_tumu(__VA_ARGS__)

◆ vmulh_vx_i16m8

#define vmulh_vx_i16m8 ( ... ) __riscv_vmulh_vx_i16m8(__VA_ARGS__)

◆ vmulh_vx_i16m8_m

#define vmulh_vx_i16m8_m ( ... ) __riscv_vmulh_vx_i16m8_tumu(__VA_ARGS__)

◆ vmulh_vx_i16mf2

#define vmulh_vx_i16mf2 ( ... ) __riscv_vmulh_vx_i16mf2(__VA_ARGS__)

◆ vmulh_vx_i16mf2_m

#define vmulh_vx_i16mf2_m ( ... ) __riscv_vmulh_vx_i16mf2_tumu(__VA_ARGS__)

◆ vmulh_vx_i16mf4

#define vmulh_vx_i16mf4 ( ... ) __riscv_vmulh_vx_i16mf4(__VA_ARGS__)

◆ vmulh_vx_i16mf4_m

#define vmulh_vx_i16mf4_m ( ... ) __riscv_vmulh_vx_i16mf4_tumu(__VA_ARGS__)

◆ vmulh_vx_i32m1

#define vmulh_vx_i32m1 ( ... ) __riscv_vmulh_vx_i32m1(__VA_ARGS__)

◆ vmulh_vx_i32m1_m

#define vmulh_vx_i32m1_m ( ... ) __riscv_vmulh_vx_i32m1_tumu(__VA_ARGS__)

◆ vmulh_vx_i32m2

#define vmulh_vx_i32m2 ( ... ) __riscv_vmulh_vx_i32m2(__VA_ARGS__)

◆ vmulh_vx_i32m2_m

#define vmulh_vx_i32m2_m ( ... ) __riscv_vmulh_vx_i32m2_tumu(__VA_ARGS__)

◆ vmulh_vx_i32m4

#define vmulh_vx_i32m4 ( ... ) __riscv_vmulh_vx_i32m4(__VA_ARGS__)

◆ vmulh_vx_i32m4_m

#define vmulh_vx_i32m4_m ( ... ) __riscv_vmulh_vx_i32m4_tumu(__VA_ARGS__)

◆ vmulh_vx_i32m8

#define vmulh_vx_i32m8 ( ... ) __riscv_vmulh_vx_i32m8(__VA_ARGS__)

◆ vmulh_vx_i32m8_m

#define vmulh_vx_i32m8_m ( ... ) __riscv_vmulh_vx_i32m8_tumu(__VA_ARGS__)

◆ vmulh_vx_i32mf2

#define vmulh_vx_i32mf2 ( ... ) __riscv_vmulh_vx_i32mf2(__VA_ARGS__)

◆ vmulh_vx_i32mf2_m

#define vmulh_vx_i32mf2_m ( ... ) __riscv_vmulh_vx_i32mf2_tumu(__VA_ARGS__)

◆ vmulh_vx_i64m1

#define vmulh_vx_i64m1 ( ... ) __riscv_vmulh_vx_i64m1(__VA_ARGS__)

◆ vmulh_vx_i64m1_m

#define vmulh_vx_i64m1_m ( ... ) __riscv_vmulh_vx_i64m1_tumu(__VA_ARGS__)

◆ vmulh_vx_i64m2

#define vmulh_vx_i64m2 ( ... ) __riscv_vmulh_vx_i64m2(__VA_ARGS__)

◆ vmulh_vx_i64m2_m

#define vmulh_vx_i64m2_m ( ... ) __riscv_vmulh_vx_i64m2_tumu(__VA_ARGS__)

◆ vmulh_vx_i64m4

#define vmulh_vx_i64m4 ( ... ) __riscv_vmulh_vx_i64m4(__VA_ARGS__)

◆ vmulh_vx_i64m4_m

#define vmulh_vx_i64m4_m ( ... ) __riscv_vmulh_vx_i64m4_tumu(__VA_ARGS__)

◆ vmulh_vx_i64m8

#define vmulh_vx_i64m8 ( ... ) __riscv_vmulh_vx_i64m8(__VA_ARGS__)

◆ vmulh_vx_i64m8_m

#define vmulh_vx_i64m8_m ( ... ) __riscv_vmulh_vx_i64m8_tumu(__VA_ARGS__)

◆ vmulh_vx_i8m1

#define vmulh_vx_i8m1 ( ... ) __riscv_vmulh_vx_i8m1(__VA_ARGS__)

◆ vmulh_vx_i8m1_m

#define vmulh_vx_i8m1_m ( ... ) __riscv_vmulh_vx_i8m1_tumu(__VA_ARGS__)

◆ vmulh_vx_i8m2

#define vmulh_vx_i8m2 ( ... ) __riscv_vmulh_vx_i8m2(__VA_ARGS__)

◆ vmulh_vx_i8m2_m

#define vmulh_vx_i8m2_m ( ... ) __riscv_vmulh_vx_i8m2_tumu(__VA_ARGS__)

◆ vmulh_vx_i8m4

#define vmulh_vx_i8m4 ( ... ) __riscv_vmulh_vx_i8m4(__VA_ARGS__)

◆ vmulh_vx_i8m4_m

#define vmulh_vx_i8m4_m ( ... ) __riscv_vmulh_vx_i8m4_tumu(__VA_ARGS__)

◆ vmulh_vx_i8m8

#define vmulh_vx_i8m8 ( ... ) __riscv_vmulh_vx_i8m8(__VA_ARGS__)

◆ vmulh_vx_i8m8_m

#define vmulh_vx_i8m8_m ( ... ) __riscv_vmulh_vx_i8m8_tumu(__VA_ARGS__)

◆ vmulh_vx_i8mf2

#define vmulh_vx_i8mf2 ( ... ) __riscv_vmulh_vx_i8mf2(__VA_ARGS__)

◆ vmulh_vx_i8mf2_m

#define vmulh_vx_i8mf2_m ( ... ) __riscv_vmulh_vx_i8mf2_tumu(__VA_ARGS__)

◆ vmulh_vx_i8mf4

#define vmulh_vx_i8mf4 ( ... ) __riscv_vmulh_vx_i8mf4(__VA_ARGS__)

◆ vmulh_vx_i8mf4_m

#define vmulh_vx_i8mf4_m ( ... ) __riscv_vmulh_vx_i8mf4_tumu(__VA_ARGS__)

◆ vmulh_vx_i8mf8

#define vmulh_vx_i8mf8 ( ... ) __riscv_vmulh_vx_i8mf8(__VA_ARGS__)

◆ vmulh_vx_i8mf8_m

#define vmulh_vx_i8mf8_m ( ... ) __riscv_vmulh_vx_i8mf8_tumu(__VA_ARGS__)

◆ vmulhsu_vv_i16m1

#define vmulhsu_vv_i16m1 ( ... ) __riscv_vmulhsu_vv_i16m1(__VA_ARGS__)

◆ vmulhsu_vv_i16m1_m

#define vmulhsu_vv_i16m1_m ( ... ) __riscv_vmulhsu_vv_i16m1_tumu(__VA_ARGS__)

◆ vmulhsu_vv_i16m2

#define vmulhsu_vv_i16m2 ( ... ) __riscv_vmulhsu_vv_i16m2(__VA_ARGS__)

◆ vmulhsu_vv_i16m2_m

#define vmulhsu_vv_i16m2_m ( ... ) __riscv_vmulhsu_vv_i16m2_tumu(__VA_ARGS__)

◆ vmulhsu_vv_i16m4

#define vmulhsu_vv_i16m4 ( ... ) __riscv_vmulhsu_vv_i16m4(__VA_ARGS__)

◆ vmulhsu_vv_i16m4_m

#define vmulhsu_vv_i16m4_m ( ... ) __riscv_vmulhsu_vv_i16m4_tumu(__VA_ARGS__)

◆ vmulhsu_vv_i16m8

#define vmulhsu_vv_i16m8 ( ... ) __riscv_vmulhsu_vv_i16m8(__VA_ARGS__)

◆ vmulhsu_vv_i16m8_m

#define vmulhsu_vv_i16m8_m ( ... ) __riscv_vmulhsu_vv_i16m8_tumu(__VA_ARGS__)

◆ vmulhsu_vv_i16mf2

#define vmulhsu_vv_i16mf2 ( ... ) __riscv_vmulhsu_vv_i16mf2(__VA_ARGS__)

◆ vmulhsu_vv_i16mf2_m

#define vmulhsu_vv_i16mf2_m ( ... ) __riscv_vmulhsu_vv_i16mf2_tumu(__VA_ARGS__)

◆ vmulhsu_vv_i16mf4

#define vmulhsu_vv_i16mf4 ( ... ) __riscv_vmulhsu_vv_i16mf4(__VA_ARGS__)

◆ vmulhsu_vv_i16mf4_m

#define vmulhsu_vv_i16mf4_m ( ... ) __riscv_vmulhsu_vv_i16mf4_tumu(__VA_ARGS__)

◆ vmulhsu_vv_i32m1

#define vmulhsu_vv_i32m1 ( ... ) __riscv_vmulhsu_vv_i32m1(__VA_ARGS__)

◆ vmulhsu_vv_i32m1_m

#define vmulhsu_vv_i32m1_m ( ... ) __riscv_vmulhsu_vv_i32m1_tumu(__VA_ARGS__)

◆ vmulhsu_vv_i32m2

#define vmulhsu_vv_i32m2 ( ... ) __riscv_vmulhsu_vv_i32m2(__VA_ARGS__)

◆ vmulhsu_vv_i32m2_m

#define vmulhsu_vv_i32m2_m ( ... ) __riscv_vmulhsu_vv_i32m2_tumu(__VA_ARGS__)

◆ vmulhsu_vv_i32m4

#define vmulhsu_vv_i32m4 ( ... ) __riscv_vmulhsu_vv_i32m4(__VA_ARGS__)

◆ vmulhsu_vv_i32m4_m

#define vmulhsu_vv_i32m4_m ( ... ) __riscv_vmulhsu_vv_i32m4_tumu(__VA_ARGS__)

◆ vmulhsu_vv_i32m8

#define vmulhsu_vv_i32m8 ( ... ) __riscv_vmulhsu_vv_i32m8(__VA_ARGS__)

◆ vmulhsu_vv_i32m8_m

#define vmulhsu_vv_i32m8_m ( ... ) __riscv_vmulhsu_vv_i32m8_tumu(__VA_ARGS__)

◆ vmulhsu_vv_i32mf2

#define vmulhsu_vv_i32mf2 ( ... ) __riscv_vmulhsu_vv_i32mf2(__VA_ARGS__)

◆ vmulhsu_vv_i32mf2_m

#define vmulhsu_vv_i32mf2_m ( ... ) __riscv_vmulhsu_vv_i32mf2_tumu(__VA_ARGS__)

◆ vmulhsu_vv_i64m1

#define vmulhsu_vv_i64m1 ( ... ) __riscv_vmulhsu_vv_i64m1(__VA_ARGS__)

◆ vmulhsu_vv_i64m1_m

#define vmulhsu_vv_i64m1_m ( ... ) __riscv_vmulhsu_vv_i64m1_tumu(__VA_ARGS__)

◆ vmulhsu_vv_i64m2

#define vmulhsu_vv_i64m2 ( ... ) __riscv_vmulhsu_vv_i64m2(__VA_ARGS__)

◆ vmulhsu_vv_i64m2_m

#define vmulhsu_vv_i64m2_m ( ... ) __riscv_vmulhsu_vv_i64m2_tumu(__VA_ARGS__)

◆ vmulhsu_vv_i64m4

#define vmulhsu_vv_i64m4 ( ... ) __riscv_vmulhsu_vv_i64m4(__VA_ARGS__)

◆ vmulhsu_vv_i64m4_m

#define vmulhsu_vv_i64m4_m ( ... ) __riscv_vmulhsu_vv_i64m4_tumu(__VA_ARGS__)

◆ vmulhsu_vv_i64m8

#define vmulhsu_vv_i64m8 ( ... ) __riscv_vmulhsu_vv_i64m8(__VA_ARGS__)

◆ vmulhsu_vv_i64m8_m

#define vmulhsu_vv_i64m8_m ( ... ) __riscv_vmulhsu_vv_i64m8_tumu(__VA_ARGS__)

◆ vmulhsu_vv_i8m1

#define vmulhsu_vv_i8m1 ( ... ) __riscv_vmulhsu_vv_i8m1(__VA_ARGS__)

◆ vmulhsu_vv_i8m1_m

#define vmulhsu_vv_i8m1_m ( ... ) __riscv_vmulhsu_vv_i8m1_tumu(__VA_ARGS__)

◆ vmulhsu_vv_i8m2

#define vmulhsu_vv_i8m2 ( ... ) __riscv_vmulhsu_vv_i8m2(__VA_ARGS__)

◆ vmulhsu_vv_i8m2_m

#define vmulhsu_vv_i8m2_m ( ... ) __riscv_vmulhsu_vv_i8m2_tumu(__VA_ARGS__)

◆ vmulhsu_vv_i8m4

#define vmulhsu_vv_i8m4 ( ... ) __riscv_vmulhsu_vv_i8m4(__VA_ARGS__)

◆ vmulhsu_vv_i8m4_m

#define vmulhsu_vv_i8m4_m ( ... ) __riscv_vmulhsu_vv_i8m4_tumu(__VA_ARGS__)

◆ vmulhsu_vv_i8m8

#define vmulhsu_vv_i8m8 ( ... ) __riscv_vmulhsu_vv_i8m8(__VA_ARGS__)

◆ vmulhsu_vv_i8m8_m

#define vmulhsu_vv_i8m8_m ( ... ) __riscv_vmulhsu_vv_i8m8_tumu(__VA_ARGS__)

◆ vmulhsu_vv_i8mf2

#define vmulhsu_vv_i8mf2 ( ... ) __riscv_vmulhsu_vv_i8mf2(__VA_ARGS__)

◆ vmulhsu_vv_i8mf2_m

#define vmulhsu_vv_i8mf2_m ( ... ) __riscv_vmulhsu_vv_i8mf2_tumu(__VA_ARGS__)

◆ vmulhsu_vv_i8mf4

#define vmulhsu_vv_i8mf4 ( ... ) __riscv_vmulhsu_vv_i8mf4(__VA_ARGS__)

◆ vmulhsu_vv_i8mf4_m

#define vmulhsu_vv_i8mf4_m ( ... ) __riscv_vmulhsu_vv_i8mf4_tumu(__VA_ARGS__)

◆ vmulhsu_vv_i8mf8

#define vmulhsu_vv_i8mf8 ( ... ) __riscv_vmulhsu_vv_i8mf8(__VA_ARGS__)

◆ vmulhsu_vv_i8mf8_m

#define vmulhsu_vv_i8mf8_m ( ... ) __riscv_vmulhsu_vv_i8mf8_tumu(__VA_ARGS__)

◆ vmulhsu_vx_i16m1

#define vmulhsu_vx_i16m1 ( ... ) __riscv_vmulhsu_vx_i16m1(__VA_ARGS__)

◆ vmulhsu_vx_i16m1_m

#define vmulhsu_vx_i16m1_m ( ... ) __riscv_vmulhsu_vx_i16m1_tumu(__VA_ARGS__)

◆ vmulhsu_vx_i16m2

#define vmulhsu_vx_i16m2 ( ... ) __riscv_vmulhsu_vx_i16m2(__VA_ARGS__)

◆ vmulhsu_vx_i16m2_m

#define vmulhsu_vx_i16m2_m ( ... ) __riscv_vmulhsu_vx_i16m2_tumu(__VA_ARGS__)

◆ vmulhsu_vx_i16m4

#define vmulhsu_vx_i16m4 ( ... ) __riscv_vmulhsu_vx_i16m4(__VA_ARGS__)

◆ vmulhsu_vx_i16m4_m

#define vmulhsu_vx_i16m4_m ( ... ) __riscv_vmulhsu_vx_i16m4_tumu(__VA_ARGS__)

◆ vmulhsu_vx_i16m8

#define vmulhsu_vx_i16m8 ( ... ) __riscv_vmulhsu_vx_i16m8(__VA_ARGS__)

◆ vmulhsu_vx_i16m8_m

#define vmulhsu_vx_i16m8_m ( ... ) __riscv_vmulhsu_vx_i16m8_tumu(__VA_ARGS__)

◆ vmulhsu_vx_i16mf2

#define vmulhsu_vx_i16mf2 ( ... ) __riscv_vmulhsu_vx_i16mf2(__VA_ARGS__)

◆ vmulhsu_vx_i16mf2_m

#define vmulhsu_vx_i16mf2_m ( ... ) __riscv_vmulhsu_vx_i16mf2_tumu(__VA_ARGS__)

◆ vmulhsu_vx_i16mf4

#define vmulhsu_vx_i16mf4 ( ... ) __riscv_vmulhsu_vx_i16mf4(__VA_ARGS__)

◆ vmulhsu_vx_i16mf4_m

#define vmulhsu_vx_i16mf4_m ( ... ) __riscv_vmulhsu_vx_i16mf4_tumu(__VA_ARGS__)

◆ vmulhsu_vx_i32m1

#define vmulhsu_vx_i32m1 ( ... ) __riscv_vmulhsu_vx_i32m1(__VA_ARGS__)

◆ vmulhsu_vx_i32m1_m

#define vmulhsu_vx_i32m1_m ( ... ) __riscv_vmulhsu_vx_i32m1_tumu(__VA_ARGS__)

◆ vmulhsu_vx_i32m2

#define vmulhsu_vx_i32m2 ( ... ) __riscv_vmulhsu_vx_i32m2(__VA_ARGS__)

◆ vmulhsu_vx_i32m2_m

#define vmulhsu_vx_i32m2_m ( ... ) __riscv_vmulhsu_vx_i32m2_tumu(__VA_ARGS__)

◆ vmulhsu_vx_i32m4

#define vmulhsu_vx_i32m4 ( ... ) __riscv_vmulhsu_vx_i32m4(__VA_ARGS__)

◆ vmulhsu_vx_i32m4_m

#define vmulhsu_vx_i32m4_m ( ... ) __riscv_vmulhsu_vx_i32m4_tumu(__VA_ARGS__)

◆ vmulhsu_vx_i32m8

#define vmulhsu_vx_i32m8 ( ... ) __riscv_vmulhsu_vx_i32m8(__VA_ARGS__)

◆ vmulhsu_vx_i32m8_m

#define vmulhsu_vx_i32m8_m ( ... ) __riscv_vmulhsu_vx_i32m8_tumu(__VA_ARGS__)

◆ vmulhsu_vx_i32mf2

#define vmulhsu_vx_i32mf2 ( ... ) __riscv_vmulhsu_vx_i32mf2(__VA_ARGS__)

◆ vmulhsu_vx_i32mf2_m

#define vmulhsu_vx_i32mf2_m ( ... ) __riscv_vmulhsu_vx_i32mf2_tumu(__VA_ARGS__)

◆ vmulhsu_vx_i64m1

#define vmulhsu_vx_i64m1 ( ... ) __riscv_vmulhsu_vx_i64m1(__VA_ARGS__)

◆ vmulhsu_vx_i64m1_m

#define vmulhsu_vx_i64m1_m ( ... ) __riscv_vmulhsu_vx_i64m1_tumu(__VA_ARGS__)

◆ vmulhsu_vx_i64m2

#define vmulhsu_vx_i64m2 ( ... ) __riscv_vmulhsu_vx_i64m2(__VA_ARGS__)

◆ vmulhsu_vx_i64m2_m

#define vmulhsu_vx_i64m2_m ( ... ) __riscv_vmulhsu_vx_i64m2_tumu(__VA_ARGS__)

◆ vmulhsu_vx_i64m4

#define vmulhsu_vx_i64m4 ( ... ) __riscv_vmulhsu_vx_i64m4(__VA_ARGS__)

◆ vmulhsu_vx_i64m4_m

#define vmulhsu_vx_i64m4_m ( ... ) __riscv_vmulhsu_vx_i64m4_tumu(__VA_ARGS__)

◆ vmulhsu_vx_i64m8

#define vmulhsu_vx_i64m8 ( ... ) __riscv_vmulhsu_vx_i64m8(__VA_ARGS__)

◆ vmulhsu_vx_i64m8_m

#define vmulhsu_vx_i64m8_m ( ... ) __riscv_vmulhsu_vx_i64m8_tumu(__VA_ARGS__)

◆ vmulhsu_vx_i8m1

#define vmulhsu_vx_i8m1 ( ... ) __riscv_vmulhsu_vx_i8m1(__VA_ARGS__)

◆ vmulhsu_vx_i8m1_m

#define vmulhsu_vx_i8m1_m ( ... ) __riscv_vmulhsu_vx_i8m1_tumu(__VA_ARGS__)

◆ vmulhsu_vx_i8m2

#define vmulhsu_vx_i8m2 ( ... ) __riscv_vmulhsu_vx_i8m2(__VA_ARGS__)

◆ vmulhsu_vx_i8m2_m

#define vmulhsu_vx_i8m2_m ( ... ) __riscv_vmulhsu_vx_i8m2_tumu(__VA_ARGS__)

◆ vmulhsu_vx_i8m4

#define vmulhsu_vx_i8m4 ( ... ) __riscv_vmulhsu_vx_i8m4(__VA_ARGS__)

◆ vmulhsu_vx_i8m4_m

#define vmulhsu_vx_i8m4_m ( ... ) __riscv_vmulhsu_vx_i8m4_tumu(__VA_ARGS__)

◆ vmulhsu_vx_i8m8

#define vmulhsu_vx_i8m8 ( ... ) __riscv_vmulhsu_vx_i8m8(__VA_ARGS__)

◆ vmulhsu_vx_i8m8_m

#define vmulhsu_vx_i8m8_m ( ... ) __riscv_vmulhsu_vx_i8m8_tumu(__VA_ARGS__)

◆ vmulhsu_vx_i8mf2

#define vmulhsu_vx_i8mf2 ( ... ) __riscv_vmulhsu_vx_i8mf2(__VA_ARGS__)

◆ vmulhsu_vx_i8mf2_m

#define vmulhsu_vx_i8mf2_m ( ... ) __riscv_vmulhsu_vx_i8mf2_tumu(__VA_ARGS__)

◆ vmulhsu_vx_i8mf4

#define vmulhsu_vx_i8mf4 ( ... ) __riscv_vmulhsu_vx_i8mf4(__VA_ARGS__)

◆ vmulhsu_vx_i8mf4_m

#define vmulhsu_vx_i8mf4_m ( ... ) __riscv_vmulhsu_vx_i8mf4_tumu(__VA_ARGS__)

◆ vmulhsu_vx_i8mf8

#define vmulhsu_vx_i8mf8 ( ... ) __riscv_vmulhsu_vx_i8mf8(__VA_ARGS__)

◆ vmulhsu_vx_i8mf8_m

#define vmulhsu_vx_i8mf8_m ( ... ) __riscv_vmulhsu_vx_i8mf8_tumu(__VA_ARGS__)

◆ vmulhu_vv_u16m1

#define vmulhu_vv_u16m1 ( ... ) __riscv_vmulhu_vv_u16m1(__VA_ARGS__)

◆ vmulhu_vv_u16m1_m

#define vmulhu_vv_u16m1_m ( ... ) __riscv_vmulhu_vv_u16m1_tumu(__VA_ARGS__)

◆ vmulhu_vv_u16m2

#define vmulhu_vv_u16m2 ( ... ) __riscv_vmulhu_vv_u16m2(__VA_ARGS__)

◆ vmulhu_vv_u16m2_m

#define vmulhu_vv_u16m2_m ( ... ) __riscv_vmulhu_vv_u16m2_tumu(__VA_ARGS__)

◆ vmulhu_vv_u16m4

#define vmulhu_vv_u16m4 ( ... ) __riscv_vmulhu_vv_u16m4(__VA_ARGS__)

◆ vmulhu_vv_u16m4_m

#define vmulhu_vv_u16m4_m ( ... ) __riscv_vmulhu_vv_u16m4_tumu(__VA_ARGS__)

◆ vmulhu_vv_u16m8

#define vmulhu_vv_u16m8 ( ... ) __riscv_vmulhu_vv_u16m8(__VA_ARGS__)

◆ vmulhu_vv_u16m8_m

#define vmulhu_vv_u16m8_m ( ... ) __riscv_vmulhu_vv_u16m8_tumu(__VA_ARGS__)

◆ vmulhu_vv_u16mf2

#define vmulhu_vv_u16mf2 ( ... ) __riscv_vmulhu_vv_u16mf2(__VA_ARGS__)

◆ vmulhu_vv_u16mf2_m

#define vmulhu_vv_u16mf2_m ( ... ) __riscv_vmulhu_vv_u16mf2_tumu(__VA_ARGS__)

◆ vmulhu_vv_u16mf4

#define vmulhu_vv_u16mf4 ( ... ) __riscv_vmulhu_vv_u16mf4(__VA_ARGS__)

◆ vmulhu_vv_u16mf4_m

#define vmulhu_vv_u16mf4_m ( ... ) __riscv_vmulhu_vv_u16mf4_tumu(__VA_ARGS__)

◆ vmulhu_vv_u32m1

#define vmulhu_vv_u32m1 ( ... ) __riscv_vmulhu_vv_u32m1(__VA_ARGS__)

◆ vmulhu_vv_u32m1_m

#define vmulhu_vv_u32m1_m ( ... ) __riscv_vmulhu_vv_u32m1_tumu(__VA_ARGS__)

◆ vmulhu_vv_u32m2

#define vmulhu_vv_u32m2 ( ... ) __riscv_vmulhu_vv_u32m2(__VA_ARGS__)

◆ vmulhu_vv_u32m2_m

#define vmulhu_vv_u32m2_m ( ... ) __riscv_vmulhu_vv_u32m2_tumu(__VA_ARGS__)

◆ vmulhu_vv_u32m4

#define vmulhu_vv_u32m4 ( ... ) __riscv_vmulhu_vv_u32m4(__VA_ARGS__)

◆ vmulhu_vv_u32m4_m

#define vmulhu_vv_u32m4_m ( ... ) __riscv_vmulhu_vv_u32m4_tumu(__VA_ARGS__)

◆ vmulhu_vv_u32m8

#define vmulhu_vv_u32m8 ( ... ) __riscv_vmulhu_vv_u32m8(__VA_ARGS__)

◆ vmulhu_vv_u32m8_m

#define vmulhu_vv_u32m8_m ( ... ) __riscv_vmulhu_vv_u32m8_tumu(__VA_ARGS__)

◆ vmulhu_vv_u32mf2

#define vmulhu_vv_u32mf2 ( ... ) __riscv_vmulhu_vv_u32mf2(__VA_ARGS__)

◆ vmulhu_vv_u32mf2_m

#define vmulhu_vv_u32mf2_m ( ... ) __riscv_vmulhu_vv_u32mf2_tumu(__VA_ARGS__)

◆ vmulhu_vv_u64m1

#define vmulhu_vv_u64m1 ( ... ) __riscv_vmulhu_vv_u64m1(__VA_ARGS__)

◆ vmulhu_vv_u64m1_m

#define vmulhu_vv_u64m1_m ( ... ) __riscv_vmulhu_vv_u64m1_tumu(__VA_ARGS__)

◆ vmulhu_vv_u64m2

#define vmulhu_vv_u64m2 ( ... ) __riscv_vmulhu_vv_u64m2(__VA_ARGS__)

◆ vmulhu_vv_u64m2_m

#define vmulhu_vv_u64m2_m ( ... ) __riscv_vmulhu_vv_u64m2_tumu(__VA_ARGS__)

◆ vmulhu_vv_u64m4

#define vmulhu_vv_u64m4 ( ... ) __riscv_vmulhu_vv_u64m4(__VA_ARGS__)

◆ vmulhu_vv_u64m4_m

#define vmulhu_vv_u64m4_m ( ... ) __riscv_vmulhu_vv_u64m4_tumu(__VA_ARGS__)

◆ vmulhu_vv_u64m8

#define vmulhu_vv_u64m8 ( ... ) __riscv_vmulhu_vv_u64m8(__VA_ARGS__)

◆ vmulhu_vv_u64m8_m

#define vmulhu_vv_u64m8_m ( ... ) __riscv_vmulhu_vv_u64m8_tumu(__VA_ARGS__)

◆ vmulhu_vv_u8m1

#define vmulhu_vv_u8m1 ( ... ) __riscv_vmulhu_vv_u8m1(__VA_ARGS__)

◆ vmulhu_vv_u8m1_m

#define vmulhu_vv_u8m1_m ( ... ) __riscv_vmulhu_vv_u8m1_tumu(__VA_ARGS__)

◆ vmulhu_vv_u8m2

#define vmulhu_vv_u8m2 ( ... ) __riscv_vmulhu_vv_u8m2(__VA_ARGS__)

◆ vmulhu_vv_u8m2_m

#define vmulhu_vv_u8m2_m ( ... ) __riscv_vmulhu_vv_u8m2_tumu(__VA_ARGS__)

◆ vmulhu_vv_u8m4

#define vmulhu_vv_u8m4 ( ... ) __riscv_vmulhu_vv_u8m4(__VA_ARGS__)

◆ vmulhu_vv_u8m4_m

#define vmulhu_vv_u8m4_m ( ... ) __riscv_vmulhu_vv_u8m4_tumu(__VA_ARGS__)

◆ vmulhu_vv_u8m8

#define vmulhu_vv_u8m8 ( ... ) __riscv_vmulhu_vv_u8m8(__VA_ARGS__)

◆ vmulhu_vv_u8m8_m

#define vmulhu_vv_u8m8_m ( ... ) __riscv_vmulhu_vv_u8m8_tumu(__VA_ARGS__)

◆ vmulhu_vv_u8mf2

#define vmulhu_vv_u8mf2 ( ... ) __riscv_vmulhu_vv_u8mf2(__VA_ARGS__)

◆ vmulhu_vv_u8mf2_m

#define vmulhu_vv_u8mf2_m ( ... ) __riscv_vmulhu_vv_u8mf2_tumu(__VA_ARGS__)

◆ vmulhu_vv_u8mf4

#define vmulhu_vv_u8mf4 ( ... ) __riscv_vmulhu_vv_u8mf4(__VA_ARGS__)

◆ vmulhu_vv_u8mf4_m

#define vmulhu_vv_u8mf4_m ( ... ) __riscv_vmulhu_vv_u8mf4_tumu(__VA_ARGS__)

◆ vmulhu_vv_u8mf8

#define vmulhu_vv_u8mf8 ( ... ) __riscv_vmulhu_vv_u8mf8(__VA_ARGS__)

◆ vmulhu_vv_u8mf8_m

#define vmulhu_vv_u8mf8_m ( ... ) __riscv_vmulhu_vv_u8mf8_tumu(__VA_ARGS__)

◆ vmulhu_vx_u16m1

#define vmulhu_vx_u16m1 ( ... ) __riscv_vmulhu_vx_u16m1(__VA_ARGS__)

◆ vmulhu_vx_u16m1_m

#define vmulhu_vx_u16m1_m ( ... ) __riscv_vmulhu_vx_u16m1_tumu(__VA_ARGS__)

◆ vmulhu_vx_u16m2

#define vmulhu_vx_u16m2 ( ... ) __riscv_vmulhu_vx_u16m2(__VA_ARGS__)

◆ vmulhu_vx_u16m2_m

#define vmulhu_vx_u16m2_m ( ... ) __riscv_vmulhu_vx_u16m2_tumu(__VA_ARGS__)

◆ vmulhu_vx_u16m4

#define vmulhu_vx_u16m4 ( ... ) __riscv_vmulhu_vx_u16m4(__VA_ARGS__)

◆ vmulhu_vx_u16m4_m

#define vmulhu_vx_u16m4_m ( ... ) __riscv_vmulhu_vx_u16m4_tumu(__VA_ARGS__)

◆ vmulhu_vx_u16m8

#define vmulhu_vx_u16m8 ( ... ) __riscv_vmulhu_vx_u16m8(__VA_ARGS__)

◆ vmulhu_vx_u16m8_m

#define vmulhu_vx_u16m8_m ( ... ) __riscv_vmulhu_vx_u16m8_tumu(__VA_ARGS__)

◆ vmulhu_vx_u16mf2

#define vmulhu_vx_u16mf2 ( ... ) __riscv_vmulhu_vx_u16mf2(__VA_ARGS__)

◆ vmulhu_vx_u16mf2_m

#define vmulhu_vx_u16mf2_m ( ... ) __riscv_vmulhu_vx_u16mf2_tumu(__VA_ARGS__)

◆ vmulhu_vx_u16mf4

#define vmulhu_vx_u16mf4 ( ... ) __riscv_vmulhu_vx_u16mf4(__VA_ARGS__)

◆ vmulhu_vx_u16mf4_m

#define vmulhu_vx_u16mf4_m ( ... ) __riscv_vmulhu_vx_u16mf4_tumu(__VA_ARGS__)

◆ vmulhu_vx_u32m1

#define vmulhu_vx_u32m1 ( ... ) __riscv_vmulhu_vx_u32m1(__VA_ARGS__)

◆ vmulhu_vx_u32m1_m

#define vmulhu_vx_u32m1_m ( ... ) __riscv_vmulhu_vx_u32m1_tumu(__VA_ARGS__)

◆ vmulhu_vx_u32m2

#define vmulhu_vx_u32m2 ( ... ) __riscv_vmulhu_vx_u32m2(__VA_ARGS__)

◆ vmulhu_vx_u32m2_m

#define vmulhu_vx_u32m2_m ( ... ) __riscv_vmulhu_vx_u32m2_tumu(__VA_ARGS__)

◆ vmulhu_vx_u32m4

#define vmulhu_vx_u32m4 ( ... ) __riscv_vmulhu_vx_u32m4(__VA_ARGS__)

◆ vmulhu_vx_u32m4_m

#define vmulhu_vx_u32m4_m ( ... ) __riscv_vmulhu_vx_u32m4_tumu(__VA_ARGS__)

◆ vmulhu_vx_u32m8

#define vmulhu_vx_u32m8 ( ... ) __riscv_vmulhu_vx_u32m8(__VA_ARGS__)

◆ vmulhu_vx_u32m8_m

#define vmulhu_vx_u32m8_m ( ... ) __riscv_vmulhu_vx_u32m8_tumu(__VA_ARGS__)

◆ vmulhu_vx_u32mf2

#define vmulhu_vx_u32mf2 ( ... ) __riscv_vmulhu_vx_u32mf2(__VA_ARGS__)

◆ vmulhu_vx_u32mf2_m

#define vmulhu_vx_u32mf2_m ( ... ) __riscv_vmulhu_vx_u32mf2_tumu(__VA_ARGS__)

◆ vmulhu_vx_u64m1

#define vmulhu_vx_u64m1 ( ... ) __riscv_vmulhu_vx_u64m1(__VA_ARGS__)

◆ vmulhu_vx_u64m1_m

#define vmulhu_vx_u64m1_m ( ... ) __riscv_vmulhu_vx_u64m1_tumu(__VA_ARGS__)

◆ vmulhu_vx_u64m2

#define vmulhu_vx_u64m2 ( ... ) __riscv_vmulhu_vx_u64m2(__VA_ARGS__)

◆ vmulhu_vx_u64m2_m

#define vmulhu_vx_u64m2_m ( ... ) __riscv_vmulhu_vx_u64m2_tumu(__VA_ARGS__)

◆ vmulhu_vx_u64m4

#define vmulhu_vx_u64m4 ( ... ) __riscv_vmulhu_vx_u64m4(__VA_ARGS__)

◆ vmulhu_vx_u64m4_m

#define vmulhu_vx_u64m4_m ( ... ) __riscv_vmulhu_vx_u64m4_tumu(__VA_ARGS__)

◆ vmulhu_vx_u64m8

#define vmulhu_vx_u64m8 ( ... ) __riscv_vmulhu_vx_u64m8(__VA_ARGS__)

◆ vmulhu_vx_u64m8_m

#define vmulhu_vx_u64m8_m ( ... ) __riscv_vmulhu_vx_u64m8_tumu(__VA_ARGS__)

◆ vmulhu_vx_u8m1

#define vmulhu_vx_u8m1 ( ... ) __riscv_vmulhu_vx_u8m1(__VA_ARGS__)

◆ vmulhu_vx_u8m1_m

#define vmulhu_vx_u8m1_m ( ... ) __riscv_vmulhu_vx_u8m1_tumu(__VA_ARGS__)

◆ vmulhu_vx_u8m2

#define vmulhu_vx_u8m2 ( ... ) __riscv_vmulhu_vx_u8m2(__VA_ARGS__)

◆ vmulhu_vx_u8m2_m

#define vmulhu_vx_u8m2_m ( ... ) __riscv_vmulhu_vx_u8m2_tumu(__VA_ARGS__)

◆ vmulhu_vx_u8m4

#define vmulhu_vx_u8m4 ( ... ) __riscv_vmulhu_vx_u8m4(__VA_ARGS__)

◆ vmulhu_vx_u8m4_m

#define vmulhu_vx_u8m4_m ( ... ) __riscv_vmulhu_vx_u8m4_tumu(__VA_ARGS__)

◆ vmulhu_vx_u8m8

#define vmulhu_vx_u8m8 ( ... ) __riscv_vmulhu_vx_u8m8(__VA_ARGS__)

◆ vmulhu_vx_u8m8_m

#define vmulhu_vx_u8m8_m ( ... ) __riscv_vmulhu_vx_u8m8_tumu(__VA_ARGS__)

◆ vmulhu_vx_u8mf2

#define vmulhu_vx_u8mf2 ( ... ) __riscv_vmulhu_vx_u8mf2(__VA_ARGS__)

◆ vmulhu_vx_u8mf2_m

#define vmulhu_vx_u8mf2_m ( ... ) __riscv_vmulhu_vx_u8mf2_tumu(__VA_ARGS__)

◆ vmulhu_vx_u8mf4

#define vmulhu_vx_u8mf4 ( ... ) __riscv_vmulhu_vx_u8mf4(__VA_ARGS__)

◆ vmulhu_vx_u8mf4_m

#define vmulhu_vx_u8mf4_m ( ... ) __riscv_vmulhu_vx_u8mf4_tumu(__VA_ARGS__)

◆ vmulhu_vx_u8mf8

#define vmulhu_vx_u8mf8 ( ... ) __riscv_vmulhu_vx_u8mf8(__VA_ARGS__)

◆ vmulhu_vx_u8mf8_m

#define vmulhu_vx_u8mf8_m ( ... ) __riscv_vmulhu_vx_u8mf8_tumu(__VA_ARGS__)

◆ vmv_s_x_i16m1

#define vmv_s_x_i16m1 ( ... ) __riscv_vmv_s_x_i16m1_tu(__VA_ARGS__)

◆ vmv_s_x_i16m2

#define vmv_s_x_i16m2 ( ... ) __riscv_vmv_s_x_i16m2_tu(__VA_ARGS__)

◆ vmv_s_x_i16m4

#define vmv_s_x_i16m4 ( ... ) __riscv_vmv_s_x_i16m4_tu(__VA_ARGS__)

◆ vmv_s_x_i16m8

#define vmv_s_x_i16m8 ( ... ) __riscv_vmv_s_x_i16m8_tu(__VA_ARGS__)

◆ vmv_s_x_i16mf2

#define vmv_s_x_i16mf2 ( ... ) __riscv_vmv_s_x_i16mf2_tu(__VA_ARGS__)

◆ vmv_s_x_i16mf4

#define vmv_s_x_i16mf4 ( ... ) __riscv_vmv_s_x_i16mf4_tu(__VA_ARGS__)

◆ vmv_s_x_i32m1

#define vmv_s_x_i32m1 ( ... ) __riscv_vmv_s_x_i32m1_tu(__VA_ARGS__)

◆ vmv_s_x_i32m2

#define vmv_s_x_i32m2 ( ... ) __riscv_vmv_s_x_i32m2_tu(__VA_ARGS__)

◆ vmv_s_x_i32m4

#define vmv_s_x_i32m4 ( ... ) __riscv_vmv_s_x_i32m4_tu(__VA_ARGS__)

◆ vmv_s_x_i32m8

#define vmv_s_x_i32m8 ( ... ) __riscv_vmv_s_x_i32m8_tu(__VA_ARGS__)

◆ vmv_s_x_i32mf2

#define vmv_s_x_i32mf2 ( ... ) __riscv_vmv_s_x_i32mf2_tu(__VA_ARGS__)

◆ vmv_s_x_i64m1

#define vmv_s_x_i64m1 ( ... ) __riscv_vmv_s_x_i64m1_tu(__VA_ARGS__)

◆ vmv_s_x_i64m2

#define vmv_s_x_i64m2 ( ... ) __riscv_vmv_s_x_i64m2_tu(__VA_ARGS__)

◆ vmv_s_x_i64m4

#define vmv_s_x_i64m4 ( ... ) __riscv_vmv_s_x_i64m4_tu(__VA_ARGS__)

◆ vmv_s_x_i64m8

#define vmv_s_x_i64m8 ( ... ) __riscv_vmv_s_x_i64m8_tu(__VA_ARGS__)

◆ vmv_s_x_i8m1

#define vmv_s_x_i8m1 ( ... ) __riscv_vmv_s_x_i8m1_tu(__VA_ARGS__)

◆ vmv_s_x_i8m2

#define vmv_s_x_i8m2 ( ... ) __riscv_vmv_s_x_i8m2_tu(__VA_ARGS__)

◆ vmv_s_x_i8m4

#define vmv_s_x_i8m4 ( ... ) __riscv_vmv_s_x_i8m4_tu(__VA_ARGS__)

◆ vmv_s_x_i8m8

#define vmv_s_x_i8m8 ( ... ) __riscv_vmv_s_x_i8m8_tu(__VA_ARGS__)

◆ vmv_s_x_i8mf2

#define vmv_s_x_i8mf2 ( ... ) __riscv_vmv_s_x_i8mf2_tu(__VA_ARGS__)

◆ vmv_s_x_i8mf4

#define vmv_s_x_i8mf4 ( ... ) __riscv_vmv_s_x_i8mf4_tu(__VA_ARGS__)

◆ vmv_s_x_i8mf8

#define vmv_s_x_i8mf8 ( ... ) __riscv_vmv_s_x_i8mf8_tu(__VA_ARGS__)

◆ vmv_s_x_u16m1

#define vmv_s_x_u16m1 ( ... ) __riscv_vmv_s_x_u16m1_tu(__VA_ARGS__)

◆ vmv_s_x_u16m2

#define vmv_s_x_u16m2 ( ... ) __riscv_vmv_s_x_u16m2_tu(__VA_ARGS__)

◆ vmv_s_x_u16m4

#define vmv_s_x_u16m4 ( ... ) __riscv_vmv_s_x_u16m4_tu(__VA_ARGS__)

◆ vmv_s_x_u16m8

#define vmv_s_x_u16m8 ( ... ) __riscv_vmv_s_x_u16m8_tu(__VA_ARGS__)

◆ vmv_s_x_u16mf2

#define vmv_s_x_u16mf2 ( ... ) __riscv_vmv_s_x_u16mf2_tu(__VA_ARGS__)

◆ vmv_s_x_u16mf4

#define vmv_s_x_u16mf4 ( ... ) __riscv_vmv_s_x_u16mf4_tu(__VA_ARGS__)

◆ vmv_s_x_u32m1

#define vmv_s_x_u32m1 ( ... ) __riscv_vmv_s_x_u32m1_tu(__VA_ARGS__)

◆ vmv_s_x_u32m2

#define vmv_s_x_u32m2 ( ... ) __riscv_vmv_s_x_u32m2_tu(__VA_ARGS__)

◆ vmv_s_x_u32m4

#define vmv_s_x_u32m4 ( ... ) __riscv_vmv_s_x_u32m4_tu(__VA_ARGS__)

◆ vmv_s_x_u32m8

#define vmv_s_x_u32m8 ( ... ) __riscv_vmv_s_x_u32m8_tu(__VA_ARGS__)

◆ vmv_s_x_u32mf2

#define vmv_s_x_u32mf2 ( ... ) __riscv_vmv_s_x_u32mf2_tu(__VA_ARGS__)

◆ vmv_s_x_u64m1

#define vmv_s_x_u64m1 ( ... ) __riscv_vmv_s_x_u64m1_tu(__VA_ARGS__)

◆ vmv_s_x_u64m2

#define vmv_s_x_u64m2 ( ... ) __riscv_vmv_s_x_u64m2_tu(__VA_ARGS__)

◆ vmv_s_x_u64m4

#define vmv_s_x_u64m4 ( ... ) __riscv_vmv_s_x_u64m4_tu(__VA_ARGS__)

◆ vmv_s_x_u64m8

#define vmv_s_x_u64m8 ( ... ) __riscv_vmv_s_x_u64m8_tu(__VA_ARGS__)

◆ vmv_s_x_u8m1

#define vmv_s_x_u8m1 ( ... ) __riscv_vmv_s_x_u8m1_tu(__VA_ARGS__)

◆ vmv_s_x_u8m2

#define vmv_s_x_u8m2 ( ... ) __riscv_vmv_s_x_u8m2_tu(__VA_ARGS__)

◆ vmv_s_x_u8m4

#define vmv_s_x_u8m4 ( ... ) __riscv_vmv_s_x_u8m4_tu(__VA_ARGS__)

◆ vmv_s_x_u8m8

#define vmv_s_x_u8m8 ( ... ) __riscv_vmv_s_x_u8m8_tu(__VA_ARGS__)

◆ vmv_s_x_u8mf2

#define vmv_s_x_u8mf2 ( ... ) __riscv_vmv_s_x_u8mf2_tu(__VA_ARGS__)

◆ vmv_s_x_u8mf4

#define vmv_s_x_u8mf4 ( ... ) __riscv_vmv_s_x_u8mf4_tu(__VA_ARGS__)

◆ vmv_s_x_u8mf8

#define vmv_s_x_u8mf8 ( ... ) __riscv_vmv_s_x_u8mf8_tu(__VA_ARGS__)

◆ vmv_v_v_f16m1

#define vmv_v_v_f16m1 ( ... ) __riscv_vmv_v_v_f16m1(__VA_ARGS__)

◆ vmv_v_v_f16m2

#define vmv_v_v_f16m2 ( ... ) __riscv_vmv_v_v_f16m2(__VA_ARGS__)

◆ vmv_v_v_f16m4

#define vmv_v_v_f16m4 ( ... ) __riscv_vmv_v_v_f16m4(__VA_ARGS__)

◆ vmv_v_v_f16m8

#define vmv_v_v_f16m8 ( ... ) __riscv_vmv_v_v_f16m8(__VA_ARGS__)

◆ vmv_v_v_f16mf2

#define vmv_v_v_f16mf2 ( ... ) __riscv_vmv_v_v_f16mf2(__VA_ARGS__)

◆ vmv_v_v_f16mf4

#define vmv_v_v_f16mf4 ( ... ) __riscv_vmv_v_v_f16mf4(__VA_ARGS__)

◆ vmv_v_v_f32m1

#define vmv_v_v_f32m1 ( ... ) __riscv_vmv_v_v_f32m1(__VA_ARGS__)

◆ vmv_v_v_f32m2

#define vmv_v_v_f32m2 ( ... ) __riscv_vmv_v_v_f32m2(__VA_ARGS__)

◆ vmv_v_v_f32m4

#define vmv_v_v_f32m4 ( ... ) __riscv_vmv_v_v_f32m4(__VA_ARGS__)

◆ vmv_v_v_f32m8

#define vmv_v_v_f32m8 ( ... ) __riscv_vmv_v_v_f32m8(__VA_ARGS__)

◆ vmv_v_v_f32mf2

#define vmv_v_v_f32mf2 ( ... ) __riscv_vmv_v_v_f32mf2(__VA_ARGS__)

◆ vmv_v_v_f64m1

#define vmv_v_v_f64m1 ( ... ) __riscv_vmv_v_v_f64m1(__VA_ARGS__)

◆ vmv_v_v_f64m2

#define vmv_v_v_f64m2 ( ... ) __riscv_vmv_v_v_f64m2(__VA_ARGS__)

◆ vmv_v_v_f64m4

#define vmv_v_v_f64m4 ( ... ) __riscv_vmv_v_v_f64m4(__VA_ARGS__)

◆ vmv_v_v_f64m8

#define vmv_v_v_f64m8 ( ... ) __riscv_vmv_v_v_f64m8(__VA_ARGS__)

◆ vmv_v_v_i16m1

#define vmv_v_v_i16m1 ( ... ) __riscv_vmv_v_v_i16m1(__VA_ARGS__)

◆ vmv_v_v_i16m2

#define vmv_v_v_i16m2 ( ... ) __riscv_vmv_v_v_i16m2(__VA_ARGS__)

◆ vmv_v_v_i16m4

#define vmv_v_v_i16m4 ( ... ) __riscv_vmv_v_v_i16m4(__VA_ARGS__)

◆ vmv_v_v_i16m8

#define vmv_v_v_i16m8 ( ... ) __riscv_vmv_v_v_i16m8(__VA_ARGS__)

◆ vmv_v_v_i16mf2

#define vmv_v_v_i16mf2 ( ... ) __riscv_vmv_v_v_i16mf2(__VA_ARGS__)

◆ vmv_v_v_i16mf4

#define vmv_v_v_i16mf4 ( ... ) __riscv_vmv_v_v_i16mf4(__VA_ARGS__)

◆ vmv_v_v_i32m1

#define vmv_v_v_i32m1 ( ... ) __riscv_vmv_v_v_i32m1(__VA_ARGS__)

◆ vmv_v_v_i32m2

#define vmv_v_v_i32m2 ( ... ) __riscv_vmv_v_v_i32m2(__VA_ARGS__)

◆ vmv_v_v_i32m4

#define vmv_v_v_i32m4 ( ... ) __riscv_vmv_v_v_i32m4(__VA_ARGS__)

◆ vmv_v_v_i32m8

#define vmv_v_v_i32m8 ( ... ) __riscv_vmv_v_v_i32m8(__VA_ARGS__)

◆ vmv_v_v_i32mf2

#define vmv_v_v_i32mf2 ( ... ) __riscv_vmv_v_v_i32mf2(__VA_ARGS__)

◆ vmv_v_v_i64m1

#define vmv_v_v_i64m1 ( ... ) __riscv_vmv_v_v_i64m1(__VA_ARGS__)

◆ vmv_v_v_i64m2

#define vmv_v_v_i64m2 ( ... ) __riscv_vmv_v_v_i64m2(__VA_ARGS__)

◆ vmv_v_v_i64m4

#define vmv_v_v_i64m4 ( ... ) __riscv_vmv_v_v_i64m4(__VA_ARGS__)

◆ vmv_v_v_i64m8

#define vmv_v_v_i64m8 ( ... ) __riscv_vmv_v_v_i64m8(__VA_ARGS__)

◆ vmv_v_v_i8m1

#define vmv_v_v_i8m1 ( ... ) __riscv_vmv_v_v_i8m1(__VA_ARGS__)

◆ vmv_v_v_i8m2

#define vmv_v_v_i8m2 ( ... ) __riscv_vmv_v_v_i8m2(__VA_ARGS__)

◆ vmv_v_v_i8m4

#define vmv_v_v_i8m4 ( ... ) __riscv_vmv_v_v_i8m4(__VA_ARGS__)

◆ vmv_v_v_i8m8

#define vmv_v_v_i8m8 ( ... ) __riscv_vmv_v_v_i8m8(__VA_ARGS__)

◆ vmv_v_v_i8mf2

#define vmv_v_v_i8mf2 ( ... ) __riscv_vmv_v_v_i8mf2(__VA_ARGS__)

◆ vmv_v_v_i8mf4

#define vmv_v_v_i8mf4 ( ... ) __riscv_vmv_v_v_i8mf4(__VA_ARGS__)

◆ vmv_v_v_i8mf8

#define vmv_v_v_i8mf8 ( ... ) __riscv_vmv_v_v_i8mf8(__VA_ARGS__)

◆ vmv_v_v_u16m1

#define vmv_v_v_u16m1 ( ... ) __riscv_vmv_v_v_u16m1(__VA_ARGS__)

◆ vmv_v_v_u16m2

#define vmv_v_v_u16m2 ( ... ) __riscv_vmv_v_v_u16m2(__VA_ARGS__)

◆ vmv_v_v_u16m4

#define vmv_v_v_u16m4 ( ... ) __riscv_vmv_v_v_u16m4(__VA_ARGS__)

◆ vmv_v_v_u16m8

#define vmv_v_v_u16m8 ( ... ) __riscv_vmv_v_v_u16m8(__VA_ARGS__)

◆ vmv_v_v_u16mf2

#define vmv_v_v_u16mf2 ( ... ) __riscv_vmv_v_v_u16mf2(__VA_ARGS__)

◆ vmv_v_v_u16mf4

#define vmv_v_v_u16mf4 ( ... ) __riscv_vmv_v_v_u16mf4(__VA_ARGS__)

◆ vmv_v_v_u32m1

#define vmv_v_v_u32m1 ( ... ) __riscv_vmv_v_v_u32m1(__VA_ARGS__)

◆ vmv_v_v_u32m2

#define vmv_v_v_u32m2 ( ... ) __riscv_vmv_v_v_u32m2(__VA_ARGS__)

◆ vmv_v_v_u32m4

#define vmv_v_v_u32m4 ( ... ) __riscv_vmv_v_v_u32m4(__VA_ARGS__)

◆ vmv_v_v_u32m8

#define vmv_v_v_u32m8 ( ... ) __riscv_vmv_v_v_u32m8(__VA_ARGS__)

◆ vmv_v_v_u32mf2

#define vmv_v_v_u32mf2 ( ... ) __riscv_vmv_v_v_u32mf2(__VA_ARGS__)

◆ vmv_v_v_u64m1

#define vmv_v_v_u64m1 ( ... ) __riscv_vmv_v_v_u64m1(__VA_ARGS__)

◆ vmv_v_v_u64m2

#define vmv_v_v_u64m2 ( ... ) __riscv_vmv_v_v_u64m2(__VA_ARGS__)

◆ vmv_v_v_u64m4

#define vmv_v_v_u64m4 ( ... ) __riscv_vmv_v_v_u64m4(__VA_ARGS__)

◆ vmv_v_v_u64m8

#define vmv_v_v_u64m8 ( ... ) __riscv_vmv_v_v_u64m8(__VA_ARGS__)

◆ vmv_v_v_u8m1

#define vmv_v_v_u8m1 ( ... ) __riscv_vmv_v_v_u8m1(__VA_ARGS__)

◆ vmv_v_v_u8m2

#define vmv_v_v_u8m2 ( ... ) __riscv_vmv_v_v_u8m2(__VA_ARGS__)

◆ vmv_v_v_u8m4

#define vmv_v_v_u8m4 ( ... ) __riscv_vmv_v_v_u8m4(__VA_ARGS__)

◆ vmv_v_v_u8m8

#define vmv_v_v_u8m8 ( ... ) __riscv_vmv_v_v_u8m8(__VA_ARGS__)

◆ vmv_v_v_u8mf2

#define vmv_v_v_u8mf2 ( ... ) __riscv_vmv_v_v_u8mf2(__VA_ARGS__)

◆ vmv_v_v_u8mf4

#define vmv_v_v_u8mf4 ( ... ) __riscv_vmv_v_v_u8mf4(__VA_ARGS__)

◆ vmv_v_v_u8mf8

#define vmv_v_v_u8mf8 ( ... ) __riscv_vmv_v_v_u8mf8(__VA_ARGS__)

◆ vmv_v_x_i16m1

#define vmv_v_x_i16m1 ( ... ) __riscv_vmv_v_x_i16m1(__VA_ARGS__)

◆ vmv_v_x_i16m2

#define vmv_v_x_i16m2 ( ... ) __riscv_vmv_v_x_i16m2(__VA_ARGS__)

◆ vmv_v_x_i16m4

#define vmv_v_x_i16m4 ( ... ) __riscv_vmv_v_x_i16m4(__VA_ARGS__)

◆ vmv_v_x_i16m8

#define vmv_v_x_i16m8 ( ... ) __riscv_vmv_v_x_i16m8(__VA_ARGS__)

◆ vmv_v_x_i16mf2

#define vmv_v_x_i16mf2 ( ... ) __riscv_vmv_v_x_i16mf2(__VA_ARGS__)

◆ vmv_v_x_i16mf4

#define vmv_v_x_i16mf4 ( ... ) __riscv_vmv_v_x_i16mf4(__VA_ARGS__)

◆ vmv_v_x_i32m1

#define vmv_v_x_i32m1 ( ... ) __riscv_vmv_v_x_i32m1(__VA_ARGS__)

◆ vmv_v_x_i32m2

#define vmv_v_x_i32m2 ( ... ) __riscv_vmv_v_x_i32m2(__VA_ARGS__)

◆ vmv_v_x_i32m4

#define vmv_v_x_i32m4 ( ... ) __riscv_vmv_v_x_i32m4(__VA_ARGS__)

◆ vmv_v_x_i32m8

#define vmv_v_x_i32m8 ( ... ) __riscv_vmv_v_x_i32m8(__VA_ARGS__)

◆ vmv_v_x_i32mf2

#define vmv_v_x_i32mf2 ( ... ) __riscv_vmv_v_x_i32mf2(__VA_ARGS__)

◆ vmv_v_x_i64m1

#define vmv_v_x_i64m1 ( ... ) __riscv_vmv_v_x_i64m1(__VA_ARGS__)

◆ vmv_v_x_i64m2

#define vmv_v_x_i64m2 ( ... ) __riscv_vmv_v_x_i64m2(__VA_ARGS__)

◆ vmv_v_x_i64m4

#define vmv_v_x_i64m4 ( ... ) __riscv_vmv_v_x_i64m4(__VA_ARGS__)

◆ vmv_v_x_i64m8

#define vmv_v_x_i64m8 ( ... ) __riscv_vmv_v_x_i64m8(__VA_ARGS__)

◆ vmv_v_x_i8m1

#define vmv_v_x_i8m1 ( ... ) __riscv_vmv_v_x_i8m1(__VA_ARGS__)

◆ vmv_v_x_i8m2

#define vmv_v_x_i8m2 ( ... ) __riscv_vmv_v_x_i8m2(__VA_ARGS__)

◆ vmv_v_x_i8m4

#define vmv_v_x_i8m4 ( ... ) __riscv_vmv_v_x_i8m4(__VA_ARGS__)

◆ vmv_v_x_i8m8

#define vmv_v_x_i8m8 ( ... ) __riscv_vmv_v_x_i8m8(__VA_ARGS__)

◆ vmv_v_x_i8mf2

#define vmv_v_x_i8mf2 ( ... ) __riscv_vmv_v_x_i8mf2(__VA_ARGS__)

◆ vmv_v_x_i8mf4

#define vmv_v_x_i8mf4 ( ... ) __riscv_vmv_v_x_i8mf4(__VA_ARGS__)

◆ vmv_v_x_i8mf8

#define vmv_v_x_i8mf8 ( ... ) __riscv_vmv_v_x_i8mf8(__VA_ARGS__)

◆ vmv_v_x_u16m1

#define vmv_v_x_u16m1 ( ... ) __riscv_vmv_v_x_u16m1(__VA_ARGS__)

◆ vmv_v_x_u16m2

#define vmv_v_x_u16m2 ( ... ) __riscv_vmv_v_x_u16m2(__VA_ARGS__)

◆ vmv_v_x_u16m4

#define vmv_v_x_u16m4 ( ... ) __riscv_vmv_v_x_u16m4(__VA_ARGS__)

◆ vmv_v_x_u16m8

#define vmv_v_x_u16m8 ( ... ) __riscv_vmv_v_x_u16m8(__VA_ARGS__)

◆ vmv_v_x_u16mf2

#define vmv_v_x_u16mf2 ( ... ) __riscv_vmv_v_x_u16mf2(__VA_ARGS__)

◆ vmv_v_x_u16mf4

#define vmv_v_x_u16mf4 ( ... ) __riscv_vmv_v_x_u16mf4(__VA_ARGS__)

◆ vmv_v_x_u32m1

#define vmv_v_x_u32m1 ( ... ) __riscv_vmv_v_x_u32m1(__VA_ARGS__)

◆ vmv_v_x_u32m2

#define vmv_v_x_u32m2 ( ... ) __riscv_vmv_v_x_u32m2(__VA_ARGS__)

◆ vmv_v_x_u32m4

#define vmv_v_x_u32m4 ( ... ) __riscv_vmv_v_x_u32m4(__VA_ARGS__)

◆ vmv_v_x_u32m8

#define vmv_v_x_u32m8 ( ... ) __riscv_vmv_v_x_u32m8(__VA_ARGS__)

◆ vmv_v_x_u32mf2

#define vmv_v_x_u32mf2 ( ... ) __riscv_vmv_v_x_u32mf2(__VA_ARGS__)

◆ vmv_v_x_u64m1

#define vmv_v_x_u64m1 ( ... ) __riscv_vmv_v_x_u64m1(__VA_ARGS__)

◆ vmv_v_x_u64m2

#define vmv_v_x_u64m2 ( ... ) __riscv_vmv_v_x_u64m2(__VA_ARGS__)

◆ vmv_v_x_u64m4

#define vmv_v_x_u64m4 ( ... ) __riscv_vmv_v_x_u64m4(__VA_ARGS__)

◆ vmv_v_x_u64m8

#define vmv_v_x_u64m8 ( ... ) __riscv_vmv_v_x_u64m8(__VA_ARGS__)

◆ vmv_v_x_u8m1

#define vmv_v_x_u8m1 ( ... ) __riscv_vmv_v_x_u8m1(__VA_ARGS__)

◆ vmv_v_x_u8m2

#define vmv_v_x_u8m2 ( ... ) __riscv_vmv_v_x_u8m2(__VA_ARGS__)

◆ vmv_v_x_u8m4

#define vmv_v_x_u8m4 ( ... ) __riscv_vmv_v_x_u8m4(__VA_ARGS__)

◆ vmv_v_x_u8m8

#define vmv_v_x_u8m8 ( ... ) __riscv_vmv_v_x_u8m8(__VA_ARGS__)

◆ vmv_v_x_u8mf2

#define vmv_v_x_u8mf2 ( ... ) __riscv_vmv_v_x_u8mf2(__VA_ARGS__)

◆ vmv_v_x_u8mf4

#define vmv_v_x_u8mf4 ( ... ) __riscv_vmv_v_x_u8mf4(__VA_ARGS__)

◆ vmv_v_x_u8mf8

#define vmv_v_x_u8mf8 ( ... ) __riscv_vmv_v_x_u8mf8(__VA_ARGS__)

◆ vmv_x_s_i16m1_i16

#define vmv_x_s_i16m1_i16 ( ... ) __riscv_vmv_x_s_i16m1_i16(__VA_ARGS__)

◆ vmv_x_s_i16m2_i16

#define vmv_x_s_i16m2_i16 ( ... ) __riscv_vmv_x_s_i16m2_i16(__VA_ARGS__)

◆ vmv_x_s_i16m4_i16

#define vmv_x_s_i16m4_i16 ( ... ) __riscv_vmv_x_s_i16m4_i16(__VA_ARGS__)

◆ vmv_x_s_i16m8_i16

#define vmv_x_s_i16m8_i16 ( ... ) __riscv_vmv_x_s_i16m8_i16(__VA_ARGS__)

◆ vmv_x_s_i16mf2_i16

#define vmv_x_s_i16mf2_i16 ( ... ) __riscv_vmv_x_s_i16mf2_i16(__VA_ARGS__)

◆ vmv_x_s_i16mf4_i16

#define vmv_x_s_i16mf4_i16 ( ... ) __riscv_vmv_x_s_i16mf4_i16(__VA_ARGS__)

◆ vmv_x_s_i32m1_i32

#define vmv_x_s_i32m1_i32 ( ... ) __riscv_vmv_x_s_i32m1_i32(__VA_ARGS__)

◆ vmv_x_s_i32m2_i32

#define vmv_x_s_i32m2_i32 ( ... ) __riscv_vmv_x_s_i32m2_i32(__VA_ARGS__)

◆ vmv_x_s_i32m4_i32

#define vmv_x_s_i32m4_i32 ( ... ) __riscv_vmv_x_s_i32m4_i32(__VA_ARGS__)

◆ vmv_x_s_i32m8_i32

#define vmv_x_s_i32m8_i32 ( ... ) __riscv_vmv_x_s_i32m8_i32(__VA_ARGS__)

◆ vmv_x_s_i32mf2_i32

#define vmv_x_s_i32mf2_i32 ( ... ) __riscv_vmv_x_s_i32mf2_i32(__VA_ARGS__)

◆ vmv_x_s_i64m1_i64

#define vmv_x_s_i64m1_i64 ( ... ) __riscv_vmv_x_s_i64m1_i64(__VA_ARGS__)

◆ vmv_x_s_i64m2_i64

#define vmv_x_s_i64m2_i64 ( ... ) __riscv_vmv_x_s_i64m2_i64(__VA_ARGS__)

◆ vmv_x_s_i64m4_i64

#define vmv_x_s_i64m4_i64 ( ... ) __riscv_vmv_x_s_i64m4_i64(__VA_ARGS__)

◆ vmv_x_s_i64m8_i64

#define vmv_x_s_i64m8_i64 ( ... ) __riscv_vmv_x_s_i64m8_i64(__VA_ARGS__)

◆ vmv_x_s_i8m1_i8

#define vmv_x_s_i8m1_i8 ( ... ) __riscv_vmv_x_s_i8m1_i8(__VA_ARGS__)

◆ vmv_x_s_i8m2_i8

#define vmv_x_s_i8m2_i8 ( ... ) __riscv_vmv_x_s_i8m2_i8(__VA_ARGS__)

◆ vmv_x_s_i8m4_i8

#define vmv_x_s_i8m4_i8 ( ... ) __riscv_vmv_x_s_i8m4_i8(__VA_ARGS__)

◆ vmv_x_s_i8m8_i8

#define vmv_x_s_i8m8_i8 ( ... ) __riscv_vmv_x_s_i8m8_i8(__VA_ARGS__)

◆ vmv_x_s_i8mf2_i8

#define vmv_x_s_i8mf2_i8 ( ... ) __riscv_vmv_x_s_i8mf2_i8(__VA_ARGS__)

◆ vmv_x_s_i8mf4_i8

#define vmv_x_s_i8mf4_i8 ( ... ) __riscv_vmv_x_s_i8mf4_i8(__VA_ARGS__)

◆ vmv_x_s_i8mf8_i8

#define vmv_x_s_i8mf8_i8 ( ... ) __riscv_vmv_x_s_i8mf8_i8(__VA_ARGS__)

◆ vmv_x_s_u16m1_u16

#define vmv_x_s_u16m1_u16 ( ... ) __riscv_vmv_x_s_u16m1_u16(__VA_ARGS__)

◆ vmv_x_s_u16m2_u16

#define vmv_x_s_u16m2_u16 ( ... ) __riscv_vmv_x_s_u16m2_u16(__VA_ARGS__)

◆ vmv_x_s_u16m4_u16

#define vmv_x_s_u16m4_u16 ( ... ) __riscv_vmv_x_s_u16m4_u16(__VA_ARGS__)

◆ vmv_x_s_u16m8_u16

#define vmv_x_s_u16m8_u16 ( ... ) __riscv_vmv_x_s_u16m8_u16(__VA_ARGS__)

◆ vmv_x_s_u16mf2_u16

#define vmv_x_s_u16mf2_u16 ( ... ) __riscv_vmv_x_s_u16mf2_u16(__VA_ARGS__)

◆ vmv_x_s_u16mf4_u16

#define vmv_x_s_u16mf4_u16 ( ... ) __riscv_vmv_x_s_u16mf4_u16(__VA_ARGS__)

◆ vmv_x_s_u32m1_u32

#define vmv_x_s_u32m1_u32 ( ... ) __riscv_vmv_x_s_u32m1_u32(__VA_ARGS__)

◆ vmv_x_s_u32m2_u32

#define vmv_x_s_u32m2_u32 ( ... ) __riscv_vmv_x_s_u32m2_u32(__VA_ARGS__)

◆ vmv_x_s_u32m4_u32

#define vmv_x_s_u32m4_u32 ( ... ) __riscv_vmv_x_s_u32m4_u32(__VA_ARGS__)

◆ vmv_x_s_u32m8_u32

#define vmv_x_s_u32m8_u32 ( ... ) __riscv_vmv_x_s_u32m8_u32(__VA_ARGS__)

◆ vmv_x_s_u32mf2_u32

#define vmv_x_s_u32mf2_u32 ( ... ) __riscv_vmv_x_s_u32mf2_u32(__VA_ARGS__)

◆ vmv_x_s_u64m1_u64

#define vmv_x_s_u64m1_u64 ( ... ) __riscv_vmv_x_s_u64m1_u64(__VA_ARGS__)

◆ vmv_x_s_u64m2_u64

#define vmv_x_s_u64m2_u64 ( ... ) __riscv_vmv_x_s_u64m2_u64(__VA_ARGS__)

◆ vmv_x_s_u64m4_u64

#define vmv_x_s_u64m4_u64 ( ... ) __riscv_vmv_x_s_u64m4_u64(__VA_ARGS__)

◆ vmv_x_s_u64m8_u64

#define vmv_x_s_u64m8_u64 ( ... ) __riscv_vmv_x_s_u64m8_u64(__VA_ARGS__)

◆ vmv_x_s_u8m1_u8

#define vmv_x_s_u8m1_u8 ( ... ) __riscv_vmv_x_s_u8m1_u8(__VA_ARGS__)

◆ vmv_x_s_u8m2_u8

#define vmv_x_s_u8m2_u8 ( ... ) __riscv_vmv_x_s_u8m2_u8(__VA_ARGS__)

◆ vmv_x_s_u8m4_u8

#define vmv_x_s_u8m4_u8 ( ... ) __riscv_vmv_x_s_u8m4_u8(__VA_ARGS__)

◆ vmv_x_s_u8m8_u8

#define vmv_x_s_u8m8_u8 ( ... ) __riscv_vmv_x_s_u8m8_u8(__VA_ARGS__)

◆ vmv_x_s_u8mf2_u8

#define vmv_x_s_u8mf2_u8 ( ... ) __riscv_vmv_x_s_u8mf2_u8(__VA_ARGS__)

◆ vmv_x_s_u8mf4_u8

#define vmv_x_s_u8mf4_u8 ( ... ) __riscv_vmv_x_s_u8mf4_u8(__VA_ARGS__)

◆ vmv_x_s_u8mf8_u8

#define vmv_x_s_u8mf8_u8 ( ... ) __riscv_vmv_x_s_u8mf8_u8(__VA_ARGS__)

◆ vmxnor_mm_b1

#define vmxnor_mm_b1 ( ... ) __riscv_vmxnor_mm_b1(__VA_ARGS__)

◆ vmxnor_mm_b16

#define vmxnor_mm_b16 ( ... ) __riscv_vmxnor_mm_b16(__VA_ARGS__)

◆ vmxnor_mm_b2

#define vmxnor_mm_b2 ( ... ) __riscv_vmxnor_mm_b2(__VA_ARGS__)

◆ vmxnor_mm_b32

#define vmxnor_mm_b32 ( ... ) __riscv_vmxnor_mm_b32(__VA_ARGS__)

◆ vmxnor_mm_b4

#define vmxnor_mm_b4 ( ... ) __riscv_vmxnor_mm_b4(__VA_ARGS__)

◆ vmxnor_mm_b64

#define vmxnor_mm_b64 ( ... ) __riscv_vmxnor_mm_b64(__VA_ARGS__)

◆ vmxnor_mm_b8

#define vmxnor_mm_b8 ( ... ) __riscv_vmxnor_mm_b8(__VA_ARGS__)

◆ vmxor_mm_b1

#define vmxor_mm_b1 ( ... ) __riscv_vmxor_mm_b1(__VA_ARGS__)

◆ vmxor_mm_b16

#define vmxor_mm_b16 ( ... ) __riscv_vmxor_mm_b16(__VA_ARGS__)

◆ vmxor_mm_b2

#define vmxor_mm_b2 ( ... ) __riscv_vmxor_mm_b2(__VA_ARGS__)

◆ vmxor_mm_b32

#define vmxor_mm_b32 ( ... ) __riscv_vmxor_mm_b32(__VA_ARGS__)

◆ vmxor_mm_b4

#define vmxor_mm_b4 ( ... ) __riscv_vmxor_mm_b4(__VA_ARGS__)

◆ vmxor_mm_b64

#define vmxor_mm_b64 ( ... ) __riscv_vmxor_mm_b64(__VA_ARGS__)

◆ vmxor_mm_b8

#define vmxor_mm_b8 ( ... ) __riscv_vmxor_mm_b8(__VA_ARGS__)

◆ vnclip_wv_i16m1

#define vnclip_wv_i16m1 ( ... ) __riscv_vnclip_wv_i16m1(__VA_ARGS__)

◆ vnclip_wv_i16m1_m

#define vnclip_wv_i16m1_m ( ... ) __riscv_vnclip_wv_i16m1_tumu(__VA_ARGS__)

◆ vnclip_wv_i16m2

#define vnclip_wv_i16m2 ( ... ) __riscv_vnclip_wv_i16m2(__VA_ARGS__)

◆ vnclip_wv_i16m2_m

#define vnclip_wv_i16m2_m ( ... ) __riscv_vnclip_wv_i16m2_tumu(__VA_ARGS__)

◆ vnclip_wv_i16m4

#define vnclip_wv_i16m4 ( ... ) __riscv_vnclip_wv_i16m4(__VA_ARGS__)

◆ vnclip_wv_i16m4_m

#define vnclip_wv_i16m4_m ( ... ) __riscv_vnclip_wv_i16m4_tumu(__VA_ARGS__)

◆ vnclip_wv_i16mf2

#define vnclip_wv_i16mf2 ( ... ) __riscv_vnclip_wv_i16mf2(__VA_ARGS__)

◆ vnclip_wv_i16mf2_m

#define vnclip_wv_i16mf2_m ( ... ) __riscv_vnclip_wv_i16mf2_tumu(__VA_ARGS__)

◆ vnclip_wv_i16mf4

#define vnclip_wv_i16mf4 ( ... ) __riscv_vnclip_wv_i16mf4(__VA_ARGS__)

◆ vnclip_wv_i16mf4_m

#define vnclip_wv_i16mf4_m ( ... ) __riscv_vnclip_wv_i16mf4_tumu(__VA_ARGS__)

◆ vnclip_wv_i32m1

#define vnclip_wv_i32m1 ( ... ) __riscv_vnclip_wv_i32m1(__VA_ARGS__)

◆ vnclip_wv_i32m1_m

#define vnclip_wv_i32m1_m ( ... ) __riscv_vnclip_wv_i32m1_tumu(__VA_ARGS__)

◆ vnclip_wv_i32m2

#define vnclip_wv_i32m2 ( ... ) __riscv_vnclip_wv_i32m2(__VA_ARGS__)

◆ vnclip_wv_i32m2_m

#define vnclip_wv_i32m2_m ( ... ) __riscv_vnclip_wv_i32m2_tumu(__VA_ARGS__)

◆ vnclip_wv_i32m4

#define vnclip_wv_i32m4 ( ... ) __riscv_vnclip_wv_i32m4(__VA_ARGS__)

◆ vnclip_wv_i32m4_m

#define vnclip_wv_i32m4_m ( ... ) __riscv_vnclip_wv_i32m4_tumu(__VA_ARGS__)

◆ vnclip_wv_i32mf2

#define vnclip_wv_i32mf2 ( ... ) __riscv_vnclip_wv_i32mf2(__VA_ARGS__)

◆ vnclip_wv_i32mf2_m

#define vnclip_wv_i32mf2_m ( ... ) __riscv_vnclip_wv_i32mf2_tumu(__VA_ARGS__)

◆ vnclip_wv_i8m1

#define vnclip_wv_i8m1 ( ... ) __riscv_vnclip_wv_i8m1(__VA_ARGS__)

◆ vnclip_wv_i8m1_m

#define vnclip_wv_i8m1_m ( ... ) __riscv_vnclip_wv_i8m1_tumu(__VA_ARGS__)

◆ vnclip_wv_i8m2

#define vnclip_wv_i8m2 ( ... ) __riscv_vnclip_wv_i8m2(__VA_ARGS__)

◆ vnclip_wv_i8m2_m

#define vnclip_wv_i8m2_m ( ... ) __riscv_vnclip_wv_i8m2_tumu(__VA_ARGS__)

◆ vnclip_wv_i8m4

#define vnclip_wv_i8m4 ( ... ) __riscv_vnclip_wv_i8m4(__VA_ARGS__)

◆ vnclip_wv_i8m4_m

#define vnclip_wv_i8m4_m ( ... ) __riscv_vnclip_wv_i8m4_tumu(__VA_ARGS__)

◆ vnclip_wv_i8mf2

#define vnclip_wv_i8mf2 ( ... ) __riscv_vnclip_wv_i8mf2(__VA_ARGS__)

◆ vnclip_wv_i8mf2_m

#define vnclip_wv_i8mf2_m ( ... ) __riscv_vnclip_wv_i8mf2_tumu(__VA_ARGS__)

◆ vnclip_wv_i8mf4

#define vnclip_wv_i8mf4 ( ... ) __riscv_vnclip_wv_i8mf4(__VA_ARGS__)

◆ vnclip_wv_i8mf4_m

#define vnclip_wv_i8mf4_m ( ... ) __riscv_vnclip_wv_i8mf4_tumu(__VA_ARGS__)

◆ vnclip_wv_i8mf8

#define vnclip_wv_i8mf8 ( ... ) __riscv_vnclip_wv_i8mf8(__VA_ARGS__)

◆ vnclip_wv_i8mf8_m

#define vnclip_wv_i8mf8_m ( ... ) __riscv_vnclip_wv_i8mf8_tumu(__VA_ARGS__)

◆ vnclip_wx_i16m1

#define vnclip_wx_i16m1 ( ... ) __riscv_vnclip_wx_i16m1(__VA_ARGS__)

◆ vnclip_wx_i16m1_m

#define vnclip_wx_i16m1_m ( ... ) __riscv_vnclip_wx_i16m1_tumu(__VA_ARGS__)

◆ vnclip_wx_i16m2

#define vnclip_wx_i16m2 ( ... ) __riscv_vnclip_wx_i16m2(__VA_ARGS__)

◆ vnclip_wx_i16m2_m

#define vnclip_wx_i16m2_m ( ... ) __riscv_vnclip_wx_i16m2_tumu(__VA_ARGS__)

◆ vnclip_wx_i16m4

#define vnclip_wx_i16m4 ( ... ) __riscv_vnclip_wx_i16m4(__VA_ARGS__)

◆ vnclip_wx_i16m4_m

#define vnclip_wx_i16m4_m ( ... ) __riscv_vnclip_wx_i16m4_tumu(__VA_ARGS__)

◆ vnclip_wx_i16mf2

#define vnclip_wx_i16mf2 ( ... ) __riscv_vnclip_wx_i16mf2(__VA_ARGS__)

◆ vnclip_wx_i16mf2_m

#define vnclip_wx_i16mf2_m ( ... ) __riscv_vnclip_wx_i16mf2_tumu(__VA_ARGS__)

◆ vnclip_wx_i16mf4

#define vnclip_wx_i16mf4 ( ... ) __riscv_vnclip_wx_i16mf4(__VA_ARGS__)

◆ vnclip_wx_i16mf4_m

#define vnclip_wx_i16mf4_m ( ... ) __riscv_vnclip_wx_i16mf4_tumu(__VA_ARGS__)

◆ vnclip_wx_i32m1

#define vnclip_wx_i32m1 ( ... ) __riscv_vnclip_wx_i32m1(__VA_ARGS__)

◆ vnclip_wx_i32m1_m

#define vnclip_wx_i32m1_m ( ... ) __riscv_vnclip_wx_i32m1_tumu(__VA_ARGS__)

◆ vnclip_wx_i32m2

#define vnclip_wx_i32m2 ( ... ) __riscv_vnclip_wx_i32m2(__VA_ARGS__)

◆ vnclip_wx_i32m2_m

#define vnclip_wx_i32m2_m ( ... ) __riscv_vnclip_wx_i32m2_tumu(__VA_ARGS__)

◆ vnclip_wx_i32m4

#define vnclip_wx_i32m4 ( ... ) __riscv_vnclip_wx_i32m4(__VA_ARGS__)

◆ vnclip_wx_i32m4_m

#define vnclip_wx_i32m4_m ( ... ) __riscv_vnclip_wx_i32m4_tumu(__VA_ARGS__)

◆ vnclip_wx_i32mf2

#define vnclip_wx_i32mf2 ( ... ) __riscv_vnclip_wx_i32mf2(__VA_ARGS__)

◆ vnclip_wx_i32mf2_m

#define vnclip_wx_i32mf2_m ( ... ) __riscv_vnclip_wx_i32mf2_tumu(__VA_ARGS__)

◆ vnclip_wx_i8m1

#define vnclip_wx_i8m1 ( ... ) __riscv_vnclip_wx_i8m1(__VA_ARGS__)

◆ vnclip_wx_i8m1_m

#define vnclip_wx_i8m1_m ( ... ) __riscv_vnclip_wx_i8m1_tumu(__VA_ARGS__)

◆ vnclip_wx_i8m2

#define vnclip_wx_i8m2 ( ... ) __riscv_vnclip_wx_i8m2(__VA_ARGS__)

◆ vnclip_wx_i8m2_m

#define vnclip_wx_i8m2_m ( ... ) __riscv_vnclip_wx_i8m2_tumu(__VA_ARGS__)

◆ vnclip_wx_i8m4

#define vnclip_wx_i8m4 ( ... ) __riscv_vnclip_wx_i8m4(__VA_ARGS__)

◆ vnclip_wx_i8m4_m

#define vnclip_wx_i8m4_m ( ... ) __riscv_vnclip_wx_i8m4_tumu(__VA_ARGS__)

◆ vnclip_wx_i8mf2

#define vnclip_wx_i8mf2 ( ... ) __riscv_vnclip_wx_i8mf2(__VA_ARGS__)

◆ vnclip_wx_i8mf2_m

#define vnclip_wx_i8mf2_m ( ... ) __riscv_vnclip_wx_i8mf2_tumu(__VA_ARGS__)

◆ vnclip_wx_i8mf4

#define vnclip_wx_i8mf4 ( ... ) __riscv_vnclip_wx_i8mf4(__VA_ARGS__)

◆ vnclip_wx_i8mf4_m

#define vnclip_wx_i8mf4_m ( ... ) __riscv_vnclip_wx_i8mf4_tumu(__VA_ARGS__)

◆ vnclip_wx_i8mf8

#define vnclip_wx_i8mf8 ( ... ) __riscv_vnclip_wx_i8mf8(__VA_ARGS__)

◆ vnclip_wx_i8mf8_m

#define vnclip_wx_i8mf8_m ( ... ) __riscv_vnclip_wx_i8mf8_tumu(__VA_ARGS__)

◆ vnclipu_wv_u16m1

#define vnclipu_wv_u16m1 ( ... ) __riscv_vnclipu_wv_u16m1(__VA_ARGS__)

◆ vnclipu_wv_u16m1_m

#define vnclipu_wv_u16m1_m ( ... ) __riscv_vnclipu_wv_u16m1_tumu(__VA_ARGS__)

◆ vnclipu_wv_u16m2

#define vnclipu_wv_u16m2 ( ... ) __riscv_vnclipu_wv_u16m2(__VA_ARGS__)

◆ vnclipu_wv_u16m2_m

#define vnclipu_wv_u16m2_m ( ... ) __riscv_vnclipu_wv_u16m2_tumu(__VA_ARGS__)

◆ vnclipu_wv_u16m4

#define vnclipu_wv_u16m4 ( ... ) __riscv_vnclipu_wv_u16m4(__VA_ARGS__)

◆ vnclipu_wv_u16m4_m

#define vnclipu_wv_u16m4_m ( ... ) __riscv_vnclipu_wv_u16m4_tumu(__VA_ARGS__)

◆ vnclipu_wv_u16mf2

#define vnclipu_wv_u16mf2 ( ... ) __riscv_vnclipu_wv_u16mf2(__VA_ARGS__)

◆ vnclipu_wv_u16mf2_m

#define vnclipu_wv_u16mf2_m ( ... ) __riscv_vnclipu_wv_u16mf2_tumu(__VA_ARGS__)

◆ vnclipu_wv_u16mf4

#define vnclipu_wv_u16mf4 ( ... ) __riscv_vnclipu_wv_u16mf4(__VA_ARGS__)

◆ vnclipu_wv_u16mf4_m

#define vnclipu_wv_u16mf4_m ( ... ) __riscv_vnclipu_wv_u16mf4_tumu(__VA_ARGS__)

◆ vnclipu_wv_u32m1

#define vnclipu_wv_u32m1 ( ... ) __riscv_vnclipu_wv_u32m1(__VA_ARGS__)

◆ vnclipu_wv_u32m1_m

#define vnclipu_wv_u32m1_m ( ... ) __riscv_vnclipu_wv_u32m1_tumu(__VA_ARGS__)

◆ vnclipu_wv_u32m2

#define vnclipu_wv_u32m2 ( ... ) __riscv_vnclipu_wv_u32m2(__VA_ARGS__)

◆ vnclipu_wv_u32m2_m

#define vnclipu_wv_u32m2_m ( ... ) __riscv_vnclipu_wv_u32m2_tumu(__VA_ARGS__)

◆ vnclipu_wv_u32m4

#define vnclipu_wv_u32m4 ( ... ) __riscv_vnclipu_wv_u32m4(__VA_ARGS__)

◆ vnclipu_wv_u32m4_m

#define vnclipu_wv_u32m4_m ( ... ) __riscv_vnclipu_wv_u32m4_tumu(__VA_ARGS__)

◆ vnclipu_wv_u32mf2

#define vnclipu_wv_u32mf2 ( ... ) __riscv_vnclipu_wv_u32mf2(__VA_ARGS__)

◆ vnclipu_wv_u32mf2_m

#define vnclipu_wv_u32mf2_m ( ... ) __riscv_vnclipu_wv_u32mf2_tumu(__VA_ARGS__)

◆ vnclipu_wv_u8m1

#define vnclipu_wv_u8m1 ( ... ) __riscv_vnclipu_wv_u8m1(__VA_ARGS__)

◆ vnclipu_wv_u8m1_m

#define vnclipu_wv_u8m1_m ( ... ) __riscv_vnclipu_wv_u8m1_tumu(__VA_ARGS__)

◆ vnclipu_wv_u8m2

#define vnclipu_wv_u8m2 ( ... ) __riscv_vnclipu_wv_u8m2(__VA_ARGS__)

◆ vnclipu_wv_u8m2_m

#define vnclipu_wv_u8m2_m ( ... ) __riscv_vnclipu_wv_u8m2_tumu(__VA_ARGS__)

◆ vnclipu_wv_u8m4

#define vnclipu_wv_u8m4 ( ... ) __riscv_vnclipu_wv_u8m4(__VA_ARGS__)

◆ vnclipu_wv_u8m4_m

#define vnclipu_wv_u8m4_m ( ... ) __riscv_vnclipu_wv_u8m4_tumu(__VA_ARGS__)

◆ vnclipu_wv_u8mf2

#define vnclipu_wv_u8mf2 ( ... ) __riscv_vnclipu_wv_u8mf2(__VA_ARGS__)

◆ vnclipu_wv_u8mf2_m

#define vnclipu_wv_u8mf2_m ( ... ) __riscv_vnclipu_wv_u8mf2_tumu(__VA_ARGS__)

◆ vnclipu_wv_u8mf4

#define vnclipu_wv_u8mf4 ( ... ) __riscv_vnclipu_wv_u8mf4(__VA_ARGS__)

◆ vnclipu_wv_u8mf4_m

#define vnclipu_wv_u8mf4_m ( ... ) __riscv_vnclipu_wv_u8mf4_tumu(__VA_ARGS__)

◆ vnclipu_wv_u8mf8

#define vnclipu_wv_u8mf8 ( ... ) __riscv_vnclipu_wv_u8mf8(__VA_ARGS__)

◆ vnclipu_wv_u8mf8_m

#define vnclipu_wv_u8mf8_m ( ... ) __riscv_vnclipu_wv_u8mf8_tumu(__VA_ARGS__)

◆ vnclipu_wx_u16m1

#define vnclipu_wx_u16m1 ( ... ) __riscv_vnclipu_wx_u16m1(__VA_ARGS__)

◆ vnclipu_wx_u16m1_m

#define vnclipu_wx_u16m1_m ( ... ) __riscv_vnclipu_wx_u16m1_tumu(__VA_ARGS__)

◆ vnclipu_wx_u16m2

#define vnclipu_wx_u16m2 ( ... ) __riscv_vnclipu_wx_u16m2(__VA_ARGS__)

◆ vnclipu_wx_u16m2_m

#define vnclipu_wx_u16m2_m ( ... ) __riscv_vnclipu_wx_u16m2_tumu(__VA_ARGS__)

◆ vnclipu_wx_u16m4

#define vnclipu_wx_u16m4 ( ... ) __riscv_vnclipu_wx_u16m4(__VA_ARGS__)

◆ vnclipu_wx_u16m4_m

#define vnclipu_wx_u16m4_m ( ... ) __riscv_vnclipu_wx_u16m4_tumu(__VA_ARGS__)

◆ vnclipu_wx_u16mf2

#define vnclipu_wx_u16mf2 ( ... ) __riscv_vnclipu_wx_u16mf2(__VA_ARGS__)

◆ vnclipu_wx_u16mf2_m

#define vnclipu_wx_u16mf2_m ( ... ) __riscv_vnclipu_wx_u16mf2_tumu(__VA_ARGS__)

◆ vnclipu_wx_u16mf4

#define vnclipu_wx_u16mf4 ( ... ) __riscv_vnclipu_wx_u16mf4(__VA_ARGS__)

◆ vnclipu_wx_u16mf4_m

#define vnclipu_wx_u16mf4_m ( ... ) __riscv_vnclipu_wx_u16mf4_tumu(__VA_ARGS__)

◆ vnclipu_wx_u32m1

#define vnclipu_wx_u32m1 ( ... ) __riscv_vnclipu_wx_u32m1(__VA_ARGS__)

◆ vnclipu_wx_u32m1_m

#define vnclipu_wx_u32m1_m ( ... ) __riscv_vnclipu_wx_u32m1_tumu(__VA_ARGS__)

◆ vnclipu_wx_u32m2

#define vnclipu_wx_u32m2 ( ... ) __riscv_vnclipu_wx_u32m2(__VA_ARGS__)

◆ vnclipu_wx_u32m2_m

#define vnclipu_wx_u32m2_m ( ... ) __riscv_vnclipu_wx_u32m2_tumu(__VA_ARGS__)

◆ vnclipu_wx_u32m4

#define vnclipu_wx_u32m4 ( ... ) __riscv_vnclipu_wx_u32m4(__VA_ARGS__)

◆ vnclipu_wx_u32m4_m

#define vnclipu_wx_u32m4_m ( ... ) __riscv_vnclipu_wx_u32m4_tumu(__VA_ARGS__)

◆ vnclipu_wx_u32mf2

#define vnclipu_wx_u32mf2 ( ... ) __riscv_vnclipu_wx_u32mf2(__VA_ARGS__)

◆ vnclipu_wx_u32mf2_m

#define vnclipu_wx_u32mf2_m ( ... ) __riscv_vnclipu_wx_u32mf2_tumu(__VA_ARGS__)

◆ vnclipu_wx_u8m1

#define vnclipu_wx_u8m1 ( ... ) __riscv_vnclipu_wx_u8m1(__VA_ARGS__)

◆ vnclipu_wx_u8m1_m

#define vnclipu_wx_u8m1_m ( ... ) __riscv_vnclipu_wx_u8m1_tumu(__VA_ARGS__)

◆ vnclipu_wx_u8m2

#define vnclipu_wx_u8m2 ( ... ) __riscv_vnclipu_wx_u8m2(__VA_ARGS__)

◆ vnclipu_wx_u8m2_m

#define vnclipu_wx_u8m2_m ( ... ) __riscv_vnclipu_wx_u8m2_tumu(__VA_ARGS__)

◆ vnclipu_wx_u8m4

#define vnclipu_wx_u8m4 ( ... ) __riscv_vnclipu_wx_u8m4(__VA_ARGS__)

◆ vnclipu_wx_u8m4_m

#define vnclipu_wx_u8m4_m ( ... ) __riscv_vnclipu_wx_u8m4_tumu(__VA_ARGS__)

◆ vnclipu_wx_u8mf2

#define vnclipu_wx_u8mf2 ( ... ) __riscv_vnclipu_wx_u8mf2(__VA_ARGS__)

◆ vnclipu_wx_u8mf2_m

#define vnclipu_wx_u8mf2_m ( ... ) __riscv_vnclipu_wx_u8mf2_tumu(__VA_ARGS__)

◆ vnclipu_wx_u8mf4

#define vnclipu_wx_u8mf4 ( ... ) __riscv_vnclipu_wx_u8mf4(__VA_ARGS__)

◆ vnclipu_wx_u8mf4_m

#define vnclipu_wx_u8mf4_m ( ... ) __riscv_vnclipu_wx_u8mf4_tumu(__VA_ARGS__)

◆ vnclipu_wx_u8mf8

#define vnclipu_wx_u8mf8 ( ... ) __riscv_vnclipu_wx_u8mf8(__VA_ARGS__)

◆ vnclipu_wx_u8mf8_m

#define vnclipu_wx_u8mf8_m ( ... ) __riscv_vnclipu_wx_u8mf8_tumu(__VA_ARGS__)

◆ vncvt_x_x_w_i16m1

#define vncvt_x_x_w_i16m1 ( ... ) __riscv_vncvt_x_x_w_i16m1(__VA_ARGS__)

◆ vncvt_x_x_w_i16m1_m

#define vncvt_x_x_w_i16m1_m ( ... ) __riscv_vncvt_x_x_w_i16m1_tumu(__VA_ARGS__)

◆ vncvt_x_x_w_i16m2

#define vncvt_x_x_w_i16m2 ( ... ) __riscv_vncvt_x_x_w_i16m2(__VA_ARGS__)

◆ vncvt_x_x_w_i16m2_m

#define vncvt_x_x_w_i16m2_m ( ... ) __riscv_vncvt_x_x_w_i16m2_tumu(__VA_ARGS__)

◆ vncvt_x_x_w_i16m4

#define vncvt_x_x_w_i16m4 ( ... ) __riscv_vncvt_x_x_w_i16m4(__VA_ARGS__)

◆ vncvt_x_x_w_i16m4_m

#define vncvt_x_x_w_i16m4_m ( ... ) __riscv_vncvt_x_x_w_i16m4_tumu(__VA_ARGS__)

◆ vncvt_x_x_w_i16mf2

#define vncvt_x_x_w_i16mf2 ( ... ) __riscv_vncvt_x_x_w_i16mf2(__VA_ARGS__)

◆ vncvt_x_x_w_i16mf2_m

#define vncvt_x_x_w_i16mf2_m ( ... ) __riscv_vncvt_x_x_w_i16mf2_tumu(__VA_ARGS__)

◆ vncvt_x_x_w_i16mf4

#define vncvt_x_x_w_i16mf4 ( ... ) __riscv_vncvt_x_x_w_i16mf4(__VA_ARGS__)

◆ vncvt_x_x_w_i16mf4_m

#define vncvt_x_x_w_i16mf4_m ( ... ) __riscv_vncvt_x_x_w_i16mf4_tumu(__VA_ARGS__)

◆ vncvt_x_x_w_i32m1

#define vncvt_x_x_w_i32m1 ( ... ) __riscv_vncvt_x_x_w_i32m1(__VA_ARGS__)

◆ vncvt_x_x_w_i32m1_m

#define vncvt_x_x_w_i32m1_m ( ... ) __riscv_vncvt_x_x_w_i32m1_tumu(__VA_ARGS__)

◆ vncvt_x_x_w_i32m2

#define vncvt_x_x_w_i32m2 ( ... ) __riscv_vncvt_x_x_w_i32m2(__VA_ARGS__)

◆ vncvt_x_x_w_i32m2_m

#define vncvt_x_x_w_i32m2_m ( ... ) __riscv_vncvt_x_x_w_i32m2_tumu(__VA_ARGS__)

◆ vncvt_x_x_w_i32m4

#define vncvt_x_x_w_i32m4 ( ... ) __riscv_vncvt_x_x_w_i32m4(__VA_ARGS__)

◆ vncvt_x_x_w_i32m4_m

#define vncvt_x_x_w_i32m4_m ( ... ) __riscv_vncvt_x_x_w_i32m4_tumu(__VA_ARGS__)

◆ vncvt_x_x_w_i32mf2

#define vncvt_x_x_w_i32mf2 ( ... ) __riscv_vncvt_x_x_w_i32mf2(__VA_ARGS__)

◆ vncvt_x_x_w_i32mf2_m

#define vncvt_x_x_w_i32mf2_m ( ... ) __riscv_vncvt_x_x_w_i32mf2_tumu(__VA_ARGS__)

◆ vncvt_x_x_w_i8m1

#define vncvt_x_x_w_i8m1 ( ... ) __riscv_vncvt_x_x_w_i8m1(__VA_ARGS__)

◆ vncvt_x_x_w_i8m1_m

#define vncvt_x_x_w_i8m1_m ( ... ) __riscv_vncvt_x_x_w_i8m1_tumu(__VA_ARGS__)

◆ vncvt_x_x_w_i8m2

#define vncvt_x_x_w_i8m2 ( ... ) __riscv_vncvt_x_x_w_i8m2(__VA_ARGS__)

◆ vncvt_x_x_w_i8m2_m

#define vncvt_x_x_w_i8m2_m ( ... ) __riscv_vncvt_x_x_w_i8m2_tumu(__VA_ARGS__)

◆ vncvt_x_x_w_i8m4

#define vncvt_x_x_w_i8m4 ( ... ) __riscv_vncvt_x_x_w_i8m4(__VA_ARGS__)

◆ vncvt_x_x_w_i8m4_m

#define vncvt_x_x_w_i8m4_m ( ... ) __riscv_vncvt_x_x_w_i8m4_tumu(__VA_ARGS__)

◆ vncvt_x_x_w_i8mf2

#define vncvt_x_x_w_i8mf2 ( ... ) __riscv_vncvt_x_x_w_i8mf2(__VA_ARGS__)

◆ vncvt_x_x_w_i8mf2_m

#define vncvt_x_x_w_i8mf2_m ( ... ) __riscv_vncvt_x_x_w_i8mf2_tumu(__VA_ARGS__)

◆ vncvt_x_x_w_i8mf4

#define vncvt_x_x_w_i8mf4 ( ... ) __riscv_vncvt_x_x_w_i8mf4(__VA_ARGS__)

◆ vncvt_x_x_w_i8mf4_m

#define vncvt_x_x_w_i8mf4_m ( ... ) __riscv_vncvt_x_x_w_i8mf4_tumu(__VA_ARGS__)

◆ vncvt_x_x_w_i8mf8

#define vncvt_x_x_w_i8mf8 ( ... ) __riscv_vncvt_x_x_w_i8mf8(__VA_ARGS__)

◆ vncvt_x_x_w_i8mf8_m

#define vncvt_x_x_w_i8mf8_m ( ... ) __riscv_vncvt_x_x_w_i8mf8_tumu(__VA_ARGS__)

◆ vncvt_x_x_w_u16m1

#define vncvt_x_x_w_u16m1 ( ... ) __riscv_vncvt_x_x_w_u16m1(__VA_ARGS__)

◆ vncvt_x_x_w_u16m1_m

#define vncvt_x_x_w_u16m1_m ( ... ) __riscv_vncvt_x_x_w_u16m1_tumu(__VA_ARGS__)

◆ vncvt_x_x_w_u16m2

#define vncvt_x_x_w_u16m2 ( ... ) __riscv_vncvt_x_x_w_u16m2(__VA_ARGS__)

◆ vncvt_x_x_w_u16m2_m

#define vncvt_x_x_w_u16m2_m ( ... ) __riscv_vncvt_x_x_w_u16m2_tumu(__VA_ARGS__)

◆ vncvt_x_x_w_u16m4

#define vncvt_x_x_w_u16m4 ( ... ) __riscv_vncvt_x_x_w_u16m4(__VA_ARGS__)

◆ vncvt_x_x_w_u16m4_m

#define vncvt_x_x_w_u16m4_m ( ... ) __riscv_vncvt_x_x_w_u16m4_tumu(__VA_ARGS__)

◆ vncvt_x_x_w_u16mf2

#define vncvt_x_x_w_u16mf2 ( ... ) __riscv_vncvt_x_x_w_u16mf2(__VA_ARGS__)

◆ vncvt_x_x_w_u16mf2_m

#define vncvt_x_x_w_u16mf2_m ( ... ) __riscv_vncvt_x_x_w_u16mf2_tumu(__VA_ARGS__)

◆ vncvt_x_x_w_u16mf4

#define vncvt_x_x_w_u16mf4 ( ... ) __riscv_vncvt_x_x_w_u16mf4(__VA_ARGS__)

◆ vncvt_x_x_w_u16mf4_m

#define vncvt_x_x_w_u16mf4_m ( ... ) __riscv_vncvt_x_x_w_u16mf4_tumu(__VA_ARGS__)

◆ vncvt_x_x_w_u32m1

#define vncvt_x_x_w_u32m1 ( ... ) __riscv_vncvt_x_x_w_u32m1(__VA_ARGS__)

◆ vncvt_x_x_w_u32m1_m

#define vncvt_x_x_w_u32m1_m ( ... ) __riscv_vncvt_x_x_w_u32m1_tumu(__VA_ARGS__)

◆ vncvt_x_x_w_u32m2

#define vncvt_x_x_w_u32m2 ( ... ) __riscv_vncvt_x_x_w_u32m2(__VA_ARGS__)

◆ vncvt_x_x_w_u32m2_m

#define vncvt_x_x_w_u32m2_m ( ... ) __riscv_vncvt_x_x_w_u32m2_tumu(__VA_ARGS__)

◆ vncvt_x_x_w_u32m4

#define vncvt_x_x_w_u32m4 ( ... ) __riscv_vncvt_x_x_w_u32m4(__VA_ARGS__)

◆ vncvt_x_x_w_u32m4_m

#define vncvt_x_x_w_u32m4_m ( ... ) __riscv_vncvt_x_x_w_u32m4_tumu(__VA_ARGS__)

◆ vncvt_x_x_w_u32mf2

#define vncvt_x_x_w_u32mf2 ( ... ) __riscv_vncvt_x_x_w_u32mf2(__VA_ARGS__)

◆ vncvt_x_x_w_u32mf2_m

#define vncvt_x_x_w_u32mf2_m ( ... ) __riscv_vncvt_x_x_w_u32mf2_tumu(__VA_ARGS__)

◆ vncvt_x_x_w_u8m1

#define vncvt_x_x_w_u8m1 ( ... ) __riscv_vncvt_x_x_w_u8m1(__VA_ARGS__)

◆ vncvt_x_x_w_u8m1_m

#define vncvt_x_x_w_u8m1_m ( ... ) __riscv_vncvt_x_x_w_u8m1_tumu(__VA_ARGS__)

◆ vncvt_x_x_w_u8m2

#define vncvt_x_x_w_u8m2 ( ... ) __riscv_vncvt_x_x_w_u8m2(__VA_ARGS__)

◆ vncvt_x_x_w_u8m2_m

#define vncvt_x_x_w_u8m2_m ( ... ) __riscv_vncvt_x_x_w_u8m2_tumu(__VA_ARGS__)

◆ vncvt_x_x_w_u8m4

#define vncvt_x_x_w_u8m4 ( ... ) __riscv_vncvt_x_x_w_u8m4(__VA_ARGS__)

◆ vncvt_x_x_w_u8m4_m

#define vncvt_x_x_w_u8m4_m ( ... ) __riscv_vncvt_x_x_w_u8m4_tumu(__VA_ARGS__)

◆ vncvt_x_x_w_u8mf2

#define vncvt_x_x_w_u8mf2 ( ... ) __riscv_vncvt_x_x_w_u8mf2(__VA_ARGS__)

◆ vncvt_x_x_w_u8mf2_m

#define vncvt_x_x_w_u8mf2_m ( ... ) __riscv_vncvt_x_x_w_u8mf2_tumu(__VA_ARGS__)

◆ vncvt_x_x_w_u8mf4

#define vncvt_x_x_w_u8mf4 ( ... ) __riscv_vncvt_x_x_w_u8mf4(__VA_ARGS__)

◆ vncvt_x_x_w_u8mf4_m

#define vncvt_x_x_w_u8mf4_m ( ... ) __riscv_vncvt_x_x_w_u8mf4_tumu(__VA_ARGS__)

◆ vncvt_x_x_w_u8mf8

#define vncvt_x_x_w_u8mf8 ( ... ) __riscv_vncvt_x_x_w_u8mf8(__VA_ARGS__)

◆ vncvt_x_x_w_u8mf8_m

#define vncvt_x_x_w_u8mf8_m ( ... ) __riscv_vncvt_x_x_w_u8mf8_tumu(__VA_ARGS__)

◆ vneg_v_i16m1

#define vneg_v_i16m1 ( ... ) __riscv_vneg_v_i16m1(__VA_ARGS__)

◆ vneg_v_i16m1_m

#define vneg_v_i16m1_m ( ... ) __riscv_vneg_v_i16m1_tumu(__VA_ARGS__)

◆ vneg_v_i16m2

#define vneg_v_i16m2 ( ... ) __riscv_vneg_v_i16m2(__VA_ARGS__)

◆ vneg_v_i16m2_m

#define vneg_v_i16m2_m ( ... ) __riscv_vneg_v_i16m2_tumu(__VA_ARGS__)

◆ vneg_v_i16m4

#define vneg_v_i16m4 ( ... ) __riscv_vneg_v_i16m4(__VA_ARGS__)

◆ vneg_v_i16m4_m

#define vneg_v_i16m4_m ( ... ) __riscv_vneg_v_i16m4_tumu(__VA_ARGS__)

◆ vneg_v_i16m8

#define vneg_v_i16m8 ( ... ) __riscv_vneg_v_i16m8(__VA_ARGS__)

◆ vneg_v_i16m8_m

#define vneg_v_i16m8_m ( ... ) __riscv_vneg_v_i16m8_tumu(__VA_ARGS__)

◆ vneg_v_i16mf2

#define vneg_v_i16mf2 ( ... ) __riscv_vneg_v_i16mf2(__VA_ARGS__)

◆ vneg_v_i16mf2_m

#define vneg_v_i16mf2_m ( ... ) __riscv_vneg_v_i16mf2_tumu(__VA_ARGS__)

◆ vneg_v_i16mf4

#define vneg_v_i16mf4 ( ... ) __riscv_vneg_v_i16mf4(__VA_ARGS__)

◆ vneg_v_i16mf4_m

#define vneg_v_i16mf4_m ( ... ) __riscv_vneg_v_i16mf4_tumu(__VA_ARGS__)

◆ vneg_v_i32m1

#define vneg_v_i32m1 ( ... ) __riscv_vneg_v_i32m1(__VA_ARGS__)

◆ vneg_v_i32m1_m

#define vneg_v_i32m1_m ( ... ) __riscv_vneg_v_i32m1_tumu(__VA_ARGS__)

◆ vneg_v_i32m2

#define vneg_v_i32m2 ( ... ) __riscv_vneg_v_i32m2(__VA_ARGS__)

◆ vneg_v_i32m2_m

#define vneg_v_i32m2_m ( ... ) __riscv_vneg_v_i32m2_tumu(__VA_ARGS__)

◆ vneg_v_i32m4

#define vneg_v_i32m4 ( ... ) __riscv_vneg_v_i32m4(__VA_ARGS__)

◆ vneg_v_i32m4_m

#define vneg_v_i32m4_m ( ... ) __riscv_vneg_v_i32m4_tumu(__VA_ARGS__)

◆ vneg_v_i32m8

#define vneg_v_i32m8 ( ... ) __riscv_vneg_v_i32m8(__VA_ARGS__)

◆ vneg_v_i32m8_m

#define vneg_v_i32m8_m ( ... ) __riscv_vneg_v_i32m8_tumu(__VA_ARGS__)

◆ vneg_v_i32mf2

#define vneg_v_i32mf2 ( ... ) __riscv_vneg_v_i32mf2(__VA_ARGS__)

◆ vneg_v_i32mf2_m

#define vneg_v_i32mf2_m ( ... ) __riscv_vneg_v_i32mf2_tumu(__VA_ARGS__)

◆ vneg_v_i64m1

#define vneg_v_i64m1 ( ... ) __riscv_vneg_v_i64m1(__VA_ARGS__)

◆ vneg_v_i64m1_m

#define vneg_v_i64m1_m ( ... ) __riscv_vneg_v_i64m1_tumu(__VA_ARGS__)

◆ vneg_v_i64m2

#define vneg_v_i64m2 ( ... ) __riscv_vneg_v_i64m2(__VA_ARGS__)

◆ vneg_v_i64m2_m

#define vneg_v_i64m2_m ( ... ) __riscv_vneg_v_i64m2_tumu(__VA_ARGS__)

◆ vneg_v_i64m4

#define vneg_v_i64m4 ( ... ) __riscv_vneg_v_i64m4(__VA_ARGS__)

◆ vneg_v_i64m4_m

#define vneg_v_i64m4_m ( ... ) __riscv_vneg_v_i64m4_tumu(__VA_ARGS__)

◆ vneg_v_i64m8

#define vneg_v_i64m8 ( ... ) __riscv_vneg_v_i64m8(__VA_ARGS__)

◆ vneg_v_i64m8_m

#define vneg_v_i64m8_m ( ... ) __riscv_vneg_v_i64m8_tumu(__VA_ARGS__)

◆ vneg_v_i8m1

#define vneg_v_i8m1 ( ... ) __riscv_vneg_v_i8m1(__VA_ARGS__)

◆ vneg_v_i8m1_m

#define vneg_v_i8m1_m ( ... ) __riscv_vneg_v_i8m1_tumu(__VA_ARGS__)

◆ vneg_v_i8m2

#define vneg_v_i8m2 ( ... ) __riscv_vneg_v_i8m2(__VA_ARGS__)

◆ vneg_v_i8m2_m

#define vneg_v_i8m2_m ( ... ) __riscv_vneg_v_i8m2_tumu(__VA_ARGS__)

◆ vneg_v_i8m4

#define vneg_v_i8m4 ( ... ) __riscv_vneg_v_i8m4(__VA_ARGS__)

◆ vneg_v_i8m4_m

#define vneg_v_i8m4_m ( ... ) __riscv_vneg_v_i8m4_tumu(__VA_ARGS__)

◆ vneg_v_i8m8

#define vneg_v_i8m8 ( ... ) __riscv_vneg_v_i8m8(__VA_ARGS__)

◆ vneg_v_i8m8_m

#define vneg_v_i8m8_m ( ... ) __riscv_vneg_v_i8m8_tumu(__VA_ARGS__)

◆ vneg_v_i8mf2

#define vneg_v_i8mf2 ( ... ) __riscv_vneg_v_i8mf2(__VA_ARGS__)

◆ vneg_v_i8mf2_m

#define vneg_v_i8mf2_m ( ... ) __riscv_vneg_v_i8mf2_tumu(__VA_ARGS__)

◆ vneg_v_i8mf4

#define vneg_v_i8mf4 ( ... ) __riscv_vneg_v_i8mf4(__VA_ARGS__)

◆ vneg_v_i8mf4_m

#define vneg_v_i8mf4_m ( ... ) __riscv_vneg_v_i8mf4_tumu(__VA_ARGS__)

◆ vneg_v_i8mf8

#define vneg_v_i8mf8 ( ... ) __riscv_vneg_v_i8mf8(__VA_ARGS__)

◆ vneg_v_i8mf8_m

#define vneg_v_i8mf8_m ( ... ) __riscv_vneg_v_i8mf8_tumu(__VA_ARGS__)

◆ vnmsac_vv_i16m1

#define vnmsac_vv_i16m1 ( ... ) __riscv_vnmsac_vv_i16m1_tu(__VA_ARGS__)

◆ vnmsac_vv_i16m1_m

#define vnmsac_vv_i16m1_m ( ... ) __riscv_vnmsac_vv_i16m1_tumu(__VA_ARGS__)

◆ vnmsac_vv_i16m2

#define vnmsac_vv_i16m2 ( ... ) __riscv_vnmsac_vv_i16m2_tu(__VA_ARGS__)

◆ vnmsac_vv_i16m2_m

#define vnmsac_vv_i16m2_m ( ... ) __riscv_vnmsac_vv_i16m2_tumu(__VA_ARGS__)

◆ vnmsac_vv_i16m4

#define vnmsac_vv_i16m4 ( ... ) __riscv_vnmsac_vv_i16m4_tu(__VA_ARGS__)

◆ vnmsac_vv_i16m4_m

#define vnmsac_vv_i16m4_m ( ... ) __riscv_vnmsac_vv_i16m4_tumu(__VA_ARGS__)

◆ vnmsac_vv_i16m8

#define vnmsac_vv_i16m8 ( ... ) __riscv_vnmsac_vv_i16m8_tu(__VA_ARGS__)

◆ vnmsac_vv_i16m8_m

#define vnmsac_vv_i16m8_m ( ... ) __riscv_vnmsac_vv_i16m8_tumu(__VA_ARGS__)

◆ vnmsac_vv_i16mf2

#define vnmsac_vv_i16mf2 ( ... ) __riscv_vnmsac_vv_i16mf2_tu(__VA_ARGS__)

◆ vnmsac_vv_i16mf2_m

#define vnmsac_vv_i16mf2_m ( ... ) __riscv_vnmsac_vv_i16mf2_tumu(__VA_ARGS__)

◆ vnmsac_vv_i16mf4

#define vnmsac_vv_i16mf4 ( ... ) __riscv_vnmsac_vv_i16mf4_tu(__VA_ARGS__)

◆ vnmsac_vv_i16mf4_m

#define vnmsac_vv_i16mf4_m ( ... ) __riscv_vnmsac_vv_i16mf4_tumu(__VA_ARGS__)

◆ vnmsac_vv_i32m1

#define vnmsac_vv_i32m1 ( ... ) __riscv_vnmsac_vv_i32m1_tu(__VA_ARGS__)

◆ vnmsac_vv_i32m1_m

#define vnmsac_vv_i32m1_m ( ... ) __riscv_vnmsac_vv_i32m1_tumu(__VA_ARGS__)

◆ vnmsac_vv_i32m2

#define vnmsac_vv_i32m2 ( ... ) __riscv_vnmsac_vv_i32m2_tu(__VA_ARGS__)

◆ vnmsac_vv_i32m2_m

#define vnmsac_vv_i32m2_m ( ... ) __riscv_vnmsac_vv_i32m2_tumu(__VA_ARGS__)

◆ vnmsac_vv_i32m4

#define vnmsac_vv_i32m4 ( ... ) __riscv_vnmsac_vv_i32m4_tu(__VA_ARGS__)

◆ vnmsac_vv_i32m4_m

#define vnmsac_vv_i32m4_m ( ... ) __riscv_vnmsac_vv_i32m4_tumu(__VA_ARGS__)

◆ vnmsac_vv_i32m8

#define vnmsac_vv_i32m8 ( ... ) __riscv_vnmsac_vv_i32m8_tu(__VA_ARGS__)

◆ vnmsac_vv_i32m8_m

#define vnmsac_vv_i32m8_m ( ... ) __riscv_vnmsac_vv_i32m8_tumu(__VA_ARGS__)

◆ vnmsac_vv_i32mf2

#define vnmsac_vv_i32mf2 ( ... ) __riscv_vnmsac_vv_i32mf2_tu(__VA_ARGS__)

◆ vnmsac_vv_i32mf2_m

#define vnmsac_vv_i32mf2_m ( ... ) __riscv_vnmsac_vv_i32mf2_tumu(__VA_ARGS__)

◆ vnmsac_vv_i64m1

#define vnmsac_vv_i64m1 ( ... ) __riscv_vnmsac_vv_i64m1_tu(__VA_ARGS__)

◆ vnmsac_vv_i64m1_m

#define vnmsac_vv_i64m1_m ( ... ) __riscv_vnmsac_vv_i64m1_tumu(__VA_ARGS__)

◆ vnmsac_vv_i64m2

#define vnmsac_vv_i64m2 ( ... ) __riscv_vnmsac_vv_i64m2_tu(__VA_ARGS__)

◆ vnmsac_vv_i64m2_m

#define vnmsac_vv_i64m2_m ( ... ) __riscv_vnmsac_vv_i64m2_tumu(__VA_ARGS__)

◆ vnmsac_vv_i64m4

#define vnmsac_vv_i64m4 ( ... ) __riscv_vnmsac_vv_i64m4_tu(__VA_ARGS__)

◆ vnmsac_vv_i64m4_m

#define vnmsac_vv_i64m4_m ( ... ) __riscv_vnmsac_vv_i64m4_tumu(__VA_ARGS__)

◆ vnmsac_vv_i64m8

#define vnmsac_vv_i64m8 ( ... ) __riscv_vnmsac_vv_i64m8_tu(__VA_ARGS__)

◆ vnmsac_vv_i64m8_m

#define vnmsac_vv_i64m8_m ( ... ) __riscv_vnmsac_vv_i64m8_tumu(__VA_ARGS__)

◆ vnmsac_vv_i8m1

#define vnmsac_vv_i8m1 ( ... ) __riscv_vnmsac_vv_i8m1_tu(__VA_ARGS__)

◆ vnmsac_vv_i8m1_m

#define vnmsac_vv_i8m1_m ( ... ) __riscv_vnmsac_vv_i8m1_tumu(__VA_ARGS__)

◆ vnmsac_vv_i8m2

#define vnmsac_vv_i8m2 ( ... ) __riscv_vnmsac_vv_i8m2_tu(__VA_ARGS__)

◆ vnmsac_vv_i8m2_m

#define vnmsac_vv_i8m2_m ( ... ) __riscv_vnmsac_vv_i8m2_tumu(__VA_ARGS__)

◆ vnmsac_vv_i8m4

#define vnmsac_vv_i8m4 ( ... ) __riscv_vnmsac_vv_i8m4_tu(__VA_ARGS__)

◆ vnmsac_vv_i8m4_m

#define vnmsac_vv_i8m4_m ( ... ) __riscv_vnmsac_vv_i8m4_tumu(__VA_ARGS__)

◆ vnmsac_vv_i8m8

#define vnmsac_vv_i8m8 ( ... ) __riscv_vnmsac_vv_i8m8_tu(__VA_ARGS__)

◆ vnmsac_vv_i8m8_m

#define vnmsac_vv_i8m8_m ( ... ) __riscv_vnmsac_vv_i8m8_tumu(__VA_ARGS__)

◆ vnmsac_vv_i8mf2

#define vnmsac_vv_i8mf2 ( ... ) __riscv_vnmsac_vv_i8mf2_tu(__VA_ARGS__)

◆ vnmsac_vv_i8mf2_m

#define vnmsac_vv_i8mf2_m ( ... ) __riscv_vnmsac_vv_i8mf2_tumu(__VA_ARGS__)

◆ vnmsac_vv_i8mf4

#define vnmsac_vv_i8mf4 ( ... ) __riscv_vnmsac_vv_i8mf4_tu(__VA_ARGS__)

◆ vnmsac_vv_i8mf4_m

#define vnmsac_vv_i8mf4_m ( ... ) __riscv_vnmsac_vv_i8mf4_tumu(__VA_ARGS__)

◆ vnmsac_vv_i8mf8

#define vnmsac_vv_i8mf8 ( ... ) __riscv_vnmsac_vv_i8mf8_tu(__VA_ARGS__)

◆ vnmsac_vv_i8mf8_m

#define vnmsac_vv_i8mf8_m ( ... ) __riscv_vnmsac_vv_i8mf8_tumu(__VA_ARGS__)

◆ vnmsac_vv_u16m1

#define vnmsac_vv_u16m1 ( ... ) __riscv_vnmsac_vv_u16m1_tu(__VA_ARGS__)

◆ vnmsac_vv_u16m1_m

#define vnmsac_vv_u16m1_m ( ... ) __riscv_vnmsac_vv_u16m1_tumu(__VA_ARGS__)

◆ vnmsac_vv_u16m2

#define vnmsac_vv_u16m2 ( ... ) __riscv_vnmsac_vv_u16m2_tu(__VA_ARGS__)

◆ vnmsac_vv_u16m2_m

#define vnmsac_vv_u16m2_m ( ... ) __riscv_vnmsac_vv_u16m2_tumu(__VA_ARGS__)

◆ vnmsac_vv_u16m4

#define vnmsac_vv_u16m4 ( ... ) __riscv_vnmsac_vv_u16m4_tu(__VA_ARGS__)

◆ vnmsac_vv_u16m4_m

#define vnmsac_vv_u16m4_m ( ... ) __riscv_vnmsac_vv_u16m4_tumu(__VA_ARGS__)

◆ vnmsac_vv_u16m8

#define vnmsac_vv_u16m8 ( ... ) __riscv_vnmsac_vv_u16m8_tu(__VA_ARGS__)

◆ vnmsac_vv_u16m8_m

#define vnmsac_vv_u16m8_m ( ... ) __riscv_vnmsac_vv_u16m8_tumu(__VA_ARGS__)

◆ vnmsac_vv_u16mf2

#define vnmsac_vv_u16mf2 ( ... ) __riscv_vnmsac_vv_u16mf2_tu(__VA_ARGS__)

◆ vnmsac_vv_u16mf2_m

#define vnmsac_vv_u16mf2_m ( ... ) __riscv_vnmsac_vv_u16mf2_tumu(__VA_ARGS__)

◆ vnmsac_vv_u16mf4

#define vnmsac_vv_u16mf4 ( ... ) __riscv_vnmsac_vv_u16mf4_tu(__VA_ARGS__)

◆ vnmsac_vv_u16mf4_m

#define vnmsac_vv_u16mf4_m ( ... ) __riscv_vnmsac_vv_u16mf4_tumu(__VA_ARGS__)

◆ vnmsac_vv_u32m1

#define vnmsac_vv_u32m1 ( ... ) __riscv_vnmsac_vv_u32m1_tu(__VA_ARGS__)

◆ vnmsac_vv_u32m1_m

#define vnmsac_vv_u32m1_m ( ... ) __riscv_vnmsac_vv_u32m1_tumu(__VA_ARGS__)

◆ vnmsac_vv_u32m2

#define vnmsac_vv_u32m2 ( ... ) __riscv_vnmsac_vv_u32m2_tu(__VA_ARGS__)

◆ vnmsac_vv_u32m2_m

#define vnmsac_vv_u32m2_m ( ... ) __riscv_vnmsac_vv_u32m2_tumu(__VA_ARGS__)

◆ vnmsac_vv_u32m4

#define vnmsac_vv_u32m4 ( ... ) __riscv_vnmsac_vv_u32m4_tu(__VA_ARGS__)

◆ vnmsac_vv_u32m4_m

#define vnmsac_vv_u32m4_m ( ... ) __riscv_vnmsac_vv_u32m4_tumu(__VA_ARGS__)

◆ vnmsac_vv_u32m8

#define vnmsac_vv_u32m8 ( ... ) __riscv_vnmsac_vv_u32m8_tu(__VA_ARGS__)

◆ vnmsac_vv_u32m8_m

#define vnmsac_vv_u32m8_m ( ... ) __riscv_vnmsac_vv_u32m8_tumu(__VA_ARGS__)

◆ vnmsac_vv_u32mf2

#define vnmsac_vv_u32mf2 ( ... ) __riscv_vnmsac_vv_u32mf2_tu(__VA_ARGS__)

◆ vnmsac_vv_u32mf2_m

#define vnmsac_vv_u32mf2_m ( ... ) __riscv_vnmsac_vv_u32mf2_tumu(__VA_ARGS__)

◆ vnmsac_vv_u64m1

#define vnmsac_vv_u64m1 ( ... ) __riscv_vnmsac_vv_u64m1_tu(__VA_ARGS__)

◆ vnmsac_vv_u64m1_m

#define vnmsac_vv_u64m1_m ( ... ) __riscv_vnmsac_vv_u64m1_tumu(__VA_ARGS__)

◆ vnmsac_vv_u64m2

#define vnmsac_vv_u64m2 ( ... ) __riscv_vnmsac_vv_u64m2_tu(__VA_ARGS__)

◆ vnmsac_vv_u64m2_m

#define vnmsac_vv_u64m2_m ( ... ) __riscv_vnmsac_vv_u64m2_tumu(__VA_ARGS__)

◆ vnmsac_vv_u64m4

#define vnmsac_vv_u64m4 ( ... ) __riscv_vnmsac_vv_u64m4_tu(__VA_ARGS__)

◆ vnmsac_vv_u64m4_m

#define vnmsac_vv_u64m4_m ( ... ) __riscv_vnmsac_vv_u64m4_tumu(__VA_ARGS__)

◆ vnmsac_vv_u64m8

#define vnmsac_vv_u64m8 ( ... ) __riscv_vnmsac_vv_u64m8_tu(__VA_ARGS__)

◆ vnmsac_vv_u64m8_m

#define vnmsac_vv_u64m8_m ( ... ) __riscv_vnmsac_vv_u64m8_tumu(__VA_ARGS__)

◆ vnmsac_vv_u8m1

#define vnmsac_vv_u8m1 ( ... ) __riscv_vnmsac_vv_u8m1_tu(__VA_ARGS__)

◆ vnmsac_vv_u8m1_m

#define vnmsac_vv_u8m1_m ( ... ) __riscv_vnmsac_vv_u8m1_tumu(__VA_ARGS__)

◆ vnmsac_vv_u8m2

#define vnmsac_vv_u8m2 ( ... ) __riscv_vnmsac_vv_u8m2_tu(__VA_ARGS__)

◆ vnmsac_vv_u8m2_m

#define vnmsac_vv_u8m2_m ( ... ) __riscv_vnmsac_vv_u8m2_tumu(__VA_ARGS__)

◆ vnmsac_vv_u8m4

#define vnmsac_vv_u8m4 ( ... ) __riscv_vnmsac_vv_u8m4_tu(__VA_ARGS__)

◆ vnmsac_vv_u8m4_m

#define vnmsac_vv_u8m4_m ( ... ) __riscv_vnmsac_vv_u8m4_tumu(__VA_ARGS__)

◆ vnmsac_vv_u8m8

#define vnmsac_vv_u8m8 ( ... ) __riscv_vnmsac_vv_u8m8_tu(__VA_ARGS__)

◆ vnmsac_vv_u8m8_m

#define vnmsac_vv_u8m8_m ( ... ) __riscv_vnmsac_vv_u8m8_tumu(__VA_ARGS__)

◆ vnmsac_vv_u8mf2

#define vnmsac_vv_u8mf2 ( ... ) __riscv_vnmsac_vv_u8mf2_tu(__VA_ARGS__)

◆ vnmsac_vv_u8mf2_m

#define vnmsac_vv_u8mf2_m ( ... ) __riscv_vnmsac_vv_u8mf2_tumu(__VA_ARGS__)

◆ vnmsac_vv_u8mf4

#define vnmsac_vv_u8mf4 ( ... ) __riscv_vnmsac_vv_u8mf4_tu(__VA_ARGS__)

◆ vnmsac_vv_u8mf4_m

#define vnmsac_vv_u8mf4_m ( ... ) __riscv_vnmsac_vv_u8mf4_tumu(__VA_ARGS__)

◆ vnmsac_vv_u8mf8

#define vnmsac_vv_u8mf8 ( ... ) __riscv_vnmsac_vv_u8mf8_tu(__VA_ARGS__)

◆ vnmsac_vv_u8mf8_m

#define vnmsac_vv_u8mf8_m ( ... ) __riscv_vnmsac_vv_u8mf8_tumu(__VA_ARGS__)

◆ vnmsac_vx_i16m1

#define vnmsac_vx_i16m1 ( ... ) __riscv_vnmsac_vx_i16m1_tu(__VA_ARGS__)

◆ vnmsac_vx_i16m1_m

#define vnmsac_vx_i16m1_m ( ... ) __riscv_vnmsac_vx_i16m1_tumu(__VA_ARGS__)

◆ vnmsac_vx_i16m2

#define vnmsac_vx_i16m2 ( ... ) __riscv_vnmsac_vx_i16m2_tu(__VA_ARGS__)

◆ vnmsac_vx_i16m2_m

#define vnmsac_vx_i16m2_m ( ... ) __riscv_vnmsac_vx_i16m2_tumu(__VA_ARGS__)

◆ vnmsac_vx_i16m4

#define vnmsac_vx_i16m4 ( ... ) __riscv_vnmsac_vx_i16m4_tu(__VA_ARGS__)

◆ vnmsac_vx_i16m4_m

#define vnmsac_vx_i16m4_m ( ... ) __riscv_vnmsac_vx_i16m4_tumu(__VA_ARGS__)

◆ vnmsac_vx_i16m8

#define vnmsac_vx_i16m8 ( ... ) __riscv_vnmsac_vx_i16m8_tu(__VA_ARGS__)

◆ vnmsac_vx_i16m8_m

#define vnmsac_vx_i16m8_m ( ... ) __riscv_vnmsac_vx_i16m8_tumu(__VA_ARGS__)

◆ vnmsac_vx_i16mf2

#define vnmsac_vx_i16mf2 ( ... ) __riscv_vnmsac_vx_i16mf2_tu(__VA_ARGS__)

◆ vnmsac_vx_i16mf2_m

#define vnmsac_vx_i16mf2_m ( ... ) __riscv_vnmsac_vx_i16mf2_tumu(__VA_ARGS__)

◆ vnmsac_vx_i16mf4

#define vnmsac_vx_i16mf4 ( ... ) __riscv_vnmsac_vx_i16mf4_tu(__VA_ARGS__)

◆ vnmsac_vx_i16mf4_m

#define vnmsac_vx_i16mf4_m ( ... ) __riscv_vnmsac_vx_i16mf4_tumu(__VA_ARGS__)

◆ vnmsac_vx_i32m1

#define vnmsac_vx_i32m1 ( ... ) __riscv_vnmsac_vx_i32m1_tu(__VA_ARGS__)

◆ vnmsac_vx_i32m1_m

#define vnmsac_vx_i32m1_m ( ... ) __riscv_vnmsac_vx_i32m1_tumu(__VA_ARGS__)

◆ vnmsac_vx_i32m2

#define vnmsac_vx_i32m2 ( ... ) __riscv_vnmsac_vx_i32m2_tu(__VA_ARGS__)

◆ vnmsac_vx_i32m2_m

#define vnmsac_vx_i32m2_m ( ... ) __riscv_vnmsac_vx_i32m2_tumu(__VA_ARGS__)

◆ vnmsac_vx_i32m4

#define vnmsac_vx_i32m4 ( ... ) __riscv_vnmsac_vx_i32m4_tu(__VA_ARGS__)

◆ vnmsac_vx_i32m4_m

#define vnmsac_vx_i32m4_m ( ... ) __riscv_vnmsac_vx_i32m4_tumu(__VA_ARGS__)

◆ vnmsac_vx_i32m8

#define vnmsac_vx_i32m8 ( ... ) __riscv_vnmsac_vx_i32m8_tu(__VA_ARGS__)

◆ vnmsac_vx_i32m8_m

#define vnmsac_vx_i32m8_m ( ... ) __riscv_vnmsac_vx_i32m8_tumu(__VA_ARGS__)

◆ vnmsac_vx_i32mf2

#define vnmsac_vx_i32mf2 ( ... ) __riscv_vnmsac_vx_i32mf2_tu(__VA_ARGS__)

◆ vnmsac_vx_i32mf2_m

#define vnmsac_vx_i32mf2_m ( ... ) __riscv_vnmsac_vx_i32mf2_tumu(__VA_ARGS__)

◆ vnmsac_vx_i64m1

#define vnmsac_vx_i64m1 ( ... ) __riscv_vnmsac_vx_i64m1_tu(__VA_ARGS__)

◆ vnmsac_vx_i64m1_m

#define vnmsac_vx_i64m1_m ( ... ) __riscv_vnmsac_vx_i64m1_tumu(__VA_ARGS__)

◆ vnmsac_vx_i64m2

#define vnmsac_vx_i64m2 ( ... ) __riscv_vnmsac_vx_i64m2_tu(__VA_ARGS__)

◆ vnmsac_vx_i64m2_m

#define vnmsac_vx_i64m2_m ( ... ) __riscv_vnmsac_vx_i64m2_tumu(__VA_ARGS__)

◆ vnmsac_vx_i64m4

#define vnmsac_vx_i64m4 ( ... ) __riscv_vnmsac_vx_i64m4_tu(__VA_ARGS__)

◆ vnmsac_vx_i64m4_m

#define vnmsac_vx_i64m4_m ( ... ) __riscv_vnmsac_vx_i64m4_tumu(__VA_ARGS__)

◆ vnmsac_vx_i64m8

#define vnmsac_vx_i64m8 ( ... ) __riscv_vnmsac_vx_i64m8_tu(__VA_ARGS__)

◆ vnmsac_vx_i64m8_m

#define vnmsac_vx_i64m8_m ( ... ) __riscv_vnmsac_vx_i64m8_tumu(__VA_ARGS__)

◆ vnmsac_vx_i8m1

#define vnmsac_vx_i8m1 ( ... ) __riscv_vnmsac_vx_i8m1_tu(__VA_ARGS__)

◆ vnmsac_vx_i8m1_m

#define vnmsac_vx_i8m1_m ( ... ) __riscv_vnmsac_vx_i8m1_tumu(__VA_ARGS__)

◆ vnmsac_vx_i8m2

#define vnmsac_vx_i8m2 ( ... ) __riscv_vnmsac_vx_i8m2_tu(__VA_ARGS__)

◆ vnmsac_vx_i8m2_m

#define vnmsac_vx_i8m2_m ( ... ) __riscv_vnmsac_vx_i8m2_tumu(__VA_ARGS__)

◆ vnmsac_vx_i8m4

#define vnmsac_vx_i8m4 ( ... ) __riscv_vnmsac_vx_i8m4_tu(__VA_ARGS__)

◆ vnmsac_vx_i8m4_m

#define vnmsac_vx_i8m4_m ( ... ) __riscv_vnmsac_vx_i8m4_tumu(__VA_ARGS__)

◆ vnmsac_vx_i8m8

#define vnmsac_vx_i8m8 ( ... ) __riscv_vnmsac_vx_i8m8_tu(__VA_ARGS__)

◆ vnmsac_vx_i8m8_m

#define vnmsac_vx_i8m8_m ( ... ) __riscv_vnmsac_vx_i8m8_tumu(__VA_ARGS__)

◆ vnmsac_vx_i8mf2

#define vnmsac_vx_i8mf2 ( ... ) __riscv_vnmsac_vx_i8mf2_tu(__VA_ARGS__)

◆ vnmsac_vx_i8mf2_m

#define vnmsac_vx_i8mf2_m ( ... ) __riscv_vnmsac_vx_i8mf2_tumu(__VA_ARGS__)

◆ vnmsac_vx_i8mf4

#define vnmsac_vx_i8mf4 ( ... ) __riscv_vnmsac_vx_i8mf4_tu(__VA_ARGS__)

◆ vnmsac_vx_i8mf4_m

#define vnmsac_vx_i8mf4_m ( ... ) __riscv_vnmsac_vx_i8mf4_tumu(__VA_ARGS__)

◆ vnmsac_vx_i8mf8

#define vnmsac_vx_i8mf8 ( ... ) __riscv_vnmsac_vx_i8mf8_tu(__VA_ARGS__)

◆ vnmsac_vx_i8mf8_m

#define vnmsac_vx_i8mf8_m ( ... ) __riscv_vnmsac_vx_i8mf8_tumu(__VA_ARGS__)

◆ vnmsac_vx_u16m1

#define vnmsac_vx_u16m1 ( ... ) __riscv_vnmsac_vx_u16m1_tu(__VA_ARGS__)

◆ vnmsac_vx_u16m1_m

#define vnmsac_vx_u16m1_m ( ... ) __riscv_vnmsac_vx_u16m1_tumu(__VA_ARGS__)

◆ vnmsac_vx_u16m2

#define vnmsac_vx_u16m2 ( ... ) __riscv_vnmsac_vx_u16m2_tu(__VA_ARGS__)

◆ vnmsac_vx_u16m2_m

#define vnmsac_vx_u16m2_m ( ... ) __riscv_vnmsac_vx_u16m2_tumu(__VA_ARGS__)

◆ vnmsac_vx_u16m4

#define vnmsac_vx_u16m4 ( ... ) __riscv_vnmsac_vx_u16m4_tu(__VA_ARGS__)

◆ vnmsac_vx_u16m4_m

#define vnmsac_vx_u16m4_m ( ... ) __riscv_vnmsac_vx_u16m4_tumu(__VA_ARGS__)

◆ vnmsac_vx_u16m8

#define vnmsac_vx_u16m8 ( ... ) __riscv_vnmsac_vx_u16m8_tu(__VA_ARGS__)

◆ vnmsac_vx_u16m8_m

#define vnmsac_vx_u16m8_m ( ... ) __riscv_vnmsac_vx_u16m8_tumu(__VA_ARGS__)

◆ vnmsac_vx_u16mf2

#define vnmsac_vx_u16mf2 ( ... ) __riscv_vnmsac_vx_u16mf2_tu(__VA_ARGS__)

◆ vnmsac_vx_u16mf2_m

#define vnmsac_vx_u16mf2_m ( ... ) __riscv_vnmsac_vx_u16mf2_tumu(__VA_ARGS__)

◆ vnmsac_vx_u16mf4

#define vnmsac_vx_u16mf4 ( ... ) __riscv_vnmsac_vx_u16mf4_tu(__VA_ARGS__)

◆ vnmsac_vx_u16mf4_m

#define vnmsac_vx_u16mf4_m ( ... ) __riscv_vnmsac_vx_u16mf4_tumu(__VA_ARGS__)

◆ vnmsac_vx_u32m1

#define vnmsac_vx_u32m1 ( ... ) __riscv_vnmsac_vx_u32m1_tu(__VA_ARGS__)

◆ vnmsac_vx_u32m1_m

#define vnmsac_vx_u32m1_m ( ... ) __riscv_vnmsac_vx_u32m1_tumu(__VA_ARGS__)

◆ vnmsac_vx_u32m2

#define vnmsac_vx_u32m2 ( ... ) __riscv_vnmsac_vx_u32m2_tu(__VA_ARGS__)

◆ vnmsac_vx_u32m2_m

#define vnmsac_vx_u32m2_m ( ... ) __riscv_vnmsac_vx_u32m2_tumu(__VA_ARGS__)

◆ vnmsac_vx_u32m4

#define vnmsac_vx_u32m4 ( ... ) __riscv_vnmsac_vx_u32m4_tu(__VA_ARGS__)

◆ vnmsac_vx_u32m4_m

#define vnmsac_vx_u32m4_m ( ... ) __riscv_vnmsac_vx_u32m4_tumu(__VA_ARGS__)

◆ vnmsac_vx_u32m8

#define vnmsac_vx_u32m8 ( ... ) __riscv_vnmsac_vx_u32m8_tu(__VA_ARGS__)

◆ vnmsac_vx_u32m8_m

#define vnmsac_vx_u32m8_m ( ... ) __riscv_vnmsac_vx_u32m8_tumu(__VA_ARGS__)

◆ vnmsac_vx_u32mf2

#define vnmsac_vx_u32mf2 ( ... ) __riscv_vnmsac_vx_u32mf2_tu(__VA_ARGS__)

◆ vnmsac_vx_u32mf2_m

#define vnmsac_vx_u32mf2_m ( ... ) __riscv_vnmsac_vx_u32mf2_tumu(__VA_ARGS__)

◆ vnmsac_vx_u64m1

#define vnmsac_vx_u64m1 ( ... ) __riscv_vnmsac_vx_u64m1_tu(__VA_ARGS__)

◆ vnmsac_vx_u64m1_m

#define vnmsac_vx_u64m1_m ( ... ) __riscv_vnmsac_vx_u64m1_tumu(__VA_ARGS__)

◆ vnmsac_vx_u64m2

#define vnmsac_vx_u64m2 ( ... ) __riscv_vnmsac_vx_u64m2_tu(__VA_ARGS__)

◆ vnmsac_vx_u64m2_m

#define vnmsac_vx_u64m2_m ( ... ) __riscv_vnmsac_vx_u64m2_tumu(__VA_ARGS__)

◆ vnmsac_vx_u64m4

#define vnmsac_vx_u64m4 ( ... ) __riscv_vnmsac_vx_u64m4_tu(__VA_ARGS__)

◆ vnmsac_vx_u64m4_m

#define vnmsac_vx_u64m4_m ( ... ) __riscv_vnmsac_vx_u64m4_tumu(__VA_ARGS__)

◆ vnmsac_vx_u64m8

#define vnmsac_vx_u64m8 ( ... ) __riscv_vnmsac_vx_u64m8_tu(__VA_ARGS__)

◆ vnmsac_vx_u64m8_m

#define vnmsac_vx_u64m8_m ( ... ) __riscv_vnmsac_vx_u64m8_tumu(__VA_ARGS__)

◆ vnmsac_vx_u8m1

#define vnmsac_vx_u8m1 ( ... ) __riscv_vnmsac_vx_u8m1_tu(__VA_ARGS__)

◆ vnmsac_vx_u8m1_m

#define vnmsac_vx_u8m1_m ( ... ) __riscv_vnmsac_vx_u8m1_tumu(__VA_ARGS__)

◆ vnmsac_vx_u8m2

#define vnmsac_vx_u8m2 ( ... ) __riscv_vnmsac_vx_u8m2_tu(__VA_ARGS__)

◆ vnmsac_vx_u8m2_m

#define vnmsac_vx_u8m2_m ( ... ) __riscv_vnmsac_vx_u8m2_tumu(__VA_ARGS__)

◆ vnmsac_vx_u8m4

#define vnmsac_vx_u8m4 ( ... ) __riscv_vnmsac_vx_u8m4_tu(__VA_ARGS__)

◆ vnmsac_vx_u8m4_m

#define vnmsac_vx_u8m4_m ( ... ) __riscv_vnmsac_vx_u8m4_tumu(__VA_ARGS__)

◆ vnmsac_vx_u8m8

#define vnmsac_vx_u8m8 ( ... ) __riscv_vnmsac_vx_u8m8_tu(__VA_ARGS__)

◆ vnmsac_vx_u8m8_m

#define vnmsac_vx_u8m8_m ( ... ) __riscv_vnmsac_vx_u8m8_tumu(__VA_ARGS__)

◆ vnmsac_vx_u8mf2

#define vnmsac_vx_u8mf2 ( ... ) __riscv_vnmsac_vx_u8mf2_tu(__VA_ARGS__)

◆ vnmsac_vx_u8mf2_m

#define vnmsac_vx_u8mf2_m ( ... ) __riscv_vnmsac_vx_u8mf2_tumu(__VA_ARGS__)

◆ vnmsac_vx_u8mf4

#define vnmsac_vx_u8mf4 ( ... ) __riscv_vnmsac_vx_u8mf4_tu(__VA_ARGS__)

◆ vnmsac_vx_u8mf4_m

#define vnmsac_vx_u8mf4_m ( ... ) __riscv_vnmsac_vx_u8mf4_tumu(__VA_ARGS__)

◆ vnmsac_vx_u8mf8

#define vnmsac_vx_u8mf8 ( ... ) __riscv_vnmsac_vx_u8mf8_tu(__VA_ARGS__)

◆ vnmsac_vx_u8mf8_m

#define vnmsac_vx_u8mf8_m ( ... ) __riscv_vnmsac_vx_u8mf8_tumu(__VA_ARGS__)

◆ vnmsub_vv_i16m1

#define vnmsub_vv_i16m1 ( ... ) __riscv_vnmsub_vv_i16m1_tu(__VA_ARGS__)

◆ vnmsub_vv_i16m1_m

#define vnmsub_vv_i16m1_m ( ... ) __riscv_vnmsub_vv_i16m1_tumu(__VA_ARGS__)

◆ vnmsub_vv_i16m2

#define vnmsub_vv_i16m2 ( ... ) __riscv_vnmsub_vv_i16m2_tu(__VA_ARGS__)

◆ vnmsub_vv_i16m2_m

#define vnmsub_vv_i16m2_m ( ... ) __riscv_vnmsub_vv_i16m2_tumu(__VA_ARGS__)

◆ vnmsub_vv_i16m4

#define vnmsub_vv_i16m4 ( ... ) __riscv_vnmsub_vv_i16m4_tu(__VA_ARGS__)

◆ vnmsub_vv_i16m4_m

#define vnmsub_vv_i16m4_m ( ... ) __riscv_vnmsub_vv_i16m4_tumu(__VA_ARGS__)

◆ vnmsub_vv_i16m8

#define vnmsub_vv_i16m8 ( ... ) __riscv_vnmsub_vv_i16m8_tu(__VA_ARGS__)

◆ vnmsub_vv_i16m8_m

#define vnmsub_vv_i16m8_m ( ... ) __riscv_vnmsub_vv_i16m8_tumu(__VA_ARGS__)

◆ vnmsub_vv_i16mf2

#define vnmsub_vv_i16mf2 ( ... ) __riscv_vnmsub_vv_i16mf2_tu(__VA_ARGS__)

◆ vnmsub_vv_i16mf2_m

#define vnmsub_vv_i16mf2_m ( ... ) __riscv_vnmsub_vv_i16mf2_tumu(__VA_ARGS__)

◆ vnmsub_vv_i16mf4

#define vnmsub_vv_i16mf4 ( ... ) __riscv_vnmsub_vv_i16mf4_tu(__VA_ARGS__)

◆ vnmsub_vv_i16mf4_m

#define vnmsub_vv_i16mf4_m ( ... ) __riscv_vnmsub_vv_i16mf4_tumu(__VA_ARGS__)

◆ vnmsub_vv_i32m1

#define vnmsub_vv_i32m1 ( ... ) __riscv_vnmsub_vv_i32m1_tu(__VA_ARGS__)

◆ vnmsub_vv_i32m1_m

#define vnmsub_vv_i32m1_m ( ... ) __riscv_vnmsub_vv_i32m1_tumu(__VA_ARGS__)

◆ vnmsub_vv_i32m2

#define vnmsub_vv_i32m2 ( ... ) __riscv_vnmsub_vv_i32m2_tu(__VA_ARGS__)

◆ vnmsub_vv_i32m2_m

#define vnmsub_vv_i32m2_m ( ... ) __riscv_vnmsub_vv_i32m2_tumu(__VA_ARGS__)

◆ vnmsub_vv_i32m4

#define vnmsub_vv_i32m4 ( ... ) __riscv_vnmsub_vv_i32m4_tu(__VA_ARGS__)

◆ vnmsub_vv_i32m4_m

#define vnmsub_vv_i32m4_m ( ... ) __riscv_vnmsub_vv_i32m4_tumu(__VA_ARGS__)

◆ vnmsub_vv_i32m8

#define vnmsub_vv_i32m8 ( ... ) __riscv_vnmsub_vv_i32m8_tu(__VA_ARGS__)

◆ vnmsub_vv_i32m8_m

#define vnmsub_vv_i32m8_m ( ... ) __riscv_vnmsub_vv_i32m8_tumu(__VA_ARGS__)

◆ vnmsub_vv_i32mf2

#define vnmsub_vv_i32mf2 ( ... ) __riscv_vnmsub_vv_i32mf2_tu(__VA_ARGS__)

◆ vnmsub_vv_i32mf2_m

#define vnmsub_vv_i32mf2_m ( ... ) __riscv_vnmsub_vv_i32mf2_tumu(__VA_ARGS__)

◆ vnmsub_vv_i64m1

#define vnmsub_vv_i64m1 ( ... ) __riscv_vnmsub_vv_i64m1_tu(__VA_ARGS__)

◆ vnmsub_vv_i64m1_m

#define vnmsub_vv_i64m1_m ( ... ) __riscv_vnmsub_vv_i64m1_tumu(__VA_ARGS__)

◆ vnmsub_vv_i64m2

#define vnmsub_vv_i64m2 ( ... ) __riscv_vnmsub_vv_i64m2_tu(__VA_ARGS__)

◆ vnmsub_vv_i64m2_m

#define vnmsub_vv_i64m2_m ( ... ) __riscv_vnmsub_vv_i64m2_tumu(__VA_ARGS__)

◆ vnmsub_vv_i64m4

#define vnmsub_vv_i64m4 ( ... ) __riscv_vnmsub_vv_i64m4_tu(__VA_ARGS__)

◆ vnmsub_vv_i64m4_m

#define vnmsub_vv_i64m4_m ( ... ) __riscv_vnmsub_vv_i64m4_tumu(__VA_ARGS__)

◆ vnmsub_vv_i64m8

#define vnmsub_vv_i64m8 ( ... ) __riscv_vnmsub_vv_i64m8_tu(__VA_ARGS__)

◆ vnmsub_vv_i64m8_m

#define vnmsub_vv_i64m8_m ( ... ) __riscv_vnmsub_vv_i64m8_tumu(__VA_ARGS__)

◆ vnmsub_vv_i8m1

#define vnmsub_vv_i8m1 ( ... ) __riscv_vnmsub_vv_i8m1_tu(__VA_ARGS__)

◆ vnmsub_vv_i8m1_m

#define vnmsub_vv_i8m1_m ( ... ) __riscv_vnmsub_vv_i8m1_tumu(__VA_ARGS__)

◆ vnmsub_vv_i8m2

#define vnmsub_vv_i8m2 ( ... ) __riscv_vnmsub_vv_i8m2_tu(__VA_ARGS__)

◆ vnmsub_vv_i8m2_m

#define vnmsub_vv_i8m2_m ( ... ) __riscv_vnmsub_vv_i8m2_tumu(__VA_ARGS__)

◆ vnmsub_vv_i8m4

#define vnmsub_vv_i8m4 ( ... ) __riscv_vnmsub_vv_i8m4_tu(__VA_ARGS__)

◆ vnmsub_vv_i8m4_m

#define vnmsub_vv_i8m4_m ( ... ) __riscv_vnmsub_vv_i8m4_tumu(__VA_ARGS__)

◆ vnmsub_vv_i8m8

#define vnmsub_vv_i8m8 ( ... ) __riscv_vnmsub_vv_i8m8_tu(__VA_ARGS__)

◆ vnmsub_vv_i8m8_m

#define vnmsub_vv_i8m8_m ( ... ) __riscv_vnmsub_vv_i8m8_tumu(__VA_ARGS__)

◆ vnmsub_vv_i8mf2

#define vnmsub_vv_i8mf2 ( ... ) __riscv_vnmsub_vv_i8mf2_tu(__VA_ARGS__)

◆ vnmsub_vv_i8mf2_m

#define vnmsub_vv_i8mf2_m ( ... ) __riscv_vnmsub_vv_i8mf2_tumu(__VA_ARGS__)

◆ vnmsub_vv_i8mf4

#define vnmsub_vv_i8mf4 ( ... ) __riscv_vnmsub_vv_i8mf4_tu(__VA_ARGS__)

◆ vnmsub_vv_i8mf4_m

#define vnmsub_vv_i8mf4_m ( ... ) __riscv_vnmsub_vv_i8mf4_tumu(__VA_ARGS__)

◆ vnmsub_vv_i8mf8

#define vnmsub_vv_i8mf8 ( ... ) __riscv_vnmsub_vv_i8mf8_tu(__VA_ARGS__)

◆ vnmsub_vv_i8mf8_m

#define vnmsub_vv_i8mf8_m ( ... ) __riscv_vnmsub_vv_i8mf8_tumu(__VA_ARGS__)

◆ vnmsub_vv_u16m1

#define vnmsub_vv_u16m1 ( ... ) __riscv_vnmsub_vv_u16m1_tu(__VA_ARGS__)

◆ vnmsub_vv_u16m1_m

#define vnmsub_vv_u16m1_m ( ... ) __riscv_vnmsub_vv_u16m1_tumu(__VA_ARGS__)

◆ vnmsub_vv_u16m2

#define vnmsub_vv_u16m2 ( ... ) __riscv_vnmsub_vv_u16m2_tu(__VA_ARGS__)

◆ vnmsub_vv_u16m2_m

#define vnmsub_vv_u16m2_m ( ... ) __riscv_vnmsub_vv_u16m2_tumu(__VA_ARGS__)

◆ vnmsub_vv_u16m4

#define vnmsub_vv_u16m4 ( ... ) __riscv_vnmsub_vv_u16m4_tu(__VA_ARGS__)

◆ vnmsub_vv_u16m4_m

#define vnmsub_vv_u16m4_m ( ... ) __riscv_vnmsub_vv_u16m4_tumu(__VA_ARGS__)

◆ vnmsub_vv_u16m8

#define vnmsub_vv_u16m8 ( ... ) __riscv_vnmsub_vv_u16m8_tu(__VA_ARGS__)

◆ vnmsub_vv_u16m8_m

#define vnmsub_vv_u16m8_m ( ... ) __riscv_vnmsub_vv_u16m8_tumu(__VA_ARGS__)

◆ vnmsub_vv_u16mf2

#define vnmsub_vv_u16mf2 ( ... ) __riscv_vnmsub_vv_u16mf2_tu(__VA_ARGS__)

◆ vnmsub_vv_u16mf2_m

#define vnmsub_vv_u16mf2_m ( ... ) __riscv_vnmsub_vv_u16mf2_tumu(__VA_ARGS__)

◆ vnmsub_vv_u16mf4

#define vnmsub_vv_u16mf4 ( ... ) __riscv_vnmsub_vv_u16mf4_tu(__VA_ARGS__)

◆ vnmsub_vv_u16mf4_m

#define vnmsub_vv_u16mf4_m ( ... ) __riscv_vnmsub_vv_u16mf4_tumu(__VA_ARGS__)

◆ vnmsub_vv_u32m1

#define vnmsub_vv_u32m1 ( ... ) __riscv_vnmsub_vv_u32m1_tu(__VA_ARGS__)

◆ vnmsub_vv_u32m1_m

#define vnmsub_vv_u32m1_m ( ... ) __riscv_vnmsub_vv_u32m1_tumu(__VA_ARGS__)

◆ vnmsub_vv_u32m2

#define vnmsub_vv_u32m2 ( ... ) __riscv_vnmsub_vv_u32m2_tu(__VA_ARGS__)

◆ vnmsub_vv_u32m2_m

#define vnmsub_vv_u32m2_m ( ... ) __riscv_vnmsub_vv_u32m2_tumu(__VA_ARGS__)

◆ vnmsub_vv_u32m4

#define vnmsub_vv_u32m4 ( ... ) __riscv_vnmsub_vv_u32m4_tu(__VA_ARGS__)

◆ vnmsub_vv_u32m4_m

#define vnmsub_vv_u32m4_m ( ... ) __riscv_vnmsub_vv_u32m4_tumu(__VA_ARGS__)

◆ vnmsub_vv_u32m8

#define vnmsub_vv_u32m8 ( ... ) __riscv_vnmsub_vv_u32m8_tu(__VA_ARGS__)

◆ vnmsub_vv_u32m8_m

#define vnmsub_vv_u32m8_m ( ... ) __riscv_vnmsub_vv_u32m8_tumu(__VA_ARGS__)

◆ vnmsub_vv_u32mf2

#define vnmsub_vv_u32mf2 ( ... ) __riscv_vnmsub_vv_u32mf2_tu(__VA_ARGS__)

◆ vnmsub_vv_u32mf2_m

#define vnmsub_vv_u32mf2_m ( ... ) __riscv_vnmsub_vv_u32mf2_tumu(__VA_ARGS__)

◆ vnmsub_vv_u64m1

#define vnmsub_vv_u64m1 ( ... ) __riscv_vnmsub_vv_u64m1_tu(__VA_ARGS__)

◆ vnmsub_vv_u64m1_m

#define vnmsub_vv_u64m1_m ( ... ) __riscv_vnmsub_vv_u64m1_tumu(__VA_ARGS__)

◆ vnmsub_vv_u64m2

#define vnmsub_vv_u64m2 ( ... ) __riscv_vnmsub_vv_u64m2_tu(__VA_ARGS__)

◆ vnmsub_vv_u64m2_m

#define vnmsub_vv_u64m2_m ( ... ) __riscv_vnmsub_vv_u64m2_tumu(__VA_ARGS__)

◆ vnmsub_vv_u64m4

#define vnmsub_vv_u64m4 ( ... ) __riscv_vnmsub_vv_u64m4_tu(__VA_ARGS__)

◆ vnmsub_vv_u64m4_m

#define vnmsub_vv_u64m4_m ( ... ) __riscv_vnmsub_vv_u64m4_tumu(__VA_ARGS__)

◆ vnmsub_vv_u64m8

#define vnmsub_vv_u64m8 ( ... ) __riscv_vnmsub_vv_u64m8_tu(__VA_ARGS__)

◆ vnmsub_vv_u64m8_m

#define vnmsub_vv_u64m8_m ( ... ) __riscv_vnmsub_vv_u64m8_tumu(__VA_ARGS__)

◆ vnmsub_vv_u8m1

#define vnmsub_vv_u8m1 ( ... ) __riscv_vnmsub_vv_u8m1_tu(__VA_ARGS__)

◆ vnmsub_vv_u8m1_m

#define vnmsub_vv_u8m1_m ( ... ) __riscv_vnmsub_vv_u8m1_tumu(__VA_ARGS__)

◆ vnmsub_vv_u8m2

#define vnmsub_vv_u8m2 ( ... ) __riscv_vnmsub_vv_u8m2_tu(__VA_ARGS__)

◆ vnmsub_vv_u8m2_m

#define vnmsub_vv_u8m2_m ( ... ) __riscv_vnmsub_vv_u8m2_tumu(__VA_ARGS__)

◆ vnmsub_vv_u8m4

#define vnmsub_vv_u8m4 ( ... ) __riscv_vnmsub_vv_u8m4_tu(__VA_ARGS__)

◆ vnmsub_vv_u8m4_m

#define vnmsub_vv_u8m4_m ( ... ) __riscv_vnmsub_vv_u8m4_tumu(__VA_ARGS__)

◆ vnmsub_vv_u8m8

#define vnmsub_vv_u8m8 ( ... ) __riscv_vnmsub_vv_u8m8_tu(__VA_ARGS__)

◆ vnmsub_vv_u8m8_m

#define vnmsub_vv_u8m8_m ( ... ) __riscv_vnmsub_vv_u8m8_tumu(__VA_ARGS__)

◆ vnmsub_vv_u8mf2

#define vnmsub_vv_u8mf2 ( ... ) __riscv_vnmsub_vv_u8mf2_tu(__VA_ARGS__)

◆ vnmsub_vv_u8mf2_m

#define vnmsub_vv_u8mf2_m ( ... ) __riscv_vnmsub_vv_u8mf2_tumu(__VA_ARGS__)

◆ vnmsub_vv_u8mf4

#define vnmsub_vv_u8mf4 ( ... ) __riscv_vnmsub_vv_u8mf4_tu(__VA_ARGS__)

◆ vnmsub_vv_u8mf4_m

#define vnmsub_vv_u8mf4_m ( ... ) __riscv_vnmsub_vv_u8mf4_tumu(__VA_ARGS__)

◆ vnmsub_vv_u8mf8

#define vnmsub_vv_u8mf8 ( ... ) __riscv_vnmsub_vv_u8mf8_tu(__VA_ARGS__)

◆ vnmsub_vv_u8mf8_m

#define vnmsub_vv_u8mf8_m ( ... ) __riscv_vnmsub_vv_u8mf8_tumu(__VA_ARGS__)

◆ vnmsub_vx_i16m1

#define vnmsub_vx_i16m1 ( ... ) __riscv_vnmsub_vx_i16m1_tu(__VA_ARGS__)

◆ vnmsub_vx_i16m1_m

#define vnmsub_vx_i16m1_m ( ... ) __riscv_vnmsub_vx_i16m1_tumu(__VA_ARGS__)

◆ vnmsub_vx_i16m2

#define vnmsub_vx_i16m2 ( ... ) __riscv_vnmsub_vx_i16m2_tu(__VA_ARGS__)

◆ vnmsub_vx_i16m2_m

#define vnmsub_vx_i16m2_m ( ... ) __riscv_vnmsub_vx_i16m2_tumu(__VA_ARGS__)

◆ vnmsub_vx_i16m4

#define vnmsub_vx_i16m4 ( ... ) __riscv_vnmsub_vx_i16m4_tu(__VA_ARGS__)

◆ vnmsub_vx_i16m4_m

#define vnmsub_vx_i16m4_m ( ... ) __riscv_vnmsub_vx_i16m4_tumu(__VA_ARGS__)

◆ vnmsub_vx_i16m8

#define vnmsub_vx_i16m8 ( ... ) __riscv_vnmsub_vx_i16m8_tu(__VA_ARGS__)

◆ vnmsub_vx_i16m8_m

#define vnmsub_vx_i16m8_m ( ... ) __riscv_vnmsub_vx_i16m8_tumu(__VA_ARGS__)

◆ vnmsub_vx_i16mf2

#define vnmsub_vx_i16mf2 ( ... ) __riscv_vnmsub_vx_i16mf2_tu(__VA_ARGS__)

◆ vnmsub_vx_i16mf2_m

#define vnmsub_vx_i16mf2_m ( ... ) __riscv_vnmsub_vx_i16mf2_tumu(__VA_ARGS__)

◆ vnmsub_vx_i16mf4

#define vnmsub_vx_i16mf4 ( ... ) __riscv_vnmsub_vx_i16mf4_tu(__VA_ARGS__)

◆ vnmsub_vx_i16mf4_m

#define vnmsub_vx_i16mf4_m ( ... ) __riscv_vnmsub_vx_i16mf4_tumu(__VA_ARGS__)

◆ vnmsub_vx_i32m1

#define vnmsub_vx_i32m1 ( ... ) __riscv_vnmsub_vx_i32m1_tu(__VA_ARGS__)

◆ vnmsub_vx_i32m1_m

#define vnmsub_vx_i32m1_m ( ... ) __riscv_vnmsub_vx_i32m1_tumu(__VA_ARGS__)

◆ vnmsub_vx_i32m2

#define vnmsub_vx_i32m2 ( ... ) __riscv_vnmsub_vx_i32m2_tu(__VA_ARGS__)

◆ vnmsub_vx_i32m2_m

#define vnmsub_vx_i32m2_m ( ... ) __riscv_vnmsub_vx_i32m2_tumu(__VA_ARGS__)

◆ vnmsub_vx_i32m4

#define vnmsub_vx_i32m4 ( ... ) __riscv_vnmsub_vx_i32m4_tu(__VA_ARGS__)

◆ vnmsub_vx_i32m4_m

#define vnmsub_vx_i32m4_m ( ... ) __riscv_vnmsub_vx_i32m4_tumu(__VA_ARGS__)

◆ vnmsub_vx_i32m8

#define vnmsub_vx_i32m8 ( ... ) __riscv_vnmsub_vx_i32m8_tu(__VA_ARGS__)

◆ vnmsub_vx_i32m8_m

#define vnmsub_vx_i32m8_m ( ... ) __riscv_vnmsub_vx_i32m8_tumu(__VA_ARGS__)

◆ vnmsub_vx_i32mf2

#define vnmsub_vx_i32mf2 ( ... ) __riscv_vnmsub_vx_i32mf2_tu(__VA_ARGS__)

◆ vnmsub_vx_i32mf2_m

#define vnmsub_vx_i32mf2_m ( ... ) __riscv_vnmsub_vx_i32mf2_tumu(__VA_ARGS__)

◆ vnmsub_vx_i64m1

#define vnmsub_vx_i64m1 ( ... ) __riscv_vnmsub_vx_i64m1_tu(__VA_ARGS__)

◆ vnmsub_vx_i64m1_m

#define vnmsub_vx_i64m1_m ( ... ) __riscv_vnmsub_vx_i64m1_tumu(__VA_ARGS__)

◆ vnmsub_vx_i64m2

#define vnmsub_vx_i64m2 ( ... ) __riscv_vnmsub_vx_i64m2_tu(__VA_ARGS__)

◆ vnmsub_vx_i64m2_m

#define vnmsub_vx_i64m2_m ( ... ) __riscv_vnmsub_vx_i64m2_tumu(__VA_ARGS__)

◆ vnmsub_vx_i64m4

#define vnmsub_vx_i64m4 ( ... ) __riscv_vnmsub_vx_i64m4_tu(__VA_ARGS__)

◆ vnmsub_vx_i64m4_m

#define vnmsub_vx_i64m4_m ( ... ) __riscv_vnmsub_vx_i64m4_tumu(__VA_ARGS__)

◆ vnmsub_vx_i64m8

#define vnmsub_vx_i64m8 ( ... ) __riscv_vnmsub_vx_i64m8_tu(__VA_ARGS__)

◆ vnmsub_vx_i64m8_m

#define vnmsub_vx_i64m8_m ( ... ) __riscv_vnmsub_vx_i64m8_tumu(__VA_ARGS__)

◆ vnmsub_vx_i8m1

#define vnmsub_vx_i8m1 ( ... ) __riscv_vnmsub_vx_i8m1_tu(__VA_ARGS__)

◆ vnmsub_vx_i8m1_m

#define vnmsub_vx_i8m1_m ( ... ) __riscv_vnmsub_vx_i8m1_tumu(__VA_ARGS__)

◆ vnmsub_vx_i8m2

#define vnmsub_vx_i8m2 ( ... ) __riscv_vnmsub_vx_i8m2_tu(__VA_ARGS__)

◆ vnmsub_vx_i8m2_m

#define vnmsub_vx_i8m2_m ( ... ) __riscv_vnmsub_vx_i8m2_tumu(__VA_ARGS__)

◆ vnmsub_vx_i8m4

#define vnmsub_vx_i8m4 ( ... ) __riscv_vnmsub_vx_i8m4_tu(__VA_ARGS__)

◆ vnmsub_vx_i8m4_m

#define vnmsub_vx_i8m4_m ( ... ) __riscv_vnmsub_vx_i8m4_tumu(__VA_ARGS__)

◆ vnmsub_vx_i8m8

#define vnmsub_vx_i8m8 ( ... ) __riscv_vnmsub_vx_i8m8_tu(__VA_ARGS__)

◆ vnmsub_vx_i8m8_m

#define vnmsub_vx_i8m8_m ( ... ) __riscv_vnmsub_vx_i8m8_tumu(__VA_ARGS__)

◆ vnmsub_vx_i8mf2

#define vnmsub_vx_i8mf2 ( ... ) __riscv_vnmsub_vx_i8mf2_tu(__VA_ARGS__)

◆ vnmsub_vx_i8mf2_m

#define vnmsub_vx_i8mf2_m ( ... ) __riscv_vnmsub_vx_i8mf2_tumu(__VA_ARGS__)

◆ vnmsub_vx_i8mf4

#define vnmsub_vx_i8mf4 ( ... ) __riscv_vnmsub_vx_i8mf4_tu(__VA_ARGS__)

◆ vnmsub_vx_i8mf4_m

#define vnmsub_vx_i8mf4_m ( ... ) __riscv_vnmsub_vx_i8mf4_tumu(__VA_ARGS__)

◆ vnmsub_vx_i8mf8

#define vnmsub_vx_i8mf8 ( ... ) __riscv_vnmsub_vx_i8mf8_tu(__VA_ARGS__)

◆ vnmsub_vx_i8mf8_m

#define vnmsub_vx_i8mf8_m ( ... ) __riscv_vnmsub_vx_i8mf8_tumu(__VA_ARGS__)

◆ vnmsub_vx_u16m1

#define vnmsub_vx_u16m1 ( ... ) __riscv_vnmsub_vx_u16m1_tu(__VA_ARGS__)

◆ vnmsub_vx_u16m1_m

#define vnmsub_vx_u16m1_m ( ... ) __riscv_vnmsub_vx_u16m1_tumu(__VA_ARGS__)

◆ vnmsub_vx_u16m2

#define vnmsub_vx_u16m2 ( ... ) __riscv_vnmsub_vx_u16m2_tu(__VA_ARGS__)

◆ vnmsub_vx_u16m2_m

#define vnmsub_vx_u16m2_m ( ... ) __riscv_vnmsub_vx_u16m2_tumu(__VA_ARGS__)

◆ vnmsub_vx_u16m4

#define vnmsub_vx_u16m4 ( ... ) __riscv_vnmsub_vx_u16m4_tu(__VA_ARGS__)

◆ vnmsub_vx_u16m4_m

#define vnmsub_vx_u16m4_m ( ... ) __riscv_vnmsub_vx_u16m4_tumu(__VA_ARGS__)

◆ vnmsub_vx_u16m8

#define vnmsub_vx_u16m8 ( ... ) __riscv_vnmsub_vx_u16m8_tu(__VA_ARGS__)

◆ vnmsub_vx_u16m8_m

#define vnmsub_vx_u16m8_m ( ... ) __riscv_vnmsub_vx_u16m8_tumu(__VA_ARGS__)

◆ vnmsub_vx_u16mf2

#define vnmsub_vx_u16mf2 ( ... ) __riscv_vnmsub_vx_u16mf2_tu(__VA_ARGS__)

◆ vnmsub_vx_u16mf2_m

#define vnmsub_vx_u16mf2_m ( ... ) __riscv_vnmsub_vx_u16mf2_tumu(__VA_ARGS__)

◆ vnmsub_vx_u16mf4

#define vnmsub_vx_u16mf4 ( ... ) __riscv_vnmsub_vx_u16mf4_tu(__VA_ARGS__)

◆ vnmsub_vx_u16mf4_m

#define vnmsub_vx_u16mf4_m ( ... ) __riscv_vnmsub_vx_u16mf4_tumu(__VA_ARGS__)

◆ vnmsub_vx_u32m1

#define vnmsub_vx_u32m1 ( ... ) __riscv_vnmsub_vx_u32m1_tu(__VA_ARGS__)

◆ vnmsub_vx_u32m1_m

#define vnmsub_vx_u32m1_m ( ... ) __riscv_vnmsub_vx_u32m1_tumu(__VA_ARGS__)

◆ vnmsub_vx_u32m2

#define vnmsub_vx_u32m2 ( ... ) __riscv_vnmsub_vx_u32m2_tu(__VA_ARGS__)

◆ vnmsub_vx_u32m2_m

#define vnmsub_vx_u32m2_m ( ... ) __riscv_vnmsub_vx_u32m2_tumu(__VA_ARGS__)

◆ vnmsub_vx_u32m4

#define vnmsub_vx_u32m4 ( ... ) __riscv_vnmsub_vx_u32m4_tu(__VA_ARGS__)

◆ vnmsub_vx_u32m4_m

#define vnmsub_vx_u32m4_m ( ... ) __riscv_vnmsub_vx_u32m4_tumu(__VA_ARGS__)

◆ vnmsub_vx_u32m8

#define vnmsub_vx_u32m8 ( ... ) __riscv_vnmsub_vx_u32m8_tu(__VA_ARGS__)

◆ vnmsub_vx_u32m8_m

#define vnmsub_vx_u32m8_m ( ... ) __riscv_vnmsub_vx_u32m8_tumu(__VA_ARGS__)

◆ vnmsub_vx_u32mf2

#define vnmsub_vx_u32mf2 ( ... ) __riscv_vnmsub_vx_u32mf2_tu(__VA_ARGS__)

◆ vnmsub_vx_u32mf2_m

#define vnmsub_vx_u32mf2_m ( ... ) __riscv_vnmsub_vx_u32mf2_tumu(__VA_ARGS__)

◆ vnmsub_vx_u64m1

#define vnmsub_vx_u64m1 ( ... ) __riscv_vnmsub_vx_u64m1_tu(__VA_ARGS__)

◆ vnmsub_vx_u64m1_m

#define vnmsub_vx_u64m1_m ( ... ) __riscv_vnmsub_vx_u64m1_tumu(__VA_ARGS__)

◆ vnmsub_vx_u64m2

#define vnmsub_vx_u64m2 ( ... ) __riscv_vnmsub_vx_u64m2_tu(__VA_ARGS__)

◆ vnmsub_vx_u64m2_m

#define vnmsub_vx_u64m2_m ( ... ) __riscv_vnmsub_vx_u64m2_tumu(__VA_ARGS__)

◆ vnmsub_vx_u64m4

#define vnmsub_vx_u64m4 ( ... ) __riscv_vnmsub_vx_u64m4_tu(__VA_ARGS__)

◆ vnmsub_vx_u64m4_m

#define vnmsub_vx_u64m4_m ( ... ) __riscv_vnmsub_vx_u64m4_tumu(__VA_ARGS__)

◆ vnmsub_vx_u64m8

#define vnmsub_vx_u64m8 ( ... ) __riscv_vnmsub_vx_u64m8_tu(__VA_ARGS__)

◆ vnmsub_vx_u64m8_m

#define vnmsub_vx_u64m8_m ( ... ) __riscv_vnmsub_vx_u64m8_tumu(__VA_ARGS__)

◆ vnmsub_vx_u8m1

#define vnmsub_vx_u8m1 ( ... ) __riscv_vnmsub_vx_u8m1_tu(__VA_ARGS__)

◆ vnmsub_vx_u8m1_m

#define vnmsub_vx_u8m1_m ( ... ) __riscv_vnmsub_vx_u8m1_tumu(__VA_ARGS__)

◆ vnmsub_vx_u8m2

#define vnmsub_vx_u8m2 ( ... ) __riscv_vnmsub_vx_u8m2_tu(__VA_ARGS__)

◆ vnmsub_vx_u8m2_m

#define vnmsub_vx_u8m2_m ( ... ) __riscv_vnmsub_vx_u8m2_tumu(__VA_ARGS__)

◆ vnmsub_vx_u8m4

#define vnmsub_vx_u8m4 ( ... ) __riscv_vnmsub_vx_u8m4_tu(__VA_ARGS__)

◆ vnmsub_vx_u8m4_m

#define vnmsub_vx_u8m4_m ( ... ) __riscv_vnmsub_vx_u8m4_tumu(__VA_ARGS__)

◆ vnmsub_vx_u8m8

#define vnmsub_vx_u8m8 ( ... ) __riscv_vnmsub_vx_u8m8_tu(__VA_ARGS__)

◆ vnmsub_vx_u8m8_m

#define vnmsub_vx_u8m8_m ( ... ) __riscv_vnmsub_vx_u8m8_tumu(__VA_ARGS__)

◆ vnmsub_vx_u8mf2

#define vnmsub_vx_u8mf2 ( ... ) __riscv_vnmsub_vx_u8mf2_tu(__VA_ARGS__)

◆ vnmsub_vx_u8mf2_m

#define vnmsub_vx_u8mf2_m ( ... ) __riscv_vnmsub_vx_u8mf2_tumu(__VA_ARGS__)

◆ vnmsub_vx_u8mf4

#define vnmsub_vx_u8mf4 ( ... ) __riscv_vnmsub_vx_u8mf4_tu(__VA_ARGS__)

◆ vnmsub_vx_u8mf4_m

#define vnmsub_vx_u8mf4_m ( ... ) __riscv_vnmsub_vx_u8mf4_tumu(__VA_ARGS__)

◆ vnmsub_vx_u8mf8

#define vnmsub_vx_u8mf8 ( ... ) __riscv_vnmsub_vx_u8mf8_tu(__VA_ARGS__)

◆ vnmsub_vx_u8mf8_m

#define vnmsub_vx_u8mf8_m ( ... ) __riscv_vnmsub_vx_u8mf8_tumu(__VA_ARGS__)

◆ vnot_v_i16m1

#define vnot_v_i16m1 ( ... ) __riscv_vnot_v_i16m1(__VA_ARGS__)

◆ vnot_v_i16m1_m

#define vnot_v_i16m1_m ( ... ) __riscv_vnot_v_i16m1_tumu(__VA_ARGS__)

◆ vnot_v_i16m2

#define vnot_v_i16m2 ( ... ) __riscv_vnot_v_i16m2(__VA_ARGS__)

◆ vnot_v_i16m2_m

#define vnot_v_i16m2_m ( ... ) __riscv_vnot_v_i16m2_tumu(__VA_ARGS__)

◆ vnot_v_i16m4

#define vnot_v_i16m4 ( ... ) __riscv_vnot_v_i16m4(__VA_ARGS__)

◆ vnot_v_i16m4_m

#define vnot_v_i16m4_m ( ... ) __riscv_vnot_v_i16m4_tumu(__VA_ARGS__)

◆ vnot_v_i16m8

#define vnot_v_i16m8 ( ... ) __riscv_vnot_v_i16m8(__VA_ARGS__)

◆ vnot_v_i16m8_m

#define vnot_v_i16m8_m ( ... ) __riscv_vnot_v_i16m8_tumu(__VA_ARGS__)

◆ vnot_v_i16mf2

#define vnot_v_i16mf2 ( ... ) __riscv_vnot_v_i16mf2(__VA_ARGS__)

◆ vnot_v_i16mf2_m

#define vnot_v_i16mf2_m ( ... ) __riscv_vnot_v_i16mf2_tumu(__VA_ARGS__)

◆ vnot_v_i16mf4

#define vnot_v_i16mf4 ( ... ) __riscv_vnot_v_i16mf4(__VA_ARGS__)

◆ vnot_v_i16mf4_m

#define vnot_v_i16mf4_m ( ... ) __riscv_vnot_v_i16mf4_tumu(__VA_ARGS__)

◆ vnot_v_i32m1

#define vnot_v_i32m1 ( ... ) __riscv_vnot_v_i32m1(__VA_ARGS__)

◆ vnot_v_i32m1_m

#define vnot_v_i32m1_m ( ... ) __riscv_vnot_v_i32m1_tumu(__VA_ARGS__)

◆ vnot_v_i32m2

#define vnot_v_i32m2 ( ... ) __riscv_vnot_v_i32m2(__VA_ARGS__)

◆ vnot_v_i32m2_m

#define vnot_v_i32m2_m ( ... ) __riscv_vnot_v_i32m2_tumu(__VA_ARGS__)

◆ vnot_v_i32m4

#define vnot_v_i32m4 ( ... ) __riscv_vnot_v_i32m4(__VA_ARGS__)

◆ vnot_v_i32m4_m

#define vnot_v_i32m4_m ( ... ) __riscv_vnot_v_i32m4_tumu(__VA_ARGS__)

◆ vnot_v_i32m8

#define vnot_v_i32m8 ( ... ) __riscv_vnot_v_i32m8(__VA_ARGS__)

◆ vnot_v_i32m8_m

#define vnot_v_i32m8_m ( ... ) __riscv_vnot_v_i32m8_tumu(__VA_ARGS__)

◆ vnot_v_i32mf2

#define vnot_v_i32mf2 ( ... ) __riscv_vnot_v_i32mf2(__VA_ARGS__)

◆ vnot_v_i32mf2_m

#define vnot_v_i32mf2_m ( ... ) __riscv_vnot_v_i32mf2_tumu(__VA_ARGS__)

◆ vnot_v_i64m1

#define vnot_v_i64m1 ( ... ) __riscv_vnot_v_i64m1(__VA_ARGS__)

◆ vnot_v_i64m1_m

#define vnot_v_i64m1_m ( ... ) __riscv_vnot_v_i64m1_tumu(__VA_ARGS__)

◆ vnot_v_i64m2

#define vnot_v_i64m2 ( ... ) __riscv_vnot_v_i64m2(__VA_ARGS__)

◆ vnot_v_i64m2_m

#define vnot_v_i64m2_m ( ... ) __riscv_vnot_v_i64m2_tumu(__VA_ARGS__)

◆ vnot_v_i64m4

#define vnot_v_i64m4 ( ... ) __riscv_vnot_v_i64m4(__VA_ARGS__)

◆ vnot_v_i64m4_m

#define vnot_v_i64m4_m ( ... ) __riscv_vnot_v_i64m4_tumu(__VA_ARGS__)

◆ vnot_v_i64m8

#define vnot_v_i64m8 ( ... ) __riscv_vnot_v_i64m8(__VA_ARGS__)

◆ vnot_v_i64m8_m

#define vnot_v_i64m8_m ( ... ) __riscv_vnot_v_i64m8_tumu(__VA_ARGS__)

◆ vnot_v_i8m1

#define vnot_v_i8m1 ( ... ) __riscv_vnot_v_i8m1(__VA_ARGS__)

◆ vnot_v_i8m1_m

#define vnot_v_i8m1_m ( ... ) __riscv_vnot_v_i8m1_tumu(__VA_ARGS__)

◆ vnot_v_i8m2

#define vnot_v_i8m2 ( ... ) __riscv_vnot_v_i8m2(__VA_ARGS__)

◆ vnot_v_i8m2_m

#define vnot_v_i8m2_m ( ... ) __riscv_vnot_v_i8m2_tumu(__VA_ARGS__)

◆ vnot_v_i8m4

#define vnot_v_i8m4 ( ... ) __riscv_vnot_v_i8m4(__VA_ARGS__)

◆ vnot_v_i8m4_m

#define vnot_v_i8m4_m ( ... ) __riscv_vnot_v_i8m4_tumu(__VA_ARGS__)

◆ vnot_v_i8m8

#define vnot_v_i8m8 ( ... ) __riscv_vnot_v_i8m8(__VA_ARGS__)

◆ vnot_v_i8m8_m

#define vnot_v_i8m8_m ( ... ) __riscv_vnot_v_i8m8_tumu(__VA_ARGS__)

◆ vnot_v_i8mf2

#define vnot_v_i8mf2 ( ... ) __riscv_vnot_v_i8mf2(__VA_ARGS__)

◆ vnot_v_i8mf2_m

#define vnot_v_i8mf2_m ( ... ) __riscv_vnot_v_i8mf2_tumu(__VA_ARGS__)

◆ vnot_v_i8mf4

#define vnot_v_i8mf4 ( ... ) __riscv_vnot_v_i8mf4(__VA_ARGS__)

◆ vnot_v_i8mf4_m

#define vnot_v_i8mf4_m ( ... ) __riscv_vnot_v_i8mf4_tumu(__VA_ARGS__)

◆ vnot_v_i8mf8

#define vnot_v_i8mf8 ( ... ) __riscv_vnot_v_i8mf8(__VA_ARGS__)

◆ vnot_v_i8mf8_m

#define vnot_v_i8mf8_m ( ... ) __riscv_vnot_v_i8mf8_tumu(__VA_ARGS__)

◆ vnot_v_u16m1

#define vnot_v_u16m1 ( ... ) __riscv_vnot_v_u16m1(__VA_ARGS__)

◆ vnot_v_u16m1_m

#define vnot_v_u16m1_m ( ... ) __riscv_vnot_v_u16m1_tumu(__VA_ARGS__)

◆ vnot_v_u16m2

#define vnot_v_u16m2 ( ... ) __riscv_vnot_v_u16m2(__VA_ARGS__)

◆ vnot_v_u16m2_m

#define vnot_v_u16m2_m ( ... ) __riscv_vnot_v_u16m2_tumu(__VA_ARGS__)

◆ vnot_v_u16m4

#define vnot_v_u16m4 ( ... ) __riscv_vnot_v_u16m4(__VA_ARGS__)

◆ vnot_v_u16m4_m

#define vnot_v_u16m4_m ( ... ) __riscv_vnot_v_u16m4_tumu(__VA_ARGS__)

◆ vnot_v_u16m8

#define vnot_v_u16m8 ( ... ) __riscv_vnot_v_u16m8(__VA_ARGS__)

◆ vnot_v_u16m8_m

#define vnot_v_u16m8_m ( ... ) __riscv_vnot_v_u16m8_tumu(__VA_ARGS__)

◆ vnot_v_u16mf2

#define vnot_v_u16mf2 ( ... ) __riscv_vnot_v_u16mf2(__VA_ARGS__)

◆ vnot_v_u16mf2_m

#define vnot_v_u16mf2_m ( ... ) __riscv_vnot_v_u16mf2_tumu(__VA_ARGS__)

◆ vnot_v_u16mf4

#define vnot_v_u16mf4 ( ... ) __riscv_vnot_v_u16mf4(__VA_ARGS__)

◆ vnot_v_u16mf4_m

#define vnot_v_u16mf4_m ( ... ) __riscv_vnot_v_u16mf4_tumu(__VA_ARGS__)

◆ vnot_v_u32m1

#define vnot_v_u32m1 ( ... ) __riscv_vnot_v_u32m1(__VA_ARGS__)

◆ vnot_v_u32m1_m

#define vnot_v_u32m1_m ( ... ) __riscv_vnot_v_u32m1_tumu(__VA_ARGS__)

◆ vnot_v_u32m2

#define vnot_v_u32m2 ( ... ) __riscv_vnot_v_u32m2(__VA_ARGS__)

◆ vnot_v_u32m2_m

#define vnot_v_u32m2_m ( ... ) __riscv_vnot_v_u32m2_tumu(__VA_ARGS__)

◆ vnot_v_u32m4

#define vnot_v_u32m4 ( ... ) __riscv_vnot_v_u32m4(__VA_ARGS__)

◆ vnot_v_u32m4_m

#define vnot_v_u32m4_m ( ... ) __riscv_vnot_v_u32m4_tumu(__VA_ARGS__)

◆ vnot_v_u32m8

#define vnot_v_u32m8 ( ... ) __riscv_vnot_v_u32m8(__VA_ARGS__)

◆ vnot_v_u32m8_m

#define vnot_v_u32m8_m ( ... ) __riscv_vnot_v_u32m8_tumu(__VA_ARGS__)

◆ vnot_v_u32mf2

#define vnot_v_u32mf2 ( ... ) __riscv_vnot_v_u32mf2(__VA_ARGS__)

◆ vnot_v_u32mf2_m

#define vnot_v_u32mf2_m ( ... ) __riscv_vnot_v_u32mf2_tumu(__VA_ARGS__)

◆ vnot_v_u64m1

#define vnot_v_u64m1 ( ... ) __riscv_vnot_v_u64m1(__VA_ARGS__)

◆ vnot_v_u64m1_m

#define vnot_v_u64m1_m ( ... ) __riscv_vnot_v_u64m1_tumu(__VA_ARGS__)

◆ vnot_v_u64m2

#define vnot_v_u64m2 ( ... ) __riscv_vnot_v_u64m2(__VA_ARGS__)

◆ vnot_v_u64m2_m

#define vnot_v_u64m2_m ( ... ) __riscv_vnot_v_u64m2_tumu(__VA_ARGS__)

◆ vnot_v_u64m4

#define vnot_v_u64m4 ( ... ) __riscv_vnot_v_u64m4(__VA_ARGS__)

◆ vnot_v_u64m4_m

#define vnot_v_u64m4_m ( ... ) __riscv_vnot_v_u64m4_tumu(__VA_ARGS__)

◆ vnot_v_u64m8

#define vnot_v_u64m8 ( ... ) __riscv_vnot_v_u64m8(__VA_ARGS__)

◆ vnot_v_u64m8_m

#define vnot_v_u64m8_m ( ... ) __riscv_vnot_v_u64m8_tumu(__VA_ARGS__)

◆ vnot_v_u8m1

#define vnot_v_u8m1 ( ... ) __riscv_vnot_v_u8m1(__VA_ARGS__)

◆ vnot_v_u8m1_m

#define vnot_v_u8m1_m ( ... ) __riscv_vnot_v_u8m1_tumu(__VA_ARGS__)

◆ vnot_v_u8m2

#define vnot_v_u8m2 ( ... ) __riscv_vnot_v_u8m2(__VA_ARGS__)

◆ vnot_v_u8m2_m

#define vnot_v_u8m2_m ( ... ) __riscv_vnot_v_u8m2_tumu(__VA_ARGS__)

◆ vnot_v_u8m4

#define vnot_v_u8m4 ( ... ) __riscv_vnot_v_u8m4(__VA_ARGS__)

◆ vnot_v_u8m4_m

#define vnot_v_u8m4_m ( ... ) __riscv_vnot_v_u8m4_tumu(__VA_ARGS__)

◆ vnot_v_u8m8

#define vnot_v_u8m8 ( ... ) __riscv_vnot_v_u8m8(__VA_ARGS__)

◆ vnot_v_u8m8_m

#define vnot_v_u8m8_m ( ... ) __riscv_vnot_v_u8m8_tumu(__VA_ARGS__)

◆ vnot_v_u8mf2

#define vnot_v_u8mf2 ( ... ) __riscv_vnot_v_u8mf2(__VA_ARGS__)

◆ vnot_v_u8mf2_m

#define vnot_v_u8mf2_m ( ... ) __riscv_vnot_v_u8mf2_tumu(__VA_ARGS__)

◆ vnot_v_u8mf4

#define vnot_v_u8mf4 ( ... ) __riscv_vnot_v_u8mf4(__VA_ARGS__)

◆ vnot_v_u8mf4_m

#define vnot_v_u8mf4_m ( ... ) __riscv_vnot_v_u8mf4_tumu(__VA_ARGS__)

◆ vnot_v_u8mf8

#define vnot_v_u8mf8 ( ... ) __riscv_vnot_v_u8mf8(__VA_ARGS__)

◆ vnot_v_u8mf8_m

#define vnot_v_u8mf8_m ( ... ) __riscv_vnot_v_u8mf8_tumu(__VA_ARGS__)

◆ vnsra_wv_i16m1

#define vnsra_wv_i16m1 ( ... ) __riscv_vnsra_wv_i16m1(__VA_ARGS__)

◆ vnsra_wv_i16m1_m

#define vnsra_wv_i16m1_m ( ... ) __riscv_vnsra_wv_i16m1_tumu(__VA_ARGS__)

◆ vnsra_wv_i16m2

#define vnsra_wv_i16m2 ( ... ) __riscv_vnsra_wv_i16m2(__VA_ARGS__)

◆ vnsra_wv_i16m2_m

#define vnsra_wv_i16m2_m ( ... ) __riscv_vnsra_wv_i16m2_tumu(__VA_ARGS__)

◆ vnsra_wv_i16m4

#define vnsra_wv_i16m4 ( ... ) __riscv_vnsra_wv_i16m4(__VA_ARGS__)

◆ vnsra_wv_i16m4_m

#define vnsra_wv_i16m4_m ( ... ) __riscv_vnsra_wv_i16m4_tumu(__VA_ARGS__)

◆ vnsra_wv_i16mf2

#define vnsra_wv_i16mf2 ( ... ) __riscv_vnsra_wv_i16mf2(__VA_ARGS__)

◆ vnsra_wv_i16mf2_m

#define vnsra_wv_i16mf2_m ( ... ) __riscv_vnsra_wv_i16mf2_tumu(__VA_ARGS__)

◆ vnsra_wv_i16mf4

#define vnsra_wv_i16mf4 ( ... ) __riscv_vnsra_wv_i16mf4(__VA_ARGS__)

◆ vnsra_wv_i16mf4_m

#define vnsra_wv_i16mf4_m ( ... ) __riscv_vnsra_wv_i16mf4_tumu(__VA_ARGS__)

◆ vnsra_wv_i32m1

#define vnsra_wv_i32m1 ( ... ) __riscv_vnsra_wv_i32m1(__VA_ARGS__)

◆ vnsra_wv_i32m1_m

#define vnsra_wv_i32m1_m ( ... ) __riscv_vnsra_wv_i32m1_tumu(__VA_ARGS__)

◆ vnsra_wv_i32m2

#define vnsra_wv_i32m2 ( ... ) __riscv_vnsra_wv_i32m2(__VA_ARGS__)

◆ vnsra_wv_i32m2_m

#define vnsra_wv_i32m2_m ( ... ) __riscv_vnsra_wv_i32m2_tumu(__VA_ARGS__)

◆ vnsra_wv_i32m4

#define vnsra_wv_i32m4 ( ... ) __riscv_vnsra_wv_i32m4(__VA_ARGS__)

◆ vnsra_wv_i32m4_m

#define vnsra_wv_i32m4_m ( ... ) __riscv_vnsra_wv_i32m4_tumu(__VA_ARGS__)

◆ vnsra_wv_i32mf2

#define vnsra_wv_i32mf2 ( ... ) __riscv_vnsra_wv_i32mf2(__VA_ARGS__)

◆ vnsra_wv_i32mf2_m

#define vnsra_wv_i32mf2_m ( ... ) __riscv_vnsra_wv_i32mf2_tumu(__VA_ARGS__)

◆ vnsra_wv_i8m1

#define vnsra_wv_i8m1 ( ... ) __riscv_vnsra_wv_i8m1(__VA_ARGS__)

◆ vnsra_wv_i8m1_m

#define vnsra_wv_i8m1_m ( ... ) __riscv_vnsra_wv_i8m1_tumu(__VA_ARGS__)

◆ vnsra_wv_i8m2

#define vnsra_wv_i8m2 ( ... ) __riscv_vnsra_wv_i8m2(__VA_ARGS__)

◆ vnsra_wv_i8m2_m

#define vnsra_wv_i8m2_m ( ... ) __riscv_vnsra_wv_i8m2_tumu(__VA_ARGS__)

◆ vnsra_wv_i8m4

#define vnsra_wv_i8m4 ( ... ) __riscv_vnsra_wv_i8m4(__VA_ARGS__)

◆ vnsra_wv_i8m4_m

#define vnsra_wv_i8m4_m ( ... ) __riscv_vnsra_wv_i8m4_tumu(__VA_ARGS__)

◆ vnsra_wv_i8mf2

#define vnsra_wv_i8mf2 ( ... ) __riscv_vnsra_wv_i8mf2(__VA_ARGS__)

◆ vnsra_wv_i8mf2_m

#define vnsra_wv_i8mf2_m ( ... ) __riscv_vnsra_wv_i8mf2_tumu(__VA_ARGS__)

◆ vnsra_wv_i8mf4

#define vnsra_wv_i8mf4 ( ... ) __riscv_vnsra_wv_i8mf4(__VA_ARGS__)

◆ vnsra_wv_i8mf4_m

#define vnsra_wv_i8mf4_m ( ... ) __riscv_vnsra_wv_i8mf4_tumu(__VA_ARGS__)

◆ vnsra_wv_i8mf8

#define vnsra_wv_i8mf8 ( ... ) __riscv_vnsra_wv_i8mf8(__VA_ARGS__)

◆ vnsra_wv_i8mf8_m

#define vnsra_wv_i8mf8_m ( ... ) __riscv_vnsra_wv_i8mf8_tumu(__VA_ARGS__)

◆ vnsra_wx_i16m1

#define vnsra_wx_i16m1 ( ... ) __riscv_vnsra_wx_i16m1(__VA_ARGS__)

◆ vnsra_wx_i16m1_m

#define vnsra_wx_i16m1_m ( ... ) __riscv_vnsra_wx_i16m1_tumu(__VA_ARGS__)

◆ vnsra_wx_i16m2

#define vnsra_wx_i16m2 ( ... ) __riscv_vnsra_wx_i16m2(__VA_ARGS__)

◆ vnsra_wx_i16m2_m

#define vnsra_wx_i16m2_m ( ... ) __riscv_vnsra_wx_i16m2_tumu(__VA_ARGS__)

◆ vnsra_wx_i16m4

#define vnsra_wx_i16m4 ( ... ) __riscv_vnsra_wx_i16m4(__VA_ARGS__)

◆ vnsra_wx_i16m4_m

#define vnsra_wx_i16m4_m ( ... ) __riscv_vnsra_wx_i16m4_tumu(__VA_ARGS__)

◆ vnsra_wx_i16mf2

#define vnsra_wx_i16mf2 ( ... ) __riscv_vnsra_wx_i16mf2(__VA_ARGS__)

◆ vnsra_wx_i16mf2_m

#define vnsra_wx_i16mf2_m ( ... ) __riscv_vnsra_wx_i16mf2_tumu(__VA_ARGS__)

◆ vnsra_wx_i16mf4

#define vnsra_wx_i16mf4 ( ... ) __riscv_vnsra_wx_i16mf4(__VA_ARGS__)

◆ vnsra_wx_i16mf4_m

#define vnsra_wx_i16mf4_m ( ... ) __riscv_vnsra_wx_i16mf4_tumu(__VA_ARGS__)

◆ vnsra_wx_i32m1

#define vnsra_wx_i32m1 ( ... ) __riscv_vnsra_wx_i32m1(__VA_ARGS__)

◆ vnsra_wx_i32m1_m

#define vnsra_wx_i32m1_m ( ... ) __riscv_vnsra_wx_i32m1_tumu(__VA_ARGS__)

◆ vnsra_wx_i32m2

#define vnsra_wx_i32m2 ( ... ) __riscv_vnsra_wx_i32m2(__VA_ARGS__)

◆ vnsra_wx_i32m2_m

#define vnsra_wx_i32m2_m ( ... ) __riscv_vnsra_wx_i32m2_tumu(__VA_ARGS__)

◆ vnsra_wx_i32m4

#define vnsra_wx_i32m4 ( ... ) __riscv_vnsra_wx_i32m4(__VA_ARGS__)

◆ vnsra_wx_i32m4_m

#define vnsra_wx_i32m4_m ( ... ) __riscv_vnsra_wx_i32m4_tumu(__VA_ARGS__)

◆ vnsra_wx_i32mf2

#define vnsra_wx_i32mf2 ( ... ) __riscv_vnsra_wx_i32mf2(__VA_ARGS__)

◆ vnsra_wx_i32mf2_m

#define vnsra_wx_i32mf2_m ( ... ) __riscv_vnsra_wx_i32mf2_tumu(__VA_ARGS__)

◆ vnsra_wx_i8m1

#define vnsra_wx_i8m1 ( ... ) __riscv_vnsra_wx_i8m1(__VA_ARGS__)

◆ vnsra_wx_i8m1_m

#define vnsra_wx_i8m1_m ( ... ) __riscv_vnsra_wx_i8m1_tumu(__VA_ARGS__)

◆ vnsra_wx_i8m2

#define vnsra_wx_i8m2 ( ... ) __riscv_vnsra_wx_i8m2(__VA_ARGS__)

◆ vnsra_wx_i8m2_m

#define vnsra_wx_i8m2_m ( ... ) __riscv_vnsra_wx_i8m2_tumu(__VA_ARGS__)

◆ vnsra_wx_i8m4

#define vnsra_wx_i8m4 ( ... ) __riscv_vnsra_wx_i8m4(__VA_ARGS__)

◆ vnsra_wx_i8m4_m

#define vnsra_wx_i8m4_m ( ... ) __riscv_vnsra_wx_i8m4_tumu(__VA_ARGS__)

◆ vnsra_wx_i8mf2

#define vnsra_wx_i8mf2 ( ... ) __riscv_vnsra_wx_i8mf2(__VA_ARGS__)

◆ vnsra_wx_i8mf2_m

#define vnsra_wx_i8mf2_m ( ... ) __riscv_vnsra_wx_i8mf2_tumu(__VA_ARGS__)

◆ vnsra_wx_i8mf4

#define vnsra_wx_i8mf4 ( ... ) __riscv_vnsra_wx_i8mf4(__VA_ARGS__)

◆ vnsra_wx_i8mf4_m

#define vnsra_wx_i8mf4_m ( ... ) __riscv_vnsra_wx_i8mf4_tumu(__VA_ARGS__)

◆ vnsra_wx_i8mf8

#define vnsra_wx_i8mf8 ( ... ) __riscv_vnsra_wx_i8mf8(__VA_ARGS__)

◆ vnsra_wx_i8mf8_m

#define vnsra_wx_i8mf8_m ( ... ) __riscv_vnsra_wx_i8mf8_tumu(__VA_ARGS__)

◆ vnsrl_wv_u16m1

#define vnsrl_wv_u16m1 ( ... ) __riscv_vnsrl_wv_u16m1(__VA_ARGS__)

◆ vnsrl_wv_u16m1_m

#define vnsrl_wv_u16m1_m ( ... ) __riscv_vnsrl_wv_u16m1_tumu(__VA_ARGS__)

◆ vnsrl_wv_u16m2

#define vnsrl_wv_u16m2 ( ... ) __riscv_vnsrl_wv_u16m2(__VA_ARGS__)

◆ vnsrl_wv_u16m2_m

#define vnsrl_wv_u16m2_m ( ... ) __riscv_vnsrl_wv_u16m2_tumu(__VA_ARGS__)

◆ vnsrl_wv_u16m4

#define vnsrl_wv_u16m4 ( ... ) __riscv_vnsrl_wv_u16m4(__VA_ARGS__)

◆ vnsrl_wv_u16m4_m

#define vnsrl_wv_u16m4_m ( ... ) __riscv_vnsrl_wv_u16m4_tumu(__VA_ARGS__)

◆ vnsrl_wv_u16mf2

#define vnsrl_wv_u16mf2 ( ... ) __riscv_vnsrl_wv_u16mf2(__VA_ARGS__)

◆ vnsrl_wv_u16mf2_m

#define vnsrl_wv_u16mf2_m ( ... ) __riscv_vnsrl_wv_u16mf2_tumu(__VA_ARGS__)

◆ vnsrl_wv_u16mf4

#define vnsrl_wv_u16mf4 ( ... ) __riscv_vnsrl_wv_u16mf4(__VA_ARGS__)

◆ vnsrl_wv_u16mf4_m

#define vnsrl_wv_u16mf4_m ( ... ) __riscv_vnsrl_wv_u16mf4_tumu(__VA_ARGS__)

◆ vnsrl_wv_u32m1

#define vnsrl_wv_u32m1 ( ... ) __riscv_vnsrl_wv_u32m1(__VA_ARGS__)

◆ vnsrl_wv_u32m1_m

#define vnsrl_wv_u32m1_m ( ... ) __riscv_vnsrl_wv_u32m1_tumu(__VA_ARGS__)

◆ vnsrl_wv_u32m2

#define vnsrl_wv_u32m2 ( ... ) __riscv_vnsrl_wv_u32m2(__VA_ARGS__)

◆ vnsrl_wv_u32m2_m

#define vnsrl_wv_u32m2_m ( ... ) __riscv_vnsrl_wv_u32m2_tumu(__VA_ARGS__)

◆ vnsrl_wv_u32m4

#define vnsrl_wv_u32m4 ( ... ) __riscv_vnsrl_wv_u32m4(__VA_ARGS__)

◆ vnsrl_wv_u32m4_m

#define vnsrl_wv_u32m4_m ( ... ) __riscv_vnsrl_wv_u32m4_tumu(__VA_ARGS__)

◆ vnsrl_wv_u32mf2

#define vnsrl_wv_u32mf2 ( ... ) __riscv_vnsrl_wv_u32mf2(__VA_ARGS__)

◆ vnsrl_wv_u32mf2_m

#define vnsrl_wv_u32mf2_m ( ... ) __riscv_vnsrl_wv_u32mf2_tumu(__VA_ARGS__)

◆ vnsrl_wv_u8m1

#define vnsrl_wv_u8m1 ( ... ) __riscv_vnsrl_wv_u8m1(__VA_ARGS__)

◆ vnsrl_wv_u8m1_m

#define vnsrl_wv_u8m1_m ( ... ) __riscv_vnsrl_wv_u8m1_tumu(__VA_ARGS__)

◆ vnsrl_wv_u8m2

#define vnsrl_wv_u8m2 ( ... ) __riscv_vnsrl_wv_u8m2(__VA_ARGS__)

◆ vnsrl_wv_u8m2_m

#define vnsrl_wv_u8m2_m ( ... ) __riscv_vnsrl_wv_u8m2_tumu(__VA_ARGS__)

◆ vnsrl_wv_u8m4

#define vnsrl_wv_u8m4 ( ... ) __riscv_vnsrl_wv_u8m4(__VA_ARGS__)

◆ vnsrl_wv_u8m4_m

#define vnsrl_wv_u8m4_m ( ... ) __riscv_vnsrl_wv_u8m4_tumu(__VA_ARGS__)

◆ vnsrl_wv_u8mf2

#define vnsrl_wv_u8mf2 ( ... ) __riscv_vnsrl_wv_u8mf2(__VA_ARGS__)

◆ vnsrl_wv_u8mf2_m

#define vnsrl_wv_u8mf2_m ( ... ) __riscv_vnsrl_wv_u8mf2_tumu(__VA_ARGS__)

◆ vnsrl_wv_u8mf4

#define vnsrl_wv_u8mf4 ( ... ) __riscv_vnsrl_wv_u8mf4(__VA_ARGS__)

◆ vnsrl_wv_u8mf4_m

#define vnsrl_wv_u8mf4_m ( ... ) __riscv_vnsrl_wv_u8mf4_tumu(__VA_ARGS__)

◆ vnsrl_wv_u8mf8

#define vnsrl_wv_u8mf8 ( ... ) __riscv_vnsrl_wv_u8mf8(__VA_ARGS__)

◆ vnsrl_wv_u8mf8_m

#define vnsrl_wv_u8mf8_m ( ... ) __riscv_vnsrl_wv_u8mf8_tumu(__VA_ARGS__)

◆ vnsrl_wx_u16m1

#define vnsrl_wx_u16m1 ( ... ) __riscv_vnsrl_wx_u16m1(__VA_ARGS__)

◆ vnsrl_wx_u16m1_m

#define vnsrl_wx_u16m1_m ( ... ) __riscv_vnsrl_wx_u16m1_tumu(__VA_ARGS__)

◆ vnsrl_wx_u16m2

#define vnsrl_wx_u16m2 ( ... ) __riscv_vnsrl_wx_u16m2(__VA_ARGS__)

◆ vnsrl_wx_u16m2_m

#define vnsrl_wx_u16m2_m ( ... ) __riscv_vnsrl_wx_u16m2_tumu(__VA_ARGS__)

◆ vnsrl_wx_u16m4

#define vnsrl_wx_u16m4 ( ... ) __riscv_vnsrl_wx_u16m4(__VA_ARGS__)

◆ vnsrl_wx_u16m4_m

#define vnsrl_wx_u16m4_m ( ... ) __riscv_vnsrl_wx_u16m4_tumu(__VA_ARGS__)

◆ vnsrl_wx_u16mf2

#define vnsrl_wx_u16mf2 ( ... ) __riscv_vnsrl_wx_u16mf2(__VA_ARGS__)

◆ vnsrl_wx_u16mf2_m

#define vnsrl_wx_u16mf2_m ( ... ) __riscv_vnsrl_wx_u16mf2_tumu(__VA_ARGS__)

◆ vnsrl_wx_u16mf4

#define vnsrl_wx_u16mf4 ( ... ) __riscv_vnsrl_wx_u16mf4(__VA_ARGS__)

◆ vnsrl_wx_u16mf4_m

#define vnsrl_wx_u16mf4_m ( ... ) __riscv_vnsrl_wx_u16mf4_tumu(__VA_ARGS__)

◆ vnsrl_wx_u32m1

#define vnsrl_wx_u32m1 ( ... ) __riscv_vnsrl_wx_u32m1(__VA_ARGS__)

◆ vnsrl_wx_u32m1_m

#define vnsrl_wx_u32m1_m ( ... ) __riscv_vnsrl_wx_u32m1_tumu(__VA_ARGS__)

◆ vnsrl_wx_u32m2

#define vnsrl_wx_u32m2 ( ... ) __riscv_vnsrl_wx_u32m2(__VA_ARGS__)

◆ vnsrl_wx_u32m2_m

#define vnsrl_wx_u32m2_m ( ... ) __riscv_vnsrl_wx_u32m2_tumu(__VA_ARGS__)

◆ vnsrl_wx_u32m4

#define vnsrl_wx_u32m4 ( ... ) __riscv_vnsrl_wx_u32m4(__VA_ARGS__)

◆ vnsrl_wx_u32m4_m

#define vnsrl_wx_u32m4_m ( ... ) __riscv_vnsrl_wx_u32m4_tumu(__VA_ARGS__)

◆ vnsrl_wx_u32mf2

#define vnsrl_wx_u32mf2 ( ... ) __riscv_vnsrl_wx_u32mf2(__VA_ARGS__)

◆ vnsrl_wx_u32mf2_m

#define vnsrl_wx_u32mf2_m ( ... ) __riscv_vnsrl_wx_u32mf2_tumu(__VA_ARGS__)

◆ vnsrl_wx_u8m1

#define vnsrl_wx_u8m1 ( ... ) __riscv_vnsrl_wx_u8m1(__VA_ARGS__)

◆ vnsrl_wx_u8m1_m

#define vnsrl_wx_u8m1_m ( ... ) __riscv_vnsrl_wx_u8m1_tumu(__VA_ARGS__)

◆ vnsrl_wx_u8m2

#define vnsrl_wx_u8m2 ( ... ) __riscv_vnsrl_wx_u8m2(__VA_ARGS__)

◆ vnsrl_wx_u8m2_m

#define vnsrl_wx_u8m2_m ( ... ) __riscv_vnsrl_wx_u8m2_tumu(__VA_ARGS__)

◆ vnsrl_wx_u8m4

#define vnsrl_wx_u8m4 ( ... ) __riscv_vnsrl_wx_u8m4(__VA_ARGS__)

◆ vnsrl_wx_u8m4_m

#define vnsrl_wx_u8m4_m ( ... ) __riscv_vnsrl_wx_u8m4_tumu(__VA_ARGS__)

◆ vnsrl_wx_u8mf2

#define vnsrl_wx_u8mf2 ( ... ) __riscv_vnsrl_wx_u8mf2(__VA_ARGS__)

◆ vnsrl_wx_u8mf2_m

#define vnsrl_wx_u8mf2_m ( ... ) __riscv_vnsrl_wx_u8mf2_tumu(__VA_ARGS__)

◆ vnsrl_wx_u8mf4

#define vnsrl_wx_u8mf4 ( ... ) __riscv_vnsrl_wx_u8mf4(__VA_ARGS__)

◆ vnsrl_wx_u8mf4_m

#define vnsrl_wx_u8mf4_m ( ... ) __riscv_vnsrl_wx_u8mf4_tumu(__VA_ARGS__)

◆ vnsrl_wx_u8mf8

#define vnsrl_wx_u8mf8 ( ... ) __riscv_vnsrl_wx_u8mf8(__VA_ARGS__)

◆ vnsrl_wx_u8mf8_m

#define vnsrl_wx_u8mf8_m ( ... ) __riscv_vnsrl_wx_u8mf8_tumu(__VA_ARGS__)

◆ vor_vv_i16m1

#define vor_vv_i16m1 ( ... ) __riscv_vor_vv_i16m1(__VA_ARGS__)

◆ vor_vv_i16m1_m

#define vor_vv_i16m1_m ( ... ) __riscv_vor_vv_i16m1_tumu(__VA_ARGS__)

◆ vor_vv_i16m2

#define vor_vv_i16m2 ( ... ) __riscv_vor_vv_i16m2(__VA_ARGS__)

◆ vor_vv_i16m2_m

#define vor_vv_i16m2_m ( ... ) __riscv_vor_vv_i16m2_tumu(__VA_ARGS__)

◆ vor_vv_i16m4

#define vor_vv_i16m4 ( ... ) __riscv_vor_vv_i16m4(__VA_ARGS__)

◆ vor_vv_i16m4_m

#define vor_vv_i16m4_m ( ... ) __riscv_vor_vv_i16m4_tumu(__VA_ARGS__)

◆ vor_vv_i16m8

#define vor_vv_i16m8 ( ... ) __riscv_vor_vv_i16m8(__VA_ARGS__)

◆ vor_vv_i16m8_m

#define vor_vv_i16m8_m ( ... ) __riscv_vor_vv_i16m8_tumu(__VA_ARGS__)

◆ vor_vv_i16mf2

#define vor_vv_i16mf2 ( ... ) __riscv_vor_vv_i16mf2(__VA_ARGS__)

◆ vor_vv_i16mf2_m

#define vor_vv_i16mf2_m ( ... ) __riscv_vor_vv_i16mf2_tumu(__VA_ARGS__)

◆ vor_vv_i16mf4

#define vor_vv_i16mf4 ( ... ) __riscv_vor_vv_i16mf4(__VA_ARGS__)

◆ vor_vv_i16mf4_m

#define vor_vv_i16mf4_m ( ... ) __riscv_vor_vv_i16mf4_tumu(__VA_ARGS__)

◆ vor_vv_i32m1

#define vor_vv_i32m1 ( ... ) __riscv_vor_vv_i32m1(__VA_ARGS__)

◆ vor_vv_i32m1_m

#define vor_vv_i32m1_m ( ... ) __riscv_vor_vv_i32m1_tumu(__VA_ARGS__)

◆ vor_vv_i32m2

#define vor_vv_i32m2 ( ... ) __riscv_vor_vv_i32m2(__VA_ARGS__)

◆ vor_vv_i32m2_m

#define vor_vv_i32m2_m ( ... ) __riscv_vor_vv_i32m2_tumu(__VA_ARGS__)

◆ vor_vv_i32m4

#define vor_vv_i32m4 ( ... ) __riscv_vor_vv_i32m4(__VA_ARGS__)

◆ vor_vv_i32m4_m

#define vor_vv_i32m4_m ( ... ) __riscv_vor_vv_i32m4_tumu(__VA_ARGS__)

◆ vor_vv_i32m8

#define vor_vv_i32m8 ( ... ) __riscv_vor_vv_i32m8(__VA_ARGS__)

◆ vor_vv_i32m8_m

#define vor_vv_i32m8_m ( ... ) __riscv_vor_vv_i32m8_tumu(__VA_ARGS__)

◆ vor_vv_i32mf2

#define vor_vv_i32mf2 ( ... ) __riscv_vor_vv_i32mf2(__VA_ARGS__)

◆ vor_vv_i32mf2_m

#define vor_vv_i32mf2_m ( ... ) __riscv_vor_vv_i32mf2_tumu(__VA_ARGS__)

◆ vor_vv_i64m1

#define vor_vv_i64m1 ( ... ) __riscv_vor_vv_i64m1(__VA_ARGS__)

◆ vor_vv_i64m1_m

#define vor_vv_i64m1_m ( ... ) __riscv_vor_vv_i64m1_tumu(__VA_ARGS__)

◆ vor_vv_i64m2

#define vor_vv_i64m2 ( ... ) __riscv_vor_vv_i64m2(__VA_ARGS__)

◆ vor_vv_i64m2_m

#define vor_vv_i64m2_m ( ... ) __riscv_vor_vv_i64m2_tumu(__VA_ARGS__)

◆ vor_vv_i64m4

#define vor_vv_i64m4 ( ... ) __riscv_vor_vv_i64m4(__VA_ARGS__)

◆ vor_vv_i64m4_m

#define vor_vv_i64m4_m ( ... ) __riscv_vor_vv_i64m4_tumu(__VA_ARGS__)

◆ vor_vv_i64m8

#define vor_vv_i64m8 ( ... ) __riscv_vor_vv_i64m8(__VA_ARGS__)

◆ vor_vv_i64m8_m

#define vor_vv_i64m8_m ( ... ) __riscv_vor_vv_i64m8_tumu(__VA_ARGS__)

◆ vor_vv_i8m1

#define vor_vv_i8m1 ( ... ) __riscv_vor_vv_i8m1(__VA_ARGS__)

◆ vor_vv_i8m1_m

#define vor_vv_i8m1_m ( ... ) __riscv_vor_vv_i8m1_tumu(__VA_ARGS__)

◆ vor_vv_i8m2

#define vor_vv_i8m2 ( ... ) __riscv_vor_vv_i8m2(__VA_ARGS__)

◆ vor_vv_i8m2_m

#define vor_vv_i8m2_m ( ... ) __riscv_vor_vv_i8m2_tumu(__VA_ARGS__)

◆ vor_vv_i8m4

#define vor_vv_i8m4 ( ... ) __riscv_vor_vv_i8m4(__VA_ARGS__)

◆ vor_vv_i8m4_m

#define vor_vv_i8m4_m ( ... ) __riscv_vor_vv_i8m4_tumu(__VA_ARGS__)

◆ vor_vv_i8m8

#define vor_vv_i8m8 ( ... ) __riscv_vor_vv_i8m8(__VA_ARGS__)

◆ vor_vv_i8m8_m

#define vor_vv_i8m8_m ( ... ) __riscv_vor_vv_i8m8_tumu(__VA_ARGS__)

◆ vor_vv_i8mf2

#define vor_vv_i8mf2 ( ... ) __riscv_vor_vv_i8mf2(__VA_ARGS__)

◆ vor_vv_i8mf2_m

#define vor_vv_i8mf2_m ( ... ) __riscv_vor_vv_i8mf2_tumu(__VA_ARGS__)

◆ vor_vv_i8mf4

#define vor_vv_i8mf4 ( ... ) __riscv_vor_vv_i8mf4(__VA_ARGS__)

◆ vor_vv_i8mf4_m

#define vor_vv_i8mf4_m ( ... ) __riscv_vor_vv_i8mf4_tumu(__VA_ARGS__)

◆ vor_vv_i8mf8

#define vor_vv_i8mf8 ( ... ) __riscv_vor_vv_i8mf8(__VA_ARGS__)

◆ vor_vv_i8mf8_m

#define vor_vv_i8mf8_m ( ... ) __riscv_vor_vv_i8mf8_tumu(__VA_ARGS__)

◆ vor_vv_u16m1

#define vor_vv_u16m1 ( ... ) __riscv_vor_vv_u16m1(__VA_ARGS__)

◆ vor_vv_u16m1_m

#define vor_vv_u16m1_m ( ... ) __riscv_vor_vv_u16m1_tumu(__VA_ARGS__)

◆ vor_vv_u16m2

#define vor_vv_u16m2 ( ... ) __riscv_vor_vv_u16m2(__VA_ARGS__)

◆ vor_vv_u16m2_m

#define vor_vv_u16m2_m ( ... ) __riscv_vor_vv_u16m2_tumu(__VA_ARGS__)

◆ vor_vv_u16m4

#define vor_vv_u16m4 ( ... ) __riscv_vor_vv_u16m4(__VA_ARGS__)

◆ vor_vv_u16m4_m

#define vor_vv_u16m4_m ( ... ) __riscv_vor_vv_u16m4_tumu(__VA_ARGS__)

◆ vor_vv_u16m8

#define vor_vv_u16m8 ( ... ) __riscv_vor_vv_u16m8(__VA_ARGS__)

◆ vor_vv_u16m8_m

#define vor_vv_u16m8_m ( ... ) __riscv_vor_vv_u16m8_tumu(__VA_ARGS__)

◆ vor_vv_u16mf2

#define vor_vv_u16mf2 ( ... ) __riscv_vor_vv_u16mf2(__VA_ARGS__)

◆ vor_vv_u16mf2_m

#define vor_vv_u16mf2_m ( ... ) __riscv_vor_vv_u16mf2_tumu(__VA_ARGS__)

◆ vor_vv_u16mf4

#define vor_vv_u16mf4 ( ... ) __riscv_vor_vv_u16mf4(__VA_ARGS__)

◆ vor_vv_u16mf4_m

#define vor_vv_u16mf4_m ( ... ) __riscv_vor_vv_u16mf4_tumu(__VA_ARGS__)

◆ vor_vv_u32m1

#define vor_vv_u32m1 ( ... ) __riscv_vor_vv_u32m1(__VA_ARGS__)

◆ vor_vv_u32m1_m

#define vor_vv_u32m1_m ( ... ) __riscv_vor_vv_u32m1_tumu(__VA_ARGS__)

◆ vor_vv_u32m2

#define vor_vv_u32m2 ( ... ) __riscv_vor_vv_u32m2(__VA_ARGS__)

◆ vor_vv_u32m2_m

#define vor_vv_u32m2_m ( ... ) __riscv_vor_vv_u32m2_tumu(__VA_ARGS__)

◆ vor_vv_u32m4

#define vor_vv_u32m4 ( ... ) __riscv_vor_vv_u32m4(__VA_ARGS__)

◆ vor_vv_u32m4_m

#define vor_vv_u32m4_m ( ... ) __riscv_vor_vv_u32m4_tumu(__VA_ARGS__)

◆ vor_vv_u32m8

#define vor_vv_u32m8 ( ... ) __riscv_vor_vv_u32m8(__VA_ARGS__)

◆ vor_vv_u32m8_m

#define vor_vv_u32m8_m ( ... ) __riscv_vor_vv_u32m8_tumu(__VA_ARGS__)

◆ vor_vv_u32mf2

#define vor_vv_u32mf2 ( ... ) __riscv_vor_vv_u32mf2(__VA_ARGS__)

◆ vor_vv_u32mf2_m

#define vor_vv_u32mf2_m ( ... ) __riscv_vor_vv_u32mf2_tumu(__VA_ARGS__)

◆ vor_vv_u64m1

#define vor_vv_u64m1 ( ... ) __riscv_vor_vv_u64m1(__VA_ARGS__)

◆ vor_vv_u64m1_m

#define vor_vv_u64m1_m ( ... ) __riscv_vor_vv_u64m1_tumu(__VA_ARGS__)

◆ vor_vv_u64m2

#define vor_vv_u64m2 ( ... ) __riscv_vor_vv_u64m2(__VA_ARGS__)

◆ vor_vv_u64m2_m

#define vor_vv_u64m2_m ( ... ) __riscv_vor_vv_u64m2_tumu(__VA_ARGS__)

◆ vor_vv_u64m4

#define vor_vv_u64m4 ( ... ) __riscv_vor_vv_u64m4(__VA_ARGS__)

◆ vor_vv_u64m4_m

#define vor_vv_u64m4_m ( ... ) __riscv_vor_vv_u64m4_tumu(__VA_ARGS__)

◆ vor_vv_u64m8

#define vor_vv_u64m8 ( ... ) __riscv_vor_vv_u64m8(__VA_ARGS__)

◆ vor_vv_u64m8_m

#define vor_vv_u64m8_m ( ... ) __riscv_vor_vv_u64m8_tumu(__VA_ARGS__)

◆ vor_vv_u8m1

#define vor_vv_u8m1 ( ... ) __riscv_vor_vv_u8m1(__VA_ARGS__)

◆ vor_vv_u8m1_m

#define vor_vv_u8m1_m ( ... ) __riscv_vor_vv_u8m1_tumu(__VA_ARGS__)

◆ vor_vv_u8m2

#define vor_vv_u8m2 ( ... ) __riscv_vor_vv_u8m2(__VA_ARGS__)

◆ vor_vv_u8m2_m

#define vor_vv_u8m2_m ( ... ) __riscv_vor_vv_u8m2_tumu(__VA_ARGS__)

◆ vor_vv_u8m4

#define vor_vv_u8m4 ( ... ) __riscv_vor_vv_u8m4(__VA_ARGS__)

◆ vor_vv_u8m4_m

#define vor_vv_u8m4_m ( ... ) __riscv_vor_vv_u8m4_tumu(__VA_ARGS__)

◆ vor_vv_u8m8

#define vor_vv_u8m8 ( ... ) __riscv_vor_vv_u8m8(__VA_ARGS__)

◆ vor_vv_u8m8_m

#define vor_vv_u8m8_m ( ... ) __riscv_vor_vv_u8m8_tumu(__VA_ARGS__)

◆ vor_vv_u8mf2

#define vor_vv_u8mf2 ( ... ) __riscv_vor_vv_u8mf2(__VA_ARGS__)

◆ vor_vv_u8mf2_m

#define vor_vv_u8mf2_m ( ... ) __riscv_vor_vv_u8mf2_tumu(__VA_ARGS__)

◆ vor_vv_u8mf4

#define vor_vv_u8mf4 ( ... ) __riscv_vor_vv_u8mf4(__VA_ARGS__)

◆ vor_vv_u8mf4_m

#define vor_vv_u8mf4_m ( ... ) __riscv_vor_vv_u8mf4_tumu(__VA_ARGS__)

◆ vor_vv_u8mf8

#define vor_vv_u8mf8 ( ... ) __riscv_vor_vv_u8mf8(__VA_ARGS__)

◆ vor_vv_u8mf8_m

#define vor_vv_u8mf8_m ( ... ) __riscv_vor_vv_u8mf8_tumu(__VA_ARGS__)

◆ vor_vx_i16m1

#define vor_vx_i16m1 ( ... ) __riscv_vor_vx_i16m1(__VA_ARGS__)

◆ vor_vx_i16m1_m

#define vor_vx_i16m1_m ( ... ) __riscv_vor_vx_i16m1_tumu(__VA_ARGS__)

◆ vor_vx_i16m2

#define vor_vx_i16m2 ( ... ) __riscv_vor_vx_i16m2(__VA_ARGS__)

◆ vor_vx_i16m2_m

#define vor_vx_i16m2_m ( ... ) __riscv_vor_vx_i16m2_tumu(__VA_ARGS__)

◆ vor_vx_i16m4

#define vor_vx_i16m4 ( ... ) __riscv_vor_vx_i16m4(__VA_ARGS__)

◆ vor_vx_i16m4_m

#define vor_vx_i16m4_m ( ... ) __riscv_vor_vx_i16m4_tumu(__VA_ARGS__)

◆ vor_vx_i16m8

#define vor_vx_i16m8 ( ... ) __riscv_vor_vx_i16m8(__VA_ARGS__)

◆ vor_vx_i16m8_m

#define vor_vx_i16m8_m ( ... ) __riscv_vor_vx_i16m8_tumu(__VA_ARGS__)

◆ vor_vx_i16mf2

#define vor_vx_i16mf2 ( ... ) __riscv_vor_vx_i16mf2(__VA_ARGS__)

◆ vor_vx_i16mf2_m

#define vor_vx_i16mf2_m ( ... ) __riscv_vor_vx_i16mf2_tumu(__VA_ARGS__)

◆ vor_vx_i16mf4

#define vor_vx_i16mf4 ( ... ) __riscv_vor_vx_i16mf4(__VA_ARGS__)

◆ vor_vx_i16mf4_m

#define vor_vx_i16mf4_m ( ... ) __riscv_vor_vx_i16mf4_tumu(__VA_ARGS__)

◆ vor_vx_i32m1

#define vor_vx_i32m1 ( ... ) __riscv_vor_vx_i32m1(__VA_ARGS__)

◆ vor_vx_i32m1_m

#define vor_vx_i32m1_m ( ... ) __riscv_vor_vx_i32m1_tumu(__VA_ARGS__)

◆ vor_vx_i32m2

#define vor_vx_i32m2 ( ... ) __riscv_vor_vx_i32m2(__VA_ARGS__)

◆ vor_vx_i32m2_m

#define vor_vx_i32m2_m ( ... ) __riscv_vor_vx_i32m2_tumu(__VA_ARGS__)

◆ vor_vx_i32m4

#define vor_vx_i32m4 ( ... ) __riscv_vor_vx_i32m4(__VA_ARGS__)

◆ vor_vx_i32m4_m

#define vor_vx_i32m4_m ( ... ) __riscv_vor_vx_i32m4_tumu(__VA_ARGS__)

◆ vor_vx_i32m8

#define vor_vx_i32m8 ( ... ) __riscv_vor_vx_i32m8(__VA_ARGS__)

◆ vor_vx_i32m8_m

#define vor_vx_i32m8_m ( ... ) __riscv_vor_vx_i32m8_tumu(__VA_ARGS__)

◆ vor_vx_i32mf2

#define vor_vx_i32mf2 ( ... ) __riscv_vor_vx_i32mf2(__VA_ARGS__)

◆ vor_vx_i32mf2_m

#define vor_vx_i32mf2_m ( ... ) __riscv_vor_vx_i32mf2_tumu(__VA_ARGS__)

◆ vor_vx_i64m1

#define vor_vx_i64m1 ( ... ) __riscv_vor_vx_i64m1(__VA_ARGS__)

◆ vor_vx_i64m1_m

#define vor_vx_i64m1_m ( ... ) __riscv_vor_vx_i64m1_tumu(__VA_ARGS__)

◆ vor_vx_i64m2

#define vor_vx_i64m2 ( ... ) __riscv_vor_vx_i64m2(__VA_ARGS__)

◆ vor_vx_i64m2_m

#define vor_vx_i64m2_m ( ... ) __riscv_vor_vx_i64m2_tumu(__VA_ARGS__)

◆ vor_vx_i64m4

#define vor_vx_i64m4 ( ... ) __riscv_vor_vx_i64m4(__VA_ARGS__)

◆ vor_vx_i64m4_m

#define vor_vx_i64m4_m ( ... ) __riscv_vor_vx_i64m4_tumu(__VA_ARGS__)

◆ vor_vx_i64m8

#define vor_vx_i64m8 ( ... ) __riscv_vor_vx_i64m8(__VA_ARGS__)

◆ vor_vx_i64m8_m

#define vor_vx_i64m8_m ( ... ) __riscv_vor_vx_i64m8_tumu(__VA_ARGS__)

◆ vor_vx_i8m1

#define vor_vx_i8m1 ( ... ) __riscv_vor_vx_i8m1(__VA_ARGS__)

◆ vor_vx_i8m1_m

#define vor_vx_i8m1_m ( ... ) __riscv_vor_vx_i8m1_tumu(__VA_ARGS__)

◆ vor_vx_i8m2

#define vor_vx_i8m2 ( ... ) __riscv_vor_vx_i8m2(__VA_ARGS__)

◆ vor_vx_i8m2_m

#define vor_vx_i8m2_m ( ... ) __riscv_vor_vx_i8m2_tumu(__VA_ARGS__)

◆ vor_vx_i8m4

#define vor_vx_i8m4 ( ... ) __riscv_vor_vx_i8m4(__VA_ARGS__)

◆ vor_vx_i8m4_m

#define vor_vx_i8m4_m ( ... ) __riscv_vor_vx_i8m4_tumu(__VA_ARGS__)

◆ vor_vx_i8m8

#define vor_vx_i8m8 ( ... ) __riscv_vor_vx_i8m8(__VA_ARGS__)

◆ vor_vx_i8m8_m

#define vor_vx_i8m8_m ( ... ) __riscv_vor_vx_i8m8_tumu(__VA_ARGS__)

◆ vor_vx_i8mf2

#define vor_vx_i8mf2 ( ... ) __riscv_vor_vx_i8mf2(__VA_ARGS__)

◆ vor_vx_i8mf2_m

#define vor_vx_i8mf2_m ( ... ) __riscv_vor_vx_i8mf2_tumu(__VA_ARGS__)

◆ vor_vx_i8mf4

#define vor_vx_i8mf4 ( ... ) __riscv_vor_vx_i8mf4(__VA_ARGS__)

◆ vor_vx_i8mf4_m

#define vor_vx_i8mf4_m ( ... ) __riscv_vor_vx_i8mf4_tumu(__VA_ARGS__)

◆ vor_vx_i8mf8

#define vor_vx_i8mf8 ( ... ) __riscv_vor_vx_i8mf8(__VA_ARGS__)

◆ vor_vx_i8mf8_m

#define vor_vx_i8mf8_m ( ... ) __riscv_vor_vx_i8mf8_tumu(__VA_ARGS__)

◆ vor_vx_u16m1

#define vor_vx_u16m1 ( ... ) __riscv_vor_vx_u16m1(__VA_ARGS__)

◆ vor_vx_u16m1_m

#define vor_vx_u16m1_m ( ... ) __riscv_vor_vx_u16m1_tumu(__VA_ARGS__)

◆ vor_vx_u16m2

#define vor_vx_u16m2 ( ... ) __riscv_vor_vx_u16m2(__VA_ARGS__)

◆ vor_vx_u16m2_m

#define vor_vx_u16m2_m ( ... ) __riscv_vor_vx_u16m2_tumu(__VA_ARGS__)

◆ vor_vx_u16m4

#define vor_vx_u16m4 ( ... ) __riscv_vor_vx_u16m4(__VA_ARGS__)

◆ vor_vx_u16m4_m

#define vor_vx_u16m4_m ( ... ) __riscv_vor_vx_u16m4_tumu(__VA_ARGS__)

◆ vor_vx_u16m8

#define vor_vx_u16m8 ( ... ) __riscv_vor_vx_u16m8(__VA_ARGS__)

◆ vor_vx_u16m8_m

#define vor_vx_u16m8_m ( ... ) __riscv_vor_vx_u16m8_tumu(__VA_ARGS__)

◆ vor_vx_u16mf2

#define vor_vx_u16mf2 ( ... ) __riscv_vor_vx_u16mf2(__VA_ARGS__)

◆ vor_vx_u16mf2_m

#define vor_vx_u16mf2_m ( ... ) __riscv_vor_vx_u16mf2_tumu(__VA_ARGS__)

◆ vor_vx_u16mf4

#define vor_vx_u16mf4 ( ... ) __riscv_vor_vx_u16mf4(__VA_ARGS__)

◆ vor_vx_u16mf4_m

#define vor_vx_u16mf4_m ( ... ) __riscv_vor_vx_u16mf4_tumu(__VA_ARGS__)

◆ vor_vx_u32m1

#define vor_vx_u32m1 ( ... ) __riscv_vor_vx_u32m1(__VA_ARGS__)

◆ vor_vx_u32m1_m

#define vor_vx_u32m1_m ( ... ) __riscv_vor_vx_u32m1_tumu(__VA_ARGS__)

◆ vor_vx_u32m2

#define vor_vx_u32m2 ( ... ) __riscv_vor_vx_u32m2(__VA_ARGS__)

◆ vor_vx_u32m2_m

#define vor_vx_u32m2_m ( ... ) __riscv_vor_vx_u32m2_tumu(__VA_ARGS__)

◆ vor_vx_u32m4

#define vor_vx_u32m4 ( ... ) __riscv_vor_vx_u32m4(__VA_ARGS__)

◆ vor_vx_u32m4_m

#define vor_vx_u32m4_m ( ... ) __riscv_vor_vx_u32m4_tumu(__VA_ARGS__)

◆ vor_vx_u32m8

#define vor_vx_u32m8 ( ... ) __riscv_vor_vx_u32m8(__VA_ARGS__)

◆ vor_vx_u32m8_m

#define vor_vx_u32m8_m ( ... ) __riscv_vor_vx_u32m8_tumu(__VA_ARGS__)

◆ vor_vx_u32mf2

#define vor_vx_u32mf2 ( ... ) __riscv_vor_vx_u32mf2(__VA_ARGS__)

◆ vor_vx_u32mf2_m

#define vor_vx_u32mf2_m ( ... ) __riscv_vor_vx_u32mf2_tumu(__VA_ARGS__)

◆ vor_vx_u64m1

#define vor_vx_u64m1 ( ... ) __riscv_vor_vx_u64m1(__VA_ARGS__)

◆ vor_vx_u64m1_m

#define vor_vx_u64m1_m ( ... ) __riscv_vor_vx_u64m1_tumu(__VA_ARGS__)

◆ vor_vx_u64m2

#define vor_vx_u64m2 ( ... ) __riscv_vor_vx_u64m2(__VA_ARGS__)

◆ vor_vx_u64m2_m

#define vor_vx_u64m2_m ( ... ) __riscv_vor_vx_u64m2_tumu(__VA_ARGS__)

◆ vor_vx_u64m4

#define vor_vx_u64m4 ( ... ) __riscv_vor_vx_u64m4(__VA_ARGS__)

◆ vor_vx_u64m4_m

#define vor_vx_u64m4_m ( ... ) __riscv_vor_vx_u64m4_tumu(__VA_ARGS__)

◆ vor_vx_u64m8

#define vor_vx_u64m8 ( ... ) __riscv_vor_vx_u64m8(__VA_ARGS__)

◆ vor_vx_u64m8_m

#define vor_vx_u64m8_m ( ... ) __riscv_vor_vx_u64m8_tumu(__VA_ARGS__)

◆ vor_vx_u8m1

#define vor_vx_u8m1 ( ... ) __riscv_vor_vx_u8m1(__VA_ARGS__)

◆ vor_vx_u8m1_m

#define vor_vx_u8m1_m ( ... ) __riscv_vor_vx_u8m1_tumu(__VA_ARGS__)

◆ vor_vx_u8m2

#define vor_vx_u8m2 ( ... ) __riscv_vor_vx_u8m2(__VA_ARGS__)

◆ vor_vx_u8m2_m

#define vor_vx_u8m2_m ( ... ) __riscv_vor_vx_u8m2_tumu(__VA_ARGS__)

◆ vor_vx_u8m4

#define vor_vx_u8m4 ( ... ) __riscv_vor_vx_u8m4(__VA_ARGS__)

◆ vor_vx_u8m4_m

#define vor_vx_u8m4_m ( ... ) __riscv_vor_vx_u8m4_tumu(__VA_ARGS__)

◆ vor_vx_u8m8

#define vor_vx_u8m8 ( ... ) __riscv_vor_vx_u8m8(__VA_ARGS__)

◆ vor_vx_u8m8_m

#define vor_vx_u8m8_m ( ... ) __riscv_vor_vx_u8m8_tumu(__VA_ARGS__)

◆ vor_vx_u8mf2

#define vor_vx_u8mf2 ( ... ) __riscv_vor_vx_u8mf2(__VA_ARGS__)

◆ vor_vx_u8mf2_m

#define vor_vx_u8mf2_m ( ... ) __riscv_vor_vx_u8mf2_tumu(__VA_ARGS__)

◆ vor_vx_u8mf4

#define vor_vx_u8mf4 ( ... ) __riscv_vor_vx_u8mf4(__VA_ARGS__)

◆ vor_vx_u8mf4_m

#define vor_vx_u8mf4_m ( ... ) __riscv_vor_vx_u8mf4_tumu(__VA_ARGS__)

◆ vor_vx_u8mf8

#define vor_vx_u8mf8 ( ... ) __riscv_vor_vx_u8mf8(__VA_ARGS__)

◆ vor_vx_u8mf8_m

#define vor_vx_u8mf8_m ( ... ) __riscv_vor_vx_u8mf8_tumu(__VA_ARGS__)

◆ vredand_vs_i16m1_i16m1

#define vredand_vs_i16m1_i16m1 ( ... ) __riscv_vredand_vs_i16m1_i16m1_tu(__VA_ARGS__)

◆ vredand_vs_i16m1_i16m1_m

#define vredand_vs_i16m1_i16m1_m ( ... ) __riscv_vredand_vs_i16m1_i16m1_tum(__VA_ARGS__)

◆ vredand_vs_i16m2_i16m1

#define vredand_vs_i16m2_i16m1 ( ... ) __riscv_vredand_vs_i16m2_i16m1_tu(__VA_ARGS__)

◆ vredand_vs_i16m2_i16m1_m

#define vredand_vs_i16m2_i16m1_m ( ... ) __riscv_vredand_vs_i16m2_i16m1_tum(__VA_ARGS__)

◆ vredand_vs_i16m4_i16m1

#define vredand_vs_i16m4_i16m1 ( ... ) __riscv_vredand_vs_i16m4_i16m1_tu(__VA_ARGS__)

◆ vredand_vs_i16m4_i16m1_m

#define vredand_vs_i16m4_i16m1_m ( ... ) __riscv_vredand_vs_i16m4_i16m1_tum(__VA_ARGS__)

◆ vredand_vs_i16m8_i16m1

#define vredand_vs_i16m8_i16m1 ( ... ) __riscv_vredand_vs_i16m8_i16m1_tu(__VA_ARGS__)

◆ vredand_vs_i16m8_i16m1_m

#define vredand_vs_i16m8_i16m1_m ( ... ) __riscv_vredand_vs_i16m8_i16m1_tum(__VA_ARGS__)

◆ vredand_vs_i16mf2_i16m1

#define vredand_vs_i16mf2_i16m1 ( ... ) __riscv_vredand_vs_i16mf2_i16m1_tu(__VA_ARGS__)

◆ vredand_vs_i16mf2_i16m1_m

#define vredand_vs_i16mf2_i16m1_m ( ... ) __riscv_vredand_vs_i16mf2_i16m1_tum(__VA_ARGS__)

◆ vredand_vs_i16mf4_i16m1

#define vredand_vs_i16mf4_i16m1 ( ... ) __riscv_vredand_vs_i16mf4_i16m1_tu(__VA_ARGS__)

◆ vredand_vs_i16mf4_i16m1_m

#define vredand_vs_i16mf4_i16m1_m ( ... ) __riscv_vredand_vs_i16mf4_i16m1_tum(__VA_ARGS__)

◆ vredand_vs_i32m1_i32m1

#define vredand_vs_i32m1_i32m1 ( ... ) __riscv_vredand_vs_i32m1_i32m1_tu(__VA_ARGS__)

◆ vredand_vs_i32m1_i32m1_m

#define vredand_vs_i32m1_i32m1_m ( ... ) __riscv_vredand_vs_i32m1_i32m1_tum(__VA_ARGS__)

◆ vredand_vs_i32m2_i32m1

#define vredand_vs_i32m2_i32m1 ( ... ) __riscv_vredand_vs_i32m2_i32m1_tu(__VA_ARGS__)

◆ vredand_vs_i32m2_i32m1_m

#define vredand_vs_i32m2_i32m1_m ( ... ) __riscv_vredand_vs_i32m2_i32m1_tum(__VA_ARGS__)

◆ vredand_vs_i32m4_i32m1

#define vredand_vs_i32m4_i32m1 ( ... ) __riscv_vredand_vs_i32m4_i32m1_tu(__VA_ARGS__)

◆ vredand_vs_i32m4_i32m1_m

#define vredand_vs_i32m4_i32m1_m ( ... ) __riscv_vredand_vs_i32m4_i32m1_tum(__VA_ARGS__)

◆ vredand_vs_i32m8_i32m1

#define vredand_vs_i32m8_i32m1 ( ... ) __riscv_vredand_vs_i32m8_i32m1_tu(__VA_ARGS__)

◆ vredand_vs_i32m8_i32m1_m

#define vredand_vs_i32m8_i32m1_m ( ... ) __riscv_vredand_vs_i32m8_i32m1_tum(__VA_ARGS__)

◆ vredand_vs_i32mf2_i32m1

#define vredand_vs_i32mf2_i32m1 ( ... ) __riscv_vredand_vs_i32mf2_i32m1_tu(__VA_ARGS__)

◆ vredand_vs_i32mf2_i32m1_m

#define vredand_vs_i32mf2_i32m1_m ( ... ) __riscv_vredand_vs_i32mf2_i32m1_tum(__VA_ARGS__)

◆ vredand_vs_i64m1_i64m1

#define vredand_vs_i64m1_i64m1 ( ... ) __riscv_vredand_vs_i64m1_i64m1_tu(__VA_ARGS__)

◆ vredand_vs_i64m1_i64m1_m

#define vredand_vs_i64m1_i64m1_m ( ... ) __riscv_vredand_vs_i64m1_i64m1_tum(__VA_ARGS__)

◆ vredand_vs_i64m2_i64m1

#define vredand_vs_i64m2_i64m1 ( ... ) __riscv_vredand_vs_i64m2_i64m1_tu(__VA_ARGS__)

◆ vredand_vs_i64m2_i64m1_m

#define vredand_vs_i64m2_i64m1_m ( ... ) __riscv_vredand_vs_i64m2_i64m1_tum(__VA_ARGS__)

◆ vredand_vs_i64m4_i64m1

#define vredand_vs_i64m4_i64m1 ( ... ) __riscv_vredand_vs_i64m4_i64m1_tu(__VA_ARGS__)

◆ vredand_vs_i64m4_i64m1_m

#define vredand_vs_i64m4_i64m1_m ( ... ) __riscv_vredand_vs_i64m4_i64m1_tum(__VA_ARGS__)

◆ vredand_vs_i64m8_i64m1

#define vredand_vs_i64m8_i64m1 ( ... ) __riscv_vredand_vs_i64m8_i64m1_tu(__VA_ARGS__)

◆ vredand_vs_i64m8_i64m1_m

#define vredand_vs_i64m8_i64m1_m ( ... ) __riscv_vredand_vs_i64m8_i64m1_tum(__VA_ARGS__)

◆ vredand_vs_i8m1_i8m1

#define vredand_vs_i8m1_i8m1 ( ... ) __riscv_vredand_vs_i8m1_i8m1_tu(__VA_ARGS__)

◆ vredand_vs_i8m1_i8m1_m

#define vredand_vs_i8m1_i8m1_m ( ... ) __riscv_vredand_vs_i8m1_i8m1_tum(__VA_ARGS__)

◆ vredand_vs_i8m2_i8m1

#define vredand_vs_i8m2_i8m1 ( ... ) __riscv_vredand_vs_i8m2_i8m1_tu(__VA_ARGS__)

◆ vredand_vs_i8m2_i8m1_m

#define vredand_vs_i8m2_i8m1_m ( ... ) __riscv_vredand_vs_i8m2_i8m1_tum(__VA_ARGS__)

◆ vredand_vs_i8m4_i8m1

#define vredand_vs_i8m4_i8m1 ( ... ) __riscv_vredand_vs_i8m4_i8m1_tu(__VA_ARGS__)

◆ vredand_vs_i8m4_i8m1_m

#define vredand_vs_i8m4_i8m1_m ( ... ) __riscv_vredand_vs_i8m4_i8m1_tum(__VA_ARGS__)

◆ vredand_vs_i8m8_i8m1

#define vredand_vs_i8m8_i8m1 ( ... ) __riscv_vredand_vs_i8m8_i8m1_tu(__VA_ARGS__)

◆ vredand_vs_i8m8_i8m1_m

#define vredand_vs_i8m8_i8m1_m ( ... ) __riscv_vredand_vs_i8m8_i8m1_tum(__VA_ARGS__)

◆ vredand_vs_i8mf2_i8m1

#define vredand_vs_i8mf2_i8m1 ( ... ) __riscv_vredand_vs_i8mf2_i8m1_tu(__VA_ARGS__)

◆ vredand_vs_i8mf2_i8m1_m

#define vredand_vs_i8mf2_i8m1_m ( ... ) __riscv_vredand_vs_i8mf2_i8m1_tum(__VA_ARGS__)

◆ vredand_vs_i8mf4_i8m1

#define vredand_vs_i8mf4_i8m1 ( ... ) __riscv_vredand_vs_i8mf4_i8m1_tu(__VA_ARGS__)

◆ vredand_vs_i8mf4_i8m1_m

#define vredand_vs_i8mf4_i8m1_m ( ... ) __riscv_vredand_vs_i8mf4_i8m1_tum(__VA_ARGS__)

◆ vredand_vs_i8mf8_i8m1

#define vredand_vs_i8mf8_i8m1 ( ... ) __riscv_vredand_vs_i8mf8_i8m1_tu(__VA_ARGS__)

◆ vredand_vs_i8mf8_i8m1_m

#define vredand_vs_i8mf8_i8m1_m ( ... ) __riscv_vredand_vs_i8mf8_i8m1_tum(__VA_ARGS__)

◆ vredand_vs_u16m1_u16m1

#define vredand_vs_u16m1_u16m1 ( ... ) __riscv_vredand_vs_u16m1_u16m1_tu(__VA_ARGS__)

◆ vredand_vs_u16m1_u16m1_m

#define vredand_vs_u16m1_u16m1_m ( ... ) __riscv_vredand_vs_u16m1_u16m1_tum(__VA_ARGS__)

◆ vredand_vs_u16m2_u16m1

#define vredand_vs_u16m2_u16m1 ( ... ) __riscv_vredand_vs_u16m2_u16m1_tu(__VA_ARGS__)

◆ vredand_vs_u16m2_u16m1_m

#define vredand_vs_u16m2_u16m1_m ( ... ) __riscv_vredand_vs_u16m2_u16m1_tum(__VA_ARGS__)

◆ vredand_vs_u16m4_u16m1

#define vredand_vs_u16m4_u16m1 ( ... ) __riscv_vredand_vs_u16m4_u16m1_tu(__VA_ARGS__)

◆ vredand_vs_u16m4_u16m1_m

#define vredand_vs_u16m4_u16m1_m ( ... ) __riscv_vredand_vs_u16m4_u16m1_tum(__VA_ARGS__)

◆ vredand_vs_u16m8_u16m1

#define vredand_vs_u16m8_u16m1 ( ... ) __riscv_vredand_vs_u16m8_u16m1_tu(__VA_ARGS__)

◆ vredand_vs_u16m8_u16m1_m

#define vredand_vs_u16m8_u16m1_m ( ... ) __riscv_vredand_vs_u16m8_u16m1_tum(__VA_ARGS__)

◆ vredand_vs_u16mf2_u16m1

#define vredand_vs_u16mf2_u16m1 ( ... ) __riscv_vredand_vs_u16mf2_u16m1_tu(__VA_ARGS__)

◆ vredand_vs_u16mf2_u16m1_m

#define vredand_vs_u16mf2_u16m1_m ( ... ) __riscv_vredand_vs_u16mf2_u16m1_tum(__VA_ARGS__)

◆ vredand_vs_u16mf4_u16m1

#define vredand_vs_u16mf4_u16m1 ( ... ) __riscv_vredand_vs_u16mf4_u16m1_tu(__VA_ARGS__)

◆ vredand_vs_u16mf4_u16m1_m

#define vredand_vs_u16mf4_u16m1_m ( ... ) __riscv_vredand_vs_u16mf4_u16m1_tum(__VA_ARGS__)

◆ vredand_vs_u32m1_u32m1

#define vredand_vs_u32m1_u32m1 ( ... ) __riscv_vredand_vs_u32m1_u32m1_tu(__VA_ARGS__)

◆ vredand_vs_u32m1_u32m1_m

#define vredand_vs_u32m1_u32m1_m ( ... ) __riscv_vredand_vs_u32m1_u32m1_tum(__VA_ARGS__)

◆ vredand_vs_u32m2_u32m1

#define vredand_vs_u32m2_u32m1 ( ... ) __riscv_vredand_vs_u32m2_u32m1_tu(__VA_ARGS__)

◆ vredand_vs_u32m2_u32m1_m

#define vredand_vs_u32m2_u32m1_m ( ... ) __riscv_vredand_vs_u32m2_u32m1_tum(__VA_ARGS__)

◆ vredand_vs_u32m4_u32m1

#define vredand_vs_u32m4_u32m1 ( ... ) __riscv_vredand_vs_u32m4_u32m1_tu(__VA_ARGS__)

◆ vredand_vs_u32m4_u32m1_m

#define vredand_vs_u32m4_u32m1_m ( ... ) __riscv_vredand_vs_u32m4_u32m1_tum(__VA_ARGS__)

◆ vredand_vs_u32m8_u32m1

#define vredand_vs_u32m8_u32m1 ( ... ) __riscv_vredand_vs_u32m8_u32m1_tu(__VA_ARGS__)

◆ vredand_vs_u32m8_u32m1_m

#define vredand_vs_u32m8_u32m1_m ( ... ) __riscv_vredand_vs_u32m8_u32m1_tum(__VA_ARGS__)

◆ vredand_vs_u32mf2_u32m1

#define vredand_vs_u32mf2_u32m1 ( ... ) __riscv_vredand_vs_u32mf2_u32m1_tu(__VA_ARGS__)

◆ vredand_vs_u32mf2_u32m1_m

#define vredand_vs_u32mf2_u32m1_m ( ... ) __riscv_vredand_vs_u32mf2_u32m1_tum(__VA_ARGS__)

◆ vredand_vs_u64m1_u64m1

#define vredand_vs_u64m1_u64m1 ( ... ) __riscv_vredand_vs_u64m1_u64m1_tu(__VA_ARGS__)

◆ vredand_vs_u64m1_u64m1_m

#define vredand_vs_u64m1_u64m1_m ( ... ) __riscv_vredand_vs_u64m1_u64m1_tum(__VA_ARGS__)

◆ vredand_vs_u64m2_u64m1

#define vredand_vs_u64m2_u64m1 ( ... ) __riscv_vredand_vs_u64m2_u64m1_tu(__VA_ARGS__)

◆ vredand_vs_u64m2_u64m1_m

#define vredand_vs_u64m2_u64m1_m ( ... ) __riscv_vredand_vs_u64m2_u64m1_tum(__VA_ARGS__)

◆ vredand_vs_u64m4_u64m1

#define vredand_vs_u64m4_u64m1 ( ... ) __riscv_vredand_vs_u64m4_u64m1_tu(__VA_ARGS__)

◆ vredand_vs_u64m4_u64m1_m

#define vredand_vs_u64m4_u64m1_m ( ... ) __riscv_vredand_vs_u64m4_u64m1_tum(__VA_ARGS__)

◆ vredand_vs_u64m8_u64m1

#define vredand_vs_u64m8_u64m1 ( ... ) __riscv_vredand_vs_u64m8_u64m1_tu(__VA_ARGS__)

◆ vredand_vs_u64m8_u64m1_m

#define vredand_vs_u64m8_u64m1_m ( ... ) __riscv_vredand_vs_u64m8_u64m1_tum(__VA_ARGS__)

◆ vredand_vs_u8m1_u8m1

#define vredand_vs_u8m1_u8m1 ( ... ) __riscv_vredand_vs_u8m1_u8m1_tu(__VA_ARGS__)

◆ vredand_vs_u8m1_u8m1_m

#define vredand_vs_u8m1_u8m1_m ( ... ) __riscv_vredand_vs_u8m1_u8m1_tum(__VA_ARGS__)

◆ vredand_vs_u8m2_u8m1

#define vredand_vs_u8m2_u8m1 ( ... ) __riscv_vredand_vs_u8m2_u8m1_tu(__VA_ARGS__)

◆ vredand_vs_u8m2_u8m1_m

#define vredand_vs_u8m2_u8m1_m ( ... ) __riscv_vredand_vs_u8m2_u8m1_tum(__VA_ARGS__)

◆ vredand_vs_u8m4_u8m1

#define vredand_vs_u8m4_u8m1 ( ... ) __riscv_vredand_vs_u8m4_u8m1_tu(__VA_ARGS__)

◆ vredand_vs_u8m4_u8m1_m

#define vredand_vs_u8m4_u8m1_m ( ... ) __riscv_vredand_vs_u8m4_u8m1_tum(__VA_ARGS__)

◆ vredand_vs_u8m8_u8m1

#define vredand_vs_u8m8_u8m1 ( ... ) __riscv_vredand_vs_u8m8_u8m1_tu(__VA_ARGS__)

◆ vredand_vs_u8m8_u8m1_m

#define vredand_vs_u8m8_u8m1_m ( ... ) __riscv_vredand_vs_u8m8_u8m1_tum(__VA_ARGS__)

◆ vredand_vs_u8mf2_u8m1

#define vredand_vs_u8mf2_u8m1 ( ... ) __riscv_vredand_vs_u8mf2_u8m1_tu(__VA_ARGS__)

◆ vredand_vs_u8mf2_u8m1_m

#define vredand_vs_u8mf2_u8m1_m ( ... ) __riscv_vredand_vs_u8mf2_u8m1_tum(__VA_ARGS__)

◆ vredand_vs_u8mf4_u8m1

#define vredand_vs_u8mf4_u8m1 ( ... ) __riscv_vredand_vs_u8mf4_u8m1_tu(__VA_ARGS__)

◆ vredand_vs_u8mf4_u8m1_m

#define vredand_vs_u8mf4_u8m1_m ( ... ) __riscv_vredand_vs_u8mf4_u8m1_tum(__VA_ARGS__)

◆ vredand_vs_u8mf8_u8m1

#define vredand_vs_u8mf8_u8m1 ( ... ) __riscv_vredand_vs_u8mf8_u8m1_tu(__VA_ARGS__)

◆ vredand_vs_u8mf8_u8m1_m

#define vredand_vs_u8mf8_u8m1_m ( ... ) __riscv_vredand_vs_u8mf8_u8m1_tum(__VA_ARGS__)

◆ vredmax_vs_i16m1_i16m1

#define vredmax_vs_i16m1_i16m1 ( ... ) __riscv_vredmax_vs_i16m1_i16m1_tu(__VA_ARGS__)

◆ vredmax_vs_i16m1_i16m1_m

#define vredmax_vs_i16m1_i16m1_m ( ... ) __riscv_vredmax_vs_i16m1_i16m1_tum(__VA_ARGS__)

◆ vredmax_vs_i16m2_i16m1

#define vredmax_vs_i16m2_i16m1 ( ... ) __riscv_vredmax_vs_i16m2_i16m1_tu(__VA_ARGS__)

◆ vredmax_vs_i16m2_i16m1_m

#define vredmax_vs_i16m2_i16m1_m ( ... ) __riscv_vredmax_vs_i16m2_i16m1_tum(__VA_ARGS__)

◆ vredmax_vs_i16m4_i16m1

#define vredmax_vs_i16m4_i16m1 ( ... ) __riscv_vredmax_vs_i16m4_i16m1_tu(__VA_ARGS__)

◆ vredmax_vs_i16m4_i16m1_m

#define vredmax_vs_i16m4_i16m1_m ( ... ) __riscv_vredmax_vs_i16m4_i16m1_tum(__VA_ARGS__)

◆ vredmax_vs_i16m8_i16m1

#define vredmax_vs_i16m8_i16m1 ( ... ) __riscv_vredmax_vs_i16m8_i16m1_tu(__VA_ARGS__)

◆ vredmax_vs_i16m8_i16m1_m

#define vredmax_vs_i16m8_i16m1_m ( ... ) __riscv_vredmax_vs_i16m8_i16m1_tum(__VA_ARGS__)

◆ vredmax_vs_i16mf2_i16m1

#define vredmax_vs_i16mf2_i16m1 ( ... ) __riscv_vredmax_vs_i16mf2_i16m1_tu(__VA_ARGS__)

◆ vredmax_vs_i16mf2_i16m1_m

#define vredmax_vs_i16mf2_i16m1_m ( ... ) __riscv_vredmax_vs_i16mf2_i16m1_tum(__VA_ARGS__)

◆ vredmax_vs_i16mf4_i16m1

#define vredmax_vs_i16mf4_i16m1 ( ... ) __riscv_vredmax_vs_i16mf4_i16m1_tu(__VA_ARGS__)

◆ vredmax_vs_i16mf4_i16m1_m

#define vredmax_vs_i16mf4_i16m1_m ( ... ) __riscv_vredmax_vs_i16mf4_i16m1_tum(__VA_ARGS__)

◆ vredmax_vs_i32m1_i32m1

#define vredmax_vs_i32m1_i32m1 ( ... ) __riscv_vredmax_vs_i32m1_i32m1_tu(__VA_ARGS__)

◆ vredmax_vs_i32m1_i32m1_m

#define vredmax_vs_i32m1_i32m1_m ( ... ) __riscv_vredmax_vs_i32m1_i32m1_tum(__VA_ARGS__)

◆ vredmax_vs_i32m2_i32m1

#define vredmax_vs_i32m2_i32m1 ( ... ) __riscv_vredmax_vs_i32m2_i32m1_tu(__VA_ARGS__)

◆ vredmax_vs_i32m2_i32m1_m

#define vredmax_vs_i32m2_i32m1_m ( ... ) __riscv_vredmax_vs_i32m2_i32m1_tum(__VA_ARGS__)

◆ vredmax_vs_i32m4_i32m1

#define vredmax_vs_i32m4_i32m1 ( ... ) __riscv_vredmax_vs_i32m4_i32m1_tu(__VA_ARGS__)

◆ vredmax_vs_i32m4_i32m1_m

#define vredmax_vs_i32m4_i32m1_m ( ... ) __riscv_vredmax_vs_i32m4_i32m1_tum(__VA_ARGS__)

◆ vredmax_vs_i32m8_i32m1

#define vredmax_vs_i32m8_i32m1 ( ... ) __riscv_vredmax_vs_i32m8_i32m1_tu(__VA_ARGS__)

◆ vredmax_vs_i32m8_i32m1_m

#define vredmax_vs_i32m8_i32m1_m ( ... ) __riscv_vredmax_vs_i32m8_i32m1_tum(__VA_ARGS__)

◆ vredmax_vs_i32mf2_i32m1

#define vredmax_vs_i32mf2_i32m1 ( ... ) __riscv_vredmax_vs_i32mf2_i32m1_tu(__VA_ARGS__)

◆ vredmax_vs_i32mf2_i32m1_m

#define vredmax_vs_i32mf2_i32m1_m ( ... ) __riscv_vredmax_vs_i32mf2_i32m1_tum(__VA_ARGS__)

◆ vredmax_vs_i64m1_i64m1

#define vredmax_vs_i64m1_i64m1 ( ... ) __riscv_vredmax_vs_i64m1_i64m1_tu(__VA_ARGS__)

◆ vredmax_vs_i64m1_i64m1_m

#define vredmax_vs_i64m1_i64m1_m ( ... ) __riscv_vredmax_vs_i64m1_i64m1_tum(__VA_ARGS__)

◆ vredmax_vs_i64m2_i64m1

#define vredmax_vs_i64m2_i64m1 ( ... ) __riscv_vredmax_vs_i64m2_i64m1_tu(__VA_ARGS__)

◆ vredmax_vs_i64m2_i64m1_m

#define vredmax_vs_i64m2_i64m1_m ( ... ) __riscv_vredmax_vs_i64m2_i64m1_tum(__VA_ARGS__)

◆ vredmax_vs_i64m4_i64m1

#define vredmax_vs_i64m4_i64m1 ( ... ) __riscv_vredmax_vs_i64m4_i64m1_tu(__VA_ARGS__)

◆ vredmax_vs_i64m4_i64m1_m

#define vredmax_vs_i64m4_i64m1_m ( ... ) __riscv_vredmax_vs_i64m4_i64m1_tum(__VA_ARGS__)

◆ vredmax_vs_i64m8_i64m1

#define vredmax_vs_i64m8_i64m1 ( ... ) __riscv_vredmax_vs_i64m8_i64m1_tu(__VA_ARGS__)

◆ vredmax_vs_i64m8_i64m1_m

#define vredmax_vs_i64m8_i64m1_m ( ... ) __riscv_vredmax_vs_i64m8_i64m1_tum(__VA_ARGS__)

◆ vredmax_vs_i8m1_i8m1

#define vredmax_vs_i8m1_i8m1 ( ... ) __riscv_vredmax_vs_i8m1_i8m1_tu(__VA_ARGS__)

◆ vredmax_vs_i8m1_i8m1_m

#define vredmax_vs_i8m1_i8m1_m ( ... ) __riscv_vredmax_vs_i8m1_i8m1_tum(__VA_ARGS__)

◆ vredmax_vs_i8m2_i8m1

#define vredmax_vs_i8m2_i8m1 ( ... ) __riscv_vredmax_vs_i8m2_i8m1_tu(__VA_ARGS__)

◆ vredmax_vs_i8m2_i8m1_m

#define vredmax_vs_i8m2_i8m1_m ( ... ) __riscv_vredmax_vs_i8m2_i8m1_tum(__VA_ARGS__)

◆ vredmax_vs_i8m4_i8m1

#define vredmax_vs_i8m4_i8m1 ( ... ) __riscv_vredmax_vs_i8m4_i8m1_tu(__VA_ARGS__)

◆ vredmax_vs_i8m4_i8m1_m

#define vredmax_vs_i8m4_i8m1_m ( ... ) __riscv_vredmax_vs_i8m4_i8m1_tum(__VA_ARGS__)

◆ vredmax_vs_i8m8_i8m1

#define vredmax_vs_i8m8_i8m1 ( ... ) __riscv_vredmax_vs_i8m8_i8m1_tu(__VA_ARGS__)

◆ vredmax_vs_i8m8_i8m1_m

#define vredmax_vs_i8m8_i8m1_m ( ... ) __riscv_vredmax_vs_i8m8_i8m1_tum(__VA_ARGS__)

◆ vredmax_vs_i8mf2_i8m1

#define vredmax_vs_i8mf2_i8m1 ( ... ) __riscv_vredmax_vs_i8mf2_i8m1_tu(__VA_ARGS__)

◆ vredmax_vs_i8mf2_i8m1_m

#define vredmax_vs_i8mf2_i8m1_m ( ... ) __riscv_vredmax_vs_i8mf2_i8m1_tum(__VA_ARGS__)

◆ vredmax_vs_i8mf4_i8m1

#define vredmax_vs_i8mf4_i8m1 ( ... ) __riscv_vredmax_vs_i8mf4_i8m1_tu(__VA_ARGS__)

◆ vredmax_vs_i8mf4_i8m1_m

#define vredmax_vs_i8mf4_i8m1_m ( ... ) __riscv_vredmax_vs_i8mf4_i8m1_tum(__VA_ARGS__)

◆ vredmax_vs_i8mf8_i8m1

#define vredmax_vs_i8mf8_i8m1 ( ... ) __riscv_vredmax_vs_i8mf8_i8m1_tu(__VA_ARGS__)

◆ vredmax_vs_i8mf8_i8m1_m

#define vredmax_vs_i8mf8_i8m1_m ( ... ) __riscv_vredmax_vs_i8mf8_i8m1_tum(__VA_ARGS__)

◆ vredmaxu_vs_u16m1_u16m1

#define vredmaxu_vs_u16m1_u16m1 ( ... ) __riscv_vredmaxu_vs_u16m1_u16m1_tu(__VA_ARGS__)

◆ vredmaxu_vs_u16m1_u16m1_m

#define vredmaxu_vs_u16m1_u16m1_m ( ... ) __riscv_vredmaxu_vs_u16m1_u16m1_tum(__VA_ARGS__)

◆ vredmaxu_vs_u16m2_u16m1

#define vredmaxu_vs_u16m2_u16m1 ( ... ) __riscv_vredmaxu_vs_u16m2_u16m1_tu(__VA_ARGS__)

◆ vredmaxu_vs_u16m2_u16m1_m

#define vredmaxu_vs_u16m2_u16m1_m ( ... ) __riscv_vredmaxu_vs_u16m2_u16m1_tum(__VA_ARGS__)

◆ vredmaxu_vs_u16m4_u16m1

#define vredmaxu_vs_u16m4_u16m1 ( ... ) __riscv_vredmaxu_vs_u16m4_u16m1_tu(__VA_ARGS__)

◆ vredmaxu_vs_u16m4_u16m1_m

#define vredmaxu_vs_u16m4_u16m1_m ( ... ) __riscv_vredmaxu_vs_u16m4_u16m1_tum(__VA_ARGS__)

◆ vredmaxu_vs_u16m8_u16m1

#define vredmaxu_vs_u16m8_u16m1 ( ... ) __riscv_vredmaxu_vs_u16m8_u16m1_tu(__VA_ARGS__)

◆ vredmaxu_vs_u16m8_u16m1_m

#define vredmaxu_vs_u16m8_u16m1_m ( ... ) __riscv_vredmaxu_vs_u16m8_u16m1_tum(__VA_ARGS__)

◆ vredmaxu_vs_u16mf2_u16m1

#define vredmaxu_vs_u16mf2_u16m1 ( ... ) __riscv_vredmaxu_vs_u16mf2_u16m1_tu(__VA_ARGS__)

◆ vredmaxu_vs_u16mf2_u16m1_m

#define vredmaxu_vs_u16mf2_u16m1_m ( ... ) __riscv_vredmaxu_vs_u16mf2_u16m1_tum(__VA_ARGS__)

◆ vredmaxu_vs_u16mf4_u16m1

#define vredmaxu_vs_u16mf4_u16m1 ( ... ) __riscv_vredmaxu_vs_u16mf4_u16m1_tu(__VA_ARGS__)

◆ vredmaxu_vs_u16mf4_u16m1_m

#define vredmaxu_vs_u16mf4_u16m1_m ( ... ) __riscv_vredmaxu_vs_u16mf4_u16m1_tum(__VA_ARGS__)

◆ vredmaxu_vs_u32m1_u32m1

#define vredmaxu_vs_u32m1_u32m1 ( ... ) __riscv_vredmaxu_vs_u32m1_u32m1_tu(__VA_ARGS__)

◆ vredmaxu_vs_u32m1_u32m1_m

#define vredmaxu_vs_u32m1_u32m1_m ( ... ) __riscv_vredmaxu_vs_u32m1_u32m1_tum(__VA_ARGS__)

◆ vredmaxu_vs_u32m2_u32m1

#define vredmaxu_vs_u32m2_u32m1 ( ... ) __riscv_vredmaxu_vs_u32m2_u32m1_tu(__VA_ARGS__)

◆ vredmaxu_vs_u32m2_u32m1_m

#define vredmaxu_vs_u32m2_u32m1_m ( ... ) __riscv_vredmaxu_vs_u32m2_u32m1_tum(__VA_ARGS__)

◆ vredmaxu_vs_u32m4_u32m1

#define vredmaxu_vs_u32m4_u32m1 ( ... ) __riscv_vredmaxu_vs_u32m4_u32m1_tu(__VA_ARGS__)

◆ vredmaxu_vs_u32m4_u32m1_m

#define vredmaxu_vs_u32m4_u32m1_m ( ... ) __riscv_vredmaxu_vs_u32m4_u32m1_tum(__VA_ARGS__)

◆ vredmaxu_vs_u32m8_u32m1

#define vredmaxu_vs_u32m8_u32m1 ( ... ) __riscv_vredmaxu_vs_u32m8_u32m1_tu(__VA_ARGS__)

◆ vredmaxu_vs_u32m8_u32m1_m

#define vredmaxu_vs_u32m8_u32m1_m ( ... ) __riscv_vredmaxu_vs_u32m8_u32m1_tum(__VA_ARGS__)

◆ vredmaxu_vs_u32mf2_u32m1

#define vredmaxu_vs_u32mf2_u32m1 ( ... ) __riscv_vredmaxu_vs_u32mf2_u32m1_tu(__VA_ARGS__)

◆ vredmaxu_vs_u32mf2_u32m1_m

#define vredmaxu_vs_u32mf2_u32m1_m ( ... ) __riscv_vredmaxu_vs_u32mf2_u32m1_tum(__VA_ARGS__)

◆ vredmaxu_vs_u64m1_u64m1

#define vredmaxu_vs_u64m1_u64m1 ( ... ) __riscv_vredmaxu_vs_u64m1_u64m1_tu(__VA_ARGS__)

◆ vredmaxu_vs_u64m1_u64m1_m

#define vredmaxu_vs_u64m1_u64m1_m ( ... ) __riscv_vredmaxu_vs_u64m1_u64m1_tum(__VA_ARGS__)

◆ vredmaxu_vs_u64m2_u64m1

#define vredmaxu_vs_u64m2_u64m1 ( ... ) __riscv_vredmaxu_vs_u64m2_u64m1_tu(__VA_ARGS__)

◆ vredmaxu_vs_u64m2_u64m1_m

#define vredmaxu_vs_u64m2_u64m1_m ( ... ) __riscv_vredmaxu_vs_u64m2_u64m1_tum(__VA_ARGS__)

◆ vredmaxu_vs_u64m4_u64m1

#define vredmaxu_vs_u64m4_u64m1 ( ... ) __riscv_vredmaxu_vs_u64m4_u64m1_tu(__VA_ARGS__)

◆ vredmaxu_vs_u64m4_u64m1_m

#define vredmaxu_vs_u64m4_u64m1_m ( ... ) __riscv_vredmaxu_vs_u64m4_u64m1_tum(__VA_ARGS__)

◆ vredmaxu_vs_u64m8_u64m1

#define vredmaxu_vs_u64m8_u64m1 ( ... ) __riscv_vredmaxu_vs_u64m8_u64m1_tu(__VA_ARGS__)

◆ vredmaxu_vs_u64m8_u64m1_m

#define vredmaxu_vs_u64m8_u64m1_m ( ... ) __riscv_vredmaxu_vs_u64m8_u64m1_tum(__VA_ARGS__)

◆ vredmaxu_vs_u8m1_u8m1

#define vredmaxu_vs_u8m1_u8m1 ( ... ) __riscv_vredmaxu_vs_u8m1_u8m1_tu(__VA_ARGS__)

◆ vredmaxu_vs_u8m1_u8m1_m

#define vredmaxu_vs_u8m1_u8m1_m ( ... ) __riscv_vredmaxu_vs_u8m1_u8m1_tum(__VA_ARGS__)

◆ vredmaxu_vs_u8m2_u8m1

#define vredmaxu_vs_u8m2_u8m1 ( ... ) __riscv_vredmaxu_vs_u8m2_u8m1_tu(__VA_ARGS__)

◆ vredmaxu_vs_u8m2_u8m1_m

#define vredmaxu_vs_u8m2_u8m1_m ( ... ) __riscv_vredmaxu_vs_u8m2_u8m1_tum(__VA_ARGS__)

◆ vredmaxu_vs_u8m4_u8m1

#define vredmaxu_vs_u8m4_u8m1 ( ... ) __riscv_vredmaxu_vs_u8m4_u8m1_tu(__VA_ARGS__)

◆ vredmaxu_vs_u8m4_u8m1_m

#define vredmaxu_vs_u8m4_u8m1_m ( ... ) __riscv_vredmaxu_vs_u8m4_u8m1_tum(__VA_ARGS__)

◆ vredmaxu_vs_u8m8_u8m1

#define vredmaxu_vs_u8m8_u8m1 ( ... ) __riscv_vredmaxu_vs_u8m8_u8m1_tu(__VA_ARGS__)

◆ vredmaxu_vs_u8m8_u8m1_m

#define vredmaxu_vs_u8m8_u8m1_m ( ... ) __riscv_vredmaxu_vs_u8m8_u8m1_tum(__VA_ARGS__)

◆ vredmaxu_vs_u8mf2_u8m1

#define vredmaxu_vs_u8mf2_u8m1 ( ... ) __riscv_vredmaxu_vs_u8mf2_u8m1_tu(__VA_ARGS__)

◆ vredmaxu_vs_u8mf2_u8m1_m

#define vredmaxu_vs_u8mf2_u8m1_m ( ... ) __riscv_vredmaxu_vs_u8mf2_u8m1_tum(__VA_ARGS__)

◆ vredmaxu_vs_u8mf4_u8m1

#define vredmaxu_vs_u8mf4_u8m1 ( ... ) __riscv_vredmaxu_vs_u8mf4_u8m1_tu(__VA_ARGS__)

◆ vredmaxu_vs_u8mf4_u8m1_m

#define vredmaxu_vs_u8mf4_u8m1_m ( ... ) __riscv_vredmaxu_vs_u8mf4_u8m1_tum(__VA_ARGS__)

◆ vredmaxu_vs_u8mf8_u8m1

#define vredmaxu_vs_u8mf8_u8m1 ( ... ) __riscv_vredmaxu_vs_u8mf8_u8m1_tu(__VA_ARGS__)

◆ vredmaxu_vs_u8mf8_u8m1_m

#define vredmaxu_vs_u8mf8_u8m1_m ( ... ) __riscv_vredmaxu_vs_u8mf8_u8m1_tum(__VA_ARGS__)

◆ vredmin_vs_i16m1_i16m1

#define vredmin_vs_i16m1_i16m1 ( ... ) __riscv_vredmin_vs_i16m1_i16m1_tu(__VA_ARGS__)

◆ vredmin_vs_i16m1_i16m1_m

#define vredmin_vs_i16m1_i16m1_m ( ... ) __riscv_vredmin_vs_i16m1_i16m1_tum(__VA_ARGS__)

◆ vredmin_vs_i16m2_i16m1

#define vredmin_vs_i16m2_i16m1 ( ... ) __riscv_vredmin_vs_i16m2_i16m1_tu(__VA_ARGS__)

◆ vredmin_vs_i16m2_i16m1_m

#define vredmin_vs_i16m2_i16m1_m ( ... ) __riscv_vredmin_vs_i16m2_i16m1_tum(__VA_ARGS__)

◆ vredmin_vs_i16m4_i16m1

#define vredmin_vs_i16m4_i16m1 ( ... ) __riscv_vredmin_vs_i16m4_i16m1_tu(__VA_ARGS__)

◆ vredmin_vs_i16m4_i16m1_m

#define vredmin_vs_i16m4_i16m1_m ( ... ) __riscv_vredmin_vs_i16m4_i16m1_tum(__VA_ARGS__)

◆ vredmin_vs_i16m8_i16m1

#define vredmin_vs_i16m8_i16m1 ( ... ) __riscv_vredmin_vs_i16m8_i16m1_tu(__VA_ARGS__)

◆ vredmin_vs_i16m8_i16m1_m

#define vredmin_vs_i16m8_i16m1_m ( ... ) __riscv_vredmin_vs_i16m8_i16m1_tum(__VA_ARGS__)

◆ vredmin_vs_i16mf2_i16m1

#define vredmin_vs_i16mf2_i16m1 ( ... ) __riscv_vredmin_vs_i16mf2_i16m1_tu(__VA_ARGS__)

◆ vredmin_vs_i16mf2_i16m1_m

#define vredmin_vs_i16mf2_i16m1_m ( ... ) __riscv_vredmin_vs_i16mf2_i16m1_tum(__VA_ARGS__)

◆ vredmin_vs_i16mf4_i16m1

#define vredmin_vs_i16mf4_i16m1 ( ... ) __riscv_vredmin_vs_i16mf4_i16m1_tu(__VA_ARGS__)

◆ vredmin_vs_i16mf4_i16m1_m

#define vredmin_vs_i16mf4_i16m1_m ( ... ) __riscv_vredmin_vs_i16mf4_i16m1_tum(__VA_ARGS__)

◆ vredmin_vs_i32m1_i32m1

#define vredmin_vs_i32m1_i32m1 ( ... ) __riscv_vredmin_vs_i32m1_i32m1_tu(__VA_ARGS__)

◆ vredmin_vs_i32m1_i32m1_m

#define vredmin_vs_i32m1_i32m1_m ( ... ) __riscv_vredmin_vs_i32m1_i32m1_tum(__VA_ARGS__)

◆ vredmin_vs_i32m2_i32m1

#define vredmin_vs_i32m2_i32m1 ( ... ) __riscv_vredmin_vs_i32m2_i32m1_tu(__VA_ARGS__)

◆ vredmin_vs_i32m2_i32m1_m

#define vredmin_vs_i32m2_i32m1_m ( ... ) __riscv_vredmin_vs_i32m2_i32m1_tum(__VA_ARGS__)

◆ vredmin_vs_i32m4_i32m1

#define vredmin_vs_i32m4_i32m1 ( ... ) __riscv_vredmin_vs_i32m4_i32m1_tu(__VA_ARGS__)

◆ vredmin_vs_i32m4_i32m1_m

#define vredmin_vs_i32m4_i32m1_m ( ... ) __riscv_vredmin_vs_i32m4_i32m1_tum(__VA_ARGS__)

◆ vredmin_vs_i32m8_i32m1

#define vredmin_vs_i32m8_i32m1 ( ... ) __riscv_vredmin_vs_i32m8_i32m1_tu(__VA_ARGS__)

◆ vredmin_vs_i32m8_i32m1_m

#define vredmin_vs_i32m8_i32m1_m ( ... ) __riscv_vredmin_vs_i32m8_i32m1_tum(__VA_ARGS__)

◆ vredmin_vs_i32mf2_i32m1

#define vredmin_vs_i32mf2_i32m1 ( ... ) __riscv_vredmin_vs_i32mf2_i32m1_tu(__VA_ARGS__)

◆ vredmin_vs_i32mf2_i32m1_m

#define vredmin_vs_i32mf2_i32m1_m ( ... ) __riscv_vredmin_vs_i32mf2_i32m1_tum(__VA_ARGS__)

◆ vredmin_vs_i64m1_i64m1

#define vredmin_vs_i64m1_i64m1 ( ... ) __riscv_vredmin_vs_i64m1_i64m1_tu(__VA_ARGS__)

◆ vredmin_vs_i64m1_i64m1_m

#define vredmin_vs_i64m1_i64m1_m ( ... ) __riscv_vredmin_vs_i64m1_i64m1_tum(__VA_ARGS__)

◆ vredmin_vs_i64m2_i64m1

#define vredmin_vs_i64m2_i64m1 ( ... ) __riscv_vredmin_vs_i64m2_i64m1_tu(__VA_ARGS__)

◆ vredmin_vs_i64m2_i64m1_m

#define vredmin_vs_i64m2_i64m1_m ( ... ) __riscv_vredmin_vs_i64m2_i64m1_tum(__VA_ARGS__)

◆ vredmin_vs_i64m4_i64m1

#define vredmin_vs_i64m4_i64m1 ( ... ) __riscv_vredmin_vs_i64m4_i64m1_tu(__VA_ARGS__)

◆ vredmin_vs_i64m4_i64m1_m

#define vredmin_vs_i64m4_i64m1_m ( ... ) __riscv_vredmin_vs_i64m4_i64m1_tum(__VA_ARGS__)

◆ vredmin_vs_i64m8_i64m1

#define vredmin_vs_i64m8_i64m1 ( ... ) __riscv_vredmin_vs_i64m8_i64m1_tu(__VA_ARGS__)

◆ vredmin_vs_i64m8_i64m1_m

#define vredmin_vs_i64m8_i64m1_m ( ... ) __riscv_vredmin_vs_i64m8_i64m1_tum(__VA_ARGS__)

◆ vredmin_vs_i8m1_i8m1

#define vredmin_vs_i8m1_i8m1 ( ... ) __riscv_vredmin_vs_i8m1_i8m1_tu(__VA_ARGS__)

◆ vredmin_vs_i8m1_i8m1_m

#define vredmin_vs_i8m1_i8m1_m ( ... ) __riscv_vredmin_vs_i8m1_i8m1_tum(__VA_ARGS__)

◆ vredmin_vs_i8m2_i8m1

#define vredmin_vs_i8m2_i8m1 ( ... ) __riscv_vredmin_vs_i8m2_i8m1_tu(__VA_ARGS__)

◆ vredmin_vs_i8m2_i8m1_m

#define vredmin_vs_i8m2_i8m1_m ( ... ) __riscv_vredmin_vs_i8m2_i8m1_tum(__VA_ARGS__)

◆ vredmin_vs_i8m4_i8m1

#define vredmin_vs_i8m4_i8m1 ( ... ) __riscv_vredmin_vs_i8m4_i8m1_tu(__VA_ARGS__)

◆ vredmin_vs_i8m4_i8m1_m

#define vredmin_vs_i8m4_i8m1_m ( ... ) __riscv_vredmin_vs_i8m4_i8m1_tum(__VA_ARGS__)

◆ vredmin_vs_i8m8_i8m1

#define vredmin_vs_i8m8_i8m1 ( ... ) __riscv_vredmin_vs_i8m8_i8m1_tu(__VA_ARGS__)

◆ vredmin_vs_i8m8_i8m1_m

#define vredmin_vs_i8m8_i8m1_m ( ... ) __riscv_vredmin_vs_i8m8_i8m1_tum(__VA_ARGS__)

◆ vredmin_vs_i8mf2_i8m1

#define vredmin_vs_i8mf2_i8m1 ( ... ) __riscv_vredmin_vs_i8mf2_i8m1_tu(__VA_ARGS__)

◆ vredmin_vs_i8mf2_i8m1_m

#define vredmin_vs_i8mf2_i8m1_m ( ... ) __riscv_vredmin_vs_i8mf2_i8m1_tum(__VA_ARGS__)

◆ vredmin_vs_i8mf4_i8m1

#define vredmin_vs_i8mf4_i8m1 ( ... ) __riscv_vredmin_vs_i8mf4_i8m1_tu(__VA_ARGS__)

◆ vredmin_vs_i8mf4_i8m1_m

#define vredmin_vs_i8mf4_i8m1_m ( ... ) __riscv_vredmin_vs_i8mf4_i8m1_tum(__VA_ARGS__)

◆ vredmin_vs_i8mf8_i8m1

#define vredmin_vs_i8mf8_i8m1 ( ... ) __riscv_vredmin_vs_i8mf8_i8m1_tu(__VA_ARGS__)

◆ vredmin_vs_i8mf8_i8m1_m

#define vredmin_vs_i8mf8_i8m1_m ( ... ) __riscv_vredmin_vs_i8mf8_i8m1_tum(__VA_ARGS__)

◆ vredminu_vs_u16m1_u16m1

#define vredminu_vs_u16m1_u16m1 ( ... ) __riscv_vredminu_vs_u16m1_u16m1_tu(__VA_ARGS__)

◆ vredminu_vs_u16m1_u16m1_m

#define vredminu_vs_u16m1_u16m1_m ( ... ) __riscv_vredminu_vs_u16m1_u16m1_tum(__VA_ARGS__)

◆ vredminu_vs_u16m2_u16m1

#define vredminu_vs_u16m2_u16m1 ( ... ) __riscv_vredminu_vs_u16m2_u16m1_tu(__VA_ARGS__)

◆ vredminu_vs_u16m2_u16m1_m

#define vredminu_vs_u16m2_u16m1_m ( ... ) __riscv_vredminu_vs_u16m2_u16m1_tum(__VA_ARGS__)

◆ vredminu_vs_u16m4_u16m1

#define vredminu_vs_u16m4_u16m1 ( ... ) __riscv_vredminu_vs_u16m4_u16m1_tu(__VA_ARGS__)

◆ vredminu_vs_u16m4_u16m1_m

#define vredminu_vs_u16m4_u16m1_m ( ... ) __riscv_vredminu_vs_u16m4_u16m1_tum(__VA_ARGS__)

◆ vredminu_vs_u16m8_u16m1

#define vredminu_vs_u16m8_u16m1 ( ... ) __riscv_vredminu_vs_u16m8_u16m1_tu(__VA_ARGS__)

◆ vredminu_vs_u16m8_u16m1_m

#define vredminu_vs_u16m8_u16m1_m ( ... ) __riscv_vredminu_vs_u16m8_u16m1_tum(__VA_ARGS__)

◆ vredminu_vs_u16mf2_u16m1

#define vredminu_vs_u16mf2_u16m1 ( ... ) __riscv_vredminu_vs_u16mf2_u16m1_tu(__VA_ARGS__)

◆ vredminu_vs_u16mf2_u16m1_m

#define vredminu_vs_u16mf2_u16m1_m ( ... ) __riscv_vredminu_vs_u16mf2_u16m1_tum(__VA_ARGS__)

◆ vredminu_vs_u16mf4_u16m1

#define vredminu_vs_u16mf4_u16m1 ( ... ) __riscv_vredminu_vs_u16mf4_u16m1_tu(__VA_ARGS__)

◆ vredminu_vs_u16mf4_u16m1_m

#define vredminu_vs_u16mf4_u16m1_m ( ... ) __riscv_vredminu_vs_u16mf4_u16m1_tum(__VA_ARGS__)

◆ vredminu_vs_u32m1_u32m1

#define vredminu_vs_u32m1_u32m1 ( ... ) __riscv_vredminu_vs_u32m1_u32m1_tu(__VA_ARGS__)

◆ vredminu_vs_u32m1_u32m1_m

#define vredminu_vs_u32m1_u32m1_m ( ... ) __riscv_vredminu_vs_u32m1_u32m1_tum(__VA_ARGS__)

◆ vredminu_vs_u32m2_u32m1

#define vredminu_vs_u32m2_u32m1 ( ... ) __riscv_vredminu_vs_u32m2_u32m1_tu(__VA_ARGS__)

◆ vredminu_vs_u32m2_u32m1_m

#define vredminu_vs_u32m2_u32m1_m ( ... ) __riscv_vredminu_vs_u32m2_u32m1_tum(__VA_ARGS__)

◆ vredminu_vs_u32m4_u32m1

#define vredminu_vs_u32m4_u32m1 ( ... ) __riscv_vredminu_vs_u32m4_u32m1_tu(__VA_ARGS__)

◆ vredminu_vs_u32m4_u32m1_m

#define vredminu_vs_u32m4_u32m1_m ( ... ) __riscv_vredminu_vs_u32m4_u32m1_tum(__VA_ARGS__)

◆ vredminu_vs_u32m8_u32m1

#define vredminu_vs_u32m8_u32m1 ( ... ) __riscv_vredminu_vs_u32m8_u32m1_tu(__VA_ARGS__)

◆ vredminu_vs_u32m8_u32m1_m

#define vredminu_vs_u32m8_u32m1_m ( ... ) __riscv_vredminu_vs_u32m8_u32m1_tum(__VA_ARGS__)

◆ vredminu_vs_u32mf2_u32m1

#define vredminu_vs_u32mf2_u32m1 ( ... ) __riscv_vredminu_vs_u32mf2_u32m1_tu(__VA_ARGS__)

◆ vredminu_vs_u32mf2_u32m1_m

#define vredminu_vs_u32mf2_u32m1_m ( ... ) __riscv_vredminu_vs_u32mf2_u32m1_tum(__VA_ARGS__)

◆ vredminu_vs_u64m1_u64m1

#define vredminu_vs_u64m1_u64m1 ( ... ) __riscv_vredminu_vs_u64m1_u64m1_tu(__VA_ARGS__)

◆ vredminu_vs_u64m1_u64m1_m

#define vredminu_vs_u64m1_u64m1_m ( ... ) __riscv_vredminu_vs_u64m1_u64m1_tum(__VA_ARGS__)

◆ vredminu_vs_u64m2_u64m1

#define vredminu_vs_u64m2_u64m1 ( ... ) __riscv_vredminu_vs_u64m2_u64m1_tu(__VA_ARGS__)

◆ vredminu_vs_u64m2_u64m1_m

#define vredminu_vs_u64m2_u64m1_m ( ... ) __riscv_vredminu_vs_u64m2_u64m1_tum(__VA_ARGS__)

◆ vredminu_vs_u64m4_u64m1

#define vredminu_vs_u64m4_u64m1 ( ... ) __riscv_vredminu_vs_u64m4_u64m1_tu(__VA_ARGS__)

◆ vredminu_vs_u64m4_u64m1_m

#define vredminu_vs_u64m4_u64m1_m ( ... ) __riscv_vredminu_vs_u64m4_u64m1_tum(__VA_ARGS__)

◆ vredminu_vs_u64m8_u64m1

#define vredminu_vs_u64m8_u64m1 ( ... ) __riscv_vredminu_vs_u64m8_u64m1_tu(__VA_ARGS__)

◆ vredminu_vs_u64m8_u64m1_m

#define vredminu_vs_u64m8_u64m1_m ( ... ) __riscv_vredminu_vs_u64m8_u64m1_tum(__VA_ARGS__)

◆ vredminu_vs_u8m1_u8m1

#define vredminu_vs_u8m1_u8m1 ( ... ) __riscv_vredminu_vs_u8m1_u8m1_tu(__VA_ARGS__)

◆ vredminu_vs_u8m1_u8m1_m

#define vredminu_vs_u8m1_u8m1_m ( ... ) __riscv_vredminu_vs_u8m1_u8m1_tum(__VA_ARGS__)

◆ vredminu_vs_u8m2_u8m1

#define vredminu_vs_u8m2_u8m1 ( ... ) __riscv_vredminu_vs_u8m2_u8m1_tu(__VA_ARGS__)

◆ vredminu_vs_u8m2_u8m1_m

#define vredminu_vs_u8m2_u8m1_m ( ... ) __riscv_vredminu_vs_u8m2_u8m1_tum(__VA_ARGS__)

◆ vredminu_vs_u8m4_u8m1

#define vredminu_vs_u8m4_u8m1 ( ... ) __riscv_vredminu_vs_u8m4_u8m1_tu(__VA_ARGS__)

◆ vredminu_vs_u8m4_u8m1_m

#define vredminu_vs_u8m4_u8m1_m ( ... ) __riscv_vredminu_vs_u8m4_u8m1_tum(__VA_ARGS__)

◆ vredminu_vs_u8m8_u8m1

#define vredminu_vs_u8m8_u8m1 ( ... ) __riscv_vredminu_vs_u8m8_u8m1_tu(__VA_ARGS__)

◆ vredminu_vs_u8m8_u8m1_m

#define vredminu_vs_u8m8_u8m1_m ( ... ) __riscv_vredminu_vs_u8m8_u8m1_tum(__VA_ARGS__)

◆ vredminu_vs_u8mf2_u8m1

#define vredminu_vs_u8mf2_u8m1 ( ... ) __riscv_vredminu_vs_u8mf2_u8m1_tu(__VA_ARGS__)

◆ vredminu_vs_u8mf2_u8m1_m

#define vredminu_vs_u8mf2_u8m1_m ( ... ) __riscv_vredminu_vs_u8mf2_u8m1_tum(__VA_ARGS__)

◆ vredminu_vs_u8mf4_u8m1

#define vredminu_vs_u8mf4_u8m1 ( ... ) __riscv_vredminu_vs_u8mf4_u8m1_tu(__VA_ARGS__)

◆ vredminu_vs_u8mf4_u8m1_m

#define vredminu_vs_u8mf4_u8m1_m ( ... ) __riscv_vredminu_vs_u8mf4_u8m1_tum(__VA_ARGS__)

◆ vredminu_vs_u8mf8_u8m1

#define vredminu_vs_u8mf8_u8m1 ( ... ) __riscv_vredminu_vs_u8mf8_u8m1_tu(__VA_ARGS__)

◆ vredminu_vs_u8mf8_u8m1_m

#define vredminu_vs_u8mf8_u8m1_m ( ... ) __riscv_vredminu_vs_u8mf8_u8m1_tum(__VA_ARGS__)

◆ vredor_vs_i16m1_i16m1

#define vredor_vs_i16m1_i16m1 ( ... ) __riscv_vredor_vs_i16m1_i16m1_tu(__VA_ARGS__)

◆ vredor_vs_i16m1_i16m1_m

#define vredor_vs_i16m1_i16m1_m ( ... ) __riscv_vredor_vs_i16m1_i16m1_tum(__VA_ARGS__)

◆ vredor_vs_i16m2_i16m1

#define vredor_vs_i16m2_i16m1 ( ... ) __riscv_vredor_vs_i16m2_i16m1_tu(__VA_ARGS__)

◆ vredor_vs_i16m2_i16m1_m

#define vredor_vs_i16m2_i16m1_m ( ... ) __riscv_vredor_vs_i16m2_i16m1_tum(__VA_ARGS__)

◆ vredor_vs_i16m4_i16m1

#define vredor_vs_i16m4_i16m1 ( ... ) __riscv_vredor_vs_i16m4_i16m1_tu(__VA_ARGS__)

◆ vredor_vs_i16m4_i16m1_m

#define vredor_vs_i16m4_i16m1_m ( ... ) __riscv_vredor_vs_i16m4_i16m1_tum(__VA_ARGS__)

◆ vredor_vs_i16m8_i16m1

#define vredor_vs_i16m8_i16m1 ( ... ) __riscv_vredor_vs_i16m8_i16m1_tu(__VA_ARGS__)

◆ vredor_vs_i16m8_i16m1_m

#define vredor_vs_i16m8_i16m1_m ( ... ) __riscv_vredor_vs_i16m8_i16m1_tum(__VA_ARGS__)

◆ vredor_vs_i16mf2_i16m1

#define vredor_vs_i16mf2_i16m1 ( ... ) __riscv_vredor_vs_i16mf2_i16m1_tu(__VA_ARGS__)

◆ vredor_vs_i16mf2_i16m1_m

#define vredor_vs_i16mf2_i16m1_m ( ... ) __riscv_vredor_vs_i16mf2_i16m1_tum(__VA_ARGS__)

◆ vredor_vs_i16mf4_i16m1

#define vredor_vs_i16mf4_i16m1 ( ... ) __riscv_vredor_vs_i16mf4_i16m1_tu(__VA_ARGS__)

◆ vredor_vs_i16mf4_i16m1_m

#define vredor_vs_i16mf4_i16m1_m ( ... ) __riscv_vredor_vs_i16mf4_i16m1_tum(__VA_ARGS__)

◆ vredor_vs_i32m1_i32m1

#define vredor_vs_i32m1_i32m1 ( ... ) __riscv_vredor_vs_i32m1_i32m1_tu(__VA_ARGS__)

◆ vredor_vs_i32m1_i32m1_m

#define vredor_vs_i32m1_i32m1_m ( ... ) __riscv_vredor_vs_i32m1_i32m1_tum(__VA_ARGS__)

◆ vredor_vs_i32m2_i32m1

#define vredor_vs_i32m2_i32m1 ( ... ) __riscv_vredor_vs_i32m2_i32m1_tu(__VA_ARGS__)

◆ vredor_vs_i32m2_i32m1_m

#define vredor_vs_i32m2_i32m1_m ( ... ) __riscv_vredor_vs_i32m2_i32m1_tum(__VA_ARGS__)

◆ vredor_vs_i32m4_i32m1

#define vredor_vs_i32m4_i32m1 ( ... ) __riscv_vredor_vs_i32m4_i32m1_tu(__VA_ARGS__)

◆ vredor_vs_i32m4_i32m1_m

#define vredor_vs_i32m4_i32m1_m ( ... ) __riscv_vredor_vs_i32m4_i32m1_tum(__VA_ARGS__)

◆ vredor_vs_i32m8_i32m1

#define vredor_vs_i32m8_i32m1 ( ... ) __riscv_vredor_vs_i32m8_i32m1_tu(__VA_ARGS__)

◆ vredor_vs_i32m8_i32m1_m

#define vredor_vs_i32m8_i32m1_m ( ... ) __riscv_vredor_vs_i32m8_i32m1_tum(__VA_ARGS__)

◆ vredor_vs_i32mf2_i32m1

#define vredor_vs_i32mf2_i32m1 ( ... ) __riscv_vredor_vs_i32mf2_i32m1_tu(__VA_ARGS__)

◆ vredor_vs_i32mf2_i32m1_m

#define vredor_vs_i32mf2_i32m1_m ( ... ) __riscv_vredor_vs_i32mf2_i32m1_tum(__VA_ARGS__)

◆ vredor_vs_i64m1_i64m1

#define vredor_vs_i64m1_i64m1 ( ... ) __riscv_vredor_vs_i64m1_i64m1_tu(__VA_ARGS__)

◆ vredor_vs_i64m1_i64m1_m

#define vredor_vs_i64m1_i64m1_m ( ... ) __riscv_vredor_vs_i64m1_i64m1_tum(__VA_ARGS__)

◆ vredor_vs_i64m2_i64m1

#define vredor_vs_i64m2_i64m1 ( ... ) __riscv_vredor_vs_i64m2_i64m1_tu(__VA_ARGS__)

◆ vredor_vs_i64m2_i64m1_m

#define vredor_vs_i64m2_i64m1_m ( ... ) __riscv_vredor_vs_i64m2_i64m1_tum(__VA_ARGS__)

◆ vredor_vs_i64m4_i64m1

#define vredor_vs_i64m4_i64m1 ( ... ) __riscv_vredor_vs_i64m4_i64m1_tu(__VA_ARGS__)

◆ vredor_vs_i64m4_i64m1_m

#define vredor_vs_i64m4_i64m1_m ( ... ) __riscv_vredor_vs_i64m4_i64m1_tum(__VA_ARGS__)

◆ vredor_vs_i64m8_i64m1

#define vredor_vs_i64m8_i64m1 ( ... ) __riscv_vredor_vs_i64m8_i64m1_tu(__VA_ARGS__)

◆ vredor_vs_i64m8_i64m1_m

#define vredor_vs_i64m8_i64m1_m ( ... ) __riscv_vredor_vs_i64m8_i64m1_tum(__VA_ARGS__)

◆ vredor_vs_i8m1_i8m1

#define vredor_vs_i8m1_i8m1 ( ... ) __riscv_vredor_vs_i8m1_i8m1_tu(__VA_ARGS__)

◆ vredor_vs_i8m1_i8m1_m

#define vredor_vs_i8m1_i8m1_m ( ... ) __riscv_vredor_vs_i8m1_i8m1_tum(__VA_ARGS__)

◆ vredor_vs_i8m2_i8m1

#define vredor_vs_i8m2_i8m1 ( ... ) __riscv_vredor_vs_i8m2_i8m1_tu(__VA_ARGS__)

◆ vredor_vs_i8m2_i8m1_m

#define vredor_vs_i8m2_i8m1_m ( ... ) __riscv_vredor_vs_i8m2_i8m1_tum(__VA_ARGS__)

◆ vredor_vs_i8m4_i8m1

#define vredor_vs_i8m4_i8m1 ( ... ) __riscv_vredor_vs_i8m4_i8m1_tu(__VA_ARGS__)

◆ vredor_vs_i8m4_i8m1_m

#define vredor_vs_i8m4_i8m1_m ( ... ) __riscv_vredor_vs_i8m4_i8m1_tum(__VA_ARGS__)

◆ vredor_vs_i8m8_i8m1

#define vredor_vs_i8m8_i8m1 ( ... ) __riscv_vredor_vs_i8m8_i8m1_tu(__VA_ARGS__)

◆ vredor_vs_i8m8_i8m1_m

#define vredor_vs_i8m8_i8m1_m ( ... ) __riscv_vredor_vs_i8m8_i8m1_tum(__VA_ARGS__)

◆ vredor_vs_i8mf2_i8m1

#define vredor_vs_i8mf2_i8m1 ( ... ) __riscv_vredor_vs_i8mf2_i8m1_tu(__VA_ARGS__)

◆ vredor_vs_i8mf2_i8m1_m

#define vredor_vs_i8mf2_i8m1_m ( ... ) __riscv_vredor_vs_i8mf2_i8m1_tum(__VA_ARGS__)

◆ vredor_vs_i8mf4_i8m1

#define vredor_vs_i8mf4_i8m1 ( ... ) __riscv_vredor_vs_i8mf4_i8m1_tu(__VA_ARGS__)

◆ vredor_vs_i8mf4_i8m1_m

#define vredor_vs_i8mf4_i8m1_m ( ... ) __riscv_vredor_vs_i8mf4_i8m1_tum(__VA_ARGS__)

◆ vredor_vs_i8mf8_i8m1

#define vredor_vs_i8mf8_i8m1 ( ... ) __riscv_vredor_vs_i8mf8_i8m1_tu(__VA_ARGS__)

◆ vredor_vs_i8mf8_i8m1_m

#define vredor_vs_i8mf8_i8m1_m ( ... ) __riscv_vredor_vs_i8mf8_i8m1_tum(__VA_ARGS__)

◆ vredor_vs_u16m1_u16m1

#define vredor_vs_u16m1_u16m1 ( ... ) __riscv_vredor_vs_u16m1_u16m1_tu(__VA_ARGS__)

◆ vredor_vs_u16m1_u16m1_m

#define vredor_vs_u16m1_u16m1_m ( ... ) __riscv_vredor_vs_u16m1_u16m1_tum(__VA_ARGS__)

◆ vredor_vs_u16m2_u16m1

#define vredor_vs_u16m2_u16m1 ( ... ) __riscv_vredor_vs_u16m2_u16m1_tu(__VA_ARGS__)

◆ vredor_vs_u16m2_u16m1_m

#define vredor_vs_u16m2_u16m1_m ( ... ) __riscv_vredor_vs_u16m2_u16m1_tum(__VA_ARGS__)

◆ vredor_vs_u16m4_u16m1

#define vredor_vs_u16m4_u16m1 ( ... ) __riscv_vredor_vs_u16m4_u16m1_tu(__VA_ARGS__)

◆ vredor_vs_u16m4_u16m1_m

#define vredor_vs_u16m4_u16m1_m ( ... ) __riscv_vredor_vs_u16m4_u16m1_tum(__VA_ARGS__)

◆ vredor_vs_u16m8_u16m1

#define vredor_vs_u16m8_u16m1 ( ... ) __riscv_vredor_vs_u16m8_u16m1_tu(__VA_ARGS__)

◆ vredor_vs_u16m8_u16m1_m

#define vredor_vs_u16m8_u16m1_m ( ... ) __riscv_vredor_vs_u16m8_u16m1_tum(__VA_ARGS__)

◆ vredor_vs_u16mf2_u16m1

#define vredor_vs_u16mf2_u16m1 ( ... ) __riscv_vredor_vs_u16mf2_u16m1_tu(__VA_ARGS__)

◆ vredor_vs_u16mf2_u16m1_m

#define vredor_vs_u16mf2_u16m1_m ( ... ) __riscv_vredor_vs_u16mf2_u16m1_tum(__VA_ARGS__)

◆ vredor_vs_u16mf4_u16m1

#define vredor_vs_u16mf4_u16m1 ( ... ) __riscv_vredor_vs_u16mf4_u16m1_tu(__VA_ARGS__)

◆ vredor_vs_u16mf4_u16m1_m

#define vredor_vs_u16mf4_u16m1_m ( ... ) __riscv_vredor_vs_u16mf4_u16m1_tum(__VA_ARGS__)

◆ vredor_vs_u32m1_u32m1

#define vredor_vs_u32m1_u32m1 ( ... ) __riscv_vredor_vs_u32m1_u32m1_tu(__VA_ARGS__)

◆ vredor_vs_u32m1_u32m1_m

#define vredor_vs_u32m1_u32m1_m ( ... ) __riscv_vredor_vs_u32m1_u32m1_tum(__VA_ARGS__)

◆ vredor_vs_u32m2_u32m1

#define vredor_vs_u32m2_u32m1 ( ... ) __riscv_vredor_vs_u32m2_u32m1_tu(__VA_ARGS__)

◆ vredor_vs_u32m2_u32m1_m

#define vredor_vs_u32m2_u32m1_m ( ... ) __riscv_vredor_vs_u32m2_u32m1_tum(__VA_ARGS__)

◆ vredor_vs_u32m4_u32m1

#define vredor_vs_u32m4_u32m1 ( ... ) __riscv_vredor_vs_u32m4_u32m1_tu(__VA_ARGS__)

◆ vredor_vs_u32m4_u32m1_m

#define vredor_vs_u32m4_u32m1_m ( ... ) __riscv_vredor_vs_u32m4_u32m1_tum(__VA_ARGS__)

◆ vredor_vs_u32m8_u32m1

#define vredor_vs_u32m8_u32m1 ( ... ) __riscv_vredor_vs_u32m8_u32m1_tu(__VA_ARGS__)

◆ vredor_vs_u32m8_u32m1_m

#define vredor_vs_u32m8_u32m1_m ( ... ) __riscv_vredor_vs_u32m8_u32m1_tum(__VA_ARGS__)

◆ vredor_vs_u32mf2_u32m1

#define vredor_vs_u32mf2_u32m1 ( ... ) __riscv_vredor_vs_u32mf2_u32m1_tu(__VA_ARGS__)

◆ vredor_vs_u32mf2_u32m1_m

#define vredor_vs_u32mf2_u32m1_m ( ... ) __riscv_vredor_vs_u32mf2_u32m1_tum(__VA_ARGS__)

◆ vredor_vs_u64m1_u64m1

#define vredor_vs_u64m1_u64m1 ( ... ) __riscv_vredor_vs_u64m1_u64m1_tu(__VA_ARGS__)

◆ vredor_vs_u64m1_u64m1_m

#define vredor_vs_u64m1_u64m1_m ( ... ) __riscv_vredor_vs_u64m1_u64m1_tum(__VA_ARGS__)

◆ vredor_vs_u64m2_u64m1

#define vredor_vs_u64m2_u64m1 ( ... ) __riscv_vredor_vs_u64m2_u64m1_tu(__VA_ARGS__)

◆ vredor_vs_u64m2_u64m1_m

#define vredor_vs_u64m2_u64m1_m ( ... ) __riscv_vredor_vs_u64m2_u64m1_tum(__VA_ARGS__)

◆ vredor_vs_u64m4_u64m1

#define vredor_vs_u64m4_u64m1 ( ... ) __riscv_vredor_vs_u64m4_u64m1_tu(__VA_ARGS__)

◆ vredor_vs_u64m4_u64m1_m

#define vredor_vs_u64m4_u64m1_m ( ... ) __riscv_vredor_vs_u64m4_u64m1_tum(__VA_ARGS__)

◆ vredor_vs_u64m8_u64m1

#define vredor_vs_u64m8_u64m1 ( ... ) __riscv_vredor_vs_u64m8_u64m1_tu(__VA_ARGS__)

◆ vredor_vs_u64m8_u64m1_m

#define vredor_vs_u64m8_u64m1_m ( ... ) __riscv_vredor_vs_u64m8_u64m1_tum(__VA_ARGS__)

◆ vredor_vs_u8m1_u8m1

#define vredor_vs_u8m1_u8m1 ( ... ) __riscv_vredor_vs_u8m1_u8m1_tu(__VA_ARGS__)

◆ vredor_vs_u8m1_u8m1_m

#define vredor_vs_u8m1_u8m1_m ( ... ) __riscv_vredor_vs_u8m1_u8m1_tum(__VA_ARGS__)

◆ vredor_vs_u8m2_u8m1

#define vredor_vs_u8m2_u8m1 ( ... ) __riscv_vredor_vs_u8m2_u8m1_tu(__VA_ARGS__)

◆ vredor_vs_u8m2_u8m1_m

#define vredor_vs_u8m2_u8m1_m ( ... ) __riscv_vredor_vs_u8m2_u8m1_tum(__VA_ARGS__)

◆ vredor_vs_u8m4_u8m1

#define vredor_vs_u8m4_u8m1 ( ... ) __riscv_vredor_vs_u8m4_u8m1_tu(__VA_ARGS__)

◆ vredor_vs_u8m4_u8m1_m

#define vredor_vs_u8m4_u8m1_m ( ... ) __riscv_vredor_vs_u8m4_u8m1_tum(__VA_ARGS__)

◆ vredor_vs_u8m8_u8m1

#define vredor_vs_u8m8_u8m1 ( ... ) __riscv_vredor_vs_u8m8_u8m1_tu(__VA_ARGS__)

◆ vredor_vs_u8m8_u8m1_m

#define vredor_vs_u8m8_u8m1_m ( ... ) __riscv_vredor_vs_u8m8_u8m1_tum(__VA_ARGS__)

◆ vredor_vs_u8mf2_u8m1

#define vredor_vs_u8mf2_u8m1 ( ... ) __riscv_vredor_vs_u8mf2_u8m1_tu(__VA_ARGS__)

◆ vredor_vs_u8mf2_u8m1_m

#define vredor_vs_u8mf2_u8m1_m ( ... ) __riscv_vredor_vs_u8mf2_u8m1_tum(__VA_ARGS__)

◆ vredor_vs_u8mf4_u8m1

#define vredor_vs_u8mf4_u8m1 ( ... ) __riscv_vredor_vs_u8mf4_u8m1_tu(__VA_ARGS__)

◆ vredor_vs_u8mf4_u8m1_m

#define vredor_vs_u8mf4_u8m1_m ( ... ) __riscv_vredor_vs_u8mf4_u8m1_tum(__VA_ARGS__)

◆ vredor_vs_u8mf8_u8m1

#define vredor_vs_u8mf8_u8m1 ( ... ) __riscv_vredor_vs_u8mf8_u8m1_tu(__VA_ARGS__)

◆ vredor_vs_u8mf8_u8m1_m

#define vredor_vs_u8mf8_u8m1_m ( ... ) __riscv_vredor_vs_u8mf8_u8m1_tum(__VA_ARGS__)

◆ vredsum_vs_i16m1_i16m1

#define vredsum_vs_i16m1_i16m1 ( ... ) __riscv_vredsum_vs_i16m1_i16m1_tu(__VA_ARGS__)

◆ vredsum_vs_i16m1_i16m1_m

#define vredsum_vs_i16m1_i16m1_m ( ... ) __riscv_vredsum_vs_i16m1_i16m1_tum(__VA_ARGS__)

◆ vredsum_vs_i16m2_i16m1

#define vredsum_vs_i16m2_i16m1 ( ... ) __riscv_vredsum_vs_i16m2_i16m1_tu(__VA_ARGS__)

◆ vredsum_vs_i16m2_i16m1_m

#define vredsum_vs_i16m2_i16m1_m ( ... ) __riscv_vredsum_vs_i16m2_i16m1_tum(__VA_ARGS__)

◆ vredsum_vs_i16m4_i16m1

#define vredsum_vs_i16m4_i16m1 ( ... ) __riscv_vredsum_vs_i16m4_i16m1_tu(__VA_ARGS__)

◆ vredsum_vs_i16m4_i16m1_m

#define vredsum_vs_i16m4_i16m1_m ( ... ) __riscv_vredsum_vs_i16m4_i16m1_tum(__VA_ARGS__)

◆ vredsum_vs_i16m8_i16m1

#define vredsum_vs_i16m8_i16m1 ( ... ) __riscv_vredsum_vs_i16m8_i16m1_tu(__VA_ARGS__)

◆ vredsum_vs_i16m8_i16m1_m

#define vredsum_vs_i16m8_i16m1_m ( ... ) __riscv_vredsum_vs_i16m8_i16m1_tum(__VA_ARGS__)

◆ vredsum_vs_i16mf2_i16m1

#define vredsum_vs_i16mf2_i16m1 ( ... ) __riscv_vredsum_vs_i16mf2_i16m1_tu(__VA_ARGS__)

◆ vredsum_vs_i16mf2_i16m1_m

#define vredsum_vs_i16mf2_i16m1_m ( ... ) __riscv_vredsum_vs_i16mf2_i16m1_tum(__VA_ARGS__)

◆ vredsum_vs_i16mf4_i16m1

#define vredsum_vs_i16mf4_i16m1 ( ... ) __riscv_vredsum_vs_i16mf4_i16m1_tu(__VA_ARGS__)

◆ vredsum_vs_i16mf4_i16m1_m

#define vredsum_vs_i16mf4_i16m1_m ( ... ) __riscv_vredsum_vs_i16mf4_i16m1_tum(__VA_ARGS__)

◆ vredsum_vs_i32m1_i32m1

#define vredsum_vs_i32m1_i32m1 ( ... ) __riscv_vredsum_vs_i32m1_i32m1_tu(__VA_ARGS__)

◆ vredsum_vs_i32m1_i32m1_m

#define vredsum_vs_i32m1_i32m1_m ( ... ) __riscv_vredsum_vs_i32m1_i32m1_tum(__VA_ARGS__)

◆ vredsum_vs_i32m2_i32m1

#define vredsum_vs_i32m2_i32m1 ( ... ) __riscv_vredsum_vs_i32m2_i32m1_tu(__VA_ARGS__)

◆ vredsum_vs_i32m2_i32m1_m

#define vredsum_vs_i32m2_i32m1_m ( ... ) __riscv_vredsum_vs_i32m2_i32m1_tum(__VA_ARGS__)

◆ vredsum_vs_i32m4_i32m1

#define vredsum_vs_i32m4_i32m1 ( ... ) __riscv_vredsum_vs_i32m4_i32m1_tu(__VA_ARGS__)

◆ vredsum_vs_i32m4_i32m1_m

#define vredsum_vs_i32m4_i32m1_m ( ... ) __riscv_vredsum_vs_i32m4_i32m1_tum(__VA_ARGS__)

◆ vredsum_vs_i32m8_i32m1

#define vredsum_vs_i32m8_i32m1 ( ... ) __riscv_vredsum_vs_i32m8_i32m1_tu(__VA_ARGS__)

◆ vredsum_vs_i32m8_i32m1_m

#define vredsum_vs_i32m8_i32m1_m ( ... ) __riscv_vredsum_vs_i32m8_i32m1_tum(__VA_ARGS__)

◆ vredsum_vs_i32mf2_i32m1

#define vredsum_vs_i32mf2_i32m1 ( ... ) __riscv_vredsum_vs_i32mf2_i32m1_tu(__VA_ARGS__)

◆ vredsum_vs_i32mf2_i32m1_m

#define vredsum_vs_i32mf2_i32m1_m ( ... ) __riscv_vredsum_vs_i32mf2_i32m1_tum(__VA_ARGS__)

◆ vredsum_vs_i64m1_i64m1

#define vredsum_vs_i64m1_i64m1 ( ... ) __riscv_vredsum_vs_i64m1_i64m1_tu(__VA_ARGS__)

◆ vredsum_vs_i64m1_i64m1_m

#define vredsum_vs_i64m1_i64m1_m ( ... ) __riscv_vredsum_vs_i64m1_i64m1_tum(__VA_ARGS__)

◆ vredsum_vs_i64m2_i64m1

#define vredsum_vs_i64m2_i64m1 ( ... ) __riscv_vredsum_vs_i64m2_i64m1_tu(__VA_ARGS__)

◆ vredsum_vs_i64m2_i64m1_m

#define vredsum_vs_i64m2_i64m1_m ( ... ) __riscv_vredsum_vs_i64m2_i64m1_tum(__VA_ARGS__)

◆ vredsum_vs_i64m4_i64m1

#define vredsum_vs_i64m4_i64m1 ( ... ) __riscv_vredsum_vs_i64m4_i64m1_tu(__VA_ARGS__)

◆ vredsum_vs_i64m4_i64m1_m

#define vredsum_vs_i64m4_i64m1_m ( ... ) __riscv_vredsum_vs_i64m4_i64m1_tum(__VA_ARGS__)

◆ vredsum_vs_i64m8_i64m1

#define vredsum_vs_i64m8_i64m1 ( ... ) __riscv_vredsum_vs_i64m8_i64m1_tu(__VA_ARGS__)

◆ vredsum_vs_i64m8_i64m1_m

#define vredsum_vs_i64m8_i64m1_m ( ... ) __riscv_vredsum_vs_i64m8_i64m1_tum(__VA_ARGS__)

◆ vredsum_vs_i8m1_i8m1

#define vredsum_vs_i8m1_i8m1 ( ... ) __riscv_vredsum_vs_i8m1_i8m1_tu(__VA_ARGS__)

◆ vredsum_vs_i8m1_i8m1_m

#define vredsum_vs_i8m1_i8m1_m ( ... ) __riscv_vredsum_vs_i8m1_i8m1_tum(__VA_ARGS__)

◆ vredsum_vs_i8m2_i8m1

#define vredsum_vs_i8m2_i8m1 ( ... ) __riscv_vredsum_vs_i8m2_i8m1_tu(__VA_ARGS__)

◆ vredsum_vs_i8m2_i8m1_m

#define vredsum_vs_i8m2_i8m1_m ( ... ) __riscv_vredsum_vs_i8m2_i8m1_tum(__VA_ARGS__)

◆ vredsum_vs_i8m4_i8m1

#define vredsum_vs_i8m4_i8m1 ( ... ) __riscv_vredsum_vs_i8m4_i8m1_tu(__VA_ARGS__)

◆ vredsum_vs_i8m4_i8m1_m

#define vredsum_vs_i8m4_i8m1_m ( ... ) __riscv_vredsum_vs_i8m4_i8m1_tum(__VA_ARGS__)

◆ vredsum_vs_i8m8_i8m1

#define vredsum_vs_i8m8_i8m1 ( ... ) __riscv_vredsum_vs_i8m8_i8m1_tu(__VA_ARGS__)

◆ vredsum_vs_i8m8_i8m1_m

#define vredsum_vs_i8m8_i8m1_m ( ... ) __riscv_vredsum_vs_i8m8_i8m1_tum(__VA_ARGS__)

◆ vredsum_vs_i8mf2_i8m1

#define vredsum_vs_i8mf2_i8m1 ( ... ) __riscv_vredsum_vs_i8mf2_i8m1_tu(__VA_ARGS__)

◆ vredsum_vs_i8mf2_i8m1_m

#define vredsum_vs_i8mf2_i8m1_m ( ... ) __riscv_vredsum_vs_i8mf2_i8m1_tum(__VA_ARGS__)

◆ vredsum_vs_i8mf4_i8m1

#define vredsum_vs_i8mf4_i8m1 ( ... ) __riscv_vredsum_vs_i8mf4_i8m1_tu(__VA_ARGS__)

◆ vredsum_vs_i8mf4_i8m1_m

#define vredsum_vs_i8mf4_i8m1_m ( ... ) __riscv_vredsum_vs_i8mf4_i8m1_tum(__VA_ARGS__)

◆ vredsum_vs_i8mf8_i8m1

#define vredsum_vs_i8mf8_i8m1 ( ... ) __riscv_vredsum_vs_i8mf8_i8m1_tu(__VA_ARGS__)

◆ vredsum_vs_i8mf8_i8m1_m

#define vredsum_vs_i8mf8_i8m1_m ( ... ) __riscv_vredsum_vs_i8mf8_i8m1_tum(__VA_ARGS__)

◆ vredsum_vs_u16m1_u16m1

#define vredsum_vs_u16m1_u16m1 ( ... ) __riscv_vredsum_vs_u16m1_u16m1_tu(__VA_ARGS__)

◆ vredsum_vs_u16m1_u16m1_m

#define vredsum_vs_u16m1_u16m1_m ( ... ) __riscv_vredsum_vs_u16m1_u16m1_tum(__VA_ARGS__)

◆ vredsum_vs_u16m2_u16m1

#define vredsum_vs_u16m2_u16m1 ( ... ) __riscv_vredsum_vs_u16m2_u16m1_tu(__VA_ARGS__)

◆ vredsum_vs_u16m2_u16m1_m

#define vredsum_vs_u16m2_u16m1_m ( ... ) __riscv_vredsum_vs_u16m2_u16m1_tum(__VA_ARGS__)

◆ vredsum_vs_u16m4_u16m1

#define vredsum_vs_u16m4_u16m1 ( ... ) __riscv_vredsum_vs_u16m4_u16m1_tu(__VA_ARGS__)

◆ vredsum_vs_u16m4_u16m1_m

#define vredsum_vs_u16m4_u16m1_m ( ... ) __riscv_vredsum_vs_u16m4_u16m1_tum(__VA_ARGS__)

◆ vredsum_vs_u16m8_u16m1

#define vredsum_vs_u16m8_u16m1 ( ... ) __riscv_vredsum_vs_u16m8_u16m1_tu(__VA_ARGS__)

◆ vredsum_vs_u16m8_u16m1_m

#define vredsum_vs_u16m8_u16m1_m ( ... ) __riscv_vredsum_vs_u16m8_u16m1_tum(__VA_ARGS__)

◆ vredsum_vs_u16mf2_u16m1

#define vredsum_vs_u16mf2_u16m1 ( ... ) __riscv_vredsum_vs_u16mf2_u16m1_tu(__VA_ARGS__)

◆ vredsum_vs_u16mf2_u16m1_m

#define vredsum_vs_u16mf2_u16m1_m ( ... ) __riscv_vredsum_vs_u16mf2_u16m1_tum(__VA_ARGS__)

◆ vredsum_vs_u16mf4_u16m1

#define vredsum_vs_u16mf4_u16m1 ( ... ) __riscv_vredsum_vs_u16mf4_u16m1_tu(__VA_ARGS__)

◆ vredsum_vs_u16mf4_u16m1_m

#define vredsum_vs_u16mf4_u16m1_m ( ... ) __riscv_vredsum_vs_u16mf4_u16m1_tum(__VA_ARGS__)

◆ vredsum_vs_u32m1_u32m1

#define vredsum_vs_u32m1_u32m1 ( ... ) __riscv_vredsum_vs_u32m1_u32m1_tu(__VA_ARGS__)

◆ vredsum_vs_u32m1_u32m1_m

#define vredsum_vs_u32m1_u32m1_m ( ... ) __riscv_vredsum_vs_u32m1_u32m1_tum(__VA_ARGS__)

◆ vredsum_vs_u32m2_u32m1

#define vredsum_vs_u32m2_u32m1 ( ... ) __riscv_vredsum_vs_u32m2_u32m1_tu(__VA_ARGS__)

◆ vredsum_vs_u32m2_u32m1_m

#define vredsum_vs_u32m2_u32m1_m ( ... ) __riscv_vredsum_vs_u32m2_u32m1_tum(__VA_ARGS__)

◆ vredsum_vs_u32m4_u32m1

#define vredsum_vs_u32m4_u32m1 ( ... ) __riscv_vredsum_vs_u32m4_u32m1_tu(__VA_ARGS__)

◆ vredsum_vs_u32m4_u32m1_m

#define vredsum_vs_u32m4_u32m1_m ( ... ) __riscv_vredsum_vs_u32m4_u32m1_tum(__VA_ARGS__)

◆ vredsum_vs_u32m8_u32m1

#define vredsum_vs_u32m8_u32m1 ( ... ) __riscv_vredsum_vs_u32m8_u32m1_tu(__VA_ARGS__)

◆ vredsum_vs_u32m8_u32m1_m

#define vredsum_vs_u32m8_u32m1_m ( ... ) __riscv_vredsum_vs_u32m8_u32m1_tum(__VA_ARGS__)

◆ vredsum_vs_u32mf2_u32m1

#define vredsum_vs_u32mf2_u32m1 ( ... ) __riscv_vredsum_vs_u32mf2_u32m1_tu(__VA_ARGS__)

◆ vredsum_vs_u32mf2_u32m1_m

#define vredsum_vs_u32mf2_u32m1_m ( ... ) __riscv_vredsum_vs_u32mf2_u32m1_tum(__VA_ARGS__)

◆ vredsum_vs_u64m1_u64m1

#define vredsum_vs_u64m1_u64m1 ( ... ) __riscv_vredsum_vs_u64m1_u64m1_tu(__VA_ARGS__)

◆ vredsum_vs_u64m1_u64m1_m

#define vredsum_vs_u64m1_u64m1_m ( ... ) __riscv_vredsum_vs_u64m1_u64m1_tum(__VA_ARGS__)

◆ vredsum_vs_u64m2_u64m1

#define vredsum_vs_u64m2_u64m1 ( ... ) __riscv_vredsum_vs_u64m2_u64m1_tu(__VA_ARGS__)

◆ vredsum_vs_u64m2_u64m1_m

#define vredsum_vs_u64m2_u64m1_m ( ... ) __riscv_vredsum_vs_u64m2_u64m1_tum(__VA_ARGS__)

◆ vredsum_vs_u64m4_u64m1

#define vredsum_vs_u64m4_u64m1 ( ... ) __riscv_vredsum_vs_u64m4_u64m1_tu(__VA_ARGS__)

◆ vredsum_vs_u64m4_u64m1_m

#define vredsum_vs_u64m4_u64m1_m ( ... ) __riscv_vredsum_vs_u64m4_u64m1_tum(__VA_ARGS__)

◆ vredsum_vs_u64m8_u64m1

#define vredsum_vs_u64m8_u64m1 ( ... ) __riscv_vredsum_vs_u64m8_u64m1_tu(__VA_ARGS__)

◆ vredsum_vs_u64m8_u64m1_m

#define vredsum_vs_u64m8_u64m1_m ( ... ) __riscv_vredsum_vs_u64m8_u64m1_tum(__VA_ARGS__)

◆ vredsum_vs_u8m1_u8m1

#define vredsum_vs_u8m1_u8m1 ( ... ) __riscv_vredsum_vs_u8m1_u8m1_tu(__VA_ARGS__)

◆ vredsum_vs_u8m1_u8m1_m

#define vredsum_vs_u8m1_u8m1_m ( ... ) __riscv_vredsum_vs_u8m1_u8m1_tum(__VA_ARGS__)

◆ vredsum_vs_u8m2_u8m1

#define vredsum_vs_u8m2_u8m1 ( ... ) __riscv_vredsum_vs_u8m2_u8m1_tu(__VA_ARGS__)

◆ vredsum_vs_u8m2_u8m1_m

#define vredsum_vs_u8m2_u8m1_m ( ... ) __riscv_vredsum_vs_u8m2_u8m1_tum(__VA_ARGS__)

◆ vredsum_vs_u8m4_u8m1

#define vredsum_vs_u8m4_u8m1 ( ... ) __riscv_vredsum_vs_u8m4_u8m1_tu(__VA_ARGS__)

◆ vredsum_vs_u8m4_u8m1_m

#define vredsum_vs_u8m4_u8m1_m ( ... ) __riscv_vredsum_vs_u8m4_u8m1_tum(__VA_ARGS__)

◆ vredsum_vs_u8m8_u8m1

#define vredsum_vs_u8m8_u8m1 ( ... ) __riscv_vredsum_vs_u8m8_u8m1_tu(__VA_ARGS__)

◆ vredsum_vs_u8m8_u8m1_m

#define vredsum_vs_u8m8_u8m1_m ( ... ) __riscv_vredsum_vs_u8m8_u8m1_tum(__VA_ARGS__)

◆ vredsum_vs_u8mf2_u8m1

#define vredsum_vs_u8mf2_u8m1 ( ... ) __riscv_vredsum_vs_u8mf2_u8m1_tu(__VA_ARGS__)

◆ vredsum_vs_u8mf2_u8m1_m

#define vredsum_vs_u8mf2_u8m1_m ( ... ) __riscv_vredsum_vs_u8mf2_u8m1_tum(__VA_ARGS__)

◆ vredsum_vs_u8mf4_u8m1

#define vredsum_vs_u8mf4_u8m1 ( ... ) __riscv_vredsum_vs_u8mf4_u8m1_tu(__VA_ARGS__)

◆ vredsum_vs_u8mf4_u8m1_m

#define vredsum_vs_u8mf4_u8m1_m ( ... ) __riscv_vredsum_vs_u8mf4_u8m1_tum(__VA_ARGS__)

◆ vredsum_vs_u8mf8_u8m1

#define vredsum_vs_u8mf8_u8m1 ( ... ) __riscv_vredsum_vs_u8mf8_u8m1_tu(__VA_ARGS__)

◆ vredsum_vs_u8mf8_u8m1_m

#define vredsum_vs_u8mf8_u8m1_m ( ... ) __riscv_vredsum_vs_u8mf8_u8m1_tum(__VA_ARGS__)

◆ vredxor_vs_i16m1_i16m1

#define vredxor_vs_i16m1_i16m1 ( ... ) __riscv_vredxor_vs_i16m1_i16m1_tu(__VA_ARGS__)

◆ vredxor_vs_i16m1_i16m1_m

#define vredxor_vs_i16m1_i16m1_m ( ... ) __riscv_vredxor_vs_i16m1_i16m1_tum(__VA_ARGS__)

◆ vredxor_vs_i16m2_i16m1

#define vredxor_vs_i16m2_i16m1 ( ... ) __riscv_vredxor_vs_i16m2_i16m1_tu(__VA_ARGS__)

◆ vredxor_vs_i16m2_i16m1_m

#define vredxor_vs_i16m2_i16m1_m ( ... ) __riscv_vredxor_vs_i16m2_i16m1_tum(__VA_ARGS__)

◆ vredxor_vs_i16m4_i16m1

#define vredxor_vs_i16m4_i16m1 ( ... ) __riscv_vredxor_vs_i16m4_i16m1_tu(__VA_ARGS__)

◆ vredxor_vs_i16m4_i16m1_m

#define vredxor_vs_i16m4_i16m1_m ( ... ) __riscv_vredxor_vs_i16m4_i16m1_tum(__VA_ARGS__)

◆ vredxor_vs_i16m8_i16m1

#define vredxor_vs_i16m8_i16m1 ( ... ) __riscv_vredxor_vs_i16m8_i16m1_tu(__VA_ARGS__)

◆ vredxor_vs_i16m8_i16m1_m

#define vredxor_vs_i16m8_i16m1_m ( ... ) __riscv_vredxor_vs_i16m8_i16m1_tum(__VA_ARGS__)

◆ vredxor_vs_i16mf2_i16m1

#define vredxor_vs_i16mf2_i16m1 ( ... ) __riscv_vredxor_vs_i16mf2_i16m1_tu(__VA_ARGS__)

◆ vredxor_vs_i16mf2_i16m1_m

#define vredxor_vs_i16mf2_i16m1_m ( ... ) __riscv_vredxor_vs_i16mf2_i16m1_tum(__VA_ARGS__)

◆ vredxor_vs_i16mf4_i16m1

#define vredxor_vs_i16mf4_i16m1 ( ... ) __riscv_vredxor_vs_i16mf4_i16m1_tu(__VA_ARGS__)

◆ vredxor_vs_i16mf4_i16m1_m

#define vredxor_vs_i16mf4_i16m1_m ( ... ) __riscv_vredxor_vs_i16mf4_i16m1_tum(__VA_ARGS__)

◆ vredxor_vs_i32m1_i32m1

#define vredxor_vs_i32m1_i32m1 ( ... ) __riscv_vredxor_vs_i32m1_i32m1_tu(__VA_ARGS__)

◆ vredxor_vs_i32m1_i32m1_m

#define vredxor_vs_i32m1_i32m1_m ( ... ) __riscv_vredxor_vs_i32m1_i32m1_tum(__VA_ARGS__)

◆ vredxor_vs_i32m2_i32m1

#define vredxor_vs_i32m2_i32m1 ( ... ) __riscv_vredxor_vs_i32m2_i32m1_tu(__VA_ARGS__)

◆ vredxor_vs_i32m2_i32m1_m

#define vredxor_vs_i32m2_i32m1_m ( ... ) __riscv_vredxor_vs_i32m2_i32m1_tum(__VA_ARGS__)

◆ vredxor_vs_i32m4_i32m1

#define vredxor_vs_i32m4_i32m1 ( ... ) __riscv_vredxor_vs_i32m4_i32m1_tu(__VA_ARGS__)

◆ vredxor_vs_i32m4_i32m1_m

#define vredxor_vs_i32m4_i32m1_m ( ... ) __riscv_vredxor_vs_i32m4_i32m1_tum(__VA_ARGS__)

◆ vredxor_vs_i32m8_i32m1

#define vredxor_vs_i32m8_i32m1 ( ... ) __riscv_vredxor_vs_i32m8_i32m1_tu(__VA_ARGS__)

◆ vredxor_vs_i32m8_i32m1_m

#define vredxor_vs_i32m8_i32m1_m ( ... ) __riscv_vredxor_vs_i32m8_i32m1_tum(__VA_ARGS__)

◆ vredxor_vs_i32mf2_i32m1

#define vredxor_vs_i32mf2_i32m1 ( ... ) __riscv_vredxor_vs_i32mf2_i32m1_tu(__VA_ARGS__)

◆ vredxor_vs_i32mf2_i32m1_m

#define vredxor_vs_i32mf2_i32m1_m ( ... ) __riscv_vredxor_vs_i32mf2_i32m1_tum(__VA_ARGS__)

◆ vredxor_vs_i64m1_i64m1

#define vredxor_vs_i64m1_i64m1 ( ... ) __riscv_vredxor_vs_i64m1_i64m1_tu(__VA_ARGS__)

◆ vredxor_vs_i64m1_i64m1_m

#define vredxor_vs_i64m1_i64m1_m ( ... ) __riscv_vredxor_vs_i64m1_i64m1_tum(__VA_ARGS__)

◆ vredxor_vs_i64m2_i64m1

#define vredxor_vs_i64m2_i64m1 ( ... ) __riscv_vredxor_vs_i64m2_i64m1_tu(__VA_ARGS__)

◆ vredxor_vs_i64m2_i64m1_m

#define vredxor_vs_i64m2_i64m1_m ( ... ) __riscv_vredxor_vs_i64m2_i64m1_tum(__VA_ARGS__)

◆ vredxor_vs_i64m4_i64m1

#define vredxor_vs_i64m4_i64m1 ( ... ) __riscv_vredxor_vs_i64m4_i64m1_tu(__VA_ARGS__)

◆ vredxor_vs_i64m4_i64m1_m

#define vredxor_vs_i64m4_i64m1_m ( ... ) __riscv_vredxor_vs_i64m4_i64m1_tum(__VA_ARGS__)

◆ vredxor_vs_i64m8_i64m1

#define vredxor_vs_i64m8_i64m1 ( ... ) __riscv_vredxor_vs_i64m8_i64m1_tu(__VA_ARGS__)

◆ vredxor_vs_i64m8_i64m1_m

#define vredxor_vs_i64m8_i64m1_m ( ... ) __riscv_vredxor_vs_i64m8_i64m1_tum(__VA_ARGS__)

◆ vredxor_vs_i8m1_i8m1

#define vredxor_vs_i8m1_i8m1 ( ... ) __riscv_vredxor_vs_i8m1_i8m1_tu(__VA_ARGS__)

◆ vredxor_vs_i8m1_i8m1_m

#define vredxor_vs_i8m1_i8m1_m ( ... ) __riscv_vredxor_vs_i8m1_i8m1_tum(__VA_ARGS__)

◆ vredxor_vs_i8m2_i8m1

#define vredxor_vs_i8m2_i8m1 ( ... ) __riscv_vredxor_vs_i8m2_i8m1_tu(__VA_ARGS__)

◆ vredxor_vs_i8m2_i8m1_m

#define vredxor_vs_i8m2_i8m1_m ( ... ) __riscv_vredxor_vs_i8m2_i8m1_tum(__VA_ARGS__)

◆ vredxor_vs_i8m4_i8m1

#define vredxor_vs_i8m4_i8m1 ( ... ) __riscv_vredxor_vs_i8m4_i8m1_tu(__VA_ARGS__)

◆ vredxor_vs_i8m4_i8m1_m

#define vredxor_vs_i8m4_i8m1_m ( ... ) __riscv_vredxor_vs_i8m4_i8m1_tum(__VA_ARGS__)

◆ vredxor_vs_i8m8_i8m1

#define vredxor_vs_i8m8_i8m1 ( ... ) __riscv_vredxor_vs_i8m8_i8m1_tu(__VA_ARGS__)

◆ vredxor_vs_i8m8_i8m1_m

#define vredxor_vs_i8m8_i8m1_m ( ... ) __riscv_vredxor_vs_i8m8_i8m1_tum(__VA_ARGS__)

◆ vredxor_vs_i8mf2_i8m1

#define vredxor_vs_i8mf2_i8m1 ( ... ) __riscv_vredxor_vs_i8mf2_i8m1_tu(__VA_ARGS__)

◆ vredxor_vs_i8mf2_i8m1_m

#define vredxor_vs_i8mf2_i8m1_m ( ... ) __riscv_vredxor_vs_i8mf2_i8m1_tum(__VA_ARGS__)

◆ vredxor_vs_i8mf4_i8m1

#define vredxor_vs_i8mf4_i8m1 ( ... ) __riscv_vredxor_vs_i8mf4_i8m1_tu(__VA_ARGS__)

◆ vredxor_vs_i8mf4_i8m1_m

#define vredxor_vs_i8mf4_i8m1_m ( ... ) __riscv_vredxor_vs_i8mf4_i8m1_tum(__VA_ARGS__)

◆ vredxor_vs_i8mf8_i8m1

#define vredxor_vs_i8mf8_i8m1 ( ... ) __riscv_vredxor_vs_i8mf8_i8m1_tu(__VA_ARGS__)

◆ vredxor_vs_i8mf8_i8m1_m

#define vredxor_vs_i8mf8_i8m1_m ( ... ) __riscv_vredxor_vs_i8mf8_i8m1_tum(__VA_ARGS__)

◆ vredxor_vs_u16m1_u16m1

#define vredxor_vs_u16m1_u16m1 ( ... ) __riscv_vredxor_vs_u16m1_u16m1_tu(__VA_ARGS__)

◆ vredxor_vs_u16m1_u16m1_m

#define vredxor_vs_u16m1_u16m1_m ( ... ) __riscv_vredxor_vs_u16m1_u16m1_tum(__VA_ARGS__)

◆ vredxor_vs_u16m2_u16m1

#define vredxor_vs_u16m2_u16m1 ( ... ) __riscv_vredxor_vs_u16m2_u16m1_tu(__VA_ARGS__)

◆ vredxor_vs_u16m2_u16m1_m

#define vredxor_vs_u16m2_u16m1_m ( ... ) __riscv_vredxor_vs_u16m2_u16m1_tum(__VA_ARGS__)

◆ vredxor_vs_u16m4_u16m1

#define vredxor_vs_u16m4_u16m1 ( ... ) __riscv_vredxor_vs_u16m4_u16m1_tu(__VA_ARGS__)

◆ vredxor_vs_u16m4_u16m1_m

#define vredxor_vs_u16m4_u16m1_m ( ... ) __riscv_vredxor_vs_u16m4_u16m1_tum(__VA_ARGS__)

◆ vredxor_vs_u16m8_u16m1

#define vredxor_vs_u16m8_u16m1 ( ... ) __riscv_vredxor_vs_u16m8_u16m1_tu(__VA_ARGS__)

◆ vredxor_vs_u16m8_u16m1_m

#define vredxor_vs_u16m8_u16m1_m ( ... ) __riscv_vredxor_vs_u16m8_u16m1_tum(__VA_ARGS__)

◆ vredxor_vs_u16mf2_u16m1

#define vredxor_vs_u16mf2_u16m1 ( ... ) __riscv_vredxor_vs_u16mf2_u16m1_tu(__VA_ARGS__)

◆ vredxor_vs_u16mf2_u16m1_m

#define vredxor_vs_u16mf2_u16m1_m ( ... ) __riscv_vredxor_vs_u16mf2_u16m1_tum(__VA_ARGS__)

◆ vredxor_vs_u16mf4_u16m1

#define vredxor_vs_u16mf4_u16m1 ( ... ) __riscv_vredxor_vs_u16mf4_u16m1_tu(__VA_ARGS__)

◆ vredxor_vs_u16mf4_u16m1_m

#define vredxor_vs_u16mf4_u16m1_m ( ... ) __riscv_vredxor_vs_u16mf4_u16m1_tum(__VA_ARGS__)

◆ vredxor_vs_u32m1_u32m1

#define vredxor_vs_u32m1_u32m1 ( ... ) __riscv_vredxor_vs_u32m1_u32m1_tu(__VA_ARGS__)

◆ vredxor_vs_u32m1_u32m1_m

#define vredxor_vs_u32m1_u32m1_m ( ... ) __riscv_vredxor_vs_u32m1_u32m1_tum(__VA_ARGS__)

◆ vredxor_vs_u32m2_u32m1

#define vredxor_vs_u32m2_u32m1 ( ... ) __riscv_vredxor_vs_u32m2_u32m1_tu(__VA_ARGS__)

◆ vredxor_vs_u32m2_u32m1_m

#define vredxor_vs_u32m2_u32m1_m ( ... ) __riscv_vredxor_vs_u32m2_u32m1_tum(__VA_ARGS__)

◆ vredxor_vs_u32m4_u32m1

#define vredxor_vs_u32m4_u32m1 ( ... ) __riscv_vredxor_vs_u32m4_u32m1_tu(__VA_ARGS__)

◆ vredxor_vs_u32m4_u32m1_m

#define vredxor_vs_u32m4_u32m1_m ( ... ) __riscv_vredxor_vs_u32m4_u32m1_tum(__VA_ARGS__)

◆ vredxor_vs_u32m8_u32m1

#define vredxor_vs_u32m8_u32m1 ( ... ) __riscv_vredxor_vs_u32m8_u32m1_tu(__VA_ARGS__)

◆ vredxor_vs_u32m8_u32m1_m

#define vredxor_vs_u32m8_u32m1_m ( ... ) __riscv_vredxor_vs_u32m8_u32m1_tum(__VA_ARGS__)

◆ vredxor_vs_u32mf2_u32m1

#define vredxor_vs_u32mf2_u32m1 ( ... ) __riscv_vredxor_vs_u32mf2_u32m1_tu(__VA_ARGS__)

◆ vredxor_vs_u32mf2_u32m1_m

#define vredxor_vs_u32mf2_u32m1_m ( ... ) __riscv_vredxor_vs_u32mf2_u32m1_tum(__VA_ARGS__)

◆ vredxor_vs_u64m1_u64m1

#define vredxor_vs_u64m1_u64m1 ( ... ) __riscv_vredxor_vs_u64m1_u64m1_tu(__VA_ARGS__)

◆ vredxor_vs_u64m1_u64m1_m

#define vredxor_vs_u64m1_u64m1_m ( ... ) __riscv_vredxor_vs_u64m1_u64m1_tum(__VA_ARGS__)

◆ vredxor_vs_u64m2_u64m1

#define vredxor_vs_u64m2_u64m1 ( ... ) __riscv_vredxor_vs_u64m2_u64m1_tu(__VA_ARGS__)

◆ vredxor_vs_u64m2_u64m1_m

#define vredxor_vs_u64m2_u64m1_m ( ... ) __riscv_vredxor_vs_u64m2_u64m1_tum(__VA_ARGS__)

◆ vredxor_vs_u64m4_u64m1

#define vredxor_vs_u64m4_u64m1 ( ... ) __riscv_vredxor_vs_u64m4_u64m1_tu(__VA_ARGS__)

◆ vredxor_vs_u64m4_u64m1_m

#define vredxor_vs_u64m4_u64m1_m ( ... ) __riscv_vredxor_vs_u64m4_u64m1_tum(__VA_ARGS__)

◆ vredxor_vs_u64m8_u64m1

#define vredxor_vs_u64m8_u64m1 ( ... ) __riscv_vredxor_vs_u64m8_u64m1_tu(__VA_ARGS__)

◆ vredxor_vs_u64m8_u64m1_m

#define vredxor_vs_u64m8_u64m1_m ( ... ) __riscv_vredxor_vs_u64m8_u64m1_tum(__VA_ARGS__)

◆ vredxor_vs_u8m1_u8m1

#define vredxor_vs_u8m1_u8m1 ( ... ) __riscv_vredxor_vs_u8m1_u8m1_tu(__VA_ARGS__)

◆ vredxor_vs_u8m1_u8m1_m

#define vredxor_vs_u8m1_u8m1_m ( ... ) __riscv_vredxor_vs_u8m1_u8m1_tum(__VA_ARGS__)

◆ vredxor_vs_u8m2_u8m1

#define vredxor_vs_u8m2_u8m1 ( ... ) __riscv_vredxor_vs_u8m2_u8m1_tu(__VA_ARGS__)

◆ vredxor_vs_u8m2_u8m1_m

#define vredxor_vs_u8m2_u8m1_m ( ... ) __riscv_vredxor_vs_u8m2_u8m1_tum(__VA_ARGS__)

◆ vredxor_vs_u8m4_u8m1

#define vredxor_vs_u8m4_u8m1 ( ... ) __riscv_vredxor_vs_u8m4_u8m1_tu(__VA_ARGS__)

◆ vredxor_vs_u8m4_u8m1_m

#define vredxor_vs_u8m4_u8m1_m ( ... ) __riscv_vredxor_vs_u8m4_u8m1_tum(__VA_ARGS__)

◆ vredxor_vs_u8m8_u8m1

#define vredxor_vs_u8m8_u8m1 ( ... ) __riscv_vredxor_vs_u8m8_u8m1_tu(__VA_ARGS__)

◆ vredxor_vs_u8m8_u8m1_m

#define vredxor_vs_u8m8_u8m1_m ( ... ) __riscv_vredxor_vs_u8m8_u8m1_tum(__VA_ARGS__)

◆ vredxor_vs_u8mf2_u8m1

#define vredxor_vs_u8mf2_u8m1 ( ... ) __riscv_vredxor_vs_u8mf2_u8m1_tu(__VA_ARGS__)

◆ vredxor_vs_u8mf2_u8m1_m

#define vredxor_vs_u8mf2_u8m1_m ( ... ) __riscv_vredxor_vs_u8mf2_u8m1_tum(__VA_ARGS__)

◆ vredxor_vs_u8mf4_u8m1

#define vredxor_vs_u8mf4_u8m1 ( ... ) __riscv_vredxor_vs_u8mf4_u8m1_tu(__VA_ARGS__)

◆ vredxor_vs_u8mf4_u8m1_m

#define vredxor_vs_u8mf4_u8m1_m ( ... ) __riscv_vredxor_vs_u8mf4_u8m1_tum(__VA_ARGS__)

◆ vredxor_vs_u8mf8_u8m1

#define vredxor_vs_u8mf8_u8m1 ( ... ) __riscv_vredxor_vs_u8mf8_u8m1_tu(__VA_ARGS__)

◆ vredxor_vs_u8mf8_u8m1_m

#define vredxor_vs_u8mf8_u8m1_m ( ... ) __riscv_vredxor_vs_u8mf8_u8m1_tum(__VA_ARGS__)

◆ vreinterpret_v_f16m1_i16m1

#define vreinterpret_v_f16m1_i16m1 ( ... ) __riscv_vreinterpret_v_f16m1_i16m1(__VA_ARGS__)

◆ vreinterpret_v_f16m1_u16m1

#define vreinterpret_v_f16m1_u16m1 ( ... ) __riscv_vreinterpret_v_f16m1_u16m1(__VA_ARGS__)

◆ vreinterpret_v_f16m2_i16m2

#define vreinterpret_v_f16m2_i16m2 ( ... ) __riscv_vreinterpret_v_f16m2_i16m2(__VA_ARGS__)

◆ vreinterpret_v_f16m2_u16m2

#define vreinterpret_v_f16m2_u16m2 ( ... ) __riscv_vreinterpret_v_f16m2_u16m2(__VA_ARGS__)

◆ vreinterpret_v_f16m4_i16m4

#define vreinterpret_v_f16m4_i16m4 ( ... ) __riscv_vreinterpret_v_f16m4_i16m4(__VA_ARGS__)

◆ vreinterpret_v_f16m4_u16m4

#define vreinterpret_v_f16m4_u16m4 ( ... ) __riscv_vreinterpret_v_f16m4_u16m4(__VA_ARGS__)

◆ vreinterpret_v_f16m8_i16m8

#define vreinterpret_v_f16m8_i16m8 ( ... ) __riscv_vreinterpret_v_f16m8_i16m8(__VA_ARGS__)

◆ vreinterpret_v_f16m8_u16m8

#define vreinterpret_v_f16m8_u16m8 ( ... ) __riscv_vreinterpret_v_f16m8_u16m8(__VA_ARGS__)

◆ vreinterpret_v_f16mf2_i16mf2

#define vreinterpret_v_f16mf2_i16mf2 ( ... ) __riscv_vreinterpret_v_f16mf2_i16mf2(__VA_ARGS__)

◆ vreinterpret_v_f16mf2_u16mf2

#define vreinterpret_v_f16mf2_u16mf2 ( ... ) __riscv_vreinterpret_v_f16mf2_u16mf2(__VA_ARGS__)

◆ vreinterpret_v_f16mf4_i16mf4

#define vreinterpret_v_f16mf4_i16mf4 ( ... ) __riscv_vreinterpret_v_f16mf4_i16mf4(__VA_ARGS__)

◆ vreinterpret_v_f16mf4_u16mf4

#define vreinterpret_v_f16mf4_u16mf4 ( ... ) __riscv_vreinterpret_v_f16mf4_u16mf4(__VA_ARGS__)

◆ vreinterpret_v_f32m1_i32m1

#define vreinterpret_v_f32m1_i32m1 ( ... ) __riscv_vreinterpret_v_f32m1_i32m1(__VA_ARGS__)

◆ vreinterpret_v_f32m1_u32m1

#define vreinterpret_v_f32m1_u32m1 ( ... ) __riscv_vreinterpret_v_f32m1_u32m1(__VA_ARGS__)

◆ vreinterpret_v_f32m2_i32m2

#define vreinterpret_v_f32m2_i32m2 ( ... ) __riscv_vreinterpret_v_f32m2_i32m2(__VA_ARGS__)

◆ vreinterpret_v_f32m2_u32m2

#define vreinterpret_v_f32m2_u32m2 ( ... ) __riscv_vreinterpret_v_f32m2_u32m2(__VA_ARGS__)

◆ vreinterpret_v_f32m4_i32m4

#define vreinterpret_v_f32m4_i32m4 ( ... ) __riscv_vreinterpret_v_f32m4_i32m4(__VA_ARGS__)

◆ vreinterpret_v_f32m4_u32m4

#define vreinterpret_v_f32m4_u32m4 ( ... ) __riscv_vreinterpret_v_f32m4_u32m4(__VA_ARGS__)

◆ vreinterpret_v_f32m8_i32m8

#define vreinterpret_v_f32m8_i32m8 ( ... ) __riscv_vreinterpret_v_f32m8_i32m8(__VA_ARGS__)

◆ vreinterpret_v_f32m8_u32m8

#define vreinterpret_v_f32m8_u32m8 ( ... ) __riscv_vreinterpret_v_f32m8_u32m8(__VA_ARGS__)

◆ vreinterpret_v_f32mf2_i32mf2

#define vreinterpret_v_f32mf2_i32mf2 ( ... ) __riscv_vreinterpret_v_f32mf2_i32mf2(__VA_ARGS__)

◆ vreinterpret_v_f32mf2_u32mf2

#define vreinterpret_v_f32mf2_u32mf2 ( ... ) __riscv_vreinterpret_v_f32mf2_u32mf2(__VA_ARGS__)

◆ vreinterpret_v_f64m1_i64m1

#define vreinterpret_v_f64m1_i64m1 ( ... ) __riscv_vreinterpret_v_f64m1_i64m1(__VA_ARGS__)

◆ vreinterpret_v_f64m1_u64m1

#define vreinterpret_v_f64m1_u64m1 ( ... ) __riscv_vreinterpret_v_f64m1_u64m1(__VA_ARGS__)

◆ vreinterpret_v_f64m2_i64m2

#define vreinterpret_v_f64m2_i64m2 ( ... ) __riscv_vreinterpret_v_f64m2_i64m2(__VA_ARGS__)

◆ vreinterpret_v_f64m2_u64m2

#define vreinterpret_v_f64m2_u64m2 ( ... ) __riscv_vreinterpret_v_f64m2_u64m2(__VA_ARGS__)

◆ vreinterpret_v_f64m4_i64m4

#define vreinterpret_v_f64m4_i64m4 ( ... ) __riscv_vreinterpret_v_f64m4_i64m4(__VA_ARGS__)

◆ vreinterpret_v_f64m4_u64m4

#define vreinterpret_v_f64m4_u64m4 ( ... ) __riscv_vreinterpret_v_f64m4_u64m4(__VA_ARGS__)

◆ vreinterpret_v_f64m8_i64m8

#define vreinterpret_v_f64m8_i64m8 ( ... ) __riscv_vreinterpret_v_f64m8_i64m8(__VA_ARGS__)

◆ vreinterpret_v_f64m8_u64m8

#define vreinterpret_v_f64m8_u64m8 ( ... ) __riscv_vreinterpret_v_f64m8_u64m8(__VA_ARGS__)

◆ vreinterpret_v_i16m1_f16m1

#define vreinterpret_v_i16m1_f16m1 ( ... ) __riscv_vreinterpret_v_i16m1_f16m1(__VA_ARGS__)

◆ vreinterpret_v_i16m1_i32m1

#define vreinterpret_v_i16m1_i32m1 ( ... ) __riscv_vreinterpret_v_i16m1_i32m1(__VA_ARGS__)

◆ vreinterpret_v_i16m1_i64m1

#define vreinterpret_v_i16m1_i64m1 ( ... ) __riscv_vreinterpret_v_i16m1_i64m1(__VA_ARGS__)

◆ vreinterpret_v_i16m1_i8m1

#define vreinterpret_v_i16m1_i8m1 ( ... ) __riscv_vreinterpret_v_i16m1_i8m1(__VA_ARGS__)

◆ vreinterpret_v_i16m1_u16m1

#define vreinterpret_v_i16m1_u16m1 ( ... ) __riscv_vreinterpret_v_i16m1_u16m1(__VA_ARGS__)

◆ vreinterpret_v_i16m2_f16m2

#define vreinterpret_v_i16m2_f16m2 ( ... ) __riscv_vreinterpret_v_i16m2_f16m2(__VA_ARGS__)

◆ vreinterpret_v_i16m2_i32m2

#define vreinterpret_v_i16m2_i32m2 ( ... ) __riscv_vreinterpret_v_i16m2_i32m2(__VA_ARGS__)

◆ vreinterpret_v_i16m2_i64m2

#define vreinterpret_v_i16m2_i64m2 ( ... ) __riscv_vreinterpret_v_i16m2_i64m2(__VA_ARGS__)

◆ vreinterpret_v_i16m2_i8m2

#define vreinterpret_v_i16m2_i8m2 ( ... ) __riscv_vreinterpret_v_i16m2_i8m2(__VA_ARGS__)

◆ vreinterpret_v_i16m2_u16m2

#define vreinterpret_v_i16m2_u16m2 ( ... ) __riscv_vreinterpret_v_i16m2_u16m2(__VA_ARGS__)

◆ vreinterpret_v_i16m4_f16m4

#define vreinterpret_v_i16m4_f16m4 ( ... ) __riscv_vreinterpret_v_i16m4_f16m4(__VA_ARGS__)

◆ vreinterpret_v_i16m4_i32m4

#define vreinterpret_v_i16m4_i32m4 ( ... ) __riscv_vreinterpret_v_i16m4_i32m4(__VA_ARGS__)

◆ vreinterpret_v_i16m4_i64m4

#define vreinterpret_v_i16m4_i64m4 ( ... ) __riscv_vreinterpret_v_i16m4_i64m4(__VA_ARGS__)

◆ vreinterpret_v_i16m4_i8m4

#define vreinterpret_v_i16m4_i8m4 ( ... ) __riscv_vreinterpret_v_i16m4_i8m4(__VA_ARGS__)

◆ vreinterpret_v_i16m4_u16m4

#define vreinterpret_v_i16m4_u16m4 ( ... ) __riscv_vreinterpret_v_i16m4_u16m4(__VA_ARGS__)

◆ vreinterpret_v_i16m8_f16m8

#define vreinterpret_v_i16m8_f16m8 ( ... ) __riscv_vreinterpret_v_i16m8_f16m8(__VA_ARGS__)

◆ vreinterpret_v_i16m8_i32m8

#define vreinterpret_v_i16m8_i32m8 ( ... ) __riscv_vreinterpret_v_i16m8_i32m8(__VA_ARGS__)

◆ vreinterpret_v_i16m8_i64m8

#define vreinterpret_v_i16m8_i64m8 ( ... ) __riscv_vreinterpret_v_i16m8_i64m8(__VA_ARGS__)

◆ vreinterpret_v_i16m8_i8m8

#define vreinterpret_v_i16m8_i8m8 ( ... ) __riscv_vreinterpret_v_i16m8_i8m8(__VA_ARGS__)

◆ vreinterpret_v_i16m8_u16m8

#define vreinterpret_v_i16m8_u16m8 ( ... ) __riscv_vreinterpret_v_i16m8_u16m8(__VA_ARGS__)

◆ vreinterpret_v_i16mf2_f16mf2

#define vreinterpret_v_i16mf2_f16mf2 ( ... ) __riscv_vreinterpret_v_i16mf2_f16mf2(__VA_ARGS__)

◆ vreinterpret_v_i16mf2_i32mf2

#define vreinterpret_v_i16mf2_i32mf2 ( ... ) __riscv_vreinterpret_v_i16mf2_i32mf2(__VA_ARGS__)

◆ vreinterpret_v_i16mf2_i8mf2

#define vreinterpret_v_i16mf2_i8mf2 ( ... ) __riscv_vreinterpret_v_i16mf2_i8mf2(__VA_ARGS__)

◆ vreinterpret_v_i16mf2_u16mf2

#define vreinterpret_v_i16mf2_u16mf2 ( ... ) __riscv_vreinterpret_v_i16mf2_u16mf2(__VA_ARGS__)

◆ vreinterpret_v_i16mf4_f16mf4

#define vreinterpret_v_i16mf4_f16mf4 ( ... ) __riscv_vreinterpret_v_i16mf4_f16mf4(__VA_ARGS__)

◆ vreinterpret_v_i16mf4_i8mf4

#define vreinterpret_v_i16mf4_i8mf4 ( ... ) __riscv_vreinterpret_v_i16mf4_i8mf4(__VA_ARGS__)

◆ vreinterpret_v_i16mf4_u16mf4

#define vreinterpret_v_i16mf4_u16mf4 ( ... ) __riscv_vreinterpret_v_i16mf4_u16mf4(__VA_ARGS__)

◆ vreinterpret_v_i32m1_f32m1

#define vreinterpret_v_i32m1_f32m1 ( ... ) __riscv_vreinterpret_v_i32m1_f32m1(__VA_ARGS__)

◆ vreinterpret_v_i32m1_i16m1

#define vreinterpret_v_i32m1_i16m1 ( ... ) __riscv_vreinterpret_v_i32m1_i16m1(__VA_ARGS__)

◆ vreinterpret_v_i32m1_i64m1

#define vreinterpret_v_i32m1_i64m1 ( ... ) __riscv_vreinterpret_v_i32m1_i64m1(__VA_ARGS__)

◆ vreinterpret_v_i32m1_i8m1

#define vreinterpret_v_i32m1_i8m1 ( ... ) __riscv_vreinterpret_v_i32m1_i8m1(__VA_ARGS__)

◆ vreinterpret_v_i32m1_u32m1

#define vreinterpret_v_i32m1_u32m1 ( ... ) __riscv_vreinterpret_v_i32m1_u32m1(__VA_ARGS__)

◆ vreinterpret_v_i32m2_f32m2

#define vreinterpret_v_i32m2_f32m2 ( ... ) __riscv_vreinterpret_v_i32m2_f32m2(__VA_ARGS__)

◆ vreinterpret_v_i32m2_i16m2

#define vreinterpret_v_i32m2_i16m2 ( ... ) __riscv_vreinterpret_v_i32m2_i16m2(__VA_ARGS__)

◆ vreinterpret_v_i32m2_i64m2

#define vreinterpret_v_i32m2_i64m2 ( ... ) __riscv_vreinterpret_v_i32m2_i64m2(__VA_ARGS__)

◆ vreinterpret_v_i32m2_i8m2

#define vreinterpret_v_i32m2_i8m2 ( ... ) __riscv_vreinterpret_v_i32m2_i8m2(__VA_ARGS__)

◆ vreinterpret_v_i32m2_u32m2

#define vreinterpret_v_i32m2_u32m2 ( ... ) __riscv_vreinterpret_v_i32m2_u32m2(__VA_ARGS__)

◆ vreinterpret_v_i32m4_f32m4

#define vreinterpret_v_i32m4_f32m4 ( ... ) __riscv_vreinterpret_v_i32m4_f32m4(__VA_ARGS__)

◆ vreinterpret_v_i32m4_i16m4

#define vreinterpret_v_i32m4_i16m4 ( ... ) __riscv_vreinterpret_v_i32m4_i16m4(__VA_ARGS__)

◆ vreinterpret_v_i32m4_i64m4

#define vreinterpret_v_i32m4_i64m4 ( ... ) __riscv_vreinterpret_v_i32m4_i64m4(__VA_ARGS__)

◆ vreinterpret_v_i32m4_i8m4

#define vreinterpret_v_i32m4_i8m4 ( ... ) __riscv_vreinterpret_v_i32m4_i8m4(__VA_ARGS__)

◆ vreinterpret_v_i32m4_u32m4

#define vreinterpret_v_i32m4_u32m4 ( ... ) __riscv_vreinterpret_v_i32m4_u32m4(__VA_ARGS__)

◆ vreinterpret_v_i32m8_f32m8

#define vreinterpret_v_i32m8_f32m8 ( ... ) __riscv_vreinterpret_v_i32m8_f32m8(__VA_ARGS__)

◆ vreinterpret_v_i32m8_i16m8

#define vreinterpret_v_i32m8_i16m8 ( ... ) __riscv_vreinterpret_v_i32m8_i16m8(__VA_ARGS__)

◆ vreinterpret_v_i32m8_i64m8

#define vreinterpret_v_i32m8_i64m8 ( ... ) __riscv_vreinterpret_v_i32m8_i64m8(__VA_ARGS__)

◆ vreinterpret_v_i32m8_i8m8

#define vreinterpret_v_i32m8_i8m8 ( ... ) __riscv_vreinterpret_v_i32m8_i8m8(__VA_ARGS__)

◆ vreinterpret_v_i32m8_u32m8

#define vreinterpret_v_i32m8_u32m8 ( ... ) __riscv_vreinterpret_v_i32m8_u32m8(__VA_ARGS__)

◆ vreinterpret_v_i32mf2_f32mf2

#define vreinterpret_v_i32mf2_f32mf2 ( ... ) __riscv_vreinterpret_v_i32mf2_f32mf2(__VA_ARGS__)

◆ vreinterpret_v_i32mf2_i16mf2

#define vreinterpret_v_i32mf2_i16mf2 ( ... ) __riscv_vreinterpret_v_i32mf2_i16mf2(__VA_ARGS__)

◆ vreinterpret_v_i32mf2_i8mf2

#define vreinterpret_v_i32mf2_i8mf2 ( ... ) __riscv_vreinterpret_v_i32mf2_i8mf2(__VA_ARGS__)

◆ vreinterpret_v_i32mf2_u32mf2

#define vreinterpret_v_i32mf2_u32mf2 ( ... ) __riscv_vreinterpret_v_i32mf2_u32mf2(__VA_ARGS__)

◆ vreinterpret_v_i64m1_f64m1

#define vreinterpret_v_i64m1_f64m1 ( ... ) __riscv_vreinterpret_v_i64m1_f64m1(__VA_ARGS__)

◆ vreinterpret_v_i64m1_i16m1

#define vreinterpret_v_i64m1_i16m1 ( ... ) __riscv_vreinterpret_v_i64m1_i16m1(__VA_ARGS__)

◆ vreinterpret_v_i64m1_i32m1

#define vreinterpret_v_i64m1_i32m1 ( ... ) __riscv_vreinterpret_v_i64m1_i32m1(__VA_ARGS__)

◆ vreinterpret_v_i64m1_i8m1

#define vreinterpret_v_i64m1_i8m1 ( ... ) __riscv_vreinterpret_v_i64m1_i8m1(__VA_ARGS__)

◆ vreinterpret_v_i64m1_u64m1

#define vreinterpret_v_i64m1_u64m1 ( ... ) __riscv_vreinterpret_v_i64m1_u64m1(__VA_ARGS__)

◆ vreinterpret_v_i64m2_f64m2

#define vreinterpret_v_i64m2_f64m2 ( ... ) __riscv_vreinterpret_v_i64m2_f64m2(__VA_ARGS__)

◆ vreinterpret_v_i64m2_i16m2

#define vreinterpret_v_i64m2_i16m2 ( ... ) __riscv_vreinterpret_v_i64m2_i16m2(__VA_ARGS__)

◆ vreinterpret_v_i64m2_i32m2

#define vreinterpret_v_i64m2_i32m2 ( ... ) __riscv_vreinterpret_v_i64m2_i32m2(__VA_ARGS__)

◆ vreinterpret_v_i64m2_i8m2

#define vreinterpret_v_i64m2_i8m2 ( ... ) __riscv_vreinterpret_v_i64m2_i8m2(__VA_ARGS__)

◆ vreinterpret_v_i64m2_u64m2

#define vreinterpret_v_i64m2_u64m2 ( ... ) __riscv_vreinterpret_v_i64m2_u64m2(__VA_ARGS__)

◆ vreinterpret_v_i64m4_f64m4

#define vreinterpret_v_i64m4_f64m4 ( ... ) __riscv_vreinterpret_v_i64m4_f64m4(__VA_ARGS__)

◆ vreinterpret_v_i64m4_i16m4

#define vreinterpret_v_i64m4_i16m4 ( ... ) __riscv_vreinterpret_v_i64m4_i16m4(__VA_ARGS__)

◆ vreinterpret_v_i64m4_i32m4

#define vreinterpret_v_i64m4_i32m4 ( ... ) __riscv_vreinterpret_v_i64m4_i32m4(__VA_ARGS__)

◆ vreinterpret_v_i64m4_i8m4

#define vreinterpret_v_i64m4_i8m4 ( ... ) __riscv_vreinterpret_v_i64m4_i8m4(__VA_ARGS__)

◆ vreinterpret_v_i64m4_u64m4

#define vreinterpret_v_i64m4_u64m4 ( ... ) __riscv_vreinterpret_v_i64m4_u64m4(__VA_ARGS__)

◆ vreinterpret_v_i64m8_f64m8

#define vreinterpret_v_i64m8_f64m8 ( ... ) __riscv_vreinterpret_v_i64m8_f64m8(__VA_ARGS__)

◆ vreinterpret_v_i64m8_i16m8

#define vreinterpret_v_i64m8_i16m8 ( ... ) __riscv_vreinterpret_v_i64m8_i16m8(__VA_ARGS__)

◆ vreinterpret_v_i64m8_i32m8

#define vreinterpret_v_i64m8_i32m8 ( ... ) __riscv_vreinterpret_v_i64m8_i32m8(__VA_ARGS__)

◆ vreinterpret_v_i64m8_i8m8

#define vreinterpret_v_i64m8_i8m8 ( ... ) __riscv_vreinterpret_v_i64m8_i8m8(__VA_ARGS__)

◆ vreinterpret_v_i64m8_u64m8

#define vreinterpret_v_i64m8_u64m8 ( ... ) __riscv_vreinterpret_v_i64m8_u64m8(__VA_ARGS__)

◆ vreinterpret_v_i8m1_i16m1

#define vreinterpret_v_i8m1_i16m1 ( ... ) __riscv_vreinterpret_v_i8m1_i16m1(__VA_ARGS__)

◆ vreinterpret_v_i8m1_i32m1

#define vreinterpret_v_i8m1_i32m1 ( ... ) __riscv_vreinterpret_v_i8m1_i32m1(__VA_ARGS__)

◆ vreinterpret_v_i8m1_i64m1

#define vreinterpret_v_i8m1_i64m1 ( ... ) __riscv_vreinterpret_v_i8m1_i64m1(__VA_ARGS__)

◆ vreinterpret_v_i8m1_u8m1

#define vreinterpret_v_i8m1_u8m1 ( ... ) __riscv_vreinterpret_v_i8m1_u8m1(__VA_ARGS__)

◆ vreinterpret_v_i8m2_i16m2

#define vreinterpret_v_i8m2_i16m2 ( ... ) __riscv_vreinterpret_v_i8m2_i16m2(__VA_ARGS__)

◆ vreinterpret_v_i8m2_i32m2

#define vreinterpret_v_i8m2_i32m2 ( ... ) __riscv_vreinterpret_v_i8m2_i32m2(__VA_ARGS__)

◆ vreinterpret_v_i8m2_i64m2

#define vreinterpret_v_i8m2_i64m2 ( ... ) __riscv_vreinterpret_v_i8m2_i64m2(__VA_ARGS__)

◆ vreinterpret_v_i8m2_u8m2

#define vreinterpret_v_i8m2_u8m2 ( ... ) __riscv_vreinterpret_v_i8m2_u8m2(__VA_ARGS__)

◆ vreinterpret_v_i8m4_i16m4

#define vreinterpret_v_i8m4_i16m4 ( ... ) __riscv_vreinterpret_v_i8m4_i16m4(__VA_ARGS__)

◆ vreinterpret_v_i8m4_i32m4

#define vreinterpret_v_i8m4_i32m4 ( ... ) __riscv_vreinterpret_v_i8m4_i32m4(__VA_ARGS__)

◆ vreinterpret_v_i8m4_i64m4

#define vreinterpret_v_i8m4_i64m4 ( ... ) __riscv_vreinterpret_v_i8m4_i64m4(__VA_ARGS__)

◆ vreinterpret_v_i8m4_u8m4

#define vreinterpret_v_i8m4_u8m4 ( ... ) __riscv_vreinterpret_v_i8m4_u8m4(__VA_ARGS__)

◆ vreinterpret_v_i8m8_i16m8

#define vreinterpret_v_i8m8_i16m8 ( ... ) __riscv_vreinterpret_v_i8m8_i16m8(__VA_ARGS__)

◆ vreinterpret_v_i8m8_i32m8

#define vreinterpret_v_i8m8_i32m8 ( ... ) __riscv_vreinterpret_v_i8m8_i32m8(__VA_ARGS__)

◆ vreinterpret_v_i8m8_i64m8

#define vreinterpret_v_i8m8_i64m8 ( ... ) __riscv_vreinterpret_v_i8m8_i64m8(__VA_ARGS__)

◆ vreinterpret_v_i8m8_u8m8

#define vreinterpret_v_i8m8_u8m8 ( ... ) __riscv_vreinterpret_v_i8m8_u8m8(__VA_ARGS__)

◆ vreinterpret_v_i8mf2_i16mf2

#define vreinterpret_v_i8mf2_i16mf2 ( ... ) __riscv_vreinterpret_v_i8mf2_i16mf2(__VA_ARGS__)

◆ vreinterpret_v_i8mf2_i32mf2

#define vreinterpret_v_i8mf2_i32mf2 ( ... ) __riscv_vreinterpret_v_i8mf2_i32mf2(__VA_ARGS__)

◆ vreinterpret_v_i8mf2_u8mf2

#define vreinterpret_v_i8mf2_u8mf2 ( ... ) __riscv_vreinterpret_v_i8mf2_u8mf2(__VA_ARGS__)

◆ vreinterpret_v_i8mf4_i16mf4

#define vreinterpret_v_i8mf4_i16mf4 ( ... ) __riscv_vreinterpret_v_i8mf4_i16mf4(__VA_ARGS__)

◆ vreinterpret_v_i8mf4_u8mf4

#define vreinterpret_v_i8mf4_u8mf4 ( ... ) __riscv_vreinterpret_v_i8mf4_u8mf4(__VA_ARGS__)

◆ vreinterpret_v_i8mf8_u8mf8

#define vreinterpret_v_i8mf8_u8mf8 ( ... ) __riscv_vreinterpret_v_i8mf8_u8mf8(__VA_ARGS__)

◆ vreinterpret_v_u16m1_f16m1

#define vreinterpret_v_u16m1_f16m1 ( ... ) __riscv_vreinterpret_v_u16m1_f16m1(__VA_ARGS__)

◆ vreinterpret_v_u16m1_i16m1

#define vreinterpret_v_u16m1_i16m1 ( ... ) __riscv_vreinterpret_v_u16m1_i16m1(__VA_ARGS__)

◆ vreinterpret_v_u16m1_u32m1

#define vreinterpret_v_u16m1_u32m1 ( ... ) __riscv_vreinterpret_v_u16m1_u32m1(__VA_ARGS__)

◆ vreinterpret_v_u16m1_u64m1

#define vreinterpret_v_u16m1_u64m1 ( ... ) __riscv_vreinterpret_v_u16m1_u64m1(__VA_ARGS__)

◆ vreinterpret_v_u16m1_u8m1

#define vreinterpret_v_u16m1_u8m1 ( ... ) __riscv_vreinterpret_v_u16m1_u8m1(__VA_ARGS__)

◆ vreinterpret_v_u16m2_f16m2

#define vreinterpret_v_u16m2_f16m2 ( ... ) __riscv_vreinterpret_v_u16m2_f16m2(__VA_ARGS__)

◆ vreinterpret_v_u16m2_i16m2

#define vreinterpret_v_u16m2_i16m2 ( ... ) __riscv_vreinterpret_v_u16m2_i16m2(__VA_ARGS__)

◆ vreinterpret_v_u16m2_u32m2

#define vreinterpret_v_u16m2_u32m2 ( ... ) __riscv_vreinterpret_v_u16m2_u32m2(__VA_ARGS__)

◆ vreinterpret_v_u16m2_u64m2

#define vreinterpret_v_u16m2_u64m2 ( ... ) __riscv_vreinterpret_v_u16m2_u64m2(__VA_ARGS__)

◆ vreinterpret_v_u16m2_u8m2

#define vreinterpret_v_u16m2_u8m2 ( ... ) __riscv_vreinterpret_v_u16m2_u8m2(__VA_ARGS__)

◆ vreinterpret_v_u16m4_f16m4

#define vreinterpret_v_u16m4_f16m4 ( ... ) __riscv_vreinterpret_v_u16m4_f16m4(__VA_ARGS__)

◆ vreinterpret_v_u16m4_i16m4

#define vreinterpret_v_u16m4_i16m4 ( ... ) __riscv_vreinterpret_v_u16m4_i16m4(__VA_ARGS__)

◆ vreinterpret_v_u16m4_u32m4

#define vreinterpret_v_u16m4_u32m4 ( ... ) __riscv_vreinterpret_v_u16m4_u32m4(__VA_ARGS__)

◆ vreinterpret_v_u16m4_u64m4

#define vreinterpret_v_u16m4_u64m4 ( ... ) __riscv_vreinterpret_v_u16m4_u64m4(__VA_ARGS__)

◆ vreinterpret_v_u16m4_u8m4

#define vreinterpret_v_u16m4_u8m4 ( ... ) __riscv_vreinterpret_v_u16m4_u8m4(__VA_ARGS__)

◆ vreinterpret_v_u16m8_f16m8

#define vreinterpret_v_u16m8_f16m8 ( ... ) __riscv_vreinterpret_v_u16m8_f16m8(__VA_ARGS__)

◆ vreinterpret_v_u16m8_i16m8

#define vreinterpret_v_u16m8_i16m8 ( ... ) __riscv_vreinterpret_v_u16m8_i16m8(__VA_ARGS__)

◆ vreinterpret_v_u16m8_u32m8

#define vreinterpret_v_u16m8_u32m8 ( ... ) __riscv_vreinterpret_v_u16m8_u32m8(__VA_ARGS__)

◆ vreinterpret_v_u16m8_u64m8

#define vreinterpret_v_u16m8_u64m8 ( ... ) __riscv_vreinterpret_v_u16m8_u64m8(__VA_ARGS__)

◆ vreinterpret_v_u16m8_u8m8

#define vreinterpret_v_u16m8_u8m8 ( ... ) __riscv_vreinterpret_v_u16m8_u8m8(__VA_ARGS__)

◆ vreinterpret_v_u16mf2_f16mf2

#define vreinterpret_v_u16mf2_f16mf2 ( ... ) __riscv_vreinterpret_v_u16mf2_f16mf2(__VA_ARGS__)

◆ vreinterpret_v_u16mf2_i16mf2

#define vreinterpret_v_u16mf2_i16mf2 ( ... ) __riscv_vreinterpret_v_u16mf2_i16mf2(__VA_ARGS__)

◆ vreinterpret_v_u16mf2_u32mf2

#define vreinterpret_v_u16mf2_u32mf2 ( ... ) __riscv_vreinterpret_v_u16mf2_u32mf2(__VA_ARGS__)

◆ vreinterpret_v_u16mf2_u8mf2

#define vreinterpret_v_u16mf2_u8mf2 ( ... ) __riscv_vreinterpret_v_u16mf2_u8mf2(__VA_ARGS__)

◆ vreinterpret_v_u16mf4_f16mf4

#define vreinterpret_v_u16mf4_f16mf4 ( ... ) __riscv_vreinterpret_v_u16mf4_f16mf4(__VA_ARGS__)

◆ vreinterpret_v_u16mf4_i16mf4

#define vreinterpret_v_u16mf4_i16mf4 ( ... ) __riscv_vreinterpret_v_u16mf4_i16mf4(__VA_ARGS__)

◆ vreinterpret_v_u16mf4_u8mf4

#define vreinterpret_v_u16mf4_u8mf4 ( ... ) __riscv_vreinterpret_v_u16mf4_u8mf4(__VA_ARGS__)

◆ vreinterpret_v_u32m1_f32m1

#define vreinterpret_v_u32m1_f32m1 ( ... ) __riscv_vreinterpret_v_u32m1_f32m1(__VA_ARGS__)

◆ vreinterpret_v_u32m1_i32m1

#define vreinterpret_v_u32m1_i32m1 ( ... ) __riscv_vreinterpret_v_u32m1_i32m1(__VA_ARGS__)

◆ vreinterpret_v_u32m1_u16m1

#define vreinterpret_v_u32m1_u16m1 ( ... ) __riscv_vreinterpret_v_u32m1_u16m1(__VA_ARGS__)

◆ vreinterpret_v_u32m1_u64m1

#define vreinterpret_v_u32m1_u64m1 ( ... ) __riscv_vreinterpret_v_u32m1_u64m1(__VA_ARGS__)

◆ vreinterpret_v_u32m1_u8m1

#define vreinterpret_v_u32m1_u8m1 ( ... ) __riscv_vreinterpret_v_u32m1_u8m1(__VA_ARGS__)

◆ vreinterpret_v_u32m2_f32m2

#define vreinterpret_v_u32m2_f32m2 ( ... ) __riscv_vreinterpret_v_u32m2_f32m2(__VA_ARGS__)

◆ vreinterpret_v_u32m2_i32m2

#define vreinterpret_v_u32m2_i32m2 ( ... ) __riscv_vreinterpret_v_u32m2_i32m2(__VA_ARGS__)

◆ vreinterpret_v_u32m2_u16m2

#define vreinterpret_v_u32m2_u16m2 ( ... ) __riscv_vreinterpret_v_u32m2_u16m2(__VA_ARGS__)

◆ vreinterpret_v_u32m2_u64m2

#define vreinterpret_v_u32m2_u64m2 ( ... ) __riscv_vreinterpret_v_u32m2_u64m2(__VA_ARGS__)

◆ vreinterpret_v_u32m2_u8m2

#define vreinterpret_v_u32m2_u8m2 ( ... ) __riscv_vreinterpret_v_u32m2_u8m2(__VA_ARGS__)

◆ vreinterpret_v_u32m4_f32m4

#define vreinterpret_v_u32m4_f32m4 ( ... ) __riscv_vreinterpret_v_u32m4_f32m4(__VA_ARGS__)

◆ vreinterpret_v_u32m4_i32m4

#define vreinterpret_v_u32m4_i32m4 ( ... ) __riscv_vreinterpret_v_u32m4_i32m4(__VA_ARGS__)

◆ vreinterpret_v_u32m4_u16m4

#define vreinterpret_v_u32m4_u16m4 ( ... ) __riscv_vreinterpret_v_u32m4_u16m4(__VA_ARGS__)

◆ vreinterpret_v_u32m4_u64m4

#define vreinterpret_v_u32m4_u64m4 ( ... ) __riscv_vreinterpret_v_u32m4_u64m4(__VA_ARGS__)

◆ vreinterpret_v_u32m4_u8m4

#define vreinterpret_v_u32m4_u8m4 ( ... ) __riscv_vreinterpret_v_u32m4_u8m4(__VA_ARGS__)

◆ vreinterpret_v_u32m8_f32m8

#define vreinterpret_v_u32m8_f32m8 ( ... ) __riscv_vreinterpret_v_u32m8_f32m8(__VA_ARGS__)

◆ vreinterpret_v_u32m8_i32m8

#define vreinterpret_v_u32m8_i32m8 ( ... ) __riscv_vreinterpret_v_u32m8_i32m8(__VA_ARGS__)

◆ vreinterpret_v_u32m8_u16m8

#define vreinterpret_v_u32m8_u16m8 ( ... ) __riscv_vreinterpret_v_u32m8_u16m8(__VA_ARGS__)

◆ vreinterpret_v_u32m8_u64m8

#define vreinterpret_v_u32m8_u64m8 ( ... ) __riscv_vreinterpret_v_u32m8_u64m8(__VA_ARGS__)

◆ vreinterpret_v_u32m8_u8m8

#define vreinterpret_v_u32m8_u8m8 ( ... ) __riscv_vreinterpret_v_u32m8_u8m8(__VA_ARGS__)

◆ vreinterpret_v_u32mf2_f32mf2

#define vreinterpret_v_u32mf2_f32mf2 ( ... ) __riscv_vreinterpret_v_u32mf2_f32mf2(__VA_ARGS__)

◆ vreinterpret_v_u32mf2_i32mf2

#define vreinterpret_v_u32mf2_i32mf2 ( ... ) __riscv_vreinterpret_v_u32mf2_i32mf2(__VA_ARGS__)

◆ vreinterpret_v_u32mf2_u16mf2

#define vreinterpret_v_u32mf2_u16mf2 ( ... ) __riscv_vreinterpret_v_u32mf2_u16mf2(__VA_ARGS__)

◆ vreinterpret_v_u32mf2_u8mf2

#define vreinterpret_v_u32mf2_u8mf2 ( ... ) __riscv_vreinterpret_v_u32mf2_u8mf2(__VA_ARGS__)

◆ vreinterpret_v_u64m1_f64m1

#define vreinterpret_v_u64m1_f64m1 ( ... ) __riscv_vreinterpret_v_u64m1_f64m1(__VA_ARGS__)

◆ vreinterpret_v_u64m1_i64m1

#define vreinterpret_v_u64m1_i64m1 ( ... ) __riscv_vreinterpret_v_u64m1_i64m1(__VA_ARGS__)

◆ vreinterpret_v_u64m1_u16m1

#define vreinterpret_v_u64m1_u16m1 ( ... ) __riscv_vreinterpret_v_u64m1_u16m1(__VA_ARGS__)

◆ vreinterpret_v_u64m1_u32m1

#define vreinterpret_v_u64m1_u32m1 ( ... ) __riscv_vreinterpret_v_u64m1_u32m1(__VA_ARGS__)

◆ vreinterpret_v_u64m1_u8m1

#define vreinterpret_v_u64m1_u8m1 ( ... ) __riscv_vreinterpret_v_u64m1_u8m1(__VA_ARGS__)

◆ vreinterpret_v_u64m2_f64m2

#define vreinterpret_v_u64m2_f64m2 ( ... ) __riscv_vreinterpret_v_u64m2_f64m2(__VA_ARGS__)

◆ vreinterpret_v_u64m2_i64m2

#define vreinterpret_v_u64m2_i64m2 ( ... ) __riscv_vreinterpret_v_u64m2_i64m2(__VA_ARGS__)

◆ vreinterpret_v_u64m2_u16m2

#define vreinterpret_v_u64m2_u16m2 ( ... ) __riscv_vreinterpret_v_u64m2_u16m2(__VA_ARGS__)

◆ vreinterpret_v_u64m2_u32m2

#define vreinterpret_v_u64m2_u32m2 ( ... ) __riscv_vreinterpret_v_u64m2_u32m2(__VA_ARGS__)

◆ vreinterpret_v_u64m2_u8m2

#define vreinterpret_v_u64m2_u8m2 ( ... ) __riscv_vreinterpret_v_u64m2_u8m2(__VA_ARGS__)

◆ vreinterpret_v_u64m4_f64m4

#define vreinterpret_v_u64m4_f64m4 ( ... ) __riscv_vreinterpret_v_u64m4_f64m4(__VA_ARGS__)

◆ vreinterpret_v_u64m4_i64m4

#define vreinterpret_v_u64m4_i64m4 ( ... ) __riscv_vreinterpret_v_u64m4_i64m4(__VA_ARGS__)

◆ vreinterpret_v_u64m4_u16m4

#define vreinterpret_v_u64m4_u16m4 ( ... ) __riscv_vreinterpret_v_u64m4_u16m4(__VA_ARGS__)

◆ vreinterpret_v_u64m4_u32m4

#define vreinterpret_v_u64m4_u32m4 ( ... ) __riscv_vreinterpret_v_u64m4_u32m4(__VA_ARGS__)

◆ vreinterpret_v_u64m4_u8m4

#define vreinterpret_v_u64m4_u8m4 ( ... ) __riscv_vreinterpret_v_u64m4_u8m4(__VA_ARGS__)

◆ vreinterpret_v_u64m8_f64m8

#define vreinterpret_v_u64m8_f64m8 ( ... ) __riscv_vreinterpret_v_u64m8_f64m8(__VA_ARGS__)

◆ vreinterpret_v_u64m8_i64m8

#define vreinterpret_v_u64m8_i64m8 ( ... ) __riscv_vreinterpret_v_u64m8_i64m8(__VA_ARGS__)

◆ vreinterpret_v_u64m8_u16m8

#define vreinterpret_v_u64m8_u16m8 ( ... ) __riscv_vreinterpret_v_u64m8_u16m8(__VA_ARGS__)

◆ vreinterpret_v_u64m8_u32m8

#define vreinterpret_v_u64m8_u32m8 ( ... ) __riscv_vreinterpret_v_u64m8_u32m8(__VA_ARGS__)

◆ vreinterpret_v_u64m8_u8m8

#define vreinterpret_v_u64m8_u8m8 ( ... ) __riscv_vreinterpret_v_u64m8_u8m8(__VA_ARGS__)

◆ vreinterpret_v_u8m1_i8m1

#define vreinterpret_v_u8m1_i8m1 ( ... ) __riscv_vreinterpret_v_u8m1_i8m1(__VA_ARGS__)

◆ vreinterpret_v_u8m1_u16m1

#define vreinterpret_v_u8m1_u16m1 ( ... ) __riscv_vreinterpret_v_u8m1_u16m1(__VA_ARGS__)

◆ vreinterpret_v_u8m1_u32m1

#define vreinterpret_v_u8m1_u32m1 ( ... ) __riscv_vreinterpret_v_u8m1_u32m1(__VA_ARGS__)

◆ vreinterpret_v_u8m1_u64m1

#define vreinterpret_v_u8m1_u64m1 ( ... ) __riscv_vreinterpret_v_u8m1_u64m1(__VA_ARGS__)

◆ vreinterpret_v_u8m2_i8m2

#define vreinterpret_v_u8m2_i8m2 ( ... ) __riscv_vreinterpret_v_u8m2_i8m2(__VA_ARGS__)

◆ vreinterpret_v_u8m2_u16m2

#define vreinterpret_v_u8m2_u16m2 ( ... ) __riscv_vreinterpret_v_u8m2_u16m2(__VA_ARGS__)

◆ vreinterpret_v_u8m2_u32m2

#define vreinterpret_v_u8m2_u32m2 ( ... ) __riscv_vreinterpret_v_u8m2_u32m2(__VA_ARGS__)

◆ vreinterpret_v_u8m2_u64m2

#define vreinterpret_v_u8m2_u64m2 ( ... ) __riscv_vreinterpret_v_u8m2_u64m2(__VA_ARGS__)

◆ vreinterpret_v_u8m4_i8m4

#define vreinterpret_v_u8m4_i8m4 ( ... ) __riscv_vreinterpret_v_u8m4_i8m4(__VA_ARGS__)

◆ vreinterpret_v_u8m4_u16m4

#define vreinterpret_v_u8m4_u16m4 ( ... ) __riscv_vreinterpret_v_u8m4_u16m4(__VA_ARGS__)

◆ vreinterpret_v_u8m4_u32m4

#define vreinterpret_v_u8m4_u32m4 ( ... ) __riscv_vreinterpret_v_u8m4_u32m4(__VA_ARGS__)

◆ vreinterpret_v_u8m4_u64m4

#define vreinterpret_v_u8m4_u64m4 ( ... ) __riscv_vreinterpret_v_u8m4_u64m4(__VA_ARGS__)

◆ vreinterpret_v_u8m8_i8m8

#define vreinterpret_v_u8m8_i8m8 ( ... ) __riscv_vreinterpret_v_u8m8_i8m8(__VA_ARGS__)

◆ vreinterpret_v_u8m8_u16m8

#define vreinterpret_v_u8m8_u16m8 ( ... ) __riscv_vreinterpret_v_u8m8_u16m8(__VA_ARGS__)

◆ vreinterpret_v_u8m8_u32m8

#define vreinterpret_v_u8m8_u32m8 ( ... ) __riscv_vreinterpret_v_u8m8_u32m8(__VA_ARGS__)

◆ vreinterpret_v_u8m8_u64m8

#define vreinterpret_v_u8m8_u64m8 ( ... ) __riscv_vreinterpret_v_u8m8_u64m8(__VA_ARGS__)

◆ vreinterpret_v_u8mf2_i8mf2

#define vreinterpret_v_u8mf2_i8mf2 ( ... ) __riscv_vreinterpret_v_u8mf2_i8mf2(__VA_ARGS__)

◆ vreinterpret_v_u8mf2_u16mf2

#define vreinterpret_v_u8mf2_u16mf2 ( ... ) __riscv_vreinterpret_v_u8mf2_u16mf2(__VA_ARGS__)

◆ vreinterpret_v_u8mf2_u32mf2

#define vreinterpret_v_u8mf2_u32mf2 ( ... ) __riscv_vreinterpret_v_u8mf2_u32mf2(__VA_ARGS__)

◆ vreinterpret_v_u8mf4_i8mf4

#define vreinterpret_v_u8mf4_i8mf4 ( ... ) __riscv_vreinterpret_v_u8mf4_i8mf4(__VA_ARGS__)

◆ vreinterpret_v_u8mf4_u16mf4

#define vreinterpret_v_u8mf4_u16mf4 ( ... ) __riscv_vreinterpret_v_u8mf4_u16mf4(__VA_ARGS__)

◆ vreinterpret_v_u8mf8_i8mf8

#define vreinterpret_v_u8mf8_i8mf8 ( ... ) __riscv_vreinterpret_v_u8mf8_i8mf8(__VA_ARGS__)

◆ vrem_vv_i16m1

#define vrem_vv_i16m1 ( ... ) __riscv_vrem_vv_i16m1(__VA_ARGS__)

◆ vrem_vv_i16m1_m

#define vrem_vv_i16m1_m ( ... ) __riscv_vrem_vv_i16m1_tumu(__VA_ARGS__)

◆ vrem_vv_i16m2

#define vrem_vv_i16m2 ( ... ) __riscv_vrem_vv_i16m2(__VA_ARGS__)

◆ vrem_vv_i16m2_m

#define vrem_vv_i16m2_m ( ... ) __riscv_vrem_vv_i16m2_tumu(__VA_ARGS__)

◆ vrem_vv_i16m4

#define vrem_vv_i16m4 ( ... ) __riscv_vrem_vv_i16m4(__VA_ARGS__)

◆ vrem_vv_i16m4_m

#define vrem_vv_i16m4_m ( ... ) __riscv_vrem_vv_i16m4_tumu(__VA_ARGS__)

◆ vrem_vv_i16m8

#define vrem_vv_i16m8 ( ... ) __riscv_vrem_vv_i16m8(__VA_ARGS__)

◆ vrem_vv_i16m8_m

#define vrem_vv_i16m8_m ( ... ) __riscv_vrem_vv_i16m8_tumu(__VA_ARGS__)

◆ vrem_vv_i16mf2

#define vrem_vv_i16mf2 ( ... ) __riscv_vrem_vv_i16mf2(__VA_ARGS__)

◆ vrem_vv_i16mf2_m

#define vrem_vv_i16mf2_m ( ... ) __riscv_vrem_vv_i16mf2_tumu(__VA_ARGS__)

◆ vrem_vv_i16mf4

#define vrem_vv_i16mf4 ( ... ) __riscv_vrem_vv_i16mf4(__VA_ARGS__)

◆ vrem_vv_i16mf4_m

#define vrem_vv_i16mf4_m ( ... ) __riscv_vrem_vv_i16mf4_tumu(__VA_ARGS__)

◆ vrem_vv_i32m1

#define vrem_vv_i32m1 ( ... ) __riscv_vrem_vv_i32m1(__VA_ARGS__)

◆ vrem_vv_i32m1_m

#define vrem_vv_i32m1_m ( ... ) __riscv_vrem_vv_i32m1_tumu(__VA_ARGS__)

◆ vrem_vv_i32m2

#define vrem_vv_i32m2 ( ... ) __riscv_vrem_vv_i32m2(__VA_ARGS__)

◆ vrem_vv_i32m2_m

#define vrem_vv_i32m2_m ( ... ) __riscv_vrem_vv_i32m2_tumu(__VA_ARGS__)

◆ vrem_vv_i32m4

#define vrem_vv_i32m4 ( ... ) __riscv_vrem_vv_i32m4(__VA_ARGS__)

◆ vrem_vv_i32m4_m

#define vrem_vv_i32m4_m ( ... ) __riscv_vrem_vv_i32m4_tumu(__VA_ARGS__)

◆ vrem_vv_i32m8

#define vrem_vv_i32m8 ( ... ) __riscv_vrem_vv_i32m8(__VA_ARGS__)

◆ vrem_vv_i32m8_m

#define vrem_vv_i32m8_m ( ... ) __riscv_vrem_vv_i32m8_tumu(__VA_ARGS__)

◆ vrem_vv_i32mf2

#define vrem_vv_i32mf2 ( ... ) __riscv_vrem_vv_i32mf2(__VA_ARGS__)

◆ vrem_vv_i32mf2_m

#define vrem_vv_i32mf2_m ( ... ) __riscv_vrem_vv_i32mf2_tumu(__VA_ARGS__)

◆ vrem_vv_i64m1

#define vrem_vv_i64m1 ( ... ) __riscv_vrem_vv_i64m1(__VA_ARGS__)

◆ vrem_vv_i64m1_m

#define vrem_vv_i64m1_m ( ... ) __riscv_vrem_vv_i64m1_tumu(__VA_ARGS__)

◆ vrem_vv_i64m2

#define vrem_vv_i64m2 ( ... ) __riscv_vrem_vv_i64m2(__VA_ARGS__)

◆ vrem_vv_i64m2_m

#define vrem_vv_i64m2_m ( ... ) __riscv_vrem_vv_i64m2_tumu(__VA_ARGS__)

◆ vrem_vv_i64m4

#define vrem_vv_i64m4 ( ... ) __riscv_vrem_vv_i64m4(__VA_ARGS__)

◆ vrem_vv_i64m4_m

#define vrem_vv_i64m4_m ( ... ) __riscv_vrem_vv_i64m4_tumu(__VA_ARGS__)

◆ vrem_vv_i64m8

#define vrem_vv_i64m8 ( ... ) __riscv_vrem_vv_i64m8(__VA_ARGS__)

◆ vrem_vv_i64m8_m

#define vrem_vv_i64m8_m ( ... ) __riscv_vrem_vv_i64m8_tumu(__VA_ARGS__)

◆ vrem_vv_i8m1

#define vrem_vv_i8m1 ( ... ) __riscv_vrem_vv_i8m1(__VA_ARGS__)

◆ vrem_vv_i8m1_m

#define vrem_vv_i8m1_m ( ... ) __riscv_vrem_vv_i8m1_tumu(__VA_ARGS__)

◆ vrem_vv_i8m2

#define vrem_vv_i8m2 ( ... ) __riscv_vrem_vv_i8m2(__VA_ARGS__)

◆ vrem_vv_i8m2_m

#define vrem_vv_i8m2_m ( ... ) __riscv_vrem_vv_i8m2_tumu(__VA_ARGS__)

◆ vrem_vv_i8m4

#define vrem_vv_i8m4 ( ... ) __riscv_vrem_vv_i8m4(__VA_ARGS__)

◆ vrem_vv_i8m4_m

#define vrem_vv_i8m4_m ( ... ) __riscv_vrem_vv_i8m4_tumu(__VA_ARGS__)

◆ vrem_vv_i8m8

#define vrem_vv_i8m8 ( ... ) __riscv_vrem_vv_i8m8(__VA_ARGS__)

◆ vrem_vv_i8m8_m

#define vrem_vv_i8m8_m ( ... ) __riscv_vrem_vv_i8m8_tumu(__VA_ARGS__)

◆ vrem_vv_i8mf2

#define vrem_vv_i8mf2 ( ... ) __riscv_vrem_vv_i8mf2(__VA_ARGS__)

◆ vrem_vv_i8mf2_m

#define vrem_vv_i8mf2_m ( ... ) __riscv_vrem_vv_i8mf2_tumu(__VA_ARGS__)

◆ vrem_vv_i8mf4

#define vrem_vv_i8mf4 ( ... ) __riscv_vrem_vv_i8mf4(__VA_ARGS__)

◆ vrem_vv_i8mf4_m

#define vrem_vv_i8mf4_m ( ... ) __riscv_vrem_vv_i8mf4_tumu(__VA_ARGS__)

◆ vrem_vv_i8mf8

#define vrem_vv_i8mf8 ( ... ) __riscv_vrem_vv_i8mf8(__VA_ARGS__)

◆ vrem_vv_i8mf8_m

#define vrem_vv_i8mf8_m ( ... ) __riscv_vrem_vv_i8mf8_tumu(__VA_ARGS__)

◆ vrem_vx_i16m1

#define vrem_vx_i16m1 ( ... ) __riscv_vrem_vx_i16m1(__VA_ARGS__)

◆ vrem_vx_i16m1_m

#define vrem_vx_i16m1_m ( ... ) __riscv_vrem_vx_i16m1_tumu(__VA_ARGS__)

◆ vrem_vx_i16m2

#define vrem_vx_i16m2 ( ... ) __riscv_vrem_vx_i16m2(__VA_ARGS__)

◆ vrem_vx_i16m2_m

#define vrem_vx_i16m2_m ( ... ) __riscv_vrem_vx_i16m2_tumu(__VA_ARGS__)

◆ vrem_vx_i16m4

#define vrem_vx_i16m4 ( ... ) __riscv_vrem_vx_i16m4(__VA_ARGS__)

◆ vrem_vx_i16m4_m

#define vrem_vx_i16m4_m ( ... ) __riscv_vrem_vx_i16m4_tumu(__VA_ARGS__)

◆ vrem_vx_i16m8

#define vrem_vx_i16m8 ( ... ) __riscv_vrem_vx_i16m8(__VA_ARGS__)

◆ vrem_vx_i16m8_m

#define vrem_vx_i16m8_m ( ... ) __riscv_vrem_vx_i16m8_tumu(__VA_ARGS__)

◆ vrem_vx_i16mf2

#define vrem_vx_i16mf2 ( ... ) __riscv_vrem_vx_i16mf2(__VA_ARGS__)

◆ vrem_vx_i16mf2_m

#define vrem_vx_i16mf2_m ( ... ) __riscv_vrem_vx_i16mf2_tumu(__VA_ARGS__)

◆ vrem_vx_i16mf4

#define vrem_vx_i16mf4 ( ... ) __riscv_vrem_vx_i16mf4(__VA_ARGS__)

◆ vrem_vx_i16mf4_m

#define vrem_vx_i16mf4_m ( ... ) __riscv_vrem_vx_i16mf4_tumu(__VA_ARGS__)

◆ vrem_vx_i32m1

#define vrem_vx_i32m1 ( ... ) __riscv_vrem_vx_i32m1(__VA_ARGS__)

◆ vrem_vx_i32m1_m

#define vrem_vx_i32m1_m ( ... ) __riscv_vrem_vx_i32m1_tumu(__VA_ARGS__)

◆ vrem_vx_i32m2

#define vrem_vx_i32m2 ( ... ) __riscv_vrem_vx_i32m2(__VA_ARGS__)

◆ vrem_vx_i32m2_m

#define vrem_vx_i32m2_m ( ... ) __riscv_vrem_vx_i32m2_tumu(__VA_ARGS__)

◆ vrem_vx_i32m4

#define vrem_vx_i32m4 ( ... ) __riscv_vrem_vx_i32m4(__VA_ARGS__)

◆ vrem_vx_i32m4_m

#define vrem_vx_i32m4_m ( ... ) __riscv_vrem_vx_i32m4_tumu(__VA_ARGS__)

◆ vrem_vx_i32m8

#define vrem_vx_i32m8 ( ... ) __riscv_vrem_vx_i32m8(__VA_ARGS__)

◆ vrem_vx_i32m8_m

#define vrem_vx_i32m8_m ( ... ) __riscv_vrem_vx_i32m8_tumu(__VA_ARGS__)

◆ vrem_vx_i32mf2

#define vrem_vx_i32mf2 ( ... ) __riscv_vrem_vx_i32mf2(__VA_ARGS__)

◆ vrem_vx_i32mf2_m

#define vrem_vx_i32mf2_m ( ... ) __riscv_vrem_vx_i32mf2_tumu(__VA_ARGS__)

◆ vrem_vx_i64m1

#define vrem_vx_i64m1 ( ... ) __riscv_vrem_vx_i64m1(__VA_ARGS__)

◆ vrem_vx_i64m1_m

#define vrem_vx_i64m1_m ( ... ) __riscv_vrem_vx_i64m1_tumu(__VA_ARGS__)

◆ vrem_vx_i64m2

#define vrem_vx_i64m2 ( ... ) __riscv_vrem_vx_i64m2(__VA_ARGS__)

◆ vrem_vx_i64m2_m

#define vrem_vx_i64m2_m ( ... ) __riscv_vrem_vx_i64m2_tumu(__VA_ARGS__)

◆ vrem_vx_i64m4

#define vrem_vx_i64m4 ( ... ) __riscv_vrem_vx_i64m4(__VA_ARGS__)

◆ vrem_vx_i64m4_m

#define vrem_vx_i64m4_m ( ... ) __riscv_vrem_vx_i64m4_tumu(__VA_ARGS__)

◆ vrem_vx_i64m8

#define vrem_vx_i64m8 ( ... ) __riscv_vrem_vx_i64m8(__VA_ARGS__)

◆ vrem_vx_i64m8_m

#define vrem_vx_i64m8_m ( ... ) __riscv_vrem_vx_i64m8_tumu(__VA_ARGS__)

◆ vrem_vx_i8m1

#define vrem_vx_i8m1 ( ... ) __riscv_vrem_vx_i8m1(__VA_ARGS__)

◆ vrem_vx_i8m1_m

#define vrem_vx_i8m1_m ( ... ) __riscv_vrem_vx_i8m1_tumu(__VA_ARGS__)

◆ vrem_vx_i8m2

#define vrem_vx_i8m2 ( ... ) __riscv_vrem_vx_i8m2(__VA_ARGS__)

◆ vrem_vx_i8m2_m

#define vrem_vx_i8m2_m ( ... ) __riscv_vrem_vx_i8m2_tumu(__VA_ARGS__)

◆ vrem_vx_i8m4

#define vrem_vx_i8m4 ( ... ) __riscv_vrem_vx_i8m4(__VA_ARGS__)

◆ vrem_vx_i8m4_m

#define vrem_vx_i8m4_m ( ... ) __riscv_vrem_vx_i8m4_tumu(__VA_ARGS__)

◆ vrem_vx_i8m8

#define vrem_vx_i8m8 ( ... ) __riscv_vrem_vx_i8m8(__VA_ARGS__)

◆ vrem_vx_i8m8_m

#define vrem_vx_i8m8_m ( ... ) __riscv_vrem_vx_i8m8_tumu(__VA_ARGS__)

◆ vrem_vx_i8mf2

#define vrem_vx_i8mf2 ( ... ) __riscv_vrem_vx_i8mf2(__VA_ARGS__)

◆ vrem_vx_i8mf2_m

#define vrem_vx_i8mf2_m ( ... ) __riscv_vrem_vx_i8mf2_tumu(__VA_ARGS__)

◆ vrem_vx_i8mf4

#define vrem_vx_i8mf4 ( ... ) __riscv_vrem_vx_i8mf4(__VA_ARGS__)

◆ vrem_vx_i8mf4_m

#define vrem_vx_i8mf4_m ( ... ) __riscv_vrem_vx_i8mf4_tumu(__VA_ARGS__)

◆ vrem_vx_i8mf8

#define vrem_vx_i8mf8 ( ... ) __riscv_vrem_vx_i8mf8(__VA_ARGS__)

◆ vrem_vx_i8mf8_m

#define vrem_vx_i8mf8_m ( ... ) __riscv_vrem_vx_i8mf8_tumu(__VA_ARGS__)

◆ vremu_vv_u16m1

#define vremu_vv_u16m1 ( ... ) __riscv_vremu_vv_u16m1(__VA_ARGS__)

◆ vremu_vv_u16m1_m

#define vremu_vv_u16m1_m ( ... ) __riscv_vremu_vv_u16m1_tumu(__VA_ARGS__)

◆ vremu_vv_u16m2

#define vremu_vv_u16m2 ( ... ) __riscv_vremu_vv_u16m2(__VA_ARGS__)

◆ vremu_vv_u16m2_m

#define vremu_vv_u16m2_m ( ... ) __riscv_vremu_vv_u16m2_tumu(__VA_ARGS__)

◆ vremu_vv_u16m4

#define vremu_vv_u16m4 ( ... ) __riscv_vremu_vv_u16m4(__VA_ARGS__)

◆ vremu_vv_u16m4_m

#define vremu_vv_u16m4_m ( ... ) __riscv_vremu_vv_u16m4_tumu(__VA_ARGS__)

◆ vremu_vv_u16m8

#define vremu_vv_u16m8 ( ... ) __riscv_vremu_vv_u16m8(__VA_ARGS__)

◆ vremu_vv_u16m8_m

#define vremu_vv_u16m8_m ( ... ) __riscv_vremu_vv_u16m8_tumu(__VA_ARGS__)

◆ vremu_vv_u16mf2

#define vremu_vv_u16mf2 ( ... ) __riscv_vremu_vv_u16mf2(__VA_ARGS__)

◆ vremu_vv_u16mf2_m

#define vremu_vv_u16mf2_m ( ... ) __riscv_vremu_vv_u16mf2_tumu(__VA_ARGS__)

◆ vremu_vv_u16mf4

#define vremu_vv_u16mf4 ( ... ) __riscv_vremu_vv_u16mf4(__VA_ARGS__)

◆ vremu_vv_u16mf4_m

#define vremu_vv_u16mf4_m ( ... ) __riscv_vremu_vv_u16mf4_tumu(__VA_ARGS__)

◆ vremu_vv_u32m1

#define vremu_vv_u32m1 ( ... ) __riscv_vremu_vv_u32m1(__VA_ARGS__)

◆ vremu_vv_u32m1_m

#define vremu_vv_u32m1_m ( ... ) __riscv_vremu_vv_u32m1_tumu(__VA_ARGS__)

◆ vremu_vv_u32m2

#define vremu_vv_u32m2 ( ... ) __riscv_vremu_vv_u32m2(__VA_ARGS__)

◆ vremu_vv_u32m2_m

#define vremu_vv_u32m2_m ( ... ) __riscv_vremu_vv_u32m2_tumu(__VA_ARGS__)

◆ vremu_vv_u32m4

#define vremu_vv_u32m4 ( ... ) __riscv_vremu_vv_u32m4(__VA_ARGS__)

◆ vremu_vv_u32m4_m

#define vremu_vv_u32m4_m ( ... ) __riscv_vremu_vv_u32m4_tumu(__VA_ARGS__)

◆ vremu_vv_u32m8

#define vremu_vv_u32m8 ( ... ) __riscv_vremu_vv_u32m8(__VA_ARGS__)

◆ vremu_vv_u32m8_m

#define vremu_vv_u32m8_m ( ... ) __riscv_vremu_vv_u32m8_tumu(__VA_ARGS__)

◆ vremu_vv_u32mf2

#define vremu_vv_u32mf2 ( ... ) __riscv_vremu_vv_u32mf2(__VA_ARGS__)

◆ vremu_vv_u32mf2_m

#define vremu_vv_u32mf2_m ( ... ) __riscv_vremu_vv_u32mf2_tumu(__VA_ARGS__)

◆ vremu_vv_u64m1

#define vremu_vv_u64m1 ( ... ) __riscv_vremu_vv_u64m1(__VA_ARGS__)

◆ vremu_vv_u64m1_m

#define vremu_vv_u64m1_m ( ... ) __riscv_vremu_vv_u64m1_tumu(__VA_ARGS__)

◆ vremu_vv_u64m2

#define vremu_vv_u64m2 ( ... ) __riscv_vremu_vv_u64m2(__VA_ARGS__)

◆ vremu_vv_u64m2_m

#define vremu_vv_u64m2_m ( ... ) __riscv_vremu_vv_u64m2_tumu(__VA_ARGS__)

◆ vremu_vv_u64m4

#define vremu_vv_u64m4 ( ... ) __riscv_vremu_vv_u64m4(__VA_ARGS__)

◆ vremu_vv_u64m4_m

#define vremu_vv_u64m4_m ( ... ) __riscv_vremu_vv_u64m4_tumu(__VA_ARGS__)

◆ vremu_vv_u64m8

#define vremu_vv_u64m8 ( ... ) __riscv_vremu_vv_u64m8(__VA_ARGS__)

◆ vremu_vv_u64m8_m

#define vremu_vv_u64m8_m ( ... ) __riscv_vremu_vv_u64m8_tumu(__VA_ARGS__)

◆ vremu_vv_u8m1

#define vremu_vv_u8m1 ( ... ) __riscv_vremu_vv_u8m1(__VA_ARGS__)

◆ vremu_vv_u8m1_m

#define vremu_vv_u8m1_m ( ... ) __riscv_vremu_vv_u8m1_tumu(__VA_ARGS__)

◆ vremu_vv_u8m2

#define vremu_vv_u8m2 ( ... ) __riscv_vremu_vv_u8m2(__VA_ARGS__)

◆ vremu_vv_u8m2_m

#define vremu_vv_u8m2_m ( ... ) __riscv_vremu_vv_u8m2_tumu(__VA_ARGS__)

◆ vremu_vv_u8m4

#define vremu_vv_u8m4 ( ... ) __riscv_vremu_vv_u8m4(__VA_ARGS__)

◆ vremu_vv_u8m4_m

#define vremu_vv_u8m4_m ( ... ) __riscv_vremu_vv_u8m4_tumu(__VA_ARGS__)

◆ vremu_vv_u8m8

#define vremu_vv_u8m8 ( ... ) __riscv_vremu_vv_u8m8(__VA_ARGS__)

◆ vremu_vv_u8m8_m

#define vremu_vv_u8m8_m ( ... ) __riscv_vremu_vv_u8m8_tumu(__VA_ARGS__)

◆ vremu_vv_u8mf2

#define vremu_vv_u8mf2 ( ... ) __riscv_vremu_vv_u8mf2(__VA_ARGS__)

◆ vremu_vv_u8mf2_m

#define vremu_vv_u8mf2_m ( ... ) __riscv_vremu_vv_u8mf2_tumu(__VA_ARGS__)

◆ vremu_vv_u8mf4

#define vremu_vv_u8mf4 ( ... ) __riscv_vremu_vv_u8mf4(__VA_ARGS__)

◆ vremu_vv_u8mf4_m

#define vremu_vv_u8mf4_m ( ... ) __riscv_vremu_vv_u8mf4_tumu(__VA_ARGS__)

◆ vremu_vv_u8mf8

#define vremu_vv_u8mf8 ( ... ) __riscv_vremu_vv_u8mf8(__VA_ARGS__)

◆ vremu_vv_u8mf8_m

#define vremu_vv_u8mf8_m ( ... ) __riscv_vremu_vv_u8mf8_tumu(__VA_ARGS__)

◆ vremu_vx_u16m1

#define vremu_vx_u16m1 ( ... ) __riscv_vremu_vx_u16m1(__VA_ARGS__)

◆ vremu_vx_u16m1_m

#define vremu_vx_u16m1_m ( ... ) __riscv_vremu_vx_u16m1_tumu(__VA_ARGS__)

◆ vremu_vx_u16m2

#define vremu_vx_u16m2 ( ... ) __riscv_vremu_vx_u16m2(__VA_ARGS__)

◆ vremu_vx_u16m2_m

#define vremu_vx_u16m2_m ( ... ) __riscv_vremu_vx_u16m2_tumu(__VA_ARGS__)

◆ vremu_vx_u16m4

#define vremu_vx_u16m4 ( ... ) __riscv_vremu_vx_u16m4(__VA_ARGS__)

◆ vremu_vx_u16m4_m

#define vremu_vx_u16m4_m ( ... ) __riscv_vremu_vx_u16m4_tumu(__VA_ARGS__)

◆ vremu_vx_u16m8

#define vremu_vx_u16m8 ( ... ) __riscv_vremu_vx_u16m8(__VA_ARGS__)

◆ vremu_vx_u16m8_m

#define vremu_vx_u16m8_m ( ... ) __riscv_vremu_vx_u16m8_tumu(__VA_ARGS__)

◆ vremu_vx_u16mf2

#define vremu_vx_u16mf2 ( ... ) __riscv_vremu_vx_u16mf2(__VA_ARGS__)

◆ vremu_vx_u16mf2_m

#define vremu_vx_u16mf2_m ( ... ) __riscv_vremu_vx_u16mf2_tumu(__VA_ARGS__)

◆ vremu_vx_u16mf4

#define vremu_vx_u16mf4 ( ... ) __riscv_vremu_vx_u16mf4(__VA_ARGS__)

◆ vremu_vx_u16mf4_m

#define vremu_vx_u16mf4_m ( ... ) __riscv_vremu_vx_u16mf4_tumu(__VA_ARGS__)

◆ vremu_vx_u32m1

#define vremu_vx_u32m1 ( ... ) __riscv_vremu_vx_u32m1(__VA_ARGS__)

◆ vremu_vx_u32m1_m

#define vremu_vx_u32m1_m ( ... ) __riscv_vremu_vx_u32m1_tumu(__VA_ARGS__)

◆ vremu_vx_u32m2

#define vremu_vx_u32m2 ( ... ) __riscv_vremu_vx_u32m2(__VA_ARGS__)

◆ vremu_vx_u32m2_m

#define vremu_vx_u32m2_m ( ... ) __riscv_vremu_vx_u32m2_tumu(__VA_ARGS__)

◆ vremu_vx_u32m4

#define vremu_vx_u32m4 ( ... ) __riscv_vremu_vx_u32m4(__VA_ARGS__)

◆ vremu_vx_u32m4_m

#define vremu_vx_u32m4_m ( ... ) __riscv_vremu_vx_u32m4_tumu(__VA_ARGS__)

◆ vremu_vx_u32m8

#define vremu_vx_u32m8 ( ... ) __riscv_vremu_vx_u32m8(__VA_ARGS__)

◆ vremu_vx_u32m8_m

#define vremu_vx_u32m8_m ( ... ) __riscv_vremu_vx_u32m8_tumu(__VA_ARGS__)

◆ vremu_vx_u32mf2

#define vremu_vx_u32mf2 ( ... ) __riscv_vremu_vx_u32mf2(__VA_ARGS__)

◆ vremu_vx_u32mf2_m

#define vremu_vx_u32mf2_m ( ... ) __riscv_vremu_vx_u32mf2_tumu(__VA_ARGS__)

◆ vremu_vx_u64m1

#define vremu_vx_u64m1 ( ... ) __riscv_vremu_vx_u64m1(__VA_ARGS__)

◆ vremu_vx_u64m1_m

#define vremu_vx_u64m1_m ( ... ) __riscv_vremu_vx_u64m1_tumu(__VA_ARGS__)

◆ vremu_vx_u64m2

#define vremu_vx_u64m2 ( ... ) __riscv_vremu_vx_u64m2(__VA_ARGS__)

◆ vremu_vx_u64m2_m

#define vremu_vx_u64m2_m ( ... ) __riscv_vremu_vx_u64m2_tumu(__VA_ARGS__)

◆ vremu_vx_u64m4

#define vremu_vx_u64m4 ( ... ) __riscv_vremu_vx_u64m4(__VA_ARGS__)

◆ vremu_vx_u64m4_m

#define vremu_vx_u64m4_m ( ... ) __riscv_vremu_vx_u64m4_tumu(__VA_ARGS__)

◆ vremu_vx_u64m8

#define vremu_vx_u64m8 ( ... ) __riscv_vremu_vx_u64m8(__VA_ARGS__)

◆ vremu_vx_u64m8_m

#define vremu_vx_u64m8_m ( ... ) __riscv_vremu_vx_u64m8_tumu(__VA_ARGS__)

◆ vremu_vx_u8m1

#define vremu_vx_u8m1 ( ... ) __riscv_vremu_vx_u8m1(__VA_ARGS__)

◆ vremu_vx_u8m1_m

#define vremu_vx_u8m1_m ( ... ) __riscv_vremu_vx_u8m1_tumu(__VA_ARGS__)

◆ vremu_vx_u8m2

#define vremu_vx_u8m2 ( ... ) __riscv_vremu_vx_u8m2(__VA_ARGS__)

◆ vremu_vx_u8m2_m

#define vremu_vx_u8m2_m ( ... ) __riscv_vremu_vx_u8m2_tumu(__VA_ARGS__)

◆ vremu_vx_u8m4

#define vremu_vx_u8m4 ( ... ) __riscv_vremu_vx_u8m4(__VA_ARGS__)

◆ vremu_vx_u8m4_m

#define vremu_vx_u8m4_m ( ... ) __riscv_vremu_vx_u8m4_tumu(__VA_ARGS__)

◆ vremu_vx_u8m8

#define vremu_vx_u8m8 ( ... ) __riscv_vremu_vx_u8m8(__VA_ARGS__)

◆ vremu_vx_u8m8_m

#define vremu_vx_u8m8_m ( ... ) __riscv_vremu_vx_u8m8_tumu(__VA_ARGS__)

◆ vremu_vx_u8mf2

#define vremu_vx_u8mf2 ( ... ) __riscv_vremu_vx_u8mf2(__VA_ARGS__)

◆ vremu_vx_u8mf2_m

#define vremu_vx_u8mf2_m ( ... ) __riscv_vremu_vx_u8mf2_tumu(__VA_ARGS__)

◆ vremu_vx_u8mf4

#define vremu_vx_u8mf4 ( ... ) __riscv_vremu_vx_u8mf4(__VA_ARGS__)

◆ vremu_vx_u8mf4_m

#define vremu_vx_u8mf4_m ( ... ) __riscv_vremu_vx_u8mf4_tumu(__VA_ARGS__)

◆ vremu_vx_u8mf8

#define vremu_vx_u8mf8 ( ... ) __riscv_vremu_vx_u8mf8(__VA_ARGS__)

◆ vremu_vx_u8mf8_m

#define vremu_vx_u8mf8_m ( ... ) __riscv_vremu_vx_u8mf8_tumu(__VA_ARGS__)

◆ vrgather_vv_f16m1

#define vrgather_vv_f16m1 ( ... ) __riscv_vrgather_vv_f16m1(__VA_ARGS__)

◆ vrgather_vv_f16m1_m

#define vrgather_vv_f16m1_m ( ... ) __riscv_vrgather_vv_f16m1_tumu(__VA_ARGS__)

◆ vrgather_vv_f16m2

#define vrgather_vv_f16m2 ( ... ) __riscv_vrgather_vv_f16m2(__VA_ARGS__)

◆ vrgather_vv_f16m2_m

#define vrgather_vv_f16m2_m ( ... ) __riscv_vrgather_vv_f16m2_tumu(__VA_ARGS__)

◆ vrgather_vv_f16m4

#define vrgather_vv_f16m4 ( ... ) __riscv_vrgather_vv_f16m4(__VA_ARGS__)

◆ vrgather_vv_f16m4_m

#define vrgather_vv_f16m4_m ( ... ) __riscv_vrgather_vv_f16m4_tumu(__VA_ARGS__)

◆ vrgather_vv_f16m8

#define vrgather_vv_f16m8 ( ... ) __riscv_vrgather_vv_f16m8(__VA_ARGS__)

◆ vrgather_vv_f16m8_m

#define vrgather_vv_f16m8_m ( ... ) __riscv_vrgather_vv_f16m8_tumu(__VA_ARGS__)

◆ vrgather_vv_f16mf2

#define vrgather_vv_f16mf2 ( ... ) __riscv_vrgather_vv_f16mf2(__VA_ARGS__)

◆ vrgather_vv_f16mf2_m

#define vrgather_vv_f16mf2_m ( ... ) __riscv_vrgather_vv_f16mf2_tumu(__VA_ARGS__)

◆ vrgather_vv_f16mf4

#define vrgather_vv_f16mf4 ( ... ) __riscv_vrgather_vv_f16mf4(__VA_ARGS__)

◆ vrgather_vv_f16mf4_m

#define vrgather_vv_f16mf4_m ( ... ) __riscv_vrgather_vv_f16mf4_tumu(__VA_ARGS__)

◆ vrgather_vv_f32m1

#define vrgather_vv_f32m1 ( ... ) __riscv_vrgather_vv_f32m1(__VA_ARGS__)

◆ vrgather_vv_f32m1_m

#define vrgather_vv_f32m1_m ( ... ) __riscv_vrgather_vv_f32m1_tumu(__VA_ARGS__)

◆ vrgather_vv_f32m2

#define vrgather_vv_f32m2 ( ... ) __riscv_vrgather_vv_f32m2(__VA_ARGS__)

◆ vrgather_vv_f32m2_m

#define vrgather_vv_f32m2_m ( ... ) __riscv_vrgather_vv_f32m2_tumu(__VA_ARGS__)

◆ vrgather_vv_f32m4

#define vrgather_vv_f32m4 ( ... ) __riscv_vrgather_vv_f32m4(__VA_ARGS__)

◆ vrgather_vv_f32m4_m

#define vrgather_vv_f32m4_m ( ... ) __riscv_vrgather_vv_f32m4_tumu(__VA_ARGS__)

◆ vrgather_vv_f32m8

#define vrgather_vv_f32m8 ( ... ) __riscv_vrgather_vv_f32m8(__VA_ARGS__)

◆ vrgather_vv_f32m8_m

#define vrgather_vv_f32m8_m ( ... ) __riscv_vrgather_vv_f32m8_tumu(__VA_ARGS__)

◆ vrgather_vv_f32mf2

#define vrgather_vv_f32mf2 ( ... ) __riscv_vrgather_vv_f32mf2(__VA_ARGS__)

◆ vrgather_vv_f32mf2_m

#define vrgather_vv_f32mf2_m ( ... ) __riscv_vrgather_vv_f32mf2_tumu(__VA_ARGS__)

◆ vrgather_vv_f64m1

#define vrgather_vv_f64m1 ( ... ) __riscv_vrgather_vv_f64m1(__VA_ARGS__)

◆ vrgather_vv_f64m1_m

#define vrgather_vv_f64m1_m ( ... ) __riscv_vrgather_vv_f64m1_tumu(__VA_ARGS__)

◆ vrgather_vv_f64m2

#define vrgather_vv_f64m2 ( ... ) __riscv_vrgather_vv_f64m2(__VA_ARGS__)

◆ vrgather_vv_f64m2_m

#define vrgather_vv_f64m2_m ( ... ) __riscv_vrgather_vv_f64m2_tumu(__VA_ARGS__)

◆ vrgather_vv_f64m4

#define vrgather_vv_f64m4 ( ... ) __riscv_vrgather_vv_f64m4(__VA_ARGS__)

◆ vrgather_vv_f64m4_m

#define vrgather_vv_f64m4_m ( ... ) __riscv_vrgather_vv_f64m4_tumu(__VA_ARGS__)

◆ vrgather_vv_f64m8

#define vrgather_vv_f64m8 ( ... ) __riscv_vrgather_vv_f64m8(__VA_ARGS__)

◆ vrgather_vv_f64m8_m

#define vrgather_vv_f64m8_m ( ... ) __riscv_vrgather_vv_f64m8_tumu(__VA_ARGS__)

◆ vrgather_vv_i16m1

#define vrgather_vv_i16m1 ( ... ) __riscv_vrgather_vv_i16m1(__VA_ARGS__)

◆ vrgather_vv_i16m1_m

#define vrgather_vv_i16m1_m ( ... ) __riscv_vrgather_vv_i16m1_tumu(__VA_ARGS__)

◆ vrgather_vv_i16m2

#define vrgather_vv_i16m2 ( ... ) __riscv_vrgather_vv_i16m2(__VA_ARGS__)

◆ vrgather_vv_i16m2_m

#define vrgather_vv_i16m2_m ( ... ) __riscv_vrgather_vv_i16m2_tumu(__VA_ARGS__)

◆ vrgather_vv_i16m4

#define vrgather_vv_i16m4 ( ... ) __riscv_vrgather_vv_i16m4(__VA_ARGS__)

◆ vrgather_vv_i16m4_m

#define vrgather_vv_i16m4_m ( ... ) __riscv_vrgather_vv_i16m4_tumu(__VA_ARGS__)

◆ vrgather_vv_i16m8

#define vrgather_vv_i16m8 ( ... ) __riscv_vrgather_vv_i16m8(__VA_ARGS__)

◆ vrgather_vv_i16m8_m

#define vrgather_vv_i16m8_m ( ... ) __riscv_vrgather_vv_i16m8_tumu(__VA_ARGS__)

◆ vrgather_vv_i16mf2

#define vrgather_vv_i16mf2 ( ... ) __riscv_vrgather_vv_i16mf2(__VA_ARGS__)

◆ vrgather_vv_i16mf2_m

#define vrgather_vv_i16mf2_m ( ... ) __riscv_vrgather_vv_i16mf2_tumu(__VA_ARGS__)

◆ vrgather_vv_i16mf4

#define vrgather_vv_i16mf4 ( ... ) __riscv_vrgather_vv_i16mf4(__VA_ARGS__)

◆ vrgather_vv_i16mf4_m

#define vrgather_vv_i16mf4_m ( ... ) __riscv_vrgather_vv_i16mf4_tumu(__VA_ARGS__)

◆ vrgather_vv_i32m1

#define vrgather_vv_i32m1 ( ... ) __riscv_vrgather_vv_i32m1(__VA_ARGS__)

◆ vrgather_vv_i32m1_m

#define vrgather_vv_i32m1_m ( ... ) __riscv_vrgather_vv_i32m1_tumu(__VA_ARGS__)

◆ vrgather_vv_i32m2

#define vrgather_vv_i32m2 ( ... ) __riscv_vrgather_vv_i32m2(__VA_ARGS__)

◆ vrgather_vv_i32m2_m

#define vrgather_vv_i32m2_m ( ... ) __riscv_vrgather_vv_i32m2_tumu(__VA_ARGS__)

◆ vrgather_vv_i32m4

#define vrgather_vv_i32m4 ( ... ) __riscv_vrgather_vv_i32m4(__VA_ARGS__)

◆ vrgather_vv_i32m4_m

#define vrgather_vv_i32m4_m ( ... ) __riscv_vrgather_vv_i32m4_tumu(__VA_ARGS__)

◆ vrgather_vv_i32m8

#define vrgather_vv_i32m8 ( ... ) __riscv_vrgather_vv_i32m8(__VA_ARGS__)

◆ vrgather_vv_i32m8_m

#define vrgather_vv_i32m8_m ( ... ) __riscv_vrgather_vv_i32m8_tumu(__VA_ARGS__)

◆ vrgather_vv_i32mf2

#define vrgather_vv_i32mf2 ( ... ) __riscv_vrgather_vv_i32mf2(__VA_ARGS__)

◆ vrgather_vv_i32mf2_m

#define vrgather_vv_i32mf2_m ( ... ) __riscv_vrgather_vv_i32mf2_tumu(__VA_ARGS__)

◆ vrgather_vv_i64m1

#define vrgather_vv_i64m1 ( ... ) __riscv_vrgather_vv_i64m1(__VA_ARGS__)

◆ vrgather_vv_i64m1_m

#define vrgather_vv_i64m1_m ( ... ) __riscv_vrgather_vv_i64m1_tumu(__VA_ARGS__)

◆ vrgather_vv_i64m2

#define vrgather_vv_i64m2 ( ... ) __riscv_vrgather_vv_i64m2(__VA_ARGS__)

◆ vrgather_vv_i64m2_m

#define vrgather_vv_i64m2_m ( ... ) __riscv_vrgather_vv_i64m2_tumu(__VA_ARGS__)

◆ vrgather_vv_i64m4

#define vrgather_vv_i64m4 ( ... ) __riscv_vrgather_vv_i64m4(__VA_ARGS__)

◆ vrgather_vv_i64m4_m

#define vrgather_vv_i64m4_m ( ... ) __riscv_vrgather_vv_i64m4_tumu(__VA_ARGS__)

◆ vrgather_vv_i64m8

#define vrgather_vv_i64m8 ( ... ) __riscv_vrgather_vv_i64m8(__VA_ARGS__)

◆ vrgather_vv_i64m8_m

#define vrgather_vv_i64m8_m ( ... ) __riscv_vrgather_vv_i64m8_tumu(__VA_ARGS__)

◆ vrgather_vv_i8m1

#define vrgather_vv_i8m1 ( ... ) __riscv_vrgather_vv_i8m1(__VA_ARGS__)

◆ vrgather_vv_i8m1_m

#define vrgather_vv_i8m1_m ( ... ) __riscv_vrgather_vv_i8m1_tumu(__VA_ARGS__)

◆ vrgather_vv_i8m2

#define vrgather_vv_i8m2 ( ... ) __riscv_vrgather_vv_i8m2(__VA_ARGS__)

◆ vrgather_vv_i8m2_m

#define vrgather_vv_i8m2_m ( ... ) __riscv_vrgather_vv_i8m2_tumu(__VA_ARGS__)

◆ vrgather_vv_i8m4

#define vrgather_vv_i8m4 ( ... ) __riscv_vrgather_vv_i8m4(__VA_ARGS__)

◆ vrgather_vv_i8m4_m

#define vrgather_vv_i8m4_m ( ... ) __riscv_vrgather_vv_i8m4_tumu(__VA_ARGS__)

◆ vrgather_vv_i8m8

#define vrgather_vv_i8m8 ( ... ) __riscv_vrgather_vv_i8m8(__VA_ARGS__)

◆ vrgather_vv_i8m8_m

#define vrgather_vv_i8m8_m ( ... ) __riscv_vrgather_vv_i8m8_tumu(__VA_ARGS__)

◆ vrgather_vv_i8mf2

#define vrgather_vv_i8mf2 ( ... ) __riscv_vrgather_vv_i8mf2(__VA_ARGS__)

◆ vrgather_vv_i8mf2_m

#define vrgather_vv_i8mf2_m ( ... ) __riscv_vrgather_vv_i8mf2_tumu(__VA_ARGS__)

◆ vrgather_vv_i8mf4

#define vrgather_vv_i8mf4 ( ... ) __riscv_vrgather_vv_i8mf4(__VA_ARGS__)

◆ vrgather_vv_i8mf4_m

#define vrgather_vv_i8mf4_m ( ... ) __riscv_vrgather_vv_i8mf4_tumu(__VA_ARGS__)

◆ vrgather_vv_i8mf8

#define vrgather_vv_i8mf8 ( ... ) __riscv_vrgather_vv_i8mf8(__VA_ARGS__)

◆ vrgather_vv_i8mf8_m

#define vrgather_vv_i8mf8_m ( ... ) __riscv_vrgather_vv_i8mf8_tumu(__VA_ARGS__)

◆ vrgather_vv_u16m1

#define vrgather_vv_u16m1 ( ... ) __riscv_vrgather_vv_u16m1(__VA_ARGS__)

◆ vrgather_vv_u16m1_m

#define vrgather_vv_u16m1_m ( ... ) __riscv_vrgather_vv_u16m1_tumu(__VA_ARGS__)

◆ vrgather_vv_u16m2

#define vrgather_vv_u16m2 ( ... ) __riscv_vrgather_vv_u16m2(__VA_ARGS__)

◆ vrgather_vv_u16m2_m

#define vrgather_vv_u16m2_m ( ... ) __riscv_vrgather_vv_u16m2_tumu(__VA_ARGS__)

◆ vrgather_vv_u16m4

#define vrgather_vv_u16m4 ( ... ) __riscv_vrgather_vv_u16m4(__VA_ARGS__)

◆ vrgather_vv_u16m4_m

#define vrgather_vv_u16m4_m ( ... ) __riscv_vrgather_vv_u16m4_tumu(__VA_ARGS__)

◆ vrgather_vv_u16m8

#define vrgather_vv_u16m8 ( ... ) __riscv_vrgather_vv_u16m8(__VA_ARGS__)

◆ vrgather_vv_u16m8_m

#define vrgather_vv_u16m8_m ( ... ) __riscv_vrgather_vv_u16m8_tumu(__VA_ARGS__)

◆ vrgather_vv_u16mf2

#define vrgather_vv_u16mf2 ( ... ) __riscv_vrgather_vv_u16mf2(__VA_ARGS__)

◆ vrgather_vv_u16mf2_m

#define vrgather_vv_u16mf2_m ( ... ) __riscv_vrgather_vv_u16mf2_tumu(__VA_ARGS__)

◆ vrgather_vv_u16mf4

#define vrgather_vv_u16mf4 ( ... ) __riscv_vrgather_vv_u16mf4(__VA_ARGS__)

◆ vrgather_vv_u16mf4_m

#define vrgather_vv_u16mf4_m ( ... ) __riscv_vrgather_vv_u16mf4_tumu(__VA_ARGS__)

◆ vrgather_vv_u32m1

#define vrgather_vv_u32m1 ( ... ) __riscv_vrgather_vv_u32m1(__VA_ARGS__)

◆ vrgather_vv_u32m1_m

#define vrgather_vv_u32m1_m ( ... ) __riscv_vrgather_vv_u32m1_tumu(__VA_ARGS__)

◆ vrgather_vv_u32m2

#define vrgather_vv_u32m2 ( ... ) __riscv_vrgather_vv_u32m2(__VA_ARGS__)

◆ vrgather_vv_u32m2_m

#define vrgather_vv_u32m2_m ( ... ) __riscv_vrgather_vv_u32m2_tumu(__VA_ARGS__)

◆ vrgather_vv_u32m4

#define vrgather_vv_u32m4 ( ... ) __riscv_vrgather_vv_u32m4(__VA_ARGS__)

◆ vrgather_vv_u32m4_m

#define vrgather_vv_u32m4_m ( ... ) __riscv_vrgather_vv_u32m4_tumu(__VA_ARGS__)

◆ vrgather_vv_u32m8

#define vrgather_vv_u32m8 ( ... ) __riscv_vrgather_vv_u32m8(__VA_ARGS__)

◆ vrgather_vv_u32m8_m

#define vrgather_vv_u32m8_m ( ... ) __riscv_vrgather_vv_u32m8_tumu(__VA_ARGS__)

◆ vrgather_vv_u32mf2

#define vrgather_vv_u32mf2 ( ... ) __riscv_vrgather_vv_u32mf2(__VA_ARGS__)

◆ vrgather_vv_u32mf2_m

#define vrgather_vv_u32mf2_m ( ... ) __riscv_vrgather_vv_u32mf2_tumu(__VA_ARGS__)

◆ vrgather_vv_u64m1

#define vrgather_vv_u64m1 ( ... ) __riscv_vrgather_vv_u64m1(__VA_ARGS__)

◆ vrgather_vv_u64m1_m

#define vrgather_vv_u64m1_m ( ... ) __riscv_vrgather_vv_u64m1_tumu(__VA_ARGS__)

◆ vrgather_vv_u64m2

#define vrgather_vv_u64m2 ( ... ) __riscv_vrgather_vv_u64m2(__VA_ARGS__)

◆ vrgather_vv_u64m2_m

#define vrgather_vv_u64m2_m ( ... ) __riscv_vrgather_vv_u64m2_tumu(__VA_ARGS__)

◆ vrgather_vv_u64m4

#define vrgather_vv_u64m4 ( ... ) __riscv_vrgather_vv_u64m4(__VA_ARGS__)

◆ vrgather_vv_u64m4_m

#define vrgather_vv_u64m4_m ( ... ) __riscv_vrgather_vv_u64m4_tumu(__VA_ARGS__)

◆ vrgather_vv_u64m8

#define vrgather_vv_u64m8 ( ... ) __riscv_vrgather_vv_u64m8(__VA_ARGS__)

◆ vrgather_vv_u64m8_m

#define vrgather_vv_u64m8_m ( ... ) __riscv_vrgather_vv_u64m8_tumu(__VA_ARGS__)

◆ vrgather_vv_u8m1

#define vrgather_vv_u8m1 ( ... ) __riscv_vrgather_vv_u8m1(__VA_ARGS__)

◆ vrgather_vv_u8m1_m

#define vrgather_vv_u8m1_m ( ... ) __riscv_vrgather_vv_u8m1_tumu(__VA_ARGS__)

◆ vrgather_vv_u8m2

#define vrgather_vv_u8m2 ( ... ) __riscv_vrgather_vv_u8m2(__VA_ARGS__)

◆ vrgather_vv_u8m2_m

#define vrgather_vv_u8m2_m ( ... ) __riscv_vrgather_vv_u8m2_tumu(__VA_ARGS__)

◆ vrgather_vv_u8m4

#define vrgather_vv_u8m4 ( ... ) __riscv_vrgather_vv_u8m4(__VA_ARGS__)

◆ vrgather_vv_u8m4_m

#define vrgather_vv_u8m4_m ( ... ) __riscv_vrgather_vv_u8m4_tumu(__VA_ARGS__)

◆ vrgather_vv_u8m8

#define vrgather_vv_u8m8 ( ... ) __riscv_vrgather_vv_u8m8(__VA_ARGS__)

◆ vrgather_vv_u8m8_m

#define vrgather_vv_u8m8_m ( ... ) __riscv_vrgather_vv_u8m8_tumu(__VA_ARGS__)

◆ vrgather_vv_u8mf2

#define vrgather_vv_u8mf2 ( ... ) __riscv_vrgather_vv_u8mf2(__VA_ARGS__)

◆ vrgather_vv_u8mf2_m

#define vrgather_vv_u8mf2_m ( ... ) __riscv_vrgather_vv_u8mf2_tumu(__VA_ARGS__)

◆ vrgather_vv_u8mf4

#define vrgather_vv_u8mf4 ( ... ) __riscv_vrgather_vv_u8mf4(__VA_ARGS__)

◆ vrgather_vv_u8mf4_m

#define vrgather_vv_u8mf4_m ( ... ) __riscv_vrgather_vv_u8mf4_tumu(__VA_ARGS__)

◆ vrgather_vv_u8mf8

#define vrgather_vv_u8mf8 ( ... ) __riscv_vrgather_vv_u8mf8(__VA_ARGS__)

◆ vrgather_vv_u8mf8_m

#define vrgather_vv_u8mf8_m ( ... ) __riscv_vrgather_vv_u8mf8_tumu(__VA_ARGS__)

◆ vrgather_vx_f16m1

#define vrgather_vx_f16m1 ( ... ) __riscv_vrgather_vx_f16m1(__VA_ARGS__)

◆ vrgather_vx_f16m1_m

#define vrgather_vx_f16m1_m ( ... ) __riscv_vrgather_vx_f16m1_tumu(__VA_ARGS__)

◆ vrgather_vx_f16m2

#define vrgather_vx_f16m2 ( ... ) __riscv_vrgather_vx_f16m2(__VA_ARGS__)

◆ vrgather_vx_f16m2_m

#define vrgather_vx_f16m2_m ( ... ) __riscv_vrgather_vx_f16m2_tumu(__VA_ARGS__)

◆ vrgather_vx_f16m4

#define vrgather_vx_f16m4 ( ... ) __riscv_vrgather_vx_f16m4(__VA_ARGS__)

◆ vrgather_vx_f16m4_m

#define vrgather_vx_f16m4_m ( ... ) __riscv_vrgather_vx_f16m4_tumu(__VA_ARGS__)

◆ vrgather_vx_f16m8

#define vrgather_vx_f16m8 ( ... ) __riscv_vrgather_vx_f16m8(__VA_ARGS__)

◆ vrgather_vx_f16m8_m

#define vrgather_vx_f16m8_m ( ... ) __riscv_vrgather_vx_f16m8_tumu(__VA_ARGS__)

◆ vrgather_vx_f16mf2

#define vrgather_vx_f16mf2 ( ... ) __riscv_vrgather_vx_f16mf2(__VA_ARGS__)

◆ vrgather_vx_f16mf2_m

#define vrgather_vx_f16mf2_m ( ... ) __riscv_vrgather_vx_f16mf2_tumu(__VA_ARGS__)

◆ vrgather_vx_f16mf4

#define vrgather_vx_f16mf4 ( ... ) __riscv_vrgather_vx_f16mf4(__VA_ARGS__)

◆ vrgather_vx_f16mf4_m

#define vrgather_vx_f16mf4_m ( ... ) __riscv_vrgather_vx_f16mf4_tumu(__VA_ARGS__)

◆ vrgather_vx_f32m1

#define vrgather_vx_f32m1 ( ... ) __riscv_vrgather_vx_f32m1(__VA_ARGS__)

◆ vrgather_vx_f32m1_m

#define vrgather_vx_f32m1_m ( ... ) __riscv_vrgather_vx_f32m1_tumu(__VA_ARGS__)

◆ vrgather_vx_f32m2

#define vrgather_vx_f32m2 ( ... ) __riscv_vrgather_vx_f32m2(__VA_ARGS__)

◆ vrgather_vx_f32m2_m

#define vrgather_vx_f32m2_m ( ... ) __riscv_vrgather_vx_f32m2_tumu(__VA_ARGS__)

◆ vrgather_vx_f32m4

#define vrgather_vx_f32m4 ( ... ) __riscv_vrgather_vx_f32m4(__VA_ARGS__)

◆ vrgather_vx_f32m4_m

#define vrgather_vx_f32m4_m ( ... ) __riscv_vrgather_vx_f32m4_tumu(__VA_ARGS__)

◆ vrgather_vx_f32m8

#define vrgather_vx_f32m8 ( ... ) __riscv_vrgather_vx_f32m8(__VA_ARGS__)

◆ vrgather_vx_f32m8_m

#define vrgather_vx_f32m8_m ( ... ) __riscv_vrgather_vx_f32m8_tumu(__VA_ARGS__)

◆ vrgather_vx_f32mf2

#define vrgather_vx_f32mf2 ( ... ) __riscv_vrgather_vx_f32mf2(__VA_ARGS__)

◆ vrgather_vx_f32mf2_m

#define vrgather_vx_f32mf2_m ( ... ) __riscv_vrgather_vx_f32mf2_tumu(__VA_ARGS__)

◆ vrgather_vx_f64m1

#define vrgather_vx_f64m1 ( ... ) __riscv_vrgather_vx_f64m1(__VA_ARGS__)

◆ vrgather_vx_f64m1_m

#define vrgather_vx_f64m1_m ( ... ) __riscv_vrgather_vx_f64m1_tumu(__VA_ARGS__)

◆ vrgather_vx_f64m2

#define vrgather_vx_f64m2 ( ... ) __riscv_vrgather_vx_f64m2(__VA_ARGS__)

◆ vrgather_vx_f64m2_m

#define vrgather_vx_f64m2_m ( ... ) __riscv_vrgather_vx_f64m2_tumu(__VA_ARGS__)

◆ vrgather_vx_f64m4

#define vrgather_vx_f64m4 ( ... ) __riscv_vrgather_vx_f64m4(__VA_ARGS__)

◆ vrgather_vx_f64m4_m

#define vrgather_vx_f64m4_m ( ... ) __riscv_vrgather_vx_f64m4_tumu(__VA_ARGS__)

◆ vrgather_vx_f64m8

#define vrgather_vx_f64m8 ( ... ) __riscv_vrgather_vx_f64m8(__VA_ARGS__)

◆ vrgather_vx_f64m8_m

#define vrgather_vx_f64m8_m ( ... ) __riscv_vrgather_vx_f64m8_tumu(__VA_ARGS__)

◆ vrgather_vx_i16m1

#define vrgather_vx_i16m1 ( ... ) __riscv_vrgather_vx_i16m1(__VA_ARGS__)

◆ vrgather_vx_i16m1_m

#define vrgather_vx_i16m1_m ( ... ) __riscv_vrgather_vx_i16m1_tumu(__VA_ARGS__)

◆ vrgather_vx_i16m2

#define vrgather_vx_i16m2 ( ... ) __riscv_vrgather_vx_i16m2(__VA_ARGS__)

◆ vrgather_vx_i16m2_m

#define vrgather_vx_i16m2_m ( ... ) __riscv_vrgather_vx_i16m2_tumu(__VA_ARGS__)

◆ vrgather_vx_i16m4

#define vrgather_vx_i16m4 ( ... ) __riscv_vrgather_vx_i16m4(__VA_ARGS__)

◆ vrgather_vx_i16m4_m

#define vrgather_vx_i16m4_m ( ... ) __riscv_vrgather_vx_i16m4_tumu(__VA_ARGS__)

◆ vrgather_vx_i16m8

#define vrgather_vx_i16m8 ( ... ) __riscv_vrgather_vx_i16m8(__VA_ARGS__)

◆ vrgather_vx_i16m8_m

#define vrgather_vx_i16m8_m ( ... ) __riscv_vrgather_vx_i16m8_tumu(__VA_ARGS__)

◆ vrgather_vx_i16mf2

#define vrgather_vx_i16mf2 ( ... ) __riscv_vrgather_vx_i16mf2(__VA_ARGS__)

◆ vrgather_vx_i16mf2_m

#define vrgather_vx_i16mf2_m ( ... ) __riscv_vrgather_vx_i16mf2_tumu(__VA_ARGS__)

◆ vrgather_vx_i16mf4

#define vrgather_vx_i16mf4 ( ... ) __riscv_vrgather_vx_i16mf4(__VA_ARGS__)

◆ vrgather_vx_i16mf4_m

#define vrgather_vx_i16mf4_m ( ... ) __riscv_vrgather_vx_i16mf4_tumu(__VA_ARGS__)

◆ vrgather_vx_i32m1

#define vrgather_vx_i32m1 ( ... ) __riscv_vrgather_vx_i32m1(__VA_ARGS__)

◆ vrgather_vx_i32m1_m

#define vrgather_vx_i32m1_m ( ... ) __riscv_vrgather_vx_i32m1_tumu(__VA_ARGS__)

◆ vrgather_vx_i32m2

#define vrgather_vx_i32m2 ( ... ) __riscv_vrgather_vx_i32m2(__VA_ARGS__)

◆ vrgather_vx_i32m2_m

#define vrgather_vx_i32m2_m ( ... ) __riscv_vrgather_vx_i32m2_tumu(__VA_ARGS__)

◆ vrgather_vx_i32m4

#define vrgather_vx_i32m4 ( ... ) __riscv_vrgather_vx_i32m4(__VA_ARGS__)

◆ vrgather_vx_i32m4_m

#define vrgather_vx_i32m4_m ( ... ) __riscv_vrgather_vx_i32m4_tumu(__VA_ARGS__)

◆ vrgather_vx_i32m8

#define vrgather_vx_i32m8 ( ... ) __riscv_vrgather_vx_i32m8(__VA_ARGS__)

◆ vrgather_vx_i32m8_m

#define vrgather_vx_i32m8_m ( ... ) __riscv_vrgather_vx_i32m8_tumu(__VA_ARGS__)

◆ vrgather_vx_i32mf2

#define vrgather_vx_i32mf2 ( ... ) __riscv_vrgather_vx_i32mf2(__VA_ARGS__)

◆ vrgather_vx_i32mf2_m

#define vrgather_vx_i32mf2_m ( ... ) __riscv_vrgather_vx_i32mf2_tumu(__VA_ARGS__)

◆ vrgather_vx_i64m1

#define vrgather_vx_i64m1 ( ... ) __riscv_vrgather_vx_i64m1(__VA_ARGS__)

◆ vrgather_vx_i64m1_m

#define vrgather_vx_i64m1_m ( ... ) __riscv_vrgather_vx_i64m1_tumu(__VA_ARGS__)

◆ vrgather_vx_i64m2

#define vrgather_vx_i64m2 ( ... ) __riscv_vrgather_vx_i64m2(__VA_ARGS__)

◆ vrgather_vx_i64m2_m

#define vrgather_vx_i64m2_m ( ... ) __riscv_vrgather_vx_i64m2_tumu(__VA_ARGS__)

◆ vrgather_vx_i64m4

#define vrgather_vx_i64m4 ( ... ) __riscv_vrgather_vx_i64m4(__VA_ARGS__)

◆ vrgather_vx_i64m4_m

#define vrgather_vx_i64m4_m ( ... ) __riscv_vrgather_vx_i64m4_tumu(__VA_ARGS__)

◆ vrgather_vx_i64m8

#define vrgather_vx_i64m8 ( ... ) __riscv_vrgather_vx_i64m8(__VA_ARGS__)

◆ vrgather_vx_i64m8_m

#define vrgather_vx_i64m8_m ( ... ) __riscv_vrgather_vx_i64m8_tumu(__VA_ARGS__)

◆ vrgather_vx_i8m1

#define vrgather_vx_i8m1 ( ... ) __riscv_vrgather_vx_i8m1(__VA_ARGS__)

◆ vrgather_vx_i8m1_m

#define vrgather_vx_i8m1_m ( ... ) __riscv_vrgather_vx_i8m1_tumu(__VA_ARGS__)

◆ vrgather_vx_i8m2

#define vrgather_vx_i8m2 ( ... ) __riscv_vrgather_vx_i8m2(__VA_ARGS__)

◆ vrgather_vx_i8m2_m

#define vrgather_vx_i8m2_m ( ... ) __riscv_vrgather_vx_i8m2_tumu(__VA_ARGS__)

◆ vrgather_vx_i8m4

#define vrgather_vx_i8m4 ( ... ) __riscv_vrgather_vx_i8m4(__VA_ARGS__)

◆ vrgather_vx_i8m4_m

#define vrgather_vx_i8m4_m ( ... ) __riscv_vrgather_vx_i8m4_tumu(__VA_ARGS__)

◆ vrgather_vx_i8m8

#define vrgather_vx_i8m8 ( ... ) __riscv_vrgather_vx_i8m8(__VA_ARGS__)

◆ vrgather_vx_i8m8_m

#define vrgather_vx_i8m8_m ( ... ) __riscv_vrgather_vx_i8m8_tumu(__VA_ARGS__)

◆ vrgather_vx_i8mf2

#define vrgather_vx_i8mf2 ( ... ) __riscv_vrgather_vx_i8mf2(__VA_ARGS__)

◆ vrgather_vx_i8mf2_m

#define vrgather_vx_i8mf2_m ( ... ) __riscv_vrgather_vx_i8mf2_tumu(__VA_ARGS__)

◆ vrgather_vx_i8mf4

#define vrgather_vx_i8mf4 ( ... ) __riscv_vrgather_vx_i8mf4(__VA_ARGS__)

◆ vrgather_vx_i8mf4_m

#define vrgather_vx_i8mf4_m ( ... ) __riscv_vrgather_vx_i8mf4_tumu(__VA_ARGS__)

◆ vrgather_vx_i8mf8

#define vrgather_vx_i8mf8 ( ... ) __riscv_vrgather_vx_i8mf8(__VA_ARGS__)

◆ vrgather_vx_i8mf8_m

#define vrgather_vx_i8mf8_m ( ... ) __riscv_vrgather_vx_i8mf8_tumu(__VA_ARGS__)

◆ vrgather_vx_u16m1

#define vrgather_vx_u16m1 ( ... ) __riscv_vrgather_vx_u16m1(__VA_ARGS__)

◆ vrgather_vx_u16m1_m

#define vrgather_vx_u16m1_m ( ... ) __riscv_vrgather_vx_u16m1_tumu(__VA_ARGS__)

◆ vrgather_vx_u16m2

#define vrgather_vx_u16m2 ( ... ) __riscv_vrgather_vx_u16m2(__VA_ARGS__)

◆ vrgather_vx_u16m2_m

#define vrgather_vx_u16m2_m ( ... ) __riscv_vrgather_vx_u16m2_tumu(__VA_ARGS__)

◆ vrgather_vx_u16m4

#define vrgather_vx_u16m4 ( ... ) __riscv_vrgather_vx_u16m4(__VA_ARGS__)

◆ vrgather_vx_u16m4_m

#define vrgather_vx_u16m4_m ( ... ) __riscv_vrgather_vx_u16m4_tumu(__VA_ARGS__)

◆ vrgather_vx_u16m8

#define vrgather_vx_u16m8 ( ... ) __riscv_vrgather_vx_u16m8(__VA_ARGS__)

◆ vrgather_vx_u16m8_m

#define vrgather_vx_u16m8_m ( ... ) __riscv_vrgather_vx_u16m8_tumu(__VA_ARGS__)

◆ vrgather_vx_u16mf2

#define vrgather_vx_u16mf2 ( ... ) __riscv_vrgather_vx_u16mf2(__VA_ARGS__)

◆ vrgather_vx_u16mf2_m

#define vrgather_vx_u16mf2_m ( ... ) __riscv_vrgather_vx_u16mf2_tumu(__VA_ARGS__)

◆ vrgather_vx_u16mf4

#define vrgather_vx_u16mf4 ( ... ) __riscv_vrgather_vx_u16mf4(__VA_ARGS__)

◆ vrgather_vx_u16mf4_m

#define vrgather_vx_u16mf4_m ( ... ) __riscv_vrgather_vx_u16mf4_tumu(__VA_ARGS__)

◆ vrgather_vx_u32m1

#define vrgather_vx_u32m1 ( ... ) __riscv_vrgather_vx_u32m1(__VA_ARGS__)

◆ vrgather_vx_u32m1_m

#define vrgather_vx_u32m1_m ( ... ) __riscv_vrgather_vx_u32m1_tumu(__VA_ARGS__)

◆ vrgather_vx_u32m2

#define vrgather_vx_u32m2 ( ... ) __riscv_vrgather_vx_u32m2(__VA_ARGS__)

◆ vrgather_vx_u32m2_m

#define vrgather_vx_u32m2_m ( ... ) __riscv_vrgather_vx_u32m2_tumu(__VA_ARGS__)

◆ vrgather_vx_u32m4

#define vrgather_vx_u32m4 ( ... ) __riscv_vrgather_vx_u32m4(__VA_ARGS__)

◆ vrgather_vx_u32m4_m

#define vrgather_vx_u32m4_m ( ... ) __riscv_vrgather_vx_u32m4_tumu(__VA_ARGS__)

◆ vrgather_vx_u32m8

#define vrgather_vx_u32m8 ( ... ) __riscv_vrgather_vx_u32m8(__VA_ARGS__)

◆ vrgather_vx_u32m8_m

#define vrgather_vx_u32m8_m ( ... ) __riscv_vrgather_vx_u32m8_tumu(__VA_ARGS__)

◆ vrgather_vx_u32mf2

#define vrgather_vx_u32mf2 ( ... ) __riscv_vrgather_vx_u32mf2(__VA_ARGS__)

◆ vrgather_vx_u32mf2_m

#define vrgather_vx_u32mf2_m ( ... ) __riscv_vrgather_vx_u32mf2_tumu(__VA_ARGS__)

◆ vrgather_vx_u64m1

#define vrgather_vx_u64m1 ( ... ) __riscv_vrgather_vx_u64m1(__VA_ARGS__)

◆ vrgather_vx_u64m1_m

#define vrgather_vx_u64m1_m ( ... ) __riscv_vrgather_vx_u64m1_tumu(__VA_ARGS__)

◆ vrgather_vx_u64m2

#define vrgather_vx_u64m2 ( ... ) __riscv_vrgather_vx_u64m2(__VA_ARGS__)

◆ vrgather_vx_u64m2_m

#define vrgather_vx_u64m2_m ( ... ) __riscv_vrgather_vx_u64m2_tumu(__VA_ARGS__)

◆ vrgather_vx_u64m4

#define vrgather_vx_u64m4 ( ... ) __riscv_vrgather_vx_u64m4(__VA_ARGS__)

◆ vrgather_vx_u64m4_m

#define vrgather_vx_u64m4_m ( ... ) __riscv_vrgather_vx_u64m4_tumu(__VA_ARGS__)

◆ vrgather_vx_u64m8

#define vrgather_vx_u64m8 ( ... ) __riscv_vrgather_vx_u64m8(__VA_ARGS__)

◆ vrgather_vx_u64m8_m

#define vrgather_vx_u64m8_m ( ... ) __riscv_vrgather_vx_u64m8_tumu(__VA_ARGS__)

◆ vrgather_vx_u8m1

#define vrgather_vx_u8m1 ( ... ) __riscv_vrgather_vx_u8m1(__VA_ARGS__)

◆ vrgather_vx_u8m1_m

#define vrgather_vx_u8m1_m ( ... ) __riscv_vrgather_vx_u8m1_tumu(__VA_ARGS__)

◆ vrgather_vx_u8m2

#define vrgather_vx_u8m2 ( ... ) __riscv_vrgather_vx_u8m2(__VA_ARGS__)

◆ vrgather_vx_u8m2_m

#define vrgather_vx_u8m2_m ( ... ) __riscv_vrgather_vx_u8m2_tumu(__VA_ARGS__)

◆ vrgather_vx_u8m4

#define vrgather_vx_u8m4 ( ... ) __riscv_vrgather_vx_u8m4(__VA_ARGS__)

◆ vrgather_vx_u8m4_m

#define vrgather_vx_u8m4_m ( ... ) __riscv_vrgather_vx_u8m4_tumu(__VA_ARGS__)

◆ vrgather_vx_u8m8

#define vrgather_vx_u8m8 ( ... ) __riscv_vrgather_vx_u8m8(__VA_ARGS__)

◆ vrgather_vx_u8m8_m

#define vrgather_vx_u8m8_m ( ... ) __riscv_vrgather_vx_u8m8_tumu(__VA_ARGS__)

◆ vrgather_vx_u8mf2

#define vrgather_vx_u8mf2 ( ... ) __riscv_vrgather_vx_u8mf2(__VA_ARGS__)

◆ vrgather_vx_u8mf2_m

#define vrgather_vx_u8mf2_m ( ... ) __riscv_vrgather_vx_u8mf2_tumu(__VA_ARGS__)

◆ vrgather_vx_u8mf4

#define vrgather_vx_u8mf4 ( ... ) __riscv_vrgather_vx_u8mf4(__VA_ARGS__)

◆ vrgather_vx_u8mf4_m

#define vrgather_vx_u8mf4_m ( ... ) __riscv_vrgather_vx_u8mf4_tumu(__VA_ARGS__)

◆ vrgather_vx_u8mf8

#define vrgather_vx_u8mf8 ( ... ) __riscv_vrgather_vx_u8mf8(__VA_ARGS__)

◆ vrgather_vx_u8mf8_m

#define vrgather_vx_u8mf8_m ( ... ) __riscv_vrgather_vx_u8mf8_tumu(__VA_ARGS__)

◆ vrgatherei16_vv_f16m1

#define vrgatherei16_vv_f16m1 ( ... ) __riscv_vrgatherei16_vv_f16m1(__VA_ARGS__)

◆ vrgatherei16_vv_f16m1_m

#define vrgatherei16_vv_f16m1_m ( ... ) __riscv_vrgatherei16_vv_f16m1_tumu(__VA_ARGS__)

◆ vrgatherei16_vv_f16m2

#define vrgatherei16_vv_f16m2 ( ... ) __riscv_vrgatherei16_vv_f16m2(__VA_ARGS__)

◆ vrgatherei16_vv_f16m2_m

#define vrgatherei16_vv_f16m2_m ( ... ) __riscv_vrgatherei16_vv_f16m2_tumu(__VA_ARGS__)

◆ vrgatherei16_vv_f16m4

#define vrgatherei16_vv_f16m4 ( ... ) __riscv_vrgatherei16_vv_f16m4(__VA_ARGS__)

◆ vrgatherei16_vv_f16m4_m

#define vrgatherei16_vv_f16m4_m ( ... ) __riscv_vrgatherei16_vv_f16m4_tumu(__VA_ARGS__)

◆ vrgatherei16_vv_f16m8

#define vrgatherei16_vv_f16m8 ( ... ) __riscv_vrgatherei16_vv_f16m8(__VA_ARGS__)

◆ vrgatherei16_vv_f16m8_m

#define vrgatherei16_vv_f16m8_m ( ... ) __riscv_vrgatherei16_vv_f16m8_tumu(__VA_ARGS__)

◆ vrgatherei16_vv_f16mf2

#define vrgatherei16_vv_f16mf2 ( ... ) __riscv_vrgatherei16_vv_f16mf2(__VA_ARGS__)

◆ vrgatherei16_vv_f16mf2_m

#define vrgatherei16_vv_f16mf2_m ( ... ) __riscv_vrgatherei16_vv_f16mf2_tumu(__VA_ARGS__)

◆ vrgatherei16_vv_f16mf4

#define vrgatherei16_vv_f16mf4 ( ... ) __riscv_vrgatherei16_vv_f16mf4(__VA_ARGS__)

◆ vrgatherei16_vv_f16mf4_m

#define vrgatherei16_vv_f16mf4_m ( ... ) __riscv_vrgatherei16_vv_f16mf4_tumu(__VA_ARGS__)

◆ vrgatherei16_vv_f32m1

#define vrgatherei16_vv_f32m1 ( ... ) __riscv_vrgatherei16_vv_f32m1(__VA_ARGS__)

◆ vrgatherei16_vv_f32m1_m

#define vrgatherei16_vv_f32m1_m ( ... ) __riscv_vrgatherei16_vv_f32m1_tumu(__VA_ARGS__)

◆ vrgatherei16_vv_f32m2

#define vrgatherei16_vv_f32m2 ( ... ) __riscv_vrgatherei16_vv_f32m2(__VA_ARGS__)

◆ vrgatherei16_vv_f32m2_m

#define vrgatherei16_vv_f32m2_m ( ... ) __riscv_vrgatherei16_vv_f32m2_tumu(__VA_ARGS__)

◆ vrgatherei16_vv_f32m4

#define vrgatherei16_vv_f32m4 ( ... ) __riscv_vrgatherei16_vv_f32m4(__VA_ARGS__)

◆ vrgatherei16_vv_f32m4_m

#define vrgatherei16_vv_f32m4_m ( ... ) __riscv_vrgatherei16_vv_f32m4_tumu(__VA_ARGS__)

◆ vrgatherei16_vv_f32m8

#define vrgatherei16_vv_f32m8 ( ... ) __riscv_vrgatherei16_vv_f32m8(__VA_ARGS__)

◆ vrgatherei16_vv_f32m8_m

#define vrgatherei16_vv_f32m8_m ( ... ) __riscv_vrgatherei16_vv_f32m8_tumu(__VA_ARGS__)

◆ vrgatherei16_vv_f32mf2

#define vrgatherei16_vv_f32mf2 ( ... ) __riscv_vrgatherei16_vv_f32mf2(__VA_ARGS__)

◆ vrgatherei16_vv_f32mf2_m

#define vrgatherei16_vv_f32mf2_m ( ... ) __riscv_vrgatherei16_vv_f32mf2_tumu(__VA_ARGS__)

◆ vrgatherei16_vv_f64m1

#define vrgatherei16_vv_f64m1 ( ... ) __riscv_vrgatherei16_vv_f64m1(__VA_ARGS__)

◆ vrgatherei16_vv_f64m1_m

#define vrgatherei16_vv_f64m1_m ( ... ) __riscv_vrgatherei16_vv_f64m1_tumu(__VA_ARGS__)

◆ vrgatherei16_vv_f64m2

#define vrgatherei16_vv_f64m2 ( ... ) __riscv_vrgatherei16_vv_f64m2(__VA_ARGS__)

◆ vrgatherei16_vv_f64m2_m

#define vrgatherei16_vv_f64m2_m ( ... ) __riscv_vrgatherei16_vv_f64m2_tumu(__VA_ARGS__)

◆ vrgatherei16_vv_f64m4

#define vrgatherei16_vv_f64m4 ( ... ) __riscv_vrgatherei16_vv_f64m4(__VA_ARGS__)

◆ vrgatherei16_vv_f64m4_m

#define vrgatherei16_vv_f64m4_m ( ... ) __riscv_vrgatherei16_vv_f64m4_tumu(__VA_ARGS__)

◆ vrgatherei16_vv_f64m8

#define vrgatherei16_vv_f64m8 ( ... ) __riscv_vrgatherei16_vv_f64m8(__VA_ARGS__)

◆ vrgatherei16_vv_f64m8_m

#define vrgatherei16_vv_f64m8_m ( ... ) __riscv_vrgatherei16_vv_f64m8_tumu(__VA_ARGS__)

◆ vrgatherei16_vv_i16m1

#define vrgatherei16_vv_i16m1 ( ... ) __riscv_vrgatherei16_vv_i16m1(__VA_ARGS__)

◆ vrgatherei16_vv_i16m1_m

#define vrgatherei16_vv_i16m1_m ( ... ) __riscv_vrgatherei16_vv_i16m1_tumu(__VA_ARGS__)

◆ vrgatherei16_vv_i16m2

#define vrgatherei16_vv_i16m2 ( ... ) __riscv_vrgatherei16_vv_i16m2(__VA_ARGS__)

◆ vrgatherei16_vv_i16m2_m

#define vrgatherei16_vv_i16m2_m ( ... ) __riscv_vrgatherei16_vv_i16m2_tumu(__VA_ARGS__)

◆ vrgatherei16_vv_i16m4

#define vrgatherei16_vv_i16m4 ( ... ) __riscv_vrgatherei16_vv_i16m4(__VA_ARGS__)

◆ vrgatherei16_vv_i16m4_m

#define vrgatherei16_vv_i16m4_m ( ... ) __riscv_vrgatherei16_vv_i16m4_tumu(__VA_ARGS__)

◆ vrgatherei16_vv_i16m8

#define vrgatherei16_vv_i16m8 ( ... ) __riscv_vrgatherei16_vv_i16m8(__VA_ARGS__)

◆ vrgatherei16_vv_i16m8_m

#define vrgatherei16_vv_i16m8_m ( ... ) __riscv_vrgatherei16_vv_i16m8_tumu(__VA_ARGS__)

◆ vrgatherei16_vv_i16mf2

#define vrgatherei16_vv_i16mf2 ( ... ) __riscv_vrgatherei16_vv_i16mf2(__VA_ARGS__)

◆ vrgatherei16_vv_i16mf2_m

#define vrgatherei16_vv_i16mf2_m ( ... ) __riscv_vrgatherei16_vv_i16mf2_tumu(__VA_ARGS__)

◆ vrgatherei16_vv_i16mf4

#define vrgatherei16_vv_i16mf4 ( ... ) __riscv_vrgatherei16_vv_i16mf4(__VA_ARGS__)

◆ vrgatherei16_vv_i16mf4_m

#define vrgatherei16_vv_i16mf4_m ( ... ) __riscv_vrgatherei16_vv_i16mf4_tumu(__VA_ARGS__)

◆ vrgatherei16_vv_i32m1

#define vrgatherei16_vv_i32m1 ( ... ) __riscv_vrgatherei16_vv_i32m1(__VA_ARGS__)

◆ vrgatherei16_vv_i32m1_m

#define vrgatherei16_vv_i32m1_m ( ... ) __riscv_vrgatherei16_vv_i32m1_tumu(__VA_ARGS__)

◆ vrgatherei16_vv_i32m2

#define vrgatherei16_vv_i32m2 ( ... ) __riscv_vrgatherei16_vv_i32m2(__VA_ARGS__)

◆ vrgatherei16_vv_i32m2_m

#define vrgatherei16_vv_i32m2_m ( ... ) __riscv_vrgatherei16_vv_i32m2_tumu(__VA_ARGS__)

◆ vrgatherei16_vv_i32m4

#define vrgatherei16_vv_i32m4 ( ... ) __riscv_vrgatherei16_vv_i32m4(__VA_ARGS__)

◆ vrgatherei16_vv_i32m4_m

#define vrgatherei16_vv_i32m4_m ( ... ) __riscv_vrgatherei16_vv_i32m4_tumu(__VA_ARGS__)

◆ vrgatherei16_vv_i32m8

#define vrgatherei16_vv_i32m8 ( ... ) __riscv_vrgatherei16_vv_i32m8(__VA_ARGS__)

◆ vrgatherei16_vv_i32m8_m

#define vrgatherei16_vv_i32m8_m ( ... ) __riscv_vrgatherei16_vv_i32m8_tumu(__VA_ARGS__)

◆ vrgatherei16_vv_i32mf2

#define vrgatherei16_vv_i32mf2 ( ... ) __riscv_vrgatherei16_vv_i32mf2(__VA_ARGS__)

◆ vrgatherei16_vv_i32mf2_m

#define vrgatherei16_vv_i32mf2_m ( ... ) __riscv_vrgatherei16_vv_i32mf2_tumu(__VA_ARGS__)

◆ vrgatherei16_vv_i64m1

#define vrgatherei16_vv_i64m1 ( ... ) __riscv_vrgatherei16_vv_i64m1(__VA_ARGS__)

◆ vrgatherei16_vv_i64m1_m

#define vrgatherei16_vv_i64m1_m ( ... ) __riscv_vrgatherei16_vv_i64m1_tumu(__VA_ARGS__)

◆ vrgatherei16_vv_i64m2

#define vrgatherei16_vv_i64m2 ( ... ) __riscv_vrgatherei16_vv_i64m2(__VA_ARGS__)

◆ vrgatherei16_vv_i64m2_m

#define vrgatherei16_vv_i64m2_m ( ... ) __riscv_vrgatherei16_vv_i64m2_tumu(__VA_ARGS__)

◆ vrgatherei16_vv_i64m4

#define vrgatherei16_vv_i64m4 ( ... ) __riscv_vrgatherei16_vv_i64m4(__VA_ARGS__)

◆ vrgatherei16_vv_i64m4_m

#define vrgatherei16_vv_i64m4_m ( ... ) __riscv_vrgatherei16_vv_i64m4_tumu(__VA_ARGS__)

◆ vrgatherei16_vv_i64m8

#define vrgatherei16_vv_i64m8 ( ... ) __riscv_vrgatherei16_vv_i64m8(__VA_ARGS__)

◆ vrgatherei16_vv_i64m8_m

#define vrgatherei16_vv_i64m8_m ( ... ) __riscv_vrgatherei16_vv_i64m8_tumu(__VA_ARGS__)

◆ vrgatherei16_vv_i8m1

#define vrgatherei16_vv_i8m1 ( ... ) __riscv_vrgatherei16_vv_i8m1(__VA_ARGS__)

◆ vrgatherei16_vv_i8m1_m

#define vrgatherei16_vv_i8m1_m ( ... ) __riscv_vrgatherei16_vv_i8m1_tumu(__VA_ARGS__)

◆ vrgatherei16_vv_i8m2

#define vrgatherei16_vv_i8m2 ( ... ) __riscv_vrgatherei16_vv_i8m2(__VA_ARGS__)

◆ vrgatherei16_vv_i8m2_m

#define vrgatherei16_vv_i8m2_m ( ... ) __riscv_vrgatherei16_vv_i8m2_tumu(__VA_ARGS__)

◆ vrgatherei16_vv_i8m4

#define vrgatherei16_vv_i8m4 ( ... ) __riscv_vrgatherei16_vv_i8m4(__VA_ARGS__)

◆ vrgatherei16_vv_i8m4_m

#define vrgatherei16_vv_i8m4_m ( ... ) __riscv_vrgatherei16_vv_i8m4_tumu(__VA_ARGS__)

◆ vrgatherei16_vv_i8mf2

#define vrgatherei16_vv_i8mf2 ( ... ) __riscv_vrgatherei16_vv_i8mf2(__VA_ARGS__)

◆ vrgatherei16_vv_i8mf2_m

#define vrgatherei16_vv_i8mf2_m ( ... ) __riscv_vrgatherei16_vv_i8mf2_tumu(__VA_ARGS__)

◆ vrgatherei16_vv_i8mf4

#define vrgatherei16_vv_i8mf4 ( ... ) __riscv_vrgatherei16_vv_i8mf4(__VA_ARGS__)

◆ vrgatherei16_vv_i8mf4_m

#define vrgatherei16_vv_i8mf4_m ( ... ) __riscv_vrgatherei16_vv_i8mf4_tumu(__VA_ARGS__)

◆ vrgatherei16_vv_i8mf8

#define vrgatherei16_vv_i8mf8 ( ... ) __riscv_vrgatherei16_vv_i8mf8(__VA_ARGS__)

◆ vrgatherei16_vv_i8mf8_m

#define vrgatherei16_vv_i8mf8_m ( ... ) __riscv_vrgatherei16_vv_i8mf8_tumu(__VA_ARGS__)

◆ vrgatherei16_vv_u16m1

#define vrgatherei16_vv_u16m1 ( ... ) __riscv_vrgatherei16_vv_u16m1(__VA_ARGS__)

◆ vrgatherei16_vv_u16m1_m

#define vrgatherei16_vv_u16m1_m ( ... ) __riscv_vrgatherei16_vv_u16m1_tumu(__VA_ARGS__)

◆ vrgatherei16_vv_u16m2

#define vrgatherei16_vv_u16m2 ( ... ) __riscv_vrgatherei16_vv_u16m2(__VA_ARGS__)

◆ vrgatherei16_vv_u16m2_m

#define vrgatherei16_vv_u16m2_m ( ... ) __riscv_vrgatherei16_vv_u16m2_tumu(__VA_ARGS__)

◆ vrgatherei16_vv_u16m4

#define vrgatherei16_vv_u16m4 ( ... ) __riscv_vrgatherei16_vv_u16m4(__VA_ARGS__)

◆ vrgatherei16_vv_u16m4_m

#define vrgatherei16_vv_u16m4_m ( ... ) __riscv_vrgatherei16_vv_u16m4_tumu(__VA_ARGS__)

◆ vrgatherei16_vv_u16m8

#define vrgatherei16_vv_u16m8 ( ... ) __riscv_vrgatherei16_vv_u16m8(__VA_ARGS__)

◆ vrgatherei16_vv_u16m8_m

#define vrgatherei16_vv_u16m8_m ( ... ) __riscv_vrgatherei16_vv_u16m8_tumu(__VA_ARGS__)

◆ vrgatherei16_vv_u16mf2

#define vrgatherei16_vv_u16mf2 ( ... ) __riscv_vrgatherei16_vv_u16mf2(__VA_ARGS__)

◆ vrgatherei16_vv_u16mf2_m

#define vrgatherei16_vv_u16mf2_m ( ... ) __riscv_vrgatherei16_vv_u16mf2_tumu(__VA_ARGS__)

◆ vrgatherei16_vv_u16mf4

#define vrgatherei16_vv_u16mf4 ( ... ) __riscv_vrgatherei16_vv_u16mf4(__VA_ARGS__)

◆ vrgatherei16_vv_u16mf4_m

#define vrgatherei16_vv_u16mf4_m ( ... ) __riscv_vrgatherei16_vv_u16mf4_tumu(__VA_ARGS__)

◆ vrgatherei16_vv_u32m1

#define vrgatherei16_vv_u32m1 ( ... ) __riscv_vrgatherei16_vv_u32m1(__VA_ARGS__)

◆ vrgatherei16_vv_u32m1_m

#define vrgatherei16_vv_u32m1_m ( ... ) __riscv_vrgatherei16_vv_u32m1_tumu(__VA_ARGS__)

◆ vrgatherei16_vv_u32m2

#define vrgatherei16_vv_u32m2 ( ... ) __riscv_vrgatherei16_vv_u32m2(__VA_ARGS__)

◆ vrgatherei16_vv_u32m2_m

#define vrgatherei16_vv_u32m2_m ( ... ) __riscv_vrgatherei16_vv_u32m2_tumu(__VA_ARGS__)

◆ vrgatherei16_vv_u32m4

#define vrgatherei16_vv_u32m4 ( ... ) __riscv_vrgatherei16_vv_u32m4(__VA_ARGS__)

◆ vrgatherei16_vv_u32m4_m

#define vrgatherei16_vv_u32m4_m ( ... ) __riscv_vrgatherei16_vv_u32m4_tumu(__VA_ARGS__)

◆ vrgatherei16_vv_u32m8

#define vrgatherei16_vv_u32m8 ( ... ) __riscv_vrgatherei16_vv_u32m8(__VA_ARGS__)

◆ vrgatherei16_vv_u32m8_m

#define vrgatherei16_vv_u32m8_m ( ... ) __riscv_vrgatherei16_vv_u32m8_tumu(__VA_ARGS__)

◆ vrgatherei16_vv_u32mf2

#define vrgatherei16_vv_u32mf2 ( ... ) __riscv_vrgatherei16_vv_u32mf2(__VA_ARGS__)

◆ vrgatherei16_vv_u32mf2_m

#define vrgatherei16_vv_u32mf2_m ( ... ) __riscv_vrgatherei16_vv_u32mf2_tumu(__VA_ARGS__)

◆ vrgatherei16_vv_u64m1

#define vrgatherei16_vv_u64m1 ( ... ) __riscv_vrgatherei16_vv_u64m1(__VA_ARGS__)

◆ vrgatherei16_vv_u64m1_m

#define vrgatherei16_vv_u64m1_m ( ... ) __riscv_vrgatherei16_vv_u64m1_tumu(__VA_ARGS__)

◆ vrgatherei16_vv_u64m2

#define vrgatherei16_vv_u64m2 ( ... ) __riscv_vrgatherei16_vv_u64m2(__VA_ARGS__)

◆ vrgatherei16_vv_u64m2_m

#define vrgatherei16_vv_u64m2_m ( ... ) __riscv_vrgatherei16_vv_u64m2_tumu(__VA_ARGS__)

◆ vrgatherei16_vv_u64m4

#define vrgatherei16_vv_u64m4 ( ... ) __riscv_vrgatherei16_vv_u64m4(__VA_ARGS__)

◆ vrgatherei16_vv_u64m4_m

#define vrgatherei16_vv_u64m4_m ( ... ) __riscv_vrgatherei16_vv_u64m4_tumu(__VA_ARGS__)

◆ vrgatherei16_vv_u64m8

#define vrgatherei16_vv_u64m8 ( ... ) __riscv_vrgatherei16_vv_u64m8(__VA_ARGS__)

◆ vrgatherei16_vv_u64m8_m

#define vrgatherei16_vv_u64m8_m ( ... ) __riscv_vrgatherei16_vv_u64m8_tumu(__VA_ARGS__)

◆ vrgatherei16_vv_u8m1

#define vrgatherei16_vv_u8m1 ( ... ) __riscv_vrgatherei16_vv_u8m1(__VA_ARGS__)

◆ vrgatherei16_vv_u8m1_m

#define vrgatherei16_vv_u8m1_m ( ... ) __riscv_vrgatherei16_vv_u8m1_tumu(__VA_ARGS__)

◆ vrgatherei16_vv_u8m2

#define vrgatherei16_vv_u8m2 ( ... ) __riscv_vrgatherei16_vv_u8m2(__VA_ARGS__)

◆ vrgatherei16_vv_u8m2_m

#define vrgatherei16_vv_u8m2_m ( ... ) __riscv_vrgatherei16_vv_u8m2_tumu(__VA_ARGS__)

◆ vrgatherei16_vv_u8m4

#define vrgatherei16_vv_u8m4 ( ... ) __riscv_vrgatherei16_vv_u8m4(__VA_ARGS__)

◆ vrgatherei16_vv_u8m4_m

#define vrgatherei16_vv_u8m4_m ( ... ) __riscv_vrgatherei16_vv_u8m4_tumu(__VA_ARGS__)

◆ vrgatherei16_vv_u8mf2

#define vrgatherei16_vv_u8mf2 ( ... ) __riscv_vrgatherei16_vv_u8mf2(__VA_ARGS__)

◆ vrgatherei16_vv_u8mf2_m

#define vrgatherei16_vv_u8mf2_m ( ... ) __riscv_vrgatherei16_vv_u8mf2_tumu(__VA_ARGS__)

◆ vrgatherei16_vv_u8mf4

#define vrgatherei16_vv_u8mf4 ( ... ) __riscv_vrgatherei16_vv_u8mf4(__VA_ARGS__)

◆ vrgatherei16_vv_u8mf4_m

#define vrgatherei16_vv_u8mf4_m ( ... ) __riscv_vrgatherei16_vv_u8mf4_tumu(__VA_ARGS__)

◆ vrgatherei16_vv_u8mf8

#define vrgatherei16_vv_u8mf8 ( ... ) __riscv_vrgatherei16_vv_u8mf8(__VA_ARGS__)

◆ vrgatherei16_vv_u8mf8_m

#define vrgatherei16_vv_u8mf8_m ( ... ) __riscv_vrgatherei16_vv_u8mf8_tumu(__VA_ARGS__)

◆ vrsub_vx_i16m1

#define vrsub_vx_i16m1 ( ... ) __riscv_vrsub_vx_i16m1(__VA_ARGS__)

◆ vrsub_vx_i16m1_m

#define vrsub_vx_i16m1_m ( ... ) __riscv_vrsub_vx_i16m1_tumu(__VA_ARGS__)

◆ vrsub_vx_i16m2

#define vrsub_vx_i16m2 ( ... ) __riscv_vrsub_vx_i16m2(__VA_ARGS__)

◆ vrsub_vx_i16m2_m

#define vrsub_vx_i16m2_m ( ... ) __riscv_vrsub_vx_i16m2_tumu(__VA_ARGS__)

◆ vrsub_vx_i16m4

#define vrsub_vx_i16m4 ( ... ) __riscv_vrsub_vx_i16m4(__VA_ARGS__)

◆ vrsub_vx_i16m4_m

#define vrsub_vx_i16m4_m ( ... ) __riscv_vrsub_vx_i16m4_tumu(__VA_ARGS__)

◆ vrsub_vx_i16m8

#define vrsub_vx_i16m8 ( ... ) __riscv_vrsub_vx_i16m8(__VA_ARGS__)

◆ vrsub_vx_i16m8_m

#define vrsub_vx_i16m8_m ( ... ) __riscv_vrsub_vx_i16m8_tumu(__VA_ARGS__)

◆ vrsub_vx_i16mf2

#define vrsub_vx_i16mf2 ( ... ) __riscv_vrsub_vx_i16mf2(__VA_ARGS__)

◆ vrsub_vx_i16mf2_m

#define vrsub_vx_i16mf2_m ( ... ) __riscv_vrsub_vx_i16mf2_tumu(__VA_ARGS__)

◆ vrsub_vx_i16mf4

#define vrsub_vx_i16mf4 ( ... ) __riscv_vrsub_vx_i16mf4(__VA_ARGS__)

◆ vrsub_vx_i16mf4_m

#define vrsub_vx_i16mf4_m ( ... ) __riscv_vrsub_vx_i16mf4_tumu(__VA_ARGS__)

◆ vrsub_vx_i32m1

#define vrsub_vx_i32m1 ( ... ) __riscv_vrsub_vx_i32m1(__VA_ARGS__)

◆ vrsub_vx_i32m1_m

#define vrsub_vx_i32m1_m ( ... ) __riscv_vrsub_vx_i32m1_tumu(__VA_ARGS__)

◆ vrsub_vx_i32m2

#define vrsub_vx_i32m2 ( ... ) __riscv_vrsub_vx_i32m2(__VA_ARGS__)

◆ vrsub_vx_i32m2_m

#define vrsub_vx_i32m2_m ( ... ) __riscv_vrsub_vx_i32m2_tumu(__VA_ARGS__)

◆ vrsub_vx_i32m4

#define vrsub_vx_i32m4 ( ... ) __riscv_vrsub_vx_i32m4(__VA_ARGS__)

◆ vrsub_vx_i32m4_m

#define vrsub_vx_i32m4_m ( ... ) __riscv_vrsub_vx_i32m4_tumu(__VA_ARGS__)

◆ vrsub_vx_i32m8

#define vrsub_vx_i32m8 ( ... ) __riscv_vrsub_vx_i32m8(__VA_ARGS__)

◆ vrsub_vx_i32m8_m

#define vrsub_vx_i32m8_m ( ... ) __riscv_vrsub_vx_i32m8_tumu(__VA_ARGS__)

◆ vrsub_vx_i32mf2

#define vrsub_vx_i32mf2 ( ... ) __riscv_vrsub_vx_i32mf2(__VA_ARGS__)

◆ vrsub_vx_i32mf2_m

#define vrsub_vx_i32mf2_m ( ... ) __riscv_vrsub_vx_i32mf2_tumu(__VA_ARGS__)

◆ vrsub_vx_i64m1

#define vrsub_vx_i64m1 ( ... ) __riscv_vrsub_vx_i64m1(__VA_ARGS__)

◆ vrsub_vx_i64m1_m

#define vrsub_vx_i64m1_m ( ... ) __riscv_vrsub_vx_i64m1_tumu(__VA_ARGS__)

◆ vrsub_vx_i64m2

#define vrsub_vx_i64m2 ( ... ) __riscv_vrsub_vx_i64m2(__VA_ARGS__)

◆ vrsub_vx_i64m2_m

#define vrsub_vx_i64m2_m ( ... ) __riscv_vrsub_vx_i64m2_tumu(__VA_ARGS__)

◆ vrsub_vx_i64m4

#define vrsub_vx_i64m4 ( ... ) __riscv_vrsub_vx_i64m4(__VA_ARGS__)

◆ vrsub_vx_i64m4_m

#define vrsub_vx_i64m4_m ( ... ) __riscv_vrsub_vx_i64m4_tumu(__VA_ARGS__)

◆ vrsub_vx_i64m8

#define vrsub_vx_i64m8 ( ... ) __riscv_vrsub_vx_i64m8(__VA_ARGS__)

◆ vrsub_vx_i64m8_m

#define vrsub_vx_i64m8_m ( ... ) __riscv_vrsub_vx_i64m8_tumu(__VA_ARGS__)

◆ vrsub_vx_i8m1

#define vrsub_vx_i8m1 ( ... ) __riscv_vrsub_vx_i8m1(__VA_ARGS__)

◆ vrsub_vx_i8m1_m

#define vrsub_vx_i8m1_m ( ... ) __riscv_vrsub_vx_i8m1_tumu(__VA_ARGS__)

◆ vrsub_vx_i8m2

#define vrsub_vx_i8m2 ( ... ) __riscv_vrsub_vx_i8m2(__VA_ARGS__)

◆ vrsub_vx_i8m2_m

#define vrsub_vx_i8m2_m ( ... ) __riscv_vrsub_vx_i8m2_tumu(__VA_ARGS__)

◆ vrsub_vx_i8m4

#define vrsub_vx_i8m4 ( ... ) __riscv_vrsub_vx_i8m4(__VA_ARGS__)

◆ vrsub_vx_i8m4_m

#define vrsub_vx_i8m4_m ( ... ) __riscv_vrsub_vx_i8m4_tumu(__VA_ARGS__)

◆ vrsub_vx_i8m8

#define vrsub_vx_i8m8 ( ... ) __riscv_vrsub_vx_i8m8(__VA_ARGS__)

◆ vrsub_vx_i8m8_m

#define vrsub_vx_i8m8_m ( ... ) __riscv_vrsub_vx_i8m8_tumu(__VA_ARGS__)

◆ vrsub_vx_i8mf2

#define vrsub_vx_i8mf2 ( ... ) __riscv_vrsub_vx_i8mf2(__VA_ARGS__)

◆ vrsub_vx_i8mf2_m

#define vrsub_vx_i8mf2_m ( ... ) __riscv_vrsub_vx_i8mf2_tumu(__VA_ARGS__)

◆ vrsub_vx_i8mf4

#define vrsub_vx_i8mf4 ( ... ) __riscv_vrsub_vx_i8mf4(__VA_ARGS__)

◆ vrsub_vx_i8mf4_m

#define vrsub_vx_i8mf4_m ( ... ) __riscv_vrsub_vx_i8mf4_tumu(__VA_ARGS__)

◆ vrsub_vx_i8mf8

#define vrsub_vx_i8mf8 ( ... ) __riscv_vrsub_vx_i8mf8(__VA_ARGS__)

◆ vrsub_vx_i8mf8_m

#define vrsub_vx_i8mf8_m ( ... ) __riscv_vrsub_vx_i8mf8_tumu(__VA_ARGS__)

◆ vrsub_vx_u16m1

#define vrsub_vx_u16m1 ( ... ) __riscv_vrsub_vx_u16m1(__VA_ARGS__)

◆ vrsub_vx_u16m1_m

#define vrsub_vx_u16m1_m ( ... ) __riscv_vrsub_vx_u16m1_tumu(__VA_ARGS__)

◆ vrsub_vx_u16m2

#define vrsub_vx_u16m2 ( ... ) __riscv_vrsub_vx_u16m2(__VA_ARGS__)

◆ vrsub_vx_u16m2_m

#define vrsub_vx_u16m2_m ( ... ) __riscv_vrsub_vx_u16m2_tumu(__VA_ARGS__)

◆ vrsub_vx_u16m4

#define vrsub_vx_u16m4 ( ... ) __riscv_vrsub_vx_u16m4(__VA_ARGS__)

◆ vrsub_vx_u16m4_m

#define vrsub_vx_u16m4_m ( ... ) __riscv_vrsub_vx_u16m4_tumu(__VA_ARGS__)

◆ vrsub_vx_u16m8

#define vrsub_vx_u16m8 ( ... ) __riscv_vrsub_vx_u16m8(__VA_ARGS__)

◆ vrsub_vx_u16m8_m

#define vrsub_vx_u16m8_m ( ... ) __riscv_vrsub_vx_u16m8_tumu(__VA_ARGS__)

◆ vrsub_vx_u16mf2

#define vrsub_vx_u16mf2 ( ... ) __riscv_vrsub_vx_u16mf2(__VA_ARGS__)

◆ vrsub_vx_u16mf2_m

#define vrsub_vx_u16mf2_m ( ... ) __riscv_vrsub_vx_u16mf2_tumu(__VA_ARGS__)

◆ vrsub_vx_u16mf4

#define vrsub_vx_u16mf4 ( ... ) __riscv_vrsub_vx_u16mf4(__VA_ARGS__)

◆ vrsub_vx_u16mf4_m

#define vrsub_vx_u16mf4_m ( ... ) __riscv_vrsub_vx_u16mf4_tumu(__VA_ARGS__)

◆ vrsub_vx_u32m1

#define vrsub_vx_u32m1 ( ... ) __riscv_vrsub_vx_u32m1(__VA_ARGS__)

◆ vrsub_vx_u32m1_m

#define vrsub_vx_u32m1_m ( ... ) __riscv_vrsub_vx_u32m1_tumu(__VA_ARGS__)

◆ vrsub_vx_u32m2

#define vrsub_vx_u32m2 ( ... ) __riscv_vrsub_vx_u32m2(__VA_ARGS__)

◆ vrsub_vx_u32m2_m

#define vrsub_vx_u32m2_m ( ... ) __riscv_vrsub_vx_u32m2_tumu(__VA_ARGS__)

◆ vrsub_vx_u32m4

#define vrsub_vx_u32m4 ( ... ) __riscv_vrsub_vx_u32m4(__VA_ARGS__)

◆ vrsub_vx_u32m4_m

#define vrsub_vx_u32m4_m ( ... ) __riscv_vrsub_vx_u32m4_tumu(__VA_ARGS__)

◆ vrsub_vx_u32m8

#define vrsub_vx_u32m8 ( ... ) __riscv_vrsub_vx_u32m8(__VA_ARGS__)

◆ vrsub_vx_u32m8_m

#define vrsub_vx_u32m8_m ( ... ) __riscv_vrsub_vx_u32m8_tumu(__VA_ARGS__)

◆ vrsub_vx_u32mf2

#define vrsub_vx_u32mf2 ( ... ) __riscv_vrsub_vx_u32mf2(__VA_ARGS__)

◆ vrsub_vx_u32mf2_m

#define vrsub_vx_u32mf2_m ( ... ) __riscv_vrsub_vx_u32mf2_tumu(__VA_ARGS__)

◆ vrsub_vx_u64m1

#define vrsub_vx_u64m1 ( ... ) __riscv_vrsub_vx_u64m1(__VA_ARGS__)

◆ vrsub_vx_u64m1_m

#define vrsub_vx_u64m1_m ( ... ) __riscv_vrsub_vx_u64m1_tumu(__VA_ARGS__)

◆ vrsub_vx_u64m2

#define vrsub_vx_u64m2 ( ... ) __riscv_vrsub_vx_u64m2(__VA_ARGS__)

◆ vrsub_vx_u64m2_m

#define vrsub_vx_u64m2_m ( ... ) __riscv_vrsub_vx_u64m2_tumu(__VA_ARGS__)

◆ vrsub_vx_u64m4

#define vrsub_vx_u64m4 ( ... ) __riscv_vrsub_vx_u64m4(__VA_ARGS__)

◆ vrsub_vx_u64m4_m

#define vrsub_vx_u64m4_m ( ... ) __riscv_vrsub_vx_u64m4_tumu(__VA_ARGS__)

◆ vrsub_vx_u64m8

#define vrsub_vx_u64m8 ( ... ) __riscv_vrsub_vx_u64m8(__VA_ARGS__)

◆ vrsub_vx_u64m8_m

#define vrsub_vx_u64m8_m ( ... ) __riscv_vrsub_vx_u64m8_tumu(__VA_ARGS__)

◆ vrsub_vx_u8m1

#define vrsub_vx_u8m1 ( ... ) __riscv_vrsub_vx_u8m1(__VA_ARGS__)

◆ vrsub_vx_u8m1_m

#define vrsub_vx_u8m1_m ( ... ) __riscv_vrsub_vx_u8m1_tumu(__VA_ARGS__)

◆ vrsub_vx_u8m2

#define vrsub_vx_u8m2 ( ... ) __riscv_vrsub_vx_u8m2(__VA_ARGS__)

◆ vrsub_vx_u8m2_m

#define vrsub_vx_u8m2_m ( ... ) __riscv_vrsub_vx_u8m2_tumu(__VA_ARGS__)

◆ vrsub_vx_u8m4

#define vrsub_vx_u8m4 ( ... ) __riscv_vrsub_vx_u8m4(__VA_ARGS__)

◆ vrsub_vx_u8m4_m

#define vrsub_vx_u8m4_m ( ... ) __riscv_vrsub_vx_u8m4_tumu(__VA_ARGS__)

◆ vrsub_vx_u8m8

#define vrsub_vx_u8m8 ( ... ) __riscv_vrsub_vx_u8m8(__VA_ARGS__)

◆ vrsub_vx_u8m8_m

#define vrsub_vx_u8m8_m ( ... ) __riscv_vrsub_vx_u8m8_tumu(__VA_ARGS__)

◆ vrsub_vx_u8mf2

#define vrsub_vx_u8mf2 ( ... ) __riscv_vrsub_vx_u8mf2(__VA_ARGS__)

◆ vrsub_vx_u8mf2_m

#define vrsub_vx_u8mf2_m ( ... ) __riscv_vrsub_vx_u8mf2_tumu(__VA_ARGS__)

◆ vrsub_vx_u8mf4

#define vrsub_vx_u8mf4 ( ... ) __riscv_vrsub_vx_u8mf4(__VA_ARGS__)

◆ vrsub_vx_u8mf4_m

#define vrsub_vx_u8mf4_m ( ... ) __riscv_vrsub_vx_u8mf4_tumu(__VA_ARGS__)

◆ vrsub_vx_u8mf8

#define vrsub_vx_u8mf8 ( ... ) __riscv_vrsub_vx_u8mf8(__VA_ARGS__)

◆ vrsub_vx_u8mf8_m

#define vrsub_vx_u8mf8_m ( ... ) __riscv_vrsub_vx_u8mf8_tumu(__VA_ARGS__)

◆ vsadd_vv_i16m1

#define vsadd_vv_i16m1 ( ... ) __riscv_vsadd_vv_i16m1(__VA_ARGS__)

◆ vsadd_vv_i16m1_m

#define vsadd_vv_i16m1_m ( ... ) __riscv_vsadd_vv_i16m1_tumu(__VA_ARGS__)

◆ vsadd_vv_i16m2

#define vsadd_vv_i16m2 ( ... ) __riscv_vsadd_vv_i16m2(__VA_ARGS__)

◆ vsadd_vv_i16m2_m

#define vsadd_vv_i16m2_m ( ... ) __riscv_vsadd_vv_i16m2_tumu(__VA_ARGS__)

◆ vsadd_vv_i16m4

#define vsadd_vv_i16m4 ( ... ) __riscv_vsadd_vv_i16m4(__VA_ARGS__)

◆ vsadd_vv_i16m4_m

#define vsadd_vv_i16m4_m ( ... ) __riscv_vsadd_vv_i16m4_tumu(__VA_ARGS__)

◆ vsadd_vv_i16m8

#define vsadd_vv_i16m8 ( ... ) __riscv_vsadd_vv_i16m8(__VA_ARGS__)

◆ vsadd_vv_i16m8_m

#define vsadd_vv_i16m8_m ( ... ) __riscv_vsadd_vv_i16m8_tumu(__VA_ARGS__)

◆ vsadd_vv_i16mf2

#define vsadd_vv_i16mf2 ( ... ) __riscv_vsadd_vv_i16mf2(__VA_ARGS__)

◆ vsadd_vv_i16mf2_m

#define vsadd_vv_i16mf2_m ( ... ) __riscv_vsadd_vv_i16mf2_tumu(__VA_ARGS__)

◆ vsadd_vv_i16mf4

#define vsadd_vv_i16mf4 ( ... ) __riscv_vsadd_vv_i16mf4(__VA_ARGS__)

◆ vsadd_vv_i16mf4_m

#define vsadd_vv_i16mf4_m ( ... ) __riscv_vsadd_vv_i16mf4_tumu(__VA_ARGS__)

◆ vsadd_vv_i32m1

#define vsadd_vv_i32m1 ( ... ) __riscv_vsadd_vv_i32m1(__VA_ARGS__)

◆ vsadd_vv_i32m1_m

#define vsadd_vv_i32m1_m ( ... ) __riscv_vsadd_vv_i32m1_tumu(__VA_ARGS__)

◆ vsadd_vv_i32m2

#define vsadd_vv_i32m2 ( ... ) __riscv_vsadd_vv_i32m2(__VA_ARGS__)

◆ vsadd_vv_i32m2_m

#define vsadd_vv_i32m2_m ( ... ) __riscv_vsadd_vv_i32m2_tumu(__VA_ARGS__)

◆ vsadd_vv_i32m4

#define vsadd_vv_i32m4 ( ... ) __riscv_vsadd_vv_i32m4(__VA_ARGS__)

◆ vsadd_vv_i32m4_m

#define vsadd_vv_i32m4_m ( ... ) __riscv_vsadd_vv_i32m4_tumu(__VA_ARGS__)

◆ vsadd_vv_i32m8

#define vsadd_vv_i32m8 ( ... ) __riscv_vsadd_vv_i32m8(__VA_ARGS__)

◆ vsadd_vv_i32m8_m

#define vsadd_vv_i32m8_m ( ... ) __riscv_vsadd_vv_i32m8_tumu(__VA_ARGS__)

◆ vsadd_vv_i32mf2

#define vsadd_vv_i32mf2 ( ... ) __riscv_vsadd_vv_i32mf2(__VA_ARGS__)

◆ vsadd_vv_i32mf2_m

#define vsadd_vv_i32mf2_m ( ... ) __riscv_vsadd_vv_i32mf2_tumu(__VA_ARGS__)

◆ vsadd_vv_i64m1

#define vsadd_vv_i64m1 ( ... ) __riscv_vsadd_vv_i64m1(__VA_ARGS__)

◆ vsadd_vv_i64m1_m

#define vsadd_vv_i64m1_m ( ... ) __riscv_vsadd_vv_i64m1_tumu(__VA_ARGS__)

◆ vsadd_vv_i64m2

#define vsadd_vv_i64m2 ( ... ) __riscv_vsadd_vv_i64m2(__VA_ARGS__)

◆ vsadd_vv_i64m2_m

#define vsadd_vv_i64m2_m ( ... ) __riscv_vsadd_vv_i64m2_tumu(__VA_ARGS__)

◆ vsadd_vv_i64m4

#define vsadd_vv_i64m4 ( ... ) __riscv_vsadd_vv_i64m4(__VA_ARGS__)

◆ vsadd_vv_i64m4_m

#define vsadd_vv_i64m4_m ( ... ) __riscv_vsadd_vv_i64m4_tumu(__VA_ARGS__)

◆ vsadd_vv_i64m8

#define vsadd_vv_i64m8 ( ... ) __riscv_vsadd_vv_i64m8(__VA_ARGS__)

◆ vsadd_vv_i64m8_m

#define vsadd_vv_i64m8_m ( ... ) __riscv_vsadd_vv_i64m8_tumu(__VA_ARGS__)

◆ vsadd_vv_i8m1

#define vsadd_vv_i8m1 ( ... ) __riscv_vsadd_vv_i8m1(__VA_ARGS__)

◆ vsadd_vv_i8m1_m

#define vsadd_vv_i8m1_m ( ... ) __riscv_vsadd_vv_i8m1_tumu(__VA_ARGS__)

◆ vsadd_vv_i8m2

#define vsadd_vv_i8m2 ( ... ) __riscv_vsadd_vv_i8m2(__VA_ARGS__)

◆ vsadd_vv_i8m2_m

#define vsadd_vv_i8m2_m ( ... ) __riscv_vsadd_vv_i8m2_tumu(__VA_ARGS__)

◆ vsadd_vv_i8m4

#define vsadd_vv_i8m4 ( ... ) __riscv_vsadd_vv_i8m4(__VA_ARGS__)

◆ vsadd_vv_i8m4_m

#define vsadd_vv_i8m4_m ( ... ) __riscv_vsadd_vv_i8m4_tumu(__VA_ARGS__)

◆ vsadd_vv_i8m8

#define vsadd_vv_i8m8 ( ... ) __riscv_vsadd_vv_i8m8(__VA_ARGS__)

◆ vsadd_vv_i8m8_m

#define vsadd_vv_i8m8_m ( ... ) __riscv_vsadd_vv_i8m8_tumu(__VA_ARGS__)

◆ vsadd_vv_i8mf2

#define vsadd_vv_i8mf2 ( ... ) __riscv_vsadd_vv_i8mf2(__VA_ARGS__)

◆ vsadd_vv_i8mf2_m

#define vsadd_vv_i8mf2_m ( ... ) __riscv_vsadd_vv_i8mf2_tumu(__VA_ARGS__)

◆ vsadd_vv_i8mf4

#define vsadd_vv_i8mf4 ( ... ) __riscv_vsadd_vv_i8mf4(__VA_ARGS__)

◆ vsadd_vv_i8mf4_m

#define vsadd_vv_i8mf4_m ( ... ) __riscv_vsadd_vv_i8mf4_tumu(__VA_ARGS__)

◆ vsadd_vv_i8mf8

#define vsadd_vv_i8mf8 ( ... ) __riscv_vsadd_vv_i8mf8(__VA_ARGS__)

◆ vsadd_vv_i8mf8_m

#define vsadd_vv_i8mf8_m ( ... ) __riscv_vsadd_vv_i8mf8_tumu(__VA_ARGS__)

◆ vsadd_vx_i16m1

#define vsadd_vx_i16m1 ( ... ) __riscv_vsadd_vx_i16m1(__VA_ARGS__)

◆ vsadd_vx_i16m1_m

#define vsadd_vx_i16m1_m ( ... ) __riscv_vsadd_vx_i16m1_tumu(__VA_ARGS__)

◆ vsadd_vx_i16m2

#define vsadd_vx_i16m2 ( ... ) __riscv_vsadd_vx_i16m2(__VA_ARGS__)

◆ vsadd_vx_i16m2_m

#define vsadd_vx_i16m2_m ( ... ) __riscv_vsadd_vx_i16m2_tumu(__VA_ARGS__)

◆ vsadd_vx_i16m4

#define vsadd_vx_i16m4 ( ... ) __riscv_vsadd_vx_i16m4(__VA_ARGS__)

◆ vsadd_vx_i16m4_m

#define vsadd_vx_i16m4_m ( ... ) __riscv_vsadd_vx_i16m4_tumu(__VA_ARGS__)

◆ vsadd_vx_i16m8

#define vsadd_vx_i16m8 ( ... ) __riscv_vsadd_vx_i16m8(__VA_ARGS__)

◆ vsadd_vx_i16m8_m

#define vsadd_vx_i16m8_m ( ... ) __riscv_vsadd_vx_i16m8_tumu(__VA_ARGS__)

◆ vsadd_vx_i16mf2

#define vsadd_vx_i16mf2 ( ... ) __riscv_vsadd_vx_i16mf2(__VA_ARGS__)

◆ vsadd_vx_i16mf2_m

#define vsadd_vx_i16mf2_m ( ... ) __riscv_vsadd_vx_i16mf2_tumu(__VA_ARGS__)

◆ vsadd_vx_i16mf4

#define vsadd_vx_i16mf4 ( ... ) __riscv_vsadd_vx_i16mf4(__VA_ARGS__)

◆ vsadd_vx_i16mf4_m

#define vsadd_vx_i16mf4_m ( ... ) __riscv_vsadd_vx_i16mf4_tumu(__VA_ARGS__)

◆ vsadd_vx_i32m1

#define vsadd_vx_i32m1 ( ... ) __riscv_vsadd_vx_i32m1(__VA_ARGS__)

◆ vsadd_vx_i32m1_m

#define vsadd_vx_i32m1_m ( ... ) __riscv_vsadd_vx_i32m1_tumu(__VA_ARGS__)

◆ vsadd_vx_i32m2

#define vsadd_vx_i32m2 ( ... ) __riscv_vsadd_vx_i32m2(__VA_ARGS__)

◆ vsadd_vx_i32m2_m

#define vsadd_vx_i32m2_m ( ... ) __riscv_vsadd_vx_i32m2_tumu(__VA_ARGS__)

◆ vsadd_vx_i32m4

#define vsadd_vx_i32m4 ( ... ) __riscv_vsadd_vx_i32m4(__VA_ARGS__)

◆ vsadd_vx_i32m4_m

#define vsadd_vx_i32m4_m ( ... ) __riscv_vsadd_vx_i32m4_tumu(__VA_ARGS__)

◆ vsadd_vx_i32m8

#define vsadd_vx_i32m8 ( ... ) __riscv_vsadd_vx_i32m8(__VA_ARGS__)

◆ vsadd_vx_i32m8_m

#define vsadd_vx_i32m8_m ( ... ) __riscv_vsadd_vx_i32m8_tumu(__VA_ARGS__)

◆ vsadd_vx_i32mf2

#define vsadd_vx_i32mf2 ( ... ) __riscv_vsadd_vx_i32mf2(__VA_ARGS__)

◆ vsadd_vx_i32mf2_m

#define vsadd_vx_i32mf2_m ( ... ) __riscv_vsadd_vx_i32mf2_tumu(__VA_ARGS__)

◆ vsadd_vx_i64m1

#define vsadd_vx_i64m1 ( ... ) __riscv_vsadd_vx_i64m1(__VA_ARGS__)

◆ vsadd_vx_i64m1_m

#define vsadd_vx_i64m1_m ( ... ) __riscv_vsadd_vx_i64m1_tumu(__VA_ARGS__)

◆ vsadd_vx_i64m2

#define vsadd_vx_i64m2 ( ... ) __riscv_vsadd_vx_i64m2(__VA_ARGS__)

◆ vsadd_vx_i64m2_m

#define vsadd_vx_i64m2_m ( ... ) __riscv_vsadd_vx_i64m2_tumu(__VA_ARGS__)

◆ vsadd_vx_i64m4

#define vsadd_vx_i64m4 ( ... ) __riscv_vsadd_vx_i64m4(__VA_ARGS__)

◆ vsadd_vx_i64m4_m

#define vsadd_vx_i64m4_m ( ... ) __riscv_vsadd_vx_i64m4_tumu(__VA_ARGS__)

◆ vsadd_vx_i64m8

#define vsadd_vx_i64m8 ( ... ) __riscv_vsadd_vx_i64m8(__VA_ARGS__)

◆ vsadd_vx_i64m8_m

#define vsadd_vx_i64m8_m ( ... ) __riscv_vsadd_vx_i64m8_tumu(__VA_ARGS__)

◆ vsadd_vx_i8m1

#define vsadd_vx_i8m1 ( ... ) __riscv_vsadd_vx_i8m1(__VA_ARGS__)

◆ vsadd_vx_i8m1_m

#define vsadd_vx_i8m1_m ( ... ) __riscv_vsadd_vx_i8m1_tumu(__VA_ARGS__)

◆ vsadd_vx_i8m2

#define vsadd_vx_i8m2 ( ... ) __riscv_vsadd_vx_i8m2(__VA_ARGS__)

◆ vsadd_vx_i8m2_m

#define vsadd_vx_i8m2_m ( ... ) __riscv_vsadd_vx_i8m2_tumu(__VA_ARGS__)

◆ vsadd_vx_i8m4

#define vsadd_vx_i8m4 ( ... ) __riscv_vsadd_vx_i8m4(__VA_ARGS__)

◆ vsadd_vx_i8m4_m

#define vsadd_vx_i8m4_m ( ... ) __riscv_vsadd_vx_i8m4_tumu(__VA_ARGS__)

◆ vsadd_vx_i8m8

#define vsadd_vx_i8m8 ( ... ) __riscv_vsadd_vx_i8m8(__VA_ARGS__)

◆ vsadd_vx_i8m8_m

#define vsadd_vx_i8m8_m ( ... ) __riscv_vsadd_vx_i8m8_tumu(__VA_ARGS__)

◆ vsadd_vx_i8mf2

#define vsadd_vx_i8mf2 ( ... ) __riscv_vsadd_vx_i8mf2(__VA_ARGS__)

◆ vsadd_vx_i8mf2_m

#define vsadd_vx_i8mf2_m ( ... ) __riscv_vsadd_vx_i8mf2_tumu(__VA_ARGS__)

◆ vsadd_vx_i8mf4

#define vsadd_vx_i8mf4 ( ... ) __riscv_vsadd_vx_i8mf4(__VA_ARGS__)

◆ vsadd_vx_i8mf4_m

#define vsadd_vx_i8mf4_m ( ... ) __riscv_vsadd_vx_i8mf4_tumu(__VA_ARGS__)

◆ vsadd_vx_i8mf8

#define vsadd_vx_i8mf8 ( ... ) __riscv_vsadd_vx_i8mf8(__VA_ARGS__)

◆ vsadd_vx_i8mf8_m

#define vsadd_vx_i8mf8_m ( ... ) __riscv_vsadd_vx_i8mf8_tumu(__VA_ARGS__)

◆ vsaddu_vv_u16m1

#define vsaddu_vv_u16m1 ( ... ) __riscv_vsaddu_vv_u16m1(__VA_ARGS__)

◆ vsaddu_vv_u16m1_m

#define vsaddu_vv_u16m1_m ( ... ) __riscv_vsaddu_vv_u16m1_tumu(__VA_ARGS__)

◆ vsaddu_vv_u16m2

#define vsaddu_vv_u16m2 ( ... ) __riscv_vsaddu_vv_u16m2(__VA_ARGS__)

◆ vsaddu_vv_u16m2_m

#define vsaddu_vv_u16m2_m ( ... ) __riscv_vsaddu_vv_u16m2_tumu(__VA_ARGS__)

◆ vsaddu_vv_u16m4

#define vsaddu_vv_u16m4 ( ... ) __riscv_vsaddu_vv_u16m4(__VA_ARGS__)

◆ vsaddu_vv_u16m4_m

#define vsaddu_vv_u16m4_m ( ... ) __riscv_vsaddu_vv_u16m4_tumu(__VA_ARGS__)

◆ vsaddu_vv_u16m8

#define vsaddu_vv_u16m8 ( ... ) __riscv_vsaddu_vv_u16m8(__VA_ARGS__)

◆ vsaddu_vv_u16m8_m

#define vsaddu_vv_u16m8_m ( ... ) __riscv_vsaddu_vv_u16m8_tumu(__VA_ARGS__)

◆ vsaddu_vv_u16mf2

#define vsaddu_vv_u16mf2 ( ... ) __riscv_vsaddu_vv_u16mf2(__VA_ARGS__)

◆ vsaddu_vv_u16mf2_m

#define vsaddu_vv_u16mf2_m ( ... ) __riscv_vsaddu_vv_u16mf2_tumu(__VA_ARGS__)

◆ vsaddu_vv_u16mf4

#define vsaddu_vv_u16mf4 ( ... ) __riscv_vsaddu_vv_u16mf4(__VA_ARGS__)

◆ vsaddu_vv_u16mf4_m

#define vsaddu_vv_u16mf4_m ( ... ) __riscv_vsaddu_vv_u16mf4_tumu(__VA_ARGS__)

◆ vsaddu_vv_u32m1

#define vsaddu_vv_u32m1 ( ... ) __riscv_vsaddu_vv_u32m1(__VA_ARGS__)

◆ vsaddu_vv_u32m1_m

#define vsaddu_vv_u32m1_m ( ... ) __riscv_vsaddu_vv_u32m1_tumu(__VA_ARGS__)

◆ vsaddu_vv_u32m2

#define vsaddu_vv_u32m2 ( ... ) __riscv_vsaddu_vv_u32m2(__VA_ARGS__)

◆ vsaddu_vv_u32m2_m

#define vsaddu_vv_u32m2_m ( ... ) __riscv_vsaddu_vv_u32m2_tumu(__VA_ARGS__)

◆ vsaddu_vv_u32m4

#define vsaddu_vv_u32m4 ( ... ) __riscv_vsaddu_vv_u32m4(__VA_ARGS__)

◆ vsaddu_vv_u32m4_m

#define vsaddu_vv_u32m4_m ( ... ) __riscv_vsaddu_vv_u32m4_tumu(__VA_ARGS__)

◆ vsaddu_vv_u32m8

#define vsaddu_vv_u32m8 ( ... ) __riscv_vsaddu_vv_u32m8(__VA_ARGS__)

◆ vsaddu_vv_u32m8_m

#define vsaddu_vv_u32m8_m ( ... ) __riscv_vsaddu_vv_u32m8_tumu(__VA_ARGS__)

◆ vsaddu_vv_u32mf2

#define vsaddu_vv_u32mf2 ( ... ) __riscv_vsaddu_vv_u32mf2(__VA_ARGS__)

◆ vsaddu_vv_u32mf2_m

#define vsaddu_vv_u32mf2_m ( ... ) __riscv_vsaddu_vv_u32mf2_tumu(__VA_ARGS__)

◆ vsaddu_vv_u64m1

#define vsaddu_vv_u64m1 ( ... ) __riscv_vsaddu_vv_u64m1(__VA_ARGS__)

◆ vsaddu_vv_u64m1_m

#define vsaddu_vv_u64m1_m ( ... ) __riscv_vsaddu_vv_u64m1_tumu(__VA_ARGS__)

◆ vsaddu_vv_u64m2

#define vsaddu_vv_u64m2 ( ... ) __riscv_vsaddu_vv_u64m2(__VA_ARGS__)

◆ vsaddu_vv_u64m2_m

#define vsaddu_vv_u64m2_m ( ... ) __riscv_vsaddu_vv_u64m2_tumu(__VA_ARGS__)

◆ vsaddu_vv_u64m4

#define vsaddu_vv_u64m4 ( ... ) __riscv_vsaddu_vv_u64m4(__VA_ARGS__)

◆ vsaddu_vv_u64m4_m

#define vsaddu_vv_u64m4_m ( ... ) __riscv_vsaddu_vv_u64m4_tumu(__VA_ARGS__)

◆ vsaddu_vv_u64m8

#define vsaddu_vv_u64m8 ( ... ) __riscv_vsaddu_vv_u64m8(__VA_ARGS__)

◆ vsaddu_vv_u64m8_m

#define vsaddu_vv_u64m8_m ( ... ) __riscv_vsaddu_vv_u64m8_tumu(__VA_ARGS__)

◆ vsaddu_vv_u8m1

#define vsaddu_vv_u8m1 ( ... ) __riscv_vsaddu_vv_u8m1(__VA_ARGS__)

◆ vsaddu_vv_u8m1_m

#define vsaddu_vv_u8m1_m ( ... ) __riscv_vsaddu_vv_u8m1_tumu(__VA_ARGS__)

◆ vsaddu_vv_u8m2

#define vsaddu_vv_u8m2 ( ... ) __riscv_vsaddu_vv_u8m2(__VA_ARGS__)

◆ vsaddu_vv_u8m2_m

#define vsaddu_vv_u8m2_m ( ... ) __riscv_vsaddu_vv_u8m2_tumu(__VA_ARGS__)

◆ vsaddu_vv_u8m4

#define vsaddu_vv_u8m4 ( ... ) __riscv_vsaddu_vv_u8m4(__VA_ARGS__)

◆ vsaddu_vv_u8m4_m

#define vsaddu_vv_u8m4_m ( ... ) __riscv_vsaddu_vv_u8m4_tumu(__VA_ARGS__)

◆ vsaddu_vv_u8m8

#define vsaddu_vv_u8m8 ( ... ) __riscv_vsaddu_vv_u8m8(__VA_ARGS__)

◆ vsaddu_vv_u8m8_m

#define vsaddu_vv_u8m8_m ( ... ) __riscv_vsaddu_vv_u8m8_tumu(__VA_ARGS__)

◆ vsaddu_vv_u8mf2

#define vsaddu_vv_u8mf2 ( ... ) __riscv_vsaddu_vv_u8mf2(__VA_ARGS__)

◆ vsaddu_vv_u8mf2_m

#define vsaddu_vv_u8mf2_m ( ... ) __riscv_vsaddu_vv_u8mf2_tumu(__VA_ARGS__)

◆ vsaddu_vv_u8mf4

#define vsaddu_vv_u8mf4 ( ... ) __riscv_vsaddu_vv_u8mf4(__VA_ARGS__)

◆ vsaddu_vv_u8mf4_m

#define vsaddu_vv_u8mf4_m ( ... ) __riscv_vsaddu_vv_u8mf4_tumu(__VA_ARGS__)

◆ vsaddu_vv_u8mf8

#define vsaddu_vv_u8mf8 ( ... ) __riscv_vsaddu_vv_u8mf8(__VA_ARGS__)

◆ vsaddu_vv_u8mf8_m

#define vsaddu_vv_u8mf8_m ( ... ) __riscv_vsaddu_vv_u8mf8_tumu(__VA_ARGS__)

◆ vsaddu_vx_u16m1

#define vsaddu_vx_u16m1 ( ... ) __riscv_vsaddu_vx_u16m1(__VA_ARGS__)

◆ vsaddu_vx_u16m1_m

#define vsaddu_vx_u16m1_m ( ... ) __riscv_vsaddu_vx_u16m1_tumu(__VA_ARGS__)

◆ vsaddu_vx_u16m2

#define vsaddu_vx_u16m2 ( ... ) __riscv_vsaddu_vx_u16m2(__VA_ARGS__)

◆ vsaddu_vx_u16m2_m

#define vsaddu_vx_u16m2_m ( ... ) __riscv_vsaddu_vx_u16m2_tumu(__VA_ARGS__)

◆ vsaddu_vx_u16m4

#define vsaddu_vx_u16m4 ( ... ) __riscv_vsaddu_vx_u16m4(__VA_ARGS__)

◆ vsaddu_vx_u16m4_m

#define vsaddu_vx_u16m4_m ( ... ) __riscv_vsaddu_vx_u16m4_tumu(__VA_ARGS__)

◆ vsaddu_vx_u16m8

#define vsaddu_vx_u16m8 ( ... ) __riscv_vsaddu_vx_u16m8(__VA_ARGS__)

◆ vsaddu_vx_u16m8_m

#define vsaddu_vx_u16m8_m ( ... ) __riscv_vsaddu_vx_u16m8_tumu(__VA_ARGS__)

◆ vsaddu_vx_u16mf2

#define vsaddu_vx_u16mf2 ( ... ) __riscv_vsaddu_vx_u16mf2(__VA_ARGS__)

◆ vsaddu_vx_u16mf2_m

#define vsaddu_vx_u16mf2_m ( ... ) __riscv_vsaddu_vx_u16mf2_tumu(__VA_ARGS__)

◆ vsaddu_vx_u16mf4

#define vsaddu_vx_u16mf4 ( ... ) __riscv_vsaddu_vx_u16mf4(__VA_ARGS__)

◆ vsaddu_vx_u16mf4_m

#define vsaddu_vx_u16mf4_m ( ... ) __riscv_vsaddu_vx_u16mf4_tumu(__VA_ARGS__)

◆ vsaddu_vx_u32m1

#define vsaddu_vx_u32m1 ( ... ) __riscv_vsaddu_vx_u32m1(__VA_ARGS__)

◆ vsaddu_vx_u32m1_m

#define vsaddu_vx_u32m1_m ( ... ) __riscv_vsaddu_vx_u32m1_tumu(__VA_ARGS__)

◆ vsaddu_vx_u32m2

#define vsaddu_vx_u32m2 ( ... ) __riscv_vsaddu_vx_u32m2(__VA_ARGS__)

◆ vsaddu_vx_u32m2_m

#define vsaddu_vx_u32m2_m ( ... ) __riscv_vsaddu_vx_u32m2_tumu(__VA_ARGS__)

◆ vsaddu_vx_u32m4

#define vsaddu_vx_u32m4 ( ... ) __riscv_vsaddu_vx_u32m4(__VA_ARGS__)

◆ vsaddu_vx_u32m4_m

#define vsaddu_vx_u32m4_m ( ... ) __riscv_vsaddu_vx_u32m4_tumu(__VA_ARGS__)

◆ vsaddu_vx_u32m8

#define vsaddu_vx_u32m8 ( ... ) __riscv_vsaddu_vx_u32m8(__VA_ARGS__)

◆ vsaddu_vx_u32m8_m

#define vsaddu_vx_u32m8_m ( ... ) __riscv_vsaddu_vx_u32m8_tumu(__VA_ARGS__)

◆ vsaddu_vx_u32mf2

#define vsaddu_vx_u32mf2 ( ... ) __riscv_vsaddu_vx_u32mf2(__VA_ARGS__)

◆ vsaddu_vx_u32mf2_m

#define vsaddu_vx_u32mf2_m ( ... ) __riscv_vsaddu_vx_u32mf2_tumu(__VA_ARGS__)

◆ vsaddu_vx_u64m1

#define vsaddu_vx_u64m1 ( ... ) __riscv_vsaddu_vx_u64m1(__VA_ARGS__)

◆ vsaddu_vx_u64m1_m

#define vsaddu_vx_u64m1_m ( ... ) __riscv_vsaddu_vx_u64m1_tumu(__VA_ARGS__)

◆ vsaddu_vx_u64m2

#define vsaddu_vx_u64m2 ( ... ) __riscv_vsaddu_vx_u64m2(__VA_ARGS__)

◆ vsaddu_vx_u64m2_m

#define vsaddu_vx_u64m2_m ( ... ) __riscv_vsaddu_vx_u64m2_tumu(__VA_ARGS__)

◆ vsaddu_vx_u64m4

#define vsaddu_vx_u64m4 ( ... ) __riscv_vsaddu_vx_u64m4(__VA_ARGS__)

◆ vsaddu_vx_u64m4_m

#define vsaddu_vx_u64m4_m ( ... ) __riscv_vsaddu_vx_u64m4_tumu(__VA_ARGS__)

◆ vsaddu_vx_u64m8

#define vsaddu_vx_u64m8 ( ... ) __riscv_vsaddu_vx_u64m8(__VA_ARGS__)

◆ vsaddu_vx_u64m8_m

#define vsaddu_vx_u64m8_m ( ... ) __riscv_vsaddu_vx_u64m8_tumu(__VA_ARGS__)

◆ vsaddu_vx_u8m1

#define vsaddu_vx_u8m1 ( ... ) __riscv_vsaddu_vx_u8m1(__VA_ARGS__)

◆ vsaddu_vx_u8m1_m

#define vsaddu_vx_u8m1_m ( ... ) __riscv_vsaddu_vx_u8m1_tumu(__VA_ARGS__)

◆ vsaddu_vx_u8m2

#define vsaddu_vx_u8m2 ( ... ) __riscv_vsaddu_vx_u8m2(__VA_ARGS__)

◆ vsaddu_vx_u8m2_m

#define vsaddu_vx_u8m2_m ( ... ) __riscv_vsaddu_vx_u8m2_tumu(__VA_ARGS__)

◆ vsaddu_vx_u8m4

#define vsaddu_vx_u8m4 ( ... ) __riscv_vsaddu_vx_u8m4(__VA_ARGS__)

◆ vsaddu_vx_u8m4_m

#define vsaddu_vx_u8m4_m ( ... ) __riscv_vsaddu_vx_u8m4_tumu(__VA_ARGS__)

◆ vsaddu_vx_u8m8

#define vsaddu_vx_u8m8 ( ... ) __riscv_vsaddu_vx_u8m8(__VA_ARGS__)

◆ vsaddu_vx_u8m8_m

#define vsaddu_vx_u8m8_m ( ... ) __riscv_vsaddu_vx_u8m8_tumu(__VA_ARGS__)

◆ vsaddu_vx_u8mf2

#define vsaddu_vx_u8mf2 ( ... ) __riscv_vsaddu_vx_u8mf2(__VA_ARGS__)

◆ vsaddu_vx_u8mf2_m

#define vsaddu_vx_u8mf2_m ( ... ) __riscv_vsaddu_vx_u8mf2_tumu(__VA_ARGS__)

◆ vsaddu_vx_u8mf4

#define vsaddu_vx_u8mf4 ( ... ) __riscv_vsaddu_vx_u8mf4(__VA_ARGS__)

◆ vsaddu_vx_u8mf4_m

#define vsaddu_vx_u8mf4_m ( ... ) __riscv_vsaddu_vx_u8mf4_tumu(__VA_ARGS__)

◆ vsaddu_vx_u8mf8

#define vsaddu_vx_u8mf8 ( ... ) __riscv_vsaddu_vx_u8mf8(__VA_ARGS__)

◆ vsaddu_vx_u8mf8_m

#define vsaddu_vx_u8mf8_m ( ... ) __riscv_vsaddu_vx_u8mf8_tumu(__VA_ARGS__)

◆ vsbc_vvm_i16m1

#define vsbc_vvm_i16m1 ( ... ) __riscv_vsbc_vvm_i16m1(__VA_ARGS__)

◆ vsbc_vvm_i16m2

#define vsbc_vvm_i16m2 ( ... ) __riscv_vsbc_vvm_i16m2(__VA_ARGS__)

◆ vsbc_vvm_i16m4

#define vsbc_vvm_i16m4 ( ... ) __riscv_vsbc_vvm_i16m4(__VA_ARGS__)

◆ vsbc_vvm_i16m8

#define vsbc_vvm_i16m8 ( ... ) __riscv_vsbc_vvm_i16m8(__VA_ARGS__)

◆ vsbc_vvm_i16mf2

#define vsbc_vvm_i16mf2 ( ... ) __riscv_vsbc_vvm_i16mf2(__VA_ARGS__)

◆ vsbc_vvm_i16mf4

#define vsbc_vvm_i16mf4 ( ... ) __riscv_vsbc_vvm_i16mf4(__VA_ARGS__)

◆ vsbc_vvm_i32m1

#define vsbc_vvm_i32m1 ( ... ) __riscv_vsbc_vvm_i32m1(__VA_ARGS__)

◆ vsbc_vvm_i32m2

#define vsbc_vvm_i32m2 ( ... ) __riscv_vsbc_vvm_i32m2(__VA_ARGS__)

◆ vsbc_vvm_i32m4

#define vsbc_vvm_i32m4 ( ... ) __riscv_vsbc_vvm_i32m4(__VA_ARGS__)

◆ vsbc_vvm_i32m8

#define vsbc_vvm_i32m8 ( ... ) __riscv_vsbc_vvm_i32m8(__VA_ARGS__)

◆ vsbc_vvm_i32mf2

#define vsbc_vvm_i32mf2 ( ... ) __riscv_vsbc_vvm_i32mf2(__VA_ARGS__)

◆ vsbc_vvm_i64m1

#define vsbc_vvm_i64m1 ( ... ) __riscv_vsbc_vvm_i64m1(__VA_ARGS__)

◆ vsbc_vvm_i64m2

#define vsbc_vvm_i64m2 ( ... ) __riscv_vsbc_vvm_i64m2(__VA_ARGS__)

◆ vsbc_vvm_i64m4

#define vsbc_vvm_i64m4 ( ... ) __riscv_vsbc_vvm_i64m4(__VA_ARGS__)

◆ vsbc_vvm_i64m8

#define vsbc_vvm_i64m8 ( ... ) __riscv_vsbc_vvm_i64m8(__VA_ARGS__)

◆ vsbc_vvm_i8m1

#define vsbc_vvm_i8m1 ( ... ) __riscv_vsbc_vvm_i8m1(__VA_ARGS__)

◆ vsbc_vvm_i8m2

#define vsbc_vvm_i8m2 ( ... ) __riscv_vsbc_vvm_i8m2(__VA_ARGS__)

◆ vsbc_vvm_i8m4

#define vsbc_vvm_i8m4 ( ... ) __riscv_vsbc_vvm_i8m4(__VA_ARGS__)

◆ vsbc_vvm_i8m8

#define vsbc_vvm_i8m8 ( ... ) __riscv_vsbc_vvm_i8m8(__VA_ARGS__)

◆ vsbc_vvm_i8mf2

#define vsbc_vvm_i8mf2 ( ... ) __riscv_vsbc_vvm_i8mf2(__VA_ARGS__)

◆ vsbc_vvm_i8mf4

#define vsbc_vvm_i8mf4 ( ... ) __riscv_vsbc_vvm_i8mf4(__VA_ARGS__)

◆ vsbc_vvm_i8mf8

#define vsbc_vvm_i8mf8 ( ... ) __riscv_vsbc_vvm_i8mf8(__VA_ARGS__)

◆ vsbc_vvm_u16m1

#define vsbc_vvm_u16m1 ( ... ) __riscv_vsbc_vvm_u16m1(__VA_ARGS__)

◆ vsbc_vvm_u16m2

#define vsbc_vvm_u16m2 ( ... ) __riscv_vsbc_vvm_u16m2(__VA_ARGS__)

◆ vsbc_vvm_u16m4

#define vsbc_vvm_u16m4 ( ... ) __riscv_vsbc_vvm_u16m4(__VA_ARGS__)

◆ vsbc_vvm_u16m8

#define vsbc_vvm_u16m8 ( ... ) __riscv_vsbc_vvm_u16m8(__VA_ARGS__)

◆ vsbc_vvm_u16mf2

#define vsbc_vvm_u16mf2 ( ... ) __riscv_vsbc_vvm_u16mf2(__VA_ARGS__)

◆ vsbc_vvm_u16mf4

#define vsbc_vvm_u16mf4 ( ... ) __riscv_vsbc_vvm_u16mf4(__VA_ARGS__)

◆ vsbc_vvm_u32m1

#define vsbc_vvm_u32m1 ( ... ) __riscv_vsbc_vvm_u32m1(__VA_ARGS__)

◆ vsbc_vvm_u32m2

#define vsbc_vvm_u32m2 ( ... ) __riscv_vsbc_vvm_u32m2(__VA_ARGS__)

◆ vsbc_vvm_u32m4

#define vsbc_vvm_u32m4 ( ... ) __riscv_vsbc_vvm_u32m4(__VA_ARGS__)

◆ vsbc_vvm_u32m8

#define vsbc_vvm_u32m8 ( ... ) __riscv_vsbc_vvm_u32m8(__VA_ARGS__)

◆ vsbc_vvm_u32mf2

#define vsbc_vvm_u32mf2 ( ... ) __riscv_vsbc_vvm_u32mf2(__VA_ARGS__)

◆ vsbc_vvm_u64m1

#define vsbc_vvm_u64m1 ( ... ) __riscv_vsbc_vvm_u64m1(__VA_ARGS__)

◆ vsbc_vvm_u64m2

#define vsbc_vvm_u64m2 ( ... ) __riscv_vsbc_vvm_u64m2(__VA_ARGS__)

◆ vsbc_vvm_u64m4

#define vsbc_vvm_u64m4 ( ... ) __riscv_vsbc_vvm_u64m4(__VA_ARGS__)

◆ vsbc_vvm_u64m8

#define vsbc_vvm_u64m8 ( ... ) __riscv_vsbc_vvm_u64m8(__VA_ARGS__)

◆ vsbc_vvm_u8m1

#define vsbc_vvm_u8m1 ( ... ) __riscv_vsbc_vvm_u8m1(__VA_ARGS__)

◆ vsbc_vvm_u8m2

#define vsbc_vvm_u8m2 ( ... ) __riscv_vsbc_vvm_u8m2(__VA_ARGS__)

◆ vsbc_vvm_u8m4

#define vsbc_vvm_u8m4 ( ... ) __riscv_vsbc_vvm_u8m4(__VA_ARGS__)

◆ vsbc_vvm_u8m8

#define vsbc_vvm_u8m8 ( ... ) __riscv_vsbc_vvm_u8m8(__VA_ARGS__)

◆ vsbc_vvm_u8mf2

#define vsbc_vvm_u8mf2 ( ... ) __riscv_vsbc_vvm_u8mf2(__VA_ARGS__)

◆ vsbc_vvm_u8mf4

#define vsbc_vvm_u8mf4 ( ... ) __riscv_vsbc_vvm_u8mf4(__VA_ARGS__)

◆ vsbc_vvm_u8mf8

#define vsbc_vvm_u8mf8 ( ... ) __riscv_vsbc_vvm_u8mf8(__VA_ARGS__)

◆ vsbc_vxm_i16m1

#define vsbc_vxm_i16m1 ( ... ) __riscv_vsbc_vxm_i16m1(__VA_ARGS__)

◆ vsbc_vxm_i16m2

#define vsbc_vxm_i16m2 ( ... ) __riscv_vsbc_vxm_i16m2(__VA_ARGS__)

◆ vsbc_vxm_i16m4

#define vsbc_vxm_i16m4 ( ... ) __riscv_vsbc_vxm_i16m4(__VA_ARGS__)

◆ vsbc_vxm_i16m8

#define vsbc_vxm_i16m8 ( ... ) __riscv_vsbc_vxm_i16m8(__VA_ARGS__)

◆ vsbc_vxm_i16mf2

#define vsbc_vxm_i16mf2 ( ... ) __riscv_vsbc_vxm_i16mf2(__VA_ARGS__)

◆ vsbc_vxm_i16mf4

#define vsbc_vxm_i16mf4 ( ... ) __riscv_vsbc_vxm_i16mf4(__VA_ARGS__)

◆ vsbc_vxm_i32m1

#define vsbc_vxm_i32m1 ( ... ) __riscv_vsbc_vxm_i32m1(__VA_ARGS__)

◆ vsbc_vxm_i32m2

#define vsbc_vxm_i32m2 ( ... ) __riscv_vsbc_vxm_i32m2(__VA_ARGS__)

◆ vsbc_vxm_i32m4

#define vsbc_vxm_i32m4 ( ... ) __riscv_vsbc_vxm_i32m4(__VA_ARGS__)

◆ vsbc_vxm_i32m8

#define vsbc_vxm_i32m8 ( ... ) __riscv_vsbc_vxm_i32m8(__VA_ARGS__)

◆ vsbc_vxm_i32mf2

#define vsbc_vxm_i32mf2 ( ... ) __riscv_vsbc_vxm_i32mf2(__VA_ARGS__)

◆ vsbc_vxm_i64m1

#define vsbc_vxm_i64m1 ( ... ) __riscv_vsbc_vxm_i64m1(__VA_ARGS__)

◆ vsbc_vxm_i64m2

#define vsbc_vxm_i64m2 ( ... ) __riscv_vsbc_vxm_i64m2(__VA_ARGS__)

◆ vsbc_vxm_i64m4

#define vsbc_vxm_i64m4 ( ... ) __riscv_vsbc_vxm_i64m4(__VA_ARGS__)

◆ vsbc_vxm_i64m8

#define vsbc_vxm_i64m8 ( ... ) __riscv_vsbc_vxm_i64m8(__VA_ARGS__)

◆ vsbc_vxm_i8m1

#define vsbc_vxm_i8m1 ( ... ) __riscv_vsbc_vxm_i8m1(__VA_ARGS__)

◆ vsbc_vxm_i8m2

#define vsbc_vxm_i8m2 ( ... ) __riscv_vsbc_vxm_i8m2(__VA_ARGS__)

◆ vsbc_vxm_i8m4

#define vsbc_vxm_i8m4 ( ... ) __riscv_vsbc_vxm_i8m4(__VA_ARGS__)

◆ vsbc_vxm_i8m8

#define vsbc_vxm_i8m8 ( ... ) __riscv_vsbc_vxm_i8m8(__VA_ARGS__)

◆ vsbc_vxm_i8mf2

#define vsbc_vxm_i8mf2 ( ... ) __riscv_vsbc_vxm_i8mf2(__VA_ARGS__)

◆ vsbc_vxm_i8mf4

#define vsbc_vxm_i8mf4 ( ... ) __riscv_vsbc_vxm_i8mf4(__VA_ARGS__)

◆ vsbc_vxm_i8mf8

#define vsbc_vxm_i8mf8 ( ... ) __riscv_vsbc_vxm_i8mf8(__VA_ARGS__)

◆ vsbc_vxm_u16m1

#define vsbc_vxm_u16m1 ( ... ) __riscv_vsbc_vxm_u16m1(__VA_ARGS__)

◆ vsbc_vxm_u16m2

#define vsbc_vxm_u16m2 ( ... ) __riscv_vsbc_vxm_u16m2(__VA_ARGS__)

◆ vsbc_vxm_u16m4

#define vsbc_vxm_u16m4 ( ... ) __riscv_vsbc_vxm_u16m4(__VA_ARGS__)

◆ vsbc_vxm_u16m8

#define vsbc_vxm_u16m8 ( ... ) __riscv_vsbc_vxm_u16m8(__VA_ARGS__)

◆ vsbc_vxm_u16mf2

#define vsbc_vxm_u16mf2 ( ... ) __riscv_vsbc_vxm_u16mf2(__VA_ARGS__)

◆ vsbc_vxm_u16mf4

#define vsbc_vxm_u16mf4 ( ... ) __riscv_vsbc_vxm_u16mf4(__VA_ARGS__)

◆ vsbc_vxm_u32m1

#define vsbc_vxm_u32m1 ( ... ) __riscv_vsbc_vxm_u32m1(__VA_ARGS__)

◆ vsbc_vxm_u32m2

#define vsbc_vxm_u32m2 ( ... ) __riscv_vsbc_vxm_u32m2(__VA_ARGS__)

◆ vsbc_vxm_u32m4

#define vsbc_vxm_u32m4 ( ... ) __riscv_vsbc_vxm_u32m4(__VA_ARGS__)

◆ vsbc_vxm_u32m8

#define vsbc_vxm_u32m8 ( ... ) __riscv_vsbc_vxm_u32m8(__VA_ARGS__)

◆ vsbc_vxm_u32mf2

#define vsbc_vxm_u32mf2 ( ... ) __riscv_vsbc_vxm_u32mf2(__VA_ARGS__)

◆ vsbc_vxm_u64m1

#define vsbc_vxm_u64m1 ( ... ) __riscv_vsbc_vxm_u64m1(__VA_ARGS__)

◆ vsbc_vxm_u64m2

#define vsbc_vxm_u64m2 ( ... ) __riscv_vsbc_vxm_u64m2(__VA_ARGS__)

◆ vsbc_vxm_u64m4

#define vsbc_vxm_u64m4 ( ... ) __riscv_vsbc_vxm_u64m4(__VA_ARGS__)

◆ vsbc_vxm_u64m8

#define vsbc_vxm_u64m8 ( ... ) __riscv_vsbc_vxm_u64m8(__VA_ARGS__)

◆ vsbc_vxm_u8m1

#define vsbc_vxm_u8m1 ( ... ) __riscv_vsbc_vxm_u8m1(__VA_ARGS__)

◆ vsbc_vxm_u8m2

#define vsbc_vxm_u8m2 ( ... ) __riscv_vsbc_vxm_u8m2(__VA_ARGS__)

◆ vsbc_vxm_u8m4

#define vsbc_vxm_u8m4 ( ... ) __riscv_vsbc_vxm_u8m4(__VA_ARGS__)

◆ vsbc_vxm_u8m8

#define vsbc_vxm_u8m8 ( ... ) __riscv_vsbc_vxm_u8m8(__VA_ARGS__)

◆ vsbc_vxm_u8mf2

#define vsbc_vxm_u8mf2 ( ... ) __riscv_vsbc_vxm_u8mf2(__VA_ARGS__)

◆ vsbc_vxm_u8mf4

#define vsbc_vxm_u8mf4 ( ... ) __riscv_vsbc_vxm_u8mf4(__VA_ARGS__)

◆ vsbc_vxm_u8mf8

#define vsbc_vxm_u8mf8 ( ... ) __riscv_vsbc_vxm_u8mf8(__VA_ARGS__)

◆ vse16_v_f16m1

#define vse16_v_f16m1 ( ... ) __riscv_vse16_v_f16m1(__VA_ARGS__)

◆ vse16_v_f16m1_m

#define vse16_v_f16m1_m ( ... ) __riscv_vse16_v_f16m1_m(__VA_ARGS__)

◆ vse16_v_f16m2

#define vse16_v_f16m2 ( ... ) __riscv_vse16_v_f16m2(__VA_ARGS__)

◆ vse16_v_f16m2_m

#define vse16_v_f16m2_m ( ... ) __riscv_vse16_v_f16m2_m(__VA_ARGS__)

◆ vse16_v_f16m4

#define vse16_v_f16m4 ( ... ) __riscv_vse16_v_f16m4(__VA_ARGS__)

◆ vse16_v_f16m4_m

#define vse16_v_f16m4_m ( ... ) __riscv_vse16_v_f16m4_m(__VA_ARGS__)

◆ vse16_v_f16m8

#define vse16_v_f16m8 ( ... ) __riscv_vse16_v_f16m8(__VA_ARGS__)

◆ vse16_v_f16m8_m

#define vse16_v_f16m8_m ( ... ) __riscv_vse16_v_f16m8_m(__VA_ARGS__)

◆ vse16_v_f16mf2

#define vse16_v_f16mf2 ( ... ) __riscv_vse16_v_f16mf2(__VA_ARGS__)

◆ vse16_v_f16mf2_m

#define vse16_v_f16mf2_m ( ... ) __riscv_vse16_v_f16mf2_m(__VA_ARGS__)

◆ vse16_v_f16mf4

#define vse16_v_f16mf4 ( ... ) __riscv_vse16_v_f16mf4(__VA_ARGS__)

◆ vse16_v_f16mf4_m

#define vse16_v_f16mf4_m ( ... ) __riscv_vse16_v_f16mf4_m(__VA_ARGS__)

◆ vse16_v_i16m1

#define vse16_v_i16m1 ( ... ) __riscv_vse16_v_i16m1(__VA_ARGS__)

◆ vse16_v_i16m1_m

#define vse16_v_i16m1_m ( ... ) __riscv_vse16_v_i16m1_m(__VA_ARGS__)

◆ vse16_v_i16m2

#define vse16_v_i16m2 ( ... ) __riscv_vse16_v_i16m2(__VA_ARGS__)

◆ vse16_v_i16m2_m

#define vse16_v_i16m2_m ( ... ) __riscv_vse16_v_i16m2_m(__VA_ARGS__)

◆ vse16_v_i16m4

#define vse16_v_i16m4 ( ... ) __riscv_vse16_v_i16m4(__VA_ARGS__)

◆ vse16_v_i16m4_m

#define vse16_v_i16m4_m ( ... ) __riscv_vse16_v_i16m4_m(__VA_ARGS__)

◆ vse16_v_i16m8

#define vse16_v_i16m8 ( ... ) __riscv_vse16_v_i16m8(__VA_ARGS__)

◆ vse16_v_i16m8_m

#define vse16_v_i16m8_m ( ... ) __riscv_vse16_v_i16m8_m(__VA_ARGS__)

◆ vse16_v_i16mf2

#define vse16_v_i16mf2 ( ... ) __riscv_vse16_v_i16mf2(__VA_ARGS__)

◆ vse16_v_i16mf2_m

#define vse16_v_i16mf2_m ( ... ) __riscv_vse16_v_i16mf2_m(__VA_ARGS__)

◆ vse16_v_i16mf4

#define vse16_v_i16mf4 ( ... ) __riscv_vse16_v_i16mf4(__VA_ARGS__)

◆ vse16_v_i16mf4_m

#define vse16_v_i16mf4_m ( ... ) __riscv_vse16_v_i16mf4_m(__VA_ARGS__)

◆ vse16_v_u16m1

#define vse16_v_u16m1 ( ... ) __riscv_vse16_v_u16m1(__VA_ARGS__)

◆ vse16_v_u16m1_m

#define vse16_v_u16m1_m ( ... ) __riscv_vse16_v_u16m1_m(__VA_ARGS__)

◆ vse16_v_u16m2

#define vse16_v_u16m2 ( ... ) __riscv_vse16_v_u16m2(__VA_ARGS__)

◆ vse16_v_u16m2_m

#define vse16_v_u16m2_m ( ... ) __riscv_vse16_v_u16m2_m(__VA_ARGS__)

◆ vse16_v_u16m4

#define vse16_v_u16m4 ( ... ) __riscv_vse16_v_u16m4(__VA_ARGS__)

◆ vse16_v_u16m4_m

#define vse16_v_u16m4_m ( ... ) __riscv_vse16_v_u16m4_m(__VA_ARGS__)

◆ vse16_v_u16m8

#define vse16_v_u16m8 ( ... ) __riscv_vse16_v_u16m8(__VA_ARGS__)

◆ vse16_v_u16m8_m

#define vse16_v_u16m8_m ( ... ) __riscv_vse16_v_u16m8_m(__VA_ARGS__)

◆ vse16_v_u16mf2

#define vse16_v_u16mf2 ( ... ) __riscv_vse16_v_u16mf2(__VA_ARGS__)

◆ vse16_v_u16mf2_m

#define vse16_v_u16mf2_m ( ... ) __riscv_vse16_v_u16mf2_m(__VA_ARGS__)

◆ vse16_v_u16mf4

#define vse16_v_u16mf4 ( ... ) __riscv_vse16_v_u16mf4(__VA_ARGS__)

◆ vse16_v_u16mf4_m

#define vse16_v_u16mf4_m ( ... ) __riscv_vse16_v_u16mf4_m(__VA_ARGS__)

◆ vse32_v_f32m1

#define vse32_v_f32m1 ( ... ) __riscv_vse32_v_f32m1(__VA_ARGS__)

◆ vse32_v_f32m1_m

#define vse32_v_f32m1_m ( ... ) __riscv_vse32_v_f32m1_m(__VA_ARGS__)

◆ vse32_v_f32m2

#define vse32_v_f32m2 ( ... ) __riscv_vse32_v_f32m2(__VA_ARGS__)

◆ vse32_v_f32m2_m

#define vse32_v_f32m2_m ( ... ) __riscv_vse32_v_f32m2_m(__VA_ARGS__)

◆ vse32_v_f32m4

#define vse32_v_f32m4 ( ... ) __riscv_vse32_v_f32m4(__VA_ARGS__)

◆ vse32_v_f32m4_m

#define vse32_v_f32m4_m ( ... ) __riscv_vse32_v_f32m4_m(__VA_ARGS__)

◆ vse32_v_f32m8

#define vse32_v_f32m8 ( ... ) __riscv_vse32_v_f32m8(__VA_ARGS__)

◆ vse32_v_f32m8_m

#define vse32_v_f32m8_m ( ... ) __riscv_vse32_v_f32m8_m(__VA_ARGS__)

◆ vse32_v_f32mf2

#define vse32_v_f32mf2 ( ... ) __riscv_vse32_v_f32mf2(__VA_ARGS__)

◆ vse32_v_f32mf2_m

#define vse32_v_f32mf2_m ( ... ) __riscv_vse32_v_f32mf2_m(__VA_ARGS__)

◆ vse32_v_i32m1

#define vse32_v_i32m1 ( ... ) __riscv_vse32_v_i32m1(__VA_ARGS__)

◆ vse32_v_i32m1_m

#define vse32_v_i32m1_m ( ... ) __riscv_vse32_v_i32m1_m(__VA_ARGS__)

◆ vse32_v_i32m2

#define vse32_v_i32m2 ( ... ) __riscv_vse32_v_i32m2(__VA_ARGS__)

◆ vse32_v_i32m2_m

#define vse32_v_i32m2_m ( ... ) __riscv_vse32_v_i32m2_m(__VA_ARGS__)

◆ vse32_v_i32m4

#define vse32_v_i32m4 ( ... ) __riscv_vse32_v_i32m4(__VA_ARGS__)

◆ vse32_v_i32m4_m

#define vse32_v_i32m4_m ( ... ) __riscv_vse32_v_i32m4_m(__VA_ARGS__)

◆ vse32_v_i32m8

#define vse32_v_i32m8 ( ... ) __riscv_vse32_v_i32m8(__VA_ARGS__)

◆ vse32_v_i32m8_m

#define vse32_v_i32m8_m ( ... ) __riscv_vse32_v_i32m8_m(__VA_ARGS__)

◆ vse32_v_i32mf2

#define vse32_v_i32mf2 ( ... ) __riscv_vse32_v_i32mf2(__VA_ARGS__)

◆ vse32_v_i32mf2_m

#define vse32_v_i32mf2_m ( ... ) __riscv_vse32_v_i32mf2_m(__VA_ARGS__)

◆ vse32_v_u32m1

#define vse32_v_u32m1 ( ... ) __riscv_vse32_v_u32m1(__VA_ARGS__)

◆ vse32_v_u32m1_m

#define vse32_v_u32m1_m ( ... ) __riscv_vse32_v_u32m1_m(__VA_ARGS__)

◆ vse32_v_u32m2

#define vse32_v_u32m2 ( ... ) __riscv_vse32_v_u32m2(__VA_ARGS__)

◆ vse32_v_u32m2_m

#define vse32_v_u32m2_m ( ... ) __riscv_vse32_v_u32m2_m(__VA_ARGS__)

◆ vse32_v_u32m4

#define vse32_v_u32m4 ( ... ) __riscv_vse32_v_u32m4(__VA_ARGS__)

◆ vse32_v_u32m4_m

#define vse32_v_u32m4_m ( ... ) __riscv_vse32_v_u32m4_m(__VA_ARGS__)

◆ vse32_v_u32m8

#define vse32_v_u32m8 ( ... ) __riscv_vse32_v_u32m8(__VA_ARGS__)

◆ vse32_v_u32m8_m

#define vse32_v_u32m8_m ( ... ) __riscv_vse32_v_u32m8_m(__VA_ARGS__)

◆ vse32_v_u32mf2

#define vse32_v_u32mf2 ( ... ) __riscv_vse32_v_u32mf2(__VA_ARGS__)

◆ vse32_v_u32mf2_m

#define vse32_v_u32mf2_m ( ... ) __riscv_vse32_v_u32mf2_m(__VA_ARGS__)

◆ vse64_v_f64m1

#define vse64_v_f64m1 ( ... ) __riscv_vse64_v_f64m1(__VA_ARGS__)

◆ vse64_v_f64m1_m

#define vse64_v_f64m1_m ( ... ) __riscv_vse64_v_f64m1_m(__VA_ARGS__)

◆ vse64_v_f64m2

#define vse64_v_f64m2 ( ... ) __riscv_vse64_v_f64m2(__VA_ARGS__)

◆ vse64_v_f64m2_m

#define vse64_v_f64m2_m ( ... ) __riscv_vse64_v_f64m2_m(__VA_ARGS__)

◆ vse64_v_f64m4

#define vse64_v_f64m4 ( ... ) __riscv_vse64_v_f64m4(__VA_ARGS__)

◆ vse64_v_f64m4_m

#define vse64_v_f64m4_m ( ... ) __riscv_vse64_v_f64m4_m(__VA_ARGS__)

◆ vse64_v_f64m8

#define vse64_v_f64m8 ( ... ) __riscv_vse64_v_f64m8(__VA_ARGS__)

◆ vse64_v_f64m8_m

#define vse64_v_f64m8_m ( ... ) __riscv_vse64_v_f64m8_m(__VA_ARGS__)

◆ vse64_v_i64m1

#define vse64_v_i64m1 ( ... ) __riscv_vse64_v_i64m1(__VA_ARGS__)

◆ vse64_v_i64m1_m

#define vse64_v_i64m1_m ( ... ) __riscv_vse64_v_i64m1_m(__VA_ARGS__)

◆ vse64_v_i64m2

#define vse64_v_i64m2 ( ... ) __riscv_vse64_v_i64m2(__VA_ARGS__)

◆ vse64_v_i64m2_m

#define vse64_v_i64m2_m ( ... ) __riscv_vse64_v_i64m2_m(__VA_ARGS__)

◆ vse64_v_i64m4

#define vse64_v_i64m4 ( ... ) __riscv_vse64_v_i64m4(__VA_ARGS__)

◆ vse64_v_i64m4_m

#define vse64_v_i64m4_m ( ... ) __riscv_vse64_v_i64m4_m(__VA_ARGS__)

◆ vse64_v_i64m8

#define vse64_v_i64m8 ( ... ) __riscv_vse64_v_i64m8(__VA_ARGS__)

◆ vse64_v_i64m8_m

#define vse64_v_i64m8_m ( ... ) __riscv_vse64_v_i64m8_m(__VA_ARGS__)

◆ vse64_v_u64m1

#define vse64_v_u64m1 ( ... ) __riscv_vse64_v_u64m1(__VA_ARGS__)

◆ vse64_v_u64m1_m

#define vse64_v_u64m1_m ( ... ) __riscv_vse64_v_u64m1_m(__VA_ARGS__)

◆ vse64_v_u64m2

#define vse64_v_u64m2 ( ... ) __riscv_vse64_v_u64m2(__VA_ARGS__)

◆ vse64_v_u64m2_m

#define vse64_v_u64m2_m ( ... ) __riscv_vse64_v_u64m2_m(__VA_ARGS__)

◆ vse64_v_u64m4

#define vse64_v_u64m4 ( ... ) __riscv_vse64_v_u64m4(__VA_ARGS__)

◆ vse64_v_u64m4_m

#define vse64_v_u64m4_m ( ... ) __riscv_vse64_v_u64m4_m(__VA_ARGS__)

◆ vse64_v_u64m8

#define vse64_v_u64m8 ( ... ) __riscv_vse64_v_u64m8(__VA_ARGS__)

◆ vse64_v_u64m8_m

#define vse64_v_u64m8_m ( ... ) __riscv_vse64_v_u64m8_m(__VA_ARGS__)

◆ vse8_v_i8m1

#define vse8_v_i8m1 ( ... ) __riscv_vse8_v_i8m1(__VA_ARGS__)

◆ vse8_v_i8m1_m

#define vse8_v_i8m1_m ( ... ) __riscv_vse8_v_i8m1_m(__VA_ARGS__)

◆ vse8_v_i8m2

#define vse8_v_i8m2 ( ... ) __riscv_vse8_v_i8m2(__VA_ARGS__)

◆ vse8_v_i8m2_m

#define vse8_v_i8m2_m ( ... ) __riscv_vse8_v_i8m2_m(__VA_ARGS__)

◆ vse8_v_i8m4

#define vse8_v_i8m4 ( ... ) __riscv_vse8_v_i8m4(__VA_ARGS__)

◆ vse8_v_i8m4_m

#define vse8_v_i8m4_m ( ... ) __riscv_vse8_v_i8m4_m(__VA_ARGS__)

◆ vse8_v_i8m8

#define vse8_v_i8m8 ( ... ) __riscv_vse8_v_i8m8(__VA_ARGS__)

◆ vse8_v_i8m8_m

#define vse8_v_i8m8_m ( ... ) __riscv_vse8_v_i8m8_m(__VA_ARGS__)

◆ vse8_v_i8mf2

#define vse8_v_i8mf2 ( ... ) __riscv_vse8_v_i8mf2(__VA_ARGS__)

◆ vse8_v_i8mf2_m

#define vse8_v_i8mf2_m ( ... ) __riscv_vse8_v_i8mf2_m(__VA_ARGS__)

◆ vse8_v_i8mf4

#define vse8_v_i8mf4 ( ... ) __riscv_vse8_v_i8mf4(__VA_ARGS__)

◆ vse8_v_i8mf4_m

#define vse8_v_i8mf4_m ( ... ) __riscv_vse8_v_i8mf4_m(__VA_ARGS__)

◆ vse8_v_i8mf8

#define vse8_v_i8mf8 ( ... ) __riscv_vse8_v_i8mf8(__VA_ARGS__)

◆ vse8_v_i8mf8_m

#define vse8_v_i8mf8_m ( ... ) __riscv_vse8_v_i8mf8_m(__VA_ARGS__)

◆ vse8_v_u8m1

#define vse8_v_u8m1 ( ... ) __riscv_vse8_v_u8m1(__VA_ARGS__)

◆ vse8_v_u8m1_m

#define vse8_v_u8m1_m ( ... ) __riscv_vse8_v_u8m1_m(__VA_ARGS__)

◆ vse8_v_u8m2

#define vse8_v_u8m2 ( ... ) __riscv_vse8_v_u8m2(__VA_ARGS__)

◆ vse8_v_u8m2_m

#define vse8_v_u8m2_m ( ... ) __riscv_vse8_v_u8m2_m(__VA_ARGS__)

◆ vse8_v_u8m4

#define vse8_v_u8m4 ( ... ) __riscv_vse8_v_u8m4(__VA_ARGS__)

◆ vse8_v_u8m4_m

#define vse8_v_u8m4_m ( ... ) __riscv_vse8_v_u8m4_m(__VA_ARGS__)

◆ vse8_v_u8m8

#define vse8_v_u8m8 ( ... ) __riscv_vse8_v_u8m8(__VA_ARGS__)

◆ vse8_v_u8m8_m

#define vse8_v_u8m8_m ( ... ) __riscv_vse8_v_u8m8_m(__VA_ARGS__)

◆ vse8_v_u8mf2

#define vse8_v_u8mf2 ( ... ) __riscv_vse8_v_u8mf2(__VA_ARGS__)

◆ vse8_v_u8mf2_m

#define vse8_v_u8mf2_m ( ... ) __riscv_vse8_v_u8mf2_m(__VA_ARGS__)

◆ vse8_v_u8mf4

#define vse8_v_u8mf4 ( ... ) __riscv_vse8_v_u8mf4(__VA_ARGS__)

◆ vse8_v_u8mf4_m

#define vse8_v_u8mf4_m ( ... ) __riscv_vse8_v_u8mf4_m(__VA_ARGS__)

◆ vse8_v_u8mf8

#define vse8_v_u8mf8 ( ... ) __riscv_vse8_v_u8mf8(__VA_ARGS__)

◆ vse8_v_u8mf8_m

#define vse8_v_u8mf8_m ( ... ) __riscv_vse8_v_u8mf8_m(__VA_ARGS__)

◆ vset_v_f16m1_f16m2

#define vset_v_f16m1_f16m2 ( ... ) __riscv_vset_v_f16m1_f16m2(__VA_ARGS__)

◆ vset_v_f16m1_f16m4

#define vset_v_f16m1_f16m4 ( ... ) __riscv_vset_v_f16m1_f16m4(__VA_ARGS__)

◆ vset_v_f16m1_f16m8

#define vset_v_f16m1_f16m8 ( ... ) __riscv_vset_v_f16m1_f16m8(__VA_ARGS__)

◆ vset_v_f16m2_f16m4

#define vset_v_f16m2_f16m4 ( ... ) __riscv_vset_v_f16m2_f16m4(__VA_ARGS__)

◆ vset_v_f16m2_f16m8

#define vset_v_f16m2_f16m8 ( ... ) __riscv_vset_v_f16m2_f16m8(__VA_ARGS__)

◆ vset_v_f16m4_f16m8

#define vset_v_f16m4_f16m8 ( ... ) __riscv_vset_v_f16m4_f16m8(__VA_ARGS__)

◆ vset_v_f32m1_f32m2

#define vset_v_f32m1_f32m2 ( ... ) __riscv_vset_v_f32m1_f32m2(__VA_ARGS__)

◆ vset_v_f32m1_f32m4

#define vset_v_f32m1_f32m4 ( ... ) __riscv_vset_v_f32m1_f32m4(__VA_ARGS__)

◆ vset_v_f32m1_f32m8

#define vset_v_f32m1_f32m8 ( ... ) __riscv_vset_v_f32m1_f32m8(__VA_ARGS__)

◆ vset_v_f32m2_f32m4

#define vset_v_f32m2_f32m4 ( ... ) __riscv_vset_v_f32m2_f32m4(__VA_ARGS__)

◆ vset_v_f32m2_f32m8

#define vset_v_f32m2_f32m8 ( ... ) __riscv_vset_v_f32m2_f32m8(__VA_ARGS__)

◆ vset_v_f32m4_f32m8

#define vset_v_f32m4_f32m8 ( ... ) __riscv_vset_v_f32m4_f32m8(__VA_ARGS__)

◆ vset_v_f64m1_f64m2

#define vset_v_f64m1_f64m2 ( ... ) __riscv_vset_v_f64m1_f64m2(__VA_ARGS__)

◆ vset_v_f64m1_f64m4

#define vset_v_f64m1_f64m4 ( ... ) __riscv_vset_v_f64m1_f64m4(__VA_ARGS__)

◆ vset_v_f64m1_f64m8

#define vset_v_f64m1_f64m8 ( ... ) __riscv_vset_v_f64m1_f64m8(__VA_ARGS__)

◆ vset_v_f64m2_f64m4

#define vset_v_f64m2_f64m4 ( ... ) __riscv_vset_v_f64m2_f64m4(__VA_ARGS__)

◆ vset_v_f64m2_f64m8

#define vset_v_f64m2_f64m8 ( ... ) __riscv_vset_v_f64m2_f64m8(__VA_ARGS__)

◆ vset_v_f64m4_f64m8

#define vset_v_f64m4_f64m8 ( ... ) __riscv_vset_v_f64m4_f64m8(__VA_ARGS__)

◆ vset_v_i16m1_i16m2

#define vset_v_i16m1_i16m2 ( ... ) __riscv_vset_v_i16m1_i16m2(__VA_ARGS__)

◆ vset_v_i16m1_i16m4

#define vset_v_i16m1_i16m4 ( ... ) __riscv_vset_v_i16m1_i16m4(__VA_ARGS__)

◆ vset_v_i16m1_i16m8

#define vset_v_i16m1_i16m8 ( ... ) __riscv_vset_v_i16m1_i16m8(__VA_ARGS__)

◆ vset_v_i16m2_i16m4

#define vset_v_i16m2_i16m4 ( ... ) __riscv_vset_v_i16m2_i16m4(__VA_ARGS__)

◆ vset_v_i16m2_i16m8

#define vset_v_i16m2_i16m8 ( ... ) __riscv_vset_v_i16m2_i16m8(__VA_ARGS__)

◆ vset_v_i16m4_i16m8

#define vset_v_i16m4_i16m8 ( ... ) __riscv_vset_v_i16m4_i16m8(__VA_ARGS__)

◆ vset_v_i32m1_i32m2

#define vset_v_i32m1_i32m2 ( ... ) __riscv_vset_v_i32m1_i32m2(__VA_ARGS__)

◆ vset_v_i32m1_i32m4

#define vset_v_i32m1_i32m4 ( ... ) __riscv_vset_v_i32m1_i32m4(__VA_ARGS__)

◆ vset_v_i32m1_i32m8

#define vset_v_i32m1_i32m8 ( ... ) __riscv_vset_v_i32m1_i32m8(__VA_ARGS__)

◆ vset_v_i32m2_i32m4

#define vset_v_i32m2_i32m4 ( ... ) __riscv_vset_v_i32m2_i32m4(__VA_ARGS__)

◆ vset_v_i32m2_i32m8

#define vset_v_i32m2_i32m8 ( ... ) __riscv_vset_v_i32m2_i32m8(__VA_ARGS__)

◆ vset_v_i32m4_i32m8

#define vset_v_i32m4_i32m8 ( ... ) __riscv_vset_v_i32m4_i32m8(__VA_ARGS__)

◆ vset_v_i64m1_i64m2

#define vset_v_i64m1_i64m2 ( ... ) __riscv_vset_v_i64m1_i64m2(__VA_ARGS__)

◆ vset_v_i64m1_i64m4

#define vset_v_i64m1_i64m4 ( ... ) __riscv_vset_v_i64m1_i64m4(__VA_ARGS__)

◆ vset_v_i64m1_i64m8

#define vset_v_i64m1_i64m8 ( ... ) __riscv_vset_v_i64m1_i64m8(__VA_ARGS__)

◆ vset_v_i64m2_i64m4

#define vset_v_i64m2_i64m4 ( ... ) __riscv_vset_v_i64m2_i64m4(__VA_ARGS__)

◆ vset_v_i64m2_i64m8

#define vset_v_i64m2_i64m8 ( ... ) __riscv_vset_v_i64m2_i64m8(__VA_ARGS__)

◆ vset_v_i64m4_i64m8

#define vset_v_i64m4_i64m8 ( ... ) __riscv_vset_v_i64m4_i64m8(__VA_ARGS__)

◆ vset_v_i8m1_i8m2

#define vset_v_i8m1_i8m2 ( ... ) __riscv_vset_v_i8m1_i8m2(__VA_ARGS__)

◆ vset_v_i8m1_i8m4

#define vset_v_i8m1_i8m4 ( ... ) __riscv_vset_v_i8m1_i8m4(__VA_ARGS__)

◆ vset_v_i8m1_i8m8

#define vset_v_i8m1_i8m8 ( ... ) __riscv_vset_v_i8m1_i8m8(__VA_ARGS__)

◆ vset_v_i8m2_i8m4

#define vset_v_i8m2_i8m4 ( ... ) __riscv_vset_v_i8m2_i8m4(__VA_ARGS__)

◆ vset_v_i8m2_i8m8

#define vset_v_i8m2_i8m8 ( ... ) __riscv_vset_v_i8m2_i8m8(__VA_ARGS__)

◆ vset_v_i8m4_i8m8

#define vset_v_i8m4_i8m8 ( ... ) __riscv_vset_v_i8m4_i8m8(__VA_ARGS__)

◆ vset_v_u16m1_u16m2

#define vset_v_u16m1_u16m2 ( ... ) __riscv_vset_v_u16m1_u16m2(__VA_ARGS__)

◆ vset_v_u16m1_u16m4

#define vset_v_u16m1_u16m4 ( ... ) __riscv_vset_v_u16m1_u16m4(__VA_ARGS__)

◆ vset_v_u16m1_u16m8

#define vset_v_u16m1_u16m8 ( ... ) __riscv_vset_v_u16m1_u16m8(__VA_ARGS__)

◆ vset_v_u16m2_u16m4

#define vset_v_u16m2_u16m4 ( ... ) __riscv_vset_v_u16m2_u16m4(__VA_ARGS__)

◆ vset_v_u16m2_u16m8

#define vset_v_u16m2_u16m8 ( ... ) __riscv_vset_v_u16m2_u16m8(__VA_ARGS__)

◆ vset_v_u16m4_u16m8

#define vset_v_u16m4_u16m8 ( ... ) __riscv_vset_v_u16m4_u16m8(__VA_ARGS__)

◆ vset_v_u32m1_u32m2

#define vset_v_u32m1_u32m2 ( ... ) __riscv_vset_v_u32m1_u32m2(__VA_ARGS__)

◆ vset_v_u32m1_u32m4

#define vset_v_u32m1_u32m4 ( ... ) __riscv_vset_v_u32m1_u32m4(__VA_ARGS__)

◆ vset_v_u32m1_u32m8

#define vset_v_u32m1_u32m8 ( ... ) __riscv_vset_v_u32m1_u32m8(__VA_ARGS__)

◆ vset_v_u32m2_u32m4

#define vset_v_u32m2_u32m4 ( ... ) __riscv_vset_v_u32m2_u32m4(__VA_ARGS__)

◆ vset_v_u32m2_u32m8

#define vset_v_u32m2_u32m8 ( ... ) __riscv_vset_v_u32m2_u32m8(__VA_ARGS__)

◆ vset_v_u32m4_u32m8

#define vset_v_u32m4_u32m8 ( ... ) __riscv_vset_v_u32m4_u32m8(__VA_ARGS__)

◆ vset_v_u64m1_u64m2

#define vset_v_u64m1_u64m2 ( ... ) __riscv_vset_v_u64m1_u64m2(__VA_ARGS__)

◆ vset_v_u64m1_u64m4

#define vset_v_u64m1_u64m4 ( ... ) __riscv_vset_v_u64m1_u64m4(__VA_ARGS__)

◆ vset_v_u64m1_u64m8

#define vset_v_u64m1_u64m8 ( ... ) __riscv_vset_v_u64m1_u64m8(__VA_ARGS__)

◆ vset_v_u64m2_u64m4

#define vset_v_u64m2_u64m4 ( ... ) __riscv_vset_v_u64m2_u64m4(__VA_ARGS__)

◆ vset_v_u64m2_u64m8

#define vset_v_u64m2_u64m8 ( ... ) __riscv_vset_v_u64m2_u64m8(__VA_ARGS__)

◆ vset_v_u64m4_u64m8

#define vset_v_u64m4_u64m8 ( ... ) __riscv_vset_v_u64m4_u64m8(__VA_ARGS__)

◆ vset_v_u8m1_u8m2

#define vset_v_u8m1_u8m2 ( ... ) __riscv_vset_v_u8m1_u8m2(__VA_ARGS__)

◆ vset_v_u8m1_u8m4

#define vset_v_u8m1_u8m4 ( ... ) __riscv_vset_v_u8m1_u8m4(__VA_ARGS__)

◆ vset_v_u8m1_u8m8

#define vset_v_u8m1_u8m8 ( ... ) __riscv_vset_v_u8m1_u8m8(__VA_ARGS__)

◆ vset_v_u8m2_u8m4

#define vset_v_u8m2_u8m4 ( ... ) __riscv_vset_v_u8m2_u8m4(__VA_ARGS__)

◆ vset_v_u8m2_u8m8

#define vset_v_u8m2_u8m8 ( ... ) __riscv_vset_v_u8m2_u8m8(__VA_ARGS__)

◆ vset_v_u8m4_u8m8

#define vset_v_u8m4_u8m8 ( ... ) __riscv_vset_v_u8m4_u8m8(__VA_ARGS__)

◆ vsetvl_e16m1

#define vsetvl_e16m1 ( ... ) __riscv_vsetvl_e16m1(__VA_ARGS__)

◆ vsetvl_e16m2

#define vsetvl_e16m2 ( ... ) __riscv_vsetvl_e16m2(__VA_ARGS__)

◆ vsetvl_e16m4

#define vsetvl_e16m4 ( ... ) __riscv_vsetvl_e16m4(__VA_ARGS__)

◆ vsetvl_e16m8

#define vsetvl_e16m8 ( ... ) __riscv_vsetvl_e16m8(__VA_ARGS__)

◆ vsetvl_e16mf2

#define vsetvl_e16mf2 ( ... ) __riscv_vsetvl_e16mf2(__VA_ARGS__)

◆ vsetvl_e16mf4

#define vsetvl_e16mf4 ( ... ) __riscv_vsetvl_e16mf4(__VA_ARGS__)

◆ vsetvl_e32m1

#define vsetvl_e32m1 ( ... ) __riscv_vsetvl_e32m1(__VA_ARGS__)

◆ vsetvl_e32m2

#define vsetvl_e32m2 ( ... ) __riscv_vsetvl_e32m2(__VA_ARGS__)

◆ vsetvl_e32m4

#define vsetvl_e32m4 ( ... ) __riscv_vsetvl_e32m4(__VA_ARGS__)

◆ vsetvl_e32m8

#define vsetvl_e32m8 ( ... ) __riscv_vsetvl_e32m8(__VA_ARGS__)

◆ vsetvl_e32mf2

#define vsetvl_e32mf2 ( ... ) __riscv_vsetvl_e32mf2(__VA_ARGS__)

◆ vsetvl_e64m1

#define vsetvl_e64m1 ( ... ) __riscv_vsetvl_e64m1(__VA_ARGS__)

◆ vsetvl_e64m2

#define vsetvl_e64m2 ( ... ) __riscv_vsetvl_e64m2(__VA_ARGS__)

◆ vsetvl_e64m4

#define vsetvl_e64m4 ( ... ) __riscv_vsetvl_e64m4(__VA_ARGS__)

◆ vsetvl_e64m8

#define vsetvl_e64m8 ( ... ) __riscv_vsetvl_e64m8(__VA_ARGS__)

◆ vsetvl_e8m1

#define vsetvl_e8m1 ( ... ) __riscv_vsetvl_e8m1(__VA_ARGS__)

◆ vsetvl_e8m2

#define vsetvl_e8m2 ( ... ) __riscv_vsetvl_e8m2(__VA_ARGS__)

◆ vsetvl_e8m4

#define vsetvl_e8m4 ( ... ) __riscv_vsetvl_e8m4(__VA_ARGS__)

◆ vsetvl_e8m8

#define vsetvl_e8m8 ( ... ) __riscv_vsetvl_e8m8(__VA_ARGS__)

◆ vsetvl_e8mf2

#define vsetvl_e8mf2 ( ... ) __riscv_vsetvl_e8mf2(__VA_ARGS__)

◆ vsetvl_e8mf4

#define vsetvl_e8mf4 ( ... ) __riscv_vsetvl_e8mf4(__VA_ARGS__)

◆ vsetvl_e8mf8

#define vsetvl_e8mf8 ( ... ) __riscv_vsetvl_e8mf8(__VA_ARGS__)

◆ vsetvlmax_e16m1

#define vsetvlmax_e16m1 ( ... ) __riscv_vsetvlmax_e16m1(__VA_ARGS__)

◆ vsetvlmax_e16m2

#define vsetvlmax_e16m2 ( ... ) __riscv_vsetvlmax_e16m2(__VA_ARGS__)

◆ vsetvlmax_e16m4

#define vsetvlmax_e16m4 ( ... ) __riscv_vsetvlmax_e16m4(__VA_ARGS__)

◆ vsetvlmax_e16m8

#define vsetvlmax_e16m8 ( ... ) __riscv_vsetvlmax_e16m8(__VA_ARGS__)

◆ vsetvlmax_e16mf2

#define vsetvlmax_e16mf2 ( ... ) __riscv_vsetvlmax_e16mf2(__VA_ARGS__)

◆ vsetvlmax_e16mf4

#define vsetvlmax_e16mf4 ( ... ) __riscv_vsetvlmax_e16mf4(__VA_ARGS__)

◆ vsetvlmax_e32m1

#define vsetvlmax_e32m1 ( ... ) __riscv_vsetvlmax_e32m1(__VA_ARGS__)

◆ vsetvlmax_e32m2

#define vsetvlmax_e32m2 ( ... ) __riscv_vsetvlmax_e32m2(__VA_ARGS__)

◆ vsetvlmax_e32m4

#define vsetvlmax_e32m4 ( ... ) __riscv_vsetvlmax_e32m4(__VA_ARGS__)

◆ vsetvlmax_e32m8

#define vsetvlmax_e32m8 ( ... ) __riscv_vsetvlmax_e32m8(__VA_ARGS__)

◆ vsetvlmax_e32mf2

#define vsetvlmax_e32mf2 ( ... ) __riscv_vsetvlmax_e32mf2(__VA_ARGS__)

◆ vsetvlmax_e64m1

#define vsetvlmax_e64m1 ( ... ) __riscv_vsetvlmax_e64m1(__VA_ARGS__)

◆ vsetvlmax_e64m2

#define vsetvlmax_e64m2 ( ... ) __riscv_vsetvlmax_e64m2(__VA_ARGS__)

◆ vsetvlmax_e64m4

#define vsetvlmax_e64m4 ( ... ) __riscv_vsetvlmax_e64m4(__VA_ARGS__)

◆ vsetvlmax_e64m8

#define vsetvlmax_e64m8 ( ... ) __riscv_vsetvlmax_e64m8(__VA_ARGS__)

◆ vsetvlmax_e8m1

#define vsetvlmax_e8m1 ( ... ) __riscv_vsetvlmax_e8m1(__VA_ARGS__)

◆ vsetvlmax_e8m2

#define vsetvlmax_e8m2 ( ... ) __riscv_vsetvlmax_e8m2(__VA_ARGS__)

◆ vsetvlmax_e8m4

#define vsetvlmax_e8m4 ( ... ) __riscv_vsetvlmax_e8m4(__VA_ARGS__)

◆ vsetvlmax_e8m8

#define vsetvlmax_e8m8 ( ... ) __riscv_vsetvlmax_e8m8(__VA_ARGS__)

◆ vsetvlmax_e8mf2

#define vsetvlmax_e8mf2 ( ... ) __riscv_vsetvlmax_e8mf2(__VA_ARGS__)

◆ vsetvlmax_e8mf4

#define vsetvlmax_e8mf4 ( ... ) __riscv_vsetvlmax_e8mf4(__VA_ARGS__)

◆ vsetvlmax_e8mf8

#define vsetvlmax_e8mf8 ( ... ) __riscv_vsetvlmax_e8mf8(__VA_ARGS__)

◆ vsext_vf2_i16m1

#define vsext_vf2_i16m1 ( ... ) __riscv_vsext_vf2_i16m1(__VA_ARGS__)

◆ vsext_vf2_i16m1_m

#define vsext_vf2_i16m1_m ( ... ) __riscv_vsext_vf2_i16m1_tumu(__VA_ARGS__)

◆ vsext_vf2_i16m2

#define vsext_vf2_i16m2 ( ... ) __riscv_vsext_vf2_i16m2(__VA_ARGS__)

◆ vsext_vf2_i16m2_m

#define vsext_vf2_i16m2_m ( ... ) __riscv_vsext_vf2_i16m2_tumu(__VA_ARGS__)

◆ vsext_vf2_i16m4

#define vsext_vf2_i16m4 ( ... ) __riscv_vsext_vf2_i16m4(__VA_ARGS__)

◆ vsext_vf2_i16m4_m

#define vsext_vf2_i16m4_m ( ... ) __riscv_vsext_vf2_i16m4_tumu(__VA_ARGS__)

◆ vsext_vf2_i16m8

#define vsext_vf2_i16m8 ( ... ) __riscv_vsext_vf2_i16m8(__VA_ARGS__)

◆ vsext_vf2_i16m8_m

#define vsext_vf2_i16m8_m ( ... ) __riscv_vsext_vf2_i16m8_tumu(__VA_ARGS__)

◆ vsext_vf2_i16mf2

#define vsext_vf2_i16mf2 ( ... ) __riscv_vsext_vf2_i16mf2(__VA_ARGS__)

◆ vsext_vf2_i16mf2_m

#define vsext_vf2_i16mf2_m ( ... ) __riscv_vsext_vf2_i16mf2_tumu(__VA_ARGS__)

◆ vsext_vf2_i16mf4

#define vsext_vf2_i16mf4 ( ... ) __riscv_vsext_vf2_i16mf4(__VA_ARGS__)

◆ vsext_vf2_i16mf4_m

#define vsext_vf2_i16mf4_m ( ... ) __riscv_vsext_vf2_i16mf4_tumu(__VA_ARGS__)

◆ vsext_vf2_i32m1

#define vsext_vf2_i32m1 ( ... ) __riscv_vsext_vf2_i32m1(__VA_ARGS__)

◆ vsext_vf2_i32m1_m

#define vsext_vf2_i32m1_m ( ... ) __riscv_vsext_vf2_i32m1_tumu(__VA_ARGS__)

◆ vsext_vf2_i32m2

#define vsext_vf2_i32m2 ( ... ) __riscv_vsext_vf2_i32m2(__VA_ARGS__)

◆ vsext_vf2_i32m2_m

#define vsext_vf2_i32m2_m ( ... ) __riscv_vsext_vf2_i32m2_tumu(__VA_ARGS__)

◆ vsext_vf2_i32m4

#define vsext_vf2_i32m4 ( ... ) __riscv_vsext_vf2_i32m4(__VA_ARGS__)

◆ vsext_vf2_i32m4_m

#define vsext_vf2_i32m4_m ( ... ) __riscv_vsext_vf2_i32m4_tumu(__VA_ARGS__)

◆ vsext_vf2_i32m8

#define vsext_vf2_i32m8 ( ... ) __riscv_vsext_vf2_i32m8(__VA_ARGS__)

◆ vsext_vf2_i32m8_m

#define vsext_vf2_i32m8_m ( ... ) __riscv_vsext_vf2_i32m8_tumu(__VA_ARGS__)

◆ vsext_vf2_i32mf2

#define vsext_vf2_i32mf2 ( ... ) __riscv_vsext_vf2_i32mf2(__VA_ARGS__)

◆ vsext_vf2_i32mf2_m

#define vsext_vf2_i32mf2_m ( ... ) __riscv_vsext_vf2_i32mf2_tumu(__VA_ARGS__)

◆ vsext_vf2_i64m1

#define vsext_vf2_i64m1 ( ... ) __riscv_vsext_vf2_i64m1(__VA_ARGS__)

◆ vsext_vf2_i64m1_m

#define vsext_vf2_i64m1_m ( ... ) __riscv_vsext_vf2_i64m1_tumu(__VA_ARGS__)

◆ vsext_vf2_i64m2

#define vsext_vf2_i64m2 ( ... ) __riscv_vsext_vf2_i64m2(__VA_ARGS__)

◆ vsext_vf2_i64m2_m

#define vsext_vf2_i64m2_m ( ... ) __riscv_vsext_vf2_i64m2_tumu(__VA_ARGS__)

◆ vsext_vf2_i64m4

#define vsext_vf2_i64m4 ( ... ) __riscv_vsext_vf2_i64m4(__VA_ARGS__)

◆ vsext_vf2_i64m4_m

#define vsext_vf2_i64m4_m ( ... ) __riscv_vsext_vf2_i64m4_tumu(__VA_ARGS__)

◆ vsext_vf2_i64m8

#define vsext_vf2_i64m8 ( ... ) __riscv_vsext_vf2_i64m8(__VA_ARGS__)

◆ vsext_vf2_i64m8_m

#define vsext_vf2_i64m8_m ( ... ) __riscv_vsext_vf2_i64m8_tumu(__VA_ARGS__)

◆ vsext_vf4_i32m1

#define vsext_vf4_i32m1 ( ... ) __riscv_vsext_vf4_i32m1(__VA_ARGS__)

◆ vsext_vf4_i32m1_m

#define vsext_vf4_i32m1_m ( ... ) __riscv_vsext_vf4_i32m1_tumu(__VA_ARGS__)

◆ vsext_vf4_i32m2

#define vsext_vf4_i32m2 ( ... ) __riscv_vsext_vf4_i32m2(__VA_ARGS__)

◆ vsext_vf4_i32m2_m

#define vsext_vf4_i32m2_m ( ... ) __riscv_vsext_vf4_i32m2_tumu(__VA_ARGS__)

◆ vsext_vf4_i32m4

#define vsext_vf4_i32m4 ( ... ) __riscv_vsext_vf4_i32m4(__VA_ARGS__)

◆ vsext_vf4_i32m4_m

#define vsext_vf4_i32m4_m ( ... ) __riscv_vsext_vf4_i32m4_tumu(__VA_ARGS__)

◆ vsext_vf4_i32m8

#define vsext_vf4_i32m8 ( ... ) __riscv_vsext_vf4_i32m8(__VA_ARGS__)

◆ vsext_vf4_i32m8_m

#define vsext_vf4_i32m8_m ( ... ) __riscv_vsext_vf4_i32m8_tumu(__VA_ARGS__)

◆ vsext_vf4_i32mf2

#define vsext_vf4_i32mf2 ( ... ) __riscv_vsext_vf4_i32mf2(__VA_ARGS__)

◆ vsext_vf4_i32mf2_m

#define vsext_vf4_i32mf2_m ( ... ) __riscv_vsext_vf4_i32mf2_tumu(__VA_ARGS__)

◆ vsext_vf4_i64m1

#define vsext_vf4_i64m1 ( ... ) __riscv_vsext_vf4_i64m1(__VA_ARGS__)

◆ vsext_vf4_i64m1_m

#define vsext_vf4_i64m1_m ( ... ) __riscv_vsext_vf4_i64m1_tumu(__VA_ARGS__)

◆ vsext_vf4_i64m2

#define vsext_vf4_i64m2 ( ... ) __riscv_vsext_vf4_i64m2(__VA_ARGS__)

◆ vsext_vf4_i64m2_m

#define vsext_vf4_i64m2_m ( ... ) __riscv_vsext_vf4_i64m2_tumu(__VA_ARGS__)

◆ vsext_vf4_i64m4

#define vsext_vf4_i64m4 ( ... ) __riscv_vsext_vf4_i64m4(__VA_ARGS__)

◆ vsext_vf4_i64m4_m

#define vsext_vf4_i64m4_m ( ... ) __riscv_vsext_vf4_i64m4_tumu(__VA_ARGS__)

◆ vsext_vf4_i64m8

#define vsext_vf4_i64m8 ( ... ) __riscv_vsext_vf4_i64m8(__VA_ARGS__)

◆ vsext_vf4_i64m8_m

#define vsext_vf4_i64m8_m ( ... ) __riscv_vsext_vf4_i64m8_tumu(__VA_ARGS__)

◆ vsext_vf8_i64m1

#define vsext_vf8_i64m1 ( ... ) __riscv_vsext_vf8_i64m1(__VA_ARGS__)

◆ vsext_vf8_i64m1_m

#define vsext_vf8_i64m1_m ( ... ) __riscv_vsext_vf8_i64m1_tumu(__VA_ARGS__)

◆ vsext_vf8_i64m2

#define vsext_vf8_i64m2 ( ... ) __riscv_vsext_vf8_i64m2(__VA_ARGS__)

◆ vsext_vf8_i64m2_m

#define vsext_vf8_i64m2_m ( ... ) __riscv_vsext_vf8_i64m2_tumu(__VA_ARGS__)

◆ vsext_vf8_i64m4

#define vsext_vf8_i64m4 ( ... ) __riscv_vsext_vf8_i64m4(__VA_ARGS__)

◆ vsext_vf8_i64m4_m

#define vsext_vf8_i64m4_m ( ... ) __riscv_vsext_vf8_i64m4_tumu(__VA_ARGS__)

◆ vsext_vf8_i64m8

#define vsext_vf8_i64m8 ( ... ) __riscv_vsext_vf8_i64m8(__VA_ARGS__)

◆ vsext_vf8_i64m8_m

#define vsext_vf8_i64m8_m ( ... ) __riscv_vsext_vf8_i64m8_tumu(__VA_ARGS__)

◆ vslide1down_vx_i16m1

#define vslide1down_vx_i16m1 ( ... ) __riscv_vslide1down_vx_i16m1(__VA_ARGS__)

◆ vslide1down_vx_i16m1_m

#define vslide1down_vx_i16m1_m ( ... ) __riscv_vslide1down_vx_i16m1_tumu(__VA_ARGS__)

◆ vslide1down_vx_i16m2

#define vslide1down_vx_i16m2 ( ... ) __riscv_vslide1down_vx_i16m2(__VA_ARGS__)

◆ vslide1down_vx_i16m2_m

#define vslide1down_vx_i16m2_m ( ... ) __riscv_vslide1down_vx_i16m2_tumu(__VA_ARGS__)

◆ vslide1down_vx_i16m4

#define vslide1down_vx_i16m4 ( ... ) __riscv_vslide1down_vx_i16m4(__VA_ARGS__)

◆ vslide1down_vx_i16m4_m

#define vslide1down_vx_i16m4_m ( ... ) __riscv_vslide1down_vx_i16m4_tumu(__VA_ARGS__)

◆ vslide1down_vx_i16m8

#define vslide1down_vx_i16m8 ( ... ) __riscv_vslide1down_vx_i16m8(__VA_ARGS__)

◆ vslide1down_vx_i16m8_m

#define vslide1down_vx_i16m8_m ( ... ) __riscv_vslide1down_vx_i16m8_tumu(__VA_ARGS__)

◆ vslide1down_vx_i16mf2

#define vslide1down_vx_i16mf2 ( ... ) __riscv_vslide1down_vx_i16mf2(__VA_ARGS__)

◆ vslide1down_vx_i16mf2_m

#define vslide1down_vx_i16mf2_m ( ... ) __riscv_vslide1down_vx_i16mf2_tumu(__VA_ARGS__)

◆ vslide1down_vx_i16mf4

#define vslide1down_vx_i16mf4 ( ... ) __riscv_vslide1down_vx_i16mf4(__VA_ARGS__)

◆ vslide1down_vx_i16mf4_m

#define vslide1down_vx_i16mf4_m ( ... ) __riscv_vslide1down_vx_i16mf4_tumu(__VA_ARGS__)

◆ vslide1down_vx_i32m1

#define vslide1down_vx_i32m1 ( ... ) __riscv_vslide1down_vx_i32m1(__VA_ARGS__)

◆ vslide1down_vx_i32m1_m

#define vslide1down_vx_i32m1_m ( ... ) __riscv_vslide1down_vx_i32m1_tumu(__VA_ARGS__)

◆ vslide1down_vx_i32m2

#define vslide1down_vx_i32m2 ( ... ) __riscv_vslide1down_vx_i32m2(__VA_ARGS__)

◆ vslide1down_vx_i32m2_m

#define vslide1down_vx_i32m2_m ( ... ) __riscv_vslide1down_vx_i32m2_tumu(__VA_ARGS__)

◆ vslide1down_vx_i32m4

#define vslide1down_vx_i32m4 ( ... ) __riscv_vslide1down_vx_i32m4(__VA_ARGS__)

◆ vslide1down_vx_i32m4_m

#define vslide1down_vx_i32m4_m ( ... ) __riscv_vslide1down_vx_i32m4_tumu(__VA_ARGS__)

◆ vslide1down_vx_i32m8

#define vslide1down_vx_i32m8 ( ... ) __riscv_vslide1down_vx_i32m8(__VA_ARGS__)

◆ vslide1down_vx_i32m8_m

#define vslide1down_vx_i32m8_m ( ... ) __riscv_vslide1down_vx_i32m8_tumu(__VA_ARGS__)

◆ vslide1down_vx_i32mf2

#define vslide1down_vx_i32mf2 ( ... ) __riscv_vslide1down_vx_i32mf2(__VA_ARGS__)

◆ vslide1down_vx_i32mf2_m

#define vslide1down_vx_i32mf2_m ( ... ) __riscv_vslide1down_vx_i32mf2_tumu(__VA_ARGS__)

◆ vslide1down_vx_i64m1

#define vslide1down_vx_i64m1 ( ... ) __riscv_vslide1down_vx_i64m1(__VA_ARGS__)

◆ vslide1down_vx_i64m1_m

#define vslide1down_vx_i64m1_m ( ... ) __riscv_vslide1down_vx_i64m1_tumu(__VA_ARGS__)

◆ vslide1down_vx_i64m2

#define vslide1down_vx_i64m2 ( ... ) __riscv_vslide1down_vx_i64m2(__VA_ARGS__)

◆ vslide1down_vx_i64m2_m

#define vslide1down_vx_i64m2_m ( ... ) __riscv_vslide1down_vx_i64m2_tumu(__VA_ARGS__)

◆ vslide1down_vx_i64m4

#define vslide1down_vx_i64m4 ( ... ) __riscv_vslide1down_vx_i64m4(__VA_ARGS__)

◆ vslide1down_vx_i64m4_m

#define vslide1down_vx_i64m4_m ( ... ) __riscv_vslide1down_vx_i64m4_tumu(__VA_ARGS__)

◆ vslide1down_vx_i64m8

#define vslide1down_vx_i64m8 ( ... ) __riscv_vslide1down_vx_i64m8(__VA_ARGS__)

◆ vslide1down_vx_i64m8_m

#define vslide1down_vx_i64m8_m ( ... ) __riscv_vslide1down_vx_i64m8_tumu(__VA_ARGS__)

◆ vslide1down_vx_i8m1

#define vslide1down_vx_i8m1 ( ... ) __riscv_vslide1down_vx_i8m1(__VA_ARGS__)

◆ vslide1down_vx_i8m1_m

#define vslide1down_vx_i8m1_m ( ... ) __riscv_vslide1down_vx_i8m1_tumu(__VA_ARGS__)

◆ vslide1down_vx_i8m2

#define vslide1down_vx_i8m2 ( ... ) __riscv_vslide1down_vx_i8m2(__VA_ARGS__)

◆ vslide1down_vx_i8m2_m

#define vslide1down_vx_i8m2_m ( ... ) __riscv_vslide1down_vx_i8m2_tumu(__VA_ARGS__)

◆ vslide1down_vx_i8m4

#define vslide1down_vx_i8m4 ( ... ) __riscv_vslide1down_vx_i8m4(__VA_ARGS__)

◆ vslide1down_vx_i8m4_m

#define vslide1down_vx_i8m4_m ( ... ) __riscv_vslide1down_vx_i8m4_tumu(__VA_ARGS__)

◆ vslide1down_vx_i8m8

#define vslide1down_vx_i8m8 ( ... ) __riscv_vslide1down_vx_i8m8(__VA_ARGS__)

◆ vslide1down_vx_i8m8_m

#define vslide1down_vx_i8m8_m ( ... ) __riscv_vslide1down_vx_i8m8_tumu(__VA_ARGS__)

◆ vslide1down_vx_i8mf2

#define vslide1down_vx_i8mf2 ( ... ) __riscv_vslide1down_vx_i8mf2(__VA_ARGS__)

◆ vslide1down_vx_i8mf2_m

#define vslide1down_vx_i8mf2_m ( ... ) __riscv_vslide1down_vx_i8mf2_tumu(__VA_ARGS__)

◆ vslide1down_vx_i8mf4

#define vslide1down_vx_i8mf4 ( ... ) __riscv_vslide1down_vx_i8mf4(__VA_ARGS__)

◆ vslide1down_vx_i8mf4_m

#define vslide1down_vx_i8mf4_m ( ... ) __riscv_vslide1down_vx_i8mf4_tumu(__VA_ARGS__)

◆ vslide1down_vx_i8mf8

#define vslide1down_vx_i8mf8 ( ... ) __riscv_vslide1down_vx_i8mf8(__VA_ARGS__)

◆ vslide1down_vx_i8mf8_m

#define vslide1down_vx_i8mf8_m ( ... ) __riscv_vslide1down_vx_i8mf8_tumu(__VA_ARGS__)

◆ vslide1down_vx_u16m1

#define vslide1down_vx_u16m1 ( ... ) __riscv_vslide1down_vx_u16m1(__VA_ARGS__)

◆ vslide1down_vx_u16m1_m

#define vslide1down_vx_u16m1_m ( ... ) __riscv_vslide1down_vx_u16m1_tumu(__VA_ARGS__)

◆ vslide1down_vx_u16m2

#define vslide1down_vx_u16m2 ( ... ) __riscv_vslide1down_vx_u16m2(__VA_ARGS__)

◆ vslide1down_vx_u16m2_m

#define vslide1down_vx_u16m2_m ( ... ) __riscv_vslide1down_vx_u16m2_tumu(__VA_ARGS__)

◆ vslide1down_vx_u16m4

#define vslide1down_vx_u16m4 ( ... ) __riscv_vslide1down_vx_u16m4(__VA_ARGS__)

◆ vslide1down_vx_u16m4_m

#define vslide1down_vx_u16m4_m ( ... ) __riscv_vslide1down_vx_u16m4_tumu(__VA_ARGS__)

◆ vslide1down_vx_u16m8

#define vslide1down_vx_u16m8 ( ... ) __riscv_vslide1down_vx_u16m8(__VA_ARGS__)

◆ vslide1down_vx_u16m8_m

#define vslide1down_vx_u16m8_m ( ... ) __riscv_vslide1down_vx_u16m8_tumu(__VA_ARGS__)

◆ vslide1down_vx_u16mf2

#define vslide1down_vx_u16mf2 ( ... ) __riscv_vslide1down_vx_u16mf2(__VA_ARGS__)

◆ vslide1down_vx_u16mf2_m

#define vslide1down_vx_u16mf2_m ( ... ) __riscv_vslide1down_vx_u16mf2_tumu(__VA_ARGS__)

◆ vslide1down_vx_u16mf4

#define vslide1down_vx_u16mf4 ( ... ) __riscv_vslide1down_vx_u16mf4(__VA_ARGS__)

◆ vslide1down_vx_u16mf4_m

#define vslide1down_vx_u16mf4_m ( ... ) __riscv_vslide1down_vx_u16mf4_tumu(__VA_ARGS__)

◆ vslide1down_vx_u32m1

#define vslide1down_vx_u32m1 ( ... ) __riscv_vslide1down_vx_u32m1(__VA_ARGS__)

◆ vslide1down_vx_u32m1_m

#define vslide1down_vx_u32m1_m ( ... ) __riscv_vslide1down_vx_u32m1_tumu(__VA_ARGS__)

◆ vslide1down_vx_u32m2

#define vslide1down_vx_u32m2 ( ... ) __riscv_vslide1down_vx_u32m2(__VA_ARGS__)

◆ vslide1down_vx_u32m2_m

#define vslide1down_vx_u32m2_m ( ... ) __riscv_vslide1down_vx_u32m2_tumu(__VA_ARGS__)

◆ vslide1down_vx_u32m4

#define vslide1down_vx_u32m4 ( ... ) __riscv_vslide1down_vx_u32m4(__VA_ARGS__)

◆ vslide1down_vx_u32m4_m

#define vslide1down_vx_u32m4_m ( ... ) __riscv_vslide1down_vx_u32m4_tumu(__VA_ARGS__)

◆ vslide1down_vx_u32m8

#define vslide1down_vx_u32m8 ( ... ) __riscv_vslide1down_vx_u32m8(__VA_ARGS__)

◆ vslide1down_vx_u32m8_m

#define vslide1down_vx_u32m8_m ( ... ) __riscv_vslide1down_vx_u32m8_tumu(__VA_ARGS__)

◆ vslide1down_vx_u32mf2

#define vslide1down_vx_u32mf2 ( ... ) __riscv_vslide1down_vx_u32mf2(__VA_ARGS__)

◆ vslide1down_vx_u32mf2_m

#define vslide1down_vx_u32mf2_m ( ... ) __riscv_vslide1down_vx_u32mf2_tumu(__VA_ARGS__)

◆ vslide1down_vx_u64m1

#define vslide1down_vx_u64m1 ( ... ) __riscv_vslide1down_vx_u64m1(__VA_ARGS__)

◆ vslide1down_vx_u64m1_m

#define vslide1down_vx_u64m1_m ( ... ) __riscv_vslide1down_vx_u64m1_tumu(__VA_ARGS__)

◆ vslide1down_vx_u64m2

#define vslide1down_vx_u64m2 ( ... ) __riscv_vslide1down_vx_u64m2(__VA_ARGS__)

◆ vslide1down_vx_u64m2_m

#define vslide1down_vx_u64m2_m ( ... ) __riscv_vslide1down_vx_u64m2_tumu(__VA_ARGS__)

◆ vslide1down_vx_u64m4

#define vslide1down_vx_u64m4 ( ... ) __riscv_vslide1down_vx_u64m4(__VA_ARGS__)

◆ vslide1down_vx_u64m4_m

#define vslide1down_vx_u64m4_m ( ... ) __riscv_vslide1down_vx_u64m4_tumu(__VA_ARGS__)

◆ vslide1down_vx_u64m8

#define vslide1down_vx_u64m8 ( ... ) __riscv_vslide1down_vx_u64m8(__VA_ARGS__)

◆ vslide1down_vx_u64m8_m

#define vslide1down_vx_u64m8_m ( ... ) __riscv_vslide1down_vx_u64m8_tumu(__VA_ARGS__)

◆ vslide1down_vx_u8m1

#define vslide1down_vx_u8m1 ( ... ) __riscv_vslide1down_vx_u8m1(__VA_ARGS__)

◆ vslide1down_vx_u8m1_m

#define vslide1down_vx_u8m1_m ( ... ) __riscv_vslide1down_vx_u8m1_tumu(__VA_ARGS__)

◆ vslide1down_vx_u8m2

#define vslide1down_vx_u8m2 ( ... ) __riscv_vslide1down_vx_u8m2(__VA_ARGS__)

◆ vslide1down_vx_u8m2_m

#define vslide1down_vx_u8m2_m ( ... ) __riscv_vslide1down_vx_u8m2_tumu(__VA_ARGS__)

◆ vslide1down_vx_u8m4

#define vslide1down_vx_u8m4 ( ... ) __riscv_vslide1down_vx_u8m4(__VA_ARGS__)

◆ vslide1down_vx_u8m4_m

#define vslide1down_vx_u8m4_m ( ... ) __riscv_vslide1down_vx_u8m4_tumu(__VA_ARGS__)

◆ vslide1down_vx_u8m8

#define vslide1down_vx_u8m8 ( ... ) __riscv_vslide1down_vx_u8m8(__VA_ARGS__)

◆ vslide1down_vx_u8m8_m

#define vslide1down_vx_u8m8_m ( ... ) __riscv_vslide1down_vx_u8m8_tumu(__VA_ARGS__)

◆ vslide1down_vx_u8mf2

#define vslide1down_vx_u8mf2 ( ... ) __riscv_vslide1down_vx_u8mf2(__VA_ARGS__)

◆ vslide1down_vx_u8mf2_m

#define vslide1down_vx_u8mf2_m ( ... ) __riscv_vslide1down_vx_u8mf2_tumu(__VA_ARGS__)

◆ vslide1down_vx_u8mf4

#define vslide1down_vx_u8mf4 ( ... ) __riscv_vslide1down_vx_u8mf4(__VA_ARGS__)

◆ vslide1down_vx_u8mf4_m

#define vslide1down_vx_u8mf4_m ( ... ) __riscv_vslide1down_vx_u8mf4_tumu(__VA_ARGS__)

◆ vslide1down_vx_u8mf8

#define vslide1down_vx_u8mf8 ( ... ) __riscv_vslide1down_vx_u8mf8(__VA_ARGS__)

◆ vslide1down_vx_u8mf8_m

#define vslide1down_vx_u8mf8_m ( ... ) __riscv_vslide1down_vx_u8mf8_tumu(__VA_ARGS__)

◆ vslide1up_vx_i16m1

#define vslide1up_vx_i16m1 ( ... ) __riscv_vslide1up_vx_i16m1(__VA_ARGS__)

◆ vslide1up_vx_i16m1_m

#define vslide1up_vx_i16m1_m ( ... ) __riscv_vslide1up_vx_i16m1_tumu(__VA_ARGS__)

◆ vslide1up_vx_i16m2

#define vslide1up_vx_i16m2 ( ... ) __riscv_vslide1up_vx_i16m2(__VA_ARGS__)

◆ vslide1up_vx_i16m2_m

#define vslide1up_vx_i16m2_m ( ... ) __riscv_vslide1up_vx_i16m2_tumu(__VA_ARGS__)

◆ vslide1up_vx_i16m4

#define vslide1up_vx_i16m4 ( ... ) __riscv_vslide1up_vx_i16m4(__VA_ARGS__)

◆ vslide1up_vx_i16m4_m

#define vslide1up_vx_i16m4_m ( ... ) __riscv_vslide1up_vx_i16m4_tumu(__VA_ARGS__)

◆ vslide1up_vx_i16m8

#define vslide1up_vx_i16m8 ( ... ) __riscv_vslide1up_vx_i16m8(__VA_ARGS__)

◆ vslide1up_vx_i16m8_m

#define vslide1up_vx_i16m8_m ( ... ) __riscv_vslide1up_vx_i16m8_tumu(__VA_ARGS__)

◆ vslide1up_vx_i16mf2

#define vslide1up_vx_i16mf2 ( ... ) __riscv_vslide1up_vx_i16mf2(__VA_ARGS__)

◆ vslide1up_vx_i16mf2_m

#define vslide1up_vx_i16mf2_m ( ... ) __riscv_vslide1up_vx_i16mf2_tumu(__VA_ARGS__)

◆ vslide1up_vx_i16mf4

#define vslide1up_vx_i16mf4 ( ... ) __riscv_vslide1up_vx_i16mf4(__VA_ARGS__)

◆ vslide1up_vx_i16mf4_m

#define vslide1up_vx_i16mf4_m ( ... ) __riscv_vslide1up_vx_i16mf4_tumu(__VA_ARGS__)

◆ vslide1up_vx_i32m1

#define vslide1up_vx_i32m1 ( ... ) __riscv_vslide1up_vx_i32m1(__VA_ARGS__)

◆ vslide1up_vx_i32m1_m

#define vslide1up_vx_i32m1_m ( ... ) __riscv_vslide1up_vx_i32m1_tumu(__VA_ARGS__)

◆ vslide1up_vx_i32m2

#define vslide1up_vx_i32m2 ( ... ) __riscv_vslide1up_vx_i32m2(__VA_ARGS__)

◆ vslide1up_vx_i32m2_m

#define vslide1up_vx_i32m2_m ( ... ) __riscv_vslide1up_vx_i32m2_tumu(__VA_ARGS__)

◆ vslide1up_vx_i32m4

#define vslide1up_vx_i32m4 ( ... ) __riscv_vslide1up_vx_i32m4(__VA_ARGS__)

◆ vslide1up_vx_i32m4_m

#define vslide1up_vx_i32m4_m ( ... ) __riscv_vslide1up_vx_i32m4_tumu(__VA_ARGS__)

◆ vslide1up_vx_i32m8

#define vslide1up_vx_i32m8 ( ... ) __riscv_vslide1up_vx_i32m8(__VA_ARGS__)

◆ vslide1up_vx_i32m8_m

#define vslide1up_vx_i32m8_m ( ... ) __riscv_vslide1up_vx_i32m8_tumu(__VA_ARGS__)

◆ vslide1up_vx_i32mf2

#define vslide1up_vx_i32mf2 ( ... ) __riscv_vslide1up_vx_i32mf2(__VA_ARGS__)

◆ vslide1up_vx_i32mf2_m

#define vslide1up_vx_i32mf2_m ( ... ) __riscv_vslide1up_vx_i32mf2_tumu(__VA_ARGS__)

◆ vslide1up_vx_i64m1

#define vslide1up_vx_i64m1 ( ... ) __riscv_vslide1up_vx_i64m1(__VA_ARGS__)

◆ vslide1up_vx_i64m1_m

#define vslide1up_vx_i64m1_m ( ... ) __riscv_vslide1up_vx_i64m1_tumu(__VA_ARGS__)

◆ vslide1up_vx_i64m2

#define vslide1up_vx_i64m2 ( ... ) __riscv_vslide1up_vx_i64m2(__VA_ARGS__)

◆ vslide1up_vx_i64m2_m

#define vslide1up_vx_i64m2_m ( ... ) __riscv_vslide1up_vx_i64m2_tumu(__VA_ARGS__)

◆ vslide1up_vx_i64m4

#define vslide1up_vx_i64m4 ( ... ) __riscv_vslide1up_vx_i64m4(__VA_ARGS__)

◆ vslide1up_vx_i64m4_m

#define vslide1up_vx_i64m4_m ( ... ) __riscv_vslide1up_vx_i64m4_tumu(__VA_ARGS__)

◆ vslide1up_vx_i64m8

#define vslide1up_vx_i64m8 ( ... ) __riscv_vslide1up_vx_i64m8(__VA_ARGS__)

◆ vslide1up_vx_i64m8_m

#define vslide1up_vx_i64m8_m ( ... ) __riscv_vslide1up_vx_i64m8_tumu(__VA_ARGS__)

◆ vslide1up_vx_i8m1

#define vslide1up_vx_i8m1 ( ... ) __riscv_vslide1up_vx_i8m1(__VA_ARGS__)

◆ vslide1up_vx_i8m1_m

#define vslide1up_vx_i8m1_m ( ... ) __riscv_vslide1up_vx_i8m1_tumu(__VA_ARGS__)

◆ vslide1up_vx_i8m2

#define vslide1up_vx_i8m2 ( ... ) __riscv_vslide1up_vx_i8m2(__VA_ARGS__)

◆ vslide1up_vx_i8m2_m

#define vslide1up_vx_i8m2_m ( ... ) __riscv_vslide1up_vx_i8m2_tumu(__VA_ARGS__)

◆ vslide1up_vx_i8m4

#define vslide1up_vx_i8m4 ( ... ) __riscv_vslide1up_vx_i8m4(__VA_ARGS__)

◆ vslide1up_vx_i8m4_m

#define vslide1up_vx_i8m4_m ( ... ) __riscv_vslide1up_vx_i8m4_tumu(__VA_ARGS__)

◆ vslide1up_vx_i8m8

#define vslide1up_vx_i8m8 ( ... ) __riscv_vslide1up_vx_i8m8(__VA_ARGS__)

◆ vslide1up_vx_i8m8_m

#define vslide1up_vx_i8m8_m ( ... ) __riscv_vslide1up_vx_i8m8_tumu(__VA_ARGS__)

◆ vslide1up_vx_i8mf2

#define vslide1up_vx_i8mf2 ( ... ) __riscv_vslide1up_vx_i8mf2(__VA_ARGS__)

◆ vslide1up_vx_i8mf2_m

#define vslide1up_vx_i8mf2_m ( ... ) __riscv_vslide1up_vx_i8mf2_tumu(__VA_ARGS__)

◆ vslide1up_vx_i8mf4

#define vslide1up_vx_i8mf4 ( ... ) __riscv_vslide1up_vx_i8mf4(__VA_ARGS__)

◆ vslide1up_vx_i8mf4_m

#define vslide1up_vx_i8mf4_m ( ... ) __riscv_vslide1up_vx_i8mf4_tumu(__VA_ARGS__)

◆ vslide1up_vx_i8mf8

#define vslide1up_vx_i8mf8 ( ... ) __riscv_vslide1up_vx_i8mf8(__VA_ARGS__)

◆ vslide1up_vx_i8mf8_m

#define vslide1up_vx_i8mf8_m ( ... ) __riscv_vslide1up_vx_i8mf8_tumu(__VA_ARGS__)

◆ vslide1up_vx_u16m1

#define vslide1up_vx_u16m1 ( ... ) __riscv_vslide1up_vx_u16m1(__VA_ARGS__)

◆ vslide1up_vx_u16m1_m

#define vslide1up_vx_u16m1_m ( ... ) __riscv_vslide1up_vx_u16m1_tumu(__VA_ARGS__)

◆ vslide1up_vx_u16m2

#define vslide1up_vx_u16m2 ( ... ) __riscv_vslide1up_vx_u16m2(__VA_ARGS__)

◆ vslide1up_vx_u16m2_m

#define vslide1up_vx_u16m2_m ( ... ) __riscv_vslide1up_vx_u16m2_tumu(__VA_ARGS__)

◆ vslide1up_vx_u16m4

#define vslide1up_vx_u16m4 ( ... ) __riscv_vslide1up_vx_u16m4(__VA_ARGS__)

◆ vslide1up_vx_u16m4_m

#define vslide1up_vx_u16m4_m ( ... ) __riscv_vslide1up_vx_u16m4_tumu(__VA_ARGS__)

◆ vslide1up_vx_u16m8

#define vslide1up_vx_u16m8 ( ... ) __riscv_vslide1up_vx_u16m8(__VA_ARGS__)

◆ vslide1up_vx_u16m8_m

#define vslide1up_vx_u16m8_m ( ... ) __riscv_vslide1up_vx_u16m8_tumu(__VA_ARGS__)

◆ vslide1up_vx_u16mf2

#define vslide1up_vx_u16mf2 ( ... ) __riscv_vslide1up_vx_u16mf2(__VA_ARGS__)

◆ vslide1up_vx_u16mf2_m

#define vslide1up_vx_u16mf2_m ( ... ) __riscv_vslide1up_vx_u16mf2_tumu(__VA_ARGS__)

◆ vslide1up_vx_u16mf4

#define vslide1up_vx_u16mf4 ( ... ) __riscv_vslide1up_vx_u16mf4(__VA_ARGS__)

◆ vslide1up_vx_u16mf4_m

#define vslide1up_vx_u16mf4_m ( ... ) __riscv_vslide1up_vx_u16mf4_tumu(__VA_ARGS__)

◆ vslide1up_vx_u32m1

#define vslide1up_vx_u32m1 ( ... ) __riscv_vslide1up_vx_u32m1(__VA_ARGS__)

◆ vslide1up_vx_u32m1_m

#define vslide1up_vx_u32m1_m ( ... ) __riscv_vslide1up_vx_u32m1_tumu(__VA_ARGS__)

◆ vslide1up_vx_u32m2

#define vslide1up_vx_u32m2 ( ... ) __riscv_vslide1up_vx_u32m2(__VA_ARGS__)

◆ vslide1up_vx_u32m2_m

#define vslide1up_vx_u32m2_m ( ... ) __riscv_vslide1up_vx_u32m2_tumu(__VA_ARGS__)

◆ vslide1up_vx_u32m4

#define vslide1up_vx_u32m4 ( ... ) __riscv_vslide1up_vx_u32m4(__VA_ARGS__)

◆ vslide1up_vx_u32m4_m

#define vslide1up_vx_u32m4_m ( ... ) __riscv_vslide1up_vx_u32m4_tumu(__VA_ARGS__)

◆ vslide1up_vx_u32m8

#define vslide1up_vx_u32m8 ( ... ) __riscv_vslide1up_vx_u32m8(__VA_ARGS__)

◆ vslide1up_vx_u32m8_m

#define vslide1up_vx_u32m8_m ( ... ) __riscv_vslide1up_vx_u32m8_tumu(__VA_ARGS__)

◆ vslide1up_vx_u32mf2

#define vslide1up_vx_u32mf2 ( ... ) __riscv_vslide1up_vx_u32mf2(__VA_ARGS__)

◆ vslide1up_vx_u32mf2_m

#define vslide1up_vx_u32mf2_m ( ... ) __riscv_vslide1up_vx_u32mf2_tumu(__VA_ARGS__)

◆ vslide1up_vx_u64m1

#define vslide1up_vx_u64m1 ( ... ) __riscv_vslide1up_vx_u64m1(__VA_ARGS__)

◆ vslide1up_vx_u64m1_m

#define vslide1up_vx_u64m1_m ( ... ) __riscv_vslide1up_vx_u64m1_tumu(__VA_ARGS__)

◆ vslide1up_vx_u64m2

#define vslide1up_vx_u64m2 ( ... ) __riscv_vslide1up_vx_u64m2(__VA_ARGS__)

◆ vslide1up_vx_u64m2_m

#define vslide1up_vx_u64m2_m ( ... ) __riscv_vslide1up_vx_u64m2_tumu(__VA_ARGS__)

◆ vslide1up_vx_u64m4

#define vslide1up_vx_u64m4 ( ... ) __riscv_vslide1up_vx_u64m4(__VA_ARGS__)

◆ vslide1up_vx_u64m4_m

#define vslide1up_vx_u64m4_m ( ... ) __riscv_vslide1up_vx_u64m4_tumu(__VA_ARGS__)

◆ vslide1up_vx_u64m8

#define vslide1up_vx_u64m8 ( ... ) __riscv_vslide1up_vx_u64m8(__VA_ARGS__)

◆ vslide1up_vx_u64m8_m

#define vslide1up_vx_u64m8_m ( ... ) __riscv_vslide1up_vx_u64m8_tumu(__VA_ARGS__)

◆ vslide1up_vx_u8m1

#define vslide1up_vx_u8m1 ( ... ) __riscv_vslide1up_vx_u8m1(__VA_ARGS__)

◆ vslide1up_vx_u8m1_m

#define vslide1up_vx_u8m1_m ( ... ) __riscv_vslide1up_vx_u8m1_tumu(__VA_ARGS__)

◆ vslide1up_vx_u8m2

#define vslide1up_vx_u8m2 ( ... ) __riscv_vslide1up_vx_u8m2(__VA_ARGS__)

◆ vslide1up_vx_u8m2_m

#define vslide1up_vx_u8m2_m ( ... ) __riscv_vslide1up_vx_u8m2_tumu(__VA_ARGS__)

◆ vslide1up_vx_u8m4

#define vslide1up_vx_u8m4 ( ... ) __riscv_vslide1up_vx_u8m4(__VA_ARGS__)

◆ vslide1up_vx_u8m4_m

#define vslide1up_vx_u8m4_m ( ... ) __riscv_vslide1up_vx_u8m4_tumu(__VA_ARGS__)

◆ vslide1up_vx_u8m8

#define vslide1up_vx_u8m8 ( ... ) __riscv_vslide1up_vx_u8m8(__VA_ARGS__)

◆ vslide1up_vx_u8m8_m

#define vslide1up_vx_u8m8_m ( ... ) __riscv_vslide1up_vx_u8m8_tumu(__VA_ARGS__)

◆ vslide1up_vx_u8mf2

#define vslide1up_vx_u8mf2 ( ... ) __riscv_vslide1up_vx_u8mf2(__VA_ARGS__)

◆ vslide1up_vx_u8mf2_m

#define vslide1up_vx_u8mf2_m ( ... ) __riscv_vslide1up_vx_u8mf2_tumu(__VA_ARGS__)

◆ vslide1up_vx_u8mf4

#define vslide1up_vx_u8mf4 ( ... ) __riscv_vslide1up_vx_u8mf4(__VA_ARGS__)

◆ vslide1up_vx_u8mf4_m

#define vslide1up_vx_u8mf4_m ( ... ) __riscv_vslide1up_vx_u8mf4_tumu(__VA_ARGS__)

◆ vslide1up_vx_u8mf8

#define vslide1up_vx_u8mf8 ( ... ) __riscv_vslide1up_vx_u8mf8(__VA_ARGS__)

◆ vslide1up_vx_u8mf8_m

#define vslide1up_vx_u8mf8_m ( ... ) __riscv_vslide1up_vx_u8mf8_tumu(__VA_ARGS__)

◆ vslidedown_vx_f16m1

#define vslidedown_vx_f16m1 ( ... ) __riscv_vslidedown_vx_f16m1_tu(__VA_ARGS__)

◆ vslidedown_vx_f16m1_m

#define vslidedown_vx_f16m1_m ( ... ) __riscv_vslidedown_vx_f16m1_tumu(__VA_ARGS__)

◆ vslidedown_vx_f16m2

#define vslidedown_vx_f16m2 ( ... ) __riscv_vslidedown_vx_f16m2_tu(__VA_ARGS__)

◆ vslidedown_vx_f16m2_m

#define vslidedown_vx_f16m2_m ( ... ) __riscv_vslidedown_vx_f16m2_tumu(__VA_ARGS__)

◆ vslidedown_vx_f16m4

#define vslidedown_vx_f16m4 ( ... ) __riscv_vslidedown_vx_f16m4_tu(__VA_ARGS__)

◆ vslidedown_vx_f16m4_m

#define vslidedown_vx_f16m4_m ( ... ) __riscv_vslidedown_vx_f16m4_tumu(__VA_ARGS__)

◆ vslidedown_vx_f16m8

#define vslidedown_vx_f16m8 ( ... ) __riscv_vslidedown_vx_f16m8_tu(__VA_ARGS__)

◆ vslidedown_vx_f16m8_m

#define vslidedown_vx_f16m8_m ( ... ) __riscv_vslidedown_vx_f16m8_tumu(__VA_ARGS__)

◆ vslidedown_vx_f16mf2

#define vslidedown_vx_f16mf2 ( ... ) __riscv_vslidedown_vx_f16mf2_tu(__VA_ARGS__)

◆ vslidedown_vx_f16mf2_m

#define vslidedown_vx_f16mf2_m ( ... ) __riscv_vslidedown_vx_f16mf2_tumu(__VA_ARGS__)

◆ vslidedown_vx_f16mf4

#define vslidedown_vx_f16mf4 ( ... ) __riscv_vslidedown_vx_f16mf4_tu(__VA_ARGS__)

◆ vslidedown_vx_f16mf4_m

#define vslidedown_vx_f16mf4_m ( ... ) __riscv_vslidedown_vx_f16mf4_tumu(__VA_ARGS__)

◆ vslidedown_vx_f32m1

#define vslidedown_vx_f32m1 ( ... ) __riscv_vslidedown_vx_f32m1_tu(__VA_ARGS__)

◆ vslidedown_vx_f32m1_m

#define vslidedown_vx_f32m1_m ( ... ) __riscv_vslidedown_vx_f32m1_tumu(__VA_ARGS__)

◆ vslidedown_vx_f32m2

#define vslidedown_vx_f32m2 ( ... ) __riscv_vslidedown_vx_f32m2_tu(__VA_ARGS__)

◆ vslidedown_vx_f32m2_m

#define vslidedown_vx_f32m2_m ( ... ) __riscv_vslidedown_vx_f32m2_tumu(__VA_ARGS__)

◆ vslidedown_vx_f32m4

#define vslidedown_vx_f32m4 ( ... ) __riscv_vslidedown_vx_f32m4_tu(__VA_ARGS__)

◆ vslidedown_vx_f32m4_m

#define vslidedown_vx_f32m4_m ( ... ) __riscv_vslidedown_vx_f32m4_tumu(__VA_ARGS__)

◆ vslidedown_vx_f32m8

#define vslidedown_vx_f32m8 ( ... ) __riscv_vslidedown_vx_f32m8_tu(__VA_ARGS__)

◆ vslidedown_vx_f32m8_m

#define vslidedown_vx_f32m8_m ( ... ) __riscv_vslidedown_vx_f32m8_tumu(__VA_ARGS__)

◆ vslidedown_vx_f32mf2

#define vslidedown_vx_f32mf2 ( ... ) __riscv_vslidedown_vx_f32mf2_tu(__VA_ARGS__)

◆ vslidedown_vx_f32mf2_m

#define vslidedown_vx_f32mf2_m ( ... ) __riscv_vslidedown_vx_f32mf2_tumu(__VA_ARGS__)

◆ vslidedown_vx_f64m1

#define vslidedown_vx_f64m1 ( ... ) __riscv_vslidedown_vx_f64m1_tu(__VA_ARGS__)

◆ vslidedown_vx_f64m1_m

#define vslidedown_vx_f64m1_m ( ... ) __riscv_vslidedown_vx_f64m1_tumu(__VA_ARGS__)

◆ vslidedown_vx_f64m2

#define vslidedown_vx_f64m2 ( ... ) __riscv_vslidedown_vx_f64m2_tu(__VA_ARGS__)

◆ vslidedown_vx_f64m2_m

#define vslidedown_vx_f64m2_m ( ... ) __riscv_vslidedown_vx_f64m2_tumu(__VA_ARGS__)

◆ vslidedown_vx_f64m4

#define vslidedown_vx_f64m4 ( ... ) __riscv_vslidedown_vx_f64m4_tu(__VA_ARGS__)

◆ vslidedown_vx_f64m4_m

#define vslidedown_vx_f64m4_m ( ... ) __riscv_vslidedown_vx_f64m4_tumu(__VA_ARGS__)

◆ vslidedown_vx_f64m8

#define vslidedown_vx_f64m8 ( ... ) __riscv_vslidedown_vx_f64m8_tu(__VA_ARGS__)

◆ vslidedown_vx_f64m8_m

#define vslidedown_vx_f64m8_m ( ... ) __riscv_vslidedown_vx_f64m8_tumu(__VA_ARGS__)

◆ vslidedown_vx_i16m1

#define vslidedown_vx_i16m1 ( ... ) __riscv_vslidedown_vx_i16m1_tu(__VA_ARGS__)

◆ vslidedown_vx_i16m1_m

#define vslidedown_vx_i16m1_m ( ... ) __riscv_vslidedown_vx_i16m1_tumu(__VA_ARGS__)

◆ vslidedown_vx_i16m2

#define vslidedown_vx_i16m2 ( ... ) __riscv_vslidedown_vx_i16m2_tu(__VA_ARGS__)

◆ vslidedown_vx_i16m2_m

#define vslidedown_vx_i16m2_m ( ... ) __riscv_vslidedown_vx_i16m2_tumu(__VA_ARGS__)

◆ vslidedown_vx_i16m4

#define vslidedown_vx_i16m4 ( ... ) __riscv_vslidedown_vx_i16m4_tu(__VA_ARGS__)

◆ vslidedown_vx_i16m4_m

#define vslidedown_vx_i16m4_m ( ... ) __riscv_vslidedown_vx_i16m4_tumu(__VA_ARGS__)

◆ vslidedown_vx_i16m8

#define vslidedown_vx_i16m8 ( ... ) __riscv_vslidedown_vx_i16m8_tu(__VA_ARGS__)

◆ vslidedown_vx_i16m8_m

#define vslidedown_vx_i16m8_m ( ... ) __riscv_vslidedown_vx_i16m8_tumu(__VA_ARGS__)

◆ vslidedown_vx_i16mf2

#define vslidedown_vx_i16mf2 ( ... ) __riscv_vslidedown_vx_i16mf2_tu(__VA_ARGS__)

◆ vslidedown_vx_i16mf2_m

#define vslidedown_vx_i16mf2_m ( ... ) __riscv_vslidedown_vx_i16mf2_tumu(__VA_ARGS__)

◆ vslidedown_vx_i16mf4

#define vslidedown_vx_i16mf4 ( ... ) __riscv_vslidedown_vx_i16mf4_tu(__VA_ARGS__)

◆ vslidedown_vx_i16mf4_m

#define vslidedown_vx_i16mf4_m ( ... ) __riscv_vslidedown_vx_i16mf4_tumu(__VA_ARGS__)

◆ vslidedown_vx_i32m1

#define vslidedown_vx_i32m1 ( ... ) __riscv_vslidedown_vx_i32m1_tu(__VA_ARGS__)

◆ vslidedown_vx_i32m1_m

#define vslidedown_vx_i32m1_m ( ... ) __riscv_vslidedown_vx_i32m1_tumu(__VA_ARGS__)

◆ vslidedown_vx_i32m2

#define vslidedown_vx_i32m2 ( ... ) __riscv_vslidedown_vx_i32m2_tu(__VA_ARGS__)

◆ vslidedown_vx_i32m2_m

#define vslidedown_vx_i32m2_m ( ... ) __riscv_vslidedown_vx_i32m2_tumu(__VA_ARGS__)

◆ vslidedown_vx_i32m4

#define vslidedown_vx_i32m4 ( ... ) __riscv_vslidedown_vx_i32m4_tu(__VA_ARGS__)

◆ vslidedown_vx_i32m4_m

#define vslidedown_vx_i32m4_m ( ... ) __riscv_vslidedown_vx_i32m4_tumu(__VA_ARGS__)

◆ vslidedown_vx_i32m8

#define vslidedown_vx_i32m8 ( ... ) __riscv_vslidedown_vx_i32m8_tu(__VA_ARGS__)

◆ vslidedown_vx_i32m8_m

#define vslidedown_vx_i32m8_m ( ... ) __riscv_vslidedown_vx_i32m8_tumu(__VA_ARGS__)

◆ vslidedown_vx_i32mf2

#define vslidedown_vx_i32mf2 ( ... ) __riscv_vslidedown_vx_i32mf2_tu(__VA_ARGS__)

◆ vslidedown_vx_i32mf2_m

#define vslidedown_vx_i32mf2_m ( ... ) __riscv_vslidedown_vx_i32mf2_tumu(__VA_ARGS__)

◆ vslidedown_vx_i64m1

#define vslidedown_vx_i64m1 ( ... ) __riscv_vslidedown_vx_i64m1_tu(__VA_ARGS__)

◆ vslidedown_vx_i64m1_m

#define vslidedown_vx_i64m1_m ( ... ) __riscv_vslidedown_vx_i64m1_tumu(__VA_ARGS__)

◆ vslidedown_vx_i64m2

#define vslidedown_vx_i64m2 ( ... ) __riscv_vslidedown_vx_i64m2_tu(__VA_ARGS__)

◆ vslidedown_vx_i64m2_m

#define vslidedown_vx_i64m2_m ( ... ) __riscv_vslidedown_vx_i64m2_tumu(__VA_ARGS__)

◆ vslidedown_vx_i64m4

#define vslidedown_vx_i64m4 ( ... ) __riscv_vslidedown_vx_i64m4_tu(__VA_ARGS__)

◆ vslidedown_vx_i64m4_m

#define vslidedown_vx_i64m4_m ( ... ) __riscv_vslidedown_vx_i64m4_tumu(__VA_ARGS__)

◆ vslidedown_vx_i64m8

#define vslidedown_vx_i64m8 ( ... ) __riscv_vslidedown_vx_i64m8_tu(__VA_ARGS__)

◆ vslidedown_vx_i64m8_m

#define vslidedown_vx_i64m8_m ( ... ) __riscv_vslidedown_vx_i64m8_tumu(__VA_ARGS__)

◆ vslidedown_vx_i8m1

#define vslidedown_vx_i8m1 ( ... ) __riscv_vslidedown_vx_i8m1_tu(__VA_ARGS__)

◆ vslidedown_vx_i8m1_m

#define vslidedown_vx_i8m1_m ( ... ) __riscv_vslidedown_vx_i8m1_tumu(__VA_ARGS__)

◆ vslidedown_vx_i8m2

#define vslidedown_vx_i8m2 ( ... ) __riscv_vslidedown_vx_i8m2_tu(__VA_ARGS__)

◆ vslidedown_vx_i8m2_m

#define vslidedown_vx_i8m2_m ( ... ) __riscv_vslidedown_vx_i8m2_tumu(__VA_ARGS__)

◆ vslidedown_vx_i8m4

#define vslidedown_vx_i8m4 ( ... ) __riscv_vslidedown_vx_i8m4_tu(__VA_ARGS__)

◆ vslidedown_vx_i8m4_m

#define vslidedown_vx_i8m4_m ( ... ) __riscv_vslidedown_vx_i8m4_tumu(__VA_ARGS__)

◆ vslidedown_vx_i8m8

#define vslidedown_vx_i8m8 ( ... ) __riscv_vslidedown_vx_i8m8_tu(__VA_ARGS__)

◆ vslidedown_vx_i8m8_m

#define vslidedown_vx_i8m8_m ( ... ) __riscv_vslidedown_vx_i8m8_tumu(__VA_ARGS__)

◆ vslidedown_vx_i8mf2

#define vslidedown_vx_i8mf2 ( ... ) __riscv_vslidedown_vx_i8mf2_tu(__VA_ARGS__)

◆ vslidedown_vx_i8mf2_m

#define vslidedown_vx_i8mf2_m ( ... ) __riscv_vslidedown_vx_i8mf2_tumu(__VA_ARGS__)

◆ vslidedown_vx_i8mf4

#define vslidedown_vx_i8mf4 ( ... ) __riscv_vslidedown_vx_i8mf4_tu(__VA_ARGS__)

◆ vslidedown_vx_i8mf4_m

#define vslidedown_vx_i8mf4_m ( ... ) __riscv_vslidedown_vx_i8mf4_tumu(__VA_ARGS__)

◆ vslidedown_vx_i8mf8

#define vslidedown_vx_i8mf8 ( ... ) __riscv_vslidedown_vx_i8mf8_tu(__VA_ARGS__)

◆ vslidedown_vx_i8mf8_m

#define vslidedown_vx_i8mf8_m ( ... ) __riscv_vslidedown_vx_i8mf8_tumu(__VA_ARGS__)

◆ vslidedown_vx_u16m1

#define vslidedown_vx_u16m1 ( ... ) __riscv_vslidedown_vx_u16m1_tu(__VA_ARGS__)

◆ vslidedown_vx_u16m1_m

#define vslidedown_vx_u16m1_m ( ... ) __riscv_vslidedown_vx_u16m1_tumu(__VA_ARGS__)

◆ vslidedown_vx_u16m2

#define vslidedown_vx_u16m2 ( ... ) __riscv_vslidedown_vx_u16m2_tu(__VA_ARGS__)

◆ vslidedown_vx_u16m2_m

#define vslidedown_vx_u16m2_m ( ... ) __riscv_vslidedown_vx_u16m2_tumu(__VA_ARGS__)

◆ vslidedown_vx_u16m4

#define vslidedown_vx_u16m4 ( ... ) __riscv_vslidedown_vx_u16m4_tu(__VA_ARGS__)

◆ vslidedown_vx_u16m4_m

#define vslidedown_vx_u16m4_m ( ... ) __riscv_vslidedown_vx_u16m4_tumu(__VA_ARGS__)

◆ vslidedown_vx_u16m8

#define vslidedown_vx_u16m8 ( ... ) __riscv_vslidedown_vx_u16m8_tu(__VA_ARGS__)

◆ vslidedown_vx_u16m8_m

#define vslidedown_vx_u16m8_m ( ... ) __riscv_vslidedown_vx_u16m8_tumu(__VA_ARGS__)

◆ vslidedown_vx_u16mf2

#define vslidedown_vx_u16mf2 ( ... ) __riscv_vslidedown_vx_u16mf2_tu(__VA_ARGS__)

◆ vslidedown_vx_u16mf2_m

#define vslidedown_vx_u16mf2_m ( ... ) __riscv_vslidedown_vx_u16mf2_tumu(__VA_ARGS__)

◆ vslidedown_vx_u16mf4

#define vslidedown_vx_u16mf4 ( ... ) __riscv_vslidedown_vx_u16mf4_tu(__VA_ARGS__)

◆ vslidedown_vx_u16mf4_m

#define vslidedown_vx_u16mf4_m ( ... ) __riscv_vslidedown_vx_u16mf4_tumu(__VA_ARGS__)

◆ vslidedown_vx_u32m1

#define vslidedown_vx_u32m1 ( ... ) __riscv_vslidedown_vx_u32m1_tu(__VA_ARGS__)

◆ vslidedown_vx_u32m1_m

#define vslidedown_vx_u32m1_m ( ... ) __riscv_vslidedown_vx_u32m1_tumu(__VA_ARGS__)

◆ vslidedown_vx_u32m2

#define vslidedown_vx_u32m2 ( ... ) __riscv_vslidedown_vx_u32m2_tu(__VA_ARGS__)

◆ vslidedown_vx_u32m2_m

#define vslidedown_vx_u32m2_m ( ... ) __riscv_vslidedown_vx_u32m2_tumu(__VA_ARGS__)

◆ vslidedown_vx_u32m4

#define vslidedown_vx_u32m4 ( ... ) __riscv_vslidedown_vx_u32m4_tu(__VA_ARGS__)

◆ vslidedown_vx_u32m4_m

#define vslidedown_vx_u32m4_m ( ... ) __riscv_vslidedown_vx_u32m4_tumu(__VA_ARGS__)

◆ vslidedown_vx_u32m8

#define vslidedown_vx_u32m8 ( ... ) __riscv_vslidedown_vx_u32m8_tu(__VA_ARGS__)

◆ vslidedown_vx_u32m8_m

#define vslidedown_vx_u32m8_m ( ... ) __riscv_vslidedown_vx_u32m8_tumu(__VA_ARGS__)

◆ vslidedown_vx_u32mf2

#define vslidedown_vx_u32mf2 ( ... ) __riscv_vslidedown_vx_u32mf2_tu(__VA_ARGS__)

◆ vslidedown_vx_u32mf2_m

#define vslidedown_vx_u32mf2_m ( ... ) __riscv_vslidedown_vx_u32mf2_tumu(__VA_ARGS__)

◆ vslidedown_vx_u64m1

#define vslidedown_vx_u64m1 ( ... ) __riscv_vslidedown_vx_u64m1_tu(__VA_ARGS__)

◆ vslidedown_vx_u64m1_m

#define vslidedown_vx_u64m1_m ( ... ) __riscv_vslidedown_vx_u64m1_tumu(__VA_ARGS__)

◆ vslidedown_vx_u64m2

#define vslidedown_vx_u64m2 ( ... ) __riscv_vslidedown_vx_u64m2_tu(__VA_ARGS__)

◆ vslidedown_vx_u64m2_m

#define vslidedown_vx_u64m2_m ( ... ) __riscv_vslidedown_vx_u64m2_tumu(__VA_ARGS__)

◆ vslidedown_vx_u64m4

#define vslidedown_vx_u64m4 ( ... ) __riscv_vslidedown_vx_u64m4_tu(__VA_ARGS__)

◆ vslidedown_vx_u64m4_m

#define vslidedown_vx_u64m4_m ( ... ) __riscv_vslidedown_vx_u64m4_tumu(__VA_ARGS__)

◆ vslidedown_vx_u64m8

#define vslidedown_vx_u64m8 ( ... ) __riscv_vslidedown_vx_u64m8_tu(__VA_ARGS__)

◆ vslidedown_vx_u64m8_m

#define vslidedown_vx_u64m8_m ( ... ) __riscv_vslidedown_vx_u64m8_tumu(__VA_ARGS__)

◆ vslidedown_vx_u8m1

#define vslidedown_vx_u8m1 ( ... ) __riscv_vslidedown_vx_u8m1_tu(__VA_ARGS__)

◆ vslidedown_vx_u8m1_m

#define vslidedown_vx_u8m1_m ( ... ) __riscv_vslidedown_vx_u8m1_tumu(__VA_ARGS__)

◆ vslidedown_vx_u8m2

#define vslidedown_vx_u8m2 ( ... ) __riscv_vslidedown_vx_u8m2_tu(__VA_ARGS__)

◆ vslidedown_vx_u8m2_m

#define vslidedown_vx_u8m2_m ( ... ) __riscv_vslidedown_vx_u8m2_tumu(__VA_ARGS__)

◆ vslidedown_vx_u8m4

#define vslidedown_vx_u8m4 ( ... ) __riscv_vslidedown_vx_u8m4_tu(__VA_ARGS__)

◆ vslidedown_vx_u8m4_m

#define vslidedown_vx_u8m4_m ( ... ) __riscv_vslidedown_vx_u8m4_tumu(__VA_ARGS__)

◆ vslidedown_vx_u8m8

#define vslidedown_vx_u8m8 ( ... ) __riscv_vslidedown_vx_u8m8_tu(__VA_ARGS__)

◆ vslidedown_vx_u8m8_m

#define vslidedown_vx_u8m8_m ( ... ) __riscv_vslidedown_vx_u8m8_tumu(__VA_ARGS__)

◆ vslidedown_vx_u8mf2

#define vslidedown_vx_u8mf2 ( ... ) __riscv_vslidedown_vx_u8mf2_tu(__VA_ARGS__)

◆ vslidedown_vx_u8mf2_m

#define vslidedown_vx_u8mf2_m ( ... ) __riscv_vslidedown_vx_u8mf2_tumu(__VA_ARGS__)

◆ vslidedown_vx_u8mf4

#define vslidedown_vx_u8mf4 ( ... ) __riscv_vslidedown_vx_u8mf4_tu(__VA_ARGS__)

◆ vslidedown_vx_u8mf4_m

#define vslidedown_vx_u8mf4_m ( ... ) __riscv_vslidedown_vx_u8mf4_tumu(__VA_ARGS__)

◆ vslidedown_vx_u8mf8

#define vslidedown_vx_u8mf8 ( ... ) __riscv_vslidedown_vx_u8mf8_tu(__VA_ARGS__)

◆ vslidedown_vx_u8mf8_m

#define vslidedown_vx_u8mf8_m ( ... ) __riscv_vslidedown_vx_u8mf8_tumu(__VA_ARGS__)

◆ vslideup_vx_f16m1

#define vslideup_vx_f16m1 ( ... ) __riscv_vslideup_vx_f16m1_tu(__VA_ARGS__)

◆ vslideup_vx_f16m1_m

#define vslideup_vx_f16m1_m ( ... ) __riscv_vslideup_vx_f16m1_tumu(__VA_ARGS__)

◆ vslideup_vx_f16m2

#define vslideup_vx_f16m2 ( ... ) __riscv_vslideup_vx_f16m2_tu(__VA_ARGS__)

◆ vslideup_vx_f16m2_m

#define vslideup_vx_f16m2_m ( ... ) __riscv_vslideup_vx_f16m2_tumu(__VA_ARGS__)

◆ vslideup_vx_f16m4

#define vslideup_vx_f16m4 ( ... ) __riscv_vslideup_vx_f16m4_tu(__VA_ARGS__)

◆ vslideup_vx_f16m4_m

#define vslideup_vx_f16m4_m ( ... ) __riscv_vslideup_vx_f16m4_tumu(__VA_ARGS__)

◆ vslideup_vx_f16m8

#define vslideup_vx_f16m8 ( ... ) __riscv_vslideup_vx_f16m8_tu(__VA_ARGS__)

◆ vslideup_vx_f16m8_m

#define vslideup_vx_f16m8_m ( ... ) __riscv_vslideup_vx_f16m8_tumu(__VA_ARGS__)

◆ vslideup_vx_f16mf2

#define vslideup_vx_f16mf2 ( ... ) __riscv_vslideup_vx_f16mf2_tu(__VA_ARGS__)

◆ vslideup_vx_f16mf2_m

#define vslideup_vx_f16mf2_m ( ... ) __riscv_vslideup_vx_f16mf2_tumu(__VA_ARGS__)

◆ vslideup_vx_f16mf4

#define vslideup_vx_f16mf4 ( ... ) __riscv_vslideup_vx_f16mf4_tu(__VA_ARGS__)

◆ vslideup_vx_f16mf4_m

#define vslideup_vx_f16mf4_m ( ... ) __riscv_vslideup_vx_f16mf4_tumu(__VA_ARGS__)

◆ vslideup_vx_f32m1

#define vslideup_vx_f32m1 ( ... ) __riscv_vslideup_vx_f32m1_tu(__VA_ARGS__)

◆ vslideup_vx_f32m1_m

#define vslideup_vx_f32m1_m ( ... ) __riscv_vslideup_vx_f32m1_tumu(__VA_ARGS__)

◆ vslideup_vx_f32m2

#define vslideup_vx_f32m2 ( ... ) __riscv_vslideup_vx_f32m2_tu(__VA_ARGS__)

◆ vslideup_vx_f32m2_m

#define vslideup_vx_f32m2_m ( ... ) __riscv_vslideup_vx_f32m2_tumu(__VA_ARGS__)

◆ vslideup_vx_f32m4

#define vslideup_vx_f32m4 ( ... ) __riscv_vslideup_vx_f32m4_tu(__VA_ARGS__)

◆ vslideup_vx_f32m4_m

#define vslideup_vx_f32m4_m ( ... ) __riscv_vslideup_vx_f32m4_tumu(__VA_ARGS__)

◆ vslideup_vx_f32m8

#define vslideup_vx_f32m8 ( ... ) __riscv_vslideup_vx_f32m8_tu(__VA_ARGS__)

◆ vslideup_vx_f32m8_m

#define vslideup_vx_f32m8_m ( ... ) __riscv_vslideup_vx_f32m8_tumu(__VA_ARGS__)

◆ vslideup_vx_f32mf2

#define vslideup_vx_f32mf2 ( ... ) __riscv_vslideup_vx_f32mf2_tu(__VA_ARGS__)

◆ vslideup_vx_f32mf2_m

#define vslideup_vx_f32mf2_m ( ... ) __riscv_vslideup_vx_f32mf2_tumu(__VA_ARGS__)

◆ vslideup_vx_f64m1

#define vslideup_vx_f64m1 ( ... ) __riscv_vslideup_vx_f64m1_tu(__VA_ARGS__)

◆ vslideup_vx_f64m1_m

#define vslideup_vx_f64m1_m ( ... ) __riscv_vslideup_vx_f64m1_tumu(__VA_ARGS__)

◆ vslideup_vx_f64m2

#define vslideup_vx_f64m2 ( ... ) __riscv_vslideup_vx_f64m2_tu(__VA_ARGS__)

◆ vslideup_vx_f64m2_m

#define vslideup_vx_f64m2_m ( ... ) __riscv_vslideup_vx_f64m2_tumu(__VA_ARGS__)

◆ vslideup_vx_f64m4

#define vslideup_vx_f64m4 ( ... ) __riscv_vslideup_vx_f64m4_tu(__VA_ARGS__)

◆ vslideup_vx_f64m4_m

#define vslideup_vx_f64m4_m ( ... ) __riscv_vslideup_vx_f64m4_tumu(__VA_ARGS__)

◆ vslideup_vx_f64m8

#define vslideup_vx_f64m8 ( ... ) __riscv_vslideup_vx_f64m8_tu(__VA_ARGS__)

◆ vslideup_vx_f64m8_m

#define vslideup_vx_f64m8_m ( ... ) __riscv_vslideup_vx_f64m8_tumu(__VA_ARGS__)

◆ vslideup_vx_i16m1

#define vslideup_vx_i16m1 ( ... ) __riscv_vslideup_vx_i16m1_tu(__VA_ARGS__)

◆ vslideup_vx_i16m1_m

#define vslideup_vx_i16m1_m ( ... ) __riscv_vslideup_vx_i16m1_tumu(__VA_ARGS__)

◆ vslideup_vx_i16m2

#define vslideup_vx_i16m2 ( ... ) __riscv_vslideup_vx_i16m2_tu(__VA_ARGS__)

◆ vslideup_vx_i16m2_m

#define vslideup_vx_i16m2_m ( ... ) __riscv_vslideup_vx_i16m2_tumu(__VA_ARGS__)

◆ vslideup_vx_i16m4

#define vslideup_vx_i16m4 ( ... ) __riscv_vslideup_vx_i16m4_tu(__VA_ARGS__)

◆ vslideup_vx_i16m4_m

#define vslideup_vx_i16m4_m ( ... ) __riscv_vslideup_vx_i16m4_tumu(__VA_ARGS__)

◆ vslideup_vx_i16m8

#define vslideup_vx_i16m8 ( ... ) __riscv_vslideup_vx_i16m8_tu(__VA_ARGS__)

◆ vslideup_vx_i16m8_m

#define vslideup_vx_i16m8_m ( ... ) __riscv_vslideup_vx_i16m8_tumu(__VA_ARGS__)

◆ vslideup_vx_i16mf2

#define vslideup_vx_i16mf2 ( ... ) __riscv_vslideup_vx_i16mf2_tu(__VA_ARGS__)

◆ vslideup_vx_i16mf2_m

#define vslideup_vx_i16mf2_m ( ... ) __riscv_vslideup_vx_i16mf2_tumu(__VA_ARGS__)

◆ vslideup_vx_i16mf4

#define vslideup_vx_i16mf4 ( ... ) __riscv_vslideup_vx_i16mf4_tu(__VA_ARGS__)

◆ vslideup_vx_i16mf4_m

#define vslideup_vx_i16mf4_m ( ... ) __riscv_vslideup_vx_i16mf4_tumu(__VA_ARGS__)

◆ vslideup_vx_i32m1

#define vslideup_vx_i32m1 ( ... ) __riscv_vslideup_vx_i32m1_tu(__VA_ARGS__)

◆ vslideup_vx_i32m1_m

#define vslideup_vx_i32m1_m ( ... ) __riscv_vslideup_vx_i32m1_tumu(__VA_ARGS__)

◆ vslideup_vx_i32m2

#define vslideup_vx_i32m2 ( ... ) __riscv_vslideup_vx_i32m2_tu(__VA_ARGS__)

◆ vslideup_vx_i32m2_m

#define vslideup_vx_i32m2_m ( ... ) __riscv_vslideup_vx_i32m2_tumu(__VA_ARGS__)

◆ vslideup_vx_i32m4

#define vslideup_vx_i32m4 ( ... ) __riscv_vslideup_vx_i32m4_tu(__VA_ARGS__)

◆ vslideup_vx_i32m4_m

#define vslideup_vx_i32m4_m ( ... ) __riscv_vslideup_vx_i32m4_tumu(__VA_ARGS__)

◆ vslideup_vx_i32m8

#define vslideup_vx_i32m8 ( ... ) __riscv_vslideup_vx_i32m8_tu(__VA_ARGS__)

◆ vslideup_vx_i32m8_m

#define vslideup_vx_i32m8_m ( ... ) __riscv_vslideup_vx_i32m8_tumu(__VA_ARGS__)

◆ vslideup_vx_i32mf2

#define vslideup_vx_i32mf2 ( ... ) __riscv_vslideup_vx_i32mf2_tu(__VA_ARGS__)

◆ vslideup_vx_i32mf2_m

#define vslideup_vx_i32mf2_m ( ... ) __riscv_vslideup_vx_i32mf2_tumu(__VA_ARGS__)

◆ vslideup_vx_i64m1

#define vslideup_vx_i64m1 ( ... ) __riscv_vslideup_vx_i64m1_tu(__VA_ARGS__)

◆ vslideup_vx_i64m1_m

#define vslideup_vx_i64m1_m ( ... ) __riscv_vslideup_vx_i64m1_tumu(__VA_ARGS__)

◆ vslideup_vx_i64m2

#define vslideup_vx_i64m2 ( ... ) __riscv_vslideup_vx_i64m2_tu(__VA_ARGS__)

◆ vslideup_vx_i64m2_m

#define vslideup_vx_i64m2_m ( ... ) __riscv_vslideup_vx_i64m2_tumu(__VA_ARGS__)

◆ vslideup_vx_i64m4

#define vslideup_vx_i64m4 ( ... ) __riscv_vslideup_vx_i64m4_tu(__VA_ARGS__)

◆ vslideup_vx_i64m4_m

#define vslideup_vx_i64m4_m ( ... ) __riscv_vslideup_vx_i64m4_tumu(__VA_ARGS__)

◆ vslideup_vx_i64m8

#define vslideup_vx_i64m8 ( ... ) __riscv_vslideup_vx_i64m8_tu(__VA_ARGS__)

◆ vslideup_vx_i64m8_m

#define vslideup_vx_i64m8_m ( ... ) __riscv_vslideup_vx_i64m8_tumu(__VA_ARGS__)

◆ vslideup_vx_i8m1

#define vslideup_vx_i8m1 ( ... ) __riscv_vslideup_vx_i8m1_tu(__VA_ARGS__)

◆ vslideup_vx_i8m1_m

#define vslideup_vx_i8m1_m ( ... ) __riscv_vslideup_vx_i8m1_tumu(__VA_ARGS__)

◆ vslideup_vx_i8m2

#define vslideup_vx_i8m2 ( ... ) __riscv_vslideup_vx_i8m2_tu(__VA_ARGS__)

◆ vslideup_vx_i8m2_m

#define vslideup_vx_i8m2_m ( ... ) __riscv_vslideup_vx_i8m2_tumu(__VA_ARGS__)

◆ vslideup_vx_i8m4

#define vslideup_vx_i8m4 ( ... ) __riscv_vslideup_vx_i8m4_tu(__VA_ARGS__)

◆ vslideup_vx_i8m4_m

#define vslideup_vx_i8m4_m ( ... ) __riscv_vslideup_vx_i8m4_tumu(__VA_ARGS__)

◆ vslideup_vx_i8m8

#define vslideup_vx_i8m8 ( ... ) __riscv_vslideup_vx_i8m8_tu(__VA_ARGS__)

◆ vslideup_vx_i8m8_m

#define vslideup_vx_i8m8_m ( ... ) __riscv_vslideup_vx_i8m8_tumu(__VA_ARGS__)

◆ vslideup_vx_i8mf2

#define vslideup_vx_i8mf2 ( ... ) __riscv_vslideup_vx_i8mf2_tu(__VA_ARGS__)

◆ vslideup_vx_i8mf2_m

#define vslideup_vx_i8mf2_m ( ... ) __riscv_vslideup_vx_i8mf2_tumu(__VA_ARGS__)

◆ vslideup_vx_i8mf4

#define vslideup_vx_i8mf4 ( ... ) __riscv_vslideup_vx_i8mf4_tu(__VA_ARGS__)

◆ vslideup_vx_i8mf4_m

#define vslideup_vx_i8mf4_m ( ... ) __riscv_vslideup_vx_i8mf4_tumu(__VA_ARGS__)

◆ vslideup_vx_i8mf8

#define vslideup_vx_i8mf8 ( ... ) __riscv_vslideup_vx_i8mf8_tu(__VA_ARGS__)

◆ vslideup_vx_i8mf8_m

#define vslideup_vx_i8mf8_m ( ... ) __riscv_vslideup_vx_i8mf8_tumu(__VA_ARGS__)

◆ vslideup_vx_u16m1

#define vslideup_vx_u16m1 ( ... ) __riscv_vslideup_vx_u16m1_tu(__VA_ARGS__)

◆ vslideup_vx_u16m1_m

#define vslideup_vx_u16m1_m ( ... ) __riscv_vslideup_vx_u16m1_tumu(__VA_ARGS__)

◆ vslideup_vx_u16m2

#define vslideup_vx_u16m2 ( ... ) __riscv_vslideup_vx_u16m2_tu(__VA_ARGS__)

◆ vslideup_vx_u16m2_m

#define vslideup_vx_u16m2_m ( ... ) __riscv_vslideup_vx_u16m2_tumu(__VA_ARGS__)

◆ vslideup_vx_u16m4

#define vslideup_vx_u16m4 ( ... ) __riscv_vslideup_vx_u16m4_tu(__VA_ARGS__)

◆ vslideup_vx_u16m4_m

#define vslideup_vx_u16m4_m ( ... ) __riscv_vslideup_vx_u16m4_tumu(__VA_ARGS__)

◆ vslideup_vx_u16m8

#define vslideup_vx_u16m8 ( ... ) __riscv_vslideup_vx_u16m8_tu(__VA_ARGS__)

◆ vslideup_vx_u16m8_m

#define vslideup_vx_u16m8_m ( ... ) __riscv_vslideup_vx_u16m8_tumu(__VA_ARGS__)

◆ vslideup_vx_u16mf2

#define vslideup_vx_u16mf2 ( ... ) __riscv_vslideup_vx_u16mf2_tu(__VA_ARGS__)

◆ vslideup_vx_u16mf2_m

#define vslideup_vx_u16mf2_m ( ... ) __riscv_vslideup_vx_u16mf2_tumu(__VA_ARGS__)

◆ vslideup_vx_u16mf4

#define vslideup_vx_u16mf4 ( ... ) __riscv_vslideup_vx_u16mf4_tu(__VA_ARGS__)

◆ vslideup_vx_u16mf4_m

#define vslideup_vx_u16mf4_m ( ... ) __riscv_vslideup_vx_u16mf4_tumu(__VA_ARGS__)

◆ vslideup_vx_u32m1

#define vslideup_vx_u32m1 ( ... ) __riscv_vslideup_vx_u32m1_tu(__VA_ARGS__)

◆ vslideup_vx_u32m1_m

#define vslideup_vx_u32m1_m ( ... ) __riscv_vslideup_vx_u32m1_tumu(__VA_ARGS__)

◆ vslideup_vx_u32m2

#define vslideup_vx_u32m2 ( ... ) __riscv_vslideup_vx_u32m2_tu(__VA_ARGS__)

◆ vslideup_vx_u32m2_m

#define vslideup_vx_u32m2_m ( ... ) __riscv_vslideup_vx_u32m2_tumu(__VA_ARGS__)

◆ vslideup_vx_u32m4

#define vslideup_vx_u32m4 ( ... ) __riscv_vslideup_vx_u32m4_tu(__VA_ARGS__)

◆ vslideup_vx_u32m4_m

#define vslideup_vx_u32m4_m ( ... ) __riscv_vslideup_vx_u32m4_tumu(__VA_ARGS__)

◆ vslideup_vx_u32m8

#define vslideup_vx_u32m8 ( ... ) __riscv_vslideup_vx_u32m8_tu(__VA_ARGS__)

◆ vslideup_vx_u32m8_m

#define vslideup_vx_u32m8_m ( ... ) __riscv_vslideup_vx_u32m8_tumu(__VA_ARGS__)

◆ vslideup_vx_u32mf2

#define vslideup_vx_u32mf2 ( ... ) __riscv_vslideup_vx_u32mf2_tu(__VA_ARGS__)

◆ vslideup_vx_u32mf2_m

#define vslideup_vx_u32mf2_m ( ... ) __riscv_vslideup_vx_u32mf2_tumu(__VA_ARGS__)

◆ vslideup_vx_u64m1

#define vslideup_vx_u64m1 ( ... ) __riscv_vslideup_vx_u64m1_tu(__VA_ARGS__)

◆ vslideup_vx_u64m1_m

#define vslideup_vx_u64m1_m ( ... ) __riscv_vslideup_vx_u64m1_tumu(__VA_ARGS__)

◆ vslideup_vx_u64m2

#define vslideup_vx_u64m2 ( ... ) __riscv_vslideup_vx_u64m2_tu(__VA_ARGS__)

◆ vslideup_vx_u64m2_m

#define vslideup_vx_u64m2_m ( ... ) __riscv_vslideup_vx_u64m2_tumu(__VA_ARGS__)

◆ vslideup_vx_u64m4

#define vslideup_vx_u64m4 ( ... ) __riscv_vslideup_vx_u64m4_tu(__VA_ARGS__)

◆ vslideup_vx_u64m4_m

#define vslideup_vx_u64m4_m ( ... ) __riscv_vslideup_vx_u64m4_tumu(__VA_ARGS__)

◆ vslideup_vx_u64m8

#define vslideup_vx_u64m8 ( ... ) __riscv_vslideup_vx_u64m8_tu(__VA_ARGS__)

◆ vslideup_vx_u64m8_m

#define vslideup_vx_u64m8_m ( ... ) __riscv_vslideup_vx_u64m8_tumu(__VA_ARGS__)

◆ vslideup_vx_u8m1

#define vslideup_vx_u8m1 ( ... ) __riscv_vslideup_vx_u8m1_tu(__VA_ARGS__)

◆ vslideup_vx_u8m1_m

#define vslideup_vx_u8m1_m ( ... ) __riscv_vslideup_vx_u8m1_tumu(__VA_ARGS__)

◆ vslideup_vx_u8m2

#define vslideup_vx_u8m2 ( ... ) __riscv_vslideup_vx_u8m2_tu(__VA_ARGS__)

◆ vslideup_vx_u8m2_m

#define vslideup_vx_u8m2_m ( ... ) __riscv_vslideup_vx_u8m2_tumu(__VA_ARGS__)

◆ vslideup_vx_u8m4

#define vslideup_vx_u8m4 ( ... ) __riscv_vslideup_vx_u8m4_tu(__VA_ARGS__)

◆ vslideup_vx_u8m4_m

#define vslideup_vx_u8m4_m ( ... ) __riscv_vslideup_vx_u8m4_tumu(__VA_ARGS__)

◆ vslideup_vx_u8m8

#define vslideup_vx_u8m8 ( ... ) __riscv_vslideup_vx_u8m8_tu(__VA_ARGS__)

◆ vslideup_vx_u8m8_m

#define vslideup_vx_u8m8_m ( ... ) __riscv_vslideup_vx_u8m8_tumu(__VA_ARGS__)

◆ vslideup_vx_u8mf2

#define vslideup_vx_u8mf2 ( ... ) __riscv_vslideup_vx_u8mf2_tu(__VA_ARGS__)

◆ vslideup_vx_u8mf2_m

#define vslideup_vx_u8mf2_m ( ... ) __riscv_vslideup_vx_u8mf2_tumu(__VA_ARGS__)

◆ vslideup_vx_u8mf4

#define vslideup_vx_u8mf4 ( ... ) __riscv_vslideup_vx_u8mf4_tu(__VA_ARGS__)

◆ vslideup_vx_u8mf4_m

#define vslideup_vx_u8mf4_m ( ... ) __riscv_vslideup_vx_u8mf4_tumu(__VA_ARGS__)

◆ vslideup_vx_u8mf8

#define vslideup_vx_u8mf8 ( ... ) __riscv_vslideup_vx_u8mf8_tu(__VA_ARGS__)

◆ vslideup_vx_u8mf8_m

#define vslideup_vx_u8mf8_m ( ... ) __riscv_vslideup_vx_u8mf8_tumu(__VA_ARGS__)

◆ vsll_vv_i16m1

#define vsll_vv_i16m1 ( ... ) __riscv_vsll_vv_i16m1(__VA_ARGS__)

◆ vsll_vv_i16m1_m

#define vsll_vv_i16m1_m ( ... ) __riscv_vsll_vv_i16m1_tumu(__VA_ARGS__)

◆ vsll_vv_i16m2

#define vsll_vv_i16m2 ( ... ) __riscv_vsll_vv_i16m2(__VA_ARGS__)

◆ vsll_vv_i16m2_m

#define vsll_vv_i16m2_m ( ... ) __riscv_vsll_vv_i16m2_tumu(__VA_ARGS__)

◆ vsll_vv_i16m4

#define vsll_vv_i16m4 ( ... ) __riscv_vsll_vv_i16m4(__VA_ARGS__)

◆ vsll_vv_i16m4_m

#define vsll_vv_i16m4_m ( ... ) __riscv_vsll_vv_i16m4_tumu(__VA_ARGS__)

◆ vsll_vv_i16m8

#define vsll_vv_i16m8 ( ... ) __riscv_vsll_vv_i16m8(__VA_ARGS__)

◆ vsll_vv_i16m8_m

#define vsll_vv_i16m8_m ( ... ) __riscv_vsll_vv_i16m8_tumu(__VA_ARGS__)

◆ vsll_vv_i16mf2

#define vsll_vv_i16mf2 ( ... ) __riscv_vsll_vv_i16mf2(__VA_ARGS__)

◆ vsll_vv_i16mf2_m

#define vsll_vv_i16mf2_m ( ... ) __riscv_vsll_vv_i16mf2_tumu(__VA_ARGS__)

◆ vsll_vv_i16mf4

#define vsll_vv_i16mf4 ( ... ) __riscv_vsll_vv_i16mf4(__VA_ARGS__)

◆ vsll_vv_i16mf4_m

#define vsll_vv_i16mf4_m ( ... ) __riscv_vsll_vv_i16mf4_tumu(__VA_ARGS__)

◆ vsll_vv_i32m1

#define vsll_vv_i32m1 ( ... ) __riscv_vsll_vv_i32m1(__VA_ARGS__)

◆ vsll_vv_i32m1_m

#define vsll_vv_i32m1_m ( ... ) __riscv_vsll_vv_i32m1_tumu(__VA_ARGS__)

◆ vsll_vv_i32m2

#define vsll_vv_i32m2 ( ... ) __riscv_vsll_vv_i32m2(__VA_ARGS__)

◆ vsll_vv_i32m2_m

#define vsll_vv_i32m2_m ( ... ) __riscv_vsll_vv_i32m2_tumu(__VA_ARGS__)

◆ vsll_vv_i32m4

#define vsll_vv_i32m4 ( ... ) __riscv_vsll_vv_i32m4(__VA_ARGS__)

◆ vsll_vv_i32m4_m

#define vsll_vv_i32m4_m ( ... ) __riscv_vsll_vv_i32m4_tumu(__VA_ARGS__)

◆ vsll_vv_i32m8

#define vsll_vv_i32m8 ( ... ) __riscv_vsll_vv_i32m8(__VA_ARGS__)

◆ vsll_vv_i32m8_m

#define vsll_vv_i32m8_m ( ... ) __riscv_vsll_vv_i32m8_tumu(__VA_ARGS__)

◆ vsll_vv_i32mf2

#define vsll_vv_i32mf2 ( ... ) __riscv_vsll_vv_i32mf2(__VA_ARGS__)

◆ vsll_vv_i32mf2_m

#define vsll_vv_i32mf2_m ( ... ) __riscv_vsll_vv_i32mf2_tumu(__VA_ARGS__)

◆ vsll_vv_i64m1

#define vsll_vv_i64m1 ( ... ) __riscv_vsll_vv_i64m1(__VA_ARGS__)

◆ vsll_vv_i64m1_m

#define vsll_vv_i64m1_m ( ... ) __riscv_vsll_vv_i64m1_tumu(__VA_ARGS__)

◆ vsll_vv_i64m2

#define vsll_vv_i64m2 ( ... ) __riscv_vsll_vv_i64m2(__VA_ARGS__)

◆ vsll_vv_i64m2_m

#define vsll_vv_i64m2_m ( ... ) __riscv_vsll_vv_i64m2_tumu(__VA_ARGS__)

◆ vsll_vv_i64m4

#define vsll_vv_i64m4 ( ... ) __riscv_vsll_vv_i64m4(__VA_ARGS__)

◆ vsll_vv_i64m4_m

#define vsll_vv_i64m4_m ( ... ) __riscv_vsll_vv_i64m4_tumu(__VA_ARGS__)

◆ vsll_vv_i64m8

#define vsll_vv_i64m8 ( ... ) __riscv_vsll_vv_i64m8(__VA_ARGS__)

◆ vsll_vv_i64m8_m

#define vsll_vv_i64m8_m ( ... ) __riscv_vsll_vv_i64m8_tumu(__VA_ARGS__)

◆ vsll_vv_i8m1

#define vsll_vv_i8m1 ( ... ) __riscv_vsll_vv_i8m1(__VA_ARGS__)

◆ vsll_vv_i8m1_m

#define vsll_vv_i8m1_m ( ... ) __riscv_vsll_vv_i8m1_tumu(__VA_ARGS__)

◆ vsll_vv_i8m2

#define vsll_vv_i8m2 ( ... ) __riscv_vsll_vv_i8m2(__VA_ARGS__)

◆ vsll_vv_i8m2_m

#define vsll_vv_i8m2_m ( ... ) __riscv_vsll_vv_i8m2_tumu(__VA_ARGS__)

◆ vsll_vv_i8m4

#define vsll_vv_i8m4 ( ... ) __riscv_vsll_vv_i8m4(__VA_ARGS__)

◆ vsll_vv_i8m4_m

#define vsll_vv_i8m4_m ( ... ) __riscv_vsll_vv_i8m4_tumu(__VA_ARGS__)

◆ vsll_vv_i8m8

#define vsll_vv_i8m8 ( ... ) __riscv_vsll_vv_i8m8(__VA_ARGS__)

◆ vsll_vv_i8m8_m

#define vsll_vv_i8m8_m ( ... ) __riscv_vsll_vv_i8m8_tumu(__VA_ARGS__)

◆ vsll_vv_i8mf2

#define vsll_vv_i8mf2 ( ... ) __riscv_vsll_vv_i8mf2(__VA_ARGS__)

◆ vsll_vv_i8mf2_m

#define vsll_vv_i8mf2_m ( ... ) __riscv_vsll_vv_i8mf2_tumu(__VA_ARGS__)

◆ vsll_vv_i8mf4

#define vsll_vv_i8mf4 ( ... ) __riscv_vsll_vv_i8mf4(__VA_ARGS__)

◆ vsll_vv_i8mf4_m

#define vsll_vv_i8mf4_m ( ... ) __riscv_vsll_vv_i8mf4_tumu(__VA_ARGS__)

◆ vsll_vv_i8mf8

#define vsll_vv_i8mf8 ( ... ) __riscv_vsll_vv_i8mf8(__VA_ARGS__)

◆ vsll_vv_i8mf8_m

#define vsll_vv_i8mf8_m ( ... ) __riscv_vsll_vv_i8mf8_tumu(__VA_ARGS__)

◆ vsll_vv_u16m1

#define vsll_vv_u16m1 ( ... ) __riscv_vsll_vv_u16m1(__VA_ARGS__)

◆ vsll_vv_u16m1_m

#define vsll_vv_u16m1_m ( ... ) __riscv_vsll_vv_u16m1_tumu(__VA_ARGS__)

◆ vsll_vv_u16m2

#define vsll_vv_u16m2 ( ... ) __riscv_vsll_vv_u16m2(__VA_ARGS__)

◆ vsll_vv_u16m2_m

#define vsll_vv_u16m2_m ( ... ) __riscv_vsll_vv_u16m2_tumu(__VA_ARGS__)

◆ vsll_vv_u16m4

#define vsll_vv_u16m4 ( ... ) __riscv_vsll_vv_u16m4(__VA_ARGS__)

◆ vsll_vv_u16m4_m

#define vsll_vv_u16m4_m ( ... ) __riscv_vsll_vv_u16m4_tumu(__VA_ARGS__)

◆ vsll_vv_u16m8

#define vsll_vv_u16m8 ( ... ) __riscv_vsll_vv_u16m8(__VA_ARGS__)

◆ vsll_vv_u16m8_m

#define vsll_vv_u16m8_m ( ... ) __riscv_vsll_vv_u16m8_tumu(__VA_ARGS__)

◆ vsll_vv_u16mf2

#define vsll_vv_u16mf2 ( ... ) __riscv_vsll_vv_u16mf2(__VA_ARGS__)

◆ vsll_vv_u16mf2_m

#define vsll_vv_u16mf2_m ( ... ) __riscv_vsll_vv_u16mf2_tumu(__VA_ARGS__)

◆ vsll_vv_u16mf4

#define vsll_vv_u16mf4 ( ... ) __riscv_vsll_vv_u16mf4(__VA_ARGS__)

◆ vsll_vv_u16mf4_m

#define vsll_vv_u16mf4_m ( ... ) __riscv_vsll_vv_u16mf4_tumu(__VA_ARGS__)

◆ vsll_vv_u32m1

#define vsll_vv_u32m1 ( ... ) __riscv_vsll_vv_u32m1(__VA_ARGS__)

◆ vsll_vv_u32m1_m

#define vsll_vv_u32m1_m ( ... ) __riscv_vsll_vv_u32m1_tumu(__VA_ARGS__)

◆ vsll_vv_u32m2

#define vsll_vv_u32m2 ( ... ) __riscv_vsll_vv_u32m2(__VA_ARGS__)

◆ vsll_vv_u32m2_m

#define vsll_vv_u32m2_m ( ... ) __riscv_vsll_vv_u32m2_tumu(__VA_ARGS__)

◆ vsll_vv_u32m4

#define vsll_vv_u32m4 ( ... ) __riscv_vsll_vv_u32m4(__VA_ARGS__)

◆ vsll_vv_u32m4_m

#define vsll_vv_u32m4_m ( ... ) __riscv_vsll_vv_u32m4_tumu(__VA_ARGS__)

◆ vsll_vv_u32m8

#define vsll_vv_u32m8 ( ... ) __riscv_vsll_vv_u32m8(__VA_ARGS__)

◆ vsll_vv_u32m8_m

#define vsll_vv_u32m8_m ( ... ) __riscv_vsll_vv_u32m8_tumu(__VA_ARGS__)

◆ vsll_vv_u32mf2

#define vsll_vv_u32mf2 ( ... ) __riscv_vsll_vv_u32mf2(__VA_ARGS__)

◆ vsll_vv_u32mf2_m

#define vsll_vv_u32mf2_m ( ... ) __riscv_vsll_vv_u32mf2_tumu(__VA_ARGS__)

◆ vsll_vv_u64m1

#define vsll_vv_u64m1 ( ... ) __riscv_vsll_vv_u64m1(__VA_ARGS__)

◆ vsll_vv_u64m1_m

#define vsll_vv_u64m1_m ( ... ) __riscv_vsll_vv_u64m1_tumu(__VA_ARGS__)

◆ vsll_vv_u64m2

#define vsll_vv_u64m2 ( ... ) __riscv_vsll_vv_u64m2(__VA_ARGS__)

◆ vsll_vv_u64m2_m

#define vsll_vv_u64m2_m ( ... ) __riscv_vsll_vv_u64m2_tumu(__VA_ARGS__)

◆ vsll_vv_u64m4

#define vsll_vv_u64m4 ( ... ) __riscv_vsll_vv_u64m4(__VA_ARGS__)

◆ vsll_vv_u64m4_m

#define vsll_vv_u64m4_m ( ... ) __riscv_vsll_vv_u64m4_tumu(__VA_ARGS__)

◆ vsll_vv_u64m8

#define vsll_vv_u64m8 ( ... ) __riscv_vsll_vv_u64m8(__VA_ARGS__)

◆ vsll_vv_u64m8_m

#define vsll_vv_u64m8_m ( ... ) __riscv_vsll_vv_u64m8_tumu(__VA_ARGS__)

◆ vsll_vv_u8m1

#define vsll_vv_u8m1 ( ... ) __riscv_vsll_vv_u8m1(__VA_ARGS__)

◆ vsll_vv_u8m1_m

#define vsll_vv_u8m1_m ( ... ) __riscv_vsll_vv_u8m1_tumu(__VA_ARGS__)

◆ vsll_vv_u8m2

#define vsll_vv_u8m2 ( ... ) __riscv_vsll_vv_u8m2(__VA_ARGS__)

◆ vsll_vv_u8m2_m

#define vsll_vv_u8m2_m ( ... ) __riscv_vsll_vv_u8m2_tumu(__VA_ARGS__)

◆ vsll_vv_u8m4

#define vsll_vv_u8m4 ( ... ) __riscv_vsll_vv_u8m4(__VA_ARGS__)

◆ vsll_vv_u8m4_m

#define vsll_vv_u8m4_m ( ... ) __riscv_vsll_vv_u8m4_tumu(__VA_ARGS__)

◆ vsll_vv_u8m8

#define vsll_vv_u8m8 ( ... ) __riscv_vsll_vv_u8m8(__VA_ARGS__)

◆ vsll_vv_u8m8_m

#define vsll_vv_u8m8_m ( ... ) __riscv_vsll_vv_u8m8_tumu(__VA_ARGS__)

◆ vsll_vv_u8mf2

#define vsll_vv_u8mf2 ( ... ) __riscv_vsll_vv_u8mf2(__VA_ARGS__)

◆ vsll_vv_u8mf2_m

#define vsll_vv_u8mf2_m ( ... ) __riscv_vsll_vv_u8mf2_tumu(__VA_ARGS__)

◆ vsll_vv_u8mf4

#define vsll_vv_u8mf4 ( ... ) __riscv_vsll_vv_u8mf4(__VA_ARGS__)

◆ vsll_vv_u8mf4_m

#define vsll_vv_u8mf4_m ( ... ) __riscv_vsll_vv_u8mf4_tumu(__VA_ARGS__)

◆ vsll_vv_u8mf8

#define vsll_vv_u8mf8 ( ... ) __riscv_vsll_vv_u8mf8(__VA_ARGS__)

◆ vsll_vv_u8mf8_m

#define vsll_vv_u8mf8_m ( ... ) __riscv_vsll_vv_u8mf8_tumu(__VA_ARGS__)

◆ vsll_vx_i16m1

#define vsll_vx_i16m1 ( ... ) __riscv_vsll_vx_i16m1(__VA_ARGS__)

◆ vsll_vx_i16m1_m

#define vsll_vx_i16m1_m ( ... ) __riscv_vsll_vx_i16m1_tumu(__VA_ARGS__)

◆ vsll_vx_i16m2

#define vsll_vx_i16m2 ( ... ) __riscv_vsll_vx_i16m2(__VA_ARGS__)

◆ vsll_vx_i16m2_m

#define vsll_vx_i16m2_m ( ... ) __riscv_vsll_vx_i16m2_tumu(__VA_ARGS__)

◆ vsll_vx_i16m4

#define vsll_vx_i16m4 ( ... ) __riscv_vsll_vx_i16m4(__VA_ARGS__)

◆ vsll_vx_i16m4_m

#define vsll_vx_i16m4_m ( ... ) __riscv_vsll_vx_i16m4_tumu(__VA_ARGS__)

◆ vsll_vx_i16m8

#define vsll_vx_i16m8 ( ... ) __riscv_vsll_vx_i16m8(__VA_ARGS__)

◆ vsll_vx_i16m8_m

#define vsll_vx_i16m8_m ( ... ) __riscv_vsll_vx_i16m8_tumu(__VA_ARGS__)

◆ vsll_vx_i16mf2

#define vsll_vx_i16mf2 ( ... ) __riscv_vsll_vx_i16mf2(__VA_ARGS__)

◆ vsll_vx_i16mf2_m

#define vsll_vx_i16mf2_m ( ... ) __riscv_vsll_vx_i16mf2_tumu(__VA_ARGS__)

◆ vsll_vx_i16mf4

#define vsll_vx_i16mf4 ( ... ) __riscv_vsll_vx_i16mf4(__VA_ARGS__)

◆ vsll_vx_i16mf4_m

#define vsll_vx_i16mf4_m ( ... ) __riscv_vsll_vx_i16mf4_tumu(__VA_ARGS__)

◆ vsll_vx_i32m1

#define vsll_vx_i32m1 ( ... ) __riscv_vsll_vx_i32m1(__VA_ARGS__)

◆ vsll_vx_i32m1_m

#define vsll_vx_i32m1_m ( ... ) __riscv_vsll_vx_i32m1_tumu(__VA_ARGS__)

◆ vsll_vx_i32m2

#define vsll_vx_i32m2 ( ... ) __riscv_vsll_vx_i32m2(__VA_ARGS__)

◆ vsll_vx_i32m2_m

#define vsll_vx_i32m2_m ( ... ) __riscv_vsll_vx_i32m2_tumu(__VA_ARGS__)

◆ vsll_vx_i32m4

#define vsll_vx_i32m4 ( ... ) __riscv_vsll_vx_i32m4(__VA_ARGS__)

◆ vsll_vx_i32m4_m

#define vsll_vx_i32m4_m ( ... ) __riscv_vsll_vx_i32m4_tumu(__VA_ARGS__)

◆ vsll_vx_i32m8

#define vsll_vx_i32m8 ( ... ) __riscv_vsll_vx_i32m8(__VA_ARGS__)

◆ vsll_vx_i32m8_m

#define vsll_vx_i32m8_m ( ... ) __riscv_vsll_vx_i32m8_tumu(__VA_ARGS__)

◆ vsll_vx_i32mf2

#define vsll_vx_i32mf2 ( ... ) __riscv_vsll_vx_i32mf2(__VA_ARGS__)

◆ vsll_vx_i32mf2_m

#define vsll_vx_i32mf2_m ( ... ) __riscv_vsll_vx_i32mf2_tumu(__VA_ARGS__)

◆ vsll_vx_i64m1

#define vsll_vx_i64m1 ( ... ) __riscv_vsll_vx_i64m1(__VA_ARGS__)

◆ vsll_vx_i64m1_m

#define vsll_vx_i64m1_m ( ... ) __riscv_vsll_vx_i64m1_tumu(__VA_ARGS__)

◆ vsll_vx_i64m2

#define vsll_vx_i64m2 ( ... ) __riscv_vsll_vx_i64m2(__VA_ARGS__)

◆ vsll_vx_i64m2_m

#define vsll_vx_i64m2_m ( ... ) __riscv_vsll_vx_i64m2_tumu(__VA_ARGS__)

◆ vsll_vx_i64m4

#define vsll_vx_i64m4 ( ... ) __riscv_vsll_vx_i64m4(__VA_ARGS__)

◆ vsll_vx_i64m4_m

#define vsll_vx_i64m4_m ( ... ) __riscv_vsll_vx_i64m4_tumu(__VA_ARGS__)

◆ vsll_vx_i64m8

#define vsll_vx_i64m8 ( ... ) __riscv_vsll_vx_i64m8(__VA_ARGS__)

◆ vsll_vx_i64m8_m

#define vsll_vx_i64m8_m ( ... ) __riscv_vsll_vx_i64m8_tumu(__VA_ARGS__)

◆ vsll_vx_i8m1

#define vsll_vx_i8m1 ( ... ) __riscv_vsll_vx_i8m1(__VA_ARGS__)

◆ vsll_vx_i8m1_m

#define vsll_vx_i8m1_m ( ... ) __riscv_vsll_vx_i8m1_tumu(__VA_ARGS__)

◆ vsll_vx_i8m2

#define vsll_vx_i8m2 ( ... ) __riscv_vsll_vx_i8m2(__VA_ARGS__)

◆ vsll_vx_i8m2_m

#define vsll_vx_i8m2_m ( ... ) __riscv_vsll_vx_i8m2_tumu(__VA_ARGS__)

◆ vsll_vx_i8m4

#define vsll_vx_i8m4 ( ... ) __riscv_vsll_vx_i8m4(__VA_ARGS__)

◆ vsll_vx_i8m4_m

#define vsll_vx_i8m4_m ( ... ) __riscv_vsll_vx_i8m4_tumu(__VA_ARGS__)

◆ vsll_vx_i8m8

#define vsll_vx_i8m8 ( ... ) __riscv_vsll_vx_i8m8(__VA_ARGS__)

◆ vsll_vx_i8m8_m

#define vsll_vx_i8m8_m ( ... ) __riscv_vsll_vx_i8m8_tumu(__VA_ARGS__)

◆ vsll_vx_i8mf2

#define vsll_vx_i8mf2 ( ... ) __riscv_vsll_vx_i8mf2(__VA_ARGS__)

◆ vsll_vx_i8mf2_m

#define vsll_vx_i8mf2_m ( ... ) __riscv_vsll_vx_i8mf2_tumu(__VA_ARGS__)

◆ vsll_vx_i8mf4

#define vsll_vx_i8mf4 ( ... ) __riscv_vsll_vx_i8mf4(__VA_ARGS__)

◆ vsll_vx_i8mf4_m

#define vsll_vx_i8mf4_m ( ... ) __riscv_vsll_vx_i8mf4_tumu(__VA_ARGS__)

◆ vsll_vx_i8mf8

#define vsll_vx_i8mf8 ( ... ) __riscv_vsll_vx_i8mf8(__VA_ARGS__)

◆ vsll_vx_i8mf8_m

#define vsll_vx_i8mf8_m ( ... ) __riscv_vsll_vx_i8mf8_tumu(__VA_ARGS__)

◆ vsll_vx_u16m1

#define vsll_vx_u16m1 ( ... ) __riscv_vsll_vx_u16m1(__VA_ARGS__)

◆ vsll_vx_u16m1_m

#define vsll_vx_u16m1_m ( ... ) __riscv_vsll_vx_u16m1_tumu(__VA_ARGS__)

◆ vsll_vx_u16m2

#define vsll_vx_u16m2 ( ... ) __riscv_vsll_vx_u16m2(__VA_ARGS__)

◆ vsll_vx_u16m2_m

#define vsll_vx_u16m2_m ( ... ) __riscv_vsll_vx_u16m2_tumu(__VA_ARGS__)

◆ vsll_vx_u16m4

#define vsll_vx_u16m4 ( ... ) __riscv_vsll_vx_u16m4(__VA_ARGS__)

◆ vsll_vx_u16m4_m

#define vsll_vx_u16m4_m ( ... ) __riscv_vsll_vx_u16m4_tumu(__VA_ARGS__)

◆ vsll_vx_u16m8

#define vsll_vx_u16m8 ( ... ) __riscv_vsll_vx_u16m8(__VA_ARGS__)

◆ vsll_vx_u16m8_m

#define vsll_vx_u16m8_m ( ... ) __riscv_vsll_vx_u16m8_tumu(__VA_ARGS__)

◆ vsll_vx_u16mf2

#define vsll_vx_u16mf2 ( ... ) __riscv_vsll_vx_u16mf2(__VA_ARGS__)

◆ vsll_vx_u16mf2_m

#define vsll_vx_u16mf2_m ( ... ) __riscv_vsll_vx_u16mf2_tumu(__VA_ARGS__)

◆ vsll_vx_u16mf4

#define vsll_vx_u16mf4 ( ... ) __riscv_vsll_vx_u16mf4(__VA_ARGS__)

◆ vsll_vx_u16mf4_m

#define vsll_vx_u16mf4_m ( ... ) __riscv_vsll_vx_u16mf4_tumu(__VA_ARGS__)

◆ vsll_vx_u32m1

#define vsll_vx_u32m1 ( ... ) __riscv_vsll_vx_u32m1(__VA_ARGS__)

◆ vsll_vx_u32m1_m

#define vsll_vx_u32m1_m ( ... ) __riscv_vsll_vx_u32m1_tumu(__VA_ARGS__)

◆ vsll_vx_u32m2

#define vsll_vx_u32m2 ( ... ) __riscv_vsll_vx_u32m2(__VA_ARGS__)

◆ vsll_vx_u32m2_m

#define vsll_vx_u32m2_m ( ... ) __riscv_vsll_vx_u32m2_tumu(__VA_ARGS__)

◆ vsll_vx_u32m4

#define vsll_vx_u32m4 ( ... ) __riscv_vsll_vx_u32m4(__VA_ARGS__)

◆ vsll_vx_u32m4_m

#define vsll_vx_u32m4_m ( ... ) __riscv_vsll_vx_u32m4_tumu(__VA_ARGS__)

◆ vsll_vx_u32m8

#define vsll_vx_u32m8 ( ... ) __riscv_vsll_vx_u32m8(__VA_ARGS__)

◆ vsll_vx_u32m8_m

#define vsll_vx_u32m8_m ( ... ) __riscv_vsll_vx_u32m8_tumu(__VA_ARGS__)

◆ vsll_vx_u32mf2

#define vsll_vx_u32mf2 ( ... ) __riscv_vsll_vx_u32mf2(__VA_ARGS__)

◆ vsll_vx_u32mf2_m

#define vsll_vx_u32mf2_m ( ... ) __riscv_vsll_vx_u32mf2_tumu(__VA_ARGS__)

◆ vsll_vx_u64m1

#define vsll_vx_u64m1 ( ... ) __riscv_vsll_vx_u64m1(__VA_ARGS__)

◆ vsll_vx_u64m1_m

#define vsll_vx_u64m1_m ( ... ) __riscv_vsll_vx_u64m1_tumu(__VA_ARGS__)

◆ vsll_vx_u64m2

#define vsll_vx_u64m2 ( ... ) __riscv_vsll_vx_u64m2(__VA_ARGS__)

◆ vsll_vx_u64m2_m

#define vsll_vx_u64m2_m ( ... ) __riscv_vsll_vx_u64m2_tumu(__VA_ARGS__)

◆ vsll_vx_u64m4

#define vsll_vx_u64m4 ( ... ) __riscv_vsll_vx_u64m4(__VA_ARGS__)

◆ vsll_vx_u64m4_m

#define vsll_vx_u64m4_m ( ... ) __riscv_vsll_vx_u64m4_tumu(__VA_ARGS__)

◆ vsll_vx_u64m8

#define vsll_vx_u64m8 ( ... ) __riscv_vsll_vx_u64m8(__VA_ARGS__)

◆ vsll_vx_u64m8_m

#define vsll_vx_u64m8_m ( ... ) __riscv_vsll_vx_u64m8_tumu(__VA_ARGS__)

◆ vsll_vx_u8m1

#define vsll_vx_u8m1 ( ... ) __riscv_vsll_vx_u8m1(__VA_ARGS__)

◆ vsll_vx_u8m1_m

#define vsll_vx_u8m1_m ( ... ) __riscv_vsll_vx_u8m1_tumu(__VA_ARGS__)

◆ vsll_vx_u8m2

#define vsll_vx_u8m2 ( ... ) __riscv_vsll_vx_u8m2(__VA_ARGS__)

◆ vsll_vx_u8m2_m

#define vsll_vx_u8m2_m ( ... ) __riscv_vsll_vx_u8m2_tumu(__VA_ARGS__)

◆ vsll_vx_u8m4

#define vsll_vx_u8m4 ( ... ) __riscv_vsll_vx_u8m4(__VA_ARGS__)

◆ vsll_vx_u8m4_m

#define vsll_vx_u8m4_m ( ... ) __riscv_vsll_vx_u8m4_tumu(__VA_ARGS__)

◆ vsll_vx_u8m8

#define vsll_vx_u8m8 ( ... ) __riscv_vsll_vx_u8m8(__VA_ARGS__)

◆ vsll_vx_u8m8_m

#define vsll_vx_u8m8_m ( ... ) __riscv_vsll_vx_u8m8_tumu(__VA_ARGS__)

◆ vsll_vx_u8mf2

#define vsll_vx_u8mf2 ( ... ) __riscv_vsll_vx_u8mf2(__VA_ARGS__)

◆ vsll_vx_u8mf2_m

#define vsll_vx_u8mf2_m ( ... ) __riscv_vsll_vx_u8mf2_tumu(__VA_ARGS__)

◆ vsll_vx_u8mf4

#define vsll_vx_u8mf4 ( ... ) __riscv_vsll_vx_u8mf4(__VA_ARGS__)

◆ vsll_vx_u8mf4_m

#define vsll_vx_u8mf4_m ( ... ) __riscv_vsll_vx_u8mf4_tumu(__VA_ARGS__)

◆ vsll_vx_u8mf8

#define vsll_vx_u8mf8 ( ... ) __riscv_vsll_vx_u8mf8(__VA_ARGS__)

◆ vsll_vx_u8mf8_m

#define vsll_vx_u8mf8_m ( ... ) __riscv_vsll_vx_u8mf8_tumu(__VA_ARGS__)

◆ vsm_v_b1

#define vsm_v_b1 ( ... ) __riscv_vsm_v_b1(__VA_ARGS__)

◆ vsm_v_b16

#define vsm_v_b16 ( ... ) __riscv_vsm_v_b16(__VA_ARGS__)

◆ vsm_v_b2

#define vsm_v_b2 ( ... ) __riscv_vsm_v_b2(__VA_ARGS__)

◆ vsm_v_b32

#define vsm_v_b32 ( ... ) __riscv_vsm_v_b32(__VA_ARGS__)

◆ vsm_v_b4

#define vsm_v_b4 ( ... ) __riscv_vsm_v_b4(__VA_ARGS__)

◆ vsm_v_b64

#define vsm_v_b64 ( ... ) __riscv_vsm_v_b64(__VA_ARGS__)

◆ vsm_v_b8

#define vsm_v_b8 ( ... ) __riscv_vsm_v_b8(__VA_ARGS__)

◆ vsmul_vv_i16m1

#define vsmul_vv_i16m1 ( ... ) __riscv_vsmul_vv_i16m1(__VA_ARGS__)

◆ vsmul_vv_i16m1_m

#define vsmul_vv_i16m1_m ( ... ) __riscv_vsmul_vv_i16m1_mu(__VA_ARGS__)

◆ vsmul_vv_i16m2

#define vsmul_vv_i16m2 ( ... ) __riscv_vsmul_vv_i16m2(__VA_ARGS__)

◆ vsmul_vv_i16m2_m

#define vsmul_vv_i16m2_m ( ... ) __riscv_vsmul_vv_i16m2_mu(__VA_ARGS__)

◆ vsmul_vv_i16m4

#define vsmul_vv_i16m4 ( ... ) __riscv_vsmul_vv_i16m4(__VA_ARGS__)

◆ vsmul_vv_i16m4_m

#define vsmul_vv_i16m4_m ( ... ) __riscv_vsmul_vv_i16m4_mu(__VA_ARGS__)

◆ vsmul_vv_i16m8

#define vsmul_vv_i16m8 ( ... ) __riscv_vsmul_vv_i16m8(__VA_ARGS__)

◆ vsmul_vv_i16m8_m

#define vsmul_vv_i16m8_m ( ... ) __riscv_vsmul_vv_i16m8_mu(__VA_ARGS__)

◆ vsmul_vv_i16mf2

#define vsmul_vv_i16mf2 ( ... ) __riscv_vsmul_vv_i16mf2(__VA_ARGS__)

◆ vsmul_vv_i16mf2_m

#define vsmul_vv_i16mf2_m ( ... ) __riscv_vsmul_vv_i16mf2_mu(__VA_ARGS__)

◆ vsmul_vv_i16mf4

#define vsmul_vv_i16mf4 ( ... ) __riscv_vsmul_vv_i16mf4(__VA_ARGS__)

◆ vsmul_vv_i16mf4_m

#define vsmul_vv_i16mf4_m ( ... ) __riscv_vsmul_vv_i16mf4_mu(__VA_ARGS__)

◆ vsmul_vv_i32m1

#define vsmul_vv_i32m1 ( ... ) __riscv_vsmul_vv_i32m1(__VA_ARGS__)

◆ vsmul_vv_i32m1_m

#define vsmul_vv_i32m1_m ( ... ) __riscv_vsmul_vv_i32m1_mu(__VA_ARGS__)

◆ vsmul_vv_i32m2

#define vsmul_vv_i32m2 ( ... ) __riscv_vsmul_vv_i32m2(__VA_ARGS__)

◆ vsmul_vv_i32m2_m

#define vsmul_vv_i32m2_m ( ... ) __riscv_vsmul_vv_i32m2_mu(__VA_ARGS__)

◆ vsmul_vv_i32m4

#define vsmul_vv_i32m4 ( ... ) __riscv_vsmul_vv_i32m4(__VA_ARGS__)

◆ vsmul_vv_i32m4_m

#define vsmul_vv_i32m4_m ( ... ) __riscv_vsmul_vv_i32m4_mu(__VA_ARGS__)

◆ vsmul_vv_i32m8

#define vsmul_vv_i32m8 ( ... ) __riscv_vsmul_vv_i32m8(__VA_ARGS__)

◆ vsmul_vv_i32m8_m

#define vsmul_vv_i32m8_m ( ... ) __riscv_vsmul_vv_i32m8_mu(__VA_ARGS__)

◆ vsmul_vv_i32mf2

#define vsmul_vv_i32mf2 ( ... ) __riscv_vsmul_vv_i32mf2(__VA_ARGS__)

◆ vsmul_vv_i32mf2_m

#define vsmul_vv_i32mf2_m ( ... ) __riscv_vsmul_vv_i32mf2_mu(__VA_ARGS__)

◆ vsmul_vv_i64m1

#define vsmul_vv_i64m1 ( ... ) __riscv_vsmul_vv_i64m1(__VA_ARGS__)

◆ vsmul_vv_i64m1_m

#define vsmul_vv_i64m1_m ( ... ) __riscv_vsmul_vv_i64m1_mu(__VA_ARGS__)

◆ vsmul_vv_i64m2

#define vsmul_vv_i64m2 ( ... ) __riscv_vsmul_vv_i64m2(__VA_ARGS__)

◆ vsmul_vv_i64m2_m

#define vsmul_vv_i64m2_m ( ... ) __riscv_vsmul_vv_i64m2_mu(__VA_ARGS__)

◆ vsmul_vv_i64m4

#define vsmul_vv_i64m4 ( ... ) __riscv_vsmul_vv_i64m4(__VA_ARGS__)

◆ vsmul_vv_i64m4_m

#define vsmul_vv_i64m4_m ( ... ) __riscv_vsmul_vv_i64m4_mu(__VA_ARGS__)

◆ vsmul_vv_i64m8

#define vsmul_vv_i64m8 ( ... ) __riscv_vsmul_vv_i64m8(__VA_ARGS__)

◆ vsmul_vv_i64m8_m

#define vsmul_vv_i64m8_m ( ... ) __riscv_vsmul_vv_i64m8_mu(__VA_ARGS__)

◆ vsmul_vv_i8m1

#define vsmul_vv_i8m1 ( ... ) __riscv_vsmul_vv_i8m1(__VA_ARGS__)

◆ vsmul_vv_i8m1_m

#define vsmul_vv_i8m1_m ( ... ) __riscv_vsmul_vv_i8m1_mu(__VA_ARGS__)

◆ vsmul_vv_i8m2

#define vsmul_vv_i8m2 ( ... ) __riscv_vsmul_vv_i8m2(__VA_ARGS__)

◆ vsmul_vv_i8m2_m

#define vsmul_vv_i8m2_m ( ... ) __riscv_vsmul_vv_i8m2_mu(__VA_ARGS__)

◆ vsmul_vv_i8m4

#define vsmul_vv_i8m4 ( ... ) __riscv_vsmul_vv_i8m4(__VA_ARGS__)

◆ vsmul_vv_i8m4_m

#define vsmul_vv_i8m4_m ( ... ) __riscv_vsmul_vv_i8m4_mu(__VA_ARGS__)

◆ vsmul_vv_i8m8

#define vsmul_vv_i8m8 ( ... ) __riscv_vsmul_vv_i8m8(__VA_ARGS__)

◆ vsmul_vv_i8m8_m

#define vsmul_vv_i8m8_m ( ... ) __riscv_vsmul_vv_i8m8_mu(__VA_ARGS__)

◆ vsmul_vv_i8mf2

#define vsmul_vv_i8mf2 ( ... ) __riscv_vsmul_vv_i8mf2(__VA_ARGS__)

◆ vsmul_vv_i8mf2_m

#define vsmul_vv_i8mf2_m ( ... ) __riscv_vsmul_vv_i8mf2_mu(__VA_ARGS__)

◆ vsmul_vv_i8mf4

#define vsmul_vv_i8mf4 ( ... ) __riscv_vsmul_vv_i8mf4(__VA_ARGS__)

◆ vsmul_vv_i8mf4_m

#define vsmul_vv_i8mf4_m ( ... ) __riscv_vsmul_vv_i8mf4_mu(__VA_ARGS__)

◆ vsmul_vv_i8mf8

#define vsmul_vv_i8mf8 ( ... ) __riscv_vsmul_vv_i8mf8(__VA_ARGS__)

◆ vsmul_vv_i8mf8_m

#define vsmul_vv_i8mf8_m ( ... ) __riscv_vsmul_vv_i8mf8_mu(__VA_ARGS__)

◆ vsmul_vx_i16m1

#define vsmul_vx_i16m1 ( ... ) __riscv_vsmul_vx_i16m1(__VA_ARGS__)

◆ vsmul_vx_i16m1_m

#define vsmul_vx_i16m1_m ( ... ) __riscv_vsmul_vx_i16m1_mu(__VA_ARGS__)

◆ vsmul_vx_i16m2

#define vsmul_vx_i16m2 ( ... ) __riscv_vsmul_vx_i16m2(__VA_ARGS__)

◆ vsmul_vx_i16m2_m

#define vsmul_vx_i16m2_m ( ... ) __riscv_vsmul_vx_i16m2_mu(__VA_ARGS__)

◆ vsmul_vx_i16m4

#define vsmul_vx_i16m4 ( ... ) __riscv_vsmul_vx_i16m4(__VA_ARGS__)

◆ vsmul_vx_i16m4_m

#define vsmul_vx_i16m4_m ( ... ) __riscv_vsmul_vx_i16m4_mu(__VA_ARGS__)

◆ vsmul_vx_i16m8

#define vsmul_vx_i16m8 ( ... ) __riscv_vsmul_vx_i16m8(__VA_ARGS__)

◆ vsmul_vx_i16m8_m

#define vsmul_vx_i16m8_m ( ... ) __riscv_vsmul_vx_i16m8_mu(__VA_ARGS__)

◆ vsmul_vx_i16mf2

#define vsmul_vx_i16mf2 ( ... ) __riscv_vsmul_vx_i16mf2(__VA_ARGS__)

◆ vsmul_vx_i16mf2_m

#define vsmul_vx_i16mf2_m ( ... ) __riscv_vsmul_vx_i16mf2_mu(__VA_ARGS__)

◆ vsmul_vx_i16mf4

#define vsmul_vx_i16mf4 ( ... ) __riscv_vsmul_vx_i16mf4(__VA_ARGS__)

◆ vsmul_vx_i16mf4_m

#define vsmul_vx_i16mf4_m ( ... ) __riscv_vsmul_vx_i16mf4_mu(__VA_ARGS__)

◆ vsmul_vx_i32m1

#define vsmul_vx_i32m1 ( ... ) __riscv_vsmul_vx_i32m1(__VA_ARGS__)

◆ vsmul_vx_i32m1_m

#define vsmul_vx_i32m1_m ( ... ) __riscv_vsmul_vx_i32m1_mu(__VA_ARGS__)

◆ vsmul_vx_i32m2

#define vsmul_vx_i32m2 ( ... ) __riscv_vsmul_vx_i32m2(__VA_ARGS__)

◆ vsmul_vx_i32m2_m

#define vsmul_vx_i32m2_m ( ... ) __riscv_vsmul_vx_i32m2_mu(__VA_ARGS__)

◆ vsmul_vx_i32m4

#define vsmul_vx_i32m4 ( ... ) __riscv_vsmul_vx_i32m4(__VA_ARGS__)

◆ vsmul_vx_i32m4_m

#define vsmul_vx_i32m4_m ( ... ) __riscv_vsmul_vx_i32m4_mu(__VA_ARGS__)

◆ vsmul_vx_i32m8

#define vsmul_vx_i32m8 ( ... ) __riscv_vsmul_vx_i32m8(__VA_ARGS__)

◆ vsmul_vx_i32m8_m

#define vsmul_vx_i32m8_m ( ... ) __riscv_vsmul_vx_i32m8_mu(__VA_ARGS__)

◆ vsmul_vx_i32mf2

#define vsmul_vx_i32mf2 ( ... ) __riscv_vsmul_vx_i32mf2(__VA_ARGS__)

◆ vsmul_vx_i32mf2_m

#define vsmul_vx_i32mf2_m ( ... ) __riscv_vsmul_vx_i32mf2_mu(__VA_ARGS__)

◆ vsmul_vx_i64m1

#define vsmul_vx_i64m1 ( ... ) __riscv_vsmul_vx_i64m1(__VA_ARGS__)

◆ vsmul_vx_i64m1_m

#define vsmul_vx_i64m1_m ( ... ) __riscv_vsmul_vx_i64m1_mu(__VA_ARGS__)

◆ vsmul_vx_i64m2

#define vsmul_vx_i64m2 ( ... ) __riscv_vsmul_vx_i64m2(__VA_ARGS__)

◆ vsmul_vx_i64m2_m

#define vsmul_vx_i64m2_m ( ... ) __riscv_vsmul_vx_i64m2_mu(__VA_ARGS__)

◆ vsmul_vx_i64m4

#define vsmul_vx_i64m4 ( ... ) __riscv_vsmul_vx_i64m4(__VA_ARGS__)

◆ vsmul_vx_i64m4_m

#define vsmul_vx_i64m4_m ( ... ) __riscv_vsmul_vx_i64m4_mu(__VA_ARGS__)

◆ vsmul_vx_i64m8

#define vsmul_vx_i64m8 ( ... ) __riscv_vsmul_vx_i64m8(__VA_ARGS__)

◆ vsmul_vx_i64m8_m

#define vsmul_vx_i64m8_m ( ... ) __riscv_vsmul_vx_i64m8_mu(__VA_ARGS__)

◆ vsmul_vx_i8m1

#define vsmul_vx_i8m1 ( ... ) __riscv_vsmul_vx_i8m1(__VA_ARGS__)

◆ vsmul_vx_i8m1_m

#define vsmul_vx_i8m1_m ( ... ) __riscv_vsmul_vx_i8m1_mu(__VA_ARGS__)

◆ vsmul_vx_i8m2

#define vsmul_vx_i8m2 ( ... ) __riscv_vsmul_vx_i8m2(__VA_ARGS__)

◆ vsmul_vx_i8m2_m

#define vsmul_vx_i8m2_m ( ... ) __riscv_vsmul_vx_i8m2_mu(__VA_ARGS__)

◆ vsmul_vx_i8m4

#define vsmul_vx_i8m4 ( ... ) __riscv_vsmul_vx_i8m4(__VA_ARGS__)

◆ vsmul_vx_i8m4_m

#define vsmul_vx_i8m4_m ( ... ) __riscv_vsmul_vx_i8m4_mu(__VA_ARGS__)

◆ vsmul_vx_i8m8

#define vsmul_vx_i8m8 ( ... ) __riscv_vsmul_vx_i8m8(__VA_ARGS__)

◆ vsmul_vx_i8m8_m

#define vsmul_vx_i8m8_m ( ... ) __riscv_vsmul_vx_i8m8_mu(__VA_ARGS__)

◆ vsmul_vx_i8mf2

#define vsmul_vx_i8mf2 ( ... ) __riscv_vsmul_vx_i8mf2(__VA_ARGS__)

◆ vsmul_vx_i8mf2_m

#define vsmul_vx_i8mf2_m ( ... ) __riscv_vsmul_vx_i8mf2_mu(__VA_ARGS__)

◆ vsmul_vx_i8mf4

#define vsmul_vx_i8mf4 ( ... ) __riscv_vsmul_vx_i8mf4(__VA_ARGS__)

◆ vsmul_vx_i8mf4_m

#define vsmul_vx_i8mf4_m ( ... ) __riscv_vsmul_vx_i8mf4_mu(__VA_ARGS__)

◆ vsmul_vx_i8mf8

#define vsmul_vx_i8mf8 ( ... ) __riscv_vsmul_vx_i8mf8(__VA_ARGS__)

◆ vsmul_vx_i8mf8_m

#define vsmul_vx_i8mf8_m ( ... ) __riscv_vsmul_vx_i8mf8_mu(__VA_ARGS__)

◆ vsoxei16_v_f16m1

#define vsoxei16_v_f16m1 ( ... ) __riscv_vsoxei16_v_f16m1(__VA_ARGS__)

◆ vsoxei16_v_f16m1_m

#define vsoxei16_v_f16m1_m ( ... ) __riscv_vsoxei16_v_f16m1_m(__VA_ARGS__)

◆ vsoxei16_v_f16m2

#define vsoxei16_v_f16m2 ( ... ) __riscv_vsoxei16_v_f16m2(__VA_ARGS__)

◆ vsoxei16_v_f16m2_m

#define vsoxei16_v_f16m2_m ( ... ) __riscv_vsoxei16_v_f16m2_m(__VA_ARGS__)

◆ vsoxei16_v_f16m4

#define vsoxei16_v_f16m4 ( ... ) __riscv_vsoxei16_v_f16m4(__VA_ARGS__)

◆ vsoxei16_v_f16m4_m

#define vsoxei16_v_f16m4_m ( ... ) __riscv_vsoxei16_v_f16m4_m(__VA_ARGS__)

◆ vsoxei16_v_f16m8

#define vsoxei16_v_f16m8 ( ... ) __riscv_vsoxei16_v_f16m8(__VA_ARGS__)

◆ vsoxei16_v_f16m8_m

#define vsoxei16_v_f16m8_m ( ... ) __riscv_vsoxei16_v_f16m8_m(__VA_ARGS__)

◆ vsoxei16_v_f16mf2

#define vsoxei16_v_f16mf2 ( ... ) __riscv_vsoxei16_v_f16mf2(__VA_ARGS__)

◆ vsoxei16_v_f16mf2_m

#define vsoxei16_v_f16mf2_m ( ... ) __riscv_vsoxei16_v_f16mf2_m(__VA_ARGS__)

◆ vsoxei16_v_f16mf4

#define vsoxei16_v_f16mf4 ( ... ) __riscv_vsoxei16_v_f16mf4(__VA_ARGS__)

◆ vsoxei16_v_f16mf4_m

#define vsoxei16_v_f16mf4_m ( ... ) __riscv_vsoxei16_v_f16mf4_m(__VA_ARGS__)

◆ vsoxei16_v_f32m1

#define vsoxei16_v_f32m1 ( ... ) __riscv_vsoxei16_v_f32m1(__VA_ARGS__)

◆ vsoxei16_v_f32m1_m

#define vsoxei16_v_f32m1_m ( ... ) __riscv_vsoxei16_v_f32m1_m(__VA_ARGS__)

◆ vsoxei16_v_f32m2

#define vsoxei16_v_f32m2 ( ... ) __riscv_vsoxei16_v_f32m2(__VA_ARGS__)

◆ vsoxei16_v_f32m2_m

#define vsoxei16_v_f32m2_m ( ... ) __riscv_vsoxei16_v_f32m2_m(__VA_ARGS__)

◆ vsoxei16_v_f32m4

#define vsoxei16_v_f32m4 ( ... ) __riscv_vsoxei16_v_f32m4(__VA_ARGS__)

◆ vsoxei16_v_f32m4_m

#define vsoxei16_v_f32m4_m ( ... ) __riscv_vsoxei16_v_f32m4_m(__VA_ARGS__)

◆ vsoxei16_v_f32m8

#define vsoxei16_v_f32m8 ( ... ) __riscv_vsoxei16_v_f32m8(__VA_ARGS__)

◆ vsoxei16_v_f32m8_m

#define vsoxei16_v_f32m8_m ( ... ) __riscv_vsoxei16_v_f32m8_m(__VA_ARGS__)

◆ vsoxei16_v_f32mf2

#define vsoxei16_v_f32mf2 ( ... ) __riscv_vsoxei16_v_f32mf2(__VA_ARGS__)

◆ vsoxei16_v_f32mf2_m

#define vsoxei16_v_f32mf2_m ( ... ) __riscv_vsoxei16_v_f32mf2_m(__VA_ARGS__)

◆ vsoxei16_v_f64m1

#define vsoxei16_v_f64m1 ( ... ) __riscv_vsoxei16_v_f64m1(__VA_ARGS__)

◆ vsoxei16_v_f64m1_m

#define vsoxei16_v_f64m1_m ( ... ) __riscv_vsoxei16_v_f64m1_m(__VA_ARGS__)

◆ vsoxei16_v_f64m2

#define vsoxei16_v_f64m2 ( ... ) __riscv_vsoxei16_v_f64m2(__VA_ARGS__)

◆ vsoxei16_v_f64m2_m

#define vsoxei16_v_f64m2_m ( ... ) __riscv_vsoxei16_v_f64m2_m(__VA_ARGS__)

◆ vsoxei16_v_f64m4

#define vsoxei16_v_f64m4 ( ... ) __riscv_vsoxei16_v_f64m4(__VA_ARGS__)

◆ vsoxei16_v_f64m4_m

#define vsoxei16_v_f64m4_m ( ... ) __riscv_vsoxei16_v_f64m4_m(__VA_ARGS__)

◆ vsoxei16_v_f64m8

#define vsoxei16_v_f64m8 ( ... ) __riscv_vsoxei16_v_f64m8(__VA_ARGS__)

◆ vsoxei16_v_f64m8_m

#define vsoxei16_v_f64m8_m ( ... ) __riscv_vsoxei16_v_f64m8_m(__VA_ARGS__)

◆ vsoxei16_v_i16m1

#define vsoxei16_v_i16m1 ( ... ) __riscv_vsoxei16_v_i16m1(__VA_ARGS__)

◆ vsoxei16_v_i16m1_m

#define vsoxei16_v_i16m1_m ( ... ) __riscv_vsoxei16_v_i16m1_m(__VA_ARGS__)

◆ vsoxei16_v_i16m2

#define vsoxei16_v_i16m2 ( ... ) __riscv_vsoxei16_v_i16m2(__VA_ARGS__)

◆ vsoxei16_v_i16m2_m

#define vsoxei16_v_i16m2_m ( ... ) __riscv_vsoxei16_v_i16m2_m(__VA_ARGS__)

◆ vsoxei16_v_i16m4

#define vsoxei16_v_i16m4 ( ... ) __riscv_vsoxei16_v_i16m4(__VA_ARGS__)

◆ vsoxei16_v_i16m4_m

#define vsoxei16_v_i16m4_m ( ... ) __riscv_vsoxei16_v_i16m4_m(__VA_ARGS__)

◆ vsoxei16_v_i16m8

#define vsoxei16_v_i16m8 ( ... ) __riscv_vsoxei16_v_i16m8(__VA_ARGS__)

◆ vsoxei16_v_i16m8_m

#define vsoxei16_v_i16m8_m ( ... ) __riscv_vsoxei16_v_i16m8_m(__VA_ARGS__)

◆ vsoxei16_v_i16mf2

#define vsoxei16_v_i16mf2 ( ... ) __riscv_vsoxei16_v_i16mf2(__VA_ARGS__)

◆ vsoxei16_v_i16mf2_m

#define vsoxei16_v_i16mf2_m ( ... ) __riscv_vsoxei16_v_i16mf2_m(__VA_ARGS__)

◆ vsoxei16_v_i16mf4

#define vsoxei16_v_i16mf4 ( ... ) __riscv_vsoxei16_v_i16mf4(__VA_ARGS__)

◆ vsoxei16_v_i16mf4_m

#define vsoxei16_v_i16mf4_m ( ... ) __riscv_vsoxei16_v_i16mf4_m(__VA_ARGS__)

◆ vsoxei16_v_i32m1

#define vsoxei16_v_i32m1 ( ... ) __riscv_vsoxei16_v_i32m1(__VA_ARGS__)

◆ vsoxei16_v_i32m1_m

#define vsoxei16_v_i32m1_m ( ... ) __riscv_vsoxei16_v_i32m1_m(__VA_ARGS__)

◆ vsoxei16_v_i32m2

#define vsoxei16_v_i32m2 ( ... ) __riscv_vsoxei16_v_i32m2(__VA_ARGS__)

◆ vsoxei16_v_i32m2_m

#define vsoxei16_v_i32m2_m ( ... ) __riscv_vsoxei16_v_i32m2_m(__VA_ARGS__)

◆ vsoxei16_v_i32m4

#define vsoxei16_v_i32m4 ( ... ) __riscv_vsoxei16_v_i32m4(__VA_ARGS__)

◆ vsoxei16_v_i32m4_m

#define vsoxei16_v_i32m4_m ( ... ) __riscv_vsoxei16_v_i32m4_m(__VA_ARGS__)

◆ vsoxei16_v_i32m8

#define vsoxei16_v_i32m8 ( ... ) __riscv_vsoxei16_v_i32m8(__VA_ARGS__)

◆ vsoxei16_v_i32m8_m

#define vsoxei16_v_i32m8_m ( ... ) __riscv_vsoxei16_v_i32m8_m(__VA_ARGS__)

◆ vsoxei16_v_i32mf2

#define vsoxei16_v_i32mf2 ( ... ) __riscv_vsoxei16_v_i32mf2(__VA_ARGS__)

◆ vsoxei16_v_i32mf2_m

#define vsoxei16_v_i32mf2_m ( ... ) __riscv_vsoxei16_v_i32mf2_m(__VA_ARGS__)

◆ vsoxei16_v_i64m1

#define vsoxei16_v_i64m1 ( ... ) __riscv_vsoxei16_v_i64m1(__VA_ARGS__)

◆ vsoxei16_v_i64m1_m

#define vsoxei16_v_i64m1_m ( ... ) __riscv_vsoxei16_v_i64m1_m(__VA_ARGS__)

◆ vsoxei16_v_i64m2

#define vsoxei16_v_i64m2 ( ... ) __riscv_vsoxei16_v_i64m2(__VA_ARGS__)

◆ vsoxei16_v_i64m2_m

#define vsoxei16_v_i64m2_m ( ... ) __riscv_vsoxei16_v_i64m2_m(__VA_ARGS__)

◆ vsoxei16_v_i64m4

#define vsoxei16_v_i64m4 ( ... ) __riscv_vsoxei16_v_i64m4(__VA_ARGS__)

◆ vsoxei16_v_i64m4_m

#define vsoxei16_v_i64m4_m ( ... ) __riscv_vsoxei16_v_i64m4_m(__VA_ARGS__)

◆ vsoxei16_v_i64m8

#define vsoxei16_v_i64m8 ( ... ) __riscv_vsoxei16_v_i64m8(__VA_ARGS__)

◆ vsoxei16_v_i64m8_m

#define vsoxei16_v_i64m8_m ( ... ) __riscv_vsoxei16_v_i64m8_m(__VA_ARGS__)

◆ vsoxei16_v_i8m1

#define vsoxei16_v_i8m1 ( ... ) __riscv_vsoxei16_v_i8m1(__VA_ARGS__)

◆ vsoxei16_v_i8m1_m

#define vsoxei16_v_i8m1_m ( ... ) __riscv_vsoxei16_v_i8m1_m(__VA_ARGS__)

◆ vsoxei16_v_i8m2

#define vsoxei16_v_i8m2 ( ... ) __riscv_vsoxei16_v_i8m2(__VA_ARGS__)

◆ vsoxei16_v_i8m2_m

#define vsoxei16_v_i8m2_m ( ... ) __riscv_vsoxei16_v_i8m2_m(__VA_ARGS__)

◆ vsoxei16_v_i8m4

#define vsoxei16_v_i8m4 ( ... ) __riscv_vsoxei16_v_i8m4(__VA_ARGS__)

◆ vsoxei16_v_i8m4_m

#define vsoxei16_v_i8m4_m ( ... ) __riscv_vsoxei16_v_i8m4_m(__VA_ARGS__)

◆ vsoxei16_v_i8mf2

#define vsoxei16_v_i8mf2 ( ... ) __riscv_vsoxei16_v_i8mf2(__VA_ARGS__)

◆ vsoxei16_v_i8mf2_m

#define vsoxei16_v_i8mf2_m ( ... ) __riscv_vsoxei16_v_i8mf2_m(__VA_ARGS__)

◆ vsoxei16_v_i8mf4

#define vsoxei16_v_i8mf4 ( ... ) __riscv_vsoxei16_v_i8mf4(__VA_ARGS__)

◆ vsoxei16_v_i8mf4_m

#define vsoxei16_v_i8mf4_m ( ... ) __riscv_vsoxei16_v_i8mf4_m(__VA_ARGS__)

◆ vsoxei16_v_i8mf8

#define vsoxei16_v_i8mf8 ( ... ) __riscv_vsoxei16_v_i8mf8(__VA_ARGS__)

◆ vsoxei16_v_i8mf8_m

#define vsoxei16_v_i8mf8_m ( ... ) __riscv_vsoxei16_v_i8mf8_m(__VA_ARGS__)

◆ vsoxei16_v_u16m1

#define vsoxei16_v_u16m1 ( ... ) __riscv_vsoxei16_v_u16m1(__VA_ARGS__)

◆ vsoxei16_v_u16m1_m

#define vsoxei16_v_u16m1_m ( ... ) __riscv_vsoxei16_v_u16m1_m(__VA_ARGS__)

◆ vsoxei16_v_u16m2

#define vsoxei16_v_u16m2 ( ... ) __riscv_vsoxei16_v_u16m2(__VA_ARGS__)

◆ vsoxei16_v_u16m2_m

#define vsoxei16_v_u16m2_m ( ... ) __riscv_vsoxei16_v_u16m2_m(__VA_ARGS__)

◆ vsoxei16_v_u16m4

#define vsoxei16_v_u16m4 ( ... ) __riscv_vsoxei16_v_u16m4(__VA_ARGS__)

◆ vsoxei16_v_u16m4_m

#define vsoxei16_v_u16m4_m ( ... ) __riscv_vsoxei16_v_u16m4_m(__VA_ARGS__)

◆ vsoxei16_v_u16m8

#define vsoxei16_v_u16m8 ( ... ) __riscv_vsoxei16_v_u16m8(__VA_ARGS__)

◆ vsoxei16_v_u16m8_m

#define vsoxei16_v_u16m8_m ( ... ) __riscv_vsoxei16_v_u16m8_m(__VA_ARGS__)

◆ vsoxei16_v_u16mf2

#define vsoxei16_v_u16mf2 ( ... ) __riscv_vsoxei16_v_u16mf2(__VA_ARGS__)

◆ vsoxei16_v_u16mf2_m

#define vsoxei16_v_u16mf2_m ( ... ) __riscv_vsoxei16_v_u16mf2_m(__VA_ARGS__)

◆ vsoxei16_v_u16mf4

#define vsoxei16_v_u16mf4 ( ... ) __riscv_vsoxei16_v_u16mf4(__VA_ARGS__)

◆ vsoxei16_v_u16mf4_m

#define vsoxei16_v_u16mf4_m ( ... ) __riscv_vsoxei16_v_u16mf4_m(__VA_ARGS__)

◆ vsoxei16_v_u32m1

#define vsoxei16_v_u32m1 ( ... ) __riscv_vsoxei16_v_u32m1(__VA_ARGS__)

◆ vsoxei16_v_u32m1_m

#define vsoxei16_v_u32m1_m ( ... ) __riscv_vsoxei16_v_u32m1_m(__VA_ARGS__)

◆ vsoxei16_v_u32m2

#define vsoxei16_v_u32m2 ( ... ) __riscv_vsoxei16_v_u32m2(__VA_ARGS__)

◆ vsoxei16_v_u32m2_m

#define vsoxei16_v_u32m2_m ( ... ) __riscv_vsoxei16_v_u32m2_m(__VA_ARGS__)

◆ vsoxei16_v_u32m4

#define vsoxei16_v_u32m4 ( ... ) __riscv_vsoxei16_v_u32m4(__VA_ARGS__)

◆ vsoxei16_v_u32m4_m

#define vsoxei16_v_u32m4_m ( ... ) __riscv_vsoxei16_v_u32m4_m(__VA_ARGS__)

◆ vsoxei16_v_u32m8

#define vsoxei16_v_u32m8 ( ... ) __riscv_vsoxei16_v_u32m8(__VA_ARGS__)

◆ vsoxei16_v_u32m8_m

#define vsoxei16_v_u32m8_m ( ... ) __riscv_vsoxei16_v_u32m8_m(__VA_ARGS__)

◆ vsoxei16_v_u32mf2

#define vsoxei16_v_u32mf2 ( ... ) __riscv_vsoxei16_v_u32mf2(__VA_ARGS__)

◆ vsoxei16_v_u32mf2_m

#define vsoxei16_v_u32mf2_m ( ... ) __riscv_vsoxei16_v_u32mf2_m(__VA_ARGS__)

◆ vsoxei16_v_u64m1

#define vsoxei16_v_u64m1 ( ... ) __riscv_vsoxei16_v_u64m1(__VA_ARGS__)

◆ vsoxei16_v_u64m1_m

#define vsoxei16_v_u64m1_m ( ... ) __riscv_vsoxei16_v_u64m1_m(__VA_ARGS__)

◆ vsoxei16_v_u64m2

#define vsoxei16_v_u64m2 ( ... ) __riscv_vsoxei16_v_u64m2(__VA_ARGS__)

◆ vsoxei16_v_u64m2_m

#define vsoxei16_v_u64m2_m ( ... ) __riscv_vsoxei16_v_u64m2_m(__VA_ARGS__)

◆ vsoxei16_v_u64m4

#define vsoxei16_v_u64m4 ( ... ) __riscv_vsoxei16_v_u64m4(__VA_ARGS__)

◆ vsoxei16_v_u64m4_m

#define vsoxei16_v_u64m4_m ( ... ) __riscv_vsoxei16_v_u64m4_m(__VA_ARGS__)

◆ vsoxei16_v_u64m8

#define vsoxei16_v_u64m8 ( ... ) __riscv_vsoxei16_v_u64m8(__VA_ARGS__)

◆ vsoxei16_v_u64m8_m

#define vsoxei16_v_u64m8_m ( ... ) __riscv_vsoxei16_v_u64m8_m(__VA_ARGS__)

◆ vsoxei16_v_u8m1

#define vsoxei16_v_u8m1 ( ... ) __riscv_vsoxei16_v_u8m1(__VA_ARGS__)

◆ vsoxei16_v_u8m1_m

#define vsoxei16_v_u8m1_m ( ... ) __riscv_vsoxei16_v_u8m1_m(__VA_ARGS__)

◆ vsoxei16_v_u8m2

#define vsoxei16_v_u8m2 ( ... ) __riscv_vsoxei16_v_u8m2(__VA_ARGS__)

◆ vsoxei16_v_u8m2_m

#define vsoxei16_v_u8m2_m ( ... ) __riscv_vsoxei16_v_u8m2_m(__VA_ARGS__)

◆ vsoxei16_v_u8m4

#define vsoxei16_v_u8m4 ( ... ) __riscv_vsoxei16_v_u8m4(__VA_ARGS__)

◆ vsoxei16_v_u8m4_m

#define vsoxei16_v_u8m4_m ( ... ) __riscv_vsoxei16_v_u8m4_m(__VA_ARGS__)

◆ vsoxei16_v_u8mf2

#define vsoxei16_v_u8mf2 ( ... ) __riscv_vsoxei16_v_u8mf2(__VA_ARGS__)

◆ vsoxei16_v_u8mf2_m

#define vsoxei16_v_u8mf2_m ( ... ) __riscv_vsoxei16_v_u8mf2_m(__VA_ARGS__)

◆ vsoxei16_v_u8mf4

#define vsoxei16_v_u8mf4 ( ... ) __riscv_vsoxei16_v_u8mf4(__VA_ARGS__)

◆ vsoxei16_v_u8mf4_m

#define vsoxei16_v_u8mf4_m ( ... ) __riscv_vsoxei16_v_u8mf4_m(__VA_ARGS__)

◆ vsoxei16_v_u8mf8

#define vsoxei16_v_u8mf8 ( ... ) __riscv_vsoxei16_v_u8mf8(__VA_ARGS__)

◆ vsoxei16_v_u8mf8_m

#define vsoxei16_v_u8mf8_m ( ... ) __riscv_vsoxei16_v_u8mf8_m(__VA_ARGS__)

◆ vsoxei32_v_f16m1

#define vsoxei32_v_f16m1 ( ... ) __riscv_vsoxei32_v_f16m1(__VA_ARGS__)

◆ vsoxei32_v_f16m1_m

#define vsoxei32_v_f16m1_m ( ... ) __riscv_vsoxei32_v_f16m1_m(__VA_ARGS__)

◆ vsoxei32_v_f16m2

#define vsoxei32_v_f16m2 ( ... ) __riscv_vsoxei32_v_f16m2(__VA_ARGS__)

◆ vsoxei32_v_f16m2_m

#define vsoxei32_v_f16m2_m ( ... ) __riscv_vsoxei32_v_f16m2_m(__VA_ARGS__)

◆ vsoxei32_v_f16m4

#define vsoxei32_v_f16m4 ( ... ) __riscv_vsoxei32_v_f16m4(__VA_ARGS__)

◆ vsoxei32_v_f16m4_m

#define vsoxei32_v_f16m4_m ( ... ) __riscv_vsoxei32_v_f16m4_m(__VA_ARGS__)

◆ vsoxei32_v_f16mf2

#define vsoxei32_v_f16mf2 ( ... ) __riscv_vsoxei32_v_f16mf2(__VA_ARGS__)

◆ vsoxei32_v_f16mf2_m

#define vsoxei32_v_f16mf2_m ( ... ) __riscv_vsoxei32_v_f16mf2_m(__VA_ARGS__)

◆ vsoxei32_v_f16mf4

#define vsoxei32_v_f16mf4 ( ... ) __riscv_vsoxei32_v_f16mf4(__VA_ARGS__)

◆ vsoxei32_v_f16mf4_m

#define vsoxei32_v_f16mf4_m ( ... ) __riscv_vsoxei32_v_f16mf4_m(__VA_ARGS__)

◆ vsoxei32_v_f32m1

#define vsoxei32_v_f32m1 ( ... ) __riscv_vsoxei32_v_f32m1(__VA_ARGS__)

◆ vsoxei32_v_f32m1_m

#define vsoxei32_v_f32m1_m ( ... ) __riscv_vsoxei32_v_f32m1_m(__VA_ARGS__)

◆ vsoxei32_v_f32m2

#define vsoxei32_v_f32m2 ( ... ) __riscv_vsoxei32_v_f32m2(__VA_ARGS__)

◆ vsoxei32_v_f32m2_m

#define vsoxei32_v_f32m2_m ( ... ) __riscv_vsoxei32_v_f32m2_m(__VA_ARGS__)

◆ vsoxei32_v_f32m4

#define vsoxei32_v_f32m4 ( ... ) __riscv_vsoxei32_v_f32m4(__VA_ARGS__)

◆ vsoxei32_v_f32m4_m

#define vsoxei32_v_f32m4_m ( ... ) __riscv_vsoxei32_v_f32m4_m(__VA_ARGS__)

◆ vsoxei32_v_f32m8

#define vsoxei32_v_f32m8 ( ... ) __riscv_vsoxei32_v_f32m8(__VA_ARGS__)

◆ vsoxei32_v_f32m8_m

#define vsoxei32_v_f32m8_m ( ... ) __riscv_vsoxei32_v_f32m8_m(__VA_ARGS__)

◆ vsoxei32_v_f32mf2

#define vsoxei32_v_f32mf2 ( ... ) __riscv_vsoxei32_v_f32mf2(__VA_ARGS__)

◆ vsoxei32_v_f32mf2_m

#define vsoxei32_v_f32mf2_m ( ... ) __riscv_vsoxei32_v_f32mf2_m(__VA_ARGS__)

◆ vsoxei32_v_f64m1

#define vsoxei32_v_f64m1 ( ... ) __riscv_vsoxei32_v_f64m1(__VA_ARGS__)

◆ vsoxei32_v_f64m1_m

#define vsoxei32_v_f64m1_m ( ... ) __riscv_vsoxei32_v_f64m1_m(__VA_ARGS__)

◆ vsoxei32_v_f64m2

#define vsoxei32_v_f64m2 ( ... ) __riscv_vsoxei32_v_f64m2(__VA_ARGS__)

◆ vsoxei32_v_f64m2_m

#define vsoxei32_v_f64m2_m ( ... ) __riscv_vsoxei32_v_f64m2_m(__VA_ARGS__)

◆ vsoxei32_v_f64m4

#define vsoxei32_v_f64m4 ( ... ) __riscv_vsoxei32_v_f64m4(__VA_ARGS__)

◆ vsoxei32_v_f64m4_m

#define vsoxei32_v_f64m4_m ( ... ) __riscv_vsoxei32_v_f64m4_m(__VA_ARGS__)

◆ vsoxei32_v_f64m8

#define vsoxei32_v_f64m8 ( ... ) __riscv_vsoxei32_v_f64m8(__VA_ARGS__)

◆ vsoxei32_v_f64m8_m

#define vsoxei32_v_f64m8_m ( ... ) __riscv_vsoxei32_v_f64m8_m(__VA_ARGS__)

◆ vsoxei32_v_i16m1

#define vsoxei32_v_i16m1 ( ... ) __riscv_vsoxei32_v_i16m1(__VA_ARGS__)

◆ vsoxei32_v_i16m1_m

#define vsoxei32_v_i16m1_m ( ... ) __riscv_vsoxei32_v_i16m1_m(__VA_ARGS__)

◆ vsoxei32_v_i16m2

#define vsoxei32_v_i16m2 ( ... ) __riscv_vsoxei32_v_i16m2(__VA_ARGS__)

◆ vsoxei32_v_i16m2_m

#define vsoxei32_v_i16m2_m ( ... ) __riscv_vsoxei32_v_i16m2_m(__VA_ARGS__)

◆ vsoxei32_v_i16m4

#define vsoxei32_v_i16m4 ( ... ) __riscv_vsoxei32_v_i16m4(__VA_ARGS__)

◆ vsoxei32_v_i16m4_m

#define vsoxei32_v_i16m4_m ( ... ) __riscv_vsoxei32_v_i16m4_m(__VA_ARGS__)

◆ vsoxei32_v_i16mf2

#define vsoxei32_v_i16mf2 ( ... ) __riscv_vsoxei32_v_i16mf2(__VA_ARGS__)

◆ vsoxei32_v_i16mf2_m

#define vsoxei32_v_i16mf2_m ( ... ) __riscv_vsoxei32_v_i16mf2_m(__VA_ARGS__)

◆ vsoxei32_v_i16mf4

#define vsoxei32_v_i16mf4 ( ... ) __riscv_vsoxei32_v_i16mf4(__VA_ARGS__)

◆ vsoxei32_v_i16mf4_m

#define vsoxei32_v_i16mf4_m ( ... ) __riscv_vsoxei32_v_i16mf4_m(__VA_ARGS__)

◆ vsoxei32_v_i32m1

#define vsoxei32_v_i32m1 ( ... ) __riscv_vsoxei32_v_i32m1(__VA_ARGS__)

◆ vsoxei32_v_i32m1_m

#define vsoxei32_v_i32m1_m ( ... ) __riscv_vsoxei32_v_i32m1_m(__VA_ARGS__)

◆ vsoxei32_v_i32m2

#define vsoxei32_v_i32m2 ( ... ) __riscv_vsoxei32_v_i32m2(__VA_ARGS__)

◆ vsoxei32_v_i32m2_m

#define vsoxei32_v_i32m2_m ( ... ) __riscv_vsoxei32_v_i32m2_m(__VA_ARGS__)

◆ vsoxei32_v_i32m4

#define vsoxei32_v_i32m4 ( ... ) __riscv_vsoxei32_v_i32m4(__VA_ARGS__)

◆ vsoxei32_v_i32m4_m

#define vsoxei32_v_i32m4_m ( ... ) __riscv_vsoxei32_v_i32m4_m(__VA_ARGS__)

◆ vsoxei32_v_i32m8

#define vsoxei32_v_i32m8 ( ... ) __riscv_vsoxei32_v_i32m8(__VA_ARGS__)

◆ vsoxei32_v_i32m8_m

#define vsoxei32_v_i32m8_m ( ... ) __riscv_vsoxei32_v_i32m8_m(__VA_ARGS__)

◆ vsoxei32_v_i32mf2

#define vsoxei32_v_i32mf2 ( ... ) __riscv_vsoxei32_v_i32mf2(__VA_ARGS__)

◆ vsoxei32_v_i32mf2_m

#define vsoxei32_v_i32mf2_m ( ... ) __riscv_vsoxei32_v_i32mf2_m(__VA_ARGS__)

◆ vsoxei32_v_i64m1

#define vsoxei32_v_i64m1 ( ... ) __riscv_vsoxei32_v_i64m1(__VA_ARGS__)

◆ vsoxei32_v_i64m1_m

#define vsoxei32_v_i64m1_m ( ... ) __riscv_vsoxei32_v_i64m1_m(__VA_ARGS__)

◆ vsoxei32_v_i64m2

#define vsoxei32_v_i64m2 ( ... ) __riscv_vsoxei32_v_i64m2(__VA_ARGS__)

◆ vsoxei32_v_i64m2_m

#define vsoxei32_v_i64m2_m ( ... ) __riscv_vsoxei32_v_i64m2_m(__VA_ARGS__)

◆ vsoxei32_v_i64m4

#define vsoxei32_v_i64m4 ( ... ) __riscv_vsoxei32_v_i64m4(__VA_ARGS__)

◆ vsoxei32_v_i64m4_m

#define vsoxei32_v_i64m4_m ( ... ) __riscv_vsoxei32_v_i64m4_m(__VA_ARGS__)

◆ vsoxei32_v_i64m8

#define vsoxei32_v_i64m8 ( ... ) __riscv_vsoxei32_v_i64m8(__VA_ARGS__)

◆ vsoxei32_v_i64m8_m

#define vsoxei32_v_i64m8_m ( ... ) __riscv_vsoxei32_v_i64m8_m(__VA_ARGS__)

◆ vsoxei32_v_i8m1

#define vsoxei32_v_i8m1 ( ... ) __riscv_vsoxei32_v_i8m1(__VA_ARGS__)

◆ vsoxei32_v_i8m1_m

#define vsoxei32_v_i8m1_m ( ... ) __riscv_vsoxei32_v_i8m1_m(__VA_ARGS__)

◆ vsoxei32_v_i8m2

#define vsoxei32_v_i8m2 ( ... ) __riscv_vsoxei32_v_i8m2(__VA_ARGS__)

◆ vsoxei32_v_i8m2_m

#define vsoxei32_v_i8m2_m ( ... ) __riscv_vsoxei32_v_i8m2_m(__VA_ARGS__)

◆ vsoxei32_v_i8mf2

#define vsoxei32_v_i8mf2 ( ... ) __riscv_vsoxei32_v_i8mf2(__VA_ARGS__)

◆ vsoxei32_v_i8mf2_m

#define vsoxei32_v_i8mf2_m ( ... ) __riscv_vsoxei32_v_i8mf2_m(__VA_ARGS__)

◆ vsoxei32_v_i8mf4

#define vsoxei32_v_i8mf4 ( ... ) __riscv_vsoxei32_v_i8mf4(__VA_ARGS__)

◆ vsoxei32_v_i8mf4_m

#define vsoxei32_v_i8mf4_m ( ... ) __riscv_vsoxei32_v_i8mf4_m(__VA_ARGS__)

◆ vsoxei32_v_i8mf8

#define vsoxei32_v_i8mf8 ( ... ) __riscv_vsoxei32_v_i8mf8(__VA_ARGS__)

◆ vsoxei32_v_i8mf8_m

#define vsoxei32_v_i8mf8_m ( ... ) __riscv_vsoxei32_v_i8mf8_m(__VA_ARGS__)

◆ vsoxei32_v_u16m1

#define vsoxei32_v_u16m1 ( ... ) __riscv_vsoxei32_v_u16m1(__VA_ARGS__)

◆ vsoxei32_v_u16m1_m

#define vsoxei32_v_u16m1_m ( ... ) __riscv_vsoxei32_v_u16m1_m(__VA_ARGS__)

◆ vsoxei32_v_u16m2

#define vsoxei32_v_u16m2 ( ... ) __riscv_vsoxei32_v_u16m2(__VA_ARGS__)

◆ vsoxei32_v_u16m2_m

#define vsoxei32_v_u16m2_m ( ... ) __riscv_vsoxei32_v_u16m2_m(__VA_ARGS__)

◆ vsoxei32_v_u16m4

#define vsoxei32_v_u16m4 ( ... ) __riscv_vsoxei32_v_u16m4(__VA_ARGS__)

◆ vsoxei32_v_u16m4_m

#define vsoxei32_v_u16m4_m ( ... ) __riscv_vsoxei32_v_u16m4_m(__VA_ARGS__)

◆ vsoxei32_v_u16mf2

#define vsoxei32_v_u16mf2 ( ... ) __riscv_vsoxei32_v_u16mf2(__VA_ARGS__)

◆ vsoxei32_v_u16mf2_m

#define vsoxei32_v_u16mf2_m ( ... ) __riscv_vsoxei32_v_u16mf2_m(__VA_ARGS__)

◆ vsoxei32_v_u16mf4

#define vsoxei32_v_u16mf4 ( ... ) __riscv_vsoxei32_v_u16mf4(__VA_ARGS__)

◆ vsoxei32_v_u16mf4_m

#define vsoxei32_v_u16mf4_m ( ... ) __riscv_vsoxei32_v_u16mf4_m(__VA_ARGS__)

◆ vsoxei32_v_u32m1

#define vsoxei32_v_u32m1 ( ... ) __riscv_vsoxei32_v_u32m1(__VA_ARGS__)

◆ vsoxei32_v_u32m1_m

#define vsoxei32_v_u32m1_m ( ... ) __riscv_vsoxei32_v_u32m1_m(__VA_ARGS__)

◆ vsoxei32_v_u32m2

#define vsoxei32_v_u32m2 ( ... ) __riscv_vsoxei32_v_u32m2(__VA_ARGS__)

◆ vsoxei32_v_u32m2_m

#define vsoxei32_v_u32m2_m ( ... ) __riscv_vsoxei32_v_u32m2_m(__VA_ARGS__)

◆ vsoxei32_v_u32m4

#define vsoxei32_v_u32m4 ( ... ) __riscv_vsoxei32_v_u32m4(__VA_ARGS__)

◆ vsoxei32_v_u32m4_m

#define vsoxei32_v_u32m4_m ( ... ) __riscv_vsoxei32_v_u32m4_m(__VA_ARGS__)

◆ vsoxei32_v_u32m8

#define vsoxei32_v_u32m8 ( ... ) __riscv_vsoxei32_v_u32m8(__VA_ARGS__)

◆ vsoxei32_v_u32m8_m

#define vsoxei32_v_u32m8_m ( ... ) __riscv_vsoxei32_v_u32m8_m(__VA_ARGS__)

◆ vsoxei32_v_u32mf2

#define vsoxei32_v_u32mf2 ( ... ) __riscv_vsoxei32_v_u32mf2(__VA_ARGS__)

◆ vsoxei32_v_u32mf2_m

#define vsoxei32_v_u32mf2_m ( ... ) __riscv_vsoxei32_v_u32mf2_m(__VA_ARGS__)

◆ vsoxei32_v_u64m1

#define vsoxei32_v_u64m1 ( ... ) __riscv_vsoxei32_v_u64m1(__VA_ARGS__)

◆ vsoxei32_v_u64m1_m

#define vsoxei32_v_u64m1_m ( ... ) __riscv_vsoxei32_v_u64m1_m(__VA_ARGS__)

◆ vsoxei32_v_u64m2

#define vsoxei32_v_u64m2 ( ... ) __riscv_vsoxei32_v_u64m2(__VA_ARGS__)

◆ vsoxei32_v_u64m2_m

#define vsoxei32_v_u64m2_m ( ... ) __riscv_vsoxei32_v_u64m2_m(__VA_ARGS__)

◆ vsoxei32_v_u64m4

#define vsoxei32_v_u64m4 ( ... ) __riscv_vsoxei32_v_u64m4(__VA_ARGS__)

◆ vsoxei32_v_u64m4_m

#define vsoxei32_v_u64m4_m ( ... ) __riscv_vsoxei32_v_u64m4_m(__VA_ARGS__)

◆ vsoxei32_v_u64m8

#define vsoxei32_v_u64m8 ( ... ) __riscv_vsoxei32_v_u64m8(__VA_ARGS__)

◆ vsoxei32_v_u64m8_m

#define vsoxei32_v_u64m8_m ( ... ) __riscv_vsoxei32_v_u64m8_m(__VA_ARGS__)

◆ vsoxei32_v_u8m1

#define vsoxei32_v_u8m1 ( ... ) __riscv_vsoxei32_v_u8m1(__VA_ARGS__)

◆ vsoxei32_v_u8m1_m

#define vsoxei32_v_u8m1_m ( ... ) __riscv_vsoxei32_v_u8m1_m(__VA_ARGS__)

◆ vsoxei32_v_u8m2

#define vsoxei32_v_u8m2 ( ... ) __riscv_vsoxei32_v_u8m2(__VA_ARGS__)

◆ vsoxei32_v_u8m2_m

#define vsoxei32_v_u8m2_m ( ... ) __riscv_vsoxei32_v_u8m2_m(__VA_ARGS__)

◆ vsoxei32_v_u8mf2

#define vsoxei32_v_u8mf2 ( ... ) __riscv_vsoxei32_v_u8mf2(__VA_ARGS__)

◆ vsoxei32_v_u8mf2_m

#define vsoxei32_v_u8mf2_m ( ... ) __riscv_vsoxei32_v_u8mf2_m(__VA_ARGS__)

◆ vsoxei32_v_u8mf4

#define vsoxei32_v_u8mf4 ( ... ) __riscv_vsoxei32_v_u8mf4(__VA_ARGS__)

◆ vsoxei32_v_u8mf4_m

#define vsoxei32_v_u8mf4_m ( ... ) __riscv_vsoxei32_v_u8mf4_m(__VA_ARGS__)

◆ vsoxei32_v_u8mf8

#define vsoxei32_v_u8mf8 ( ... ) __riscv_vsoxei32_v_u8mf8(__VA_ARGS__)

◆ vsoxei32_v_u8mf8_m

#define vsoxei32_v_u8mf8_m ( ... ) __riscv_vsoxei32_v_u8mf8_m(__VA_ARGS__)

◆ vsoxei64_v_f16m1

#define vsoxei64_v_f16m1 ( ... ) __riscv_vsoxei64_v_f16m1(__VA_ARGS__)

◆ vsoxei64_v_f16m1_m

#define vsoxei64_v_f16m1_m ( ... ) __riscv_vsoxei64_v_f16m1_m(__VA_ARGS__)

◆ vsoxei64_v_f16m2

#define vsoxei64_v_f16m2 ( ... ) __riscv_vsoxei64_v_f16m2(__VA_ARGS__)

◆ vsoxei64_v_f16m2_m

#define vsoxei64_v_f16m2_m ( ... ) __riscv_vsoxei64_v_f16m2_m(__VA_ARGS__)

◆ vsoxei64_v_f16mf2

#define vsoxei64_v_f16mf2 ( ... ) __riscv_vsoxei64_v_f16mf2(__VA_ARGS__)

◆ vsoxei64_v_f16mf2_m

#define vsoxei64_v_f16mf2_m ( ... ) __riscv_vsoxei64_v_f16mf2_m(__VA_ARGS__)

◆ vsoxei64_v_f16mf4

#define vsoxei64_v_f16mf4 ( ... ) __riscv_vsoxei64_v_f16mf4(__VA_ARGS__)

◆ vsoxei64_v_f16mf4_m

#define vsoxei64_v_f16mf4_m ( ... ) __riscv_vsoxei64_v_f16mf4_m(__VA_ARGS__)

◆ vsoxei64_v_f32m1

#define vsoxei64_v_f32m1 ( ... ) __riscv_vsoxei64_v_f32m1(__VA_ARGS__)

◆ vsoxei64_v_f32m1_m

#define vsoxei64_v_f32m1_m ( ... ) __riscv_vsoxei64_v_f32m1_m(__VA_ARGS__)

◆ vsoxei64_v_f32m2

#define vsoxei64_v_f32m2 ( ... ) __riscv_vsoxei64_v_f32m2(__VA_ARGS__)

◆ vsoxei64_v_f32m2_m

#define vsoxei64_v_f32m2_m ( ... ) __riscv_vsoxei64_v_f32m2_m(__VA_ARGS__)

◆ vsoxei64_v_f32m4

#define vsoxei64_v_f32m4 ( ... ) __riscv_vsoxei64_v_f32m4(__VA_ARGS__)

◆ vsoxei64_v_f32m4_m

#define vsoxei64_v_f32m4_m ( ... ) __riscv_vsoxei64_v_f32m4_m(__VA_ARGS__)

◆ vsoxei64_v_f32mf2

#define vsoxei64_v_f32mf2 ( ... ) __riscv_vsoxei64_v_f32mf2(__VA_ARGS__)

◆ vsoxei64_v_f32mf2_m

#define vsoxei64_v_f32mf2_m ( ... ) __riscv_vsoxei64_v_f32mf2_m(__VA_ARGS__)

◆ vsoxei64_v_f64m1

#define vsoxei64_v_f64m1 ( ... ) __riscv_vsoxei64_v_f64m1(__VA_ARGS__)

◆ vsoxei64_v_f64m1_m

#define vsoxei64_v_f64m1_m ( ... ) __riscv_vsoxei64_v_f64m1_m(__VA_ARGS__)

◆ vsoxei64_v_f64m2

#define vsoxei64_v_f64m2 ( ... ) __riscv_vsoxei64_v_f64m2(__VA_ARGS__)

◆ vsoxei64_v_f64m2_m

#define vsoxei64_v_f64m2_m ( ... ) __riscv_vsoxei64_v_f64m2_m(__VA_ARGS__)

◆ vsoxei64_v_f64m4

#define vsoxei64_v_f64m4 ( ... ) __riscv_vsoxei64_v_f64m4(__VA_ARGS__)

◆ vsoxei64_v_f64m4_m

#define vsoxei64_v_f64m4_m ( ... ) __riscv_vsoxei64_v_f64m4_m(__VA_ARGS__)

◆ vsoxei64_v_f64m8

#define vsoxei64_v_f64m8 ( ... ) __riscv_vsoxei64_v_f64m8(__VA_ARGS__)

◆ vsoxei64_v_f64m8_m

#define vsoxei64_v_f64m8_m ( ... ) __riscv_vsoxei64_v_f64m8_m(__VA_ARGS__)

◆ vsoxei64_v_i16m1

#define vsoxei64_v_i16m1 ( ... ) __riscv_vsoxei64_v_i16m1(__VA_ARGS__)

◆ vsoxei64_v_i16m1_m

#define vsoxei64_v_i16m1_m ( ... ) __riscv_vsoxei64_v_i16m1_m(__VA_ARGS__)

◆ vsoxei64_v_i16m2

#define vsoxei64_v_i16m2 ( ... ) __riscv_vsoxei64_v_i16m2(__VA_ARGS__)

◆ vsoxei64_v_i16m2_m

#define vsoxei64_v_i16m2_m ( ... ) __riscv_vsoxei64_v_i16m2_m(__VA_ARGS__)

◆ vsoxei64_v_i16mf2

#define vsoxei64_v_i16mf2 ( ... ) __riscv_vsoxei64_v_i16mf2(__VA_ARGS__)

◆ vsoxei64_v_i16mf2_m

#define vsoxei64_v_i16mf2_m ( ... ) __riscv_vsoxei64_v_i16mf2_m(__VA_ARGS__)

◆ vsoxei64_v_i16mf4

#define vsoxei64_v_i16mf4 ( ... ) __riscv_vsoxei64_v_i16mf4(__VA_ARGS__)

◆ vsoxei64_v_i16mf4_m

#define vsoxei64_v_i16mf4_m ( ... ) __riscv_vsoxei64_v_i16mf4_m(__VA_ARGS__)

◆ vsoxei64_v_i32m1

#define vsoxei64_v_i32m1 ( ... ) __riscv_vsoxei64_v_i32m1(__VA_ARGS__)

◆ vsoxei64_v_i32m1_m

#define vsoxei64_v_i32m1_m ( ... ) __riscv_vsoxei64_v_i32m1_m(__VA_ARGS__)

◆ vsoxei64_v_i32m2

#define vsoxei64_v_i32m2 ( ... ) __riscv_vsoxei64_v_i32m2(__VA_ARGS__)

◆ vsoxei64_v_i32m2_m

#define vsoxei64_v_i32m2_m ( ... ) __riscv_vsoxei64_v_i32m2_m(__VA_ARGS__)

◆ vsoxei64_v_i32m4

#define vsoxei64_v_i32m4 ( ... ) __riscv_vsoxei64_v_i32m4(__VA_ARGS__)

◆ vsoxei64_v_i32m4_m

#define vsoxei64_v_i32m4_m ( ... ) __riscv_vsoxei64_v_i32m4_m(__VA_ARGS__)

◆ vsoxei64_v_i32mf2

#define vsoxei64_v_i32mf2 ( ... ) __riscv_vsoxei64_v_i32mf2(__VA_ARGS__)

◆ vsoxei64_v_i32mf2_m

#define vsoxei64_v_i32mf2_m ( ... ) __riscv_vsoxei64_v_i32mf2_m(__VA_ARGS__)

◆ vsoxei64_v_i64m1

#define vsoxei64_v_i64m1 ( ... ) __riscv_vsoxei64_v_i64m1(__VA_ARGS__)

◆ vsoxei64_v_i64m1_m

#define vsoxei64_v_i64m1_m ( ... ) __riscv_vsoxei64_v_i64m1_m(__VA_ARGS__)

◆ vsoxei64_v_i64m2

#define vsoxei64_v_i64m2 ( ... ) __riscv_vsoxei64_v_i64m2(__VA_ARGS__)

◆ vsoxei64_v_i64m2_m

#define vsoxei64_v_i64m2_m ( ... ) __riscv_vsoxei64_v_i64m2_m(__VA_ARGS__)

◆ vsoxei64_v_i64m4

#define vsoxei64_v_i64m4 ( ... ) __riscv_vsoxei64_v_i64m4(__VA_ARGS__)

◆ vsoxei64_v_i64m4_m

#define vsoxei64_v_i64m4_m ( ... ) __riscv_vsoxei64_v_i64m4_m(__VA_ARGS__)

◆ vsoxei64_v_i64m8

#define vsoxei64_v_i64m8 ( ... ) __riscv_vsoxei64_v_i64m8(__VA_ARGS__)

◆ vsoxei64_v_i64m8_m

#define vsoxei64_v_i64m8_m ( ... ) __riscv_vsoxei64_v_i64m8_m(__VA_ARGS__)

◆ vsoxei64_v_i8m1

#define vsoxei64_v_i8m1 ( ... ) __riscv_vsoxei64_v_i8m1(__VA_ARGS__)

◆ vsoxei64_v_i8m1_m

#define vsoxei64_v_i8m1_m ( ... ) __riscv_vsoxei64_v_i8m1_m(__VA_ARGS__)

◆ vsoxei64_v_i8mf2

#define vsoxei64_v_i8mf2 ( ... ) __riscv_vsoxei64_v_i8mf2(__VA_ARGS__)

◆ vsoxei64_v_i8mf2_m

#define vsoxei64_v_i8mf2_m ( ... ) __riscv_vsoxei64_v_i8mf2_m(__VA_ARGS__)

◆ vsoxei64_v_i8mf4

#define vsoxei64_v_i8mf4 ( ... ) __riscv_vsoxei64_v_i8mf4(__VA_ARGS__)

◆ vsoxei64_v_i8mf4_m

#define vsoxei64_v_i8mf4_m ( ... ) __riscv_vsoxei64_v_i8mf4_m(__VA_ARGS__)

◆ vsoxei64_v_i8mf8

#define vsoxei64_v_i8mf8 ( ... ) __riscv_vsoxei64_v_i8mf8(__VA_ARGS__)

◆ vsoxei64_v_i8mf8_m

#define vsoxei64_v_i8mf8_m ( ... ) __riscv_vsoxei64_v_i8mf8_m(__VA_ARGS__)

◆ vsoxei64_v_u16m1

#define vsoxei64_v_u16m1 ( ... ) __riscv_vsoxei64_v_u16m1(__VA_ARGS__)

◆ vsoxei64_v_u16m1_m

#define vsoxei64_v_u16m1_m ( ... ) __riscv_vsoxei64_v_u16m1_m(__VA_ARGS__)

◆ vsoxei64_v_u16m2

#define vsoxei64_v_u16m2 ( ... ) __riscv_vsoxei64_v_u16m2(__VA_ARGS__)

◆ vsoxei64_v_u16m2_m

#define vsoxei64_v_u16m2_m ( ... ) __riscv_vsoxei64_v_u16m2_m(__VA_ARGS__)

◆ vsoxei64_v_u16mf2

#define vsoxei64_v_u16mf2 ( ... ) __riscv_vsoxei64_v_u16mf2(__VA_ARGS__)

◆ vsoxei64_v_u16mf2_m

#define vsoxei64_v_u16mf2_m ( ... ) __riscv_vsoxei64_v_u16mf2_m(__VA_ARGS__)

◆ vsoxei64_v_u16mf4

#define vsoxei64_v_u16mf4 ( ... ) __riscv_vsoxei64_v_u16mf4(__VA_ARGS__)

◆ vsoxei64_v_u16mf4_m

#define vsoxei64_v_u16mf4_m ( ... ) __riscv_vsoxei64_v_u16mf4_m(__VA_ARGS__)

◆ vsoxei64_v_u32m1

#define vsoxei64_v_u32m1 ( ... ) __riscv_vsoxei64_v_u32m1(__VA_ARGS__)

◆ vsoxei64_v_u32m1_m

#define vsoxei64_v_u32m1_m ( ... ) __riscv_vsoxei64_v_u32m1_m(__VA_ARGS__)

◆ vsoxei64_v_u32m2

#define vsoxei64_v_u32m2 ( ... ) __riscv_vsoxei64_v_u32m2(__VA_ARGS__)

◆ vsoxei64_v_u32m2_m

#define vsoxei64_v_u32m2_m ( ... ) __riscv_vsoxei64_v_u32m2_m(__VA_ARGS__)

◆ vsoxei64_v_u32m4

#define vsoxei64_v_u32m4 ( ... ) __riscv_vsoxei64_v_u32m4(__VA_ARGS__)

◆ vsoxei64_v_u32m4_m

#define vsoxei64_v_u32m4_m ( ... ) __riscv_vsoxei64_v_u32m4_m(__VA_ARGS__)

◆ vsoxei64_v_u32mf2

#define vsoxei64_v_u32mf2 ( ... ) __riscv_vsoxei64_v_u32mf2(__VA_ARGS__)

◆ vsoxei64_v_u32mf2_m

#define vsoxei64_v_u32mf2_m ( ... ) __riscv_vsoxei64_v_u32mf2_m(__VA_ARGS__)

◆ vsoxei64_v_u64m1

#define vsoxei64_v_u64m1 ( ... ) __riscv_vsoxei64_v_u64m1(__VA_ARGS__)

◆ vsoxei64_v_u64m1_m

#define vsoxei64_v_u64m1_m ( ... ) __riscv_vsoxei64_v_u64m1_m(__VA_ARGS__)

◆ vsoxei64_v_u64m2

#define vsoxei64_v_u64m2 ( ... ) __riscv_vsoxei64_v_u64m2(__VA_ARGS__)

◆ vsoxei64_v_u64m2_m

#define vsoxei64_v_u64m2_m ( ... ) __riscv_vsoxei64_v_u64m2_m(__VA_ARGS__)

◆ vsoxei64_v_u64m4

#define vsoxei64_v_u64m4 ( ... ) __riscv_vsoxei64_v_u64m4(__VA_ARGS__)

◆ vsoxei64_v_u64m4_m

#define vsoxei64_v_u64m4_m ( ... ) __riscv_vsoxei64_v_u64m4_m(__VA_ARGS__)

◆ vsoxei64_v_u64m8

#define vsoxei64_v_u64m8 ( ... ) __riscv_vsoxei64_v_u64m8(__VA_ARGS__)

◆ vsoxei64_v_u64m8_m

#define vsoxei64_v_u64m8_m ( ... ) __riscv_vsoxei64_v_u64m8_m(__VA_ARGS__)

◆ vsoxei64_v_u8m1

#define vsoxei64_v_u8m1 ( ... ) __riscv_vsoxei64_v_u8m1(__VA_ARGS__)

◆ vsoxei64_v_u8m1_m

#define vsoxei64_v_u8m1_m ( ... ) __riscv_vsoxei64_v_u8m1_m(__VA_ARGS__)

◆ vsoxei64_v_u8mf2

#define vsoxei64_v_u8mf2 ( ... ) __riscv_vsoxei64_v_u8mf2(__VA_ARGS__)

◆ vsoxei64_v_u8mf2_m

#define vsoxei64_v_u8mf2_m ( ... ) __riscv_vsoxei64_v_u8mf2_m(__VA_ARGS__)

◆ vsoxei64_v_u8mf4

#define vsoxei64_v_u8mf4 ( ... ) __riscv_vsoxei64_v_u8mf4(__VA_ARGS__)

◆ vsoxei64_v_u8mf4_m

#define vsoxei64_v_u8mf4_m ( ... ) __riscv_vsoxei64_v_u8mf4_m(__VA_ARGS__)

◆ vsoxei64_v_u8mf8

#define vsoxei64_v_u8mf8 ( ... ) __riscv_vsoxei64_v_u8mf8(__VA_ARGS__)

◆ vsoxei64_v_u8mf8_m

#define vsoxei64_v_u8mf8_m ( ... ) __riscv_vsoxei64_v_u8mf8_m(__VA_ARGS__)

◆ vsoxei8_v_f16m1

#define vsoxei8_v_f16m1 ( ... ) __riscv_vsoxei8_v_f16m1(__VA_ARGS__)

◆ vsoxei8_v_f16m1_m

#define vsoxei8_v_f16m1_m ( ... ) __riscv_vsoxei8_v_f16m1_m(__VA_ARGS__)

◆ vsoxei8_v_f16m2

#define vsoxei8_v_f16m2 ( ... ) __riscv_vsoxei8_v_f16m2(__VA_ARGS__)

◆ vsoxei8_v_f16m2_m

#define vsoxei8_v_f16m2_m ( ... ) __riscv_vsoxei8_v_f16m2_m(__VA_ARGS__)

◆ vsoxei8_v_f16m4

#define vsoxei8_v_f16m4 ( ... ) __riscv_vsoxei8_v_f16m4(__VA_ARGS__)

◆ vsoxei8_v_f16m4_m

#define vsoxei8_v_f16m4_m ( ... ) __riscv_vsoxei8_v_f16m4_m(__VA_ARGS__)

◆ vsoxei8_v_f16m8

#define vsoxei8_v_f16m8 ( ... ) __riscv_vsoxei8_v_f16m8(__VA_ARGS__)

◆ vsoxei8_v_f16m8_m

#define vsoxei8_v_f16m8_m ( ... ) __riscv_vsoxei8_v_f16m8_m(__VA_ARGS__)

◆ vsoxei8_v_f16mf2

#define vsoxei8_v_f16mf2 ( ... ) __riscv_vsoxei8_v_f16mf2(__VA_ARGS__)

◆ vsoxei8_v_f16mf2_m

#define vsoxei8_v_f16mf2_m ( ... ) __riscv_vsoxei8_v_f16mf2_m(__VA_ARGS__)

◆ vsoxei8_v_f16mf4

#define vsoxei8_v_f16mf4 ( ... ) __riscv_vsoxei8_v_f16mf4(__VA_ARGS__)

◆ vsoxei8_v_f16mf4_m

#define vsoxei8_v_f16mf4_m ( ... ) __riscv_vsoxei8_v_f16mf4_m(__VA_ARGS__)

◆ vsoxei8_v_f32m1

#define vsoxei8_v_f32m1 ( ... ) __riscv_vsoxei8_v_f32m1(__VA_ARGS__)

◆ vsoxei8_v_f32m1_m

#define vsoxei8_v_f32m1_m ( ... ) __riscv_vsoxei8_v_f32m1_m(__VA_ARGS__)

◆ vsoxei8_v_f32m2

#define vsoxei8_v_f32m2 ( ... ) __riscv_vsoxei8_v_f32m2(__VA_ARGS__)

◆ vsoxei8_v_f32m2_m

#define vsoxei8_v_f32m2_m ( ... ) __riscv_vsoxei8_v_f32m2_m(__VA_ARGS__)

◆ vsoxei8_v_f32m4

#define vsoxei8_v_f32m4 ( ... ) __riscv_vsoxei8_v_f32m4(__VA_ARGS__)

◆ vsoxei8_v_f32m4_m

#define vsoxei8_v_f32m4_m ( ... ) __riscv_vsoxei8_v_f32m4_m(__VA_ARGS__)

◆ vsoxei8_v_f32m8

#define vsoxei8_v_f32m8 ( ... ) __riscv_vsoxei8_v_f32m8(__VA_ARGS__)

◆ vsoxei8_v_f32m8_m

#define vsoxei8_v_f32m8_m ( ... ) __riscv_vsoxei8_v_f32m8_m(__VA_ARGS__)

◆ vsoxei8_v_f32mf2

#define vsoxei8_v_f32mf2 ( ... ) __riscv_vsoxei8_v_f32mf2(__VA_ARGS__)

◆ vsoxei8_v_f32mf2_m

#define vsoxei8_v_f32mf2_m ( ... ) __riscv_vsoxei8_v_f32mf2_m(__VA_ARGS__)

◆ vsoxei8_v_f64m1

#define vsoxei8_v_f64m1 ( ... ) __riscv_vsoxei8_v_f64m1(__VA_ARGS__)

◆ vsoxei8_v_f64m1_m

#define vsoxei8_v_f64m1_m ( ... ) __riscv_vsoxei8_v_f64m1_m(__VA_ARGS__)

◆ vsoxei8_v_f64m2

#define vsoxei8_v_f64m2 ( ... ) __riscv_vsoxei8_v_f64m2(__VA_ARGS__)

◆ vsoxei8_v_f64m2_m

#define vsoxei8_v_f64m2_m ( ... ) __riscv_vsoxei8_v_f64m2_m(__VA_ARGS__)

◆ vsoxei8_v_f64m4

#define vsoxei8_v_f64m4 ( ... ) __riscv_vsoxei8_v_f64m4(__VA_ARGS__)

◆ vsoxei8_v_f64m4_m

#define vsoxei8_v_f64m4_m ( ... ) __riscv_vsoxei8_v_f64m4_m(__VA_ARGS__)

◆ vsoxei8_v_f64m8

#define vsoxei8_v_f64m8 ( ... ) __riscv_vsoxei8_v_f64m8(__VA_ARGS__)

◆ vsoxei8_v_f64m8_m

#define vsoxei8_v_f64m8_m ( ... ) __riscv_vsoxei8_v_f64m8_m(__VA_ARGS__)

◆ vsoxei8_v_i16m1

#define vsoxei8_v_i16m1 ( ... ) __riscv_vsoxei8_v_i16m1(__VA_ARGS__)

◆ vsoxei8_v_i16m1_m

#define vsoxei8_v_i16m1_m ( ... ) __riscv_vsoxei8_v_i16m1_m(__VA_ARGS__)

◆ vsoxei8_v_i16m2

#define vsoxei8_v_i16m2 ( ... ) __riscv_vsoxei8_v_i16m2(__VA_ARGS__)

◆ vsoxei8_v_i16m2_m

#define vsoxei8_v_i16m2_m ( ... ) __riscv_vsoxei8_v_i16m2_m(__VA_ARGS__)

◆ vsoxei8_v_i16m4

#define vsoxei8_v_i16m4 ( ... ) __riscv_vsoxei8_v_i16m4(__VA_ARGS__)

◆ vsoxei8_v_i16m4_m

#define vsoxei8_v_i16m4_m ( ... ) __riscv_vsoxei8_v_i16m4_m(__VA_ARGS__)

◆ vsoxei8_v_i16m8

#define vsoxei8_v_i16m8 ( ... ) __riscv_vsoxei8_v_i16m8(__VA_ARGS__)

◆ vsoxei8_v_i16m8_m

#define vsoxei8_v_i16m8_m ( ... ) __riscv_vsoxei8_v_i16m8_m(__VA_ARGS__)

◆ vsoxei8_v_i16mf2

#define vsoxei8_v_i16mf2 ( ... ) __riscv_vsoxei8_v_i16mf2(__VA_ARGS__)

◆ vsoxei8_v_i16mf2_m

#define vsoxei8_v_i16mf2_m ( ... ) __riscv_vsoxei8_v_i16mf2_m(__VA_ARGS__)

◆ vsoxei8_v_i16mf4

#define vsoxei8_v_i16mf4 ( ... ) __riscv_vsoxei8_v_i16mf4(__VA_ARGS__)

◆ vsoxei8_v_i16mf4_m

#define vsoxei8_v_i16mf4_m ( ... ) __riscv_vsoxei8_v_i16mf4_m(__VA_ARGS__)

◆ vsoxei8_v_i32m1

#define vsoxei8_v_i32m1 ( ... ) __riscv_vsoxei8_v_i32m1(__VA_ARGS__)

◆ vsoxei8_v_i32m1_m

#define vsoxei8_v_i32m1_m ( ... ) __riscv_vsoxei8_v_i32m1_m(__VA_ARGS__)

◆ vsoxei8_v_i32m2

#define vsoxei8_v_i32m2 ( ... ) __riscv_vsoxei8_v_i32m2(__VA_ARGS__)

◆ vsoxei8_v_i32m2_m

#define vsoxei8_v_i32m2_m ( ... ) __riscv_vsoxei8_v_i32m2_m(__VA_ARGS__)

◆ vsoxei8_v_i32m4

#define vsoxei8_v_i32m4 ( ... ) __riscv_vsoxei8_v_i32m4(__VA_ARGS__)

◆ vsoxei8_v_i32m4_m

#define vsoxei8_v_i32m4_m ( ... ) __riscv_vsoxei8_v_i32m4_m(__VA_ARGS__)

◆ vsoxei8_v_i32m8

#define vsoxei8_v_i32m8 ( ... ) __riscv_vsoxei8_v_i32m8(__VA_ARGS__)

◆ vsoxei8_v_i32m8_m

#define vsoxei8_v_i32m8_m ( ... ) __riscv_vsoxei8_v_i32m8_m(__VA_ARGS__)

◆ vsoxei8_v_i32mf2

#define vsoxei8_v_i32mf2 ( ... ) __riscv_vsoxei8_v_i32mf2(__VA_ARGS__)

◆ vsoxei8_v_i32mf2_m

#define vsoxei8_v_i32mf2_m ( ... ) __riscv_vsoxei8_v_i32mf2_m(__VA_ARGS__)

◆ vsoxei8_v_i64m1

#define vsoxei8_v_i64m1 ( ... ) __riscv_vsoxei8_v_i64m1(__VA_ARGS__)

◆ vsoxei8_v_i64m1_m

#define vsoxei8_v_i64m1_m ( ... ) __riscv_vsoxei8_v_i64m1_m(__VA_ARGS__)

◆ vsoxei8_v_i64m2

#define vsoxei8_v_i64m2 ( ... ) __riscv_vsoxei8_v_i64m2(__VA_ARGS__)

◆ vsoxei8_v_i64m2_m

#define vsoxei8_v_i64m2_m ( ... ) __riscv_vsoxei8_v_i64m2_m(__VA_ARGS__)

◆ vsoxei8_v_i64m4

#define vsoxei8_v_i64m4 ( ... ) __riscv_vsoxei8_v_i64m4(__VA_ARGS__)

◆ vsoxei8_v_i64m4_m

#define vsoxei8_v_i64m4_m ( ... ) __riscv_vsoxei8_v_i64m4_m(__VA_ARGS__)

◆ vsoxei8_v_i64m8

#define vsoxei8_v_i64m8 ( ... ) __riscv_vsoxei8_v_i64m8(__VA_ARGS__)

◆ vsoxei8_v_i64m8_m

#define vsoxei8_v_i64m8_m ( ... ) __riscv_vsoxei8_v_i64m8_m(__VA_ARGS__)

◆ vsoxei8_v_i8m1

#define vsoxei8_v_i8m1 ( ... ) __riscv_vsoxei8_v_i8m1(__VA_ARGS__)

◆ vsoxei8_v_i8m1_m

#define vsoxei8_v_i8m1_m ( ... ) __riscv_vsoxei8_v_i8m1_m(__VA_ARGS__)

◆ vsoxei8_v_i8m2

#define vsoxei8_v_i8m2 ( ... ) __riscv_vsoxei8_v_i8m2(__VA_ARGS__)

◆ vsoxei8_v_i8m2_m

#define vsoxei8_v_i8m2_m ( ... ) __riscv_vsoxei8_v_i8m2_m(__VA_ARGS__)

◆ vsoxei8_v_i8m4

#define vsoxei8_v_i8m4 ( ... ) __riscv_vsoxei8_v_i8m4(__VA_ARGS__)

◆ vsoxei8_v_i8m4_m

#define vsoxei8_v_i8m4_m ( ... ) __riscv_vsoxei8_v_i8m4_m(__VA_ARGS__)

◆ vsoxei8_v_i8m8

#define vsoxei8_v_i8m8 ( ... ) __riscv_vsoxei8_v_i8m8(__VA_ARGS__)

◆ vsoxei8_v_i8m8_m

#define vsoxei8_v_i8m8_m ( ... ) __riscv_vsoxei8_v_i8m8_m(__VA_ARGS__)

◆ vsoxei8_v_i8mf2

#define vsoxei8_v_i8mf2 ( ... ) __riscv_vsoxei8_v_i8mf2(__VA_ARGS__)

◆ vsoxei8_v_i8mf2_m

#define vsoxei8_v_i8mf2_m ( ... ) __riscv_vsoxei8_v_i8mf2_m(__VA_ARGS__)

◆ vsoxei8_v_i8mf4

#define vsoxei8_v_i8mf4 ( ... ) __riscv_vsoxei8_v_i8mf4(__VA_ARGS__)

◆ vsoxei8_v_i8mf4_m

#define vsoxei8_v_i8mf4_m ( ... ) __riscv_vsoxei8_v_i8mf4_m(__VA_ARGS__)

◆ vsoxei8_v_i8mf8

#define vsoxei8_v_i8mf8 ( ... ) __riscv_vsoxei8_v_i8mf8(__VA_ARGS__)

◆ vsoxei8_v_i8mf8_m

#define vsoxei8_v_i8mf8_m ( ... ) __riscv_vsoxei8_v_i8mf8_m(__VA_ARGS__)

◆ vsoxei8_v_u16m1

#define vsoxei8_v_u16m1 ( ... ) __riscv_vsoxei8_v_u16m1(__VA_ARGS__)

◆ vsoxei8_v_u16m1_m

#define vsoxei8_v_u16m1_m ( ... ) __riscv_vsoxei8_v_u16m1_m(__VA_ARGS__)

◆ vsoxei8_v_u16m2

#define vsoxei8_v_u16m2 ( ... ) __riscv_vsoxei8_v_u16m2(__VA_ARGS__)

◆ vsoxei8_v_u16m2_m

#define vsoxei8_v_u16m2_m ( ... ) __riscv_vsoxei8_v_u16m2_m(__VA_ARGS__)

◆ vsoxei8_v_u16m4

#define vsoxei8_v_u16m4 ( ... ) __riscv_vsoxei8_v_u16m4(__VA_ARGS__)

◆ vsoxei8_v_u16m4_m

#define vsoxei8_v_u16m4_m ( ... ) __riscv_vsoxei8_v_u16m4_m(__VA_ARGS__)

◆ vsoxei8_v_u16m8

#define vsoxei8_v_u16m8 ( ... ) __riscv_vsoxei8_v_u16m8(__VA_ARGS__)

◆ vsoxei8_v_u16m8_m

#define vsoxei8_v_u16m8_m ( ... ) __riscv_vsoxei8_v_u16m8_m(__VA_ARGS__)

◆ vsoxei8_v_u16mf2

#define vsoxei8_v_u16mf2 ( ... ) __riscv_vsoxei8_v_u16mf2(__VA_ARGS__)

◆ vsoxei8_v_u16mf2_m

#define vsoxei8_v_u16mf2_m ( ... ) __riscv_vsoxei8_v_u16mf2_m(__VA_ARGS__)

◆ vsoxei8_v_u16mf4

#define vsoxei8_v_u16mf4 ( ... ) __riscv_vsoxei8_v_u16mf4(__VA_ARGS__)

◆ vsoxei8_v_u16mf4_m

#define vsoxei8_v_u16mf4_m ( ... ) __riscv_vsoxei8_v_u16mf4_m(__VA_ARGS__)

◆ vsoxei8_v_u32m1

#define vsoxei8_v_u32m1 ( ... ) __riscv_vsoxei8_v_u32m1(__VA_ARGS__)

◆ vsoxei8_v_u32m1_m

#define vsoxei8_v_u32m1_m ( ... ) __riscv_vsoxei8_v_u32m1_m(__VA_ARGS__)

◆ vsoxei8_v_u32m2

#define vsoxei8_v_u32m2 ( ... ) __riscv_vsoxei8_v_u32m2(__VA_ARGS__)

◆ vsoxei8_v_u32m2_m

#define vsoxei8_v_u32m2_m ( ... ) __riscv_vsoxei8_v_u32m2_m(__VA_ARGS__)

◆ vsoxei8_v_u32m4

#define vsoxei8_v_u32m4 ( ... ) __riscv_vsoxei8_v_u32m4(__VA_ARGS__)

◆ vsoxei8_v_u32m4_m

#define vsoxei8_v_u32m4_m ( ... ) __riscv_vsoxei8_v_u32m4_m(__VA_ARGS__)

◆ vsoxei8_v_u32m8

#define vsoxei8_v_u32m8 ( ... ) __riscv_vsoxei8_v_u32m8(__VA_ARGS__)

◆ vsoxei8_v_u32m8_m

#define vsoxei8_v_u32m8_m ( ... ) __riscv_vsoxei8_v_u32m8_m(__VA_ARGS__)

◆ vsoxei8_v_u32mf2

#define vsoxei8_v_u32mf2 ( ... ) __riscv_vsoxei8_v_u32mf2(__VA_ARGS__)

◆ vsoxei8_v_u32mf2_m

#define vsoxei8_v_u32mf2_m ( ... ) __riscv_vsoxei8_v_u32mf2_m(__VA_ARGS__)

◆ vsoxei8_v_u64m1

#define vsoxei8_v_u64m1 ( ... ) __riscv_vsoxei8_v_u64m1(__VA_ARGS__)

◆ vsoxei8_v_u64m1_m

#define vsoxei8_v_u64m1_m ( ... ) __riscv_vsoxei8_v_u64m1_m(__VA_ARGS__)

◆ vsoxei8_v_u64m2

#define vsoxei8_v_u64m2 ( ... ) __riscv_vsoxei8_v_u64m2(__VA_ARGS__)

◆ vsoxei8_v_u64m2_m

#define vsoxei8_v_u64m2_m ( ... ) __riscv_vsoxei8_v_u64m2_m(__VA_ARGS__)

◆ vsoxei8_v_u64m4

#define vsoxei8_v_u64m4 ( ... ) __riscv_vsoxei8_v_u64m4(__VA_ARGS__)

◆ vsoxei8_v_u64m4_m

#define vsoxei8_v_u64m4_m ( ... ) __riscv_vsoxei8_v_u64m4_m(__VA_ARGS__)

◆ vsoxei8_v_u64m8

#define vsoxei8_v_u64m8 ( ... ) __riscv_vsoxei8_v_u64m8(__VA_ARGS__)

◆ vsoxei8_v_u64m8_m

#define vsoxei8_v_u64m8_m ( ... ) __riscv_vsoxei8_v_u64m8_m(__VA_ARGS__)

◆ vsoxei8_v_u8m1

#define vsoxei8_v_u8m1 ( ... ) __riscv_vsoxei8_v_u8m1(__VA_ARGS__)

◆ vsoxei8_v_u8m1_m

#define vsoxei8_v_u8m1_m ( ... ) __riscv_vsoxei8_v_u8m1_m(__VA_ARGS__)

◆ vsoxei8_v_u8m2

#define vsoxei8_v_u8m2 ( ... ) __riscv_vsoxei8_v_u8m2(__VA_ARGS__)

◆ vsoxei8_v_u8m2_m

#define vsoxei8_v_u8m2_m ( ... ) __riscv_vsoxei8_v_u8m2_m(__VA_ARGS__)

◆ vsoxei8_v_u8m4

#define vsoxei8_v_u8m4 ( ... ) __riscv_vsoxei8_v_u8m4(__VA_ARGS__)

◆ vsoxei8_v_u8m4_m

#define vsoxei8_v_u8m4_m ( ... ) __riscv_vsoxei8_v_u8m4_m(__VA_ARGS__)

◆ vsoxei8_v_u8m8

#define vsoxei8_v_u8m8 ( ... ) __riscv_vsoxei8_v_u8m8(__VA_ARGS__)

◆ vsoxei8_v_u8m8_m

#define vsoxei8_v_u8m8_m ( ... ) __riscv_vsoxei8_v_u8m8_m(__VA_ARGS__)

◆ vsoxei8_v_u8mf2

#define vsoxei8_v_u8mf2 ( ... ) __riscv_vsoxei8_v_u8mf2(__VA_ARGS__)

◆ vsoxei8_v_u8mf2_m

#define vsoxei8_v_u8mf2_m ( ... ) __riscv_vsoxei8_v_u8mf2_m(__VA_ARGS__)

◆ vsoxei8_v_u8mf4

#define vsoxei8_v_u8mf4 ( ... ) __riscv_vsoxei8_v_u8mf4(__VA_ARGS__)

◆ vsoxei8_v_u8mf4_m

#define vsoxei8_v_u8mf4_m ( ... ) __riscv_vsoxei8_v_u8mf4_m(__VA_ARGS__)

◆ vsoxei8_v_u8mf8

#define vsoxei8_v_u8mf8 ( ... ) __riscv_vsoxei8_v_u8mf8(__VA_ARGS__)

◆ vsoxei8_v_u8mf8_m

#define vsoxei8_v_u8mf8_m ( ... ) __riscv_vsoxei8_v_u8mf8_m(__VA_ARGS__)

◆ vsoxseg2ei16_v_f16m1

#define vsoxseg2ei16_v_f16m1 ( ... ) __riscv_vsoxseg2ei16_v_f16m1(__VA_ARGS__)

◆ vsoxseg2ei16_v_f16m1_m

#define vsoxseg2ei16_v_f16m1_m ( ... ) __riscv_vsoxseg2ei16_v_f16m1_m(__VA_ARGS__)

◆ vsoxseg2ei16_v_f16m2

#define vsoxseg2ei16_v_f16m2 ( ... ) __riscv_vsoxseg2ei16_v_f16m2(__VA_ARGS__)

◆ vsoxseg2ei16_v_f16m2_m

#define vsoxseg2ei16_v_f16m2_m ( ... ) __riscv_vsoxseg2ei16_v_f16m2_m(__VA_ARGS__)

◆ vsoxseg2ei16_v_f16m4

#define vsoxseg2ei16_v_f16m4 ( ... ) __riscv_vsoxseg2ei16_v_f16m4(__VA_ARGS__)

◆ vsoxseg2ei16_v_f16m4_m

#define vsoxseg2ei16_v_f16m4_m ( ... ) __riscv_vsoxseg2ei16_v_f16m4_m(__VA_ARGS__)

◆ vsoxseg2ei16_v_f16mf2

#define vsoxseg2ei16_v_f16mf2 ( ... ) __riscv_vsoxseg2ei16_v_f16mf2(__VA_ARGS__)

◆ vsoxseg2ei16_v_f16mf2_m

#define vsoxseg2ei16_v_f16mf2_m ( ... ) __riscv_vsoxseg2ei16_v_f16mf2_m(__VA_ARGS__)

◆ vsoxseg2ei16_v_f16mf4

#define vsoxseg2ei16_v_f16mf4 ( ... ) __riscv_vsoxseg2ei16_v_f16mf4(__VA_ARGS__)

◆ vsoxseg2ei16_v_f16mf4_m

#define vsoxseg2ei16_v_f16mf4_m ( ... ) __riscv_vsoxseg2ei16_v_f16mf4_m(__VA_ARGS__)

◆ vsoxseg2ei16_v_f32m1

#define vsoxseg2ei16_v_f32m1 ( ... ) __riscv_vsoxseg2ei16_v_f32m1(__VA_ARGS__)

◆ vsoxseg2ei16_v_f32m1_m

#define vsoxseg2ei16_v_f32m1_m ( ... ) __riscv_vsoxseg2ei16_v_f32m1_m(__VA_ARGS__)

◆ vsoxseg2ei16_v_f32m2

#define vsoxseg2ei16_v_f32m2 ( ... ) __riscv_vsoxseg2ei16_v_f32m2(__VA_ARGS__)

◆ vsoxseg2ei16_v_f32m2_m

#define vsoxseg2ei16_v_f32m2_m ( ... ) __riscv_vsoxseg2ei16_v_f32m2_m(__VA_ARGS__)

◆ vsoxseg2ei16_v_f32m4

#define vsoxseg2ei16_v_f32m4 ( ... ) __riscv_vsoxseg2ei16_v_f32m4(__VA_ARGS__)

◆ vsoxseg2ei16_v_f32m4_m

#define vsoxseg2ei16_v_f32m4_m ( ... ) __riscv_vsoxseg2ei16_v_f32m4_m(__VA_ARGS__)

◆ vsoxseg2ei16_v_f32mf2

#define vsoxseg2ei16_v_f32mf2 ( ... ) __riscv_vsoxseg2ei16_v_f32mf2(__VA_ARGS__)

◆ vsoxseg2ei16_v_f32mf2_m

#define vsoxseg2ei16_v_f32mf2_m ( ... ) __riscv_vsoxseg2ei16_v_f32mf2_m(__VA_ARGS__)

◆ vsoxseg2ei16_v_f64m1

#define vsoxseg2ei16_v_f64m1 ( ... ) __riscv_vsoxseg2ei16_v_f64m1(__VA_ARGS__)

◆ vsoxseg2ei16_v_f64m1_m

#define vsoxseg2ei16_v_f64m1_m ( ... ) __riscv_vsoxseg2ei16_v_f64m1_m(__VA_ARGS__)

◆ vsoxseg2ei16_v_f64m2

#define vsoxseg2ei16_v_f64m2 ( ... ) __riscv_vsoxseg2ei16_v_f64m2(__VA_ARGS__)

◆ vsoxseg2ei16_v_f64m2_m

#define vsoxseg2ei16_v_f64m2_m ( ... ) __riscv_vsoxseg2ei16_v_f64m2_m(__VA_ARGS__)

◆ vsoxseg2ei16_v_f64m4

#define vsoxseg2ei16_v_f64m4 ( ... ) __riscv_vsoxseg2ei16_v_f64m4(__VA_ARGS__)

◆ vsoxseg2ei16_v_f64m4_m

#define vsoxseg2ei16_v_f64m4_m ( ... ) __riscv_vsoxseg2ei16_v_f64m4_m(__VA_ARGS__)

◆ vsoxseg2ei16_v_i16m1

#define vsoxseg2ei16_v_i16m1 ( ... ) __riscv_vsoxseg2ei16_v_i16m1(__VA_ARGS__)

◆ vsoxseg2ei16_v_i16m1_m

#define vsoxseg2ei16_v_i16m1_m ( ... ) __riscv_vsoxseg2ei16_v_i16m1_m(__VA_ARGS__)

◆ vsoxseg2ei16_v_i16m2

#define vsoxseg2ei16_v_i16m2 ( ... ) __riscv_vsoxseg2ei16_v_i16m2(__VA_ARGS__)

◆ vsoxseg2ei16_v_i16m2_m

#define vsoxseg2ei16_v_i16m2_m ( ... ) __riscv_vsoxseg2ei16_v_i16m2_m(__VA_ARGS__)

◆ vsoxseg2ei16_v_i16m4

#define vsoxseg2ei16_v_i16m4 ( ... ) __riscv_vsoxseg2ei16_v_i16m4(__VA_ARGS__)

◆ vsoxseg2ei16_v_i16m4_m

#define vsoxseg2ei16_v_i16m4_m ( ... ) __riscv_vsoxseg2ei16_v_i16m4_m(__VA_ARGS__)

◆ vsoxseg2ei16_v_i16mf2

#define vsoxseg2ei16_v_i16mf2 ( ... ) __riscv_vsoxseg2ei16_v_i16mf2(__VA_ARGS__)

◆ vsoxseg2ei16_v_i16mf2_m

#define vsoxseg2ei16_v_i16mf2_m ( ... ) __riscv_vsoxseg2ei16_v_i16mf2_m(__VA_ARGS__)

◆ vsoxseg2ei16_v_i16mf4

#define vsoxseg2ei16_v_i16mf4 ( ... ) __riscv_vsoxseg2ei16_v_i16mf4(__VA_ARGS__)

◆ vsoxseg2ei16_v_i16mf4_m

#define vsoxseg2ei16_v_i16mf4_m ( ... ) __riscv_vsoxseg2ei16_v_i16mf4_m(__VA_ARGS__)

◆ vsoxseg2ei16_v_i32m1

#define vsoxseg2ei16_v_i32m1 ( ... ) __riscv_vsoxseg2ei16_v_i32m1(__VA_ARGS__)

◆ vsoxseg2ei16_v_i32m1_m

#define vsoxseg2ei16_v_i32m1_m ( ... ) __riscv_vsoxseg2ei16_v_i32m1_m(__VA_ARGS__)

◆ vsoxseg2ei16_v_i32m2

#define vsoxseg2ei16_v_i32m2 ( ... ) __riscv_vsoxseg2ei16_v_i32m2(__VA_ARGS__)

◆ vsoxseg2ei16_v_i32m2_m

#define vsoxseg2ei16_v_i32m2_m ( ... ) __riscv_vsoxseg2ei16_v_i32m2_m(__VA_ARGS__)

◆ vsoxseg2ei16_v_i32m4

#define vsoxseg2ei16_v_i32m4 ( ... ) __riscv_vsoxseg2ei16_v_i32m4(__VA_ARGS__)

◆ vsoxseg2ei16_v_i32m4_m

#define vsoxseg2ei16_v_i32m4_m ( ... ) __riscv_vsoxseg2ei16_v_i32m4_m(__VA_ARGS__)

◆ vsoxseg2ei16_v_i32mf2

#define vsoxseg2ei16_v_i32mf2 ( ... ) __riscv_vsoxseg2ei16_v_i32mf2(__VA_ARGS__)

◆ vsoxseg2ei16_v_i32mf2_m

#define vsoxseg2ei16_v_i32mf2_m ( ... ) __riscv_vsoxseg2ei16_v_i32mf2_m(__VA_ARGS__)

◆ vsoxseg2ei16_v_i64m1

#define vsoxseg2ei16_v_i64m1 ( ... ) __riscv_vsoxseg2ei16_v_i64m1(__VA_ARGS__)

◆ vsoxseg2ei16_v_i64m1_m

#define vsoxseg2ei16_v_i64m1_m ( ... ) __riscv_vsoxseg2ei16_v_i64m1_m(__VA_ARGS__)

◆ vsoxseg2ei16_v_i64m2

#define vsoxseg2ei16_v_i64m2 ( ... ) __riscv_vsoxseg2ei16_v_i64m2(__VA_ARGS__)

◆ vsoxseg2ei16_v_i64m2_m

#define vsoxseg2ei16_v_i64m2_m ( ... ) __riscv_vsoxseg2ei16_v_i64m2_m(__VA_ARGS__)

◆ vsoxseg2ei16_v_i64m4

#define vsoxseg2ei16_v_i64m4 ( ... ) __riscv_vsoxseg2ei16_v_i64m4(__VA_ARGS__)

◆ vsoxseg2ei16_v_i64m4_m

#define vsoxseg2ei16_v_i64m4_m ( ... ) __riscv_vsoxseg2ei16_v_i64m4_m(__VA_ARGS__)

◆ vsoxseg2ei16_v_i8m1

#define vsoxseg2ei16_v_i8m1 ( ... ) __riscv_vsoxseg2ei16_v_i8m1(__VA_ARGS__)

◆ vsoxseg2ei16_v_i8m1_m

#define vsoxseg2ei16_v_i8m1_m ( ... ) __riscv_vsoxseg2ei16_v_i8m1_m(__VA_ARGS__)

◆ vsoxseg2ei16_v_i8m2

#define vsoxseg2ei16_v_i8m2 ( ... ) __riscv_vsoxseg2ei16_v_i8m2(__VA_ARGS__)

◆ vsoxseg2ei16_v_i8m2_m

#define vsoxseg2ei16_v_i8m2_m ( ... ) __riscv_vsoxseg2ei16_v_i8m2_m(__VA_ARGS__)

◆ vsoxseg2ei16_v_i8m4

#define vsoxseg2ei16_v_i8m4 ( ... ) __riscv_vsoxseg2ei16_v_i8m4(__VA_ARGS__)

◆ vsoxseg2ei16_v_i8m4_m

#define vsoxseg2ei16_v_i8m4_m ( ... ) __riscv_vsoxseg2ei16_v_i8m4_m(__VA_ARGS__)

◆ vsoxseg2ei16_v_i8mf2

#define vsoxseg2ei16_v_i8mf2 ( ... ) __riscv_vsoxseg2ei16_v_i8mf2(__VA_ARGS__)

◆ vsoxseg2ei16_v_i8mf2_m

#define vsoxseg2ei16_v_i8mf2_m ( ... ) __riscv_vsoxseg2ei16_v_i8mf2_m(__VA_ARGS__)

◆ vsoxseg2ei16_v_i8mf4

#define vsoxseg2ei16_v_i8mf4 ( ... ) __riscv_vsoxseg2ei16_v_i8mf4(__VA_ARGS__)

◆ vsoxseg2ei16_v_i8mf4_m

#define vsoxseg2ei16_v_i8mf4_m ( ... ) __riscv_vsoxseg2ei16_v_i8mf4_m(__VA_ARGS__)

◆ vsoxseg2ei16_v_i8mf8

#define vsoxseg2ei16_v_i8mf8 ( ... ) __riscv_vsoxseg2ei16_v_i8mf8(__VA_ARGS__)

◆ vsoxseg2ei16_v_i8mf8_m

#define vsoxseg2ei16_v_i8mf8_m ( ... ) __riscv_vsoxseg2ei16_v_i8mf8_m(__VA_ARGS__)

◆ vsoxseg2ei16_v_u16m1

#define vsoxseg2ei16_v_u16m1 ( ... ) __riscv_vsoxseg2ei16_v_u16m1(__VA_ARGS__)

◆ vsoxseg2ei16_v_u16m1_m

#define vsoxseg2ei16_v_u16m1_m ( ... ) __riscv_vsoxseg2ei16_v_u16m1_m(__VA_ARGS__)

◆ vsoxseg2ei16_v_u16m2

#define vsoxseg2ei16_v_u16m2 ( ... ) __riscv_vsoxseg2ei16_v_u16m2(__VA_ARGS__)

◆ vsoxseg2ei16_v_u16m2_m

#define vsoxseg2ei16_v_u16m2_m ( ... ) __riscv_vsoxseg2ei16_v_u16m2_m(__VA_ARGS__)

◆ vsoxseg2ei16_v_u16m4

#define vsoxseg2ei16_v_u16m4 ( ... ) __riscv_vsoxseg2ei16_v_u16m4(__VA_ARGS__)

◆ vsoxseg2ei16_v_u16m4_m

#define vsoxseg2ei16_v_u16m4_m ( ... ) __riscv_vsoxseg2ei16_v_u16m4_m(__VA_ARGS__)

◆ vsoxseg2ei16_v_u16mf2

#define vsoxseg2ei16_v_u16mf2 ( ... ) __riscv_vsoxseg2ei16_v_u16mf2(__VA_ARGS__)

◆ vsoxseg2ei16_v_u16mf2_m

#define vsoxseg2ei16_v_u16mf2_m ( ... ) __riscv_vsoxseg2ei16_v_u16mf2_m(__VA_ARGS__)

◆ vsoxseg2ei16_v_u16mf4

#define vsoxseg2ei16_v_u16mf4 ( ... ) __riscv_vsoxseg2ei16_v_u16mf4(__VA_ARGS__)

◆ vsoxseg2ei16_v_u16mf4_m

#define vsoxseg2ei16_v_u16mf4_m ( ... ) __riscv_vsoxseg2ei16_v_u16mf4_m(__VA_ARGS__)

◆ vsoxseg2ei16_v_u32m1

#define vsoxseg2ei16_v_u32m1 ( ... ) __riscv_vsoxseg2ei16_v_u32m1(__VA_ARGS__)

◆ vsoxseg2ei16_v_u32m1_m

#define vsoxseg2ei16_v_u32m1_m ( ... ) __riscv_vsoxseg2ei16_v_u32m1_m(__VA_ARGS__)

◆ vsoxseg2ei16_v_u32m2

#define vsoxseg2ei16_v_u32m2 ( ... ) __riscv_vsoxseg2ei16_v_u32m2(__VA_ARGS__)

◆ vsoxseg2ei16_v_u32m2_m

#define vsoxseg2ei16_v_u32m2_m ( ... ) __riscv_vsoxseg2ei16_v_u32m2_m(__VA_ARGS__)

◆ vsoxseg2ei16_v_u32m4

#define vsoxseg2ei16_v_u32m4 ( ... ) __riscv_vsoxseg2ei16_v_u32m4(__VA_ARGS__)

◆ vsoxseg2ei16_v_u32m4_m

#define vsoxseg2ei16_v_u32m4_m ( ... ) __riscv_vsoxseg2ei16_v_u32m4_m(__VA_ARGS__)

◆ vsoxseg2ei16_v_u32mf2

#define vsoxseg2ei16_v_u32mf2 ( ... ) __riscv_vsoxseg2ei16_v_u32mf2(__VA_ARGS__)

◆ vsoxseg2ei16_v_u32mf2_m

#define vsoxseg2ei16_v_u32mf2_m ( ... ) __riscv_vsoxseg2ei16_v_u32mf2_m(__VA_ARGS__)

◆ vsoxseg2ei16_v_u64m1

#define vsoxseg2ei16_v_u64m1 ( ... ) __riscv_vsoxseg2ei16_v_u64m1(__VA_ARGS__)

◆ vsoxseg2ei16_v_u64m1_m

#define vsoxseg2ei16_v_u64m1_m ( ... ) __riscv_vsoxseg2ei16_v_u64m1_m(__VA_ARGS__)

◆ vsoxseg2ei16_v_u64m2

#define vsoxseg2ei16_v_u64m2 ( ... ) __riscv_vsoxseg2ei16_v_u64m2(__VA_ARGS__)

◆ vsoxseg2ei16_v_u64m2_m

#define vsoxseg2ei16_v_u64m2_m ( ... ) __riscv_vsoxseg2ei16_v_u64m2_m(__VA_ARGS__)

◆ vsoxseg2ei16_v_u64m4

#define vsoxseg2ei16_v_u64m4 ( ... ) __riscv_vsoxseg2ei16_v_u64m4(__VA_ARGS__)

◆ vsoxseg2ei16_v_u64m4_m

#define vsoxseg2ei16_v_u64m4_m ( ... ) __riscv_vsoxseg2ei16_v_u64m4_m(__VA_ARGS__)

◆ vsoxseg2ei16_v_u8m1

#define vsoxseg2ei16_v_u8m1 ( ... ) __riscv_vsoxseg2ei16_v_u8m1(__VA_ARGS__)

◆ vsoxseg2ei16_v_u8m1_m

#define vsoxseg2ei16_v_u8m1_m ( ... ) __riscv_vsoxseg2ei16_v_u8m1_m(__VA_ARGS__)

◆ vsoxseg2ei16_v_u8m2

#define vsoxseg2ei16_v_u8m2 ( ... ) __riscv_vsoxseg2ei16_v_u8m2(__VA_ARGS__)

◆ vsoxseg2ei16_v_u8m2_m

#define vsoxseg2ei16_v_u8m2_m ( ... ) __riscv_vsoxseg2ei16_v_u8m2_m(__VA_ARGS__)

◆ vsoxseg2ei16_v_u8m4

#define vsoxseg2ei16_v_u8m4 ( ... ) __riscv_vsoxseg2ei16_v_u8m4(__VA_ARGS__)

◆ vsoxseg2ei16_v_u8m4_m

#define vsoxseg2ei16_v_u8m4_m ( ... ) __riscv_vsoxseg2ei16_v_u8m4_m(__VA_ARGS__)

◆ vsoxseg2ei16_v_u8mf2

#define vsoxseg2ei16_v_u8mf2 ( ... ) __riscv_vsoxseg2ei16_v_u8mf2(__VA_ARGS__)

◆ vsoxseg2ei16_v_u8mf2_m

#define vsoxseg2ei16_v_u8mf2_m ( ... ) __riscv_vsoxseg2ei16_v_u8mf2_m(__VA_ARGS__)

◆ vsoxseg2ei16_v_u8mf4

#define vsoxseg2ei16_v_u8mf4 ( ... ) __riscv_vsoxseg2ei16_v_u8mf4(__VA_ARGS__)

◆ vsoxseg2ei16_v_u8mf4_m

#define vsoxseg2ei16_v_u8mf4_m ( ... ) __riscv_vsoxseg2ei16_v_u8mf4_m(__VA_ARGS__)

◆ vsoxseg2ei16_v_u8mf8

#define vsoxseg2ei16_v_u8mf8 ( ... ) __riscv_vsoxseg2ei16_v_u8mf8(__VA_ARGS__)

◆ vsoxseg2ei16_v_u8mf8_m

#define vsoxseg2ei16_v_u8mf8_m ( ... ) __riscv_vsoxseg2ei16_v_u8mf8_m(__VA_ARGS__)

◆ vsoxseg2ei32_v_f16m1

#define vsoxseg2ei32_v_f16m1 ( ... ) __riscv_vsoxseg2ei32_v_f16m1(__VA_ARGS__)

◆ vsoxseg2ei32_v_f16m1_m

#define vsoxseg2ei32_v_f16m1_m ( ... ) __riscv_vsoxseg2ei32_v_f16m1_m(__VA_ARGS__)

◆ vsoxseg2ei32_v_f16m2

#define vsoxseg2ei32_v_f16m2 ( ... ) __riscv_vsoxseg2ei32_v_f16m2(__VA_ARGS__)

◆ vsoxseg2ei32_v_f16m2_m

#define vsoxseg2ei32_v_f16m2_m ( ... ) __riscv_vsoxseg2ei32_v_f16m2_m(__VA_ARGS__)

◆ vsoxseg2ei32_v_f16m4

#define vsoxseg2ei32_v_f16m4 ( ... ) __riscv_vsoxseg2ei32_v_f16m4(__VA_ARGS__)

◆ vsoxseg2ei32_v_f16m4_m

#define vsoxseg2ei32_v_f16m4_m ( ... ) __riscv_vsoxseg2ei32_v_f16m4_m(__VA_ARGS__)

◆ vsoxseg2ei32_v_f16mf2

#define vsoxseg2ei32_v_f16mf2 ( ... ) __riscv_vsoxseg2ei32_v_f16mf2(__VA_ARGS__)

◆ vsoxseg2ei32_v_f16mf2_m

#define vsoxseg2ei32_v_f16mf2_m ( ... ) __riscv_vsoxseg2ei32_v_f16mf2_m(__VA_ARGS__)

◆ vsoxseg2ei32_v_f16mf4

#define vsoxseg2ei32_v_f16mf4 ( ... ) __riscv_vsoxseg2ei32_v_f16mf4(__VA_ARGS__)

◆ vsoxseg2ei32_v_f16mf4_m

#define vsoxseg2ei32_v_f16mf4_m ( ... ) __riscv_vsoxseg2ei32_v_f16mf4_m(__VA_ARGS__)

◆ vsoxseg2ei32_v_f32m1

#define vsoxseg2ei32_v_f32m1 ( ... ) __riscv_vsoxseg2ei32_v_f32m1(__VA_ARGS__)

◆ vsoxseg2ei32_v_f32m1_m

#define vsoxseg2ei32_v_f32m1_m ( ... ) __riscv_vsoxseg2ei32_v_f32m1_m(__VA_ARGS__)

◆ vsoxseg2ei32_v_f32m2

#define vsoxseg2ei32_v_f32m2 ( ... ) __riscv_vsoxseg2ei32_v_f32m2(__VA_ARGS__)

◆ vsoxseg2ei32_v_f32m2_m

#define vsoxseg2ei32_v_f32m2_m ( ... ) __riscv_vsoxseg2ei32_v_f32m2_m(__VA_ARGS__)

◆ vsoxseg2ei32_v_f32m4

#define vsoxseg2ei32_v_f32m4 ( ... ) __riscv_vsoxseg2ei32_v_f32m4(__VA_ARGS__)

◆ vsoxseg2ei32_v_f32m4_m

#define vsoxseg2ei32_v_f32m4_m ( ... ) __riscv_vsoxseg2ei32_v_f32m4_m(__VA_ARGS__)

◆ vsoxseg2ei32_v_f32mf2

#define vsoxseg2ei32_v_f32mf2 ( ... ) __riscv_vsoxseg2ei32_v_f32mf2(__VA_ARGS__)

◆ vsoxseg2ei32_v_f32mf2_m

#define vsoxseg2ei32_v_f32mf2_m ( ... ) __riscv_vsoxseg2ei32_v_f32mf2_m(__VA_ARGS__)

◆ vsoxseg2ei32_v_f64m1

#define vsoxseg2ei32_v_f64m1 ( ... ) __riscv_vsoxseg2ei32_v_f64m1(__VA_ARGS__)

◆ vsoxseg2ei32_v_f64m1_m

#define vsoxseg2ei32_v_f64m1_m ( ... ) __riscv_vsoxseg2ei32_v_f64m1_m(__VA_ARGS__)

◆ vsoxseg2ei32_v_f64m2

#define vsoxseg2ei32_v_f64m2 ( ... ) __riscv_vsoxseg2ei32_v_f64m2(__VA_ARGS__)

◆ vsoxseg2ei32_v_f64m2_m

#define vsoxseg2ei32_v_f64m2_m ( ... ) __riscv_vsoxseg2ei32_v_f64m2_m(__VA_ARGS__)

◆ vsoxseg2ei32_v_f64m4

#define vsoxseg2ei32_v_f64m4 ( ... ) __riscv_vsoxseg2ei32_v_f64m4(__VA_ARGS__)

◆ vsoxseg2ei32_v_f64m4_m

#define vsoxseg2ei32_v_f64m4_m ( ... ) __riscv_vsoxseg2ei32_v_f64m4_m(__VA_ARGS__)

◆ vsoxseg2ei32_v_i16m1

#define vsoxseg2ei32_v_i16m1 ( ... ) __riscv_vsoxseg2ei32_v_i16m1(__VA_ARGS__)

◆ vsoxseg2ei32_v_i16m1_m

#define vsoxseg2ei32_v_i16m1_m ( ... ) __riscv_vsoxseg2ei32_v_i16m1_m(__VA_ARGS__)

◆ vsoxseg2ei32_v_i16m2

#define vsoxseg2ei32_v_i16m2 ( ... ) __riscv_vsoxseg2ei32_v_i16m2(__VA_ARGS__)

◆ vsoxseg2ei32_v_i16m2_m

#define vsoxseg2ei32_v_i16m2_m ( ... ) __riscv_vsoxseg2ei32_v_i16m2_m(__VA_ARGS__)

◆ vsoxseg2ei32_v_i16m4

#define vsoxseg2ei32_v_i16m4 ( ... ) __riscv_vsoxseg2ei32_v_i16m4(__VA_ARGS__)

◆ vsoxseg2ei32_v_i16m4_m

#define vsoxseg2ei32_v_i16m4_m ( ... ) __riscv_vsoxseg2ei32_v_i16m4_m(__VA_ARGS__)

◆ vsoxseg2ei32_v_i16mf2

#define vsoxseg2ei32_v_i16mf2 ( ... ) __riscv_vsoxseg2ei32_v_i16mf2(__VA_ARGS__)

◆ vsoxseg2ei32_v_i16mf2_m

#define vsoxseg2ei32_v_i16mf2_m ( ... ) __riscv_vsoxseg2ei32_v_i16mf2_m(__VA_ARGS__)

◆ vsoxseg2ei32_v_i16mf4

#define vsoxseg2ei32_v_i16mf4 ( ... ) __riscv_vsoxseg2ei32_v_i16mf4(__VA_ARGS__)

◆ vsoxseg2ei32_v_i16mf4_m

#define vsoxseg2ei32_v_i16mf4_m ( ... ) __riscv_vsoxseg2ei32_v_i16mf4_m(__VA_ARGS__)

◆ vsoxseg2ei32_v_i32m1

#define vsoxseg2ei32_v_i32m1 ( ... ) __riscv_vsoxseg2ei32_v_i32m1(__VA_ARGS__)

◆ vsoxseg2ei32_v_i32m1_m

#define vsoxseg2ei32_v_i32m1_m ( ... ) __riscv_vsoxseg2ei32_v_i32m1_m(__VA_ARGS__)

◆ vsoxseg2ei32_v_i32m2

#define vsoxseg2ei32_v_i32m2 ( ... ) __riscv_vsoxseg2ei32_v_i32m2(__VA_ARGS__)

◆ vsoxseg2ei32_v_i32m2_m

#define vsoxseg2ei32_v_i32m2_m ( ... ) __riscv_vsoxseg2ei32_v_i32m2_m(__VA_ARGS__)

◆ vsoxseg2ei32_v_i32m4

#define vsoxseg2ei32_v_i32m4 ( ... ) __riscv_vsoxseg2ei32_v_i32m4(__VA_ARGS__)

◆ vsoxseg2ei32_v_i32m4_m

#define vsoxseg2ei32_v_i32m4_m ( ... ) __riscv_vsoxseg2ei32_v_i32m4_m(__VA_ARGS__)

◆ vsoxseg2ei32_v_i32mf2

#define vsoxseg2ei32_v_i32mf2 ( ... ) __riscv_vsoxseg2ei32_v_i32mf2(__VA_ARGS__)

◆ vsoxseg2ei32_v_i32mf2_m

#define vsoxseg2ei32_v_i32mf2_m ( ... ) __riscv_vsoxseg2ei32_v_i32mf2_m(__VA_ARGS__)

◆ vsoxseg2ei32_v_i64m1

#define vsoxseg2ei32_v_i64m1 ( ... ) __riscv_vsoxseg2ei32_v_i64m1(__VA_ARGS__)

◆ vsoxseg2ei32_v_i64m1_m

#define vsoxseg2ei32_v_i64m1_m ( ... ) __riscv_vsoxseg2ei32_v_i64m1_m(__VA_ARGS__)

◆ vsoxseg2ei32_v_i64m2

#define vsoxseg2ei32_v_i64m2 ( ... ) __riscv_vsoxseg2ei32_v_i64m2(__VA_ARGS__)

◆ vsoxseg2ei32_v_i64m2_m

#define vsoxseg2ei32_v_i64m2_m ( ... ) __riscv_vsoxseg2ei32_v_i64m2_m(__VA_ARGS__)

◆ vsoxseg2ei32_v_i64m4

#define vsoxseg2ei32_v_i64m4 ( ... ) __riscv_vsoxseg2ei32_v_i64m4(__VA_ARGS__)

◆ vsoxseg2ei32_v_i64m4_m

#define vsoxseg2ei32_v_i64m4_m ( ... ) __riscv_vsoxseg2ei32_v_i64m4_m(__VA_ARGS__)

◆ vsoxseg2ei32_v_i8m1

#define vsoxseg2ei32_v_i8m1 ( ... ) __riscv_vsoxseg2ei32_v_i8m1(__VA_ARGS__)

◆ vsoxseg2ei32_v_i8m1_m

#define vsoxseg2ei32_v_i8m1_m ( ... ) __riscv_vsoxseg2ei32_v_i8m1_m(__VA_ARGS__)

◆ vsoxseg2ei32_v_i8m2

#define vsoxseg2ei32_v_i8m2 ( ... ) __riscv_vsoxseg2ei32_v_i8m2(__VA_ARGS__)

◆ vsoxseg2ei32_v_i8m2_m

#define vsoxseg2ei32_v_i8m2_m ( ... ) __riscv_vsoxseg2ei32_v_i8m2_m(__VA_ARGS__)

◆ vsoxseg2ei32_v_i8mf2

#define vsoxseg2ei32_v_i8mf2 ( ... ) __riscv_vsoxseg2ei32_v_i8mf2(__VA_ARGS__)

◆ vsoxseg2ei32_v_i8mf2_m

#define vsoxseg2ei32_v_i8mf2_m ( ... ) __riscv_vsoxseg2ei32_v_i8mf2_m(__VA_ARGS__)

◆ vsoxseg2ei32_v_i8mf4

#define vsoxseg2ei32_v_i8mf4 ( ... ) __riscv_vsoxseg2ei32_v_i8mf4(__VA_ARGS__)

◆ vsoxseg2ei32_v_i8mf4_m

#define vsoxseg2ei32_v_i8mf4_m ( ... ) __riscv_vsoxseg2ei32_v_i8mf4_m(__VA_ARGS__)

◆ vsoxseg2ei32_v_i8mf8

#define vsoxseg2ei32_v_i8mf8 ( ... ) __riscv_vsoxseg2ei32_v_i8mf8(__VA_ARGS__)

◆ vsoxseg2ei32_v_i8mf8_m

#define vsoxseg2ei32_v_i8mf8_m ( ... ) __riscv_vsoxseg2ei32_v_i8mf8_m(__VA_ARGS__)

◆ vsoxseg2ei32_v_u16m1

#define vsoxseg2ei32_v_u16m1 ( ... ) __riscv_vsoxseg2ei32_v_u16m1(__VA_ARGS__)

◆ vsoxseg2ei32_v_u16m1_m

#define vsoxseg2ei32_v_u16m1_m ( ... ) __riscv_vsoxseg2ei32_v_u16m1_m(__VA_ARGS__)

◆ vsoxseg2ei32_v_u16m2

#define vsoxseg2ei32_v_u16m2 ( ... ) __riscv_vsoxseg2ei32_v_u16m2(__VA_ARGS__)

◆ vsoxseg2ei32_v_u16m2_m

#define vsoxseg2ei32_v_u16m2_m ( ... ) __riscv_vsoxseg2ei32_v_u16m2_m(__VA_ARGS__)

◆ vsoxseg2ei32_v_u16m4

#define vsoxseg2ei32_v_u16m4 ( ... ) __riscv_vsoxseg2ei32_v_u16m4(__VA_ARGS__)

◆ vsoxseg2ei32_v_u16m4_m

#define vsoxseg2ei32_v_u16m4_m ( ... ) __riscv_vsoxseg2ei32_v_u16m4_m(__VA_ARGS__)

◆ vsoxseg2ei32_v_u16mf2

#define vsoxseg2ei32_v_u16mf2 ( ... ) __riscv_vsoxseg2ei32_v_u16mf2(__VA_ARGS__)

◆ vsoxseg2ei32_v_u16mf2_m

#define vsoxseg2ei32_v_u16mf2_m ( ... ) __riscv_vsoxseg2ei32_v_u16mf2_m(__VA_ARGS__)

◆ vsoxseg2ei32_v_u16mf4

#define vsoxseg2ei32_v_u16mf4 ( ... ) __riscv_vsoxseg2ei32_v_u16mf4(__VA_ARGS__)

◆ vsoxseg2ei32_v_u16mf4_m

#define vsoxseg2ei32_v_u16mf4_m ( ... ) __riscv_vsoxseg2ei32_v_u16mf4_m(__VA_ARGS__)

◆ vsoxseg2ei32_v_u32m1

#define vsoxseg2ei32_v_u32m1 ( ... ) __riscv_vsoxseg2ei32_v_u32m1(__VA_ARGS__)

◆ vsoxseg2ei32_v_u32m1_m

#define vsoxseg2ei32_v_u32m1_m ( ... ) __riscv_vsoxseg2ei32_v_u32m1_m(__VA_ARGS__)

◆ vsoxseg2ei32_v_u32m2

#define vsoxseg2ei32_v_u32m2 ( ... ) __riscv_vsoxseg2ei32_v_u32m2(__VA_ARGS__)

◆ vsoxseg2ei32_v_u32m2_m

#define vsoxseg2ei32_v_u32m2_m ( ... ) __riscv_vsoxseg2ei32_v_u32m2_m(__VA_ARGS__)

◆ vsoxseg2ei32_v_u32m4

#define vsoxseg2ei32_v_u32m4 ( ... ) __riscv_vsoxseg2ei32_v_u32m4(__VA_ARGS__)

◆ vsoxseg2ei32_v_u32m4_m

#define vsoxseg2ei32_v_u32m4_m ( ... ) __riscv_vsoxseg2ei32_v_u32m4_m(__VA_ARGS__)

◆ vsoxseg2ei32_v_u32mf2

#define vsoxseg2ei32_v_u32mf2 ( ... ) __riscv_vsoxseg2ei32_v_u32mf2(__VA_ARGS__)

◆ vsoxseg2ei32_v_u32mf2_m

#define vsoxseg2ei32_v_u32mf2_m ( ... ) __riscv_vsoxseg2ei32_v_u32mf2_m(__VA_ARGS__)

◆ vsoxseg2ei32_v_u64m1

#define vsoxseg2ei32_v_u64m1 ( ... ) __riscv_vsoxseg2ei32_v_u64m1(__VA_ARGS__)

◆ vsoxseg2ei32_v_u64m1_m

#define vsoxseg2ei32_v_u64m1_m ( ... ) __riscv_vsoxseg2ei32_v_u64m1_m(__VA_ARGS__)

◆ vsoxseg2ei32_v_u64m2

#define vsoxseg2ei32_v_u64m2 ( ... ) __riscv_vsoxseg2ei32_v_u64m2(__VA_ARGS__)

◆ vsoxseg2ei32_v_u64m2_m

#define vsoxseg2ei32_v_u64m2_m ( ... ) __riscv_vsoxseg2ei32_v_u64m2_m(__VA_ARGS__)

◆ vsoxseg2ei32_v_u64m4

#define vsoxseg2ei32_v_u64m4 ( ... ) __riscv_vsoxseg2ei32_v_u64m4(__VA_ARGS__)

◆ vsoxseg2ei32_v_u64m4_m

#define vsoxseg2ei32_v_u64m4_m ( ... ) __riscv_vsoxseg2ei32_v_u64m4_m(__VA_ARGS__)

◆ vsoxseg2ei32_v_u8m1

#define vsoxseg2ei32_v_u8m1 ( ... ) __riscv_vsoxseg2ei32_v_u8m1(__VA_ARGS__)

◆ vsoxseg2ei32_v_u8m1_m

#define vsoxseg2ei32_v_u8m1_m ( ... ) __riscv_vsoxseg2ei32_v_u8m1_m(__VA_ARGS__)

◆ vsoxseg2ei32_v_u8m2

#define vsoxseg2ei32_v_u8m2 ( ... ) __riscv_vsoxseg2ei32_v_u8m2(__VA_ARGS__)

◆ vsoxseg2ei32_v_u8m2_m

#define vsoxseg2ei32_v_u8m2_m ( ... ) __riscv_vsoxseg2ei32_v_u8m2_m(__VA_ARGS__)

◆ vsoxseg2ei32_v_u8mf2

#define vsoxseg2ei32_v_u8mf2 ( ... ) __riscv_vsoxseg2ei32_v_u8mf2(__VA_ARGS__)

◆ vsoxseg2ei32_v_u8mf2_m

#define vsoxseg2ei32_v_u8mf2_m ( ... ) __riscv_vsoxseg2ei32_v_u8mf2_m(__VA_ARGS__)

◆ vsoxseg2ei32_v_u8mf4

#define vsoxseg2ei32_v_u8mf4 ( ... ) __riscv_vsoxseg2ei32_v_u8mf4(__VA_ARGS__)

◆ vsoxseg2ei32_v_u8mf4_m

#define vsoxseg2ei32_v_u8mf4_m ( ... ) __riscv_vsoxseg2ei32_v_u8mf4_m(__VA_ARGS__)

◆ vsoxseg2ei32_v_u8mf8

#define vsoxseg2ei32_v_u8mf8 ( ... ) __riscv_vsoxseg2ei32_v_u8mf8(__VA_ARGS__)

◆ vsoxseg2ei32_v_u8mf8_m

#define vsoxseg2ei32_v_u8mf8_m ( ... ) __riscv_vsoxseg2ei32_v_u8mf8_m(__VA_ARGS__)

◆ vsoxseg2ei64_v_f16m1

#define vsoxseg2ei64_v_f16m1 ( ... ) __riscv_vsoxseg2ei64_v_f16m1(__VA_ARGS__)

◆ vsoxseg2ei64_v_f16m1_m

#define vsoxseg2ei64_v_f16m1_m ( ... ) __riscv_vsoxseg2ei64_v_f16m1_m(__VA_ARGS__)

◆ vsoxseg2ei64_v_f16m2

#define vsoxseg2ei64_v_f16m2 ( ... ) __riscv_vsoxseg2ei64_v_f16m2(__VA_ARGS__)

◆ vsoxseg2ei64_v_f16m2_m

#define vsoxseg2ei64_v_f16m2_m ( ... ) __riscv_vsoxseg2ei64_v_f16m2_m(__VA_ARGS__)

◆ vsoxseg2ei64_v_f16mf2

#define vsoxseg2ei64_v_f16mf2 ( ... ) __riscv_vsoxseg2ei64_v_f16mf2(__VA_ARGS__)

◆ vsoxseg2ei64_v_f16mf2_m

#define vsoxseg2ei64_v_f16mf2_m ( ... ) __riscv_vsoxseg2ei64_v_f16mf2_m(__VA_ARGS__)

◆ vsoxseg2ei64_v_f16mf4

#define vsoxseg2ei64_v_f16mf4 ( ... ) __riscv_vsoxseg2ei64_v_f16mf4(__VA_ARGS__)

◆ vsoxseg2ei64_v_f16mf4_m

#define vsoxseg2ei64_v_f16mf4_m ( ... ) __riscv_vsoxseg2ei64_v_f16mf4_m(__VA_ARGS__)

◆ vsoxseg2ei64_v_f32m1

#define vsoxseg2ei64_v_f32m1 ( ... ) __riscv_vsoxseg2ei64_v_f32m1(__VA_ARGS__)

◆ vsoxseg2ei64_v_f32m1_m

#define vsoxseg2ei64_v_f32m1_m ( ... ) __riscv_vsoxseg2ei64_v_f32m1_m(__VA_ARGS__)

◆ vsoxseg2ei64_v_f32m2

#define vsoxseg2ei64_v_f32m2 ( ... ) __riscv_vsoxseg2ei64_v_f32m2(__VA_ARGS__)

◆ vsoxseg2ei64_v_f32m2_m

#define vsoxseg2ei64_v_f32m2_m ( ... ) __riscv_vsoxseg2ei64_v_f32m2_m(__VA_ARGS__)

◆ vsoxseg2ei64_v_f32m4

#define vsoxseg2ei64_v_f32m4 ( ... ) __riscv_vsoxseg2ei64_v_f32m4(__VA_ARGS__)

◆ vsoxseg2ei64_v_f32m4_m

#define vsoxseg2ei64_v_f32m4_m ( ... ) __riscv_vsoxseg2ei64_v_f32m4_m(__VA_ARGS__)

◆ vsoxseg2ei64_v_f32mf2

#define vsoxseg2ei64_v_f32mf2 ( ... ) __riscv_vsoxseg2ei64_v_f32mf2(__VA_ARGS__)

◆ vsoxseg2ei64_v_f32mf2_m

#define vsoxseg2ei64_v_f32mf2_m ( ... ) __riscv_vsoxseg2ei64_v_f32mf2_m(__VA_ARGS__)

◆ vsoxseg2ei64_v_f64m1

#define vsoxseg2ei64_v_f64m1 ( ... ) __riscv_vsoxseg2ei64_v_f64m1(__VA_ARGS__)

◆ vsoxseg2ei64_v_f64m1_m

#define vsoxseg2ei64_v_f64m1_m ( ... ) __riscv_vsoxseg2ei64_v_f64m1_m(__VA_ARGS__)

◆ vsoxseg2ei64_v_f64m2

#define vsoxseg2ei64_v_f64m2 ( ... ) __riscv_vsoxseg2ei64_v_f64m2(__VA_ARGS__)

◆ vsoxseg2ei64_v_f64m2_m

#define vsoxseg2ei64_v_f64m2_m ( ... ) __riscv_vsoxseg2ei64_v_f64m2_m(__VA_ARGS__)

◆ vsoxseg2ei64_v_f64m4

#define vsoxseg2ei64_v_f64m4 ( ... ) __riscv_vsoxseg2ei64_v_f64m4(__VA_ARGS__)

◆ vsoxseg2ei64_v_f64m4_m

#define vsoxseg2ei64_v_f64m4_m ( ... ) __riscv_vsoxseg2ei64_v_f64m4_m(__VA_ARGS__)

◆ vsoxseg2ei64_v_i16m1

#define vsoxseg2ei64_v_i16m1 ( ... ) __riscv_vsoxseg2ei64_v_i16m1(__VA_ARGS__)

◆ vsoxseg2ei64_v_i16m1_m

#define vsoxseg2ei64_v_i16m1_m ( ... ) __riscv_vsoxseg2ei64_v_i16m1_m(__VA_ARGS__)

◆ vsoxseg2ei64_v_i16m2

#define vsoxseg2ei64_v_i16m2 ( ... ) __riscv_vsoxseg2ei64_v_i16m2(__VA_ARGS__)

◆ vsoxseg2ei64_v_i16m2_m

#define vsoxseg2ei64_v_i16m2_m ( ... ) __riscv_vsoxseg2ei64_v_i16m2_m(__VA_ARGS__)

◆ vsoxseg2ei64_v_i16mf2

#define vsoxseg2ei64_v_i16mf2 ( ... ) __riscv_vsoxseg2ei64_v_i16mf2(__VA_ARGS__)

◆ vsoxseg2ei64_v_i16mf2_m

#define vsoxseg2ei64_v_i16mf2_m ( ... ) __riscv_vsoxseg2ei64_v_i16mf2_m(__VA_ARGS__)

◆ vsoxseg2ei64_v_i16mf4

#define vsoxseg2ei64_v_i16mf4 ( ... ) __riscv_vsoxseg2ei64_v_i16mf4(__VA_ARGS__)

◆ vsoxseg2ei64_v_i16mf4_m

#define vsoxseg2ei64_v_i16mf4_m ( ... ) __riscv_vsoxseg2ei64_v_i16mf4_m(__VA_ARGS__)

◆ vsoxseg2ei64_v_i32m1

#define vsoxseg2ei64_v_i32m1 ( ... ) __riscv_vsoxseg2ei64_v_i32m1(__VA_ARGS__)

◆ vsoxseg2ei64_v_i32m1_m

#define vsoxseg2ei64_v_i32m1_m ( ... ) __riscv_vsoxseg2ei64_v_i32m1_m(__VA_ARGS__)

◆ vsoxseg2ei64_v_i32m2

#define vsoxseg2ei64_v_i32m2 ( ... ) __riscv_vsoxseg2ei64_v_i32m2(__VA_ARGS__)

◆ vsoxseg2ei64_v_i32m2_m

#define vsoxseg2ei64_v_i32m2_m ( ... ) __riscv_vsoxseg2ei64_v_i32m2_m(__VA_ARGS__)

◆ vsoxseg2ei64_v_i32m4

#define vsoxseg2ei64_v_i32m4 ( ... ) __riscv_vsoxseg2ei64_v_i32m4(__VA_ARGS__)

◆ vsoxseg2ei64_v_i32m4_m

#define vsoxseg2ei64_v_i32m4_m ( ... ) __riscv_vsoxseg2ei64_v_i32m4_m(__VA_ARGS__)

◆ vsoxseg2ei64_v_i32mf2

#define vsoxseg2ei64_v_i32mf2 ( ... ) __riscv_vsoxseg2ei64_v_i32mf2(__VA_ARGS__)

◆ vsoxseg2ei64_v_i32mf2_m

#define vsoxseg2ei64_v_i32mf2_m ( ... ) __riscv_vsoxseg2ei64_v_i32mf2_m(__VA_ARGS__)

◆ vsoxseg2ei64_v_i64m1

#define vsoxseg2ei64_v_i64m1 ( ... ) __riscv_vsoxseg2ei64_v_i64m1(__VA_ARGS__)

◆ vsoxseg2ei64_v_i64m1_m

#define vsoxseg2ei64_v_i64m1_m ( ... ) __riscv_vsoxseg2ei64_v_i64m1_m(__VA_ARGS__)

◆ vsoxseg2ei64_v_i64m2

#define vsoxseg2ei64_v_i64m2 ( ... ) __riscv_vsoxseg2ei64_v_i64m2(__VA_ARGS__)

◆ vsoxseg2ei64_v_i64m2_m

#define vsoxseg2ei64_v_i64m2_m ( ... ) __riscv_vsoxseg2ei64_v_i64m2_m(__VA_ARGS__)

◆ vsoxseg2ei64_v_i64m4

#define vsoxseg2ei64_v_i64m4 ( ... ) __riscv_vsoxseg2ei64_v_i64m4(__VA_ARGS__)

◆ vsoxseg2ei64_v_i64m4_m

#define vsoxseg2ei64_v_i64m4_m ( ... ) __riscv_vsoxseg2ei64_v_i64m4_m(__VA_ARGS__)

◆ vsoxseg2ei64_v_i8m1

#define vsoxseg2ei64_v_i8m1 ( ... ) __riscv_vsoxseg2ei64_v_i8m1(__VA_ARGS__)

◆ vsoxseg2ei64_v_i8m1_m

#define vsoxseg2ei64_v_i8m1_m ( ... ) __riscv_vsoxseg2ei64_v_i8m1_m(__VA_ARGS__)

◆ vsoxseg2ei64_v_i8mf2

#define vsoxseg2ei64_v_i8mf2 ( ... ) __riscv_vsoxseg2ei64_v_i8mf2(__VA_ARGS__)

◆ vsoxseg2ei64_v_i8mf2_m

#define vsoxseg2ei64_v_i8mf2_m ( ... ) __riscv_vsoxseg2ei64_v_i8mf2_m(__VA_ARGS__)

◆ vsoxseg2ei64_v_i8mf4

#define vsoxseg2ei64_v_i8mf4 ( ... ) __riscv_vsoxseg2ei64_v_i8mf4(__VA_ARGS__)

◆ vsoxseg2ei64_v_i8mf4_m

#define vsoxseg2ei64_v_i8mf4_m ( ... ) __riscv_vsoxseg2ei64_v_i8mf4_m(__VA_ARGS__)

◆ vsoxseg2ei64_v_i8mf8

#define vsoxseg2ei64_v_i8mf8 ( ... ) __riscv_vsoxseg2ei64_v_i8mf8(__VA_ARGS__)

◆ vsoxseg2ei64_v_i8mf8_m

#define vsoxseg2ei64_v_i8mf8_m ( ... ) __riscv_vsoxseg2ei64_v_i8mf8_m(__VA_ARGS__)

◆ vsoxseg2ei64_v_u16m1

#define vsoxseg2ei64_v_u16m1 ( ... ) __riscv_vsoxseg2ei64_v_u16m1(__VA_ARGS__)

◆ vsoxseg2ei64_v_u16m1_m

#define vsoxseg2ei64_v_u16m1_m ( ... ) __riscv_vsoxseg2ei64_v_u16m1_m(__VA_ARGS__)

◆ vsoxseg2ei64_v_u16m2

#define vsoxseg2ei64_v_u16m2 ( ... ) __riscv_vsoxseg2ei64_v_u16m2(__VA_ARGS__)

◆ vsoxseg2ei64_v_u16m2_m

#define vsoxseg2ei64_v_u16m2_m ( ... ) __riscv_vsoxseg2ei64_v_u16m2_m(__VA_ARGS__)

◆ vsoxseg2ei64_v_u16mf2

#define vsoxseg2ei64_v_u16mf2 ( ... ) __riscv_vsoxseg2ei64_v_u16mf2(__VA_ARGS__)

◆ vsoxseg2ei64_v_u16mf2_m

#define vsoxseg2ei64_v_u16mf2_m ( ... ) __riscv_vsoxseg2ei64_v_u16mf2_m(__VA_ARGS__)

◆ vsoxseg2ei64_v_u16mf4

#define vsoxseg2ei64_v_u16mf4 ( ... ) __riscv_vsoxseg2ei64_v_u16mf4(__VA_ARGS__)

◆ vsoxseg2ei64_v_u16mf4_m

#define vsoxseg2ei64_v_u16mf4_m ( ... ) __riscv_vsoxseg2ei64_v_u16mf4_m(__VA_ARGS__)

◆ vsoxseg2ei64_v_u32m1

#define vsoxseg2ei64_v_u32m1 ( ... ) __riscv_vsoxseg2ei64_v_u32m1(__VA_ARGS__)

◆ vsoxseg2ei64_v_u32m1_m

#define vsoxseg2ei64_v_u32m1_m ( ... ) __riscv_vsoxseg2ei64_v_u32m1_m(__VA_ARGS__)

◆ vsoxseg2ei64_v_u32m2

#define vsoxseg2ei64_v_u32m2 ( ... ) __riscv_vsoxseg2ei64_v_u32m2(__VA_ARGS__)

◆ vsoxseg2ei64_v_u32m2_m

#define vsoxseg2ei64_v_u32m2_m ( ... ) __riscv_vsoxseg2ei64_v_u32m2_m(__VA_ARGS__)

◆ vsoxseg2ei64_v_u32m4

#define vsoxseg2ei64_v_u32m4 ( ... ) __riscv_vsoxseg2ei64_v_u32m4(__VA_ARGS__)

◆ vsoxseg2ei64_v_u32m4_m

#define vsoxseg2ei64_v_u32m4_m ( ... ) __riscv_vsoxseg2ei64_v_u32m4_m(__VA_ARGS__)

◆ vsoxseg2ei64_v_u32mf2

#define vsoxseg2ei64_v_u32mf2 ( ... ) __riscv_vsoxseg2ei64_v_u32mf2(__VA_ARGS__)

◆ vsoxseg2ei64_v_u32mf2_m

#define vsoxseg2ei64_v_u32mf2_m ( ... ) __riscv_vsoxseg2ei64_v_u32mf2_m(__VA_ARGS__)

◆ vsoxseg2ei64_v_u64m1

#define vsoxseg2ei64_v_u64m1 ( ... ) __riscv_vsoxseg2ei64_v_u64m1(__VA_ARGS__)

◆ vsoxseg2ei64_v_u64m1_m

#define vsoxseg2ei64_v_u64m1_m ( ... ) __riscv_vsoxseg2ei64_v_u64m1_m(__VA_ARGS__)

◆ vsoxseg2ei64_v_u64m2

#define vsoxseg2ei64_v_u64m2 ( ... ) __riscv_vsoxseg2ei64_v_u64m2(__VA_ARGS__)

◆ vsoxseg2ei64_v_u64m2_m

#define vsoxseg2ei64_v_u64m2_m ( ... ) __riscv_vsoxseg2ei64_v_u64m2_m(__VA_ARGS__)

◆ vsoxseg2ei64_v_u64m4

#define vsoxseg2ei64_v_u64m4 ( ... ) __riscv_vsoxseg2ei64_v_u64m4(__VA_ARGS__)

◆ vsoxseg2ei64_v_u64m4_m

#define vsoxseg2ei64_v_u64m4_m ( ... ) __riscv_vsoxseg2ei64_v_u64m4_m(__VA_ARGS__)

◆ vsoxseg2ei64_v_u8m1

#define vsoxseg2ei64_v_u8m1 ( ... ) __riscv_vsoxseg2ei64_v_u8m1(__VA_ARGS__)

◆ vsoxseg2ei64_v_u8m1_m

#define vsoxseg2ei64_v_u8m1_m ( ... ) __riscv_vsoxseg2ei64_v_u8m1_m(__VA_ARGS__)

◆ vsoxseg2ei64_v_u8mf2

#define vsoxseg2ei64_v_u8mf2 ( ... ) __riscv_vsoxseg2ei64_v_u8mf2(__VA_ARGS__)

◆ vsoxseg2ei64_v_u8mf2_m

#define vsoxseg2ei64_v_u8mf2_m ( ... ) __riscv_vsoxseg2ei64_v_u8mf2_m(__VA_ARGS__)

◆ vsoxseg2ei64_v_u8mf4

#define vsoxseg2ei64_v_u8mf4 ( ... ) __riscv_vsoxseg2ei64_v_u8mf4(__VA_ARGS__)

◆ vsoxseg2ei64_v_u8mf4_m

#define vsoxseg2ei64_v_u8mf4_m ( ... ) __riscv_vsoxseg2ei64_v_u8mf4_m(__VA_ARGS__)

◆ vsoxseg2ei64_v_u8mf8

#define vsoxseg2ei64_v_u8mf8 ( ... ) __riscv_vsoxseg2ei64_v_u8mf8(__VA_ARGS__)

◆ vsoxseg2ei64_v_u8mf8_m

#define vsoxseg2ei64_v_u8mf8_m ( ... ) __riscv_vsoxseg2ei64_v_u8mf8_m(__VA_ARGS__)

◆ vsoxseg2ei8_v_f16m1

#define vsoxseg2ei8_v_f16m1 ( ... ) __riscv_vsoxseg2ei8_v_f16m1(__VA_ARGS__)

◆ vsoxseg2ei8_v_f16m1_m

#define vsoxseg2ei8_v_f16m1_m ( ... ) __riscv_vsoxseg2ei8_v_f16m1_m(__VA_ARGS__)

◆ vsoxseg2ei8_v_f16m2

#define vsoxseg2ei8_v_f16m2 ( ... ) __riscv_vsoxseg2ei8_v_f16m2(__VA_ARGS__)

◆ vsoxseg2ei8_v_f16m2_m

#define vsoxseg2ei8_v_f16m2_m ( ... ) __riscv_vsoxseg2ei8_v_f16m2_m(__VA_ARGS__)

◆ vsoxseg2ei8_v_f16m4

#define vsoxseg2ei8_v_f16m4 ( ... ) __riscv_vsoxseg2ei8_v_f16m4(__VA_ARGS__)

◆ vsoxseg2ei8_v_f16m4_m

#define vsoxseg2ei8_v_f16m4_m ( ... ) __riscv_vsoxseg2ei8_v_f16m4_m(__VA_ARGS__)

◆ vsoxseg2ei8_v_f16mf2

#define vsoxseg2ei8_v_f16mf2 ( ... ) __riscv_vsoxseg2ei8_v_f16mf2(__VA_ARGS__)

◆ vsoxseg2ei8_v_f16mf2_m

#define vsoxseg2ei8_v_f16mf2_m ( ... ) __riscv_vsoxseg2ei8_v_f16mf2_m(__VA_ARGS__)

◆ vsoxseg2ei8_v_f16mf4

#define vsoxseg2ei8_v_f16mf4 ( ... ) __riscv_vsoxseg2ei8_v_f16mf4(__VA_ARGS__)

◆ vsoxseg2ei8_v_f16mf4_m

#define vsoxseg2ei8_v_f16mf4_m ( ... ) __riscv_vsoxseg2ei8_v_f16mf4_m(__VA_ARGS__)

◆ vsoxseg2ei8_v_f32m1

#define vsoxseg2ei8_v_f32m1 ( ... ) __riscv_vsoxseg2ei8_v_f32m1(__VA_ARGS__)

◆ vsoxseg2ei8_v_f32m1_m

#define vsoxseg2ei8_v_f32m1_m ( ... ) __riscv_vsoxseg2ei8_v_f32m1_m(__VA_ARGS__)

◆ vsoxseg2ei8_v_f32m2

#define vsoxseg2ei8_v_f32m2 ( ... ) __riscv_vsoxseg2ei8_v_f32m2(__VA_ARGS__)

◆ vsoxseg2ei8_v_f32m2_m

#define vsoxseg2ei8_v_f32m2_m ( ... ) __riscv_vsoxseg2ei8_v_f32m2_m(__VA_ARGS__)

◆ vsoxseg2ei8_v_f32m4

#define vsoxseg2ei8_v_f32m4 ( ... ) __riscv_vsoxseg2ei8_v_f32m4(__VA_ARGS__)

◆ vsoxseg2ei8_v_f32m4_m

#define vsoxseg2ei8_v_f32m4_m ( ... ) __riscv_vsoxseg2ei8_v_f32m4_m(__VA_ARGS__)

◆ vsoxseg2ei8_v_f32mf2

#define vsoxseg2ei8_v_f32mf2 ( ... ) __riscv_vsoxseg2ei8_v_f32mf2(__VA_ARGS__)

◆ vsoxseg2ei8_v_f32mf2_m

#define vsoxseg2ei8_v_f32mf2_m ( ... ) __riscv_vsoxseg2ei8_v_f32mf2_m(__VA_ARGS__)

◆ vsoxseg2ei8_v_f64m1

#define vsoxseg2ei8_v_f64m1 ( ... ) __riscv_vsoxseg2ei8_v_f64m1(__VA_ARGS__)

◆ vsoxseg2ei8_v_f64m1_m

#define vsoxseg2ei8_v_f64m1_m ( ... ) __riscv_vsoxseg2ei8_v_f64m1_m(__VA_ARGS__)

◆ vsoxseg2ei8_v_f64m2

#define vsoxseg2ei8_v_f64m2 ( ... ) __riscv_vsoxseg2ei8_v_f64m2(__VA_ARGS__)

◆ vsoxseg2ei8_v_f64m2_m

#define vsoxseg2ei8_v_f64m2_m ( ... ) __riscv_vsoxseg2ei8_v_f64m2_m(__VA_ARGS__)

◆ vsoxseg2ei8_v_f64m4

#define vsoxseg2ei8_v_f64m4 ( ... ) __riscv_vsoxseg2ei8_v_f64m4(__VA_ARGS__)

◆ vsoxseg2ei8_v_f64m4_m

#define vsoxseg2ei8_v_f64m4_m ( ... ) __riscv_vsoxseg2ei8_v_f64m4_m(__VA_ARGS__)

◆ vsoxseg2ei8_v_i16m1

#define vsoxseg2ei8_v_i16m1 ( ... ) __riscv_vsoxseg2ei8_v_i16m1(__VA_ARGS__)

◆ vsoxseg2ei8_v_i16m1_m

#define vsoxseg2ei8_v_i16m1_m ( ... ) __riscv_vsoxseg2ei8_v_i16m1_m(__VA_ARGS__)

◆ vsoxseg2ei8_v_i16m2

#define vsoxseg2ei8_v_i16m2 ( ... ) __riscv_vsoxseg2ei8_v_i16m2(__VA_ARGS__)

◆ vsoxseg2ei8_v_i16m2_m

#define vsoxseg2ei8_v_i16m2_m ( ... ) __riscv_vsoxseg2ei8_v_i16m2_m(__VA_ARGS__)

◆ vsoxseg2ei8_v_i16m4

#define vsoxseg2ei8_v_i16m4 ( ... ) __riscv_vsoxseg2ei8_v_i16m4(__VA_ARGS__)

◆ vsoxseg2ei8_v_i16m4_m

#define vsoxseg2ei8_v_i16m4_m ( ... ) __riscv_vsoxseg2ei8_v_i16m4_m(__VA_ARGS__)

◆ vsoxseg2ei8_v_i16mf2

#define vsoxseg2ei8_v_i16mf2 ( ... ) __riscv_vsoxseg2ei8_v_i16mf2(__VA_ARGS__)

◆ vsoxseg2ei8_v_i16mf2_m

#define vsoxseg2ei8_v_i16mf2_m ( ... ) __riscv_vsoxseg2ei8_v_i16mf2_m(__VA_ARGS__)

◆ vsoxseg2ei8_v_i16mf4

#define vsoxseg2ei8_v_i16mf4 ( ... ) __riscv_vsoxseg2ei8_v_i16mf4(__VA_ARGS__)

◆ vsoxseg2ei8_v_i16mf4_m

#define vsoxseg2ei8_v_i16mf4_m ( ... ) __riscv_vsoxseg2ei8_v_i16mf4_m(__VA_ARGS__)

◆ vsoxseg2ei8_v_i32m1

#define vsoxseg2ei8_v_i32m1 ( ... ) __riscv_vsoxseg2ei8_v_i32m1(__VA_ARGS__)

◆ vsoxseg2ei8_v_i32m1_m

#define vsoxseg2ei8_v_i32m1_m ( ... ) __riscv_vsoxseg2ei8_v_i32m1_m(__VA_ARGS__)

◆ vsoxseg2ei8_v_i32m2

#define vsoxseg2ei8_v_i32m2 ( ... ) __riscv_vsoxseg2ei8_v_i32m2(__VA_ARGS__)

◆ vsoxseg2ei8_v_i32m2_m

#define vsoxseg2ei8_v_i32m2_m ( ... ) __riscv_vsoxseg2ei8_v_i32m2_m(__VA_ARGS__)

◆ vsoxseg2ei8_v_i32m4

#define vsoxseg2ei8_v_i32m4 ( ... ) __riscv_vsoxseg2ei8_v_i32m4(__VA_ARGS__)

◆ vsoxseg2ei8_v_i32m4_m

#define vsoxseg2ei8_v_i32m4_m ( ... ) __riscv_vsoxseg2ei8_v_i32m4_m(__VA_ARGS__)

◆ vsoxseg2ei8_v_i32mf2

#define vsoxseg2ei8_v_i32mf2 ( ... ) __riscv_vsoxseg2ei8_v_i32mf2(__VA_ARGS__)

◆ vsoxseg2ei8_v_i32mf2_m

#define vsoxseg2ei8_v_i32mf2_m ( ... ) __riscv_vsoxseg2ei8_v_i32mf2_m(__VA_ARGS__)

◆ vsoxseg2ei8_v_i64m1

#define vsoxseg2ei8_v_i64m1 ( ... ) __riscv_vsoxseg2ei8_v_i64m1(__VA_ARGS__)

◆ vsoxseg2ei8_v_i64m1_m

#define vsoxseg2ei8_v_i64m1_m ( ... ) __riscv_vsoxseg2ei8_v_i64m1_m(__VA_ARGS__)

◆ vsoxseg2ei8_v_i64m2

#define vsoxseg2ei8_v_i64m2 ( ... ) __riscv_vsoxseg2ei8_v_i64m2(__VA_ARGS__)

◆ vsoxseg2ei8_v_i64m2_m

#define vsoxseg2ei8_v_i64m2_m ( ... ) __riscv_vsoxseg2ei8_v_i64m2_m(__VA_ARGS__)

◆ vsoxseg2ei8_v_i64m4

#define vsoxseg2ei8_v_i64m4 ( ... ) __riscv_vsoxseg2ei8_v_i64m4(__VA_ARGS__)

◆ vsoxseg2ei8_v_i64m4_m

#define vsoxseg2ei8_v_i64m4_m ( ... ) __riscv_vsoxseg2ei8_v_i64m4_m(__VA_ARGS__)

◆ vsoxseg2ei8_v_i8m1

#define vsoxseg2ei8_v_i8m1 ( ... ) __riscv_vsoxseg2ei8_v_i8m1(__VA_ARGS__)

◆ vsoxseg2ei8_v_i8m1_m

#define vsoxseg2ei8_v_i8m1_m ( ... ) __riscv_vsoxseg2ei8_v_i8m1_m(__VA_ARGS__)

◆ vsoxseg2ei8_v_i8m2

#define vsoxseg2ei8_v_i8m2 ( ... ) __riscv_vsoxseg2ei8_v_i8m2(__VA_ARGS__)

◆ vsoxseg2ei8_v_i8m2_m

#define vsoxseg2ei8_v_i8m2_m ( ... ) __riscv_vsoxseg2ei8_v_i8m2_m(__VA_ARGS__)

◆ vsoxseg2ei8_v_i8m4

#define vsoxseg2ei8_v_i8m4 ( ... ) __riscv_vsoxseg2ei8_v_i8m4(__VA_ARGS__)

◆ vsoxseg2ei8_v_i8m4_m

#define vsoxseg2ei8_v_i8m4_m ( ... ) __riscv_vsoxseg2ei8_v_i8m4_m(__VA_ARGS__)

◆ vsoxseg2ei8_v_i8mf2

#define vsoxseg2ei8_v_i8mf2 ( ... ) __riscv_vsoxseg2ei8_v_i8mf2(__VA_ARGS__)

◆ vsoxseg2ei8_v_i8mf2_m

#define vsoxseg2ei8_v_i8mf2_m ( ... ) __riscv_vsoxseg2ei8_v_i8mf2_m(__VA_ARGS__)

◆ vsoxseg2ei8_v_i8mf4

#define vsoxseg2ei8_v_i8mf4 ( ... ) __riscv_vsoxseg2ei8_v_i8mf4(__VA_ARGS__)

◆ vsoxseg2ei8_v_i8mf4_m

#define vsoxseg2ei8_v_i8mf4_m ( ... ) __riscv_vsoxseg2ei8_v_i8mf4_m(__VA_ARGS__)

◆ vsoxseg2ei8_v_i8mf8

#define vsoxseg2ei8_v_i8mf8 ( ... ) __riscv_vsoxseg2ei8_v_i8mf8(__VA_ARGS__)

◆ vsoxseg2ei8_v_i8mf8_m

#define vsoxseg2ei8_v_i8mf8_m ( ... ) __riscv_vsoxseg2ei8_v_i8mf8_m(__VA_ARGS__)

◆ vsoxseg2ei8_v_u16m1

#define vsoxseg2ei8_v_u16m1 ( ... ) __riscv_vsoxseg2ei8_v_u16m1(__VA_ARGS__)

◆ vsoxseg2ei8_v_u16m1_m

#define vsoxseg2ei8_v_u16m1_m ( ... ) __riscv_vsoxseg2ei8_v_u16m1_m(__VA_ARGS__)

◆ vsoxseg2ei8_v_u16m2

#define vsoxseg2ei8_v_u16m2 ( ... ) __riscv_vsoxseg2ei8_v_u16m2(__VA_ARGS__)

◆ vsoxseg2ei8_v_u16m2_m

#define vsoxseg2ei8_v_u16m2_m ( ... ) __riscv_vsoxseg2ei8_v_u16m2_m(__VA_ARGS__)

◆ vsoxseg2ei8_v_u16m4

#define vsoxseg2ei8_v_u16m4 ( ... ) __riscv_vsoxseg2ei8_v_u16m4(__VA_ARGS__)

◆ vsoxseg2ei8_v_u16m4_m

#define vsoxseg2ei8_v_u16m4_m ( ... ) __riscv_vsoxseg2ei8_v_u16m4_m(__VA_ARGS__)

◆ vsoxseg2ei8_v_u16mf2

#define vsoxseg2ei8_v_u16mf2 ( ... ) __riscv_vsoxseg2ei8_v_u16mf2(__VA_ARGS__)

◆ vsoxseg2ei8_v_u16mf2_m

#define vsoxseg2ei8_v_u16mf2_m ( ... ) __riscv_vsoxseg2ei8_v_u16mf2_m(__VA_ARGS__)

◆ vsoxseg2ei8_v_u16mf4

#define vsoxseg2ei8_v_u16mf4 ( ... ) __riscv_vsoxseg2ei8_v_u16mf4(__VA_ARGS__)

◆ vsoxseg2ei8_v_u16mf4_m

#define vsoxseg2ei8_v_u16mf4_m ( ... ) __riscv_vsoxseg2ei8_v_u16mf4_m(__VA_ARGS__)

◆ vsoxseg2ei8_v_u32m1

#define vsoxseg2ei8_v_u32m1 ( ... ) __riscv_vsoxseg2ei8_v_u32m1(__VA_ARGS__)

◆ vsoxseg2ei8_v_u32m1_m

#define vsoxseg2ei8_v_u32m1_m ( ... ) __riscv_vsoxseg2ei8_v_u32m1_m(__VA_ARGS__)

◆ vsoxseg2ei8_v_u32m2

#define vsoxseg2ei8_v_u32m2 ( ... ) __riscv_vsoxseg2ei8_v_u32m2(__VA_ARGS__)

◆ vsoxseg2ei8_v_u32m2_m

#define vsoxseg2ei8_v_u32m2_m ( ... ) __riscv_vsoxseg2ei8_v_u32m2_m(__VA_ARGS__)

◆ vsoxseg2ei8_v_u32m4

#define vsoxseg2ei8_v_u32m4 ( ... ) __riscv_vsoxseg2ei8_v_u32m4(__VA_ARGS__)

◆ vsoxseg2ei8_v_u32m4_m

#define vsoxseg2ei8_v_u32m4_m ( ... ) __riscv_vsoxseg2ei8_v_u32m4_m(__VA_ARGS__)

◆ vsoxseg2ei8_v_u32mf2

#define vsoxseg2ei8_v_u32mf2 ( ... ) __riscv_vsoxseg2ei8_v_u32mf2(__VA_ARGS__)

◆ vsoxseg2ei8_v_u32mf2_m

#define vsoxseg2ei8_v_u32mf2_m ( ... ) __riscv_vsoxseg2ei8_v_u32mf2_m(__VA_ARGS__)

◆ vsoxseg2ei8_v_u64m1

#define vsoxseg2ei8_v_u64m1 ( ... ) __riscv_vsoxseg2ei8_v_u64m1(__VA_ARGS__)

◆ vsoxseg2ei8_v_u64m1_m

#define vsoxseg2ei8_v_u64m1_m ( ... ) __riscv_vsoxseg2ei8_v_u64m1_m(__VA_ARGS__)

◆ vsoxseg2ei8_v_u64m2

#define vsoxseg2ei8_v_u64m2 ( ... ) __riscv_vsoxseg2ei8_v_u64m2(__VA_ARGS__)

◆ vsoxseg2ei8_v_u64m2_m

#define vsoxseg2ei8_v_u64m2_m ( ... ) __riscv_vsoxseg2ei8_v_u64m2_m(__VA_ARGS__)

◆ vsoxseg2ei8_v_u64m4

#define vsoxseg2ei8_v_u64m4 ( ... ) __riscv_vsoxseg2ei8_v_u64m4(__VA_ARGS__)

◆ vsoxseg2ei8_v_u64m4_m

#define vsoxseg2ei8_v_u64m4_m ( ... ) __riscv_vsoxseg2ei8_v_u64m4_m(__VA_ARGS__)

◆ vsoxseg2ei8_v_u8m1

#define vsoxseg2ei8_v_u8m1 ( ... ) __riscv_vsoxseg2ei8_v_u8m1(__VA_ARGS__)

◆ vsoxseg2ei8_v_u8m1_m

#define vsoxseg2ei8_v_u8m1_m ( ... ) __riscv_vsoxseg2ei8_v_u8m1_m(__VA_ARGS__)

◆ vsoxseg2ei8_v_u8m2

#define vsoxseg2ei8_v_u8m2 ( ... ) __riscv_vsoxseg2ei8_v_u8m2(__VA_ARGS__)

◆ vsoxseg2ei8_v_u8m2_m

#define vsoxseg2ei8_v_u8m2_m ( ... ) __riscv_vsoxseg2ei8_v_u8m2_m(__VA_ARGS__)

◆ vsoxseg2ei8_v_u8m4

#define vsoxseg2ei8_v_u8m4 ( ... ) __riscv_vsoxseg2ei8_v_u8m4(__VA_ARGS__)

◆ vsoxseg2ei8_v_u8m4_m

#define vsoxseg2ei8_v_u8m4_m ( ... ) __riscv_vsoxseg2ei8_v_u8m4_m(__VA_ARGS__)

◆ vsoxseg2ei8_v_u8mf2

#define vsoxseg2ei8_v_u8mf2 ( ... ) __riscv_vsoxseg2ei8_v_u8mf2(__VA_ARGS__)

◆ vsoxseg2ei8_v_u8mf2_m

#define vsoxseg2ei8_v_u8mf2_m ( ... ) __riscv_vsoxseg2ei8_v_u8mf2_m(__VA_ARGS__)

◆ vsoxseg2ei8_v_u8mf4

#define vsoxseg2ei8_v_u8mf4 ( ... ) __riscv_vsoxseg2ei8_v_u8mf4(__VA_ARGS__)

◆ vsoxseg2ei8_v_u8mf4_m

#define vsoxseg2ei8_v_u8mf4_m ( ... ) __riscv_vsoxseg2ei8_v_u8mf4_m(__VA_ARGS__)

◆ vsoxseg2ei8_v_u8mf8

#define vsoxseg2ei8_v_u8mf8 ( ... ) __riscv_vsoxseg2ei8_v_u8mf8(__VA_ARGS__)

◆ vsoxseg2ei8_v_u8mf8_m

#define vsoxseg2ei8_v_u8mf8_m ( ... ) __riscv_vsoxseg2ei8_v_u8mf8_m(__VA_ARGS__)

◆ vsoxseg3ei16_v_f16m1

#define vsoxseg3ei16_v_f16m1 ( ... ) __riscv_vsoxseg3ei16_v_f16m1(__VA_ARGS__)

◆ vsoxseg3ei16_v_f16m1_m

#define vsoxseg3ei16_v_f16m1_m ( ... ) __riscv_vsoxseg3ei16_v_f16m1_m(__VA_ARGS__)

◆ vsoxseg3ei16_v_f16m2

#define vsoxseg3ei16_v_f16m2 ( ... ) __riscv_vsoxseg3ei16_v_f16m2(__VA_ARGS__)

◆ vsoxseg3ei16_v_f16m2_m

#define vsoxseg3ei16_v_f16m2_m ( ... ) __riscv_vsoxseg3ei16_v_f16m2_m(__VA_ARGS__)

◆ vsoxseg3ei16_v_f16mf2

#define vsoxseg3ei16_v_f16mf2 ( ... ) __riscv_vsoxseg3ei16_v_f16mf2(__VA_ARGS__)

◆ vsoxseg3ei16_v_f16mf2_m

#define vsoxseg3ei16_v_f16mf2_m ( ... ) __riscv_vsoxseg3ei16_v_f16mf2_m(__VA_ARGS__)

◆ vsoxseg3ei16_v_f16mf4

#define vsoxseg3ei16_v_f16mf4 ( ... ) __riscv_vsoxseg3ei16_v_f16mf4(__VA_ARGS__)

◆ vsoxseg3ei16_v_f16mf4_m

#define vsoxseg3ei16_v_f16mf4_m ( ... ) __riscv_vsoxseg3ei16_v_f16mf4_m(__VA_ARGS__)

◆ vsoxseg3ei16_v_f32m1

#define vsoxseg3ei16_v_f32m1 ( ... ) __riscv_vsoxseg3ei16_v_f32m1(__VA_ARGS__)

◆ vsoxseg3ei16_v_f32m1_m

#define vsoxseg3ei16_v_f32m1_m ( ... ) __riscv_vsoxseg3ei16_v_f32m1_m(__VA_ARGS__)

◆ vsoxseg3ei16_v_f32m2

#define vsoxseg3ei16_v_f32m2 ( ... ) __riscv_vsoxseg3ei16_v_f32m2(__VA_ARGS__)

◆ vsoxseg3ei16_v_f32m2_m

#define vsoxseg3ei16_v_f32m2_m ( ... ) __riscv_vsoxseg3ei16_v_f32m2_m(__VA_ARGS__)

◆ vsoxseg3ei16_v_f32mf2

#define vsoxseg3ei16_v_f32mf2 ( ... ) __riscv_vsoxseg3ei16_v_f32mf2(__VA_ARGS__)

◆ vsoxseg3ei16_v_f32mf2_m

#define vsoxseg3ei16_v_f32mf2_m ( ... ) __riscv_vsoxseg3ei16_v_f32mf2_m(__VA_ARGS__)

◆ vsoxseg3ei16_v_f64m1

#define vsoxseg3ei16_v_f64m1 ( ... ) __riscv_vsoxseg3ei16_v_f64m1(__VA_ARGS__)

◆ vsoxseg3ei16_v_f64m1_m

#define vsoxseg3ei16_v_f64m1_m ( ... ) __riscv_vsoxseg3ei16_v_f64m1_m(__VA_ARGS__)

◆ vsoxseg3ei16_v_f64m2

#define vsoxseg3ei16_v_f64m2 ( ... ) __riscv_vsoxseg3ei16_v_f64m2(__VA_ARGS__)

◆ vsoxseg3ei16_v_f64m2_m

#define vsoxseg3ei16_v_f64m2_m ( ... ) __riscv_vsoxseg3ei16_v_f64m2_m(__VA_ARGS__)

◆ vsoxseg3ei16_v_i16m1

#define vsoxseg3ei16_v_i16m1 ( ... ) __riscv_vsoxseg3ei16_v_i16m1(__VA_ARGS__)

◆ vsoxseg3ei16_v_i16m1_m

#define vsoxseg3ei16_v_i16m1_m ( ... ) __riscv_vsoxseg3ei16_v_i16m1_m(__VA_ARGS__)

◆ vsoxseg3ei16_v_i16m2

#define vsoxseg3ei16_v_i16m2 ( ... ) __riscv_vsoxseg3ei16_v_i16m2(__VA_ARGS__)

◆ vsoxseg3ei16_v_i16m2_m

#define vsoxseg3ei16_v_i16m2_m ( ... ) __riscv_vsoxseg3ei16_v_i16m2_m(__VA_ARGS__)

◆ vsoxseg3ei16_v_i16mf2

#define vsoxseg3ei16_v_i16mf2 ( ... ) __riscv_vsoxseg3ei16_v_i16mf2(__VA_ARGS__)

◆ vsoxseg3ei16_v_i16mf2_m

#define vsoxseg3ei16_v_i16mf2_m ( ... ) __riscv_vsoxseg3ei16_v_i16mf2_m(__VA_ARGS__)

◆ vsoxseg3ei16_v_i16mf4

#define vsoxseg3ei16_v_i16mf4 ( ... ) __riscv_vsoxseg3ei16_v_i16mf4(__VA_ARGS__)

◆ vsoxseg3ei16_v_i16mf4_m

#define vsoxseg3ei16_v_i16mf4_m ( ... ) __riscv_vsoxseg3ei16_v_i16mf4_m(__VA_ARGS__)

◆ vsoxseg3ei16_v_i32m1

#define vsoxseg3ei16_v_i32m1 ( ... ) __riscv_vsoxseg3ei16_v_i32m1(__VA_ARGS__)

◆ vsoxseg3ei16_v_i32m1_m

#define vsoxseg3ei16_v_i32m1_m ( ... ) __riscv_vsoxseg3ei16_v_i32m1_m(__VA_ARGS__)

◆ vsoxseg3ei16_v_i32m2

#define vsoxseg3ei16_v_i32m2 ( ... ) __riscv_vsoxseg3ei16_v_i32m2(__VA_ARGS__)

◆ vsoxseg3ei16_v_i32m2_m

#define vsoxseg3ei16_v_i32m2_m ( ... ) __riscv_vsoxseg3ei16_v_i32m2_m(__VA_ARGS__)

◆ vsoxseg3ei16_v_i32mf2

#define vsoxseg3ei16_v_i32mf2 ( ... ) __riscv_vsoxseg3ei16_v_i32mf2(__VA_ARGS__)

◆ vsoxseg3ei16_v_i32mf2_m

#define vsoxseg3ei16_v_i32mf2_m ( ... ) __riscv_vsoxseg3ei16_v_i32mf2_m(__VA_ARGS__)

◆ vsoxseg3ei16_v_i64m1

#define vsoxseg3ei16_v_i64m1 ( ... ) __riscv_vsoxseg3ei16_v_i64m1(__VA_ARGS__)

◆ vsoxseg3ei16_v_i64m1_m

#define vsoxseg3ei16_v_i64m1_m ( ... ) __riscv_vsoxseg3ei16_v_i64m1_m(__VA_ARGS__)

◆ vsoxseg3ei16_v_i64m2

#define vsoxseg3ei16_v_i64m2 ( ... ) __riscv_vsoxseg3ei16_v_i64m2(__VA_ARGS__)

◆ vsoxseg3ei16_v_i64m2_m

#define vsoxseg3ei16_v_i64m2_m ( ... ) __riscv_vsoxseg3ei16_v_i64m2_m(__VA_ARGS__)

◆ vsoxseg3ei16_v_i8m1

#define vsoxseg3ei16_v_i8m1 ( ... ) __riscv_vsoxseg3ei16_v_i8m1(__VA_ARGS__)

◆ vsoxseg3ei16_v_i8m1_m

#define vsoxseg3ei16_v_i8m1_m ( ... ) __riscv_vsoxseg3ei16_v_i8m1_m(__VA_ARGS__)

◆ vsoxseg3ei16_v_i8m2

#define vsoxseg3ei16_v_i8m2 ( ... ) __riscv_vsoxseg3ei16_v_i8m2(__VA_ARGS__)

◆ vsoxseg3ei16_v_i8m2_m

#define vsoxseg3ei16_v_i8m2_m ( ... ) __riscv_vsoxseg3ei16_v_i8m2_m(__VA_ARGS__)

◆ vsoxseg3ei16_v_i8mf2

#define vsoxseg3ei16_v_i8mf2 ( ... ) __riscv_vsoxseg3ei16_v_i8mf2(__VA_ARGS__)

◆ vsoxseg3ei16_v_i8mf2_m

#define vsoxseg3ei16_v_i8mf2_m ( ... ) __riscv_vsoxseg3ei16_v_i8mf2_m(__VA_ARGS__)

◆ vsoxseg3ei16_v_i8mf4

#define vsoxseg3ei16_v_i8mf4 ( ... ) __riscv_vsoxseg3ei16_v_i8mf4(__VA_ARGS__)

◆ vsoxseg3ei16_v_i8mf4_m

#define vsoxseg3ei16_v_i8mf4_m ( ... ) __riscv_vsoxseg3ei16_v_i8mf4_m(__VA_ARGS__)

◆ vsoxseg3ei16_v_i8mf8

#define vsoxseg3ei16_v_i8mf8 ( ... ) __riscv_vsoxseg3ei16_v_i8mf8(__VA_ARGS__)

◆ vsoxseg3ei16_v_i8mf8_m

#define vsoxseg3ei16_v_i8mf8_m ( ... ) __riscv_vsoxseg3ei16_v_i8mf8_m(__VA_ARGS__)

◆ vsoxseg3ei16_v_u16m1

#define vsoxseg3ei16_v_u16m1 ( ... ) __riscv_vsoxseg3ei16_v_u16m1(__VA_ARGS__)

◆ vsoxseg3ei16_v_u16m1_m

#define vsoxseg3ei16_v_u16m1_m ( ... ) __riscv_vsoxseg3ei16_v_u16m1_m(__VA_ARGS__)

◆ vsoxseg3ei16_v_u16m2

#define vsoxseg3ei16_v_u16m2 ( ... ) __riscv_vsoxseg3ei16_v_u16m2(__VA_ARGS__)

◆ vsoxseg3ei16_v_u16m2_m

#define vsoxseg3ei16_v_u16m2_m ( ... ) __riscv_vsoxseg3ei16_v_u16m2_m(__VA_ARGS__)

◆ vsoxseg3ei16_v_u16mf2

#define vsoxseg3ei16_v_u16mf2 ( ... ) __riscv_vsoxseg3ei16_v_u16mf2(__VA_ARGS__)

◆ vsoxseg3ei16_v_u16mf2_m

#define vsoxseg3ei16_v_u16mf2_m ( ... ) __riscv_vsoxseg3ei16_v_u16mf2_m(__VA_ARGS__)

◆ vsoxseg3ei16_v_u16mf4

#define vsoxseg3ei16_v_u16mf4 ( ... ) __riscv_vsoxseg3ei16_v_u16mf4(__VA_ARGS__)

◆ vsoxseg3ei16_v_u16mf4_m

#define vsoxseg3ei16_v_u16mf4_m ( ... ) __riscv_vsoxseg3ei16_v_u16mf4_m(__VA_ARGS__)

◆ vsoxseg3ei16_v_u32m1

#define vsoxseg3ei16_v_u32m1 ( ... ) __riscv_vsoxseg3ei16_v_u32m1(__VA_ARGS__)

◆ vsoxseg3ei16_v_u32m1_m

#define vsoxseg3ei16_v_u32m1_m ( ... ) __riscv_vsoxseg3ei16_v_u32m1_m(__VA_ARGS__)

◆ vsoxseg3ei16_v_u32m2

#define vsoxseg3ei16_v_u32m2 ( ... ) __riscv_vsoxseg3ei16_v_u32m2(__VA_ARGS__)

◆ vsoxseg3ei16_v_u32m2_m

#define vsoxseg3ei16_v_u32m2_m ( ... ) __riscv_vsoxseg3ei16_v_u32m2_m(__VA_ARGS__)

◆ vsoxseg3ei16_v_u32mf2

#define vsoxseg3ei16_v_u32mf2 ( ... ) __riscv_vsoxseg3ei16_v_u32mf2(__VA_ARGS__)

◆ vsoxseg3ei16_v_u32mf2_m

#define vsoxseg3ei16_v_u32mf2_m ( ... ) __riscv_vsoxseg3ei16_v_u32mf2_m(__VA_ARGS__)

◆ vsoxseg3ei16_v_u64m1

#define vsoxseg3ei16_v_u64m1 ( ... ) __riscv_vsoxseg3ei16_v_u64m1(__VA_ARGS__)

◆ vsoxseg3ei16_v_u64m1_m

#define vsoxseg3ei16_v_u64m1_m ( ... ) __riscv_vsoxseg3ei16_v_u64m1_m(__VA_ARGS__)

◆ vsoxseg3ei16_v_u64m2

#define vsoxseg3ei16_v_u64m2 ( ... ) __riscv_vsoxseg3ei16_v_u64m2(__VA_ARGS__)

◆ vsoxseg3ei16_v_u64m2_m

#define vsoxseg3ei16_v_u64m2_m ( ... ) __riscv_vsoxseg3ei16_v_u64m2_m(__VA_ARGS__)

◆ vsoxseg3ei16_v_u8m1

#define vsoxseg3ei16_v_u8m1 ( ... ) __riscv_vsoxseg3ei16_v_u8m1(__VA_ARGS__)

◆ vsoxseg3ei16_v_u8m1_m

#define vsoxseg3ei16_v_u8m1_m ( ... ) __riscv_vsoxseg3ei16_v_u8m1_m(__VA_ARGS__)

◆ vsoxseg3ei16_v_u8m2

#define vsoxseg3ei16_v_u8m2 ( ... ) __riscv_vsoxseg3ei16_v_u8m2(__VA_ARGS__)

◆ vsoxseg3ei16_v_u8m2_m

#define vsoxseg3ei16_v_u8m2_m ( ... ) __riscv_vsoxseg3ei16_v_u8m2_m(__VA_ARGS__)

◆ vsoxseg3ei16_v_u8mf2

#define vsoxseg3ei16_v_u8mf2 ( ... ) __riscv_vsoxseg3ei16_v_u8mf2(__VA_ARGS__)

◆ vsoxseg3ei16_v_u8mf2_m

#define vsoxseg3ei16_v_u8mf2_m ( ... ) __riscv_vsoxseg3ei16_v_u8mf2_m(__VA_ARGS__)

◆ vsoxseg3ei16_v_u8mf4

#define vsoxseg3ei16_v_u8mf4 ( ... ) __riscv_vsoxseg3ei16_v_u8mf4(__VA_ARGS__)

◆ vsoxseg3ei16_v_u8mf4_m

#define vsoxseg3ei16_v_u8mf4_m ( ... ) __riscv_vsoxseg3ei16_v_u8mf4_m(__VA_ARGS__)

◆ vsoxseg3ei16_v_u8mf8

#define vsoxseg3ei16_v_u8mf8 ( ... ) __riscv_vsoxseg3ei16_v_u8mf8(__VA_ARGS__)

◆ vsoxseg3ei16_v_u8mf8_m

#define vsoxseg3ei16_v_u8mf8_m ( ... ) __riscv_vsoxseg3ei16_v_u8mf8_m(__VA_ARGS__)

◆ vsoxseg3ei32_v_f16m1

#define vsoxseg3ei32_v_f16m1 ( ... ) __riscv_vsoxseg3ei32_v_f16m1(__VA_ARGS__)

◆ vsoxseg3ei32_v_f16m1_m

#define vsoxseg3ei32_v_f16m1_m ( ... ) __riscv_vsoxseg3ei32_v_f16m1_m(__VA_ARGS__)

◆ vsoxseg3ei32_v_f16m2

#define vsoxseg3ei32_v_f16m2 ( ... ) __riscv_vsoxseg3ei32_v_f16m2(__VA_ARGS__)

◆ vsoxseg3ei32_v_f16m2_m

#define vsoxseg3ei32_v_f16m2_m ( ... ) __riscv_vsoxseg3ei32_v_f16m2_m(__VA_ARGS__)

◆ vsoxseg3ei32_v_f16mf2

#define vsoxseg3ei32_v_f16mf2 ( ... ) __riscv_vsoxseg3ei32_v_f16mf2(__VA_ARGS__)

◆ vsoxseg3ei32_v_f16mf2_m

#define vsoxseg3ei32_v_f16mf2_m ( ... ) __riscv_vsoxseg3ei32_v_f16mf2_m(__VA_ARGS__)

◆ vsoxseg3ei32_v_f16mf4

#define vsoxseg3ei32_v_f16mf4 ( ... ) __riscv_vsoxseg3ei32_v_f16mf4(__VA_ARGS__)

◆ vsoxseg3ei32_v_f16mf4_m

#define vsoxseg3ei32_v_f16mf4_m ( ... ) __riscv_vsoxseg3ei32_v_f16mf4_m(__VA_ARGS__)

◆ vsoxseg3ei32_v_f32m1

#define vsoxseg3ei32_v_f32m1 ( ... ) __riscv_vsoxseg3ei32_v_f32m1(__VA_ARGS__)

◆ vsoxseg3ei32_v_f32m1_m

#define vsoxseg3ei32_v_f32m1_m ( ... ) __riscv_vsoxseg3ei32_v_f32m1_m(__VA_ARGS__)

◆ vsoxseg3ei32_v_f32m2

#define vsoxseg3ei32_v_f32m2 ( ... ) __riscv_vsoxseg3ei32_v_f32m2(__VA_ARGS__)

◆ vsoxseg3ei32_v_f32m2_m

#define vsoxseg3ei32_v_f32m2_m ( ... ) __riscv_vsoxseg3ei32_v_f32m2_m(__VA_ARGS__)

◆ vsoxseg3ei32_v_f32mf2

#define vsoxseg3ei32_v_f32mf2 ( ... ) __riscv_vsoxseg3ei32_v_f32mf2(__VA_ARGS__)

◆ vsoxseg3ei32_v_f32mf2_m

#define vsoxseg3ei32_v_f32mf2_m ( ... ) __riscv_vsoxseg3ei32_v_f32mf2_m(__VA_ARGS__)

◆ vsoxseg3ei32_v_f64m1

#define vsoxseg3ei32_v_f64m1 ( ... ) __riscv_vsoxseg3ei32_v_f64m1(__VA_ARGS__)

◆ vsoxseg3ei32_v_f64m1_m

#define vsoxseg3ei32_v_f64m1_m ( ... ) __riscv_vsoxseg3ei32_v_f64m1_m(__VA_ARGS__)

◆ vsoxseg3ei32_v_f64m2

#define vsoxseg3ei32_v_f64m2 ( ... ) __riscv_vsoxseg3ei32_v_f64m2(__VA_ARGS__)

◆ vsoxseg3ei32_v_f64m2_m

#define vsoxseg3ei32_v_f64m2_m ( ... ) __riscv_vsoxseg3ei32_v_f64m2_m(__VA_ARGS__)

◆ vsoxseg3ei32_v_i16m1

#define vsoxseg3ei32_v_i16m1 ( ... ) __riscv_vsoxseg3ei32_v_i16m1(__VA_ARGS__)

◆ vsoxseg3ei32_v_i16m1_m

#define vsoxseg3ei32_v_i16m1_m ( ... ) __riscv_vsoxseg3ei32_v_i16m1_m(__VA_ARGS__)

◆ vsoxseg3ei32_v_i16m2

#define vsoxseg3ei32_v_i16m2 ( ... ) __riscv_vsoxseg3ei32_v_i16m2(__VA_ARGS__)

◆ vsoxseg3ei32_v_i16m2_m

#define vsoxseg3ei32_v_i16m2_m ( ... ) __riscv_vsoxseg3ei32_v_i16m2_m(__VA_ARGS__)

◆ vsoxseg3ei32_v_i16mf2

#define vsoxseg3ei32_v_i16mf2 ( ... ) __riscv_vsoxseg3ei32_v_i16mf2(__VA_ARGS__)

◆ vsoxseg3ei32_v_i16mf2_m

#define vsoxseg3ei32_v_i16mf2_m ( ... ) __riscv_vsoxseg3ei32_v_i16mf2_m(__VA_ARGS__)

◆ vsoxseg3ei32_v_i16mf4

#define vsoxseg3ei32_v_i16mf4 ( ... ) __riscv_vsoxseg3ei32_v_i16mf4(__VA_ARGS__)

◆ vsoxseg3ei32_v_i16mf4_m

#define vsoxseg3ei32_v_i16mf4_m ( ... ) __riscv_vsoxseg3ei32_v_i16mf4_m(__VA_ARGS__)

◆ vsoxseg3ei32_v_i32m1

#define vsoxseg3ei32_v_i32m1 ( ... ) __riscv_vsoxseg3ei32_v_i32m1(__VA_ARGS__)

◆ vsoxseg3ei32_v_i32m1_m

#define vsoxseg3ei32_v_i32m1_m ( ... ) __riscv_vsoxseg3ei32_v_i32m1_m(__VA_ARGS__)

◆ vsoxseg3ei32_v_i32m2

#define vsoxseg3ei32_v_i32m2 ( ... ) __riscv_vsoxseg3ei32_v_i32m2(__VA_ARGS__)

◆ vsoxseg3ei32_v_i32m2_m

#define vsoxseg3ei32_v_i32m2_m ( ... ) __riscv_vsoxseg3ei32_v_i32m2_m(__VA_ARGS__)

◆ vsoxseg3ei32_v_i32mf2

#define vsoxseg3ei32_v_i32mf2 ( ... ) __riscv_vsoxseg3ei32_v_i32mf2(__VA_ARGS__)

◆ vsoxseg3ei32_v_i32mf2_m

#define vsoxseg3ei32_v_i32mf2_m ( ... ) __riscv_vsoxseg3ei32_v_i32mf2_m(__VA_ARGS__)

◆ vsoxseg3ei32_v_i64m1

#define vsoxseg3ei32_v_i64m1 ( ... ) __riscv_vsoxseg3ei32_v_i64m1(__VA_ARGS__)

◆ vsoxseg3ei32_v_i64m1_m

#define vsoxseg3ei32_v_i64m1_m ( ... ) __riscv_vsoxseg3ei32_v_i64m1_m(__VA_ARGS__)

◆ vsoxseg3ei32_v_i64m2

#define vsoxseg3ei32_v_i64m2 ( ... ) __riscv_vsoxseg3ei32_v_i64m2(__VA_ARGS__)

◆ vsoxseg3ei32_v_i64m2_m

#define vsoxseg3ei32_v_i64m2_m ( ... ) __riscv_vsoxseg3ei32_v_i64m2_m(__VA_ARGS__)

◆ vsoxseg3ei32_v_i8m1

#define vsoxseg3ei32_v_i8m1 ( ... ) __riscv_vsoxseg3ei32_v_i8m1(__VA_ARGS__)

◆ vsoxseg3ei32_v_i8m1_m

#define vsoxseg3ei32_v_i8m1_m ( ... ) __riscv_vsoxseg3ei32_v_i8m1_m(__VA_ARGS__)

◆ vsoxseg3ei32_v_i8m2

#define vsoxseg3ei32_v_i8m2 ( ... ) __riscv_vsoxseg3ei32_v_i8m2(__VA_ARGS__)

◆ vsoxseg3ei32_v_i8m2_m

#define vsoxseg3ei32_v_i8m2_m ( ... ) __riscv_vsoxseg3ei32_v_i8m2_m(__VA_ARGS__)

◆ vsoxseg3ei32_v_i8mf2

#define vsoxseg3ei32_v_i8mf2 ( ... ) __riscv_vsoxseg3ei32_v_i8mf2(__VA_ARGS__)

◆ vsoxseg3ei32_v_i8mf2_m

#define vsoxseg3ei32_v_i8mf2_m ( ... ) __riscv_vsoxseg3ei32_v_i8mf2_m(__VA_ARGS__)

◆ vsoxseg3ei32_v_i8mf4

#define vsoxseg3ei32_v_i8mf4 ( ... ) __riscv_vsoxseg3ei32_v_i8mf4(__VA_ARGS__)

◆ vsoxseg3ei32_v_i8mf4_m

#define vsoxseg3ei32_v_i8mf4_m ( ... ) __riscv_vsoxseg3ei32_v_i8mf4_m(__VA_ARGS__)

◆ vsoxseg3ei32_v_i8mf8

#define vsoxseg3ei32_v_i8mf8 ( ... ) __riscv_vsoxseg3ei32_v_i8mf8(__VA_ARGS__)

◆ vsoxseg3ei32_v_i8mf8_m

#define vsoxseg3ei32_v_i8mf8_m ( ... ) __riscv_vsoxseg3ei32_v_i8mf8_m(__VA_ARGS__)

◆ vsoxseg3ei32_v_u16m1

#define vsoxseg3ei32_v_u16m1 ( ... ) __riscv_vsoxseg3ei32_v_u16m1(__VA_ARGS__)

◆ vsoxseg3ei32_v_u16m1_m

#define vsoxseg3ei32_v_u16m1_m ( ... ) __riscv_vsoxseg3ei32_v_u16m1_m(__VA_ARGS__)

◆ vsoxseg3ei32_v_u16m2

#define vsoxseg3ei32_v_u16m2 ( ... ) __riscv_vsoxseg3ei32_v_u16m2(__VA_ARGS__)

◆ vsoxseg3ei32_v_u16m2_m

#define vsoxseg3ei32_v_u16m2_m ( ... ) __riscv_vsoxseg3ei32_v_u16m2_m(__VA_ARGS__)

◆ vsoxseg3ei32_v_u16mf2

#define vsoxseg3ei32_v_u16mf2 ( ... ) __riscv_vsoxseg3ei32_v_u16mf2(__VA_ARGS__)

◆ vsoxseg3ei32_v_u16mf2_m

#define vsoxseg3ei32_v_u16mf2_m ( ... ) __riscv_vsoxseg3ei32_v_u16mf2_m(__VA_ARGS__)

◆ vsoxseg3ei32_v_u16mf4

#define vsoxseg3ei32_v_u16mf4 ( ... ) __riscv_vsoxseg3ei32_v_u16mf4(__VA_ARGS__)

◆ vsoxseg3ei32_v_u16mf4_m

#define vsoxseg3ei32_v_u16mf4_m ( ... ) __riscv_vsoxseg3ei32_v_u16mf4_m(__VA_ARGS__)

◆ vsoxseg3ei32_v_u32m1

#define vsoxseg3ei32_v_u32m1 ( ... ) __riscv_vsoxseg3ei32_v_u32m1(__VA_ARGS__)

◆ vsoxseg3ei32_v_u32m1_m

#define vsoxseg3ei32_v_u32m1_m ( ... ) __riscv_vsoxseg3ei32_v_u32m1_m(__VA_ARGS__)

◆ vsoxseg3ei32_v_u32m2

#define vsoxseg3ei32_v_u32m2 ( ... ) __riscv_vsoxseg3ei32_v_u32m2(__VA_ARGS__)

◆ vsoxseg3ei32_v_u32m2_m

#define vsoxseg3ei32_v_u32m2_m ( ... ) __riscv_vsoxseg3ei32_v_u32m2_m(__VA_ARGS__)

◆ vsoxseg3ei32_v_u32mf2

#define vsoxseg3ei32_v_u32mf2 ( ... ) __riscv_vsoxseg3ei32_v_u32mf2(__VA_ARGS__)

◆ vsoxseg3ei32_v_u32mf2_m

#define vsoxseg3ei32_v_u32mf2_m ( ... ) __riscv_vsoxseg3ei32_v_u32mf2_m(__VA_ARGS__)

◆ vsoxseg3ei32_v_u64m1

#define vsoxseg3ei32_v_u64m1 ( ... ) __riscv_vsoxseg3ei32_v_u64m1(__VA_ARGS__)

◆ vsoxseg3ei32_v_u64m1_m

#define vsoxseg3ei32_v_u64m1_m ( ... ) __riscv_vsoxseg3ei32_v_u64m1_m(__VA_ARGS__)

◆ vsoxseg3ei32_v_u64m2

#define vsoxseg3ei32_v_u64m2 ( ... ) __riscv_vsoxseg3ei32_v_u64m2(__VA_ARGS__)

◆ vsoxseg3ei32_v_u64m2_m

#define vsoxseg3ei32_v_u64m2_m ( ... ) __riscv_vsoxseg3ei32_v_u64m2_m(__VA_ARGS__)

◆ vsoxseg3ei32_v_u8m1

#define vsoxseg3ei32_v_u8m1 ( ... ) __riscv_vsoxseg3ei32_v_u8m1(__VA_ARGS__)

◆ vsoxseg3ei32_v_u8m1_m

#define vsoxseg3ei32_v_u8m1_m ( ... ) __riscv_vsoxseg3ei32_v_u8m1_m(__VA_ARGS__)

◆ vsoxseg3ei32_v_u8m2

#define vsoxseg3ei32_v_u8m2 ( ... ) __riscv_vsoxseg3ei32_v_u8m2(__VA_ARGS__)

◆ vsoxseg3ei32_v_u8m2_m

#define vsoxseg3ei32_v_u8m2_m ( ... ) __riscv_vsoxseg3ei32_v_u8m2_m(__VA_ARGS__)

◆ vsoxseg3ei32_v_u8mf2

#define vsoxseg3ei32_v_u8mf2 ( ... ) __riscv_vsoxseg3ei32_v_u8mf2(__VA_ARGS__)

◆ vsoxseg3ei32_v_u8mf2_m

#define vsoxseg3ei32_v_u8mf2_m ( ... ) __riscv_vsoxseg3ei32_v_u8mf2_m(__VA_ARGS__)

◆ vsoxseg3ei32_v_u8mf4

#define vsoxseg3ei32_v_u8mf4 ( ... ) __riscv_vsoxseg3ei32_v_u8mf4(__VA_ARGS__)

◆ vsoxseg3ei32_v_u8mf4_m

#define vsoxseg3ei32_v_u8mf4_m ( ... ) __riscv_vsoxseg3ei32_v_u8mf4_m(__VA_ARGS__)

◆ vsoxseg3ei32_v_u8mf8

#define vsoxseg3ei32_v_u8mf8 ( ... ) __riscv_vsoxseg3ei32_v_u8mf8(__VA_ARGS__)

◆ vsoxseg3ei32_v_u8mf8_m

#define vsoxseg3ei32_v_u8mf8_m ( ... ) __riscv_vsoxseg3ei32_v_u8mf8_m(__VA_ARGS__)

◆ vsoxseg3ei64_v_f16m1

#define vsoxseg3ei64_v_f16m1 ( ... ) __riscv_vsoxseg3ei64_v_f16m1(__VA_ARGS__)

◆ vsoxseg3ei64_v_f16m1_m

#define vsoxseg3ei64_v_f16m1_m ( ... ) __riscv_vsoxseg3ei64_v_f16m1_m(__VA_ARGS__)

◆ vsoxseg3ei64_v_f16m2

#define vsoxseg3ei64_v_f16m2 ( ... ) __riscv_vsoxseg3ei64_v_f16m2(__VA_ARGS__)

◆ vsoxseg3ei64_v_f16m2_m

#define vsoxseg3ei64_v_f16m2_m ( ... ) __riscv_vsoxseg3ei64_v_f16m2_m(__VA_ARGS__)

◆ vsoxseg3ei64_v_f16mf2

#define vsoxseg3ei64_v_f16mf2 ( ... ) __riscv_vsoxseg3ei64_v_f16mf2(__VA_ARGS__)

◆ vsoxseg3ei64_v_f16mf2_m

#define vsoxseg3ei64_v_f16mf2_m ( ... ) __riscv_vsoxseg3ei64_v_f16mf2_m(__VA_ARGS__)

◆ vsoxseg3ei64_v_f16mf4

#define vsoxseg3ei64_v_f16mf4 ( ... ) __riscv_vsoxseg3ei64_v_f16mf4(__VA_ARGS__)

◆ vsoxseg3ei64_v_f16mf4_m

#define vsoxseg3ei64_v_f16mf4_m ( ... ) __riscv_vsoxseg3ei64_v_f16mf4_m(__VA_ARGS__)

◆ vsoxseg3ei64_v_f32m1

#define vsoxseg3ei64_v_f32m1 ( ... ) __riscv_vsoxseg3ei64_v_f32m1(__VA_ARGS__)

◆ vsoxseg3ei64_v_f32m1_m

#define vsoxseg3ei64_v_f32m1_m ( ... ) __riscv_vsoxseg3ei64_v_f32m1_m(__VA_ARGS__)

◆ vsoxseg3ei64_v_f32m2

#define vsoxseg3ei64_v_f32m2 ( ... ) __riscv_vsoxseg3ei64_v_f32m2(__VA_ARGS__)

◆ vsoxseg3ei64_v_f32m2_m

#define vsoxseg3ei64_v_f32m2_m ( ... ) __riscv_vsoxseg3ei64_v_f32m2_m(__VA_ARGS__)

◆ vsoxseg3ei64_v_f32mf2

#define vsoxseg3ei64_v_f32mf2 ( ... ) __riscv_vsoxseg3ei64_v_f32mf2(__VA_ARGS__)

◆ vsoxseg3ei64_v_f32mf2_m

#define vsoxseg3ei64_v_f32mf2_m ( ... ) __riscv_vsoxseg3ei64_v_f32mf2_m(__VA_ARGS__)

◆ vsoxseg3ei64_v_f64m1

#define vsoxseg3ei64_v_f64m1 ( ... ) __riscv_vsoxseg3ei64_v_f64m1(__VA_ARGS__)

◆ vsoxseg3ei64_v_f64m1_m

#define vsoxseg3ei64_v_f64m1_m ( ... ) __riscv_vsoxseg3ei64_v_f64m1_m(__VA_ARGS__)

◆ vsoxseg3ei64_v_f64m2

#define vsoxseg3ei64_v_f64m2 ( ... ) __riscv_vsoxseg3ei64_v_f64m2(__VA_ARGS__)

◆ vsoxseg3ei64_v_f64m2_m

#define vsoxseg3ei64_v_f64m2_m ( ... ) __riscv_vsoxseg3ei64_v_f64m2_m(__VA_ARGS__)

◆ vsoxseg3ei64_v_i16m1

#define vsoxseg3ei64_v_i16m1 ( ... ) __riscv_vsoxseg3ei64_v_i16m1(__VA_ARGS__)

◆ vsoxseg3ei64_v_i16m1_m

#define vsoxseg3ei64_v_i16m1_m ( ... ) __riscv_vsoxseg3ei64_v_i16m1_m(__VA_ARGS__)

◆ vsoxseg3ei64_v_i16m2

#define vsoxseg3ei64_v_i16m2 ( ... ) __riscv_vsoxseg3ei64_v_i16m2(__VA_ARGS__)

◆ vsoxseg3ei64_v_i16m2_m

#define vsoxseg3ei64_v_i16m2_m ( ... ) __riscv_vsoxseg3ei64_v_i16m2_m(__VA_ARGS__)

◆ vsoxseg3ei64_v_i16mf2

#define vsoxseg3ei64_v_i16mf2 ( ... ) __riscv_vsoxseg3ei64_v_i16mf2(__VA_ARGS__)

◆ vsoxseg3ei64_v_i16mf2_m

#define vsoxseg3ei64_v_i16mf2_m ( ... ) __riscv_vsoxseg3ei64_v_i16mf2_m(__VA_ARGS__)

◆ vsoxseg3ei64_v_i16mf4

#define vsoxseg3ei64_v_i16mf4 ( ... ) __riscv_vsoxseg3ei64_v_i16mf4(__VA_ARGS__)

◆ vsoxseg3ei64_v_i16mf4_m

#define vsoxseg3ei64_v_i16mf4_m ( ... ) __riscv_vsoxseg3ei64_v_i16mf4_m(__VA_ARGS__)

◆ vsoxseg3ei64_v_i32m1

#define vsoxseg3ei64_v_i32m1 ( ... ) __riscv_vsoxseg3ei64_v_i32m1(__VA_ARGS__)

◆ vsoxseg3ei64_v_i32m1_m

#define vsoxseg3ei64_v_i32m1_m ( ... ) __riscv_vsoxseg3ei64_v_i32m1_m(__VA_ARGS__)

◆ vsoxseg3ei64_v_i32m2

#define vsoxseg3ei64_v_i32m2 ( ... ) __riscv_vsoxseg3ei64_v_i32m2(__VA_ARGS__)

◆ vsoxseg3ei64_v_i32m2_m

#define vsoxseg3ei64_v_i32m2_m ( ... ) __riscv_vsoxseg3ei64_v_i32m2_m(__VA_ARGS__)

◆ vsoxseg3ei64_v_i32mf2

#define vsoxseg3ei64_v_i32mf2 ( ... ) __riscv_vsoxseg3ei64_v_i32mf2(__VA_ARGS__)

◆ vsoxseg3ei64_v_i32mf2_m

#define vsoxseg3ei64_v_i32mf2_m ( ... ) __riscv_vsoxseg3ei64_v_i32mf2_m(__VA_ARGS__)

◆ vsoxseg3ei64_v_i64m1

#define vsoxseg3ei64_v_i64m1 ( ... ) __riscv_vsoxseg3ei64_v_i64m1(__VA_ARGS__)

◆ vsoxseg3ei64_v_i64m1_m

#define vsoxseg3ei64_v_i64m1_m ( ... ) __riscv_vsoxseg3ei64_v_i64m1_m(__VA_ARGS__)

◆ vsoxseg3ei64_v_i64m2

#define vsoxseg3ei64_v_i64m2 ( ... ) __riscv_vsoxseg3ei64_v_i64m2(__VA_ARGS__)

◆ vsoxseg3ei64_v_i64m2_m

#define vsoxseg3ei64_v_i64m2_m ( ... ) __riscv_vsoxseg3ei64_v_i64m2_m(__VA_ARGS__)

◆ vsoxseg3ei64_v_i8m1

#define vsoxseg3ei64_v_i8m1 ( ... ) __riscv_vsoxseg3ei64_v_i8m1(__VA_ARGS__)

◆ vsoxseg3ei64_v_i8m1_m

#define vsoxseg3ei64_v_i8m1_m ( ... ) __riscv_vsoxseg3ei64_v_i8m1_m(__VA_ARGS__)

◆ vsoxseg3ei64_v_i8mf2

#define vsoxseg3ei64_v_i8mf2 ( ... ) __riscv_vsoxseg3ei64_v_i8mf2(__VA_ARGS__)

◆ vsoxseg3ei64_v_i8mf2_m

#define vsoxseg3ei64_v_i8mf2_m ( ... ) __riscv_vsoxseg3ei64_v_i8mf2_m(__VA_ARGS__)

◆ vsoxseg3ei64_v_i8mf4

#define vsoxseg3ei64_v_i8mf4 ( ... ) __riscv_vsoxseg3ei64_v_i8mf4(__VA_ARGS__)

◆ vsoxseg3ei64_v_i8mf4_m

#define vsoxseg3ei64_v_i8mf4_m ( ... ) __riscv_vsoxseg3ei64_v_i8mf4_m(__VA_ARGS__)

◆ vsoxseg3ei64_v_i8mf8

#define vsoxseg3ei64_v_i8mf8 ( ... ) __riscv_vsoxseg3ei64_v_i8mf8(__VA_ARGS__)

◆ vsoxseg3ei64_v_i8mf8_m

#define vsoxseg3ei64_v_i8mf8_m ( ... ) __riscv_vsoxseg3ei64_v_i8mf8_m(__VA_ARGS__)

◆ vsoxseg3ei64_v_u16m1

#define vsoxseg3ei64_v_u16m1 ( ... ) __riscv_vsoxseg3ei64_v_u16m1(__VA_ARGS__)

◆ vsoxseg3ei64_v_u16m1_m

#define vsoxseg3ei64_v_u16m1_m ( ... ) __riscv_vsoxseg3ei64_v_u16m1_m(__VA_ARGS__)

◆ vsoxseg3ei64_v_u16m2

#define vsoxseg3ei64_v_u16m2 ( ... ) __riscv_vsoxseg3ei64_v_u16m2(__VA_ARGS__)

◆ vsoxseg3ei64_v_u16m2_m

#define vsoxseg3ei64_v_u16m2_m ( ... ) __riscv_vsoxseg3ei64_v_u16m2_m(__VA_ARGS__)

◆ vsoxseg3ei64_v_u16mf2

#define vsoxseg3ei64_v_u16mf2 ( ... ) __riscv_vsoxseg3ei64_v_u16mf2(__VA_ARGS__)

◆ vsoxseg3ei64_v_u16mf2_m

#define vsoxseg3ei64_v_u16mf2_m ( ... ) __riscv_vsoxseg3ei64_v_u16mf2_m(__VA_ARGS__)

◆ vsoxseg3ei64_v_u16mf4

#define vsoxseg3ei64_v_u16mf4 ( ... ) __riscv_vsoxseg3ei64_v_u16mf4(__VA_ARGS__)

◆ vsoxseg3ei64_v_u16mf4_m

#define vsoxseg3ei64_v_u16mf4_m ( ... ) __riscv_vsoxseg3ei64_v_u16mf4_m(__VA_ARGS__)

◆ vsoxseg3ei64_v_u32m1

#define vsoxseg3ei64_v_u32m1 ( ... ) __riscv_vsoxseg3ei64_v_u32m1(__VA_ARGS__)

◆ vsoxseg3ei64_v_u32m1_m

#define vsoxseg3ei64_v_u32m1_m ( ... ) __riscv_vsoxseg3ei64_v_u32m1_m(__VA_ARGS__)

◆ vsoxseg3ei64_v_u32m2

#define vsoxseg3ei64_v_u32m2 ( ... ) __riscv_vsoxseg3ei64_v_u32m2(__VA_ARGS__)

◆ vsoxseg3ei64_v_u32m2_m

#define vsoxseg3ei64_v_u32m2_m ( ... ) __riscv_vsoxseg3ei64_v_u32m2_m(__VA_ARGS__)

◆ vsoxseg3ei64_v_u32mf2

#define vsoxseg3ei64_v_u32mf2 ( ... ) __riscv_vsoxseg3ei64_v_u32mf2(__VA_ARGS__)

◆ vsoxseg3ei64_v_u32mf2_m

#define vsoxseg3ei64_v_u32mf2_m ( ... ) __riscv_vsoxseg3ei64_v_u32mf2_m(__VA_ARGS__)

◆ vsoxseg3ei64_v_u64m1

#define vsoxseg3ei64_v_u64m1 ( ... ) __riscv_vsoxseg3ei64_v_u64m1(__VA_ARGS__)

◆ vsoxseg3ei64_v_u64m1_m

#define vsoxseg3ei64_v_u64m1_m ( ... ) __riscv_vsoxseg3ei64_v_u64m1_m(__VA_ARGS__)

◆ vsoxseg3ei64_v_u64m2

#define vsoxseg3ei64_v_u64m2 ( ... ) __riscv_vsoxseg3ei64_v_u64m2(__VA_ARGS__)

◆ vsoxseg3ei64_v_u64m2_m

#define vsoxseg3ei64_v_u64m2_m ( ... ) __riscv_vsoxseg3ei64_v_u64m2_m(__VA_ARGS__)

◆ vsoxseg3ei64_v_u8m1

#define vsoxseg3ei64_v_u8m1 ( ... ) __riscv_vsoxseg3ei64_v_u8m1(__VA_ARGS__)

◆ vsoxseg3ei64_v_u8m1_m

#define vsoxseg3ei64_v_u8m1_m ( ... ) __riscv_vsoxseg3ei64_v_u8m1_m(__VA_ARGS__)

◆ vsoxseg3ei64_v_u8mf2

#define vsoxseg3ei64_v_u8mf2 ( ... ) __riscv_vsoxseg3ei64_v_u8mf2(__VA_ARGS__)

◆ vsoxseg3ei64_v_u8mf2_m

#define vsoxseg3ei64_v_u8mf2_m ( ... ) __riscv_vsoxseg3ei64_v_u8mf2_m(__VA_ARGS__)

◆ vsoxseg3ei64_v_u8mf4

#define vsoxseg3ei64_v_u8mf4 ( ... ) __riscv_vsoxseg3ei64_v_u8mf4(__VA_ARGS__)

◆ vsoxseg3ei64_v_u8mf4_m

#define vsoxseg3ei64_v_u8mf4_m ( ... ) __riscv_vsoxseg3ei64_v_u8mf4_m(__VA_ARGS__)

◆ vsoxseg3ei64_v_u8mf8

#define vsoxseg3ei64_v_u8mf8 ( ... ) __riscv_vsoxseg3ei64_v_u8mf8(__VA_ARGS__)

◆ vsoxseg3ei64_v_u8mf8_m

#define vsoxseg3ei64_v_u8mf8_m ( ... ) __riscv_vsoxseg3ei64_v_u8mf8_m(__VA_ARGS__)

◆ vsoxseg3ei8_v_f16m1

#define vsoxseg3ei8_v_f16m1 ( ... ) __riscv_vsoxseg3ei8_v_f16m1(__VA_ARGS__)

◆ vsoxseg3ei8_v_f16m1_m

#define vsoxseg3ei8_v_f16m1_m ( ... ) __riscv_vsoxseg3ei8_v_f16m1_m(__VA_ARGS__)

◆ vsoxseg3ei8_v_f16m2

#define vsoxseg3ei8_v_f16m2 ( ... ) __riscv_vsoxseg3ei8_v_f16m2(__VA_ARGS__)

◆ vsoxseg3ei8_v_f16m2_m

#define vsoxseg3ei8_v_f16m2_m ( ... ) __riscv_vsoxseg3ei8_v_f16m2_m(__VA_ARGS__)

◆ vsoxseg3ei8_v_f16mf2

#define vsoxseg3ei8_v_f16mf2 ( ... ) __riscv_vsoxseg3ei8_v_f16mf2(__VA_ARGS__)

◆ vsoxseg3ei8_v_f16mf2_m

#define vsoxseg3ei8_v_f16mf2_m ( ... ) __riscv_vsoxseg3ei8_v_f16mf2_m(__VA_ARGS__)

◆ vsoxseg3ei8_v_f16mf4

#define vsoxseg3ei8_v_f16mf4 ( ... ) __riscv_vsoxseg3ei8_v_f16mf4(__VA_ARGS__)

◆ vsoxseg3ei8_v_f16mf4_m

#define vsoxseg3ei8_v_f16mf4_m ( ... ) __riscv_vsoxseg3ei8_v_f16mf4_m(__VA_ARGS__)

◆ vsoxseg3ei8_v_f32m1

#define vsoxseg3ei8_v_f32m1 ( ... ) __riscv_vsoxseg3ei8_v_f32m1(__VA_ARGS__)

◆ vsoxseg3ei8_v_f32m1_m

#define vsoxseg3ei8_v_f32m1_m ( ... ) __riscv_vsoxseg3ei8_v_f32m1_m(__VA_ARGS__)

◆ vsoxseg3ei8_v_f32m2

#define vsoxseg3ei8_v_f32m2 ( ... ) __riscv_vsoxseg3ei8_v_f32m2(__VA_ARGS__)

◆ vsoxseg3ei8_v_f32m2_m

#define vsoxseg3ei8_v_f32m2_m ( ... ) __riscv_vsoxseg3ei8_v_f32m2_m(__VA_ARGS__)

◆ vsoxseg3ei8_v_f32mf2

#define vsoxseg3ei8_v_f32mf2 ( ... ) __riscv_vsoxseg3ei8_v_f32mf2(__VA_ARGS__)

◆ vsoxseg3ei8_v_f32mf2_m

#define vsoxseg3ei8_v_f32mf2_m ( ... ) __riscv_vsoxseg3ei8_v_f32mf2_m(__VA_ARGS__)

◆ vsoxseg3ei8_v_f64m1

#define vsoxseg3ei8_v_f64m1 ( ... ) __riscv_vsoxseg3ei8_v_f64m1(__VA_ARGS__)

◆ vsoxseg3ei8_v_f64m1_m

#define vsoxseg3ei8_v_f64m1_m ( ... ) __riscv_vsoxseg3ei8_v_f64m1_m(__VA_ARGS__)

◆ vsoxseg3ei8_v_f64m2

#define vsoxseg3ei8_v_f64m2 ( ... ) __riscv_vsoxseg3ei8_v_f64m2(__VA_ARGS__)

◆ vsoxseg3ei8_v_f64m2_m

#define vsoxseg3ei8_v_f64m2_m ( ... ) __riscv_vsoxseg3ei8_v_f64m2_m(__VA_ARGS__)

◆ vsoxseg3ei8_v_i16m1

#define vsoxseg3ei8_v_i16m1 ( ... ) __riscv_vsoxseg3ei8_v_i16m1(__VA_ARGS__)

◆ vsoxseg3ei8_v_i16m1_m

#define vsoxseg3ei8_v_i16m1_m ( ... ) __riscv_vsoxseg3ei8_v_i16m1_m(__VA_ARGS__)

◆ vsoxseg3ei8_v_i16m2

#define vsoxseg3ei8_v_i16m2 ( ... ) __riscv_vsoxseg3ei8_v_i16m2(__VA_ARGS__)

◆ vsoxseg3ei8_v_i16m2_m

#define vsoxseg3ei8_v_i16m2_m ( ... ) __riscv_vsoxseg3ei8_v_i16m2_m(__VA_ARGS__)

◆ vsoxseg3ei8_v_i16mf2

#define vsoxseg3ei8_v_i16mf2 ( ... ) __riscv_vsoxseg3ei8_v_i16mf2(__VA_ARGS__)

◆ vsoxseg3ei8_v_i16mf2_m

#define vsoxseg3ei8_v_i16mf2_m ( ... ) __riscv_vsoxseg3ei8_v_i16mf2_m(__VA_ARGS__)

◆ vsoxseg3ei8_v_i16mf4

#define vsoxseg3ei8_v_i16mf4 ( ... ) __riscv_vsoxseg3ei8_v_i16mf4(__VA_ARGS__)

◆ vsoxseg3ei8_v_i16mf4_m

#define vsoxseg3ei8_v_i16mf4_m ( ... ) __riscv_vsoxseg3ei8_v_i16mf4_m(__VA_ARGS__)

◆ vsoxseg3ei8_v_i32m1

#define vsoxseg3ei8_v_i32m1 ( ... ) __riscv_vsoxseg3ei8_v_i32m1(__VA_ARGS__)

◆ vsoxseg3ei8_v_i32m1_m

#define vsoxseg3ei8_v_i32m1_m ( ... ) __riscv_vsoxseg3ei8_v_i32m1_m(__VA_ARGS__)

◆ vsoxseg3ei8_v_i32m2

#define vsoxseg3ei8_v_i32m2 ( ... ) __riscv_vsoxseg3ei8_v_i32m2(__VA_ARGS__)

◆ vsoxseg3ei8_v_i32m2_m

#define vsoxseg3ei8_v_i32m2_m ( ... ) __riscv_vsoxseg3ei8_v_i32m2_m(__VA_ARGS__)

◆ vsoxseg3ei8_v_i32mf2

#define vsoxseg3ei8_v_i32mf2 ( ... ) __riscv_vsoxseg3ei8_v_i32mf2(__VA_ARGS__)

◆ vsoxseg3ei8_v_i32mf2_m

#define vsoxseg3ei8_v_i32mf2_m ( ... ) __riscv_vsoxseg3ei8_v_i32mf2_m(__VA_ARGS__)

◆ vsoxseg3ei8_v_i64m1

#define vsoxseg3ei8_v_i64m1 ( ... ) __riscv_vsoxseg3ei8_v_i64m1(__VA_ARGS__)

◆ vsoxseg3ei8_v_i64m1_m

#define vsoxseg3ei8_v_i64m1_m ( ... ) __riscv_vsoxseg3ei8_v_i64m1_m(__VA_ARGS__)

◆ vsoxseg3ei8_v_i64m2

#define vsoxseg3ei8_v_i64m2 ( ... ) __riscv_vsoxseg3ei8_v_i64m2(__VA_ARGS__)

◆ vsoxseg3ei8_v_i64m2_m

#define vsoxseg3ei8_v_i64m2_m ( ... ) __riscv_vsoxseg3ei8_v_i64m2_m(__VA_ARGS__)

◆ vsoxseg3ei8_v_i8m1

#define vsoxseg3ei8_v_i8m1 ( ... ) __riscv_vsoxseg3ei8_v_i8m1(__VA_ARGS__)

◆ vsoxseg3ei8_v_i8m1_m

#define vsoxseg3ei8_v_i8m1_m ( ... ) __riscv_vsoxseg3ei8_v_i8m1_m(__VA_ARGS__)

◆ vsoxseg3ei8_v_i8m2

#define vsoxseg3ei8_v_i8m2 ( ... ) __riscv_vsoxseg3ei8_v_i8m2(__VA_ARGS__)

◆ vsoxseg3ei8_v_i8m2_m

#define vsoxseg3ei8_v_i8m2_m ( ... ) __riscv_vsoxseg3ei8_v_i8m2_m(__VA_ARGS__)

◆ vsoxseg3ei8_v_i8mf2

#define vsoxseg3ei8_v_i8mf2 ( ... ) __riscv_vsoxseg3ei8_v_i8mf2(__VA_ARGS__)

◆ vsoxseg3ei8_v_i8mf2_m

#define vsoxseg3ei8_v_i8mf2_m ( ... ) __riscv_vsoxseg3ei8_v_i8mf2_m(__VA_ARGS__)

◆ vsoxseg3ei8_v_i8mf4

#define vsoxseg3ei8_v_i8mf4 ( ... ) __riscv_vsoxseg3ei8_v_i8mf4(__VA_ARGS__)

◆ vsoxseg3ei8_v_i8mf4_m

#define vsoxseg3ei8_v_i8mf4_m ( ... ) __riscv_vsoxseg3ei8_v_i8mf4_m(__VA_ARGS__)

◆ vsoxseg3ei8_v_i8mf8

#define vsoxseg3ei8_v_i8mf8 ( ... ) __riscv_vsoxseg3ei8_v_i8mf8(__VA_ARGS__)

◆ vsoxseg3ei8_v_i8mf8_m

#define vsoxseg3ei8_v_i8mf8_m ( ... ) __riscv_vsoxseg3ei8_v_i8mf8_m(__VA_ARGS__)

◆ vsoxseg3ei8_v_u16m1

#define vsoxseg3ei8_v_u16m1 ( ... ) __riscv_vsoxseg3ei8_v_u16m1(__VA_ARGS__)

◆ vsoxseg3ei8_v_u16m1_m

#define vsoxseg3ei8_v_u16m1_m ( ... ) __riscv_vsoxseg3ei8_v_u16m1_m(__VA_ARGS__)

◆ vsoxseg3ei8_v_u16m2

#define vsoxseg3ei8_v_u16m2 ( ... ) __riscv_vsoxseg3ei8_v_u16m2(__VA_ARGS__)

◆ vsoxseg3ei8_v_u16m2_m

#define vsoxseg3ei8_v_u16m2_m ( ... ) __riscv_vsoxseg3ei8_v_u16m2_m(__VA_ARGS__)

◆ vsoxseg3ei8_v_u16mf2

#define vsoxseg3ei8_v_u16mf2 ( ... ) __riscv_vsoxseg3ei8_v_u16mf2(__VA_ARGS__)

◆ vsoxseg3ei8_v_u16mf2_m

#define vsoxseg3ei8_v_u16mf2_m ( ... ) __riscv_vsoxseg3ei8_v_u16mf2_m(__VA_ARGS__)

◆ vsoxseg3ei8_v_u16mf4

#define vsoxseg3ei8_v_u16mf4 ( ... ) __riscv_vsoxseg3ei8_v_u16mf4(__VA_ARGS__)

◆ vsoxseg3ei8_v_u16mf4_m

#define vsoxseg3ei8_v_u16mf4_m ( ... ) __riscv_vsoxseg3ei8_v_u16mf4_m(__VA_ARGS__)

◆ vsoxseg3ei8_v_u32m1

#define vsoxseg3ei8_v_u32m1 ( ... ) __riscv_vsoxseg3ei8_v_u32m1(__VA_ARGS__)

◆ vsoxseg3ei8_v_u32m1_m

#define vsoxseg3ei8_v_u32m1_m ( ... ) __riscv_vsoxseg3ei8_v_u32m1_m(__VA_ARGS__)

◆ vsoxseg3ei8_v_u32m2

#define vsoxseg3ei8_v_u32m2 ( ... ) __riscv_vsoxseg3ei8_v_u32m2(__VA_ARGS__)

◆ vsoxseg3ei8_v_u32m2_m

#define vsoxseg3ei8_v_u32m2_m ( ... ) __riscv_vsoxseg3ei8_v_u32m2_m(__VA_ARGS__)

◆ vsoxseg3ei8_v_u32mf2

#define vsoxseg3ei8_v_u32mf2 ( ... ) __riscv_vsoxseg3ei8_v_u32mf2(__VA_ARGS__)

◆ vsoxseg3ei8_v_u32mf2_m

#define vsoxseg3ei8_v_u32mf2_m ( ... ) __riscv_vsoxseg3ei8_v_u32mf2_m(__VA_ARGS__)

◆ vsoxseg3ei8_v_u64m1

#define vsoxseg3ei8_v_u64m1 ( ... ) __riscv_vsoxseg3ei8_v_u64m1(__VA_ARGS__)

◆ vsoxseg3ei8_v_u64m1_m

#define vsoxseg3ei8_v_u64m1_m ( ... ) __riscv_vsoxseg3ei8_v_u64m1_m(__VA_ARGS__)

◆ vsoxseg3ei8_v_u64m2

#define vsoxseg3ei8_v_u64m2 ( ... ) __riscv_vsoxseg3ei8_v_u64m2(__VA_ARGS__)

◆ vsoxseg3ei8_v_u64m2_m

#define vsoxseg3ei8_v_u64m2_m ( ... ) __riscv_vsoxseg3ei8_v_u64m2_m(__VA_ARGS__)

◆ vsoxseg3ei8_v_u8m1

#define vsoxseg3ei8_v_u8m1 ( ... ) __riscv_vsoxseg3ei8_v_u8m1(__VA_ARGS__)

◆ vsoxseg3ei8_v_u8m1_m

#define vsoxseg3ei8_v_u8m1_m ( ... ) __riscv_vsoxseg3ei8_v_u8m1_m(__VA_ARGS__)

◆ vsoxseg3ei8_v_u8m2

#define vsoxseg3ei8_v_u8m2 ( ... ) __riscv_vsoxseg3ei8_v_u8m2(__VA_ARGS__)

◆ vsoxseg3ei8_v_u8m2_m

#define vsoxseg3ei8_v_u8m2_m ( ... ) __riscv_vsoxseg3ei8_v_u8m2_m(__VA_ARGS__)

◆ vsoxseg3ei8_v_u8mf2

#define vsoxseg3ei8_v_u8mf2 ( ... ) __riscv_vsoxseg3ei8_v_u8mf2(__VA_ARGS__)

◆ vsoxseg3ei8_v_u8mf2_m

#define vsoxseg3ei8_v_u8mf2_m ( ... ) __riscv_vsoxseg3ei8_v_u8mf2_m(__VA_ARGS__)

◆ vsoxseg3ei8_v_u8mf4

#define vsoxseg3ei8_v_u8mf4 ( ... ) __riscv_vsoxseg3ei8_v_u8mf4(__VA_ARGS__)

◆ vsoxseg3ei8_v_u8mf4_m

#define vsoxseg3ei8_v_u8mf4_m ( ... ) __riscv_vsoxseg3ei8_v_u8mf4_m(__VA_ARGS__)

◆ vsoxseg3ei8_v_u8mf8

#define vsoxseg3ei8_v_u8mf8 ( ... ) __riscv_vsoxseg3ei8_v_u8mf8(__VA_ARGS__)

◆ vsoxseg3ei8_v_u8mf8_m

#define vsoxseg3ei8_v_u8mf8_m ( ... ) __riscv_vsoxseg3ei8_v_u8mf8_m(__VA_ARGS__)

◆ vsoxseg4ei16_v_f16m1

#define vsoxseg4ei16_v_f16m1 ( ... ) __riscv_vsoxseg4ei16_v_f16m1(__VA_ARGS__)

◆ vsoxseg4ei16_v_f16m1_m

#define vsoxseg4ei16_v_f16m1_m ( ... ) __riscv_vsoxseg4ei16_v_f16m1_m(__VA_ARGS__)

◆ vsoxseg4ei16_v_f16m2

#define vsoxseg4ei16_v_f16m2 ( ... ) __riscv_vsoxseg4ei16_v_f16m2(__VA_ARGS__)

◆ vsoxseg4ei16_v_f16m2_m

#define vsoxseg4ei16_v_f16m2_m ( ... ) __riscv_vsoxseg4ei16_v_f16m2_m(__VA_ARGS__)

◆ vsoxseg4ei16_v_f16mf2

#define vsoxseg4ei16_v_f16mf2 ( ... ) __riscv_vsoxseg4ei16_v_f16mf2(__VA_ARGS__)

◆ vsoxseg4ei16_v_f16mf2_m

#define vsoxseg4ei16_v_f16mf2_m ( ... ) __riscv_vsoxseg4ei16_v_f16mf2_m(__VA_ARGS__)

◆ vsoxseg4ei16_v_f16mf4

#define vsoxseg4ei16_v_f16mf4 ( ... ) __riscv_vsoxseg4ei16_v_f16mf4(__VA_ARGS__)

◆ vsoxseg4ei16_v_f16mf4_m

#define vsoxseg4ei16_v_f16mf4_m ( ... ) __riscv_vsoxseg4ei16_v_f16mf4_m(__VA_ARGS__)

◆ vsoxseg4ei16_v_f32m1

#define vsoxseg4ei16_v_f32m1 ( ... ) __riscv_vsoxseg4ei16_v_f32m1(__VA_ARGS__)

◆ vsoxseg4ei16_v_f32m1_m

#define vsoxseg4ei16_v_f32m1_m ( ... ) __riscv_vsoxseg4ei16_v_f32m1_m(__VA_ARGS__)

◆ vsoxseg4ei16_v_f32m2

#define vsoxseg4ei16_v_f32m2 ( ... ) __riscv_vsoxseg4ei16_v_f32m2(__VA_ARGS__)

◆ vsoxseg4ei16_v_f32m2_m

#define vsoxseg4ei16_v_f32m2_m ( ... ) __riscv_vsoxseg4ei16_v_f32m2_m(__VA_ARGS__)

◆ vsoxseg4ei16_v_f32mf2

#define vsoxseg4ei16_v_f32mf2 ( ... ) __riscv_vsoxseg4ei16_v_f32mf2(__VA_ARGS__)

◆ vsoxseg4ei16_v_f32mf2_m

#define vsoxseg4ei16_v_f32mf2_m ( ... ) __riscv_vsoxseg4ei16_v_f32mf2_m(__VA_ARGS__)

◆ vsoxseg4ei16_v_f64m1

#define vsoxseg4ei16_v_f64m1 ( ... ) __riscv_vsoxseg4ei16_v_f64m1(__VA_ARGS__)

◆ vsoxseg4ei16_v_f64m1_m

#define vsoxseg4ei16_v_f64m1_m ( ... ) __riscv_vsoxseg4ei16_v_f64m1_m(__VA_ARGS__)

◆ vsoxseg4ei16_v_f64m2

#define vsoxseg4ei16_v_f64m2 ( ... ) __riscv_vsoxseg4ei16_v_f64m2(__VA_ARGS__)

◆ vsoxseg4ei16_v_f64m2_m

#define vsoxseg4ei16_v_f64m2_m ( ... ) __riscv_vsoxseg4ei16_v_f64m2_m(__VA_ARGS__)

◆ vsoxseg4ei16_v_i16m1

#define vsoxseg4ei16_v_i16m1 ( ... ) __riscv_vsoxseg4ei16_v_i16m1(__VA_ARGS__)

◆ vsoxseg4ei16_v_i16m1_m

#define vsoxseg4ei16_v_i16m1_m ( ... ) __riscv_vsoxseg4ei16_v_i16m1_m(__VA_ARGS__)

◆ vsoxseg4ei16_v_i16m2

#define vsoxseg4ei16_v_i16m2 ( ... ) __riscv_vsoxseg4ei16_v_i16m2(__VA_ARGS__)

◆ vsoxseg4ei16_v_i16m2_m

#define vsoxseg4ei16_v_i16m2_m ( ... ) __riscv_vsoxseg4ei16_v_i16m2_m(__VA_ARGS__)

◆ vsoxseg4ei16_v_i16mf2

#define vsoxseg4ei16_v_i16mf2 ( ... ) __riscv_vsoxseg4ei16_v_i16mf2(__VA_ARGS__)

◆ vsoxseg4ei16_v_i16mf2_m

#define vsoxseg4ei16_v_i16mf2_m ( ... ) __riscv_vsoxseg4ei16_v_i16mf2_m(__VA_ARGS__)

◆ vsoxseg4ei16_v_i16mf4

#define vsoxseg4ei16_v_i16mf4 ( ... ) __riscv_vsoxseg4ei16_v_i16mf4(__VA_ARGS__)

◆ vsoxseg4ei16_v_i16mf4_m

#define vsoxseg4ei16_v_i16mf4_m ( ... ) __riscv_vsoxseg4ei16_v_i16mf4_m(__VA_ARGS__)

◆ vsoxseg4ei16_v_i32m1

#define vsoxseg4ei16_v_i32m1 ( ... ) __riscv_vsoxseg4ei16_v_i32m1(__VA_ARGS__)

◆ vsoxseg4ei16_v_i32m1_m

#define vsoxseg4ei16_v_i32m1_m ( ... ) __riscv_vsoxseg4ei16_v_i32m1_m(__VA_ARGS__)

◆ vsoxseg4ei16_v_i32m2

#define vsoxseg4ei16_v_i32m2 ( ... ) __riscv_vsoxseg4ei16_v_i32m2(__VA_ARGS__)

◆ vsoxseg4ei16_v_i32m2_m

#define vsoxseg4ei16_v_i32m2_m ( ... ) __riscv_vsoxseg4ei16_v_i32m2_m(__VA_ARGS__)

◆ vsoxseg4ei16_v_i32mf2

#define vsoxseg4ei16_v_i32mf2 ( ... ) __riscv_vsoxseg4ei16_v_i32mf2(__VA_ARGS__)

◆ vsoxseg4ei16_v_i32mf2_m

#define vsoxseg4ei16_v_i32mf2_m ( ... ) __riscv_vsoxseg4ei16_v_i32mf2_m(__VA_ARGS__)

◆ vsoxseg4ei16_v_i64m1

#define vsoxseg4ei16_v_i64m1 ( ... ) __riscv_vsoxseg4ei16_v_i64m1(__VA_ARGS__)

◆ vsoxseg4ei16_v_i64m1_m

#define vsoxseg4ei16_v_i64m1_m ( ... ) __riscv_vsoxseg4ei16_v_i64m1_m(__VA_ARGS__)

◆ vsoxseg4ei16_v_i64m2

#define vsoxseg4ei16_v_i64m2 ( ... ) __riscv_vsoxseg4ei16_v_i64m2(__VA_ARGS__)

◆ vsoxseg4ei16_v_i64m2_m

#define vsoxseg4ei16_v_i64m2_m ( ... ) __riscv_vsoxseg4ei16_v_i64m2_m(__VA_ARGS__)

◆ vsoxseg4ei16_v_i8m1

#define vsoxseg4ei16_v_i8m1 ( ... ) __riscv_vsoxseg4ei16_v_i8m1(__VA_ARGS__)

◆ vsoxseg4ei16_v_i8m1_m

#define vsoxseg4ei16_v_i8m1_m ( ... ) __riscv_vsoxseg4ei16_v_i8m1_m(__VA_ARGS__)

◆ vsoxseg4ei16_v_i8m2

#define vsoxseg4ei16_v_i8m2 ( ... ) __riscv_vsoxseg4ei16_v_i8m2(__VA_ARGS__)

◆ vsoxseg4ei16_v_i8m2_m

#define vsoxseg4ei16_v_i8m2_m ( ... ) __riscv_vsoxseg4ei16_v_i8m2_m(__VA_ARGS__)

◆ vsoxseg4ei16_v_i8mf2

#define vsoxseg4ei16_v_i8mf2 ( ... ) __riscv_vsoxseg4ei16_v_i8mf2(__VA_ARGS__)

◆ vsoxseg4ei16_v_i8mf2_m

#define vsoxseg4ei16_v_i8mf2_m ( ... ) __riscv_vsoxseg4ei16_v_i8mf2_m(__VA_ARGS__)

◆ vsoxseg4ei16_v_i8mf4

#define vsoxseg4ei16_v_i8mf4 ( ... ) __riscv_vsoxseg4ei16_v_i8mf4(__VA_ARGS__)

◆ vsoxseg4ei16_v_i8mf4_m

#define vsoxseg4ei16_v_i8mf4_m ( ... ) __riscv_vsoxseg4ei16_v_i8mf4_m(__VA_ARGS__)

◆ vsoxseg4ei16_v_i8mf8

#define vsoxseg4ei16_v_i8mf8 ( ... ) __riscv_vsoxseg4ei16_v_i8mf8(__VA_ARGS__)

◆ vsoxseg4ei16_v_i8mf8_m

#define vsoxseg4ei16_v_i8mf8_m ( ... ) __riscv_vsoxseg4ei16_v_i8mf8_m(__VA_ARGS__)

◆ vsoxseg4ei16_v_u16m1

#define vsoxseg4ei16_v_u16m1 ( ... ) __riscv_vsoxseg4ei16_v_u16m1(__VA_ARGS__)

◆ vsoxseg4ei16_v_u16m1_m

#define vsoxseg4ei16_v_u16m1_m ( ... ) __riscv_vsoxseg4ei16_v_u16m1_m(__VA_ARGS__)

◆ vsoxseg4ei16_v_u16m2

#define vsoxseg4ei16_v_u16m2 ( ... ) __riscv_vsoxseg4ei16_v_u16m2(__VA_ARGS__)

◆ vsoxseg4ei16_v_u16m2_m

#define vsoxseg4ei16_v_u16m2_m ( ... ) __riscv_vsoxseg4ei16_v_u16m2_m(__VA_ARGS__)

◆ vsoxseg4ei16_v_u16mf2

#define vsoxseg4ei16_v_u16mf2 ( ... ) __riscv_vsoxseg4ei16_v_u16mf2(__VA_ARGS__)

◆ vsoxseg4ei16_v_u16mf2_m

#define vsoxseg4ei16_v_u16mf2_m ( ... ) __riscv_vsoxseg4ei16_v_u16mf2_m(__VA_ARGS__)

◆ vsoxseg4ei16_v_u16mf4

#define vsoxseg4ei16_v_u16mf4 ( ... ) __riscv_vsoxseg4ei16_v_u16mf4(__VA_ARGS__)

◆ vsoxseg4ei16_v_u16mf4_m

#define vsoxseg4ei16_v_u16mf4_m ( ... ) __riscv_vsoxseg4ei16_v_u16mf4_m(__VA_ARGS__)

◆ vsoxseg4ei16_v_u32m1

#define vsoxseg4ei16_v_u32m1 ( ... ) __riscv_vsoxseg4ei16_v_u32m1(__VA_ARGS__)

◆ vsoxseg4ei16_v_u32m1_m

#define vsoxseg4ei16_v_u32m1_m ( ... ) __riscv_vsoxseg4ei16_v_u32m1_m(__VA_ARGS__)

◆ vsoxseg4ei16_v_u32m2

#define vsoxseg4ei16_v_u32m2 ( ... ) __riscv_vsoxseg4ei16_v_u32m2(__VA_ARGS__)

◆ vsoxseg4ei16_v_u32m2_m

#define vsoxseg4ei16_v_u32m2_m ( ... ) __riscv_vsoxseg4ei16_v_u32m2_m(__VA_ARGS__)

◆ vsoxseg4ei16_v_u32mf2

#define vsoxseg4ei16_v_u32mf2 ( ... ) __riscv_vsoxseg4ei16_v_u32mf2(__VA_ARGS__)

◆ vsoxseg4ei16_v_u32mf2_m

#define vsoxseg4ei16_v_u32mf2_m ( ... ) __riscv_vsoxseg4ei16_v_u32mf2_m(__VA_ARGS__)

◆ vsoxseg4ei16_v_u64m1

#define vsoxseg4ei16_v_u64m1 ( ... ) __riscv_vsoxseg4ei16_v_u64m1(__VA_ARGS__)

◆ vsoxseg4ei16_v_u64m1_m

#define vsoxseg4ei16_v_u64m1_m ( ... ) __riscv_vsoxseg4ei16_v_u64m1_m(__VA_ARGS__)

◆ vsoxseg4ei16_v_u64m2

#define vsoxseg4ei16_v_u64m2 ( ... ) __riscv_vsoxseg4ei16_v_u64m2(__VA_ARGS__)

◆ vsoxseg4ei16_v_u64m2_m

#define vsoxseg4ei16_v_u64m2_m ( ... ) __riscv_vsoxseg4ei16_v_u64m2_m(__VA_ARGS__)

◆ vsoxseg4ei16_v_u8m1

#define vsoxseg4ei16_v_u8m1 ( ... ) __riscv_vsoxseg4ei16_v_u8m1(__VA_ARGS__)

◆ vsoxseg4ei16_v_u8m1_m

#define vsoxseg4ei16_v_u8m1_m ( ... ) __riscv_vsoxseg4ei16_v_u8m1_m(__VA_ARGS__)

◆ vsoxseg4ei16_v_u8m2

#define vsoxseg4ei16_v_u8m2 ( ... ) __riscv_vsoxseg4ei16_v_u8m2(__VA_ARGS__)

◆ vsoxseg4ei16_v_u8m2_m

#define vsoxseg4ei16_v_u8m2_m ( ... ) __riscv_vsoxseg4ei16_v_u8m2_m(__VA_ARGS__)

◆ vsoxseg4ei16_v_u8mf2

#define vsoxseg4ei16_v_u8mf2 ( ... ) __riscv_vsoxseg4ei16_v_u8mf2(__VA_ARGS__)

◆ vsoxseg4ei16_v_u8mf2_m

#define vsoxseg4ei16_v_u8mf2_m ( ... ) __riscv_vsoxseg4ei16_v_u8mf2_m(__VA_ARGS__)

◆ vsoxseg4ei16_v_u8mf4

#define vsoxseg4ei16_v_u8mf4 ( ... ) __riscv_vsoxseg4ei16_v_u8mf4(__VA_ARGS__)

◆ vsoxseg4ei16_v_u8mf4_m

#define vsoxseg4ei16_v_u8mf4_m ( ... ) __riscv_vsoxseg4ei16_v_u8mf4_m(__VA_ARGS__)

◆ vsoxseg4ei16_v_u8mf8

#define vsoxseg4ei16_v_u8mf8 ( ... ) __riscv_vsoxseg4ei16_v_u8mf8(__VA_ARGS__)

◆ vsoxseg4ei16_v_u8mf8_m

#define vsoxseg4ei16_v_u8mf8_m ( ... ) __riscv_vsoxseg4ei16_v_u8mf8_m(__VA_ARGS__)

◆ vsoxseg4ei32_v_f16m1

#define vsoxseg4ei32_v_f16m1 ( ... ) __riscv_vsoxseg4ei32_v_f16m1(__VA_ARGS__)

◆ vsoxseg4ei32_v_f16m1_m

#define vsoxseg4ei32_v_f16m1_m ( ... ) __riscv_vsoxseg4ei32_v_f16m1_m(__VA_ARGS__)

◆ vsoxseg4ei32_v_f16m2

#define vsoxseg4ei32_v_f16m2 ( ... ) __riscv_vsoxseg4ei32_v_f16m2(__VA_ARGS__)

◆ vsoxseg4ei32_v_f16m2_m

#define vsoxseg4ei32_v_f16m2_m ( ... ) __riscv_vsoxseg4ei32_v_f16m2_m(__VA_ARGS__)

◆ vsoxseg4ei32_v_f16mf2

#define vsoxseg4ei32_v_f16mf2 ( ... ) __riscv_vsoxseg4ei32_v_f16mf2(__VA_ARGS__)

◆ vsoxseg4ei32_v_f16mf2_m

#define vsoxseg4ei32_v_f16mf2_m ( ... ) __riscv_vsoxseg4ei32_v_f16mf2_m(__VA_ARGS__)

◆ vsoxseg4ei32_v_f16mf4

#define vsoxseg4ei32_v_f16mf4 ( ... ) __riscv_vsoxseg4ei32_v_f16mf4(__VA_ARGS__)

◆ vsoxseg4ei32_v_f16mf4_m

#define vsoxseg4ei32_v_f16mf4_m ( ... ) __riscv_vsoxseg4ei32_v_f16mf4_m(__VA_ARGS__)

◆ vsoxseg4ei32_v_f32m1

#define vsoxseg4ei32_v_f32m1 ( ... ) __riscv_vsoxseg4ei32_v_f32m1(__VA_ARGS__)

◆ vsoxseg4ei32_v_f32m1_m

#define vsoxseg4ei32_v_f32m1_m ( ... ) __riscv_vsoxseg4ei32_v_f32m1_m(__VA_ARGS__)

◆ vsoxseg4ei32_v_f32m2

#define vsoxseg4ei32_v_f32m2 ( ... ) __riscv_vsoxseg4ei32_v_f32m2(__VA_ARGS__)

◆ vsoxseg4ei32_v_f32m2_m

#define vsoxseg4ei32_v_f32m2_m ( ... ) __riscv_vsoxseg4ei32_v_f32m2_m(__VA_ARGS__)

◆ vsoxseg4ei32_v_f32mf2

#define vsoxseg4ei32_v_f32mf2 ( ... ) __riscv_vsoxseg4ei32_v_f32mf2(__VA_ARGS__)

◆ vsoxseg4ei32_v_f32mf2_m

#define vsoxseg4ei32_v_f32mf2_m ( ... ) __riscv_vsoxseg4ei32_v_f32mf2_m(__VA_ARGS__)

◆ vsoxseg4ei32_v_f64m1

#define vsoxseg4ei32_v_f64m1 ( ... ) __riscv_vsoxseg4ei32_v_f64m1(__VA_ARGS__)

◆ vsoxseg4ei32_v_f64m1_m

#define vsoxseg4ei32_v_f64m1_m ( ... ) __riscv_vsoxseg4ei32_v_f64m1_m(__VA_ARGS__)

◆ vsoxseg4ei32_v_f64m2

#define vsoxseg4ei32_v_f64m2 ( ... ) __riscv_vsoxseg4ei32_v_f64m2(__VA_ARGS__)

◆ vsoxseg4ei32_v_f64m2_m

#define vsoxseg4ei32_v_f64m2_m ( ... ) __riscv_vsoxseg4ei32_v_f64m2_m(__VA_ARGS__)

◆ vsoxseg4ei32_v_i16m1

#define vsoxseg4ei32_v_i16m1 ( ... ) __riscv_vsoxseg4ei32_v_i16m1(__VA_ARGS__)

◆ vsoxseg4ei32_v_i16m1_m

#define vsoxseg4ei32_v_i16m1_m ( ... ) __riscv_vsoxseg4ei32_v_i16m1_m(__VA_ARGS__)

◆ vsoxseg4ei32_v_i16m2

#define vsoxseg4ei32_v_i16m2 ( ... ) __riscv_vsoxseg4ei32_v_i16m2(__VA_ARGS__)

◆ vsoxseg4ei32_v_i16m2_m

#define vsoxseg4ei32_v_i16m2_m ( ... ) __riscv_vsoxseg4ei32_v_i16m2_m(__VA_ARGS__)

◆ vsoxseg4ei32_v_i16mf2

#define vsoxseg4ei32_v_i16mf2 ( ... ) __riscv_vsoxseg4ei32_v_i16mf2(__VA_ARGS__)

◆ vsoxseg4ei32_v_i16mf2_m

#define vsoxseg4ei32_v_i16mf2_m ( ... ) __riscv_vsoxseg4ei32_v_i16mf2_m(__VA_ARGS__)

◆ vsoxseg4ei32_v_i16mf4

#define vsoxseg4ei32_v_i16mf4 ( ... ) __riscv_vsoxseg4ei32_v_i16mf4(__VA_ARGS__)

◆ vsoxseg4ei32_v_i16mf4_m

#define vsoxseg4ei32_v_i16mf4_m ( ... ) __riscv_vsoxseg4ei32_v_i16mf4_m(__VA_ARGS__)

◆ vsoxseg4ei32_v_i32m1

#define vsoxseg4ei32_v_i32m1 ( ... ) __riscv_vsoxseg4ei32_v_i32m1(__VA_ARGS__)

◆ vsoxseg4ei32_v_i32m1_m

#define vsoxseg4ei32_v_i32m1_m ( ... ) __riscv_vsoxseg4ei32_v_i32m1_m(__VA_ARGS__)

◆ vsoxseg4ei32_v_i32m2

#define vsoxseg4ei32_v_i32m2 ( ... ) __riscv_vsoxseg4ei32_v_i32m2(__VA_ARGS__)

◆ vsoxseg4ei32_v_i32m2_m

#define vsoxseg4ei32_v_i32m2_m ( ... ) __riscv_vsoxseg4ei32_v_i32m2_m(__VA_ARGS__)

◆ vsoxseg4ei32_v_i32mf2

#define vsoxseg4ei32_v_i32mf2 ( ... ) __riscv_vsoxseg4ei32_v_i32mf2(__VA_ARGS__)

◆ vsoxseg4ei32_v_i32mf2_m

#define vsoxseg4ei32_v_i32mf2_m ( ... ) __riscv_vsoxseg4ei32_v_i32mf2_m(__VA_ARGS__)

◆ vsoxseg4ei32_v_i64m1

#define vsoxseg4ei32_v_i64m1 ( ... ) __riscv_vsoxseg4ei32_v_i64m1(__VA_ARGS__)

◆ vsoxseg4ei32_v_i64m1_m

#define vsoxseg4ei32_v_i64m1_m ( ... ) __riscv_vsoxseg4ei32_v_i64m1_m(__VA_ARGS__)

◆ vsoxseg4ei32_v_i64m2

#define vsoxseg4ei32_v_i64m2 ( ... ) __riscv_vsoxseg4ei32_v_i64m2(__VA_ARGS__)

◆ vsoxseg4ei32_v_i64m2_m

#define vsoxseg4ei32_v_i64m2_m ( ... ) __riscv_vsoxseg4ei32_v_i64m2_m(__VA_ARGS__)

◆ vsoxseg4ei32_v_i8m1

#define vsoxseg4ei32_v_i8m1 ( ... ) __riscv_vsoxseg4ei32_v_i8m1(__VA_ARGS__)

◆ vsoxseg4ei32_v_i8m1_m

#define vsoxseg4ei32_v_i8m1_m ( ... ) __riscv_vsoxseg4ei32_v_i8m1_m(__VA_ARGS__)

◆ vsoxseg4ei32_v_i8m2

#define vsoxseg4ei32_v_i8m2 ( ... ) __riscv_vsoxseg4ei32_v_i8m2(__VA_ARGS__)

◆ vsoxseg4ei32_v_i8m2_m

#define vsoxseg4ei32_v_i8m2_m ( ... ) __riscv_vsoxseg4ei32_v_i8m2_m(__VA_ARGS__)

◆ vsoxseg4ei32_v_i8mf2

#define vsoxseg4ei32_v_i8mf2 ( ... ) __riscv_vsoxseg4ei32_v_i8mf2(__VA_ARGS__)

◆ vsoxseg4ei32_v_i8mf2_m

#define vsoxseg4ei32_v_i8mf2_m ( ... ) __riscv_vsoxseg4ei32_v_i8mf2_m(__VA_ARGS__)

◆ vsoxseg4ei32_v_i8mf4

#define vsoxseg4ei32_v_i8mf4 ( ... ) __riscv_vsoxseg4ei32_v_i8mf4(__VA_ARGS__)

◆ vsoxseg4ei32_v_i8mf4_m

#define vsoxseg4ei32_v_i8mf4_m ( ... ) __riscv_vsoxseg4ei32_v_i8mf4_m(__VA_ARGS__)

◆ vsoxseg4ei32_v_i8mf8

#define vsoxseg4ei32_v_i8mf8 ( ... ) __riscv_vsoxseg4ei32_v_i8mf8(__VA_ARGS__)

◆ vsoxseg4ei32_v_i8mf8_m

#define vsoxseg4ei32_v_i8mf8_m ( ... ) __riscv_vsoxseg4ei32_v_i8mf8_m(__VA_ARGS__)

◆ vsoxseg4ei32_v_u16m1

#define vsoxseg4ei32_v_u16m1 ( ... ) __riscv_vsoxseg4ei32_v_u16m1(__VA_ARGS__)

◆ vsoxseg4ei32_v_u16m1_m

#define vsoxseg4ei32_v_u16m1_m ( ... ) __riscv_vsoxseg4ei32_v_u16m1_m(__VA_ARGS__)

◆ vsoxseg4ei32_v_u16m2

#define vsoxseg4ei32_v_u16m2 ( ... ) __riscv_vsoxseg4ei32_v_u16m2(__VA_ARGS__)

◆ vsoxseg4ei32_v_u16m2_m

#define vsoxseg4ei32_v_u16m2_m ( ... ) __riscv_vsoxseg4ei32_v_u16m2_m(__VA_ARGS__)

◆ vsoxseg4ei32_v_u16mf2

#define vsoxseg4ei32_v_u16mf2 ( ... ) __riscv_vsoxseg4ei32_v_u16mf2(__VA_ARGS__)

◆ vsoxseg4ei32_v_u16mf2_m

#define vsoxseg4ei32_v_u16mf2_m ( ... ) __riscv_vsoxseg4ei32_v_u16mf2_m(__VA_ARGS__)

◆ vsoxseg4ei32_v_u16mf4

#define vsoxseg4ei32_v_u16mf4 ( ... ) __riscv_vsoxseg4ei32_v_u16mf4(__VA_ARGS__)

◆ vsoxseg4ei32_v_u16mf4_m

#define vsoxseg4ei32_v_u16mf4_m ( ... ) __riscv_vsoxseg4ei32_v_u16mf4_m(__VA_ARGS__)

◆ vsoxseg4ei32_v_u32m1

#define vsoxseg4ei32_v_u32m1 ( ... ) __riscv_vsoxseg4ei32_v_u32m1(__VA_ARGS__)

◆ vsoxseg4ei32_v_u32m1_m

#define vsoxseg4ei32_v_u32m1_m ( ... ) __riscv_vsoxseg4ei32_v_u32m1_m(__VA_ARGS__)

◆ vsoxseg4ei32_v_u32m2

#define vsoxseg4ei32_v_u32m2 ( ... ) __riscv_vsoxseg4ei32_v_u32m2(__VA_ARGS__)

◆ vsoxseg4ei32_v_u32m2_m

#define vsoxseg4ei32_v_u32m2_m ( ... ) __riscv_vsoxseg4ei32_v_u32m2_m(__VA_ARGS__)

◆ vsoxseg4ei32_v_u32mf2

#define vsoxseg4ei32_v_u32mf2 ( ... ) __riscv_vsoxseg4ei32_v_u32mf2(__VA_ARGS__)

◆ vsoxseg4ei32_v_u32mf2_m

#define vsoxseg4ei32_v_u32mf2_m ( ... ) __riscv_vsoxseg4ei32_v_u32mf2_m(__VA_ARGS__)

◆ vsoxseg4ei32_v_u64m1

#define vsoxseg4ei32_v_u64m1 ( ... ) __riscv_vsoxseg4ei32_v_u64m1(__VA_ARGS__)

◆ vsoxseg4ei32_v_u64m1_m

#define vsoxseg4ei32_v_u64m1_m ( ... ) __riscv_vsoxseg4ei32_v_u64m1_m(__VA_ARGS__)

◆ vsoxseg4ei32_v_u64m2

#define vsoxseg4ei32_v_u64m2 ( ... ) __riscv_vsoxseg4ei32_v_u64m2(__VA_ARGS__)

◆ vsoxseg4ei32_v_u64m2_m

#define vsoxseg4ei32_v_u64m2_m ( ... ) __riscv_vsoxseg4ei32_v_u64m2_m(__VA_ARGS__)

◆ vsoxseg4ei32_v_u8m1

#define vsoxseg4ei32_v_u8m1 ( ... ) __riscv_vsoxseg4ei32_v_u8m1(__VA_ARGS__)

◆ vsoxseg4ei32_v_u8m1_m

#define vsoxseg4ei32_v_u8m1_m ( ... ) __riscv_vsoxseg4ei32_v_u8m1_m(__VA_ARGS__)

◆ vsoxseg4ei32_v_u8m2

#define vsoxseg4ei32_v_u8m2 ( ... ) __riscv_vsoxseg4ei32_v_u8m2(__VA_ARGS__)

◆ vsoxseg4ei32_v_u8m2_m

#define vsoxseg4ei32_v_u8m2_m ( ... ) __riscv_vsoxseg4ei32_v_u8m2_m(__VA_ARGS__)

◆ vsoxseg4ei32_v_u8mf2

#define vsoxseg4ei32_v_u8mf2 ( ... ) __riscv_vsoxseg4ei32_v_u8mf2(__VA_ARGS__)

◆ vsoxseg4ei32_v_u8mf2_m

#define vsoxseg4ei32_v_u8mf2_m ( ... ) __riscv_vsoxseg4ei32_v_u8mf2_m(__VA_ARGS__)

◆ vsoxseg4ei32_v_u8mf4

#define vsoxseg4ei32_v_u8mf4 ( ... ) __riscv_vsoxseg4ei32_v_u8mf4(__VA_ARGS__)

◆ vsoxseg4ei32_v_u8mf4_m

#define vsoxseg4ei32_v_u8mf4_m ( ... ) __riscv_vsoxseg4ei32_v_u8mf4_m(__VA_ARGS__)

◆ vsoxseg4ei32_v_u8mf8

#define vsoxseg4ei32_v_u8mf8 ( ... ) __riscv_vsoxseg4ei32_v_u8mf8(__VA_ARGS__)

◆ vsoxseg4ei32_v_u8mf8_m

#define vsoxseg4ei32_v_u8mf8_m ( ... ) __riscv_vsoxseg4ei32_v_u8mf8_m(__VA_ARGS__)

◆ vsoxseg4ei64_v_f16m1

#define vsoxseg4ei64_v_f16m1 ( ... ) __riscv_vsoxseg4ei64_v_f16m1(__VA_ARGS__)

◆ vsoxseg4ei64_v_f16m1_m

#define vsoxseg4ei64_v_f16m1_m ( ... ) __riscv_vsoxseg4ei64_v_f16m1_m(__VA_ARGS__)

◆ vsoxseg4ei64_v_f16m2

#define vsoxseg4ei64_v_f16m2 ( ... ) __riscv_vsoxseg4ei64_v_f16m2(__VA_ARGS__)

◆ vsoxseg4ei64_v_f16m2_m

#define vsoxseg4ei64_v_f16m2_m ( ... ) __riscv_vsoxseg4ei64_v_f16m2_m(__VA_ARGS__)

◆ vsoxseg4ei64_v_f16mf2

#define vsoxseg4ei64_v_f16mf2 ( ... ) __riscv_vsoxseg4ei64_v_f16mf2(__VA_ARGS__)

◆ vsoxseg4ei64_v_f16mf2_m

#define vsoxseg4ei64_v_f16mf2_m ( ... ) __riscv_vsoxseg4ei64_v_f16mf2_m(__VA_ARGS__)

◆ vsoxseg4ei64_v_f16mf4

#define vsoxseg4ei64_v_f16mf4 ( ... ) __riscv_vsoxseg4ei64_v_f16mf4(__VA_ARGS__)

◆ vsoxseg4ei64_v_f16mf4_m

#define vsoxseg4ei64_v_f16mf4_m ( ... ) __riscv_vsoxseg4ei64_v_f16mf4_m(__VA_ARGS__)

◆ vsoxseg4ei64_v_f32m1

#define vsoxseg4ei64_v_f32m1 ( ... ) __riscv_vsoxseg4ei64_v_f32m1(__VA_ARGS__)

◆ vsoxseg4ei64_v_f32m1_m

#define vsoxseg4ei64_v_f32m1_m ( ... ) __riscv_vsoxseg4ei64_v_f32m1_m(__VA_ARGS__)

◆ vsoxseg4ei64_v_f32m2

#define vsoxseg4ei64_v_f32m2 ( ... ) __riscv_vsoxseg4ei64_v_f32m2(__VA_ARGS__)

◆ vsoxseg4ei64_v_f32m2_m

#define vsoxseg4ei64_v_f32m2_m ( ... ) __riscv_vsoxseg4ei64_v_f32m2_m(__VA_ARGS__)

◆ vsoxseg4ei64_v_f32mf2

#define vsoxseg4ei64_v_f32mf2 ( ... ) __riscv_vsoxseg4ei64_v_f32mf2(__VA_ARGS__)

◆ vsoxseg4ei64_v_f32mf2_m

#define vsoxseg4ei64_v_f32mf2_m ( ... ) __riscv_vsoxseg4ei64_v_f32mf2_m(__VA_ARGS__)

◆ vsoxseg4ei64_v_f64m1

#define vsoxseg4ei64_v_f64m1 ( ... ) __riscv_vsoxseg4ei64_v_f64m1(__VA_ARGS__)

◆ vsoxseg4ei64_v_f64m1_m

#define vsoxseg4ei64_v_f64m1_m ( ... ) __riscv_vsoxseg4ei64_v_f64m1_m(__VA_ARGS__)

◆ vsoxseg4ei64_v_f64m2

#define vsoxseg4ei64_v_f64m2 ( ... ) __riscv_vsoxseg4ei64_v_f64m2(__VA_ARGS__)

◆ vsoxseg4ei64_v_f64m2_m

#define vsoxseg4ei64_v_f64m2_m ( ... ) __riscv_vsoxseg4ei64_v_f64m2_m(__VA_ARGS__)

◆ vsoxseg4ei64_v_i16m1

#define vsoxseg4ei64_v_i16m1 ( ... ) __riscv_vsoxseg4ei64_v_i16m1(__VA_ARGS__)

◆ vsoxseg4ei64_v_i16m1_m

#define vsoxseg4ei64_v_i16m1_m ( ... ) __riscv_vsoxseg4ei64_v_i16m1_m(__VA_ARGS__)

◆ vsoxseg4ei64_v_i16m2

#define vsoxseg4ei64_v_i16m2 ( ... ) __riscv_vsoxseg4ei64_v_i16m2(__VA_ARGS__)

◆ vsoxseg4ei64_v_i16m2_m

#define vsoxseg4ei64_v_i16m2_m ( ... ) __riscv_vsoxseg4ei64_v_i16m2_m(__VA_ARGS__)

◆ vsoxseg4ei64_v_i16mf2

#define vsoxseg4ei64_v_i16mf2 ( ... ) __riscv_vsoxseg4ei64_v_i16mf2(__VA_ARGS__)

◆ vsoxseg4ei64_v_i16mf2_m

#define vsoxseg4ei64_v_i16mf2_m ( ... ) __riscv_vsoxseg4ei64_v_i16mf2_m(__VA_ARGS__)

◆ vsoxseg4ei64_v_i16mf4

#define vsoxseg4ei64_v_i16mf4 ( ... ) __riscv_vsoxseg4ei64_v_i16mf4(__VA_ARGS__)

◆ vsoxseg4ei64_v_i16mf4_m

#define vsoxseg4ei64_v_i16mf4_m ( ... ) __riscv_vsoxseg4ei64_v_i16mf4_m(__VA_ARGS__)

◆ vsoxseg4ei64_v_i32m1

#define vsoxseg4ei64_v_i32m1 ( ... ) __riscv_vsoxseg4ei64_v_i32m1(__VA_ARGS__)

◆ vsoxseg4ei64_v_i32m1_m

#define vsoxseg4ei64_v_i32m1_m ( ... ) __riscv_vsoxseg4ei64_v_i32m1_m(__VA_ARGS__)

◆ vsoxseg4ei64_v_i32m2

#define vsoxseg4ei64_v_i32m2 ( ... ) __riscv_vsoxseg4ei64_v_i32m2(__VA_ARGS__)

◆ vsoxseg4ei64_v_i32m2_m

#define vsoxseg4ei64_v_i32m2_m ( ... ) __riscv_vsoxseg4ei64_v_i32m2_m(__VA_ARGS__)

◆ vsoxseg4ei64_v_i32mf2

#define vsoxseg4ei64_v_i32mf2 ( ... ) __riscv_vsoxseg4ei64_v_i32mf2(__VA_ARGS__)

◆ vsoxseg4ei64_v_i32mf2_m

#define vsoxseg4ei64_v_i32mf2_m ( ... ) __riscv_vsoxseg4ei64_v_i32mf2_m(__VA_ARGS__)

◆ vsoxseg4ei64_v_i64m1

#define vsoxseg4ei64_v_i64m1 ( ... ) __riscv_vsoxseg4ei64_v_i64m1(__VA_ARGS__)

◆ vsoxseg4ei64_v_i64m1_m

#define vsoxseg4ei64_v_i64m1_m ( ... ) __riscv_vsoxseg4ei64_v_i64m1_m(__VA_ARGS__)

◆ vsoxseg4ei64_v_i64m2

#define vsoxseg4ei64_v_i64m2 ( ... ) __riscv_vsoxseg4ei64_v_i64m2(__VA_ARGS__)

◆ vsoxseg4ei64_v_i64m2_m

#define vsoxseg4ei64_v_i64m2_m ( ... ) __riscv_vsoxseg4ei64_v_i64m2_m(__VA_ARGS__)

◆ vsoxseg4ei64_v_i8m1

#define vsoxseg4ei64_v_i8m1 ( ... ) __riscv_vsoxseg4ei64_v_i8m1(__VA_ARGS__)

◆ vsoxseg4ei64_v_i8m1_m

#define vsoxseg4ei64_v_i8m1_m ( ... ) __riscv_vsoxseg4ei64_v_i8m1_m(__VA_ARGS__)

◆ vsoxseg4ei64_v_i8mf2

#define vsoxseg4ei64_v_i8mf2 ( ... ) __riscv_vsoxseg4ei64_v_i8mf2(__VA_ARGS__)

◆ vsoxseg4ei64_v_i8mf2_m

#define vsoxseg4ei64_v_i8mf2_m ( ... ) __riscv_vsoxseg4ei64_v_i8mf2_m(__VA_ARGS__)

◆ vsoxseg4ei64_v_i8mf4

#define vsoxseg4ei64_v_i8mf4 ( ... ) __riscv_vsoxseg4ei64_v_i8mf4(__VA_ARGS__)

◆ vsoxseg4ei64_v_i8mf4_m

#define vsoxseg4ei64_v_i8mf4_m ( ... ) __riscv_vsoxseg4ei64_v_i8mf4_m(__VA_ARGS__)

◆ vsoxseg4ei64_v_i8mf8

#define vsoxseg4ei64_v_i8mf8 ( ... ) __riscv_vsoxseg4ei64_v_i8mf8(__VA_ARGS__)

◆ vsoxseg4ei64_v_i8mf8_m

#define vsoxseg4ei64_v_i8mf8_m ( ... ) __riscv_vsoxseg4ei64_v_i8mf8_m(__VA_ARGS__)

◆ vsoxseg4ei64_v_u16m1

#define vsoxseg4ei64_v_u16m1 ( ... ) __riscv_vsoxseg4ei64_v_u16m1(__VA_ARGS__)

◆ vsoxseg4ei64_v_u16m1_m

#define vsoxseg4ei64_v_u16m1_m ( ... ) __riscv_vsoxseg4ei64_v_u16m1_m(__VA_ARGS__)

◆ vsoxseg4ei64_v_u16m2

#define vsoxseg4ei64_v_u16m2 ( ... ) __riscv_vsoxseg4ei64_v_u16m2(__VA_ARGS__)

◆ vsoxseg4ei64_v_u16m2_m

#define vsoxseg4ei64_v_u16m2_m ( ... ) __riscv_vsoxseg4ei64_v_u16m2_m(__VA_ARGS__)

◆ vsoxseg4ei64_v_u16mf2

#define vsoxseg4ei64_v_u16mf2 ( ... ) __riscv_vsoxseg4ei64_v_u16mf2(__VA_ARGS__)

◆ vsoxseg4ei64_v_u16mf2_m

#define vsoxseg4ei64_v_u16mf2_m ( ... ) __riscv_vsoxseg4ei64_v_u16mf2_m(__VA_ARGS__)

◆ vsoxseg4ei64_v_u16mf4

#define vsoxseg4ei64_v_u16mf4 ( ... ) __riscv_vsoxseg4ei64_v_u16mf4(__VA_ARGS__)

◆ vsoxseg4ei64_v_u16mf4_m

#define vsoxseg4ei64_v_u16mf4_m ( ... ) __riscv_vsoxseg4ei64_v_u16mf4_m(__VA_ARGS__)

◆ vsoxseg4ei64_v_u32m1

#define vsoxseg4ei64_v_u32m1 ( ... ) __riscv_vsoxseg4ei64_v_u32m1(__VA_ARGS__)

◆ vsoxseg4ei64_v_u32m1_m

#define vsoxseg4ei64_v_u32m1_m ( ... ) __riscv_vsoxseg4ei64_v_u32m1_m(__VA_ARGS__)

◆ vsoxseg4ei64_v_u32m2

#define vsoxseg4ei64_v_u32m2 ( ... ) __riscv_vsoxseg4ei64_v_u32m2(__VA_ARGS__)

◆ vsoxseg4ei64_v_u32m2_m

#define vsoxseg4ei64_v_u32m2_m ( ... ) __riscv_vsoxseg4ei64_v_u32m2_m(__VA_ARGS__)

◆ vsoxseg4ei64_v_u32mf2

#define vsoxseg4ei64_v_u32mf2 ( ... ) __riscv_vsoxseg4ei64_v_u32mf2(__VA_ARGS__)

◆ vsoxseg4ei64_v_u32mf2_m

#define vsoxseg4ei64_v_u32mf2_m ( ... ) __riscv_vsoxseg4ei64_v_u32mf2_m(__VA_ARGS__)

◆ vsoxseg4ei64_v_u64m1

#define vsoxseg4ei64_v_u64m1 ( ... ) __riscv_vsoxseg4ei64_v_u64m1(__VA_ARGS__)

◆ vsoxseg4ei64_v_u64m1_m

#define vsoxseg4ei64_v_u64m1_m ( ... ) __riscv_vsoxseg4ei64_v_u64m1_m(__VA_ARGS__)

◆ vsoxseg4ei64_v_u64m2

#define vsoxseg4ei64_v_u64m2 ( ... ) __riscv_vsoxseg4ei64_v_u64m2(__VA_ARGS__)

◆ vsoxseg4ei64_v_u64m2_m

#define vsoxseg4ei64_v_u64m2_m ( ... ) __riscv_vsoxseg4ei64_v_u64m2_m(__VA_ARGS__)

◆ vsoxseg4ei64_v_u8m1

#define vsoxseg4ei64_v_u8m1 ( ... ) __riscv_vsoxseg4ei64_v_u8m1(__VA_ARGS__)

◆ vsoxseg4ei64_v_u8m1_m

#define vsoxseg4ei64_v_u8m1_m ( ... ) __riscv_vsoxseg4ei64_v_u8m1_m(__VA_ARGS__)

◆ vsoxseg4ei64_v_u8mf2

#define vsoxseg4ei64_v_u8mf2 ( ... ) __riscv_vsoxseg4ei64_v_u8mf2(__VA_ARGS__)

◆ vsoxseg4ei64_v_u8mf2_m

#define vsoxseg4ei64_v_u8mf2_m ( ... ) __riscv_vsoxseg4ei64_v_u8mf2_m(__VA_ARGS__)

◆ vsoxseg4ei64_v_u8mf4

#define vsoxseg4ei64_v_u8mf4 ( ... ) __riscv_vsoxseg4ei64_v_u8mf4(__VA_ARGS__)

◆ vsoxseg4ei64_v_u8mf4_m

#define vsoxseg4ei64_v_u8mf4_m ( ... ) __riscv_vsoxseg4ei64_v_u8mf4_m(__VA_ARGS__)

◆ vsoxseg4ei64_v_u8mf8

#define vsoxseg4ei64_v_u8mf8 ( ... ) __riscv_vsoxseg4ei64_v_u8mf8(__VA_ARGS__)

◆ vsoxseg4ei64_v_u8mf8_m

#define vsoxseg4ei64_v_u8mf8_m ( ... ) __riscv_vsoxseg4ei64_v_u8mf8_m(__VA_ARGS__)

◆ vsoxseg4ei8_v_f16m1

#define vsoxseg4ei8_v_f16m1 ( ... ) __riscv_vsoxseg4ei8_v_f16m1(__VA_ARGS__)

◆ vsoxseg4ei8_v_f16m1_m

#define vsoxseg4ei8_v_f16m1_m ( ... ) __riscv_vsoxseg4ei8_v_f16m1_m(__VA_ARGS__)

◆ vsoxseg4ei8_v_f16m2

#define vsoxseg4ei8_v_f16m2 ( ... ) __riscv_vsoxseg4ei8_v_f16m2(__VA_ARGS__)

◆ vsoxseg4ei8_v_f16m2_m

#define vsoxseg4ei8_v_f16m2_m ( ... ) __riscv_vsoxseg4ei8_v_f16m2_m(__VA_ARGS__)

◆ vsoxseg4ei8_v_f16mf2

#define vsoxseg4ei8_v_f16mf2 ( ... ) __riscv_vsoxseg4ei8_v_f16mf2(__VA_ARGS__)

◆ vsoxseg4ei8_v_f16mf2_m

#define vsoxseg4ei8_v_f16mf2_m ( ... ) __riscv_vsoxseg4ei8_v_f16mf2_m(__VA_ARGS__)

◆ vsoxseg4ei8_v_f16mf4

#define vsoxseg4ei8_v_f16mf4 ( ... ) __riscv_vsoxseg4ei8_v_f16mf4(__VA_ARGS__)

◆ vsoxseg4ei8_v_f16mf4_m

#define vsoxseg4ei8_v_f16mf4_m ( ... ) __riscv_vsoxseg4ei8_v_f16mf4_m(__VA_ARGS__)

◆ vsoxseg4ei8_v_f32m1

#define vsoxseg4ei8_v_f32m1 ( ... ) __riscv_vsoxseg4ei8_v_f32m1(__VA_ARGS__)

◆ vsoxseg4ei8_v_f32m1_m

#define vsoxseg4ei8_v_f32m1_m ( ... ) __riscv_vsoxseg4ei8_v_f32m1_m(__VA_ARGS__)

◆ vsoxseg4ei8_v_f32m2

#define vsoxseg4ei8_v_f32m2 ( ... ) __riscv_vsoxseg4ei8_v_f32m2(__VA_ARGS__)

◆ vsoxseg4ei8_v_f32m2_m

#define vsoxseg4ei8_v_f32m2_m ( ... ) __riscv_vsoxseg4ei8_v_f32m2_m(__VA_ARGS__)

◆ vsoxseg4ei8_v_f32mf2

#define vsoxseg4ei8_v_f32mf2 ( ... ) __riscv_vsoxseg4ei8_v_f32mf2(__VA_ARGS__)

◆ vsoxseg4ei8_v_f32mf2_m

#define vsoxseg4ei8_v_f32mf2_m ( ... ) __riscv_vsoxseg4ei8_v_f32mf2_m(__VA_ARGS__)

◆ vsoxseg4ei8_v_f64m1

#define vsoxseg4ei8_v_f64m1 ( ... ) __riscv_vsoxseg4ei8_v_f64m1(__VA_ARGS__)

◆ vsoxseg4ei8_v_f64m1_m

#define vsoxseg4ei8_v_f64m1_m ( ... ) __riscv_vsoxseg4ei8_v_f64m1_m(__VA_ARGS__)

◆ vsoxseg4ei8_v_f64m2

#define vsoxseg4ei8_v_f64m2 ( ... ) __riscv_vsoxseg4ei8_v_f64m2(__VA_ARGS__)

◆ vsoxseg4ei8_v_f64m2_m

#define vsoxseg4ei8_v_f64m2_m ( ... ) __riscv_vsoxseg4ei8_v_f64m2_m(__VA_ARGS__)

◆ vsoxseg4ei8_v_i16m1

#define vsoxseg4ei8_v_i16m1 ( ... ) __riscv_vsoxseg4ei8_v_i16m1(__VA_ARGS__)

◆ vsoxseg4ei8_v_i16m1_m

#define vsoxseg4ei8_v_i16m1_m ( ... ) __riscv_vsoxseg4ei8_v_i16m1_m(__VA_ARGS__)

◆ vsoxseg4ei8_v_i16m2

#define vsoxseg4ei8_v_i16m2 ( ... ) __riscv_vsoxseg4ei8_v_i16m2(__VA_ARGS__)

◆ vsoxseg4ei8_v_i16m2_m

#define vsoxseg4ei8_v_i16m2_m ( ... ) __riscv_vsoxseg4ei8_v_i16m2_m(__VA_ARGS__)

◆ vsoxseg4ei8_v_i16mf2

#define vsoxseg4ei8_v_i16mf2 ( ... ) __riscv_vsoxseg4ei8_v_i16mf2(__VA_ARGS__)

◆ vsoxseg4ei8_v_i16mf2_m

#define vsoxseg4ei8_v_i16mf2_m ( ... ) __riscv_vsoxseg4ei8_v_i16mf2_m(__VA_ARGS__)

◆ vsoxseg4ei8_v_i16mf4

#define vsoxseg4ei8_v_i16mf4 ( ... ) __riscv_vsoxseg4ei8_v_i16mf4(__VA_ARGS__)

◆ vsoxseg4ei8_v_i16mf4_m

#define vsoxseg4ei8_v_i16mf4_m ( ... ) __riscv_vsoxseg4ei8_v_i16mf4_m(__VA_ARGS__)

◆ vsoxseg4ei8_v_i32m1

#define vsoxseg4ei8_v_i32m1 ( ... ) __riscv_vsoxseg4ei8_v_i32m1(__VA_ARGS__)

◆ vsoxseg4ei8_v_i32m1_m

#define vsoxseg4ei8_v_i32m1_m ( ... ) __riscv_vsoxseg4ei8_v_i32m1_m(__VA_ARGS__)

◆ vsoxseg4ei8_v_i32m2

#define vsoxseg4ei8_v_i32m2 ( ... ) __riscv_vsoxseg4ei8_v_i32m2(__VA_ARGS__)

◆ vsoxseg4ei8_v_i32m2_m

#define vsoxseg4ei8_v_i32m2_m ( ... ) __riscv_vsoxseg4ei8_v_i32m2_m(__VA_ARGS__)

◆ vsoxseg4ei8_v_i32mf2

#define vsoxseg4ei8_v_i32mf2 ( ... ) __riscv_vsoxseg4ei8_v_i32mf2(__VA_ARGS__)

◆ vsoxseg4ei8_v_i32mf2_m

#define vsoxseg4ei8_v_i32mf2_m ( ... ) __riscv_vsoxseg4ei8_v_i32mf2_m(__VA_ARGS__)

◆ vsoxseg4ei8_v_i64m1

#define vsoxseg4ei8_v_i64m1 ( ... ) __riscv_vsoxseg4ei8_v_i64m1(__VA_ARGS__)

◆ vsoxseg4ei8_v_i64m1_m

#define vsoxseg4ei8_v_i64m1_m ( ... ) __riscv_vsoxseg4ei8_v_i64m1_m(__VA_ARGS__)

◆ vsoxseg4ei8_v_i64m2

#define vsoxseg4ei8_v_i64m2 ( ... ) __riscv_vsoxseg4ei8_v_i64m2(__VA_ARGS__)

◆ vsoxseg4ei8_v_i64m2_m

#define vsoxseg4ei8_v_i64m2_m ( ... ) __riscv_vsoxseg4ei8_v_i64m2_m(__VA_ARGS__)

◆ vsoxseg4ei8_v_i8m1

#define vsoxseg4ei8_v_i8m1 ( ... ) __riscv_vsoxseg4ei8_v_i8m1(__VA_ARGS__)

◆ vsoxseg4ei8_v_i8m1_m

#define vsoxseg4ei8_v_i8m1_m ( ... ) __riscv_vsoxseg4ei8_v_i8m1_m(__VA_ARGS__)

◆ vsoxseg4ei8_v_i8m2

#define vsoxseg4ei8_v_i8m2 ( ... ) __riscv_vsoxseg4ei8_v_i8m2(__VA_ARGS__)

◆ vsoxseg4ei8_v_i8m2_m

#define vsoxseg4ei8_v_i8m2_m ( ... ) __riscv_vsoxseg4ei8_v_i8m2_m(__VA_ARGS__)

◆ vsoxseg4ei8_v_i8mf2

#define vsoxseg4ei8_v_i8mf2 ( ... ) __riscv_vsoxseg4ei8_v_i8mf2(__VA_ARGS__)

◆ vsoxseg4ei8_v_i8mf2_m

#define vsoxseg4ei8_v_i8mf2_m ( ... ) __riscv_vsoxseg4ei8_v_i8mf2_m(__VA_ARGS__)

◆ vsoxseg4ei8_v_i8mf4

#define vsoxseg4ei8_v_i8mf4 ( ... ) __riscv_vsoxseg4ei8_v_i8mf4(__VA_ARGS__)

◆ vsoxseg4ei8_v_i8mf4_m

#define vsoxseg4ei8_v_i8mf4_m ( ... ) __riscv_vsoxseg4ei8_v_i8mf4_m(__VA_ARGS__)

◆ vsoxseg4ei8_v_i8mf8

#define vsoxseg4ei8_v_i8mf8 ( ... ) __riscv_vsoxseg4ei8_v_i8mf8(__VA_ARGS__)

◆ vsoxseg4ei8_v_i8mf8_m

#define vsoxseg4ei8_v_i8mf8_m ( ... ) __riscv_vsoxseg4ei8_v_i8mf8_m(__VA_ARGS__)

◆ vsoxseg4ei8_v_u16m1

#define vsoxseg4ei8_v_u16m1 ( ... ) __riscv_vsoxseg4ei8_v_u16m1(__VA_ARGS__)

◆ vsoxseg4ei8_v_u16m1_m

#define vsoxseg4ei8_v_u16m1_m ( ... ) __riscv_vsoxseg4ei8_v_u16m1_m(__VA_ARGS__)

◆ vsoxseg4ei8_v_u16m2

#define vsoxseg4ei8_v_u16m2 ( ... ) __riscv_vsoxseg4ei8_v_u16m2(__VA_ARGS__)

◆ vsoxseg4ei8_v_u16m2_m

#define vsoxseg4ei8_v_u16m2_m ( ... ) __riscv_vsoxseg4ei8_v_u16m2_m(__VA_ARGS__)

◆ vsoxseg4ei8_v_u16mf2

#define vsoxseg4ei8_v_u16mf2 ( ... ) __riscv_vsoxseg4ei8_v_u16mf2(__VA_ARGS__)

◆ vsoxseg4ei8_v_u16mf2_m

#define vsoxseg4ei8_v_u16mf2_m ( ... ) __riscv_vsoxseg4ei8_v_u16mf2_m(__VA_ARGS__)

◆ vsoxseg4ei8_v_u16mf4

#define vsoxseg4ei8_v_u16mf4 ( ... ) __riscv_vsoxseg4ei8_v_u16mf4(__VA_ARGS__)

◆ vsoxseg4ei8_v_u16mf4_m

#define vsoxseg4ei8_v_u16mf4_m ( ... ) __riscv_vsoxseg4ei8_v_u16mf4_m(__VA_ARGS__)

◆ vsoxseg4ei8_v_u32m1

#define vsoxseg4ei8_v_u32m1 ( ... ) __riscv_vsoxseg4ei8_v_u32m1(__VA_ARGS__)

◆ vsoxseg4ei8_v_u32m1_m

#define vsoxseg4ei8_v_u32m1_m ( ... ) __riscv_vsoxseg4ei8_v_u32m1_m(__VA_ARGS__)

◆ vsoxseg4ei8_v_u32m2

#define vsoxseg4ei8_v_u32m2 ( ... ) __riscv_vsoxseg4ei8_v_u32m2(__VA_ARGS__)

◆ vsoxseg4ei8_v_u32m2_m

#define vsoxseg4ei8_v_u32m2_m ( ... ) __riscv_vsoxseg4ei8_v_u32m2_m(__VA_ARGS__)

◆ vsoxseg4ei8_v_u32mf2

#define vsoxseg4ei8_v_u32mf2 ( ... ) __riscv_vsoxseg4ei8_v_u32mf2(__VA_ARGS__)

◆ vsoxseg4ei8_v_u32mf2_m

#define vsoxseg4ei8_v_u32mf2_m ( ... ) __riscv_vsoxseg4ei8_v_u32mf2_m(__VA_ARGS__)

◆ vsoxseg4ei8_v_u64m1

#define vsoxseg4ei8_v_u64m1 ( ... ) __riscv_vsoxseg4ei8_v_u64m1(__VA_ARGS__)

◆ vsoxseg4ei8_v_u64m1_m

#define vsoxseg4ei8_v_u64m1_m ( ... ) __riscv_vsoxseg4ei8_v_u64m1_m(__VA_ARGS__)

◆ vsoxseg4ei8_v_u64m2

#define vsoxseg4ei8_v_u64m2 ( ... ) __riscv_vsoxseg4ei8_v_u64m2(__VA_ARGS__)

◆ vsoxseg4ei8_v_u64m2_m

#define vsoxseg4ei8_v_u64m2_m ( ... ) __riscv_vsoxseg4ei8_v_u64m2_m(__VA_ARGS__)

◆ vsoxseg4ei8_v_u8m1

#define vsoxseg4ei8_v_u8m1 ( ... ) __riscv_vsoxseg4ei8_v_u8m1(__VA_ARGS__)

◆ vsoxseg4ei8_v_u8m1_m

#define vsoxseg4ei8_v_u8m1_m ( ... ) __riscv_vsoxseg4ei8_v_u8m1_m(__VA_ARGS__)

◆ vsoxseg4ei8_v_u8m2

#define vsoxseg4ei8_v_u8m2 ( ... ) __riscv_vsoxseg4ei8_v_u8m2(__VA_ARGS__)

◆ vsoxseg4ei8_v_u8m2_m

#define vsoxseg4ei8_v_u8m2_m ( ... ) __riscv_vsoxseg4ei8_v_u8m2_m(__VA_ARGS__)

◆ vsoxseg4ei8_v_u8mf2

#define vsoxseg4ei8_v_u8mf2 ( ... ) __riscv_vsoxseg4ei8_v_u8mf2(__VA_ARGS__)

◆ vsoxseg4ei8_v_u8mf2_m

#define vsoxseg4ei8_v_u8mf2_m ( ... ) __riscv_vsoxseg4ei8_v_u8mf2_m(__VA_ARGS__)

◆ vsoxseg4ei8_v_u8mf4

#define vsoxseg4ei8_v_u8mf4 ( ... ) __riscv_vsoxseg4ei8_v_u8mf4(__VA_ARGS__)

◆ vsoxseg4ei8_v_u8mf4_m

#define vsoxseg4ei8_v_u8mf4_m ( ... ) __riscv_vsoxseg4ei8_v_u8mf4_m(__VA_ARGS__)

◆ vsoxseg4ei8_v_u8mf8

#define vsoxseg4ei8_v_u8mf8 ( ... ) __riscv_vsoxseg4ei8_v_u8mf8(__VA_ARGS__)

◆ vsoxseg4ei8_v_u8mf8_m

#define vsoxseg4ei8_v_u8mf8_m ( ... ) __riscv_vsoxseg4ei8_v_u8mf8_m(__VA_ARGS__)

◆ vsoxseg5ei16_v_f16m1

#define vsoxseg5ei16_v_f16m1 ( ... ) __riscv_vsoxseg5ei16_v_f16m1(__VA_ARGS__)

◆ vsoxseg5ei16_v_f16m1_m

#define vsoxseg5ei16_v_f16m1_m ( ... ) __riscv_vsoxseg5ei16_v_f16m1_m(__VA_ARGS__)

◆ vsoxseg5ei16_v_f16mf2

#define vsoxseg5ei16_v_f16mf2 ( ... ) __riscv_vsoxseg5ei16_v_f16mf2(__VA_ARGS__)

◆ vsoxseg5ei16_v_f16mf2_m

#define vsoxseg5ei16_v_f16mf2_m ( ... ) __riscv_vsoxseg5ei16_v_f16mf2_m(__VA_ARGS__)

◆ vsoxseg5ei16_v_f16mf4

#define vsoxseg5ei16_v_f16mf4 ( ... ) __riscv_vsoxseg5ei16_v_f16mf4(__VA_ARGS__)

◆ vsoxseg5ei16_v_f16mf4_m

#define vsoxseg5ei16_v_f16mf4_m ( ... ) __riscv_vsoxseg5ei16_v_f16mf4_m(__VA_ARGS__)

◆ vsoxseg5ei16_v_f32m1

#define vsoxseg5ei16_v_f32m1 ( ... ) __riscv_vsoxseg5ei16_v_f32m1(__VA_ARGS__)

◆ vsoxseg5ei16_v_f32m1_m

#define vsoxseg5ei16_v_f32m1_m ( ... ) __riscv_vsoxseg5ei16_v_f32m1_m(__VA_ARGS__)

◆ vsoxseg5ei16_v_f32mf2

#define vsoxseg5ei16_v_f32mf2 ( ... ) __riscv_vsoxseg5ei16_v_f32mf2(__VA_ARGS__)

◆ vsoxseg5ei16_v_f32mf2_m

#define vsoxseg5ei16_v_f32mf2_m ( ... ) __riscv_vsoxseg5ei16_v_f32mf2_m(__VA_ARGS__)

◆ vsoxseg5ei16_v_f64m1

#define vsoxseg5ei16_v_f64m1 ( ... ) __riscv_vsoxseg5ei16_v_f64m1(__VA_ARGS__)

◆ vsoxseg5ei16_v_f64m1_m

#define vsoxseg5ei16_v_f64m1_m ( ... ) __riscv_vsoxseg5ei16_v_f64m1_m(__VA_ARGS__)

◆ vsoxseg5ei16_v_i16m1

#define vsoxseg5ei16_v_i16m1 ( ... ) __riscv_vsoxseg5ei16_v_i16m1(__VA_ARGS__)

◆ vsoxseg5ei16_v_i16m1_m

#define vsoxseg5ei16_v_i16m1_m ( ... ) __riscv_vsoxseg5ei16_v_i16m1_m(__VA_ARGS__)

◆ vsoxseg5ei16_v_i16mf2

#define vsoxseg5ei16_v_i16mf2 ( ... ) __riscv_vsoxseg5ei16_v_i16mf2(__VA_ARGS__)

◆ vsoxseg5ei16_v_i16mf2_m

#define vsoxseg5ei16_v_i16mf2_m ( ... ) __riscv_vsoxseg5ei16_v_i16mf2_m(__VA_ARGS__)

◆ vsoxseg5ei16_v_i16mf4

#define vsoxseg5ei16_v_i16mf4 ( ... ) __riscv_vsoxseg5ei16_v_i16mf4(__VA_ARGS__)

◆ vsoxseg5ei16_v_i16mf4_m

#define vsoxseg5ei16_v_i16mf4_m ( ... ) __riscv_vsoxseg5ei16_v_i16mf4_m(__VA_ARGS__)

◆ vsoxseg5ei16_v_i32m1

#define vsoxseg5ei16_v_i32m1 ( ... ) __riscv_vsoxseg5ei16_v_i32m1(__VA_ARGS__)

◆ vsoxseg5ei16_v_i32m1_m

#define vsoxseg5ei16_v_i32m1_m ( ... ) __riscv_vsoxseg5ei16_v_i32m1_m(__VA_ARGS__)

◆ vsoxseg5ei16_v_i32mf2

#define vsoxseg5ei16_v_i32mf2 ( ... ) __riscv_vsoxseg5ei16_v_i32mf2(__VA_ARGS__)

◆ vsoxseg5ei16_v_i32mf2_m

#define vsoxseg5ei16_v_i32mf2_m ( ... ) __riscv_vsoxseg5ei16_v_i32mf2_m(__VA_ARGS__)

◆ vsoxseg5ei16_v_i64m1

#define vsoxseg5ei16_v_i64m1 ( ... ) __riscv_vsoxseg5ei16_v_i64m1(__VA_ARGS__)

◆ vsoxseg5ei16_v_i64m1_m

#define vsoxseg5ei16_v_i64m1_m ( ... ) __riscv_vsoxseg5ei16_v_i64m1_m(__VA_ARGS__)

◆ vsoxseg5ei16_v_i8m1

#define vsoxseg5ei16_v_i8m1 ( ... ) __riscv_vsoxseg5ei16_v_i8m1(__VA_ARGS__)

◆ vsoxseg5ei16_v_i8m1_m

#define vsoxseg5ei16_v_i8m1_m ( ... ) __riscv_vsoxseg5ei16_v_i8m1_m(__VA_ARGS__)

◆ vsoxseg5ei16_v_i8mf2

#define vsoxseg5ei16_v_i8mf2 ( ... ) __riscv_vsoxseg5ei16_v_i8mf2(__VA_ARGS__)

◆ vsoxseg5ei16_v_i8mf2_m

#define vsoxseg5ei16_v_i8mf2_m ( ... ) __riscv_vsoxseg5ei16_v_i8mf2_m(__VA_ARGS__)

◆ vsoxseg5ei16_v_i8mf4

#define vsoxseg5ei16_v_i8mf4 ( ... ) __riscv_vsoxseg5ei16_v_i8mf4(__VA_ARGS__)

◆ vsoxseg5ei16_v_i8mf4_m

#define vsoxseg5ei16_v_i8mf4_m ( ... ) __riscv_vsoxseg5ei16_v_i8mf4_m(__VA_ARGS__)

◆ vsoxseg5ei16_v_i8mf8

#define vsoxseg5ei16_v_i8mf8 ( ... ) __riscv_vsoxseg5ei16_v_i8mf8(__VA_ARGS__)

◆ vsoxseg5ei16_v_i8mf8_m

#define vsoxseg5ei16_v_i8mf8_m ( ... ) __riscv_vsoxseg5ei16_v_i8mf8_m(__VA_ARGS__)

◆ vsoxseg5ei16_v_u16m1

#define vsoxseg5ei16_v_u16m1 ( ... ) __riscv_vsoxseg5ei16_v_u16m1(__VA_ARGS__)

◆ vsoxseg5ei16_v_u16m1_m

#define vsoxseg5ei16_v_u16m1_m ( ... ) __riscv_vsoxseg5ei16_v_u16m1_m(__VA_ARGS__)

◆ vsoxseg5ei16_v_u16mf2

#define vsoxseg5ei16_v_u16mf2 ( ... ) __riscv_vsoxseg5ei16_v_u16mf2(__VA_ARGS__)

◆ vsoxseg5ei16_v_u16mf2_m

#define vsoxseg5ei16_v_u16mf2_m ( ... ) __riscv_vsoxseg5ei16_v_u16mf2_m(__VA_ARGS__)

◆ vsoxseg5ei16_v_u16mf4

#define vsoxseg5ei16_v_u16mf4 ( ... ) __riscv_vsoxseg5ei16_v_u16mf4(__VA_ARGS__)

◆ vsoxseg5ei16_v_u16mf4_m

#define vsoxseg5ei16_v_u16mf4_m ( ... ) __riscv_vsoxseg5ei16_v_u16mf4_m(__VA_ARGS__)

◆ vsoxseg5ei16_v_u32m1

#define vsoxseg5ei16_v_u32m1 ( ... ) __riscv_vsoxseg5ei16_v_u32m1(__VA_ARGS__)

◆ vsoxseg5ei16_v_u32m1_m

#define vsoxseg5ei16_v_u32m1_m ( ... ) __riscv_vsoxseg5ei16_v_u32m1_m(__VA_ARGS__)

◆ vsoxseg5ei16_v_u32mf2

#define vsoxseg5ei16_v_u32mf2 ( ... ) __riscv_vsoxseg5ei16_v_u32mf2(__VA_ARGS__)

◆ vsoxseg5ei16_v_u32mf2_m

#define vsoxseg5ei16_v_u32mf2_m ( ... ) __riscv_vsoxseg5ei16_v_u32mf2_m(__VA_ARGS__)

◆ vsoxseg5ei16_v_u64m1

#define vsoxseg5ei16_v_u64m1 ( ... ) __riscv_vsoxseg5ei16_v_u64m1(__VA_ARGS__)

◆ vsoxseg5ei16_v_u64m1_m

#define vsoxseg5ei16_v_u64m1_m ( ... ) __riscv_vsoxseg5ei16_v_u64m1_m(__VA_ARGS__)

◆ vsoxseg5ei16_v_u8m1

#define vsoxseg5ei16_v_u8m1 ( ... ) __riscv_vsoxseg5ei16_v_u8m1(__VA_ARGS__)

◆ vsoxseg5ei16_v_u8m1_m

#define vsoxseg5ei16_v_u8m1_m ( ... ) __riscv_vsoxseg5ei16_v_u8m1_m(__VA_ARGS__)

◆ vsoxseg5ei16_v_u8mf2

#define vsoxseg5ei16_v_u8mf2 ( ... ) __riscv_vsoxseg5ei16_v_u8mf2(__VA_ARGS__)

◆ vsoxseg5ei16_v_u8mf2_m

#define vsoxseg5ei16_v_u8mf2_m ( ... ) __riscv_vsoxseg5ei16_v_u8mf2_m(__VA_ARGS__)

◆ vsoxseg5ei16_v_u8mf4

#define vsoxseg5ei16_v_u8mf4 ( ... ) __riscv_vsoxseg5ei16_v_u8mf4(__VA_ARGS__)

◆ vsoxseg5ei16_v_u8mf4_m

#define vsoxseg5ei16_v_u8mf4_m ( ... ) __riscv_vsoxseg5ei16_v_u8mf4_m(__VA_ARGS__)

◆ vsoxseg5ei16_v_u8mf8

#define vsoxseg5ei16_v_u8mf8 ( ... ) __riscv_vsoxseg5ei16_v_u8mf8(__VA_ARGS__)

◆ vsoxseg5ei16_v_u8mf8_m

#define vsoxseg5ei16_v_u8mf8_m ( ... ) __riscv_vsoxseg5ei16_v_u8mf8_m(__VA_ARGS__)

◆ vsoxseg5ei32_v_f16m1

#define vsoxseg5ei32_v_f16m1 ( ... ) __riscv_vsoxseg5ei32_v_f16m1(__VA_ARGS__)

◆ vsoxseg5ei32_v_f16m1_m

#define vsoxseg5ei32_v_f16m1_m ( ... ) __riscv_vsoxseg5ei32_v_f16m1_m(__VA_ARGS__)

◆ vsoxseg5ei32_v_f16mf2

#define vsoxseg5ei32_v_f16mf2 ( ... ) __riscv_vsoxseg5ei32_v_f16mf2(__VA_ARGS__)

◆ vsoxseg5ei32_v_f16mf2_m

#define vsoxseg5ei32_v_f16mf2_m ( ... ) __riscv_vsoxseg5ei32_v_f16mf2_m(__VA_ARGS__)

◆ vsoxseg5ei32_v_f16mf4

#define vsoxseg5ei32_v_f16mf4 ( ... ) __riscv_vsoxseg5ei32_v_f16mf4(__VA_ARGS__)

◆ vsoxseg5ei32_v_f16mf4_m

#define vsoxseg5ei32_v_f16mf4_m ( ... ) __riscv_vsoxseg5ei32_v_f16mf4_m(__VA_ARGS__)

◆ vsoxseg5ei32_v_f32m1

#define vsoxseg5ei32_v_f32m1 ( ... ) __riscv_vsoxseg5ei32_v_f32m1(__VA_ARGS__)

◆ vsoxseg5ei32_v_f32m1_m

#define vsoxseg5ei32_v_f32m1_m ( ... ) __riscv_vsoxseg5ei32_v_f32m1_m(__VA_ARGS__)

◆ vsoxseg5ei32_v_f32mf2

#define vsoxseg5ei32_v_f32mf2 ( ... ) __riscv_vsoxseg5ei32_v_f32mf2(__VA_ARGS__)

◆ vsoxseg5ei32_v_f32mf2_m

#define vsoxseg5ei32_v_f32mf2_m ( ... ) __riscv_vsoxseg5ei32_v_f32mf2_m(__VA_ARGS__)

◆ vsoxseg5ei32_v_f64m1

#define vsoxseg5ei32_v_f64m1 ( ... ) __riscv_vsoxseg5ei32_v_f64m1(__VA_ARGS__)

◆ vsoxseg5ei32_v_f64m1_m

#define vsoxseg5ei32_v_f64m1_m ( ... ) __riscv_vsoxseg5ei32_v_f64m1_m(__VA_ARGS__)

◆ vsoxseg5ei32_v_i16m1

#define vsoxseg5ei32_v_i16m1 ( ... ) __riscv_vsoxseg5ei32_v_i16m1(__VA_ARGS__)

◆ vsoxseg5ei32_v_i16m1_m

#define vsoxseg5ei32_v_i16m1_m ( ... ) __riscv_vsoxseg5ei32_v_i16m1_m(__VA_ARGS__)

◆ vsoxseg5ei32_v_i16mf2

#define vsoxseg5ei32_v_i16mf2 ( ... ) __riscv_vsoxseg5ei32_v_i16mf2(__VA_ARGS__)

◆ vsoxseg5ei32_v_i16mf2_m

#define vsoxseg5ei32_v_i16mf2_m ( ... ) __riscv_vsoxseg5ei32_v_i16mf2_m(__VA_ARGS__)

◆ vsoxseg5ei32_v_i16mf4

#define vsoxseg5ei32_v_i16mf4 ( ... ) __riscv_vsoxseg5ei32_v_i16mf4(__VA_ARGS__)

◆ vsoxseg5ei32_v_i16mf4_m

#define vsoxseg5ei32_v_i16mf4_m ( ... ) __riscv_vsoxseg5ei32_v_i16mf4_m(__VA_ARGS__)

◆ vsoxseg5ei32_v_i32m1

#define vsoxseg5ei32_v_i32m1 ( ... ) __riscv_vsoxseg5ei32_v_i32m1(__VA_ARGS__)

◆ vsoxseg5ei32_v_i32m1_m

#define vsoxseg5ei32_v_i32m1_m ( ... ) __riscv_vsoxseg5ei32_v_i32m1_m(__VA_ARGS__)

◆ vsoxseg5ei32_v_i32mf2

#define vsoxseg5ei32_v_i32mf2 ( ... ) __riscv_vsoxseg5ei32_v_i32mf2(__VA_ARGS__)

◆ vsoxseg5ei32_v_i32mf2_m

#define vsoxseg5ei32_v_i32mf2_m ( ... ) __riscv_vsoxseg5ei32_v_i32mf2_m(__VA_ARGS__)

◆ vsoxseg5ei32_v_i64m1

#define vsoxseg5ei32_v_i64m1 ( ... ) __riscv_vsoxseg5ei32_v_i64m1(__VA_ARGS__)

◆ vsoxseg5ei32_v_i64m1_m

#define vsoxseg5ei32_v_i64m1_m ( ... ) __riscv_vsoxseg5ei32_v_i64m1_m(__VA_ARGS__)

◆ vsoxseg5ei32_v_i8m1

#define vsoxseg5ei32_v_i8m1 ( ... ) __riscv_vsoxseg5ei32_v_i8m1(__VA_ARGS__)

◆ vsoxseg5ei32_v_i8m1_m

#define vsoxseg5ei32_v_i8m1_m ( ... ) __riscv_vsoxseg5ei32_v_i8m1_m(__VA_ARGS__)

◆ vsoxseg5ei32_v_i8mf2

#define vsoxseg5ei32_v_i8mf2 ( ... ) __riscv_vsoxseg5ei32_v_i8mf2(__VA_ARGS__)

◆ vsoxseg5ei32_v_i8mf2_m

#define vsoxseg5ei32_v_i8mf2_m ( ... ) __riscv_vsoxseg5ei32_v_i8mf2_m(__VA_ARGS__)

◆ vsoxseg5ei32_v_i8mf4

#define vsoxseg5ei32_v_i8mf4 ( ... ) __riscv_vsoxseg5ei32_v_i8mf4(__VA_ARGS__)

◆ vsoxseg5ei32_v_i8mf4_m

#define vsoxseg5ei32_v_i8mf4_m ( ... ) __riscv_vsoxseg5ei32_v_i8mf4_m(__VA_ARGS__)

◆ vsoxseg5ei32_v_i8mf8

#define vsoxseg5ei32_v_i8mf8 ( ... ) __riscv_vsoxseg5ei32_v_i8mf8(__VA_ARGS__)

◆ vsoxseg5ei32_v_i8mf8_m

#define vsoxseg5ei32_v_i8mf8_m ( ... ) __riscv_vsoxseg5ei32_v_i8mf8_m(__VA_ARGS__)

◆ vsoxseg5ei32_v_u16m1

#define vsoxseg5ei32_v_u16m1 ( ... ) __riscv_vsoxseg5ei32_v_u16m1(__VA_ARGS__)

◆ vsoxseg5ei32_v_u16m1_m

#define vsoxseg5ei32_v_u16m1_m ( ... ) __riscv_vsoxseg5ei32_v_u16m1_m(__VA_ARGS__)

◆ vsoxseg5ei32_v_u16mf2

#define vsoxseg5ei32_v_u16mf2 ( ... ) __riscv_vsoxseg5ei32_v_u16mf2(__VA_ARGS__)

◆ vsoxseg5ei32_v_u16mf2_m

#define vsoxseg5ei32_v_u16mf2_m ( ... ) __riscv_vsoxseg5ei32_v_u16mf2_m(__VA_ARGS__)

◆ vsoxseg5ei32_v_u16mf4

#define vsoxseg5ei32_v_u16mf4 ( ... ) __riscv_vsoxseg5ei32_v_u16mf4(__VA_ARGS__)

◆ vsoxseg5ei32_v_u16mf4_m

#define vsoxseg5ei32_v_u16mf4_m ( ... ) __riscv_vsoxseg5ei32_v_u16mf4_m(__VA_ARGS__)

◆ vsoxseg5ei32_v_u32m1

#define vsoxseg5ei32_v_u32m1 ( ... ) __riscv_vsoxseg5ei32_v_u32m1(__VA_ARGS__)

◆ vsoxseg5ei32_v_u32m1_m

#define vsoxseg5ei32_v_u32m1_m ( ... ) __riscv_vsoxseg5ei32_v_u32m1_m(__VA_ARGS__)

◆ vsoxseg5ei32_v_u32mf2

#define vsoxseg5ei32_v_u32mf2 ( ... ) __riscv_vsoxseg5ei32_v_u32mf2(__VA_ARGS__)

◆ vsoxseg5ei32_v_u32mf2_m

#define vsoxseg5ei32_v_u32mf2_m ( ... ) __riscv_vsoxseg5ei32_v_u32mf2_m(__VA_ARGS__)

◆ vsoxseg5ei32_v_u64m1

#define vsoxseg5ei32_v_u64m1 ( ... ) __riscv_vsoxseg5ei32_v_u64m1(__VA_ARGS__)

◆ vsoxseg5ei32_v_u64m1_m

#define vsoxseg5ei32_v_u64m1_m ( ... ) __riscv_vsoxseg5ei32_v_u64m1_m(__VA_ARGS__)

◆ vsoxseg5ei32_v_u8m1

#define vsoxseg5ei32_v_u8m1 ( ... ) __riscv_vsoxseg5ei32_v_u8m1(__VA_ARGS__)

◆ vsoxseg5ei32_v_u8m1_m

#define vsoxseg5ei32_v_u8m1_m ( ... ) __riscv_vsoxseg5ei32_v_u8m1_m(__VA_ARGS__)

◆ vsoxseg5ei32_v_u8mf2

#define vsoxseg5ei32_v_u8mf2 ( ... ) __riscv_vsoxseg5ei32_v_u8mf2(__VA_ARGS__)

◆ vsoxseg5ei32_v_u8mf2_m

#define vsoxseg5ei32_v_u8mf2_m ( ... ) __riscv_vsoxseg5ei32_v_u8mf2_m(__VA_ARGS__)

◆ vsoxseg5ei32_v_u8mf4

#define vsoxseg5ei32_v_u8mf4 ( ... ) __riscv_vsoxseg5ei32_v_u8mf4(__VA_ARGS__)

◆ vsoxseg5ei32_v_u8mf4_m

#define vsoxseg5ei32_v_u8mf4_m ( ... ) __riscv_vsoxseg5ei32_v_u8mf4_m(__VA_ARGS__)

◆ vsoxseg5ei32_v_u8mf8

#define vsoxseg5ei32_v_u8mf8 ( ... ) __riscv_vsoxseg5ei32_v_u8mf8(__VA_ARGS__)

◆ vsoxseg5ei32_v_u8mf8_m

#define vsoxseg5ei32_v_u8mf8_m ( ... ) __riscv_vsoxseg5ei32_v_u8mf8_m(__VA_ARGS__)

◆ vsoxseg5ei64_v_f16m1

#define vsoxseg5ei64_v_f16m1 ( ... ) __riscv_vsoxseg5ei64_v_f16m1(__VA_ARGS__)

◆ vsoxseg5ei64_v_f16m1_m

#define vsoxseg5ei64_v_f16m1_m ( ... ) __riscv_vsoxseg5ei64_v_f16m1_m(__VA_ARGS__)

◆ vsoxseg5ei64_v_f16mf2

#define vsoxseg5ei64_v_f16mf2 ( ... ) __riscv_vsoxseg5ei64_v_f16mf2(__VA_ARGS__)

◆ vsoxseg5ei64_v_f16mf2_m

#define vsoxseg5ei64_v_f16mf2_m ( ... ) __riscv_vsoxseg5ei64_v_f16mf2_m(__VA_ARGS__)

◆ vsoxseg5ei64_v_f16mf4

#define vsoxseg5ei64_v_f16mf4 ( ... ) __riscv_vsoxseg5ei64_v_f16mf4(__VA_ARGS__)

◆ vsoxseg5ei64_v_f16mf4_m

#define vsoxseg5ei64_v_f16mf4_m ( ... ) __riscv_vsoxseg5ei64_v_f16mf4_m(__VA_ARGS__)

◆ vsoxseg5ei64_v_f32m1

#define vsoxseg5ei64_v_f32m1 ( ... ) __riscv_vsoxseg5ei64_v_f32m1(__VA_ARGS__)

◆ vsoxseg5ei64_v_f32m1_m

#define vsoxseg5ei64_v_f32m1_m ( ... ) __riscv_vsoxseg5ei64_v_f32m1_m(__VA_ARGS__)

◆ vsoxseg5ei64_v_f32mf2

#define vsoxseg5ei64_v_f32mf2 ( ... ) __riscv_vsoxseg5ei64_v_f32mf2(__VA_ARGS__)

◆ vsoxseg5ei64_v_f32mf2_m

#define vsoxseg5ei64_v_f32mf2_m ( ... ) __riscv_vsoxseg5ei64_v_f32mf2_m(__VA_ARGS__)

◆ vsoxseg5ei64_v_f64m1

#define vsoxseg5ei64_v_f64m1 ( ... ) __riscv_vsoxseg5ei64_v_f64m1(__VA_ARGS__)

◆ vsoxseg5ei64_v_f64m1_m

#define vsoxseg5ei64_v_f64m1_m ( ... ) __riscv_vsoxseg5ei64_v_f64m1_m(__VA_ARGS__)

◆ vsoxseg5ei64_v_i16m1

#define vsoxseg5ei64_v_i16m1 ( ... ) __riscv_vsoxseg5ei64_v_i16m1(__VA_ARGS__)

◆ vsoxseg5ei64_v_i16m1_m

#define vsoxseg5ei64_v_i16m1_m ( ... ) __riscv_vsoxseg5ei64_v_i16m1_m(__VA_ARGS__)

◆ vsoxseg5ei64_v_i16mf2

#define vsoxseg5ei64_v_i16mf2 ( ... ) __riscv_vsoxseg5ei64_v_i16mf2(__VA_ARGS__)

◆ vsoxseg5ei64_v_i16mf2_m

#define vsoxseg5ei64_v_i16mf2_m ( ... ) __riscv_vsoxseg5ei64_v_i16mf2_m(__VA_ARGS__)

◆ vsoxseg5ei64_v_i16mf4

#define vsoxseg5ei64_v_i16mf4 ( ... ) __riscv_vsoxseg5ei64_v_i16mf4(__VA_ARGS__)

◆ vsoxseg5ei64_v_i16mf4_m

#define vsoxseg5ei64_v_i16mf4_m ( ... ) __riscv_vsoxseg5ei64_v_i16mf4_m(__VA_ARGS__)

◆ vsoxseg5ei64_v_i32m1

#define vsoxseg5ei64_v_i32m1 ( ... ) __riscv_vsoxseg5ei64_v_i32m1(__VA_ARGS__)

◆ vsoxseg5ei64_v_i32m1_m

#define vsoxseg5ei64_v_i32m1_m ( ... ) __riscv_vsoxseg5ei64_v_i32m1_m(__VA_ARGS__)

◆ vsoxseg5ei64_v_i32mf2

#define vsoxseg5ei64_v_i32mf2 ( ... ) __riscv_vsoxseg5ei64_v_i32mf2(__VA_ARGS__)

◆ vsoxseg5ei64_v_i32mf2_m

#define vsoxseg5ei64_v_i32mf2_m ( ... ) __riscv_vsoxseg5ei64_v_i32mf2_m(__VA_ARGS__)

◆ vsoxseg5ei64_v_i64m1

#define vsoxseg5ei64_v_i64m1 ( ... ) __riscv_vsoxseg5ei64_v_i64m1(__VA_ARGS__)

◆ vsoxseg5ei64_v_i64m1_m

#define vsoxseg5ei64_v_i64m1_m ( ... ) __riscv_vsoxseg5ei64_v_i64m1_m(__VA_ARGS__)

◆ vsoxseg5ei64_v_i8m1

#define vsoxseg5ei64_v_i8m1 ( ... ) __riscv_vsoxseg5ei64_v_i8m1(__VA_ARGS__)

◆ vsoxseg5ei64_v_i8m1_m

#define vsoxseg5ei64_v_i8m1_m ( ... ) __riscv_vsoxseg5ei64_v_i8m1_m(__VA_ARGS__)

◆ vsoxseg5ei64_v_i8mf2

#define vsoxseg5ei64_v_i8mf2 ( ... ) __riscv_vsoxseg5ei64_v_i8mf2(__VA_ARGS__)

◆ vsoxseg5ei64_v_i8mf2_m

#define vsoxseg5ei64_v_i8mf2_m ( ... ) __riscv_vsoxseg5ei64_v_i8mf2_m(__VA_ARGS__)

◆ vsoxseg5ei64_v_i8mf4

#define vsoxseg5ei64_v_i8mf4 ( ... ) __riscv_vsoxseg5ei64_v_i8mf4(__VA_ARGS__)

◆ vsoxseg5ei64_v_i8mf4_m

#define vsoxseg5ei64_v_i8mf4_m ( ... ) __riscv_vsoxseg5ei64_v_i8mf4_m(__VA_ARGS__)

◆ vsoxseg5ei64_v_i8mf8

#define vsoxseg5ei64_v_i8mf8 ( ... ) __riscv_vsoxseg5ei64_v_i8mf8(__VA_ARGS__)

◆ vsoxseg5ei64_v_i8mf8_m

#define vsoxseg5ei64_v_i8mf8_m ( ... ) __riscv_vsoxseg5ei64_v_i8mf8_m(__VA_ARGS__)

◆ vsoxseg5ei64_v_u16m1

#define vsoxseg5ei64_v_u16m1 ( ... ) __riscv_vsoxseg5ei64_v_u16m1(__VA_ARGS__)

◆ vsoxseg5ei64_v_u16m1_m

#define vsoxseg5ei64_v_u16m1_m ( ... ) __riscv_vsoxseg5ei64_v_u16m1_m(__VA_ARGS__)

◆ vsoxseg5ei64_v_u16mf2

#define vsoxseg5ei64_v_u16mf2 ( ... ) __riscv_vsoxseg5ei64_v_u16mf2(__VA_ARGS__)

◆ vsoxseg5ei64_v_u16mf2_m

#define vsoxseg5ei64_v_u16mf2_m ( ... ) __riscv_vsoxseg5ei64_v_u16mf2_m(__VA_ARGS__)

◆ vsoxseg5ei64_v_u16mf4

#define vsoxseg5ei64_v_u16mf4 ( ... ) __riscv_vsoxseg5ei64_v_u16mf4(__VA_ARGS__)

◆ vsoxseg5ei64_v_u16mf4_m

#define vsoxseg5ei64_v_u16mf4_m ( ... ) __riscv_vsoxseg5ei64_v_u16mf4_m(__VA_ARGS__)

◆ vsoxseg5ei64_v_u32m1

#define vsoxseg5ei64_v_u32m1 ( ... ) __riscv_vsoxseg5ei64_v_u32m1(__VA_ARGS__)

◆ vsoxseg5ei64_v_u32m1_m

#define vsoxseg5ei64_v_u32m1_m ( ... ) __riscv_vsoxseg5ei64_v_u32m1_m(__VA_ARGS__)

◆ vsoxseg5ei64_v_u32mf2

#define vsoxseg5ei64_v_u32mf2 ( ... ) __riscv_vsoxseg5ei64_v_u32mf2(__VA_ARGS__)

◆ vsoxseg5ei64_v_u32mf2_m

#define vsoxseg5ei64_v_u32mf2_m ( ... ) __riscv_vsoxseg5ei64_v_u32mf2_m(__VA_ARGS__)

◆ vsoxseg5ei64_v_u64m1

#define vsoxseg5ei64_v_u64m1 ( ... ) __riscv_vsoxseg5ei64_v_u64m1(__VA_ARGS__)

◆ vsoxseg5ei64_v_u64m1_m

#define vsoxseg5ei64_v_u64m1_m ( ... ) __riscv_vsoxseg5ei64_v_u64m1_m(__VA_ARGS__)

◆ vsoxseg5ei64_v_u8m1

#define vsoxseg5ei64_v_u8m1 ( ... ) __riscv_vsoxseg5ei64_v_u8m1(__VA_ARGS__)

◆ vsoxseg5ei64_v_u8m1_m

#define vsoxseg5ei64_v_u8m1_m ( ... ) __riscv_vsoxseg5ei64_v_u8m1_m(__VA_ARGS__)

◆ vsoxseg5ei64_v_u8mf2

#define vsoxseg5ei64_v_u8mf2 ( ... ) __riscv_vsoxseg5ei64_v_u8mf2(__VA_ARGS__)

◆ vsoxseg5ei64_v_u8mf2_m

#define vsoxseg5ei64_v_u8mf2_m ( ... ) __riscv_vsoxseg5ei64_v_u8mf2_m(__VA_ARGS__)

◆ vsoxseg5ei64_v_u8mf4

#define vsoxseg5ei64_v_u8mf4 ( ... ) __riscv_vsoxseg5ei64_v_u8mf4(__VA_ARGS__)

◆ vsoxseg5ei64_v_u8mf4_m

#define vsoxseg5ei64_v_u8mf4_m ( ... ) __riscv_vsoxseg5ei64_v_u8mf4_m(__VA_ARGS__)

◆ vsoxseg5ei64_v_u8mf8

#define vsoxseg5ei64_v_u8mf8 ( ... ) __riscv_vsoxseg5ei64_v_u8mf8(__VA_ARGS__)

◆ vsoxseg5ei64_v_u8mf8_m

#define vsoxseg5ei64_v_u8mf8_m ( ... ) __riscv_vsoxseg5ei64_v_u8mf8_m(__VA_ARGS__)

◆ vsoxseg5ei8_v_f16m1

#define vsoxseg5ei8_v_f16m1 ( ... ) __riscv_vsoxseg5ei8_v_f16m1(__VA_ARGS__)

◆ vsoxseg5ei8_v_f16m1_m

#define vsoxseg5ei8_v_f16m1_m ( ... ) __riscv_vsoxseg5ei8_v_f16m1_m(__VA_ARGS__)

◆ vsoxseg5ei8_v_f16mf2

#define vsoxseg5ei8_v_f16mf2 ( ... ) __riscv_vsoxseg5ei8_v_f16mf2(__VA_ARGS__)

◆ vsoxseg5ei8_v_f16mf2_m

#define vsoxseg5ei8_v_f16mf2_m ( ... ) __riscv_vsoxseg5ei8_v_f16mf2_m(__VA_ARGS__)

◆ vsoxseg5ei8_v_f16mf4

#define vsoxseg5ei8_v_f16mf4 ( ... ) __riscv_vsoxseg5ei8_v_f16mf4(__VA_ARGS__)

◆ vsoxseg5ei8_v_f16mf4_m

#define vsoxseg5ei8_v_f16mf4_m ( ... ) __riscv_vsoxseg5ei8_v_f16mf4_m(__VA_ARGS__)

◆ vsoxseg5ei8_v_f32m1

#define vsoxseg5ei8_v_f32m1 ( ... ) __riscv_vsoxseg5ei8_v_f32m1(__VA_ARGS__)

◆ vsoxseg5ei8_v_f32m1_m

#define vsoxseg5ei8_v_f32m1_m ( ... ) __riscv_vsoxseg5ei8_v_f32m1_m(__VA_ARGS__)

◆ vsoxseg5ei8_v_f32mf2

#define vsoxseg5ei8_v_f32mf2 ( ... ) __riscv_vsoxseg5ei8_v_f32mf2(__VA_ARGS__)

◆ vsoxseg5ei8_v_f32mf2_m

#define vsoxseg5ei8_v_f32mf2_m ( ... ) __riscv_vsoxseg5ei8_v_f32mf2_m(__VA_ARGS__)

◆ vsoxseg5ei8_v_f64m1

#define vsoxseg5ei8_v_f64m1 ( ... ) __riscv_vsoxseg5ei8_v_f64m1(__VA_ARGS__)

◆ vsoxseg5ei8_v_f64m1_m

#define vsoxseg5ei8_v_f64m1_m ( ... ) __riscv_vsoxseg5ei8_v_f64m1_m(__VA_ARGS__)

◆ vsoxseg5ei8_v_i16m1

#define vsoxseg5ei8_v_i16m1 ( ... ) __riscv_vsoxseg5ei8_v_i16m1(__VA_ARGS__)

◆ vsoxseg5ei8_v_i16m1_m

#define vsoxseg5ei8_v_i16m1_m ( ... ) __riscv_vsoxseg5ei8_v_i16m1_m(__VA_ARGS__)

◆ vsoxseg5ei8_v_i16mf2

#define vsoxseg5ei8_v_i16mf2 ( ... ) __riscv_vsoxseg5ei8_v_i16mf2(__VA_ARGS__)

◆ vsoxseg5ei8_v_i16mf2_m

#define vsoxseg5ei8_v_i16mf2_m ( ... ) __riscv_vsoxseg5ei8_v_i16mf2_m(__VA_ARGS__)

◆ vsoxseg5ei8_v_i16mf4

#define vsoxseg5ei8_v_i16mf4 ( ... ) __riscv_vsoxseg5ei8_v_i16mf4(__VA_ARGS__)

◆ vsoxseg5ei8_v_i16mf4_m

#define vsoxseg5ei8_v_i16mf4_m ( ... ) __riscv_vsoxseg5ei8_v_i16mf4_m(__VA_ARGS__)

◆ vsoxseg5ei8_v_i32m1

#define vsoxseg5ei8_v_i32m1 ( ... ) __riscv_vsoxseg5ei8_v_i32m1(__VA_ARGS__)

◆ vsoxseg5ei8_v_i32m1_m

#define vsoxseg5ei8_v_i32m1_m ( ... ) __riscv_vsoxseg5ei8_v_i32m1_m(__VA_ARGS__)

◆ vsoxseg5ei8_v_i32mf2

#define vsoxseg5ei8_v_i32mf2 ( ... ) __riscv_vsoxseg5ei8_v_i32mf2(__VA_ARGS__)

◆ vsoxseg5ei8_v_i32mf2_m

#define vsoxseg5ei8_v_i32mf2_m ( ... ) __riscv_vsoxseg5ei8_v_i32mf2_m(__VA_ARGS__)

◆ vsoxseg5ei8_v_i64m1

#define vsoxseg5ei8_v_i64m1 ( ... ) __riscv_vsoxseg5ei8_v_i64m1(__VA_ARGS__)

◆ vsoxseg5ei8_v_i64m1_m

#define vsoxseg5ei8_v_i64m1_m ( ... ) __riscv_vsoxseg5ei8_v_i64m1_m(__VA_ARGS__)

◆ vsoxseg5ei8_v_i8m1

#define vsoxseg5ei8_v_i8m1 ( ... ) __riscv_vsoxseg5ei8_v_i8m1(__VA_ARGS__)

◆ vsoxseg5ei8_v_i8m1_m

#define vsoxseg5ei8_v_i8m1_m ( ... ) __riscv_vsoxseg5ei8_v_i8m1_m(__VA_ARGS__)

◆ vsoxseg5ei8_v_i8mf2

#define vsoxseg5ei8_v_i8mf2 ( ... ) __riscv_vsoxseg5ei8_v_i8mf2(__VA_ARGS__)

◆ vsoxseg5ei8_v_i8mf2_m

#define vsoxseg5ei8_v_i8mf2_m ( ... ) __riscv_vsoxseg5ei8_v_i8mf2_m(__VA_ARGS__)

◆ vsoxseg5ei8_v_i8mf4

#define vsoxseg5ei8_v_i8mf4 ( ... ) __riscv_vsoxseg5ei8_v_i8mf4(__VA_ARGS__)

◆ vsoxseg5ei8_v_i8mf4_m

#define vsoxseg5ei8_v_i8mf4_m ( ... ) __riscv_vsoxseg5ei8_v_i8mf4_m(__VA_ARGS__)

◆ vsoxseg5ei8_v_i8mf8

#define vsoxseg5ei8_v_i8mf8 ( ... ) __riscv_vsoxseg5ei8_v_i8mf8(__VA_ARGS__)

◆ vsoxseg5ei8_v_i8mf8_m

#define vsoxseg5ei8_v_i8mf8_m ( ... ) __riscv_vsoxseg5ei8_v_i8mf8_m(__VA_ARGS__)

◆ vsoxseg5ei8_v_u16m1

#define vsoxseg5ei8_v_u16m1 ( ... ) __riscv_vsoxseg5ei8_v_u16m1(__VA_ARGS__)

◆ vsoxseg5ei8_v_u16m1_m

#define vsoxseg5ei8_v_u16m1_m ( ... ) __riscv_vsoxseg5ei8_v_u16m1_m(__VA_ARGS__)

◆ vsoxseg5ei8_v_u16mf2

#define vsoxseg5ei8_v_u16mf2 ( ... ) __riscv_vsoxseg5ei8_v_u16mf2(__VA_ARGS__)

◆ vsoxseg5ei8_v_u16mf2_m

#define vsoxseg5ei8_v_u16mf2_m ( ... ) __riscv_vsoxseg5ei8_v_u16mf2_m(__VA_ARGS__)

◆ vsoxseg5ei8_v_u16mf4

#define vsoxseg5ei8_v_u16mf4 ( ... ) __riscv_vsoxseg5ei8_v_u16mf4(__VA_ARGS__)

◆ vsoxseg5ei8_v_u16mf4_m

#define vsoxseg5ei8_v_u16mf4_m ( ... ) __riscv_vsoxseg5ei8_v_u16mf4_m(__VA_ARGS__)

◆ vsoxseg5ei8_v_u32m1

#define vsoxseg5ei8_v_u32m1 ( ... ) __riscv_vsoxseg5ei8_v_u32m1(__VA_ARGS__)

◆ vsoxseg5ei8_v_u32m1_m

#define vsoxseg5ei8_v_u32m1_m ( ... ) __riscv_vsoxseg5ei8_v_u32m1_m(__VA_ARGS__)

◆ vsoxseg5ei8_v_u32mf2

#define vsoxseg5ei8_v_u32mf2 ( ... ) __riscv_vsoxseg5ei8_v_u32mf2(__VA_ARGS__)

◆ vsoxseg5ei8_v_u32mf2_m

#define vsoxseg5ei8_v_u32mf2_m ( ... ) __riscv_vsoxseg5ei8_v_u32mf2_m(__VA_ARGS__)

◆ vsoxseg5ei8_v_u64m1

#define vsoxseg5ei8_v_u64m1 ( ... ) __riscv_vsoxseg5ei8_v_u64m1(__VA_ARGS__)

◆ vsoxseg5ei8_v_u64m1_m

#define vsoxseg5ei8_v_u64m1_m ( ... ) __riscv_vsoxseg5ei8_v_u64m1_m(__VA_ARGS__)

◆ vsoxseg5ei8_v_u8m1

#define vsoxseg5ei8_v_u8m1 ( ... ) __riscv_vsoxseg5ei8_v_u8m1(__VA_ARGS__)

◆ vsoxseg5ei8_v_u8m1_m

#define vsoxseg5ei8_v_u8m1_m ( ... ) __riscv_vsoxseg5ei8_v_u8m1_m(__VA_ARGS__)

◆ vsoxseg5ei8_v_u8mf2

#define vsoxseg5ei8_v_u8mf2 ( ... ) __riscv_vsoxseg5ei8_v_u8mf2(__VA_ARGS__)

◆ vsoxseg5ei8_v_u8mf2_m

#define vsoxseg5ei8_v_u8mf2_m ( ... ) __riscv_vsoxseg5ei8_v_u8mf2_m(__VA_ARGS__)

◆ vsoxseg5ei8_v_u8mf4

#define vsoxseg5ei8_v_u8mf4 ( ... ) __riscv_vsoxseg5ei8_v_u8mf4(__VA_ARGS__)

◆ vsoxseg5ei8_v_u8mf4_m

#define vsoxseg5ei8_v_u8mf4_m ( ... ) __riscv_vsoxseg5ei8_v_u8mf4_m(__VA_ARGS__)

◆ vsoxseg5ei8_v_u8mf8

#define vsoxseg5ei8_v_u8mf8 ( ... ) __riscv_vsoxseg5ei8_v_u8mf8(__VA_ARGS__)

◆ vsoxseg5ei8_v_u8mf8_m

#define vsoxseg5ei8_v_u8mf8_m ( ... ) __riscv_vsoxseg5ei8_v_u8mf8_m(__VA_ARGS__)

◆ vsoxseg6ei16_v_f16m1

#define vsoxseg6ei16_v_f16m1 ( ... ) __riscv_vsoxseg6ei16_v_f16m1(__VA_ARGS__)

◆ vsoxseg6ei16_v_f16m1_m

#define vsoxseg6ei16_v_f16m1_m ( ... ) __riscv_vsoxseg6ei16_v_f16m1_m(__VA_ARGS__)

◆ vsoxseg6ei16_v_f16mf2

#define vsoxseg6ei16_v_f16mf2 ( ... ) __riscv_vsoxseg6ei16_v_f16mf2(__VA_ARGS__)

◆ vsoxseg6ei16_v_f16mf2_m

#define vsoxseg6ei16_v_f16mf2_m ( ... ) __riscv_vsoxseg6ei16_v_f16mf2_m(__VA_ARGS__)

◆ vsoxseg6ei16_v_f16mf4

#define vsoxseg6ei16_v_f16mf4 ( ... ) __riscv_vsoxseg6ei16_v_f16mf4(__VA_ARGS__)

◆ vsoxseg6ei16_v_f16mf4_m

#define vsoxseg6ei16_v_f16mf4_m ( ... ) __riscv_vsoxseg6ei16_v_f16mf4_m(__VA_ARGS__)

◆ vsoxseg6ei16_v_f32m1

#define vsoxseg6ei16_v_f32m1 ( ... ) __riscv_vsoxseg6ei16_v_f32m1(__VA_ARGS__)

◆ vsoxseg6ei16_v_f32m1_m

#define vsoxseg6ei16_v_f32m1_m ( ... ) __riscv_vsoxseg6ei16_v_f32m1_m(__VA_ARGS__)

◆ vsoxseg6ei16_v_f32mf2

#define vsoxseg6ei16_v_f32mf2 ( ... ) __riscv_vsoxseg6ei16_v_f32mf2(__VA_ARGS__)

◆ vsoxseg6ei16_v_f32mf2_m

#define vsoxseg6ei16_v_f32mf2_m ( ... ) __riscv_vsoxseg6ei16_v_f32mf2_m(__VA_ARGS__)

◆ vsoxseg6ei16_v_f64m1

#define vsoxseg6ei16_v_f64m1 ( ... ) __riscv_vsoxseg6ei16_v_f64m1(__VA_ARGS__)

◆ vsoxseg6ei16_v_f64m1_m

#define vsoxseg6ei16_v_f64m1_m ( ... ) __riscv_vsoxseg6ei16_v_f64m1_m(__VA_ARGS__)

◆ vsoxseg6ei16_v_i16m1

#define vsoxseg6ei16_v_i16m1 ( ... ) __riscv_vsoxseg6ei16_v_i16m1(__VA_ARGS__)

◆ vsoxseg6ei16_v_i16m1_m

#define vsoxseg6ei16_v_i16m1_m ( ... ) __riscv_vsoxseg6ei16_v_i16m1_m(__VA_ARGS__)

◆ vsoxseg6ei16_v_i16mf2

#define vsoxseg6ei16_v_i16mf2 ( ... ) __riscv_vsoxseg6ei16_v_i16mf2(__VA_ARGS__)

◆ vsoxseg6ei16_v_i16mf2_m

#define vsoxseg6ei16_v_i16mf2_m ( ... ) __riscv_vsoxseg6ei16_v_i16mf2_m(__VA_ARGS__)

◆ vsoxseg6ei16_v_i16mf4

#define vsoxseg6ei16_v_i16mf4 ( ... ) __riscv_vsoxseg6ei16_v_i16mf4(__VA_ARGS__)

◆ vsoxseg6ei16_v_i16mf4_m

#define vsoxseg6ei16_v_i16mf4_m ( ... ) __riscv_vsoxseg6ei16_v_i16mf4_m(__VA_ARGS__)

◆ vsoxseg6ei16_v_i32m1

#define vsoxseg6ei16_v_i32m1 ( ... ) __riscv_vsoxseg6ei16_v_i32m1(__VA_ARGS__)

◆ vsoxseg6ei16_v_i32m1_m

#define vsoxseg6ei16_v_i32m1_m ( ... ) __riscv_vsoxseg6ei16_v_i32m1_m(__VA_ARGS__)

◆ vsoxseg6ei16_v_i32mf2

#define vsoxseg6ei16_v_i32mf2 ( ... ) __riscv_vsoxseg6ei16_v_i32mf2(__VA_ARGS__)

◆ vsoxseg6ei16_v_i32mf2_m

#define vsoxseg6ei16_v_i32mf2_m ( ... ) __riscv_vsoxseg6ei16_v_i32mf2_m(__VA_ARGS__)

◆ vsoxseg6ei16_v_i64m1

#define vsoxseg6ei16_v_i64m1 ( ... ) __riscv_vsoxseg6ei16_v_i64m1(__VA_ARGS__)

◆ vsoxseg6ei16_v_i64m1_m

#define vsoxseg6ei16_v_i64m1_m ( ... ) __riscv_vsoxseg6ei16_v_i64m1_m(__VA_ARGS__)

◆ vsoxseg6ei16_v_i8m1

#define vsoxseg6ei16_v_i8m1 ( ... ) __riscv_vsoxseg6ei16_v_i8m1(__VA_ARGS__)

◆ vsoxseg6ei16_v_i8m1_m

#define vsoxseg6ei16_v_i8m1_m ( ... ) __riscv_vsoxseg6ei16_v_i8m1_m(__VA_ARGS__)

◆ vsoxseg6ei16_v_i8mf2

#define vsoxseg6ei16_v_i8mf2 ( ... ) __riscv_vsoxseg6ei16_v_i8mf2(__VA_ARGS__)

◆ vsoxseg6ei16_v_i8mf2_m

#define vsoxseg6ei16_v_i8mf2_m ( ... ) __riscv_vsoxseg6ei16_v_i8mf2_m(__VA_ARGS__)

◆ vsoxseg6ei16_v_i8mf4

#define vsoxseg6ei16_v_i8mf4 ( ... ) __riscv_vsoxseg6ei16_v_i8mf4(__VA_ARGS__)

◆ vsoxseg6ei16_v_i8mf4_m

#define vsoxseg6ei16_v_i8mf4_m ( ... ) __riscv_vsoxseg6ei16_v_i8mf4_m(__VA_ARGS__)

◆ vsoxseg6ei16_v_i8mf8

#define vsoxseg6ei16_v_i8mf8 ( ... ) __riscv_vsoxseg6ei16_v_i8mf8(__VA_ARGS__)

◆ vsoxseg6ei16_v_i8mf8_m

#define vsoxseg6ei16_v_i8mf8_m ( ... ) __riscv_vsoxseg6ei16_v_i8mf8_m(__VA_ARGS__)

◆ vsoxseg6ei16_v_u16m1

#define vsoxseg6ei16_v_u16m1 ( ... ) __riscv_vsoxseg6ei16_v_u16m1(__VA_ARGS__)

◆ vsoxseg6ei16_v_u16m1_m

#define vsoxseg6ei16_v_u16m1_m ( ... ) __riscv_vsoxseg6ei16_v_u16m1_m(__VA_ARGS__)

◆ vsoxseg6ei16_v_u16mf2

#define vsoxseg6ei16_v_u16mf2 ( ... ) __riscv_vsoxseg6ei16_v_u16mf2(__VA_ARGS__)

◆ vsoxseg6ei16_v_u16mf2_m

#define vsoxseg6ei16_v_u16mf2_m ( ... ) __riscv_vsoxseg6ei16_v_u16mf2_m(__VA_ARGS__)

◆ vsoxseg6ei16_v_u16mf4

#define vsoxseg6ei16_v_u16mf4 ( ... ) __riscv_vsoxseg6ei16_v_u16mf4(__VA_ARGS__)

◆ vsoxseg6ei16_v_u16mf4_m

#define vsoxseg6ei16_v_u16mf4_m ( ... ) __riscv_vsoxseg6ei16_v_u16mf4_m(__VA_ARGS__)

◆ vsoxseg6ei16_v_u32m1

#define vsoxseg6ei16_v_u32m1 ( ... ) __riscv_vsoxseg6ei16_v_u32m1(__VA_ARGS__)

◆ vsoxseg6ei16_v_u32m1_m

#define vsoxseg6ei16_v_u32m1_m ( ... ) __riscv_vsoxseg6ei16_v_u32m1_m(__VA_ARGS__)

◆ vsoxseg6ei16_v_u32mf2

#define vsoxseg6ei16_v_u32mf2 ( ... ) __riscv_vsoxseg6ei16_v_u32mf2(__VA_ARGS__)

◆ vsoxseg6ei16_v_u32mf2_m

#define vsoxseg6ei16_v_u32mf2_m ( ... ) __riscv_vsoxseg6ei16_v_u32mf2_m(__VA_ARGS__)

◆ vsoxseg6ei16_v_u64m1

#define vsoxseg6ei16_v_u64m1 ( ... ) __riscv_vsoxseg6ei16_v_u64m1(__VA_ARGS__)

◆ vsoxseg6ei16_v_u64m1_m

#define vsoxseg6ei16_v_u64m1_m ( ... ) __riscv_vsoxseg6ei16_v_u64m1_m(__VA_ARGS__)

◆ vsoxseg6ei16_v_u8m1

#define vsoxseg6ei16_v_u8m1 ( ... ) __riscv_vsoxseg6ei16_v_u8m1(__VA_ARGS__)

◆ vsoxseg6ei16_v_u8m1_m

#define vsoxseg6ei16_v_u8m1_m ( ... ) __riscv_vsoxseg6ei16_v_u8m1_m(__VA_ARGS__)

◆ vsoxseg6ei16_v_u8mf2

#define vsoxseg6ei16_v_u8mf2 ( ... ) __riscv_vsoxseg6ei16_v_u8mf2(__VA_ARGS__)

◆ vsoxseg6ei16_v_u8mf2_m

#define vsoxseg6ei16_v_u8mf2_m ( ... ) __riscv_vsoxseg6ei16_v_u8mf2_m(__VA_ARGS__)

◆ vsoxseg6ei16_v_u8mf4

#define vsoxseg6ei16_v_u8mf4 ( ... ) __riscv_vsoxseg6ei16_v_u8mf4(__VA_ARGS__)

◆ vsoxseg6ei16_v_u8mf4_m

#define vsoxseg6ei16_v_u8mf4_m ( ... ) __riscv_vsoxseg6ei16_v_u8mf4_m(__VA_ARGS__)

◆ vsoxseg6ei16_v_u8mf8

#define vsoxseg6ei16_v_u8mf8 ( ... ) __riscv_vsoxseg6ei16_v_u8mf8(__VA_ARGS__)

◆ vsoxseg6ei16_v_u8mf8_m

#define vsoxseg6ei16_v_u8mf8_m ( ... ) __riscv_vsoxseg6ei16_v_u8mf8_m(__VA_ARGS__)

◆ vsoxseg6ei32_v_f16m1

#define vsoxseg6ei32_v_f16m1 ( ... ) __riscv_vsoxseg6ei32_v_f16m1(__VA_ARGS__)

◆ vsoxseg6ei32_v_f16m1_m

#define vsoxseg6ei32_v_f16m1_m ( ... ) __riscv_vsoxseg6ei32_v_f16m1_m(__VA_ARGS__)

◆ vsoxseg6ei32_v_f16mf2

#define vsoxseg6ei32_v_f16mf2 ( ... ) __riscv_vsoxseg6ei32_v_f16mf2(__VA_ARGS__)

◆ vsoxseg6ei32_v_f16mf2_m

#define vsoxseg6ei32_v_f16mf2_m ( ... ) __riscv_vsoxseg6ei32_v_f16mf2_m(__VA_ARGS__)

◆ vsoxseg6ei32_v_f16mf4

#define vsoxseg6ei32_v_f16mf4 ( ... ) __riscv_vsoxseg6ei32_v_f16mf4(__VA_ARGS__)

◆ vsoxseg6ei32_v_f16mf4_m

#define vsoxseg6ei32_v_f16mf4_m ( ... ) __riscv_vsoxseg6ei32_v_f16mf4_m(__VA_ARGS__)

◆ vsoxseg6ei32_v_f32m1

#define vsoxseg6ei32_v_f32m1 ( ... ) __riscv_vsoxseg6ei32_v_f32m1(__VA_ARGS__)

◆ vsoxseg6ei32_v_f32m1_m

#define vsoxseg6ei32_v_f32m1_m ( ... ) __riscv_vsoxseg6ei32_v_f32m1_m(__VA_ARGS__)

◆ vsoxseg6ei32_v_f32mf2

#define vsoxseg6ei32_v_f32mf2 ( ... ) __riscv_vsoxseg6ei32_v_f32mf2(__VA_ARGS__)

◆ vsoxseg6ei32_v_f32mf2_m

#define vsoxseg6ei32_v_f32mf2_m ( ... ) __riscv_vsoxseg6ei32_v_f32mf2_m(__VA_ARGS__)

◆ vsoxseg6ei32_v_f64m1

#define vsoxseg6ei32_v_f64m1 ( ... ) __riscv_vsoxseg6ei32_v_f64m1(__VA_ARGS__)

◆ vsoxseg6ei32_v_f64m1_m

#define vsoxseg6ei32_v_f64m1_m ( ... ) __riscv_vsoxseg6ei32_v_f64m1_m(__VA_ARGS__)

◆ vsoxseg6ei32_v_i16m1

#define vsoxseg6ei32_v_i16m1 ( ... ) __riscv_vsoxseg6ei32_v_i16m1(__VA_ARGS__)

◆ vsoxseg6ei32_v_i16m1_m

#define vsoxseg6ei32_v_i16m1_m ( ... ) __riscv_vsoxseg6ei32_v_i16m1_m(__VA_ARGS__)

◆ vsoxseg6ei32_v_i16mf2

#define vsoxseg6ei32_v_i16mf2 ( ... ) __riscv_vsoxseg6ei32_v_i16mf2(__VA_ARGS__)

◆ vsoxseg6ei32_v_i16mf2_m

#define vsoxseg6ei32_v_i16mf2_m ( ... ) __riscv_vsoxseg6ei32_v_i16mf2_m(__VA_ARGS__)

◆ vsoxseg6ei32_v_i16mf4

#define vsoxseg6ei32_v_i16mf4 ( ... ) __riscv_vsoxseg6ei32_v_i16mf4(__VA_ARGS__)

◆ vsoxseg6ei32_v_i16mf4_m

#define vsoxseg6ei32_v_i16mf4_m ( ... ) __riscv_vsoxseg6ei32_v_i16mf4_m(__VA_ARGS__)

◆ vsoxseg6ei32_v_i32m1

#define vsoxseg6ei32_v_i32m1 ( ... ) __riscv_vsoxseg6ei32_v_i32m1(__VA_ARGS__)

◆ vsoxseg6ei32_v_i32m1_m

#define vsoxseg6ei32_v_i32m1_m ( ... ) __riscv_vsoxseg6ei32_v_i32m1_m(__VA_ARGS__)

◆ vsoxseg6ei32_v_i32mf2

#define vsoxseg6ei32_v_i32mf2 ( ... ) __riscv_vsoxseg6ei32_v_i32mf2(__VA_ARGS__)

◆ vsoxseg6ei32_v_i32mf2_m

#define vsoxseg6ei32_v_i32mf2_m ( ... ) __riscv_vsoxseg6ei32_v_i32mf2_m(__VA_ARGS__)

◆ vsoxseg6ei32_v_i64m1

#define vsoxseg6ei32_v_i64m1 ( ... ) __riscv_vsoxseg6ei32_v_i64m1(__VA_ARGS__)

◆ vsoxseg6ei32_v_i64m1_m

#define vsoxseg6ei32_v_i64m1_m ( ... ) __riscv_vsoxseg6ei32_v_i64m1_m(__VA_ARGS__)

◆ vsoxseg6ei32_v_i8m1

#define vsoxseg6ei32_v_i8m1 ( ... ) __riscv_vsoxseg6ei32_v_i8m1(__VA_ARGS__)

◆ vsoxseg6ei32_v_i8m1_m

#define vsoxseg6ei32_v_i8m1_m ( ... ) __riscv_vsoxseg6ei32_v_i8m1_m(__VA_ARGS__)

◆ vsoxseg6ei32_v_i8mf2

#define vsoxseg6ei32_v_i8mf2 ( ... ) __riscv_vsoxseg6ei32_v_i8mf2(__VA_ARGS__)

◆ vsoxseg6ei32_v_i8mf2_m

#define vsoxseg6ei32_v_i8mf2_m ( ... ) __riscv_vsoxseg6ei32_v_i8mf2_m(__VA_ARGS__)

◆ vsoxseg6ei32_v_i8mf4

#define vsoxseg6ei32_v_i8mf4 ( ... ) __riscv_vsoxseg6ei32_v_i8mf4(__VA_ARGS__)

◆ vsoxseg6ei32_v_i8mf4_m

#define vsoxseg6ei32_v_i8mf4_m ( ... ) __riscv_vsoxseg6ei32_v_i8mf4_m(__VA_ARGS__)

◆ vsoxseg6ei32_v_i8mf8

#define vsoxseg6ei32_v_i8mf8 ( ... ) __riscv_vsoxseg6ei32_v_i8mf8(__VA_ARGS__)

◆ vsoxseg6ei32_v_i8mf8_m

#define vsoxseg6ei32_v_i8mf8_m ( ... ) __riscv_vsoxseg6ei32_v_i8mf8_m(__VA_ARGS__)

◆ vsoxseg6ei32_v_u16m1

#define vsoxseg6ei32_v_u16m1 ( ... ) __riscv_vsoxseg6ei32_v_u16m1(__VA_ARGS__)

◆ vsoxseg6ei32_v_u16m1_m

#define vsoxseg6ei32_v_u16m1_m ( ... ) __riscv_vsoxseg6ei32_v_u16m1_m(__VA_ARGS__)

◆ vsoxseg6ei32_v_u16mf2

#define vsoxseg6ei32_v_u16mf2 ( ... ) __riscv_vsoxseg6ei32_v_u16mf2(__VA_ARGS__)

◆ vsoxseg6ei32_v_u16mf2_m

#define vsoxseg6ei32_v_u16mf2_m ( ... ) __riscv_vsoxseg6ei32_v_u16mf2_m(__VA_ARGS__)

◆ vsoxseg6ei32_v_u16mf4

#define vsoxseg6ei32_v_u16mf4 ( ... ) __riscv_vsoxseg6ei32_v_u16mf4(__VA_ARGS__)

◆ vsoxseg6ei32_v_u16mf4_m

#define vsoxseg6ei32_v_u16mf4_m ( ... ) __riscv_vsoxseg6ei32_v_u16mf4_m(__VA_ARGS__)

◆ vsoxseg6ei32_v_u32m1

#define vsoxseg6ei32_v_u32m1 ( ... ) __riscv_vsoxseg6ei32_v_u32m1(__VA_ARGS__)

◆ vsoxseg6ei32_v_u32m1_m

#define vsoxseg6ei32_v_u32m1_m ( ... ) __riscv_vsoxseg6ei32_v_u32m1_m(__VA_ARGS__)

◆ vsoxseg6ei32_v_u32mf2

#define vsoxseg6ei32_v_u32mf2 ( ... ) __riscv_vsoxseg6ei32_v_u32mf2(__VA_ARGS__)

◆ vsoxseg6ei32_v_u32mf2_m

#define vsoxseg6ei32_v_u32mf2_m ( ... ) __riscv_vsoxseg6ei32_v_u32mf2_m(__VA_ARGS__)

◆ vsoxseg6ei32_v_u64m1

#define vsoxseg6ei32_v_u64m1 ( ... ) __riscv_vsoxseg6ei32_v_u64m1(__VA_ARGS__)

◆ vsoxseg6ei32_v_u64m1_m

#define vsoxseg6ei32_v_u64m1_m ( ... ) __riscv_vsoxseg6ei32_v_u64m1_m(__VA_ARGS__)

◆ vsoxseg6ei32_v_u8m1

#define vsoxseg6ei32_v_u8m1 ( ... ) __riscv_vsoxseg6ei32_v_u8m1(__VA_ARGS__)

◆ vsoxseg6ei32_v_u8m1_m

#define vsoxseg6ei32_v_u8m1_m ( ... ) __riscv_vsoxseg6ei32_v_u8m1_m(__VA_ARGS__)

◆ vsoxseg6ei32_v_u8mf2

#define vsoxseg6ei32_v_u8mf2 ( ... ) __riscv_vsoxseg6ei32_v_u8mf2(__VA_ARGS__)

◆ vsoxseg6ei32_v_u8mf2_m

#define vsoxseg6ei32_v_u8mf2_m ( ... ) __riscv_vsoxseg6ei32_v_u8mf2_m(__VA_ARGS__)

◆ vsoxseg6ei32_v_u8mf4

#define vsoxseg6ei32_v_u8mf4 ( ... ) __riscv_vsoxseg6ei32_v_u8mf4(__VA_ARGS__)

◆ vsoxseg6ei32_v_u8mf4_m

#define vsoxseg6ei32_v_u8mf4_m ( ... ) __riscv_vsoxseg6ei32_v_u8mf4_m(__VA_ARGS__)

◆ vsoxseg6ei32_v_u8mf8

#define vsoxseg6ei32_v_u8mf8 ( ... ) __riscv_vsoxseg6ei32_v_u8mf8(__VA_ARGS__)

◆ vsoxseg6ei32_v_u8mf8_m

#define vsoxseg6ei32_v_u8mf8_m ( ... ) __riscv_vsoxseg6ei32_v_u8mf8_m(__VA_ARGS__)

◆ vsoxseg6ei64_v_f16m1

#define vsoxseg6ei64_v_f16m1 ( ... ) __riscv_vsoxseg6ei64_v_f16m1(__VA_ARGS__)

◆ vsoxseg6ei64_v_f16m1_m

#define vsoxseg6ei64_v_f16m1_m ( ... ) __riscv_vsoxseg6ei64_v_f16m1_m(__VA_ARGS__)

◆ vsoxseg6ei64_v_f16mf2

#define vsoxseg6ei64_v_f16mf2 ( ... ) __riscv_vsoxseg6ei64_v_f16mf2(__VA_ARGS__)

◆ vsoxseg6ei64_v_f16mf2_m

#define vsoxseg6ei64_v_f16mf2_m ( ... ) __riscv_vsoxseg6ei64_v_f16mf2_m(__VA_ARGS__)

◆ vsoxseg6ei64_v_f16mf4

#define vsoxseg6ei64_v_f16mf4 ( ... ) __riscv_vsoxseg6ei64_v_f16mf4(__VA_ARGS__)

◆ vsoxseg6ei64_v_f16mf4_m

#define vsoxseg6ei64_v_f16mf4_m ( ... ) __riscv_vsoxseg6ei64_v_f16mf4_m(__VA_ARGS__)

◆ vsoxseg6ei64_v_f32m1

#define vsoxseg6ei64_v_f32m1 ( ... ) __riscv_vsoxseg6ei64_v_f32m1(__VA_ARGS__)

◆ vsoxseg6ei64_v_f32m1_m

#define vsoxseg6ei64_v_f32m1_m ( ... ) __riscv_vsoxseg6ei64_v_f32m1_m(__VA_ARGS__)

◆ vsoxseg6ei64_v_f32mf2

#define vsoxseg6ei64_v_f32mf2 ( ... ) __riscv_vsoxseg6ei64_v_f32mf2(__VA_ARGS__)

◆ vsoxseg6ei64_v_f32mf2_m

#define vsoxseg6ei64_v_f32mf2_m ( ... ) __riscv_vsoxseg6ei64_v_f32mf2_m(__VA_ARGS__)

◆ vsoxseg6ei64_v_f64m1

#define vsoxseg6ei64_v_f64m1 ( ... ) __riscv_vsoxseg6ei64_v_f64m1(__VA_ARGS__)

◆ vsoxseg6ei64_v_f64m1_m

#define vsoxseg6ei64_v_f64m1_m ( ... ) __riscv_vsoxseg6ei64_v_f64m1_m(__VA_ARGS__)

◆ vsoxseg6ei64_v_i16m1

#define vsoxseg6ei64_v_i16m1 ( ... ) __riscv_vsoxseg6ei64_v_i16m1(__VA_ARGS__)

◆ vsoxseg6ei64_v_i16m1_m

#define vsoxseg6ei64_v_i16m1_m ( ... ) __riscv_vsoxseg6ei64_v_i16m1_m(__VA_ARGS__)

◆ vsoxseg6ei64_v_i16mf2

#define vsoxseg6ei64_v_i16mf2 ( ... ) __riscv_vsoxseg6ei64_v_i16mf2(__VA_ARGS__)

◆ vsoxseg6ei64_v_i16mf2_m

#define vsoxseg6ei64_v_i16mf2_m ( ... ) __riscv_vsoxseg6ei64_v_i16mf2_m(__VA_ARGS__)

◆ vsoxseg6ei64_v_i16mf4

#define vsoxseg6ei64_v_i16mf4 ( ... ) __riscv_vsoxseg6ei64_v_i16mf4(__VA_ARGS__)

◆ vsoxseg6ei64_v_i16mf4_m

#define vsoxseg6ei64_v_i16mf4_m ( ... ) __riscv_vsoxseg6ei64_v_i16mf4_m(__VA_ARGS__)

◆ vsoxseg6ei64_v_i32m1

#define vsoxseg6ei64_v_i32m1 ( ... ) __riscv_vsoxseg6ei64_v_i32m1(__VA_ARGS__)

◆ vsoxseg6ei64_v_i32m1_m

#define vsoxseg6ei64_v_i32m1_m ( ... ) __riscv_vsoxseg6ei64_v_i32m1_m(__VA_ARGS__)

◆ vsoxseg6ei64_v_i32mf2

#define vsoxseg6ei64_v_i32mf2 ( ... ) __riscv_vsoxseg6ei64_v_i32mf2(__VA_ARGS__)

◆ vsoxseg6ei64_v_i32mf2_m

#define vsoxseg6ei64_v_i32mf2_m ( ... ) __riscv_vsoxseg6ei64_v_i32mf2_m(__VA_ARGS__)

◆ vsoxseg6ei64_v_i64m1

#define vsoxseg6ei64_v_i64m1 ( ... ) __riscv_vsoxseg6ei64_v_i64m1(__VA_ARGS__)

◆ vsoxseg6ei64_v_i64m1_m

#define vsoxseg6ei64_v_i64m1_m ( ... ) __riscv_vsoxseg6ei64_v_i64m1_m(__VA_ARGS__)

◆ vsoxseg6ei64_v_i8m1

#define vsoxseg6ei64_v_i8m1 ( ... ) __riscv_vsoxseg6ei64_v_i8m1(__VA_ARGS__)

◆ vsoxseg6ei64_v_i8m1_m

#define vsoxseg6ei64_v_i8m1_m ( ... ) __riscv_vsoxseg6ei64_v_i8m1_m(__VA_ARGS__)

◆ vsoxseg6ei64_v_i8mf2

#define vsoxseg6ei64_v_i8mf2 ( ... ) __riscv_vsoxseg6ei64_v_i8mf2(__VA_ARGS__)

◆ vsoxseg6ei64_v_i8mf2_m

#define vsoxseg6ei64_v_i8mf2_m ( ... ) __riscv_vsoxseg6ei64_v_i8mf2_m(__VA_ARGS__)

◆ vsoxseg6ei64_v_i8mf4

#define vsoxseg6ei64_v_i8mf4 ( ... ) __riscv_vsoxseg6ei64_v_i8mf4(__VA_ARGS__)

◆ vsoxseg6ei64_v_i8mf4_m

#define vsoxseg6ei64_v_i8mf4_m ( ... ) __riscv_vsoxseg6ei64_v_i8mf4_m(__VA_ARGS__)

◆ vsoxseg6ei64_v_i8mf8

#define vsoxseg6ei64_v_i8mf8 ( ... ) __riscv_vsoxseg6ei64_v_i8mf8(__VA_ARGS__)

◆ vsoxseg6ei64_v_i8mf8_m

#define vsoxseg6ei64_v_i8mf8_m ( ... ) __riscv_vsoxseg6ei64_v_i8mf8_m(__VA_ARGS__)

◆ vsoxseg6ei64_v_u16m1

#define vsoxseg6ei64_v_u16m1 ( ... ) __riscv_vsoxseg6ei64_v_u16m1(__VA_ARGS__)

◆ vsoxseg6ei64_v_u16m1_m

#define vsoxseg6ei64_v_u16m1_m ( ... ) __riscv_vsoxseg6ei64_v_u16m1_m(__VA_ARGS__)

◆ vsoxseg6ei64_v_u16mf2

#define vsoxseg6ei64_v_u16mf2 ( ... ) __riscv_vsoxseg6ei64_v_u16mf2(__VA_ARGS__)

◆ vsoxseg6ei64_v_u16mf2_m

#define vsoxseg6ei64_v_u16mf2_m ( ... ) __riscv_vsoxseg6ei64_v_u16mf2_m(__VA_ARGS__)

◆ vsoxseg6ei64_v_u16mf4

#define vsoxseg6ei64_v_u16mf4 ( ... ) __riscv_vsoxseg6ei64_v_u16mf4(__VA_ARGS__)

◆ vsoxseg6ei64_v_u16mf4_m

#define vsoxseg6ei64_v_u16mf4_m ( ... ) __riscv_vsoxseg6ei64_v_u16mf4_m(__VA_ARGS__)

◆ vsoxseg6ei64_v_u32m1

#define vsoxseg6ei64_v_u32m1 ( ... ) __riscv_vsoxseg6ei64_v_u32m1(__VA_ARGS__)

◆ vsoxseg6ei64_v_u32m1_m

#define vsoxseg6ei64_v_u32m1_m ( ... ) __riscv_vsoxseg6ei64_v_u32m1_m(__VA_ARGS__)

◆ vsoxseg6ei64_v_u32mf2

#define vsoxseg6ei64_v_u32mf2 ( ... ) __riscv_vsoxseg6ei64_v_u32mf2(__VA_ARGS__)

◆ vsoxseg6ei64_v_u32mf2_m

#define vsoxseg6ei64_v_u32mf2_m ( ... ) __riscv_vsoxseg6ei64_v_u32mf2_m(__VA_ARGS__)

◆ vsoxseg6ei64_v_u64m1

#define vsoxseg6ei64_v_u64m1 ( ... ) __riscv_vsoxseg6ei64_v_u64m1(__VA_ARGS__)

◆ vsoxseg6ei64_v_u64m1_m

#define vsoxseg6ei64_v_u64m1_m ( ... ) __riscv_vsoxseg6ei64_v_u64m1_m(__VA_ARGS__)

◆ vsoxseg6ei64_v_u8m1

#define vsoxseg6ei64_v_u8m1 ( ... ) __riscv_vsoxseg6ei64_v_u8m1(__VA_ARGS__)

◆ vsoxseg6ei64_v_u8m1_m

#define vsoxseg6ei64_v_u8m1_m ( ... ) __riscv_vsoxseg6ei64_v_u8m1_m(__VA_ARGS__)

◆ vsoxseg6ei64_v_u8mf2

#define vsoxseg6ei64_v_u8mf2 ( ... ) __riscv_vsoxseg6ei64_v_u8mf2(__VA_ARGS__)

◆ vsoxseg6ei64_v_u8mf2_m

#define vsoxseg6ei64_v_u8mf2_m ( ... ) __riscv_vsoxseg6ei64_v_u8mf2_m(__VA_ARGS__)

◆ vsoxseg6ei64_v_u8mf4

#define vsoxseg6ei64_v_u8mf4 ( ... ) __riscv_vsoxseg6ei64_v_u8mf4(__VA_ARGS__)

◆ vsoxseg6ei64_v_u8mf4_m

#define vsoxseg6ei64_v_u8mf4_m ( ... ) __riscv_vsoxseg6ei64_v_u8mf4_m(__VA_ARGS__)

◆ vsoxseg6ei64_v_u8mf8

#define vsoxseg6ei64_v_u8mf8 ( ... ) __riscv_vsoxseg6ei64_v_u8mf8(__VA_ARGS__)

◆ vsoxseg6ei64_v_u8mf8_m

#define vsoxseg6ei64_v_u8mf8_m ( ... ) __riscv_vsoxseg6ei64_v_u8mf8_m(__VA_ARGS__)

◆ vsoxseg6ei8_v_f16m1

#define vsoxseg6ei8_v_f16m1 ( ... ) __riscv_vsoxseg6ei8_v_f16m1(__VA_ARGS__)

◆ vsoxseg6ei8_v_f16m1_m

#define vsoxseg6ei8_v_f16m1_m ( ... ) __riscv_vsoxseg6ei8_v_f16m1_m(__VA_ARGS__)

◆ vsoxseg6ei8_v_f16mf2

#define vsoxseg6ei8_v_f16mf2 ( ... ) __riscv_vsoxseg6ei8_v_f16mf2(__VA_ARGS__)

◆ vsoxseg6ei8_v_f16mf2_m

#define vsoxseg6ei8_v_f16mf2_m ( ... ) __riscv_vsoxseg6ei8_v_f16mf2_m(__VA_ARGS__)

◆ vsoxseg6ei8_v_f16mf4

#define vsoxseg6ei8_v_f16mf4 ( ... ) __riscv_vsoxseg6ei8_v_f16mf4(__VA_ARGS__)

◆ vsoxseg6ei8_v_f16mf4_m

#define vsoxseg6ei8_v_f16mf4_m ( ... ) __riscv_vsoxseg6ei8_v_f16mf4_m(__VA_ARGS__)

◆ vsoxseg6ei8_v_f32m1

#define vsoxseg6ei8_v_f32m1 ( ... ) __riscv_vsoxseg6ei8_v_f32m1(__VA_ARGS__)

◆ vsoxseg6ei8_v_f32m1_m

#define vsoxseg6ei8_v_f32m1_m ( ... ) __riscv_vsoxseg6ei8_v_f32m1_m(__VA_ARGS__)

◆ vsoxseg6ei8_v_f32mf2

#define vsoxseg6ei8_v_f32mf2 ( ... ) __riscv_vsoxseg6ei8_v_f32mf2(__VA_ARGS__)

◆ vsoxseg6ei8_v_f32mf2_m

#define vsoxseg6ei8_v_f32mf2_m ( ... ) __riscv_vsoxseg6ei8_v_f32mf2_m(__VA_ARGS__)

◆ vsoxseg6ei8_v_f64m1

#define vsoxseg6ei8_v_f64m1 ( ... ) __riscv_vsoxseg6ei8_v_f64m1(__VA_ARGS__)

◆ vsoxseg6ei8_v_f64m1_m

#define vsoxseg6ei8_v_f64m1_m ( ... ) __riscv_vsoxseg6ei8_v_f64m1_m(__VA_ARGS__)

◆ vsoxseg6ei8_v_i16m1

#define vsoxseg6ei8_v_i16m1 ( ... ) __riscv_vsoxseg6ei8_v_i16m1(__VA_ARGS__)

◆ vsoxseg6ei8_v_i16m1_m

#define vsoxseg6ei8_v_i16m1_m ( ... ) __riscv_vsoxseg6ei8_v_i16m1_m(__VA_ARGS__)

◆ vsoxseg6ei8_v_i16mf2

#define vsoxseg6ei8_v_i16mf2 ( ... ) __riscv_vsoxseg6ei8_v_i16mf2(__VA_ARGS__)

◆ vsoxseg6ei8_v_i16mf2_m

#define vsoxseg6ei8_v_i16mf2_m ( ... ) __riscv_vsoxseg6ei8_v_i16mf2_m(__VA_ARGS__)

◆ vsoxseg6ei8_v_i16mf4

#define vsoxseg6ei8_v_i16mf4 ( ... ) __riscv_vsoxseg6ei8_v_i16mf4(__VA_ARGS__)

◆ vsoxseg6ei8_v_i16mf4_m

#define vsoxseg6ei8_v_i16mf4_m ( ... ) __riscv_vsoxseg6ei8_v_i16mf4_m(__VA_ARGS__)

◆ vsoxseg6ei8_v_i32m1

#define vsoxseg6ei8_v_i32m1 ( ... ) __riscv_vsoxseg6ei8_v_i32m1(__VA_ARGS__)

◆ vsoxseg6ei8_v_i32m1_m

#define vsoxseg6ei8_v_i32m1_m ( ... ) __riscv_vsoxseg6ei8_v_i32m1_m(__VA_ARGS__)

◆ vsoxseg6ei8_v_i32mf2

#define vsoxseg6ei8_v_i32mf2 ( ... ) __riscv_vsoxseg6ei8_v_i32mf2(__VA_ARGS__)

◆ vsoxseg6ei8_v_i32mf2_m

#define vsoxseg6ei8_v_i32mf2_m ( ... ) __riscv_vsoxseg6ei8_v_i32mf2_m(__VA_ARGS__)

◆ vsoxseg6ei8_v_i64m1

#define vsoxseg6ei8_v_i64m1 ( ... ) __riscv_vsoxseg6ei8_v_i64m1(__VA_ARGS__)

◆ vsoxseg6ei8_v_i64m1_m

#define vsoxseg6ei8_v_i64m1_m ( ... ) __riscv_vsoxseg6ei8_v_i64m1_m(__VA_ARGS__)

◆ vsoxseg6ei8_v_i8m1

#define vsoxseg6ei8_v_i8m1 ( ... ) __riscv_vsoxseg6ei8_v_i8m1(__VA_ARGS__)

◆ vsoxseg6ei8_v_i8m1_m

#define vsoxseg6ei8_v_i8m1_m ( ... ) __riscv_vsoxseg6ei8_v_i8m1_m(__VA_ARGS__)

◆ vsoxseg6ei8_v_i8mf2

#define vsoxseg6ei8_v_i8mf2 ( ... ) __riscv_vsoxseg6ei8_v_i8mf2(__VA_ARGS__)

◆ vsoxseg6ei8_v_i8mf2_m

#define vsoxseg6ei8_v_i8mf2_m ( ... ) __riscv_vsoxseg6ei8_v_i8mf2_m(__VA_ARGS__)

◆ vsoxseg6ei8_v_i8mf4

#define vsoxseg6ei8_v_i8mf4 ( ... ) __riscv_vsoxseg6ei8_v_i8mf4(__VA_ARGS__)

◆ vsoxseg6ei8_v_i8mf4_m

#define vsoxseg6ei8_v_i8mf4_m ( ... ) __riscv_vsoxseg6ei8_v_i8mf4_m(__VA_ARGS__)

◆ vsoxseg6ei8_v_i8mf8

#define vsoxseg6ei8_v_i8mf8 ( ... ) __riscv_vsoxseg6ei8_v_i8mf8(__VA_ARGS__)

◆ vsoxseg6ei8_v_i8mf8_m

#define vsoxseg6ei8_v_i8mf8_m ( ... ) __riscv_vsoxseg6ei8_v_i8mf8_m(__VA_ARGS__)

◆ vsoxseg6ei8_v_u16m1

#define vsoxseg6ei8_v_u16m1 ( ... ) __riscv_vsoxseg6ei8_v_u16m1(__VA_ARGS__)

◆ vsoxseg6ei8_v_u16m1_m

#define vsoxseg6ei8_v_u16m1_m ( ... ) __riscv_vsoxseg6ei8_v_u16m1_m(__VA_ARGS__)

◆ vsoxseg6ei8_v_u16mf2

#define vsoxseg6ei8_v_u16mf2 ( ... ) __riscv_vsoxseg6ei8_v_u16mf2(__VA_ARGS__)

◆ vsoxseg6ei8_v_u16mf2_m

#define vsoxseg6ei8_v_u16mf2_m ( ... ) __riscv_vsoxseg6ei8_v_u16mf2_m(__VA_ARGS__)

◆ vsoxseg6ei8_v_u16mf4

#define vsoxseg6ei8_v_u16mf4 ( ... ) __riscv_vsoxseg6ei8_v_u16mf4(__VA_ARGS__)

◆ vsoxseg6ei8_v_u16mf4_m

#define vsoxseg6ei8_v_u16mf4_m ( ... ) __riscv_vsoxseg6ei8_v_u16mf4_m(__VA_ARGS__)

◆ vsoxseg6ei8_v_u32m1

#define vsoxseg6ei8_v_u32m1 ( ... ) __riscv_vsoxseg6ei8_v_u32m1(__VA_ARGS__)

◆ vsoxseg6ei8_v_u32m1_m

#define vsoxseg6ei8_v_u32m1_m ( ... ) __riscv_vsoxseg6ei8_v_u32m1_m(__VA_ARGS__)

◆ vsoxseg6ei8_v_u32mf2

#define vsoxseg6ei8_v_u32mf2 ( ... ) __riscv_vsoxseg6ei8_v_u32mf2(__VA_ARGS__)

◆ vsoxseg6ei8_v_u32mf2_m

#define vsoxseg6ei8_v_u32mf2_m ( ... ) __riscv_vsoxseg6ei8_v_u32mf2_m(__VA_ARGS__)

◆ vsoxseg6ei8_v_u64m1

#define vsoxseg6ei8_v_u64m1 ( ... ) __riscv_vsoxseg6ei8_v_u64m1(__VA_ARGS__)

◆ vsoxseg6ei8_v_u64m1_m

#define vsoxseg6ei8_v_u64m1_m ( ... ) __riscv_vsoxseg6ei8_v_u64m1_m(__VA_ARGS__)

◆ vsoxseg6ei8_v_u8m1

#define vsoxseg6ei8_v_u8m1 ( ... ) __riscv_vsoxseg6ei8_v_u8m1(__VA_ARGS__)

◆ vsoxseg6ei8_v_u8m1_m

#define vsoxseg6ei8_v_u8m1_m ( ... ) __riscv_vsoxseg6ei8_v_u8m1_m(__VA_ARGS__)

◆ vsoxseg6ei8_v_u8mf2

#define vsoxseg6ei8_v_u8mf2 ( ... ) __riscv_vsoxseg6ei8_v_u8mf2(__VA_ARGS__)

◆ vsoxseg6ei8_v_u8mf2_m

#define vsoxseg6ei8_v_u8mf2_m ( ... ) __riscv_vsoxseg6ei8_v_u8mf2_m(__VA_ARGS__)

◆ vsoxseg6ei8_v_u8mf4

#define vsoxseg6ei8_v_u8mf4 ( ... ) __riscv_vsoxseg6ei8_v_u8mf4(__VA_ARGS__)

◆ vsoxseg6ei8_v_u8mf4_m

#define vsoxseg6ei8_v_u8mf4_m ( ... ) __riscv_vsoxseg6ei8_v_u8mf4_m(__VA_ARGS__)

◆ vsoxseg6ei8_v_u8mf8

#define vsoxseg6ei8_v_u8mf8 ( ... ) __riscv_vsoxseg6ei8_v_u8mf8(__VA_ARGS__)

◆ vsoxseg6ei8_v_u8mf8_m

#define vsoxseg6ei8_v_u8mf8_m ( ... ) __riscv_vsoxseg6ei8_v_u8mf8_m(__VA_ARGS__)

◆ vsoxseg7ei16_v_f16m1

#define vsoxseg7ei16_v_f16m1 ( ... ) __riscv_vsoxseg7ei16_v_f16m1(__VA_ARGS__)

◆ vsoxseg7ei16_v_f16m1_m

#define vsoxseg7ei16_v_f16m1_m ( ... ) __riscv_vsoxseg7ei16_v_f16m1_m(__VA_ARGS__)

◆ vsoxseg7ei16_v_f16mf2

#define vsoxseg7ei16_v_f16mf2 ( ... ) __riscv_vsoxseg7ei16_v_f16mf2(__VA_ARGS__)

◆ vsoxseg7ei16_v_f16mf2_m

#define vsoxseg7ei16_v_f16mf2_m ( ... ) __riscv_vsoxseg7ei16_v_f16mf2_m(__VA_ARGS__)

◆ vsoxseg7ei16_v_f16mf4

#define vsoxseg7ei16_v_f16mf4 ( ... ) __riscv_vsoxseg7ei16_v_f16mf4(__VA_ARGS__)

◆ vsoxseg7ei16_v_f16mf4_m

#define vsoxseg7ei16_v_f16mf4_m ( ... ) __riscv_vsoxseg7ei16_v_f16mf4_m(__VA_ARGS__)

◆ vsoxseg7ei16_v_f32m1

#define vsoxseg7ei16_v_f32m1 ( ... ) __riscv_vsoxseg7ei16_v_f32m1(__VA_ARGS__)

◆ vsoxseg7ei16_v_f32m1_m

#define vsoxseg7ei16_v_f32m1_m ( ... ) __riscv_vsoxseg7ei16_v_f32m1_m(__VA_ARGS__)

◆ vsoxseg7ei16_v_f32mf2

#define vsoxseg7ei16_v_f32mf2 ( ... ) __riscv_vsoxseg7ei16_v_f32mf2(__VA_ARGS__)

◆ vsoxseg7ei16_v_f32mf2_m

#define vsoxseg7ei16_v_f32mf2_m ( ... ) __riscv_vsoxseg7ei16_v_f32mf2_m(__VA_ARGS__)

◆ vsoxseg7ei16_v_f64m1

#define vsoxseg7ei16_v_f64m1 ( ... ) __riscv_vsoxseg7ei16_v_f64m1(__VA_ARGS__)

◆ vsoxseg7ei16_v_f64m1_m

#define vsoxseg7ei16_v_f64m1_m ( ... ) __riscv_vsoxseg7ei16_v_f64m1_m(__VA_ARGS__)

◆ vsoxseg7ei16_v_i16m1

#define vsoxseg7ei16_v_i16m1 ( ... ) __riscv_vsoxseg7ei16_v_i16m1(__VA_ARGS__)

◆ vsoxseg7ei16_v_i16m1_m

#define vsoxseg7ei16_v_i16m1_m ( ... ) __riscv_vsoxseg7ei16_v_i16m1_m(__VA_ARGS__)

◆ vsoxseg7ei16_v_i16mf2

#define vsoxseg7ei16_v_i16mf2 ( ... ) __riscv_vsoxseg7ei16_v_i16mf2(__VA_ARGS__)

◆ vsoxseg7ei16_v_i16mf2_m

#define vsoxseg7ei16_v_i16mf2_m ( ... ) __riscv_vsoxseg7ei16_v_i16mf2_m(__VA_ARGS__)

◆ vsoxseg7ei16_v_i16mf4

#define vsoxseg7ei16_v_i16mf4 ( ... ) __riscv_vsoxseg7ei16_v_i16mf4(__VA_ARGS__)

◆ vsoxseg7ei16_v_i16mf4_m

#define vsoxseg7ei16_v_i16mf4_m ( ... ) __riscv_vsoxseg7ei16_v_i16mf4_m(__VA_ARGS__)

◆ vsoxseg7ei16_v_i32m1

#define vsoxseg7ei16_v_i32m1 ( ... ) __riscv_vsoxseg7ei16_v_i32m1(__VA_ARGS__)

◆ vsoxseg7ei16_v_i32m1_m

#define vsoxseg7ei16_v_i32m1_m ( ... ) __riscv_vsoxseg7ei16_v_i32m1_m(__VA_ARGS__)

◆ vsoxseg7ei16_v_i32mf2

#define vsoxseg7ei16_v_i32mf2 ( ... ) __riscv_vsoxseg7ei16_v_i32mf2(__VA_ARGS__)

◆ vsoxseg7ei16_v_i32mf2_m

#define vsoxseg7ei16_v_i32mf2_m ( ... ) __riscv_vsoxseg7ei16_v_i32mf2_m(__VA_ARGS__)

◆ vsoxseg7ei16_v_i64m1

#define vsoxseg7ei16_v_i64m1 ( ... ) __riscv_vsoxseg7ei16_v_i64m1(__VA_ARGS__)

◆ vsoxseg7ei16_v_i64m1_m

#define vsoxseg7ei16_v_i64m1_m ( ... ) __riscv_vsoxseg7ei16_v_i64m1_m(__VA_ARGS__)

◆ vsoxseg7ei16_v_i8m1

#define vsoxseg7ei16_v_i8m1 ( ... ) __riscv_vsoxseg7ei16_v_i8m1(__VA_ARGS__)

◆ vsoxseg7ei16_v_i8m1_m

#define vsoxseg7ei16_v_i8m1_m ( ... ) __riscv_vsoxseg7ei16_v_i8m1_m(__VA_ARGS__)

◆ vsoxseg7ei16_v_i8mf2

#define vsoxseg7ei16_v_i8mf2 ( ... ) __riscv_vsoxseg7ei16_v_i8mf2(__VA_ARGS__)

◆ vsoxseg7ei16_v_i8mf2_m

#define vsoxseg7ei16_v_i8mf2_m ( ... ) __riscv_vsoxseg7ei16_v_i8mf2_m(__VA_ARGS__)

◆ vsoxseg7ei16_v_i8mf4

#define vsoxseg7ei16_v_i8mf4 ( ... ) __riscv_vsoxseg7ei16_v_i8mf4(__VA_ARGS__)

◆ vsoxseg7ei16_v_i8mf4_m

#define vsoxseg7ei16_v_i8mf4_m ( ... ) __riscv_vsoxseg7ei16_v_i8mf4_m(__VA_ARGS__)

◆ vsoxseg7ei16_v_i8mf8

#define vsoxseg7ei16_v_i8mf8 ( ... ) __riscv_vsoxseg7ei16_v_i8mf8(__VA_ARGS__)

◆ vsoxseg7ei16_v_i8mf8_m

#define vsoxseg7ei16_v_i8mf8_m ( ... ) __riscv_vsoxseg7ei16_v_i8mf8_m(__VA_ARGS__)

◆ vsoxseg7ei16_v_u16m1

#define vsoxseg7ei16_v_u16m1 ( ... ) __riscv_vsoxseg7ei16_v_u16m1(__VA_ARGS__)

◆ vsoxseg7ei16_v_u16m1_m

#define vsoxseg7ei16_v_u16m1_m ( ... ) __riscv_vsoxseg7ei16_v_u16m1_m(__VA_ARGS__)

◆ vsoxseg7ei16_v_u16mf2

#define vsoxseg7ei16_v_u16mf2 ( ... ) __riscv_vsoxseg7ei16_v_u16mf2(__VA_ARGS__)

◆ vsoxseg7ei16_v_u16mf2_m

#define vsoxseg7ei16_v_u16mf2_m ( ... ) __riscv_vsoxseg7ei16_v_u16mf2_m(__VA_ARGS__)

◆ vsoxseg7ei16_v_u16mf4

#define vsoxseg7ei16_v_u16mf4 ( ... ) __riscv_vsoxseg7ei16_v_u16mf4(__VA_ARGS__)

◆ vsoxseg7ei16_v_u16mf4_m

#define vsoxseg7ei16_v_u16mf4_m ( ... ) __riscv_vsoxseg7ei16_v_u16mf4_m(__VA_ARGS__)

◆ vsoxseg7ei16_v_u32m1

#define vsoxseg7ei16_v_u32m1 ( ... ) __riscv_vsoxseg7ei16_v_u32m1(__VA_ARGS__)

◆ vsoxseg7ei16_v_u32m1_m

#define vsoxseg7ei16_v_u32m1_m ( ... ) __riscv_vsoxseg7ei16_v_u32m1_m(__VA_ARGS__)

◆ vsoxseg7ei16_v_u32mf2

#define vsoxseg7ei16_v_u32mf2 ( ... ) __riscv_vsoxseg7ei16_v_u32mf2(__VA_ARGS__)

◆ vsoxseg7ei16_v_u32mf2_m

#define vsoxseg7ei16_v_u32mf2_m ( ... ) __riscv_vsoxseg7ei16_v_u32mf2_m(__VA_ARGS__)

◆ vsoxseg7ei16_v_u64m1

#define vsoxseg7ei16_v_u64m1 ( ... ) __riscv_vsoxseg7ei16_v_u64m1(__VA_ARGS__)

◆ vsoxseg7ei16_v_u64m1_m

#define vsoxseg7ei16_v_u64m1_m ( ... ) __riscv_vsoxseg7ei16_v_u64m1_m(__VA_ARGS__)

◆ vsoxseg7ei16_v_u8m1

#define vsoxseg7ei16_v_u8m1 ( ... ) __riscv_vsoxseg7ei16_v_u8m1(__VA_ARGS__)

◆ vsoxseg7ei16_v_u8m1_m

#define vsoxseg7ei16_v_u8m1_m ( ... ) __riscv_vsoxseg7ei16_v_u8m1_m(__VA_ARGS__)

◆ vsoxseg7ei16_v_u8mf2

#define vsoxseg7ei16_v_u8mf2 ( ... ) __riscv_vsoxseg7ei16_v_u8mf2(__VA_ARGS__)

◆ vsoxseg7ei16_v_u8mf2_m

#define vsoxseg7ei16_v_u8mf2_m ( ... ) __riscv_vsoxseg7ei16_v_u8mf2_m(__VA_ARGS__)

◆ vsoxseg7ei16_v_u8mf4

#define vsoxseg7ei16_v_u8mf4 ( ... ) __riscv_vsoxseg7ei16_v_u8mf4(__VA_ARGS__)

◆ vsoxseg7ei16_v_u8mf4_m

#define vsoxseg7ei16_v_u8mf4_m ( ... ) __riscv_vsoxseg7ei16_v_u8mf4_m(__VA_ARGS__)

◆ vsoxseg7ei16_v_u8mf8

#define vsoxseg7ei16_v_u8mf8 ( ... ) __riscv_vsoxseg7ei16_v_u8mf8(__VA_ARGS__)

◆ vsoxseg7ei16_v_u8mf8_m

#define vsoxseg7ei16_v_u8mf8_m ( ... ) __riscv_vsoxseg7ei16_v_u8mf8_m(__VA_ARGS__)

◆ vsoxseg7ei32_v_f16m1

#define vsoxseg7ei32_v_f16m1 ( ... ) __riscv_vsoxseg7ei32_v_f16m1(__VA_ARGS__)

◆ vsoxseg7ei32_v_f16m1_m

#define vsoxseg7ei32_v_f16m1_m ( ... ) __riscv_vsoxseg7ei32_v_f16m1_m(__VA_ARGS__)

◆ vsoxseg7ei32_v_f16mf2

#define vsoxseg7ei32_v_f16mf2 ( ... ) __riscv_vsoxseg7ei32_v_f16mf2(__VA_ARGS__)

◆ vsoxseg7ei32_v_f16mf2_m

#define vsoxseg7ei32_v_f16mf2_m ( ... ) __riscv_vsoxseg7ei32_v_f16mf2_m(__VA_ARGS__)

◆ vsoxseg7ei32_v_f16mf4

#define vsoxseg7ei32_v_f16mf4 ( ... ) __riscv_vsoxseg7ei32_v_f16mf4(__VA_ARGS__)

◆ vsoxseg7ei32_v_f16mf4_m

#define vsoxseg7ei32_v_f16mf4_m ( ... ) __riscv_vsoxseg7ei32_v_f16mf4_m(__VA_ARGS__)

◆ vsoxseg7ei32_v_f32m1

#define vsoxseg7ei32_v_f32m1 ( ... ) __riscv_vsoxseg7ei32_v_f32m1(__VA_ARGS__)

◆ vsoxseg7ei32_v_f32m1_m

#define vsoxseg7ei32_v_f32m1_m ( ... ) __riscv_vsoxseg7ei32_v_f32m1_m(__VA_ARGS__)

◆ vsoxseg7ei32_v_f32mf2

#define vsoxseg7ei32_v_f32mf2 ( ... ) __riscv_vsoxseg7ei32_v_f32mf2(__VA_ARGS__)

◆ vsoxseg7ei32_v_f32mf2_m

#define vsoxseg7ei32_v_f32mf2_m ( ... ) __riscv_vsoxseg7ei32_v_f32mf2_m(__VA_ARGS__)

◆ vsoxseg7ei32_v_f64m1

#define vsoxseg7ei32_v_f64m1 ( ... ) __riscv_vsoxseg7ei32_v_f64m1(__VA_ARGS__)

◆ vsoxseg7ei32_v_f64m1_m

#define vsoxseg7ei32_v_f64m1_m ( ... ) __riscv_vsoxseg7ei32_v_f64m1_m(__VA_ARGS__)

◆ vsoxseg7ei32_v_i16m1

#define vsoxseg7ei32_v_i16m1 ( ... ) __riscv_vsoxseg7ei32_v_i16m1(__VA_ARGS__)

◆ vsoxseg7ei32_v_i16m1_m

#define vsoxseg7ei32_v_i16m1_m ( ... ) __riscv_vsoxseg7ei32_v_i16m1_m(__VA_ARGS__)

◆ vsoxseg7ei32_v_i16mf2

#define vsoxseg7ei32_v_i16mf2 ( ... ) __riscv_vsoxseg7ei32_v_i16mf2(__VA_ARGS__)

◆ vsoxseg7ei32_v_i16mf2_m

#define vsoxseg7ei32_v_i16mf2_m ( ... ) __riscv_vsoxseg7ei32_v_i16mf2_m(__VA_ARGS__)

◆ vsoxseg7ei32_v_i16mf4

#define vsoxseg7ei32_v_i16mf4 ( ... ) __riscv_vsoxseg7ei32_v_i16mf4(__VA_ARGS__)

◆ vsoxseg7ei32_v_i16mf4_m

#define vsoxseg7ei32_v_i16mf4_m ( ... ) __riscv_vsoxseg7ei32_v_i16mf4_m(__VA_ARGS__)

◆ vsoxseg7ei32_v_i32m1

#define vsoxseg7ei32_v_i32m1 ( ... ) __riscv_vsoxseg7ei32_v_i32m1(__VA_ARGS__)

◆ vsoxseg7ei32_v_i32m1_m

#define vsoxseg7ei32_v_i32m1_m ( ... ) __riscv_vsoxseg7ei32_v_i32m1_m(__VA_ARGS__)

◆ vsoxseg7ei32_v_i32mf2

#define vsoxseg7ei32_v_i32mf2 ( ... ) __riscv_vsoxseg7ei32_v_i32mf2(__VA_ARGS__)

◆ vsoxseg7ei32_v_i32mf2_m

#define vsoxseg7ei32_v_i32mf2_m ( ... ) __riscv_vsoxseg7ei32_v_i32mf2_m(__VA_ARGS__)

◆ vsoxseg7ei32_v_i64m1

#define vsoxseg7ei32_v_i64m1 ( ... ) __riscv_vsoxseg7ei32_v_i64m1(__VA_ARGS__)

◆ vsoxseg7ei32_v_i64m1_m

#define vsoxseg7ei32_v_i64m1_m ( ... ) __riscv_vsoxseg7ei32_v_i64m1_m(__VA_ARGS__)

◆ vsoxseg7ei32_v_i8m1

#define vsoxseg7ei32_v_i8m1 ( ... ) __riscv_vsoxseg7ei32_v_i8m1(__VA_ARGS__)

◆ vsoxseg7ei32_v_i8m1_m

#define vsoxseg7ei32_v_i8m1_m ( ... ) __riscv_vsoxseg7ei32_v_i8m1_m(__VA_ARGS__)

◆ vsoxseg7ei32_v_i8mf2

#define vsoxseg7ei32_v_i8mf2 ( ... ) __riscv_vsoxseg7ei32_v_i8mf2(__VA_ARGS__)

◆ vsoxseg7ei32_v_i8mf2_m

#define vsoxseg7ei32_v_i8mf2_m ( ... ) __riscv_vsoxseg7ei32_v_i8mf2_m(__VA_ARGS__)

◆ vsoxseg7ei32_v_i8mf4

#define vsoxseg7ei32_v_i8mf4 ( ... ) __riscv_vsoxseg7ei32_v_i8mf4(__VA_ARGS__)

◆ vsoxseg7ei32_v_i8mf4_m

#define vsoxseg7ei32_v_i8mf4_m ( ... ) __riscv_vsoxseg7ei32_v_i8mf4_m(__VA_ARGS__)

◆ vsoxseg7ei32_v_i8mf8

#define vsoxseg7ei32_v_i8mf8 ( ... ) __riscv_vsoxseg7ei32_v_i8mf8(__VA_ARGS__)

◆ vsoxseg7ei32_v_i8mf8_m

#define vsoxseg7ei32_v_i8mf8_m ( ... ) __riscv_vsoxseg7ei32_v_i8mf8_m(__VA_ARGS__)

◆ vsoxseg7ei32_v_u16m1

#define vsoxseg7ei32_v_u16m1 ( ... ) __riscv_vsoxseg7ei32_v_u16m1(__VA_ARGS__)

◆ vsoxseg7ei32_v_u16m1_m

#define vsoxseg7ei32_v_u16m1_m ( ... ) __riscv_vsoxseg7ei32_v_u16m1_m(__VA_ARGS__)

◆ vsoxseg7ei32_v_u16mf2

#define vsoxseg7ei32_v_u16mf2 ( ... ) __riscv_vsoxseg7ei32_v_u16mf2(__VA_ARGS__)

◆ vsoxseg7ei32_v_u16mf2_m

#define vsoxseg7ei32_v_u16mf2_m ( ... ) __riscv_vsoxseg7ei32_v_u16mf2_m(__VA_ARGS__)

◆ vsoxseg7ei32_v_u16mf4

#define vsoxseg7ei32_v_u16mf4 ( ... ) __riscv_vsoxseg7ei32_v_u16mf4(__VA_ARGS__)

◆ vsoxseg7ei32_v_u16mf4_m

#define vsoxseg7ei32_v_u16mf4_m ( ... ) __riscv_vsoxseg7ei32_v_u16mf4_m(__VA_ARGS__)

◆ vsoxseg7ei32_v_u32m1

#define vsoxseg7ei32_v_u32m1 ( ... ) __riscv_vsoxseg7ei32_v_u32m1(__VA_ARGS__)

◆ vsoxseg7ei32_v_u32m1_m

#define vsoxseg7ei32_v_u32m1_m ( ... ) __riscv_vsoxseg7ei32_v_u32m1_m(__VA_ARGS__)

◆ vsoxseg7ei32_v_u32mf2

#define vsoxseg7ei32_v_u32mf2 ( ... ) __riscv_vsoxseg7ei32_v_u32mf2(__VA_ARGS__)

◆ vsoxseg7ei32_v_u32mf2_m

#define vsoxseg7ei32_v_u32mf2_m ( ... ) __riscv_vsoxseg7ei32_v_u32mf2_m(__VA_ARGS__)

◆ vsoxseg7ei32_v_u64m1

#define vsoxseg7ei32_v_u64m1 ( ... ) __riscv_vsoxseg7ei32_v_u64m1(__VA_ARGS__)

◆ vsoxseg7ei32_v_u64m1_m

#define vsoxseg7ei32_v_u64m1_m ( ... ) __riscv_vsoxseg7ei32_v_u64m1_m(__VA_ARGS__)

◆ vsoxseg7ei32_v_u8m1

#define vsoxseg7ei32_v_u8m1 ( ... ) __riscv_vsoxseg7ei32_v_u8m1(__VA_ARGS__)

◆ vsoxseg7ei32_v_u8m1_m

#define vsoxseg7ei32_v_u8m1_m ( ... ) __riscv_vsoxseg7ei32_v_u8m1_m(__VA_ARGS__)

◆ vsoxseg7ei32_v_u8mf2

#define vsoxseg7ei32_v_u8mf2 ( ... ) __riscv_vsoxseg7ei32_v_u8mf2(__VA_ARGS__)

◆ vsoxseg7ei32_v_u8mf2_m

#define vsoxseg7ei32_v_u8mf2_m ( ... ) __riscv_vsoxseg7ei32_v_u8mf2_m(__VA_ARGS__)

◆ vsoxseg7ei32_v_u8mf4

#define vsoxseg7ei32_v_u8mf4 ( ... ) __riscv_vsoxseg7ei32_v_u8mf4(__VA_ARGS__)

◆ vsoxseg7ei32_v_u8mf4_m

#define vsoxseg7ei32_v_u8mf4_m ( ... ) __riscv_vsoxseg7ei32_v_u8mf4_m(__VA_ARGS__)

◆ vsoxseg7ei32_v_u8mf8

#define vsoxseg7ei32_v_u8mf8 ( ... ) __riscv_vsoxseg7ei32_v_u8mf8(__VA_ARGS__)

◆ vsoxseg7ei32_v_u8mf8_m

#define vsoxseg7ei32_v_u8mf8_m ( ... ) __riscv_vsoxseg7ei32_v_u8mf8_m(__VA_ARGS__)

◆ vsoxseg7ei64_v_f16m1

#define vsoxseg7ei64_v_f16m1 ( ... ) __riscv_vsoxseg7ei64_v_f16m1(__VA_ARGS__)

◆ vsoxseg7ei64_v_f16m1_m

#define vsoxseg7ei64_v_f16m1_m ( ... ) __riscv_vsoxseg7ei64_v_f16m1_m(__VA_ARGS__)

◆ vsoxseg7ei64_v_f16mf2

#define vsoxseg7ei64_v_f16mf2 ( ... ) __riscv_vsoxseg7ei64_v_f16mf2(__VA_ARGS__)

◆ vsoxseg7ei64_v_f16mf2_m

#define vsoxseg7ei64_v_f16mf2_m ( ... ) __riscv_vsoxseg7ei64_v_f16mf2_m(__VA_ARGS__)

◆ vsoxseg7ei64_v_f16mf4

#define vsoxseg7ei64_v_f16mf4 ( ... ) __riscv_vsoxseg7ei64_v_f16mf4(__VA_ARGS__)

◆ vsoxseg7ei64_v_f16mf4_m

#define vsoxseg7ei64_v_f16mf4_m ( ... ) __riscv_vsoxseg7ei64_v_f16mf4_m(__VA_ARGS__)

◆ vsoxseg7ei64_v_f32m1

#define vsoxseg7ei64_v_f32m1 ( ... ) __riscv_vsoxseg7ei64_v_f32m1(__VA_ARGS__)

◆ vsoxseg7ei64_v_f32m1_m

#define vsoxseg7ei64_v_f32m1_m ( ... ) __riscv_vsoxseg7ei64_v_f32m1_m(__VA_ARGS__)

◆ vsoxseg7ei64_v_f32mf2

#define vsoxseg7ei64_v_f32mf2 ( ... ) __riscv_vsoxseg7ei64_v_f32mf2(__VA_ARGS__)

◆ vsoxseg7ei64_v_f32mf2_m

#define vsoxseg7ei64_v_f32mf2_m ( ... ) __riscv_vsoxseg7ei64_v_f32mf2_m(__VA_ARGS__)

◆ vsoxseg7ei64_v_f64m1

#define vsoxseg7ei64_v_f64m1 ( ... ) __riscv_vsoxseg7ei64_v_f64m1(__VA_ARGS__)

◆ vsoxseg7ei64_v_f64m1_m

#define vsoxseg7ei64_v_f64m1_m ( ... ) __riscv_vsoxseg7ei64_v_f64m1_m(__VA_ARGS__)

◆ vsoxseg7ei64_v_i16m1

#define vsoxseg7ei64_v_i16m1 ( ... ) __riscv_vsoxseg7ei64_v_i16m1(__VA_ARGS__)

◆ vsoxseg7ei64_v_i16m1_m

#define vsoxseg7ei64_v_i16m1_m ( ... ) __riscv_vsoxseg7ei64_v_i16m1_m(__VA_ARGS__)

◆ vsoxseg7ei64_v_i16mf2

#define vsoxseg7ei64_v_i16mf2 ( ... ) __riscv_vsoxseg7ei64_v_i16mf2(__VA_ARGS__)

◆ vsoxseg7ei64_v_i16mf2_m

#define vsoxseg7ei64_v_i16mf2_m ( ... ) __riscv_vsoxseg7ei64_v_i16mf2_m(__VA_ARGS__)

◆ vsoxseg7ei64_v_i16mf4

#define vsoxseg7ei64_v_i16mf4 ( ... ) __riscv_vsoxseg7ei64_v_i16mf4(__VA_ARGS__)

◆ vsoxseg7ei64_v_i16mf4_m

#define vsoxseg7ei64_v_i16mf4_m ( ... ) __riscv_vsoxseg7ei64_v_i16mf4_m(__VA_ARGS__)

◆ vsoxseg7ei64_v_i32m1

#define vsoxseg7ei64_v_i32m1 ( ... ) __riscv_vsoxseg7ei64_v_i32m1(__VA_ARGS__)

◆ vsoxseg7ei64_v_i32m1_m

#define vsoxseg7ei64_v_i32m1_m ( ... ) __riscv_vsoxseg7ei64_v_i32m1_m(__VA_ARGS__)

◆ vsoxseg7ei64_v_i32mf2

#define vsoxseg7ei64_v_i32mf2 ( ... ) __riscv_vsoxseg7ei64_v_i32mf2(__VA_ARGS__)

◆ vsoxseg7ei64_v_i32mf2_m

#define vsoxseg7ei64_v_i32mf2_m ( ... ) __riscv_vsoxseg7ei64_v_i32mf2_m(__VA_ARGS__)

◆ vsoxseg7ei64_v_i64m1

#define vsoxseg7ei64_v_i64m1 ( ... ) __riscv_vsoxseg7ei64_v_i64m1(__VA_ARGS__)

◆ vsoxseg7ei64_v_i64m1_m

#define vsoxseg7ei64_v_i64m1_m ( ... ) __riscv_vsoxseg7ei64_v_i64m1_m(__VA_ARGS__)

◆ vsoxseg7ei64_v_i8m1

#define vsoxseg7ei64_v_i8m1 ( ... ) __riscv_vsoxseg7ei64_v_i8m1(__VA_ARGS__)

◆ vsoxseg7ei64_v_i8m1_m

#define vsoxseg7ei64_v_i8m1_m ( ... ) __riscv_vsoxseg7ei64_v_i8m1_m(__VA_ARGS__)

◆ vsoxseg7ei64_v_i8mf2

#define vsoxseg7ei64_v_i8mf2 ( ... ) __riscv_vsoxseg7ei64_v_i8mf2(__VA_ARGS__)

◆ vsoxseg7ei64_v_i8mf2_m

#define vsoxseg7ei64_v_i8mf2_m ( ... ) __riscv_vsoxseg7ei64_v_i8mf2_m(__VA_ARGS__)

◆ vsoxseg7ei64_v_i8mf4

#define vsoxseg7ei64_v_i8mf4 ( ... ) __riscv_vsoxseg7ei64_v_i8mf4(__VA_ARGS__)

◆ vsoxseg7ei64_v_i8mf4_m

#define vsoxseg7ei64_v_i8mf4_m ( ... ) __riscv_vsoxseg7ei64_v_i8mf4_m(__VA_ARGS__)

◆ vsoxseg7ei64_v_i8mf8

#define vsoxseg7ei64_v_i8mf8 ( ... ) __riscv_vsoxseg7ei64_v_i8mf8(__VA_ARGS__)

◆ vsoxseg7ei64_v_i8mf8_m

#define vsoxseg7ei64_v_i8mf8_m ( ... ) __riscv_vsoxseg7ei64_v_i8mf8_m(__VA_ARGS__)

◆ vsoxseg7ei64_v_u16m1

#define vsoxseg7ei64_v_u16m1 ( ... ) __riscv_vsoxseg7ei64_v_u16m1(__VA_ARGS__)

◆ vsoxseg7ei64_v_u16m1_m

#define vsoxseg7ei64_v_u16m1_m ( ... ) __riscv_vsoxseg7ei64_v_u16m1_m(__VA_ARGS__)

◆ vsoxseg7ei64_v_u16mf2

#define vsoxseg7ei64_v_u16mf2 ( ... ) __riscv_vsoxseg7ei64_v_u16mf2(__VA_ARGS__)

◆ vsoxseg7ei64_v_u16mf2_m

#define vsoxseg7ei64_v_u16mf2_m ( ... ) __riscv_vsoxseg7ei64_v_u16mf2_m(__VA_ARGS__)

◆ vsoxseg7ei64_v_u16mf4

#define vsoxseg7ei64_v_u16mf4 ( ... ) __riscv_vsoxseg7ei64_v_u16mf4(__VA_ARGS__)

◆ vsoxseg7ei64_v_u16mf4_m

#define vsoxseg7ei64_v_u16mf4_m ( ... ) __riscv_vsoxseg7ei64_v_u16mf4_m(__VA_ARGS__)

◆ vsoxseg7ei64_v_u32m1

#define vsoxseg7ei64_v_u32m1 ( ... ) __riscv_vsoxseg7ei64_v_u32m1(__VA_ARGS__)

◆ vsoxseg7ei64_v_u32m1_m

#define vsoxseg7ei64_v_u32m1_m ( ... ) __riscv_vsoxseg7ei64_v_u32m1_m(__VA_ARGS__)

◆ vsoxseg7ei64_v_u32mf2

#define vsoxseg7ei64_v_u32mf2 ( ... ) __riscv_vsoxseg7ei64_v_u32mf2(__VA_ARGS__)

◆ vsoxseg7ei64_v_u32mf2_m

#define vsoxseg7ei64_v_u32mf2_m ( ... ) __riscv_vsoxseg7ei64_v_u32mf2_m(__VA_ARGS__)

◆ vsoxseg7ei64_v_u64m1

#define vsoxseg7ei64_v_u64m1 ( ... ) __riscv_vsoxseg7ei64_v_u64m1(__VA_ARGS__)

◆ vsoxseg7ei64_v_u64m1_m

#define vsoxseg7ei64_v_u64m1_m ( ... ) __riscv_vsoxseg7ei64_v_u64m1_m(__VA_ARGS__)

◆ vsoxseg7ei64_v_u8m1

#define vsoxseg7ei64_v_u8m1 ( ... ) __riscv_vsoxseg7ei64_v_u8m1(__VA_ARGS__)

◆ vsoxseg7ei64_v_u8m1_m

#define vsoxseg7ei64_v_u8m1_m ( ... ) __riscv_vsoxseg7ei64_v_u8m1_m(__VA_ARGS__)

◆ vsoxseg7ei64_v_u8mf2

#define vsoxseg7ei64_v_u8mf2 ( ... ) __riscv_vsoxseg7ei64_v_u8mf2(__VA_ARGS__)

◆ vsoxseg7ei64_v_u8mf2_m

#define vsoxseg7ei64_v_u8mf2_m ( ... ) __riscv_vsoxseg7ei64_v_u8mf2_m(__VA_ARGS__)

◆ vsoxseg7ei64_v_u8mf4

#define vsoxseg7ei64_v_u8mf4 ( ... ) __riscv_vsoxseg7ei64_v_u8mf4(__VA_ARGS__)

◆ vsoxseg7ei64_v_u8mf4_m

#define vsoxseg7ei64_v_u8mf4_m ( ... ) __riscv_vsoxseg7ei64_v_u8mf4_m(__VA_ARGS__)

◆ vsoxseg7ei64_v_u8mf8

#define vsoxseg7ei64_v_u8mf8 ( ... ) __riscv_vsoxseg7ei64_v_u8mf8(__VA_ARGS__)

◆ vsoxseg7ei64_v_u8mf8_m

#define vsoxseg7ei64_v_u8mf8_m ( ... ) __riscv_vsoxseg7ei64_v_u8mf8_m(__VA_ARGS__)

◆ vsoxseg7ei8_v_f16m1

#define vsoxseg7ei8_v_f16m1 ( ... ) __riscv_vsoxseg7ei8_v_f16m1(__VA_ARGS__)

◆ vsoxseg7ei8_v_f16m1_m

#define vsoxseg7ei8_v_f16m1_m ( ... ) __riscv_vsoxseg7ei8_v_f16m1_m(__VA_ARGS__)

◆ vsoxseg7ei8_v_f16mf2

#define vsoxseg7ei8_v_f16mf2 ( ... ) __riscv_vsoxseg7ei8_v_f16mf2(__VA_ARGS__)

◆ vsoxseg7ei8_v_f16mf2_m

#define vsoxseg7ei8_v_f16mf2_m ( ... ) __riscv_vsoxseg7ei8_v_f16mf2_m(__VA_ARGS__)

◆ vsoxseg7ei8_v_f16mf4

#define vsoxseg7ei8_v_f16mf4 ( ... ) __riscv_vsoxseg7ei8_v_f16mf4(__VA_ARGS__)

◆ vsoxseg7ei8_v_f16mf4_m

#define vsoxseg7ei8_v_f16mf4_m ( ... ) __riscv_vsoxseg7ei8_v_f16mf4_m(__VA_ARGS__)

◆ vsoxseg7ei8_v_f32m1

#define vsoxseg7ei8_v_f32m1 ( ... ) __riscv_vsoxseg7ei8_v_f32m1(__VA_ARGS__)

◆ vsoxseg7ei8_v_f32m1_m

#define vsoxseg7ei8_v_f32m1_m ( ... ) __riscv_vsoxseg7ei8_v_f32m1_m(__VA_ARGS__)

◆ vsoxseg7ei8_v_f32mf2

#define vsoxseg7ei8_v_f32mf2 ( ... ) __riscv_vsoxseg7ei8_v_f32mf2(__VA_ARGS__)

◆ vsoxseg7ei8_v_f32mf2_m

#define vsoxseg7ei8_v_f32mf2_m ( ... ) __riscv_vsoxseg7ei8_v_f32mf2_m(__VA_ARGS__)

◆ vsoxseg7ei8_v_f64m1

#define vsoxseg7ei8_v_f64m1 ( ... ) __riscv_vsoxseg7ei8_v_f64m1(__VA_ARGS__)

◆ vsoxseg7ei8_v_f64m1_m

#define vsoxseg7ei8_v_f64m1_m ( ... ) __riscv_vsoxseg7ei8_v_f64m1_m(__VA_ARGS__)

◆ vsoxseg7ei8_v_i16m1

#define vsoxseg7ei8_v_i16m1 ( ... ) __riscv_vsoxseg7ei8_v_i16m1(__VA_ARGS__)

◆ vsoxseg7ei8_v_i16m1_m

#define vsoxseg7ei8_v_i16m1_m ( ... ) __riscv_vsoxseg7ei8_v_i16m1_m(__VA_ARGS__)

◆ vsoxseg7ei8_v_i16mf2

#define vsoxseg7ei8_v_i16mf2 ( ... ) __riscv_vsoxseg7ei8_v_i16mf2(__VA_ARGS__)

◆ vsoxseg7ei8_v_i16mf2_m

#define vsoxseg7ei8_v_i16mf2_m ( ... ) __riscv_vsoxseg7ei8_v_i16mf2_m(__VA_ARGS__)

◆ vsoxseg7ei8_v_i16mf4

#define vsoxseg7ei8_v_i16mf4 ( ... ) __riscv_vsoxseg7ei8_v_i16mf4(__VA_ARGS__)

◆ vsoxseg7ei8_v_i16mf4_m

#define vsoxseg7ei8_v_i16mf4_m ( ... ) __riscv_vsoxseg7ei8_v_i16mf4_m(__VA_ARGS__)

◆ vsoxseg7ei8_v_i32m1

#define vsoxseg7ei8_v_i32m1 ( ... ) __riscv_vsoxseg7ei8_v_i32m1(__VA_ARGS__)

◆ vsoxseg7ei8_v_i32m1_m

#define vsoxseg7ei8_v_i32m1_m ( ... ) __riscv_vsoxseg7ei8_v_i32m1_m(__VA_ARGS__)

◆ vsoxseg7ei8_v_i32mf2

#define vsoxseg7ei8_v_i32mf2 ( ... ) __riscv_vsoxseg7ei8_v_i32mf2(__VA_ARGS__)

◆ vsoxseg7ei8_v_i32mf2_m

#define vsoxseg7ei8_v_i32mf2_m ( ... ) __riscv_vsoxseg7ei8_v_i32mf2_m(__VA_ARGS__)

◆ vsoxseg7ei8_v_i64m1

#define vsoxseg7ei8_v_i64m1 ( ... ) __riscv_vsoxseg7ei8_v_i64m1(__VA_ARGS__)

◆ vsoxseg7ei8_v_i64m1_m

#define vsoxseg7ei8_v_i64m1_m ( ... ) __riscv_vsoxseg7ei8_v_i64m1_m(__VA_ARGS__)

◆ vsoxseg7ei8_v_i8m1

#define vsoxseg7ei8_v_i8m1 ( ... ) __riscv_vsoxseg7ei8_v_i8m1(__VA_ARGS__)

◆ vsoxseg7ei8_v_i8m1_m

#define vsoxseg7ei8_v_i8m1_m ( ... ) __riscv_vsoxseg7ei8_v_i8m1_m(__VA_ARGS__)

◆ vsoxseg7ei8_v_i8mf2

#define vsoxseg7ei8_v_i8mf2 ( ... ) __riscv_vsoxseg7ei8_v_i8mf2(__VA_ARGS__)

◆ vsoxseg7ei8_v_i8mf2_m

#define vsoxseg7ei8_v_i8mf2_m ( ... ) __riscv_vsoxseg7ei8_v_i8mf2_m(__VA_ARGS__)

◆ vsoxseg7ei8_v_i8mf4

#define vsoxseg7ei8_v_i8mf4 ( ... ) __riscv_vsoxseg7ei8_v_i8mf4(__VA_ARGS__)

◆ vsoxseg7ei8_v_i8mf4_m

#define vsoxseg7ei8_v_i8mf4_m ( ... ) __riscv_vsoxseg7ei8_v_i8mf4_m(__VA_ARGS__)

◆ vsoxseg7ei8_v_i8mf8

#define vsoxseg7ei8_v_i8mf8 ( ... ) __riscv_vsoxseg7ei8_v_i8mf8(__VA_ARGS__)

◆ vsoxseg7ei8_v_i8mf8_m

#define vsoxseg7ei8_v_i8mf8_m ( ... ) __riscv_vsoxseg7ei8_v_i8mf8_m(__VA_ARGS__)

◆ vsoxseg7ei8_v_u16m1

#define vsoxseg7ei8_v_u16m1 ( ... ) __riscv_vsoxseg7ei8_v_u16m1(__VA_ARGS__)

◆ vsoxseg7ei8_v_u16m1_m

#define vsoxseg7ei8_v_u16m1_m ( ... ) __riscv_vsoxseg7ei8_v_u16m1_m(__VA_ARGS__)

◆ vsoxseg7ei8_v_u16mf2

#define vsoxseg7ei8_v_u16mf2 ( ... ) __riscv_vsoxseg7ei8_v_u16mf2(__VA_ARGS__)

◆ vsoxseg7ei8_v_u16mf2_m

#define vsoxseg7ei8_v_u16mf2_m ( ... ) __riscv_vsoxseg7ei8_v_u16mf2_m(__VA_ARGS__)

◆ vsoxseg7ei8_v_u16mf4

#define vsoxseg7ei8_v_u16mf4 ( ... ) __riscv_vsoxseg7ei8_v_u16mf4(__VA_ARGS__)

◆ vsoxseg7ei8_v_u16mf4_m

#define vsoxseg7ei8_v_u16mf4_m ( ... ) __riscv_vsoxseg7ei8_v_u16mf4_m(__VA_ARGS__)

◆ vsoxseg7ei8_v_u32m1

#define vsoxseg7ei8_v_u32m1 ( ... ) __riscv_vsoxseg7ei8_v_u32m1(__VA_ARGS__)

◆ vsoxseg7ei8_v_u32m1_m

#define vsoxseg7ei8_v_u32m1_m ( ... ) __riscv_vsoxseg7ei8_v_u32m1_m(__VA_ARGS__)

◆ vsoxseg7ei8_v_u32mf2

#define vsoxseg7ei8_v_u32mf2 ( ... ) __riscv_vsoxseg7ei8_v_u32mf2(__VA_ARGS__)

◆ vsoxseg7ei8_v_u32mf2_m

#define vsoxseg7ei8_v_u32mf2_m ( ... ) __riscv_vsoxseg7ei8_v_u32mf2_m(__VA_ARGS__)

◆ vsoxseg7ei8_v_u64m1

#define vsoxseg7ei8_v_u64m1 ( ... ) __riscv_vsoxseg7ei8_v_u64m1(__VA_ARGS__)

◆ vsoxseg7ei8_v_u64m1_m

#define vsoxseg7ei8_v_u64m1_m ( ... ) __riscv_vsoxseg7ei8_v_u64m1_m(__VA_ARGS__)

◆ vsoxseg7ei8_v_u8m1

#define vsoxseg7ei8_v_u8m1 ( ... ) __riscv_vsoxseg7ei8_v_u8m1(__VA_ARGS__)

◆ vsoxseg7ei8_v_u8m1_m

#define vsoxseg7ei8_v_u8m1_m ( ... ) __riscv_vsoxseg7ei8_v_u8m1_m(__VA_ARGS__)

◆ vsoxseg7ei8_v_u8mf2

#define vsoxseg7ei8_v_u8mf2 ( ... ) __riscv_vsoxseg7ei8_v_u8mf2(__VA_ARGS__)

◆ vsoxseg7ei8_v_u8mf2_m

#define vsoxseg7ei8_v_u8mf2_m ( ... ) __riscv_vsoxseg7ei8_v_u8mf2_m(__VA_ARGS__)

◆ vsoxseg7ei8_v_u8mf4

#define vsoxseg7ei8_v_u8mf4 ( ... ) __riscv_vsoxseg7ei8_v_u8mf4(__VA_ARGS__)

◆ vsoxseg7ei8_v_u8mf4_m

#define vsoxseg7ei8_v_u8mf4_m ( ... ) __riscv_vsoxseg7ei8_v_u8mf4_m(__VA_ARGS__)

◆ vsoxseg7ei8_v_u8mf8

#define vsoxseg7ei8_v_u8mf8 ( ... ) __riscv_vsoxseg7ei8_v_u8mf8(__VA_ARGS__)

◆ vsoxseg7ei8_v_u8mf8_m

#define vsoxseg7ei8_v_u8mf8_m ( ... ) __riscv_vsoxseg7ei8_v_u8mf8_m(__VA_ARGS__)

◆ vsoxseg8ei16_v_f16m1

#define vsoxseg8ei16_v_f16m1 ( ... ) __riscv_vsoxseg8ei16_v_f16m1(__VA_ARGS__)

◆ vsoxseg8ei16_v_f16m1_m

#define vsoxseg8ei16_v_f16m1_m ( ... ) __riscv_vsoxseg8ei16_v_f16m1_m(__VA_ARGS__)

◆ vsoxseg8ei16_v_f16mf2

#define vsoxseg8ei16_v_f16mf2 ( ... ) __riscv_vsoxseg8ei16_v_f16mf2(__VA_ARGS__)

◆ vsoxseg8ei16_v_f16mf2_m

#define vsoxseg8ei16_v_f16mf2_m ( ... ) __riscv_vsoxseg8ei16_v_f16mf2_m(__VA_ARGS__)

◆ vsoxseg8ei16_v_f16mf4

#define vsoxseg8ei16_v_f16mf4 ( ... ) __riscv_vsoxseg8ei16_v_f16mf4(__VA_ARGS__)

◆ vsoxseg8ei16_v_f16mf4_m

#define vsoxseg8ei16_v_f16mf4_m ( ... ) __riscv_vsoxseg8ei16_v_f16mf4_m(__VA_ARGS__)

◆ vsoxseg8ei16_v_f32m1

#define vsoxseg8ei16_v_f32m1 ( ... ) __riscv_vsoxseg8ei16_v_f32m1(__VA_ARGS__)

◆ vsoxseg8ei16_v_f32m1_m

#define vsoxseg8ei16_v_f32m1_m ( ... ) __riscv_vsoxseg8ei16_v_f32m1_m(__VA_ARGS__)

◆ vsoxseg8ei16_v_f32mf2

#define vsoxseg8ei16_v_f32mf2 ( ... ) __riscv_vsoxseg8ei16_v_f32mf2(__VA_ARGS__)

◆ vsoxseg8ei16_v_f32mf2_m

#define vsoxseg8ei16_v_f32mf2_m ( ... ) __riscv_vsoxseg8ei16_v_f32mf2_m(__VA_ARGS__)

◆ vsoxseg8ei16_v_f64m1

#define vsoxseg8ei16_v_f64m1 ( ... ) __riscv_vsoxseg8ei16_v_f64m1(__VA_ARGS__)

◆ vsoxseg8ei16_v_f64m1_m

#define vsoxseg8ei16_v_f64m1_m ( ... ) __riscv_vsoxseg8ei16_v_f64m1_m(__VA_ARGS__)

◆ vsoxseg8ei16_v_i16m1

#define vsoxseg8ei16_v_i16m1 ( ... ) __riscv_vsoxseg8ei16_v_i16m1(__VA_ARGS__)

◆ vsoxseg8ei16_v_i16m1_m

#define vsoxseg8ei16_v_i16m1_m ( ... ) __riscv_vsoxseg8ei16_v_i16m1_m(__VA_ARGS__)

◆ vsoxseg8ei16_v_i16mf2

#define vsoxseg8ei16_v_i16mf2 ( ... ) __riscv_vsoxseg8ei16_v_i16mf2(__VA_ARGS__)

◆ vsoxseg8ei16_v_i16mf2_m

#define vsoxseg8ei16_v_i16mf2_m ( ... ) __riscv_vsoxseg8ei16_v_i16mf2_m(__VA_ARGS__)

◆ vsoxseg8ei16_v_i16mf4

#define vsoxseg8ei16_v_i16mf4 ( ... ) __riscv_vsoxseg8ei16_v_i16mf4(__VA_ARGS__)

◆ vsoxseg8ei16_v_i16mf4_m

#define vsoxseg8ei16_v_i16mf4_m ( ... ) __riscv_vsoxseg8ei16_v_i16mf4_m(__VA_ARGS__)

◆ vsoxseg8ei16_v_i32m1

#define vsoxseg8ei16_v_i32m1 ( ... ) __riscv_vsoxseg8ei16_v_i32m1(__VA_ARGS__)

◆ vsoxseg8ei16_v_i32m1_m

#define vsoxseg8ei16_v_i32m1_m ( ... ) __riscv_vsoxseg8ei16_v_i32m1_m(__VA_ARGS__)

◆ vsoxseg8ei16_v_i32mf2

#define vsoxseg8ei16_v_i32mf2 ( ... ) __riscv_vsoxseg8ei16_v_i32mf2(__VA_ARGS__)

◆ vsoxseg8ei16_v_i32mf2_m

#define vsoxseg8ei16_v_i32mf2_m ( ... ) __riscv_vsoxseg8ei16_v_i32mf2_m(__VA_ARGS__)

◆ vsoxseg8ei16_v_i64m1

#define vsoxseg8ei16_v_i64m1 ( ... ) __riscv_vsoxseg8ei16_v_i64m1(__VA_ARGS__)

◆ vsoxseg8ei16_v_i64m1_m

#define vsoxseg8ei16_v_i64m1_m ( ... ) __riscv_vsoxseg8ei16_v_i64m1_m(__VA_ARGS__)

◆ vsoxseg8ei16_v_i8m1

#define vsoxseg8ei16_v_i8m1 ( ... ) __riscv_vsoxseg8ei16_v_i8m1(__VA_ARGS__)

◆ vsoxseg8ei16_v_i8m1_m

#define vsoxseg8ei16_v_i8m1_m ( ... ) __riscv_vsoxseg8ei16_v_i8m1_m(__VA_ARGS__)

◆ vsoxseg8ei16_v_i8mf2

#define vsoxseg8ei16_v_i8mf2 ( ... ) __riscv_vsoxseg8ei16_v_i8mf2(__VA_ARGS__)

◆ vsoxseg8ei16_v_i8mf2_m

#define vsoxseg8ei16_v_i8mf2_m ( ... ) __riscv_vsoxseg8ei16_v_i8mf2_m(__VA_ARGS__)

◆ vsoxseg8ei16_v_i8mf4

#define vsoxseg8ei16_v_i8mf4 ( ... ) __riscv_vsoxseg8ei16_v_i8mf4(__VA_ARGS__)

◆ vsoxseg8ei16_v_i8mf4_m

#define vsoxseg8ei16_v_i8mf4_m ( ... ) __riscv_vsoxseg8ei16_v_i8mf4_m(__VA_ARGS__)

◆ vsoxseg8ei16_v_i8mf8

#define vsoxseg8ei16_v_i8mf8 ( ... ) __riscv_vsoxseg8ei16_v_i8mf8(__VA_ARGS__)

◆ vsoxseg8ei16_v_i8mf8_m

#define vsoxseg8ei16_v_i8mf8_m ( ... ) __riscv_vsoxseg8ei16_v_i8mf8_m(__VA_ARGS__)

◆ vsoxseg8ei16_v_u16m1

#define vsoxseg8ei16_v_u16m1 ( ... ) __riscv_vsoxseg8ei16_v_u16m1(__VA_ARGS__)

◆ vsoxseg8ei16_v_u16m1_m

#define vsoxseg8ei16_v_u16m1_m ( ... ) __riscv_vsoxseg8ei16_v_u16m1_m(__VA_ARGS__)

◆ vsoxseg8ei16_v_u16mf2

#define vsoxseg8ei16_v_u16mf2 ( ... ) __riscv_vsoxseg8ei16_v_u16mf2(__VA_ARGS__)

◆ vsoxseg8ei16_v_u16mf2_m

#define vsoxseg8ei16_v_u16mf2_m ( ... ) __riscv_vsoxseg8ei16_v_u16mf2_m(__VA_ARGS__)

◆ vsoxseg8ei16_v_u16mf4

#define vsoxseg8ei16_v_u16mf4 ( ... ) __riscv_vsoxseg8ei16_v_u16mf4(__VA_ARGS__)

◆ vsoxseg8ei16_v_u16mf4_m

#define vsoxseg8ei16_v_u16mf4_m ( ... ) __riscv_vsoxseg8ei16_v_u16mf4_m(__VA_ARGS__)

◆ vsoxseg8ei16_v_u32m1

#define vsoxseg8ei16_v_u32m1 ( ... ) __riscv_vsoxseg8ei16_v_u32m1(__VA_ARGS__)

◆ vsoxseg8ei16_v_u32m1_m

#define vsoxseg8ei16_v_u32m1_m ( ... ) __riscv_vsoxseg8ei16_v_u32m1_m(__VA_ARGS__)

◆ vsoxseg8ei16_v_u32mf2

#define vsoxseg8ei16_v_u32mf2 ( ... ) __riscv_vsoxseg8ei16_v_u32mf2(__VA_ARGS__)

◆ vsoxseg8ei16_v_u32mf2_m

#define vsoxseg8ei16_v_u32mf2_m ( ... ) __riscv_vsoxseg8ei16_v_u32mf2_m(__VA_ARGS__)

◆ vsoxseg8ei16_v_u64m1

#define vsoxseg8ei16_v_u64m1 ( ... ) __riscv_vsoxseg8ei16_v_u64m1(__VA_ARGS__)

◆ vsoxseg8ei16_v_u64m1_m

#define vsoxseg8ei16_v_u64m1_m ( ... ) __riscv_vsoxseg8ei16_v_u64m1_m(__VA_ARGS__)

◆ vsoxseg8ei16_v_u8m1

#define vsoxseg8ei16_v_u8m1 ( ... ) __riscv_vsoxseg8ei16_v_u8m1(__VA_ARGS__)

◆ vsoxseg8ei16_v_u8m1_m

#define vsoxseg8ei16_v_u8m1_m ( ... ) __riscv_vsoxseg8ei16_v_u8m1_m(__VA_ARGS__)

◆ vsoxseg8ei16_v_u8mf2

#define vsoxseg8ei16_v_u8mf2 ( ... ) __riscv_vsoxseg8ei16_v_u8mf2(__VA_ARGS__)

◆ vsoxseg8ei16_v_u8mf2_m

#define vsoxseg8ei16_v_u8mf2_m ( ... ) __riscv_vsoxseg8ei16_v_u8mf2_m(__VA_ARGS__)

◆ vsoxseg8ei16_v_u8mf4

#define vsoxseg8ei16_v_u8mf4 ( ... ) __riscv_vsoxseg8ei16_v_u8mf4(__VA_ARGS__)

◆ vsoxseg8ei16_v_u8mf4_m

#define vsoxseg8ei16_v_u8mf4_m ( ... ) __riscv_vsoxseg8ei16_v_u8mf4_m(__VA_ARGS__)

◆ vsoxseg8ei16_v_u8mf8

#define vsoxseg8ei16_v_u8mf8 ( ... ) __riscv_vsoxseg8ei16_v_u8mf8(__VA_ARGS__)

◆ vsoxseg8ei16_v_u8mf8_m

#define vsoxseg8ei16_v_u8mf8_m ( ... ) __riscv_vsoxseg8ei16_v_u8mf8_m(__VA_ARGS__)

◆ vsoxseg8ei32_v_f16m1

#define vsoxseg8ei32_v_f16m1 ( ... ) __riscv_vsoxseg8ei32_v_f16m1(__VA_ARGS__)

◆ vsoxseg8ei32_v_f16m1_m

#define vsoxseg8ei32_v_f16m1_m ( ... ) __riscv_vsoxseg8ei32_v_f16m1_m(__VA_ARGS__)

◆ vsoxseg8ei32_v_f16mf2

#define vsoxseg8ei32_v_f16mf2 ( ... ) __riscv_vsoxseg8ei32_v_f16mf2(__VA_ARGS__)

◆ vsoxseg8ei32_v_f16mf2_m

#define vsoxseg8ei32_v_f16mf2_m ( ... ) __riscv_vsoxseg8ei32_v_f16mf2_m(__VA_ARGS__)

◆ vsoxseg8ei32_v_f16mf4

#define vsoxseg8ei32_v_f16mf4 ( ... ) __riscv_vsoxseg8ei32_v_f16mf4(__VA_ARGS__)

◆ vsoxseg8ei32_v_f16mf4_m

#define vsoxseg8ei32_v_f16mf4_m ( ... ) __riscv_vsoxseg8ei32_v_f16mf4_m(__VA_ARGS__)

◆ vsoxseg8ei32_v_f32m1

#define vsoxseg8ei32_v_f32m1 ( ... ) __riscv_vsoxseg8ei32_v_f32m1(__VA_ARGS__)

◆ vsoxseg8ei32_v_f32m1_m

#define vsoxseg8ei32_v_f32m1_m ( ... ) __riscv_vsoxseg8ei32_v_f32m1_m(__VA_ARGS__)

◆ vsoxseg8ei32_v_f32mf2

#define vsoxseg8ei32_v_f32mf2 ( ... ) __riscv_vsoxseg8ei32_v_f32mf2(__VA_ARGS__)

◆ vsoxseg8ei32_v_f32mf2_m

#define vsoxseg8ei32_v_f32mf2_m ( ... ) __riscv_vsoxseg8ei32_v_f32mf2_m(__VA_ARGS__)

◆ vsoxseg8ei32_v_f64m1

#define vsoxseg8ei32_v_f64m1 ( ... ) __riscv_vsoxseg8ei32_v_f64m1(__VA_ARGS__)

◆ vsoxseg8ei32_v_f64m1_m

#define vsoxseg8ei32_v_f64m1_m ( ... ) __riscv_vsoxseg8ei32_v_f64m1_m(__VA_ARGS__)

◆ vsoxseg8ei32_v_i16m1

#define vsoxseg8ei32_v_i16m1 ( ... ) __riscv_vsoxseg8ei32_v_i16m1(__VA_ARGS__)

◆ vsoxseg8ei32_v_i16m1_m

#define vsoxseg8ei32_v_i16m1_m ( ... ) __riscv_vsoxseg8ei32_v_i16m1_m(__VA_ARGS__)

◆ vsoxseg8ei32_v_i16mf2

#define vsoxseg8ei32_v_i16mf2 ( ... ) __riscv_vsoxseg8ei32_v_i16mf2(__VA_ARGS__)

◆ vsoxseg8ei32_v_i16mf2_m

#define vsoxseg8ei32_v_i16mf2_m ( ... ) __riscv_vsoxseg8ei32_v_i16mf2_m(__VA_ARGS__)

◆ vsoxseg8ei32_v_i16mf4

#define vsoxseg8ei32_v_i16mf4 ( ... ) __riscv_vsoxseg8ei32_v_i16mf4(__VA_ARGS__)

◆ vsoxseg8ei32_v_i16mf4_m

#define vsoxseg8ei32_v_i16mf4_m ( ... ) __riscv_vsoxseg8ei32_v_i16mf4_m(__VA_ARGS__)

◆ vsoxseg8ei32_v_i32m1

#define vsoxseg8ei32_v_i32m1 ( ... ) __riscv_vsoxseg8ei32_v_i32m1(__VA_ARGS__)

◆ vsoxseg8ei32_v_i32m1_m

#define vsoxseg8ei32_v_i32m1_m ( ... ) __riscv_vsoxseg8ei32_v_i32m1_m(__VA_ARGS__)

◆ vsoxseg8ei32_v_i32mf2

#define vsoxseg8ei32_v_i32mf2 ( ... ) __riscv_vsoxseg8ei32_v_i32mf2(__VA_ARGS__)

◆ vsoxseg8ei32_v_i32mf2_m

#define vsoxseg8ei32_v_i32mf2_m ( ... ) __riscv_vsoxseg8ei32_v_i32mf2_m(__VA_ARGS__)

◆ vsoxseg8ei32_v_i64m1

#define vsoxseg8ei32_v_i64m1 ( ... ) __riscv_vsoxseg8ei32_v_i64m1(__VA_ARGS__)

◆ vsoxseg8ei32_v_i64m1_m

#define vsoxseg8ei32_v_i64m1_m ( ... ) __riscv_vsoxseg8ei32_v_i64m1_m(__VA_ARGS__)

◆ vsoxseg8ei32_v_i8m1

#define vsoxseg8ei32_v_i8m1 ( ... ) __riscv_vsoxseg8ei32_v_i8m1(__VA_ARGS__)

◆ vsoxseg8ei32_v_i8m1_m

#define vsoxseg8ei32_v_i8m1_m ( ... ) __riscv_vsoxseg8ei32_v_i8m1_m(__VA_ARGS__)

◆ vsoxseg8ei32_v_i8mf2

#define vsoxseg8ei32_v_i8mf2 ( ... ) __riscv_vsoxseg8ei32_v_i8mf2(__VA_ARGS__)

◆ vsoxseg8ei32_v_i8mf2_m

#define vsoxseg8ei32_v_i8mf2_m ( ... ) __riscv_vsoxseg8ei32_v_i8mf2_m(__VA_ARGS__)

◆ vsoxseg8ei32_v_i8mf4

#define vsoxseg8ei32_v_i8mf4 ( ... ) __riscv_vsoxseg8ei32_v_i8mf4(__VA_ARGS__)

◆ vsoxseg8ei32_v_i8mf4_m

#define vsoxseg8ei32_v_i8mf4_m ( ... ) __riscv_vsoxseg8ei32_v_i8mf4_m(__VA_ARGS__)

◆ vsoxseg8ei32_v_i8mf8

#define vsoxseg8ei32_v_i8mf8 ( ... ) __riscv_vsoxseg8ei32_v_i8mf8(__VA_ARGS__)

◆ vsoxseg8ei32_v_i8mf8_m

#define vsoxseg8ei32_v_i8mf8_m ( ... ) __riscv_vsoxseg8ei32_v_i8mf8_m(__VA_ARGS__)

◆ vsoxseg8ei32_v_u16m1

#define vsoxseg8ei32_v_u16m1 ( ... ) __riscv_vsoxseg8ei32_v_u16m1(__VA_ARGS__)

◆ vsoxseg8ei32_v_u16m1_m

#define vsoxseg8ei32_v_u16m1_m ( ... ) __riscv_vsoxseg8ei32_v_u16m1_m(__VA_ARGS__)

◆ vsoxseg8ei32_v_u16mf2

#define vsoxseg8ei32_v_u16mf2 ( ... ) __riscv_vsoxseg8ei32_v_u16mf2(__VA_ARGS__)

◆ vsoxseg8ei32_v_u16mf2_m

#define vsoxseg8ei32_v_u16mf2_m ( ... ) __riscv_vsoxseg8ei32_v_u16mf2_m(__VA_ARGS__)

◆ vsoxseg8ei32_v_u16mf4

#define vsoxseg8ei32_v_u16mf4 ( ... ) __riscv_vsoxseg8ei32_v_u16mf4(__VA_ARGS__)

◆ vsoxseg8ei32_v_u16mf4_m

#define vsoxseg8ei32_v_u16mf4_m ( ... ) __riscv_vsoxseg8ei32_v_u16mf4_m(__VA_ARGS__)

◆ vsoxseg8ei32_v_u32m1

#define vsoxseg8ei32_v_u32m1 ( ... ) __riscv_vsoxseg8ei32_v_u32m1(__VA_ARGS__)

◆ vsoxseg8ei32_v_u32m1_m

#define vsoxseg8ei32_v_u32m1_m ( ... ) __riscv_vsoxseg8ei32_v_u32m1_m(__VA_ARGS__)

◆ vsoxseg8ei32_v_u32mf2

#define vsoxseg8ei32_v_u32mf2 ( ... ) __riscv_vsoxseg8ei32_v_u32mf2(__VA_ARGS__)

◆ vsoxseg8ei32_v_u32mf2_m

#define vsoxseg8ei32_v_u32mf2_m ( ... ) __riscv_vsoxseg8ei32_v_u32mf2_m(__VA_ARGS__)

◆ vsoxseg8ei32_v_u64m1

#define vsoxseg8ei32_v_u64m1 ( ... ) __riscv_vsoxseg8ei32_v_u64m1(__VA_ARGS__)

◆ vsoxseg8ei32_v_u64m1_m

#define vsoxseg8ei32_v_u64m1_m ( ... ) __riscv_vsoxseg8ei32_v_u64m1_m(__VA_ARGS__)

◆ vsoxseg8ei32_v_u8m1

#define vsoxseg8ei32_v_u8m1 ( ... ) __riscv_vsoxseg8ei32_v_u8m1(__VA_ARGS__)

◆ vsoxseg8ei32_v_u8m1_m

#define vsoxseg8ei32_v_u8m1_m ( ... ) __riscv_vsoxseg8ei32_v_u8m1_m(__VA_ARGS__)

◆ vsoxseg8ei32_v_u8mf2

#define vsoxseg8ei32_v_u8mf2 ( ... ) __riscv_vsoxseg8ei32_v_u8mf2(__VA_ARGS__)

◆ vsoxseg8ei32_v_u8mf2_m

#define vsoxseg8ei32_v_u8mf2_m ( ... ) __riscv_vsoxseg8ei32_v_u8mf2_m(__VA_ARGS__)

◆ vsoxseg8ei32_v_u8mf4

#define vsoxseg8ei32_v_u8mf4 ( ... ) __riscv_vsoxseg8ei32_v_u8mf4(__VA_ARGS__)

◆ vsoxseg8ei32_v_u8mf4_m

#define vsoxseg8ei32_v_u8mf4_m ( ... ) __riscv_vsoxseg8ei32_v_u8mf4_m(__VA_ARGS__)

◆ vsoxseg8ei32_v_u8mf8

#define vsoxseg8ei32_v_u8mf8 ( ... ) __riscv_vsoxseg8ei32_v_u8mf8(__VA_ARGS__)

◆ vsoxseg8ei32_v_u8mf8_m

#define vsoxseg8ei32_v_u8mf8_m ( ... ) __riscv_vsoxseg8ei32_v_u8mf8_m(__VA_ARGS__)

◆ vsoxseg8ei64_v_f16m1

#define vsoxseg8ei64_v_f16m1 ( ... ) __riscv_vsoxseg8ei64_v_f16m1(__VA_ARGS__)

◆ vsoxseg8ei64_v_f16m1_m

#define vsoxseg8ei64_v_f16m1_m ( ... ) __riscv_vsoxseg8ei64_v_f16m1_m(__VA_ARGS__)

◆ vsoxseg8ei64_v_f16mf2

#define vsoxseg8ei64_v_f16mf2 ( ... ) __riscv_vsoxseg8ei64_v_f16mf2(__VA_ARGS__)

◆ vsoxseg8ei64_v_f16mf2_m

#define vsoxseg8ei64_v_f16mf2_m ( ... ) __riscv_vsoxseg8ei64_v_f16mf2_m(__VA_ARGS__)

◆ vsoxseg8ei64_v_f16mf4

#define vsoxseg8ei64_v_f16mf4 ( ... ) __riscv_vsoxseg8ei64_v_f16mf4(__VA_ARGS__)

◆ vsoxseg8ei64_v_f16mf4_m

#define vsoxseg8ei64_v_f16mf4_m ( ... ) __riscv_vsoxseg8ei64_v_f16mf4_m(__VA_ARGS__)

◆ vsoxseg8ei64_v_f32m1

#define vsoxseg8ei64_v_f32m1 ( ... ) __riscv_vsoxseg8ei64_v_f32m1(__VA_ARGS__)

◆ vsoxseg8ei64_v_f32m1_m

#define vsoxseg8ei64_v_f32m1_m ( ... ) __riscv_vsoxseg8ei64_v_f32m1_m(__VA_ARGS__)

◆ vsoxseg8ei64_v_f32mf2

#define vsoxseg8ei64_v_f32mf2 ( ... ) __riscv_vsoxseg8ei64_v_f32mf2(__VA_ARGS__)

◆ vsoxseg8ei64_v_f32mf2_m

#define vsoxseg8ei64_v_f32mf2_m ( ... ) __riscv_vsoxseg8ei64_v_f32mf2_m(__VA_ARGS__)

◆ vsoxseg8ei64_v_f64m1

#define vsoxseg8ei64_v_f64m1 ( ... ) __riscv_vsoxseg8ei64_v_f64m1(__VA_ARGS__)

◆ vsoxseg8ei64_v_f64m1_m

#define vsoxseg8ei64_v_f64m1_m ( ... ) __riscv_vsoxseg8ei64_v_f64m1_m(__VA_ARGS__)

◆ vsoxseg8ei64_v_i16m1

#define vsoxseg8ei64_v_i16m1 ( ... ) __riscv_vsoxseg8ei64_v_i16m1(__VA_ARGS__)

◆ vsoxseg8ei64_v_i16m1_m

#define vsoxseg8ei64_v_i16m1_m ( ... ) __riscv_vsoxseg8ei64_v_i16m1_m(__VA_ARGS__)

◆ vsoxseg8ei64_v_i16mf2

#define vsoxseg8ei64_v_i16mf2 ( ... ) __riscv_vsoxseg8ei64_v_i16mf2(__VA_ARGS__)

◆ vsoxseg8ei64_v_i16mf2_m

#define vsoxseg8ei64_v_i16mf2_m ( ... ) __riscv_vsoxseg8ei64_v_i16mf2_m(__VA_ARGS__)

◆ vsoxseg8ei64_v_i16mf4

#define vsoxseg8ei64_v_i16mf4 ( ... ) __riscv_vsoxseg8ei64_v_i16mf4(__VA_ARGS__)

◆ vsoxseg8ei64_v_i16mf4_m

#define vsoxseg8ei64_v_i16mf4_m ( ... ) __riscv_vsoxseg8ei64_v_i16mf4_m(__VA_ARGS__)

◆ vsoxseg8ei64_v_i32m1

#define vsoxseg8ei64_v_i32m1 ( ... ) __riscv_vsoxseg8ei64_v_i32m1(__VA_ARGS__)

◆ vsoxseg8ei64_v_i32m1_m

#define vsoxseg8ei64_v_i32m1_m ( ... ) __riscv_vsoxseg8ei64_v_i32m1_m(__VA_ARGS__)

◆ vsoxseg8ei64_v_i32mf2

#define vsoxseg8ei64_v_i32mf2 ( ... ) __riscv_vsoxseg8ei64_v_i32mf2(__VA_ARGS__)

◆ vsoxseg8ei64_v_i32mf2_m

#define vsoxseg8ei64_v_i32mf2_m ( ... ) __riscv_vsoxseg8ei64_v_i32mf2_m(__VA_ARGS__)

◆ vsoxseg8ei64_v_i64m1

#define vsoxseg8ei64_v_i64m1 ( ... ) __riscv_vsoxseg8ei64_v_i64m1(__VA_ARGS__)

◆ vsoxseg8ei64_v_i64m1_m

#define vsoxseg8ei64_v_i64m1_m ( ... ) __riscv_vsoxseg8ei64_v_i64m1_m(__VA_ARGS__)

◆ vsoxseg8ei64_v_i8m1

#define vsoxseg8ei64_v_i8m1 ( ... ) __riscv_vsoxseg8ei64_v_i8m1(__VA_ARGS__)

◆ vsoxseg8ei64_v_i8m1_m

#define vsoxseg8ei64_v_i8m1_m ( ... ) __riscv_vsoxseg8ei64_v_i8m1_m(__VA_ARGS__)

◆ vsoxseg8ei64_v_i8mf2

#define vsoxseg8ei64_v_i8mf2 ( ... ) __riscv_vsoxseg8ei64_v_i8mf2(__VA_ARGS__)

◆ vsoxseg8ei64_v_i8mf2_m

#define vsoxseg8ei64_v_i8mf2_m ( ... ) __riscv_vsoxseg8ei64_v_i8mf2_m(__VA_ARGS__)

◆ vsoxseg8ei64_v_i8mf4

#define vsoxseg8ei64_v_i8mf4 ( ... ) __riscv_vsoxseg8ei64_v_i8mf4(__VA_ARGS__)

◆ vsoxseg8ei64_v_i8mf4_m

#define vsoxseg8ei64_v_i8mf4_m ( ... ) __riscv_vsoxseg8ei64_v_i8mf4_m(__VA_ARGS__)

◆ vsoxseg8ei64_v_i8mf8

#define vsoxseg8ei64_v_i8mf8 ( ... ) __riscv_vsoxseg8ei64_v_i8mf8(__VA_ARGS__)

◆ vsoxseg8ei64_v_i8mf8_m

#define vsoxseg8ei64_v_i8mf8_m ( ... ) __riscv_vsoxseg8ei64_v_i8mf8_m(__VA_ARGS__)

◆ vsoxseg8ei64_v_u16m1

#define vsoxseg8ei64_v_u16m1 ( ... ) __riscv_vsoxseg8ei64_v_u16m1(__VA_ARGS__)

◆ vsoxseg8ei64_v_u16m1_m

#define vsoxseg8ei64_v_u16m1_m ( ... ) __riscv_vsoxseg8ei64_v_u16m1_m(__VA_ARGS__)

◆ vsoxseg8ei64_v_u16mf2

#define vsoxseg8ei64_v_u16mf2 ( ... ) __riscv_vsoxseg8ei64_v_u16mf2(__VA_ARGS__)

◆ vsoxseg8ei64_v_u16mf2_m

#define vsoxseg8ei64_v_u16mf2_m ( ... ) __riscv_vsoxseg8ei64_v_u16mf2_m(__VA_ARGS__)

◆ vsoxseg8ei64_v_u16mf4

#define vsoxseg8ei64_v_u16mf4 ( ... ) __riscv_vsoxseg8ei64_v_u16mf4(__VA_ARGS__)

◆ vsoxseg8ei64_v_u16mf4_m

#define vsoxseg8ei64_v_u16mf4_m ( ... ) __riscv_vsoxseg8ei64_v_u16mf4_m(__VA_ARGS__)

◆ vsoxseg8ei64_v_u32m1

#define vsoxseg8ei64_v_u32m1 ( ... ) __riscv_vsoxseg8ei64_v_u32m1(__VA_ARGS__)

◆ vsoxseg8ei64_v_u32m1_m

#define vsoxseg8ei64_v_u32m1_m ( ... ) __riscv_vsoxseg8ei64_v_u32m1_m(__VA_ARGS__)

◆ vsoxseg8ei64_v_u32mf2

#define vsoxseg8ei64_v_u32mf2 ( ... ) __riscv_vsoxseg8ei64_v_u32mf2(__VA_ARGS__)

◆ vsoxseg8ei64_v_u32mf2_m

#define vsoxseg8ei64_v_u32mf2_m ( ... ) __riscv_vsoxseg8ei64_v_u32mf2_m(__VA_ARGS__)

◆ vsoxseg8ei64_v_u64m1

#define vsoxseg8ei64_v_u64m1 ( ... ) __riscv_vsoxseg8ei64_v_u64m1(__VA_ARGS__)

◆ vsoxseg8ei64_v_u64m1_m

#define vsoxseg8ei64_v_u64m1_m ( ... ) __riscv_vsoxseg8ei64_v_u64m1_m(__VA_ARGS__)

◆ vsoxseg8ei64_v_u8m1

#define vsoxseg8ei64_v_u8m1 ( ... ) __riscv_vsoxseg8ei64_v_u8m1(__VA_ARGS__)

◆ vsoxseg8ei64_v_u8m1_m

#define vsoxseg8ei64_v_u8m1_m ( ... ) __riscv_vsoxseg8ei64_v_u8m1_m(__VA_ARGS__)

◆ vsoxseg8ei64_v_u8mf2

#define vsoxseg8ei64_v_u8mf2 ( ... ) __riscv_vsoxseg8ei64_v_u8mf2(__VA_ARGS__)

◆ vsoxseg8ei64_v_u8mf2_m

#define vsoxseg8ei64_v_u8mf2_m ( ... ) __riscv_vsoxseg8ei64_v_u8mf2_m(__VA_ARGS__)

◆ vsoxseg8ei64_v_u8mf4

#define vsoxseg8ei64_v_u8mf4 ( ... ) __riscv_vsoxseg8ei64_v_u8mf4(__VA_ARGS__)

◆ vsoxseg8ei64_v_u8mf4_m

#define vsoxseg8ei64_v_u8mf4_m ( ... ) __riscv_vsoxseg8ei64_v_u8mf4_m(__VA_ARGS__)

◆ vsoxseg8ei64_v_u8mf8

#define vsoxseg8ei64_v_u8mf8 ( ... ) __riscv_vsoxseg8ei64_v_u8mf8(__VA_ARGS__)

◆ vsoxseg8ei64_v_u8mf8_m

#define vsoxseg8ei64_v_u8mf8_m ( ... ) __riscv_vsoxseg8ei64_v_u8mf8_m(__VA_ARGS__)

◆ vsoxseg8ei8_v_f16m1

#define vsoxseg8ei8_v_f16m1 ( ... ) __riscv_vsoxseg8ei8_v_f16m1(__VA_ARGS__)

◆ vsoxseg8ei8_v_f16m1_m

#define vsoxseg8ei8_v_f16m1_m ( ... ) __riscv_vsoxseg8ei8_v_f16m1_m(__VA_ARGS__)

◆ vsoxseg8ei8_v_f16mf2

#define vsoxseg8ei8_v_f16mf2 ( ... ) __riscv_vsoxseg8ei8_v_f16mf2(__VA_ARGS__)

◆ vsoxseg8ei8_v_f16mf2_m

#define vsoxseg8ei8_v_f16mf2_m ( ... ) __riscv_vsoxseg8ei8_v_f16mf2_m(__VA_ARGS__)

◆ vsoxseg8ei8_v_f16mf4

#define vsoxseg8ei8_v_f16mf4 ( ... ) __riscv_vsoxseg8ei8_v_f16mf4(__VA_ARGS__)

◆ vsoxseg8ei8_v_f16mf4_m

#define vsoxseg8ei8_v_f16mf4_m ( ... ) __riscv_vsoxseg8ei8_v_f16mf4_m(__VA_ARGS__)

◆ vsoxseg8ei8_v_f32m1

#define vsoxseg8ei8_v_f32m1 ( ... ) __riscv_vsoxseg8ei8_v_f32m1(__VA_ARGS__)

◆ vsoxseg8ei8_v_f32m1_m

#define vsoxseg8ei8_v_f32m1_m ( ... ) __riscv_vsoxseg8ei8_v_f32m1_m(__VA_ARGS__)

◆ vsoxseg8ei8_v_f32mf2

#define vsoxseg8ei8_v_f32mf2 ( ... ) __riscv_vsoxseg8ei8_v_f32mf2(__VA_ARGS__)

◆ vsoxseg8ei8_v_f32mf2_m

#define vsoxseg8ei8_v_f32mf2_m ( ... ) __riscv_vsoxseg8ei8_v_f32mf2_m(__VA_ARGS__)

◆ vsoxseg8ei8_v_f64m1

#define vsoxseg8ei8_v_f64m1 ( ... ) __riscv_vsoxseg8ei8_v_f64m1(__VA_ARGS__)

◆ vsoxseg8ei8_v_f64m1_m

#define vsoxseg8ei8_v_f64m1_m ( ... ) __riscv_vsoxseg8ei8_v_f64m1_m(__VA_ARGS__)

◆ vsoxseg8ei8_v_i16m1

#define vsoxseg8ei8_v_i16m1 ( ... ) __riscv_vsoxseg8ei8_v_i16m1(__VA_ARGS__)

◆ vsoxseg8ei8_v_i16m1_m

#define vsoxseg8ei8_v_i16m1_m ( ... ) __riscv_vsoxseg8ei8_v_i16m1_m(__VA_ARGS__)

◆ vsoxseg8ei8_v_i16mf2

#define vsoxseg8ei8_v_i16mf2 ( ... ) __riscv_vsoxseg8ei8_v_i16mf2(__VA_ARGS__)

◆ vsoxseg8ei8_v_i16mf2_m

#define vsoxseg8ei8_v_i16mf2_m ( ... ) __riscv_vsoxseg8ei8_v_i16mf2_m(__VA_ARGS__)

◆ vsoxseg8ei8_v_i16mf4

#define vsoxseg8ei8_v_i16mf4 ( ... ) __riscv_vsoxseg8ei8_v_i16mf4(__VA_ARGS__)

◆ vsoxseg8ei8_v_i16mf4_m

#define vsoxseg8ei8_v_i16mf4_m ( ... ) __riscv_vsoxseg8ei8_v_i16mf4_m(__VA_ARGS__)

◆ vsoxseg8ei8_v_i32m1

#define vsoxseg8ei8_v_i32m1 ( ... ) __riscv_vsoxseg8ei8_v_i32m1(__VA_ARGS__)

◆ vsoxseg8ei8_v_i32m1_m

#define vsoxseg8ei8_v_i32m1_m ( ... ) __riscv_vsoxseg8ei8_v_i32m1_m(__VA_ARGS__)

◆ vsoxseg8ei8_v_i32mf2

#define vsoxseg8ei8_v_i32mf2 ( ... ) __riscv_vsoxseg8ei8_v_i32mf2(__VA_ARGS__)

◆ vsoxseg8ei8_v_i32mf2_m

#define vsoxseg8ei8_v_i32mf2_m ( ... ) __riscv_vsoxseg8ei8_v_i32mf2_m(__VA_ARGS__)

◆ vsoxseg8ei8_v_i64m1

#define vsoxseg8ei8_v_i64m1 ( ... ) __riscv_vsoxseg8ei8_v_i64m1(__VA_ARGS__)

◆ vsoxseg8ei8_v_i64m1_m

#define vsoxseg8ei8_v_i64m1_m ( ... ) __riscv_vsoxseg8ei8_v_i64m1_m(__VA_ARGS__)

◆ vsoxseg8ei8_v_i8m1

#define vsoxseg8ei8_v_i8m1 ( ... ) __riscv_vsoxseg8ei8_v_i8m1(__VA_ARGS__)

◆ vsoxseg8ei8_v_i8m1_m

#define vsoxseg8ei8_v_i8m1_m ( ... ) __riscv_vsoxseg8ei8_v_i8m1_m(__VA_ARGS__)

◆ vsoxseg8ei8_v_i8mf2

#define vsoxseg8ei8_v_i8mf2 ( ... ) __riscv_vsoxseg8ei8_v_i8mf2(__VA_ARGS__)

◆ vsoxseg8ei8_v_i8mf2_m

#define vsoxseg8ei8_v_i8mf2_m ( ... ) __riscv_vsoxseg8ei8_v_i8mf2_m(__VA_ARGS__)

◆ vsoxseg8ei8_v_i8mf4

#define vsoxseg8ei8_v_i8mf4 ( ... ) __riscv_vsoxseg8ei8_v_i8mf4(__VA_ARGS__)

◆ vsoxseg8ei8_v_i8mf4_m

#define vsoxseg8ei8_v_i8mf4_m ( ... ) __riscv_vsoxseg8ei8_v_i8mf4_m(__VA_ARGS__)

◆ vsoxseg8ei8_v_i8mf8

#define vsoxseg8ei8_v_i8mf8 ( ... ) __riscv_vsoxseg8ei8_v_i8mf8(__VA_ARGS__)

◆ vsoxseg8ei8_v_i8mf8_m

#define vsoxseg8ei8_v_i8mf8_m ( ... ) __riscv_vsoxseg8ei8_v_i8mf8_m(__VA_ARGS__)

◆ vsoxseg8ei8_v_u16m1

#define vsoxseg8ei8_v_u16m1 ( ... ) __riscv_vsoxseg8ei8_v_u16m1(__VA_ARGS__)

◆ vsoxseg8ei8_v_u16m1_m

#define vsoxseg8ei8_v_u16m1_m ( ... ) __riscv_vsoxseg8ei8_v_u16m1_m(__VA_ARGS__)

◆ vsoxseg8ei8_v_u16mf2

#define vsoxseg8ei8_v_u16mf2 ( ... ) __riscv_vsoxseg8ei8_v_u16mf2(__VA_ARGS__)

◆ vsoxseg8ei8_v_u16mf2_m

#define vsoxseg8ei8_v_u16mf2_m ( ... ) __riscv_vsoxseg8ei8_v_u16mf2_m(__VA_ARGS__)

◆ vsoxseg8ei8_v_u16mf4

#define vsoxseg8ei8_v_u16mf4 ( ... ) __riscv_vsoxseg8ei8_v_u16mf4(__VA_ARGS__)

◆ vsoxseg8ei8_v_u16mf4_m

#define vsoxseg8ei8_v_u16mf4_m ( ... ) __riscv_vsoxseg8ei8_v_u16mf4_m(__VA_ARGS__)

◆ vsoxseg8ei8_v_u32m1

#define vsoxseg8ei8_v_u32m1 ( ... ) __riscv_vsoxseg8ei8_v_u32m1(__VA_ARGS__)

◆ vsoxseg8ei8_v_u32m1_m

#define vsoxseg8ei8_v_u32m1_m ( ... ) __riscv_vsoxseg8ei8_v_u32m1_m(__VA_ARGS__)

◆ vsoxseg8ei8_v_u32mf2

#define vsoxseg8ei8_v_u32mf2 ( ... ) __riscv_vsoxseg8ei8_v_u32mf2(__VA_ARGS__)

◆ vsoxseg8ei8_v_u32mf2_m

#define vsoxseg8ei8_v_u32mf2_m ( ... ) __riscv_vsoxseg8ei8_v_u32mf2_m(__VA_ARGS__)

◆ vsoxseg8ei8_v_u64m1

#define vsoxseg8ei8_v_u64m1 ( ... ) __riscv_vsoxseg8ei8_v_u64m1(__VA_ARGS__)

◆ vsoxseg8ei8_v_u64m1_m

#define vsoxseg8ei8_v_u64m1_m ( ... ) __riscv_vsoxseg8ei8_v_u64m1_m(__VA_ARGS__)

◆ vsoxseg8ei8_v_u8m1

#define vsoxseg8ei8_v_u8m1 ( ... ) __riscv_vsoxseg8ei8_v_u8m1(__VA_ARGS__)

◆ vsoxseg8ei8_v_u8m1_m

#define vsoxseg8ei8_v_u8m1_m ( ... ) __riscv_vsoxseg8ei8_v_u8m1_m(__VA_ARGS__)

◆ vsoxseg8ei8_v_u8mf2

#define vsoxseg8ei8_v_u8mf2 ( ... ) __riscv_vsoxseg8ei8_v_u8mf2(__VA_ARGS__)

◆ vsoxseg8ei8_v_u8mf2_m

#define vsoxseg8ei8_v_u8mf2_m ( ... ) __riscv_vsoxseg8ei8_v_u8mf2_m(__VA_ARGS__)

◆ vsoxseg8ei8_v_u8mf4

#define vsoxseg8ei8_v_u8mf4 ( ... ) __riscv_vsoxseg8ei8_v_u8mf4(__VA_ARGS__)

◆ vsoxseg8ei8_v_u8mf4_m

#define vsoxseg8ei8_v_u8mf4_m ( ... ) __riscv_vsoxseg8ei8_v_u8mf4_m(__VA_ARGS__)

◆ vsoxseg8ei8_v_u8mf8

#define vsoxseg8ei8_v_u8mf8 ( ... ) __riscv_vsoxseg8ei8_v_u8mf8(__VA_ARGS__)

◆ vsoxseg8ei8_v_u8mf8_m

#define vsoxseg8ei8_v_u8mf8_m ( ... ) __riscv_vsoxseg8ei8_v_u8mf8_m(__VA_ARGS__)

◆ vsra_vv_i16m1

#define vsra_vv_i16m1 ( ... ) __riscv_vsra_vv_i16m1(__VA_ARGS__)

◆ vsra_vv_i16m1_m

#define vsra_vv_i16m1_m ( ... ) __riscv_vsra_vv_i16m1_tumu(__VA_ARGS__)

◆ vsra_vv_i16m2

#define vsra_vv_i16m2 ( ... ) __riscv_vsra_vv_i16m2(__VA_ARGS__)

◆ vsra_vv_i16m2_m

#define vsra_vv_i16m2_m ( ... ) __riscv_vsra_vv_i16m2_tumu(__VA_ARGS__)

◆ vsra_vv_i16m4

#define vsra_vv_i16m4 ( ... ) __riscv_vsra_vv_i16m4(__VA_ARGS__)

◆ vsra_vv_i16m4_m

#define vsra_vv_i16m4_m ( ... ) __riscv_vsra_vv_i16m4_tumu(__VA_ARGS__)

◆ vsra_vv_i16m8

#define vsra_vv_i16m8 ( ... ) __riscv_vsra_vv_i16m8(__VA_ARGS__)

◆ vsra_vv_i16m8_m

#define vsra_vv_i16m8_m ( ... ) __riscv_vsra_vv_i16m8_tumu(__VA_ARGS__)

◆ vsra_vv_i16mf2

#define vsra_vv_i16mf2 ( ... ) __riscv_vsra_vv_i16mf2(__VA_ARGS__)

◆ vsra_vv_i16mf2_m

#define vsra_vv_i16mf2_m ( ... ) __riscv_vsra_vv_i16mf2_tumu(__VA_ARGS__)

◆ vsra_vv_i16mf4

#define vsra_vv_i16mf4 ( ... ) __riscv_vsra_vv_i16mf4(__VA_ARGS__)

◆ vsra_vv_i16mf4_m

#define vsra_vv_i16mf4_m ( ... ) __riscv_vsra_vv_i16mf4_tumu(__VA_ARGS__)

◆ vsra_vv_i32m1

#define vsra_vv_i32m1 ( ... ) __riscv_vsra_vv_i32m1(__VA_ARGS__)

◆ vsra_vv_i32m1_m

#define vsra_vv_i32m1_m ( ... ) __riscv_vsra_vv_i32m1_tumu(__VA_ARGS__)

◆ vsra_vv_i32m2

#define vsra_vv_i32m2 ( ... ) __riscv_vsra_vv_i32m2(__VA_ARGS__)

◆ vsra_vv_i32m2_m

#define vsra_vv_i32m2_m ( ... ) __riscv_vsra_vv_i32m2_tumu(__VA_ARGS__)

◆ vsra_vv_i32m4

#define vsra_vv_i32m4 ( ... ) __riscv_vsra_vv_i32m4(__VA_ARGS__)

◆ vsra_vv_i32m4_m

#define vsra_vv_i32m4_m ( ... ) __riscv_vsra_vv_i32m4_tumu(__VA_ARGS__)

◆ vsra_vv_i32m8

#define vsra_vv_i32m8 ( ... ) __riscv_vsra_vv_i32m8(__VA_ARGS__)

◆ vsra_vv_i32m8_m

#define vsra_vv_i32m8_m ( ... ) __riscv_vsra_vv_i32m8_tumu(__VA_ARGS__)

◆ vsra_vv_i32mf2

#define vsra_vv_i32mf2 ( ... ) __riscv_vsra_vv_i32mf2(__VA_ARGS__)

◆ vsra_vv_i32mf2_m

#define vsra_vv_i32mf2_m ( ... ) __riscv_vsra_vv_i32mf2_tumu(__VA_ARGS__)

◆ vsra_vv_i64m1

#define vsra_vv_i64m1 ( ... ) __riscv_vsra_vv_i64m1(__VA_ARGS__)

◆ vsra_vv_i64m1_m

#define vsra_vv_i64m1_m ( ... ) __riscv_vsra_vv_i64m1_tumu(__VA_ARGS__)

◆ vsra_vv_i64m2

#define vsra_vv_i64m2 ( ... ) __riscv_vsra_vv_i64m2(__VA_ARGS__)

◆ vsra_vv_i64m2_m

#define vsra_vv_i64m2_m ( ... ) __riscv_vsra_vv_i64m2_tumu(__VA_ARGS__)

◆ vsra_vv_i64m4

#define vsra_vv_i64m4 ( ... ) __riscv_vsra_vv_i64m4(__VA_ARGS__)

◆ vsra_vv_i64m4_m

#define vsra_vv_i64m4_m ( ... ) __riscv_vsra_vv_i64m4_tumu(__VA_ARGS__)

◆ vsra_vv_i64m8

#define vsra_vv_i64m8 ( ... ) __riscv_vsra_vv_i64m8(__VA_ARGS__)

◆ vsra_vv_i64m8_m

#define vsra_vv_i64m8_m ( ... ) __riscv_vsra_vv_i64m8_tumu(__VA_ARGS__)

◆ vsra_vv_i8m1

#define vsra_vv_i8m1 ( ... ) __riscv_vsra_vv_i8m1(__VA_ARGS__)

◆ vsra_vv_i8m1_m

#define vsra_vv_i8m1_m ( ... ) __riscv_vsra_vv_i8m1_tumu(__VA_ARGS__)

◆ vsra_vv_i8m2

#define vsra_vv_i8m2 ( ... ) __riscv_vsra_vv_i8m2(__VA_ARGS__)

◆ vsra_vv_i8m2_m

#define vsra_vv_i8m2_m ( ... ) __riscv_vsra_vv_i8m2_tumu(__VA_ARGS__)

◆ vsra_vv_i8m4

#define vsra_vv_i8m4 ( ... ) __riscv_vsra_vv_i8m4(__VA_ARGS__)

◆ vsra_vv_i8m4_m

#define vsra_vv_i8m4_m ( ... ) __riscv_vsra_vv_i8m4_tumu(__VA_ARGS__)

◆ vsra_vv_i8m8

#define vsra_vv_i8m8 ( ... ) __riscv_vsra_vv_i8m8(__VA_ARGS__)

◆ vsra_vv_i8m8_m

#define vsra_vv_i8m8_m ( ... ) __riscv_vsra_vv_i8m8_tumu(__VA_ARGS__)

◆ vsra_vv_i8mf2

#define vsra_vv_i8mf2 ( ... ) __riscv_vsra_vv_i8mf2(__VA_ARGS__)

◆ vsra_vv_i8mf2_m

#define vsra_vv_i8mf2_m ( ... ) __riscv_vsra_vv_i8mf2_tumu(__VA_ARGS__)

◆ vsra_vv_i8mf4

#define vsra_vv_i8mf4 ( ... ) __riscv_vsra_vv_i8mf4(__VA_ARGS__)

◆ vsra_vv_i8mf4_m

#define vsra_vv_i8mf4_m ( ... ) __riscv_vsra_vv_i8mf4_tumu(__VA_ARGS__)

◆ vsra_vv_i8mf8

#define vsra_vv_i8mf8 ( ... ) __riscv_vsra_vv_i8mf8(__VA_ARGS__)

◆ vsra_vv_i8mf8_m

#define vsra_vv_i8mf8_m ( ... ) __riscv_vsra_vv_i8mf8_tumu(__VA_ARGS__)

◆ vsra_vx_i16m1

#define vsra_vx_i16m1 ( ... ) __riscv_vsra_vx_i16m1(__VA_ARGS__)

◆ vsra_vx_i16m1_m

#define vsra_vx_i16m1_m ( ... ) __riscv_vsra_vx_i16m1_tumu(__VA_ARGS__)

◆ vsra_vx_i16m2

#define vsra_vx_i16m2 ( ... ) __riscv_vsra_vx_i16m2(__VA_ARGS__)

◆ vsra_vx_i16m2_m

#define vsra_vx_i16m2_m ( ... ) __riscv_vsra_vx_i16m2_tumu(__VA_ARGS__)

◆ vsra_vx_i16m4

#define vsra_vx_i16m4 ( ... ) __riscv_vsra_vx_i16m4(__VA_ARGS__)

◆ vsra_vx_i16m4_m

#define vsra_vx_i16m4_m ( ... ) __riscv_vsra_vx_i16m4_tumu(__VA_ARGS__)

◆ vsra_vx_i16m8

#define vsra_vx_i16m8 ( ... ) __riscv_vsra_vx_i16m8(__VA_ARGS__)

◆ vsra_vx_i16m8_m

#define vsra_vx_i16m8_m ( ... ) __riscv_vsra_vx_i16m8_tumu(__VA_ARGS__)

◆ vsra_vx_i16mf2

#define vsra_vx_i16mf2 ( ... ) __riscv_vsra_vx_i16mf2(__VA_ARGS__)

◆ vsra_vx_i16mf2_m

#define vsra_vx_i16mf2_m ( ... ) __riscv_vsra_vx_i16mf2_tumu(__VA_ARGS__)

◆ vsra_vx_i16mf4

#define vsra_vx_i16mf4 ( ... ) __riscv_vsra_vx_i16mf4(__VA_ARGS__)

◆ vsra_vx_i16mf4_m

#define vsra_vx_i16mf4_m ( ... ) __riscv_vsra_vx_i16mf4_tumu(__VA_ARGS__)

◆ vsra_vx_i32m1

#define vsra_vx_i32m1 ( ... ) __riscv_vsra_vx_i32m1(__VA_ARGS__)

◆ vsra_vx_i32m1_m

#define vsra_vx_i32m1_m ( ... ) __riscv_vsra_vx_i32m1_tumu(__VA_ARGS__)

◆ vsra_vx_i32m2

#define vsra_vx_i32m2 ( ... ) __riscv_vsra_vx_i32m2(__VA_ARGS__)

◆ vsra_vx_i32m2_m

#define vsra_vx_i32m2_m ( ... ) __riscv_vsra_vx_i32m2_tumu(__VA_ARGS__)

◆ vsra_vx_i32m4

#define vsra_vx_i32m4 ( ... ) __riscv_vsra_vx_i32m4(__VA_ARGS__)

◆ vsra_vx_i32m4_m

#define vsra_vx_i32m4_m ( ... ) __riscv_vsra_vx_i32m4_tumu(__VA_ARGS__)

◆ vsra_vx_i32m8

#define vsra_vx_i32m8 ( ... ) __riscv_vsra_vx_i32m8(__VA_ARGS__)

◆ vsra_vx_i32m8_m

#define vsra_vx_i32m8_m ( ... ) __riscv_vsra_vx_i32m8_tumu(__VA_ARGS__)

◆ vsra_vx_i32mf2

#define vsra_vx_i32mf2 ( ... ) __riscv_vsra_vx_i32mf2(__VA_ARGS__)

◆ vsra_vx_i32mf2_m

#define vsra_vx_i32mf2_m ( ... ) __riscv_vsra_vx_i32mf2_tumu(__VA_ARGS__)

◆ vsra_vx_i64m1

#define vsra_vx_i64m1 ( ... ) __riscv_vsra_vx_i64m1(__VA_ARGS__)

◆ vsra_vx_i64m1_m

#define vsra_vx_i64m1_m ( ... ) __riscv_vsra_vx_i64m1_tumu(__VA_ARGS__)

◆ vsra_vx_i64m2

#define vsra_vx_i64m2 ( ... ) __riscv_vsra_vx_i64m2(__VA_ARGS__)

◆ vsra_vx_i64m2_m

#define vsra_vx_i64m2_m ( ... ) __riscv_vsra_vx_i64m2_tumu(__VA_ARGS__)

◆ vsra_vx_i64m4

#define vsra_vx_i64m4 ( ... ) __riscv_vsra_vx_i64m4(__VA_ARGS__)

◆ vsra_vx_i64m4_m

#define vsra_vx_i64m4_m ( ... ) __riscv_vsra_vx_i64m4_tumu(__VA_ARGS__)

◆ vsra_vx_i64m8

#define vsra_vx_i64m8 ( ... ) __riscv_vsra_vx_i64m8(__VA_ARGS__)

◆ vsra_vx_i64m8_m

#define vsra_vx_i64m8_m ( ... ) __riscv_vsra_vx_i64m8_tumu(__VA_ARGS__)

◆ vsra_vx_i8m1

#define vsra_vx_i8m1 ( ... ) __riscv_vsra_vx_i8m1(__VA_ARGS__)

◆ vsra_vx_i8m1_m

#define vsra_vx_i8m1_m ( ... ) __riscv_vsra_vx_i8m1_tumu(__VA_ARGS__)

◆ vsra_vx_i8m2

#define vsra_vx_i8m2 ( ... ) __riscv_vsra_vx_i8m2(__VA_ARGS__)

◆ vsra_vx_i8m2_m

#define vsra_vx_i8m2_m ( ... ) __riscv_vsra_vx_i8m2_tumu(__VA_ARGS__)

◆ vsra_vx_i8m4

#define vsra_vx_i8m4 ( ... ) __riscv_vsra_vx_i8m4(__VA_ARGS__)

◆ vsra_vx_i8m4_m

#define vsra_vx_i8m4_m ( ... ) __riscv_vsra_vx_i8m4_tumu(__VA_ARGS__)

◆ vsra_vx_i8m8

#define vsra_vx_i8m8 ( ... ) __riscv_vsra_vx_i8m8(__VA_ARGS__)

◆ vsra_vx_i8m8_m

#define vsra_vx_i8m8_m ( ... ) __riscv_vsra_vx_i8m8_tumu(__VA_ARGS__)

◆ vsra_vx_i8mf2

#define vsra_vx_i8mf2 ( ... ) __riscv_vsra_vx_i8mf2(__VA_ARGS__)

◆ vsra_vx_i8mf2_m

#define vsra_vx_i8mf2_m ( ... ) __riscv_vsra_vx_i8mf2_tumu(__VA_ARGS__)

◆ vsra_vx_i8mf4

#define vsra_vx_i8mf4 ( ... ) __riscv_vsra_vx_i8mf4(__VA_ARGS__)

◆ vsra_vx_i8mf4_m

#define vsra_vx_i8mf4_m ( ... ) __riscv_vsra_vx_i8mf4_tumu(__VA_ARGS__)

◆ vsra_vx_i8mf8

#define vsra_vx_i8mf8 ( ... ) __riscv_vsra_vx_i8mf8(__VA_ARGS__)

◆ vsra_vx_i8mf8_m

#define vsra_vx_i8mf8_m ( ... ) __riscv_vsra_vx_i8mf8_tumu(__VA_ARGS__)

◆ vsrl_vv_u16m1

#define vsrl_vv_u16m1 ( ... ) __riscv_vsrl_vv_u16m1(__VA_ARGS__)

◆ vsrl_vv_u16m1_m

#define vsrl_vv_u16m1_m ( ... ) __riscv_vsrl_vv_u16m1_tumu(__VA_ARGS__)

◆ vsrl_vv_u16m2

#define vsrl_vv_u16m2 ( ... ) __riscv_vsrl_vv_u16m2(__VA_ARGS__)

◆ vsrl_vv_u16m2_m

#define vsrl_vv_u16m2_m ( ... ) __riscv_vsrl_vv_u16m2_tumu(__VA_ARGS__)

◆ vsrl_vv_u16m4

#define vsrl_vv_u16m4 ( ... ) __riscv_vsrl_vv_u16m4(__VA_ARGS__)

◆ vsrl_vv_u16m4_m

#define vsrl_vv_u16m4_m ( ... ) __riscv_vsrl_vv_u16m4_tumu(__VA_ARGS__)

◆ vsrl_vv_u16m8

#define vsrl_vv_u16m8 ( ... ) __riscv_vsrl_vv_u16m8(__VA_ARGS__)

◆ vsrl_vv_u16m8_m

#define vsrl_vv_u16m8_m ( ... ) __riscv_vsrl_vv_u16m8_tumu(__VA_ARGS__)

◆ vsrl_vv_u16mf2

#define vsrl_vv_u16mf2 ( ... ) __riscv_vsrl_vv_u16mf2(__VA_ARGS__)

◆ vsrl_vv_u16mf2_m

#define vsrl_vv_u16mf2_m ( ... ) __riscv_vsrl_vv_u16mf2_tumu(__VA_ARGS__)

◆ vsrl_vv_u16mf4

#define vsrl_vv_u16mf4 ( ... ) __riscv_vsrl_vv_u16mf4(__VA_ARGS__)

◆ vsrl_vv_u16mf4_m

#define vsrl_vv_u16mf4_m ( ... ) __riscv_vsrl_vv_u16mf4_tumu(__VA_ARGS__)

◆ vsrl_vv_u32m1

#define vsrl_vv_u32m1 ( ... ) __riscv_vsrl_vv_u32m1(__VA_ARGS__)

◆ vsrl_vv_u32m1_m

#define vsrl_vv_u32m1_m ( ... ) __riscv_vsrl_vv_u32m1_tumu(__VA_ARGS__)

◆ vsrl_vv_u32m2

#define vsrl_vv_u32m2 ( ... ) __riscv_vsrl_vv_u32m2(__VA_ARGS__)

◆ vsrl_vv_u32m2_m

#define vsrl_vv_u32m2_m ( ... ) __riscv_vsrl_vv_u32m2_tumu(__VA_ARGS__)

◆ vsrl_vv_u32m4

#define vsrl_vv_u32m4 ( ... ) __riscv_vsrl_vv_u32m4(__VA_ARGS__)

◆ vsrl_vv_u32m4_m

#define vsrl_vv_u32m4_m ( ... ) __riscv_vsrl_vv_u32m4_tumu(__VA_ARGS__)

◆ vsrl_vv_u32m8

#define vsrl_vv_u32m8 ( ... ) __riscv_vsrl_vv_u32m8(__VA_ARGS__)

◆ vsrl_vv_u32m8_m

#define vsrl_vv_u32m8_m ( ... ) __riscv_vsrl_vv_u32m8_tumu(__VA_ARGS__)

◆ vsrl_vv_u32mf2

#define vsrl_vv_u32mf2 ( ... ) __riscv_vsrl_vv_u32mf2(__VA_ARGS__)

◆ vsrl_vv_u32mf2_m

#define vsrl_vv_u32mf2_m ( ... ) __riscv_vsrl_vv_u32mf2_tumu(__VA_ARGS__)

◆ vsrl_vv_u64m1

#define vsrl_vv_u64m1 ( ... ) __riscv_vsrl_vv_u64m1(__VA_ARGS__)

◆ vsrl_vv_u64m1_m

#define vsrl_vv_u64m1_m ( ... ) __riscv_vsrl_vv_u64m1_tumu(__VA_ARGS__)

◆ vsrl_vv_u64m2

#define vsrl_vv_u64m2 ( ... ) __riscv_vsrl_vv_u64m2(__VA_ARGS__)

◆ vsrl_vv_u64m2_m

#define vsrl_vv_u64m2_m ( ... ) __riscv_vsrl_vv_u64m2_tumu(__VA_ARGS__)

◆ vsrl_vv_u64m4

#define vsrl_vv_u64m4 ( ... ) __riscv_vsrl_vv_u64m4(__VA_ARGS__)

◆ vsrl_vv_u64m4_m

#define vsrl_vv_u64m4_m ( ... ) __riscv_vsrl_vv_u64m4_tumu(__VA_ARGS__)

◆ vsrl_vv_u64m8

#define vsrl_vv_u64m8 ( ... ) __riscv_vsrl_vv_u64m8(__VA_ARGS__)

◆ vsrl_vv_u64m8_m

#define vsrl_vv_u64m8_m ( ... ) __riscv_vsrl_vv_u64m8_tumu(__VA_ARGS__)

◆ vsrl_vv_u8m1

#define vsrl_vv_u8m1 ( ... ) __riscv_vsrl_vv_u8m1(__VA_ARGS__)

◆ vsrl_vv_u8m1_m

#define vsrl_vv_u8m1_m ( ... ) __riscv_vsrl_vv_u8m1_tumu(__VA_ARGS__)

◆ vsrl_vv_u8m2

#define vsrl_vv_u8m2 ( ... ) __riscv_vsrl_vv_u8m2(__VA_ARGS__)

◆ vsrl_vv_u8m2_m

#define vsrl_vv_u8m2_m ( ... ) __riscv_vsrl_vv_u8m2_tumu(__VA_ARGS__)

◆ vsrl_vv_u8m4

#define vsrl_vv_u8m4 ( ... ) __riscv_vsrl_vv_u8m4(__VA_ARGS__)

◆ vsrl_vv_u8m4_m

#define vsrl_vv_u8m4_m ( ... ) __riscv_vsrl_vv_u8m4_tumu(__VA_ARGS__)

◆ vsrl_vv_u8m8

#define vsrl_vv_u8m8 ( ... ) __riscv_vsrl_vv_u8m8(__VA_ARGS__)

◆ vsrl_vv_u8m8_m

#define vsrl_vv_u8m8_m ( ... ) __riscv_vsrl_vv_u8m8_tumu(__VA_ARGS__)

◆ vsrl_vv_u8mf2

#define vsrl_vv_u8mf2 ( ... ) __riscv_vsrl_vv_u8mf2(__VA_ARGS__)

◆ vsrl_vv_u8mf2_m

#define vsrl_vv_u8mf2_m ( ... ) __riscv_vsrl_vv_u8mf2_tumu(__VA_ARGS__)

◆ vsrl_vv_u8mf4

#define vsrl_vv_u8mf4 ( ... ) __riscv_vsrl_vv_u8mf4(__VA_ARGS__)

◆ vsrl_vv_u8mf4_m

#define vsrl_vv_u8mf4_m ( ... ) __riscv_vsrl_vv_u8mf4_tumu(__VA_ARGS__)

◆ vsrl_vv_u8mf8

#define vsrl_vv_u8mf8 ( ... ) __riscv_vsrl_vv_u8mf8(__VA_ARGS__)

◆ vsrl_vv_u8mf8_m

#define vsrl_vv_u8mf8_m ( ... ) __riscv_vsrl_vv_u8mf8_tumu(__VA_ARGS__)

◆ vsrl_vx_u16m1

#define vsrl_vx_u16m1 ( ... ) __riscv_vsrl_vx_u16m1(__VA_ARGS__)

◆ vsrl_vx_u16m1_m

#define vsrl_vx_u16m1_m ( ... ) __riscv_vsrl_vx_u16m1_tumu(__VA_ARGS__)

◆ vsrl_vx_u16m2

#define vsrl_vx_u16m2 ( ... ) __riscv_vsrl_vx_u16m2(__VA_ARGS__)

◆ vsrl_vx_u16m2_m

#define vsrl_vx_u16m2_m ( ... ) __riscv_vsrl_vx_u16m2_tumu(__VA_ARGS__)

◆ vsrl_vx_u16m4

#define vsrl_vx_u16m4 ( ... ) __riscv_vsrl_vx_u16m4(__VA_ARGS__)

◆ vsrl_vx_u16m4_m

#define vsrl_vx_u16m4_m ( ... ) __riscv_vsrl_vx_u16m4_tumu(__VA_ARGS__)

◆ vsrl_vx_u16m8

#define vsrl_vx_u16m8 ( ... ) __riscv_vsrl_vx_u16m8(__VA_ARGS__)

◆ vsrl_vx_u16m8_m

#define vsrl_vx_u16m8_m ( ... ) __riscv_vsrl_vx_u16m8_tumu(__VA_ARGS__)

◆ vsrl_vx_u16mf2

#define vsrl_vx_u16mf2 ( ... ) __riscv_vsrl_vx_u16mf2(__VA_ARGS__)

◆ vsrl_vx_u16mf2_m

#define vsrl_vx_u16mf2_m ( ... ) __riscv_vsrl_vx_u16mf2_tumu(__VA_ARGS__)

◆ vsrl_vx_u16mf4

#define vsrl_vx_u16mf4 ( ... ) __riscv_vsrl_vx_u16mf4(__VA_ARGS__)

◆ vsrl_vx_u16mf4_m

#define vsrl_vx_u16mf4_m ( ... ) __riscv_vsrl_vx_u16mf4_tumu(__VA_ARGS__)

◆ vsrl_vx_u32m1

#define vsrl_vx_u32m1 ( ... ) __riscv_vsrl_vx_u32m1(__VA_ARGS__)

◆ vsrl_vx_u32m1_m

#define vsrl_vx_u32m1_m ( ... ) __riscv_vsrl_vx_u32m1_tumu(__VA_ARGS__)

◆ vsrl_vx_u32m2

#define vsrl_vx_u32m2 ( ... ) __riscv_vsrl_vx_u32m2(__VA_ARGS__)

◆ vsrl_vx_u32m2_m

#define vsrl_vx_u32m2_m ( ... ) __riscv_vsrl_vx_u32m2_tumu(__VA_ARGS__)

◆ vsrl_vx_u32m4

#define vsrl_vx_u32m4 ( ... ) __riscv_vsrl_vx_u32m4(__VA_ARGS__)

◆ vsrl_vx_u32m4_m

#define vsrl_vx_u32m4_m ( ... ) __riscv_vsrl_vx_u32m4_tumu(__VA_ARGS__)

◆ vsrl_vx_u32m8

#define vsrl_vx_u32m8 ( ... ) __riscv_vsrl_vx_u32m8(__VA_ARGS__)

◆ vsrl_vx_u32m8_m

#define vsrl_vx_u32m8_m ( ... ) __riscv_vsrl_vx_u32m8_tumu(__VA_ARGS__)

◆ vsrl_vx_u32mf2

#define vsrl_vx_u32mf2 ( ... ) __riscv_vsrl_vx_u32mf2(__VA_ARGS__)

◆ vsrl_vx_u32mf2_m

#define vsrl_vx_u32mf2_m ( ... ) __riscv_vsrl_vx_u32mf2_tumu(__VA_ARGS__)

◆ vsrl_vx_u64m1

#define vsrl_vx_u64m1 ( ... ) __riscv_vsrl_vx_u64m1(__VA_ARGS__)

◆ vsrl_vx_u64m1_m

#define vsrl_vx_u64m1_m ( ... ) __riscv_vsrl_vx_u64m1_tumu(__VA_ARGS__)

◆ vsrl_vx_u64m2

#define vsrl_vx_u64m2 ( ... ) __riscv_vsrl_vx_u64m2(__VA_ARGS__)

◆ vsrl_vx_u64m2_m

#define vsrl_vx_u64m2_m ( ... ) __riscv_vsrl_vx_u64m2_tumu(__VA_ARGS__)

◆ vsrl_vx_u64m4

#define vsrl_vx_u64m4 ( ... ) __riscv_vsrl_vx_u64m4(__VA_ARGS__)

◆ vsrl_vx_u64m4_m

#define vsrl_vx_u64m4_m ( ... ) __riscv_vsrl_vx_u64m4_tumu(__VA_ARGS__)

◆ vsrl_vx_u64m8

#define vsrl_vx_u64m8 ( ... ) __riscv_vsrl_vx_u64m8(__VA_ARGS__)

◆ vsrl_vx_u64m8_m

#define vsrl_vx_u64m8_m ( ... ) __riscv_vsrl_vx_u64m8_tumu(__VA_ARGS__)

◆ vsrl_vx_u8m1

#define vsrl_vx_u8m1 ( ... ) __riscv_vsrl_vx_u8m1(__VA_ARGS__)

◆ vsrl_vx_u8m1_m

#define vsrl_vx_u8m1_m ( ... ) __riscv_vsrl_vx_u8m1_tumu(__VA_ARGS__)

◆ vsrl_vx_u8m2

#define vsrl_vx_u8m2 ( ... ) __riscv_vsrl_vx_u8m2(__VA_ARGS__)

◆ vsrl_vx_u8m2_m

#define vsrl_vx_u8m2_m ( ... ) __riscv_vsrl_vx_u8m2_tumu(__VA_ARGS__)

◆ vsrl_vx_u8m4

#define vsrl_vx_u8m4 ( ... ) __riscv_vsrl_vx_u8m4(__VA_ARGS__)

◆ vsrl_vx_u8m4_m

#define vsrl_vx_u8m4_m ( ... ) __riscv_vsrl_vx_u8m4_tumu(__VA_ARGS__)

◆ vsrl_vx_u8m8

#define vsrl_vx_u8m8 ( ... ) __riscv_vsrl_vx_u8m8(__VA_ARGS__)

◆ vsrl_vx_u8m8_m

#define vsrl_vx_u8m8_m ( ... ) __riscv_vsrl_vx_u8m8_tumu(__VA_ARGS__)

◆ vsrl_vx_u8mf2

#define vsrl_vx_u8mf2 ( ... ) __riscv_vsrl_vx_u8mf2(__VA_ARGS__)

◆ vsrl_vx_u8mf2_m

#define vsrl_vx_u8mf2_m ( ... ) __riscv_vsrl_vx_u8mf2_tumu(__VA_ARGS__)

◆ vsrl_vx_u8mf4

#define vsrl_vx_u8mf4 ( ... ) __riscv_vsrl_vx_u8mf4(__VA_ARGS__)

◆ vsrl_vx_u8mf4_m

#define vsrl_vx_u8mf4_m ( ... ) __riscv_vsrl_vx_u8mf4_tumu(__VA_ARGS__)

◆ vsrl_vx_u8mf8

#define vsrl_vx_u8mf8 ( ... ) __riscv_vsrl_vx_u8mf8(__VA_ARGS__)

◆ vsrl_vx_u8mf8_m

#define vsrl_vx_u8mf8_m ( ... ) __riscv_vsrl_vx_u8mf8_tumu(__VA_ARGS__)

◆ vsse16_v_f16m1

#define vsse16_v_f16m1 ( ... ) __riscv_vsse16_v_f16m1(__VA_ARGS__)

◆ vsse16_v_f16m1_m

#define vsse16_v_f16m1_m ( ... ) __riscv_vsse16_v_f16m1_m(__VA_ARGS__)

◆ vsse16_v_f16m2

#define vsse16_v_f16m2 ( ... ) __riscv_vsse16_v_f16m2(__VA_ARGS__)

◆ vsse16_v_f16m2_m

#define vsse16_v_f16m2_m ( ... ) __riscv_vsse16_v_f16m2_m(__VA_ARGS__)

◆ vsse16_v_f16m4

#define vsse16_v_f16m4 ( ... ) __riscv_vsse16_v_f16m4(__VA_ARGS__)

◆ vsse16_v_f16m4_m

#define vsse16_v_f16m4_m ( ... ) __riscv_vsse16_v_f16m4_m(__VA_ARGS__)

◆ vsse16_v_f16m8

#define vsse16_v_f16m8 ( ... ) __riscv_vsse16_v_f16m8(__VA_ARGS__)

◆ vsse16_v_f16m8_m

#define vsse16_v_f16m8_m ( ... ) __riscv_vsse16_v_f16m8_m(__VA_ARGS__)

◆ vsse16_v_f16mf2

#define vsse16_v_f16mf2 ( ... ) __riscv_vsse16_v_f16mf2(__VA_ARGS__)

◆ vsse16_v_f16mf2_m

#define vsse16_v_f16mf2_m ( ... ) __riscv_vsse16_v_f16mf2_m(__VA_ARGS__)

◆ vsse16_v_f16mf4

#define vsse16_v_f16mf4 ( ... ) __riscv_vsse16_v_f16mf4(__VA_ARGS__)

◆ vsse16_v_f16mf4_m

#define vsse16_v_f16mf4_m ( ... ) __riscv_vsse16_v_f16mf4_m(__VA_ARGS__)

◆ vsse16_v_i16m1

#define vsse16_v_i16m1 ( ... ) __riscv_vsse16_v_i16m1(__VA_ARGS__)

◆ vsse16_v_i16m1_m

#define vsse16_v_i16m1_m ( ... ) __riscv_vsse16_v_i16m1_m(__VA_ARGS__)

◆ vsse16_v_i16m2

#define vsse16_v_i16m2 ( ... ) __riscv_vsse16_v_i16m2(__VA_ARGS__)

◆ vsse16_v_i16m2_m

#define vsse16_v_i16m2_m ( ... ) __riscv_vsse16_v_i16m2_m(__VA_ARGS__)

◆ vsse16_v_i16m4

#define vsse16_v_i16m4 ( ... ) __riscv_vsse16_v_i16m4(__VA_ARGS__)

◆ vsse16_v_i16m4_m

#define vsse16_v_i16m4_m ( ... ) __riscv_vsse16_v_i16m4_m(__VA_ARGS__)

◆ vsse16_v_i16m8

#define vsse16_v_i16m8 ( ... ) __riscv_vsse16_v_i16m8(__VA_ARGS__)

◆ vsse16_v_i16m8_m

#define vsse16_v_i16m8_m ( ... ) __riscv_vsse16_v_i16m8_m(__VA_ARGS__)

◆ vsse16_v_i16mf2

#define vsse16_v_i16mf2 ( ... ) __riscv_vsse16_v_i16mf2(__VA_ARGS__)

◆ vsse16_v_i16mf2_m

#define vsse16_v_i16mf2_m ( ... ) __riscv_vsse16_v_i16mf2_m(__VA_ARGS__)

◆ vsse16_v_i16mf4

#define vsse16_v_i16mf4 ( ... ) __riscv_vsse16_v_i16mf4(__VA_ARGS__)

◆ vsse16_v_i16mf4_m

#define vsse16_v_i16mf4_m ( ... ) __riscv_vsse16_v_i16mf4_m(__VA_ARGS__)

◆ vsse16_v_u16m1

#define vsse16_v_u16m1 ( ... ) __riscv_vsse16_v_u16m1(__VA_ARGS__)

◆ vsse16_v_u16m1_m

#define vsse16_v_u16m1_m ( ... ) __riscv_vsse16_v_u16m1_m(__VA_ARGS__)

◆ vsse16_v_u16m2

#define vsse16_v_u16m2 ( ... ) __riscv_vsse16_v_u16m2(__VA_ARGS__)

◆ vsse16_v_u16m2_m

#define vsse16_v_u16m2_m ( ... ) __riscv_vsse16_v_u16m2_m(__VA_ARGS__)

◆ vsse16_v_u16m4

#define vsse16_v_u16m4 ( ... ) __riscv_vsse16_v_u16m4(__VA_ARGS__)

◆ vsse16_v_u16m4_m

#define vsse16_v_u16m4_m ( ... ) __riscv_vsse16_v_u16m4_m(__VA_ARGS__)

◆ vsse16_v_u16m8

#define vsse16_v_u16m8 ( ... ) __riscv_vsse16_v_u16m8(__VA_ARGS__)

◆ vsse16_v_u16m8_m

#define vsse16_v_u16m8_m ( ... ) __riscv_vsse16_v_u16m8_m(__VA_ARGS__)

◆ vsse16_v_u16mf2

#define vsse16_v_u16mf2 ( ... ) __riscv_vsse16_v_u16mf2(__VA_ARGS__)

◆ vsse16_v_u16mf2_m

#define vsse16_v_u16mf2_m ( ... ) __riscv_vsse16_v_u16mf2_m(__VA_ARGS__)

◆ vsse16_v_u16mf4

#define vsse16_v_u16mf4 ( ... ) __riscv_vsse16_v_u16mf4(__VA_ARGS__)

◆ vsse16_v_u16mf4_m

#define vsse16_v_u16mf4_m ( ... ) __riscv_vsse16_v_u16mf4_m(__VA_ARGS__)

◆ vsse32_v_f32m1

#define vsse32_v_f32m1 ( ... ) __riscv_vsse32_v_f32m1(__VA_ARGS__)

◆ vsse32_v_f32m1_m

#define vsse32_v_f32m1_m ( ... ) __riscv_vsse32_v_f32m1_m(__VA_ARGS__)

◆ vsse32_v_f32m2

#define vsse32_v_f32m2 ( ... ) __riscv_vsse32_v_f32m2(__VA_ARGS__)

◆ vsse32_v_f32m2_m

#define vsse32_v_f32m2_m ( ... ) __riscv_vsse32_v_f32m2_m(__VA_ARGS__)

◆ vsse32_v_f32m4

#define vsse32_v_f32m4 ( ... ) __riscv_vsse32_v_f32m4(__VA_ARGS__)

◆ vsse32_v_f32m4_m

#define vsse32_v_f32m4_m ( ... ) __riscv_vsse32_v_f32m4_m(__VA_ARGS__)

◆ vsse32_v_f32m8

#define vsse32_v_f32m8 ( ... ) __riscv_vsse32_v_f32m8(__VA_ARGS__)

◆ vsse32_v_f32m8_m

#define vsse32_v_f32m8_m ( ... ) __riscv_vsse32_v_f32m8_m(__VA_ARGS__)

◆ vsse32_v_f32mf2

#define vsse32_v_f32mf2 ( ... ) __riscv_vsse32_v_f32mf2(__VA_ARGS__)

◆ vsse32_v_f32mf2_m

#define vsse32_v_f32mf2_m ( ... ) __riscv_vsse32_v_f32mf2_m(__VA_ARGS__)

◆ vsse32_v_i32m1

#define vsse32_v_i32m1 ( ... ) __riscv_vsse32_v_i32m1(__VA_ARGS__)

◆ vsse32_v_i32m1_m

#define vsse32_v_i32m1_m ( ... ) __riscv_vsse32_v_i32m1_m(__VA_ARGS__)

◆ vsse32_v_i32m2

#define vsse32_v_i32m2 ( ... ) __riscv_vsse32_v_i32m2(__VA_ARGS__)

◆ vsse32_v_i32m2_m

#define vsse32_v_i32m2_m ( ... ) __riscv_vsse32_v_i32m2_m(__VA_ARGS__)

◆ vsse32_v_i32m4

#define vsse32_v_i32m4 ( ... ) __riscv_vsse32_v_i32m4(__VA_ARGS__)

◆ vsse32_v_i32m4_m

#define vsse32_v_i32m4_m ( ... ) __riscv_vsse32_v_i32m4_m(__VA_ARGS__)

◆ vsse32_v_i32m8

#define vsse32_v_i32m8 ( ... ) __riscv_vsse32_v_i32m8(__VA_ARGS__)

◆ vsse32_v_i32m8_m

#define vsse32_v_i32m8_m ( ... ) __riscv_vsse32_v_i32m8_m(__VA_ARGS__)

◆ vsse32_v_i32mf2

#define vsse32_v_i32mf2 ( ... ) __riscv_vsse32_v_i32mf2(__VA_ARGS__)

◆ vsse32_v_i32mf2_m

#define vsse32_v_i32mf2_m ( ... ) __riscv_vsse32_v_i32mf2_m(__VA_ARGS__)

◆ vsse32_v_u32m1

#define vsse32_v_u32m1 ( ... ) __riscv_vsse32_v_u32m1(__VA_ARGS__)

◆ vsse32_v_u32m1_m

#define vsse32_v_u32m1_m ( ... ) __riscv_vsse32_v_u32m1_m(__VA_ARGS__)

◆ vsse32_v_u32m2

#define vsse32_v_u32m2 ( ... ) __riscv_vsse32_v_u32m2(__VA_ARGS__)

◆ vsse32_v_u32m2_m

#define vsse32_v_u32m2_m ( ... ) __riscv_vsse32_v_u32m2_m(__VA_ARGS__)

◆ vsse32_v_u32m4

#define vsse32_v_u32m4 ( ... ) __riscv_vsse32_v_u32m4(__VA_ARGS__)

◆ vsse32_v_u32m4_m

#define vsse32_v_u32m4_m ( ... ) __riscv_vsse32_v_u32m4_m(__VA_ARGS__)

◆ vsse32_v_u32m8

#define vsse32_v_u32m8 ( ... ) __riscv_vsse32_v_u32m8(__VA_ARGS__)

◆ vsse32_v_u32m8_m

#define vsse32_v_u32m8_m ( ... ) __riscv_vsse32_v_u32m8_m(__VA_ARGS__)

◆ vsse32_v_u32mf2

#define vsse32_v_u32mf2 ( ... ) __riscv_vsse32_v_u32mf2(__VA_ARGS__)

◆ vsse32_v_u32mf2_m

#define vsse32_v_u32mf2_m ( ... ) __riscv_vsse32_v_u32mf2_m(__VA_ARGS__)

◆ vsse64_v_f64m1

#define vsse64_v_f64m1 ( ... ) __riscv_vsse64_v_f64m1(__VA_ARGS__)

◆ vsse64_v_f64m1_m

#define vsse64_v_f64m1_m ( ... ) __riscv_vsse64_v_f64m1_m(__VA_ARGS__)

◆ vsse64_v_f64m2

#define vsse64_v_f64m2 ( ... ) __riscv_vsse64_v_f64m2(__VA_ARGS__)

◆ vsse64_v_f64m2_m

#define vsse64_v_f64m2_m ( ... ) __riscv_vsse64_v_f64m2_m(__VA_ARGS__)

◆ vsse64_v_f64m4

#define vsse64_v_f64m4 ( ... ) __riscv_vsse64_v_f64m4(__VA_ARGS__)

◆ vsse64_v_f64m4_m

#define vsse64_v_f64m4_m ( ... ) __riscv_vsse64_v_f64m4_m(__VA_ARGS__)

◆ vsse64_v_f64m8

#define vsse64_v_f64m8 ( ... ) __riscv_vsse64_v_f64m8(__VA_ARGS__)

◆ vsse64_v_f64m8_m

#define vsse64_v_f64m8_m ( ... ) __riscv_vsse64_v_f64m8_m(__VA_ARGS__)

◆ vsse64_v_i64m1

#define vsse64_v_i64m1 ( ... ) __riscv_vsse64_v_i64m1(__VA_ARGS__)

◆ vsse64_v_i64m1_m

#define vsse64_v_i64m1_m ( ... ) __riscv_vsse64_v_i64m1_m(__VA_ARGS__)

◆ vsse64_v_i64m2

#define vsse64_v_i64m2 ( ... ) __riscv_vsse64_v_i64m2(__VA_ARGS__)

◆ vsse64_v_i64m2_m

#define vsse64_v_i64m2_m ( ... ) __riscv_vsse64_v_i64m2_m(__VA_ARGS__)

◆ vsse64_v_i64m4

#define vsse64_v_i64m4 ( ... ) __riscv_vsse64_v_i64m4(__VA_ARGS__)

◆ vsse64_v_i64m4_m

#define vsse64_v_i64m4_m ( ... ) __riscv_vsse64_v_i64m4_m(__VA_ARGS__)

◆ vsse64_v_i64m8

#define vsse64_v_i64m8 ( ... ) __riscv_vsse64_v_i64m8(__VA_ARGS__)

◆ vsse64_v_i64m8_m

#define vsse64_v_i64m8_m ( ... ) __riscv_vsse64_v_i64m8_m(__VA_ARGS__)

◆ vsse64_v_u64m1

#define vsse64_v_u64m1 ( ... ) __riscv_vsse64_v_u64m1(__VA_ARGS__)

◆ vsse64_v_u64m1_m

#define vsse64_v_u64m1_m ( ... ) __riscv_vsse64_v_u64m1_m(__VA_ARGS__)

◆ vsse64_v_u64m2

#define vsse64_v_u64m2 ( ... ) __riscv_vsse64_v_u64m2(__VA_ARGS__)

◆ vsse64_v_u64m2_m

#define vsse64_v_u64m2_m ( ... ) __riscv_vsse64_v_u64m2_m(__VA_ARGS__)

◆ vsse64_v_u64m4

#define vsse64_v_u64m4 ( ... ) __riscv_vsse64_v_u64m4(__VA_ARGS__)

◆ vsse64_v_u64m4_m

#define vsse64_v_u64m4_m ( ... ) __riscv_vsse64_v_u64m4_m(__VA_ARGS__)

◆ vsse64_v_u64m8

#define vsse64_v_u64m8 ( ... ) __riscv_vsse64_v_u64m8(__VA_ARGS__)

◆ vsse64_v_u64m8_m

#define vsse64_v_u64m8_m ( ... ) __riscv_vsse64_v_u64m8_m(__VA_ARGS__)

◆ vsse8_v_i8m1

#define vsse8_v_i8m1 ( ... ) __riscv_vsse8_v_i8m1(__VA_ARGS__)

◆ vsse8_v_i8m1_m

#define vsse8_v_i8m1_m ( ... ) __riscv_vsse8_v_i8m1_m(__VA_ARGS__)

◆ vsse8_v_i8m2

#define vsse8_v_i8m2 ( ... ) __riscv_vsse8_v_i8m2(__VA_ARGS__)

◆ vsse8_v_i8m2_m

#define vsse8_v_i8m2_m ( ... ) __riscv_vsse8_v_i8m2_m(__VA_ARGS__)

◆ vsse8_v_i8m4

#define vsse8_v_i8m4 ( ... ) __riscv_vsse8_v_i8m4(__VA_ARGS__)

◆ vsse8_v_i8m4_m

#define vsse8_v_i8m4_m ( ... ) __riscv_vsse8_v_i8m4_m(__VA_ARGS__)

◆ vsse8_v_i8m8

#define vsse8_v_i8m8 ( ... ) __riscv_vsse8_v_i8m8(__VA_ARGS__)

◆ vsse8_v_i8m8_m

#define vsse8_v_i8m8_m ( ... ) __riscv_vsse8_v_i8m8_m(__VA_ARGS__)

◆ vsse8_v_i8mf2

#define vsse8_v_i8mf2 ( ... ) __riscv_vsse8_v_i8mf2(__VA_ARGS__)

◆ vsse8_v_i8mf2_m

#define vsse8_v_i8mf2_m ( ... ) __riscv_vsse8_v_i8mf2_m(__VA_ARGS__)

◆ vsse8_v_i8mf4

#define vsse8_v_i8mf4 ( ... ) __riscv_vsse8_v_i8mf4(__VA_ARGS__)

◆ vsse8_v_i8mf4_m

#define vsse8_v_i8mf4_m ( ... ) __riscv_vsse8_v_i8mf4_m(__VA_ARGS__)

◆ vsse8_v_i8mf8

#define vsse8_v_i8mf8 ( ... ) __riscv_vsse8_v_i8mf8(__VA_ARGS__)

◆ vsse8_v_i8mf8_m

#define vsse8_v_i8mf8_m ( ... ) __riscv_vsse8_v_i8mf8_m(__VA_ARGS__)

◆ vsse8_v_u8m1

#define vsse8_v_u8m1 ( ... ) __riscv_vsse8_v_u8m1(__VA_ARGS__)

◆ vsse8_v_u8m1_m

#define vsse8_v_u8m1_m ( ... ) __riscv_vsse8_v_u8m1_m(__VA_ARGS__)

◆ vsse8_v_u8m2

#define vsse8_v_u8m2 ( ... ) __riscv_vsse8_v_u8m2(__VA_ARGS__)

◆ vsse8_v_u8m2_m

#define vsse8_v_u8m2_m ( ... ) __riscv_vsse8_v_u8m2_m(__VA_ARGS__)

◆ vsse8_v_u8m4

#define vsse8_v_u8m4 ( ... ) __riscv_vsse8_v_u8m4(__VA_ARGS__)

◆ vsse8_v_u8m4_m

#define vsse8_v_u8m4_m ( ... ) __riscv_vsse8_v_u8m4_m(__VA_ARGS__)

◆ vsse8_v_u8m8

#define vsse8_v_u8m8 ( ... ) __riscv_vsse8_v_u8m8(__VA_ARGS__)

◆ vsse8_v_u8m8_m

#define vsse8_v_u8m8_m ( ... ) __riscv_vsse8_v_u8m8_m(__VA_ARGS__)

◆ vsse8_v_u8mf2

#define vsse8_v_u8mf2 ( ... ) __riscv_vsse8_v_u8mf2(__VA_ARGS__)

◆ vsse8_v_u8mf2_m

#define vsse8_v_u8mf2_m ( ... ) __riscv_vsse8_v_u8mf2_m(__VA_ARGS__)

◆ vsse8_v_u8mf4

#define vsse8_v_u8mf4 ( ... ) __riscv_vsse8_v_u8mf4(__VA_ARGS__)

◆ vsse8_v_u8mf4_m

#define vsse8_v_u8mf4_m ( ... ) __riscv_vsse8_v_u8mf4_m(__VA_ARGS__)

◆ vsse8_v_u8mf8

#define vsse8_v_u8mf8 ( ... ) __riscv_vsse8_v_u8mf8(__VA_ARGS__)

◆ vsse8_v_u8mf8_m

#define vsse8_v_u8mf8_m ( ... ) __riscv_vsse8_v_u8mf8_m(__VA_ARGS__)

◆ vsseg2e16_v_f16m1

#define vsseg2e16_v_f16m1 ( ... ) __riscv_vsseg2e16_v_f16m1(__VA_ARGS__)

◆ vsseg2e16_v_f16m1_m

#define vsseg2e16_v_f16m1_m ( ... ) __riscv_vsseg2e16_v_f16m1_m(__VA_ARGS__)

◆ vsseg2e16_v_f16m2

#define vsseg2e16_v_f16m2 ( ... ) __riscv_vsseg2e16_v_f16m2(__VA_ARGS__)

◆ vsseg2e16_v_f16m2_m

#define vsseg2e16_v_f16m2_m ( ... ) __riscv_vsseg2e16_v_f16m2_m(__VA_ARGS__)

◆ vsseg2e16_v_f16m4

#define vsseg2e16_v_f16m4 ( ... ) __riscv_vsseg2e16_v_f16m4(__VA_ARGS__)

◆ vsseg2e16_v_f16m4_m

#define vsseg2e16_v_f16m4_m ( ... ) __riscv_vsseg2e16_v_f16m4_m(__VA_ARGS__)

◆ vsseg2e16_v_f16mf2

#define vsseg2e16_v_f16mf2 ( ... ) __riscv_vsseg2e16_v_f16mf2(__VA_ARGS__)

◆ vsseg2e16_v_f16mf2_m

#define vsseg2e16_v_f16mf2_m ( ... ) __riscv_vsseg2e16_v_f16mf2_m(__VA_ARGS__)

◆ vsseg2e16_v_f16mf4

#define vsseg2e16_v_f16mf4 ( ... ) __riscv_vsseg2e16_v_f16mf4(__VA_ARGS__)

◆ vsseg2e16_v_f16mf4_m

#define vsseg2e16_v_f16mf4_m ( ... ) __riscv_vsseg2e16_v_f16mf4_m(__VA_ARGS__)

◆ vsseg2e16_v_i16m1

#define vsseg2e16_v_i16m1 ( ... ) __riscv_vsseg2e16_v_i16m1(__VA_ARGS__)

◆ vsseg2e16_v_i16m1_m

#define vsseg2e16_v_i16m1_m ( ... ) __riscv_vsseg2e16_v_i16m1_m(__VA_ARGS__)

◆ vsseg2e16_v_i16m2

#define vsseg2e16_v_i16m2 ( ... ) __riscv_vsseg2e16_v_i16m2(__VA_ARGS__)

◆ vsseg2e16_v_i16m2_m

#define vsseg2e16_v_i16m2_m ( ... ) __riscv_vsseg2e16_v_i16m2_m(__VA_ARGS__)

◆ vsseg2e16_v_i16m4

#define vsseg2e16_v_i16m4 ( ... ) __riscv_vsseg2e16_v_i16m4(__VA_ARGS__)

◆ vsseg2e16_v_i16m4_m

#define vsseg2e16_v_i16m4_m ( ... ) __riscv_vsseg2e16_v_i16m4_m(__VA_ARGS__)

◆ vsseg2e16_v_i16mf2

#define vsseg2e16_v_i16mf2 ( ... ) __riscv_vsseg2e16_v_i16mf2(__VA_ARGS__)

◆ vsseg2e16_v_i16mf2_m

#define vsseg2e16_v_i16mf2_m ( ... ) __riscv_vsseg2e16_v_i16mf2_m(__VA_ARGS__)

◆ vsseg2e16_v_i16mf4

#define vsseg2e16_v_i16mf4 ( ... ) __riscv_vsseg2e16_v_i16mf4(__VA_ARGS__)

◆ vsseg2e16_v_i16mf4_m

#define vsseg2e16_v_i16mf4_m ( ... ) __riscv_vsseg2e16_v_i16mf4_m(__VA_ARGS__)

◆ vsseg2e16_v_u16m1

#define vsseg2e16_v_u16m1 ( ... ) __riscv_vsseg2e16_v_u16m1(__VA_ARGS__)

◆ vsseg2e16_v_u16m1_m

#define vsseg2e16_v_u16m1_m ( ... ) __riscv_vsseg2e16_v_u16m1_m(__VA_ARGS__)

◆ vsseg2e16_v_u16m2

#define vsseg2e16_v_u16m2 ( ... ) __riscv_vsseg2e16_v_u16m2(__VA_ARGS__)

◆ vsseg2e16_v_u16m2_m

#define vsseg2e16_v_u16m2_m ( ... ) __riscv_vsseg2e16_v_u16m2_m(__VA_ARGS__)

◆ vsseg2e16_v_u16m4

#define vsseg2e16_v_u16m4 ( ... ) __riscv_vsseg2e16_v_u16m4(__VA_ARGS__)

◆ vsseg2e16_v_u16m4_m

#define vsseg2e16_v_u16m4_m ( ... ) __riscv_vsseg2e16_v_u16m4_m(__VA_ARGS__)

◆ vsseg2e16_v_u16mf2

#define vsseg2e16_v_u16mf2 ( ... ) __riscv_vsseg2e16_v_u16mf2(__VA_ARGS__)

◆ vsseg2e16_v_u16mf2_m

#define vsseg2e16_v_u16mf2_m ( ... ) __riscv_vsseg2e16_v_u16mf2_m(__VA_ARGS__)

◆ vsseg2e16_v_u16mf4

#define vsseg2e16_v_u16mf4 ( ... ) __riscv_vsseg2e16_v_u16mf4(__VA_ARGS__)

◆ vsseg2e16_v_u16mf4_m

#define vsseg2e16_v_u16mf4_m ( ... ) __riscv_vsseg2e16_v_u16mf4_m(__VA_ARGS__)

◆ vsseg2e32_v_f32m1

#define vsseg2e32_v_f32m1 ( ... ) __riscv_vsseg2e32_v_f32m1(__VA_ARGS__)

◆ vsseg2e32_v_f32m1_m

#define vsseg2e32_v_f32m1_m ( ... ) __riscv_vsseg2e32_v_f32m1_m(__VA_ARGS__)

◆ vsseg2e32_v_f32m2

#define vsseg2e32_v_f32m2 ( ... ) __riscv_vsseg2e32_v_f32m2(__VA_ARGS__)

◆ vsseg2e32_v_f32m2_m

#define vsseg2e32_v_f32m2_m ( ... ) __riscv_vsseg2e32_v_f32m2_m(__VA_ARGS__)

◆ vsseg2e32_v_f32m4

#define vsseg2e32_v_f32m4 ( ... ) __riscv_vsseg2e32_v_f32m4(__VA_ARGS__)

◆ vsseg2e32_v_f32m4_m

#define vsseg2e32_v_f32m4_m ( ... ) __riscv_vsseg2e32_v_f32m4_m(__VA_ARGS__)

◆ vsseg2e32_v_f32mf2

#define vsseg2e32_v_f32mf2 ( ... ) __riscv_vsseg2e32_v_f32mf2(__VA_ARGS__)

◆ vsseg2e32_v_f32mf2_m

#define vsseg2e32_v_f32mf2_m ( ... ) __riscv_vsseg2e32_v_f32mf2_m(__VA_ARGS__)

◆ vsseg2e32_v_i32m1

#define vsseg2e32_v_i32m1 ( ... ) __riscv_vsseg2e32_v_i32m1(__VA_ARGS__)

◆ vsseg2e32_v_i32m1_m

#define vsseg2e32_v_i32m1_m ( ... ) __riscv_vsseg2e32_v_i32m1_m(__VA_ARGS__)

◆ vsseg2e32_v_i32m2

#define vsseg2e32_v_i32m2 ( ... ) __riscv_vsseg2e32_v_i32m2(__VA_ARGS__)

◆ vsseg2e32_v_i32m2_m

#define vsseg2e32_v_i32m2_m ( ... ) __riscv_vsseg2e32_v_i32m2_m(__VA_ARGS__)

◆ vsseg2e32_v_i32m4

#define vsseg2e32_v_i32m4 ( ... ) __riscv_vsseg2e32_v_i32m4(__VA_ARGS__)

◆ vsseg2e32_v_i32m4_m

#define vsseg2e32_v_i32m4_m ( ... ) __riscv_vsseg2e32_v_i32m4_m(__VA_ARGS__)

◆ vsseg2e32_v_i32mf2

#define vsseg2e32_v_i32mf2 ( ... ) __riscv_vsseg2e32_v_i32mf2(__VA_ARGS__)

◆ vsseg2e32_v_i32mf2_m

#define vsseg2e32_v_i32mf2_m ( ... ) __riscv_vsseg2e32_v_i32mf2_m(__VA_ARGS__)

◆ vsseg2e32_v_u32m1

#define vsseg2e32_v_u32m1 ( ... ) __riscv_vsseg2e32_v_u32m1(__VA_ARGS__)

◆ vsseg2e32_v_u32m1_m

#define vsseg2e32_v_u32m1_m ( ... ) __riscv_vsseg2e32_v_u32m1_m(__VA_ARGS__)

◆ vsseg2e32_v_u32m2

#define vsseg2e32_v_u32m2 ( ... ) __riscv_vsseg2e32_v_u32m2(__VA_ARGS__)

◆ vsseg2e32_v_u32m2_m

#define vsseg2e32_v_u32m2_m ( ... ) __riscv_vsseg2e32_v_u32m2_m(__VA_ARGS__)

◆ vsseg2e32_v_u32m4

#define vsseg2e32_v_u32m4 ( ... ) __riscv_vsseg2e32_v_u32m4(__VA_ARGS__)

◆ vsseg2e32_v_u32m4_m

#define vsseg2e32_v_u32m4_m ( ... ) __riscv_vsseg2e32_v_u32m4_m(__VA_ARGS__)

◆ vsseg2e32_v_u32mf2

#define vsseg2e32_v_u32mf2 ( ... ) __riscv_vsseg2e32_v_u32mf2(__VA_ARGS__)

◆ vsseg2e32_v_u32mf2_m

#define vsseg2e32_v_u32mf2_m ( ... ) __riscv_vsseg2e32_v_u32mf2_m(__VA_ARGS__)

◆ vsseg2e64_v_f64m1

#define vsseg2e64_v_f64m1 ( ... ) __riscv_vsseg2e64_v_f64m1(__VA_ARGS__)

◆ vsseg2e64_v_f64m1_m

#define vsseg2e64_v_f64m1_m ( ... ) __riscv_vsseg2e64_v_f64m1_m(__VA_ARGS__)

◆ vsseg2e64_v_f64m2

#define vsseg2e64_v_f64m2 ( ... ) __riscv_vsseg2e64_v_f64m2(__VA_ARGS__)

◆ vsseg2e64_v_f64m2_m

#define vsseg2e64_v_f64m2_m ( ... ) __riscv_vsseg2e64_v_f64m2_m(__VA_ARGS__)

◆ vsseg2e64_v_f64m4

#define vsseg2e64_v_f64m4 ( ... ) __riscv_vsseg2e64_v_f64m4(__VA_ARGS__)

◆ vsseg2e64_v_f64m4_m

#define vsseg2e64_v_f64m4_m ( ... ) __riscv_vsseg2e64_v_f64m4_m(__VA_ARGS__)

◆ vsseg2e64_v_i64m1

#define vsseg2e64_v_i64m1 ( ... ) __riscv_vsseg2e64_v_i64m1(__VA_ARGS__)

◆ vsseg2e64_v_i64m1_m

#define vsseg2e64_v_i64m1_m ( ... ) __riscv_vsseg2e64_v_i64m1_m(__VA_ARGS__)

◆ vsseg2e64_v_i64m2

#define vsseg2e64_v_i64m2 ( ... ) __riscv_vsseg2e64_v_i64m2(__VA_ARGS__)

◆ vsseg2e64_v_i64m2_m

#define vsseg2e64_v_i64m2_m ( ... ) __riscv_vsseg2e64_v_i64m2_m(__VA_ARGS__)

◆ vsseg2e64_v_i64m4

#define vsseg2e64_v_i64m4 ( ... ) __riscv_vsseg2e64_v_i64m4(__VA_ARGS__)

◆ vsseg2e64_v_i64m4_m

#define vsseg2e64_v_i64m4_m ( ... ) __riscv_vsseg2e64_v_i64m4_m(__VA_ARGS__)

◆ vsseg2e64_v_u64m1

#define vsseg2e64_v_u64m1 ( ... ) __riscv_vsseg2e64_v_u64m1(__VA_ARGS__)

◆ vsseg2e64_v_u64m1_m

#define vsseg2e64_v_u64m1_m ( ... ) __riscv_vsseg2e64_v_u64m1_m(__VA_ARGS__)

◆ vsseg2e64_v_u64m2

#define vsseg2e64_v_u64m2 ( ... ) __riscv_vsseg2e64_v_u64m2(__VA_ARGS__)

◆ vsseg2e64_v_u64m2_m

#define vsseg2e64_v_u64m2_m ( ... ) __riscv_vsseg2e64_v_u64m2_m(__VA_ARGS__)

◆ vsseg2e64_v_u64m4

#define vsseg2e64_v_u64m4 ( ... ) __riscv_vsseg2e64_v_u64m4(__VA_ARGS__)

◆ vsseg2e64_v_u64m4_m

#define vsseg2e64_v_u64m4_m ( ... ) __riscv_vsseg2e64_v_u64m4_m(__VA_ARGS__)

◆ vsseg2e8_v_i8m1

#define vsseg2e8_v_i8m1 ( ... ) __riscv_vsseg2e8_v_i8m1(__VA_ARGS__)

◆ vsseg2e8_v_i8m1_m

#define vsseg2e8_v_i8m1_m ( ... ) __riscv_vsseg2e8_v_i8m1_m(__VA_ARGS__)

◆ vsseg2e8_v_i8m2

#define vsseg2e8_v_i8m2 ( ... ) __riscv_vsseg2e8_v_i8m2(__VA_ARGS__)

◆ vsseg2e8_v_i8m2_m

#define vsseg2e8_v_i8m2_m ( ... ) __riscv_vsseg2e8_v_i8m2_m(__VA_ARGS__)

◆ vsseg2e8_v_i8m4

#define vsseg2e8_v_i8m4 ( ... ) __riscv_vsseg2e8_v_i8m4(__VA_ARGS__)

◆ vsseg2e8_v_i8m4_m

#define vsseg2e8_v_i8m4_m ( ... ) __riscv_vsseg2e8_v_i8m4_m(__VA_ARGS__)

◆ vsseg2e8_v_i8mf2

#define vsseg2e8_v_i8mf2 ( ... ) __riscv_vsseg2e8_v_i8mf2(__VA_ARGS__)

◆ vsseg2e8_v_i8mf2_m

#define vsseg2e8_v_i8mf2_m ( ... ) __riscv_vsseg2e8_v_i8mf2_m(__VA_ARGS__)

◆ vsseg2e8_v_i8mf4

#define vsseg2e8_v_i8mf4 ( ... ) __riscv_vsseg2e8_v_i8mf4(__VA_ARGS__)

◆ vsseg2e8_v_i8mf4_m

#define vsseg2e8_v_i8mf4_m ( ... ) __riscv_vsseg2e8_v_i8mf4_m(__VA_ARGS__)

◆ vsseg2e8_v_i8mf8

#define vsseg2e8_v_i8mf8 ( ... ) __riscv_vsseg2e8_v_i8mf8(__VA_ARGS__)

◆ vsseg2e8_v_i8mf8_m

#define vsseg2e8_v_i8mf8_m ( ... ) __riscv_vsseg2e8_v_i8mf8_m(__VA_ARGS__)

◆ vsseg2e8_v_u8m1

#define vsseg2e8_v_u8m1 ( ... ) __riscv_vsseg2e8_v_u8m1(__VA_ARGS__)

◆ vsseg2e8_v_u8m1_m

#define vsseg2e8_v_u8m1_m ( ... ) __riscv_vsseg2e8_v_u8m1_m(__VA_ARGS__)

◆ vsseg2e8_v_u8m2

#define vsseg2e8_v_u8m2 ( ... ) __riscv_vsseg2e8_v_u8m2(__VA_ARGS__)

◆ vsseg2e8_v_u8m2_m

#define vsseg2e8_v_u8m2_m ( ... ) __riscv_vsseg2e8_v_u8m2_m(__VA_ARGS__)

◆ vsseg2e8_v_u8m4

#define vsseg2e8_v_u8m4 ( ... ) __riscv_vsseg2e8_v_u8m4(__VA_ARGS__)

◆ vsseg2e8_v_u8m4_m

#define vsseg2e8_v_u8m4_m ( ... ) __riscv_vsseg2e8_v_u8m4_m(__VA_ARGS__)

◆ vsseg2e8_v_u8mf2

#define vsseg2e8_v_u8mf2 ( ... ) __riscv_vsseg2e8_v_u8mf2(__VA_ARGS__)

◆ vsseg2e8_v_u8mf2_m

#define vsseg2e8_v_u8mf2_m ( ... ) __riscv_vsseg2e8_v_u8mf2_m(__VA_ARGS__)

◆ vsseg2e8_v_u8mf4

#define vsseg2e8_v_u8mf4 ( ... ) __riscv_vsseg2e8_v_u8mf4(__VA_ARGS__)

◆ vsseg2e8_v_u8mf4_m

#define vsseg2e8_v_u8mf4_m ( ... ) __riscv_vsseg2e8_v_u8mf4_m(__VA_ARGS__)

◆ vsseg2e8_v_u8mf8

#define vsseg2e8_v_u8mf8 ( ... ) __riscv_vsseg2e8_v_u8mf8(__VA_ARGS__)

◆ vsseg2e8_v_u8mf8_m

#define vsseg2e8_v_u8mf8_m ( ... ) __riscv_vsseg2e8_v_u8mf8_m(__VA_ARGS__)

◆ vsseg3e16_v_f16m1

#define vsseg3e16_v_f16m1 ( ... ) __riscv_vsseg3e16_v_f16m1(__VA_ARGS__)

◆ vsseg3e16_v_f16m1_m

#define vsseg3e16_v_f16m1_m ( ... ) __riscv_vsseg3e16_v_f16m1_m(__VA_ARGS__)

◆ vsseg3e16_v_f16m2

#define vsseg3e16_v_f16m2 ( ... ) __riscv_vsseg3e16_v_f16m2(__VA_ARGS__)

◆ vsseg3e16_v_f16m2_m

#define vsseg3e16_v_f16m2_m ( ... ) __riscv_vsseg3e16_v_f16m2_m(__VA_ARGS__)

◆ vsseg3e16_v_f16mf2

#define vsseg3e16_v_f16mf2 ( ... ) __riscv_vsseg3e16_v_f16mf2(__VA_ARGS__)

◆ vsseg3e16_v_f16mf2_m

#define vsseg3e16_v_f16mf2_m ( ... ) __riscv_vsseg3e16_v_f16mf2_m(__VA_ARGS__)

◆ vsseg3e16_v_f16mf4

#define vsseg3e16_v_f16mf4 ( ... ) __riscv_vsseg3e16_v_f16mf4(__VA_ARGS__)

◆ vsseg3e16_v_f16mf4_m

#define vsseg3e16_v_f16mf4_m ( ... ) __riscv_vsseg3e16_v_f16mf4_m(__VA_ARGS__)

◆ vsseg3e16_v_i16m1

#define vsseg3e16_v_i16m1 ( ... ) __riscv_vsseg3e16_v_i16m1(__VA_ARGS__)

◆ vsseg3e16_v_i16m1_m

#define vsseg3e16_v_i16m1_m ( ... ) __riscv_vsseg3e16_v_i16m1_m(__VA_ARGS__)

◆ vsseg3e16_v_i16m2

#define vsseg3e16_v_i16m2 ( ... ) __riscv_vsseg3e16_v_i16m2(__VA_ARGS__)

◆ vsseg3e16_v_i16m2_m

#define vsseg3e16_v_i16m2_m ( ... ) __riscv_vsseg3e16_v_i16m2_m(__VA_ARGS__)

◆ vsseg3e16_v_i16mf2

#define vsseg3e16_v_i16mf2 ( ... ) __riscv_vsseg3e16_v_i16mf2(__VA_ARGS__)

◆ vsseg3e16_v_i16mf2_m

#define vsseg3e16_v_i16mf2_m ( ... ) __riscv_vsseg3e16_v_i16mf2_m(__VA_ARGS__)

◆ vsseg3e16_v_i16mf4

#define vsseg3e16_v_i16mf4 ( ... ) __riscv_vsseg3e16_v_i16mf4(__VA_ARGS__)

◆ vsseg3e16_v_i16mf4_m

#define vsseg3e16_v_i16mf4_m ( ... ) __riscv_vsseg3e16_v_i16mf4_m(__VA_ARGS__)

◆ vsseg3e16_v_u16m1

#define vsseg3e16_v_u16m1 ( ... ) __riscv_vsseg3e16_v_u16m1(__VA_ARGS__)

◆ vsseg3e16_v_u16m1_m

#define vsseg3e16_v_u16m1_m ( ... ) __riscv_vsseg3e16_v_u16m1_m(__VA_ARGS__)

◆ vsseg3e16_v_u16m2

#define vsseg3e16_v_u16m2 ( ... ) __riscv_vsseg3e16_v_u16m2(__VA_ARGS__)

◆ vsseg3e16_v_u16m2_m

#define vsseg3e16_v_u16m2_m ( ... ) __riscv_vsseg3e16_v_u16m2_m(__VA_ARGS__)

◆ vsseg3e16_v_u16mf2

#define vsseg3e16_v_u16mf2 ( ... ) __riscv_vsseg3e16_v_u16mf2(__VA_ARGS__)

◆ vsseg3e16_v_u16mf2_m

#define vsseg3e16_v_u16mf2_m ( ... ) __riscv_vsseg3e16_v_u16mf2_m(__VA_ARGS__)

◆ vsseg3e16_v_u16mf4

#define vsseg3e16_v_u16mf4 ( ... ) __riscv_vsseg3e16_v_u16mf4(__VA_ARGS__)

◆ vsseg3e16_v_u16mf4_m

#define vsseg3e16_v_u16mf4_m ( ... ) __riscv_vsseg3e16_v_u16mf4_m(__VA_ARGS__)

◆ vsseg3e32_v_f32m1

#define vsseg3e32_v_f32m1 ( ... ) __riscv_vsseg3e32_v_f32m1(__VA_ARGS__)

◆ vsseg3e32_v_f32m1_m

#define vsseg3e32_v_f32m1_m ( ... ) __riscv_vsseg3e32_v_f32m1_m(__VA_ARGS__)

◆ vsseg3e32_v_f32m2

#define vsseg3e32_v_f32m2 ( ... ) __riscv_vsseg3e32_v_f32m2(__VA_ARGS__)

◆ vsseg3e32_v_f32m2_m

#define vsseg3e32_v_f32m2_m ( ... ) __riscv_vsseg3e32_v_f32m2_m(__VA_ARGS__)

◆ vsseg3e32_v_f32mf2

#define vsseg3e32_v_f32mf2 ( ... ) __riscv_vsseg3e32_v_f32mf2(__VA_ARGS__)

◆ vsseg3e32_v_f32mf2_m

#define vsseg3e32_v_f32mf2_m ( ... ) __riscv_vsseg3e32_v_f32mf2_m(__VA_ARGS__)

◆ vsseg3e32_v_i32m1

#define vsseg3e32_v_i32m1 ( ... ) __riscv_vsseg3e32_v_i32m1(__VA_ARGS__)

◆ vsseg3e32_v_i32m1_m

#define vsseg3e32_v_i32m1_m ( ... ) __riscv_vsseg3e32_v_i32m1_m(__VA_ARGS__)

◆ vsseg3e32_v_i32m2

#define vsseg3e32_v_i32m2 ( ... ) __riscv_vsseg3e32_v_i32m2(__VA_ARGS__)

◆ vsseg3e32_v_i32m2_m

#define vsseg3e32_v_i32m2_m ( ... ) __riscv_vsseg3e32_v_i32m2_m(__VA_ARGS__)

◆ vsseg3e32_v_i32mf2

#define vsseg3e32_v_i32mf2 ( ... ) __riscv_vsseg3e32_v_i32mf2(__VA_ARGS__)

◆ vsseg3e32_v_i32mf2_m

#define vsseg3e32_v_i32mf2_m ( ... ) __riscv_vsseg3e32_v_i32mf2_m(__VA_ARGS__)

◆ vsseg3e32_v_u32m1

#define vsseg3e32_v_u32m1 ( ... ) __riscv_vsseg3e32_v_u32m1(__VA_ARGS__)

◆ vsseg3e32_v_u32m1_m

#define vsseg3e32_v_u32m1_m ( ... ) __riscv_vsseg3e32_v_u32m1_m(__VA_ARGS__)

◆ vsseg3e32_v_u32m2

#define vsseg3e32_v_u32m2 ( ... ) __riscv_vsseg3e32_v_u32m2(__VA_ARGS__)

◆ vsseg3e32_v_u32m2_m

#define vsseg3e32_v_u32m2_m ( ... ) __riscv_vsseg3e32_v_u32m2_m(__VA_ARGS__)

◆ vsseg3e32_v_u32mf2

#define vsseg3e32_v_u32mf2 ( ... ) __riscv_vsseg3e32_v_u32mf2(__VA_ARGS__)

◆ vsseg3e32_v_u32mf2_m

#define vsseg3e32_v_u32mf2_m ( ... ) __riscv_vsseg3e32_v_u32mf2_m(__VA_ARGS__)

◆ vsseg3e64_v_f64m1

#define vsseg3e64_v_f64m1 ( ... ) __riscv_vsseg3e64_v_f64m1(__VA_ARGS__)

◆ vsseg3e64_v_f64m1_m

#define vsseg3e64_v_f64m1_m ( ... ) __riscv_vsseg3e64_v_f64m1_m(__VA_ARGS__)

◆ vsseg3e64_v_f64m2

#define vsseg3e64_v_f64m2 ( ... ) __riscv_vsseg3e64_v_f64m2(__VA_ARGS__)

◆ vsseg3e64_v_f64m2_m

#define vsseg3e64_v_f64m2_m ( ... ) __riscv_vsseg3e64_v_f64m2_m(__VA_ARGS__)

◆ vsseg3e64_v_i64m1

#define vsseg3e64_v_i64m1 ( ... ) __riscv_vsseg3e64_v_i64m1(__VA_ARGS__)

◆ vsseg3e64_v_i64m1_m

#define vsseg3e64_v_i64m1_m ( ... ) __riscv_vsseg3e64_v_i64m1_m(__VA_ARGS__)

◆ vsseg3e64_v_i64m2

#define vsseg3e64_v_i64m2 ( ... ) __riscv_vsseg3e64_v_i64m2(__VA_ARGS__)

◆ vsseg3e64_v_i64m2_m

#define vsseg3e64_v_i64m2_m ( ... ) __riscv_vsseg3e64_v_i64m2_m(__VA_ARGS__)

◆ vsseg3e64_v_u64m1

#define vsseg3e64_v_u64m1 ( ... ) __riscv_vsseg3e64_v_u64m1(__VA_ARGS__)

◆ vsseg3e64_v_u64m1_m

#define vsseg3e64_v_u64m1_m ( ... ) __riscv_vsseg3e64_v_u64m1_m(__VA_ARGS__)

◆ vsseg3e64_v_u64m2

#define vsseg3e64_v_u64m2 ( ... ) __riscv_vsseg3e64_v_u64m2(__VA_ARGS__)

◆ vsseg3e64_v_u64m2_m

#define vsseg3e64_v_u64m2_m ( ... ) __riscv_vsseg3e64_v_u64m2_m(__VA_ARGS__)

◆ vsseg3e8_v_i8m1

#define vsseg3e8_v_i8m1 ( ... ) __riscv_vsseg3e8_v_i8m1(__VA_ARGS__)

◆ vsseg3e8_v_i8m1_m

#define vsseg3e8_v_i8m1_m ( ... ) __riscv_vsseg3e8_v_i8m1_m(__VA_ARGS__)

◆ vsseg3e8_v_i8m2

#define vsseg3e8_v_i8m2 ( ... ) __riscv_vsseg3e8_v_i8m2(__VA_ARGS__)

◆ vsseg3e8_v_i8m2_m

#define vsseg3e8_v_i8m2_m ( ... ) __riscv_vsseg3e8_v_i8m2_m(__VA_ARGS__)

◆ vsseg3e8_v_i8mf2

#define vsseg3e8_v_i8mf2 ( ... ) __riscv_vsseg3e8_v_i8mf2(__VA_ARGS__)

◆ vsseg3e8_v_i8mf2_m

#define vsseg3e8_v_i8mf2_m ( ... ) __riscv_vsseg3e8_v_i8mf2_m(__VA_ARGS__)

◆ vsseg3e8_v_i8mf4

#define vsseg3e8_v_i8mf4 ( ... ) __riscv_vsseg3e8_v_i8mf4(__VA_ARGS__)

◆ vsseg3e8_v_i8mf4_m

#define vsseg3e8_v_i8mf4_m ( ... ) __riscv_vsseg3e8_v_i8mf4_m(__VA_ARGS__)

◆ vsseg3e8_v_i8mf8

#define vsseg3e8_v_i8mf8 ( ... ) __riscv_vsseg3e8_v_i8mf8(__VA_ARGS__)

◆ vsseg3e8_v_i8mf8_m

#define vsseg3e8_v_i8mf8_m ( ... ) __riscv_vsseg3e8_v_i8mf8_m(__VA_ARGS__)

◆ vsseg3e8_v_u8m1

#define vsseg3e8_v_u8m1 ( ... ) __riscv_vsseg3e8_v_u8m1(__VA_ARGS__)

◆ vsseg3e8_v_u8m1_m

#define vsseg3e8_v_u8m1_m ( ... ) __riscv_vsseg3e8_v_u8m1_m(__VA_ARGS__)

◆ vsseg3e8_v_u8m2

#define vsseg3e8_v_u8m2 ( ... ) __riscv_vsseg3e8_v_u8m2(__VA_ARGS__)

◆ vsseg3e8_v_u8m2_m

#define vsseg3e8_v_u8m2_m ( ... ) __riscv_vsseg3e8_v_u8m2_m(__VA_ARGS__)

◆ vsseg3e8_v_u8mf2

#define vsseg3e8_v_u8mf2 ( ... ) __riscv_vsseg3e8_v_u8mf2(__VA_ARGS__)

◆ vsseg3e8_v_u8mf2_m

#define vsseg3e8_v_u8mf2_m ( ... ) __riscv_vsseg3e8_v_u8mf2_m(__VA_ARGS__)

◆ vsseg3e8_v_u8mf4

#define vsseg3e8_v_u8mf4 ( ... ) __riscv_vsseg3e8_v_u8mf4(__VA_ARGS__)

◆ vsseg3e8_v_u8mf4_m

#define vsseg3e8_v_u8mf4_m ( ... ) __riscv_vsseg3e8_v_u8mf4_m(__VA_ARGS__)

◆ vsseg3e8_v_u8mf8

#define vsseg3e8_v_u8mf8 ( ... ) __riscv_vsseg3e8_v_u8mf8(__VA_ARGS__)

◆ vsseg3e8_v_u8mf8_m

#define vsseg3e8_v_u8mf8_m ( ... ) __riscv_vsseg3e8_v_u8mf8_m(__VA_ARGS__)

◆ vsseg4e16_v_f16m1

#define vsseg4e16_v_f16m1 ( ... ) __riscv_vsseg4e16_v_f16m1(__VA_ARGS__)

◆ vsseg4e16_v_f16m1_m

#define vsseg4e16_v_f16m1_m ( ... ) __riscv_vsseg4e16_v_f16m1_m(__VA_ARGS__)

◆ vsseg4e16_v_f16m2

#define vsseg4e16_v_f16m2 ( ... ) __riscv_vsseg4e16_v_f16m2(__VA_ARGS__)

◆ vsseg4e16_v_f16m2_m

#define vsseg4e16_v_f16m2_m ( ... ) __riscv_vsseg4e16_v_f16m2_m(__VA_ARGS__)

◆ vsseg4e16_v_f16mf2

#define vsseg4e16_v_f16mf2 ( ... ) __riscv_vsseg4e16_v_f16mf2(__VA_ARGS__)

◆ vsseg4e16_v_f16mf2_m

#define vsseg4e16_v_f16mf2_m ( ... ) __riscv_vsseg4e16_v_f16mf2_m(__VA_ARGS__)

◆ vsseg4e16_v_f16mf4

#define vsseg4e16_v_f16mf4 ( ... ) __riscv_vsseg4e16_v_f16mf4(__VA_ARGS__)

◆ vsseg4e16_v_f16mf4_m

#define vsseg4e16_v_f16mf4_m ( ... ) __riscv_vsseg4e16_v_f16mf4_m(__VA_ARGS__)

◆ vsseg4e16_v_i16m1

#define vsseg4e16_v_i16m1 ( ... ) __riscv_vsseg4e16_v_i16m1(__VA_ARGS__)

◆ vsseg4e16_v_i16m1_m

#define vsseg4e16_v_i16m1_m ( ... ) __riscv_vsseg4e16_v_i16m1_m(__VA_ARGS__)

◆ vsseg4e16_v_i16m2

#define vsseg4e16_v_i16m2 ( ... ) __riscv_vsseg4e16_v_i16m2(__VA_ARGS__)

◆ vsseg4e16_v_i16m2_m

#define vsseg4e16_v_i16m2_m ( ... ) __riscv_vsseg4e16_v_i16m2_m(__VA_ARGS__)

◆ vsseg4e16_v_i16mf2

#define vsseg4e16_v_i16mf2 ( ... ) __riscv_vsseg4e16_v_i16mf2(__VA_ARGS__)

◆ vsseg4e16_v_i16mf2_m

#define vsseg4e16_v_i16mf2_m ( ... ) __riscv_vsseg4e16_v_i16mf2_m(__VA_ARGS__)

◆ vsseg4e16_v_i16mf4

#define vsseg4e16_v_i16mf4 ( ... ) __riscv_vsseg4e16_v_i16mf4(__VA_ARGS__)

◆ vsseg4e16_v_i16mf4_m

#define vsseg4e16_v_i16mf4_m ( ... ) __riscv_vsseg4e16_v_i16mf4_m(__VA_ARGS__)

◆ vsseg4e16_v_u16m1

#define vsseg4e16_v_u16m1 ( ... ) __riscv_vsseg4e16_v_u16m1(__VA_ARGS__)

◆ vsseg4e16_v_u16m1_m

#define vsseg4e16_v_u16m1_m ( ... ) __riscv_vsseg4e16_v_u16m1_m(__VA_ARGS__)

◆ vsseg4e16_v_u16m2

#define vsseg4e16_v_u16m2 ( ... ) __riscv_vsseg4e16_v_u16m2(__VA_ARGS__)

◆ vsseg4e16_v_u16m2_m

#define vsseg4e16_v_u16m2_m ( ... ) __riscv_vsseg4e16_v_u16m2_m(__VA_ARGS__)

◆ vsseg4e16_v_u16mf2

#define vsseg4e16_v_u16mf2 ( ... ) __riscv_vsseg4e16_v_u16mf2(__VA_ARGS__)

◆ vsseg4e16_v_u16mf2_m

#define vsseg4e16_v_u16mf2_m ( ... ) __riscv_vsseg4e16_v_u16mf2_m(__VA_ARGS__)

◆ vsseg4e16_v_u16mf4

#define vsseg4e16_v_u16mf4 ( ... ) __riscv_vsseg4e16_v_u16mf4(__VA_ARGS__)

◆ vsseg4e16_v_u16mf4_m

#define vsseg4e16_v_u16mf4_m ( ... ) __riscv_vsseg4e16_v_u16mf4_m(__VA_ARGS__)

◆ vsseg4e32_v_f32m1

#define vsseg4e32_v_f32m1 ( ... ) __riscv_vsseg4e32_v_f32m1(__VA_ARGS__)

◆ vsseg4e32_v_f32m1_m

#define vsseg4e32_v_f32m1_m ( ... ) __riscv_vsseg4e32_v_f32m1_m(__VA_ARGS__)

◆ vsseg4e32_v_f32m2

#define vsseg4e32_v_f32m2 ( ... ) __riscv_vsseg4e32_v_f32m2(__VA_ARGS__)

◆ vsseg4e32_v_f32m2_m

#define vsseg4e32_v_f32m2_m ( ... ) __riscv_vsseg4e32_v_f32m2_m(__VA_ARGS__)

◆ vsseg4e32_v_f32mf2

#define vsseg4e32_v_f32mf2 ( ... ) __riscv_vsseg4e32_v_f32mf2(__VA_ARGS__)

◆ vsseg4e32_v_f32mf2_m

#define vsseg4e32_v_f32mf2_m ( ... ) __riscv_vsseg4e32_v_f32mf2_m(__VA_ARGS__)

◆ vsseg4e32_v_i32m1

#define vsseg4e32_v_i32m1 ( ... ) __riscv_vsseg4e32_v_i32m1(__VA_ARGS__)

◆ vsseg4e32_v_i32m1_m

#define vsseg4e32_v_i32m1_m ( ... ) __riscv_vsseg4e32_v_i32m1_m(__VA_ARGS__)

◆ vsseg4e32_v_i32m2

#define vsseg4e32_v_i32m2 ( ... ) __riscv_vsseg4e32_v_i32m2(__VA_ARGS__)

◆ vsseg4e32_v_i32m2_m

#define vsseg4e32_v_i32m2_m ( ... ) __riscv_vsseg4e32_v_i32m2_m(__VA_ARGS__)

◆ vsseg4e32_v_i32mf2

#define vsseg4e32_v_i32mf2 ( ... ) __riscv_vsseg4e32_v_i32mf2(__VA_ARGS__)

◆ vsseg4e32_v_i32mf2_m

#define vsseg4e32_v_i32mf2_m ( ... ) __riscv_vsseg4e32_v_i32mf2_m(__VA_ARGS__)

◆ vsseg4e32_v_u32m1

#define vsseg4e32_v_u32m1 ( ... ) __riscv_vsseg4e32_v_u32m1(__VA_ARGS__)

◆ vsseg4e32_v_u32m1_m

#define vsseg4e32_v_u32m1_m ( ... ) __riscv_vsseg4e32_v_u32m1_m(__VA_ARGS__)

◆ vsseg4e32_v_u32m2

#define vsseg4e32_v_u32m2 ( ... ) __riscv_vsseg4e32_v_u32m2(__VA_ARGS__)

◆ vsseg4e32_v_u32m2_m

#define vsseg4e32_v_u32m2_m ( ... ) __riscv_vsseg4e32_v_u32m2_m(__VA_ARGS__)

◆ vsseg4e32_v_u32mf2

#define vsseg4e32_v_u32mf2 ( ... ) __riscv_vsseg4e32_v_u32mf2(__VA_ARGS__)

◆ vsseg4e32_v_u32mf2_m

#define vsseg4e32_v_u32mf2_m ( ... ) __riscv_vsseg4e32_v_u32mf2_m(__VA_ARGS__)

◆ vsseg4e64_v_f64m1

#define vsseg4e64_v_f64m1 ( ... ) __riscv_vsseg4e64_v_f64m1(__VA_ARGS__)

◆ vsseg4e64_v_f64m1_m

#define vsseg4e64_v_f64m1_m ( ... ) __riscv_vsseg4e64_v_f64m1_m(__VA_ARGS__)

◆ vsseg4e64_v_f64m2

#define vsseg4e64_v_f64m2 ( ... ) __riscv_vsseg4e64_v_f64m2(__VA_ARGS__)

◆ vsseg4e64_v_f64m2_m

#define vsseg4e64_v_f64m2_m ( ... ) __riscv_vsseg4e64_v_f64m2_m(__VA_ARGS__)

◆ vsseg4e64_v_i64m1

#define vsseg4e64_v_i64m1 ( ... ) __riscv_vsseg4e64_v_i64m1(__VA_ARGS__)

◆ vsseg4e64_v_i64m1_m

#define vsseg4e64_v_i64m1_m ( ... ) __riscv_vsseg4e64_v_i64m1_m(__VA_ARGS__)

◆ vsseg4e64_v_i64m2

#define vsseg4e64_v_i64m2 ( ... ) __riscv_vsseg4e64_v_i64m2(__VA_ARGS__)

◆ vsseg4e64_v_i64m2_m

#define vsseg4e64_v_i64m2_m ( ... ) __riscv_vsseg4e64_v_i64m2_m(__VA_ARGS__)

◆ vsseg4e64_v_u64m1

#define vsseg4e64_v_u64m1 ( ... ) __riscv_vsseg4e64_v_u64m1(__VA_ARGS__)

◆ vsseg4e64_v_u64m1_m

#define vsseg4e64_v_u64m1_m ( ... ) __riscv_vsseg4e64_v_u64m1_m(__VA_ARGS__)

◆ vsseg4e64_v_u64m2

#define vsseg4e64_v_u64m2 ( ... ) __riscv_vsseg4e64_v_u64m2(__VA_ARGS__)

◆ vsseg4e64_v_u64m2_m

#define vsseg4e64_v_u64m2_m ( ... ) __riscv_vsseg4e64_v_u64m2_m(__VA_ARGS__)

◆ vsseg4e8_v_i8m1

#define vsseg4e8_v_i8m1 ( ... ) __riscv_vsseg4e8_v_i8m1(__VA_ARGS__)

◆ vsseg4e8_v_i8m1_m

#define vsseg4e8_v_i8m1_m ( ... ) __riscv_vsseg4e8_v_i8m1_m(__VA_ARGS__)

◆ vsseg4e8_v_i8m2

#define vsseg4e8_v_i8m2 ( ... ) __riscv_vsseg4e8_v_i8m2(__VA_ARGS__)

◆ vsseg4e8_v_i8m2_m

#define vsseg4e8_v_i8m2_m ( ... ) __riscv_vsseg4e8_v_i8m2_m(__VA_ARGS__)

◆ vsseg4e8_v_i8mf2

#define vsseg4e8_v_i8mf2 ( ... ) __riscv_vsseg4e8_v_i8mf2(__VA_ARGS__)

◆ vsseg4e8_v_i8mf2_m

#define vsseg4e8_v_i8mf2_m ( ... ) __riscv_vsseg4e8_v_i8mf2_m(__VA_ARGS__)

◆ vsseg4e8_v_i8mf4

#define vsseg4e8_v_i8mf4 ( ... ) __riscv_vsseg4e8_v_i8mf4(__VA_ARGS__)

◆ vsseg4e8_v_i8mf4_m

#define vsseg4e8_v_i8mf4_m ( ... ) __riscv_vsseg4e8_v_i8mf4_m(__VA_ARGS__)

◆ vsseg4e8_v_i8mf8

#define vsseg4e8_v_i8mf8 ( ... ) __riscv_vsseg4e8_v_i8mf8(__VA_ARGS__)

◆ vsseg4e8_v_i8mf8_m

#define vsseg4e8_v_i8mf8_m ( ... ) __riscv_vsseg4e8_v_i8mf8_m(__VA_ARGS__)

◆ vsseg4e8_v_u8m1

#define vsseg4e8_v_u8m1 ( ... ) __riscv_vsseg4e8_v_u8m1(__VA_ARGS__)

◆ vsseg4e8_v_u8m1_m

#define vsseg4e8_v_u8m1_m ( ... ) __riscv_vsseg4e8_v_u8m1_m(__VA_ARGS__)

◆ vsseg4e8_v_u8m2

#define vsseg4e8_v_u8m2 ( ... ) __riscv_vsseg4e8_v_u8m2(__VA_ARGS__)

◆ vsseg4e8_v_u8m2_m

#define vsseg4e8_v_u8m2_m ( ... ) __riscv_vsseg4e8_v_u8m2_m(__VA_ARGS__)

◆ vsseg4e8_v_u8mf2

#define vsseg4e8_v_u8mf2 ( ... ) __riscv_vsseg4e8_v_u8mf2(__VA_ARGS__)

◆ vsseg4e8_v_u8mf2_m

#define vsseg4e8_v_u8mf2_m ( ... ) __riscv_vsseg4e8_v_u8mf2_m(__VA_ARGS__)

◆ vsseg4e8_v_u8mf4

#define vsseg4e8_v_u8mf4 ( ... ) __riscv_vsseg4e8_v_u8mf4(__VA_ARGS__)

◆ vsseg4e8_v_u8mf4_m

#define vsseg4e8_v_u8mf4_m ( ... ) __riscv_vsseg4e8_v_u8mf4_m(__VA_ARGS__)

◆ vsseg4e8_v_u8mf8

#define vsseg4e8_v_u8mf8 ( ... ) __riscv_vsseg4e8_v_u8mf8(__VA_ARGS__)

◆ vsseg4e8_v_u8mf8_m

#define vsseg4e8_v_u8mf8_m ( ... ) __riscv_vsseg4e8_v_u8mf8_m(__VA_ARGS__)

◆ vsseg5e16_v_f16m1

#define vsseg5e16_v_f16m1 ( ... ) __riscv_vsseg5e16_v_f16m1(__VA_ARGS__)

◆ vsseg5e16_v_f16m1_m

#define vsseg5e16_v_f16m1_m ( ... ) __riscv_vsseg5e16_v_f16m1_m(__VA_ARGS__)

◆ vsseg5e16_v_f16mf2

#define vsseg5e16_v_f16mf2 ( ... ) __riscv_vsseg5e16_v_f16mf2(__VA_ARGS__)

◆ vsseg5e16_v_f16mf2_m

#define vsseg5e16_v_f16mf2_m ( ... ) __riscv_vsseg5e16_v_f16mf2_m(__VA_ARGS__)

◆ vsseg5e16_v_f16mf4

#define vsseg5e16_v_f16mf4 ( ... ) __riscv_vsseg5e16_v_f16mf4(__VA_ARGS__)

◆ vsseg5e16_v_f16mf4_m

#define vsseg5e16_v_f16mf4_m ( ... ) __riscv_vsseg5e16_v_f16mf4_m(__VA_ARGS__)

◆ vsseg5e16_v_i16m1

#define vsseg5e16_v_i16m1 ( ... ) __riscv_vsseg5e16_v_i16m1(__VA_ARGS__)

◆ vsseg5e16_v_i16m1_m

#define vsseg5e16_v_i16m1_m ( ... ) __riscv_vsseg5e16_v_i16m1_m(__VA_ARGS__)

◆ vsseg5e16_v_i16mf2

#define vsseg5e16_v_i16mf2 ( ... ) __riscv_vsseg5e16_v_i16mf2(__VA_ARGS__)

◆ vsseg5e16_v_i16mf2_m

#define vsseg5e16_v_i16mf2_m ( ... ) __riscv_vsseg5e16_v_i16mf2_m(__VA_ARGS__)

◆ vsseg5e16_v_i16mf4

#define vsseg5e16_v_i16mf4 ( ... ) __riscv_vsseg5e16_v_i16mf4(__VA_ARGS__)

◆ vsseg5e16_v_i16mf4_m

#define vsseg5e16_v_i16mf4_m ( ... ) __riscv_vsseg5e16_v_i16mf4_m(__VA_ARGS__)

◆ vsseg5e16_v_u16m1

#define vsseg5e16_v_u16m1 ( ... ) __riscv_vsseg5e16_v_u16m1(__VA_ARGS__)

◆ vsseg5e16_v_u16m1_m

#define vsseg5e16_v_u16m1_m ( ... ) __riscv_vsseg5e16_v_u16m1_m(__VA_ARGS__)

◆ vsseg5e16_v_u16mf2

#define vsseg5e16_v_u16mf2 ( ... ) __riscv_vsseg5e16_v_u16mf2(__VA_ARGS__)

◆ vsseg5e16_v_u16mf2_m

#define vsseg5e16_v_u16mf2_m ( ... ) __riscv_vsseg5e16_v_u16mf2_m(__VA_ARGS__)

◆ vsseg5e16_v_u16mf4

#define vsseg5e16_v_u16mf4 ( ... ) __riscv_vsseg5e16_v_u16mf4(__VA_ARGS__)

◆ vsseg5e16_v_u16mf4_m

#define vsseg5e16_v_u16mf4_m ( ... ) __riscv_vsseg5e16_v_u16mf4_m(__VA_ARGS__)

◆ vsseg5e32_v_f32m1

#define vsseg5e32_v_f32m1 ( ... ) __riscv_vsseg5e32_v_f32m1(__VA_ARGS__)

◆ vsseg5e32_v_f32m1_m

#define vsseg5e32_v_f32m1_m ( ... ) __riscv_vsseg5e32_v_f32m1_m(__VA_ARGS__)

◆ vsseg5e32_v_f32mf2

#define vsseg5e32_v_f32mf2 ( ... ) __riscv_vsseg5e32_v_f32mf2(__VA_ARGS__)

◆ vsseg5e32_v_f32mf2_m

#define vsseg5e32_v_f32mf2_m ( ... ) __riscv_vsseg5e32_v_f32mf2_m(__VA_ARGS__)

◆ vsseg5e32_v_i32m1

#define vsseg5e32_v_i32m1 ( ... ) __riscv_vsseg5e32_v_i32m1(__VA_ARGS__)

◆ vsseg5e32_v_i32m1_m

#define vsseg5e32_v_i32m1_m ( ... ) __riscv_vsseg5e32_v_i32m1_m(__VA_ARGS__)

◆ vsseg5e32_v_i32mf2

#define vsseg5e32_v_i32mf2 ( ... ) __riscv_vsseg5e32_v_i32mf2(__VA_ARGS__)

◆ vsseg5e32_v_i32mf2_m

#define vsseg5e32_v_i32mf2_m ( ... ) __riscv_vsseg5e32_v_i32mf2_m(__VA_ARGS__)

◆ vsseg5e32_v_u32m1

#define vsseg5e32_v_u32m1 ( ... ) __riscv_vsseg5e32_v_u32m1(__VA_ARGS__)

◆ vsseg5e32_v_u32m1_m

#define vsseg5e32_v_u32m1_m ( ... ) __riscv_vsseg5e32_v_u32m1_m(__VA_ARGS__)

◆ vsseg5e32_v_u32mf2

#define vsseg5e32_v_u32mf2 ( ... ) __riscv_vsseg5e32_v_u32mf2(__VA_ARGS__)

◆ vsseg5e32_v_u32mf2_m

#define vsseg5e32_v_u32mf2_m ( ... ) __riscv_vsseg5e32_v_u32mf2_m(__VA_ARGS__)

◆ vsseg5e64_v_f64m1

#define vsseg5e64_v_f64m1 ( ... ) __riscv_vsseg5e64_v_f64m1(__VA_ARGS__)

◆ vsseg5e64_v_f64m1_m

#define vsseg5e64_v_f64m1_m ( ... ) __riscv_vsseg5e64_v_f64m1_m(__VA_ARGS__)

◆ vsseg5e64_v_i64m1

#define vsseg5e64_v_i64m1 ( ... ) __riscv_vsseg5e64_v_i64m1(__VA_ARGS__)

◆ vsseg5e64_v_i64m1_m

#define vsseg5e64_v_i64m1_m ( ... ) __riscv_vsseg5e64_v_i64m1_m(__VA_ARGS__)

◆ vsseg5e64_v_u64m1

#define vsseg5e64_v_u64m1 ( ... ) __riscv_vsseg5e64_v_u64m1(__VA_ARGS__)

◆ vsseg5e64_v_u64m1_m

#define vsseg5e64_v_u64m1_m ( ... ) __riscv_vsseg5e64_v_u64m1_m(__VA_ARGS__)

◆ vsseg5e8_v_i8m1

#define vsseg5e8_v_i8m1 ( ... ) __riscv_vsseg5e8_v_i8m1(__VA_ARGS__)

◆ vsseg5e8_v_i8m1_m

#define vsseg5e8_v_i8m1_m ( ... ) __riscv_vsseg5e8_v_i8m1_m(__VA_ARGS__)

◆ vsseg5e8_v_i8mf2

#define vsseg5e8_v_i8mf2 ( ... ) __riscv_vsseg5e8_v_i8mf2(__VA_ARGS__)

◆ vsseg5e8_v_i8mf2_m

#define vsseg5e8_v_i8mf2_m ( ... ) __riscv_vsseg5e8_v_i8mf2_m(__VA_ARGS__)

◆ vsseg5e8_v_i8mf4

#define vsseg5e8_v_i8mf4 ( ... ) __riscv_vsseg5e8_v_i8mf4(__VA_ARGS__)

◆ vsseg5e8_v_i8mf4_m

#define vsseg5e8_v_i8mf4_m ( ... ) __riscv_vsseg5e8_v_i8mf4_m(__VA_ARGS__)

◆ vsseg5e8_v_i8mf8

#define vsseg5e8_v_i8mf8 ( ... ) __riscv_vsseg5e8_v_i8mf8(__VA_ARGS__)

◆ vsseg5e8_v_i8mf8_m

#define vsseg5e8_v_i8mf8_m ( ... ) __riscv_vsseg5e8_v_i8mf8_m(__VA_ARGS__)

◆ vsseg5e8_v_u8m1

#define vsseg5e8_v_u8m1 ( ... ) __riscv_vsseg5e8_v_u8m1(__VA_ARGS__)

◆ vsseg5e8_v_u8m1_m

#define vsseg5e8_v_u8m1_m ( ... ) __riscv_vsseg5e8_v_u8m1_m(__VA_ARGS__)

◆ vsseg5e8_v_u8mf2

#define vsseg5e8_v_u8mf2 ( ... ) __riscv_vsseg5e8_v_u8mf2(__VA_ARGS__)

◆ vsseg5e8_v_u8mf2_m

#define vsseg5e8_v_u8mf2_m ( ... ) __riscv_vsseg5e8_v_u8mf2_m(__VA_ARGS__)

◆ vsseg5e8_v_u8mf4

#define vsseg5e8_v_u8mf4 ( ... ) __riscv_vsseg5e8_v_u8mf4(__VA_ARGS__)

◆ vsseg5e8_v_u8mf4_m

#define vsseg5e8_v_u8mf4_m ( ... ) __riscv_vsseg5e8_v_u8mf4_m(__VA_ARGS__)

◆ vsseg5e8_v_u8mf8

#define vsseg5e8_v_u8mf8 ( ... ) __riscv_vsseg5e8_v_u8mf8(__VA_ARGS__)

◆ vsseg5e8_v_u8mf8_m

#define vsseg5e8_v_u8mf8_m ( ... ) __riscv_vsseg5e8_v_u8mf8_m(__VA_ARGS__)

◆ vsseg6e16_v_f16m1

#define vsseg6e16_v_f16m1 ( ... ) __riscv_vsseg6e16_v_f16m1(__VA_ARGS__)

◆ vsseg6e16_v_f16m1_m

#define vsseg6e16_v_f16m1_m ( ... ) __riscv_vsseg6e16_v_f16m1_m(__VA_ARGS__)

◆ vsseg6e16_v_f16mf2

#define vsseg6e16_v_f16mf2 ( ... ) __riscv_vsseg6e16_v_f16mf2(__VA_ARGS__)

◆ vsseg6e16_v_f16mf2_m

#define vsseg6e16_v_f16mf2_m ( ... ) __riscv_vsseg6e16_v_f16mf2_m(__VA_ARGS__)

◆ vsseg6e16_v_f16mf4

#define vsseg6e16_v_f16mf4 ( ... ) __riscv_vsseg6e16_v_f16mf4(__VA_ARGS__)

◆ vsseg6e16_v_f16mf4_m

#define vsseg6e16_v_f16mf4_m ( ... ) __riscv_vsseg6e16_v_f16mf4_m(__VA_ARGS__)

◆ vsseg6e16_v_i16m1

#define vsseg6e16_v_i16m1 ( ... ) __riscv_vsseg6e16_v_i16m1(__VA_ARGS__)

◆ vsseg6e16_v_i16m1_m

#define vsseg6e16_v_i16m1_m ( ... ) __riscv_vsseg6e16_v_i16m1_m(__VA_ARGS__)

◆ vsseg6e16_v_i16mf2

#define vsseg6e16_v_i16mf2 ( ... ) __riscv_vsseg6e16_v_i16mf2(__VA_ARGS__)

◆ vsseg6e16_v_i16mf2_m

#define vsseg6e16_v_i16mf2_m ( ... ) __riscv_vsseg6e16_v_i16mf2_m(__VA_ARGS__)

◆ vsseg6e16_v_i16mf4

#define vsseg6e16_v_i16mf4 ( ... ) __riscv_vsseg6e16_v_i16mf4(__VA_ARGS__)

◆ vsseg6e16_v_i16mf4_m

#define vsseg6e16_v_i16mf4_m ( ... ) __riscv_vsseg6e16_v_i16mf4_m(__VA_ARGS__)

◆ vsseg6e16_v_u16m1

#define vsseg6e16_v_u16m1 ( ... ) __riscv_vsseg6e16_v_u16m1(__VA_ARGS__)

◆ vsseg6e16_v_u16m1_m

#define vsseg6e16_v_u16m1_m ( ... ) __riscv_vsseg6e16_v_u16m1_m(__VA_ARGS__)

◆ vsseg6e16_v_u16mf2

#define vsseg6e16_v_u16mf2 ( ... ) __riscv_vsseg6e16_v_u16mf2(__VA_ARGS__)

◆ vsseg6e16_v_u16mf2_m

#define vsseg6e16_v_u16mf2_m ( ... ) __riscv_vsseg6e16_v_u16mf2_m(__VA_ARGS__)

◆ vsseg6e16_v_u16mf4

#define vsseg6e16_v_u16mf4 ( ... ) __riscv_vsseg6e16_v_u16mf4(__VA_ARGS__)

◆ vsseg6e16_v_u16mf4_m

#define vsseg6e16_v_u16mf4_m ( ... ) __riscv_vsseg6e16_v_u16mf4_m(__VA_ARGS__)

◆ vsseg6e32_v_f32m1

#define vsseg6e32_v_f32m1 ( ... ) __riscv_vsseg6e32_v_f32m1(__VA_ARGS__)

◆ vsseg6e32_v_f32m1_m

#define vsseg6e32_v_f32m1_m ( ... ) __riscv_vsseg6e32_v_f32m1_m(__VA_ARGS__)

◆ vsseg6e32_v_f32mf2

#define vsseg6e32_v_f32mf2 ( ... ) __riscv_vsseg6e32_v_f32mf2(__VA_ARGS__)

◆ vsseg6e32_v_f32mf2_m

#define vsseg6e32_v_f32mf2_m ( ... ) __riscv_vsseg6e32_v_f32mf2_m(__VA_ARGS__)

◆ vsseg6e32_v_i32m1

#define vsseg6e32_v_i32m1 ( ... ) __riscv_vsseg6e32_v_i32m1(__VA_ARGS__)

◆ vsseg6e32_v_i32m1_m

#define vsseg6e32_v_i32m1_m ( ... ) __riscv_vsseg6e32_v_i32m1_m(__VA_ARGS__)

◆ vsseg6e32_v_i32mf2

#define vsseg6e32_v_i32mf2 ( ... ) __riscv_vsseg6e32_v_i32mf2(__VA_ARGS__)

◆ vsseg6e32_v_i32mf2_m

#define vsseg6e32_v_i32mf2_m ( ... ) __riscv_vsseg6e32_v_i32mf2_m(__VA_ARGS__)

◆ vsseg6e32_v_u32m1

#define vsseg6e32_v_u32m1 ( ... ) __riscv_vsseg6e32_v_u32m1(__VA_ARGS__)

◆ vsseg6e32_v_u32m1_m

#define vsseg6e32_v_u32m1_m ( ... ) __riscv_vsseg6e32_v_u32m1_m(__VA_ARGS__)

◆ vsseg6e32_v_u32mf2

#define vsseg6e32_v_u32mf2 ( ... ) __riscv_vsseg6e32_v_u32mf2(__VA_ARGS__)

◆ vsseg6e32_v_u32mf2_m

#define vsseg6e32_v_u32mf2_m ( ... ) __riscv_vsseg6e32_v_u32mf2_m(__VA_ARGS__)

◆ vsseg6e64_v_f64m1

#define vsseg6e64_v_f64m1 ( ... ) __riscv_vsseg6e64_v_f64m1(__VA_ARGS__)

◆ vsseg6e64_v_f64m1_m

#define vsseg6e64_v_f64m1_m ( ... ) __riscv_vsseg6e64_v_f64m1_m(__VA_ARGS__)

◆ vsseg6e64_v_i64m1

#define vsseg6e64_v_i64m1 ( ... ) __riscv_vsseg6e64_v_i64m1(__VA_ARGS__)

◆ vsseg6e64_v_i64m1_m

#define vsseg6e64_v_i64m1_m ( ... ) __riscv_vsseg6e64_v_i64m1_m(__VA_ARGS__)

◆ vsseg6e64_v_u64m1

#define vsseg6e64_v_u64m1 ( ... ) __riscv_vsseg6e64_v_u64m1(__VA_ARGS__)

◆ vsseg6e64_v_u64m1_m

#define vsseg6e64_v_u64m1_m ( ... ) __riscv_vsseg6e64_v_u64m1_m(__VA_ARGS__)

◆ vsseg6e8_v_i8m1

#define vsseg6e8_v_i8m1 ( ... ) __riscv_vsseg6e8_v_i8m1(__VA_ARGS__)

◆ vsseg6e8_v_i8m1_m

#define vsseg6e8_v_i8m1_m ( ... ) __riscv_vsseg6e8_v_i8m1_m(__VA_ARGS__)

◆ vsseg6e8_v_i8mf2

#define vsseg6e8_v_i8mf2 ( ... ) __riscv_vsseg6e8_v_i8mf2(__VA_ARGS__)

◆ vsseg6e8_v_i8mf2_m

#define vsseg6e8_v_i8mf2_m ( ... ) __riscv_vsseg6e8_v_i8mf2_m(__VA_ARGS__)

◆ vsseg6e8_v_i8mf4

#define vsseg6e8_v_i8mf4 ( ... ) __riscv_vsseg6e8_v_i8mf4(__VA_ARGS__)

◆ vsseg6e8_v_i8mf4_m

#define vsseg6e8_v_i8mf4_m ( ... ) __riscv_vsseg6e8_v_i8mf4_m(__VA_ARGS__)

◆ vsseg6e8_v_i8mf8

#define vsseg6e8_v_i8mf8 ( ... ) __riscv_vsseg6e8_v_i8mf8(__VA_ARGS__)

◆ vsseg6e8_v_i8mf8_m

#define vsseg6e8_v_i8mf8_m ( ... ) __riscv_vsseg6e8_v_i8mf8_m(__VA_ARGS__)

◆ vsseg6e8_v_u8m1

#define vsseg6e8_v_u8m1 ( ... ) __riscv_vsseg6e8_v_u8m1(__VA_ARGS__)

◆ vsseg6e8_v_u8m1_m

#define vsseg6e8_v_u8m1_m ( ... ) __riscv_vsseg6e8_v_u8m1_m(__VA_ARGS__)

◆ vsseg6e8_v_u8mf2

#define vsseg6e8_v_u8mf2 ( ... ) __riscv_vsseg6e8_v_u8mf2(__VA_ARGS__)

◆ vsseg6e8_v_u8mf2_m

#define vsseg6e8_v_u8mf2_m ( ... ) __riscv_vsseg6e8_v_u8mf2_m(__VA_ARGS__)

◆ vsseg6e8_v_u8mf4

#define vsseg6e8_v_u8mf4 ( ... ) __riscv_vsseg6e8_v_u8mf4(__VA_ARGS__)

◆ vsseg6e8_v_u8mf4_m

#define vsseg6e8_v_u8mf4_m ( ... ) __riscv_vsseg6e8_v_u8mf4_m(__VA_ARGS__)

◆ vsseg6e8_v_u8mf8

#define vsseg6e8_v_u8mf8 ( ... ) __riscv_vsseg6e8_v_u8mf8(__VA_ARGS__)

◆ vsseg6e8_v_u8mf8_m

#define vsseg6e8_v_u8mf8_m ( ... ) __riscv_vsseg6e8_v_u8mf8_m(__VA_ARGS__)

◆ vsseg7e16_v_f16m1

#define vsseg7e16_v_f16m1 ( ... ) __riscv_vsseg7e16_v_f16m1(__VA_ARGS__)

◆ vsseg7e16_v_f16m1_m

#define vsseg7e16_v_f16m1_m ( ... ) __riscv_vsseg7e16_v_f16m1_m(__VA_ARGS__)

◆ vsseg7e16_v_f16mf2

#define vsseg7e16_v_f16mf2 ( ... ) __riscv_vsseg7e16_v_f16mf2(__VA_ARGS__)

◆ vsseg7e16_v_f16mf2_m

#define vsseg7e16_v_f16mf2_m ( ... ) __riscv_vsseg7e16_v_f16mf2_m(__VA_ARGS__)

◆ vsseg7e16_v_f16mf4

#define vsseg7e16_v_f16mf4 ( ... ) __riscv_vsseg7e16_v_f16mf4(__VA_ARGS__)

◆ vsseg7e16_v_f16mf4_m

#define vsseg7e16_v_f16mf4_m ( ... ) __riscv_vsseg7e16_v_f16mf4_m(__VA_ARGS__)

◆ vsseg7e16_v_i16m1

#define vsseg7e16_v_i16m1 ( ... ) __riscv_vsseg7e16_v_i16m1(__VA_ARGS__)

◆ vsseg7e16_v_i16m1_m

#define vsseg7e16_v_i16m1_m ( ... ) __riscv_vsseg7e16_v_i16m1_m(__VA_ARGS__)

◆ vsseg7e16_v_i16mf2

#define vsseg7e16_v_i16mf2 ( ... ) __riscv_vsseg7e16_v_i16mf2(__VA_ARGS__)

◆ vsseg7e16_v_i16mf2_m

#define vsseg7e16_v_i16mf2_m ( ... ) __riscv_vsseg7e16_v_i16mf2_m(__VA_ARGS__)

◆ vsseg7e16_v_i16mf4

#define vsseg7e16_v_i16mf4 ( ... ) __riscv_vsseg7e16_v_i16mf4(__VA_ARGS__)

◆ vsseg7e16_v_i16mf4_m

#define vsseg7e16_v_i16mf4_m ( ... ) __riscv_vsseg7e16_v_i16mf4_m(__VA_ARGS__)

◆ vsseg7e16_v_u16m1

#define vsseg7e16_v_u16m1 ( ... ) __riscv_vsseg7e16_v_u16m1(__VA_ARGS__)

◆ vsseg7e16_v_u16m1_m

#define vsseg7e16_v_u16m1_m ( ... ) __riscv_vsseg7e16_v_u16m1_m(__VA_ARGS__)

◆ vsseg7e16_v_u16mf2

#define vsseg7e16_v_u16mf2 ( ... ) __riscv_vsseg7e16_v_u16mf2(__VA_ARGS__)

◆ vsseg7e16_v_u16mf2_m

#define vsseg7e16_v_u16mf2_m ( ... ) __riscv_vsseg7e16_v_u16mf2_m(__VA_ARGS__)

◆ vsseg7e16_v_u16mf4

#define vsseg7e16_v_u16mf4 ( ... ) __riscv_vsseg7e16_v_u16mf4(__VA_ARGS__)

◆ vsseg7e16_v_u16mf4_m

#define vsseg7e16_v_u16mf4_m ( ... ) __riscv_vsseg7e16_v_u16mf4_m(__VA_ARGS__)

◆ vsseg7e32_v_f32m1

#define vsseg7e32_v_f32m1 ( ... ) __riscv_vsseg7e32_v_f32m1(__VA_ARGS__)

◆ vsseg7e32_v_f32m1_m

#define vsseg7e32_v_f32m1_m ( ... ) __riscv_vsseg7e32_v_f32m1_m(__VA_ARGS__)

◆ vsseg7e32_v_f32mf2

#define vsseg7e32_v_f32mf2 ( ... ) __riscv_vsseg7e32_v_f32mf2(__VA_ARGS__)

◆ vsseg7e32_v_f32mf2_m

#define vsseg7e32_v_f32mf2_m ( ... ) __riscv_vsseg7e32_v_f32mf2_m(__VA_ARGS__)

◆ vsseg7e32_v_i32m1

#define vsseg7e32_v_i32m1 ( ... ) __riscv_vsseg7e32_v_i32m1(__VA_ARGS__)

◆ vsseg7e32_v_i32m1_m

#define vsseg7e32_v_i32m1_m ( ... ) __riscv_vsseg7e32_v_i32m1_m(__VA_ARGS__)

◆ vsseg7e32_v_i32mf2

#define vsseg7e32_v_i32mf2 ( ... ) __riscv_vsseg7e32_v_i32mf2(__VA_ARGS__)

◆ vsseg7e32_v_i32mf2_m

#define vsseg7e32_v_i32mf2_m ( ... ) __riscv_vsseg7e32_v_i32mf2_m(__VA_ARGS__)

◆ vsseg7e32_v_u32m1

#define vsseg7e32_v_u32m1 ( ... ) __riscv_vsseg7e32_v_u32m1(__VA_ARGS__)

◆ vsseg7e32_v_u32m1_m

#define vsseg7e32_v_u32m1_m ( ... ) __riscv_vsseg7e32_v_u32m1_m(__VA_ARGS__)

◆ vsseg7e32_v_u32mf2

#define vsseg7e32_v_u32mf2 ( ... ) __riscv_vsseg7e32_v_u32mf2(__VA_ARGS__)

◆ vsseg7e32_v_u32mf2_m

#define vsseg7e32_v_u32mf2_m ( ... ) __riscv_vsseg7e32_v_u32mf2_m(__VA_ARGS__)

◆ vsseg7e64_v_f64m1

#define vsseg7e64_v_f64m1 ( ... ) __riscv_vsseg7e64_v_f64m1(__VA_ARGS__)

◆ vsseg7e64_v_f64m1_m

#define vsseg7e64_v_f64m1_m ( ... ) __riscv_vsseg7e64_v_f64m1_m(__VA_ARGS__)

◆ vsseg7e64_v_i64m1

#define vsseg7e64_v_i64m1 ( ... ) __riscv_vsseg7e64_v_i64m1(__VA_ARGS__)

◆ vsseg7e64_v_i64m1_m

#define vsseg7e64_v_i64m1_m ( ... ) __riscv_vsseg7e64_v_i64m1_m(__VA_ARGS__)

◆ vsseg7e64_v_u64m1

#define vsseg7e64_v_u64m1 ( ... ) __riscv_vsseg7e64_v_u64m1(__VA_ARGS__)

◆ vsseg7e64_v_u64m1_m

#define vsseg7e64_v_u64m1_m ( ... ) __riscv_vsseg7e64_v_u64m1_m(__VA_ARGS__)

◆ vsseg7e8_v_i8m1

#define vsseg7e8_v_i8m1 ( ... ) __riscv_vsseg7e8_v_i8m1(__VA_ARGS__)

◆ vsseg7e8_v_i8m1_m

#define vsseg7e8_v_i8m1_m ( ... ) __riscv_vsseg7e8_v_i8m1_m(__VA_ARGS__)

◆ vsseg7e8_v_i8mf2

#define vsseg7e8_v_i8mf2 ( ... ) __riscv_vsseg7e8_v_i8mf2(__VA_ARGS__)

◆ vsseg7e8_v_i8mf2_m

#define vsseg7e8_v_i8mf2_m ( ... ) __riscv_vsseg7e8_v_i8mf2_m(__VA_ARGS__)

◆ vsseg7e8_v_i8mf4

#define vsseg7e8_v_i8mf4 ( ... ) __riscv_vsseg7e8_v_i8mf4(__VA_ARGS__)

◆ vsseg7e8_v_i8mf4_m

#define vsseg7e8_v_i8mf4_m ( ... ) __riscv_vsseg7e8_v_i8mf4_m(__VA_ARGS__)

◆ vsseg7e8_v_i8mf8

#define vsseg7e8_v_i8mf8 ( ... ) __riscv_vsseg7e8_v_i8mf8(__VA_ARGS__)

◆ vsseg7e8_v_i8mf8_m

#define vsseg7e8_v_i8mf8_m ( ... ) __riscv_vsseg7e8_v_i8mf8_m(__VA_ARGS__)

◆ vsseg7e8_v_u8m1

#define vsseg7e8_v_u8m1 ( ... ) __riscv_vsseg7e8_v_u8m1(__VA_ARGS__)

◆ vsseg7e8_v_u8m1_m

#define vsseg7e8_v_u8m1_m ( ... ) __riscv_vsseg7e8_v_u8m1_m(__VA_ARGS__)

◆ vsseg7e8_v_u8mf2

#define vsseg7e8_v_u8mf2 ( ... ) __riscv_vsseg7e8_v_u8mf2(__VA_ARGS__)

◆ vsseg7e8_v_u8mf2_m

#define vsseg7e8_v_u8mf2_m ( ... ) __riscv_vsseg7e8_v_u8mf2_m(__VA_ARGS__)

◆ vsseg7e8_v_u8mf4

#define vsseg7e8_v_u8mf4 ( ... ) __riscv_vsseg7e8_v_u8mf4(__VA_ARGS__)

◆ vsseg7e8_v_u8mf4_m

#define vsseg7e8_v_u8mf4_m ( ... ) __riscv_vsseg7e8_v_u8mf4_m(__VA_ARGS__)

◆ vsseg7e8_v_u8mf8

#define vsseg7e8_v_u8mf8 ( ... ) __riscv_vsseg7e8_v_u8mf8(__VA_ARGS__)

◆ vsseg7e8_v_u8mf8_m

#define vsseg7e8_v_u8mf8_m ( ... ) __riscv_vsseg7e8_v_u8mf8_m(__VA_ARGS__)

◆ vsseg8e16_v_f16m1

#define vsseg8e16_v_f16m1 ( ... ) __riscv_vsseg8e16_v_f16m1(__VA_ARGS__)

◆ vsseg8e16_v_f16m1_m

#define vsseg8e16_v_f16m1_m ( ... ) __riscv_vsseg8e16_v_f16m1_m(__VA_ARGS__)

◆ vsseg8e16_v_f16mf2

#define vsseg8e16_v_f16mf2 ( ... ) __riscv_vsseg8e16_v_f16mf2(__VA_ARGS__)

◆ vsseg8e16_v_f16mf2_m

#define vsseg8e16_v_f16mf2_m ( ... ) __riscv_vsseg8e16_v_f16mf2_m(__VA_ARGS__)

◆ vsseg8e16_v_f16mf4

#define vsseg8e16_v_f16mf4 ( ... ) __riscv_vsseg8e16_v_f16mf4(__VA_ARGS__)

◆ vsseg8e16_v_f16mf4_m

#define vsseg8e16_v_f16mf4_m ( ... ) __riscv_vsseg8e16_v_f16mf4_m(__VA_ARGS__)

◆ vsseg8e16_v_i16m1

#define vsseg8e16_v_i16m1 ( ... ) __riscv_vsseg8e16_v_i16m1(__VA_ARGS__)

◆ vsseg8e16_v_i16m1_m

#define vsseg8e16_v_i16m1_m ( ... ) __riscv_vsseg8e16_v_i16m1_m(__VA_ARGS__)

◆ vsseg8e16_v_i16mf2

#define vsseg8e16_v_i16mf2 ( ... ) __riscv_vsseg8e16_v_i16mf2(__VA_ARGS__)

◆ vsseg8e16_v_i16mf2_m

#define vsseg8e16_v_i16mf2_m ( ... ) __riscv_vsseg8e16_v_i16mf2_m(__VA_ARGS__)

◆ vsseg8e16_v_i16mf4

#define vsseg8e16_v_i16mf4 ( ... ) __riscv_vsseg8e16_v_i16mf4(__VA_ARGS__)

◆ vsseg8e16_v_i16mf4_m

#define vsseg8e16_v_i16mf4_m ( ... ) __riscv_vsseg8e16_v_i16mf4_m(__VA_ARGS__)

◆ vsseg8e16_v_u16m1

#define vsseg8e16_v_u16m1 ( ... ) __riscv_vsseg8e16_v_u16m1(__VA_ARGS__)

◆ vsseg8e16_v_u16m1_m

#define vsseg8e16_v_u16m1_m ( ... ) __riscv_vsseg8e16_v_u16m1_m(__VA_ARGS__)

◆ vsseg8e16_v_u16mf2

#define vsseg8e16_v_u16mf2 ( ... ) __riscv_vsseg8e16_v_u16mf2(__VA_ARGS__)

◆ vsseg8e16_v_u16mf2_m

#define vsseg8e16_v_u16mf2_m ( ... ) __riscv_vsseg8e16_v_u16mf2_m(__VA_ARGS__)

◆ vsseg8e16_v_u16mf4

#define vsseg8e16_v_u16mf4 ( ... ) __riscv_vsseg8e16_v_u16mf4(__VA_ARGS__)

◆ vsseg8e16_v_u16mf4_m

#define vsseg8e16_v_u16mf4_m ( ... ) __riscv_vsseg8e16_v_u16mf4_m(__VA_ARGS__)

◆ vsseg8e32_v_f32m1

#define vsseg8e32_v_f32m1 ( ... ) __riscv_vsseg8e32_v_f32m1(__VA_ARGS__)

◆ vsseg8e32_v_f32m1_m

#define vsseg8e32_v_f32m1_m ( ... ) __riscv_vsseg8e32_v_f32m1_m(__VA_ARGS__)

◆ vsseg8e32_v_f32mf2

#define vsseg8e32_v_f32mf2 ( ... ) __riscv_vsseg8e32_v_f32mf2(__VA_ARGS__)

◆ vsseg8e32_v_f32mf2_m

#define vsseg8e32_v_f32mf2_m ( ... ) __riscv_vsseg8e32_v_f32mf2_m(__VA_ARGS__)

◆ vsseg8e32_v_i32m1

#define vsseg8e32_v_i32m1 ( ... ) __riscv_vsseg8e32_v_i32m1(__VA_ARGS__)

◆ vsseg8e32_v_i32m1_m

#define vsseg8e32_v_i32m1_m ( ... ) __riscv_vsseg8e32_v_i32m1_m(__VA_ARGS__)

◆ vsseg8e32_v_i32mf2

#define vsseg8e32_v_i32mf2 ( ... ) __riscv_vsseg8e32_v_i32mf2(__VA_ARGS__)

◆ vsseg8e32_v_i32mf2_m

#define vsseg8e32_v_i32mf2_m ( ... ) __riscv_vsseg8e32_v_i32mf2_m(__VA_ARGS__)

◆ vsseg8e32_v_u32m1

#define vsseg8e32_v_u32m1 ( ... ) __riscv_vsseg8e32_v_u32m1(__VA_ARGS__)

◆ vsseg8e32_v_u32m1_m

#define vsseg8e32_v_u32m1_m ( ... ) __riscv_vsseg8e32_v_u32m1_m(__VA_ARGS__)

◆ vsseg8e32_v_u32mf2

#define vsseg8e32_v_u32mf2 ( ... ) __riscv_vsseg8e32_v_u32mf2(__VA_ARGS__)

◆ vsseg8e32_v_u32mf2_m

#define vsseg8e32_v_u32mf2_m ( ... ) __riscv_vsseg8e32_v_u32mf2_m(__VA_ARGS__)

◆ vsseg8e64_v_f64m1

#define vsseg8e64_v_f64m1 ( ... ) __riscv_vsseg8e64_v_f64m1(__VA_ARGS__)

◆ vsseg8e64_v_f64m1_m

#define vsseg8e64_v_f64m1_m ( ... ) __riscv_vsseg8e64_v_f64m1_m(__VA_ARGS__)

◆ vsseg8e64_v_i64m1

#define vsseg8e64_v_i64m1 ( ... ) __riscv_vsseg8e64_v_i64m1(__VA_ARGS__)

◆ vsseg8e64_v_i64m1_m

#define vsseg8e64_v_i64m1_m ( ... ) __riscv_vsseg8e64_v_i64m1_m(__VA_ARGS__)

◆ vsseg8e64_v_u64m1

#define vsseg8e64_v_u64m1 ( ... ) __riscv_vsseg8e64_v_u64m1(__VA_ARGS__)

◆ vsseg8e64_v_u64m1_m

#define vsseg8e64_v_u64m1_m ( ... ) __riscv_vsseg8e64_v_u64m1_m(__VA_ARGS__)

◆ vsseg8e8_v_i8m1

#define vsseg8e8_v_i8m1 ( ... ) __riscv_vsseg8e8_v_i8m1(__VA_ARGS__)

◆ vsseg8e8_v_i8m1_m

#define vsseg8e8_v_i8m1_m ( ... ) __riscv_vsseg8e8_v_i8m1_m(__VA_ARGS__)

◆ vsseg8e8_v_i8mf2

#define vsseg8e8_v_i8mf2 ( ... ) __riscv_vsseg8e8_v_i8mf2(__VA_ARGS__)

◆ vsseg8e8_v_i8mf2_m

#define vsseg8e8_v_i8mf2_m ( ... ) __riscv_vsseg8e8_v_i8mf2_m(__VA_ARGS__)

◆ vsseg8e8_v_i8mf4

#define vsseg8e8_v_i8mf4 ( ... ) __riscv_vsseg8e8_v_i8mf4(__VA_ARGS__)

◆ vsseg8e8_v_i8mf4_m

#define vsseg8e8_v_i8mf4_m ( ... ) __riscv_vsseg8e8_v_i8mf4_m(__VA_ARGS__)

◆ vsseg8e8_v_i8mf8

#define vsseg8e8_v_i8mf8 ( ... ) __riscv_vsseg8e8_v_i8mf8(__VA_ARGS__)

◆ vsseg8e8_v_i8mf8_m

#define vsseg8e8_v_i8mf8_m ( ... ) __riscv_vsseg8e8_v_i8mf8_m(__VA_ARGS__)

◆ vsseg8e8_v_u8m1

#define vsseg8e8_v_u8m1 ( ... ) __riscv_vsseg8e8_v_u8m1(__VA_ARGS__)

◆ vsseg8e8_v_u8m1_m

#define vsseg8e8_v_u8m1_m ( ... ) __riscv_vsseg8e8_v_u8m1_m(__VA_ARGS__)

◆ vsseg8e8_v_u8mf2

#define vsseg8e8_v_u8mf2 ( ... ) __riscv_vsseg8e8_v_u8mf2(__VA_ARGS__)

◆ vsseg8e8_v_u8mf2_m

#define vsseg8e8_v_u8mf2_m ( ... ) __riscv_vsseg8e8_v_u8mf2_m(__VA_ARGS__)

◆ vsseg8e8_v_u8mf4

#define vsseg8e8_v_u8mf4 ( ... ) __riscv_vsseg8e8_v_u8mf4(__VA_ARGS__)

◆ vsseg8e8_v_u8mf4_m

#define vsseg8e8_v_u8mf4_m ( ... ) __riscv_vsseg8e8_v_u8mf4_m(__VA_ARGS__)

◆ vsseg8e8_v_u8mf8

#define vsseg8e8_v_u8mf8 ( ... ) __riscv_vsseg8e8_v_u8mf8(__VA_ARGS__)

◆ vsseg8e8_v_u8mf8_m

#define vsseg8e8_v_u8mf8_m ( ... ) __riscv_vsseg8e8_v_u8mf8_m(__VA_ARGS__)

◆ vssra_vv_i16m1

#define vssra_vv_i16m1 ( ... ) __riscv_vssra_vv_i16m1(__VA_ARGS__)

◆ vssra_vv_i16m1_m

#define vssra_vv_i16m1_m ( ... ) __riscv_vssra_vv_i16m1_tumu(__VA_ARGS__)

◆ vssra_vv_i16m2

#define vssra_vv_i16m2 ( ... ) __riscv_vssra_vv_i16m2(__VA_ARGS__)

◆ vssra_vv_i16m2_m

#define vssra_vv_i16m2_m ( ... ) __riscv_vssra_vv_i16m2_tumu(__VA_ARGS__)

◆ vssra_vv_i16m4

#define vssra_vv_i16m4 ( ... ) __riscv_vssra_vv_i16m4(__VA_ARGS__)

◆ vssra_vv_i16m4_m

#define vssra_vv_i16m4_m ( ... ) __riscv_vssra_vv_i16m4_tumu(__VA_ARGS__)

◆ vssra_vv_i16m8

#define vssra_vv_i16m8 ( ... ) __riscv_vssra_vv_i16m8(__VA_ARGS__)

◆ vssra_vv_i16m8_m

#define vssra_vv_i16m8_m ( ... ) __riscv_vssra_vv_i16m8_tumu(__VA_ARGS__)

◆ vssra_vv_i16mf2

#define vssra_vv_i16mf2 ( ... ) __riscv_vssra_vv_i16mf2(__VA_ARGS__)

◆ vssra_vv_i16mf2_m

#define vssra_vv_i16mf2_m ( ... ) __riscv_vssra_vv_i16mf2_tumu(__VA_ARGS__)

◆ vssra_vv_i16mf4

#define vssra_vv_i16mf4 ( ... ) __riscv_vssra_vv_i16mf4(__VA_ARGS__)

◆ vssra_vv_i16mf4_m

#define vssra_vv_i16mf4_m ( ... ) __riscv_vssra_vv_i16mf4_tumu(__VA_ARGS__)

◆ vssra_vv_i32m1

#define vssra_vv_i32m1 ( ... ) __riscv_vssra_vv_i32m1(__VA_ARGS__)

◆ vssra_vv_i32m1_m

#define vssra_vv_i32m1_m ( ... ) __riscv_vssra_vv_i32m1_tumu(__VA_ARGS__)

◆ vssra_vv_i32m2

#define vssra_vv_i32m2 ( ... ) __riscv_vssra_vv_i32m2(__VA_ARGS__)

◆ vssra_vv_i32m2_m

#define vssra_vv_i32m2_m ( ... ) __riscv_vssra_vv_i32m2_tumu(__VA_ARGS__)

◆ vssra_vv_i32m4

#define vssra_vv_i32m4 ( ... ) __riscv_vssra_vv_i32m4(__VA_ARGS__)

◆ vssra_vv_i32m4_m

#define vssra_vv_i32m4_m ( ... ) __riscv_vssra_vv_i32m4_tumu(__VA_ARGS__)

◆ vssra_vv_i32m8

#define vssra_vv_i32m8 ( ... ) __riscv_vssra_vv_i32m8(__VA_ARGS__)

◆ vssra_vv_i32m8_m

#define vssra_vv_i32m8_m ( ... ) __riscv_vssra_vv_i32m8_tumu(__VA_ARGS__)

◆ vssra_vv_i32mf2

#define vssra_vv_i32mf2 ( ... ) __riscv_vssra_vv_i32mf2(__VA_ARGS__)

◆ vssra_vv_i32mf2_m

#define vssra_vv_i32mf2_m ( ... ) __riscv_vssra_vv_i32mf2_tumu(__VA_ARGS__)

◆ vssra_vv_i64m1

#define vssra_vv_i64m1 ( ... ) __riscv_vssra_vv_i64m1(__VA_ARGS__)

◆ vssra_vv_i64m1_m

#define vssra_vv_i64m1_m ( ... ) __riscv_vssra_vv_i64m1_tumu(__VA_ARGS__)

◆ vssra_vv_i64m2

#define vssra_vv_i64m2 ( ... ) __riscv_vssra_vv_i64m2(__VA_ARGS__)

◆ vssra_vv_i64m2_m

#define vssra_vv_i64m2_m ( ... ) __riscv_vssra_vv_i64m2_tumu(__VA_ARGS__)

◆ vssra_vv_i64m4

#define vssra_vv_i64m4 ( ... ) __riscv_vssra_vv_i64m4(__VA_ARGS__)

◆ vssra_vv_i64m4_m

#define vssra_vv_i64m4_m ( ... ) __riscv_vssra_vv_i64m4_tumu(__VA_ARGS__)

◆ vssra_vv_i64m8

#define vssra_vv_i64m8 ( ... ) __riscv_vssra_vv_i64m8(__VA_ARGS__)

◆ vssra_vv_i64m8_m

#define vssra_vv_i64m8_m ( ... ) __riscv_vssra_vv_i64m8_tumu(__VA_ARGS__)

◆ vssra_vv_i8m1

#define vssra_vv_i8m1 ( ... ) __riscv_vssra_vv_i8m1(__VA_ARGS__)

◆ vssra_vv_i8m1_m

#define vssra_vv_i8m1_m ( ... ) __riscv_vssra_vv_i8m1_tumu(__VA_ARGS__)

◆ vssra_vv_i8m2

#define vssra_vv_i8m2 ( ... ) __riscv_vssra_vv_i8m2(__VA_ARGS__)

◆ vssra_vv_i8m2_m

#define vssra_vv_i8m2_m ( ... ) __riscv_vssra_vv_i8m2_tumu(__VA_ARGS__)

◆ vssra_vv_i8m4

#define vssra_vv_i8m4 ( ... ) __riscv_vssra_vv_i8m4(__VA_ARGS__)

◆ vssra_vv_i8m4_m

#define vssra_vv_i8m4_m ( ... ) __riscv_vssra_vv_i8m4_tumu(__VA_ARGS__)

◆ vssra_vv_i8m8

#define vssra_vv_i8m8 ( ... ) __riscv_vssra_vv_i8m8(__VA_ARGS__)

◆ vssra_vv_i8m8_m

#define vssra_vv_i8m8_m ( ... ) __riscv_vssra_vv_i8m8_tumu(__VA_ARGS__)

◆ vssra_vv_i8mf2

#define vssra_vv_i8mf2 ( ... ) __riscv_vssra_vv_i8mf2(__VA_ARGS__)

◆ vssra_vv_i8mf2_m

#define vssra_vv_i8mf2_m ( ... ) __riscv_vssra_vv_i8mf2_tumu(__VA_ARGS__)

◆ vssra_vv_i8mf4

#define vssra_vv_i8mf4 ( ... ) __riscv_vssra_vv_i8mf4(__VA_ARGS__)

◆ vssra_vv_i8mf4_m

#define vssra_vv_i8mf4_m ( ... ) __riscv_vssra_vv_i8mf4_tumu(__VA_ARGS__)

◆ vssra_vv_i8mf8

#define vssra_vv_i8mf8 ( ... ) __riscv_vssra_vv_i8mf8(__VA_ARGS__)

◆ vssra_vv_i8mf8_m

#define vssra_vv_i8mf8_m ( ... ) __riscv_vssra_vv_i8mf8_tumu(__VA_ARGS__)

◆ vssra_vx_i16m1

#define vssra_vx_i16m1 ( ... ) __riscv_vssra_vx_i16m1(__VA_ARGS__)

◆ vssra_vx_i16m1_m

#define vssra_vx_i16m1_m ( ... ) __riscv_vssra_vx_i16m1_tumu(__VA_ARGS__)

◆ vssra_vx_i16m2

#define vssra_vx_i16m2 ( ... ) __riscv_vssra_vx_i16m2(__VA_ARGS__)

◆ vssra_vx_i16m2_m

#define vssra_vx_i16m2_m ( ... ) __riscv_vssra_vx_i16m2_tumu(__VA_ARGS__)

◆ vssra_vx_i16m4

#define vssra_vx_i16m4 ( ... ) __riscv_vssra_vx_i16m4(__VA_ARGS__)

◆ vssra_vx_i16m4_m

#define vssra_vx_i16m4_m ( ... ) __riscv_vssra_vx_i16m4_tumu(__VA_ARGS__)

◆ vssra_vx_i16m8

#define vssra_vx_i16m8 ( ... ) __riscv_vssra_vx_i16m8(__VA_ARGS__)

◆ vssra_vx_i16m8_m

#define vssra_vx_i16m8_m ( ... ) __riscv_vssra_vx_i16m8_tumu(__VA_ARGS__)

◆ vssra_vx_i16mf2

#define vssra_vx_i16mf2 ( ... ) __riscv_vssra_vx_i16mf2(__VA_ARGS__)

◆ vssra_vx_i16mf2_m

#define vssra_vx_i16mf2_m ( ... ) __riscv_vssra_vx_i16mf2_tumu(__VA_ARGS__)

◆ vssra_vx_i16mf4

#define vssra_vx_i16mf4 ( ... ) __riscv_vssra_vx_i16mf4(__VA_ARGS__)

◆ vssra_vx_i16mf4_m

#define vssra_vx_i16mf4_m ( ... ) __riscv_vssra_vx_i16mf4_tumu(__VA_ARGS__)

◆ vssra_vx_i32m1

#define vssra_vx_i32m1 ( ... ) __riscv_vssra_vx_i32m1(__VA_ARGS__)

◆ vssra_vx_i32m1_m

#define vssra_vx_i32m1_m ( ... ) __riscv_vssra_vx_i32m1_tumu(__VA_ARGS__)

◆ vssra_vx_i32m2

#define vssra_vx_i32m2 ( ... ) __riscv_vssra_vx_i32m2(__VA_ARGS__)

◆ vssra_vx_i32m2_m

#define vssra_vx_i32m2_m ( ... ) __riscv_vssra_vx_i32m2_tumu(__VA_ARGS__)

◆ vssra_vx_i32m4

#define vssra_vx_i32m4 ( ... ) __riscv_vssra_vx_i32m4(__VA_ARGS__)

◆ vssra_vx_i32m4_m

#define vssra_vx_i32m4_m ( ... ) __riscv_vssra_vx_i32m4_tumu(__VA_ARGS__)

◆ vssra_vx_i32m8

#define vssra_vx_i32m8 ( ... ) __riscv_vssra_vx_i32m8(__VA_ARGS__)

◆ vssra_vx_i32m8_m

#define vssra_vx_i32m8_m ( ... ) __riscv_vssra_vx_i32m8_tumu(__VA_ARGS__)

◆ vssra_vx_i32mf2

#define vssra_vx_i32mf2 ( ... ) __riscv_vssra_vx_i32mf2(__VA_ARGS__)

◆ vssra_vx_i32mf2_m

#define vssra_vx_i32mf2_m ( ... ) __riscv_vssra_vx_i32mf2_tumu(__VA_ARGS__)

◆ vssra_vx_i64m1

#define vssra_vx_i64m1 ( ... ) __riscv_vssra_vx_i64m1(__VA_ARGS__)

◆ vssra_vx_i64m1_m

#define vssra_vx_i64m1_m ( ... ) __riscv_vssra_vx_i64m1_tumu(__VA_ARGS__)

◆ vssra_vx_i64m2

#define vssra_vx_i64m2 ( ... ) __riscv_vssra_vx_i64m2(__VA_ARGS__)

◆ vssra_vx_i64m2_m

#define vssra_vx_i64m2_m ( ... ) __riscv_vssra_vx_i64m2_tumu(__VA_ARGS__)

◆ vssra_vx_i64m4

#define vssra_vx_i64m4 ( ... ) __riscv_vssra_vx_i64m4(__VA_ARGS__)

◆ vssra_vx_i64m4_m

#define vssra_vx_i64m4_m ( ... ) __riscv_vssra_vx_i64m4_tumu(__VA_ARGS__)

◆ vssra_vx_i64m8

#define vssra_vx_i64m8 ( ... ) __riscv_vssra_vx_i64m8(__VA_ARGS__)

◆ vssra_vx_i64m8_m

#define vssra_vx_i64m8_m ( ... ) __riscv_vssra_vx_i64m8_tumu(__VA_ARGS__)

◆ vssra_vx_i8m1

#define vssra_vx_i8m1 ( ... ) __riscv_vssra_vx_i8m1(__VA_ARGS__)

◆ vssra_vx_i8m1_m

#define vssra_vx_i8m1_m ( ... ) __riscv_vssra_vx_i8m1_tumu(__VA_ARGS__)

◆ vssra_vx_i8m2

#define vssra_vx_i8m2 ( ... ) __riscv_vssra_vx_i8m2(__VA_ARGS__)

◆ vssra_vx_i8m2_m

#define vssra_vx_i8m2_m ( ... ) __riscv_vssra_vx_i8m2_tumu(__VA_ARGS__)

◆ vssra_vx_i8m4

#define vssra_vx_i8m4 ( ... ) __riscv_vssra_vx_i8m4(__VA_ARGS__)

◆ vssra_vx_i8m4_m

#define vssra_vx_i8m4_m ( ... ) __riscv_vssra_vx_i8m4_tumu(__VA_ARGS__)

◆ vssra_vx_i8m8

#define vssra_vx_i8m8 ( ... ) __riscv_vssra_vx_i8m8(__VA_ARGS__)

◆ vssra_vx_i8m8_m

#define vssra_vx_i8m8_m ( ... ) __riscv_vssra_vx_i8m8_tumu(__VA_ARGS__)

◆ vssra_vx_i8mf2

#define vssra_vx_i8mf2 ( ... ) __riscv_vssra_vx_i8mf2(__VA_ARGS__)

◆ vssra_vx_i8mf2_m

#define vssra_vx_i8mf2_m ( ... ) __riscv_vssra_vx_i8mf2_tumu(__VA_ARGS__)

◆ vssra_vx_i8mf4

#define vssra_vx_i8mf4 ( ... ) __riscv_vssra_vx_i8mf4(__VA_ARGS__)

◆ vssra_vx_i8mf4_m

#define vssra_vx_i8mf4_m ( ... ) __riscv_vssra_vx_i8mf4_tumu(__VA_ARGS__)

◆ vssra_vx_i8mf8

#define vssra_vx_i8mf8 ( ... ) __riscv_vssra_vx_i8mf8(__VA_ARGS__)

◆ vssra_vx_i8mf8_m

#define vssra_vx_i8mf8_m ( ... ) __riscv_vssra_vx_i8mf8_tumu(__VA_ARGS__)

◆ vssrl_vv_u16m1

#define vssrl_vv_u16m1 ( ... ) __riscv_vssrl_vv_u16m1(__VA_ARGS__)

◆ vssrl_vv_u16m1_m

#define vssrl_vv_u16m1_m ( ... ) __riscv_vssrl_vv_u16m1_tumu(__VA_ARGS__)

◆ vssrl_vv_u16m2

#define vssrl_vv_u16m2 ( ... ) __riscv_vssrl_vv_u16m2(__VA_ARGS__)

◆ vssrl_vv_u16m2_m

#define vssrl_vv_u16m2_m ( ... ) __riscv_vssrl_vv_u16m2_tumu(__VA_ARGS__)

◆ vssrl_vv_u16m4

#define vssrl_vv_u16m4 ( ... ) __riscv_vssrl_vv_u16m4(__VA_ARGS__)

◆ vssrl_vv_u16m4_m

#define vssrl_vv_u16m4_m ( ... ) __riscv_vssrl_vv_u16m4_tumu(__VA_ARGS__)

◆ vssrl_vv_u16m8

#define vssrl_vv_u16m8 ( ... ) __riscv_vssrl_vv_u16m8(__VA_ARGS__)

◆ vssrl_vv_u16m8_m

#define vssrl_vv_u16m8_m ( ... ) __riscv_vssrl_vv_u16m8_tumu(__VA_ARGS__)

◆ vssrl_vv_u16mf2

#define vssrl_vv_u16mf2 ( ... ) __riscv_vssrl_vv_u16mf2(__VA_ARGS__)

◆ vssrl_vv_u16mf2_m

#define vssrl_vv_u16mf2_m ( ... ) __riscv_vssrl_vv_u16mf2_tumu(__VA_ARGS__)

◆ vssrl_vv_u16mf4

#define vssrl_vv_u16mf4 ( ... ) __riscv_vssrl_vv_u16mf4(__VA_ARGS__)

◆ vssrl_vv_u16mf4_m

#define vssrl_vv_u16mf4_m ( ... ) __riscv_vssrl_vv_u16mf4_tumu(__VA_ARGS__)

◆ vssrl_vv_u32m1

#define vssrl_vv_u32m1 ( ... ) __riscv_vssrl_vv_u32m1(__VA_ARGS__)

◆ vssrl_vv_u32m1_m

#define vssrl_vv_u32m1_m ( ... ) __riscv_vssrl_vv_u32m1_tumu(__VA_ARGS__)

◆ vssrl_vv_u32m2

#define vssrl_vv_u32m2 ( ... ) __riscv_vssrl_vv_u32m2(__VA_ARGS__)

◆ vssrl_vv_u32m2_m

#define vssrl_vv_u32m2_m ( ... ) __riscv_vssrl_vv_u32m2_tumu(__VA_ARGS__)

◆ vssrl_vv_u32m4

#define vssrl_vv_u32m4 ( ... ) __riscv_vssrl_vv_u32m4(__VA_ARGS__)

◆ vssrl_vv_u32m4_m

#define vssrl_vv_u32m4_m ( ... ) __riscv_vssrl_vv_u32m4_tumu(__VA_ARGS__)

◆ vssrl_vv_u32m8

#define vssrl_vv_u32m8 ( ... ) __riscv_vssrl_vv_u32m8(__VA_ARGS__)

◆ vssrl_vv_u32m8_m

#define vssrl_vv_u32m8_m ( ... ) __riscv_vssrl_vv_u32m8_tumu(__VA_ARGS__)

◆ vssrl_vv_u32mf2

#define vssrl_vv_u32mf2 ( ... ) __riscv_vssrl_vv_u32mf2(__VA_ARGS__)

◆ vssrl_vv_u32mf2_m

#define vssrl_vv_u32mf2_m ( ... ) __riscv_vssrl_vv_u32mf2_tumu(__VA_ARGS__)

◆ vssrl_vv_u64m1

#define vssrl_vv_u64m1 ( ... ) __riscv_vssrl_vv_u64m1(__VA_ARGS__)

◆ vssrl_vv_u64m1_m

#define vssrl_vv_u64m1_m ( ... ) __riscv_vssrl_vv_u64m1_tumu(__VA_ARGS__)

◆ vssrl_vv_u64m2

#define vssrl_vv_u64m2 ( ... ) __riscv_vssrl_vv_u64m2(__VA_ARGS__)

◆ vssrl_vv_u64m2_m

#define vssrl_vv_u64m2_m ( ... ) __riscv_vssrl_vv_u64m2_tumu(__VA_ARGS__)

◆ vssrl_vv_u64m4

#define vssrl_vv_u64m4 ( ... ) __riscv_vssrl_vv_u64m4(__VA_ARGS__)

◆ vssrl_vv_u64m4_m

#define vssrl_vv_u64m4_m ( ... ) __riscv_vssrl_vv_u64m4_tumu(__VA_ARGS__)

◆ vssrl_vv_u64m8

#define vssrl_vv_u64m8 ( ... ) __riscv_vssrl_vv_u64m8(__VA_ARGS__)

◆ vssrl_vv_u64m8_m

#define vssrl_vv_u64m8_m ( ... ) __riscv_vssrl_vv_u64m8_tumu(__VA_ARGS__)

◆ vssrl_vv_u8m1

#define vssrl_vv_u8m1 ( ... ) __riscv_vssrl_vv_u8m1(__VA_ARGS__)

◆ vssrl_vv_u8m1_m

#define vssrl_vv_u8m1_m ( ... ) __riscv_vssrl_vv_u8m1_tumu(__VA_ARGS__)

◆ vssrl_vv_u8m2

#define vssrl_vv_u8m2 ( ... ) __riscv_vssrl_vv_u8m2(__VA_ARGS__)

◆ vssrl_vv_u8m2_m

#define vssrl_vv_u8m2_m ( ... ) __riscv_vssrl_vv_u8m2_tumu(__VA_ARGS__)

◆ vssrl_vv_u8m4

#define vssrl_vv_u8m4 ( ... ) __riscv_vssrl_vv_u8m4(__VA_ARGS__)

◆ vssrl_vv_u8m4_m

#define vssrl_vv_u8m4_m ( ... ) __riscv_vssrl_vv_u8m4_tumu(__VA_ARGS__)

◆ vssrl_vv_u8m8

#define vssrl_vv_u8m8 ( ... ) __riscv_vssrl_vv_u8m8(__VA_ARGS__)

◆ vssrl_vv_u8m8_m

#define vssrl_vv_u8m8_m ( ... ) __riscv_vssrl_vv_u8m8_tumu(__VA_ARGS__)

◆ vssrl_vv_u8mf2

#define vssrl_vv_u8mf2 ( ... ) __riscv_vssrl_vv_u8mf2(__VA_ARGS__)

◆ vssrl_vv_u8mf2_m

#define vssrl_vv_u8mf2_m ( ... ) __riscv_vssrl_vv_u8mf2_tumu(__VA_ARGS__)

◆ vssrl_vv_u8mf4

#define vssrl_vv_u8mf4 ( ... ) __riscv_vssrl_vv_u8mf4(__VA_ARGS__)

◆ vssrl_vv_u8mf4_m

#define vssrl_vv_u8mf4_m ( ... ) __riscv_vssrl_vv_u8mf4_tumu(__VA_ARGS__)

◆ vssrl_vv_u8mf8

#define vssrl_vv_u8mf8 ( ... ) __riscv_vssrl_vv_u8mf8(__VA_ARGS__)

◆ vssrl_vv_u8mf8_m

#define vssrl_vv_u8mf8_m ( ... ) __riscv_vssrl_vv_u8mf8_tumu(__VA_ARGS__)

◆ vssrl_vx_u16m1

#define vssrl_vx_u16m1 ( ... ) __riscv_vssrl_vx_u16m1(__VA_ARGS__)

◆ vssrl_vx_u16m1_m

#define vssrl_vx_u16m1_m ( ... ) __riscv_vssrl_vx_u16m1_tumu(__VA_ARGS__)

◆ vssrl_vx_u16m2

#define vssrl_vx_u16m2 ( ... ) __riscv_vssrl_vx_u16m2(__VA_ARGS__)

◆ vssrl_vx_u16m2_m

#define vssrl_vx_u16m2_m ( ... ) __riscv_vssrl_vx_u16m2_tumu(__VA_ARGS__)

◆ vssrl_vx_u16m4

#define vssrl_vx_u16m4 ( ... ) __riscv_vssrl_vx_u16m4(__VA_ARGS__)

◆ vssrl_vx_u16m4_m

#define vssrl_vx_u16m4_m ( ... ) __riscv_vssrl_vx_u16m4_tumu(__VA_ARGS__)

◆ vssrl_vx_u16m8

#define vssrl_vx_u16m8 ( ... ) __riscv_vssrl_vx_u16m8(__VA_ARGS__)

◆ vssrl_vx_u16m8_m

#define vssrl_vx_u16m8_m ( ... ) __riscv_vssrl_vx_u16m8_tumu(__VA_ARGS__)

◆ vssrl_vx_u16mf2

#define vssrl_vx_u16mf2 ( ... ) __riscv_vssrl_vx_u16mf2(__VA_ARGS__)

◆ vssrl_vx_u16mf2_m

#define vssrl_vx_u16mf2_m ( ... ) __riscv_vssrl_vx_u16mf2_tumu(__VA_ARGS__)

◆ vssrl_vx_u16mf4

#define vssrl_vx_u16mf4 ( ... ) __riscv_vssrl_vx_u16mf4(__VA_ARGS__)

◆ vssrl_vx_u16mf4_m

#define vssrl_vx_u16mf4_m ( ... ) __riscv_vssrl_vx_u16mf4_tumu(__VA_ARGS__)

◆ vssrl_vx_u32m1

#define vssrl_vx_u32m1 ( ... ) __riscv_vssrl_vx_u32m1(__VA_ARGS__)

◆ vssrl_vx_u32m1_m

#define vssrl_vx_u32m1_m ( ... ) __riscv_vssrl_vx_u32m1_tumu(__VA_ARGS__)

◆ vssrl_vx_u32m2

#define vssrl_vx_u32m2 ( ... ) __riscv_vssrl_vx_u32m2(__VA_ARGS__)

◆ vssrl_vx_u32m2_m

#define vssrl_vx_u32m2_m ( ... ) __riscv_vssrl_vx_u32m2_tumu(__VA_ARGS__)

◆ vssrl_vx_u32m4

#define vssrl_vx_u32m4 ( ... ) __riscv_vssrl_vx_u32m4(__VA_ARGS__)

◆ vssrl_vx_u32m4_m

#define vssrl_vx_u32m4_m ( ... ) __riscv_vssrl_vx_u32m4_tumu(__VA_ARGS__)

◆ vssrl_vx_u32m8

#define vssrl_vx_u32m8 ( ... ) __riscv_vssrl_vx_u32m8(__VA_ARGS__)

◆ vssrl_vx_u32m8_m

#define vssrl_vx_u32m8_m ( ... ) __riscv_vssrl_vx_u32m8_tumu(__VA_ARGS__)

◆ vssrl_vx_u32mf2

#define vssrl_vx_u32mf2 ( ... ) __riscv_vssrl_vx_u32mf2(__VA_ARGS__)

◆ vssrl_vx_u32mf2_m

#define vssrl_vx_u32mf2_m ( ... ) __riscv_vssrl_vx_u32mf2_tumu(__VA_ARGS__)

◆ vssrl_vx_u64m1

#define vssrl_vx_u64m1 ( ... ) __riscv_vssrl_vx_u64m1(__VA_ARGS__)

◆ vssrl_vx_u64m1_m

#define vssrl_vx_u64m1_m ( ... ) __riscv_vssrl_vx_u64m1_tumu(__VA_ARGS__)

◆ vssrl_vx_u64m2

#define vssrl_vx_u64m2 ( ... ) __riscv_vssrl_vx_u64m2(__VA_ARGS__)

◆ vssrl_vx_u64m2_m

#define vssrl_vx_u64m2_m ( ... ) __riscv_vssrl_vx_u64m2_tumu(__VA_ARGS__)

◆ vssrl_vx_u64m4

#define vssrl_vx_u64m4 ( ... ) __riscv_vssrl_vx_u64m4(__VA_ARGS__)

◆ vssrl_vx_u64m4_m

#define vssrl_vx_u64m4_m ( ... ) __riscv_vssrl_vx_u64m4_tumu(__VA_ARGS__)

◆ vssrl_vx_u64m8

#define vssrl_vx_u64m8 ( ... ) __riscv_vssrl_vx_u64m8(__VA_ARGS__)

◆ vssrl_vx_u64m8_m

#define vssrl_vx_u64m8_m ( ... ) __riscv_vssrl_vx_u64m8_tumu(__VA_ARGS__)

◆ vssrl_vx_u8m1

#define vssrl_vx_u8m1 ( ... ) __riscv_vssrl_vx_u8m1(__VA_ARGS__)

◆ vssrl_vx_u8m1_m

#define vssrl_vx_u8m1_m ( ... ) __riscv_vssrl_vx_u8m1_tumu(__VA_ARGS__)

◆ vssrl_vx_u8m2

#define vssrl_vx_u8m2 ( ... ) __riscv_vssrl_vx_u8m2(__VA_ARGS__)

◆ vssrl_vx_u8m2_m

#define vssrl_vx_u8m2_m ( ... ) __riscv_vssrl_vx_u8m2_tumu(__VA_ARGS__)

◆ vssrl_vx_u8m4

#define vssrl_vx_u8m4 ( ... ) __riscv_vssrl_vx_u8m4(__VA_ARGS__)

◆ vssrl_vx_u8m4_m

#define vssrl_vx_u8m4_m ( ... ) __riscv_vssrl_vx_u8m4_tumu(__VA_ARGS__)

◆ vssrl_vx_u8m8

#define vssrl_vx_u8m8 ( ... ) __riscv_vssrl_vx_u8m8(__VA_ARGS__)

◆ vssrl_vx_u8m8_m

#define vssrl_vx_u8m8_m ( ... ) __riscv_vssrl_vx_u8m8_tumu(__VA_ARGS__)

◆ vssrl_vx_u8mf2

#define vssrl_vx_u8mf2 ( ... ) __riscv_vssrl_vx_u8mf2(__VA_ARGS__)

◆ vssrl_vx_u8mf2_m

#define vssrl_vx_u8mf2_m ( ... ) __riscv_vssrl_vx_u8mf2_tumu(__VA_ARGS__)

◆ vssrl_vx_u8mf4

#define vssrl_vx_u8mf4 ( ... ) __riscv_vssrl_vx_u8mf4(__VA_ARGS__)

◆ vssrl_vx_u8mf4_m

#define vssrl_vx_u8mf4_m ( ... ) __riscv_vssrl_vx_u8mf4_tumu(__VA_ARGS__)

◆ vssrl_vx_u8mf8

#define vssrl_vx_u8mf8 ( ... ) __riscv_vssrl_vx_u8mf8(__VA_ARGS__)

◆ vssrl_vx_u8mf8_m

#define vssrl_vx_u8mf8_m ( ... ) __riscv_vssrl_vx_u8mf8_tumu(__VA_ARGS__)

◆ vssseg2e16_v_f16m1

#define vssseg2e16_v_f16m1 ( ... ) __riscv_vssseg2e16_v_f16m1(__VA_ARGS__)

◆ vssseg2e16_v_f16m1_m

#define vssseg2e16_v_f16m1_m ( ... ) __riscv_vssseg2e16_v_f16m1_m(__VA_ARGS__)

◆ vssseg2e16_v_f16m2

#define vssseg2e16_v_f16m2 ( ... ) __riscv_vssseg2e16_v_f16m2(__VA_ARGS__)

◆ vssseg2e16_v_f16m2_m

#define vssseg2e16_v_f16m2_m ( ... ) __riscv_vssseg2e16_v_f16m2_m(__VA_ARGS__)

◆ vssseg2e16_v_f16m4

#define vssseg2e16_v_f16m4 ( ... ) __riscv_vssseg2e16_v_f16m4(__VA_ARGS__)

◆ vssseg2e16_v_f16m4_m

#define vssseg2e16_v_f16m4_m ( ... ) __riscv_vssseg2e16_v_f16m4_m(__VA_ARGS__)

◆ vssseg2e16_v_f16mf2

#define vssseg2e16_v_f16mf2 ( ... ) __riscv_vssseg2e16_v_f16mf2(__VA_ARGS__)

◆ vssseg2e16_v_f16mf2_m

#define vssseg2e16_v_f16mf2_m ( ... ) __riscv_vssseg2e16_v_f16mf2_m(__VA_ARGS__)

◆ vssseg2e16_v_f16mf4

#define vssseg2e16_v_f16mf4 ( ... ) __riscv_vssseg2e16_v_f16mf4(__VA_ARGS__)

◆ vssseg2e16_v_f16mf4_m

#define vssseg2e16_v_f16mf4_m ( ... ) __riscv_vssseg2e16_v_f16mf4_m(__VA_ARGS__)

◆ vssseg2e16_v_i16m1

#define vssseg2e16_v_i16m1 ( ... ) __riscv_vssseg2e16_v_i16m1(__VA_ARGS__)

◆ vssseg2e16_v_i16m1_m

#define vssseg2e16_v_i16m1_m ( ... ) __riscv_vssseg2e16_v_i16m1_m(__VA_ARGS__)

◆ vssseg2e16_v_i16m2

#define vssseg2e16_v_i16m2 ( ... ) __riscv_vssseg2e16_v_i16m2(__VA_ARGS__)

◆ vssseg2e16_v_i16m2_m

#define vssseg2e16_v_i16m2_m ( ... ) __riscv_vssseg2e16_v_i16m2_m(__VA_ARGS__)

◆ vssseg2e16_v_i16m4

#define vssseg2e16_v_i16m4 ( ... ) __riscv_vssseg2e16_v_i16m4(__VA_ARGS__)

◆ vssseg2e16_v_i16m4_m

#define vssseg2e16_v_i16m4_m ( ... ) __riscv_vssseg2e16_v_i16m4_m(__VA_ARGS__)

◆ vssseg2e16_v_i16mf2

#define vssseg2e16_v_i16mf2 ( ... ) __riscv_vssseg2e16_v_i16mf2(__VA_ARGS__)

◆ vssseg2e16_v_i16mf2_m

#define vssseg2e16_v_i16mf2_m ( ... ) __riscv_vssseg2e16_v_i16mf2_m(__VA_ARGS__)

◆ vssseg2e16_v_i16mf4

#define vssseg2e16_v_i16mf4 ( ... ) __riscv_vssseg2e16_v_i16mf4(__VA_ARGS__)

◆ vssseg2e16_v_i16mf4_m

#define vssseg2e16_v_i16mf4_m ( ... ) __riscv_vssseg2e16_v_i16mf4_m(__VA_ARGS__)

◆ vssseg2e16_v_u16m1

#define vssseg2e16_v_u16m1 ( ... ) __riscv_vssseg2e16_v_u16m1(__VA_ARGS__)

◆ vssseg2e16_v_u16m1_m

#define vssseg2e16_v_u16m1_m ( ... ) __riscv_vssseg2e16_v_u16m1_m(__VA_ARGS__)

◆ vssseg2e16_v_u16m2

#define vssseg2e16_v_u16m2 ( ... ) __riscv_vssseg2e16_v_u16m2(__VA_ARGS__)

◆ vssseg2e16_v_u16m2_m

#define vssseg2e16_v_u16m2_m ( ... ) __riscv_vssseg2e16_v_u16m2_m(__VA_ARGS__)

◆ vssseg2e16_v_u16m4

#define vssseg2e16_v_u16m4 ( ... ) __riscv_vssseg2e16_v_u16m4(__VA_ARGS__)

◆ vssseg2e16_v_u16m4_m

#define vssseg2e16_v_u16m4_m ( ... ) __riscv_vssseg2e16_v_u16m4_m(__VA_ARGS__)

◆ vssseg2e16_v_u16mf2

#define vssseg2e16_v_u16mf2 ( ... ) __riscv_vssseg2e16_v_u16mf2(__VA_ARGS__)

◆ vssseg2e16_v_u16mf2_m

#define vssseg2e16_v_u16mf2_m ( ... ) __riscv_vssseg2e16_v_u16mf2_m(__VA_ARGS__)

◆ vssseg2e16_v_u16mf4

#define vssseg2e16_v_u16mf4 ( ... ) __riscv_vssseg2e16_v_u16mf4(__VA_ARGS__)

◆ vssseg2e16_v_u16mf4_m

#define vssseg2e16_v_u16mf4_m ( ... ) __riscv_vssseg2e16_v_u16mf4_m(__VA_ARGS__)

◆ vssseg2e32_v_f32m1

#define vssseg2e32_v_f32m1 ( ... ) __riscv_vssseg2e32_v_f32m1(__VA_ARGS__)

◆ vssseg2e32_v_f32m1_m

#define vssseg2e32_v_f32m1_m ( ... ) __riscv_vssseg2e32_v_f32m1_m(__VA_ARGS__)

◆ vssseg2e32_v_f32m2

#define vssseg2e32_v_f32m2 ( ... ) __riscv_vssseg2e32_v_f32m2(__VA_ARGS__)

◆ vssseg2e32_v_f32m2_m

#define vssseg2e32_v_f32m2_m ( ... ) __riscv_vssseg2e32_v_f32m2_m(__VA_ARGS__)

◆ vssseg2e32_v_f32m4

#define vssseg2e32_v_f32m4 ( ... ) __riscv_vssseg2e32_v_f32m4(__VA_ARGS__)

◆ vssseg2e32_v_f32m4_m

#define vssseg2e32_v_f32m4_m ( ... ) __riscv_vssseg2e32_v_f32m4_m(__VA_ARGS__)

◆ vssseg2e32_v_f32mf2

#define vssseg2e32_v_f32mf2 ( ... ) __riscv_vssseg2e32_v_f32mf2(__VA_ARGS__)

◆ vssseg2e32_v_f32mf2_m

#define vssseg2e32_v_f32mf2_m ( ... ) __riscv_vssseg2e32_v_f32mf2_m(__VA_ARGS__)

◆ vssseg2e32_v_i32m1

#define vssseg2e32_v_i32m1 ( ... ) __riscv_vssseg2e32_v_i32m1(__VA_ARGS__)

◆ vssseg2e32_v_i32m1_m

#define vssseg2e32_v_i32m1_m ( ... ) __riscv_vssseg2e32_v_i32m1_m(__VA_ARGS__)

◆ vssseg2e32_v_i32m2

#define vssseg2e32_v_i32m2 ( ... ) __riscv_vssseg2e32_v_i32m2(__VA_ARGS__)

◆ vssseg2e32_v_i32m2_m

#define vssseg2e32_v_i32m2_m ( ... ) __riscv_vssseg2e32_v_i32m2_m(__VA_ARGS__)

◆ vssseg2e32_v_i32m4

#define vssseg2e32_v_i32m4 ( ... ) __riscv_vssseg2e32_v_i32m4(__VA_ARGS__)

◆ vssseg2e32_v_i32m4_m

#define vssseg2e32_v_i32m4_m ( ... ) __riscv_vssseg2e32_v_i32m4_m(__VA_ARGS__)

◆ vssseg2e32_v_i32mf2

#define vssseg2e32_v_i32mf2 ( ... ) __riscv_vssseg2e32_v_i32mf2(__VA_ARGS__)

◆ vssseg2e32_v_i32mf2_m

#define vssseg2e32_v_i32mf2_m ( ... ) __riscv_vssseg2e32_v_i32mf2_m(__VA_ARGS__)

◆ vssseg2e32_v_u32m1

#define vssseg2e32_v_u32m1 ( ... ) __riscv_vssseg2e32_v_u32m1(__VA_ARGS__)

◆ vssseg2e32_v_u32m1_m

#define vssseg2e32_v_u32m1_m ( ... ) __riscv_vssseg2e32_v_u32m1_m(__VA_ARGS__)

◆ vssseg2e32_v_u32m2

#define vssseg2e32_v_u32m2 ( ... ) __riscv_vssseg2e32_v_u32m2(__VA_ARGS__)

◆ vssseg2e32_v_u32m2_m

#define vssseg2e32_v_u32m2_m ( ... ) __riscv_vssseg2e32_v_u32m2_m(__VA_ARGS__)

◆ vssseg2e32_v_u32m4

#define vssseg2e32_v_u32m4 ( ... ) __riscv_vssseg2e32_v_u32m4(__VA_ARGS__)

◆ vssseg2e32_v_u32m4_m

#define vssseg2e32_v_u32m4_m ( ... ) __riscv_vssseg2e32_v_u32m4_m(__VA_ARGS__)

◆ vssseg2e32_v_u32mf2

#define vssseg2e32_v_u32mf2 ( ... ) __riscv_vssseg2e32_v_u32mf2(__VA_ARGS__)

◆ vssseg2e32_v_u32mf2_m

#define vssseg2e32_v_u32mf2_m ( ... ) __riscv_vssseg2e32_v_u32mf2_m(__VA_ARGS__)

◆ vssseg2e64_v_f64m1

#define vssseg2e64_v_f64m1 ( ... ) __riscv_vssseg2e64_v_f64m1(__VA_ARGS__)

◆ vssseg2e64_v_f64m1_m

#define vssseg2e64_v_f64m1_m ( ... ) __riscv_vssseg2e64_v_f64m1_m(__VA_ARGS__)

◆ vssseg2e64_v_f64m2

#define vssseg2e64_v_f64m2 ( ... ) __riscv_vssseg2e64_v_f64m2(__VA_ARGS__)

◆ vssseg2e64_v_f64m2_m

#define vssseg2e64_v_f64m2_m ( ... ) __riscv_vssseg2e64_v_f64m2_m(__VA_ARGS__)

◆ vssseg2e64_v_f64m4

#define vssseg2e64_v_f64m4 ( ... ) __riscv_vssseg2e64_v_f64m4(__VA_ARGS__)

◆ vssseg2e64_v_f64m4_m

#define vssseg2e64_v_f64m4_m ( ... ) __riscv_vssseg2e64_v_f64m4_m(__VA_ARGS__)

◆ vssseg2e64_v_i64m1

#define vssseg2e64_v_i64m1 ( ... ) __riscv_vssseg2e64_v_i64m1(__VA_ARGS__)

◆ vssseg2e64_v_i64m1_m

#define vssseg2e64_v_i64m1_m ( ... ) __riscv_vssseg2e64_v_i64m1_m(__VA_ARGS__)

◆ vssseg2e64_v_i64m2

#define vssseg2e64_v_i64m2 ( ... ) __riscv_vssseg2e64_v_i64m2(__VA_ARGS__)

◆ vssseg2e64_v_i64m2_m

#define vssseg2e64_v_i64m2_m ( ... ) __riscv_vssseg2e64_v_i64m2_m(__VA_ARGS__)

◆ vssseg2e64_v_i64m4

#define vssseg2e64_v_i64m4 ( ... ) __riscv_vssseg2e64_v_i64m4(__VA_ARGS__)

◆ vssseg2e64_v_i64m4_m

#define vssseg2e64_v_i64m4_m ( ... ) __riscv_vssseg2e64_v_i64m4_m(__VA_ARGS__)

◆ vssseg2e64_v_u64m1

#define vssseg2e64_v_u64m1 ( ... ) __riscv_vssseg2e64_v_u64m1(__VA_ARGS__)

◆ vssseg2e64_v_u64m1_m

#define vssseg2e64_v_u64m1_m ( ... ) __riscv_vssseg2e64_v_u64m1_m(__VA_ARGS__)

◆ vssseg2e64_v_u64m2

#define vssseg2e64_v_u64m2 ( ... ) __riscv_vssseg2e64_v_u64m2(__VA_ARGS__)

◆ vssseg2e64_v_u64m2_m

#define vssseg2e64_v_u64m2_m ( ... ) __riscv_vssseg2e64_v_u64m2_m(__VA_ARGS__)

◆ vssseg2e64_v_u64m4

#define vssseg2e64_v_u64m4 ( ... ) __riscv_vssseg2e64_v_u64m4(__VA_ARGS__)

◆ vssseg2e64_v_u64m4_m

#define vssseg2e64_v_u64m4_m ( ... ) __riscv_vssseg2e64_v_u64m4_m(__VA_ARGS__)

◆ vssseg2e8_v_i8m1

#define vssseg2e8_v_i8m1 ( ... ) __riscv_vssseg2e8_v_i8m1(__VA_ARGS__)

◆ vssseg2e8_v_i8m1_m

#define vssseg2e8_v_i8m1_m ( ... ) __riscv_vssseg2e8_v_i8m1_m(__VA_ARGS__)

◆ vssseg2e8_v_i8m2

#define vssseg2e8_v_i8m2 ( ... ) __riscv_vssseg2e8_v_i8m2(__VA_ARGS__)

◆ vssseg2e8_v_i8m2_m

#define vssseg2e8_v_i8m2_m ( ... ) __riscv_vssseg2e8_v_i8m2_m(__VA_ARGS__)

◆ vssseg2e8_v_i8m4

#define vssseg2e8_v_i8m4 ( ... ) __riscv_vssseg2e8_v_i8m4(__VA_ARGS__)

◆ vssseg2e8_v_i8m4_m

#define vssseg2e8_v_i8m4_m ( ... ) __riscv_vssseg2e8_v_i8m4_m(__VA_ARGS__)

◆ vssseg2e8_v_i8mf2

#define vssseg2e8_v_i8mf2 ( ... ) __riscv_vssseg2e8_v_i8mf2(__VA_ARGS__)

◆ vssseg2e8_v_i8mf2_m

#define vssseg2e8_v_i8mf2_m ( ... ) __riscv_vssseg2e8_v_i8mf2_m(__VA_ARGS__)

◆ vssseg2e8_v_i8mf4

#define vssseg2e8_v_i8mf4 ( ... ) __riscv_vssseg2e8_v_i8mf4(__VA_ARGS__)

◆ vssseg2e8_v_i8mf4_m

#define vssseg2e8_v_i8mf4_m ( ... ) __riscv_vssseg2e8_v_i8mf4_m(__VA_ARGS__)

◆ vssseg2e8_v_i8mf8

#define vssseg2e8_v_i8mf8 ( ... ) __riscv_vssseg2e8_v_i8mf8(__VA_ARGS__)

◆ vssseg2e8_v_i8mf8_m

#define vssseg2e8_v_i8mf8_m ( ... ) __riscv_vssseg2e8_v_i8mf8_m(__VA_ARGS__)

◆ vssseg2e8_v_u8m1

#define vssseg2e8_v_u8m1 ( ... ) __riscv_vssseg2e8_v_u8m1(__VA_ARGS__)

◆ vssseg2e8_v_u8m1_m

#define vssseg2e8_v_u8m1_m ( ... ) __riscv_vssseg2e8_v_u8m1_m(__VA_ARGS__)

◆ vssseg2e8_v_u8m2

#define vssseg2e8_v_u8m2 ( ... ) __riscv_vssseg2e8_v_u8m2(__VA_ARGS__)

◆ vssseg2e8_v_u8m2_m

#define vssseg2e8_v_u8m2_m ( ... ) __riscv_vssseg2e8_v_u8m2_m(__VA_ARGS__)

◆ vssseg2e8_v_u8m4

#define vssseg2e8_v_u8m4 ( ... ) __riscv_vssseg2e8_v_u8m4(__VA_ARGS__)

◆ vssseg2e8_v_u8m4_m

#define vssseg2e8_v_u8m4_m ( ... ) __riscv_vssseg2e8_v_u8m4_m(__VA_ARGS__)

◆ vssseg2e8_v_u8mf2

#define vssseg2e8_v_u8mf2 ( ... ) __riscv_vssseg2e8_v_u8mf2(__VA_ARGS__)

◆ vssseg2e8_v_u8mf2_m

#define vssseg2e8_v_u8mf2_m ( ... ) __riscv_vssseg2e8_v_u8mf2_m(__VA_ARGS__)

◆ vssseg2e8_v_u8mf4

#define vssseg2e8_v_u8mf4 ( ... ) __riscv_vssseg2e8_v_u8mf4(__VA_ARGS__)

◆ vssseg2e8_v_u8mf4_m

#define vssseg2e8_v_u8mf4_m ( ... ) __riscv_vssseg2e8_v_u8mf4_m(__VA_ARGS__)

◆ vssseg2e8_v_u8mf8

#define vssseg2e8_v_u8mf8 ( ... ) __riscv_vssseg2e8_v_u8mf8(__VA_ARGS__)

◆ vssseg2e8_v_u8mf8_m

#define vssseg2e8_v_u8mf8_m ( ... ) __riscv_vssseg2e8_v_u8mf8_m(__VA_ARGS__)

◆ vssseg3e16_v_f16m1

#define vssseg3e16_v_f16m1 ( ... ) __riscv_vssseg3e16_v_f16m1(__VA_ARGS__)

◆ vssseg3e16_v_f16m1_m

#define vssseg3e16_v_f16m1_m ( ... ) __riscv_vssseg3e16_v_f16m1_m(__VA_ARGS__)

◆ vssseg3e16_v_f16m2

#define vssseg3e16_v_f16m2 ( ... ) __riscv_vssseg3e16_v_f16m2(__VA_ARGS__)

◆ vssseg3e16_v_f16m2_m

#define vssseg3e16_v_f16m2_m ( ... ) __riscv_vssseg3e16_v_f16m2_m(__VA_ARGS__)

◆ vssseg3e16_v_f16mf2

#define vssseg3e16_v_f16mf2 ( ... ) __riscv_vssseg3e16_v_f16mf2(__VA_ARGS__)

◆ vssseg3e16_v_f16mf2_m

#define vssseg3e16_v_f16mf2_m ( ... ) __riscv_vssseg3e16_v_f16mf2_m(__VA_ARGS__)

◆ vssseg3e16_v_f16mf4

#define vssseg3e16_v_f16mf4 ( ... ) __riscv_vssseg3e16_v_f16mf4(__VA_ARGS__)

◆ vssseg3e16_v_f16mf4_m

#define vssseg3e16_v_f16mf4_m ( ... ) __riscv_vssseg3e16_v_f16mf4_m(__VA_ARGS__)

◆ vssseg3e16_v_i16m1

#define vssseg3e16_v_i16m1 ( ... ) __riscv_vssseg3e16_v_i16m1(__VA_ARGS__)

◆ vssseg3e16_v_i16m1_m

#define vssseg3e16_v_i16m1_m ( ... ) __riscv_vssseg3e16_v_i16m1_m(__VA_ARGS__)

◆ vssseg3e16_v_i16m2

#define vssseg3e16_v_i16m2 ( ... ) __riscv_vssseg3e16_v_i16m2(__VA_ARGS__)

◆ vssseg3e16_v_i16m2_m

#define vssseg3e16_v_i16m2_m ( ... ) __riscv_vssseg3e16_v_i16m2_m(__VA_ARGS__)

◆ vssseg3e16_v_i16mf2

#define vssseg3e16_v_i16mf2 ( ... ) __riscv_vssseg3e16_v_i16mf2(__VA_ARGS__)

◆ vssseg3e16_v_i16mf2_m

#define vssseg3e16_v_i16mf2_m ( ... ) __riscv_vssseg3e16_v_i16mf2_m(__VA_ARGS__)

◆ vssseg3e16_v_i16mf4

#define vssseg3e16_v_i16mf4 ( ... ) __riscv_vssseg3e16_v_i16mf4(__VA_ARGS__)

◆ vssseg3e16_v_i16mf4_m

#define vssseg3e16_v_i16mf4_m ( ... ) __riscv_vssseg3e16_v_i16mf4_m(__VA_ARGS__)

◆ vssseg3e16_v_u16m1

#define vssseg3e16_v_u16m1 ( ... ) __riscv_vssseg3e16_v_u16m1(__VA_ARGS__)

◆ vssseg3e16_v_u16m1_m

#define vssseg3e16_v_u16m1_m ( ... ) __riscv_vssseg3e16_v_u16m1_m(__VA_ARGS__)

◆ vssseg3e16_v_u16m2

#define vssseg3e16_v_u16m2 ( ... ) __riscv_vssseg3e16_v_u16m2(__VA_ARGS__)

◆ vssseg3e16_v_u16m2_m

#define vssseg3e16_v_u16m2_m ( ... ) __riscv_vssseg3e16_v_u16m2_m(__VA_ARGS__)

◆ vssseg3e16_v_u16mf2

#define vssseg3e16_v_u16mf2 ( ... ) __riscv_vssseg3e16_v_u16mf2(__VA_ARGS__)

◆ vssseg3e16_v_u16mf2_m

#define vssseg3e16_v_u16mf2_m ( ... ) __riscv_vssseg3e16_v_u16mf2_m(__VA_ARGS__)

◆ vssseg3e16_v_u16mf4

#define vssseg3e16_v_u16mf4 ( ... ) __riscv_vssseg3e16_v_u16mf4(__VA_ARGS__)

◆ vssseg3e16_v_u16mf4_m

#define vssseg3e16_v_u16mf4_m ( ... ) __riscv_vssseg3e16_v_u16mf4_m(__VA_ARGS__)

◆ vssseg3e32_v_f32m1

#define vssseg3e32_v_f32m1 ( ... ) __riscv_vssseg3e32_v_f32m1(__VA_ARGS__)

◆ vssseg3e32_v_f32m1_m

#define vssseg3e32_v_f32m1_m ( ... ) __riscv_vssseg3e32_v_f32m1_m(__VA_ARGS__)

◆ vssseg3e32_v_f32m2

#define vssseg3e32_v_f32m2 ( ... ) __riscv_vssseg3e32_v_f32m2(__VA_ARGS__)

◆ vssseg3e32_v_f32m2_m

#define vssseg3e32_v_f32m2_m ( ... ) __riscv_vssseg3e32_v_f32m2_m(__VA_ARGS__)

◆ vssseg3e32_v_f32mf2

#define vssseg3e32_v_f32mf2 ( ... ) __riscv_vssseg3e32_v_f32mf2(__VA_ARGS__)

◆ vssseg3e32_v_f32mf2_m

#define vssseg3e32_v_f32mf2_m ( ... ) __riscv_vssseg3e32_v_f32mf2_m(__VA_ARGS__)

◆ vssseg3e32_v_i32m1

#define vssseg3e32_v_i32m1 ( ... ) __riscv_vssseg3e32_v_i32m1(__VA_ARGS__)

◆ vssseg3e32_v_i32m1_m

#define vssseg3e32_v_i32m1_m ( ... ) __riscv_vssseg3e32_v_i32m1_m(__VA_ARGS__)

◆ vssseg3e32_v_i32m2

#define vssseg3e32_v_i32m2 ( ... ) __riscv_vssseg3e32_v_i32m2(__VA_ARGS__)

◆ vssseg3e32_v_i32m2_m

#define vssseg3e32_v_i32m2_m ( ... ) __riscv_vssseg3e32_v_i32m2_m(__VA_ARGS__)

◆ vssseg3e32_v_i32mf2

#define vssseg3e32_v_i32mf2 ( ... ) __riscv_vssseg3e32_v_i32mf2(__VA_ARGS__)

◆ vssseg3e32_v_i32mf2_m

#define vssseg3e32_v_i32mf2_m ( ... ) __riscv_vssseg3e32_v_i32mf2_m(__VA_ARGS__)

◆ vssseg3e32_v_u32m1

#define vssseg3e32_v_u32m1 ( ... ) __riscv_vssseg3e32_v_u32m1(__VA_ARGS__)

◆ vssseg3e32_v_u32m1_m

#define vssseg3e32_v_u32m1_m ( ... ) __riscv_vssseg3e32_v_u32m1_m(__VA_ARGS__)

◆ vssseg3e32_v_u32m2

#define vssseg3e32_v_u32m2 ( ... ) __riscv_vssseg3e32_v_u32m2(__VA_ARGS__)

◆ vssseg3e32_v_u32m2_m

#define vssseg3e32_v_u32m2_m ( ... ) __riscv_vssseg3e32_v_u32m2_m(__VA_ARGS__)

◆ vssseg3e32_v_u32mf2

#define vssseg3e32_v_u32mf2 ( ... ) __riscv_vssseg3e32_v_u32mf2(__VA_ARGS__)

◆ vssseg3e32_v_u32mf2_m

#define vssseg3e32_v_u32mf2_m ( ... ) __riscv_vssseg3e32_v_u32mf2_m(__VA_ARGS__)

◆ vssseg3e64_v_f64m1

#define vssseg3e64_v_f64m1 ( ... ) __riscv_vssseg3e64_v_f64m1(__VA_ARGS__)

◆ vssseg3e64_v_f64m1_m

#define vssseg3e64_v_f64m1_m ( ... ) __riscv_vssseg3e64_v_f64m1_m(__VA_ARGS__)

◆ vssseg3e64_v_f64m2

#define vssseg3e64_v_f64m2 ( ... ) __riscv_vssseg3e64_v_f64m2(__VA_ARGS__)

◆ vssseg3e64_v_f64m2_m

#define vssseg3e64_v_f64m2_m ( ... ) __riscv_vssseg3e64_v_f64m2_m(__VA_ARGS__)

◆ vssseg3e64_v_i64m1

#define vssseg3e64_v_i64m1 ( ... ) __riscv_vssseg3e64_v_i64m1(__VA_ARGS__)

◆ vssseg3e64_v_i64m1_m

#define vssseg3e64_v_i64m1_m ( ... ) __riscv_vssseg3e64_v_i64m1_m(__VA_ARGS__)

◆ vssseg3e64_v_i64m2

#define vssseg3e64_v_i64m2 ( ... ) __riscv_vssseg3e64_v_i64m2(__VA_ARGS__)

◆ vssseg3e64_v_i64m2_m

#define vssseg3e64_v_i64m2_m ( ... ) __riscv_vssseg3e64_v_i64m2_m(__VA_ARGS__)

◆ vssseg3e64_v_u64m1

#define vssseg3e64_v_u64m1 ( ... ) __riscv_vssseg3e64_v_u64m1(__VA_ARGS__)

◆ vssseg3e64_v_u64m1_m

#define vssseg3e64_v_u64m1_m ( ... ) __riscv_vssseg3e64_v_u64m1_m(__VA_ARGS__)

◆ vssseg3e64_v_u64m2

#define vssseg3e64_v_u64m2 ( ... ) __riscv_vssseg3e64_v_u64m2(__VA_ARGS__)

◆ vssseg3e64_v_u64m2_m

#define vssseg3e64_v_u64m2_m ( ... ) __riscv_vssseg3e64_v_u64m2_m(__VA_ARGS__)

◆ vssseg3e8_v_i8m1

#define vssseg3e8_v_i8m1 ( ... ) __riscv_vssseg3e8_v_i8m1(__VA_ARGS__)

◆ vssseg3e8_v_i8m1_m

#define vssseg3e8_v_i8m1_m ( ... ) __riscv_vssseg3e8_v_i8m1_m(__VA_ARGS__)

◆ vssseg3e8_v_i8m2

#define vssseg3e8_v_i8m2 ( ... ) __riscv_vssseg3e8_v_i8m2(__VA_ARGS__)

◆ vssseg3e8_v_i8m2_m

#define vssseg3e8_v_i8m2_m ( ... ) __riscv_vssseg3e8_v_i8m2_m(__VA_ARGS__)

◆ vssseg3e8_v_i8mf2

#define vssseg3e8_v_i8mf2 ( ... ) __riscv_vssseg3e8_v_i8mf2(__VA_ARGS__)

◆ vssseg3e8_v_i8mf2_m

#define vssseg3e8_v_i8mf2_m ( ... ) __riscv_vssseg3e8_v_i8mf2_m(__VA_ARGS__)

◆ vssseg3e8_v_i8mf4

#define vssseg3e8_v_i8mf4 ( ... ) __riscv_vssseg3e8_v_i8mf4(__VA_ARGS__)

◆ vssseg3e8_v_i8mf4_m

#define vssseg3e8_v_i8mf4_m ( ... ) __riscv_vssseg3e8_v_i8mf4_m(__VA_ARGS__)

◆ vssseg3e8_v_i8mf8

#define vssseg3e8_v_i8mf8 ( ... ) __riscv_vssseg3e8_v_i8mf8(__VA_ARGS__)

◆ vssseg3e8_v_i8mf8_m

#define vssseg3e8_v_i8mf8_m ( ... ) __riscv_vssseg3e8_v_i8mf8_m(__VA_ARGS__)

◆ vssseg3e8_v_u8m1

#define vssseg3e8_v_u8m1 ( ... ) __riscv_vssseg3e8_v_u8m1(__VA_ARGS__)

◆ vssseg3e8_v_u8m1_m

#define vssseg3e8_v_u8m1_m ( ... ) __riscv_vssseg3e8_v_u8m1_m(__VA_ARGS__)

◆ vssseg3e8_v_u8m2

#define vssseg3e8_v_u8m2 ( ... ) __riscv_vssseg3e8_v_u8m2(__VA_ARGS__)

◆ vssseg3e8_v_u8m2_m

#define vssseg3e8_v_u8m2_m ( ... ) __riscv_vssseg3e8_v_u8m2_m(__VA_ARGS__)

◆ vssseg3e8_v_u8mf2

#define vssseg3e8_v_u8mf2 ( ... ) __riscv_vssseg3e8_v_u8mf2(__VA_ARGS__)

◆ vssseg3e8_v_u8mf2_m

#define vssseg3e8_v_u8mf2_m ( ... ) __riscv_vssseg3e8_v_u8mf2_m(__VA_ARGS__)

◆ vssseg3e8_v_u8mf4

#define vssseg3e8_v_u8mf4 ( ... ) __riscv_vssseg3e8_v_u8mf4(__VA_ARGS__)

◆ vssseg3e8_v_u8mf4_m

#define vssseg3e8_v_u8mf4_m ( ... ) __riscv_vssseg3e8_v_u8mf4_m(__VA_ARGS__)

◆ vssseg3e8_v_u8mf8

#define vssseg3e8_v_u8mf8 ( ... ) __riscv_vssseg3e8_v_u8mf8(__VA_ARGS__)

◆ vssseg3e8_v_u8mf8_m

#define vssseg3e8_v_u8mf8_m ( ... ) __riscv_vssseg3e8_v_u8mf8_m(__VA_ARGS__)

◆ vssseg4e16_v_f16m1

#define vssseg4e16_v_f16m1 ( ... ) __riscv_vssseg4e16_v_f16m1(__VA_ARGS__)

◆ vssseg4e16_v_f16m1_m

#define vssseg4e16_v_f16m1_m ( ... ) __riscv_vssseg4e16_v_f16m1_m(__VA_ARGS__)

◆ vssseg4e16_v_f16m2

#define vssseg4e16_v_f16m2 ( ... ) __riscv_vssseg4e16_v_f16m2(__VA_ARGS__)

◆ vssseg4e16_v_f16m2_m

#define vssseg4e16_v_f16m2_m ( ... ) __riscv_vssseg4e16_v_f16m2_m(__VA_ARGS__)

◆ vssseg4e16_v_f16mf2

#define vssseg4e16_v_f16mf2 ( ... ) __riscv_vssseg4e16_v_f16mf2(__VA_ARGS__)

◆ vssseg4e16_v_f16mf2_m

#define vssseg4e16_v_f16mf2_m ( ... ) __riscv_vssseg4e16_v_f16mf2_m(__VA_ARGS__)

◆ vssseg4e16_v_f16mf4

#define vssseg4e16_v_f16mf4 ( ... ) __riscv_vssseg4e16_v_f16mf4(__VA_ARGS__)

◆ vssseg4e16_v_f16mf4_m

#define vssseg4e16_v_f16mf4_m ( ... ) __riscv_vssseg4e16_v_f16mf4_m(__VA_ARGS__)

◆ vssseg4e16_v_i16m1

#define vssseg4e16_v_i16m1 ( ... ) __riscv_vssseg4e16_v_i16m1(__VA_ARGS__)

◆ vssseg4e16_v_i16m1_m

#define vssseg4e16_v_i16m1_m ( ... ) __riscv_vssseg4e16_v_i16m1_m(__VA_ARGS__)

◆ vssseg4e16_v_i16m2

#define vssseg4e16_v_i16m2 ( ... ) __riscv_vssseg4e16_v_i16m2(__VA_ARGS__)

◆ vssseg4e16_v_i16m2_m

#define vssseg4e16_v_i16m2_m ( ... ) __riscv_vssseg4e16_v_i16m2_m(__VA_ARGS__)

◆ vssseg4e16_v_i16mf2

#define vssseg4e16_v_i16mf2 ( ... ) __riscv_vssseg4e16_v_i16mf2(__VA_ARGS__)

◆ vssseg4e16_v_i16mf2_m

#define vssseg4e16_v_i16mf2_m ( ... ) __riscv_vssseg4e16_v_i16mf2_m(__VA_ARGS__)

◆ vssseg4e16_v_i16mf4

#define vssseg4e16_v_i16mf4 ( ... ) __riscv_vssseg4e16_v_i16mf4(__VA_ARGS__)

◆ vssseg4e16_v_i16mf4_m

#define vssseg4e16_v_i16mf4_m ( ... ) __riscv_vssseg4e16_v_i16mf4_m(__VA_ARGS__)

◆ vssseg4e16_v_u16m1

#define vssseg4e16_v_u16m1 ( ... ) __riscv_vssseg4e16_v_u16m1(__VA_ARGS__)

◆ vssseg4e16_v_u16m1_m

#define vssseg4e16_v_u16m1_m ( ... ) __riscv_vssseg4e16_v_u16m1_m(__VA_ARGS__)

◆ vssseg4e16_v_u16m2

#define vssseg4e16_v_u16m2 ( ... ) __riscv_vssseg4e16_v_u16m2(__VA_ARGS__)

◆ vssseg4e16_v_u16m2_m

#define vssseg4e16_v_u16m2_m ( ... ) __riscv_vssseg4e16_v_u16m2_m(__VA_ARGS__)

◆ vssseg4e16_v_u16mf2

#define vssseg4e16_v_u16mf2 ( ... ) __riscv_vssseg4e16_v_u16mf2(__VA_ARGS__)

◆ vssseg4e16_v_u16mf2_m

#define vssseg4e16_v_u16mf2_m ( ... ) __riscv_vssseg4e16_v_u16mf2_m(__VA_ARGS__)

◆ vssseg4e16_v_u16mf4

#define vssseg4e16_v_u16mf4 ( ... ) __riscv_vssseg4e16_v_u16mf4(__VA_ARGS__)

◆ vssseg4e16_v_u16mf4_m

#define vssseg4e16_v_u16mf4_m ( ... ) __riscv_vssseg4e16_v_u16mf4_m(__VA_ARGS__)

◆ vssseg4e32_v_f32m1

#define vssseg4e32_v_f32m1 ( ... ) __riscv_vssseg4e32_v_f32m1(__VA_ARGS__)

◆ vssseg4e32_v_f32m1_m

#define vssseg4e32_v_f32m1_m ( ... ) __riscv_vssseg4e32_v_f32m1_m(__VA_ARGS__)

◆ vssseg4e32_v_f32m2

#define vssseg4e32_v_f32m2 ( ... ) __riscv_vssseg4e32_v_f32m2(__VA_ARGS__)

◆ vssseg4e32_v_f32m2_m

#define vssseg4e32_v_f32m2_m ( ... ) __riscv_vssseg4e32_v_f32m2_m(__VA_ARGS__)

◆ vssseg4e32_v_f32mf2

#define vssseg4e32_v_f32mf2 ( ... ) __riscv_vssseg4e32_v_f32mf2(__VA_ARGS__)

◆ vssseg4e32_v_f32mf2_m

#define vssseg4e32_v_f32mf2_m ( ... ) __riscv_vssseg4e32_v_f32mf2_m(__VA_ARGS__)

◆ vssseg4e32_v_i32m1

#define vssseg4e32_v_i32m1 ( ... ) __riscv_vssseg4e32_v_i32m1(__VA_ARGS__)

◆ vssseg4e32_v_i32m1_m

#define vssseg4e32_v_i32m1_m ( ... ) __riscv_vssseg4e32_v_i32m1_m(__VA_ARGS__)

◆ vssseg4e32_v_i32m2

#define vssseg4e32_v_i32m2 ( ... ) __riscv_vssseg4e32_v_i32m2(__VA_ARGS__)

◆ vssseg4e32_v_i32m2_m

#define vssseg4e32_v_i32m2_m ( ... ) __riscv_vssseg4e32_v_i32m2_m(__VA_ARGS__)

◆ vssseg4e32_v_i32mf2

#define vssseg4e32_v_i32mf2 ( ... ) __riscv_vssseg4e32_v_i32mf2(__VA_ARGS__)

◆ vssseg4e32_v_i32mf2_m

#define vssseg4e32_v_i32mf2_m ( ... ) __riscv_vssseg4e32_v_i32mf2_m(__VA_ARGS__)

◆ vssseg4e32_v_u32m1

#define vssseg4e32_v_u32m1 ( ... ) __riscv_vssseg4e32_v_u32m1(__VA_ARGS__)

◆ vssseg4e32_v_u32m1_m

#define vssseg4e32_v_u32m1_m ( ... ) __riscv_vssseg4e32_v_u32m1_m(__VA_ARGS__)

◆ vssseg4e32_v_u32m2

#define vssseg4e32_v_u32m2 ( ... ) __riscv_vssseg4e32_v_u32m2(__VA_ARGS__)

◆ vssseg4e32_v_u32m2_m

#define vssseg4e32_v_u32m2_m ( ... ) __riscv_vssseg4e32_v_u32m2_m(__VA_ARGS__)

◆ vssseg4e32_v_u32mf2

#define vssseg4e32_v_u32mf2 ( ... ) __riscv_vssseg4e32_v_u32mf2(__VA_ARGS__)

◆ vssseg4e32_v_u32mf2_m

#define vssseg4e32_v_u32mf2_m ( ... ) __riscv_vssseg4e32_v_u32mf2_m(__VA_ARGS__)

◆ vssseg4e64_v_f64m1

#define vssseg4e64_v_f64m1 ( ... ) __riscv_vssseg4e64_v_f64m1(__VA_ARGS__)

◆ vssseg4e64_v_f64m1_m

#define vssseg4e64_v_f64m1_m ( ... ) __riscv_vssseg4e64_v_f64m1_m(__VA_ARGS__)

◆ vssseg4e64_v_f64m2

#define vssseg4e64_v_f64m2 ( ... ) __riscv_vssseg4e64_v_f64m2(__VA_ARGS__)

◆ vssseg4e64_v_f64m2_m

#define vssseg4e64_v_f64m2_m ( ... ) __riscv_vssseg4e64_v_f64m2_m(__VA_ARGS__)

◆ vssseg4e64_v_i64m1

#define vssseg4e64_v_i64m1 ( ... ) __riscv_vssseg4e64_v_i64m1(__VA_ARGS__)

◆ vssseg4e64_v_i64m1_m

#define vssseg4e64_v_i64m1_m ( ... ) __riscv_vssseg4e64_v_i64m1_m(__VA_ARGS__)

◆ vssseg4e64_v_i64m2

#define vssseg4e64_v_i64m2 ( ... ) __riscv_vssseg4e64_v_i64m2(__VA_ARGS__)

◆ vssseg4e64_v_i64m2_m

#define vssseg4e64_v_i64m2_m ( ... ) __riscv_vssseg4e64_v_i64m2_m(__VA_ARGS__)

◆ vssseg4e64_v_u64m1

#define vssseg4e64_v_u64m1 ( ... ) __riscv_vssseg4e64_v_u64m1(__VA_ARGS__)

◆ vssseg4e64_v_u64m1_m

#define vssseg4e64_v_u64m1_m ( ... ) __riscv_vssseg4e64_v_u64m1_m(__VA_ARGS__)

◆ vssseg4e64_v_u64m2

#define vssseg4e64_v_u64m2 ( ... ) __riscv_vssseg4e64_v_u64m2(__VA_ARGS__)

◆ vssseg4e64_v_u64m2_m

#define vssseg4e64_v_u64m2_m ( ... ) __riscv_vssseg4e64_v_u64m2_m(__VA_ARGS__)

◆ vssseg4e8_v_i8m1

#define vssseg4e8_v_i8m1 ( ... ) __riscv_vssseg4e8_v_i8m1(__VA_ARGS__)

◆ vssseg4e8_v_i8m1_m

#define vssseg4e8_v_i8m1_m ( ... ) __riscv_vssseg4e8_v_i8m1_m(__VA_ARGS__)

◆ vssseg4e8_v_i8m2

#define vssseg4e8_v_i8m2 ( ... ) __riscv_vssseg4e8_v_i8m2(__VA_ARGS__)

◆ vssseg4e8_v_i8m2_m

#define vssseg4e8_v_i8m2_m ( ... ) __riscv_vssseg4e8_v_i8m2_m(__VA_ARGS__)

◆ vssseg4e8_v_i8mf2

#define vssseg4e8_v_i8mf2 ( ... ) __riscv_vssseg4e8_v_i8mf2(__VA_ARGS__)

◆ vssseg4e8_v_i8mf2_m

#define vssseg4e8_v_i8mf2_m ( ... ) __riscv_vssseg4e8_v_i8mf2_m(__VA_ARGS__)

◆ vssseg4e8_v_i8mf4

#define vssseg4e8_v_i8mf4 ( ... ) __riscv_vssseg4e8_v_i8mf4(__VA_ARGS__)

◆ vssseg4e8_v_i8mf4_m

#define vssseg4e8_v_i8mf4_m ( ... ) __riscv_vssseg4e8_v_i8mf4_m(__VA_ARGS__)

◆ vssseg4e8_v_i8mf8

#define vssseg4e8_v_i8mf8 ( ... ) __riscv_vssseg4e8_v_i8mf8(__VA_ARGS__)

◆ vssseg4e8_v_i8mf8_m

#define vssseg4e8_v_i8mf8_m ( ... ) __riscv_vssseg4e8_v_i8mf8_m(__VA_ARGS__)

◆ vssseg4e8_v_u8m1

#define vssseg4e8_v_u8m1 ( ... ) __riscv_vssseg4e8_v_u8m1(__VA_ARGS__)

◆ vssseg4e8_v_u8m1_m

#define vssseg4e8_v_u8m1_m ( ... ) __riscv_vssseg4e8_v_u8m1_m(__VA_ARGS__)

◆ vssseg4e8_v_u8m2

#define vssseg4e8_v_u8m2 ( ... ) __riscv_vssseg4e8_v_u8m2(__VA_ARGS__)

◆ vssseg4e8_v_u8m2_m

#define vssseg4e8_v_u8m2_m ( ... ) __riscv_vssseg4e8_v_u8m2_m(__VA_ARGS__)

◆ vssseg4e8_v_u8mf2

#define vssseg4e8_v_u8mf2 ( ... ) __riscv_vssseg4e8_v_u8mf2(__VA_ARGS__)

◆ vssseg4e8_v_u8mf2_m

#define vssseg4e8_v_u8mf2_m ( ... ) __riscv_vssseg4e8_v_u8mf2_m(__VA_ARGS__)

◆ vssseg4e8_v_u8mf4

#define vssseg4e8_v_u8mf4 ( ... ) __riscv_vssseg4e8_v_u8mf4(__VA_ARGS__)

◆ vssseg4e8_v_u8mf4_m

#define vssseg4e8_v_u8mf4_m ( ... ) __riscv_vssseg4e8_v_u8mf4_m(__VA_ARGS__)

◆ vssseg4e8_v_u8mf8

#define vssseg4e8_v_u8mf8 ( ... ) __riscv_vssseg4e8_v_u8mf8(__VA_ARGS__)

◆ vssseg4e8_v_u8mf8_m

#define vssseg4e8_v_u8mf8_m ( ... ) __riscv_vssseg4e8_v_u8mf8_m(__VA_ARGS__)

◆ vssseg5e16_v_f16m1

#define vssseg5e16_v_f16m1 ( ... ) __riscv_vssseg5e16_v_f16m1(__VA_ARGS__)

◆ vssseg5e16_v_f16m1_m

#define vssseg5e16_v_f16m1_m ( ... ) __riscv_vssseg5e16_v_f16m1_m(__VA_ARGS__)

◆ vssseg5e16_v_f16mf2

#define vssseg5e16_v_f16mf2 ( ... ) __riscv_vssseg5e16_v_f16mf2(__VA_ARGS__)

◆ vssseg5e16_v_f16mf2_m

#define vssseg5e16_v_f16mf2_m ( ... ) __riscv_vssseg5e16_v_f16mf2_m(__VA_ARGS__)

◆ vssseg5e16_v_f16mf4

#define vssseg5e16_v_f16mf4 ( ... ) __riscv_vssseg5e16_v_f16mf4(__VA_ARGS__)

◆ vssseg5e16_v_f16mf4_m

#define vssseg5e16_v_f16mf4_m ( ... ) __riscv_vssseg5e16_v_f16mf4_m(__VA_ARGS__)

◆ vssseg5e16_v_i16m1

#define vssseg5e16_v_i16m1 ( ... ) __riscv_vssseg5e16_v_i16m1(__VA_ARGS__)

◆ vssseg5e16_v_i16m1_m

#define vssseg5e16_v_i16m1_m ( ... ) __riscv_vssseg5e16_v_i16m1_m(__VA_ARGS__)

◆ vssseg5e16_v_i16mf2

#define vssseg5e16_v_i16mf2 ( ... ) __riscv_vssseg5e16_v_i16mf2(__VA_ARGS__)

◆ vssseg5e16_v_i16mf2_m

#define vssseg5e16_v_i16mf2_m ( ... ) __riscv_vssseg5e16_v_i16mf2_m(__VA_ARGS__)

◆ vssseg5e16_v_i16mf4

#define vssseg5e16_v_i16mf4 ( ... ) __riscv_vssseg5e16_v_i16mf4(__VA_ARGS__)

◆ vssseg5e16_v_i16mf4_m

#define vssseg5e16_v_i16mf4_m ( ... ) __riscv_vssseg5e16_v_i16mf4_m(__VA_ARGS__)

◆ vssseg5e16_v_u16m1

#define vssseg5e16_v_u16m1 ( ... ) __riscv_vssseg5e16_v_u16m1(__VA_ARGS__)

◆ vssseg5e16_v_u16m1_m

#define vssseg5e16_v_u16m1_m ( ... ) __riscv_vssseg5e16_v_u16m1_m(__VA_ARGS__)

◆ vssseg5e16_v_u16mf2

#define vssseg5e16_v_u16mf2 ( ... ) __riscv_vssseg5e16_v_u16mf2(__VA_ARGS__)

◆ vssseg5e16_v_u16mf2_m

#define vssseg5e16_v_u16mf2_m ( ... ) __riscv_vssseg5e16_v_u16mf2_m(__VA_ARGS__)

◆ vssseg5e16_v_u16mf4

#define vssseg5e16_v_u16mf4 ( ... ) __riscv_vssseg5e16_v_u16mf4(__VA_ARGS__)

◆ vssseg5e16_v_u16mf4_m

#define vssseg5e16_v_u16mf4_m ( ... ) __riscv_vssseg5e16_v_u16mf4_m(__VA_ARGS__)

◆ vssseg5e32_v_f32m1

#define vssseg5e32_v_f32m1 ( ... ) __riscv_vssseg5e32_v_f32m1(__VA_ARGS__)

◆ vssseg5e32_v_f32m1_m

#define vssseg5e32_v_f32m1_m ( ... ) __riscv_vssseg5e32_v_f32m1_m(__VA_ARGS__)

◆ vssseg5e32_v_f32mf2

#define vssseg5e32_v_f32mf2 ( ... ) __riscv_vssseg5e32_v_f32mf2(__VA_ARGS__)

◆ vssseg5e32_v_f32mf2_m

#define vssseg5e32_v_f32mf2_m ( ... ) __riscv_vssseg5e32_v_f32mf2_m(__VA_ARGS__)

◆ vssseg5e32_v_i32m1

#define vssseg5e32_v_i32m1 ( ... ) __riscv_vssseg5e32_v_i32m1(__VA_ARGS__)

◆ vssseg5e32_v_i32m1_m

#define vssseg5e32_v_i32m1_m ( ... ) __riscv_vssseg5e32_v_i32m1_m(__VA_ARGS__)

◆ vssseg5e32_v_i32mf2

#define vssseg5e32_v_i32mf2 ( ... ) __riscv_vssseg5e32_v_i32mf2(__VA_ARGS__)

◆ vssseg5e32_v_i32mf2_m

#define vssseg5e32_v_i32mf2_m ( ... ) __riscv_vssseg5e32_v_i32mf2_m(__VA_ARGS__)

◆ vssseg5e32_v_u32m1

#define vssseg5e32_v_u32m1 ( ... ) __riscv_vssseg5e32_v_u32m1(__VA_ARGS__)

◆ vssseg5e32_v_u32m1_m

#define vssseg5e32_v_u32m1_m ( ... ) __riscv_vssseg5e32_v_u32m1_m(__VA_ARGS__)

◆ vssseg5e32_v_u32mf2

#define vssseg5e32_v_u32mf2 ( ... ) __riscv_vssseg5e32_v_u32mf2(__VA_ARGS__)

◆ vssseg5e32_v_u32mf2_m

#define vssseg5e32_v_u32mf2_m ( ... ) __riscv_vssseg5e32_v_u32mf2_m(__VA_ARGS__)

◆ vssseg5e64_v_f64m1

#define vssseg5e64_v_f64m1 ( ... ) __riscv_vssseg5e64_v_f64m1(__VA_ARGS__)

◆ vssseg5e64_v_f64m1_m

#define vssseg5e64_v_f64m1_m ( ... ) __riscv_vssseg5e64_v_f64m1_m(__VA_ARGS__)

◆ vssseg5e64_v_i64m1

#define vssseg5e64_v_i64m1 ( ... ) __riscv_vssseg5e64_v_i64m1(__VA_ARGS__)

◆ vssseg5e64_v_i64m1_m

#define vssseg5e64_v_i64m1_m ( ... ) __riscv_vssseg5e64_v_i64m1_m(__VA_ARGS__)

◆ vssseg5e64_v_u64m1

#define vssseg5e64_v_u64m1 ( ... ) __riscv_vssseg5e64_v_u64m1(__VA_ARGS__)

◆ vssseg5e64_v_u64m1_m

#define vssseg5e64_v_u64m1_m ( ... ) __riscv_vssseg5e64_v_u64m1_m(__VA_ARGS__)

◆ vssseg5e8_v_i8m1

#define vssseg5e8_v_i8m1 ( ... ) __riscv_vssseg5e8_v_i8m1(__VA_ARGS__)

◆ vssseg5e8_v_i8m1_m

#define vssseg5e8_v_i8m1_m ( ... ) __riscv_vssseg5e8_v_i8m1_m(__VA_ARGS__)

◆ vssseg5e8_v_i8mf2

#define vssseg5e8_v_i8mf2 ( ... ) __riscv_vssseg5e8_v_i8mf2(__VA_ARGS__)

◆ vssseg5e8_v_i8mf2_m

#define vssseg5e8_v_i8mf2_m ( ... ) __riscv_vssseg5e8_v_i8mf2_m(__VA_ARGS__)

◆ vssseg5e8_v_i8mf4

#define vssseg5e8_v_i8mf4 ( ... ) __riscv_vssseg5e8_v_i8mf4(__VA_ARGS__)

◆ vssseg5e8_v_i8mf4_m

#define vssseg5e8_v_i8mf4_m ( ... ) __riscv_vssseg5e8_v_i8mf4_m(__VA_ARGS__)

◆ vssseg5e8_v_i8mf8

#define vssseg5e8_v_i8mf8 ( ... ) __riscv_vssseg5e8_v_i8mf8(__VA_ARGS__)

◆ vssseg5e8_v_i8mf8_m

#define vssseg5e8_v_i8mf8_m ( ... ) __riscv_vssseg5e8_v_i8mf8_m(__VA_ARGS__)

◆ vssseg5e8_v_u8m1

#define vssseg5e8_v_u8m1 ( ... ) __riscv_vssseg5e8_v_u8m1(__VA_ARGS__)

◆ vssseg5e8_v_u8m1_m

#define vssseg5e8_v_u8m1_m ( ... ) __riscv_vssseg5e8_v_u8m1_m(__VA_ARGS__)

◆ vssseg5e8_v_u8mf2

#define vssseg5e8_v_u8mf2 ( ... ) __riscv_vssseg5e8_v_u8mf2(__VA_ARGS__)

◆ vssseg5e8_v_u8mf2_m

#define vssseg5e8_v_u8mf2_m ( ... ) __riscv_vssseg5e8_v_u8mf2_m(__VA_ARGS__)

◆ vssseg5e8_v_u8mf4

#define vssseg5e8_v_u8mf4 ( ... ) __riscv_vssseg5e8_v_u8mf4(__VA_ARGS__)

◆ vssseg5e8_v_u8mf4_m

#define vssseg5e8_v_u8mf4_m ( ... ) __riscv_vssseg5e8_v_u8mf4_m(__VA_ARGS__)

◆ vssseg5e8_v_u8mf8

#define vssseg5e8_v_u8mf8 ( ... ) __riscv_vssseg5e8_v_u8mf8(__VA_ARGS__)

◆ vssseg5e8_v_u8mf8_m

#define vssseg5e8_v_u8mf8_m ( ... ) __riscv_vssseg5e8_v_u8mf8_m(__VA_ARGS__)

◆ vssseg6e16_v_f16m1

#define vssseg6e16_v_f16m1 ( ... ) __riscv_vssseg6e16_v_f16m1(__VA_ARGS__)

◆ vssseg6e16_v_f16m1_m

#define vssseg6e16_v_f16m1_m ( ... ) __riscv_vssseg6e16_v_f16m1_m(__VA_ARGS__)

◆ vssseg6e16_v_f16mf2

#define vssseg6e16_v_f16mf2 ( ... ) __riscv_vssseg6e16_v_f16mf2(__VA_ARGS__)

◆ vssseg6e16_v_f16mf2_m

#define vssseg6e16_v_f16mf2_m ( ... ) __riscv_vssseg6e16_v_f16mf2_m(__VA_ARGS__)

◆ vssseg6e16_v_f16mf4

#define vssseg6e16_v_f16mf4 ( ... ) __riscv_vssseg6e16_v_f16mf4(__VA_ARGS__)

◆ vssseg6e16_v_f16mf4_m

#define vssseg6e16_v_f16mf4_m ( ... ) __riscv_vssseg6e16_v_f16mf4_m(__VA_ARGS__)

◆ vssseg6e16_v_i16m1

#define vssseg6e16_v_i16m1 ( ... ) __riscv_vssseg6e16_v_i16m1(__VA_ARGS__)

◆ vssseg6e16_v_i16m1_m

#define vssseg6e16_v_i16m1_m ( ... ) __riscv_vssseg6e16_v_i16m1_m(__VA_ARGS__)

◆ vssseg6e16_v_i16mf2

#define vssseg6e16_v_i16mf2 ( ... ) __riscv_vssseg6e16_v_i16mf2(__VA_ARGS__)

◆ vssseg6e16_v_i16mf2_m

#define vssseg6e16_v_i16mf2_m ( ... ) __riscv_vssseg6e16_v_i16mf2_m(__VA_ARGS__)

◆ vssseg6e16_v_i16mf4

#define vssseg6e16_v_i16mf4 ( ... ) __riscv_vssseg6e16_v_i16mf4(__VA_ARGS__)

◆ vssseg6e16_v_i16mf4_m

#define vssseg6e16_v_i16mf4_m ( ... ) __riscv_vssseg6e16_v_i16mf4_m(__VA_ARGS__)

◆ vssseg6e16_v_u16m1

#define vssseg6e16_v_u16m1 ( ... ) __riscv_vssseg6e16_v_u16m1(__VA_ARGS__)

◆ vssseg6e16_v_u16m1_m

#define vssseg6e16_v_u16m1_m ( ... ) __riscv_vssseg6e16_v_u16m1_m(__VA_ARGS__)

◆ vssseg6e16_v_u16mf2

#define vssseg6e16_v_u16mf2 ( ... ) __riscv_vssseg6e16_v_u16mf2(__VA_ARGS__)

◆ vssseg6e16_v_u16mf2_m

#define vssseg6e16_v_u16mf2_m ( ... ) __riscv_vssseg6e16_v_u16mf2_m(__VA_ARGS__)

◆ vssseg6e16_v_u16mf4

#define vssseg6e16_v_u16mf4 ( ... ) __riscv_vssseg6e16_v_u16mf4(__VA_ARGS__)

◆ vssseg6e16_v_u16mf4_m

#define vssseg6e16_v_u16mf4_m ( ... ) __riscv_vssseg6e16_v_u16mf4_m(__VA_ARGS__)

◆ vssseg6e32_v_f32m1

#define vssseg6e32_v_f32m1 ( ... ) __riscv_vssseg6e32_v_f32m1(__VA_ARGS__)

◆ vssseg6e32_v_f32m1_m

#define vssseg6e32_v_f32m1_m ( ... ) __riscv_vssseg6e32_v_f32m1_m(__VA_ARGS__)

◆ vssseg6e32_v_f32mf2

#define vssseg6e32_v_f32mf2 ( ... ) __riscv_vssseg6e32_v_f32mf2(__VA_ARGS__)

◆ vssseg6e32_v_f32mf2_m

#define vssseg6e32_v_f32mf2_m ( ... ) __riscv_vssseg6e32_v_f32mf2_m(__VA_ARGS__)

◆ vssseg6e32_v_i32m1

#define vssseg6e32_v_i32m1 ( ... ) __riscv_vssseg6e32_v_i32m1(__VA_ARGS__)

◆ vssseg6e32_v_i32m1_m

#define vssseg6e32_v_i32m1_m ( ... ) __riscv_vssseg6e32_v_i32m1_m(__VA_ARGS__)

◆ vssseg6e32_v_i32mf2

#define vssseg6e32_v_i32mf2 ( ... ) __riscv_vssseg6e32_v_i32mf2(__VA_ARGS__)

◆ vssseg6e32_v_i32mf2_m

#define vssseg6e32_v_i32mf2_m ( ... ) __riscv_vssseg6e32_v_i32mf2_m(__VA_ARGS__)

◆ vssseg6e32_v_u32m1

#define vssseg6e32_v_u32m1 ( ... ) __riscv_vssseg6e32_v_u32m1(__VA_ARGS__)

◆ vssseg6e32_v_u32m1_m

#define vssseg6e32_v_u32m1_m ( ... ) __riscv_vssseg6e32_v_u32m1_m(__VA_ARGS__)

◆ vssseg6e32_v_u32mf2

#define vssseg6e32_v_u32mf2 ( ... ) __riscv_vssseg6e32_v_u32mf2(__VA_ARGS__)

◆ vssseg6e32_v_u32mf2_m

#define vssseg6e32_v_u32mf2_m ( ... ) __riscv_vssseg6e32_v_u32mf2_m(__VA_ARGS__)

◆ vssseg6e64_v_f64m1

#define vssseg6e64_v_f64m1 ( ... ) __riscv_vssseg6e64_v_f64m1(__VA_ARGS__)

◆ vssseg6e64_v_f64m1_m

#define vssseg6e64_v_f64m1_m ( ... ) __riscv_vssseg6e64_v_f64m1_m(__VA_ARGS__)

◆ vssseg6e64_v_i64m1

#define vssseg6e64_v_i64m1 ( ... ) __riscv_vssseg6e64_v_i64m1(__VA_ARGS__)

◆ vssseg6e64_v_i64m1_m

#define vssseg6e64_v_i64m1_m ( ... ) __riscv_vssseg6e64_v_i64m1_m(__VA_ARGS__)

◆ vssseg6e64_v_u64m1

#define vssseg6e64_v_u64m1 ( ... ) __riscv_vssseg6e64_v_u64m1(__VA_ARGS__)

◆ vssseg6e64_v_u64m1_m

#define vssseg6e64_v_u64m1_m ( ... ) __riscv_vssseg6e64_v_u64m1_m(__VA_ARGS__)

◆ vssseg6e8_v_i8m1

#define vssseg6e8_v_i8m1 ( ... ) __riscv_vssseg6e8_v_i8m1(__VA_ARGS__)

◆ vssseg6e8_v_i8m1_m

#define vssseg6e8_v_i8m1_m ( ... ) __riscv_vssseg6e8_v_i8m1_m(__VA_ARGS__)

◆ vssseg6e8_v_i8mf2

#define vssseg6e8_v_i8mf2 ( ... ) __riscv_vssseg6e8_v_i8mf2(__VA_ARGS__)

◆ vssseg6e8_v_i8mf2_m

#define vssseg6e8_v_i8mf2_m ( ... ) __riscv_vssseg6e8_v_i8mf2_m(__VA_ARGS__)

◆ vssseg6e8_v_i8mf4

#define vssseg6e8_v_i8mf4 ( ... ) __riscv_vssseg6e8_v_i8mf4(__VA_ARGS__)

◆ vssseg6e8_v_i8mf4_m

#define vssseg6e8_v_i8mf4_m ( ... ) __riscv_vssseg6e8_v_i8mf4_m(__VA_ARGS__)

◆ vssseg6e8_v_i8mf8

#define vssseg6e8_v_i8mf8 ( ... ) __riscv_vssseg6e8_v_i8mf8(__VA_ARGS__)

◆ vssseg6e8_v_i8mf8_m

#define vssseg6e8_v_i8mf8_m ( ... ) __riscv_vssseg6e8_v_i8mf8_m(__VA_ARGS__)

◆ vssseg6e8_v_u8m1

#define vssseg6e8_v_u8m1 ( ... ) __riscv_vssseg6e8_v_u8m1(__VA_ARGS__)

◆ vssseg6e8_v_u8m1_m

#define vssseg6e8_v_u8m1_m ( ... ) __riscv_vssseg6e8_v_u8m1_m(__VA_ARGS__)

◆ vssseg6e8_v_u8mf2

#define vssseg6e8_v_u8mf2 ( ... ) __riscv_vssseg6e8_v_u8mf2(__VA_ARGS__)

◆ vssseg6e8_v_u8mf2_m

#define vssseg6e8_v_u8mf2_m ( ... ) __riscv_vssseg6e8_v_u8mf2_m(__VA_ARGS__)

◆ vssseg6e8_v_u8mf4

#define vssseg6e8_v_u8mf4 ( ... ) __riscv_vssseg6e8_v_u8mf4(__VA_ARGS__)

◆ vssseg6e8_v_u8mf4_m

#define vssseg6e8_v_u8mf4_m ( ... ) __riscv_vssseg6e8_v_u8mf4_m(__VA_ARGS__)

◆ vssseg6e8_v_u8mf8

#define vssseg6e8_v_u8mf8 ( ... ) __riscv_vssseg6e8_v_u8mf8(__VA_ARGS__)

◆ vssseg6e8_v_u8mf8_m

#define vssseg6e8_v_u8mf8_m ( ... ) __riscv_vssseg6e8_v_u8mf8_m(__VA_ARGS__)

◆ vssseg7e16_v_f16m1

#define vssseg7e16_v_f16m1 ( ... ) __riscv_vssseg7e16_v_f16m1(__VA_ARGS__)

◆ vssseg7e16_v_f16m1_m

#define vssseg7e16_v_f16m1_m ( ... ) __riscv_vssseg7e16_v_f16m1_m(__VA_ARGS__)

◆ vssseg7e16_v_f16mf2

#define vssseg7e16_v_f16mf2 ( ... ) __riscv_vssseg7e16_v_f16mf2(__VA_ARGS__)

◆ vssseg7e16_v_f16mf2_m

#define vssseg7e16_v_f16mf2_m ( ... ) __riscv_vssseg7e16_v_f16mf2_m(__VA_ARGS__)

◆ vssseg7e16_v_f16mf4

#define vssseg7e16_v_f16mf4 ( ... ) __riscv_vssseg7e16_v_f16mf4(__VA_ARGS__)

◆ vssseg7e16_v_f16mf4_m

#define vssseg7e16_v_f16mf4_m ( ... ) __riscv_vssseg7e16_v_f16mf4_m(__VA_ARGS__)

◆ vssseg7e16_v_i16m1

#define vssseg7e16_v_i16m1 ( ... ) __riscv_vssseg7e16_v_i16m1(__VA_ARGS__)

◆ vssseg7e16_v_i16m1_m

#define vssseg7e16_v_i16m1_m ( ... ) __riscv_vssseg7e16_v_i16m1_m(__VA_ARGS__)

◆ vssseg7e16_v_i16mf2

#define vssseg7e16_v_i16mf2 ( ... ) __riscv_vssseg7e16_v_i16mf2(__VA_ARGS__)

◆ vssseg7e16_v_i16mf2_m

#define vssseg7e16_v_i16mf2_m ( ... ) __riscv_vssseg7e16_v_i16mf2_m(__VA_ARGS__)

◆ vssseg7e16_v_i16mf4

#define vssseg7e16_v_i16mf4 ( ... ) __riscv_vssseg7e16_v_i16mf4(__VA_ARGS__)

◆ vssseg7e16_v_i16mf4_m

#define vssseg7e16_v_i16mf4_m ( ... ) __riscv_vssseg7e16_v_i16mf4_m(__VA_ARGS__)

◆ vssseg7e16_v_u16m1

#define vssseg7e16_v_u16m1 ( ... ) __riscv_vssseg7e16_v_u16m1(__VA_ARGS__)

◆ vssseg7e16_v_u16m1_m

#define vssseg7e16_v_u16m1_m ( ... ) __riscv_vssseg7e16_v_u16m1_m(__VA_ARGS__)

◆ vssseg7e16_v_u16mf2

#define vssseg7e16_v_u16mf2 ( ... ) __riscv_vssseg7e16_v_u16mf2(__VA_ARGS__)

◆ vssseg7e16_v_u16mf2_m

#define vssseg7e16_v_u16mf2_m ( ... ) __riscv_vssseg7e16_v_u16mf2_m(__VA_ARGS__)

◆ vssseg7e16_v_u16mf4

#define vssseg7e16_v_u16mf4 ( ... ) __riscv_vssseg7e16_v_u16mf4(__VA_ARGS__)

◆ vssseg7e16_v_u16mf4_m

#define vssseg7e16_v_u16mf4_m ( ... ) __riscv_vssseg7e16_v_u16mf4_m(__VA_ARGS__)

◆ vssseg7e32_v_f32m1

#define vssseg7e32_v_f32m1 ( ... ) __riscv_vssseg7e32_v_f32m1(__VA_ARGS__)

◆ vssseg7e32_v_f32m1_m

#define vssseg7e32_v_f32m1_m ( ... ) __riscv_vssseg7e32_v_f32m1_m(__VA_ARGS__)

◆ vssseg7e32_v_f32mf2

#define vssseg7e32_v_f32mf2 ( ... ) __riscv_vssseg7e32_v_f32mf2(__VA_ARGS__)

◆ vssseg7e32_v_f32mf2_m

#define vssseg7e32_v_f32mf2_m ( ... ) __riscv_vssseg7e32_v_f32mf2_m(__VA_ARGS__)

◆ vssseg7e32_v_i32m1

#define vssseg7e32_v_i32m1 ( ... ) __riscv_vssseg7e32_v_i32m1(__VA_ARGS__)

◆ vssseg7e32_v_i32m1_m

#define vssseg7e32_v_i32m1_m ( ... ) __riscv_vssseg7e32_v_i32m1_m(__VA_ARGS__)

◆ vssseg7e32_v_i32mf2

#define vssseg7e32_v_i32mf2 ( ... ) __riscv_vssseg7e32_v_i32mf2(__VA_ARGS__)

◆ vssseg7e32_v_i32mf2_m

#define vssseg7e32_v_i32mf2_m ( ... ) __riscv_vssseg7e32_v_i32mf2_m(__VA_ARGS__)

◆ vssseg7e32_v_u32m1

#define vssseg7e32_v_u32m1 ( ... ) __riscv_vssseg7e32_v_u32m1(__VA_ARGS__)

◆ vssseg7e32_v_u32m1_m

#define vssseg7e32_v_u32m1_m ( ... ) __riscv_vssseg7e32_v_u32m1_m(__VA_ARGS__)

◆ vssseg7e32_v_u32mf2

#define vssseg7e32_v_u32mf2 ( ... ) __riscv_vssseg7e32_v_u32mf2(__VA_ARGS__)

◆ vssseg7e32_v_u32mf2_m

#define vssseg7e32_v_u32mf2_m ( ... ) __riscv_vssseg7e32_v_u32mf2_m(__VA_ARGS__)

◆ vssseg7e64_v_f64m1

#define vssseg7e64_v_f64m1 ( ... ) __riscv_vssseg7e64_v_f64m1(__VA_ARGS__)

◆ vssseg7e64_v_f64m1_m

#define vssseg7e64_v_f64m1_m ( ... ) __riscv_vssseg7e64_v_f64m1_m(__VA_ARGS__)

◆ vssseg7e64_v_i64m1

#define vssseg7e64_v_i64m1 ( ... ) __riscv_vssseg7e64_v_i64m1(__VA_ARGS__)

◆ vssseg7e64_v_i64m1_m

#define vssseg7e64_v_i64m1_m ( ... ) __riscv_vssseg7e64_v_i64m1_m(__VA_ARGS__)

◆ vssseg7e64_v_u64m1

#define vssseg7e64_v_u64m1 ( ... ) __riscv_vssseg7e64_v_u64m1(__VA_ARGS__)

◆ vssseg7e64_v_u64m1_m

#define vssseg7e64_v_u64m1_m ( ... ) __riscv_vssseg7e64_v_u64m1_m(__VA_ARGS__)

◆ vssseg7e8_v_i8m1

#define vssseg7e8_v_i8m1 ( ... ) __riscv_vssseg7e8_v_i8m1(__VA_ARGS__)

◆ vssseg7e8_v_i8m1_m

#define vssseg7e8_v_i8m1_m ( ... ) __riscv_vssseg7e8_v_i8m1_m(__VA_ARGS__)

◆ vssseg7e8_v_i8mf2

#define vssseg7e8_v_i8mf2 ( ... ) __riscv_vssseg7e8_v_i8mf2(__VA_ARGS__)

◆ vssseg7e8_v_i8mf2_m

#define vssseg7e8_v_i8mf2_m ( ... ) __riscv_vssseg7e8_v_i8mf2_m(__VA_ARGS__)

◆ vssseg7e8_v_i8mf4

#define vssseg7e8_v_i8mf4 ( ... ) __riscv_vssseg7e8_v_i8mf4(__VA_ARGS__)

◆ vssseg7e8_v_i8mf4_m

#define vssseg7e8_v_i8mf4_m ( ... ) __riscv_vssseg7e8_v_i8mf4_m(__VA_ARGS__)

◆ vssseg7e8_v_i8mf8

#define vssseg7e8_v_i8mf8 ( ... ) __riscv_vssseg7e8_v_i8mf8(__VA_ARGS__)

◆ vssseg7e8_v_i8mf8_m

#define vssseg7e8_v_i8mf8_m ( ... ) __riscv_vssseg7e8_v_i8mf8_m(__VA_ARGS__)

◆ vssseg7e8_v_u8m1

#define vssseg7e8_v_u8m1 ( ... ) __riscv_vssseg7e8_v_u8m1(__VA_ARGS__)

◆ vssseg7e8_v_u8m1_m

#define vssseg7e8_v_u8m1_m ( ... ) __riscv_vssseg7e8_v_u8m1_m(__VA_ARGS__)

◆ vssseg7e8_v_u8mf2

#define vssseg7e8_v_u8mf2 ( ... ) __riscv_vssseg7e8_v_u8mf2(__VA_ARGS__)

◆ vssseg7e8_v_u8mf2_m

#define vssseg7e8_v_u8mf2_m ( ... ) __riscv_vssseg7e8_v_u8mf2_m(__VA_ARGS__)

◆ vssseg7e8_v_u8mf4

#define vssseg7e8_v_u8mf4 ( ... ) __riscv_vssseg7e8_v_u8mf4(__VA_ARGS__)

◆ vssseg7e8_v_u8mf4_m

#define vssseg7e8_v_u8mf4_m ( ... ) __riscv_vssseg7e8_v_u8mf4_m(__VA_ARGS__)

◆ vssseg7e8_v_u8mf8

#define vssseg7e8_v_u8mf8 ( ... ) __riscv_vssseg7e8_v_u8mf8(__VA_ARGS__)

◆ vssseg7e8_v_u8mf8_m

#define vssseg7e8_v_u8mf8_m ( ... ) __riscv_vssseg7e8_v_u8mf8_m(__VA_ARGS__)

◆ vssseg8e16_v_f16m1

#define vssseg8e16_v_f16m1 ( ... ) __riscv_vssseg8e16_v_f16m1(__VA_ARGS__)

◆ vssseg8e16_v_f16m1_m

#define vssseg8e16_v_f16m1_m ( ... ) __riscv_vssseg8e16_v_f16m1_m(__VA_ARGS__)

◆ vssseg8e16_v_f16mf2

#define vssseg8e16_v_f16mf2 ( ... ) __riscv_vssseg8e16_v_f16mf2(__VA_ARGS__)

◆ vssseg8e16_v_f16mf2_m

#define vssseg8e16_v_f16mf2_m ( ... ) __riscv_vssseg8e16_v_f16mf2_m(__VA_ARGS__)

◆ vssseg8e16_v_f16mf4

#define vssseg8e16_v_f16mf4 ( ... ) __riscv_vssseg8e16_v_f16mf4(__VA_ARGS__)

◆ vssseg8e16_v_f16mf4_m

#define vssseg8e16_v_f16mf4_m ( ... ) __riscv_vssseg8e16_v_f16mf4_m(__VA_ARGS__)

◆ vssseg8e16_v_i16m1

#define vssseg8e16_v_i16m1 ( ... ) __riscv_vssseg8e16_v_i16m1(__VA_ARGS__)

◆ vssseg8e16_v_i16m1_m

#define vssseg8e16_v_i16m1_m ( ... ) __riscv_vssseg8e16_v_i16m1_m(__VA_ARGS__)

◆ vssseg8e16_v_i16mf2

#define vssseg8e16_v_i16mf2 ( ... ) __riscv_vssseg8e16_v_i16mf2(__VA_ARGS__)

◆ vssseg8e16_v_i16mf2_m

#define vssseg8e16_v_i16mf2_m ( ... ) __riscv_vssseg8e16_v_i16mf2_m(__VA_ARGS__)

◆ vssseg8e16_v_i16mf4

#define vssseg8e16_v_i16mf4 ( ... ) __riscv_vssseg8e16_v_i16mf4(__VA_ARGS__)

◆ vssseg8e16_v_i16mf4_m

#define vssseg8e16_v_i16mf4_m ( ... ) __riscv_vssseg8e16_v_i16mf4_m(__VA_ARGS__)

◆ vssseg8e16_v_u16m1

#define vssseg8e16_v_u16m1 ( ... ) __riscv_vssseg8e16_v_u16m1(__VA_ARGS__)

◆ vssseg8e16_v_u16m1_m

#define vssseg8e16_v_u16m1_m ( ... ) __riscv_vssseg8e16_v_u16m1_m(__VA_ARGS__)

◆ vssseg8e16_v_u16mf2

#define vssseg8e16_v_u16mf2 ( ... ) __riscv_vssseg8e16_v_u16mf2(__VA_ARGS__)

◆ vssseg8e16_v_u16mf2_m

#define vssseg8e16_v_u16mf2_m ( ... ) __riscv_vssseg8e16_v_u16mf2_m(__VA_ARGS__)

◆ vssseg8e16_v_u16mf4

#define vssseg8e16_v_u16mf4 ( ... ) __riscv_vssseg8e16_v_u16mf4(__VA_ARGS__)

◆ vssseg8e16_v_u16mf4_m

#define vssseg8e16_v_u16mf4_m ( ... ) __riscv_vssseg8e16_v_u16mf4_m(__VA_ARGS__)

◆ vssseg8e32_v_f32m1

#define vssseg8e32_v_f32m1 ( ... ) __riscv_vssseg8e32_v_f32m1(__VA_ARGS__)

◆ vssseg8e32_v_f32m1_m

#define vssseg8e32_v_f32m1_m ( ... ) __riscv_vssseg8e32_v_f32m1_m(__VA_ARGS__)

◆ vssseg8e32_v_f32mf2

#define vssseg8e32_v_f32mf2 ( ... ) __riscv_vssseg8e32_v_f32mf2(__VA_ARGS__)

◆ vssseg8e32_v_f32mf2_m

#define vssseg8e32_v_f32mf2_m ( ... ) __riscv_vssseg8e32_v_f32mf2_m(__VA_ARGS__)

◆ vssseg8e32_v_i32m1

#define vssseg8e32_v_i32m1 ( ... ) __riscv_vssseg8e32_v_i32m1(__VA_ARGS__)

◆ vssseg8e32_v_i32m1_m

#define vssseg8e32_v_i32m1_m ( ... ) __riscv_vssseg8e32_v_i32m1_m(__VA_ARGS__)

◆ vssseg8e32_v_i32mf2

#define vssseg8e32_v_i32mf2 ( ... ) __riscv_vssseg8e32_v_i32mf2(__VA_ARGS__)

◆ vssseg8e32_v_i32mf2_m

#define vssseg8e32_v_i32mf2_m ( ... ) __riscv_vssseg8e32_v_i32mf2_m(__VA_ARGS__)

◆ vssseg8e32_v_u32m1

#define vssseg8e32_v_u32m1 ( ... ) __riscv_vssseg8e32_v_u32m1(__VA_ARGS__)

◆ vssseg8e32_v_u32m1_m

#define vssseg8e32_v_u32m1_m ( ... ) __riscv_vssseg8e32_v_u32m1_m(__VA_ARGS__)

◆ vssseg8e32_v_u32mf2

#define vssseg8e32_v_u32mf2 ( ... ) __riscv_vssseg8e32_v_u32mf2(__VA_ARGS__)

◆ vssseg8e32_v_u32mf2_m

#define vssseg8e32_v_u32mf2_m ( ... ) __riscv_vssseg8e32_v_u32mf2_m(__VA_ARGS__)

◆ vssseg8e64_v_f64m1

#define vssseg8e64_v_f64m1 ( ... ) __riscv_vssseg8e64_v_f64m1(__VA_ARGS__)

◆ vssseg8e64_v_f64m1_m

#define vssseg8e64_v_f64m1_m ( ... ) __riscv_vssseg8e64_v_f64m1_m(__VA_ARGS__)

◆ vssseg8e64_v_i64m1

#define vssseg8e64_v_i64m1 ( ... ) __riscv_vssseg8e64_v_i64m1(__VA_ARGS__)

◆ vssseg8e64_v_i64m1_m

#define vssseg8e64_v_i64m1_m ( ... ) __riscv_vssseg8e64_v_i64m1_m(__VA_ARGS__)

◆ vssseg8e64_v_u64m1

#define vssseg8e64_v_u64m1 ( ... ) __riscv_vssseg8e64_v_u64m1(__VA_ARGS__)

◆ vssseg8e64_v_u64m1_m

#define vssseg8e64_v_u64m1_m ( ... ) __riscv_vssseg8e64_v_u64m1_m(__VA_ARGS__)

◆ vssseg8e8_v_i8m1

#define vssseg8e8_v_i8m1 ( ... ) __riscv_vssseg8e8_v_i8m1(__VA_ARGS__)

◆ vssseg8e8_v_i8m1_m

#define vssseg8e8_v_i8m1_m ( ... ) __riscv_vssseg8e8_v_i8m1_m(__VA_ARGS__)

◆ vssseg8e8_v_i8mf2

#define vssseg8e8_v_i8mf2 ( ... ) __riscv_vssseg8e8_v_i8mf2(__VA_ARGS__)

◆ vssseg8e8_v_i8mf2_m

#define vssseg8e8_v_i8mf2_m ( ... ) __riscv_vssseg8e8_v_i8mf2_m(__VA_ARGS__)

◆ vssseg8e8_v_i8mf4

#define vssseg8e8_v_i8mf4 ( ... ) __riscv_vssseg8e8_v_i8mf4(__VA_ARGS__)

◆ vssseg8e8_v_i8mf4_m

#define vssseg8e8_v_i8mf4_m ( ... ) __riscv_vssseg8e8_v_i8mf4_m(__VA_ARGS__)

◆ vssseg8e8_v_i8mf8

#define vssseg8e8_v_i8mf8 ( ... ) __riscv_vssseg8e8_v_i8mf8(__VA_ARGS__)

◆ vssseg8e8_v_i8mf8_m

#define vssseg8e8_v_i8mf8_m ( ... ) __riscv_vssseg8e8_v_i8mf8_m(__VA_ARGS__)

◆ vssseg8e8_v_u8m1

#define vssseg8e8_v_u8m1 ( ... ) __riscv_vssseg8e8_v_u8m1(__VA_ARGS__)

◆ vssseg8e8_v_u8m1_m

#define vssseg8e8_v_u8m1_m ( ... ) __riscv_vssseg8e8_v_u8m1_m(__VA_ARGS__)

◆ vssseg8e8_v_u8mf2

#define vssseg8e8_v_u8mf2 ( ... ) __riscv_vssseg8e8_v_u8mf2(__VA_ARGS__)

◆ vssseg8e8_v_u8mf2_m

#define vssseg8e8_v_u8mf2_m ( ... ) __riscv_vssseg8e8_v_u8mf2_m(__VA_ARGS__)

◆ vssseg8e8_v_u8mf4

#define vssseg8e8_v_u8mf4 ( ... ) __riscv_vssseg8e8_v_u8mf4(__VA_ARGS__)

◆ vssseg8e8_v_u8mf4_m

#define vssseg8e8_v_u8mf4_m ( ... ) __riscv_vssseg8e8_v_u8mf4_m(__VA_ARGS__)

◆ vssseg8e8_v_u8mf8

#define vssseg8e8_v_u8mf8 ( ... ) __riscv_vssseg8e8_v_u8mf8(__VA_ARGS__)

◆ vssseg8e8_v_u8mf8_m

#define vssseg8e8_v_u8mf8_m ( ... ) __riscv_vssseg8e8_v_u8mf8_m(__VA_ARGS__)

◆ vssub_vv_i16m1

#define vssub_vv_i16m1 ( ... ) __riscv_vssub_vv_i16m1(__VA_ARGS__)

◆ vssub_vv_i16m1_m

#define vssub_vv_i16m1_m ( ... ) __riscv_vssub_vv_i16m1_tumu(__VA_ARGS__)

◆ vssub_vv_i16m2

#define vssub_vv_i16m2 ( ... ) __riscv_vssub_vv_i16m2(__VA_ARGS__)

◆ vssub_vv_i16m2_m

#define vssub_vv_i16m2_m ( ... ) __riscv_vssub_vv_i16m2_tumu(__VA_ARGS__)

◆ vssub_vv_i16m4

#define vssub_vv_i16m4 ( ... ) __riscv_vssub_vv_i16m4(__VA_ARGS__)

◆ vssub_vv_i16m4_m

#define vssub_vv_i16m4_m ( ... ) __riscv_vssub_vv_i16m4_tumu(__VA_ARGS__)

◆ vssub_vv_i16m8

#define vssub_vv_i16m8 ( ... ) __riscv_vssub_vv_i16m8(__VA_ARGS__)

◆ vssub_vv_i16m8_m

#define vssub_vv_i16m8_m ( ... ) __riscv_vssub_vv_i16m8_tumu(__VA_ARGS__)

◆ vssub_vv_i16mf2

#define vssub_vv_i16mf2 ( ... ) __riscv_vssub_vv_i16mf2(__VA_ARGS__)

◆ vssub_vv_i16mf2_m

#define vssub_vv_i16mf2_m ( ... ) __riscv_vssub_vv_i16mf2_tumu(__VA_ARGS__)

◆ vssub_vv_i16mf4

#define vssub_vv_i16mf4 ( ... ) __riscv_vssub_vv_i16mf4(__VA_ARGS__)

◆ vssub_vv_i16mf4_m

#define vssub_vv_i16mf4_m ( ... ) __riscv_vssub_vv_i16mf4_tumu(__VA_ARGS__)

◆ vssub_vv_i32m1

#define vssub_vv_i32m1 ( ... ) __riscv_vssub_vv_i32m1(__VA_ARGS__)

◆ vssub_vv_i32m1_m

#define vssub_vv_i32m1_m ( ... ) __riscv_vssub_vv_i32m1_tumu(__VA_ARGS__)

◆ vssub_vv_i32m2

#define vssub_vv_i32m2 ( ... ) __riscv_vssub_vv_i32m2(__VA_ARGS__)

◆ vssub_vv_i32m2_m

#define vssub_vv_i32m2_m ( ... ) __riscv_vssub_vv_i32m2_tumu(__VA_ARGS__)

◆ vssub_vv_i32m4

#define vssub_vv_i32m4 ( ... ) __riscv_vssub_vv_i32m4(__VA_ARGS__)

◆ vssub_vv_i32m4_m

#define vssub_vv_i32m4_m ( ... ) __riscv_vssub_vv_i32m4_tumu(__VA_ARGS__)

◆ vssub_vv_i32m8

#define vssub_vv_i32m8 ( ... ) __riscv_vssub_vv_i32m8(__VA_ARGS__)

◆ vssub_vv_i32m8_m

#define vssub_vv_i32m8_m ( ... ) __riscv_vssub_vv_i32m8_tumu(__VA_ARGS__)

◆ vssub_vv_i32mf2

#define vssub_vv_i32mf2 ( ... ) __riscv_vssub_vv_i32mf2(__VA_ARGS__)

◆ vssub_vv_i32mf2_m

#define vssub_vv_i32mf2_m ( ... ) __riscv_vssub_vv_i32mf2_tumu(__VA_ARGS__)

◆ vssub_vv_i64m1

#define vssub_vv_i64m1 ( ... ) __riscv_vssub_vv_i64m1(__VA_ARGS__)

◆ vssub_vv_i64m1_m

#define vssub_vv_i64m1_m ( ... ) __riscv_vssub_vv_i64m1_tumu(__VA_ARGS__)

◆ vssub_vv_i64m2

#define vssub_vv_i64m2 ( ... ) __riscv_vssub_vv_i64m2(__VA_ARGS__)

◆ vssub_vv_i64m2_m

#define vssub_vv_i64m2_m ( ... ) __riscv_vssub_vv_i64m2_tumu(__VA_ARGS__)

◆ vssub_vv_i64m4

#define vssub_vv_i64m4 ( ... ) __riscv_vssub_vv_i64m4(__VA_ARGS__)

◆ vssub_vv_i64m4_m

#define vssub_vv_i64m4_m ( ... ) __riscv_vssub_vv_i64m4_tumu(__VA_ARGS__)

◆ vssub_vv_i64m8

#define vssub_vv_i64m8 ( ... ) __riscv_vssub_vv_i64m8(__VA_ARGS__)

◆ vssub_vv_i64m8_m

#define vssub_vv_i64m8_m ( ... ) __riscv_vssub_vv_i64m8_tumu(__VA_ARGS__)

◆ vssub_vv_i8m1

#define vssub_vv_i8m1 ( ... ) __riscv_vssub_vv_i8m1(__VA_ARGS__)

◆ vssub_vv_i8m1_m

#define vssub_vv_i8m1_m ( ... ) __riscv_vssub_vv_i8m1_tumu(__VA_ARGS__)

◆ vssub_vv_i8m2

#define vssub_vv_i8m2 ( ... ) __riscv_vssub_vv_i8m2(__VA_ARGS__)

◆ vssub_vv_i8m2_m

#define vssub_vv_i8m2_m ( ... ) __riscv_vssub_vv_i8m2_tumu(__VA_ARGS__)

◆ vssub_vv_i8m4

#define vssub_vv_i8m4 ( ... ) __riscv_vssub_vv_i8m4(__VA_ARGS__)

◆ vssub_vv_i8m4_m

#define vssub_vv_i8m4_m ( ... ) __riscv_vssub_vv_i8m4_tumu(__VA_ARGS__)

◆ vssub_vv_i8m8

#define vssub_vv_i8m8 ( ... ) __riscv_vssub_vv_i8m8(__VA_ARGS__)

◆ vssub_vv_i8m8_m

#define vssub_vv_i8m8_m ( ... ) __riscv_vssub_vv_i8m8_tumu(__VA_ARGS__)

◆ vssub_vv_i8mf2

#define vssub_vv_i8mf2 ( ... ) __riscv_vssub_vv_i8mf2(__VA_ARGS__)

◆ vssub_vv_i8mf2_m

#define vssub_vv_i8mf2_m ( ... ) __riscv_vssub_vv_i8mf2_tumu(__VA_ARGS__)

◆ vssub_vv_i8mf4

#define vssub_vv_i8mf4 ( ... ) __riscv_vssub_vv_i8mf4(__VA_ARGS__)

◆ vssub_vv_i8mf4_m

#define vssub_vv_i8mf4_m ( ... ) __riscv_vssub_vv_i8mf4_tumu(__VA_ARGS__)

◆ vssub_vv_i8mf8

#define vssub_vv_i8mf8 ( ... ) __riscv_vssub_vv_i8mf8(__VA_ARGS__)

◆ vssub_vv_i8mf8_m

#define vssub_vv_i8mf8_m ( ... ) __riscv_vssub_vv_i8mf8_tumu(__VA_ARGS__)

◆ vssub_vx_i16m1

#define vssub_vx_i16m1 ( ... ) __riscv_vssub_vx_i16m1(__VA_ARGS__)

◆ vssub_vx_i16m1_m

#define vssub_vx_i16m1_m ( ... ) __riscv_vssub_vx_i16m1_tumu(__VA_ARGS__)

◆ vssub_vx_i16m2

#define vssub_vx_i16m2 ( ... ) __riscv_vssub_vx_i16m2(__VA_ARGS__)

◆ vssub_vx_i16m2_m

#define vssub_vx_i16m2_m ( ... ) __riscv_vssub_vx_i16m2_tumu(__VA_ARGS__)

◆ vssub_vx_i16m4

#define vssub_vx_i16m4 ( ... ) __riscv_vssub_vx_i16m4(__VA_ARGS__)

◆ vssub_vx_i16m4_m

#define vssub_vx_i16m4_m ( ... ) __riscv_vssub_vx_i16m4_tumu(__VA_ARGS__)

◆ vssub_vx_i16m8

#define vssub_vx_i16m8 ( ... ) __riscv_vssub_vx_i16m8(__VA_ARGS__)

◆ vssub_vx_i16m8_m

#define vssub_vx_i16m8_m ( ... ) __riscv_vssub_vx_i16m8_tumu(__VA_ARGS__)

◆ vssub_vx_i16mf2

#define vssub_vx_i16mf2 ( ... ) __riscv_vssub_vx_i16mf2(__VA_ARGS__)

◆ vssub_vx_i16mf2_m

#define vssub_vx_i16mf2_m ( ... ) __riscv_vssub_vx_i16mf2_tumu(__VA_ARGS__)

◆ vssub_vx_i16mf4

#define vssub_vx_i16mf4 ( ... ) __riscv_vssub_vx_i16mf4(__VA_ARGS__)

◆ vssub_vx_i16mf4_m

#define vssub_vx_i16mf4_m ( ... ) __riscv_vssub_vx_i16mf4_tumu(__VA_ARGS__)

◆ vssub_vx_i32m1

#define vssub_vx_i32m1 ( ... ) __riscv_vssub_vx_i32m1(__VA_ARGS__)

◆ vssub_vx_i32m1_m

#define vssub_vx_i32m1_m ( ... ) __riscv_vssub_vx_i32m1_tumu(__VA_ARGS__)

◆ vssub_vx_i32m2

#define vssub_vx_i32m2 ( ... ) __riscv_vssub_vx_i32m2(__VA_ARGS__)

◆ vssub_vx_i32m2_m

#define vssub_vx_i32m2_m ( ... ) __riscv_vssub_vx_i32m2_tumu(__VA_ARGS__)

◆ vssub_vx_i32m4

#define vssub_vx_i32m4 ( ... ) __riscv_vssub_vx_i32m4(__VA_ARGS__)

◆ vssub_vx_i32m4_m

#define vssub_vx_i32m4_m ( ... ) __riscv_vssub_vx_i32m4_tumu(__VA_ARGS__)

◆ vssub_vx_i32m8

#define vssub_vx_i32m8 ( ... ) __riscv_vssub_vx_i32m8(__VA_ARGS__)

◆ vssub_vx_i32m8_m

#define vssub_vx_i32m8_m ( ... ) __riscv_vssub_vx_i32m8_tumu(__VA_ARGS__)

◆ vssub_vx_i32mf2

#define vssub_vx_i32mf2 ( ... ) __riscv_vssub_vx_i32mf2(__VA_ARGS__)

◆ vssub_vx_i32mf2_m

#define vssub_vx_i32mf2_m ( ... ) __riscv_vssub_vx_i32mf2_tumu(__VA_ARGS__)

◆ vssub_vx_i64m1

#define vssub_vx_i64m1 ( ... ) __riscv_vssub_vx_i64m1(__VA_ARGS__)

◆ vssub_vx_i64m1_m

#define vssub_vx_i64m1_m ( ... ) __riscv_vssub_vx_i64m1_tumu(__VA_ARGS__)

◆ vssub_vx_i64m2

#define vssub_vx_i64m2 ( ... ) __riscv_vssub_vx_i64m2(__VA_ARGS__)

◆ vssub_vx_i64m2_m

#define vssub_vx_i64m2_m ( ... ) __riscv_vssub_vx_i64m2_tumu(__VA_ARGS__)

◆ vssub_vx_i64m4

#define vssub_vx_i64m4 ( ... ) __riscv_vssub_vx_i64m4(__VA_ARGS__)

◆ vssub_vx_i64m4_m

#define vssub_vx_i64m4_m ( ... ) __riscv_vssub_vx_i64m4_tumu(__VA_ARGS__)

◆ vssub_vx_i64m8

#define vssub_vx_i64m8 ( ... ) __riscv_vssub_vx_i64m8(__VA_ARGS__)

◆ vssub_vx_i64m8_m

#define vssub_vx_i64m8_m ( ... ) __riscv_vssub_vx_i64m8_tumu(__VA_ARGS__)

◆ vssub_vx_i8m1

#define vssub_vx_i8m1 ( ... ) __riscv_vssub_vx_i8m1(__VA_ARGS__)

◆ vssub_vx_i8m1_m

#define vssub_vx_i8m1_m ( ... ) __riscv_vssub_vx_i8m1_tumu(__VA_ARGS__)

◆ vssub_vx_i8m2

#define vssub_vx_i8m2 ( ... ) __riscv_vssub_vx_i8m2(__VA_ARGS__)

◆ vssub_vx_i8m2_m

#define vssub_vx_i8m2_m ( ... ) __riscv_vssub_vx_i8m2_tumu(__VA_ARGS__)

◆ vssub_vx_i8m4

#define vssub_vx_i8m4 ( ... ) __riscv_vssub_vx_i8m4(__VA_ARGS__)

◆ vssub_vx_i8m4_m

#define vssub_vx_i8m4_m ( ... ) __riscv_vssub_vx_i8m4_tumu(__VA_ARGS__)

◆ vssub_vx_i8m8

#define vssub_vx_i8m8 ( ... ) __riscv_vssub_vx_i8m8(__VA_ARGS__)

◆ vssub_vx_i8m8_m

#define vssub_vx_i8m8_m ( ... ) __riscv_vssub_vx_i8m8_tumu(__VA_ARGS__)

◆ vssub_vx_i8mf2

#define vssub_vx_i8mf2 ( ... ) __riscv_vssub_vx_i8mf2(__VA_ARGS__)

◆ vssub_vx_i8mf2_m

#define vssub_vx_i8mf2_m ( ... ) __riscv_vssub_vx_i8mf2_tumu(__VA_ARGS__)

◆ vssub_vx_i8mf4

#define vssub_vx_i8mf4 ( ... ) __riscv_vssub_vx_i8mf4(__VA_ARGS__)

◆ vssub_vx_i8mf4_m

#define vssub_vx_i8mf4_m ( ... ) __riscv_vssub_vx_i8mf4_tumu(__VA_ARGS__)

◆ vssub_vx_i8mf8

#define vssub_vx_i8mf8 ( ... ) __riscv_vssub_vx_i8mf8(__VA_ARGS__)

◆ vssub_vx_i8mf8_m

#define vssub_vx_i8mf8_m ( ... ) __riscv_vssub_vx_i8mf8_tumu(__VA_ARGS__)

◆ vssubu_vv_u16m1

#define vssubu_vv_u16m1 ( ... ) __riscv_vssubu_vv_u16m1(__VA_ARGS__)

◆ vssubu_vv_u16m1_m

#define vssubu_vv_u16m1_m ( ... ) __riscv_vssubu_vv_u16m1_tumu(__VA_ARGS__)

◆ vssubu_vv_u16m2

#define vssubu_vv_u16m2 ( ... ) __riscv_vssubu_vv_u16m2(__VA_ARGS__)

◆ vssubu_vv_u16m2_m

#define vssubu_vv_u16m2_m ( ... ) __riscv_vssubu_vv_u16m2_tumu(__VA_ARGS__)

◆ vssubu_vv_u16m4

#define vssubu_vv_u16m4 ( ... ) __riscv_vssubu_vv_u16m4(__VA_ARGS__)

◆ vssubu_vv_u16m4_m

#define vssubu_vv_u16m4_m ( ... ) __riscv_vssubu_vv_u16m4_tumu(__VA_ARGS__)

◆ vssubu_vv_u16m8

#define vssubu_vv_u16m8 ( ... ) __riscv_vssubu_vv_u16m8(__VA_ARGS__)

◆ vssubu_vv_u16m8_m

#define vssubu_vv_u16m8_m ( ... ) __riscv_vssubu_vv_u16m8_tumu(__VA_ARGS__)

◆ vssubu_vv_u16mf2

#define vssubu_vv_u16mf2 ( ... ) __riscv_vssubu_vv_u16mf2(__VA_ARGS__)

◆ vssubu_vv_u16mf2_m

#define vssubu_vv_u16mf2_m ( ... ) __riscv_vssubu_vv_u16mf2_tumu(__VA_ARGS__)

◆ vssubu_vv_u16mf4

#define vssubu_vv_u16mf4 ( ... ) __riscv_vssubu_vv_u16mf4(__VA_ARGS__)

◆ vssubu_vv_u16mf4_m

#define vssubu_vv_u16mf4_m ( ... ) __riscv_vssubu_vv_u16mf4_tumu(__VA_ARGS__)

◆ vssubu_vv_u32m1

#define vssubu_vv_u32m1 ( ... ) __riscv_vssubu_vv_u32m1(__VA_ARGS__)

◆ vssubu_vv_u32m1_m

#define vssubu_vv_u32m1_m ( ... ) __riscv_vssubu_vv_u32m1_tumu(__VA_ARGS__)

◆ vssubu_vv_u32m2

#define vssubu_vv_u32m2 ( ... ) __riscv_vssubu_vv_u32m2(__VA_ARGS__)

◆ vssubu_vv_u32m2_m

#define vssubu_vv_u32m2_m ( ... ) __riscv_vssubu_vv_u32m2_tumu(__VA_ARGS__)

◆ vssubu_vv_u32m4

#define vssubu_vv_u32m4 ( ... ) __riscv_vssubu_vv_u32m4(__VA_ARGS__)

◆ vssubu_vv_u32m4_m

#define vssubu_vv_u32m4_m ( ... ) __riscv_vssubu_vv_u32m4_tumu(__VA_ARGS__)

◆ vssubu_vv_u32m8

#define vssubu_vv_u32m8 ( ... ) __riscv_vssubu_vv_u32m8(__VA_ARGS__)

◆ vssubu_vv_u32m8_m

#define vssubu_vv_u32m8_m ( ... ) __riscv_vssubu_vv_u32m8_tumu(__VA_ARGS__)

◆ vssubu_vv_u32mf2

#define vssubu_vv_u32mf2 ( ... ) __riscv_vssubu_vv_u32mf2(__VA_ARGS__)

◆ vssubu_vv_u32mf2_m

#define vssubu_vv_u32mf2_m ( ... ) __riscv_vssubu_vv_u32mf2_tumu(__VA_ARGS__)

◆ vssubu_vv_u64m1

#define vssubu_vv_u64m1 ( ... ) __riscv_vssubu_vv_u64m1(__VA_ARGS__)

◆ vssubu_vv_u64m1_m

#define vssubu_vv_u64m1_m ( ... ) __riscv_vssubu_vv_u64m1_tumu(__VA_ARGS__)

◆ vssubu_vv_u64m2

#define vssubu_vv_u64m2 ( ... ) __riscv_vssubu_vv_u64m2(__VA_ARGS__)

◆ vssubu_vv_u64m2_m

#define vssubu_vv_u64m2_m ( ... ) __riscv_vssubu_vv_u64m2_tumu(__VA_ARGS__)

◆ vssubu_vv_u64m4

#define vssubu_vv_u64m4 ( ... ) __riscv_vssubu_vv_u64m4(__VA_ARGS__)

◆ vssubu_vv_u64m4_m

#define vssubu_vv_u64m4_m ( ... ) __riscv_vssubu_vv_u64m4_tumu(__VA_ARGS__)

◆ vssubu_vv_u64m8

#define vssubu_vv_u64m8 ( ... ) __riscv_vssubu_vv_u64m8(__VA_ARGS__)

◆ vssubu_vv_u64m8_m

#define vssubu_vv_u64m8_m ( ... ) __riscv_vssubu_vv_u64m8_tumu(__VA_ARGS__)

◆ vssubu_vv_u8m1

#define vssubu_vv_u8m1 ( ... ) __riscv_vssubu_vv_u8m1(__VA_ARGS__)

◆ vssubu_vv_u8m1_m

#define vssubu_vv_u8m1_m ( ... ) __riscv_vssubu_vv_u8m1_tumu(__VA_ARGS__)

◆ vssubu_vv_u8m2

#define vssubu_vv_u8m2 ( ... ) __riscv_vssubu_vv_u8m2(__VA_ARGS__)

◆ vssubu_vv_u8m2_m

#define vssubu_vv_u8m2_m ( ... ) __riscv_vssubu_vv_u8m2_tumu(__VA_ARGS__)

◆ vssubu_vv_u8m4

#define vssubu_vv_u8m4 ( ... ) __riscv_vssubu_vv_u8m4(__VA_ARGS__)

◆ vssubu_vv_u8m4_m

#define vssubu_vv_u8m4_m ( ... ) __riscv_vssubu_vv_u8m4_tumu(__VA_ARGS__)

◆ vssubu_vv_u8m8

#define vssubu_vv_u8m8 ( ... ) __riscv_vssubu_vv_u8m8(__VA_ARGS__)

◆ vssubu_vv_u8m8_m

#define vssubu_vv_u8m8_m ( ... ) __riscv_vssubu_vv_u8m8_tumu(__VA_ARGS__)

◆ vssubu_vv_u8mf2

#define vssubu_vv_u8mf2 ( ... ) __riscv_vssubu_vv_u8mf2(__VA_ARGS__)

◆ vssubu_vv_u8mf2_m

#define vssubu_vv_u8mf2_m ( ... ) __riscv_vssubu_vv_u8mf2_tumu(__VA_ARGS__)

◆ vssubu_vv_u8mf4

#define vssubu_vv_u8mf4 ( ... ) __riscv_vssubu_vv_u8mf4(__VA_ARGS__)

◆ vssubu_vv_u8mf4_m

#define vssubu_vv_u8mf4_m ( ... ) __riscv_vssubu_vv_u8mf4_tumu(__VA_ARGS__)

◆ vssubu_vv_u8mf8

#define vssubu_vv_u8mf8 ( ... ) __riscv_vssubu_vv_u8mf8(__VA_ARGS__)

◆ vssubu_vv_u8mf8_m

#define vssubu_vv_u8mf8_m ( ... ) __riscv_vssubu_vv_u8mf8_tumu(__VA_ARGS__)

◆ vssubu_vx_u16m1

#define vssubu_vx_u16m1 ( ... ) __riscv_vssubu_vx_u16m1(__VA_ARGS__)

◆ vssubu_vx_u16m1_m

#define vssubu_vx_u16m1_m ( ... ) __riscv_vssubu_vx_u16m1_tumu(__VA_ARGS__)

◆ vssubu_vx_u16m2

#define vssubu_vx_u16m2 ( ... ) __riscv_vssubu_vx_u16m2(__VA_ARGS__)

◆ vssubu_vx_u16m2_m

#define vssubu_vx_u16m2_m ( ... ) __riscv_vssubu_vx_u16m2_tumu(__VA_ARGS__)

◆ vssubu_vx_u16m4

#define vssubu_vx_u16m4 ( ... ) __riscv_vssubu_vx_u16m4(__VA_ARGS__)

◆ vssubu_vx_u16m4_m

#define vssubu_vx_u16m4_m ( ... ) __riscv_vssubu_vx_u16m4_tumu(__VA_ARGS__)

◆ vssubu_vx_u16m8

#define vssubu_vx_u16m8 ( ... ) __riscv_vssubu_vx_u16m8(__VA_ARGS__)

◆ vssubu_vx_u16m8_m

#define vssubu_vx_u16m8_m ( ... ) __riscv_vssubu_vx_u16m8_tumu(__VA_ARGS__)

◆ vssubu_vx_u16mf2

#define vssubu_vx_u16mf2 ( ... ) __riscv_vssubu_vx_u16mf2(__VA_ARGS__)

◆ vssubu_vx_u16mf2_m

#define vssubu_vx_u16mf2_m ( ... ) __riscv_vssubu_vx_u16mf2_tumu(__VA_ARGS__)

◆ vssubu_vx_u16mf4

#define vssubu_vx_u16mf4 ( ... ) __riscv_vssubu_vx_u16mf4(__VA_ARGS__)

◆ vssubu_vx_u16mf4_m

#define vssubu_vx_u16mf4_m ( ... ) __riscv_vssubu_vx_u16mf4_tumu(__VA_ARGS__)

◆ vssubu_vx_u32m1

#define vssubu_vx_u32m1 ( ... ) __riscv_vssubu_vx_u32m1(__VA_ARGS__)

◆ vssubu_vx_u32m1_m

#define vssubu_vx_u32m1_m ( ... ) __riscv_vssubu_vx_u32m1_tumu(__VA_ARGS__)

◆ vssubu_vx_u32m2

#define vssubu_vx_u32m2 ( ... ) __riscv_vssubu_vx_u32m2(__VA_ARGS__)

◆ vssubu_vx_u32m2_m

#define vssubu_vx_u32m2_m ( ... ) __riscv_vssubu_vx_u32m2_tumu(__VA_ARGS__)

◆ vssubu_vx_u32m4

#define vssubu_vx_u32m4 ( ... ) __riscv_vssubu_vx_u32m4(__VA_ARGS__)

◆ vssubu_vx_u32m4_m

#define vssubu_vx_u32m4_m ( ... ) __riscv_vssubu_vx_u32m4_tumu(__VA_ARGS__)

◆ vssubu_vx_u32m8

#define vssubu_vx_u32m8 ( ... ) __riscv_vssubu_vx_u32m8(__VA_ARGS__)

◆ vssubu_vx_u32m8_m

#define vssubu_vx_u32m8_m ( ... ) __riscv_vssubu_vx_u32m8_tumu(__VA_ARGS__)

◆ vssubu_vx_u32mf2

#define vssubu_vx_u32mf2 ( ... ) __riscv_vssubu_vx_u32mf2(__VA_ARGS__)

◆ vssubu_vx_u32mf2_m

#define vssubu_vx_u32mf2_m ( ... ) __riscv_vssubu_vx_u32mf2_tumu(__VA_ARGS__)

◆ vssubu_vx_u64m1

#define vssubu_vx_u64m1 ( ... ) __riscv_vssubu_vx_u64m1(__VA_ARGS__)

◆ vssubu_vx_u64m1_m

#define vssubu_vx_u64m1_m ( ... ) __riscv_vssubu_vx_u64m1_tumu(__VA_ARGS__)

◆ vssubu_vx_u64m2

#define vssubu_vx_u64m2 ( ... ) __riscv_vssubu_vx_u64m2(__VA_ARGS__)

◆ vssubu_vx_u64m2_m

#define vssubu_vx_u64m2_m ( ... ) __riscv_vssubu_vx_u64m2_tumu(__VA_ARGS__)

◆ vssubu_vx_u64m4

#define vssubu_vx_u64m4 ( ... ) __riscv_vssubu_vx_u64m4(__VA_ARGS__)

◆ vssubu_vx_u64m4_m

#define vssubu_vx_u64m4_m ( ... ) __riscv_vssubu_vx_u64m4_tumu(__VA_ARGS__)

◆ vssubu_vx_u64m8

#define vssubu_vx_u64m8 ( ... ) __riscv_vssubu_vx_u64m8(__VA_ARGS__)

◆ vssubu_vx_u64m8_m

#define vssubu_vx_u64m8_m ( ... ) __riscv_vssubu_vx_u64m8_tumu(__VA_ARGS__)

◆ vssubu_vx_u8m1

#define vssubu_vx_u8m1 ( ... ) __riscv_vssubu_vx_u8m1(__VA_ARGS__)

◆ vssubu_vx_u8m1_m

#define vssubu_vx_u8m1_m ( ... ) __riscv_vssubu_vx_u8m1_tumu(__VA_ARGS__)

◆ vssubu_vx_u8m2

#define vssubu_vx_u8m2 ( ... ) __riscv_vssubu_vx_u8m2(__VA_ARGS__)

◆ vssubu_vx_u8m2_m

#define vssubu_vx_u8m2_m ( ... ) __riscv_vssubu_vx_u8m2_tumu(__VA_ARGS__)

◆ vssubu_vx_u8m4

#define vssubu_vx_u8m4 ( ... ) __riscv_vssubu_vx_u8m4(__VA_ARGS__)

◆ vssubu_vx_u8m4_m

#define vssubu_vx_u8m4_m ( ... ) __riscv_vssubu_vx_u8m4_tumu(__VA_ARGS__)

◆ vssubu_vx_u8m8

#define vssubu_vx_u8m8 ( ... ) __riscv_vssubu_vx_u8m8(__VA_ARGS__)

◆ vssubu_vx_u8m8_m

#define vssubu_vx_u8m8_m ( ... ) __riscv_vssubu_vx_u8m8_tumu(__VA_ARGS__)

◆ vssubu_vx_u8mf2

#define vssubu_vx_u8mf2 ( ... ) __riscv_vssubu_vx_u8mf2(__VA_ARGS__)

◆ vssubu_vx_u8mf2_m

#define vssubu_vx_u8mf2_m ( ... ) __riscv_vssubu_vx_u8mf2_tumu(__VA_ARGS__)

◆ vssubu_vx_u8mf4

#define vssubu_vx_u8mf4 ( ... ) __riscv_vssubu_vx_u8mf4(__VA_ARGS__)

◆ vssubu_vx_u8mf4_m

#define vssubu_vx_u8mf4_m ( ... ) __riscv_vssubu_vx_u8mf4_tumu(__VA_ARGS__)

◆ vssubu_vx_u8mf8

#define vssubu_vx_u8mf8 ( ... ) __riscv_vssubu_vx_u8mf8(__VA_ARGS__)

◆ vssubu_vx_u8mf8_m

#define vssubu_vx_u8mf8_m ( ... ) __riscv_vssubu_vx_u8mf8_tumu(__VA_ARGS__)

◆ vsub_vv_i16m1

#define vsub_vv_i16m1 ( ... ) __riscv_vsub_vv_i16m1(__VA_ARGS__)

◆ vsub_vv_i16m1_m

#define vsub_vv_i16m1_m ( ... ) __riscv_vsub_vv_i16m1_tumu(__VA_ARGS__)

◆ vsub_vv_i16m2

#define vsub_vv_i16m2 ( ... ) __riscv_vsub_vv_i16m2(__VA_ARGS__)

◆ vsub_vv_i16m2_m

#define vsub_vv_i16m2_m ( ... ) __riscv_vsub_vv_i16m2_tumu(__VA_ARGS__)

◆ vsub_vv_i16m4

#define vsub_vv_i16m4 ( ... ) __riscv_vsub_vv_i16m4(__VA_ARGS__)

◆ vsub_vv_i16m4_m

#define vsub_vv_i16m4_m ( ... ) __riscv_vsub_vv_i16m4_tumu(__VA_ARGS__)

◆ vsub_vv_i16m8

#define vsub_vv_i16m8 ( ... ) __riscv_vsub_vv_i16m8(__VA_ARGS__)

◆ vsub_vv_i16m8_m

#define vsub_vv_i16m8_m ( ... ) __riscv_vsub_vv_i16m8_tumu(__VA_ARGS__)

◆ vsub_vv_i16mf2

#define vsub_vv_i16mf2 ( ... ) __riscv_vsub_vv_i16mf2(__VA_ARGS__)

◆ vsub_vv_i16mf2_m

#define vsub_vv_i16mf2_m ( ... ) __riscv_vsub_vv_i16mf2_tumu(__VA_ARGS__)

◆ vsub_vv_i16mf4

#define vsub_vv_i16mf4 ( ... ) __riscv_vsub_vv_i16mf4(__VA_ARGS__)

◆ vsub_vv_i16mf4_m

#define vsub_vv_i16mf4_m ( ... ) __riscv_vsub_vv_i16mf4_tumu(__VA_ARGS__)

◆ vsub_vv_i32m1

#define vsub_vv_i32m1 ( ... ) __riscv_vsub_vv_i32m1(__VA_ARGS__)

◆ vsub_vv_i32m1_m

#define vsub_vv_i32m1_m ( ... ) __riscv_vsub_vv_i32m1_tumu(__VA_ARGS__)

◆ vsub_vv_i32m2

#define vsub_vv_i32m2 ( ... ) __riscv_vsub_vv_i32m2(__VA_ARGS__)

◆ vsub_vv_i32m2_m

#define vsub_vv_i32m2_m ( ... ) __riscv_vsub_vv_i32m2_tumu(__VA_ARGS__)

◆ vsub_vv_i32m4

#define vsub_vv_i32m4 ( ... ) __riscv_vsub_vv_i32m4(__VA_ARGS__)

◆ vsub_vv_i32m4_m

#define vsub_vv_i32m4_m ( ... ) __riscv_vsub_vv_i32m4_tumu(__VA_ARGS__)

◆ vsub_vv_i32m8

#define vsub_vv_i32m8 ( ... ) __riscv_vsub_vv_i32m8(__VA_ARGS__)

◆ vsub_vv_i32m8_m

#define vsub_vv_i32m8_m ( ... ) __riscv_vsub_vv_i32m8_tumu(__VA_ARGS__)

◆ vsub_vv_i32mf2

#define vsub_vv_i32mf2 ( ... ) __riscv_vsub_vv_i32mf2(__VA_ARGS__)

◆ vsub_vv_i32mf2_m

#define vsub_vv_i32mf2_m ( ... ) __riscv_vsub_vv_i32mf2_tumu(__VA_ARGS__)

◆ vsub_vv_i64m1

#define vsub_vv_i64m1 ( ... ) __riscv_vsub_vv_i64m1(__VA_ARGS__)

◆ vsub_vv_i64m1_m

#define vsub_vv_i64m1_m ( ... ) __riscv_vsub_vv_i64m1_tumu(__VA_ARGS__)

◆ vsub_vv_i64m2

#define vsub_vv_i64m2 ( ... ) __riscv_vsub_vv_i64m2(__VA_ARGS__)

◆ vsub_vv_i64m2_m

#define vsub_vv_i64m2_m ( ... ) __riscv_vsub_vv_i64m2_tumu(__VA_ARGS__)

◆ vsub_vv_i64m4

#define vsub_vv_i64m4 ( ... ) __riscv_vsub_vv_i64m4(__VA_ARGS__)

◆ vsub_vv_i64m4_m

#define vsub_vv_i64m4_m ( ... ) __riscv_vsub_vv_i64m4_tumu(__VA_ARGS__)

◆ vsub_vv_i64m8

#define vsub_vv_i64m8 ( ... ) __riscv_vsub_vv_i64m8(__VA_ARGS__)

◆ vsub_vv_i64m8_m

#define vsub_vv_i64m8_m ( ... ) __riscv_vsub_vv_i64m8_tumu(__VA_ARGS__)

◆ vsub_vv_i8m1

#define vsub_vv_i8m1 ( ... ) __riscv_vsub_vv_i8m1(__VA_ARGS__)

◆ vsub_vv_i8m1_m

#define vsub_vv_i8m1_m ( ... ) __riscv_vsub_vv_i8m1_tumu(__VA_ARGS__)

◆ vsub_vv_i8m2

#define vsub_vv_i8m2 ( ... ) __riscv_vsub_vv_i8m2(__VA_ARGS__)

◆ vsub_vv_i8m2_m

#define vsub_vv_i8m2_m ( ... ) __riscv_vsub_vv_i8m2_tumu(__VA_ARGS__)

◆ vsub_vv_i8m4

#define vsub_vv_i8m4 ( ... ) __riscv_vsub_vv_i8m4(__VA_ARGS__)

◆ vsub_vv_i8m4_m

#define vsub_vv_i8m4_m ( ... ) __riscv_vsub_vv_i8m4_tumu(__VA_ARGS__)

◆ vsub_vv_i8m8

#define vsub_vv_i8m8 ( ... ) __riscv_vsub_vv_i8m8(__VA_ARGS__)

◆ vsub_vv_i8m8_m

#define vsub_vv_i8m8_m ( ... ) __riscv_vsub_vv_i8m8_tumu(__VA_ARGS__)

◆ vsub_vv_i8mf2

#define vsub_vv_i8mf2 ( ... ) __riscv_vsub_vv_i8mf2(__VA_ARGS__)

◆ vsub_vv_i8mf2_m

#define vsub_vv_i8mf2_m ( ... ) __riscv_vsub_vv_i8mf2_tumu(__VA_ARGS__)

◆ vsub_vv_i8mf4

#define vsub_vv_i8mf4 ( ... ) __riscv_vsub_vv_i8mf4(__VA_ARGS__)

◆ vsub_vv_i8mf4_m

#define vsub_vv_i8mf4_m ( ... ) __riscv_vsub_vv_i8mf4_tumu(__VA_ARGS__)

◆ vsub_vv_i8mf8

#define vsub_vv_i8mf8 ( ... ) __riscv_vsub_vv_i8mf8(__VA_ARGS__)

◆ vsub_vv_i8mf8_m

#define vsub_vv_i8mf8_m ( ... ) __riscv_vsub_vv_i8mf8_tumu(__VA_ARGS__)

◆ vsub_vv_u16m1

#define vsub_vv_u16m1 ( ... ) __riscv_vsub_vv_u16m1(__VA_ARGS__)

◆ vsub_vv_u16m1_m

#define vsub_vv_u16m1_m ( ... ) __riscv_vsub_vv_u16m1_tumu(__VA_ARGS__)

◆ vsub_vv_u16m2

#define vsub_vv_u16m2 ( ... ) __riscv_vsub_vv_u16m2(__VA_ARGS__)

◆ vsub_vv_u16m2_m

#define vsub_vv_u16m2_m ( ... ) __riscv_vsub_vv_u16m2_tumu(__VA_ARGS__)

◆ vsub_vv_u16m4

#define vsub_vv_u16m4 ( ... ) __riscv_vsub_vv_u16m4(__VA_ARGS__)

◆ vsub_vv_u16m4_m

#define vsub_vv_u16m4_m ( ... ) __riscv_vsub_vv_u16m4_tumu(__VA_ARGS__)

◆ vsub_vv_u16m8

#define vsub_vv_u16m8 ( ... ) __riscv_vsub_vv_u16m8(__VA_ARGS__)

◆ vsub_vv_u16m8_m

#define vsub_vv_u16m8_m ( ... ) __riscv_vsub_vv_u16m8_tumu(__VA_ARGS__)

◆ vsub_vv_u16mf2

#define vsub_vv_u16mf2 ( ... ) __riscv_vsub_vv_u16mf2(__VA_ARGS__)

◆ vsub_vv_u16mf2_m

#define vsub_vv_u16mf2_m ( ... ) __riscv_vsub_vv_u16mf2_tumu(__VA_ARGS__)

◆ vsub_vv_u16mf4

#define vsub_vv_u16mf4 ( ... ) __riscv_vsub_vv_u16mf4(__VA_ARGS__)

◆ vsub_vv_u16mf4_m

#define vsub_vv_u16mf4_m ( ... ) __riscv_vsub_vv_u16mf4_tumu(__VA_ARGS__)

◆ vsub_vv_u32m1

#define vsub_vv_u32m1 ( ... ) __riscv_vsub_vv_u32m1(__VA_ARGS__)

◆ vsub_vv_u32m1_m

#define vsub_vv_u32m1_m ( ... ) __riscv_vsub_vv_u32m1_tumu(__VA_ARGS__)

◆ vsub_vv_u32m2

#define vsub_vv_u32m2 ( ... ) __riscv_vsub_vv_u32m2(__VA_ARGS__)

◆ vsub_vv_u32m2_m

#define vsub_vv_u32m2_m ( ... ) __riscv_vsub_vv_u32m2_tumu(__VA_ARGS__)

◆ vsub_vv_u32m4

#define vsub_vv_u32m4 ( ... ) __riscv_vsub_vv_u32m4(__VA_ARGS__)

◆ vsub_vv_u32m4_m

#define vsub_vv_u32m4_m ( ... ) __riscv_vsub_vv_u32m4_tumu(__VA_ARGS__)

◆ vsub_vv_u32m8

#define vsub_vv_u32m8 ( ... ) __riscv_vsub_vv_u32m8(__VA_ARGS__)

◆ vsub_vv_u32m8_m

#define vsub_vv_u32m8_m ( ... ) __riscv_vsub_vv_u32m8_tumu(__VA_ARGS__)

◆ vsub_vv_u32mf2

#define vsub_vv_u32mf2 ( ... ) __riscv_vsub_vv_u32mf2(__VA_ARGS__)

◆ vsub_vv_u32mf2_m

#define vsub_vv_u32mf2_m ( ... ) __riscv_vsub_vv_u32mf2_tumu(__VA_ARGS__)

◆ vsub_vv_u64m1

#define vsub_vv_u64m1 ( ... ) __riscv_vsub_vv_u64m1(__VA_ARGS__)

◆ vsub_vv_u64m1_m

#define vsub_vv_u64m1_m ( ... ) __riscv_vsub_vv_u64m1_tumu(__VA_ARGS__)

◆ vsub_vv_u64m2

#define vsub_vv_u64m2 ( ... ) __riscv_vsub_vv_u64m2(__VA_ARGS__)

◆ vsub_vv_u64m2_m

#define vsub_vv_u64m2_m ( ... ) __riscv_vsub_vv_u64m2_tumu(__VA_ARGS__)

◆ vsub_vv_u64m4

#define vsub_vv_u64m4 ( ... ) __riscv_vsub_vv_u64m4(__VA_ARGS__)

◆ vsub_vv_u64m4_m

#define vsub_vv_u64m4_m ( ... ) __riscv_vsub_vv_u64m4_tumu(__VA_ARGS__)

◆ vsub_vv_u64m8

#define vsub_vv_u64m8 ( ... ) __riscv_vsub_vv_u64m8(__VA_ARGS__)

◆ vsub_vv_u64m8_m

#define vsub_vv_u64m8_m ( ... ) __riscv_vsub_vv_u64m8_tumu(__VA_ARGS__)

◆ vsub_vv_u8m1

#define vsub_vv_u8m1 ( ... ) __riscv_vsub_vv_u8m1(__VA_ARGS__)

◆ vsub_vv_u8m1_m

#define vsub_vv_u8m1_m ( ... ) __riscv_vsub_vv_u8m1_tumu(__VA_ARGS__)

◆ vsub_vv_u8m2

#define vsub_vv_u8m2 ( ... ) __riscv_vsub_vv_u8m2(__VA_ARGS__)

◆ vsub_vv_u8m2_m

#define vsub_vv_u8m2_m ( ... ) __riscv_vsub_vv_u8m2_tumu(__VA_ARGS__)

◆ vsub_vv_u8m4

#define vsub_vv_u8m4 ( ... ) __riscv_vsub_vv_u8m4(__VA_ARGS__)

◆ vsub_vv_u8m4_m

#define vsub_vv_u8m4_m ( ... ) __riscv_vsub_vv_u8m4_tumu(__VA_ARGS__)

◆ vsub_vv_u8m8

#define vsub_vv_u8m8 ( ... ) __riscv_vsub_vv_u8m8(__VA_ARGS__)

◆ vsub_vv_u8m8_m

#define vsub_vv_u8m8_m ( ... ) __riscv_vsub_vv_u8m8_tumu(__VA_ARGS__)

◆ vsub_vv_u8mf2

#define vsub_vv_u8mf2 ( ... ) __riscv_vsub_vv_u8mf2(__VA_ARGS__)

◆ vsub_vv_u8mf2_m

#define vsub_vv_u8mf2_m ( ... ) __riscv_vsub_vv_u8mf2_tumu(__VA_ARGS__)

◆ vsub_vv_u8mf4

#define vsub_vv_u8mf4 ( ... ) __riscv_vsub_vv_u8mf4(__VA_ARGS__)

◆ vsub_vv_u8mf4_m

#define vsub_vv_u8mf4_m ( ... ) __riscv_vsub_vv_u8mf4_tumu(__VA_ARGS__)

◆ vsub_vv_u8mf8

#define vsub_vv_u8mf8 ( ... ) __riscv_vsub_vv_u8mf8(__VA_ARGS__)

◆ vsub_vv_u8mf8_m

#define vsub_vv_u8mf8_m ( ... ) __riscv_vsub_vv_u8mf8_tumu(__VA_ARGS__)

◆ vsub_vx_i16m1

#define vsub_vx_i16m1 ( ... ) __riscv_vsub_vx_i16m1(__VA_ARGS__)

◆ vsub_vx_i16m1_m

#define vsub_vx_i16m1_m ( ... ) __riscv_vsub_vx_i16m1_tumu(__VA_ARGS__)

◆ vsub_vx_i16m2

#define vsub_vx_i16m2 ( ... ) __riscv_vsub_vx_i16m2(__VA_ARGS__)

◆ vsub_vx_i16m2_m

#define vsub_vx_i16m2_m ( ... ) __riscv_vsub_vx_i16m2_tumu(__VA_ARGS__)

◆ vsub_vx_i16m4

#define vsub_vx_i16m4 ( ... ) __riscv_vsub_vx_i16m4(__VA_ARGS__)

◆ vsub_vx_i16m4_m

#define vsub_vx_i16m4_m ( ... ) __riscv_vsub_vx_i16m4_tumu(__VA_ARGS__)

◆ vsub_vx_i16m8

#define vsub_vx_i16m8 ( ... ) __riscv_vsub_vx_i16m8(__VA_ARGS__)

◆ vsub_vx_i16m8_m

#define vsub_vx_i16m8_m ( ... ) __riscv_vsub_vx_i16m8_tumu(__VA_ARGS__)

◆ vsub_vx_i16mf2

#define vsub_vx_i16mf2 ( ... ) __riscv_vsub_vx_i16mf2(__VA_ARGS__)

◆ vsub_vx_i16mf2_m

#define vsub_vx_i16mf2_m ( ... ) __riscv_vsub_vx_i16mf2_tumu(__VA_ARGS__)

◆ vsub_vx_i16mf4

#define vsub_vx_i16mf4 ( ... ) __riscv_vsub_vx_i16mf4(__VA_ARGS__)

◆ vsub_vx_i16mf4_m

#define vsub_vx_i16mf4_m ( ... ) __riscv_vsub_vx_i16mf4_tumu(__VA_ARGS__)

◆ vsub_vx_i32m1

#define vsub_vx_i32m1 ( ... ) __riscv_vsub_vx_i32m1(__VA_ARGS__)

◆ vsub_vx_i32m1_m

#define vsub_vx_i32m1_m ( ... ) __riscv_vsub_vx_i32m1_tumu(__VA_ARGS__)

◆ vsub_vx_i32m2

#define vsub_vx_i32m2 ( ... ) __riscv_vsub_vx_i32m2(__VA_ARGS__)

◆ vsub_vx_i32m2_m

#define vsub_vx_i32m2_m ( ... ) __riscv_vsub_vx_i32m2_tumu(__VA_ARGS__)

◆ vsub_vx_i32m4

#define vsub_vx_i32m4 ( ... ) __riscv_vsub_vx_i32m4(__VA_ARGS__)

◆ vsub_vx_i32m4_m

#define vsub_vx_i32m4_m ( ... ) __riscv_vsub_vx_i32m4_tumu(__VA_ARGS__)

◆ vsub_vx_i32m8

#define vsub_vx_i32m8 ( ... ) __riscv_vsub_vx_i32m8(__VA_ARGS__)

◆ vsub_vx_i32m8_m

#define vsub_vx_i32m8_m ( ... ) __riscv_vsub_vx_i32m8_tumu(__VA_ARGS__)

◆ vsub_vx_i32mf2

#define vsub_vx_i32mf2 ( ... ) __riscv_vsub_vx_i32mf2(__VA_ARGS__)

◆ vsub_vx_i32mf2_m

#define vsub_vx_i32mf2_m ( ... ) __riscv_vsub_vx_i32mf2_tumu(__VA_ARGS__)

◆ vsub_vx_i64m1

#define vsub_vx_i64m1 ( ... ) __riscv_vsub_vx_i64m1(__VA_ARGS__)

◆ vsub_vx_i64m1_m

#define vsub_vx_i64m1_m ( ... ) __riscv_vsub_vx_i64m1_tumu(__VA_ARGS__)

◆ vsub_vx_i64m2

#define vsub_vx_i64m2 ( ... ) __riscv_vsub_vx_i64m2(__VA_ARGS__)

◆ vsub_vx_i64m2_m

#define vsub_vx_i64m2_m ( ... ) __riscv_vsub_vx_i64m2_tumu(__VA_ARGS__)

◆ vsub_vx_i64m4

#define vsub_vx_i64m4 ( ... ) __riscv_vsub_vx_i64m4(__VA_ARGS__)

◆ vsub_vx_i64m4_m

#define vsub_vx_i64m4_m ( ... ) __riscv_vsub_vx_i64m4_tumu(__VA_ARGS__)

◆ vsub_vx_i64m8

#define vsub_vx_i64m8 ( ... ) __riscv_vsub_vx_i64m8(__VA_ARGS__)

◆ vsub_vx_i64m8_m

#define vsub_vx_i64m8_m ( ... ) __riscv_vsub_vx_i64m8_tumu(__VA_ARGS__)

◆ vsub_vx_i8m1

#define vsub_vx_i8m1 ( ... ) __riscv_vsub_vx_i8m1(__VA_ARGS__)

◆ vsub_vx_i8m1_m

#define vsub_vx_i8m1_m ( ... ) __riscv_vsub_vx_i8m1_tumu(__VA_ARGS__)

◆ vsub_vx_i8m2

#define vsub_vx_i8m2 ( ... ) __riscv_vsub_vx_i8m2(__VA_ARGS__)

◆ vsub_vx_i8m2_m

#define vsub_vx_i8m2_m ( ... ) __riscv_vsub_vx_i8m2_tumu(__VA_ARGS__)

◆ vsub_vx_i8m4

#define vsub_vx_i8m4 ( ... ) __riscv_vsub_vx_i8m4(__VA_ARGS__)

◆ vsub_vx_i8m4_m

#define vsub_vx_i8m4_m ( ... ) __riscv_vsub_vx_i8m4_tumu(__VA_ARGS__)

◆ vsub_vx_i8m8

#define vsub_vx_i8m8 ( ... ) __riscv_vsub_vx_i8m8(__VA_ARGS__)

◆ vsub_vx_i8m8_m

#define vsub_vx_i8m8_m ( ... ) __riscv_vsub_vx_i8m8_tumu(__VA_ARGS__)

◆ vsub_vx_i8mf2

#define vsub_vx_i8mf2 ( ... ) __riscv_vsub_vx_i8mf2(__VA_ARGS__)

◆ vsub_vx_i8mf2_m

#define vsub_vx_i8mf2_m ( ... ) __riscv_vsub_vx_i8mf2_tumu(__VA_ARGS__)

◆ vsub_vx_i8mf4

#define vsub_vx_i8mf4 ( ... ) __riscv_vsub_vx_i8mf4(__VA_ARGS__)

◆ vsub_vx_i8mf4_m

#define vsub_vx_i8mf4_m ( ... ) __riscv_vsub_vx_i8mf4_tumu(__VA_ARGS__)

◆ vsub_vx_i8mf8

#define vsub_vx_i8mf8 ( ... ) __riscv_vsub_vx_i8mf8(__VA_ARGS__)

◆ vsub_vx_i8mf8_m

#define vsub_vx_i8mf8_m ( ... ) __riscv_vsub_vx_i8mf8_tumu(__VA_ARGS__)

◆ vsub_vx_u16m1

#define vsub_vx_u16m1 ( ... ) __riscv_vsub_vx_u16m1(__VA_ARGS__)

◆ vsub_vx_u16m1_m

#define vsub_vx_u16m1_m ( ... ) __riscv_vsub_vx_u16m1_tumu(__VA_ARGS__)

◆ vsub_vx_u16m2

#define vsub_vx_u16m2 ( ... ) __riscv_vsub_vx_u16m2(__VA_ARGS__)

◆ vsub_vx_u16m2_m

#define vsub_vx_u16m2_m ( ... ) __riscv_vsub_vx_u16m2_tumu(__VA_ARGS__)

◆ vsub_vx_u16m4

#define vsub_vx_u16m4 ( ... ) __riscv_vsub_vx_u16m4(__VA_ARGS__)

◆ vsub_vx_u16m4_m

#define vsub_vx_u16m4_m ( ... ) __riscv_vsub_vx_u16m4_tumu(__VA_ARGS__)

◆ vsub_vx_u16m8

#define vsub_vx_u16m8 ( ... ) __riscv_vsub_vx_u16m8(__VA_ARGS__)

◆ vsub_vx_u16m8_m

#define vsub_vx_u16m8_m ( ... ) __riscv_vsub_vx_u16m8_tumu(__VA_ARGS__)

◆ vsub_vx_u16mf2

#define vsub_vx_u16mf2 ( ... ) __riscv_vsub_vx_u16mf2(__VA_ARGS__)

◆ vsub_vx_u16mf2_m

#define vsub_vx_u16mf2_m ( ... ) __riscv_vsub_vx_u16mf2_tumu(__VA_ARGS__)

◆ vsub_vx_u16mf4

#define vsub_vx_u16mf4 ( ... ) __riscv_vsub_vx_u16mf4(__VA_ARGS__)

◆ vsub_vx_u16mf4_m

#define vsub_vx_u16mf4_m ( ... ) __riscv_vsub_vx_u16mf4_tumu(__VA_ARGS__)

◆ vsub_vx_u32m1

#define vsub_vx_u32m1 ( ... ) __riscv_vsub_vx_u32m1(__VA_ARGS__)

◆ vsub_vx_u32m1_m

#define vsub_vx_u32m1_m ( ... ) __riscv_vsub_vx_u32m1_tumu(__VA_ARGS__)

◆ vsub_vx_u32m2

#define vsub_vx_u32m2 ( ... ) __riscv_vsub_vx_u32m2(__VA_ARGS__)

◆ vsub_vx_u32m2_m

#define vsub_vx_u32m2_m ( ... ) __riscv_vsub_vx_u32m2_tumu(__VA_ARGS__)

◆ vsub_vx_u32m4

#define vsub_vx_u32m4 ( ... ) __riscv_vsub_vx_u32m4(__VA_ARGS__)

◆ vsub_vx_u32m4_m

#define vsub_vx_u32m4_m ( ... ) __riscv_vsub_vx_u32m4_tumu(__VA_ARGS__)

◆ vsub_vx_u32m8

#define vsub_vx_u32m8 ( ... ) __riscv_vsub_vx_u32m8(__VA_ARGS__)

◆ vsub_vx_u32m8_m

#define vsub_vx_u32m8_m ( ... ) __riscv_vsub_vx_u32m8_tumu(__VA_ARGS__)

◆ vsub_vx_u32mf2

#define vsub_vx_u32mf2 ( ... ) __riscv_vsub_vx_u32mf2(__VA_ARGS__)

◆ vsub_vx_u32mf2_m

#define vsub_vx_u32mf2_m ( ... ) __riscv_vsub_vx_u32mf2_tumu(__VA_ARGS__)

◆ vsub_vx_u64m1

#define vsub_vx_u64m1 ( ... ) __riscv_vsub_vx_u64m1(__VA_ARGS__)

◆ vsub_vx_u64m1_m

#define vsub_vx_u64m1_m ( ... ) __riscv_vsub_vx_u64m1_tumu(__VA_ARGS__)

◆ vsub_vx_u64m2

#define vsub_vx_u64m2 ( ... ) __riscv_vsub_vx_u64m2(__VA_ARGS__)

◆ vsub_vx_u64m2_m

#define vsub_vx_u64m2_m ( ... ) __riscv_vsub_vx_u64m2_tumu(__VA_ARGS__)

◆ vsub_vx_u64m4

#define vsub_vx_u64m4 ( ... ) __riscv_vsub_vx_u64m4(__VA_ARGS__)

◆ vsub_vx_u64m4_m

#define vsub_vx_u64m4_m ( ... ) __riscv_vsub_vx_u64m4_tumu(__VA_ARGS__)

◆ vsub_vx_u64m8

#define vsub_vx_u64m8 ( ... ) __riscv_vsub_vx_u64m8(__VA_ARGS__)

◆ vsub_vx_u64m8_m

#define vsub_vx_u64m8_m ( ... ) __riscv_vsub_vx_u64m8_tumu(__VA_ARGS__)

◆ vsub_vx_u8m1

#define vsub_vx_u8m1 ( ... ) __riscv_vsub_vx_u8m1(__VA_ARGS__)

◆ vsub_vx_u8m1_m

#define vsub_vx_u8m1_m ( ... ) __riscv_vsub_vx_u8m1_tumu(__VA_ARGS__)

◆ vsub_vx_u8m2

#define vsub_vx_u8m2 ( ... ) __riscv_vsub_vx_u8m2(__VA_ARGS__)

◆ vsub_vx_u8m2_m

#define vsub_vx_u8m2_m ( ... ) __riscv_vsub_vx_u8m2_tumu(__VA_ARGS__)

◆ vsub_vx_u8m4

#define vsub_vx_u8m4 ( ... ) __riscv_vsub_vx_u8m4(__VA_ARGS__)

◆ vsub_vx_u8m4_m

#define vsub_vx_u8m4_m ( ... ) __riscv_vsub_vx_u8m4_tumu(__VA_ARGS__)

◆ vsub_vx_u8m8

#define vsub_vx_u8m8 ( ... ) __riscv_vsub_vx_u8m8(__VA_ARGS__)

◆ vsub_vx_u8m8_m

#define vsub_vx_u8m8_m ( ... ) __riscv_vsub_vx_u8m8_tumu(__VA_ARGS__)

◆ vsub_vx_u8mf2

#define vsub_vx_u8mf2 ( ... ) __riscv_vsub_vx_u8mf2(__VA_ARGS__)

◆ vsub_vx_u8mf2_m

#define vsub_vx_u8mf2_m ( ... ) __riscv_vsub_vx_u8mf2_tumu(__VA_ARGS__)

◆ vsub_vx_u8mf4

#define vsub_vx_u8mf4 ( ... ) __riscv_vsub_vx_u8mf4(__VA_ARGS__)

◆ vsub_vx_u8mf4_m

#define vsub_vx_u8mf4_m ( ... ) __riscv_vsub_vx_u8mf4_tumu(__VA_ARGS__)

◆ vsub_vx_u8mf8

#define vsub_vx_u8mf8 ( ... ) __riscv_vsub_vx_u8mf8(__VA_ARGS__)

◆ vsub_vx_u8mf8_m

#define vsub_vx_u8mf8_m ( ... ) __riscv_vsub_vx_u8mf8_tumu(__VA_ARGS__)

◆ vsuxei16_v_f16m1

#define vsuxei16_v_f16m1 ( ... ) __riscv_vsuxei16_v_f16m1(__VA_ARGS__)

◆ vsuxei16_v_f16m1_m

#define vsuxei16_v_f16m1_m ( ... ) __riscv_vsuxei16_v_f16m1_m(__VA_ARGS__)

◆ vsuxei16_v_f16m2

#define vsuxei16_v_f16m2 ( ... ) __riscv_vsuxei16_v_f16m2(__VA_ARGS__)

◆ vsuxei16_v_f16m2_m

#define vsuxei16_v_f16m2_m ( ... ) __riscv_vsuxei16_v_f16m2_m(__VA_ARGS__)

◆ vsuxei16_v_f16m4

#define vsuxei16_v_f16m4 ( ... ) __riscv_vsuxei16_v_f16m4(__VA_ARGS__)

◆ vsuxei16_v_f16m4_m

#define vsuxei16_v_f16m4_m ( ... ) __riscv_vsuxei16_v_f16m4_m(__VA_ARGS__)

◆ vsuxei16_v_f16m8

#define vsuxei16_v_f16m8 ( ... ) __riscv_vsuxei16_v_f16m8(__VA_ARGS__)

◆ vsuxei16_v_f16m8_m

#define vsuxei16_v_f16m8_m ( ... ) __riscv_vsuxei16_v_f16m8_m(__VA_ARGS__)

◆ vsuxei16_v_f16mf2

#define vsuxei16_v_f16mf2 ( ... ) __riscv_vsuxei16_v_f16mf2(__VA_ARGS__)

◆ vsuxei16_v_f16mf2_m

#define vsuxei16_v_f16mf2_m ( ... ) __riscv_vsuxei16_v_f16mf2_m(__VA_ARGS__)

◆ vsuxei16_v_f16mf4

#define vsuxei16_v_f16mf4 ( ... ) __riscv_vsuxei16_v_f16mf4(__VA_ARGS__)

◆ vsuxei16_v_f16mf4_m

#define vsuxei16_v_f16mf4_m ( ... ) __riscv_vsuxei16_v_f16mf4_m(__VA_ARGS__)

◆ vsuxei16_v_f32m1

#define vsuxei16_v_f32m1 ( ... ) __riscv_vsuxei16_v_f32m1(__VA_ARGS__)

◆ vsuxei16_v_f32m1_m

#define vsuxei16_v_f32m1_m ( ... ) __riscv_vsuxei16_v_f32m1_m(__VA_ARGS__)

◆ vsuxei16_v_f32m2

#define vsuxei16_v_f32m2 ( ... ) __riscv_vsuxei16_v_f32m2(__VA_ARGS__)

◆ vsuxei16_v_f32m2_m

#define vsuxei16_v_f32m2_m ( ... ) __riscv_vsuxei16_v_f32m2_m(__VA_ARGS__)

◆ vsuxei16_v_f32m4

#define vsuxei16_v_f32m4 ( ... ) __riscv_vsuxei16_v_f32m4(__VA_ARGS__)

◆ vsuxei16_v_f32m4_m

#define vsuxei16_v_f32m4_m ( ... ) __riscv_vsuxei16_v_f32m4_m(__VA_ARGS__)

◆ vsuxei16_v_f32m8

#define vsuxei16_v_f32m8 ( ... ) __riscv_vsuxei16_v_f32m8(__VA_ARGS__)

◆ vsuxei16_v_f32m8_m

#define vsuxei16_v_f32m8_m ( ... ) __riscv_vsuxei16_v_f32m8_m(__VA_ARGS__)

◆ vsuxei16_v_f32mf2

#define vsuxei16_v_f32mf2 ( ... ) __riscv_vsuxei16_v_f32mf2(__VA_ARGS__)

◆ vsuxei16_v_f32mf2_m

#define vsuxei16_v_f32mf2_m ( ... ) __riscv_vsuxei16_v_f32mf2_m(__VA_ARGS__)

◆ vsuxei16_v_f64m1

#define vsuxei16_v_f64m1 ( ... ) __riscv_vsuxei16_v_f64m1(__VA_ARGS__)

◆ vsuxei16_v_f64m1_m

#define vsuxei16_v_f64m1_m ( ... ) __riscv_vsuxei16_v_f64m1_m(__VA_ARGS__)

◆ vsuxei16_v_f64m2

#define vsuxei16_v_f64m2 ( ... ) __riscv_vsuxei16_v_f64m2(__VA_ARGS__)

◆ vsuxei16_v_f64m2_m

#define vsuxei16_v_f64m2_m ( ... ) __riscv_vsuxei16_v_f64m2_m(__VA_ARGS__)

◆ vsuxei16_v_f64m4

#define vsuxei16_v_f64m4 ( ... ) __riscv_vsuxei16_v_f64m4(__VA_ARGS__)

◆ vsuxei16_v_f64m4_m

#define vsuxei16_v_f64m4_m ( ... ) __riscv_vsuxei16_v_f64m4_m(__VA_ARGS__)

◆ vsuxei16_v_f64m8

#define vsuxei16_v_f64m8 ( ... ) __riscv_vsuxei16_v_f64m8(__VA_ARGS__)

◆ vsuxei16_v_f64m8_m

#define vsuxei16_v_f64m8_m ( ... ) __riscv_vsuxei16_v_f64m8_m(__VA_ARGS__)

◆ vsuxei16_v_i16m1

#define vsuxei16_v_i16m1 ( ... ) __riscv_vsuxei16_v_i16m1(__VA_ARGS__)

◆ vsuxei16_v_i16m1_m

#define vsuxei16_v_i16m1_m ( ... ) __riscv_vsuxei16_v_i16m1_m(__VA_ARGS__)

◆ vsuxei16_v_i16m2

#define vsuxei16_v_i16m2 ( ... ) __riscv_vsuxei16_v_i16m2(__VA_ARGS__)

◆ vsuxei16_v_i16m2_m

#define vsuxei16_v_i16m2_m ( ... ) __riscv_vsuxei16_v_i16m2_m(__VA_ARGS__)

◆ vsuxei16_v_i16m4

#define vsuxei16_v_i16m4 ( ... ) __riscv_vsuxei16_v_i16m4(__VA_ARGS__)

◆ vsuxei16_v_i16m4_m

#define vsuxei16_v_i16m4_m ( ... ) __riscv_vsuxei16_v_i16m4_m(__VA_ARGS__)

◆ vsuxei16_v_i16m8

#define vsuxei16_v_i16m8 ( ... ) __riscv_vsuxei16_v_i16m8(__VA_ARGS__)

◆ vsuxei16_v_i16m8_m

#define vsuxei16_v_i16m8_m ( ... ) __riscv_vsuxei16_v_i16m8_m(__VA_ARGS__)

◆ vsuxei16_v_i16mf2

#define vsuxei16_v_i16mf2 ( ... ) __riscv_vsuxei16_v_i16mf2(__VA_ARGS__)

◆ vsuxei16_v_i16mf2_m

#define vsuxei16_v_i16mf2_m ( ... ) __riscv_vsuxei16_v_i16mf2_m(__VA_ARGS__)

◆ vsuxei16_v_i16mf4

#define vsuxei16_v_i16mf4 ( ... ) __riscv_vsuxei16_v_i16mf4(__VA_ARGS__)

◆ vsuxei16_v_i16mf4_m

#define vsuxei16_v_i16mf4_m ( ... ) __riscv_vsuxei16_v_i16mf4_m(__VA_ARGS__)

◆ vsuxei16_v_i32m1

#define vsuxei16_v_i32m1 ( ... ) __riscv_vsuxei16_v_i32m1(__VA_ARGS__)

◆ vsuxei16_v_i32m1_m

#define vsuxei16_v_i32m1_m ( ... ) __riscv_vsuxei16_v_i32m1_m(__VA_ARGS__)

◆ vsuxei16_v_i32m2

#define vsuxei16_v_i32m2 ( ... ) __riscv_vsuxei16_v_i32m2(__VA_ARGS__)

◆ vsuxei16_v_i32m2_m

#define vsuxei16_v_i32m2_m ( ... ) __riscv_vsuxei16_v_i32m2_m(__VA_ARGS__)

◆ vsuxei16_v_i32m4

#define vsuxei16_v_i32m4 ( ... ) __riscv_vsuxei16_v_i32m4(__VA_ARGS__)

◆ vsuxei16_v_i32m4_m

#define vsuxei16_v_i32m4_m ( ... ) __riscv_vsuxei16_v_i32m4_m(__VA_ARGS__)

◆ vsuxei16_v_i32m8

#define vsuxei16_v_i32m8 ( ... ) __riscv_vsuxei16_v_i32m8(__VA_ARGS__)

◆ vsuxei16_v_i32m8_m

#define vsuxei16_v_i32m8_m ( ... ) __riscv_vsuxei16_v_i32m8_m(__VA_ARGS__)

◆ vsuxei16_v_i32mf2

#define vsuxei16_v_i32mf2 ( ... ) __riscv_vsuxei16_v_i32mf2(__VA_ARGS__)

◆ vsuxei16_v_i32mf2_m

#define vsuxei16_v_i32mf2_m ( ... ) __riscv_vsuxei16_v_i32mf2_m(__VA_ARGS__)

◆ vsuxei16_v_i64m1

#define vsuxei16_v_i64m1 ( ... ) __riscv_vsuxei16_v_i64m1(__VA_ARGS__)

◆ vsuxei16_v_i64m1_m

#define vsuxei16_v_i64m1_m ( ... ) __riscv_vsuxei16_v_i64m1_m(__VA_ARGS__)

◆ vsuxei16_v_i64m2

#define vsuxei16_v_i64m2 ( ... ) __riscv_vsuxei16_v_i64m2(__VA_ARGS__)

◆ vsuxei16_v_i64m2_m

#define vsuxei16_v_i64m2_m ( ... ) __riscv_vsuxei16_v_i64m2_m(__VA_ARGS__)

◆ vsuxei16_v_i64m4

#define vsuxei16_v_i64m4 ( ... ) __riscv_vsuxei16_v_i64m4(__VA_ARGS__)

◆ vsuxei16_v_i64m4_m

#define vsuxei16_v_i64m4_m ( ... ) __riscv_vsuxei16_v_i64m4_m(__VA_ARGS__)

◆ vsuxei16_v_i64m8

#define vsuxei16_v_i64m8 ( ... ) __riscv_vsuxei16_v_i64m8(__VA_ARGS__)

◆ vsuxei16_v_i64m8_m

#define vsuxei16_v_i64m8_m ( ... ) __riscv_vsuxei16_v_i64m8_m(__VA_ARGS__)

◆ vsuxei16_v_i8m1

#define vsuxei16_v_i8m1 ( ... ) __riscv_vsuxei16_v_i8m1(__VA_ARGS__)

◆ vsuxei16_v_i8m1_m

#define vsuxei16_v_i8m1_m ( ... ) __riscv_vsuxei16_v_i8m1_m(__VA_ARGS__)

◆ vsuxei16_v_i8m2

#define vsuxei16_v_i8m2 ( ... ) __riscv_vsuxei16_v_i8m2(__VA_ARGS__)

◆ vsuxei16_v_i8m2_m

#define vsuxei16_v_i8m2_m ( ... ) __riscv_vsuxei16_v_i8m2_m(__VA_ARGS__)

◆ vsuxei16_v_i8m4

#define vsuxei16_v_i8m4 ( ... ) __riscv_vsuxei16_v_i8m4(__VA_ARGS__)

◆ vsuxei16_v_i8m4_m

#define vsuxei16_v_i8m4_m ( ... ) __riscv_vsuxei16_v_i8m4_m(__VA_ARGS__)

◆ vsuxei16_v_i8mf2

#define vsuxei16_v_i8mf2 ( ... ) __riscv_vsuxei16_v_i8mf2(__VA_ARGS__)

◆ vsuxei16_v_i8mf2_m

#define vsuxei16_v_i8mf2_m ( ... ) __riscv_vsuxei16_v_i8mf2_m(__VA_ARGS__)

◆ vsuxei16_v_i8mf4

#define vsuxei16_v_i8mf4 ( ... ) __riscv_vsuxei16_v_i8mf4(__VA_ARGS__)

◆ vsuxei16_v_i8mf4_m

#define vsuxei16_v_i8mf4_m ( ... ) __riscv_vsuxei16_v_i8mf4_m(__VA_ARGS__)

◆ vsuxei16_v_i8mf8

#define vsuxei16_v_i8mf8 ( ... ) __riscv_vsuxei16_v_i8mf8(__VA_ARGS__)

◆ vsuxei16_v_i8mf8_m

#define vsuxei16_v_i8mf8_m ( ... ) __riscv_vsuxei16_v_i8mf8_m(__VA_ARGS__)

◆ vsuxei16_v_u16m1

#define vsuxei16_v_u16m1 ( ... ) __riscv_vsuxei16_v_u16m1(__VA_ARGS__)

◆ vsuxei16_v_u16m1_m

#define vsuxei16_v_u16m1_m ( ... ) __riscv_vsuxei16_v_u16m1_m(__VA_ARGS__)

◆ vsuxei16_v_u16m2

#define vsuxei16_v_u16m2 ( ... ) __riscv_vsuxei16_v_u16m2(__VA_ARGS__)

◆ vsuxei16_v_u16m2_m

#define vsuxei16_v_u16m2_m ( ... ) __riscv_vsuxei16_v_u16m2_m(__VA_ARGS__)

◆ vsuxei16_v_u16m4

#define vsuxei16_v_u16m4 ( ... ) __riscv_vsuxei16_v_u16m4(__VA_ARGS__)

◆ vsuxei16_v_u16m4_m

#define vsuxei16_v_u16m4_m ( ... ) __riscv_vsuxei16_v_u16m4_m(__VA_ARGS__)

◆ vsuxei16_v_u16m8

#define vsuxei16_v_u16m8 ( ... ) __riscv_vsuxei16_v_u16m8(__VA_ARGS__)

◆ vsuxei16_v_u16m8_m

#define vsuxei16_v_u16m8_m ( ... ) __riscv_vsuxei16_v_u16m8_m(__VA_ARGS__)

◆ vsuxei16_v_u16mf2

#define vsuxei16_v_u16mf2 ( ... ) __riscv_vsuxei16_v_u16mf2(__VA_ARGS__)

◆ vsuxei16_v_u16mf2_m

#define vsuxei16_v_u16mf2_m ( ... ) __riscv_vsuxei16_v_u16mf2_m(__VA_ARGS__)

◆ vsuxei16_v_u16mf4

#define vsuxei16_v_u16mf4 ( ... ) __riscv_vsuxei16_v_u16mf4(__VA_ARGS__)

◆ vsuxei16_v_u16mf4_m

#define vsuxei16_v_u16mf4_m ( ... ) __riscv_vsuxei16_v_u16mf4_m(__VA_ARGS__)

◆ vsuxei16_v_u32m1

#define vsuxei16_v_u32m1 ( ... ) __riscv_vsuxei16_v_u32m1(__VA_ARGS__)

◆ vsuxei16_v_u32m1_m

#define vsuxei16_v_u32m1_m ( ... ) __riscv_vsuxei16_v_u32m1_m(__VA_ARGS__)

◆ vsuxei16_v_u32m2

#define vsuxei16_v_u32m2 ( ... ) __riscv_vsuxei16_v_u32m2(__VA_ARGS__)

◆ vsuxei16_v_u32m2_m

#define vsuxei16_v_u32m2_m ( ... ) __riscv_vsuxei16_v_u32m2_m(__VA_ARGS__)

◆ vsuxei16_v_u32m4

#define vsuxei16_v_u32m4 ( ... ) __riscv_vsuxei16_v_u32m4(__VA_ARGS__)

◆ vsuxei16_v_u32m4_m

#define vsuxei16_v_u32m4_m ( ... ) __riscv_vsuxei16_v_u32m4_m(__VA_ARGS__)

◆ vsuxei16_v_u32m8

#define vsuxei16_v_u32m8 ( ... ) __riscv_vsuxei16_v_u32m8(__VA_ARGS__)

◆ vsuxei16_v_u32m8_m

#define vsuxei16_v_u32m8_m ( ... ) __riscv_vsuxei16_v_u32m8_m(__VA_ARGS__)

◆ vsuxei16_v_u32mf2

#define vsuxei16_v_u32mf2 ( ... ) __riscv_vsuxei16_v_u32mf2(__VA_ARGS__)

◆ vsuxei16_v_u32mf2_m

#define vsuxei16_v_u32mf2_m ( ... ) __riscv_vsuxei16_v_u32mf2_m(__VA_ARGS__)

◆ vsuxei16_v_u64m1

#define vsuxei16_v_u64m1 ( ... ) __riscv_vsuxei16_v_u64m1(__VA_ARGS__)

◆ vsuxei16_v_u64m1_m

#define vsuxei16_v_u64m1_m ( ... ) __riscv_vsuxei16_v_u64m1_m(__VA_ARGS__)

◆ vsuxei16_v_u64m2

#define vsuxei16_v_u64m2 ( ... ) __riscv_vsuxei16_v_u64m2(__VA_ARGS__)

◆ vsuxei16_v_u64m2_m

#define vsuxei16_v_u64m2_m ( ... ) __riscv_vsuxei16_v_u64m2_m(__VA_ARGS__)

◆ vsuxei16_v_u64m4

#define vsuxei16_v_u64m4 ( ... ) __riscv_vsuxei16_v_u64m4(__VA_ARGS__)

◆ vsuxei16_v_u64m4_m

#define vsuxei16_v_u64m4_m ( ... ) __riscv_vsuxei16_v_u64m4_m(__VA_ARGS__)

◆ vsuxei16_v_u64m8

#define vsuxei16_v_u64m8 ( ... ) __riscv_vsuxei16_v_u64m8(__VA_ARGS__)

◆ vsuxei16_v_u64m8_m

#define vsuxei16_v_u64m8_m ( ... ) __riscv_vsuxei16_v_u64m8_m(__VA_ARGS__)

◆ vsuxei16_v_u8m1

#define vsuxei16_v_u8m1 ( ... ) __riscv_vsuxei16_v_u8m1(__VA_ARGS__)

◆ vsuxei16_v_u8m1_m

#define vsuxei16_v_u8m1_m ( ... ) __riscv_vsuxei16_v_u8m1_m(__VA_ARGS__)

◆ vsuxei16_v_u8m2

#define vsuxei16_v_u8m2 ( ... ) __riscv_vsuxei16_v_u8m2(__VA_ARGS__)

◆ vsuxei16_v_u8m2_m

#define vsuxei16_v_u8m2_m ( ... ) __riscv_vsuxei16_v_u8m2_m(__VA_ARGS__)

◆ vsuxei16_v_u8m4

#define vsuxei16_v_u8m4 ( ... ) __riscv_vsuxei16_v_u8m4(__VA_ARGS__)

◆ vsuxei16_v_u8m4_m

#define vsuxei16_v_u8m4_m ( ... ) __riscv_vsuxei16_v_u8m4_m(__VA_ARGS__)

◆ vsuxei16_v_u8mf2

#define vsuxei16_v_u8mf2 ( ... ) __riscv_vsuxei16_v_u8mf2(__VA_ARGS__)

◆ vsuxei16_v_u8mf2_m

#define vsuxei16_v_u8mf2_m ( ... ) __riscv_vsuxei16_v_u8mf2_m(__VA_ARGS__)

◆ vsuxei16_v_u8mf4

#define vsuxei16_v_u8mf4 ( ... ) __riscv_vsuxei16_v_u8mf4(__VA_ARGS__)

◆ vsuxei16_v_u8mf4_m

#define vsuxei16_v_u8mf4_m ( ... ) __riscv_vsuxei16_v_u8mf4_m(__VA_ARGS__)

◆ vsuxei16_v_u8mf8

#define vsuxei16_v_u8mf8 ( ... ) __riscv_vsuxei16_v_u8mf8(__VA_ARGS__)

◆ vsuxei16_v_u8mf8_m

#define vsuxei16_v_u8mf8_m ( ... ) __riscv_vsuxei16_v_u8mf8_m(__VA_ARGS__)

◆ vsuxei32_v_f16m1

#define vsuxei32_v_f16m1 ( ... ) __riscv_vsuxei32_v_f16m1(__VA_ARGS__)

◆ vsuxei32_v_f16m1_m

#define vsuxei32_v_f16m1_m ( ... ) __riscv_vsuxei32_v_f16m1_m(__VA_ARGS__)

◆ vsuxei32_v_f16m2

#define vsuxei32_v_f16m2 ( ... ) __riscv_vsuxei32_v_f16m2(__VA_ARGS__)

◆ vsuxei32_v_f16m2_m

#define vsuxei32_v_f16m2_m ( ... ) __riscv_vsuxei32_v_f16m2_m(__VA_ARGS__)

◆ vsuxei32_v_f16m4

#define vsuxei32_v_f16m4 ( ... ) __riscv_vsuxei32_v_f16m4(__VA_ARGS__)

◆ vsuxei32_v_f16m4_m

#define vsuxei32_v_f16m4_m ( ... ) __riscv_vsuxei32_v_f16m4_m(__VA_ARGS__)

◆ vsuxei32_v_f16mf2

#define vsuxei32_v_f16mf2 ( ... ) __riscv_vsuxei32_v_f16mf2(__VA_ARGS__)

◆ vsuxei32_v_f16mf2_m

#define vsuxei32_v_f16mf2_m ( ... ) __riscv_vsuxei32_v_f16mf2_m(__VA_ARGS__)

◆ vsuxei32_v_f16mf4

#define vsuxei32_v_f16mf4 ( ... ) __riscv_vsuxei32_v_f16mf4(__VA_ARGS__)

◆ vsuxei32_v_f16mf4_m

#define vsuxei32_v_f16mf4_m ( ... ) __riscv_vsuxei32_v_f16mf4_m(__VA_ARGS__)

◆ vsuxei32_v_f32m1

#define vsuxei32_v_f32m1 ( ... ) __riscv_vsuxei32_v_f32m1(__VA_ARGS__)

◆ vsuxei32_v_f32m1_m

#define vsuxei32_v_f32m1_m ( ... ) __riscv_vsuxei32_v_f32m1_m(__VA_ARGS__)

◆ vsuxei32_v_f32m2

#define vsuxei32_v_f32m2 ( ... ) __riscv_vsuxei32_v_f32m2(__VA_ARGS__)

◆ vsuxei32_v_f32m2_m

#define vsuxei32_v_f32m2_m ( ... ) __riscv_vsuxei32_v_f32m2_m(__VA_ARGS__)

◆ vsuxei32_v_f32m4

#define vsuxei32_v_f32m4 ( ... ) __riscv_vsuxei32_v_f32m4(__VA_ARGS__)

◆ vsuxei32_v_f32m4_m

#define vsuxei32_v_f32m4_m ( ... ) __riscv_vsuxei32_v_f32m4_m(__VA_ARGS__)

◆ vsuxei32_v_f32m8

#define vsuxei32_v_f32m8 ( ... ) __riscv_vsuxei32_v_f32m8(__VA_ARGS__)

◆ vsuxei32_v_f32m8_m

#define vsuxei32_v_f32m8_m ( ... ) __riscv_vsuxei32_v_f32m8_m(__VA_ARGS__)

◆ vsuxei32_v_f32mf2

#define vsuxei32_v_f32mf2 ( ... ) __riscv_vsuxei32_v_f32mf2(__VA_ARGS__)

◆ vsuxei32_v_f32mf2_m

#define vsuxei32_v_f32mf2_m ( ... ) __riscv_vsuxei32_v_f32mf2_m(__VA_ARGS__)

◆ vsuxei32_v_f64m1

#define vsuxei32_v_f64m1 ( ... ) __riscv_vsuxei32_v_f64m1(__VA_ARGS__)

◆ vsuxei32_v_f64m1_m

#define vsuxei32_v_f64m1_m ( ... ) __riscv_vsuxei32_v_f64m1_m(__VA_ARGS__)

◆ vsuxei32_v_f64m2

#define vsuxei32_v_f64m2 ( ... ) __riscv_vsuxei32_v_f64m2(__VA_ARGS__)

◆ vsuxei32_v_f64m2_m

#define vsuxei32_v_f64m2_m ( ... ) __riscv_vsuxei32_v_f64m2_m(__VA_ARGS__)

◆ vsuxei32_v_f64m4

#define vsuxei32_v_f64m4 ( ... ) __riscv_vsuxei32_v_f64m4(__VA_ARGS__)

◆ vsuxei32_v_f64m4_m

#define vsuxei32_v_f64m4_m ( ... ) __riscv_vsuxei32_v_f64m4_m(__VA_ARGS__)

◆ vsuxei32_v_f64m8

#define vsuxei32_v_f64m8 ( ... ) __riscv_vsuxei32_v_f64m8(__VA_ARGS__)

◆ vsuxei32_v_f64m8_m

#define vsuxei32_v_f64m8_m ( ... ) __riscv_vsuxei32_v_f64m8_m(__VA_ARGS__)

◆ vsuxei32_v_i16m1

#define vsuxei32_v_i16m1 ( ... ) __riscv_vsuxei32_v_i16m1(__VA_ARGS__)

◆ vsuxei32_v_i16m1_m

#define vsuxei32_v_i16m1_m ( ... ) __riscv_vsuxei32_v_i16m1_m(__VA_ARGS__)

◆ vsuxei32_v_i16m2

#define vsuxei32_v_i16m2 ( ... ) __riscv_vsuxei32_v_i16m2(__VA_ARGS__)

◆ vsuxei32_v_i16m2_m

#define vsuxei32_v_i16m2_m ( ... ) __riscv_vsuxei32_v_i16m2_m(__VA_ARGS__)

◆ vsuxei32_v_i16m4

#define vsuxei32_v_i16m4 ( ... ) __riscv_vsuxei32_v_i16m4(__VA_ARGS__)

◆ vsuxei32_v_i16m4_m

#define vsuxei32_v_i16m4_m ( ... ) __riscv_vsuxei32_v_i16m4_m(__VA_ARGS__)

◆ vsuxei32_v_i16mf2

#define vsuxei32_v_i16mf2 ( ... ) __riscv_vsuxei32_v_i16mf2(__VA_ARGS__)

◆ vsuxei32_v_i16mf2_m

#define vsuxei32_v_i16mf2_m ( ... ) __riscv_vsuxei32_v_i16mf2_m(__VA_ARGS__)

◆ vsuxei32_v_i16mf4

#define vsuxei32_v_i16mf4 ( ... ) __riscv_vsuxei32_v_i16mf4(__VA_ARGS__)

◆ vsuxei32_v_i16mf4_m

#define vsuxei32_v_i16mf4_m ( ... ) __riscv_vsuxei32_v_i16mf4_m(__VA_ARGS__)

◆ vsuxei32_v_i32m1

#define vsuxei32_v_i32m1 ( ... ) __riscv_vsuxei32_v_i32m1(__VA_ARGS__)

◆ vsuxei32_v_i32m1_m

#define vsuxei32_v_i32m1_m ( ... ) __riscv_vsuxei32_v_i32m1_m(__VA_ARGS__)

◆ vsuxei32_v_i32m2

#define vsuxei32_v_i32m2 ( ... ) __riscv_vsuxei32_v_i32m2(__VA_ARGS__)

◆ vsuxei32_v_i32m2_m

#define vsuxei32_v_i32m2_m ( ... ) __riscv_vsuxei32_v_i32m2_m(__VA_ARGS__)

◆ vsuxei32_v_i32m4

#define vsuxei32_v_i32m4 ( ... ) __riscv_vsuxei32_v_i32m4(__VA_ARGS__)

◆ vsuxei32_v_i32m4_m

#define vsuxei32_v_i32m4_m ( ... ) __riscv_vsuxei32_v_i32m4_m(__VA_ARGS__)

◆ vsuxei32_v_i32m8

#define vsuxei32_v_i32m8 ( ... ) __riscv_vsuxei32_v_i32m8(__VA_ARGS__)

◆ vsuxei32_v_i32m8_m

#define vsuxei32_v_i32m8_m ( ... ) __riscv_vsuxei32_v_i32m8_m(__VA_ARGS__)

◆ vsuxei32_v_i32mf2

#define vsuxei32_v_i32mf2 ( ... ) __riscv_vsuxei32_v_i32mf2(__VA_ARGS__)

◆ vsuxei32_v_i32mf2_m

#define vsuxei32_v_i32mf2_m ( ... ) __riscv_vsuxei32_v_i32mf2_m(__VA_ARGS__)

◆ vsuxei32_v_i64m1

#define vsuxei32_v_i64m1 ( ... ) __riscv_vsuxei32_v_i64m1(__VA_ARGS__)

◆ vsuxei32_v_i64m1_m

#define vsuxei32_v_i64m1_m ( ... ) __riscv_vsuxei32_v_i64m1_m(__VA_ARGS__)

◆ vsuxei32_v_i64m2

#define vsuxei32_v_i64m2 ( ... ) __riscv_vsuxei32_v_i64m2(__VA_ARGS__)

◆ vsuxei32_v_i64m2_m

#define vsuxei32_v_i64m2_m ( ... ) __riscv_vsuxei32_v_i64m2_m(__VA_ARGS__)

◆ vsuxei32_v_i64m4

#define vsuxei32_v_i64m4 ( ... ) __riscv_vsuxei32_v_i64m4(__VA_ARGS__)

◆ vsuxei32_v_i64m4_m

#define vsuxei32_v_i64m4_m ( ... ) __riscv_vsuxei32_v_i64m4_m(__VA_ARGS__)

◆ vsuxei32_v_i64m8

#define vsuxei32_v_i64m8 ( ... ) __riscv_vsuxei32_v_i64m8(__VA_ARGS__)

◆ vsuxei32_v_i64m8_m

#define vsuxei32_v_i64m8_m ( ... ) __riscv_vsuxei32_v_i64m8_m(__VA_ARGS__)

◆ vsuxei32_v_i8m1

#define vsuxei32_v_i8m1 ( ... ) __riscv_vsuxei32_v_i8m1(__VA_ARGS__)

◆ vsuxei32_v_i8m1_m

#define vsuxei32_v_i8m1_m ( ... ) __riscv_vsuxei32_v_i8m1_m(__VA_ARGS__)

◆ vsuxei32_v_i8m2

#define vsuxei32_v_i8m2 ( ... ) __riscv_vsuxei32_v_i8m2(__VA_ARGS__)

◆ vsuxei32_v_i8m2_m

#define vsuxei32_v_i8m2_m ( ... ) __riscv_vsuxei32_v_i8m2_m(__VA_ARGS__)

◆ vsuxei32_v_i8mf2

#define vsuxei32_v_i8mf2 ( ... ) __riscv_vsuxei32_v_i8mf2(__VA_ARGS__)

◆ vsuxei32_v_i8mf2_m

#define vsuxei32_v_i8mf2_m ( ... ) __riscv_vsuxei32_v_i8mf2_m(__VA_ARGS__)

◆ vsuxei32_v_i8mf4

#define vsuxei32_v_i8mf4 ( ... ) __riscv_vsuxei32_v_i8mf4(__VA_ARGS__)

◆ vsuxei32_v_i8mf4_m

#define vsuxei32_v_i8mf4_m ( ... ) __riscv_vsuxei32_v_i8mf4_m(__VA_ARGS__)

◆ vsuxei32_v_i8mf8

#define vsuxei32_v_i8mf8 ( ... ) __riscv_vsuxei32_v_i8mf8(__VA_ARGS__)

◆ vsuxei32_v_i8mf8_m

#define vsuxei32_v_i8mf8_m ( ... ) __riscv_vsuxei32_v_i8mf8_m(__VA_ARGS__)

◆ vsuxei32_v_u16m1

#define vsuxei32_v_u16m1 ( ... ) __riscv_vsuxei32_v_u16m1(__VA_ARGS__)

◆ vsuxei32_v_u16m1_m

#define vsuxei32_v_u16m1_m ( ... ) __riscv_vsuxei32_v_u16m1_m(__VA_ARGS__)

◆ vsuxei32_v_u16m2

#define vsuxei32_v_u16m2 ( ... ) __riscv_vsuxei32_v_u16m2(__VA_ARGS__)

◆ vsuxei32_v_u16m2_m

#define vsuxei32_v_u16m2_m ( ... ) __riscv_vsuxei32_v_u16m2_m(__VA_ARGS__)

◆ vsuxei32_v_u16m4

#define vsuxei32_v_u16m4 ( ... ) __riscv_vsuxei32_v_u16m4(__VA_ARGS__)

◆ vsuxei32_v_u16m4_m

#define vsuxei32_v_u16m4_m ( ... ) __riscv_vsuxei32_v_u16m4_m(__VA_ARGS__)

◆ vsuxei32_v_u16mf2

#define vsuxei32_v_u16mf2 ( ... ) __riscv_vsuxei32_v_u16mf2(__VA_ARGS__)

◆ vsuxei32_v_u16mf2_m

#define vsuxei32_v_u16mf2_m ( ... ) __riscv_vsuxei32_v_u16mf2_m(__VA_ARGS__)

◆ vsuxei32_v_u16mf4

#define vsuxei32_v_u16mf4 ( ... ) __riscv_vsuxei32_v_u16mf4(__VA_ARGS__)

◆ vsuxei32_v_u16mf4_m

#define vsuxei32_v_u16mf4_m ( ... ) __riscv_vsuxei32_v_u16mf4_m(__VA_ARGS__)

◆ vsuxei32_v_u32m1

#define vsuxei32_v_u32m1 ( ... ) __riscv_vsuxei32_v_u32m1(__VA_ARGS__)

◆ vsuxei32_v_u32m1_m

#define vsuxei32_v_u32m1_m ( ... ) __riscv_vsuxei32_v_u32m1_m(__VA_ARGS__)

◆ vsuxei32_v_u32m2

#define vsuxei32_v_u32m2 ( ... ) __riscv_vsuxei32_v_u32m2(__VA_ARGS__)

◆ vsuxei32_v_u32m2_m

#define vsuxei32_v_u32m2_m ( ... ) __riscv_vsuxei32_v_u32m2_m(__VA_ARGS__)

◆ vsuxei32_v_u32m4

#define vsuxei32_v_u32m4 ( ... ) __riscv_vsuxei32_v_u32m4(__VA_ARGS__)

◆ vsuxei32_v_u32m4_m

#define vsuxei32_v_u32m4_m ( ... ) __riscv_vsuxei32_v_u32m4_m(__VA_ARGS__)

◆ vsuxei32_v_u32m8

#define vsuxei32_v_u32m8 ( ... ) __riscv_vsuxei32_v_u32m8(__VA_ARGS__)

◆ vsuxei32_v_u32m8_m

#define vsuxei32_v_u32m8_m ( ... ) __riscv_vsuxei32_v_u32m8_m(__VA_ARGS__)

◆ vsuxei32_v_u32mf2

#define vsuxei32_v_u32mf2 ( ... ) __riscv_vsuxei32_v_u32mf2(__VA_ARGS__)

◆ vsuxei32_v_u32mf2_m

#define vsuxei32_v_u32mf2_m ( ... ) __riscv_vsuxei32_v_u32mf2_m(__VA_ARGS__)

◆ vsuxei32_v_u64m1

#define vsuxei32_v_u64m1 ( ... ) __riscv_vsuxei32_v_u64m1(__VA_ARGS__)

◆ vsuxei32_v_u64m1_m

#define vsuxei32_v_u64m1_m ( ... ) __riscv_vsuxei32_v_u64m1_m(__VA_ARGS__)

◆ vsuxei32_v_u64m2

#define vsuxei32_v_u64m2 ( ... ) __riscv_vsuxei32_v_u64m2(__VA_ARGS__)

◆ vsuxei32_v_u64m2_m

#define vsuxei32_v_u64m2_m ( ... ) __riscv_vsuxei32_v_u64m2_m(__VA_ARGS__)

◆ vsuxei32_v_u64m4

#define vsuxei32_v_u64m4 ( ... ) __riscv_vsuxei32_v_u64m4(__VA_ARGS__)

◆ vsuxei32_v_u64m4_m

#define vsuxei32_v_u64m4_m ( ... ) __riscv_vsuxei32_v_u64m4_m(__VA_ARGS__)

◆ vsuxei32_v_u64m8

#define vsuxei32_v_u64m8 ( ... ) __riscv_vsuxei32_v_u64m8(__VA_ARGS__)

◆ vsuxei32_v_u64m8_m

#define vsuxei32_v_u64m8_m ( ... ) __riscv_vsuxei32_v_u64m8_m(__VA_ARGS__)

◆ vsuxei32_v_u8m1

#define vsuxei32_v_u8m1 ( ... ) __riscv_vsuxei32_v_u8m1(__VA_ARGS__)

◆ vsuxei32_v_u8m1_m

#define vsuxei32_v_u8m1_m ( ... ) __riscv_vsuxei32_v_u8m1_m(__VA_ARGS__)

◆ vsuxei32_v_u8m2

#define vsuxei32_v_u8m2 ( ... ) __riscv_vsuxei32_v_u8m2(__VA_ARGS__)

◆ vsuxei32_v_u8m2_m

#define vsuxei32_v_u8m2_m ( ... ) __riscv_vsuxei32_v_u8m2_m(__VA_ARGS__)

◆ vsuxei32_v_u8mf2

#define vsuxei32_v_u8mf2 ( ... ) __riscv_vsuxei32_v_u8mf2(__VA_ARGS__)

◆ vsuxei32_v_u8mf2_m

#define vsuxei32_v_u8mf2_m ( ... ) __riscv_vsuxei32_v_u8mf2_m(__VA_ARGS__)

◆ vsuxei32_v_u8mf4

#define vsuxei32_v_u8mf4 ( ... ) __riscv_vsuxei32_v_u8mf4(__VA_ARGS__)

◆ vsuxei32_v_u8mf4_m

#define vsuxei32_v_u8mf4_m ( ... ) __riscv_vsuxei32_v_u8mf4_m(__VA_ARGS__)

◆ vsuxei32_v_u8mf8

#define vsuxei32_v_u8mf8 ( ... ) __riscv_vsuxei32_v_u8mf8(__VA_ARGS__)

◆ vsuxei32_v_u8mf8_m

#define vsuxei32_v_u8mf8_m ( ... ) __riscv_vsuxei32_v_u8mf8_m(__VA_ARGS__)

◆ vsuxei64_v_f16m1

#define vsuxei64_v_f16m1 ( ... ) __riscv_vsuxei64_v_f16m1(__VA_ARGS__)

◆ vsuxei64_v_f16m1_m

#define vsuxei64_v_f16m1_m ( ... ) __riscv_vsuxei64_v_f16m1_m(__VA_ARGS__)

◆ vsuxei64_v_f16m2

#define vsuxei64_v_f16m2 ( ... ) __riscv_vsuxei64_v_f16m2(__VA_ARGS__)

◆ vsuxei64_v_f16m2_m

#define vsuxei64_v_f16m2_m ( ... ) __riscv_vsuxei64_v_f16m2_m(__VA_ARGS__)

◆ vsuxei64_v_f16mf2

#define vsuxei64_v_f16mf2 ( ... ) __riscv_vsuxei64_v_f16mf2(__VA_ARGS__)

◆ vsuxei64_v_f16mf2_m

#define vsuxei64_v_f16mf2_m ( ... ) __riscv_vsuxei64_v_f16mf2_m(__VA_ARGS__)

◆ vsuxei64_v_f16mf4

#define vsuxei64_v_f16mf4 ( ... ) __riscv_vsuxei64_v_f16mf4(__VA_ARGS__)

◆ vsuxei64_v_f16mf4_m

#define vsuxei64_v_f16mf4_m ( ... ) __riscv_vsuxei64_v_f16mf4_m(__VA_ARGS__)

◆ vsuxei64_v_f32m1

#define vsuxei64_v_f32m1 ( ... ) __riscv_vsuxei64_v_f32m1(__VA_ARGS__)

◆ vsuxei64_v_f32m1_m

#define vsuxei64_v_f32m1_m ( ... ) __riscv_vsuxei64_v_f32m1_m(__VA_ARGS__)

◆ vsuxei64_v_f32m2

#define vsuxei64_v_f32m2 ( ... ) __riscv_vsuxei64_v_f32m2(__VA_ARGS__)

◆ vsuxei64_v_f32m2_m

#define vsuxei64_v_f32m2_m ( ... ) __riscv_vsuxei64_v_f32m2_m(__VA_ARGS__)

◆ vsuxei64_v_f32m4

#define vsuxei64_v_f32m4 ( ... ) __riscv_vsuxei64_v_f32m4(__VA_ARGS__)

◆ vsuxei64_v_f32m4_m

#define vsuxei64_v_f32m4_m ( ... ) __riscv_vsuxei64_v_f32m4_m(__VA_ARGS__)

◆ vsuxei64_v_f32mf2

#define vsuxei64_v_f32mf2 ( ... ) __riscv_vsuxei64_v_f32mf2(__VA_ARGS__)

◆ vsuxei64_v_f32mf2_m

#define vsuxei64_v_f32mf2_m ( ... ) __riscv_vsuxei64_v_f32mf2_m(__VA_ARGS__)

◆ vsuxei64_v_f64m1

#define vsuxei64_v_f64m1 ( ... ) __riscv_vsuxei64_v_f64m1(__VA_ARGS__)

◆ vsuxei64_v_f64m1_m

#define vsuxei64_v_f64m1_m ( ... ) __riscv_vsuxei64_v_f64m1_m(__VA_ARGS__)

◆ vsuxei64_v_f64m2

#define vsuxei64_v_f64m2 ( ... ) __riscv_vsuxei64_v_f64m2(__VA_ARGS__)

◆ vsuxei64_v_f64m2_m

#define vsuxei64_v_f64m2_m ( ... ) __riscv_vsuxei64_v_f64m2_m(__VA_ARGS__)

◆ vsuxei64_v_f64m4

#define vsuxei64_v_f64m4 ( ... ) __riscv_vsuxei64_v_f64m4(__VA_ARGS__)

◆ vsuxei64_v_f64m4_m

#define vsuxei64_v_f64m4_m ( ... ) __riscv_vsuxei64_v_f64m4_m(__VA_ARGS__)

◆ vsuxei64_v_f64m8

#define vsuxei64_v_f64m8 ( ... ) __riscv_vsuxei64_v_f64m8(__VA_ARGS__)

◆ vsuxei64_v_f64m8_m

#define vsuxei64_v_f64m8_m ( ... ) __riscv_vsuxei64_v_f64m8_m(__VA_ARGS__)

◆ vsuxei64_v_i16m1

#define vsuxei64_v_i16m1 ( ... ) __riscv_vsuxei64_v_i16m1(__VA_ARGS__)

◆ vsuxei64_v_i16m1_m

#define vsuxei64_v_i16m1_m ( ... ) __riscv_vsuxei64_v_i16m1_m(__VA_ARGS__)

◆ vsuxei64_v_i16m2

#define vsuxei64_v_i16m2 ( ... ) __riscv_vsuxei64_v_i16m2(__VA_ARGS__)

◆ vsuxei64_v_i16m2_m

#define vsuxei64_v_i16m2_m ( ... ) __riscv_vsuxei64_v_i16m2_m(__VA_ARGS__)

◆ vsuxei64_v_i16mf2

#define vsuxei64_v_i16mf2 ( ... ) __riscv_vsuxei64_v_i16mf2(__VA_ARGS__)

◆ vsuxei64_v_i16mf2_m

#define vsuxei64_v_i16mf2_m ( ... ) __riscv_vsuxei64_v_i16mf2_m(__VA_ARGS__)

◆ vsuxei64_v_i16mf4

#define vsuxei64_v_i16mf4 ( ... ) __riscv_vsuxei64_v_i16mf4(__VA_ARGS__)

◆ vsuxei64_v_i16mf4_m

#define vsuxei64_v_i16mf4_m ( ... ) __riscv_vsuxei64_v_i16mf4_m(__VA_ARGS__)

◆ vsuxei64_v_i32m1

#define vsuxei64_v_i32m1 ( ... ) __riscv_vsuxei64_v_i32m1(__VA_ARGS__)

◆ vsuxei64_v_i32m1_m

#define vsuxei64_v_i32m1_m ( ... ) __riscv_vsuxei64_v_i32m1_m(__VA_ARGS__)

◆ vsuxei64_v_i32m2

#define vsuxei64_v_i32m2 ( ... ) __riscv_vsuxei64_v_i32m2(__VA_ARGS__)

◆ vsuxei64_v_i32m2_m

#define vsuxei64_v_i32m2_m ( ... ) __riscv_vsuxei64_v_i32m2_m(__VA_ARGS__)

◆ vsuxei64_v_i32m4

#define vsuxei64_v_i32m4 ( ... ) __riscv_vsuxei64_v_i32m4(__VA_ARGS__)

◆ vsuxei64_v_i32m4_m

#define vsuxei64_v_i32m4_m ( ... ) __riscv_vsuxei64_v_i32m4_m(__VA_ARGS__)

◆ vsuxei64_v_i32mf2

#define vsuxei64_v_i32mf2 ( ... ) __riscv_vsuxei64_v_i32mf2(__VA_ARGS__)

◆ vsuxei64_v_i32mf2_m

#define vsuxei64_v_i32mf2_m ( ... ) __riscv_vsuxei64_v_i32mf2_m(__VA_ARGS__)

◆ vsuxei64_v_i64m1

#define vsuxei64_v_i64m1 ( ... ) __riscv_vsuxei64_v_i64m1(__VA_ARGS__)

◆ vsuxei64_v_i64m1_m

#define vsuxei64_v_i64m1_m ( ... ) __riscv_vsuxei64_v_i64m1_m(__VA_ARGS__)

◆ vsuxei64_v_i64m2

#define vsuxei64_v_i64m2 ( ... ) __riscv_vsuxei64_v_i64m2(__VA_ARGS__)

◆ vsuxei64_v_i64m2_m

#define vsuxei64_v_i64m2_m ( ... ) __riscv_vsuxei64_v_i64m2_m(__VA_ARGS__)

◆ vsuxei64_v_i64m4

#define vsuxei64_v_i64m4 ( ... ) __riscv_vsuxei64_v_i64m4(__VA_ARGS__)

◆ vsuxei64_v_i64m4_m

#define vsuxei64_v_i64m4_m ( ... ) __riscv_vsuxei64_v_i64m4_m(__VA_ARGS__)

◆ vsuxei64_v_i64m8

#define vsuxei64_v_i64m8 ( ... ) __riscv_vsuxei64_v_i64m8(__VA_ARGS__)

◆ vsuxei64_v_i64m8_m

#define vsuxei64_v_i64m8_m ( ... ) __riscv_vsuxei64_v_i64m8_m(__VA_ARGS__)

◆ vsuxei64_v_i8m1

#define vsuxei64_v_i8m1 ( ... ) __riscv_vsuxei64_v_i8m1(__VA_ARGS__)

◆ vsuxei64_v_i8m1_m

#define vsuxei64_v_i8m1_m ( ... ) __riscv_vsuxei64_v_i8m1_m(__VA_ARGS__)

◆ vsuxei64_v_i8mf2

#define vsuxei64_v_i8mf2 ( ... ) __riscv_vsuxei64_v_i8mf2(__VA_ARGS__)

◆ vsuxei64_v_i8mf2_m

#define vsuxei64_v_i8mf2_m ( ... ) __riscv_vsuxei64_v_i8mf2_m(__VA_ARGS__)

◆ vsuxei64_v_i8mf4

#define vsuxei64_v_i8mf4 ( ... ) __riscv_vsuxei64_v_i8mf4(__VA_ARGS__)

◆ vsuxei64_v_i8mf4_m

#define vsuxei64_v_i8mf4_m ( ... ) __riscv_vsuxei64_v_i8mf4_m(__VA_ARGS__)

◆ vsuxei64_v_i8mf8

#define vsuxei64_v_i8mf8 ( ... ) __riscv_vsuxei64_v_i8mf8(__VA_ARGS__)

◆ vsuxei64_v_i8mf8_m

#define vsuxei64_v_i8mf8_m ( ... ) __riscv_vsuxei64_v_i8mf8_m(__VA_ARGS__)

◆ vsuxei64_v_u16m1

#define vsuxei64_v_u16m1 ( ... ) __riscv_vsuxei64_v_u16m1(__VA_ARGS__)

◆ vsuxei64_v_u16m1_m

#define vsuxei64_v_u16m1_m ( ... ) __riscv_vsuxei64_v_u16m1_m(__VA_ARGS__)

◆ vsuxei64_v_u16m2

#define vsuxei64_v_u16m2 ( ... ) __riscv_vsuxei64_v_u16m2(__VA_ARGS__)

◆ vsuxei64_v_u16m2_m

#define vsuxei64_v_u16m2_m ( ... ) __riscv_vsuxei64_v_u16m2_m(__VA_ARGS__)

◆ vsuxei64_v_u16mf2

#define vsuxei64_v_u16mf2 ( ... ) __riscv_vsuxei64_v_u16mf2(__VA_ARGS__)

◆ vsuxei64_v_u16mf2_m

#define vsuxei64_v_u16mf2_m ( ... ) __riscv_vsuxei64_v_u16mf2_m(__VA_ARGS__)

◆ vsuxei64_v_u16mf4

#define vsuxei64_v_u16mf4 ( ... ) __riscv_vsuxei64_v_u16mf4(__VA_ARGS__)

◆ vsuxei64_v_u16mf4_m

#define vsuxei64_v_u16mf4_m ( ... ) __riscv_vsuxei64_v_u16mf4_m(__VA_ARGS__)

◆ vsuxei64_v_u32m1

#define vsuxei64_v_u32m1 ( ... ) __riscv_vsuxei64_v_u32m1(__VA_ARGS__)

◆ vsuxei64_v_u32m1_m

#define vsuxei64_v_u32m1_m ( ... ) __riscv_vsuxei64_v_u32m1_m(__VA_ARGS__)

◆ vsuxei64_v_u32m2

#define vsuxei64_v_u32m2 ( ... ) __riscv_vsuxei64_v_u32m2(__VA_ARGS__)

◆ vsuxei64_v_u32m2_m

#define vsuxei64_v_u32m2_m ( ... ) __riscv_vsuxei64_v_u32m2_m(__VA_ARGS__)

◆ vsuxei64_v_u32m4

#define vsuxei64_v_u32m4 ( ... ) __riscv_vsuxei64_v_u32m4(__VA_ARGS__)

◆ vsuxei64_v_u32m4_m

#define vsuxei64_v_u32m4_m ( ... ) __riscv_vsuxei64_v_u32m4_m(__VA_ARGS__)

◆ vsuxei64_v_u32mf2

#define vsuxei64_v_u32mf2 ( ... ) __riscv_vsuxei64_v_u32mf2(__VA_ARGS__)

◆ vsuxei64_v_u32mf2_m

#define vsuxei64_v_u32mf2_m ( ... ) __riscv_vsuxei64_v_u32mf2_m(__VA_ARGS__)

◆ vsuxei64_v_u64m1

#define vsuxei64_v_u64m1 ( ... ) __riscv_vsuxei64_v_u64m1(__VA_ARGS__)

◆ vsuxei64_v_u64m1_m

#define vsuxei64_v_u64m1_m ( ... ) __riscv_vsuxei64_v_u64m1_m(__VA_ARGS__)

◆ vsuxei64_v_u64m2

#define vsuxei64_v_u64m2 ( ... ) __riscv_vsuxei64_v_u64m2(__VA_ARGS__)

◆ vsuxei64_v_u64m2_m

#define vsuxei64_v_u64m2_m ( ... ) __riscv_vsuxei64_v_u64m2_m(__VA_ARGS__)

◆ vsuxei64_v_u64m4

#define vsuxei64_v_u64m4 ( ... ) __riscv_vsuxei64_v_u64m4(__VA_ARGS__)

◆ vsuxei64_v_u64m4_m

#define vsuxei64_v_u64m4_m ( ... ) __riscv_vsuxei64_v_u64m4_m(__VA_ARGS__)

◆ vsuxei64_v_u64m8

#define vsuxei64_v_u64m8 ( ... ) __riscv_vsuxei64_v_u64m8(__VA_ARGS__)

◆ vsuxei64_v_u64m8_m

#define vsuxei64_v_u64m8_m ( ... ) __riscv_vsuxei64_v_u64m8_m(__VA_ARGS__)

◆ vsuxei64_v_u8m1

#define vsuxei64_v_u8m1 ( ... ) __riscv_vsuxei64_v_u8m1(__VA_ARGS__)

◆ vsuxei64_v_u8m1_m

#define vsuxei64_v_u8m1_m ( ... ) __riscv_vsuxei64_v_u8m1_m(__VA_ARGS__)

◆ vsuxei64_v_u8mf2

#define vsuxei64_v_u8mf2 ( ... ) __riscv_vsuxei64_v_u8mf2(__VA_ARGS__)

◆ vsuxei64_v_u8mf2_m

#define vsuxei64_v_u8mf2_m ( ... ) __riscv_vsuxei64_v_u8mf2_m(__VA_ARGS__)

◆ vsuxei64_v_u8mf4

#define vsuxei64_v_u8mf4 ( ... ) __riscv_vsuxei64_v_u8mf4(__VA_ARGS__)

◆ vsuxei64_v_u8mf4_m

#define vsuxei64_v_u8mf4_m ( ... ) __riscv_vsuxei64_v_u8mf4_m(__VA_ARGS__)

◆ vsuxei64_v_u8mf8

#define vsuxei64_v_u8mf8 ( ... ) __riscv_vsuxei64_v_u8mf8(__VA_ARGS__)

◆ vsuxei64_v_u8mf8_m

#define vsuxei64_v_u8mf8_m ( ... ) __riscv_vsuxei64_v_u8mf8_m(__VA_ARGS__)

◆ vsuxei8_v_f16m1

#define vsuxei8_v_f16m1 ( ... ) __riscv_vsuxei8_v_f16m1(__VA_ARGS__)

◆ vsuxei8_v_f16m1_m

#define vsuxei8_v_f16m1_m ( ... ) __riscv_vsuxei8_v_f16m1_m(__VA_ARGS__)

◆ vsuxei8_v_f16m2

#define vsuxei8_v_f16m2 ( ... ) __riscv_vsuxei8_v_f16m2(__VA_ARGS__)

◆ vsuxei8_v_f16m2_m

#define vsuxei8_v_f16m2_m ( ... ) __riscv_vsuxei8_v_f16m2_m(__VA_ARGS__)

◆ vsuxei8_v_f16m4

#define vsuxei8_v_f16m4 ( ... ) __riscv_vsuxei8_v_f16m4(__VA_ARGS__)

◆ vsuxei8_v_f16m4_m

#define vsuxei8_v_f16m4_m ( ... ) __riscv_vsuxei8_v_f16m4_m(__VA_ARGS__)

◆ vsuxei8_v_f16m8

#define vsuxei8_v_f16m8 ( ... ) __riscv_vsuxei8_v_f16m8(__VA_ARGS__)

◆ vsuxei8_v_f16m8_m

#define vsuxei8_v_f16m8_m ( ... ) __riscv_vsuxei8_v_f16m8_m(__VA_ARGS__)

◆ vsuxei8_v_f16mf2

#define vsuxei8_v_f16mf2 ( ... ) __riscv_vsuxei8_v_f16mf2(__VA_ARGS__)

◆ vsuxei8_v_f16mf2_m

#define vsuxei8_v_f16mf2_m ( ... ) __riscv_vsuxei8_v_f16mf2_m(__VA_ARGS__)

◆ vsuxei8_v_f16mf4

#define vsuxei8_v_f16mf4 ( ... ) __riscv_vsuxei8_v_f16mf4(__VA_ARGS__)

◆ vsuxei8_v_f16mf4_m

#define vsuxei8_v_f16mf4_m ( ... ) __riscv_vsuxei8_v_f16mf4_m(__VA_ARGS__)

◆ vsuxei8_v_f32m1

#define vsuxei8_v_f32m1 ( ... ) __riscv_vsuxei8_v_f32m1(__VA_ARGS__)

◆ vsuxei8_v_f32m1_m

#define vsuxei8_v_f32m1_m ( ... ) __riscv_vsuxei8_v_f32m1_m(__VA_ARGS__)

◆ vsuxei8_v_f32m2

#define vsuxei8_v_f32m2 ( ... ) __riscv_vsuxei8_v_f32m2(__VA_ARGS__)

◆ vsuxei8_v_f32m2_m

#define vsuxei8_v_f32m2_m ( ... ) __riscv_vsuxei8_v_f32m2_m(__VA_ARGS__)

◆ vsuxei8_v_f32m4

#define vsuxei8_v_f32m4 ( ... ) __riscv_vsuxei8_v_f32m4(__VA_ARGS__)

◆ vsuxei8_v_f32m4_m

#define vsuxei8_v_f32m4_m ( ... ) __riscv_vsuxei8_v_f32m4_m(__VA_ARGS__)

◆ vsuxei8_v_f32m8

#define vsuxei8_v_f32m8 ( ... ) __riscv_vsuxei8_v_f32m8(__VA_ARGS__)

◆ vsuxei8_v_f32m8_m

#define vsuxei8_v_f32m8_m ( ... ) __riscv_vsuxei8_v_f32m8_m(__VA_ARGS__)

◆ vsuxei8_v_f32mf2

#define vsuxei8_v_f32mf2 ( ... ) __riscv_vsuxei8_v_f32mf2(__VA_ARGS__)

◆ vsuxei8_v_f32mf2_m

#define vsuxei8_v_f32mf2_m ( ... ) __riscv_vsuxei8_v_f32mf2_m(__VA_ARGS__)

◆ vsuxei8_v_f64m1

#define vsuxei8_v_f64m1 ( ... ) __riscv_vsuxei8_v_f64m1(__VA_ARGS__)

◆ vsuxei8_v_f64m1_m

#define vsuxei8_v_f64m1_m ( ... ) __riscv_vsuxei8_v_f64m1_m(__VA_ARGS__)

◆ vsuxei8_v_f64m2

#define vsuxei8_v_f64m2 ( ... ) __riscv_vsuxei8_v_f64m2(__VA_ARGS__)

◆ vsuxei8_v_f64m2_m

#define vsuxei8_v_f64m2_m ( ... ) __riscv_vsuxei8_v_f64m2_m(__VA_ARGS__)

◆ vsuxei8_v_f64m4

#define vsuxei8_v_f64m4 ( ... ) __riscv_vsuxei8_v_f64m4(__VA_ARGS__)

◆ vsuxei8_v_f64m4_m

#define vsuxei8_v_f64m4_m ( ... ) __riscv_vsuxei8_v_f64m4_m(__VA_ARGS__)

◆ vsuxei8_v_f64m8

#define vsuxei8_v_f64m8 ( ... ) __riscv_vsuxei8_v_f64m8(__VA_ARGS__)

◆ vsuxei8_v_f64m8_m

#define vsuxei8_v_f64m8_m ( ... ) __riscv_vsuxei8_v_f64m8_m(__VA_ARGS__)

◆ vsuxei8_v_i16m1

#define vsuxei8_v_i16m1 ( ... ) __riscv_vsuxei8_v_i16m1(__VA_ARGS__)

◆ vsuxei8_v_i16m1_m

#define vsuxei8_v_i16m1_m ( ... ) __riscv_vsuxei8_v_i16m1_m(__VA_ARGS__)

◆ vsuxei8_v_i16m2

#define vsuxei8_v_i16m2 ( ... ) __riscv_vsuxei8_v_i16m2(__VA_ARGS__)

◆ vsuxei8_v_i16m2_m

#define vsuxei8_v_i16m2_m ( ... ) __riscv_vsuxei8_v_i16m2_m(__VA_ARGS__)

◆ vsuxei8_v_i16m4

#define vsuxei8_v_i16m4 ( ... ) __riscv_vsuxei8_v_i16m4(__VA_ARGS__)

◆ vsuxei8_v_i16m4_m

#define vsuxei8_v_i16m4_m ( ... ) __riscv_vsuxei8_v_i16m4_m(__VA_ARGS__)

◆ vsuxei8_v_i16m8

#define vsuxei8_v_i16m8 ( ... ) __riscv_vsuxei8_v_i16m8(__VA_ARGS__)

◆ vsuxei8_v_i16m8_m

#define vsuxei8_v_i16m8_m ( ... ) __riscv_vsuxei8_v_i16m8_m(__VA_ARGS__)

◆ vsuxei8_v_i16mf2

#define vsuxei8_v_i16mf2 ( ... ) __riscv_vsuxei8_v_i16mf2(__VA_ARGS__)

◆ vsuxei8_v_i16mf2_m

#define vsuxei8_v_i16mf2_m ( ... ) __riscv_vsuxei8_v_i16mf2_m(__VA_ARGS__)

◆ vsuxei8_v_i16mf4

#define vsuxei8_v_i16mf4 ( ... ) __riscv_vsuxei8_v_i16mf4(__VA_ARGS__)

◆ vsuxei8_v_i16mf4_m

#define vsuxei8_v_i16mf4_m ( ... ) __riscv_vsuxei8_v_i16mf4_m(__VA_ARGS__)

◆ vsuxei8_v_i32m1

#define vsuxei8_v_i32m1 ( ... ) __riscv_vsuxei8_v_i32m1(__VA_ARGS__)

◆ vsuxei8_v_i32m1_m

#define vsuxei8_v_i32m1_m ( ... ) __riscv_vsuxei8_v_i32m1_m(__VA_ARGS__)

◆ vsuxei8_v_i32m2

#define vsuxei8_v_i32m2 ( ... ) __riscv_vsuxei8_v_i32m2(__VA_ARGS__)

◆ vsuxei8_v_i32m2_m

#define vsuxei8_v_i32m2_m ( ... ) __riscv_vsuxei8_v_i32m2_m(__VA_ARGS__)

◆ vsuxei8_v_i32m4

#define vsuxei8_v_i32m4 ( ... ) __riscv_vsuxei8_v_i32m4(__VA_ARGS__)

◆ vsuxei8_v_i32m4_m

#define vsuxei8_v_i32m4_m ( ... ) __riscv_vsuxei8_v_i32m4_m(__VA_ARGS__)

◆ vsuxei8_v_i32m8

#define vsuxei8_v_i32m8 ( ... ) __riscv_vsuxei8_v_i32m8(__VA_ARGS__)

◆ vsuxei8_v_i32m8_m

#define vsuxei8_v_i32m8_m ( ... ) __riscv_vsuxei8_v_i32m8_m(__VA_ARGS__)

◆ vsuxei8_v_i32mf2

#define vsuxei8_v_i32mf2 ( ... ) __riscv_vsuxei8_v_i32mf2(__VA_ARGS__)

◆ vsuxei8_v_i32mf2_m

#define vsuxei8_v_i32mf2_m ( ... ) __riscv_vsuxei8_v_i32mf2_m(__VA_ARGS__)

◆ vsuxei8_v_i64m1

#define vsuxei8_v_i64m1 ( ... ) __riscv_vsuxei8_v_i64m1(__VA_ARGS__)

◆ vsuxei8_v_i64m1_m

#define vsuxei8_v_i64m1_m ( ... ) __riscv_vsuxei8_v_i64m1_m(__VA_ARGS__)

◆ vsuxei8_v_i64m2

#define vsuxei8_v_i64m2 ( ... ) __riscv_vsuxei8_v_i64m2(__VA_ARGS__)

◆ vsuxei8_v_i64m2_m

#define vsuxei8_v_i64m2_m ( ... ) __riscv_vsuxei8_v_i64m2_m(__VA_ARGS__)

◆ vsuxei8_v_i64m4

#define vsuxei8_v_i64m4 ( ... ) __riscv_vsuxei8_v_i64m4(__VA_ARGS__)

◆ vsuxei8_v_i64m4_m

#define vsuxei8_v_i64m4_m ( ... ) __riscv_vsuxei8_v_i64m4_m(__VA_ARGS__)

◆ vsuxei8_v_i64m8

#define vsuxei8_v_i64m8 ( ... ) __riscv_vsuxei8_v_i64m8(__VA_ARGS__)

◆ vsuxei8_v_i64m8_m

#define vsuxei8_v_i64m8_m ( ... ) __riscv_vsuxei8_v_i64m8_m(__VA_ARGS__)

◆ vsuxei8_v_i8m1

#define vsuxei8_v_i8m1 ( ... ) __riscv_vsuxei8_v_i8m1(__VA_ARGS__)

◆ vsuxei8_v_i8m1_m

#define vsuxei8_v_i8m1_m ( ... ) __riscv_vsuxei8_v_i8m1_m(__VA_ARGS__)

◆ vsuxei8_v_i8m2

#define vsuxei8_v_i8m2 ( ... ) __riscv_vsuxei8_v_i8m2(__VA_ARGS__)

◆ vsuxei8_v_i8m2_m

#define vsuxei8_v_i8m2_m ( ... ) __riscv_vsuxei8_v_i8m2_m(__VA_ARGS__)

◆ vsuxei8_v_i8m4

#define vsuxei8_v_i8m4 ( ... ) __riscv_vsuxei8_v_i8m4(__VA_ARGS__)

◆ vsuxei8_v_i8m4_m

#define vsuxei8_v_i8m4_m ( ... ) __riscv_vsuxei8_v_i8m4_m(__VA_ARGS__)

◆ vsuxei8_v_i8m8

#define vsuxei8_v_i8m8 ( ... ) __riscv_vsuxei8_v_i8m8(__VA_ARGS__)

◆ vsuxei8_v_i8m8_m

#define vsuxei8_v_i8m8_m ( ... ) __riscv_vsuxei8_v_i8m8_m(__VA_ARGS__)

◆ vsuxei8_v_i8mf2

#define vsuxei8_v_i8mf2 ( ... ) __riscv_vsuxei8_v_i8mf2(__VA_ARGS__)

◆ vsuxei8_v_i8mf2_m

#define vsuxei8_v_i8mf2_m ( ... ) __riscv_vsuxei8_v_i8mf2_m(__VA_ARGS__)

◆ vsuxei8_v_i8mf4

#define vsuxei8_v_i8mf4 ( ... ) __riscv_vsuxei8_v_i8mf4(__VA_ARGS__)

◆ vsuxei8_v_i8mf4_m

#define vsuxei8_v_i8mf4_m ( ... ) __riscv_vsuxei8_v_i8mf4_m(__VA_ARGS__)

◆ vsuxei8_v_i8mf8

#define vsuxei8_v_i8mf8 ( ... ) __riscv_vsuxei8_v_i8mf8(__VA_ARGS__)

◆ vsuxei8_v_i8mf8_m

#define vsuxei8_v_i8mf8_m ( ... ) __riscv_vsuxei8_v_i8mf8_m(__VA_ARGS__)

◆ vsuxei8_v_u16m1

#define vsuxei8_v_u16m1 ( ... ) __riscv_vsuxei8_v_u16m1(__VA_ARGS__)

◆ vsuxei8_v_u16m1_m

#define vsuxei8_v_u16m1_m ( ... ) __riscv_vsuxei8_v_u16m1_m(__VA_ARGS__)

◆ vsuxei8_v_u16m2

#define vsuxei8_v_u16m2 ( ... ) __riscv_vsuxei8_v_u16m2(__VA_ARGS__)

◆ vsuxei8_v_u16m2_m

#define vsuxei8_v_u16m2_m ( ... ) __riscv_vsuxei8_v_u16m2_m(__VA_ARGS__)

◆ vsuxei8_v_u16m4

#define vsuxei8_v_u16m4 ( ... ) __riscv_vsuxei8_v_u16m4(__VA_ARGS__)

◆ vsuxei8_v_u16m4_m

#define vsuxei8_v_u16m4_m ( ... ) __riscv_vsuxei8_v_u16m4_m(__VA_ARGS__)

◆ vsuxei8_v_u16m8

#define vsuxei8_v_u16m8 ( ... ) __riscv_vsuxei8_v_u16m8(__VA_ARGS__)

◆ vsuxei8_v_u16m8_m

#define vsuxei8_v_u16m8_m ( ... ) __riscv_vsuxei8_v_u16m8_m(__VA_ARGS__)

◆ vsuxei8_v_u16mf2

#define vsuxei8_v_u16mf2 ( ... ) __riscv_vsuxei8_v_u16mf2(__VA_ARGS__)

◆ vsuxei8_v_u16mf2_m

#define vsuxei8_v_u16mf2_m ( ... ) __riscv_vsuxei8_v_u16mf2_m(__VA_ARGS__)

◆ vsuxei8_v_u16mf4

#define vsuxei8_v_u16mf4 ( ... ) __riscv_vsuxei8_v_u16mf4(__VA_ARGS__)

◆ vsuxei8_v_u16mf4_m

#define vsuxei8_v_u16mf4_m ( ... ) __riscv_vsuxei8_v_u16mf4_m(__VA_ARGS__)

◆ vsuxei8_v_u32m1

#define vsuxei8_v_u32m1 ( ... ) __riscv_vsuxei8_v_u32m1(__VA_ARGS__)

◆ vsuxei8_v_u32m1_m

#define vsuxei8_v_u32m1_m ( ... ) __riscv_vsuxei8_v_u32m1_m(__VA_ARGS__)

◆ vsuxei8_v_u32m2

#define vsuxei8_v_u32m2 ( ... ) __riscv_vsuxei8_v_u32m2(__VA_ARGS__)

◆ vsuxei8_v_u32m2_m

#define vsuxei8_v_u32m2_m ( ... ) __riscv_vsuxei8_v_u32m2_m(__VA_ARGS__)

◆ vsuxei8_v_u32m4

#define vsuxei8_v_u32m4 ( ... ) __riscv_vsuxei8_v_u32m4(__VA_ARGS__)

◆ vsuxei8_v_u32m4_m

#define vsuxei8_v_u32m4_m ( ... ) __riscv_vsuxei8_v_u32m4_m(__VA_ARGS__)

◆ vsuxei8_v_u32m8

#define vsuxei8_v_u32m8 ( ... ) __riscv_vsuxei8_v_u32m8(__VA_ARGS__)

◆ vsuxei8_v_u32m8_m

#define vsuxei8_v_u32m8_m ( ... ) __riscv_vsuxei8_v_u32m8_m(__VA_ARGS__)

◆ vsuxei8_v_u32mf2

#define vsuxei8_v_u32mf2 ( ... ) __riscv_vsuxei8_v_u32mf2(__VA_ARGS__)

◆ vsuxei8_v_u32mf2_m

#define vsuxei8_v_u32mf2_m ( ... ) __riscv_vsuxei8_v_u32mf2_m(__VA_ARGS__)

◆ vsuxei8_v_u64m1

#define vsuxei8_v_u64m1 ( ... ) __riscv_vsuxei8_v_u64m1(__VA_ARGS__)

◆ vsuxei8_v_u64m1_m

#define vsuxei8_v_u64m1_m ( ... ) __riscv_vsuxei8_v_u64m1_m(__VA_ARGS__)

◆ vsuxei8_v_u64m2

#define vsuxei8_v_u64m2 ( ... ) __riscv_vsuxei8_v_u64m2(__VA_ARGS__)

◆ vsuxei8_v_u64m2_m

#define vsuxei8_v_u64m2_m ( ... ) __riscv_vsuxei8_v_u64m2_m(__VA_ARGS__)

◆ vsuxei8_v_u64m4

#define vsuxei8_v_u64m4 ( ... ) __riscv_vsuxei8_v_u64m4(__VA_ARGS__)

◆ vsuxei8_v_u64m4_m

#define vsuxei8_v_u64m4_m ( ... ) __riscv_vsuxei8_v_u64m4_m(__VA_ARGS__)

◆ vsuxei8_v_u64m8

#define vsuxei8_v_u64m8 ( ... ) __riscv_vsuxei8_v_u64m8(__VA_ARGS__)

◆ vsuxei8_v_u64m8_m

#define vsuxei8_v_u64m8_m ( ... ) __riscv_vsuxei8_v_u64m8_m(__VA_ARGS__)

◆ vsuxei8_v_u8m1

#define vsuxei8_v_u8m1 ( ... ) __riscv_vsuxei8_v_u8m1(__VA_ARGS__)

◆ vsuxei8_v_u8m1_m

#define vsuxei8_v_u8m1_m ( ... ) __riscv_vsuxei8_v_u8m1_m(__VA_ARGS__)

◆ vsuxei8_v_u8m2

#define vsuxei8_v_u8m2 ( ... ) __riscv_vsuxei8_v_u8m2(__VA_ARGS__)

◆ vsuxei8_v_u8m2_m

#define vsuxei8_v_u8m2_m ( ... ) __riscv_vsuxei8_v_u8m2_m(__VA_ARGS__)

◆ vsuxei8_v_u8m4

#define vsuxei8_v_u8m4 ( ... ) __riscv_vsuxei8_v_u8m4(__VA_ARGS__)

◆ vsuxei8_v_u8m4_m

#define vsuxei8_v_u8m4_m ( ... ) __riscv_vsuxei8_v_u8m4_m(__VA_ARGS__)

◆ vsuxei8_v_u8m8

#define vsuxei8_v_u8m8 ( ... ) __riscv_vsuxei8_v_u8m8(__VA_ARGS__)

◆ vsuxei8_v_u8m8_m

#define vsuxei8_v_u8m8_m ( ... ) __riscv_vsuxei8_v_u8m8_m(__VA_ARGS__)

◆ vsuxei8_v_u8mf2

#define vsuxei8_v_u8mf2 ( ... ) __riscv_vsuxei8_v_u8mf2(__VA_ARGS__)

◆ vsuxei8_v_u8mf2_m

#define vsuxei8_v_u8mf2_m ( ... ) __riscv_vsuxei8_v_u8mf2_m(__VA_ARGS__)

◆ vsuxei8_v_u8mf4

#define vsuxei8_v_u8mf4 ( ... ) __riscv_vsuxei8_v_u8mf4(__VA_ARGS__)

◆ vsuxei8_v_u8mf4_m

#define vsuxei8_v_u8mf4_m ( ... ) __riscv_vsuxei8_v_u8mf4_m(__VA_ARGS__)

◆ vsuxei8_v_u8mf8

#define vsuxei8_v_u8mf8 ( ... ) __riscv_vsuxei8_v_u8mf8(__VA_ARGS__)

◆ vsuxei8_v_u8mf8_m

#define vsuxei8_v_u8mf8_m ( ... ) __riscv_vsuxei8_v_u8mf8_m(__VA_ARGS__)

◆ vsuxseg2ei16_v_f16m1

#define vsuxseg2ei16_v_f16m1 ( ... ) __riscv_vsuxseg2ei16_v_f16m1(__VA_ARGS__)

◆ vsuxseg2ei16_v_f16m1_m

#define vsuxseg2ei16_v_f16m1_m ( ... ) __riscv_vsuxseg2ei16_v_f16m1_m(__VA_ARGS__)

◆ vsuxseg2ei16_v_f16m2

#define vsuxseg2ei16_v_f16m2 ( ... ) __riscv_vsuxseg2ei16_v_f16m2(__VA_ARGS__)

◆ vsuxseg2ei16_v_f16m2_m

#define vsuxseg2ei16_v_f16m2_m ( ... ) __riscv_vsuxseg2ei16_v_f16m2_m(__VA_ARGS__)

◆ vsuxseg2ei16_v_f16m4

#define vsuxseg2ei16_v_f16m4 ( ... ) __riscv_vsuxseg2ei16_v_f16m4(__VA_ARGS__)

◆ vsuxseg2ei16_v_f16m4_m

#define vsuxseg2ei16_v_f16m4_m ( ... ) __riscv_vsuxseg2ei16_v_f16m4_m(__VA_ARGS__)

◆ vsuxseg2ei16_v_f16mf2

#define vsuxseg2ei16_v_f16mf2 ( ... ) __riscv_vsuxseg2ei16_v_f16mf2(__VA_ARGS__)

◆ vsuxseg2ei16_v_f16mf2_m

#define vsuxseg2ei16_v_f16mf2_m ( ... ) __riscv_vsuxseg2ei16_v_f16mf2_m(__VA_ARGS__)

◆ vsuxseg2ei16_v_f16mf4

#define vsuxseg2ei16_v_f16mf4 ( ... ) __riscv_vsuxseg2ei16_v_f16mf4(__VA_ARGS__)

◆ vsuxseg2ei16_v_f16mf4_m

#define vsuxseg2ei16_v_f16mf4_m ( ... ) __riscv_vsuxseg2ei16_v_f16mf4_m(__VA_ARGS__)

◆ vsuxseg2ei16_v_f32m1

#define vsuxseg2ei16_v_f32m1 ( ... ) __riscv_vsuxseg2ei16_v_f32m1(__VA_ARGS__)

◆ vsuxseg2ei16_v_f32m1_m

#define vsuxseg2ei16_v_f32m1_m ( ... ) __riscv_vsuxseg2ei16_v_f32m1_m(__VA_ARGS__)

◆ vsuxseg2ei16_v_f32m2

#define vsuxseg2ei16_v_f32m2 ( ... ) __riscv_vsuxseg2ei16_v_f32m2(__VA_ARGS__)

◆ vsuxseg2ei16_v_f32m2_m

#define vsuxseg2ei16_v_f32m2_m ( ... ) __riscv_vsuxseg2ei16_v_f32m2_m(__VA_ARGS__)

◆ vsuxseg2ei16_v_f32m4

#define vsuxseg2ei16_v_f32m4 ( ... ) __riscv_vsuxseg2ei16_v_f32m4(__VA_ARGS__)

◆ vsuxseg2ei16_v_f32m4_m

#define vsuxseg2ei16_v_f32m4_m ( ... ) __riscv_vsuxseg2ei16_v_f32m4_m(__VA_ARGS__)

◆ vsuxseg2ei16_v_f32mf2

#define vsuxseg2ei16_v_f32mf2 ( ... ) __riscv_vsuxseg2ei16_v_f32mf2(__VA_ARGS__)

◆ vsuxseg2ei16_v_f32mf2_m

#define vsuxseg2ei16_v_f32mf2_m ( ... ) __riscv_vsuxseg2ei16_v_f32mf2_m(__VA_ARGS__)

◆ vsuxseg2ei16_v_f64m1

#define vsuxseg2ei16_v_f64m1 ( ... ) __riscv_vsuxseg2ei16_v_f64m1(__VA_ARGS__)

◆ vsuxseg2ei16_v_f64m1_m

#define vsuxseg2ei16_v_f64m1_m ( ... ) __riscv_vsuxseg2ei16_v_f64m1_m(__VA_ARGS__)

◆ vsuxseg2ei16_v_f64m2

#define vsuxseg2ei16_v_f64m2 ( ... ) __riscv_vsuxseg2ei16_v_f64m2(__VA_ARGS__)

◆ vsuxseg2ei16_v_f64m2_m

#define vsuxseg2ei16_v_f64m2_m ( ... ) __riscv_vsuxseg2ei16_v_f64m2_m(__VA_ARGS__)

◆ vsuxseg2ei16_v_f64m4

#define vsuxseg2ei16_v_f64m4 ( ... ) __riscv_vsuxseg2ei16_v_f64m4(__VA_ARGS__)

◆ vsuxseg2ei16_v_f64m4_m

#define vsuxseg2ei16_v_f64m4_m ( ... ) __riscv_vsuxseg2ei16_v_f64m4_m(__VA_ARGS__)

◆ vsuxseg2ei16_v_i16m1

#define vsuxseg2ei16_v_i16m1 ( ... ) __riscv_vsuxseg2ei16_v_i16m1(__VA_ARGS__)

◆ vsuxseg2ei16_v_i16m1_m

#define vsuxseg2ei16_v_i16m1_m ( ... ) __riscv_vsuxseg2ei16_v_i16m1_m(__VA_ARGS__)

◆ vsuxseg2ei16_v_i16m2

#define vsuxseg2ei16_v_i16m2 ( ... ) __riscv_vsuxseg2ei16_v_i16m2(__VA_ARGS__)

◆ vsuxseg2ei16_v_i16m2_m

#define vsuxseg2ei16_v_i16m2_m ( ... ) __riscv_vsuxseg2ei16_v_i16m2_m(__VA_ARGS__)

◆ vsuxseg2ei16_v_i16m4

#define vsuxseg2ei16_v_i16m4 ( ... ) __riscv_vsuxseg2ei16_v_i16m4(__VA_ARGS__)

◆ vsuxseg2ei16_v_i16m4_m

#define vsuxseg2ei16_v_i16m4_m ( ... ) __riscv_vsuxseg2ei16_v_i16m4_m(__VA_ARGS__)

◆ vsuxseg2ei16_v_i16mf2

#define vsuxseg2ei16_v_i16mf2 ( ... ) __riscv_vsuxseg2ei16_v_i16mf2(__VA_ARGS__)

◆ vsuxseg2ei16_v_i16mf2_m

#define vsuxseg2ei16_v_i16mf2_m ( ... ) __riscv_vsuxseg2ei16_v_i16mf2_m(__VA_ARGS__)

◆ vsuxseg2ei16_v_i16mf4

#define vsuxseg2ei16_v_i16mf4 ( ... ) __riscv_vsuxseg2ei16_v_i16mf4(__VA_ARGS__)

◆ vsuxseg2ei16_v_i16mf4_m

#define vsuxseg2ei16_v_i16mf4_m ( ... ) __riscv_vsuxseg2ei16_v_i16mf4_m(__VA_ARGS__)

◆ vsuxseg2ei16_v_i32m1

#define vsuxseg2ei16_v_i32m1 ( ... ) __riscv_vsuxseg2ei16_v_i32m1(__VA_ARGS__)

◆ vsuxseg2ei16_v_i32m1_m

#define vsuxseg2ei16_v_i32m1_m ( ... ) __riscv_vsuxseg2ei16_v_i32m1_m(__VA_ARGS__)

◆ vsuxseg2ei16_v_i32m2

#define vsuxseg2ei16_v_i32m2 ( ... ) __riscv_vsuxseg2ei16_v_i32m2(__VA_ARGS__)

◆ vsuxseg2ei16_v_i32m2_m

#define vsuxseg2ei16_v_i32m2_m ( ... ) __riscv_vsuxseg2ei16_v_i32m2_m(__VA_ARGS__)

◆ vsuxseg2ei16_v_i32m4

#define vsuxseg2ei16_v_i32m4 ( ... ) __riscv_vsuxseg2ei16_v_i32m4(__VA_ARGS__)

◆ vsuxseg2ei16_v_i32m4_m

#define vsuxseg2ei16_v_i32m4_m ( ... ) __riscv_vsuxseg2ei16_v_i32m4_m(__VA_ARGS__)

◆ vsuxseg2ei16_v_i32mf2

#define vsuxseg2ei16_v_i32mf2 ( ... ) __riscv_vsuxseg2ei16_v_i32mf2(__VA_ARGS__)

◆ vsuxseg2ei16_v_i32mf2_m

#define vsuxseg2ei16_v_i32mf2_m ( ... ) __riscv_vsuxseg2ei16_v_i32mf2_m(__VA_ARGS__)

◆ vsuxseg2ei16_v_i64m1

#define vsuxseg2ei16_v_i64m1 ( ... ) __riscv_vsuxseg2ei16_v_i64m1(__VA_ARGS__)

◆ vsuxseg2ei16_v_i64m1_m

#define vsuxseg2ei16_v_i64m1_m ( ... ) __riscv_vsuxseg2ei16_v_i64m1_m(__VA_ARGS__)

◆ vsuxseg2ei16_v_i64m2

#define vsuxseg2ei16_v_i64m2 ( ... ) __riscv_vsuxseg2ei16_v_i64m2(__VA_ARGS__)

◆ vsuxseg2ei16_v_i64m2_m

#define vsuxseg2ei16_v_i64m2_m ( ... ) __riscv_vsuxseg2ei16_v_i64m2_m(__VA_ARGS__)

◆ vsuxseg2ei16_v_i64m4

#define vsuxseg2ei16_v_i64m4 ( ... ) __riscv_vsuxseg2ei16_v_i64m4(__VA_ARGS__)

◆ vsuxseg2ei16_v_i64m4_m

#define vsuxseg2ei16_v_i64m4_m ( ... ) __riscv_vsuxseg2ei16_v_i64m4_m(__VA_ARGS__)

◆ vsuxseg2ei16_v_i8m1

#define vsuxseg2ei16_v_i8m1 ( ... ) __riscv_vsuxseg2ei16_v_i8m1(__VA_ARGS__)

◆ vsuxseg2ei16_v_i8m1_m

#define vsuxseg2ei16_v_i8m1_m ( ... ) __riscv_vsuxseg2ei16_v_i8m1_m(__VA_ARGS__)

◆ vsuxseg2ei16_v_i8m2

#define vsuxseg2ei16_v_i8m2 ( ... ) __riscv_vsuxseg2ei16_v_i8m2(__VA_ARGS__)

◆ vsuxseg2ei16_v_i8m2_m

#define vsuxseg2ei16_v_i8m2_m ( ... ) __riscv_vsuxseg2ei16_v_i8m2_m(__VA_ARGS__)

◆ vsuxseg2ei16_v_i8m4

#define vsuxseg2ei16_v_i8m4 ( ... ) __riscv_vsuxseg2ei16_v_i8m4(__VA_ARGS__)

◆ vsuxseg2ei16_v_i8m4_m

#define vsuxseg2ei16_v_i8m4_m ( ... ) __riscv_vsuxseg2ei16_v_i8m4_m(__VA_ARGS__)

◆ vsuxseg2ei16_v_i8mf2

#define vsuxseg2ei16_v_i8mf2 ( ... ) __riscv_vsuxseg2ei16_v_i8mf2(__VA_ARGS__)

◆ vsuxseg2ei16_v_i8mf2_m

#define vsuxseg2ei16_v_i8mf2_m ( ... ) __riscv_vsuxseg2ei16_v_i8mf2_m(__VA_ARGS__)

◆ vsuxseg2ei16_v_i8mf4

#define vsuxseg2ei16_v_i8mf4 ( ... ) __riscv_vsuxseg2ei16_v_i8mf4(__VA_ARGS__)

◆ vsuxseg2ei16_v_i8mf4_m

#define vsuxseg2ei16_v_i8mf4_m ( ... ) __riscv_vsuxseg2ei16_v_i8mf4_m(__VA_ARGS__)

◆ vsuxseg2ei16_v_i8mf8

#define vsuxseg2ei16_v_i8mf8 ( ... ) __riscv_vsuxseg2ei16_v_i8mf8(__VA_ARGS__)

◆ vsuxseg2ei16_v_i8mf8_m

#define vsuxseg2ei16_v_i8mf8_m ( ... ) __riscv_vsuxseg2ei16_v_i8mf8_m(__VA_ARGS__)

◆ vsuxseg2ei16_v_u16m1

#define vsuxseg2ei16_v_u16m1 ( ... ) __riscv_vsuxseg2ei16_v_u16m1(__VA_ARGS__)

◆ vsuxseg2ei16_v_u16m1_m

#define vsuxseg2ei16_v_u16m1_m ( ... ) __riscv_vsuxseg2ei16_v_u16m1_m(__VA_ARGS__)

◆ vsuxseg2ei16_v_u16m2

#define vsuxseg2ei16_v_u16m2 ( ... ) __riscv_vsuxseg2ei16_v_u16m2(__VA_ARGS__)

◆ vsuxseg2ei16_v_u16m2_m

#define vsuxseg2ei16_v_u16m2_m ( ... ) __riscv_vsuxseg2ei16_v_u16m2_m(__VA_ARGS__)

◆ vsuxseg2ei16_v_u16m4

#define vsuxseg2ei16_v_u16m4 ( ... ) __riscv_vsuxseg2ei16_v_u16m4(__VA_ARGS__)

◆ vsuxseg2ei16_v_u16m4_m

#define vsuxseg2ei16_v_u16m4_m ( ... ) __riscv_vsuxseg2ei16_v_u16m4_m(__VA_ARGS__)

◆ vsuxseg2ei16_v_u16mf2

#define vsuxseg2ei16_v_u16mf2 ( ... ) __riscv_vsuxseg2ei16_v_u16mf2(__VA_ARGS__)

◆ vsuxseg2ei16_v_u16mf2_m

#define vsuxseg2ei16_v_u16mf2_m ( ... ) __riscv_vsuxseg2ei16_v_u16mf2_m(__VA_ARGS__)

◆ vsuxseg2ei16_v_u16mf4

#define vsuxseg2ei16_v_u16mf4 ( ... ) __riscv_vsuxseg2ei16_v_u16mf4(__VA_ARGS__)

◆ vsuxseg2ei16_v_u16mf4_m

#define vsuxseg2ei16_v_u16mf4_m ( ... ) __riscv_vsuxseg2ei16_v_u16mf4_m(__VA_ARGS__)

◆ vsuxseg2ei16_v_u32m1

#define vsuxseg2ei16_v_u32m1 ( ... ) __riscv_vsuxseg2ei16_v_u32m1(__VA_ARGS__)

◆ vsuxseg2ei16_v_u32m1_m

#define vsuxseg2ei16_v_u32m1_m ( ... ) __riscv_vsuxseg2ei16_v_u32m1_m(__VA_ARGS__)

◆ vsuxseg2ei16_v_u32m2

#define vsuxseg2ei16_v_u32m2 ( ... ) __riscv_vsuxseg2ei16_v_u32m2(__VA_ARGS__)

◆ vsuxseg2ei16_v_u32m2_m

#define vsuxseg2ei16_v_u32m2_m ( ... ) __riscv_vsuxseg2ei16_v_u32m2_m(__VA_ARGS__)

◆ vsuxseg2ei16_v_u32m4

#define vsuxseg2ei16_v_u32m4 ( ... ) __riscv_vsuxseg2ei16_v_u32m4(__VA_ARGS__)

◆ vsuxseg2ei16_v_u32m4_m

#define vsuxseg2ei16_v_u32m4_m ( ... ) __riscv_vsuxseg2ei16_v_u32m4_m(__VA_ARGS__)

◆ vsuxseg2ei16_v_u32mf2

#define vsuxseg2ei16_v_u32mf2 ( ... ) __riscv_vsuxseg2ei16_v_u32mf2(__VA_ARGS__)

◆ vsuxseg2ei16_v_u32mf2_m

#define vsuxseg2ei16_v_u32mf2_m ( ... ) __riscv_vsuxseg2ei16_v_u32mf2_m(__VA_ARGS__)

◆ vsuxseg2ei16_v_u64m1

#define vsuxseg2ei16_v_u64m1 ( ... ) __riscv_vsuxseg2ei16_v_u64m1(__VA_ARGS__)

◆ vsuxseg2ei16_v_u64m1_m

#define vsuxseg2ei16_v_u64m1_m ( ... ) __riscv_vsuxseg2ei16_v_u64m1_m(__VA_ARGS__)

◆ vsuxseg2ei16_v_u64m2

#define vsuxseg2ei16_v_u64m2 ( ... ) __riscv_vsuxseg2ei16_v_u64m2(__VA_ARGS__)

◆ vsuxseg2ei16_v_u64m2_m

#define vsuxseg2ei16_v_u64m2_m ( ... ) __riscv_vsuxseg2ei16_v_u64m2_m(__VA_ARGS__)

◆ vsuxseg2ei16_v_u64m4

#define vsuxseg2ei16_v_u64m4 ( ... ) __riscv_vsuxseg2ei16_v_u64m4(__VA_ARGS__)

◆ vsuxseg2ei16_v_u64m4_m

#define vsuxseg2ei16_v_u64m4_m ( ... ) __riscv_vsuxseg2ei16_v_u64m4_m(__VA_ARGS__)

◆ vsuxseg2ei16_v_u8m1

#define vsuxseg2ei16_v_u8m1 ( ... ) __riscv_vsuxseg2ei16_v_u8m1(__VA_ARGS__)

◆ vsuxseg2ei16_v_u8m1_m

#define vsuxseg2ei16_v_u8m1_m ( ... ) __riscv_vsuxseg2ei16_v_u8m1_m(__VA_ARGS__)

◆ vsuxseg2ei16_v_u8m2

#define vsuxseg2ei16_v_u8m2 ( ... ) __riscv_vsuxseg2ei16_v_u8m2(__VA_ARGS__)

◆ vsuxseg2ei16_v_u8m2_m

#define vsuxseg2ei16_v_u8m2_m ( ... ) __riscv_vsuxseg2ei16_v_u8m2_m(__VA_ARGS__)

◆ vsuxseg2ei16_v_u8m4

#define vsuxseg2ei16_v_u8m4 ( ... ) __riscv_vsuxseg2ei16_v_u8m4(__VA_ARGS__)

◆ vsuxseg2ei16_v_u8m4_m

#define vsuxseg2ei16_v_u8m4_m ( ... ) __riscv_vsuxseg2ei16_v_u8m4_m(__VA_ARGS__)

◆ vsuxseg2ei16_v_u8mf2

#define vsuxseg2ei16_v_u8mf2 ( ... ) __riscv_vsuxseg2ei16_v_u8mf2(__VA_ARGS__)

◆ vsuxseg2ei16_v_u8mf2_m

#define vsuxseg2ei16_v_u8mf2_m ( ... ) __riscv_vsuxseg2ei16_v_u8mf2_m(__VA_ARGS__)

◆ vsuxseg2ei16_v_u8mf4

#define vsuxseg2ei16_v_u8mf4 ( ... ) __riscv_vsuxseg2ei16_v_u8mf4(__VA_ARGS__)

◆ vsuxseg2ei16_v_u8mf4_m

#define vsuxseg2ei16_v_u8mf4_m ( ... ) __riscv_vsuxseg2ei16_v_u8mf4_m(__VA_ARGS__)

◆ vsuxseg2ei16_v_u8mf8

#define vsuxseg2ei16_v_u8mf8 ( ... ) __riscv_vsuxseg2ei16_v_u8mf8(__VA_ARGS__)

◆ vsuxseg2ei16_v_u8mf8_m

#define vsuxseg2ei16_v_u8mf8_m ( ... ) __riscv_vsuxseg2ei16_v_u8mf8_m(__VA_ARGS__)

◆ vsuxseg2ei32_v_f16m1

#define vsuxseg2ei32_v_f16m1 ( ... ) __riscv_vsuxseg2ei32_v_f16m1(__VA_ARGS__)

◆ vsuxseg2ei32_v_f16m1_m

#define vsuxseg2ei32_v_f16m1_m ( ... ) __riscv_vsuxseg2ei32_v_f16m1_m(__VA_ARGS__)

◆ vsuxseg2ei32_v_f16m2

#define vsuxseg2ei32_v_f16m2 ( ... ) __riscv_vsuxseg2ei32_v_f16m2(__VA_ARGS__)

◆ vsuxseg2ei32_v_f16m2_m

#define vsuxseg2ei32_v_f16m2_m ( ... ) __riscv_vsuxseg2ei32_v_f16m2_m(__VA_ARGS__)

◆ vsuxseg2ei32_v_f16m4

#define vsuxseg2ei32_v_f16m4 ( ... ) __riscv_vsuxseg2ei32_v_f16m4(__VA_ARGS__)

◆ vsuxseg2ei32_v_f16m4_m

#define vsuxseg2ei32_v_f16m4_m ( ... ) __riscv_vsuxseg2ei32_v_f16m4_m(__VA_ARGS__)

◆ vsuxseg2ei32_v_f16mf2

#define vsuxseg2ei32_v_f16mf2 ( ... ) __riscv_vsuxseg2ei32_v_f16mf2(__VA_ARGS__)

◆ vsuxseg2ei32_v_f16mf2_m

#define vsuxseg2ei32_v_f16mf2_m ( ... ) __riscv_vsuxseg2ei32_v_f16mf2_m(__VA_ARGS__)

◆ vsuxseg2ei32_v_f16mf4

#define vsuxseg2ei32_v_f16mf4 ( ... ) __riscv_vsuxseg2ei32_v_f16mf4(__VA_ARGS__)

◆ vsuxseg2ei32_v_f16mf4_m

#define vsuxseg2ei32_v_f16mf4_m ( ... ) __riscv_vsuxseg2ei32_v_f16mf4_m(__VA_ARGS__)

◆ vsuxseg2ei32_v_f32m1

#define vsuxseg2ei32_v_f32m1 ( ... ) __riscv_vsuxseg2ei32_v_f32m1(__VA_ARGS__)

◆ vsuxseg2ei32_v_f32m1_m

#define vsuxseg2ei32_v_f32m1_m ( ... ) __riscv_vsuxseg2ei32_v_f32m1_m(__VA_ARGS__)

◆ vsuxseg2ei32_v_f32m2

#define vsuxseg2ei32_v_f32m2 ( ... ) __riscv_vsuxseg2ei32_v_f32m2(__VA_ARGS__)

◆ vsuxseg2ei32_v_f32m2_m

#define vsuxseg2ei32_v_f32m2_m ( ... ) __riscv_vsuxseg2ei32_v_f32m2_m(__VA_ARGS__)

◆ vsuxseg2ei32_v_f32m4

#define vsuxseg2ei32_v_f32m4 ( ... ) __riscv_vsuxseg2ei32_v_f32m4(__VA_ARGS__)

◆ vsuxseg2ei32_v_f32m4_m

#define vsuxseg2ei32_v_f32m4_m ( ... ) __riscv_vsuxseg2ei32_v_f32m4_m(__VA_ARGS__)

◆ vsuxseg2ei32_v_f32mf2

#define vsuxseg2ei32_v_f32mf2 ( ... ) __riscv_vsuxseg2ei32_v_f32mf2(__VA_ARGS__)

◆ vsuxseg2ei32_v_f32mf2_m

#define vsuxseg2ei32_v_f32mf2_m ( ... ) __riscv_vsuxseg2ei32_v_f32mf2_m(__VA_ARGS__)

◆ vsuxseg2ei32_v_f64m1

#define vsuxseg2ei32_v_f64m1 ( ... ) __riscv_vsuxseg2ei32_v_f64m1(__VA_ARGS__)

◆ vsuxseg2ei32_v_f64m1_m

#define vsuxseg2ei32_v_f64m1_m ( ... ) __riscv_vsuxseg2ei32_v_f64m1_m(__VA_ARGS__)

◆ vsuxseg2ei32_v_f64m2

#define vsuxseg2ei32_v_f64m2 ( ... ) __riscv_vsuxseg2ei32_v_f64m2(__VA_ARGS__)

◆ vsuxseg2ei32_v_f64m2_m

#define vsuxseg2ei32_v_f64m2_m ( ... ) __riscv_vsuxseg2ei32_v_f64m2_m(__VA_ARGS__)

◆ vsuxseg2ei32_v_f64m4

#define vsuxseg2ei32_v_f64m4 ( ... ) __riscv_vsuxseg2ei32_v_f64m4(__VA_ARGS__)

◆ vsuxseg2ei32_v_f64m4_m

#define vsuxseg2ei32_v_f64m4_m ( ... ) __riscv_vsuxseg2ei32_v_f64m4_m(__VA_ARGS__)

◆ vsuxseg2ei32_v_i16m1

#define vsuxseg2ei32_v_i16m1 ( ... ) __riscv_vsuxseg2ei32_v_i16m1(__VA_ARGS__)

◆ vsuxseg2ei32_v_i16m1_m

#define vsuxseg2ei32_v_i16m1_m ( ... ) __riscv_vsuxseg2ei32_v_i16m1_m(__VA_ARGS__)

◆ vsuxseg2ei32_v_i16m2

#define vsuxseg2ei32_v_i16m2 ( ... ) __riscv_vsuxseg2ei32_v_i16m2(__VA_ARGS__)

◆ vsuxseg2ei32_v_i16m2_m

#define vsuxseg2ei32_v_i16m2_m ( ... ) __riscv_vsuxseg2ei32_v_i16m2_m(__VA_ARGS__)

◆ vsuxseg2ei32_v_i16m4

#define vsuxseg2ei32_v_i16m4 ( ... ) __riscv_vsuxseg2ei32_v_i16m4(__VA_ARGS__)

◆ vsuxseg2ei32_v_i16m4_m

#define vsuxseg2ei32_v_i16m4_m ( ... ) __riscv_vsuxseg2ei32_v_i16m4_m(__VA_ARGS__)

◆ vsuxseg2ei32_v_i16mf2

#define vsuxseg2ei32_v_i16mf2 ( ... ) __riscv_vsuxseg2ei32_v_i16mf2(__VA_ARGS__)

◆ vsuxseg2ei32_v_i16mf2_m

#define vsuxseg2ei32_v_i16mf2_m ( ... ) __riscv_vsuxseg2ei32_v_i16mf2_m(__VA_ARGS__)

◆ vsuxseg2ei32_v_i16mf4

#define vsuxseg2ei32_v_i16mf4 ( ... ) __riscv_vsuxseg2ei32_v_i16mf4(__VA_ARGS__)

◆ vsuxseg2ei32_v_i16mf4_m

#define vsuxseg2ei32_v_i16mf4_m ( ... ) __riscv_vsuxseg2ei32_v_i16mf4_m(__VA_ARGS__)

◆ vsuxseg2ei32_v_i32m1

#define vsuxseg2ei32_v_i32m1 ( ... ) __riscv_vsuxseg2ei32_v_i32m1(__VA_ARGS__)

◆ vsuxseg2ei32_v_i32m1_m

#define vsuxseg2ei32_v_i32m1_m ( ... ) __riscv_vsuxseg2ei32_v_i32m1_m(__VA_ARGS__)

◆ vsuxseg2ei32_v_i32m2

#define vsuxseg2ei32_v_i32m2 ( ... ) __riscv_vsuxseg2ei32_v_i32m2(__VA_ARGS__)

◆ vsuxseg2ei32_v_i32m2_m

#define vsuxseg2ei32_v_i32m2_m ( ... ) __riscv_vsuxseg2ei32_v_i32m2_m(__VA_ARGS__)

◆ vsuxseg2ei32_v_i32m4

#define vsuxseg2ei32_v_i32m4 ( ... ) __riscv_vsuxseg2ei32_v_i32m4(__VA_ARGS__)

◆ vsuxseg2ei32_v_i32m4_m

#define vsuxseg2ei32_v_i32m4_m ( ... ) __riscv_vsuxseg2ei32_v_i32m4_m(__VA_ARGS__)

◆ vsuxseg2ei32_v_i32mf2

#define vsuxseg2ei32_v_i32mf2 ( ... ) __riscv_vsuxseg2ei32_v_i32mf2(__VA_ARGS__)

◆ vsuxseg2ei32_v_i32mf2_m

#define vsuxseg2ei32_v_i32mf2_m ( ... ) __riscv_vsuxseg2ei32_v_i32mf2_m(__VA_ARGS__)

◆ vsuxseg2ei32_v_i64m1

#define vsuxseg2ei32_v_i64m1 ( ... ) __riscv_vsuxseg2ei32_v_i64m1(__VA_ARGS__)

◆ vsuxseg2ei32_v_i64m1_m

#define vsuxseg2ei32_v_i64m1_m ( ... ) __riscv_vsuxseg2ei32_v_i64m1_m(__VA_ARGS__)

◆ vsuxseg2ei32_v_i64m2

#define vsuxseg2ei32_v_i64m2 ( ... ) __riscv_vsuxseg2ei32_v_i64m2(__VA_ARGS__)

◆ vsuxseg2ei32_v_i64m2_m

#define vsuxseg2ei32_v_i64m2_m ( ... ) __riscv_vsuxseg2ei32_v_i64m2_m(__VA_ARGS__)

◆ vsuxseg2ei32_v_i64m4

#define vsuxseg2ei32_v_i64m4 ( ... ) __riscv_vsuxseg2ei32_v_i64m4(__VA_ARGS__)

◆ vsuxseg2ei32_v_i64m4_m

#define vsuxseg2ei32_v_i64m4_m ( ... ) __riscv_vsuxseg2ei32_v_i64m4_m(__VA_ARGS__)

◆ vsuxseg2ei32_v_i8m1

#define vsuxseg2ei32_v_i8m1 ( ... ) __riscv_vsuxseg2ei32_v_i8m1(__VA_ARGS__)

◆ vsuxseg2ei32_v_i8m1_m

#define vsuxseg2ei32_v_i8m1_m ( ... ) __riscv_vsuxseg2ei32_v_i8m1_m(__VA_ARGS__)

◆ vsuxseg2ei32_v_i8m2

#define vsuxseg2ei32_v_i8m2 ( ... ) __riscv_vsuxseg2ei32_v_i8m2(__VA_ARGS__)

◆ vsuxseg2ei32_v_i8m2_m

#define vsuxseg2ei32_v_i8m2_m ( ... ) __riscv_vsuxseg2ei32_v_i8m2_m(__VA_ARGS__)

◆ vsuxseg2ei32_v_i8mf2

#define vsuxseg2ei32_v_i8mf2 ( ... ) __riscv_vsuxseg2ei32_v_i8mf2(__VA_ARGS__)

◆ vsuxseg2ei32_v_i8mf2_m

#define vsuxseg2ei32_v_i8mf2_m ( ... ) __riscv_vsuxseg2ei32_v_i8mf2_m(__VA_ARGS__)

◆ vsuxseg2ei32_v_i8mf4

#define vsuxseg2ei32_v_i8mf4 ( ... ) __riscv_vsuxseg2ei32_v_i8mf4(__VA_ARGS__)

◆ vsuxseg2ei32_v_i8mf4_m

#define vsuxseg2ei32_v_i8mf4_m ( ... ) __riscv_vsuxseg2ei32_v_i8mf4_m(__VA_ARGS__)

◆ vsuxseg2ei32_v_i8mf8

#define vsuxseg2ei32_v_i8mf8 ( ... ) __riscv_vsuxseg2ei32_v_i8mf8(__VA_ARGS__)

◆ vsuxseg2ei32_v_i8mf8_m

#define vsuxseg2ei32_v_i8mf8_m ( ... ) __riscv_vsuxseg2ei32_v_i8mf8_m(__VA_ARGS__)

◆ vsuxseg2ei32_v_u16m1

#define vsuxseg2ei32_v_u16m1 ( ... ) __riscv_vsuxseg2ei32_v_u16m1(__VA_ARGS__)

◆ vsuxseg2ei32_v_u16m1_m

#define vsuxseg2ei32_v_u16m1_m ( ... ) __riscv_vsuxseg2ei32_v_u16m1_m(__VA_ARGS__)

◆ vsuxseg2ei32_v_u16m2

#define vsuxseg2ei32_v_u16m2 ( ... ) __riscv_vsuxseg2ei32_v_u16m2(__VA_ARGS__)

◆ vsuxseg2ei32_v_u16m2_m

#define vsuxseg2ei32_v_u16m2_m ( ... ) __riscv_vsuxseg2ei32_v_u16m2_m(__VA_ARGS__)

◆ vsuxseg2ei32_v_u16m4

#define vsuxseg2ei32_v_u16m4 ( ... ) __riscv_vsuxseg2ei32_v_u16m4(__VA_ARGS__)

◆ vsuxseg2ei32_v_u16m4_m

#define vsuxseg2ei32_v_u16m4_m ( ... ) __riscv_vsuxseg2ei32_v_u16m4_m(__VA_ARGS__)

◆ vsuxseg2ei32_v_u16mf2

#define vsuxseg2ei32_v_u16mf2 ( ... ) __riscv_vsuxseg2ei32_v_u16mf2(__VA_ARGS__)

◆ vsuxseg2ei32_v_u16mf2_m

#define vsuxseg2ei32_v_u16mf2_m ( ... ) __riscv_vsuxseg2ei32_v_u16mf2_m(__VA_ARGS__)

◆ vsuxseg2ei32_v_u16mf4

#define vsuxseg2ei32_v_u16mf4 ( ... ) __riscv_vsuxseg2ei32_v_u16mf4(__VA_ARGS__)

◆ vsuxseg2ei32_v_u16mf4_m

#define vsuxseg2ei32_v_u16mf4_m ( ... ) __riscv_vsuxseg2ei32_v_u16mf4_m(__VA_ARGS__)

◆ vsuxseg2ei32_v_u32m1

#define vsuxseg2ei32_v_u32m1 ( ... ) __riscv_vsuxseg2ei32_v_u32m1(__VA_ARGS__)

◆ vsuxseg2ei32_v_u32m1_m

#define vsuxseg2ei32_v_u32m1_m ( ... ) __riscv_vsuxseg2ei32_v_u32m1_m(__VA_ARGS__)

◆ vsuxseg2ei32_v_u32m2

#define vsuxseg2ei32_v_u32m2 ( ... ) __riscv_vsuxseg2ei32_v_u32m2(__VA_ARGS__)

◆ vsuxseg2ei32_v_u32m2_m

#define vsuxseg2ei32_v_u32m2_m ( ... ) __riscv_vsuxseg2ei32_v_u32m2_m(__VA_ARGS__)

◆ vsuxseg2ei32_v_u32m4

#define vsuxseg2ei32_v_u32m4 ( ... ) __riscv_vsuxseg2ei32_v_u32m4(__VA_ARGS__)

◆ vsuxseg2ei32_v_u32m4_m

#define vsuxseg2ei32_v_u32m4_m ( ... ) __riscv_vsuxseg2ei32_v_u32m4_m(__VA_ARGS__)

◆ vsuxseg2ei32_v_u32mf2

#define vsuxseg2ei32_v_u32mf2 ( ... ) __riscv_vsuxseg2ei32_v_u32mf2(__VA_ARGS__)

◆ vsuxseg2ei32_v_u32mf2_m

#define vsuxseg2ei32_v_u32mf2_m ( ... ) __riscv_vsuxseg2ei32_v_u32mf2_m(__VA_ARGS__)

◆ vsuxseg2ei32_v_u64m1

#define vsuxseg2ei32_v_u64m1 ( ... ) __riscv_vsuxseg2ei32_v_u64m1(__VA_ARGS__)

◆ vsuxseg2ei32_v_u64m1_m

#define vsuxseg2ei32_v_u64m1_m ( ... ) __riscv_vsuxseg2ei32_v_u64m1_m(__VA_ARGS__)

◆ vsuxseg2ei32_v_u64m2

#define vsuxseg2ei32_v_u64m2 ( ... ) __riscv_vsuxseg2ei32_v_u64m2(__VA_ARGS__)

◆ vsuxseg2ei32_v_u64m2_m

#define vsuxseg2ei32_v_u64m2_m ( ... ) __riscv_vsuxseg2ei32_v_u64m2_m(__VA_ARGS__)

◆ vsuxseg2ei32_v_u64m4

#define vsuxseg2ei32_v_u64m4 ( ... ) __riscv_vsuxseg2ei32_v_u64m4(__VA_ARGS__)

◆ vsuxseg2ei32_v_u64m4_m

#define vsuxseg2ei32_v_u64m4_m ( ... ) __riscv_vsuxseg2ei32_v_u64m4_m(__VA_ARGS__)

◆ vsuxseg2ei32_v_u8m1

#define vsuxseg2ei32_v_u8m1 ( ... ) __riscv_vsuxseg2ei32_v_u8m1(__VA_ARGS__)

◆ vsuxseg2ei32_v_u8m1_m

#define vsuxseg2ei32_v_u8m1_m ( ... ) __riscv_vsuxseg2ei32_v_u8m1_m(__VA_ARGS__)

◆ vsuxseg2ei32_v_u8m2

#define vsuxseg2ei32_v_u8m2 ( ... ) __riscv_vsuxseg2ei32_v_u8m2(__VA_ARGS__)

◆ vsuxseg2ei32_v_u8m2_m

#define vsuxseg2ei32_v_u8m2_m ( ... ) __riscv_vsuxseg2ei32_v_u8m2_m(__VA_ARGS__)

◆ vsuxseg2ei32_v_u8mf2

#define vsuxseg2ei32_v_u8mf2 ( ... ) __riscv_vsuxseg2ei32_v_u8mf2(__VA_ARGS__)

◆ vsuxseg2ei32_v_u8mf2_m

#define vsuxseg2ei32_v_u8mf2_m ( ... ) __riscv_vsuxseg2ei32_v_u8mf2_m(__VA_ARGS__)

◆ vsuxseg2ei32_v_u8mf4

#define vsuxseg2ei32_v_u8mf4 ( ... ) __riscv_vsuxseg2ei32_v_u8mf4(__VA_ARGS__)

◆ vsuxseg2ei32_v_u8mf4_m

#define vsuxseg2ei32_v_u8mf4_m ( ... ) __riscv_vsuxseg2ei32_v_u8mf4_m(__VA_ARGS__)

◆ vsuxseg2ei32_v_u8mf8

#define vsuxseg2ei32_v_u8mf8 ( ... ) __riscv_vsuxseg2ei32_v_u8mf8(__VA_ARGS__)

◆ vsuxseg2ei32_v_u8mf8_m

#define vsuxseg2ei32_v_u8mf8_m ( ... ) __riscv_vsuxseg2ei32_v_u8mf8_m(__VA_ARGS__)

◆ vsuxseg2ei64_v_f16m1

#define vsuxseg2ei64_v_f16m1 ( ... ) __riscv_vsuxseg2ei64_v_f16m1(__VA_ARGS__)

◆ vsuxseg2ei64_v_f16m1_m

#define vsuxseg2ei64_v_f16m1_m ( ... ) __riscv_vsuxseg2ei64_v_f16m1_m(__VA_ARGS__)

◆ vsuxseg2ei64_v_f16m2

#define vsuxseg2ei64_v_f16m2 ( ... ) __riscv_vsuxseg2ei64_v_f16m2(__VA_ARGS__)

◆ vsuxseg2ei64_v_f16m2_m

#define vsuxseg2ei64_v_f16m2_m ( ... ) __riscv_vsuxseg2ei64_v_f16m2_m(__VA_ARGS__)

◆ vsuxseg2ei64_v_f16mf2

#define vsuxseg2ei64_v_f16mf2 ( ... ) __riscv_vsuxseg2ei64_v_f16mf2(__VA_ARGS__)

◆ vsuxseg2ei64_v_f16mf2_m

#define vsuxseg2ei64_v_f16mf2_m ( ... ) __riscv_vsuxseg2ei64_v_f16mf2_m(__VA_ARGS__)

◆ vsuxseg2ei64_v_f16mf4

#define vsuxseg2ei64_v_f16mf4 ( ... ) __riscv_vsuxseg2ei64_v_f16mf4(__VA_ARGS__)

◆ vsuxseg2ei64_v_f16mf4_m

#define vsuxseg2ei64_v_f16mf4_m ( ... ) __riscv_vsuxseg2ei64_v_f16mf4_m(__VA_ARGS__)

◆ vsuxseg2ei64_v_f32m1

#define vsuxseg2ei64_v_f32m1 ( ... ) __riscv_vsuxseg2ei64_v_f32m1(__VA_ARGS__)

◆ vsuxseg2ei64_v_f32m1_m

#define vsuxseg2ei64_v_f32m1_m ( ... ) __riscv_vsuxseg2ei64_v_f32m1_m(__VA_ARGS__)

◆ vsuxseg2ei64_v_f32m2

#define vsuxseg2ei64_v_f32m2 ( ... ) __riscv_vsuxseg2ei64_v_f32m2(__VA_ARGS__)

◆ vsuxseg2ei64_v_f32m2_m

#define vsuxseg2ei64_v_f32m2_m ( ... ) __riscv_vsuxseg2ei64_v_f32m2_m(__VA_ARGS__)

◆ vsuxseg2ei64_v_f32m4

#define vsuxseg2ei64_v_f32m4 ( ... ) __riscv_vsuxseg2ei64_v_f32m4(__VA_ARGS__)

◆ vsuxseg2ei64_v_f32m4_m

#define vsuxseg2ei64_v_f32m4_m ( ... ) __riscv_vsuxseg2ei64_v_f32m4_m(__VA_ARGS__)

◆ vsuxseg2ei64_v_f32mf2

#define vsuxseg2ei64_v_f32mf2 ( ... ) __riscv_vsuxseg2ei64_v_f32mf2(__VA_ARGS__)

◆ vsuxseg2ei64_v_f32mf2_m

#define vsuxseg2ei64_v_f32mf2_m ( ... ) __riscv_vsuxseg2ei64_v_f32mf2_m(__VA_ARGS__)

◆ vsuxseg2ei64_v_f64m1

#define vsuxseg2ei64_v_f64m1 ( ... ) __riscv_vsuxseg2ei64_v_f64m1(__VA_ARGS__)

◆ vsuxseg2ei64_v_f64m1_m

#define vsuxseg2ei64_v_f64m1_m ( ... ) __riscv_vsuxseg2ei64_v_f64m1_m(__VA_ARGS__)

◆ vsuxseg2ei64_v_f64m2

#define vsuxseg2ei64_v_f64m2 ( ... ) __riscv_vsuxseg2ei64_v_f64m2(__VA_ARGS__)

◆ vsuxseg2ei64_v_f64m2_m

#define vsuxseg2ei64_v_f64m2_m ( ... ) __riscv_vsuxseg2ei64_v_f64m2_m(__VA_ARGS__)

◆ vsuxseg2ei64_v_f64m4

#define vsuxseg2ei64_v_f64m4 ( ... ) __riscv_vsuxseg2ei64_v_f64m4(__VA_ARGS__)

◆ vsuxseg2ei64_v_f64m4_m

#define vsuxseg2ei64_v_f64m4_m ( ... ) __riscv_vsuxseg2ei64_v_f64m4_m(__VA_ARGS__)

◆ vsuxseg2ei64_v_i16m1

#define vsuxseg2ei64_v_i16m1 ( ... ) __riscv_vsuxseg2ei64_v_i16m1(__VA_ARGS__)

◆ vsuxseg2ei64_v_i16m1_m

#define vsuxseg2ei64_v_i16m1_m ( ... ) __riscv_vsuxseg2ei64_v_i16m1_m(__VA_ARGS__)

◆ vsuxseg2ei64_v_i16m2

#define vsuxseg2ei64_v_i16m2 ( ... ) __riscv_vsuxseg2ei64_v_i16m2(__VA_ARGS__)

◆ vsuxseg2ei64_v_i16m2_m

#define vsuxseg2ei64_v_i16m2_m ( ... ) __riscv_vsuxseg2ei64_v_i16m2_m(__VA_ARGS__)

◆ vsuxseg2ei64_v_i16mf2

#define vsuxseg2ei64_v_i16mf2 ( ... ) __riscv_vsuxseg2ei64_v_i16mf2(__VA_ARGS__)

◆ vsuxseg2ei64_v_i16mf2_m

#define vsuxseg2ei64_v_i16mf2_m ( ... ) __riscv_vsuxseg2ei64_v_i16mf2_m(__VA_ARGS__)

◆ vsuxseg2ei64_v_i16mf4

#define vsuxseg2ei64_v_i16mf4 ( ... ) __riscv_vsuxseg2ei64_v_i16mf4(__VA_ARGS__)

◆ vsuxseg2ei64_v_i16mf4_m

#define vsuxseg2ei64_v_i16mf4_m ( ... ) __riscv_vsuxseg2ei64_v_i16mf4_m(__VA_ARGS__)

◆ vsuxseg2ei64_v_i32m1

#define vsuxseg2ei64_v_i32m1 ( ... ) __riscv_vsuxseg2ei64_v_i32m1(__VA_ARGS__)

◆ vsuxseg2ei64_v_i32m1_m

#define vsuxseg2ei64_v_i32m1_m ( ... ) __riscv_vsuxseg2ei64_v_i32m1_m(__VA_ARGS__)

◆ vsuxseg2ei64_v_i32m2

#define vsuxseg2ei64_v_i32m2 ( ... ) __riscv_vsuxseg2ei64_v_i32m2(__VA_ARGS__)

◆ vsuxseg2ei64_v_i32m2_m

#define vsuxseg2ei64_v_i32m2_m ( ... ) __riscv_vsuxseg2ei64_v_i32m2_m(__VA_ARGS__)

◆ vsuxseg2ei64_v_i32m4

#define vsuxseg2ei64_v_i32m4 ( ... ) __riscv_vsuxseg2ei64_v_i32m4(__VA_ARGS__)

◆ vsuxseg2ei64_v_i32m4_m

#define vsuxseg2ei64_v_i32m4_m ( ... ) __riscv_vsuxseg2ei64_v_i32m4_m(__VA_ARGS__)

◆ vsuxseg2ei64_v_i32mf2

#define vsuxseg2ei64_v_i32mf2 ( ... ) __riscv_vsuxseg2ei64_v_i32mf2(__VA_ARGS__)

◆ vsuxseg2ei64_v_i32mf2_m

#define vsuxseg2ei64_v_i32mf2_m ( ... ) __riscv_vsuxseg2ei64_v_i32mf2_m(__VA_ARGS__)

◆ vsuxseg2ei64_v_i64m1

#define vsuxseg2ei64_v_i64m1 ( ... ) __riscv_vsuxseg2ei64_v_i64m1(__VA_ARGS__)

◆ vsuxseg2ei64_v_i64m1_m

#define vsuxseg2ei64_v_i64m1_m ( ... ) __riscv_vsuxseg2ei64_v_i64m1_m(__VA_ARGS__)

◆ vsuxseg2ei64_v_i64m2

#define vsuxseg2ei64_v_i64m2 ( ... ) __riscv_vsuxseg2ei64_v_i64m2(__VA_ARGS__)

◆ vsuxseg2ei64_v_i64m2_m

#define vsuxseg2ei64_v_i64m2_m ( ... ) __riscv_vsuxseg2ei64_v_i64m2_m(__VA_ARGS__)

◆ vsuxseg2ei64_v_i64m4

#define vsuxseg2ei64_v_i64m4 ( ... ) __riscv_vsuxseg2ei64_v_i64m4(__VA_ARGS__)

◆ vsuxseg2ei64_v_i64m4_m

#define vsuxseg2ei64_v_i64m4_m ( ... ) __riscv_vsuxseg2ei64_v_i64m4_m(__VA_ARGS__)

◆ vsuxseg2ei64_v_i8m1

#define vsuxseg2ei64_v_i8m1 ( ... ) __riscv_vsuxseg2ei64_v_i8m1(__VA_ARGS__)

◆ vsuxseg2ei64_v_i8m1_m

#define vsuxseg2ei64_v_i8m1_m ( ... ) __riscv_vsuxseg2ei64_v_i8m1_m(__VA_ARGS__)

◆ vsuxseg2ei64_v_i8mf2

#define vsuxseg2ei64_v_i8mf2 ( ... ) __riscv_vsuxseg2ei64_v_i8mf2(__VA_ARGS__)

◆ vsuxseg2ei64_v_i8mf2_m

#define vsuxseg2ei64_v_i8mf2_m ( ... ) __riscv_vsuxseg2ei64_v_i8mf2_m(__VA_ARGS__)

◆ vsuxseg2ei64_v_i8mf4

#define vsuxseg2ei64_v_i8mf4 ( ... ) __riscv_vsuxseg2ei64_v_i8mf4(__VA_ARGS__)

◆ vsuxseg2ei64_v_i8mf4_m

#define vsuxseg2ei64_v_i8mf4_m ( ... ) __riscv_vsuxseg2ei64_v_i8mf4_m(__VA_ARGS__)

◆ vsuxseg2ei64_v_i8mf8

#define vsuxseg2ei64_v_i8mf8 ( ... ) __riscv_vsuxseg2ei64_v_i8mf8(__VA_ARGS__)

◆ vsuxseg2ei64_v_i8mf8_m

#define vsuxseg2ei64_v_i8mf8_m ( ... ) __riscv_vsuxseg2ei64_v_i8mf8_m(__VA_ARGS__)

◆ vsuxseg2ei64_v_u16m1

#define vsuxseg2ei64_v_u16m1 ( ... ) __riscv_vsuxseg2ei64_v_u16m1(__VA_ARGS__)

◆ vsuxseg2ei64_v_u16m1_m

#define vsuxseg2ei64_v_u16m1_m ( ... ) __riscv_vsuxseg2ei64_v_u16m1_m(__VA_ARGS__)

◆ vsuxseg2ei64_v_u16m2

#define vsuxseg2ei64_v_u16m2 ( ... ) __riscv_vsuxseg2ei64_v_u16m2(__VA_ARGS__)

◆ vsuxseg2ei64_v_u16m2_m

#define vsuxseg2ei64_v_u16m2_m ( ... ) __riscv_vsuxseg2ei64_v_u16m2_m(__VA_ARGS__)

◆ vsuxseg2ei64_v_u16mf2

#define vsuxseg2ei64_v_u16mf2 ( ... ) __riscv_vsuxseg2ei64_v_u16mf2(__VA_ARGS__)

◆ vsuxseg2ei64_v_u16mf2_m

#define vsuxseg2ei64_v_u16mf2_m ( ... ) __riscv_vsuxseg2ei64_v_u16mf2_m(__VA_ARGS__)

◆ vsuxseg2ei64_v_u16mf4

#define vsuxseg2ei64_v_u16mf4 ( ... ) __riscv_vsuxseg2ei64_v_u16mf4(__VA_ARGS__)

◆ vsuxseg2ei64_v_u16mf4_m

#define vsuxseg2ei64_v_u16mf4_m ( ... ) __riscv_vsuxseg2ei64_v_u16mf4_m(__VA_ARGS__)

◆ vsuxseg2ei64_v_u32m1

#define vsuxseg2ei64_v_u32m1 ( ... ) __riscv_vsuxseg2ei64_v_u32m1(__VA_ARGS__)

◆ vsuxseg2ei64_v_u32m1_m

#define vsuxseg2ei64_v_u32m1_m ( ... ) __riscv_vsuxseg2ei64_v_u32m1_m(__VA_ARGS__)

◆ vsuxseg2ei64_v_u32m2

#define vsuxseg2ei64_v_u32m2 ( ... ) __riscv_vsuxseg2ei64_v_u32m2(__VA_ARGS__)

◆ vsuxseg2ei64_v_u32m2_m

#define vsuxseg2ei64_v_u32m2_m ( ... ) __riscv_vsuxseg2ei64_v_u32m2_m(__VA_ARGS__)

◆ vsuxseg2ei64_v_u32m4

#define vsuxseg2ei64_v_u32m4 ( ... ) __riscv_vsuxseg2ei64_v_u32m4(__VA_ARGS__)

◆ vsuxseg2ei64_v_u32m4_m

#define vsuxseg2ei64_v_u32m4_m ( ... ) __riscv_vsuxseg2ei64_v_u32m4_m(__VA_ARGS__)

◆ vsuxseg2ei64_v_u32mf2

#define vsuxseg2ei64_v_u32mf2 ( ... ) __riscv_vsuxseg2ei64_v_u32mf2(__VA_ARGS__)

◆ vsuxseg2ei64_v_u32mf2_m

#define vsuxseg2ei64_v_u32mf2_m ( ... ) __riscv_vsuxseg2ei64_v_u32mf2_m(__VA_ARGS__)

◆ vsuxseg2ei64_v_u64m1

#define vsuxseg2ei64_v_u64m1 ( ... ) __riscv_vsuxseg2ei64_v_u64m1(__VA_ARGS__)

◆ vsuxseg2ei64_v_u64m1_m

#define vsuxseg2ei64_v_u64m1_m ( ... ) __riscv_vsuxseg2ei64_v_u64m1_m(__VA_ARGS__)

◆ vsuxseg2ei64_v_u64m2

#define vsuxseg2ei64_v_u64m2 ( ... ) __riscv_vsuxseg2ei64_v_u64m2(__VA_ARGS__)

◆ vsuxseg2ei64_v_u64m2_m

#define vsuxseg2ei64_v_u64m2_m ( ... ) __riscv_vsuxseg2ei64_v_u64m2_m(__VA_ARGS__)

◆ vsuxseg2ei64_v_u64m4

#define vsuxseg2ei64_v_u64m4 ( ... ) __riscv_vsuxseg2ei64_v_u64m4(__VA_ARGS__)

◆ vsuxseg2ei64_v_u64m4_m

#define vsuxseg2ei64_v_u64m4_m ( ... ) __riscv_vsuxseg2ei64_v_u64m4_m(__VA_ARGS__)

◆ vsuxseg2ei64_v_u8m1

#define vsuxseg2ei64_v_u8m1 ( ... ) __riscv_vsuxseg2ei64_v_u8m1(__VA_ARGS__)

◆ vsuxseg2ei64_v_u8m1_m

#define vsuxseg2ei64_v_u8m1_m ( ... ) __riscv_vsuxseg2ei64_v_u8m1_m(__VA_ARGS__)

◆ vsuxseg2ei64_v_u8mf2

#define vsuxseg2ei64_v_u8mf2 ( ... ) __riscv_vsuxseg2ei64_v_u8mf2(__VA_ARGS__)

◆ vsuxseg2ei64_v_u8mf2_m

#define vsuxseg2ei64_v_u8mf2_m ( ... ) __riscv_vsuxseg2ei64_v_u8mf2_m(__VA_ARGS__)

◆ vsuxseg2ei64_v_u8mf4

#define vsuxseg2ei64_v_u8mf4 ( ... ) __riscv_vsuxseg2ei64_v_u8mf4(__VA_ARGS__)

◆ vsuxseg2ei64_v_u8mf4_m

#define vsuxseg2ei64_v_u8mf4_m ( ... ) __riscv_vsuxseg2ei64_v_u8mf4_m(__VA_ARGS__)

◆ vsuxseg2ei64_v_u8mf8

#define vsuxseg2ei64_v_u8mf8 ( ... ) __riscv_vsuxseg2ei64_v_u8mf8(__VA_ARGS__)

◆ vsuxseg2ei64_v_u8mf8_m

#define vsuxseg2ei64_v_u8mf8_m ( ... ) __riscv_vsuxseg2ei64_v_u8mf8_m(__VA_ARGS__)

◆ vsuxseg2ei8_v_f16m1

#define vsuxseg2ei8_v_f16m1 ( ... ) __riscv_vsuxseg2ei8_v_f16m1(__VA_ARGS__)

◆ vsuxseg2ei8_v_f16m1_m

#define vsuxseg2ei8_v_f16m1_m ( ... ) __riscv_vsuxseg2ei8_v_f16m1_m(__VA_ARGS__)

◆ vsuxseg2ei8_v_f16m2

#define vsuxseg2ei8_v_f16m2 ( ... ) __riscv_vsuxseg2ei8_v_f16m2(__VA_ARGS__)

◆ vsuxseg2ei8_v_f16m2_m

#define vsuxseg2ei8_v_f16m2_m ( ... ) __riscv_vsuxseg2ei8_v_f16m2_m(__VA_ARGS__)

◆ vsuxseg2ei8_v_f16m4

#define vsuxseg2ei8_v_f16m4 ( ... ) __riscv_vsuxseg2ei8_v_f16m4(__VA_ARGS__)

◆ vsuxseg2ei8_v_f16m4_m

#define vsuxseg2ei8_v_f16m4_m ( ... ) __riscv_vsuxseg2ei8_v_f16m4_m(__VA_ARGS__)

◆ vsuxseg2ei8_v_f16mf2

#define vsuxseg2ei8_v_f16mf2 ( ... ) __riscv_vsuxseg2ei8_v_f16mf2(__VA_ARGS__)

◆ vsuxseg2ei8_v_f16mf2_m

#define vsuxseg2ei8_v_f16mf2_m ( ... ) __riscv_vsuxseg2ei8_v_f16mf2_m(__VA_ARGS__)

◆ vsuxseg2ei8_v_f16mf4

#define vsuxseg2ei8_v_f16mf4 ( ... ) __riscv_vsuxseg2ei8_v_f16mf4(__VA_ARGS__)

◆ vsuxseg2ei8_v_f16mf4_m

#define vsuxseg2ei8_v_f16mf4_m ( ... ) __riscv_vsuxseg2ei8_v_f16mf4_m(__VA_ARGS__)

◆ vsuxseg2ei8_v_f32m1

#define vsuxseg2ei8_v_f32m1 ( ... ) __riscv_vsuxseg2ei8_v_f32m1(__VA_ARGS__)

◆ vsuxseg2ei8_v_f32m1_m

#define vsuxseg2ei8_v_f32m1_m ( ... ) __riscv_vsuxseg2ei8_v_f32m1_m(__VA_ARGS__)

◆ vsuxseg2ei8_v_f32m2

#define vsuxseg2ei8_v_f32m2 ( ... ) __riscv_vsuxseg2ei8_v_f32m2(__VA_ARGS__)

◆ vsuxseg2ei8_v_f32m2_m

#define vsuxseg2ei8_v_f32m2_m ( ... ) __riscv_vsuxseg2ei8_v_f32m2_m(__VA_ARGS__)

◆ vsuxseg2ei8_v_f32m4

#define vsuxseg2ei8_v_f32m4 ( ... ) __riscv_vsuxseg2ei8_v_f32m4(__VA_ARGS__)

◆ vsuxseg2ei8_v_f32m4_m

#define vsuxseg2ei8_v_f32m4_m ( ... ) __riscv_vsuxseg2ei8_v_f32m4_m(__VA_ARGS__)

◆ vsuxseg2ei8_v_f32mf2

#define vsuxseg2ei8_v_f32mf2 ( ... ) __riscv_vsuxseg2ei8_v_f32mf2(__VA_ARGS__)

◆ vsuxseg2ei8_v_f32mf2_m

#define vsuxseg2ei8_v_f32mf2_m ( ... ) __riscv_vsuxseg2ei8_v_f32mf2_m(__VA_ARGS__)

◆ vsuxseg2ei8_v_f64m1

#define vsuxseg2ei8_v_f64m1 ( ... ) __riscv_vsuxseg2ei8_v_f64m1(__VA_ARGS__)

◆ vsuxseg2ei8_v_f64m1_m

#define vsuxseg2ei8_v_f64m1_m ( ... ) __riscv_vsuxseg2ei8_v_f64m1_m(__VA_ARGS__)

◆ vsuxseg2ei8_v_f64m2

#define vsuxseg2ei8_v_f64m2 ( ... ) __riscv_vsuxseg2ei8_v_f64m2(__VA_ARGS__)

◆ vsuxseg2ei8_v_f64m2_m

#define vsuxseg2ei8_v_f64m2_m ( ... ) __riscv_vsuxseg2ei8_v_f64m2_m(__VA_ARGS__)

◆ vsuxseg2ei8_v_f64m4

#define vsuxseg2ei8_v_f64m4 ( ... ) __riscv_vsuxseg2ei8_v_f64m4(__VA_ARGS__)

◆ vsuxseg2ei8_v_f64m4_m

#define vsuxseg2ei8_v_f64m4_m ( ... ) __riscv_vsuxseg2ei8_v_f64m4_m(__VA_ARGS__)

◆ vsuxseg2ei8_v_i16m1

#define vsuxseg2ei8_v_i16m1 ( ... ) __riscv_vsuxseg2ei8_v_i16m1(__VA_ARGS__)

◆ vsuxseg2ei8_v_i16m1_m

#define vsuxseg2ei8_v_i16m1_m ( ... ) __riscv_vsuxseg2ei8_v_i16m1_m(__VA_ARGS__)

◆ vsuxseg2ei8_v_i16m2

#define vsuxseg2ei8_v_i16m2 ( ... ) __riscv_vsuxseg2ei8_v_i16m2(__VA_ARGS__)

◆ vsuxseg2ei8_v_i16m2_m

#define vsuxseg2ei8_v_i16m2_m ( ... ) __riscv_vsuxseg2ei8_v_i16m2_m(__VA_ARGS__)

◆ vsuxseg2ei8_v_i16m4

#define vsuxseg2ei8_v_i16m4 ( ... ) __riscv_vsuxseg2ei8_v_i16m4(__VA_ARGS__)

◆ vsuxseg2ei8_v_i16m4_m

#define vsuxseg2ei8_v_i16m4_m ( ... ) __riscv_vsuxseg2ei8_v_i16m4_m(__VA_ARGS__)

◆ vsuxseg2ei8_v_i16mf2

#define vsuxseg2ei8_v_i16mf2 ( ... ) __riscv_vsuxseg2ei8_v_i16mf2(__VA_ARGS__)

◆ vsuxseg2ei8_v_i16mf2_m

#define vsuxseg2ei8_v_i16mf2_m ( ... ) __riscv_vsuxseg2ei8_v_i16mf2_m(__VA_ARGS__)

◆ vsuxseg2ei8_v_i16mf4

#define vsuxseg2ei8_v_i16mf4 ( ... ) __riscv_vsuxseg2ei8_v_i16mf4(__VA_ARGS__)

◆ vsuxseg2ei8_v_i16mf4_m

#define vsuxseg2ei8_v_i16mf4_m ( ... ) __riscv_vsuxseg2ei8_v_i16mf4_m(__VA_ARGS__)

◆ vsuxseg2ei8_v_i32m1

#define vsuxseg2ei8_v_i32m1 ( ... ) __riscv_vsuxseg2ei8_v_i32m1(__VA_ARGS__)

◆ vsuxseg2ei8_v_i32m1_m

#define vsuxseg2ei8_v_i32m1_m ( ... ) __riscv_vsuxseg2ei8_v_i32m1_m(__VA_ARGS__)

◆ vsuxseg2ei8_v_i32m2

#define vsuxseg2ei8_v_i32m2 ( ... ) __riscv_vsuxseg2ei8_v_i32m2(__VA_ARGS__)

◆ vsuxseg2ei8_v_i32m2_m

#define vsuxseg2ei8_v_i32m2_m ( ... ) __riscv_vsuxseg2ei8_v_i32m2_m(__VA_ARGS__)

◆ vsuxseg2ei8_v_i32m4

#define vsuxseg2ei8_v_i32m4 ( ... ) __riscv_vsuxseg2ei8_v_i32m4(__VA_ARGS__)

◆ vsuxseg2ei8_v_i32m4_m

#define vsuxseg2ei8_v_i32m4_m ( ... ) __riscv_vsuxseg2ei8_v_i32m4_m(__VA_ARGS__)

◆ vsuxseg2ei8_v_i32mf2

#define vsuxseg2ei8_v_i32mf2 ( ... ) __riscv_vsuxseg2ei8_v_i32mf2(__VA_ARGS__)

◆ vsuxseg2ei8_v_i32mf2_m

#define vsuxseg2ei8_v_i32mf2_m ( ... ) __riscv_vsuxseg2ei8_v_i32mf2_m(__VA_ARGS__)

◆ vsuxseg2ei8_v_i64m1

#define vsuxseg2ei8_v_i64m1 ( ... ) __riscv_vsuxseg2ei8_v_i64m1(__VA_ARGS__)

◆ vsuxseg2ei8_v_i64m1_m

#define vsuxseg2ei8_v_i64m1_m ( ... ) __riscv_vsuxseg2ei8_v_i64m1_m(__VA_ARGS__)

◆ vsuxseg2ei8_v_i64m2

#define vsuxseg2ei8_v_i64m2 ( ... ) __riscv_vsuxseg2ei8_v_i64m2(__VA_ARGS__)

◆ vsuxseg2ei8_v_i64m2_m

#define vsuxseg2ei8_v_i64m2_m ( ... ) __riscv_vsuxseg2ei8_v_i64m2_m(__VA_ARGS__)

◆ vsuxseg2ei8_v_i64m4

#define vsuxseg2ei8_v_i64m4 ( ... ) __riscv_vsuxseg2ei8_v_i64m4(__VA_ARGS__)

◆ vsuxseg2ei8_v_i64m4_m

#define vsuxseg2ei8_v_i64m4_m ( ... ) __riscv_vsuxseg2ei8_v_i64m4_m(__VA_ARGS__)

◆ vsuxseg2ei8_v_i8m1

#define vsuxseg2ei8_v_i8m1 ( ... ) __riscv_vsuxseg2ei8_v_i8m1(__VA_ARGS__)

◆ vsuxseg2ei8_v_i8m1_m

#define vsuxseg2ei8_v_i8m1_m ( ... ) __riscv_vsuxseg2ei8_v_i8m1_m(__VA_ARGS__)

◆ vsuxseg2ei8_v_i8m2

#define vsuxseg2ei8_v_i8m2 ( ... ) __riscv_vsuxseg2ei8_v_i8m2(__VA_ARGS__)

◆ vsuxseg2ei8_v_i8m2_m

#define vsuxseg2ei8_v_i8m2_m ( ... ) __riscv_vsuxseg2ei8_v_i8m2_m(__VA_ARGS__)

◆ vsuxseg2ei8_v_i8m4

#define vsuxseg2ei8_v_i8m4 ( ... ) __riscv_vsuxseg2ei8_v_i8m4(__VA_ARGS__)

◆ vsuxseg2ei8_v_i8m4_m

#define vsuxseg2ei8_v_i8m4_m ( ... ) __riscv_vsuxseg2ei8_v_i8m4_m(__VA_ARGS__)

◆ vsuxseg2ei8_v_i8mf2

#define vsuxseg2ei8_v_i8mf2 ( ... ) __riscv_vsuxseg2ei8_v_i8mf2(__VA_ARGS__)

◆ vsuxseg2ei8_v_i8mf2_m

#define vsuxseg2ei8_v_i8mf2_m ( ... ) __riscv_vsuxseg2ei8_v_i8mf2_m(__VA_ARGS__)

◆ vsuxseg2ei8_v_i8mf4

#define vsuxseg2ei8_v_i8mf4 ( ... ) __riscv_vsuxseg2ei8_v_i8mf4(__VA_ARGS__)

◆ vsuxseg2ei8_v_i8mf4_m

#define vsuxseg2ei8_v_i8mf4_m ( ... ) __riscv_vsuxseg2ei8_v_i8mf4_m(__VA_ARGS__)

◆ vsuxseg2ei8_v_i8mf8

#define vsuxseg2ei8_v_i8mf8 ( ... ) __riscv_vsuxseg2ei8_v_i8mf8(__VA_ARGS__)

◆ vsuxseg2ei8_v_i8mf8_m

#define vsuxseg2ei8_v_i8mf8_m ( ... ) __riscv_vsuxseg2ei8_v_i8mf8_m(__VA_ARGS__)

◆ vsuxseg2ei8_v_u16m1

#define vsuxseg2ei8_v_u16m1 ( ... ) __riscv_vsuxseg2ei8_v_u16m1(__VA_ARGS__)

◆ vsuxseg2ei8_v_u16m1_m

#define vsuxseg2ei8_v_u16m1_m ( ... ) __riscv_vsuxseg2ei8_v_u16m1_m(__VA_ARGS__)

◆ vsuxseg2ei8_v_u16m2

#define vsuxseg2ei8_v_u16m2 ( ... ) __riscv_vsuxseg2ei8_v_u16m2(__VA_ARGS__)

◆ vsuxseg2ei8_v_u16m2_m

#define vsuxseg2ei8_v_u16m2_m ( ... ) __riscv_vsuxseg2ei8_v_u16m2_m(__VA_ARGS__)

◆ vsuxseg2ei8_v_u16m4

#define vsuxseg2ei8_v_u16m4 ( ... ) __riscv_vsuxseg2ei8_v_u16m4(__VA_ARGS__)

◆ vsuxseg2ei8_v_u16m4_m

#define vsuxseg2ei8_v_u16m4_m ( ... ) __riscv_vsuxseg2ei8_v_u16m4_m(__VA_ARGS__)

◆ vsuxseg2ei8_v_u16mf2

#define vsuxseg2ei8_v_u16mf2 ( ... ) __riscv_vsuxseg2ei8_v_u16mf2(__VA_ARGS__)

◆ vsuxseg2ei8_v_u16mf2_m

#define vsuxseg2ei8_v_u16mf2_m ( ... ) __riscv_vsuxseg2ei8_v_u16mf2_m(__VA_ARGS__)

◆ vsuxseg2ei8_v_u16mf4

#define vsuxseg2ei8_v_u16mf4 ( ... ) __riscv_vsuxseg2ei8_v_u16mf4(__VA_ARGS__)

◆ vsuxseg2ei8_v_u16mf4_m

#define vsuxseg2ei8_v_u16mf4_m ( ... ) __riscv_vsuxseg2ei8_v_u16mf4_m(__VA_ARGS__)

◆ vsuxseg2ei8_v_u32m1

#define vsuxseg2ei8_v_u32m1 ( ... ) __riscv_vsuxseg2ei8_v_u32m1(__VA_ARGS__)

◆ vsuxseg2ei8_v_u32m1_m

#define vsuxseg2ei8_v_u32m1_m ( ... ) __riscv_vsuxseg2ei8_v_u32m1_m(__VA_ARGS__)

◆ vsuxseg2ei8_v_u32m2

#define vsuxseg2ei8_v_u32m2 ( ... ) __riscv_vsuxseg2ei8_v_u32m2(__VA_ARGS__)

◆ vsuxseg2ei8_v_u32m2_m

#define vsuxseg2ei8_v_u32m2_m ( ... ) __riscv_vsuxseg2ei8_v_u32m2_m(__VA_ARGS__)

◆ vsuxseg2ei8_v_u32m4

#define vsuxseg2ei8_v_u32m4 ( ... ) __riscv_vsuxseg2ei8_v_u32m4(__VA_ARGS__)

◆ vsuxseg2ei8_v_u32m4_m

#define vsuxseg2ei8_v_u32m4_m ( ... ) __riscv_vsuxseg2ei8_v_u32m4_m(__VA_ARGS__)

◆ vsuxseg2ei8_v_u32mf2

#define vsuxseg2ei8_v_u32mf2 ( ... ) __riscv_vsuxseg2ei8_v_u32mf2(__VA_ARGS__)

◆ vsuxseg2ei8_v_u32mf2_m

#define vsuxseg2ei8_v_u32mf2_m ( ... ) __riscv_vsuxseg2ei8_v_u32mf2_m(__VA_ARGS__)

◆ vsuxseg2ei8_v_u64m1

#define vsuxseg2ei8_v_u64m1 ( ... ) __riscv_vsuxseg2ei8_v_u64m1(__VA_ARGS__)

◆ vsuxseg2ei8_v_u64m1_m

#define vsuxseg2ei8_v_u64m1_m ( ... ) __riscv_vsuxseg2ei8_v_u64m1_m(__VA_ARGS__)

◆ vsuxseg2ei8_v_u64m2

#define vsuxseg2ei8_v_u64m2 ( ... ) __riscv_vsuxseg2ei8_v_u64m2(__VA_ARGS__)

◆ vsuxseg2ei8_v_u64m2_m

#define vsuxseg2ei8_v_u64m2_m ( ... ) __riscv_vsuxseg2ei8_v_u64m2_m(__VA_ARGS__)

◆ vsuxseg2ei8_v_u64m4

#define vsuxseg2ei8_v_u64m4 ( ... ) __riscv_vsuxseg2ei8_v_u64m4(__VA_ARGS__)

◆ vsuxseg2ei8_v_u64m4_m

#define vsuxseg2ei8_v_u64m4_m ( ... ) __riscv_vsuxseg2ei8_v_u64m4_m(__VA_ARGS__)

◆ vsuxseg2ei8_v_u8m1

#define vsuxseg2ei8_v_u8m1 ( ... ) __riscv_vsuxseg2ei8_v_u8m1(__VA_ARGS__)

◆ vsuxseg2ei8_v_u8m1_m

#define vsuxseg2ei8_v_u8m1_m ( ... ) __riscv_vsuxseg2ei8_v_u8m1_m(__VA_ARGS__)

◆ vsuxseg2ei8_v_u8m2

#define vsuxseg2ei8_v_u8m2 ( ... ) __riscv_vsuxseg2ei8_v_u8m2(__VA_ARGS__)

◆ vsuxseg2ei8_v_u8m2_m

#define vsuxseg2ei8_v_u8m2_m ( ... ) __riscv_vsuxseg2ei8_v_u8m2_m(__VA_ARGS__)

◆ vsuxseg2ei8_v_u8m4

#define vsuxseg2ei8_v_u8m4 ( ... ) __riscv_vsuxseg2ei8_v_u8m4(__VA_ARGS__)

◆ vsuxseg2ei8_v_u8m4_m

#define vsuxseg2ei8_v_u8m4_m ( ... ) __riscv_vsuxseg2ei8_v_u8m4_m(__VA_ARGS__)

◆ vsuxseg2ei8_v_u8mf2

#define vsuxseg2ei8_v_u8mf2 ( ... ) __riscv_vsuxseg2ei8_v_u8mf2(__VA_ARGS__)

◆ vsuxseg2ei8_v_u8mf2_m

#define vsuxseg2ei8_v_u8mf2_m ( ... ) __riscv_vsuxseg2ei8_v_u8mf2_m(__VA_ARGS__)

◆ vsuxseg2ei8_v_u8mf4

#define vsuxseg2ei8_v_u8mf4 ( ... ) __riscv_vsuxseg2ei8_v_u8mf4(__VA_ARGS__)

◆ vsuxseg2ei8_v_u8mf4_m

#define vsuxseg2ei8_v_u8mf4_m ( ... ) __riscv_vsuxseg2ei8_v_u8mf4_m(__VA_ARGS__)

◆ vsuxseg2ei8_v_u8mf8

#define vsuxseg2ei8_v_u8mf8 ( ... ) __riscv_vsuxseg2ei8_v_u8mf8(__VA_ARGS__)

◆ vsuxseg2ei8_v_u8mf8_m

#define vsuxseg2ei8_v_u8mf8_m ( ... ) __riscv_vsuxseg2ei8_v_u8mf8_m(__VA_ARGS__)

◆ vsuxseg3ei16_v_f16m1

#define vsuxseg3ei16_v_f16m1 ( ... ) __riscv_vsuxseg3ei16_v_f16m1(__VA_ARGS__)

◆ vsuxseg3ei16_v_f16m1_m

#define vsuxseg3ei16_v_f16m1_m ( ... ) __riscv_vsuxseg3ei16_v_f16m1_m(__VA_ARGS__)

◆ vsuxseg3ei16_v_f16m2

#define vsuxseg3ei16_v_f16m2 ( ... ) __riscv_vsuxseg3ei16_v_f16m2(__VA_ARGS__)

◆ vsuxseg3ei16_v_f16m2_m

#define vsuxseg3ei16_v_f16m2_m ( ... ) __riscv_vsuxseg3ei16_v_f16m2_m(__VA_ARGS__)

◆ vsuxseg3ei16_v_f16mf2

#define vsuxseg3ei16_v_f16mf2 ( ... ) __riscv_vsuxseg3ei16_v_f16mf2(__VA_ARGS__)

◆ vsuxseg3ei16_v_f16mf2_m

#define vsuxseg3ei16_v_f16mf2_m ( ... ) __riscv_vsuxseg3ei16_v_f16mf2_m(__VA_ARGS__)

◆ vsuxseg3ei16_v_f16mf4

#define vsuxseg3ei16_v_f16mf4 ( ... ) __riscv_vsuxseg3ei16_v_f16mf4(__VA_ARGS__)

◆ vsuxseg3ei16_v_f16mf4_m

#define vsuxseg3ei16_v_f16mf4_m ( ... ) __riscv_vsuxseg3ei16_v_f16mf4_m(__VA_ARGS__)

◆ vsuxseg3ei16_v_f32m1

#define vsuxseg3ei16_v_f32m1 ( ... ) __riscv_vsuxseg3ei16_v_f32m1(__VA_ARGS__)

◆ vsuxseg3ei16_v_f32m1_m

#define vsuxseg3ei16_v_f32m1_m ( ... ) __riscv_vsuxseg3ei16_v_f32m1_m(__VA_ARGS__)

◆ vsuxseg3ei16_v_f32m2

#define vsuxseg3ei16_v_f32m2 ( ... ) __riscv_vsuxseg3ei16_v_f32m2(__VA_ARGS__)

◆ vsuxseg3ei16_v_f32m2_m

#define vsuxseg3ei16_v_f32m2_m ( ... ) __riscv_vsuxseg3ei16_v_f32m2_m(__VA_ARGS__)

◆ vsuxseg3ei16_v_f32mf2

#define vsuxseg3ei16_v_f32mf2 ( ... ) __riscv_vsuxseg3ei16_v_f32mf2(__VA_ARGS__)

◆ vsuxseg3ei16_v_f32mf2_m

#define vsuxseg3ei16_v_f32mf2_m ( ... ) __riscv_vsuxseg3ei16_v_f32mf2_m(__VA_ARGS__)

◆ vsuxseg3ei16_v_f64m1

#define vsuxseg3ei16_v_f64m1 ( ... ) __riscv_vsuxseg3ei16_v_f64m1(__VA_ARGS__)

◆ vsuxseg3ei16_v_f64m1_m

#define vsuxseg3ei16_v_f64m1_m ( ... ) __riscv_vsuxseg3ei16_v_f64m1_m(__VA_ARGS__)

◆ vsuxseg3ei16_v_f64m2

#define vsuxseg3ei16_v_f64m2 ( ... ) __riscv_vsuxseg3ei16_v_f64m2(__VA_ARGS__)

◆ vsuxseg3ei16_v_f64m2_m

#define vsuxseg3ei16_v_f64m2_m ( ... ) __riscv_vsuxseg3ei16_v_f64m2_m(__VA_ARGS__)

◆ vsuxseg3ei16_v_i16m1

#define vsuxseg3ei16_v_i16m1 ( ... ) __riscv_vsuxseg3ei16_v_i16m1(__VA_ARGS__)

◆ vsuxseg3ei16_v_i16m1_m

#define vsuxseg3ei16_v_i16m1_m ( ... ) __riscv_vsuxseg3ei16_v_i16m1_m(__VA_ARGS__)

◆ vsuxseg3ei16_v_i16m2

#define vsuxseg3ei16_v_i16m2 ( ... ) __riscv_vsuxseg3ei16_v_i16m2(__VA_ARGS__)

◆ vsuxseg3ei16_v_i16m2_m

#define vsuxseg3ei16_v_i16m2_m ( ... ) __riscv_vsuxseg3ei16_v_i16m2_m(__VA_ARGS__)

◆ vsuxseg3ei16_v_i16mf2

#define vsuxseg3ei16_v_i16mf2 ( ... ) __riscv_vsuxseg3ei16_v_i16mf2(__VA_ARGS__)

◆ vsuxseg3ei16_v_i16mf2_m

#define vsuxseg3ei16_v_i16mf2_m ( ... ) __riscv_vsuxseg3ei16_v_i16mf2_m(__VA_ARGS__)

◆ vsuxseg3ei16_v_i16mf4

#define vsuxseg3ei16_v_i16mf4 ( ... ) __riscv_vsuxseg3ei16_v_i16mf4(__VA_ARGS__)

◆ vsuxseg3ei16_v_i16mf4_m

#define vsuxseg3ei16_v_i16mf4_m ( ... ) __riscv_vsuxseg3ei16_v_i16mf4_m(__VA_ARGS__)

◆ vsuxseg3ei16_v_i32m1

#define vsuxseg3ei16_v_i32m1 ( ... ) __riscv_vsuxseg3ei16_v_i32m1(__VA_ARGS__)

◆ vsuxseg3ei16_v_i32m1_m

#define vsuxseg3ei16_v_i32m1_m ( ... ) __riscv_vsuxseg3ei16_v_i32m1_m(__VA_ARGS__)

◆ vsuxseg3ei16_v_i32m2

#define vsuxseg3ei16_v_i32m2 ( ... ) __riscv_vsuxseg3ei16_v_i32m2(__VA_ARGS__)

◆ vsuxseg3ei16_v_i32m2_m

#define vsuxseg3ei16_v_i32m2_m ( ... ) __riscv_vsuxseg3ei16_v_i32m2_m(__VA_ARGS__)

◆ vsuxseg3ei16_v_i32mf2

#define vsuxseg3ei16_v_i32mf2 ( ... ) __riscv_vsuxseg3ei16_v_i32mf2(__VA_ARGS__)

◆ vsuxseg3ei16_v_i32mf2_m

#define vsuxseg3ei16_v_i32mf2_m ( ... ) __riscv_vsuxseg3ei16_v_i32mf2_m(__VA_ARGS__)

◆ vsuxseg3ei16_v_i64m1

#define vsuxseg3ei16_v_i64m1 ( ... ) __riscv_vsuxseg3ei16_v_i64m1(__VA_ARGS__)

◆ vsuxseg3ei16_v_i64m1_m

#define vsuxseg3ei16_v_i64m1_m ( ... ) __riscv_vsuxseg3ei16_v_i64m1_m(__VA_ARGS__)

◆ vsuxseg3ei16_v_i64m2

#define vsuxseg3ei16_v_i64m2 ( ... ) __riscv_vsuxseg3ei16_v_i64m2(__VA_ARGS__)

◆ vsuxseg3ei16_v_i64m2_m

#define vsuxseg3ei16_v_i64m2_m ( ... ) __riscv_vsuxseg3ei16_v_i64m2_m(__VA_ARGS__)

◆ vsuxseg3ei16_v_i8m1

#define vsuxseg3ei16_v_i8m1 ( ... ) __riscv_vsuxseg3ei16_v_i8m1(__VA_ARGS__)

◆ vsuxseg3ei16_v_i8m1_m

#define vsuxseg3ei16_v_i8m1_m ( ... ) __riscv_vsuxseg3ei16_v_i8m1_m(__VA_ARGS__)

◆ vsuxseg3ei16_v_i8m2

#define vsuxseg3ei16_v_i8m2 ( ... ) __riscv_vsuxseg3ei16_v_i8m2(__VA_ARGS__)

◆ vsuxseg3ei16_v_i8m2_m

#define vsuxseg3ei16_v_i8m2_m ( ... ) __riscv_vsuxseg3ei16_v_i8m2_m(__VA_ARGS__)

◆ vsuxseg3ei16_v_i8mf2

#define vsuxseg3ei16_v_i8mf2 ( ... ) __riscv_vsuxseg3ei16_v_i8mf2(__VA_ARGS__)

◆ vsuxseg3ei16_v_i8mf2_m

#define vsuxseg3ei16_v_i8mf2_m ( ... ) __riscv_vsuxseg3ei16_v_i8mf2_m(__VA_ARGS__)

◆ vsuxseg3ei16_v_i8mf4

#define vsuxseg3ei16_v_i8mf4 ( ... ) __riscv_vsuxseg3ei16_v_i8mf4(__VA_ARGS__)

◆ vsuxseg3ei16_v_i8mf4_m

#define vsuxseg3ei16_v_i8mf4_m ( ... ) __riscv_vsuxseg3ei16_v_i8mf4_m(__VA_ARGS__)

◆ vsuxseg3ei16_v_i8mf8

#define vsuxseg3ei16_v_i8mf8 ( ... ) __riscv_vsuxseg3ei16_v_i8mf8(__VA_ARGS__)

◆ vsuxseg3ei16_v_i8mf8_m

#define vsuxseg3ei16_v_i8mf8_m ( ... ) __riscv_vsuxseg3ei16_v_i8mf8_m(__VA_ARGS__)

◆ vsuxseg3ei16_v_u16m1

#define vsuxseg3ei16_v_u16m1 ( ... ) __riscv_vsuxseg3ei16_v_u16m1(__VA_ARGS__)

◆ vsuxseg3ei16_v_u16m1_m

#define vsuxseg3ei16_v_u16m1_m ( ... ) __riscv_vsuxseg3ei16_v_u16m1_m(__VA_ARGS__)

◆ vsuxseg3ei16_v_u16m2

#define vsuxseg3ei16_v_u16m2 ( ... ) __riscv_vsuxseg3ei16_v_u16m2(__VA_ARGS__)

◆ vsuxseg3ei16_v_u16m2_m

#define vsuxseg3ei16_v_u16m2_m ( ... ) __riscv_vsuxseg3ei16_v_u16m2_m(__VA_ARGS__)

◆ vsuxseg3ei16_v_u16mf2

#define vsuxseg3ei16_v_u16mf2 ( ... ) __riscv_vsuxseg3ei16_v_u16mf2(__VA_ARGS__)

◆ vsuxseg3ei16_v_u16mf2_m

#define vsuxseg3ei16_v_u16mf2_m ( ... ) __riscv_vsuxseg3ei16_v_u16mf2_m(__VA_ARGS__)

◆ vsuxseg3ei16_v_u16mf4

#define vsuxseg3ei16_v_u16mf4 ( ... ) __riscv_vsuxseg3ei16_v_u16mf4(__VA_ARGS__)

◆ vsuxseg3ei16_v_u16mf4_m

#define vsuxseg3ei16_v_u16mf4_m ( ... ) __riscv_vsuxseg3ei16_v_u16mf4_m(__VA_ARGS__)

◆ vsuxseg3ei16_v_u32m1

#define vsuxseg3ei16_v_u32m1 ( ... ) __riscv_vsuxseg3ei16_v_u32m1(__VA_ARGS__)

◆ vsuxseg3ei16_v_u32m1_m

#define vsuxseg3ei16_v_u32m1_m ( ... ) __riscv_vsuxseg3ei16_v_u32m1_m(__VA_ARGS__)

◆ vsuxseg3ei16_v_u32m2

#define vsuxseg3ei16_v_u32m2 ( ... ) __riscv_vsuxseg3ei16_v_u32m2(__VA_ARGS__)

◆ vsuxseg3ei16_v_u32m2_m

#define vsuxseg3ei16_v_u32m2_m ( ... ) __riscv_vsuxseg3ei16_v_u32m2_m(__VA_ARGS__)

◆ vsuxseg3ei16_v_u32mf2

#define vsuxseg3ei16_v_u32mf2 ( ... ) __riscv_vsuxseg3ei16_v_u32mf2(__VA_ARGS__)

◆ vsuxseg3ei16_v_u32mf2_m

#define vsuxseg3ei16_v_u32mf2_m ( ... ) __riscv_vsuxseg3ei16_v_u32mf2_m(__VA_ARGS__)

◆ vsuxseg3ei16_v_u64m1

#define vsuxseg3ei16_v_u64m1 ( ... ) __riscv_vsuxseg3ei16_v_u64m1(__VA_ARGS__)

◆ vsuxseg3ei16_v_u64m1_m

#define vsuxseg3ei16_v_u64m1_m ( ... ) __riscv_vsuxseg3ei16_v_u64m1_m(__VA_ARGS__)

◆ vsuxseg3ei16_v_u64m2

#define vsuxseg3ei16_v_u64m2 ( ... ) __riscv_vsuxseg3ei16_v_u64m2(__VA_ARGS__)

◆ vsuxseg3ei16_v_u64m2_m

#define vsuxseg3ei16_v_u64m2_m ( ... ) __riscv_vsuxseg3ei16_v_u64m2_m(__VA_ARGS__)

◆ vsuxseg3ei16_v_u8m1

#define vsuxseg3ei16_v_u8m1 ( ... ) __riscv_vsuxseg3ei16_v_u8m1(__VA_ARGS__)

◆ vsuxseg3ei16_v_u8m1_m

#define vsuxseg3ei16_v_u8m1_m ( ... ) __riscv_vsuxseg3ei16_v_u8m1_m(__VA_ARGS__)

◆ vsuxseg3ei16_v_u8m2

#define vsuxseg3ei16_v_u8m2 ( ... ) __riscv_vsuxseg3ei16_v_u8m2(__VA_ARGS__)

◆ vsuxseg3ei16_v_u8m2_m

#define vsuxseg3ei16_v_u8m2_m ( ... ) __riscv_vsuxseg3ei16_v_u8m2_m(__VA_ARGS__)

◆ vsuxseg3ei16_v_u8mf2

#define vsuxseg3ei16_v_u8mf2 ( ... ) __riscv_vsuxseg3ei16_v_u8mf2(__VA_ARGS__)

◆ vsuxseg3ei16_v_u8mf2_m

#define vsuxseg3ei16_v_u8mf2_m ( ... ) __riscv_vsuxseg3ei16_v_u8mf2_m(__VA_ARGS__)

◆ vsuxseg3ei16_v_u8mf4

#define vsuxseg3ei16_v_u8mf4 ( ... ) __riscv_vsuxseg3ei16_v_u8mf4(__VA_ARGS__)

◆ vsuxseg3ei16_v_u8mf4_m

#define vsuxseg3ei16_v_u8mf4_m ( ... ) __riscv_vsuxseg3ei16_v_u8mf4_m(__VA_ARGS__)

◆ vsuxseg3ei16_v_u8mf8

#define vsuxseg3ei16_v_u8mf8 ( ... ) __riscv_vsuxseg3ei16_v_u8mf8(__VA_ARGS__)

◆ vsuxseg3ei16_v_u8mf8_m

#define vsuxseg3ei16_v_u8mf8_m ( ... ) __riscv_vsuxseg3ei16_v_u8mf8_m(__VA_ARGS__)

◆ vsuxseg3ei32_v_f16m1

#define vsuxseg3ei32_v_f16m1 ( ... ) __riscv_vsuxseg3ei32_v_f16m1(__VA_ARGS__)

◆ vsuxseg3ei32_v_f16m1_m

#define vsuxseg3ei32_v_f16m1_m ( ... ) __riscv_vsuxseg3ei32_v_f16m1_m(__VA_ARGS__)

◆ vsuxseg3ei32_v_f16m2

#define vsuxseg3ei32_v_f16m2 ( ... ) __riscv_vsuxseg3ei32_v_f16m2(__VA_ARGS__)

◆ vsuxseg3ei32_v_f16m2_m

#define vsuxseg3ei32_v_f16m2_m ( ... ) __riscv_vsuxseg3ei32_v_f16m2_m(__VA_ARGS__)

◆ vsuxseg3ei32_v_f16mf2

#define vsuxseg3ei32_v_f16mf2 ( ... ) __riscv_vsuxseg3ei32_v_f16mf2(__VA_ARGS__)

◆ vsuxseg3ei32_v_f16mf2_m

#define vsuxseg3ei32_v_f16mf2_m ( ... ) __riscv_vsuxseg3ei32_v_f16mf2_m(__VA_ARGS__)

◆ vsuxseg3ei32_v_f16mf4

#define vsuxseg3ei32_v_f16mf4 ( ... ) __riscv_vsuxseg3ei32_v_f16mf4(__VA_ARGS__)

◆ vsuxseg3ei32_v_f16mf4_m

#define vsuxseg3ei32_v_f16mf4_m ( ... ) __riscv_vsuxseg3ei32_v_f16mf4_m(__VA_ARGS__)

◆ vsuxseg3ei32_v_f32m1

#define vsuxseg3ei32_v_f32m1 ( ... ) __riscv_vsuxseg3ei32_v_f32m1(__VA_ARGS__)

◆ vsuxseg3ei32_v_f32m1_m

#define vsuxseg3ei32_v_f32m1_m ( ... ) __riscv_vsuxseg3ei32_v_f32m1_m(__VA_ARGS__)

◆ vsuxseg3ei32_v_f32m2

#define vsuxseg3ei32_v_f32m2 ( ... ) __riscv_vsuxseg3ei32_v_f32m2(__VA_ARGS__)

◆ vsuxseg3ei32_v_f32m2_m

#define vsuxseg3ei32_v_f32m2_m ( ... ) __riscv_vsuxseg3ei32_v_f32m2_m(__VA_ARGS__)

◆ vsuxseg3ei32_v_f32mf2

#define vsuxseg3ei32_v_f32mf2 ( ... ) __riscv_vsuxseg3ei32_v_f32mf2(__VA_ARGS__)

◆ vsuxseg3ei32_v_f32mf2_m

#define vsuxseg3ei32_v_f32mf2_m ( ... ) __riscv_vsuxseg3ei32_v_f32mf2_m(__VA_ARGS__)

◆ vsuxseg3ei32_v_f64m1

#define vsuxseg3ei32_v_f64m1 ( ... ) __riscv_vsuxseg3ei32_v_f64m1(__VA_ARGS__)

◆ vsuxseg3ei32_v_f64m1_m

#define vsuxseg3ei32_v_f64m1_m ( ... ) __riscv_vsuxseg3ei32_v_f64m1_m(__VA_ARGS__)

◆ vsuxseg3ei32_v_f64m2

#define vsuxseg3ei32_v_f64m2 ( ... ) __riscv_vsuxseg3ei32_v_f64m2(__VA_ARGS__)

◆ vsuxseg3ei32_v_f64m2_m

#define vsuxseg3ei32_v_f64m2_m ( ... ) __riscv_vsuxseg3ei32_v_f64m2_m(__VA_ARGS__)

◆ vsuxseg3ei32_v_i16m1

#define vsuxseg3ei32_v_i16m1 ( ... ) __riscv_vsuxseg3ei32_v_i16m1(__VA_ARGS__)

◆ vsuxseg3ei32_v_i16m1_m

#define vsuxseg3ei32_v_i16m1_m ( ... ) __riscv_vsuxseg3ei32_v_i16m1_m(__VA_ARGS__)

◆ vsuxseg3ei32_v_i16m2

#define vsuxseg3ei32_v_i16m2 ( ... ) __riscv_vsuxseg3ei32_v_i16m2(__VA_ARGS__)

◆ vsuxseg3ei32_v_i16m2_m

#define vsuxseg3ei32_v_i16m2_m ( ... ) __riscv_vsuxseg3ei32_v_i16m2_m(__VA_ARGS__)

◆ vsuxseg3ei32_v_i16mf2

#define vsuxseg3ei32_v_i16mf2 ( ... ) __riscv_vsuxseg3ei32_v_i16mf2(__VA_ARGS__)

◆ vsuxseg3ei32_v_i16mf2_m

#define vsuxseg3ei32_v_i16mf2_m ( ... ) __riscv_vsuxseg3ei32_v_i16mf2_m(__VA_ARGS__)

◆ vsuxseg3ei32_v_i16mf4

#define vsuxseg3ei32_v_i16mf4 ( ... ) __riscv_vsuxseg3ei32_v_i16mf4(__VA_ARGS__)

◆ vsuxseg3ei32_v_i16mf4_m

#define vsuxseg3ei32_v_i16mf4_m ( ... ) __riscv_vsuxseg3ei32_v_i16mf4_m(__VA_ARGS__)

◆ vsuxseg3ei32_v_i32m1

#define vsuxseg3ei32_v_i32m1 ( ... ) __riscv_vsuxseg3ei32_v_i32m1(__VA_ARGS__)

◆ vsuxseg3ei32_v_i32m1_m

#define vsuxseg3ei32_v_i32m1_m ( ... ) __riscv_vsuxseg3ei32_v_i32m1_m(__VA_ARGS__)

◆ vsuxseg3ei32_v_i32m2

#define vsuxseg3ei32_v_i32m2 ( ... ) __riscv_vsuxseg3ei32_v_i32m2(__VA_ARGS__)

◆ vsuxseg3ei32_v_i32m2_m

#define vsuxseg3ei32_v_i32m2_m ( ... ) __riscv_vsuxseg3ei32_v_i32m2_m(__VA_ARGS__)

◆ vsuxseg3ei32_v_i32mf2

#define vsuxseg3ei32_v_i32mf2 ( ... ) __riscv_vsuxseg3ei32_v_i32mf2(__VA_ARGS__)

◆ vsuxseg3ei32_v_i32mf2_m

#define vsuxseg3ei32_v_i32mf2_m ( ... ) __riscv_vsuxseg3ei32_v_i32mf2_m(__VA_ARGS__)

◆ vsuxseg3ei32_v_i64m1

#define vsuxseg3ei32_v_i64m1 ( ... ) __riscv_vsuxseg3ei32_v_i64m1(__VA_ARGS__)

◆ vsuxseg3ei32_v_i64m1_m

#define vsuxseg3ei32_v_i64m1_m ( ... ) __riscv_vsuxseg3ei32_v_i64m1_m(__VA_ARGS__)

◆ vsuxseg3ei32_v_i64m2

#define vsuxseg3ei32_v_i64m2 ( ... ) __riscv_vsuxseg3ei32_v_i64m2(__VA_ARGS__)

◆ vsuxseg3ei32_v_i64m2_m

#define vsuxseg3ei32_v_i64m2_m ( ... ) __riscv_vsuxseg3ei32_v_i64m2_m(__VA_ARGS__)

◆ vsuxseg3ei32_v_i8m1

#define vsuxseg3ei32_v_i8m1 ( ... ) __riscv_vsuxseg3ei32_v_i8m1(__VA_ARGS__)

◆ vsuxseg3ei32_v_i8m1_m

#define vsuxseg3ei32_v_i8m1_m ( ... ) __riscv_vsuxseg3ei32_v_i8m1_m(__VA_ARGS__)

◆ vsuxseg3ei32_v_i8m2

#define vsuxseg3ei32_v_i8m2 ( ... ) __riscv_vsuxseg3ei32_v_i8m2(__VA_ARGS__)

◆ vsuxseg3ei32_v_i8m2_m

#define vsuxseg3ei32_v_i8m2_m ( ... ) __riscv_vsuxseg3ei32_v_i8m2_m(__VA_ARGS__)

◆ vsuxseg3ei32_v_i8mf2

#define vsuxseg3ei32_v_i8mf2 ( ... ) __riscv_vsuxseg3ei32_v_i8mf2(__VA_ARGS__)

◆ vsuxseg3ei32_v_i8mf2_m

#define vsuxseg3ei32_v_i8mf2_m ( ... ) __riscv_vsuxseg3ei32_v_i8mf2_m(__VA_ARGS__)

◆ vsuxseg3ei32_v_i8mf4

#define vsuxseg3ei32_v_i8mf4 ( ... ) __riscv_vsuxseg3ei32_v_i8mf4(__VA_ARGS__)

◆ vsuxseg3ei32_v_i8mf4_m

#define vsuxseg3ei32_v_i8mf4_m ( ... ) __riscv_vsuxseg3ei32_v_i8mf4_m(__VA_ARGS__)

◆ vsuxseg3ei32_v_i8mf8

#define vsuxseg3ei32_v_i8mf8 ( ... ) __riscv_vsuxseg3ei32_v_i8mf8(__VA_ARGS__)

◆ vsuxseg3ei32_v_i8mf8_m

#define vsuxseg3ei32_v_i8mf8_m ( ... ) __riscv_vsuxseg3ei32_v_i8mf8_m(__VA_ARGS__)

◆ vsuxseg3ei32_v_u16m1

#define vsuxseg3ei32_v_u16m1 ( ... ) __riscv_vsuxseg3ei32_v_u16m1(__VA_ARGS__)

◆ vsuxseg3ei32_v_u16m1_m

#define vsuxseg3ei32_v_u16m1_m ( ... ) __riscv_vsuxseg3ei32_v_u16m1_m(__VA_ARGS__)

◆ vsuxseg3ei32_v_u16m2

#define vsuxseg3ei32_v_u16m2 ( ... ) __riscv_vsuxseg3ei32_v_u16m2(__VA_ARGS__)

◆ vsuxseg3ei32_v_u16m2_m

#define vsuxseg3ei32_v_u16m2_m ( ... ) __riscv_vsuxseg3ei32_v_u16m2_m(__VA_ARGS__)

◆ vsuxseg3ei32_v_u16mf2

#define vsuxseg3ei32_v_u16mf2 ( ... ) __riscv_vsuxseg3ei32_v_u16mf2(__VA_ARGS__)

◆ vsuxseg3ei32_v_u16mf2_m

#define vsuxseg3ei32_v_u16mf2_m ( ... ) __riscv_vsuxseg3ei32_v_u16mf2_m(__VA_ARGS__)

◆ vsuxseg3ei32_v_u16mf4

#define vsuxseg3ei32_v_u16mf4 ( ... ) __riscv_vsuxseg3ei32_v_u16mf4(__VA_ARGS__)

◆ vsuxseg3ei32_v_u16mf4_m

#define vsuxseg3ei32_v_u16mf4_m ( ... ) __riscv_vsuxseg3ei32_v_u16mf4_m(__VA_ARGS__)

◆ vsuxseg3ei32_v_u32m1

#define vsuxseg3ei32_v_u32m1 ( ... ) __riscv_vsuxseg3ei32_v_u32m1(__VA_ARGS__)

◆ vsuxseg3ei32_v_u32m1_m

#define vsuxseg3ei32_v_u32m1_m ( ... ) __riscv_vsuxseg3ei32_v_u32m1_m(__VA_ARGS__)

◆ vsuxseg3ei32_v_u32m2

#define vsuxseg3ei32_v_u32m2 ( ... ) __riscv_vsuxseg3ei32_v_u32m2(__VA_ARGS__)

◆ vsuxseg3ei32_v_u32m2_m

#define vsuxseg3ei32_v_u32m2_m ( ... ) __riscv_vsuxseg3ei32_v_u32m2_m(__VA_ARGS__)

◆ vsuxseg3ei32_v_u32mf2

#define vsuxseg3ei32_v_u32mf2 ( ... ) __riscv_vsuxseg3ei32_v_u32mf2(__VA_ARGS__)

◆ vsuxseg3ei32_v_u32mf2_m

#define vsuxseg3ei32_v_u32mf2_m ( ... ) __riscv_vsuxseg3ei32_v_u32mf2_m(__VA_ARGS__)

◆ vsuxseg3ei32_v_u64m1

#define vsuxseg3ei32_v_u64m1 ( ... ) __riscv_vsuxseg3ei32_v_u64m1(__VA_ARGS__)

◆ vsuxseg3ei32_v_u64m1_m

#define vsuxseg3ei32_v_u64m1_m ( ... ) __riscv_vsuxseg3ei32_v_u64m1_m(__VA_ARGS__)

◆ vsuxseg3ei32_v_u64m2

#define vsuxseg3ei32_v_u64m2 ( ... ) __riscv_vsuxseg3ei32_v_u64m2(__VA_ARGS__)

◆ vsuxseg3ei32_v_u64m2_m

#define vsuxseg3ei32_v_u64m2_m ( ... ) __riscv_vsuxseg3ei32_v_u64m2_m(__VA_ARGS__)

◆ vsuxseg3ei32_v_u8m1

#define vsuxseg3ei32_v_u8m1 ( ... ) __riscv_vsuxseg3ei32_v_u8m1(__VA_ARGS__)

◆ vsuxseg3ei32_v_u8m1_m

#define vsuxseg3ei32_v_u8m1_m ( ... ) __riscv_vsuxseg3ei32_v_u8m1_m(__VA_ARGS__)

◆ vsuxseg3ei32_v_u8m2

#define vsuxseg3ei32_v_u8m2 ( ... ) __riscv_vsuxseg3ei32_v_u8m2(__VA_ARGS__)

◆ vsuxseg3ei32_v_u8m2_m

#define vsuxseg3ei32_v_u8m2_m ( ... ) __riscv_vsuxseg3ei32_v_u8m2_m(__VA_ARGS__)

◆ vsuxseg3ei32_v_u8mf2

#define vsuxseg3ei32_v_u8mf2 ( ... ) __riscv_vsuxseg3ei32_v_u8mf2(__VA_ARGS__)

◆ vsuxseg3ei32_v_u8mf2_m

#define vsuxseg3ei32_v_u8mf2_m ( ... ) __riscv_vsuxseg3ei32_v_u8mf2_m(__VA_ARGS__)

◆ vsuxseg3ei32_v_u8mf4

#define vsuxseg3ei32_v_u8mf4 ( ... ) __riscv_vsuxseg3ei32_v_u8mf4(__VA_ARGS__)

◆ vsuxseg3ei32_v_u8mf4_m

#define vsuxseg3ei32_v_u8mf4_m ( ... ) __riscv_vsuxseg3ei32_v_u8mf4_m(__VA_ARGS__)

◆ vsuxseg3ei32_v_u8mf8

#define vsuxseg3ei32_v_u8mf8 ( ... ) __riscv_vsuxseg3ei32_v_u8mf8(__VA_ARGS__)

◆ vsuxseg3ei32_v_u8mf8_m

#define vsuxseg3ei32_v_u8mf8_m ( ... ) __riscv_vsuxseg3ei32_v_u8mf8_m(__VA_ARGS__)

◆ vsuxseg3ei64_v_f16m1

#define vsuxseg3ei64_v_f16m1 ( ... ) __riscv_vsuxseg3ei64_v_f16m1(__VA_ARGS__)

◆ vsuxseg3ei64_v_f16m1_m

#define vsuxseg3ei64_v_f16m1_m ( ... ) __riscv_vsuxseg3ei64_v_f16m1_m(__VA_ARGS__)

◆ vsuxseg3ei64_v_f16m2

#define vsuxseg3ei64_v_f16m2 ( ... ) __riscv_vsuxseg3ei64_v_f16m2(__VA_ARGS__)

◆ vsuxseg3ei64_v_f16m2_m

#define vsuxseg3ei64_v_f16m2_m ( ... ) __riscv_vsuxseg3ei64_v_f16m2_m(__VA_ARGS__)

◆ vsuxseg3ei64_v_f16mf2

#define vsuxseg3ei64_v_f16mf2 ( ... ) __riscv_vsuxseg3ei64_v_f16mf2(__VA_ARGS__)

◆ vsuxseg3ei64_v_f16mf2_m

#define vsuxseg3ei64_v_f16mf2_m ( ... ) __riscv_vsuxseg3ei64_v_f16mf2_m(__VA_ARGS__)

◆ vsuxseg3ei64_v_f16mf4

#define vsuxseg3ei64_v_f16mf4 ( ... ) __riscv_vsuxseg3ei64_v_f16mf4(__VA_ARGS__)

◆ vsuxseg3ei64_v_f16mf4_m

#define vsuxseg3ei64_v_f16mf4_m ( ... ) __riscv_vsuxseg3ei64_v_f16mf4_m(__VA_ARGS__)

◆ vsuxseg3ei64_v_f32m1

#define vsuxseg3ei64_v_f32m1 ( ... ) __riscv_vsuxseg3ei64_v_f32m1(__VA_ARGS__)

◆ vsuxseg3ei64_v_f32m1_m

#define vsuxseg3ei64_v_f32m1_m ( ... ) __riscv_vsuxseg3ei64_v_f32m1_m(__VA_ARGS__)

◆ vsuxseg3ei64_v_f32m2

#define vsuxseg3ei64_v_f32m2 ( ... ) __riscv_vsuxseg3ei64_v_f32m2(__VA_ARGS__)

◆ vsuxseg3ei64_v_f32m2_m

#define vsuxseg3ei64_v_f32m2_m ( ... ) __riscv_vsuxseg3ei64_v_f32m2_m(__VA_ARGS__)

◆ vsuxseg3ei64_v_f32mf2

#define vsuxseg3ei64_v_f32mf2 ( ... ) __riscv_vsuxseg3ei64_v_f32mf2(__VA_ARGS__)

◆ vsuxseg3ei64_v_f32mf2_m

#define vsuxseg3ei64_v_f32mf2_m ( ... ) __riscv_vsuxseg3ei64_v_f32mf2_m(__VA_ARGS__)

◆ vsuxseg3ei64_v_f64m1

#define vsuxseg3ei64_v_f64m1 ( ... ) __riscv_vsuxseg3ei64_v_f64m1(__VA_ARGS__)

◆ vsuxseg3ei64_v_f64m1_m

#define vsuxseg3ei64_v_f64m1_m ( ... ) __riscv_vsuxseg3ei64_v_f64m1_m(__VA_ARGS__)

◆ vsuxseg3ei64_v_f64m2

#define vsuxseg3ei64_v_f64m2 ( ... ) __riscv_vsuxseg3ei64_v_f64m2(__VA_ARGS__)

◆ vsuxseg3ei64_v_f64m2_m

#define vsuxseg3ei64_v_f64m2_m ( ... ) __riscv_vsuxseg3ei64_v_f64m2_m(__VA_ARGS__)

◆ vsuxseg3ei64_v_i16m1

#define vsuxseg3ei64_v_i16m1 ( ... ) __riscv_vsuxseg3ei64_v_i16m1(__VA_ARGS__)

◆ vsuxseg3ei64_v_i16m1_m

#define vsuxseg3ei64_v_i16m1_m ( ... ) __riscv_vsuxseg3ei64_v_i16m1_m(__VA_ARGS__)

◆ vsuxseg3ei64_v_i16m2

#define vsuxseg3ei64_v_i16m2 ( ... ) __riscv_vsuxseg3ei64_v_i16m2(__VA_ARGS__)

◆ vsuxseg3ei64_v_i16m2_m

#define vsuxseg3ei64_v_i16m2_m ( ... ) __riscv_vsuxseg3ei64_v_i16m2_m(__VA_ARGS__)

◆ vsuxseg3ei64_v_i16mf2

#define vsuxseg3ei64_v_i16mf2 ( ... ) __riscv_vsuxseg3ei64_v_i16mf2(__VA_ARGS__)

◆ vsuxseg3ei64_v_i16mf2_m

#define vsuxseg3ei64_v_i16mf2_m ( ... ) __riscv_vsuxseg3ei64_v_i16mf2_m(__VA_ARGS__)

◆ vsuxseg3ei64_v_i16mf4

#define vsuxseg3ei64_v_i16mf4 ( ... ) __riscv_vsuxseg3ei64_v_i16mf4(__VA_ARGS__)

◆ vsuxseg3ei64_v_i16mf4_m

#define vsuxseg3ei64_v_i16mf4_m ( ... ) __riscv_vsuxseg3ei64_v_i16mf4_m(__VA_ARGS__)

◆ vsuxseg3ei64_v_i32m1

#define vsuxseg3ei64_v_i32m1 ( ... ) __riscv_vsuxseg3ei64_v_i32m1(__VA_ARGS__)

◆ vsuxseg3ei64_v_i32m1_m

#define vsuxseg3ei64_v_i32m1_m ( ... ) __riscv_vsuxseg3ei64_v_i32m1_m(__VA_ARGS__)

◆ vsuxseg3ei64_v_i32m2

#define vsuxseg3ei64_v_i32m2 ( ... ) __riscv_vsuxseg3ei64_v_i32m2(__VA_ARGS__)

◆ vsuxseg3ei64_v_i32m2_m

#define vsuxseg3ei64_v_i32m2_m ( ... ) __riscv_vsuxseg3ei64_v_i32m2_m(__VA_ARGS__)

◆ vsuxseg3ei64_v_i32mf2

#define vsuxseg3ei64_v_i32mf2 ( ... ) __riscv_vsuxseg3ei64_v_i32mf2(__VA_ARGS__)

◆ vsuxseg3ei64_v_i32mf2_m

#define vsuxseg3ei64_v_i32mf2_m ( ... ) __riscv_vsuxseg3ei64_v_i32mf2_m(__VA_ARGS__)

◆ vsuxseg3ei64_v_i64m1

#define vsuxseg3ei64_v_i64m1 ( ... ) __riscv_vsuxseg3ei64_v_i64m1(__VA_ARGS__)

◆ vsuxseg3ei64_v_i64m1_m

#define vsuxseg3ei64_v_i64m1_m ( ... ) __riscv_vsuxseg3ei64_v_i64m1_m(__VA_ARGS__)

◆ vsuxseg3ei64_v_i64m2

#define vsuxseg3ei64_v_i64m2 ( ... ) __riscv_vsuxseg3ei64_v_i64m2(__VA_ARGS__)

◆ vsuxseg3ei64_v_i64m2_m

#define vsuxseg3ei64_v_i64m2_m ( ... ) __riscv_vsuxseg3ei64_v_i64m2_m(__VA_ARGS__)

◆ vsuxseg3ei64_v_i8m1

#define vsuxseg3ei64_v_i8m1 ( ... ) __riscv_vsuxseg3ei64_v_i8m1(__VA_ARGS__)

◆ vsuxseg3ei64_v_i8m1_m

#define vsuxseg3ei64_v_i8m1_m ( ... ) __riscv_vsuxseg3ei64_v_i8m1_m(__VA_ARGS__)

◆ vsuxseg3ei64_v_i8mf2

#define vsuxseg3ei64_v_i8mf2 ( ... ) __riscv_vsuxseg3ei64_v_i8mf2(__VA_ARGS__)

◆ vsuxseg3ei64_v_i8mf2_m

#define vsuxseg3ei64_v_i8mf2_m ( ... ) __riscv_vsuxseg3ei64_v_i8mf2_m(__VA_ARGS__)

◆ vsuxseg3ei64_v_i8mf4

#define vsuxseg3ei64_v_i8mf4 ( ... ) __riscv_vsuxseg3ei64_v_i8mf4(__VA_ARGS__)

◆ vsuxseg3ei64_v_i8mf4_m

#define vsuxseg3ei64_v_i8mf4_m ( ... ) __riscv_vsuxseg3ei64_v_i8mf4_m(__VA_ARGS__)

◆ vsuxseg3ei64_v_i8mf8

#define vsuxseg3ei64_v_i8mf8 ( ... ) __riscv_vsuxseg3ei64_v_i8mf8(__VA_ARGS__)

◆ vsuxseg3ei64_v_i8mf8_m

#define vsuxseg3ei64_v_i8mf8_m ( ... ) __riscv_vsuxseg3ei64_v_i8mf8_m(__VA_ARGS__)

◆ vsuxseg3ei64_v_u16m1

#define vsuxseg3ei64_v_u16m1 ( ... ) __riscv_vsuxseg3ei64_v_u16m1(__VA_ARGS__)

◆ vsuxseg3ei64_v_u16m1_m

#define vsuxseg3ei64_v_u16m1_m ( ... ) __riscv_vsuxseg3ei64_v_u16m1_m(__VA_ARGS__)

◆ vsuxseg3ei64_v_u16m2

#define vsuxseg3ei64_v_u16m2 ( ... ) __riscv_vsuxseg3ei64_v_u16m2(__VA_ARGS__)

◆ vsuxseg3ei64_v_u16m2_m

#define vsuxseg3ei64_v_u16m2_m ( ... ) __riscv_vsuxseg3ei64_v_u16m2_m(__VA_ARGS__)

◆ vsuxseg3ei64_v_u16mf2

#define vsuxseg3ei64_v_u16mf2 ( ... ) __riscv_vsuxseg3ei64_v_u16mf2(__VA_ARGS__)

◆ vsuxseg3ei64_v_u16mf2_m

#define vsuxseg3ei64_v_u16mf2_m ( ... ) __riscv_vsuxseg3ei64_v_u16mf2_m(__VA_ARGS__)

◆ vsuxseg3ei64_v_u16mf4

#define vsuxseg3ei64_v_u16mf4 ( ... ) __riscv_vsuxseg3ei64_v_u16mf4(__VA_ARGS__)

◆ vsuxseg3ei64_v_u16mf4_m

#define vsuxseg3ei64_v_u16mf4_m ( ... ) __riscv_vsuxseg3ei64_v_u16mf4_m(__VA_ARGS__)

◆ vsuxseg3ei64_v_u32m1

#define vsuxseg3ei64_v_u32m1 ( ... ) __riscv_vsuxseg3ei64_v_u32m1(__VA_ARGS__)

◆ vsuxseg3ei64_v_u32m1_m

#define vsuxseg3ei64_v_u32m1_m ( ... ) __riscv_vsuxseg3ei64_v_u32m1_m(__VA_ARGS__)

◆ vsuxseg3ei64_v_u32m2

#define vsuxseg3ei64_v_u32m2 ( ... ) __riscv_vsuxseg3ei64_v_u32m2(__VA_ARGS__)

◆ vsuxseg3ei64_v_u32m2_m

#define vsuxseg3ei64_v_u32m2_m ( ... ) __riscv_vsuxseg3ei64_v_u32m2_m(__VA_ARGS__)

◆ vsuxseg3ei64_v_u32mf2

#define vsuxseg3ei64_v_u32mf2 ( ... ) __riscv_vsuxseg3ei64_v_u32mf2(__VA_ARGS__)

◆ vsuxseg3ei64_v_u32mf2_m

#define vsuxseg3ei64_v_u32mf2_m ( ... ) __riscv_vsuxseg3ei64_v_u32mf2_m(__VA_ARGS__)

◆ vsuxseg3ei64_v_u64m1

#define vsuxseg3ei64_v_u64m1 ( ... ) __riscv_vsuxseg3ei64_v_u64m1(__VA_ARGS__)

◆ vsuxseg3ei64_v_u64m1_m

#define vsuxseg3ei64_v_u64m1_m ( ... ) __riscv_vsuxseg3ei64_v_u64m1_m(__VA_ARGS__)

◆ vsuxseg3ei64_v_u64m2

#define vsuxseg3ei64_v_u64m2 ( ... ) __riscv_vsuxseg3ei64_v_u64m2(__VA_ARGS__)

◆ vsuxseg3ei64_v_u64m2_m

#define vsuxseg3ei64_v_u64m2_m ( ... ) __riscv_vsuxseg3ei64_v_u64m2_m(__VA_ARGS__)

◆ vsuxseg3ei64_v_u8m1

#define vsuxseg3ei64_v_u8m1 ( ... ) __riscv_vsuxseg3ei64_v_u8m1(__VA_ARGS__)

◆ vsuxseg3ei64_v_u8m1_m

#define vsuxseg3ei64_v_u8m1_m ( ... ) __riscv_vsuxseg3ei64_v_u8m1_m(__VA_ARGS__)

◆ vsuxseg3ei64_v_u8mf2

#define vsuxseg3ei64_v_u8mf2 ( ... ) __riscv_vsuxseg3ei64_v_u8mf2(__VA_ARGS__)

◆ vsuxseg3ei64_v_u8mf2_m

#define vsuxseg3ei64_v_u8mf2_m ( ... ) __riscv_vsuxseg3ei64_v_u8mf2_m(__VA_ARGS__)

◆ vsuxseg3ei64_v_u8mf4

#define vsuxseg3ei64_v_u8mf4 ( ... ) __riscv_vsuxseg3ei64_v_u8mf4(__VA_ARGS__)

◆ vsuxseg3ei64_v_u8mf4_m

#define vsuxseg3ei64_v_u8mf4_m ( ... ) __riscv_vsuxseg3ei64_v_u8mf4_m(__VA_ARGS__)

◆ vsuxseg3ei64_v_u8mf8

#define vsuxseg3ei64_v_u8mf8 ( ... ) __riscv_vsuxseg3ei64_v_u8mf8(__VA_ARGS__)

◆ vsuxseg3ei64_v_u8mf8_m

#define vsuxseg3ei64_v_u8mf8_m ( ... ) __riscv_vsuxseg3ei64_v_u8mf8_m(__VA_ARGS__)

◆ vsuxseg3ei8_v_f16m1

#define vsuxseg3ei8_v_f16m1 ( ... ) __riscv_vsuxseg3ei8_v_f16m1(__VA_ARGS__)

◆ vsuxseg3ei8_v_f16m1_m

#define vsuxseg3ei8_v_f16m1_m ( ... ) __riscv_vsuxseg3ei8_v_f16m1_m(__VA_ARGS__)

◆ vsuxseg3ei8_v_f16m2

#define vsuxseg3ei8_v_f16m2 ( ... ) __riscv_vsuxseg3ei8_v_f16m2(__VA_ARGS__)

◆ vsuxseg3ei8_v_f16m2_m

#define vsuxseg3ei8_v_f16m2_m ( ... ) __riscv_vsuxseg3ei8_v_f16m2_m(__VA_ARGS__)

◆ vsuxseg3ei8_v_f16mf2

#define vsuxseg3ei8_v_f16mf2 ( ... ) __riscv_vsuxseg3ei8_v_f16mf2(__VA_ARGS__)

◆ vsuxseg3ei8_v_f16mf2_m

#define vsuxseg3ei8_v_f16mf2_m ( ... ) __riscv_vsuxseg3ei8_v_f16mf2_m(__VA_ARGS__)

◆ vsuxseg3ei8_v_f16mf4

#define vsuxseg3ei8_v_f16mf4 ( ... ) __riscv_vsuxseg3ei8_v_f16mf4(__VA_ARGS__)

◆ vsuxseg3ei8_v_f16mf4_m

#define vsuxseg3ei8_v_f16mf4_m ( ... ) __riscv_vsuxseg3ei8_v_f16mf4_m(__VA_ARGS__)

◆ vsuxseg3ei8_v_f32m1

#define vsuxseg3ei8_v_f32m1 ( ... ) __riscv_vsuxseg3ei8_v_f32m1(__VA_ARGS__)

◆ vsuxseg3ei8_v_f32m1_m

#define vsuxseg3ei8_v_f32m1_m ( ... ) __riscv_vsuxseg3ei8_v_f32m1_m(__VA_ARGS__)

◆ vsuxseg3ei8_v_f32m2

#define vsuxseg3ei8_v_f32m2 ( ... ) __riscv_vsuxseg3ei8_v_f32m2(__VA_ARGS__)

◆ vsuxseg3ei8_v_f32m2_m

#define vsuxseg3ei8_v_f32m2_m ( ... ) __riscv_vsuxseg3ei8_v_f32m2_m(__VA_ARGS__)

◆ vsuxseg3ei8_v_f32mf2

#define vsuxseg3ei8_v_f32mf2 ( ... ) __riscv_vsuxseg3ei8_v_f32mf2(__VA_ARGS__)

◆ vsuxseg3ei8_v_f32mf2_m

#define vsuxseg3ei8_v_f32mf2_m ( ... ) __riscv_vsuxseg3ei8_v_f32mf2_m(__VA_ARGS__)

◆ vsuxseg3ei8_v_f64m1

#define vsuxseg3ei8_v_f64m1 ( ... ) __riscv_vsuxseg3ei8_v_f64m1(__VA_ARGS__)

◆ vsuxseg3ei8_v_f64m1_m

#define vsuxseg3ei8_v_f64m1_m ( ... ) __riscv_vsuxseg3ei8_v_f64m1_m(__VA_ARGS__)

◆ vsuxseg3ei8_v_f64m2

#define vsuxseg3ei8_v_f64m2 ( ... ) __riscv_vsuxseg3ei8_v_f64m2(__VA_ARGS__)

◆ vsuxseg3ei8_v_f64m2_m

#define vsuxseg3ei8_v_f64m2_m ( ... ) __riscv_vsuxseg3ei8_v_f64m2_m(__VA_ARGS__)

◆ vsuxseg3ei8_v_i16m1

#define vsuxseg3ei8_v_i16m1 ( ... ) __riscv_vsuxseg3ei8_v_i16m1(__VA_ARGS__)

◆ vsuxseg3ei8_v_i16m1_m

#define vsuxseg3ei8_v_i16m1_m ( ... ) __riscv_vsuxseg3ei8_v_i16m1_m(__VA_ARGS__)

◆ vsuxseg3ei8_v_i16m2

#define vsuxseg3ei8_v_i16m2 ( ... ) __riscv_vsuxseg3ei8_v_i16m2(__VA_ARGS__)

◆ vsuxseg3ei8_v_i16m2_m

#define vsuxseg3ei8_v_i16m2_m ( ... ) __riscv_vsuxseg3ei8_v_i16m2_m(__VA_ARGS__)

◆ vsuxseg3ei8_v_i16mf2

#define vsuxseg3ei8_v_i16mf2 ( ... ) __riscv_vsuxseg3ei8_v_i16mf2(__VA_ARGS__)

◆ vsuxseg3ei8_v_i16mf2_m

#define vsuxseg3ei8_v_i16mf2_m ( ... ) __riscv_vsuxseg3ei8_v_i16mf2_m(__VA_ARGS__)

◆ vsuxseg3ei8_v_i16mf4

#define vsuxseg3ei8_v_i16mf4 ( ... ) __riscv_vsuxseg3ei8_v_i16mf4(__VA_ARGS__)

◆ vsuxseg3ei8_v_i16mf4_m

#define vsuxseg3ei8_v_i16mf4_m ( ... ) __riscv_vsuxseg3ei8_v_i16mf4_m(__VA_ARGS__)

◆ vsuxseg3ei8_v_i32m1

#define vsuxseg3ei8_v_i32m1 ( ... ) __riscv_vsuxseg3ei8_v_i32m1(__VA_ARGS__)

◆ vsuxseg3ei8_v_i32m1_m

#define vsuxseg3ei8_v_i32m1_m ( ... ) __riscv_vsuxseg3ei8_v_i32m1_m(__VA_ARGS__)

◆ vsuxseg3ei8_v_i32m2

#define vsuxseg3ei8_v_i32m2 ( ... ) __riscv_vsuxseg3ei8_v_i32m2(__VA_ARGS__)

◆ vsuxseg3ei8_v_i32m2_m

#define vsuxseg3ei8_v_i32m2_m ( ... ) __riscv_vsuxseg3ei8_v_i32m2_m(__VA_ARGS__)

◆ vsuxseg3ei8_v_i32mf2

#define vsuxseg3ei8_v_i32mf2 ( ... ) __riscv_vsuxseg3ei8_v_i32mf2(__VA_ARGS__)

◆ vsuxseg3ei8_v_i32mf2_m

#define vsuxseg3ei8_v_i32mf2_m ( ... ) __riscv_vsuxseg3ei8_v_i32mf2_m(__VA_ARGS__)

◆ vsuxseg3ei8_v_i64m1

#define vsuxseg3ei8_v_i64m1 ( ... ) __riscv_vsuxseg3ei8_v_i64m1(__VA_ARGS__)

◆ vsuxseg3ei8_v_i64m1_m

#define vsuxseg3ei8_v_i64m1_m ( ... ) __riscv_vsuxseg3ei8_v_i64m1_m(__VA_ARGS__)

◆ vsuxseg3ei8_v_i64m2

#define vsuxseg3ei8_v_i64m2 ( ... ) __riscv_vsuxseg3ei8_v_i64m2(__VA_ARGS__)

◆ vsuxseg3ei8_v_i64m2_m

#define vsuxseg3ei8_v_i64m2_m ( ... ) __riscv_vsuxseg3ei8_v_i64m2_m(__VA_ARGS__)

◆ vsuxseg3ei8_v_i8m1

#define vsuxseg3ei8_v_i8m1 ( ... ) __riscv_vsuxseg3ei8_v_i8m1(__VA_ARGS__)

◆ vsuxseg3ei8_v_i8m1_m

#define vsuxseg3ei8_v_i8m1_m ( ... ) __riscv_vsuxseg3ei8_v_i8m1_m(__VA_ARGS__)

◆ vsuxseg3ei8_v_i8m2

#define vsuxseg3ei8_v_i8m2 ( ... ) __riscv_vsuxseg3ei8_v_i8m2(__VA_ARGS__)

◆ vsuxseg3ei8_v_i8m2_m

#define vsuxseg3ei8_v_i8m2_m ( ... ) __riscv_vsuxseg3ei8_v_i8m2_m(__VA_ARGS__)

◆ vsuxseg3ei8_v_i8mf2

#define vsuxseg3ei8_v_i8mf2 ( ... ) __riscv_vsuxseg3ei8_v_i8mf2(__VA_ARGS__)

◆ vsuxseg3ei8_v_i8mf2_m

#define vsuxseg3ei8_v_i8mf2_m ( ... ) __riscv_vsuxseg3ei8_v_i8mf2_m(__VA_ARGS__)

◆ vsuxseg3ei8_v_i8mf4

#define vsuxseg3ei8_v_i8mf4 ( ... ) __riscv_vsuxseg3ei8_v_i8mf4(__VA_ARGS__)

◆ vsuxseg3ei8_v_i8mf4_m

#define vsuxseg3ei8_v_i8mf4_m ( ... ) __riscv_vsuxseg3ei8_v_i8mf4_m(__VA_ARGS__)

◆ vsuxseg3ei8_v_i8mf8

#define vsuxseg3ei8_v_i8mf8 ( ... ) __riscv_vsuxseg3ei8_v_i8mf8(__VA_ARGS__)

◆ vsuxseg3ei8_v_i8mf8_m

#define vsuxseg3ei8_v_i8mf8_m ( ... ) __riscv_vsuxseg3ei8_v_i8mf8_m(__VA_ARGS__)

◆ vsuxseg3ei8_v_u16m1

#define vsuxseg3ei8_v_u16m1 ( ... ) __riscv_vsuxseg3ei8_v_u16m1(__VA_ARGS__)

◆ vsuxseg3ei8_v_u16m1_m

#define vsuxseg3ei8_v_u16m1_m ( ... ) __riscv_vsuxseg3ei8_v_u16m1_m(__VA_ARGS__)

◆ vsuxseg3ei8_v_u16m2

#define vsuxseg3ei8_v_u16m2 ( ... ) __riscv_vsuxseg3ei8_v_u16m2(__VA_ARGS__)

◆ vsuxseg3ei8_v_u16m2_m

#define vsuxseg3ei8_v_u16m2_m ( ... ) __riscv_vsuxseg3ei8_v_u16m2_m(__VA_ARGS__)

◆ vsuxseg3ei8_v_u16mf2

#define vsuxseg3ei8_v_u16mf2 ( ... ) __riscv_vsuxseg3ei8_v_u16mf2(__VA_ARGS__)

◆ vsuxseg3ei8_v_u16mf2_m

#define vsuxseg3ei8_v_u16mf2_m ( ... ) __riscv_vsuxseg3ei8_v_u16mf2_m(__VA_ARGS__)

◆ vsuxseg3ei8_v_u16mf4

#define vsuxseg3ei8_v_u16mf4 ( ... ) __riscv_vsuxseg3ei8_v_u16mf4(__VA_ARGS__)

◆ vsuxseg3ei8_v_u16mf4_m

#define vsuxseg3ei8_v_u16mf4_m ( ... ) __riscv_vsuxseg3ei8_v_u16mf4_m(__VA_ARGS__)

◆ vsuxseg3ei8_v_u32m1

#define vsuxseg3ei8_v_u32m1 ( ... ) __riscv_vsuxseg3ei8_v_u32m1(__VA_ARGS__)

◆ vsuxseg3ei8_v_u32m1_m

#define vsuxseg3ei8_v_u32m1_m ( ... ) __riscv_vsuxseg3ei8_v_u32m1_m(__VA_ARGS__)

◆ vsuxseg3ei8_v_u32m2

#define vsuxseg3ei8_v_u32m2 ( ... ) __riscv_vsuxseg3ei8_v_u32m2(__VA_ARGS__)

◆ vsuxseg3ei8_v_u32m2_m

#define vsuxseg3ei8_v_u32m2_m ( ... ) __riscv_vsuxseg3ei8_v_u32m2_m(__VA_ARGS__)

◆ vsuxseg3ei8_v_u32mf2

#define vsuxseg3ei8_v_u32mf2 ( ... ) __riscv_vsuxseg3ei8_v_u32mf2(__VA_ARGS__)

◆ vsuxseg3ei8_v_u32mf2_m

#define vsuxseg3ei8_v_u32mf2_m ( ... ) __riscv_vsuxseg3ei8_v_u32mf2_m(__VA_ARGS__)

◆ vsuxseg3ei8_v_u64m1

#define vsuxseg3ei8_v_u64m1 ( ... ) __riscv_vsuxseg3ei8_v_u64m1(__VA_ARGS__)

◆ vsuxseg3ei8_v_u64m1_m

#define vsuxseg3ei8_v_u64m1_m ( ... ) __riscv_vsuxseg3ei8_v_u64m1_m(__VA_ARGS__)

◆ vsuxseg3ei8_v_u64m2

#define vsuxseg3ei8_v_u64m2 ( ... ) __riscv_vsuxseg3ei8_v_u64m2(__VA_ARGS__)

◆ vsuxseg3ei8_v_u64m2_m

#define vsuxseg3ei8_v_u64m2_m ( ... ) __riscv_vsuxseg3ei8_v_u64m2_m(__VA_ARGS__)

◆ vsuxseg3ei8_v_u8m1

#define vsuxseg3ei8_v_u8m1 ( ... ) __riscv_vsuxseg3ei8_v_u8m1(__VA_ARGS__)

◆ vsuxseg3ei8_v_u8m1_m

#define vsuxseg3ei8_v_u8m1_m ( ... ) __riscv_vsuxseg3ei8_v_u8m1_m(__VA_ARGS__)

◆ vsuxseg3ei8_v_u8m2

#define vsuxseg3ei8_v_u8m2 ( ... ) __riscv_vsuxseg3ei8_v_u8m2(__VA_ARGS__)

◆ vsuxseg3ei8_v_u8m2_m

#define vsuxseg3ei8_v_u8m2_m ( ... ) __riscv_vsuxseg3ei8_v_u8m2_m(__VA_ARGS__)

◆ vsuxseg3ei8_v_u8mf2

#define vsuxseg3ei8_v_u8mf2 ( ... ) __riscv_vsuxseg3ei8_v_u8mf2(__VA_ARGS__)

◆ vsuxseg3ei8_v_u8mf2_m

#define vsuxseg3ei8_v_u8mf2_m ( ... ) __riscv_vsuxseg3ei8_v_u8mf2_m(__VA_ARGS__)

◆ vsuxseg3ei8_v_u8mf4

#define vsuxseg3ei8_v_u8mf4 ( ... ) __riscv_vsuxseg3ei8_v_u8mf4(__VA_ARGS__)

◆ vsuxseg3ei8_v_u8mf4_m

#define vsuxseg3ei8_v_u8mf4_m ( ... ) __riscv_vsuxseg3ei8_v_u8mf4_m(__VA_ARGS__)

◆ vsuxseg3ei8_v_u8mf8

#define vsuxseg3ei8_v_u8mf8 ( ... ) __riscv_vsuxseg3ei8_v_u8mf8(__VA_ARGS__)

◆ vsuxseg3ei8_v_u8mf8_m

#define vsuxseg3ei8_v_u8mf8_m ( ... ) __riscv_vsuxseg3ei8_v_u8mf8_m(__VA_ARGS__)

◆ vsuxseg4ei16_v_f16m1

#define vsuxseg4ei16_v_f16m1 ( ... ) __riscv_vsuxseg4ei16_v_f16m1(__VA_ARGS__)

◆ vsuxseg4ei16_v_f16m1_m

#define vsuxseg4ei16_v_f16m1_m ( ... ) __riscv_vsuxseg4ei16_v_f16m1_m(__VA_ARGS__)

◆ vsuxseg4ei16_v_f16m2

#define vsuxseg4ei16_v_f16m2 ( ... ) __riscv_vsuxseg4ei16_v_f16m2(__VA_ARGS__)

◆ vsuxseg4ei16_v_f16m2_m

#define vsuxseg4ei16_v_f16m2_m ( ... ) __riscv_vsuxseg4ei16_v_f16m2_m(__VA_ARGS__)

◆ vsuxseg4ei16_v_f16mf2

#define vsuxseg4ei16_v_f16mf2 ( ... ) __riscv_vsuxseg4ei16_v_f16mf2(__VA_ARGS__)

◆ vsuxseg4ei16_v_f16mf2_m

#define vsuxseg4ei16_v_f16mf2_m ( ... ) __riscv_vsuxseg4ei16_v_f16mf2_m(__VA_ARGS__)

◆ vsuxseg4ei16_v_f16mf4

#define vsuxseg4ei16_v_f16mf4 ( ... ) __riscv_vsuxseg4ei16_v_f16mf4(__VA_ARGS__)

◆ vsuxseg4ei16_v_f16mf4_m

#define vsuxseg4ei16_v_f16mf4_m ( ... ) __riscv_vsuxseg4ei16_v_f16mf4_m(__VA_ARGS__)

◆ vsuxseg4ei16_v_f32m1

#define vsuxseg4ei16_v_f32m1 ( ... ) __riscv_vsuxseg4ei16_v_f32m1(__VA_ARGS__)

◆ vsuxseg4ei16_v_f32m1_m

#define vsuxseg4ei16_v_f32m1_m ( ... ) __riscv_vsuxseg4ei16_v_f32m1_m(__VA_ARGS__)

◆ vsuxseg4ei16_v_f32m2

#define vsuxseg4ei16_v_f32m2 ( ... ) __riscv_vsuxseg4ei16_v_f32m2(__VA_ARGS__)

◆ vsuxseg4ei16_v_f32m2_m

#define vsuxseg4ei16_v_f32m2_m ( ... ) __riscv_vsuxseg4ei16_v_f32m2_m(__VA_ARGS__)

◆ vsuxseg4ei16_v_f32mf2

#define vsuxseg4ei16_v_f32mf2 ( ... ) __riscv_vsuxseg4ei16_v_f32mf2(__VA_ARGS__)

◆ vsuxseg4ei16_v_f32mf2_m

#define vsuxseg4ei16_v_f32mf2_m ( ... ) __riscv_vsuxseg4ei16_v_f32mf2_m(__VA_ARGS__)

◆ vsuxseg4ei16_v_f64m1

#define vsuxseg4ei16_v_f64m1 ( ... ) __riscv_vsuxseg4ei16_v_f64m1(__VA_ARGS__)

◆ vsuxseg4ei16_v_f64m1_m

#define vsuxseg4ei16_v_f64m1_m ( ... ) __riscv_vsuxseg4ei16_v_f64m1_m(__VA_ARGS__)

◆ vsuxseg4ei16_v_f64m2

#define vsuxseg4ei16_v_f64m2 ( ... ) __riscv_vsuxseg4ei16_v_f64m2(__VA_ARGS__)

◆ vsuxseg4ei16_v_f64m2_m

#define vsuxseg4ei16_v_f64m2_m ( ... ) __riscv_vsuxseg4ei16_v_f64m2_m(__VA_ARGS__)

◆ vsuxseg4ei16_v_i16m1

#define vsuxseg4ei16_v_i16m1 ( ... ) __riscv_vsuxseg4ei16_v_i16m1(__VA_ARGS__)

◆ vsuxseg4ei16_v_i16m1_m

#define vsuxseg4ei16_v_i16m1_m ( ... ) __riscv_vsuxseg4ei16_v_i16m1_m(__VA_ARGS__)

◆ vsuxseg4ei16_v_i16m2

#define vsuxseg4ei16_v_i16m2 ( ... ) __riscv_vsuxseg4ei16_v_i16m2(__VA_ARGS__)

◆ vsuxseg4ei16_v_i16m2_m

#define vsuxseg4ei16_v_i16m2_m ( ... ) __riscv_vsuxseg4ei16_v_i16m2_m(__VA_ARGS__)

◆ vsuxseg4ei16_v_i16mf2

#define vsuxseg4ei16_v_i16mf2 ( ... ) __riscv_vsuxseg4ei16_v_i16mf2(__VA_ARGS__)

◆ vsuxseg4ei16_v_i16mf2_m

#define vsuxseg4ei16_v_i16mf2_m ( ... ) __riscv_vsuxseg4ei16_v_i16mf2_m(__VA_ARGS__)

◆ vsuxseg4ei16_v_i16mf4

#define vsuxseg4ei16_v_i16mf4 ( ... ) __riscv_vsuxseg4ei16_v_i16mf4(__VA_ARGS__)

◆ vsuxseg4ei16_v_i16mf4_m

#define vsuxseg4ei16_v_i16mf4_m ( ... ) __riscv_vsuxseg4ei16_v_i16mf4_m(__VA_ARGS__)

◆ vsuxseg4ei16_v_i32m1

#define vsuxseg4ei16_v_i32m1 ( ... ) __riscv_vsuxseg4ei16_v_i32m1(__VA_ARGS__)

◆ vsuxseg4ei16_v_i32m1_m

#define vsuxseg4ei16_v_i32m1_m ( ... ) __riscv_vsuxseg4ei16_v_i32m1_m(__VA_ARGS__)

◆ vsuxseg4ei16_v_i32m2

#define vsuxseg4ei16_v_i32m2 ( ... ) __riscv_vsuxseg4ei16_v_i32m2(__VA_ARGS__)

◆ vsuxseg4ei16_v_i32m2_m

#define vsuxseg4ei16_v_i32m2_m ( ... ) __riscv_vsuxseg4ei16_v_i32m2_m(__VA_ARGS__)

◆ vsuxseg4ei16_v_i32mf2

#define vsuxseg4ei16_v_i32mf2 ( ... ) __riscv_vsuxseg4ei16_v_i32mf2(__VA_ARGS__)

◆ vsuxseg4ei16_v_i32mf2_m

#define vsuxseg4ei16_v_i32mf2_m ( ... ) __riscv_vsuxseg4ei16_v_i32mf2_m(__VA_ARGS__)

◆ vsuxseg4ei16_v_i64m1

#define vsuxseg4ei16_v_i64m1 ( ... ) __riscv_vsuxseg4ei16_v_i64m1(__VA_ARGS__)

◆ vsuxseg4ei16_v_i64m1_m

#define vsuxseg4ei16_v_i64m1_m ( ... ) __riscv_vsuxseg4ei16_v_i64m1_m(__VA_ARGS__)

◆ vsuxseg4ei16_v_i64m2

#define vsuxseg4ei16_v_i64m2 ( ... ) __riscv_vsuxseg4ei16_v_i64m2(__VA_ARGS__)

◆ vsuxseg4ei16_v_i64m2_m

#define vsuxseg4ei16_v_i64m2_m ( ... ) __riscv_vsuxseg4ei16_v_i64m2_m(__VA_ARGS__)

◆ vsuxseg4ei16_v_i8m1

#define vsuxseg4ei16_v_i8m1 ( ... ) __riscv_vsuxseg4ei16_v_i8m1(__VA_ARGS__)

◆ vsuxseg4ei16_v_i8m1_m

#define vsuxseg4ei16_v_i8m1_m ( ... ) __riscv_vsuxseg4ei16_v_i8m1_m(__VA_ARGS__)

◆ vsuxseg4ei16_v_i8m2

#define vsuxseg4ei16_v_i8m2 ( ... ) __riscv_vsuxseg4ei16_v_i8m2(__VA_ARGS__)

◆ vsuxseg4ei16_v_i8m2_m

#define vsuxseg4ei16_v_i8m2_m ( ... ) __riscv_vsuxseg4ei16_v_i8m2_m(__VA_ARGS__)

◆ vsuxseg4ei16_v_i8mf2

#define vsuxseg4ei16_v_i8mf2 ( ... ) __riscv_vsuxseg4ei16_v_i8mf2(__VA_ARGS__)

◆ vsuxseg4ei16_v_i8mf2_m

#define vsuxseg4ei16_v_i8mf2_m ( ... ) __riscv_vsuxseg4ei16_v_i8mf2_m(__VA_ARGS__)

◆ vsuxseg4ei16_v_i8mf4

#define vsuxseg4ei16_v_i8mf4 ( ... ) __riscv_vsuxseg4ei16_v_i8mf4(__VA_ARGS__)

◆ vsuxseg4ei16_v_i8mf4_m

#define vsuxseg4ei16_v_i8mf4_m ( ... ) __riscv_vsuxseg4ei16_v_i8mf4_m(__VA_ARGS__)

◆ vsuxseg4ei16_v_i8mf8

#define vsuxseg4ei16_v_i8mf8 ( ... ) __riscv_vsuxseg4ei16_v_i8mf8(__VA_ARGS__)

◆ vsuxseg4ei16_v_i8mf8_m

#define vsuxseg4ei16_v_i8mf8_m ( ... ) __riscv_vsuxseg4ei16_v_i8mf8_m(__VA_ARGS__)

◆ vsuxseg4ei16_v_u16m1

#define vsuxseg4ei16_v_u16m1 ( ... ) __riscv_vsuxseg4ei16_v_u16m1(__VA_ARGS__)

◆ vsuxseg4ei16_v_u16m1_m

#define vsuxseg4ei16_v_u16m1_m ( ... ) __riscv_vsuxseg4ei16_v_u16m1_m(__VA_ARGS__)

◆ vsuxseg4ei16_v_u16m2

#define vsuxseg4ei16_v_u16m2 ( ... ) __riscv_vsuxseg4ei16_v_u16m2(__VA_ARGS__)

◆ vsuxseg4ei16_v_u16m2_m

#define vsuxseg4ei16_v_u16m2_m ( ... ) __riscv_vsuxseg4ei16_v_u16m2_m(__VA_ARGS__)

◆ vsuxseg4ei16_v_u16mf2

#define vsuxseg4ei16_v_u16mf2 ( ... ) __riscv_vsuxseg4ei16_v_u16mf2(__VA_ARGS__)

◆ vsuxseg4ei16_v_u16mf2_m

#define vsuxseg4ei16_v_u16mf2_m ( ... ) __riscv_vsuxseg4ei16_v_u16mf2_m(__VA_ARGS__)

◆ vsuxseg4ei16_v_u16mf4

#define vsuxseg4ei16_v_u16mf4 ( ... ) __riscv_vsuxseg4ei16_v_u16mf4(__VA_ARGS__)

◆ vsuxseg4ei16_v_u16mf4_m

#define vsuxseg4ei16_v_u16mf4_m ( ... ) __riscv_vsuxseg4ei16_v_u16mf4_m(__VA_ARGS__)

◆ vsuxseg4ei16_v_u32m1

#define vsuxseg4ei16_v_u32m1 ( ... ) __riscv_vsuxseg4ei16_v_u32m1(__VA_ARGS__)

◆ vsuxseg4ei16_v_u32m1_m

#define vsuxseg4ei16_v_u32m1_m ( ... ) __riscv_vsuxseg4ei16_v_u32m1_m(__VA_ARGS__)

◆ vsuxseg4ei16_v_u32m2

#define vsuxseg4ei16_v_u32m2 ( ... ) __riscv_vsuxseg4ei16_v_u32m2(__VA_ARGS__)

◆ vsuxseg4ei16_v_u32m2_m

#define vsuxseg4ei16_v_u32m2_m ( ... ) __riscv_vsuxseg4ei16_v_u32m2_m(__VA_ARGS__)

◆ vsuxseg4ei16_v_u32mf2

#define vsuxseg4ei16_v_u32mf2 ( ... ) __riscv_vsuxseg4ei16_v_u32mf2(__VA_ARGS__)

◆ vsuxseg4ei16_v_u32mf2_m

#define vsuxseg4ei16_v_u32mf2_m ( ... ) __riscv_vsuxseg4ei16_v_u32mf2_m(__VA_ARGS__)

◆ vsuxseg4ei16_v_u64m1

#define vsuxseg4ei16_v_u64m1 ( ... ) __riscv_vsuxseg4ei16_v_u64m1(__VA_ARGS__)

◆ vsuxseg4ei16_v_u64m1_m

#define vsuxseg4ei16_v_u64m1_m ( ... ) __riscv_vsuxseg4ei16_v_u64m1_m(__VA_ARGS__)

◆ vsuxseg4ei16_v_u64m2

#define vsuxseg4ei16_v_u64m2 ( ... ) __riscv_vsuxseg4ei16_v_u64m2(__VA_ARGS__)

◆ vsuxseg4ei16_v_u64m2_m

#define vsuxseg4ei16_v_u64m2_m ( ... ) __riscv_vsuxseg4ei16_v_u64m2_m(__VA_ARGS__)

◆ vsuxseg4ei16_v_u8m1

#define vsuxseg4ei16_v_u8m1 ( ... ) __riscv_vsuxseg4ei16_v_u8m1(__VA_ARGS__)

◆ vsuxseg4ei16_v_u8m1_m

#define vsuxseg4ei16_v_u8m1_m ( ... ) __riscv_vsuxseg4ei16_v_u8m1_m(__VA_ARGS__)

◆ vsuxseg4ei16_v_u8m2

#define vsuxseg4ei16_v_u8m2 ( ... ) __riscv_vsuxseg4ei16_v_u8m2(__VA_ARGS__)

◆ vsuxseg4ei16_v_u8m2_m

#define vsuxseg4ei16_v_u8m2_m ( ... ) __riscv_vsuxseg4ei16_v_u8m2_m(__VA_ARGS__)

◆ vsuxseg4ei16_v_u8mf2

#define vsuxseg4ei16_v_u8mf2 ( ... ) __riscv_vsuxseg4ei16_v_u8mf2(__VA_ARGS__)

◆ vsuxseg4ei16_v_u8mf2_m

#define vsuxseg4ei16_v_u8mf2_m ( ... ) __riscv_vsuxseg4ei16_v_u8mf2_m(__VA_ARGS__)

◆ vsuxseg4ei16_v_u8mf4

#define vsuxseg4ei16_v_u8mf4 ( ... ) __riscv_vsuxseg4ei16_v_u8mf4(__VA_ARGS__)

◆ vsuxseg4ei16_v_u8mf4_m

#define vsuxseg4ei16_v_u8mf4_m ( ... ) __riscv_vsuxseg4ei16_v_u8mf4_m(__VA_ARGS__)

◆ vsuxseg4ei16_v_u8mf8

#define vsuxseg4ei16_v_u8mf8 ( ... ) __riscv_vsuxseg4ei16_v_u8mf8(__VA_ARGS__)

◆ vsuxseg4ei16_v_u8mf8_m

#define vsuxseg4ei16_v_u8mf8_m ( ... ) __riscv_vsuxseg4ei16_v_u8mf8_m(__VA_ARGS__)

◆ vsuxseg4ei32_v_f16m1

#define vsuxseg4ei32_v_f16m1 ( ... ) __riscv_vsuxseg4ei32_v_f16m1(__VA_ARGS__)

◆ vsuxseg4ei32_v_f16m1_m

#define vsuxseg4ei32_v_f16m1_m ( ... ) __riscv_vsuxseg4ei32_v_f16m1_m(__VA_ARGS__)

◆ vsuxseg4ei32_v_f16m2

#define vsuxseg4ei32_v_f16m2 ( ... ) __riscv_vsuxseg4ei32_v_f16m2(__VA_ARGS__)

◆ vsuxseg4ei32_v_f16m2_m

#define vsuxseg4ei32_v_f16m2_m ( ... ) __riscv_vsuxseg4ei32_v_f16m2_m(__VA_ARGS__)

◆ vsuxseg4ei32_v_f16mf2

#define vsuxseg4ei32_v_f16mf2 ( ... ) __riscv_vsuxseg4ei32_v_f16mf2(__VA_ARGS__)

◆ vsuxseg4ei32_v_f16mf2_m

#define vsuxseg4ei32_v_f16mf2_m ( ... ) __riscv_vsuxseg4ei32_v_f16mf2_m(__VA_ARGS__)

◆ vsuxseg4ei32_v_f16mf4

#define vsuxseg4ei32_v_f16mf4 ( ... ) __riscv_vsuxseg4ei32_v_f16mf4(__VA_ARGS__)

◆ vsuxseg4ei32_v_f16mf4_m

#define vsuxseg4ei32_v_f16mf4_m ( ... ) __riscv_vsuxseg4ei32_v_f16mf4_m(__VA_ARGS__)

◆ vsuxseg4ei32_v_f32m1

#define vsuxseg4ei32_v_f32m1 ( ... ) __riscv_vsuxseg4ei32_v_f32m1(__VA_ARGS__)

◆ vsuxseg4ei32_v_f32m1_m

#define vsuxseg4ei32_v_f32m1_m ( ... ) __riscv_vsuxseg4ei32_v_f32m1_m(__VA_ARGS__)

◆ vsuxseg4ei32_v_f32m2

#define vsuxseg4ei32_v_f32m2 ( ... ) __riscv_vsuxseg4ei32_v_f32m2(__VA_ARGS__)

◆ vsuxseg4ei32_v_f32m2_m

#define vsuxseg4ei32_v_f32m2_m ( ... ) __riscv_vsuxseg4ei32_v_f32m2_m(__VA_ARGS__)

◆ vsuxseg4ei32_v_f32mf2

#define vsuxseg4ei32_v_f32mf2 ( ... ) __riscv_vsuxseg4ei32_v_f32mf2(__VA_ARGS__)

◆ vsuxseg4ei32_v_f32mf2_m

#define vsuxseg4ei32_v_f32mf2_m ( ... ) __riscv_vsuxseg4ei32_v_f32mf2_m(__VA_ARGS__)

◆ vsuxseg4ei32_v_f64m1

#define vsuxseg4ei32_v_f64m1 ( ... ) __riscv_vsuxseg4ei32_v_f64m1(__VA_ARGS__)

◆ vsuxseg4ei32_v_f64m1_m

#define vsuxseg4ei32_v_f64m1_m ( ... ) __riscv_vsuxseg4ei32_v_f64m1_m(__VA_ARGS__)

◆ vsuxseg4ei32_v_f64m2

#define vsuxseg4ei32_v_f64m2 ( ... ) __riscv_vsuxseg4ei32_v_f64m2(__VA_ARGS__)

◆ vsuxseg4ei32_v_f64m2_m

#define vsuxseg4ei32_v_f64m2_m ( ... ) __riscv_vsuxseg4ei32_v_f64m2_m(__VA_ARGS__)

◆ vsuxseg4ei32_v_i16m1

#define vsuxseg4ei32_v_i16m1 ( ... ) __riscv_vsuxseg4ei32_v_i16m1(__VA_ARGS__)

◆ vsuxseg4ei32_v_i16m1_m

#define vsuxseg4ei32_v_i16m1_m ( ... ) __riscv_vsuxseg4ei32_v_i16m1_m(__VA_ARGS__)

◆ vsuxseg4ei32_v_i16m2

#define vsuxseg4ei32_v_i16m2 ( ... ) __riscv_vsuxseg4ei32_v_i16m2(__VA_ARGS__)

◆ vsuxseg4ei32_v_i16m2_m

#define vsuxseg4ei32_v_i16m2_m ( ... ) __riscv_vsuxseg4ei32_v_i16m2_m(__VA_ARGS__)

◆ vsuxseg4ei32_v_i16mf2

#define vsuxseg4ei32_v_i16mf2 ( ... ) __riscv_vsuxseg4ei32_v_i16mf2(__VA_ARGS__)

◆ vsuxseg4ei32_v_i16mf2_m

#define vsuxseg4ei32_v_i16mf2_m ( ... ) __riscv_vsuxseg4ei32_v_i16mf2_m(__VA_ARGS__)

◆ vsuxseg4ei32_v_i16mf4

#define vsuxseg4ei32_v_i16mf4 ( ... ) __riscv_vsuxseg4ei32_v_i16mf4(__VA_ARGS__)

◆ vsuxseg4ei32_v_i16mf4_m

#define vsuxseg4ei32_v_i16mf4_m ( ... ) __riscv_vsuxseg4ei32_v_i16mf4_m(__VA_ARGS__)

◆ vsuxseg4ei32_v_i32m1

#define vsuxseg4ei32_v_i32m1 ( ... ) __riscv_vsuxseg4ei32_v_i32m1(__VA_ARGS__)

◆ vsuxseg4ei32_v_i32m1_m

#define vsuxseg4ei32_v_i32m1_m ( ... ) __riscv_vsuxseg4ei32_v_i32m1_m(__VA_ARGS__)

◆ vsuxseg4ei32_v_i32m2

#define vsuxseg4ei32_v_i32m2 ( ... ) __riscv_vsuxseg4ei32_v_i32m2(__VA_ARGS__)

◆ vsuxseg4ei32_v_i32m2_m

#define vsuxseg4ei32_v_i32m2_m ( ... ) __riscv_vsuxseg4ei32_v_i32m2_m(__VA_ARGS__)

◆ vsuxseg4ei32_v_i32mf2

#define vsuxseg4ei32_v_i32mf2 ( ... ) __riscv_vsuxseg4ei32_v_i32mf2(__VA_ARGS__)

◆ vsuxseg4ei32_v_i32mf2_m

#define vsuxseg4ei32_v_i32mf2_m ( ... ) __riscv_vsuxseg4ei32_v_i32mf2_m(__VA_ARGS__)

◆ vsuxseg4ei32_v_i64m1

#define vsuxseg4ei32_v_i64m1 ( ... ) __riscv_vsuxseg4ei32_v_i64m1(__VA_ARGS__)

◆ vsuxseg4ei32_v_i64m1_m

#define vsuxseg4ei32_v_i64m1_m ( ... ) __riscv_vsuxseg4ei32_v_i64m1_m(__VA_ARGS__)

◆ vsuxseg4ei32_v_i64m2

#define vsuxseg4ei32_v_i64m2 ( ... ) __riscv_vsuxseg4ei32_v_i64m2(__VA_ARGS__)

◆ vsuxseg4ei32_v_i64m2_m

#define vsuxseg4ei32_v_i64m2_m ( ... ) __riscv_vsuxseg4ei32_v_i64m2_m(__VA_ARGS__)

◆ vsuxseg4ei32_v_i8m1

#define vsuxseg4ei32_v_i8m1 ( ... ) __riscv_vsuxseg4ei32_v_i8m1(__VA_ARGS__)

◆ vsuxseg4ei32_v_i8m1_m

#define vsuxseg4ei32_v_i8m1_m ( ... ) __riscv_vsuxseg4ei32_v_i8m1_m(__VA_ARGS__)

◆ vsuxseg4ei32_v_i8m2

#define vsuxseg4ei32_v_i8m2 ( ... ) __riscv_vsuxseg4ei32_v_i8m2(__VA_ARGS__)

◆ vsuxseg4ei32_v_i8m2_m

#define vsuxseg4ei32_v_i8m2_m ( ... ) __riscv_vsuxseg4ei32_v_i8m2_m(__VA_ARGS__)

◆ vsuxseg4ei32_v_i8mf2

#define vsuxseg4ei32_v_i8mf2 ( ... ) __riscv_vsuxseg4ei32_v_i8mf2(__VA_ARGS__)

◆ vsuxseg4ei32_v_i8mf2_m

#define vsuxseg4ei32_v_i8mf2_m ( ... ) __riscv_vsuxseg4ei32_v_i8mf2_m(__VA_ARGS__)

◆ vsuxseg4ei32_v_i8mf4

#define vsuxseg4ei32_v_i8mf4 ( ... ) __riscv_vsuxseg4ei32_v_i8mf4(__VA_ARGS__)

◆ vsuxseg4ei32_v_i8mf4_m

#define vsuxseg4ei32_v_i8mf4_m ( ... ) __riscv_vsuxseg4ei32_v_i8mf4_m(__VA_ARGS__)

◆ vsuxseg4ei32_v_i8mf8

#define vsuxseg4ei32_v_i8mf8 ( ... ) __riscv_vsuxseg4ei32_v_i8mf8(__VA_ARGS__)

◆ vsuxseg4ei32_v_i8mf8_m

#define vsuxseg4ei32_v_i8mf8_m ( ... ) __riscv_vsuxseg4ei32_v_i8mf8_m(__VA_ARGS__)

◆ vsuxseg4ei32_v_u16m1

#define vsuxseg4ei32_v_u16m1 ( ... ) __riscv_vsuxseg4ei32_v_u16m1(__VA_ARGS__)

◆ vsuxseg4ei32_v_u16m1_m

#define vsuxseg4ei32_v_u16m1_m ( ... ) __riscv_vsuxseg4ei32_v_u16m1_m(__VA_ARGS__)

◆ vsuxseg4ei32_v_u16m2

#define vsuxseg4ei32_v_u16m2 ( ... ) __riscv_vsuxseg4ei32_v_u16m2(__VA_ARGS__)

◆ vsuxseg4ei32_v_u16m2_m

#define vsuxseg4ei32_v_u16m2_m ( ... ) __riscv_vsuxseg4ei32_v_u16m2_m(__VA_ARGS__)

◆ vsuxseg4ei32_v_u16mf2

#define vsuxseg4ei32_v_u16mf2 ( ... ) __riscv_vsuxseg4ei32_v_u16mf2(__VA_ARGS__)

◆ vsuxseg4ei32_v_u16mf2_m

#define vsuxseg4ei32_v_u16mf2_m ( ... ) __riscv_vsuxseg4ei32_v_u16mf2_m(__VA_ARGS__)

◆ vsuxseg4ei32_v_u16mf4

#define vsuxseg4ei32_v_u16mf4 ( ... ) __riscv_vsuxseg4ei32_v_u16mf4(__VA_ARGS__)

◆ vsuxseg4ei32_v_u16mf4_m

#define vsuxseg4ei32_v_u16mf4_m ( ... ) __riscv_vsuxseg4ei32_v_u16mf4_m(__VA_ARGS__)

◆ vsuxseg4ei32_v_u32m1

#define vsuxseg4ei32_v_u32m1 ( ... ) __riscv_vsuxseg4ei32_v_u32m1(__VA_ARGS__)

◆ vsuxseg4ei32_v_u32m1_m

#define vsuxseg4ei32_v_u32m1_m ( ... ) __riscv_vsuxseg4ei32_v_u32m1_m(__VA_ARGS__)

◆ vsuxseg4ei32_v_u32m2

#define vsuxseg4ei32_v_u32m2 ( ... ) __riscv_vsuxseg4ei32_v_u32m2(__VA_ARGS__)

◆ vsuxseg4ei32_v_u32m2_m

#define vsuxseg4ei32_v_u32m2_m ( ... ) __riscv_vsuxseg4ei32_v_u32m2_m(__VA_ARGS__)

◆ vsuxseg4ei32_v_u32mf2

#define vsuxseg4ei32_v_u32mf2 ( ... ) __riscv_vsuxseg4ei32_v_u32mf2(__VA_ARGS__)

◆ vsuxseg4ei32_v_u32mf2_m

#define vsuxseg4ei32_v_u32mf2_m ( ... ) __riscv_vsuxseg4ei32_v_u32mf2_m(__VA_ARGS__)

◆ vsuxseg4ei32_v_u64m1

#define vsuxseg4ei32_v_u64m1 ( ... ) __riscv_vsuxseg4ei32_v_u64m1(__VA_ARGS__)

◆ vsuxseg4ei32_v_u64m1_m

#define vsuxseg4ei32_v_u64m1_m ( ... ) __riscv_vsuxseg4ei32_v_u64m1_m(__VA_ARGS__)

◆ vsuxseg4ei32_v_u64m2

#define vsuxseg4ei32_v_u64m2 ( ... ) __riscv_vsuxseg4ei32_v_u64m2(__VA_ARGS__)

◆ vsuxseg4ei32_v_u64m2_m

#define vsuxseg4ei32_v_u64m2_m ( ... ) __riscv_vsuxseg4ei32_v_u64m2_m(__VA_ARGS__)

◆ vsuxseg4ei32_v_u8m1

#define vsuxseg4ei32_v_u8m1 ( ... ) __riscv_vsuxseg4ei32_v_u8m1(__VA_ARGS__)

◆ vsuxseg4ei32_v_u8m1_m

#define vsuxseg4ei32_v_u8m1_m ( ... ) __riscv_vsuxseg4ei32_v_u8m1_m(__VA_ARGS__)

◆ vsuxseg4ei32_v_u8m2

#define vsuxseg4ei32_v_u8m2 ( ... ) __riscv_vsuxseg4ei32_v_u8m2(__VA_ARGS__)

◆ vsuxseg4ei32_v_u8m2_m

#define vsuxseg4ei32_v_u8m2_m ( ... ) __riscv_vsuxseg4ei32_v_u8m2_m(__VA_ARGS__)

◆ vsuxseg4ei32_v_u8mf2

#define vsuxseg4ei32_v_u8mf2 ( ... ) __riscv_vsuxseg4ei32_v_u8mf2(__VA_ARGS__)

◆ vsuxseg4ei32_v_u8mf2_m

#define vsuxseg4ei32_v_u8mf2_m ( ... ) __riscv_vsuxseg4ei32_v_u8mf2_m(__VA_ARGS__)

◆ vsuxseg4ei32_v_u8mf4

#define vsuxseg4ei32_v_u8mf4 ( ... ) __riscv_vsuxseg4ei32_v_u8mf4(__VA_ARGS__)

◆ vsuxseg4ei32_v_u8mf4_m

#define vsuxseg4ei32_v_u8mf4_m ( ... ) __riscv_vsuxseg4ei32_v_u8mf4_m(__VA_ARGS__)

◆ vsuxseg4ei32_v_u8mf8

#define vsuxseg4ei32_v_u8mf8 ( ... ) __riscv_vsuxseg4ei32_v_u8mf8(__VA_ARGS__)

◆ vsuxseg4ei32_v_u8mf8_m

#define vsuxseg4ei32_v_u8mf8_m ( ... ) __riscv_vsuxseg4ei32_v_u8mf8_m(__VA_ARGS__)

◆ vsuxseg4ei64_v_f16m1

#define vsuxseg4ei64_v_f16m1 ( ... ) __riscv_vsuxseg4ei64_v_f16m1(__VA_ARGS__)

◆ vsuxseg4ei64_v_f16m1_m

#define vsuxseg4ei64_v_f16m1_m ( ... ) __riscv_vsuxseg4ei64_v_f16m1_m(__VA_ARGS__)

◆ vsuxseg4ei64_v_f16m2

#define vsuxseg4ei64_v_f16m2 ( ... ) __riscv_vsuxseg4ei64_v_f16m2(__VA_ARGS__)

◆ vsuxseg4ei64_v_f16m2_m

#define vsuxseg4ei64_v_f16m2_m ( ... ) __riscv_vsuxseg4ei64_v_f16m2_m(__VA_ARGS__)

◆ vsuxseg4ei64_v_f16mf2

#define vsuxseg4ei64_v_f16mf2 ( ... ) __riscv_vsuxseg4ei64_v_f16mf2(__VA_ARGS__)

◆ vsuxseg4ei64_v_f16mf2_m

#define vsuxseg4ei64_v_f16mf2_m ( ... ) __riscv_vsuxseg4ei64_v_f16mf2_m(__VA_ARGS__)

◆ vsuxseg4ei64_v_f16mf4

#define vsuxseg4ei64_v_f16mf4 ( ... ) __riscv_vsuxseg4ei64_v_f16mf4(__VA_ARGS__)

◆ vsuxseg4ei64_v_f16mf4_m

#define vsuxseg4ei64_v_f16mf4_m ( ... ) __riscv_vsuxseg4ei64_v_f16mf4_m(__VA_ARGS__)

◆ vsuxseg4ei64_v_f32m1

#define vsuxseg4ei64_v_f32m1 ( ... ) __riscv_vsuxseg4ei64_v_f32m1(__VA_ARGS__)

◆ vsuxseg4ei64_v_f32m1_m

#define vsuxseg4ei64_v_f32m1_m ( ... ) __riscv_vsuxseg4ei64_v_f32m1_m(__VA_ARGS__)

◆ vsuxseg4ei64_v_f32m2

#define vsuxseg4ei64_v_f32m2 ( ... ) __riscv_vsuxseg4ei64_v_f32m2(__VA_ARGS__)

◆ vsuxseg4ei64_v_f32m2_m

#define vsuxseg4ei64_v_f32m2_m ( ... ) __riscv_vsuxseg4ei64_v_f32m2_m(__VA_ARGS__)

◆ vsuxseg4ei64_v_f32mf2

#define vsuxseg4ei64_v_f32mf2 ( ... ) __riscv_vsuxseg4ei64_v_f32mf2(__VA_ARGS__)

◆ vsuxseg4ei64_v_f32mf2_m

#define vsuxseg4ei64_v_f32mf2_m ( ... ) __riscv_vsuxseg4ei64_v_f32mf2_m(__VA_ARGS__)

◆ vsuxseg4ei64_v_f64m1

#define vsuxseg4ei64_v_f64m1 ( ... ) __riscv_vsuxseg4ei64_v_f64m1(__VA_ARGS__)

◆ vsuxseg4ei64_v_f64m1_m

#define vsuxseg4ei64_v_f64m1_m ( ... ) __riscv_vsuxseg4ei64_v_f64m1_m(__VA_ARGS__)

◆ vsuxseg4ei64_v_f64m2

#define vsuxseg4ei64_v_f64m2 ( ... ) __riscv_vsuxseg4ei64_v_f64m2(__VA_ARGS__)

◆ vsuxseg4ei64_v_f64m2_m

#define vsuxseg4ei64_v_f64m2_m ( ... ) __riscv_vsuxseg4ei64_v_f64m2_m(__VA_ARGS__)

◆ vsuxseg4ei64_v_i16m1

#define vsuxseg4ei64_v_i16m1 ( ... ) __riscv_vsuxseg4ei64_v_i16m1(__VA_ARGS__)

◆ vsuxseg4ei64_v_i16m1_m

#define vsuxseg4ei64_v_i16m1_m ( ... ) __riscv_vsuxseg4ei64_v_i16m1_m(__VA_ARGS__)

◆ vsuxseg4ei64_v_i16m2

#define vsuxseg4ei64_v_i16m2 ( ... ) __riscv_vsuxseg4ei64_v_i16m2(__VA_ARGS__)

◆ vsuxseg4ei64_v_i16m2_m

#define vsuxseg4ei64_v_i16m2_m ( ... ) __riscv_vsuxseg4ei64_v_i16m2_m(__VA_ARGS__)

◆ vsuxseg4ei64_v_i16mf2

#define vsuxseg4ei64_v_i16mf2 ( ... ) __riscv_vsuxseg4ei64_v_i16mf2(__VA_ARGS__)

◆ vsuxseg4ei64_v_i16mf2_m

#define vsuxseg4ei64_v_i16mf2_m ( ... ) __riscv_vsuxseg4ei64_v_i16mf2_m(__VA_ARGS__)

◆ vsuxseg4ei64_v_i16mf4

#define vsuxseg4ei64_v_i16mf4 ( ... ) __riscv_vsuxseg4ei64_v_i16mf4(__VA_ARGS__)

◆ vsuxseg4ei64_v_i16mf4_m

#define vsuxseg4ei64_v_i16mf4_m ( ... ) __riscv_vsuxseg4ei64_v_i16mf4_m(__VA_ARGS__)

◆ vsuxseg4ei64_v_i32m1

#define vsuxseg4ei64_v_i32m1 ( ... ) __riscv_vsuxseg4ei64_v_i32m1(__VA_ARGS__)

◆ vsuxseg4ei64_v_i32m1_m

#define vsuxseg4ei64_v_i32m1_m ( ... ) __riscv_vsuxseg4ei64_v_i32m1_m(__VA_ARGS__)

◆ vsuxseg4ei64_v_i32m2

#define vsuxseg4ei64_v_i32m2 ( ... ) __riscv_vsuxseg4ei64_v_i32m2(__VA_ARGS__)

◆ vsuxseg4ei64_v_i32m2_m

#define vsuxseg4ei64_v_i32m2_m ( ... ) __riscv_vsuxseg4ei64_v_i32m2_m(__VA_ARGS__)

◆ vsuxseg4ei64_v_i32mf2

#define vsuxseg4ei64_v_i32mf2 ( ... ) __riscv_vsuxseg4ei64_v_i32mf2(__VA_ARGS__)

◆ vsuxseg4ei64_v_i32mf2_m

#define vsuxseg4ei64_v_i32mf2_m ( ... ) __riscv_vsuxseg4ei64_v_i32mf2_m(__VA_ARGS__)

◆ vsuxseg4ei64_v_i64m1

#define vsuxseg4ei64_v_i64m1 ( ... ) __riscv_vsuxseg4ei64_v_i64m1(__VA_ARGS__)

◆ vsuxseg4ei64_v_i64m1_m

#define vsuxseg4ei64_v_i64m1_m ( ... ) __riscv_vsuxseg4ei64_v_i64m1_m(__VA_ARGS__)

◆ vsuxseg4ei64_v_i64m2

#define vsuxseg4ei64_v_i64m2 ( ... ) __riscv_vsuxseg4ei64_v_i64m2(__VA_ARGS__)

◆ vsuxseg4ei64_v_i64m2_m

#define vsuxseg4ei64_v_i64m2_m ( ... ) __riscv_vsuxseg4ei64_v_i64m2_m(__VA_ARGS__)

◆ vsuxseg4ei64_v_i8m1

#define vsuxseg4ei64_v_i8m1 ( ... ) __riscv_vsuxseg4ei64_v_i8m1(__VA_ARGS__)

◆ vsuxseg4ei64_v_i8m1_m

#define vsuxseg4ei64_v_i8m1_m ( ... ) __riscv_vsuxseg4ei64_v_i8m1_m(__VA_ARGS__)

◆ vsuxseg4ei64_v_i8mf2

#define vsuxseg4ei64_v_i8mf2 ( ... ) __riscv_vsuxseg4ei64_v_i8mf2(__VA_ARGS__)

◆ vsuxseg4ei64_v_i8mf2_m

#define vsuxseg4ei64_v_i8mf2_m ( ... ) __riscv_vsuxseg4ei64_v_i8mf2_m(__VA_ARGS__)

◆ vsuxseg4ei64_v_i8mf4

#define vsuxseg4ei64_v_i8mf4 ( ... ) __riscv_vsuxseg4ei64_v_i8mf4(__VA_ARGS__)

◆ vsuxseg4ei64_v_i8mf4_m

#define vsuxseg4ei64_v_i8mf4_m ( ... ) __riscv_vsuxseg4ei64_v_i8mf4_m(__VA_ARGS__)

◆ vsuxseg4ei64_v_i8mf8

#define vsuxseg4ei64_v_i8mf8 ( ... ) __riscv_vsuxseg4ei64_v_i8mf8(__VA_ARGS__)

◆ vsuxseg4ei64_v_i8mf8_m

#define vsuxseg4ei64_v_i8mf8_m ( ... ) __riscv_vsuxseg4ei64_v_i8mf8_m(__VA_ARGS__)

◆ vsuxseg4ei64_v_u16m1

#define vsuxseg4ei64_v_u16m1 ( ... ) __riscv_vsuxseg4ei64_v_u16m1(__VA_ARGS__)

◆ vsuxseg4ei64_v_u16m1_m

#define vsuxseg4ei64_v_u16m1_m ( ... ) __riscv_vsuxseg4ei64_v_u16m1_m(__VA_ARGS__)

◆ vsuxseg4ei64_v_u16m2

#define vsuxseg4ei64_v_u16m2 ( ... ) __riscv_vsuxseg4ei64_v_u16m2(__VA_ARGS__)

◆ vsuxseg4ei64_v_u16m2_m

#define vsuxseg4ei64_v_u16m2_m ( ... ) __riscv_vsuxseg4ei64_v_u16m2_m(__VA_ARGS__)

◆ vsuxseg4ei64_v_u16mf2

#define vsuxseg4ei64_v_u16mf2 ( ... ) __riscv_vsuxseg4ei64_v_u16mf2(__VA_ARGS__)

◆ vsuxseg4ei64_v_u16mf2_m

#define vsuxseg4ei64_v_u16mf2_m ( ... ) __riscv_vsuxseg4ei64_v_u16mf2_m(__VA_ARGS__)

◆ vsuxseg4ei64_v_u16mf4

#define vsuxseg4ei64_v_u16mf4 ( ... ) __riscv_vsuxseg4ei64_v_u16mf4(__VA_ARGS__)

◆ vsuxseg4ei64_v_u16mf4_m

#define vsuxseg4ei64_v_u16mf4_m ( ... ) __riscv_vsuxseg4ei64_v_u16mf4_m(__VA_ARGS__)

◆ vsuxseg4ei64_v_u32m1

#define vsuxseg4ei64_v_u32m1 ( ... ) __riscv_vsuxseg4ei64_v_u32m1(__VA_ARGS__)

◆ vsuxseg4ei64_v_u32m1_m

#define vsuxseg4ei64_v_u32m1_m ( ... ) __riscv_vsuxseg4ei64_v_u32m1_m(__VA_ARGS__)

◆ vsuxseg4ei64_v_u32m2

#define vsuxseg4ei64_v_u32m2 ( ... ) __riscv_vsuxseg4ei64_v_u32m2(__VA_ARGS__)

◆ vsuxseg4ei64_v_u32m2_m

#define vsuxseg4ei64_v_u32m2_m ( ... ) __riscv_vsuxseg4ei64_v_u32m2_m(__VA_ARGS__)

◆ vsuxseg4ei64_v_u32mf2

#define vsuxseg4ei64_v_u32mf2 ( ... ) __riscv_vsuxseg4ei64_v_u32mf2(__VA_ARGS__)

◆ vsuxseg4ei64_v_u32mf2_m

#define vsuxseg4ei64_v_u32mf2_m ( ... ) __riscv_vsuxseg4ei64_v_u32mf2_m(__VA_ARGS__)

◆ vsuxseg4ei64_v_u64m1

#define vsuxseg4ei64_v_u64m1 ( ... ) __riscv_vsuxseg4ei64_v_u64m1(__VA_ARGS__)

◆ vsuxseg4ei64_v_u64m1_m

#define vsuxseg4ei64_v_u64m1_m ( ... ) __riscv_vsuxseg4ei64_v_u64m1_m(__VA_ARGS__)

◆ vsuxseg4ei64_v_u64m2

#define vsuxseg4ei64_v_u64m2 ( ... ) __riscv_vsuxseg4ei64_v_u64m2(__VA_ARGS__)

◆ vsuxseg4ei64_v_u64m2_m

#define vsuxseg4ei64_v_u64m2_m ( ... ) __riscv_vsuxseg4ei64_v_u64m2_m(__VA_ARGS__)

◆ vsuxseg4ei64_v_u8m1

#define vsuxseg4ei64_v_u8m1 ( ... ) __riscv_vsuxseg4ei64_v_u8m1(__VA_ARGS__)

◆ vsuxseg4ei64_v_u8m1_m

#define vsuxseg4ei64_v_u8m1_m ( ... ) __riscv_vsuxseg4ei64_v_u8m1_m(__VA_ARGS__)

◆ vsuxseg4ei64_v_u8mf2

#define vsuxseg4ei64_v_u8mf2 ( ... ) __riscv_vsuxseg4ei64_v_u8mf2(__VA_ARGS__)

◆ vsuxseg4ei64_v_u8mf2_m

#define vsuxseg4ei64_v_u8mf2_m ( ... ) __riscv_vsuxseg4ei64_v_u8mf2_m(__VA_ARGS__)

◆ vsuxseg4ei64_v_u8mf4

#define vsuxseg4ei64_v_u8mf4 ( ... ) __riscv_vsuxseg4ei64_v_u8mf4(__VA_ARGS__)

◆ vsuxseg4ei64_v_u8mf4_m

#define vsuxseg4ei64_v_u8mf4_m ( ... ) __riscv_vsuxseg4ei64_v_u8mf4_m(__VA_ARGS__)

◆ vsuxseg4ei64_v_u8mf8

#define vsuxseg4ei64_v_u8mf8 ( ... ) __riscv_vsuxseg4ei64_v_u8mf8(__VA_ARGS__)

◆ vsuxseg4ei64_v_u8mf8_m

#define vsuxseg4ei64_v_u8mf8_m ( ... ) __riscv_vsuxseg4ei64_v_u8mf8_m(__VA_ARGS__)

◆ vsuxseg4ei8_v_f16m1

#define vsuxseg4ei8_v_f16m1 ( ... ) __riscv_vsuxseg4ei8_v_f16m1(__VA_ARGS__)

◆ vsuxseg4ei8_v_f16m1_m

#define vsuxseg4ei8_v_f16m1_m ( ... ) __riscv_vsuxseg4ei8_v_f16m1_m(__VA_ARGS__)

◆ vsuxseg4ei8_v_f16m2

#define vsuxseg4ei8_v_f16m2 ( ... ) __riscv_vsuxseg4ei8_v_f16m2(__VA_ARGS__)

◆ vsuxseg4ei8_v_f16m2_m

#define vsuxseg4ei8_v_f16m2_m ( ... ) __riscv_vsuxseg4ei8_v_f16m2_m(__VA_ARGS__)

◆ vsuxseg4ei8_v_f16mf2

#define vsuxseg4ei8_v_f16mf2 ( ... ) __riscv_vsuxseg4ei8_v_f16mf2(__VA_ARGS__)

◆ vsuxseg4ei8_v_f16mf2_m

#define vsuxseg4ei8_v_f16mf2_m ( ... ) __riscv_vsuxseg4ei8_v_f16mf2_m(__VA_ARGS__)

◆ vsuxseg4ei8_v_f16mf4

#define vsuxseg4ei8_v_f16mf4 ( ... ) __riscv_vsuxseg4ei8_v_f16mf4(__VA_ARGS__)

◆ vsuxseg4ei8_v_f16mf4_m

#define vsuxseg4ei8_v_f16mf4_m ( ... ) __riscv_vsuxseg4ei8_v_f16mf4_m(__VA_ARGS__)

◆ vsuxseg4ei8_v_f32m1

#define vsuxseg4ei8_v_f32m1 ( ... ) __riscv_vsuxseg4ei8_v_f32m1(__VA_ARGS__)

◆ vsuxseg4ei8_v_f32m1_m

#define vsuxseg4ei8_v_f32m1_m ( ... ) __riscv_vsuxseg4ei8_v_f32m1_m(__VA_ARGS__)

◆ vsuxseg4ei8_v_f32m2

#define vsuxseg4ei8_v_f32m2 ( ... ) __riscv_vsuxseg4ei8_v_f32m2(__VA_ARGS__)

◆ vsuxseg4ei8_v_f32m2_m

#define vsuxseg4ei8_v_f32m2_m ( ... ) __riscv_vsuxseg4ei8_v_f32m2_m(__VA_ARGS__)

◆ vsuxseg4ei8_v_f32mf2

#define vsuxseg4ei8_v_f32mf2 ( ... ) __riscv_vsuxseg4ei8_v_f32mf2(__VA_ARGS__)

◆ vsuxseg4ei8_v_f32mf2_m

#define vsuxseg4ei8_v_f32mf2_m ( ... ) __riscv_vsuxseg4ei8_v_f32mf2_m(__VA_ARGS__)

◆ vsuxseg4ei8_v_f64m1

#define vsuxseg4ei8_v_f64m1 ( ... ) __riscv_vsuxseg4ei8_v_f64m1(__VA_ARGS__)

◆ vsuxseg4ei8_v_f64m1_m

#define vsuxseg4ei8_v_f64m1_m ( ... ) __riscv_vsuxseg4ei8_v_f64m1_m(__VA_ARGS__)

◆ vsuxseg4ei8_v_f64m2

#define vsuxseg4ei8_v_f64m2 ( ... ) __riscv_vsuxseg4ei8_v_f64m2(__VA_ARGS__)

◆ vsuxseg4ei8_v_f64m2_m

#define vsuxseg4ei8_v_f64m2_m ( ... ) __riscv_vsuxseg4ei8_v_f64m2_m(__VA_ARGS__)

◆ vsuxseg4ei8_v_i16m1

#define vsuxseg4ei8_v_i16m1 ( ... ) __riscv_vsuxseg4ei8_v_i16m1(__VA_ARGS__)

◆ vsuxseg4ei8_v_i16m1_m

#define vsuxseg4ei8_v_i16m1_m ( ... ) __riscv_vsuxseg4ei8_v_i16m1_m(__VA_ARGS__)

◆ vsuxseg4ei8_v_i16m2

#define vsuxseg4ei8_v_i16m2 ( ... ) __riscv_vsuxseg4ei8_v_i16m2(__VA_ARGS__)

◆ vsuxseg4ei8_v_i16m2_m

#define vsuxseg4ei8_v_i16m2_m ( ... ) __riscv_vsuxseg4ei8_v_i16m2_m(__VA_ARGS__)

◆ vsuxseg4ei8_v_i16mf2

#define vsuxseg4ei8_v_i16mf2 ( ... ) __riscv_vsuxseg4ei8_v_i16mf2(__VA_ARGS__)

◆ vsuxseg4ei8_v_i16mf2_m

#define vsuxseg4ei8_v_i16mf2_m ( ... ) __riscv_vsuxseg4ei8_v_i16mf2_m(__VA_ARGS__)

◆ vsuxseg4ei8_v_i16mf4

#define vsuxseg4ei8_v_i16mf4 ( ... ) __riscv_vsuxseg4ei8_v_i16mf4(__VA_ARGS__)

◆ vsuxseg4ei8_v_i16mf4_m

#define vsuxseg4ei8_v_i16mf4_m ( ... ) __riscv_vsuxseg4ei8_v_i16mf4_m(__VA_ARGS__)

◆ vsuxseg4ei8_v_i32m1

#define vsuxseg4ei8_v_i32m1 ( ... ) __riscv_vsuxseg4ei8_v_i32m1(__VA_ARGS__)

◆ vsuxseg4ei8_v_i32m1_m

#define vsuxseg4ei8_v_i32m1_m ( ... ) __riscv_vsuxseg4ei8_v_i32m1_m(__VA_ARGS__)

◆ vsuxseg4ei8_v_i32m2

#define vsuxseg4ei8_v_i32m2 ( ... ) __riscv_vsuxseg4ei8_v_i32m2(__VA_ARGS__)

◆ vsuxseg4ei8_v_i32m2_m

#define vsuxseg4ei8_v_i32m2_m ( ... ) __riscv_vsuxseg4ei8_v_i32m2_m(__VA_ARGS__)

◆ vsuxseg4ei8_v_i32mf2

#define vsuxseg4ei8_v_i32mf2 ( ... ) __riscv_vsuxseg4ei8_v_i32mf2(__VA_ARGS__)

◆ vsuxseg4ei8_v_i32mf2_m

#define vsuxseg4ei8_v_i32mf2_m ( ... ) __riscv_vsuxseg4ei8_v_i32mf2_m(__VA_ARGS__)

◆ vsuxseg4ei8_v_i64m1

#define vsuxseg4ei8_v_i64m1 ( ... ) __riscv_vsuxseg4ei8_v_i64m1(__VA_ARGS__)

◆ vsuxseg4ei8_v_i64m1_m

#define vsuxseg4ei8_v_i64m1_m ( ... ) __riscv_vsuxseg4ei8_v_i64m1_m(__VA_ARGS__)

◆ vsuxseg4ei8_v_i64m2

#define vsuxseg4ei8_v_i64m2 ( ... ) __riscv_vsuxseg4ei8_v_i64m2(__VA_ARGS__)

◆ vsuxseg4ei8_v_i64m2_m

#define vsuxseg4ei8_v_i64m2_m ( ... ) __riscv_vsuxseg4ei8_v_i64m2_m(__VA_ARGS__)

◆ vsuxseg4ei8_v_i8m1

#define vsuxseg4ei8_v_i8m1 ( ... ) __riscv_vsuxseg4ei8_v_i8m1(__VA_ARGS__)

◆ vsuxseg4ei8_v_i8m1_m

#define vsuxseg4ei8_v_i8m1_m ( ... ) __riscv_vsuxseg4ei8_v_i8m1_m(__VA_ARGS__)

◆ vsuxseg4ei8_v_i8m2

#define vsuxseg4ei8_v_i8m2 ( ... ) __riscv_vsuxseg4ei8_v_i8m2(__VA_ARGS__)

◆ vsuxseg4ei8_v_i8m2_m

#define vsuxseg4ei8_v_i8m2_m ( ... ) __riscv_vsuxseg4ei8_v_i8m2_m(__VA_ARGS__)

◆ vsuxseg4ei8_v_i8mf2

#define vsuxseg4ei8_v_i8mf2 ( ... ) __riscv_vsuxseg4ei8_v_i8mf2(__VA_ARGS__)

◆ vsuxseg4ei8_v_i8mf2_m

#define vsuxseg4ei8_v_i8mf2_m ( ... ) __riscv_vsuxseg4ei8_v_i8mf2_m(__VA_ARGS__)

◆ vsuxseg4ei8_v_i8mf4

#define vsuxseg4ei8_v_i8mf4 ( ... ) __riscv_vsuxseg4ei8_v_i8mf4(__VA_ARGS__)

◆ vsuxseg4ei8_v_i8mf4_m

#define vsuxseg4ei8_v_i8mf4_m ( ... ) __riscv_vsuxseg4ei8_v_i8mf4_m(__VA_ARGS__)

◆ vsuxseg4ei8_v_i8mf8

#define vsuxseg4ei8_v_i8mf8 ( ... ) __riscv_vsuxseg4ei8_v_i8mf8(__VA_ARGS__)

◆ vsuxseg4ei8_v_i8mf8_m

#define vsuxseg4ei8_v_i8mf8_m ( ... ) __riscv_vsuxseg4ei8_v_i8mf8_m(__VA_ARGS__)

◆ vsuxseg4ei8_v_u16m1

#define vsuxseg4ei8_v_u16m1 ( ... ) __riscv_vsuxseg4ei8_v_u16m1(__VA_ARGS__)

◆ vsuxseg4ei8_v_u16m1_m

#define vsuxseg4ei8_v_u16m1_m ( ... ) __riscv_vsuxseg4ei8_v_u16m1_m(__VA_ARGS__)

◆ vsuxseg4ei8_v_u16m2

#define vsuxseg4ei8_v_u16m2 ( ... ) __riscv_vsuxseg4ei8_v_u16m2(__VA_ARGS__)

◆ vsuxseg4ei8_v_u16m2_m

#define vsuxseg4ei8_v_u16m2_m ( ... ) __riscv_vsuxseg4ei8_v_u16m2_m(__VA_ARGS__)

◆ vsuxseg4ei8_v_u16mf2

#define vsuxseg4ei8_v_u16mf2 ( ... ) __riscv_vsuxseg4ei8_v_u16mf2(__VA_ARGS__)

◆ vsuxseg4ei8_v_u16mf2_m

#define vsuxseg4ei8_v_u16mf2_m ( ... ) __riscv_vsuxseg4ei8_v_u16mf2_m(__VA_ARGS__)

◆ vsuxseg4ei8_v_u16mf4

#define vsuxseg4ei8_v_u16mf4 ( ... ) __riscv_vsuxseg4ei8_v_u16mf4(__VA_ARGS__)

◆ vsuxseg4ei8_v_u16mf4_m

#define vsuxseg4ei8_v_u16mf4_m ( ... ) __riscv_vsuxseg4ei8_v_u16mf4_m(__VA_ARGS__)

◆ vsuxseg4ei8_v_u32m1

#define vsuxseg4ei8_v_u32m1 ( ... ) __riscv_vsuxseg4ei8_v_u32m1(__VA_ARGS__)

◆ vsuxseg4ei8_v_u32m1_m

#define vsuxseg4ei8_v_u32m1_m ( ... ) __riscv_vsuxseg4ei8_v_u32m1_m(__VA_ARGS__)

◆ vsuxseg4ei8_v_u32m2

#define vsuxseg4ei8_v_u32m2 ( ... ) __riscv_vsuxseg4ei8_v_u32m2(__VA_ARGS__)

◆ vsuxseg4ei8_v_u32m2_m

#define vsuxseg4ei8_v_u32m2_m ( ... ) __riscv_vsuxseg4ei8_v_u32m2_m(__VA_ARGS__)

◆ vsuxseg4ei8_v_u32mf2

#define vsuxseg4ei8_v_u32mf2 ( ... ) __riscv_vsuxseg4ei8_v_u32mf2(__VA_ARGS__)

◆ vsuxseg4ei8_v_u32mf2_m

#define vsuxseg4ei8_v_u32mf2_m ( ... ) __riscv_vsuxseg4ei8_v_u32mf2_m(__VA_ARGS__)

◆ vsuxseg4ei8_v_u64m1

#define vsuxseg4ei8_v_u64m1 ( ... ) __riscv_vsuxseg4ei8_v_u64m1(__VA_ARGS__)

◆ vsuxseg4ei8_v_u64m1_m

#define vsuxseg4ei8_v_u64m1_m ( ... ) __riscv_vsuxseg4ei8_v_u64m1_m(__VA_ARGS__)

◆ vsuxseg4ei8_v_u64m2

#define vsuxseg4ei8_v_u64m2 ( ... ) __riscv_vsuxseg4ei8_v_u64m2(__VA_ARGS__)

◆ vsuxseg4ei8_v_u64m2_m

#define vsuxseg4ei8_v_u64m2_m ( ... ) __riscv_vsuxseg4ei8_v_u64m2_m(__VA_ARGS__)

◆ vsuxseg4ei8_v_u8m1

#define vsuxseg4ei8_v_u8m1 ( ... ) __riscv_vsuxseg4ei8_v_u8m1(__VA_ARGS__)

◆ vsuxseg4ei8_v_u8m1_m

#define vsuxseg4ei8_v_u8m1_m ( ... ) __riscv_vsuxseg4ei8_v_u8m1_m(__VA_ARGS__)

◆ vsuxseg4ei8_v_u8m2

#define vsuxseg4ei8_v_u8m2 ( ... ) __riscv_vsuxseg4ei8_v_u8m2(__VA_ARGS__)

◆ vsuxseg4ei8_v_u8m2_m

#define vsuxseg4ei8_v_u8m2_m ( ... ) __riscv_vsuxseg4ei8_v_u8m2_m(__VA_ARGS__)

◆ vsuxseg4ei8_v_u8mf2

#define vsuxseg4ei8_v_u8mf2 ( ... ) __riscv_vsuxseg4ei8_v_u8mf2(__VA_ARGS__)

◆ vsuxseg4ei8_v_u8mf2_m

#define vsuxseg4ei8_v_u8mf2_m ( ... ) __riscv_vsuxseg4ei8_v_u8mf2_m(__VA_ARGS__)

◆ vsuxseg4ei8_v_u8mf4

#define vsuxseg4ei8_v_u8mf4 ( ... ) __riscv_vsuxseg4ei8_v_u8mf4(__VA_ARGS__)

◆ vsuxseg4ei8_v_u8mf4_m

#define vsuxseg4ei8_v_u8mf4_m ( ... ) __riscv_vsuxseg4ei8_v_u8mf4_m(__VA_ARGS__)

◆ vsuxseg4ei8_v_u8mf8

#define vsuxseg4ei8_v_u8mf8 ( ... ) __riscv_vsuxseg4ei8_v_u8mf8(__VA_ARGS__)

◆ vsuxseg4ei8_v_u8mf8_m

#define vsuxseg4ei8_v_u8mf8_m ( ... ) __riscv_vsuxseg4ei8_v_u8mf8_m(__VA_ARGS__)

◆ vsuxseg5ei16_v_f16m1

#define vsuxseg5ei16_v_f16m1 ( ... ) __riscv_vsuxseg5ei16_v_f16m1(__VA_ARGS__)

◆ vsuxseg5ei16_v_f16m1_m

#define vsuxseg5ei16_v_f16m1_m ( ... ) __riscv_vsuxseg5ei16_v_f16m1_m(__VA_ARGS__)

◆ vsuxseg5ei16_v_f16mf2

#define vsuxseg5ei16_v_f16mf2 ( ... ) __riscv_vsuxseg5ei16_v_f16mf2(__VA_ARGS__)

◆ vsuxseg5ei16_v_f16mf2_m

#define vsuxseg5ei16_v_f16mf2_m ( ... ) __riscv_vsuxseg5ei16_v_f16mf2_m(__VA_ARGS__)

◆ vsuxseg5ei16_v_f16mf4

#define vsuxseg5ei16_v_f16mf4 ( ... ) __riscv_vsuxseg5ei16_v_f16mf4(__VA_ARGS__)

◆ vsuxseg5ei16_v_f16mf4_m

#define vsuxseg5ei16_v_f16mf4_m ( ... ) __riscv_vsuxseg5ei16_v_f16mf4_m(__VA_ARGS__)

◆ vsuxseg5ei16_v_f32m1

#define vsuxseg5ei16_v_f32m1 ( ... ) __riscv_vsuxseg5ei16_v_f32m1(__VA_ARGS__)

◆ vsuxseg5ei16_v_f32m1_m

#define vsuxseg5ei16_v_f32m1_m ( ... ) __riscv_vsuxseg5ei16_v_f32m1_m(__VA_ARGS__)

◆ vsuxseg5ei16_v_f32mf2

#define vsuxseg5ei16_v_f32mf2 ( ... ) __riscv_vsuxseg5ei16_v_f32mf2(__VA_ARGS__)

◆ vsuxseg5ei16_v_f32mf2_m

#define vsuxseg5ei16_v_f32mf2_m ( ... ) __riscv_vsuxseg5ei16_v_f32mf2_m(__VA_ARGS__)

◆ vsuxseg5ei16_v_f64m1

#define vsuxseg5ei16_v_f64m1 ( ... ) __riscv_vsuxseg5ei16_v_f64m1(__VA_ARGS__)

◆ vsuxseg5ei16_v_f64m1_m

#define vsuxseg5ei16_v_f64m1_m ( ... ) __riscv_vsuxseg5ei16_v_f64m1_m(__VA_ARGS__)

◆ vsuxseg5ei16_v_i16m1

#define vsuxseg5ei16_v_i16m1 ( ... ) __riscv_vsuxseg5ei16_v_i16m1(__VA_ARGS__)

◆ vsuxseg5ei16_v_i16m1_m

#define vsuxseg5ei16_v_i16m1_m ( ... ) __riscv_vsuxseg5ei16_v_i16m1_m(__VA_ARGS__)

◆ vsuxseg5ei16_v_i16mf2

#define vsuxseg5ei16_v_i16mf2 ( ... ) __riscv_vsuxseg5ei16_v_i16mf2(__VA_ARGS__)

◆ vsuxseg5ei16_v_i16mf2_m

#define vsuxseg5ei16_v_i16mf2_m ( ... ) __riscv_vsuxseg5ei16_v_i16mf2_m(__VA_ARGS__)

◆ vsuxseg5ei16_v_i16mf4

#define vsuxseg5ei16_v_i16mf4 ( ... ) __riscv_vsuxseg5ei16_v_i16mf4(__VA_ARGS__)

◆ vsuxseg5ei16_v_i16mf4_m

#define vsuxseg5ei16_v_i16mf4_m ( ... ) __riscv_vsuxseg5ei16_v_i16mf4_m(__VA_ARGS__)

◆ vsuxseg5ei16_v_i32m1

#define vsuxseg5ei16_v_i32m1 ( ... ) __riscv_vsuxseg5ei16_v_i32m1(__VA_ARGS__)

◆ vsuxseg5ei16_v_i32m1_m

#define vsuxseg5ei16_v_i32m1_m ( ... ) __riscv_vsuxseg5ei16_v_i32m1_m(__VA_ARGS__)

◆ vsuxseg5ei16_v_i32mf2

#define vsuxseg5ei16_v_i32mf2 ( ... ) __riscv_vsuxseg5ei16_v_i32mf2(__VA_ARGS__)

◆ vsuxseg5ei16_v_i32mf2_m

#define vsuxseg5ei16_v_i32mf2_m ( ... ) __riscv_vsuxseg5ei16_v_i32mf2_m(__VA_ARGS__)

◆ vsuxseg5ei16_v_i64m1

#define vsuxseg5ei16_v_i64m1 ( ... ) __riscv_vsuxseg5ei16_v_i64m1(__VA_ARGS__)

◆ vsuxseg5ei16_v_i64m1_m

#define vsuxseg5ei16_v_i64m1_m ( ... ) __riscv_vsuxseg5ei16_v_i64m1_m(__VA_ARGS__)

◆ vsuxseg5ei16_v_i8m1

#define vsuxseg5ei16_v_i8m1 ( ... ) __riscv_vsuxseg5ei16_v_i8m1(__VA_ARGS__)

◆ vsuxseg5ei16_v_i8m1_m

#define vsuxseg5ei16_v_i8m1_m ( ... ) __riscv_vsuxseg5ei16_v_i8m1_m(__VA_ARGS__)

◆ vsuxseg5ei16_v_i8mf2

#define vsuxseg5ei16_v_i8mf2 ( ... ) __riscv_vsuxseg5ei16_v_i8mf2(__VA_ARGS__)

◆ vsuxseg5ei16_v_i8mf2_m

#define vsuxseg5ei16_v_i8mf2_m ( ... ) __riscv_vsuxseg5ei16_v_i8mf2_m(__VA_ARGS__)

◆ vsuxseg5ei16_v_i8mf4

#define vsuxseg5ei16_v_i8mf4 ( ... ) __riscv_vsuxseg5ei16_v_i8mf4(__VA_ARGS__)

◆ vsuxseg5ei16_v_i8mf4_m

#define vsuxseg5ei16_v_i8mf4_m ( ... ) __riscv_vsuxseg5ei16_v_i8mf4_m(__VA_ARGS__)

◆ vsuxseg5ei16_v_i8mf8

#define vsuxseg5ei16_v_i8mf8 ( ... ) __riscv_vsuxseg5ei16_v_i8mf8(__VA_ARGS__)

◆ vsuxseg5ei16_v_i8mf8_m

#define vsuxseg5ei16_v_i8mf8_m ( ... ) __riscv_vsuxseg5ei16_v_i8mf8_m(__VA_ARGS__)

◆ vsuxseg5ei16_v_u16m1

#define vsuxseg5ei16_v_u16m1 ( ... ) __riscv_vsuxseg5ei16_v_u16m1(__VA_ARGS__)

◆ vsuxseg5ei16_v_u16m1_m

#define vsuxseg5ei16_v_u16m1_m ( ... ) __riscv_vsuxseg5ei16_v_u16m1_m(__VA_ARGS__)

◆ vsuxseg5ei16_v_u16mf2

#define vsuxseg5ei16_v_u16mf2 ( ... ) __riscv_vsuxseg5ei16_v_u16mf2(__VA_ARGS__)

◆ vsuxseg5ei16_v_u16mf2_m

#define vsuxseg5ei16_v_u16mf2_m ( ... ) __riscv_vsuxseg5ei16_v_u16mf2_m(__VA_ARGS__)

◆ vsuxseg5ei16_v_u16mf4

#define vsuxseg5ei16_v_u16mf4 ( ... ) __riscv_vsuxseg5ei16_v_u16mf4(__VA_ARGS__)

◆ vsuxseg5ei16_v_u16mf4_m

#define vsuxseg5ei16_v_u16mf4_m ( ... ) __riscv_vsuxseg5ei16_v_u16mf4_m(__VA_ARGS__)

◆ vsuxseg5ei16_v_u32m1

#define vsuxseg5ei16_v_u32m1 ( ... ) __riscv_vsuxseg5ei16_v_u32m1(__VA_ARGS__)

◆ vsuxseg5ei16_v_u32m1_m

#define vsuxseg5ei16_v_u32m1_m ( ... ) __riscv_vsuxseg5ei16_v_u32m1_m(__VA_ARGS__)

◆ vsuxseg5ei16_v_u32mf2

#define vsuxseg5ei16_v_u32mf2 ( ... ) __riscv_vsuxseg5ei16_v_u32mf2(__VA_ARGS__)

◆ vsuxseg5ei16_v_u32mf2_m

#define vsuxseg5ei16_v_u32mf2_m ( ... ) __riscv_vsuxseg5ei16_v_u32mf2_m(__VA_ARGS__)

◆ vsuxseg5ei16_v_u64m1

#define vsuxseg5ei16_v_u64m1 ( ... ) __riscv_vsuxseg5ei16_v_u64m1(__VA_ARGS__)

◆ vsuxseg5ei16_v_u64m1_m

#define vsuxseg5ei16_v_u64m1_m ( ... ) __riscv_vsuxseg5ei16_v_u64m1_m(__VA_ARGS__)

◆ vsuxseg5ei16_v_u8m1

#define vsuxseg5ei16_v_u8m1 ( ... ) __riscv_vsuxseg5ei16_v_u8m1(__VA_ARGS__)

◆ vsuxseg5ei16_v_u8m1_m

#define vsuxseg5ei16_v_u8m1_m ( ... ) __riscv_vsuxseg5ei16_v_u8m1_m(__VA_ARGS__)

◆ vsuxseg5ei16_v_u8mf2

#define vsuxseg5ei16_v_u8mf2 ( ... ) __riscv_vsuxseg5ei16_v_u8mf2(__VA_ARGS__)

◆ vsuxseg5ei16_v_u8mf2_m

#define vsuxseg5ei16_v_u8mf2_m ( ... ) __riscv_vsuxseg5ei16_v_u8mf2_m(__VA_ARGS__)

◆ vsuxseg5ei16_v_u8mf4

#define vsuxseg5ei16_v_u8mf4 ( ... ) __riscv_vsuxseg5ei16_v_u8mf4(__VA_ARGS__)

◆ vsuxseg5ei16_v_u8mf4_m

#define vsuxseg5ei16_v_u8mf4_m ( ... ) __riscv_vsuxseg5ei16_v_u8mf4_m(__VA_ARGS__)

◆ vsuxseg5ei16_v_u8mf8

#define vsuxseg5ei16_v_u8mf8 ( ... ) __riscv_vsuxseg5ei16_v_u8mf8(__VA_ARGS__)

◆ vsuxseg5ei16_v_u8mf8_m

#define vsuxseg5ei16_v_u8mf8_m ( ... ) __riscv_vsuxseg5ei16_v_u8mf8_m(__VA_ARGS__)

◆ vsuxseg5ei32_v_f16m1

#define vsuxseg5ei32_v_f16m1 ( ... ) __riscv_vsuxseg5ei32_v_f16m1(__VA_ARGS__)

◆ vsuxseg5ei32_v_f16m1_m

#define vsuxseg5ei32_v_f16m1_m ( ... ) __riscv_vsuxseg5ei32_v_f16m1_m(__VA_ARGS__)

◆ vsuxseg5ei32_v_f16mf2

#define vsuxseg5ei32_v_f16mf2 ( ... ) __riscv_vsuxseg5ei32_v_f16mf2(__VA_ARGS__)

◆ vsuxseg5ei32_v_f16mf2_m

#define vsuxseg5ei32_v_f16mf2_m ( ... ) __riscv_vsuxseg5ei32_v_f16mf2_m(__VA_ARGS__)

◆ vsuxseg5ei32_v_f16mf4

#define vsuxseg5ei32_v_f16mf4 ( ... ) __riscv_vsuxseg5ei32_v_f16mf4(__VA_ARGS__)

◆ vsuxseg5ei32_v_f16mf4_m

#define vsuxseg5ei32_v_f16mf4_m ( ... ) __riscv_vsuxseg5ei32_v_f16mf4_m(__VA_ARGS__)

◆ vsuxseg5ei32_v_f32m1

#define vsuxseg5ei32_v_f32m1 ( ... ) __riscv_vsuxseg5ei32_v_f32m1(__VA_ARGS__)

◆ vsuxseg5ei32_v_f32m1_m

#define vsuxseg5ei32_v_f32m1_m ( ... ) __riscv_vsuxseg5ei32_v_f32m1_m(__VA_ARGS__)

◆ vsuxseg5ei32_v_f32mf2

#define vsuxseg5ei32_v_f32mf2 ( ... ) __riscv_vsuxseg5ei32_v_f32mf2(__VA_ARGS__)

◆ vsuxseg5ei32_v_f32mf2_m

#define vsuxseg5ei32_v_f32mf2_m ( ... ) __riscv_vsuxseg5ei32_v_f32mf2_m(__VA_ARGS__)

◆ vsuxseg5ei32_v_f64m1

#define vsuxseg5ei32_v_f64m1 ( ... ) __riscv_vsuxseg5ei32_v_f64m1(__VA_ARGS__)

◆ vsuxseg5ei32_v_f64m1_m

#define vsuxseg5ei32_v_f64m1_m ( ... ) __riscv_vsuxseg5ei32_v_f64m1_m(__VA_ARGS__)

◆ vsuxseg5ei32_v_i16m1

#define vsuxseg5ei32_v_i16m1 ( ... ) __riscv_vsuxseg5ei32_v_i16m1(__VA_ARGS__)

◆ vsuxseg5ei32_v_i16m1_m

#define vsuxseg5ei32_v_i16m1_m ( ... ) __riscv_vsuxseg5ei32_v_i16m1_m(__VA_ARGS__)

◆ vsuxseg5ei32_v_i16mf2

#define vsuxseg5ei32_v_i16mf2 ( ... ) __riscv_vsuxseg5ei32_v_i16mf2(__VA_ARGS__)

◆ vsuxseg5ei32_v_i16mf2_m

#define vsuxseg5ei32_v_i16mf2_m ( ... ) __riscv_vsuxseg5ei32_v_i16mf2_m(__VA_ARGS__)

◆ vsuxseg5ei32_v_i16mf4

#define vsuxseg5ei32_v_i16mf4 ( ... ) __riscv_vsuxseg5ei32_v_i16mf4(__VA_ARGS__)

◆ vsuxseg5ei32_v_i16mf4_m

#define vsuxseg5ei32_v_i16mf4_m ( ... ) __riscv_vsuxseg5ei32_v_i16mf4_m(__VA_ARGS__)

◆ vsuxseg5ei32_v_i32m1

#define vsuxseg5ei32_v_i32m1 ( ... ) __riscv_vsuxseg5ei32_v_i32m1(__VA_ARGS__)

◆ vsuxseg5ei32_v_i32m1_m

#define vsuxseg5ei32_v_i32m1_m ( ... ) __riscv_vsuxseg5ei32_v_i32m1_m(__VA_ARGS__)

◆ vsuxseg5ei32_v_i32mf2

#define vsuxseg5ei32_v_i32mf2 ( ... ) __riscv_vsuxseg5ei32_v_i32mf2(__VA_ARGS__)

◆ vsuxseg5ei32_v_i32mf2_m

#define vsuxseg5ei32_v_i32mf2_m ( ... ) __riscv_vsuxseg5ei32_v_i32mf2_m(__VA_ARGS__)

◆ vsuxseg5ei32_v_i64m1

#define vsuxseg5ei32_v_i64m1 ( ... ) __riscv_vsuxseg5ei32_v_i64m1(__VA_ARGS__)

◆ vsuxseg5ei32_v_i64m1_m

#define vsuxseg5ei32_v_i64m1_m ( ... ) __riscv_vsuxseg5ei32_v_i64m1_m(__VA_ARGS__)

◆ vsuxseg5ei32_v_i8m1

#define vsuxseg5ei32_v_i8m1 ( ... ) __riscv_vsuxseg5ei32_v_i8m1(__VA_ARGS__)

◆ vsuxseg5ei32_v_i8m1_m

#define vsuxseg5ei32_v_i8m1_m ( ... ) __riscv_vsuxseg5ei32_v_i8m1_m(__VA_ARGS__)

◆ vsuxseg5ei32_v_i8mf2

#define vsuxseg5ei32_v_i8mf2 ( ... ) __riscv_vsuxseg5ei32_v_i8mf2(__VA_ARGS__)

◆ vsuxseg5ei32_v_i8mf2_m

#define vsuxseg5ei32_v_i8mf2_m ( ... ) __riscv_vsuxseg5ei32_v_i8mf2_m(__VA_ARGS__)

◆ vsuxseg5ei32_v_i8mf4

#define vsuxseg5ei32_v_i8mf4 ( ... ) __riscv_vsuxseg5ei32_v_i8mf4(__VA_ARGS__)

◆ vsuxseg5ei32_v_i8mf4_m

#define vsuxseg5ei32_v_i8mf4_m ( ... ) __riscv_vsuxseg5ei32_v_i8mf4_m(__VA_ARGS__)

◆ vsuxseg5ei32_v_i8mf8

#define vsuxseg5ei32_v_i8mf8 ( ... ) __riscv_vsuxseg5ei32_v_i8mf8(__VA_ARGS__)

◆ vsuxseg5ei32_v_i8mf8_m

#define vsuxseg5ei32_v_i8mf8_m ( ... ) __riscv_vsuxseg5ei32_v_i8mf8_m(__VA_ARGS__)

◆ vsuxseg5ei32_v_u16m1

#define vsuxseg5ei32_v_u16m1 ( ... ) __riscv_vsuxseg5ei32_v_u16m1(__VA_ARGS__)

◆ vsuxseg5ei32_v_u16m1_m

#define vsuxseg5ei32_v_u16m1_m ( ... ) __riscv_vsuxseg5ei32_v_u16m1_m(__VA_ARGS__)

◆ vsuxseg5ei32_v_u16mf2

#define vsuxseg5ei32_v_u16mf2 ( ... ) __riscv_vsuxseg5ei32_v_u16mf2(__VA_ARGS__)

◆ vsuxseg5ei32_v_u16mf2_m

#define vsuxseg5ei32_v_u16mf2_m ( ... ) __riscv_vsuxseg5ei32_v_u16mf2_m(__VA_ARGS__)

◆ vsuxseg5ei32_v_u16mf4

#define vsuxseg5ei32_v_u16mf4 ( ... ) __riscv_vsuxseg5ei32_v_u16mf4(__VA_ARGS__)

◆ vsuxseg5ei32_v_u16mf4_m

#define vsuxseg5ei32_v_u16mf4_m ( ... ) __riscv_vsuxseg5ei32_v_u16mf4_m(__VA_ARGS__)

◆ vsuxseg5ei32_v_u32m1

#define vsuxseg5ei32_v_u32m1 ( ... ) __riscv_vsuxseg5ei32_v_u32m1(__VA_ARGS__)

◆ vsuxseg5ei32_v_u32m1_m

#define vsuxseg5ei32_v_u32m1_m ( ... ) __riscv_vsuxseg5ei32_v_u32m1_m(__VA_ARGS__)

◆ vsuxseg5ei32_v_u32mf2

#define vsuxseg5ei32_v_u32mf2 ( ... ) __riscv_vsuxseg5ei32_v_u32mf2(__VA_ARGS__)

◆ vsuxseg5ei32_v_u32mf2_m

#define vsuxseg5ei32_v_u32mf2_m ( ... ) __riscv_vsuxseg5ei32_v_u32mf2_m(__VA_ARGS__)

◆ vsuxseg5ei32_v_u64m1

#define vsuxseg5ei32_v_u64m1 ( ... ) __riscv_vsuxseg5ei32_v_u64m1(__VA_ARGS__)

◆ vsuxseg5ei32_v_u64m1_m

#define vsuxseg5ei32_v_u64m1_m ( ... ) __riscv_vsuxseg5ei32_v_u64m1_m(__VA_ARGS__)

◆ vsuxseg5ei32_v_u8m1

#define vsuxseg5ei32_v_u8m1 ( ... ) __riscv_vsuxseg5ei32_v_u8m1(__VA_ARGS__)

◆ vsuxseg5ei32_v_u8m1_m

#define vsuxseg5ei32_v_u8m1_m ( ... ) __riscv_vsuxseg5ei32_v_u8m1_m(__VA_ARGS__)

◆ vsuxseg5ei32_v_u8mf2

#define vsuxseg5ei32_v_u8mf2 ( ... ) __riscv_vsuxseg5ei32_v_u8mf2(__VA_ARGS__)

◆ vsuxseg5ei32_v_u8mf2_m

#define vsuxseg5ei32_v_u8mf2_m ( ... ) __riscv_vsuxseg5ei32_v_u8mf2_m(__VA_ARGS__)

◆ vsuxseg5ei32_v_u8mf4

#define vsuxseg5ei32_v_u8mf4 ( ... ) __riscv_vsuxseg5ei32_v_u8mf4(__VA_ARGS__)

◆ vsuxseg5ei32_v_u8mf4_m

#define vsuxseg5ei32_v_u8mf4_m ( ... ) __riscv_vsuxseg5ei32_v_u8mf4_m(__VA_ARGS__)

◆ vsuxseg5ei32_v_u8mf8

#define vsuxseg5ei32_v_u8mf8 ( ... ) __riscv_vsuxseg5ei32_v_u8mf8(__VA_ARGS__)

◆ vsuxseg5ei32_v_u8mf8_m

#define vsuxseg5ei32_v_u8mf8_m ( ... ) __riscv_vsuxseg5ei32_v_u8mf8_m(__VA_ARGS__)

◆ vsuxseg5ei64_v_f16m1

#define vsuxseg5ei64_v_f16m1 ( ... ) __riscv_vsuxseg5ei64_v_f16m1(__VA_ARGS__)

◆ vsuxseg5ei64_v_f16m1_m

#define vsuxseg5ei64_v_f16m1_m ( ... ) __riscv_vsuxseg5ei64_v_f16m1_m(__VA_ARGS__)

◆ vsuxseg5ei64_v_f16mf2

#define vsuxseg5ei64_v_f16mf2 ( ... ) __riscv_vsuxseg5ei64_v_f16mf2(__VA_ARGS__)

◆ vsuxseg5ei64_v_f16mf2_m

#define vsuxseg5ei64_v_f16mf2_m ( ... ) __riscv_vsuxseg5ei64_v_f16mf2_m(__VA_ARGS__)

◆ vsuxseg5ei64_v_f16mf4

#define vsuxseg5ei64_v_f16mf4 ( ... ) __riscv_vsuxseg5ei64_v_f16mf4(__VA_ARGS__)

◆ vsuxseg5ei64_v_f16mf4_m

#define vsuxseg5ei64_v_f16mf4_m ( ... ) __riscv_vsuxseg5ei64_v_f16mf4_m(__VA_ARGS__)

◆ vsuxseg5ei64_v_f32m1

#define vsuxseg5ei64_v_f32m1 ( ... ) __riscv_vsuxseg5ei64_v_f32m1(__VA_ARGS__)

◆ vsuxseg5ei64_v_f32m1_m

#define vsuxseg5ei64_v_f32m1_m ( ... ) __riscv_vsuxseg5ei64_v_f32m1_m(__VA_ARGS__)

◆ vsuxseg5ei64_v_f32mf2

#define vsuxseg5ei64_v_f32mf2 ( ... ) __riscv_vsuxseg5ei64_v_f32mf2(__VA_ARGS__)

◆ vsuxseg5ei64_v_f32mf2_m

#define vsuxseg5ei64_v_f32mf2_m ( ... ) __riscv_vsuxseg5ei64_v_f32mf2_m(__VA_ARGS__)

◆ vsuxseg5ei64_v_f64m1

#define vsuxseg5ei64_v_f64m1 ( ... ) __riscv_vsuxseg5ei64_v_f64m1(__VA_ARGS__)

◆ vsuxseg5ei64_v_f64m1_m

#define vsuxseg5ei64_v_f64m1_m ( ... ) __riscv_vsuxseg5ei64_v_f64m1_m(__VA_ARGS__)

◆ vsuxseg5ei64_v_i16m1

#define vsuxseg5ei64_v_i16m1 ( ... ) __riscv_vsuxseg5ei64_v_i16m1(__VA_ARGS__)

◆ vsuxseg5ei64_v_i16m1_m

#define vsuxseg5ei64_v_i16m1_m ( ... ) __riscv_vsuxseg5ei64_v_i16m1_m(__VA_ARGS__)

◆ vsuxseg5ei64_v_i16mf2

#define vsuxseg5ei64_v_i16mf2 ( ... ) __riscv_vsuxseg5ei64_v_i16mf2(__VA_ARGS__)

◆ vsuxseg5ei64_v_i16mf2_m

#define vsuxseg5ei64_v_i16mf2_m ( ... ) __riscv_vsuxseg5ei64_v_i16mf2_m(__VA_ARGS__)

◆ vsuxseg5ei64_v_i16mf4

#define vsuxseg5ei64_v_i16mf4 ( ... ) __riscv_vsuxseg5ei64_v_i16mf4(__VA_ARGS__)

◆ vsuxseg5ei64_v_i16mf4_m

#define vsuxseg5ei64_v_i16mf4_m ( ... ) __riscv_vsuxseg5ei64_v_i16mf4_m(__VA_ARGS__)

◆ vsuxseg5ei64_v_i32m1

#define vsuxseg5ei64_v_i32m1 ( ... ) __riscv_vsuxseg5ei64_v_i32m1(__VA_ARGS__)

◆ vsuxseg5ei64_v_i32m1_m

#define vsuxseg5ei64_v_i32m1_m ( ... ) __riscv_vsuxseg5ei64_v_i32m1_m(__VA_ARGS__)

◆ vsuxseg5ei64_v_i32mf2

#define vsuxseg5ei64_v_i32mf2 ( ... ) __riscv_vsuxseg5ei64_v_i32mf2(__VA_ARGS__)

◆ vsuxseg5ei64_v_i32mf2_m

#define vsuxseg5ei64_v_i32mf2_m ( ... ) __riscv_vsuxseg5ei64_v_i32mf2_m(__VA_ARGS__)

◆ vsuxseg5ei64_v_i64m1

#define vsuxseg5ei64_v_i64m1 ( ... ) __riscv_vsuxseg5ei64_v_i64m1(__VA_ARGS__)

◆ vsuxseg5ei64_v_i64m1_m

#define vsuxseg5ei64_v_i64m1_m ( ... ) __riscv_vsuxseg5ei64_v_i64m1_m(__VA_ARGS__)

◆ vsuxseg5ei64_v_i8m1

#define vsuxseg5ei64_v_i8m1 ( ... ) __riscv_vsuxseg5ei64_v_i8m1(__VA_ARGS__)

◆ vsuxseg5ei64_v_i8m1_m

#define vsuxseg5ei64_v_i8m1_m ( ... ) __riscv_vsuxseg5ei64_v_i8m1_m(__VA_ARGS__)

◆ vsuxseg5ei64_v_i8mf2

#define vsuxseg5ei64_v_i8mf2 ( ... ) __riscv_vsuxseg5ei64_v_i8mf2(__VA_ARGS__)

◆ vsuxseg5ei64_v_i8mf2_m

#define vsuxseg5ei64_v_i8mf2_m ( ... ) __riscv_vsuxseg5ei64_v_i8mf2_m(__VA_ARGS__)

◆ vsuxseg5ei64_v_i8mf4

#define vsuxseg5ei64_v_i8mf4 ( ... ) __riscv_vsuxseg5ei64_v_i8mf4(__VA_ARGS__)

◆ vsuxseg5ei64_v_i8mf4_m

#define vsuxseg5ei64_v_i8mf4_m ( ... ) __riscv_vsuxseg5ei64_v_i8mf4_m(__VA_ARGS__)

◆ vsuxseg5ei64_v_i8mf8

#define vsuxseg5ei64_v_i8mf8 ( ... ) __riscv_vsuxseg5ei64_v_i8mf8(__VA_ARGS__)

◆ vsuxseg5ei64_v_i8mf8_m

#define vsuxseg5ei64_v_i8mf8_m ( ... ) __riscv_vsuxseg5ei64_v_i8mf8_m(__VA_ARGS__)

◆ vsuxseg5ei64_v_u16m1

#define vsuxseg5ei64_v_u16m1 ( ... ) __riscv_vsuxseg5ei64_v_u16m1(__VA_ARGS__)

◆ vsuxseg5ei64_v_u16m1_m

#define vsuxseg5ei64_v_u16m1_m ( ... ) __riscv_vsuxseg5ei64_v_u16m1_m(__VA_ARGS__)

◆ vsuxseg5ei64_v_u16mf2

#define vsuxseg5ei64_v_u16mf2 ( ... ) __riscv_vsuxseg5ei64_v_u16mf2(__VA_ARGS__)

◆ vsuxseg5ei64_v_u16mf2_m

#define vsuxseg5ei64_v_u16mf2_m ( ... ) __riscv_vsuxseg5ei64_v_u16mf2_m(__VA_ARGS__)

◆ vsuxseg5ei64_v_u16mf4

#define vsuxseg5ei64_v_u16mf4 ( ... ) __riscv_vsuxseg5ei64_v_u16mf4(__VA_ARGS__)

◆ vsuxseg5ei64_v_u16mf4_m

#define vsuxseg5ei64_v_u16mf4_m ( ... ) __riscv_vsuxseg5ei64_v_u16mf4_m(__VA_ARGS__)

◆ vsuxseg5ei64_v_u32m1

#define vsuxseg5ei64_v_u32m1 ( ... ) __riscv_vsuxseg5ei64_v_u32m1(__VA_ARGS__)

◆ vsuxseg5ei64_v_u32m1_m

#define vsuxseg5ei64_v_u32m1_m ( ... ) __riscv_vsuxseg5ei64_v_u32m1_m(__VA_ARGS__)

◆ vsuxseg5ei64_v_u32mf2

#define vsuxseg5ei64_v_u32mf2 ( ... ) __riscv_vsuxseg5ei64_v_u32mf2(__VA_ARGS__)

◆ vsuxseg5ei64_v_u32mf2_m

#define vsuxseg5ei64_v_u32mf2_m ( ... ) __riscv_vsuxseg5ei64_v_u32mf2_m(__VA_ARGS__)

◆ vsuxseg5ei64_v_u64m1

#define vsuxseg5ei64_v_u64m1 ( ... ) __riscv_vsuxseg5ei64_v_u64m1(__VA_ARGS__)

◆ vsuxseg5ei64_v_u64m1_m

#define vsuxseg5ei64_v_u64m1_m ( ... ) __riscv_vsuxseg5ei64_v_u64m1_m(__VA_ARGS__)

◆ vsuxseg5ei64_v_u8m1

#define vsuxseg5ei64_v_u8m1 ( ... ) __riscv_vsuxseg5ei64_v_u8m1(__VA_ARGS__)

◆ vsuxseg5ei64_v_u8m1_m

#define vsuxseg5ei64_v_u8m1_m ( ... ) __riscv_vsuxseg5ei64_v_u8m1_m(__VA_ARGS__)

◆ vsuxseg5ei64_v_u8mf2

#define vsuxseg5ei64_v_u8mf2 ( ... ) __riscv_vsuxseg5ei64_v_u8mf2(__VA_ARGS__)

◆ vsuxseg5ei64_v_u8mf2_m

#define vsuxseg5ei64_v_u8mf2_m ( ... ) __riscv_vsuxseg5ei64_v_u8mf2_m(__VA_ARGS__)

◆ vsuxseg5ei64_v_u8mf4

#define vsuxseg5ei64_v_u8mf4 ( ... ) __riscv_vsuxseg5ei64_v_u8mf4(__VA_ARGS__)

◆ vsuxseg5ei64_v_u8mf4_m

#define vsuxseg5ei64_v_u8mf4_m ( ... ) __riscv_vsuxseg5ei64_v_u8mf4_m(__VA_ARGS__)

◆ vsuxseg5ei64_v_u8mf8

#define vsuxseg5ei64_v_u8mf8 ( ... ) __riscv_vsuxseg5ei64_v_u8mf8(__VA_ARGS__)

◆ vsuxseg5ei64_v_u8mf8_m

#define vsuxseg5ei64_v_u8mf8_m ( ... ) __riscv_vsuxseg5ei64_v_u8mf8_m(__VA_ARGS__)

◆ vsuxseg5ei8_v_f16m1

#define vsuxseg5ei8_v_f16m1 ( ... ) __riscv_vsuxseg5ei8_v_f16m1(__VA_ARGS__)

◆ vsuxseg5ei8_v_f16m1_m

#define vsuxseg5ei8_v_f16m1_m ( ... ) __riscv_vsuxseg5ei8_v_f16m1_m(__VA_ARGS__)

◆ vsuxseg5ei8_v_f16mf2

#define vsuxseg5ei8_v_f16mf2 ( ... ) __riscv_vsuxseg5ei8_v_f16mf2(__VA_ARGS__)

◆ vsuxseg5ei8_v_f16mf2_m

#define vsuxseg5ei8_v_f16mf2_m ( ... ) __riscv_vsuxseg5ei8_v_f16mf2_m(__VA_ARGS__)

◆ vsuxseg5ei8_v_f16mf4

#define vsuxseg5ei8_v_f16mf4 ( ... ) __riscv_vsuxseg5ei8_v_f16mf4(__VA_ARGS__)

◆ vsuxseg5ei8_v_f16mf4_m

#define vsuxseg5ei8_v_f16mf4_m ( ... ) __riscv_vsuxseg5ei8_v_f16mf4_m(__VA_ARGS__)

◆ vsuxseg5ei8_v_f32m1

#define vsuxseg5ei8_v_f32m1 ( ... ) __riscv_vsuxseg5ei8_v_f32m1(__VA_ARGS__)

◆ vsuxseg5ei8_v_f32m1_m

#define vsuxseg5ei8_v_f32m1_m ( ... ) __riscv_vsuxseg5ei8_v_f32m1_m(__VA_ARGS__)

◆ vsuxseg5ei8_v_f32mf2

#define vsuxseg5ei8_v_f32mf2 ( ... ) __riscv_vsuxseg5ei8_v_f32mf2(__VA_ARGS__)

◆ vsuxseg5ei8_v_f32mf2_m

#define vsuxseg5ei8_v_f32mf2_m ( ... ) __riscv_vsuxseg5ei8_v_f32mf2_m(__VA_ARGS__)

◆ vsuxseg5ei8_v_f64m1

#define vsuxseg5ei8_v_f64m1 ( ... ) __riscv_vsuxseg5ei8_v_f64m1(__VA_ARGS__)

◆ vsuxseg5ei8_v_f64m1_m

#define vsuxseg5ei8_v_f64m1_m ( ... ) __riscv_vsuxseg5ei8_v_f64m1_m(__VA_ARGS__)

◆ vsuxseg5ei8_v_i16m1

#define vsuxseg5ei8_v_i16m1 ( ... ) __riscv_vsuxseg5ei8_v_i16m1(__VA_ARGS__)

◆ vsuxseg5ei8_v_i16m1_m

#define vsuxseg5ei8_v_i16m1_m ( ... ) __riscv_vsuxseg5ei8_v_i16m1_m(__VA_ARGS__)

◆ vsuxseg5ei8_v_i16mf2

#define vsuxseg5ei8_v_i16mf2 ( ... ) __riscv_vsuxseg5ei8_v_i16mf2(__VA_ARGS__)

◆ vsuxseg5ei8_v_i16mf2_m

#define vsuxseg5ei8_v_i16mf2_m ( ... ) __riscv_vsuxseg5ei8_v_i16mf2_m(__VA_ARGS__)

◆ vsuxseg5ei8_v_i16mf4

#define vsuxseg5ei8_v_i16mf4 ( ... ) __riscv_vsuxseg5ei8_v_i16mf4(__VA_ARGS__)

◆ vsuxseg5ei8_v_i16mf4_m

#define vsuxseg5ei8_v_i16mf4_m ( ... ) __riscv_vsuxseg5ei8_v_i16mf4_m(__VA_ARGS__)

◆ vsuxseg5ei8_v_i32m1

#define vsuxseg5ei8_v_i32m1 ( ... ) __riscv_vsuxseg5ei8_v_i32m1(__VA_ARGS__)

◆ vsuxseg5ei8_v_i32m1_m

#define vsuxseg5ei8_v_i32m1_m ( ... ) __riscv_vsuxseg5ei8_v_i32m1_m(__VA_ARGS__)

◆ vsuxseg5ei8_v_i32mf2

#define vsuxseg5ei8_v_i32mf2 ( ... ) __riscv_vsuxseg5ei8_v_i32mf2(__VA_ARGS__)

◆ vsuxseg5ei8_v_i32mf2_m

#define vsuxseg5ei8_v_i32mf2_m ( ... ) __riscv_vsuxseg5ei8_v_i32mf2_m(__VA_ARGS__)

◆ vsuxseg5ei8_v_i64m1

#define vsuxseg5ei8_v_i64m1 ( ... ) __riscv_vsuxseg5ei8_v_i64m1(__VA_ARGS__)

◆ vsuxseg5ei8_v_i64m1_m

#define vsuxseg5ei8_v_i64m1_m ( ... ) __riscv_vsuxseg5ei8_v_i64m1_m(__VA_ARGS__)

◆ vsuxseg5ei8_v_i8m1

#define vsuxseg5ei8_v_i8m1 ( ... ) __riscv_vsuxseg5ei8_v_i8m1(__VA_ARGS__)

◆ vsuxseg5ei8_v_i8m1_m

#define vsuxseg5ei8_v_i8m1_m ( ... ) __riscv_vsuxseg5ei8_v_i8m1_m(__VA_ARGS__)

◆ vsuxseg5ei8_v_i8mf2

#define vsuxseg5ei8_v_i8mf2 ( ... ) __riscv_vsuxseg5ei8_v_i8mf2(__VA_ARGS__)

◆ vsuxseg5ei8_v_i8mf2_m

#define vsuxseg5ei8_v_i8mf2_m ( ... ) __riscv_vsuxseg5ei8_v_i8mf2_m(__VA_ARGS__)

◆ vsuxseg5ei8_v_i8mf4

#define vsuxseg5ei8_v_i8mf4 ( ... ) __riscv_vsuxseg5ei8_v_i8mf4(__VA_ARGS__)

◆ vsuxseg5ei8_v_i8mf4_m

#define vsuxseg5ei8_v_i8mf4_m ( ... ) __riscv_vsuxseg5ei8_v_i8mf4_m(__VA_ARGS__)

◆ vsuxseg5ei8_v_i8mf8

#define vsuxseg5ei8_v_i8mf8 ( ... ) __riscv_vsuxseg5ei8_v_i8mf8(__VA_ARGS__)

◆ vsuxseg5ei8_v_i8mf8_m

#define vsuxseg5ei8_v_i8mf8_m ( ... ) __riscv_vsuxseg5ei8_v_i8mf8_m(__VA_ARGS__)

◆ vsuxseg5ei8_v_u16m1

#define vsuxseg5ei8_v_u16m1 ( ... ) __riscv_vsuxseg5ei8_v_u16m1(__VA_ARGS__)

◆ vsuxseg5ei8_v_u16m1_m

#define vsuxseg5ei8_v_u16m1_m ( ... ) __riscv_vsuxseg5ei8_v_u16m1_m(__VA_ARGS__)

◆ vsuxseg5ei8_v_u16mf2

#define vsuxseg5ei8_v_u16mf2 ( ... ) __riscv_vsuxseg5ei8_v_u16mf2(__VA_ARGS__)

◆ vsuxseg5ei8_v_u16mf2_m

#define vsuxseg5ei8_v_u16mf2_m ( ... ) __riscv_vsuxseg5ei8_v_u16mf2_m(__VA_ARGS__)

◆ vsuxseg5ei8_v_u16mf4

#define vsuxseg5ei8_v_u16mf4 ( ... ) __riscv_vsuxseg5ei8_v_u16mf4(__VA_ARGS__)

◆ vsuxseg5ei8_v_u16mf4_m

#define vsuxseg5ei8_v_u16mf4_m ( ... ) __riscv_vsuxseg5ei8_v_u16mf4_m(__VA_ARGS__)

◆ vsuxseg5ei8_v_u32m1

#define vsuxseg5ei8_v_u32m1 ( ... ) __riscv_vsuxseg5ei8_v_u32m1(__VA_ARGS__)

◆ vsuxseg5ei8_v_u32m1_m

#define vsuxseg5ei8_v_u32m1_m ( ... ) __riscv_vsuxseg5ei8_v_u32m1_m(__VA_ARGS__)

◆ vsuxseg5ei8_v_u32mf2

#define vsuxseg5ei8_v_u32mf2 ( ... ) __riscv_vsuxseg5ei8_v_u32mf2(__VA_ARGS__)

◆ vsuxseg5ei8_v_u32mf2_m

#define vsuxseg5ei8_v_u32mf2_m ( ... ) __riscv_vsuxseg5ei8_v_u32mf2_m(__VA_ARGS__)

◆ vsuxseg5ei8_v_u64m1

#define vsuxseg5ei8_v_u64m1 ( ... ) __riscv_vsuxseg5ei8_v_u64m1(__VA_ARGS__)

◆ vsuxseg5ei8_v_u64m1_m

#define vsuxseg5ei8_v_u64m1_m ( ... ) __riscv_vsuxseg5ei8_v_u64m1_m(__VA_ARGS__)

◆ vsuxseg5ei8_v_u8m1

#define vsuxseg5ei8_v_u8m1 ( ... ) __riscv_vsuxseg5ei8_v_u8m1(__VA_ARGS__)

◆ vsuxseg5ei8_v_u8m1_m

#define vsuxseg5ei8_v_u8m1_m ( ... ) __riscv_vsuxseg5ei8_v_u8m1_m(__VA_ARGS__)

◆ vsuxseg5ei8_v_u8mf2

#define vsuxseg5ei8_v_u8mf2 ( ... ) __riscv_vsuxseg5ei8_v_u8mf2(__VA_ARGS__)

◆ vsuxseg5ei8_v_u8mf2_m

#define vsuxseg5ei8_v_u8mf2_m ( ... ) __riscv_vsuxseg5ei8_v_u8mf2_m(__VA_ARGS__)

◆ vsuxseg5ei8_v_u8mf4

#define vsuxseg5ei8_v_u8mf4 ( ... ) __riscv_vsuxseg5ei8_v_u8mf4(__VA_ARGS__)

◆ vsuxseg5ei8_v_u8mf4_m

#define vsuxseg5ei8_v_u8mf4_m ( ... ) __riscv_vsuxseg5ei8_v_u8mf4_m(__VA_ARGS__)

◆ vsuxseg5ei8_v_u8mf8

#define vsuxseg5ei8_v_u8mf8 ( ... ) __riscv_vsuxseg5ei8_v_u8mf8(__VA_ARGS__)

◆ vsuxseg5ei8_v_u8mf8_m

#define vsuxseg5ei8_v_u8mf8_m ( ... ) __riscv_vsuxseg5ei8_v_u8mf8_m(__VA_ARGS__)

◆ vsuxseg6ei16_v_f16m1

#define vsuxseg6ei16_v_f16m1 ( ... ) __riscv_vsuxseg6ei16_v_f16m1(__VA_ARGS__)

◆ vsuxseg6ei16_v_f16m1_m

#define vsuxseg6ei16_v_f16m1_m ( ... ) __riscv_vsuxseg6ei16_v_f16m1_m(__VA_ARGS__)

◆ vsuxseg6ei16_v_f16mf2

#define vsuxseg6ei16_v_f16mf2 ( ... ) __riscv_vsuxseg6ei16_v_f16mf2(__VA_ARGS__)

◆ vsuxseg6ei16_v_f16mf2_m

#define vsuxseg6ei16_v_f16mf2_m ( ... ) __riscv_vsuxseg6ei16_v_f16mf2_m(__VA_ARGS__)

◆ vsuxseg6ei16_v_f16mf4

#define vsuxseg6ei16_v_f16mf4 ( ... ) __riscv_vsuxseg6ei16_v_f16mf4(__VA_ARGS__)

◆ vsuxseg6ei16_v_f16mf4_m

#define vsuxseg6ei16_v_f16mf4_m ( ... ) __riscv_vsuxseg6ei16_v_f16mf4_m(__VA_ARGS__)

◆ vsuxseg6ei16_v_f32m1

#define vsuxseg6ei16_v_f32m1 ( ... ) __riscv_vsuxseg6ei16_v_f32m1(__VA_ARGS__)

◆ vsuxseg6ei16_v_f32m1_m

#define vsuxseg6ei16_v_f32m1_m ( ... ) __riscv_vsuxseg6ei16_v_f32m1_m(__VA_ARGS__)

◆ vsuxseg6ei16_v_f32mf2

#define vsuxseg6ei16_v_f32mf2 ( ... ) __riscv_vsuxseg6ei16_v_f32mf2(__VA_ARGS__)

◆ vsuxseg6ei16_v_f32mf2_m

#define vsuxseg6ei16_v_f32mf2_m ( ... ) __riscv_vsuxseg6ei16_v_f32mf2_m(__VA_ARGS__)

◆ vsuxseg6ei16_v_f64m1

#define vsuxseg6ei16_v_f64m1 ( ... ) __riscv_vsuxseg6ei16_v_f64m1(__VA_ARGS__)

◆ vsuxseg6ei16_v_f64m1_m

#define vsuxseg6ei16_v_f64m1_m ( ... ) __riscv_vsuxseg6ei16_v_f64m1_m(__VA_ARGS__)

◆ vsuxseg6ei16_v_i16m1

#define vsuxseg6ei16_v_i16m1 ( ... ) __riscv_vsuxseg6ei16_v_i16m1(__VA_ARGS__)

◆ vsuxseg6ei16_v_i16m1_m

#define vsuxseg6ei16_v_i16m1_m ( ... ) __riscv_vsuxseg6ei16_v_i16m1_m(__VA_ARGS__)

◆ vsuxseg6ei16_v_i16mf2

#define vsuxseg6ei16_v_i16mf2 ( ... ) __riscv_vsuxseg6ei16_v_i16mf2(__VA_ARGS__)

◆ vsuxseg6ei16_v_i16mf2_m

#define vsuxseg6ei16_v_i16mf2_m ( ... ) __riscv_vsuxseg6ei16_v_i16mf2_m(__VA_ARGS__)

◆ vsuxseg6ei16_v_i16mf4

#define vsuxseg6ei16_v_i16mf4 ( ... ) __riscv_vsuxseg6ei16_v_i16mf4(__VA_ARGS__)

◆ vsuxseg6ei16_v_i16mf4_m

#define vsuxseg6ei16_v_i16mf4_m ( ... ) __riscv_vsuxseg6ei16_v_i16mf4_m(__VA_ARGS__)

◆ vsuxseg6ei16_v_i32m1

#define vsuxseg6ei16_v_i32m1 ( ... ) __riscv_vsuxseg6ei16_v_i32m1(__VA_ARGS__)

◆ vsuxseg6ei16_v_i32m1_m

#define vsuxseg6ei16_v_i32m1_m ( ... ) __riscv_vsuxseg6ei16_v_i32m1_m(__VA_ARGS__)

◆ vsuxseg6ei16_v_i32mf2

#define vsuxseg6ei16_v_i32mf2 ( ... ) __riscv_vsuxseg6ei16_v_i32mf2(__VA_ARGS__)

◆ vsuxseg6ei16_v_i32mf2_m

#define vsuxseg6ei16_v_i32mf2_m ( ... ) __riscv_vsuxseg6ei16_v_i32mf2_m(__VA_ARGS__)

◆ vsuxseg6ei16_v_i64m1

#define vsuxseg6ei16_v_i64m1 ( ... ) __riscv_vsuxseg6ei16_v_i64m1(__VA_ARGS__)

◆ vsuxseg6ei16_v_i64m1_m

#define vsuxseg6ei16_v_i64m1_m ( ... ) __riscv_vsuxseg6ei16_v_i64m1_m(__VA_ARGS__)

◆ vsuxseg6ei16_v_i8m1

#define vsuxseg6ei16_v_i8m1 ( ... ) __riscv_vsuxseg6ei16_v_i8m1(__VA_ARGS__)

◆ vsuxseg6ei16_v_i8m1_m

#define vsuxseg6ei16_v_i8m1_m ( ... ) __riscv_vsuxseg6ei16_v_i8m1_m(__VA_ARGS__)

◆ vsuxseg6ei16_v_i8mf2

#define vsuxseg6ei16_v_i8mf2 ( ... ) __riscv_vsuxseg6ei16_v_i8mf2(__VA_ARGS__)

◆ vsuxseg6ei16_v_i8mf2_m

#define vsuxseg6ei16_v_i8mf2_m ( ... ) __riscv_vsuxseg6ei16_v_i8mf2_m(__VA_ARGS__)

◆ vsuxseg6ei16_v_i8mf4

#define vsuxseg6ei16_v_i8mf4 ( ... ) __riscv_vsuxseg6ei16_v_i8mf4(__VA_ARGS__)

◆ vsuxseg6ei16_v_i8mf4_m

#define vsuxseg6ei16_v_i8mf4_m ( ... ) __riscv_vsuxseg6ei16_v_i8mf4_m(__VA_ARGS__)

◆ vsuxseg6ei16_v_i8mf8

#define vsuxseg6ei16_v_i8mf8 ( ... ) __riscv_vsuxseg6ei16_v_i8mf8(__VA_ARGS__)

◆ vsuxseg6ei16_v_i8mf8_m

#define vsuxseg6ei16_v_i8mf8_m ( ... ) __riscv_vsuxseg6ei16_v_i8mf8_m(__VA_ARGS__)

◆ vsuxseg6ei16_v_u16m1

#define vsuxseg6ei16_v_u16m1 ( ... ) __riscv_vsuxseg6ei16_v_u16m1(__VA_ARGS__)

◆ vsuxseg6ei16_v_u16m1_m

#define vsuxseg6ei16_v_u16m1_m ( ... ) __riscv_vsuxseg6ei16_v_u16m1_m(__VA_ARGS__)

◆ vsuxseg6ei16_v_u16mf2

#define vsuxseg6ei16_v_u16mf2 ( ... ) __riscv_vsuxseg6ei16_v_u16mf2(__VA_ARGS__)

◆ vsuxseg6ei16_v_u16mf2_m

#define vsuxseg6ei16_v_u16mf2_m ( ... ) __riscv_vsuxseg6ei16_v_u16mf2_m(__VA_ARGS__)

◆ vsuxseg6ei16_v_u16mf4

#define vsuxseg6ei16_v_u16mf4 ( ... ) __riscv_vsuxseg6ei16_v_u16mf4(__VA_ARGS__)

◆ vsuxseg6ei16_v_u16mf4_m

#define vsuxseg6ei16_v_u16mf4_m ( ... ) __riscv_vsuxseg6ei16_v_u16mf4_m(__VA_ARGS__)

◆ vsuxseg6ei16_v_u32m1

#define vsuxseg6ei16_v_u32m1 ( ... ) __riscv_vsuxseg6ei16_v_u32m1(__VA_ARGS__)

◆ vsuxseg6ei16_v_u32m1_m

#define vsuxseg6ei16_v_u32m1_m ( ... ) __riscv_vsuxseg6ei16_v_u32m1_m(__VA_ARGS__)

◆ vsuxseg6ei16_v_u32mf2

#define vsuxseg6ei16_v_u32mf2 ( ... ) __riscv_vsuxseg6ei16_v_u32mf2(__VA_ARGS__)

◆ vsuxseg6ei16_v_u32mf2_m

#define vsuxseg6ei16_v_u32mf2_m ( ... ) __riscv_vsuxseg6ei16_v_u32mf2_m(__VA_ARGS__)

◆ vsuxseg6ei16_v_u64m1

#define vsuxseg6ei16_v_u64m1 ( ... ) __riscv_vsuxseg6ei16_v_u64m1(__VA_ARGS__)

◆ vsuxseg6ei16_v_u64m1_m

#define vsuxseg6ei16_v_u64m1_m ( ... ) __riscv_vsuxseg6ei16_v_u64m1_m(__VA_ARGS__)

◆ vsuxseg6ei16_v_u8m1

#define vsuxseg6ei16_v_u8m1 ( ... ) __riscv_vsuxseg6ei16_v_u8m1(__VA_ARGS__)

◆ vsuxseg6ei16_v_u8m1_m

#define vsuxseg6ei16_v_u8m1_m ( ... ) __riscv_vsuxseg6ei16_v_u8m1_m(__VA_ARGS__)

◆ vsuxseg6ei16_v_u8mf2

#define vsuxseg6ei16_v_u8mf2 ( ... ) __riscv_vsuxseg6ei16_v_u8mf2(__VA_ARGS__)

◆ vsuxseg6ei16_v_u8mf2_m

#define vsuxseg6ei16_v_u8mf2_m ( ... ) __riscv_vsuxseg6ei16_v_u8mf2_m(__VA_ARGS__)

◆ vsuxseg6ei16_v_u8mf4

#define vsuxseg6ei16_v_u8mf4 ( ... ) __riscv_vsuxseg6ei16_v_u8mf4(__VA_ARGS__)

◆ vsuxseg6ei16_v_u8mf4_m

#define vsuxseg6ei16_v_u8mf4_m ( ... ) __riscv_vsuxseg6ei16_v_u8mf4_m(__VA_ARGS__)

◆ vsuxseg6ei16_v_u8mf8

#define vsuxseg6ei16_v_u8mf8 ( ... ) __riscv_vsuxseg6ei16_v_u8mf8(__VA_ARGS__)

◆ vsuxseg6ei16_v_u8mf8_m

#define vsuxseg6ei16_v_u8mf8_m ( ... ) __riscv_vsuxseg6ei16_v_u8mf8_m(__VA_ARGS__)

◆ vsuxseg6ei32_v_f16m1

#define vsuxseg6ei32_v_f16m1 ( ... ) __riscv_vsuxseg6ei32_v_f16m1(__VA_ARGS__)

◆ vsuxseg6ei32_v_f16m1_m

#define vsuxseg6ei32_v_f16m1_m ( ... ) __riscv_vsuxseg6ei32_v_f16m1_m(__VA_ARGS__)

◆ vsuxseg6ei32_v_f16mf2

#define vsuxseg6ei32_v_f16mf2 ( ... ) __riscv_vsuxseg6ei32_v_f16mf2(__VA_ARGS__)

◆ vsuxseg6ei32_v_f16mf2_m

#define vsuxseg6ei32_v_f16mf2_m ( ... ) __riscv_vsuxseg6ei32_v_f16mf2_m(__VA_ARGS__)

◆ vsuxseg6ei32_v_f16mf4

#define vsuxseg6ei32_v_f16mf4 ( ... ) __riscv_vsuxseg6ei32_v_f16mf4(__VA_ARGS__)

◆ vsuxseg6ei32_v_f16mf4_m

#define vsuxseg6ei32_v_f16mf4_m ( ... ) __riscv_vsuxseg6ei32_v_f16mf4_m(__VA_ARGS__)

◆ vsuxseg6ei32_v_f32m1

#define vsuxseg6ei32_v_f32m1 ( ... ) __riscv_vsuxseg6ei32_v_f32m1(__VA_ARGS__)

◆ vsuxseg6ei32_v_f32m1_m

#define vsuxseg6ei32_v_f32m1_m ( ... ) __riscv_vsuxseg6ei32_v_f32m1_m(__VA_ARGS__)

◆ vsuxseg6ei32_v_f32mf2

#define vsuxseg6ei32_v_f32mf2 ( ... ) __riscv_vsuxseg6ei32_v_f32mf2(__VA_ARGS__)

◆ vsuxseg6ei32_v_f32mf2_m

#define vsuxseg6ei32_v_f32mf2_m ( ... ) __riscv_vsuxseg6ei32_v_f32mf2_m(__VA_ARGS__)

◆ vsuxseg6ei32_v_f64m1

#define vsuxseg6ei32_v_f64m1 ( ... ) __riscv_vsuxseg6ei32_v_f64m1(__VA_ARGS__)

◆ vsuxseg6ei32_v_f64m1_m

#define vsuxseg6ei32_v_f64m1_m ( ... ) __riscv_vsuxseg6ei32_v_f64m1_m(__VA_ARGS__)

◆ vsuxseg6ei32_v_i16m1

#define vsuxseg6ei32_v_i16m1 ( ... ) __riscv_vsuxseg6ei32_v_i16m1(__VA_ARGS__)

◆ vsuxseg6ei32_v_i16m1_m

#define vsuxseg6ei32_v_i16m1_m ( ... ) __riscv_vsuxseg6ei32_v_i16m1_m(__VA_ARGS__)

◆ vsuxseg6ei32_v_i16mf2

#define vsuxseg6ei32_v_i16mf2 ( ... ) __riscv_vsuxseg6ei32_v_i16mf2(__VA_ARGS__)

◆ vsuxseg6ei32_v_i16mf2_m

#define vsuxseg6ei32_v_i16mf2_m ( ... ) __riscv_vsuxseg6ei32_v_i16mf2_m(__VA_ARGS__)

◆ vsuxseg6ei32_v_i16mf4

#define vsuxseg6ei32_v_i16mf4 ( ... ) __riscv_vsuxseg6ei32_v_i16mf4(__VA_ARGS__)

◆ vsuxseg6ei32_v_i16mf4_m

#define vsuxseg6ei32_v_i16mf4_m ( ... ) __riscv_vsuxseg6ei32_v_i16mf4_m(__VA_ARGS__)

◆ vsuxseg6ei32_v_i32m1

#define vsuxseg6ei32_v_i32m1 ( ... ) __riscv_vsuxseg6ei32_v_i32m1(__VA_ARGS__)

◆ vsuxseg6ei32_v_i32m1_m

#define vsuxseg6ei32_v_i32m1_m ( ... ) __riscv_vsuxseg6ei32_v_i32m1_m(__VA_ARGS__)

◆ vsuxseg6ei32_v_i32mf2

#define vsuxseg6ei32_v_i32mf2 ( ... ) __riscv_vsuxseg6ei32_v_i32mf2(__VA_ARGS__)

◆ vsuxseg6ei32_v_i32mf2_m

#define vsuxseg6ei32_v_i32mf2_m ( ... ) __riscv_vsuxseg6ei32_v_i32mf2_m(__VA_ARGS__)

◆ vsuxseg6ei32_v_i64m1

#define vsuxseg6ei32_v_i64m1 ( ... ) __riscv_vsuxseg6ei32_v_i64m1(__VA_ARGS__)

◆ vsuxseg6ei32_v_i64m1_m

#define vsuxseg6ei32_v_i64m1_m ( ... ) __riscv_vsuxseg6ei32_v_i64m1_m(__VA_ARGS__)

◆ vsuxseg6ei32_v_i8m1

#define vsuxseg6ei32_v_i8m1 ( ... ) __riscv_vsuxseg6ei32_v_i8m1(__VA_ARGS__)

◆ vsuxseg6ei32_v_i8m1_m

#define vsuxseg6ei32_v_i8m1_m ( ... ) __riscv_vsuxseg6ei32_v_i8m1_m(__VA_ARGS__)

◆ vsuxseg6ei32_v_i8mf2

#define vsuxseg6ei32_v_i8mf2 ( ... ) __riscv_vsuxseg6ei32_v_i8mf2(__VA_ARGS__)

◆ vsuxseg6ei32_v_i8mf2_m

#define vsuxseg6ei32_v_i8mf2_m ( ... ) __riscv_vsuxseg6ei32_v_i8mf2_m(__VA_ARGS__)

◆ vsuxseg6ei32_v_i8mf4

#define vsuxseg6ei32_v_i8mf4 ( ... ) __riscv_vsuxseg6ei32_v_i8mf4(__VA_ARGS__)

◆ vsuxseg6ei32_v_i8mf4_m

#define vsuxseg6ei32_v_i8mf4_m ( ... ) __riscv_vsuxseg6ei32_v_i8mf4_m(__VA_ARGS__)

◆ vsuxseg6ei32_v_i8mf8

#define vsuxseg6ei32_v_i8mf8 ( ... ) __riscv_vsuxseg6ei32_v_i8mf8(__VA_ARGS__)

◆ vsuxseg6ei32_v_i8mf8_m

#define vsuxseg6ei32_v_i8mf8_m ( ... ) __riscv_vsuxseg6ei32_v_i8mf8_m(__VA_ARGS__)

◆ vsuxseg6ei32_v_u16m1

#define vsuxseg6ei32_v_u16m1 ( ... ) __riscv_vsuxseg6ei32_v_u16m1(__VA_ARGS__)

◆ vsuxseg6ei32_v_u16m1_m

#define vsuxseg6ei32_v_u16m1_m ( ... ) __riscv_vsuxseg6ei32_v_u16m1_m(__VA_ARGS__)

◆ vsuxseg6ei32_v_u16mf2

#define vsuxseg6ei32_v_u16mf2 ( ... ) __riscv_vsuxseg6ei32_v_u16mf2(__VA_ARGS__)

◆ vsuxseg6ei32_v_u16mf2_m

#define vsuxseg6ei32_v_u16mf2_m ( ... ) __riscv_vsuxseg6ei32_v_u16mf2_m(__VA_ARGS__)

◆ vsuxseg6ei32_v_u16mf4

#define vsuxseg6ei32_v_u16mf4 ( ... ) __riscv_vsuxseg6ei32_v_u16mf4(__VA_ARGS__)

◆ vsuxseg6ei32_v_u16mf4_m

#define vsuxseg6ei32_v_u16mf4_m ( ... ) __riscv_vsuxseg6ei32_v_u16mf4_m(__VA_ARGS__)

◆ vsuxseg6ei32_v_u32m1

#define vsuxseg6ei32_v_u32m1 ( ... ) __riscv_vsuxseg6ei32_v_u32m1(__VA_ARGS__)

◆ vsuxseg6ei32_v_u32m1_m

#define vsuxseg6ei32_v_u32m1_m ( ... ) __riscv_vsuxseg6ei32_v_u32m1_m(__VA_ARGS__)

◆ vsuxseg6ei32_v_u32mf2

#define vsuxseg6ei32_v_u32mf2 ( ... ) __riscv_vsuxseg6ei32_v_u32mf2(__VA_ARGS__)

◆ vsuxseg6ei32_v_u32mf2_m

#define vsuxseg6ei32_v_u32mf2_m ( ... ) __riscv_vsuxseg6ei32_v_u32mf2_m(__VA_ARGS__)

◆ vsuxseg6ei32_v_u64m1

#define vsuxseg6ei32_v_u64m1 ( ... ) __riscv_vsuxseg6ei32_v_u64m1(__VA_ARGS__)

◆ vsuxseg6ei32_v_u64m1_m

#define vsuxseg6ei32_v_u64m1_m ( ... ) __riscv_vsuxseg6ei32_v_u64m1_m(__VA_ARGS__)

◆ vsuxseg6ei32_v_u8m1

#define vsuxseg6ei32_v_u8m1 ( ... ) __riscv_vsuxseg6ei32_v_u8m1(__VA_ARGS__)

◆ vsuxseg6ei32_v_u8m1_m

#define vsuxseg6ei32_v_u8m1_m ( ... ) __riscv_vsuxseg6ei32_v_u8m1_m(__VA_ARGS__)

◆ vsuxseg6ei32_v_u8mf2

#define vsuxseg6ei32_v_u8mf2 ( ... ) __riscv_vsuxseg6ei32_v_u8mf2(__VA_ARGS__)

◆ vsuxseg6ei32_v_u8mf2_m

#define vsuxseg6ei32_v_u8mf2_m ( ... ) __riscv_vsuxseg6ei32_v_u8mf2_m(__VA_ARGS__)

◆ vsuxseg6ei32_v_u8mf4

#define vsuxseg6ei32_v_u8mf4 ( ... ) __riscv_vsuxseg6ei32_v_u8mf4(__VA_ARGS__)

◆ vsuxseg6ei32_v_u8mf4_m

#define vsuxseg6ei32_v_u8mf4_m ( ... ) __riscv_vsuxseg6ei32_v_u8mf4_m(__VA_ARGS__)

◆ vsuxseg6ei32_v_u8mf8

#define vsuxseg6ei32_v_u8mf8 ( ... ) __riscv_vsuxseg6ei32_v_u8mf8(__VA_ARGS__)

◆ vsuxseg6ei32_v_u8mf8_m

#define vsuxseg6ei32_v_u8mf8_m ( ... ) __riscv_vsuxseg6ei32_v_u8mf8_m(__VA_ARGS__)

◆ vsuxseg6ei64_v_f16m1

#define vsuxseg6ei64_v_f16m1 ( ... ) __riscv_vsuxseg6ei64_v_f16m1(__VA_ARGS__)

◆ vsuxseg6ei64_v_f16m1_m

#define vsuxseg6ei64_v_f16m1_m ( ... ) __riscv_vsuxseg6ei64_v_f16m1_m(__VA_ARGS__)

◆ vsuxseg6ei64_v_f16mf2

#define vsuxseg6ei64_v_f16mf2 ( ... ) __riscv_vsuxseg6ei64_v_f16mf2(__VA_ARGS__)

◆ vsuxseg6ei64_v_f16mf2_m

#define vsuxseg6ei64_v_f16mf2_m ( ... ) __riscv_vsuxseg6ei64_v_f16mf2_m(__VA_ARGS__)

◆ vsuxseg6ei64_v_f16mf4

#define vsuxseg6ei64_v_f16mf4 ( ... ) __riscv_vsuxseg6ei64_v_f16mf4(__VA_ARGS__)

◆ vsuxseg6ei64_v_f16mf4_m

#define vsuxseg6ei64_v_f16mf4_m ( ... ) __riscv_vsuxseg6ei64_v_f16mf4_m(__VA_ARGS__)

◆ vsuxseg6ei64_v_f32m1

#define vsuxseg6ei64_v_f32m1 ( ... ) __riscv_vsuxseg6ei64_v_f32m1(__VA_ARGS__)

◆ vsuxseg6ei64_v_f32m1_m

#define vsuxseg6ei64_v_f32m1_m ( ... ) __riscv_vsuxseg6ei64_v_f32m1_m(__VA_ARGS__)

◆ vsuxseg6ei64_v_f32mf2

#define vsuxseg6ei64_v_f32mf2 ( ... ) __riscv_vsuxseg6ei64_v_f32mf2(__VA_ARGS__)

◆ vsuxseg6ei64_v_f32mf2_m

#define vsuxseg6ei64_v_f32mf2_m ( ... ) __riscv_vsuxseg6ei64_v_f32mf2_m(__VA_ARGS__)

◆ vsuxseg6ei64_v_f64m1

#define vsuxseg6ei64_v_f64m1 ( ... ) __riscv_vsuxseg6ei64_v_f64m1(__VA_ARGS__)

◆ vsuxseg6ei64_v_f64m1_m

#define vsuxseg6ei64_v_f64m1_m ( ... ) __riscv_vsuxseg6ei64_v_f64m1_m(__VA_ARGS__)

◆ vsuxseg6ei64_v_i16m1

#define vsuxseg6ei64_v_i16m1 ( ... ) __riscv_vsuxseg6ei64_v_i16m1(__VA_ARGS__)

◆ vsuxseg6ei64_v_i16m1_m

#define vsuxseg6ei64_v_i16m1_m ( ... ) __riscv_vsuxseg6ei64_v_i16m1_m(__VA_ARGS__)

◆ vsuxseg6ei64_v_i16mf2

#define vsuxseg6ei64_v_i16mf2 ( ... ) __riscv_vsuxseg6ei64_v_i16mf2(__VA_ARGS__)

◆ vsuxseg6ei64_v_i16mf2_m

#define vsuxseg6ei64_v_i16mf2_m ( ... ) __riscv_vsuxseg6ei64_v_i16mf2_m(__VA_ARGS__)

◆ vsuxseg6ei64_v_i16mf4

#define vsuxseg6ei64_v_i16mf4 ( ... ) __riscv_vsuxseg6ei64_v_i16mf4(__VA_ARGS__)

◆ vsuxseg6ei64_v_i16mf4_m

#define vsuxseg6ei64_v_i16mf4_m ( ... ) __riscv_vsuxseg6ei64_v_i16mf4_m(__VA_ARGS__)

◆ vsuxseg6ei64_v_i32m1

#define vsuxseg6ei64_v_i32m1 ( ... ) __riscv_vsuxseg6ei64_v_i32m1(__VA_ARGS__)

◆ vsuxseg6ei64_v_i32m1_m

#define vsuxseg6ei64_v_i32m1_m ( ... ) __riscv_vsuxseg6ei64_v_i32m1_m(__VA_ARGS__)

◆ vsuxseg6ei64_v_i32mf2

#define vsuxseg6ei64_v_i32mf2 ( ... ) __riscv_vsuxseg6ei64_v_i32mf2(__VA_ARGS__)

◆ vsuxseg6ei64_v_i32mf2_m

#define vsuxseg6ei64_v_i32mf2_m ( ... ) __riscv_vsuxseg6ei64_v_i32mf2_m(__VA_ARGS__)

◆ vsuxseg6ei64_v_i64m1

#define vsuxseg6ei64_v_i64m1 ( ... ) __riscv_vsuxseg6ei64_v_i64m1(__VA_ARGS__)

◆ vsuxseg6ei64_v_i64m1_m

#define vsuxseg6ei64_v_i64m1_m ( ... ) __riscv_vsuxseg6ei64_v_i64m1_m(__VA_ARGS__)

◆ vsuxseg6ei64_v_i8m1

#define vsuxseg6ei64_v_i8m1 ( ... ) __riscv_vsuxseg6ei64_v_i8m1(__VA_ARGS__)

◆ vsuxseg6ei64_v_i8m1_m

#define vsuxseg6ei64_v_i8m1_m ( ... ) __riscv_vsuxseg6ei64_v_i8m1_m(__VA_ARGS__)

◆ vsuxseg6ei64_v_i8mf2

#define vsuxseg6ei64_v_i8mf2 ( ... ) __riscv_vsuxseg6ei64_v_i8mf2(__VA_ARGS__)

◆ vsuxseg6ei64_v_i8mf2_m

#define vsuxseg6ei64_v_i8mf2_m ( ... ) __riscv_vsuxseg6ei64_v_i8mf2_m(__VA_ARGS__)

◆ vsuxseg6ei64_v_i8mf4

#define vsuxseg6ei64_v_i8mf4 ( ... ) __riscv_vsuxseg6ei64_v_i8mf4(__VA_ARGS__)

◆ vsuxseg6ei64_v_i8mf4_m

#define vsuxseg6ei64_v_i8mf4_m ( ... ) __riscv_vsuxseg6ei64_v_i8mf4_m(__VA_ARGS__)

◆ vsuxseg6ei64_v_i8mf8

#define vsuxseg6ei64_v_i8mf8 ( ... ) __riscv_vsuxseg6ei64_v_i8mf8(__VA_ARGS__)

◆ vsuxseg6ei64_v_i8mf8_m

#define vsuxseg6ei64_v_i8mf8_m ( ... ) __riscv_vsuxseg6ei64_v_i8mf8_m(__VA_ARGS__)

◆ vsuxseg6ei64_v_u16m1

#define vsuxseg6ei64_v_u16m1 ( ... ) __riscv_vsuxseg6ei64_v_u16m1(__VA_ARGS__)

◆ vsuxseg6ei64_v_u16m1_m

#define vsuxseg6ei64_v_u16m1_m ( ... ) __riscv_vsuxseg6ei64_v_u16m1_m(__VA_ARGS__)

◆ vsuxseg6ei64_v_u16mf2

#define vsuxseg6ei64_v_u16mf2 ( ... ) __riscv_vsuxseg6ei64_v_u16mf2(__VA_ARGS__)

◆ vsuxseg6ei64_v_u16mf2_m

#define vsuxseg6ei64_v_u16mf2_m ( ... ) __riscv_vsuxseg6ei64_v_u16mf2_m(__VA_ARGS__)

◆ vsuxseg6ei64_v_u16mf4

#define vsuxseg6ei64_v_u16mf4 ( ... ) __riscv_vsuxseg6ei64_v_u16mf4(__VA_ARGS__)

◆ vsuxseg6ei64_v_u16mf4_m

#define vsuxseg6ei64_v_u16mf4_m ( ... ) __riscv_vsuxseg6ei64_v_u16mf4_m(__VA_ARGS__)

◆ vsuxseg6ei64_v_u32m1

#define vsuxseg6ei64_v_u32m1 ( ... ) __riscv_vsuxseg6ei64_v_u32m1(__VA_ARGS__)

◆ vsuxseg6ei64_v_u32m1_m

#define vsuxseg6ei64_v_u32m1_m ( ... ) __riscv_vsuxseg6ei64_v_u32m1_m(__VA_ARGS__)

◆ vsuxseg6ei64_v_u32mf2

#define vsuxseg6ei64_v_u32mf2 ( ... ) __riscv_vsuxseg6ei64_v_u32mf2(__VA_ARGS__)

◆ vsuxseg6ei64_v_u32mf2_m

#define vsuxseg6ei64_v_u32mf2_m ( ... ) __riscv_vsuxseg6ei64_v_u32mf2_m(__VA_ARGS__)

◆ vsuxseg6ei64_v_u64m1

#define vsuxseg6ei64_v_u64m1 ( ... ) __riscv_vsuxseg6ei64_v_u64m1(__VA_ARGS__)

◆ vsuxseg6ei64_v_u64m1_m

#define vsuxseg6ei64_v_u64m1_m ( ... ) __riscv_vsuxseg6ei64_v_u64m1_m(__VA_ARGS__)

◆ vsuxseg6ei64_v_u8m1

#define vsuxseg6ei64_v_u8m1 ( ... ) __riscv_vsuxseg6ei64_v_u8m1(__VA_ARGS__)

◆ vsuxseg6ei64_v_u8m1_m

#define vsuxseg6ei64_v_u8m1_m ( ... ) __riscv_vsuxseg6ei64_v_u8m1_m(__VA_ARGS__)

◆ vsuxseg6ei64_v_u8mf2

#define vsuxseg6ei64_v_u8mf2 ( ... ) __riscv_vsuxseg6ei64_v_u8mf2(__VA_ARGS__)

◆ vsuxseg6ei64_v_u8mf2_m

#define vsuxseg6ei64_v_u8mf2_m ( ... ) __riscv_vsuxseg6ei64_v_u8mf2_m(__VA_ARGS__)

◆ vsuxseg6ei64_v_u8mf4

#define vsuxseg6ei64_v_u8mf4 ( ... ) __riscv_vsuxseg6ei64_v_u8mf4(__VA_ARGS__)

◆ vsuxseg6ei64_v_u8mf4_m

#define vsuxseg6ei64_v_u8mf4_m ( ... ) __riscv_vsuxseg6ei64_v_u8mf4_m(__VA_ARGS__)

◆ vsuxseg6ei64_v_u8mf8

#define vsuxseg6ei64_v_u8mf8 ( ... ) __riscv_vsuxseg6ei64_v_u8mf8(__VA_ARGS__)

◆ vsuxseg6ei64_v_u8mf8_m

#define vsuxseg6ei64_v_u8mf8_m ( ... ) __riscv_vsuxseg6ei64_v_u8mf8_m(__VA_ARGS__)

◆ vsuxseg6ei8_v_f16m1

#define vsuxseg6ei8_v_f16m1 ( ... ) __riscv_vsuxseg6ei8_v_f16m1(__VA_ARGS__)

◆ vsuxseg6ei8_v_f16m1_m

#define vsuxseg6ei8_v_f16m1_m ( ... ) __riscv_vsuxseg6ei8_v_f16m1_m(__VA_ARGS__)

◆ vsuxseg6ei8_v_f16mf2

#define vsuxseg6ei8_v_f16mf2 ( ... ) __riscv_vsuxseg6ei8_v_f16mf2(__VA_ARGS__)

◆ vsuxseg6ei8_v_f16mf2_m

#define vsuxseg6ei8_v_f16mf2_m ( ... ) __riscv_vsuxseg6ei8_v_f16mf2_m(__VA_ARGS__)

◆ vsuxseg6ei8_v_f16mf4

#define vsuxseg6ei8_v_f16mf4 ( ... ) __riscv_vsuxseg6ei8_v_f16mf4(__VA_ARGS__)

◆ vsuxseg6ei8_v_f16mf4_m

#define vsuxseg6ei8_v_f16mf4_m ( ... ) __riscv_vsuxseg6ei8_v_f16mf4_m(__VA_ARGS__)

◆ vsuxseg6ei8_v_f32m1

#define vsuxseg6ei8_v_f32m1 ( ... ) __riscv_vsuxseg6ei8_v_f32m1(__VA_ARGS__)

◆ vsuxseg6ei8_v_f32m1_m

#define vsuxseg6ei8_v_f32m1_m ( ... ) __riscv_vsuxseg6ei8_v_f32m1_m(__VA_ARGS__)

◆ vsuxseg6ei8_v_f32mf2

#define vsuxseg6ei8_v_f32mf2 ( ... ) __riscv_vsuxseg6ei8_v_f32mf2(__VA_ARGS__)

◆ vsuxseg6ei8_v_f32mf2_m

#define vsuxseg6ei8_v_f32mf2_m ( ... ) __riscv_vsuxseg6ei8_v_f32mf2_m(__VA_ARGS__)

◆ vsuxseg6ei8_v_f64m1

#define vsuxseg6ei8_v_f64m1 ( ... ) __riscv_vsuxseg6ei8_v_f64m1(__VA_ARGS__)

◆ vsuxseg6ei8_v_f64m1_m

#define vsuxseg6ei8_v_f64m1_m ( ... ) __riscv_vsuxseg6ei8_v_f64m1_m(__VA_ARGS__)

◆ vsuxseg6ei8_v_i16m1

#define vsuxseg6ei8_v_i16m1 ( ... ) __riscv_vsuxseg6ei8_v_i16m1(__VA_ARGS__)

◆ vsuxseg6ei8_v_i16m1_m

#define vsuxseg6ei8_v_i16m1_m ( ... ) __riscv_vsuxseg6ei8_v_i16m1_m(__VA_ARGS__)

◆ vsuxseg6ei8_v_i16mf2

#define vsuxseg6ei8_v_i16mf2 ( ... ) __riscv_vsuxseg6ei8_v_i16mf2(__VA_ARGS__)

◆ vsuxseg6ei8_v_i16mf2_m

#define vsuxseg6ei8_v_i16mf2_m ( ... ) __riscv_vsuxseg6ei8_v_i16mf2_m(__VA_ARGS__)

◆ vsuxseg6ei8_v_i16mf4

#define vsuxseg6ei8_v_i16mf4 ( ... ) __riscv_vsuxseg6ei8_v_i16mf4(__VA_ARGS__)

◆ vsuxseg6ei8_v_i16mf4_m

#define vsuxseg6ei8_v_i16mf4_m ( ... ) __riscv_vsuxseg6ei8_v_i16mf4_m(__VA_ARGS__)

◆ vsuxseg6ei8_v_i32m1

#define vsuxseg6ei8_v_i32m1 ( ... ) __riscv_vsuxseg6ei8_v_i32m1(__VA_ARGS__)

◆ vsuxseg6ei8_v_i32m1_m

#define vsuxseg6ei8_v_i32m1_m ( ... ) __riscv_vsuxseg6ei8_v_i32m1_m(__VA_ARGS__)

◆ vsuxseg6ei8_v_i32mf2

#define vsuxseg6ei8_v_i32mf2 ( ... ) __riscv_vsuxseg6ei8_v_i32mf2(__VA_ARGS__)

◆ vsuxseg6ei8_v_i32mf2_m

#define vsuxseg6ei8_v_i32mf2_m ( ... ) __riscv_vsuxseg6ei8_v_i32mf2_m(__VA_ARGS__)

◆ vsuxseg6ei8_v_i64m1

#define vsuxseg6ei8_v_i64m1 ( ... ) __riscv_vsuxseg6ei8_v_i64m1(__VA_ARGS__)

◆ vsuxseg6ei8_v_i64m1_m

#define vsuxseg6ei8_v_i64m1_m ( ... ) __riscv_vsuxseg6ei8_v_i64m1_m(__VA_ARGS__)

◆ vsuxseg6ei8_v_i8m1

#define vsuxseg6ei8_v_i8m1 ( ... ) __riscv_vsuxseg6ei8_v_i8m1(__VA_ARGS__)

◆ vsuxseg6ei8_v_i8m1_m

#define vsuxseg6ei8_v_i8m1_m ( ... ) __riscv_vsuxseg6ei8_v_i8m1_m(__VA_ARGS__)

◆ vsuxseg6ei8_v_i8mf2

#define vsuxseg6ei8_v_i8mf2 ( ... ) __riscv_vsuxseg6ei8_v_i8mf2(__VA_ARGS__)

◆ vsuxseg6ei8_v_i8mf2_m

#define vsuxseg6ei8_v_i8mf2_m ( ... ) __riscv_vsuxseg6ei8_v_i8mf2_m(__VA_ARGS__)

◆ vsuxseg6ei8_v_i8mf4

#define vsuxseg6ei8_v_i8mf4 ( ... ) __riscv_vsuxseg6ei8_v_i8mf4(__VA_ARGS__)

◆ vsuxseg6ei8_v_i8mf4_m

#define vsuxseg6ei8_v_i8mf4_m ( ... ) __riscv_vsuxseg6ei8_v_i8mf4_m(__VA_ARGS__)

◆ vsuxseg6ei8_v_i8mf8

#define vsuxseg6ei8_v_i8mf8 ( ... ) __riscv_vsuxseg6ei8_v_i8mf8(__VA_ARGS__)

◆ vsuxseg6ei8_v_i8mf8_m

#define vsuxseg6ei8_v_i8mf8_m ( ... ) __riscv_vsuxseg6ei8_v_i8mf8_m(__VA_ARGS__)

◆ vsuxseg6ei8_v_u16m1

#define vsuxseg6ei8_v_u16m1 ( ... ) __riscv_vsuxseg6ei8_v_u16m1(__VA_ARGS__)

◆ vsuxseg6ei8_v_u16m1_m

#define vsuxseg6ei8_v_u16m1_m ( ... ) __riscv_vsuxseg6ei8_v_u16m1_m(__VA_ARGS__)

◆ vsuxseg6ei8_v_u16mf2

#define vsuxseg6ei8_v_u16mf2 ( ... ) __riscv_vsuxseg6ei8_v_u16mf2(__VA_ARGS__)

◆ vsuxseg6ei8_v_u16mf2_m

#define vsuxseg6ei8_v_u16mf2_m ( ... ) __riscv_vsuxseg6ei8_v_u16mf2_m(__VA_ARGS__)

◆ vsuxseg6ei8_v_u16mf4

#define vsuxseg6ei8_v_u16mf4 ( ... ) __riscv_vsuxseg6ei8_v_u16mf4(__VA_ARGS__)

◆ vsuxseg6ei8_v_u16mf4_m

#define vsuxseg6ei8_v_u16mf4_m ( ... ) __riscv_vsuxseg6ei8_v_u16mf4_m(__VA_ARGS__)

◆ vsuxseg6ei8_v_u32m1

#define vsuxseg6ei8_v_u32m1 ( ... ) __riscv_vsuxseg6ei8_v_u32m1(__VA_ARGS__)

◆ vsuxseg6ei8_v_u32m1_m

#define vsuxseg6ei8_v_u32m1_m ( ... ) __riscv_vsuxseg6ei8_v_u32m1_m(__VA_ARGS__)

◆ vsuxseg6ei8_v_u32mf2

#define vsuxseg6ei8_v_u32mf2 ( ... ) __riscv_vsuxseg6ei8_v_u32mf2(__VA_ARGS__)

◆ vsuxseg6ei8_v_u32mf2_m

#define vsuxseg6ei8_v_u32mf2_m ( ... ) __riscv_vsuxseg6ei8_v_u32mf2_m(__VA_ARGS__)

◆ vsuxseg6ei8_v_u64m1

#define vsuxseg6ei8_v_u64m1 ( ... ) __riscv_vsuxseg6ei8_v_u64m1(__VA_ARGS__)

◆ vsuxseg6ei8_v_u64m1_m

#define vsuxseg6ei8_v_u64m1_m ( ... ) __riscv_vsuxseg6ei8_v_u64m1_m(__VA_ARGS__)

◆ vsuxseg6ei8_v_u8m1

#define vsuxseg6ei8_v_u8m1 ( ... ) __riscv_vsuxseg6ei8_v_u8m1(__VA_ARGS__)

◆ vsuxseg6ei8_v_u8m1_m

#define vsuxseg6ei8_v_u8m1_m ( ... ) __riscv_vsuxseg6ei8_v_u8m1_m(__VA_ARGS__)

◆ vsuxseg6ei8_v_u8mf2

#define vsuxseg6ei8_v_u8mf2 ( ... ) __riscv_vsuxseg6ei8_v_u8mf2(__VA_ARGS__)

◆ vsuxseg6ei8_v_u8mf2_m

#define vsuxseg6ei8_v_u8mf2_m ( ... ) __riscv_vsuxseg6ei8_v_u8mf2_m(__VA_ARGS__)

◆ vsuxseg6ei8_v_u8mf4

#define vsuxseg6ei8_v_u8mf4 ( ... ) __riscv_vsuxseg6ei8_v_u8mf4(__VA_ARGS__)

◆ vsuxseg6ei8_v_u8mf4_m

#define vsuxseg6ei8_v_u8mf4_m ( ... ) __riscv_vsuxseg6ei8_v_u8mf4_m(__VA_ARGS__)

◆ vsuxseg6ei8_v_u8mf8

#define vsuxseg6ei8_v_u8mf8 ( ... ) __riscv_vsuxseg6ei8_v_u8mf8(__VA_ARGS__)

◆ vsuxseg6ei8_v_u8mf8_m

#define vsuxseg6ei8_v_u8mf8_m ( ... ) __riscv_vsuxseg6ei8_v_u8mf8_m(__VA_ARGS__)

◆ vsuxseg7ei16_v_f16m1

#define vsuxseg7ei16_v_f16m1 ( ... ) __riscv_vsuxseg7ei16_v_f16m1(__VA_ARGS__)

◆ vsuxseg7ei16_v_f16m1_m

#define vsuxseg7ei16_v_f16m1_m ( ... ) __riscv_vsuxseg7ei16_v_f16m1_m(__VA_ARGS__)

◆ vsuxseg7ei16_v_f16mf2

#define vsuxseg7ei16_v_f16mf2 ( ... ) __riscv_vsuxseg7ei16_v_f16mf2(__VA_ARGS__)

◆ vsuxseg7ei16_v_f16mf2_m

#define vsuxseg7ei16_v_f16mf2_m ( ... ) __riscv_vsuxseg7ei16_v_f16mf2_m(__VA_ARGS__)

◆ vsuxseg7ei16_v_f16mf4

#define vsuxseg7ei16_v_f16mf4 ( ... ) __riscv_vsuxseg7ei16_v_f16mf4(__VA_ARGS__)

◆ vsuxseg7ei16_v_f16mf4_m

#define vsuxseg7ei16_v_f16mf4_m ( ... ) __riscv_vsuxseg7ei16_v_f16mf4_m(__VA_ARGS__)

◆ vsuxseg7ei16_v_f32m1

#define vsuxseg7ei16_v_f32m1 ( ... ) __riscv_vsuxseg7ei16_v_f32m1(__VA_ARGS__)

◆ vsuxseg7ei16_v_f32m1_m

#define vsuxseg7ei16_v_f32m1_m ( ... ) __riscv_vsuxseg7ei16_v_f32m1_m(__VA_ARGS__)

◆ vsuxseg7ei16_v_f32mf2

#define vsuxseg7ei16_v_f32mf2 ( ... ) __riscv_vsuxseg7ei16_v_f32mf2(__VA_ARGS__)

◆ vsuxseg7ei16_v_f32mf2_m

#define vsuxseg7ei16_v_f32mf2_m ( ... ) __riscv_vsuxseg7ei16_v_f32mf2_m(__VA_ARGS__)

◆ vsuxseg7ei16_v_f64m1

#define vsuxseg7ei16_v_f64m1 ( ... ) __riscv_vsuxseg7ei16_v_f64m1(__VA_ARGS__)

◆ vsuxseg7ei16_v_f64m1_m

#define vsuxseg7ei16_v_f64m1_m ( ... ) __riscv_vsuxseg7ei16_v_f64m1_m(__VA_ARGS__)

◆ vsuxseg7ei16_v_i16m1

#define vsuxseg7ei16_v_i16m1 ( ... ) __riscv_vsuxseg7ei16_v_i16m1(__VA_ARGS__)

◆ vsuxseg7ei16_v_i16m1_m

#define vsuxseg7ei16_v_i16m1_m ( ... ) __riscv_vsuxseg7ei16_v_i16m1_m(__VA_ARGS__)

◆ vsuxseg7ei16_v_i16mf2

#define vsuxseg7ei16_v_i16mf2 ( ... ) __riscv_vsuxseg7ei16_v_i16mf2(__VA_ARGS__)

◆ vsuxseg7ei16_v_i16mf2_m

#define vsuxseg7ei16_v_i16mf2_m ( ... ) __riscv_vsuxseg7ei16_v_i16mf2_m(__VA_ARGS__)

◆ vsuxseg7ei16_v_i16mf4

#define vsuxseg7ei16_v_i16mf4 ( ... ) __riscv_vsuxseg7ei16_v_i16mf4(__VA_ARGS__)

◆ vsuxseg7ei16_v_i16mf4_m

#define vsuxseg7ei16_v_i16mf4_m ( ... ) __riscv_vsuxseg7ei16_v_i16mf4_m(__VA_ARGS__)

◆ vsuxseg7ei16_v_i32m1

#define vsuxseg7ei16_v_i32m1 ( ... ) __riscv_vsuxseg7ei16_v_i32m1(__VA_ARGS__)

◆ vsuxseg7ei16_v_i32m1_m

#define vsuxseg7ei16_v_i32m1_m ( ... ) __riscv_vsuxseg7ei16_v_i32m1_m(__VA_ARGS__)

◆ vsuxseg7ei16_v_i32mf2

#define vsuxseg7ei16_v_i32mf2 ( ... ) __riscv_vsuxseg7ei16_v_i32mf2(__VA_ARGS__)

◆ vsuxseg7ei16_v_i32mf2_m

#define vsuxseg7ei16_v_i32mf2_m ( ... ) __riscv_vsuxseg7ei16_v_i32mf2_m(__VA_ARGS__)

◆ vsuxseg7ei16_v_i64m1

#define vsuxseg7ei16_v_i64m1 ( ... ) __riscv_vsuxseg7ei16_v_i64m1(__VA_ARGS__)

◆ vsuxseg7ei16_v_i64m1_m

#define vsuxseg7ei16_v_i64m1_m ( ... ) __riscv_vsuxseg7ei16_v_i64m1_m(__VA_ARGS__)

◆ vsuxseg7ei16_v_i8m1

#define vsuxseg7ei16_v_i8m1 ( ... ) __riscv_vsuxseg7ei16_v_i8m1(__VA_ARGS__)

◆ vsuxseg7ei16_v_i8m1_m

#define vsuxseg7ei16_v_i8m1_m ( ... ) __riscv_vsuxseg7ei16_v_i8m1_m(__VA_ARGS__)

◆ vsuxseg7ei16_v_i8mf2

#define vsuxseg7ei16_v_i8mf2 ( ... ) __riscv_vsuxseg7ei16_v_i8mf2(__VA_ARGS__)

◆ vsuxseg7ei16_v_i8mf2_m

#define vsuxseg7ei16_v_i8mf2_m ( ... ) __riscv_vsuxseg7ei16_v_i8mf2_m(__VA_ARGS__)

◆ vsuxseg7ei16_v_i8mf4

#define vsuxseg7ei16_v_i8mf4 ( ... ) __riscv_vsuxseg7ei16_v_i8mf4(__VA_ARGS__)

◆ vsuxseg7ei16_v_i8mf4_m

#define vsuxseg7ei16_v_i8mf4_m ( ... ) __riscv_vsuxseg7ei16_v_i8mf4_m(__VA_ARGS__)

◆ vsuxseg7ei16_v_i8mf8

#define vsuxseg7ei16_v_i8mf8 ( ... ) __riscv_vsuxseg7ei16_v_i8mf8(__VA_ARGS__)

◆ vsuxseg7ei16_v_i8mf8_m

#define vsuxseg7ei16_v_i8mf8_m ( ... ) __riscv_vsuxseg7ei16_v_i8mf8_m(__VA_ARGS__)

◆ vsuxseg7ei16_v_u16m1

#define vsuxseg7ei16_v_u16m1 ( ... ) __riscv_vsuxseg7ei16_v_u16m1(__VA_ARGS__)

◆ vsuxseg7ei16_v_u16m1_m

#define vsuxseg7ei16_v_u16m1_m ( ... ) __riscv_vsuxseg7ei16_v_u16m1_m(__VA_ARGS__)

◆ vsuxseg7ei16_v_u16mf2

#define vsuxseg7ei16_v_u16mf2 ( ... ) __riscv_vsuxseg7ei16_v_u16mf2(__VA_ARGS__)

◆ vsuxseg7ei16_v_u16mf2_m

#define vsuxseg7ei16_v_u16mf2_m ( ... ) __riscv_vsuxseg7ei16_v_u16mf2_m(__VA_ARGS__)

◆ vsuxseg7ei16_v_u16mf4

#define vsuxseg7ei16_v_u16mf4 ( ... ) __riscv_vsuxseg7ei16_v_u16mf4(__VA_ARGS__)

◆ vsuxseg7ei16_v_u16mf4_m

#define vsuxseg7ei16_v_u16mf4_m ( ... ) __riscv_vsuxseg7ei16_v_u16mf4_m(__VA_ARGS__)

◆ vsuxseg7ei16_v_u32m1

#define vsuxseg7ei16_v_u32m1 ( ... ) __riscv_vsuxseg7ei16_v_u32m1(__VA_ARGS__)

◆ vsuxseg7ei16_v_u32m1_m

#define vsuxseg7ei16_v_u32m1_m ( ... ) __riscv_vsuxseg7ei16_v_u32m1_m(__VA_ARGS__)

◆ vsuxseg7ei16_v_u32mf2

#define vsuxseg7ei16_v_u32mf2 ( ... ) __riscv_vsuxseg7ei16_v_u32mf2(__VA_ARGS__)

◆ vsuxseg7ei16_v_u32mf2_m

#define vsuxseg7ei16_v_u32mf2_m ( ... ) __riscv_vsuxseg7ei16_v_u32mf2_m(__VA_ARGS__)

◆ vsuxseg7ei16_v_u64m1

#define vsuxseg7ei16_v_u64m1 ( ... ) __riscv_vsuxseg7ei16_v_u64m1(__VA_ARGS__)

◆ vsuxseg7ei16_v_u64m1_m

#define vsuxseg7ei16_v_u64m1_m ( ... ) __riscv_vsuxseg7ei16_v_u64m1_m(__VA_ARGS__)

◆ vsuxseg7ei16_v_u8m1

#define vsuxseg7ei16_v_u8m1 ( ... ) __riscv_vsuxseg7ei16_v_u8m1(__VA_ARGS__)

◆ vsuxseg7ei16_v_u8m1_m

#define vsuxseg7ei16_v_u8m1_m ( ... ) __riscv_vsuxseg7ei16_v_u8m1_m(__VA_ARGS__)

◆ vsuxseg7ei16_v_u8mf2

#define vsuxseg7ei16_v_u8mf2 ( ... ) __riscv_vsuxseg7ei16_v_u8mf2(__VA_ARGS__)

◆ vsuxseg7ei16_v_u8mf2_m

#define vsuxseg7ei16_v_u8mf2_m ( ... ) __riscv_vsuxseg7ei16_v_u8mf2_m(__VA_ARGS__)

◆ vsuxseg7ei16_v_u8mf4

#define vsuxseg7ei16_v_u8mf4 ( ... ) __riscv_vsuxseg7ei16_v_u8mf4(__VA_ARGS__)

◆ vsuxseg7ei16_v_u8mf4_m

#define vsuxseg7ei16_v_u8mf4_m ( ... ) __riscv_vsuxseg7ei16_v_u8mf4_m(__VA_ARGS__)

◆ vsuxseg7ei16_v_u8mf8

#define vsuxseg7ei16_v_u8mf8 ( ... ) __riscv_vsuxseg7ei16_v_u8mf8(__VA_ARGS__)

◆ vsuxseg7ei16_v_u8mf8_m

#define vsuxseg7ei16_v_u8mf8_m ( ... ) __riscv_vsuxseg7ei16_v_u8mf8_m(__VA_ARGS__)

◆ vsuxseg7ei32_v_f16m1

#define vsuxseg7ei32_v_f16m1 ( ... ) __riscv_vsuxseg7ei32_v_f16m1(__VA_ARGS__)

◆ vsuxseg7ei32_v_f16m1_m

#define vsuxseg7ei32_v_f16m1_m ( ... ) __riscv_vsuxseg7ei32_v_f16m1_m(__VA_ARGS__)

◆ vsuxseg7ei32_v_f16mf2

#define vsuxseg7ei32_v_f16mf2 ( ... ) __riscv_vsuxseg7ei32_v_f16mf2(__VA_ARGS__)

◆ vsuxseg7ei32_v_f16mf2_m

#define vsuxseg7ei32_v_f16mf2_m ( ... ) __riscv_vsuxseg7ei32_v_f16mf2_m(__VA_ARGS__)

◆ vsuxseg7ei32_v_f16mf4

#define vsuxseg7ei32_v_f16mf4 ( ... ) __riscv_vsuxseg7ei32_v_f16mf4(__VA_ARGS__)

◆ vsuxseg7ei32_v_f16mf4_m

#define vsuxseg7ei32_v_f16mf4_m ( ... ) __riscv_vsuxseg7ei32_v_f16mf4_m(__VA_ARGS__)

◆ vsuxseg7ei32_v_f32m1

#define vsuxseg7ei32_v_f32m1 ( ... ) __riscv_vsuxseg7ei32_v_f32m1(__VA_ARGS__)

◆ vsuxseg7ei32_v_f32m1_m

#define vsuxseg7ei32_v_f32m1_m ( ... ) __riscv_vsuxseg7ei32_v_f32m1_m(__VA_ARGS__)

◆ vsuxseg7ei32_v_f32mf2

#define vsuxseg7ei32_v_f32mf2 ( ... ) __riscv_vsuxseg7ei32_v_f32mf2(__VA_ARGS__)

◆ vsuxseg7ei32_v_f32mf2_m

#define vsuxseg7ei32_v_f32mf2_m ( ... ) __riscv_vsuxseg7ei32_v_f32mf2_m(__VA_ARGS__)

◆ vsuxseg7ei32_v_f64m1

#define vsuxseg7ei32_v_f64m1 ( ... ) __riscv_vsuxseg7ei32_v_f64m1(__VA_ARGS__)

◆ vsuxseg7ei32_v_f64m1_m

#define vsuxseg7ei32_v_f64m1_m ( ... ) __riscv_vsuxseg7ei32_v_f64m1_m(__VA_ARGS__)

◆ vsuxseg7ei32_v_i16m1

#define vsuxseg7ei32_v_i16m1 ( ... ) __riscv_vsuxseg7ei32_v_i16m1(__VA_ARGS__)

◆ vsuxseg7ei32_v_i16m1_m

#define vsuxseg7ei32_v_i16m1_m ( ... ) __riscv_vsuxseg7ei32_v_i16m1_m(__VA_ARGS__)

◆ vsuxseg7ei32_v_i16mf2

#define vsuxseg7ei32_v_i16mf2 ( ... ) __riscv_vsuxseg7ei32_v_i16mf2(__VA_ARGS__)

◆ vsuxseg7ei32_v_i16mf2_m

#define vsuxseg7ei32_v_i16mf2_m ( ... ) __riscv_vsuxseg7ei32_v_i16mf2_m(__VA_ARGS__)

◆ vsuxseg7ei32_v_i16mf4

#define vsuxseg7ei32_v_i16mf4 ( ... ) __riscv_vsuxseg7ei32_v_i16mf4(__VA_ARGS__)

◆ vsuxseg7ei32_v_i16mf4_m

#define vsuxseg7ei32_v_i16mf4_m ( ... ) __riscv_vsuxseg7ei32_v_i16mf4_m(__VA_ARGS__)

◆ vsuxseg7ei32_v_i32m1

#define vsuxseg7ei32_v_i32m1 ( ... ) __riscv_vsuxseg7ei32_v_i32m1(__VA_ARGS__)

◆ vsuxseg7ei32_v_i32m1_m

#define vsuxseg7ei32_v_i32m1_m ( ... ) __riscv_vsuxseg7ei32_v_i32m1_m(__VA_ARGS__)

◆ vsuxseg7ei32_v_i32mf2

#define vsuxseg7ei32_v_i32mf2 ( ... ) __riscv_vsuxseg7ei32_v_i32mf2(__VA_ARGS__)

◆ vsuxseg7ei32_v_i32mf2_m

#define vsuxseg7ei32_v_i32mf2_m ( ... ) __riscv_vsuxseg7ei32_v_i32mf2_m(__VA_ARGS__)

◆ vsuxseg7ei32_v_i64m1

#define vsuxseg7ei32_v_i64m1 ( ... ) __riscv_vsuxseg7ei32_v_i64m1(__VA_ARGS__)

◆ vsuxseg7ei32_v_i64m1_m

#define vsuxseg7ei32_v_i64m1_m ( ... ) __riscv_vsuxseg7ei32_v_i64m1_m(__VA_ARGS__)

◆ vsuxseg7ei32_v_i8m1

#define vsuxseg7ei32_v_i8m1 ( ... ) __riscv_vsuxseg7ei32_v_i8m1(__VA_ARGS__)

◆ vsuxseg7ei32_v_i8m1_m

#define vsuxseg7ei32_v_i8m1_m ( ... ) __riscv_vsuxseg7ei32_v_i8m1_m(__VA_ARGS__)

◆ vsuxseg7ei32_v_i8mf2

#define vsuxseg7ei32_v_i8mf2 ( ... ) __riscv_vsuxseg7ei32_v_i8mf2(__VA_ARGS__)

◆ vsuxseg7ei32_v_i8mf2_m

#define vsuxseg7ei32_v_i8mf2_m ( ... ) __riscv_vsuxseg7ei32_v_i8mf2_m(__VA_ARGS__)

◆ vsuxseg7ei32_v_i8mf4

#define vsuxseg7ei32_v_i8mf4 ( ... ) __riscv_vsuxseg7ei32_v_i8mf4(__VA_ARGS__)

◆ vsuxseg7ei32_v_i8mf4_m

#define vsuxseg7ei32_v_i8mf4_m ( ... ) __riscv_vsuxseg7ei32_v_i8mf4_m(__VA_ARGS__)

◆ vsuxseg7ei32_v_i8mf8

#define vsuxseg7ei32_v_i8mf8 ( ... ) __riscv_vsuxseg7ei32_v_i8mf8(__VA_ARGS__)

◆ vsuxseg7ei32_v_i8mf8_m

#define vsuxseg7ei32_v_i8mf8_m ( ... ) __riscv_vsuxseg7ei32_v_i8mf8_m(__VA_ARGS__)

◆ vsuxseg7ei32_v_u16m1

#define vsuxseg7ei32_v_u16m1 ( ... ) __riscv_vsuxseg7ei32_v_u16m1(__VA_ARGS__)

◆ vsuxseg7ei32_v_u16m1_m

#define vsuxseg7ei32_v_u16m1_m ( ... ) __riscv_vsuxseg7ei32_v_u16m1_m(__VA_ARGS__)

◆ vsuxseg7ei32_v_u16mf2

#define vsuxseg7ei32_v_u16mf2 ( ... ) __riscv_vsuxseg7ei32_v_u16mf2(__VA_ARGS__)

◆ vsuxseg7ei32_v_u16mf2_m

#define vsuxseg7ei32_v_u16mf2_m ( ... ) __riscv_vsuxseg7ei32_v_u16mf2_m(__VA_ARGS__)

◆ vsuxseg7ei32_v_u16mf4

#define vsuxseg7ei32_v_u16mf4 ( ... ) __riscv_vsuxseg7ei32_v_u16mf4(__VA_ARGS__)

◆ vsuxseg7ei32_v_u16mf4_m

#define vsuxseg7ei32_v_u16mf4_m ( ... ) __riscv_vsuxseg7ei32_v_u16mf4_m(__VA_ARGS__)

◆ vsuxseg7ei32_v_u32m1

#define vsuxseg7ei32_v_u32m1 ( ... ) __riscv_vsuxseg7ei32_v_u32m1(__VA_ARGS__)

◆ vsuxseg7ei32_v_u32m1_m

#define vsuxseg7ei32_v_u32m1_m ( ... ) __riscv_vsuxseg7ei32_v_u32m1_m(__VA_ARGS__)

◆ vsuxseg7ei32_v_u32mf2

#define vsuxseg7ei32_v_u32mf2 ( ... ) __riscv_vsuxseg7ei32_v_u32mf2(__VA_ARGS__)

◆ vsuxseg7ei32_v_u32mf2_m

#define vsuxseg7ei32_v_u32mf2_m ( ... ) __riscv_vsuxseg7ei32_v_u32mf2_m(__VA_ARGS__)

◆ vsuxseg7ei32_v_u64m1

#define vsuxseg7ei32_v_u64m1 ( ... ) __riscv_vsuxseg7ei32_v_u64m1(__VA_ARGS__)

◆ vsuxseg7ei32_v_u64m1_m

#define vsuxseg7ei32_v_u64m1_m ( ... ) __riscv_vsuxseg7ei32_v_u64m1_m(__VA_ARGS__)

◆ vsuxseg7ei32_v_u8m1

#define vsuxseg7ei32_v_u8m1 ( ... ) __riscv_vsuxseg7ei32_v_u8m1(__VA_ARGS__)

◆ vsuxseg7ei32_v_u8m1_m

#define vsuxseg7ei32_v_u8m1_m ( ... ) __riscv_vsuxseg7ei32_v_u8m1_m(__VA_ARGS__)

◆ vsuxseg7ei32_v_u8mf2

#define vsuxseg7ei32_v_u8mf2 ( ... ) __riscv_vsuxseg7ei32_v_u8mf2(__VA_ARGS__)

◆ vsuxseg7ei32_v_u8mf2_m

#define vsuxseg7ei32_v_u8mf2_m ( ... ) __riscv_vsuxseg7ei32_v_u8mf2_m(__VA_ARGS__)

◆ vsuxseg7ei32_v_u8mf4

#define vsuxseg7ei32_v_u8mf4 ( ... ) __riscv_vsuxseg7ei32_v_u8mf4(__VA_ARGS__)

◆ vsuxseg7ei32_v_u8mf4_m

#define vsuxseg7ei32_v_u8mf4_m ( ... ) __riscv_vsuxseg7ei32_v_u8mf4_m(__VA_ARGS__)

◆ vsuxseg7ei32_v_u8mf8

#define vsuxseg7ei32_v_u8mf8 ( ... ) __riscv_vsuxseg7ei32_v_u8mf8(__VA_ARGS__)

◆ vsuxseg7ei32_v_u8mf8_m

#define vsuxseg7ei32_v_u8mf8_m ( ... ) __riscv_vsuxseg7ei32_v_u8mf8_m(__VA_ARGS__)

◆ vsuxseg7ei64_v_f16m1

#define vsuxseg7ei64_v_f16m1 ( ... ) __riscv_vsuxseg7ei64_v_f16m1(__VA_ARGS__)

◆ vsuxseg7ei64_v_f16m1_m

#define vsuxseg7ei64_v_f16m1_m ( ... ) __riscv_vsuxseg7ei64_v_f16m1_m(__VA_ARGS__)

◆ vsuxseg7ei64_v_f16mf2

#define vsuxseg7ei64_v_f16mf2 ( ... ) __riscv_vsuxseg7ei64_v_f16mf2(__VA_ARGS__)

◆ vsuxseg7ei64_v_f16mf2_m

#define vsuxseg7ei64_v_f16mf2_m ( ... ) __riscv_vsuxseg7ei64_v_f16mf2_m(__VA_ARGS__)

◆ vsuxseg7ei64_v_f16mf4

#define vsuxseg7ei64_v_f16mf4 ( ... ) __riscv_vsuxseg7ei64_v_f16mf4(__VA_ARGS__)

◆ vsuxseg7ei64_v_f16mf4_m

#define vsuxseg7ei64_v_f16mf4_m ( ... ) __riscv_vsuxseg7ei64_v_f16mf4_m(__VA_ARGS__)

◆ vsuxseg7ei64_v_f32m1

#define vsuxseg7ei64_v_f32m1 ( ... ) __riscv_vsuxseg7ei64_v_f32m1(__VA_ARGS__)

◆ vsuxseg7ei64_v_f32m1_m

#define vsuxseg7ei64_v_f32m1_m ( ... ) __riscv_vsuxseg7ei64_v_f32m1_m(__VA_ARGS__)

◆ vsuxseg7ei64_v_f32mf2

#define vsuxseg7ei64_v_f32mf2 ( ... ) __riscv_vsuxseg7ei64_v_f32mf2(__VA_ARGS__)

◆ vsuxseg7ei64_v_f32mf2_m

#define vsuxseg7ei64_v_f32mf2_m ( ... ) __riscv_vsuxseg7ei64_v_f32mf2_m(__VA_ARGS__)

◆ vsuxseg7ei64_v_f64m1

#define vsuxseg7ei64_v_f64m1 ( ... ) __riscv_vsuxseg7ei64_v_f64m1(__VA_ARGS__)

◆ vsuxseg7ei64_v_f64m1_m

#define vsuxseg7ei64_v_f64m1_m ( ... ) __riscv_vsuxseg7ei64_v_f64m1_m(__VA_ARGS__)

◆ vsuxseg7ei64_v_i16m1

#define vsuxseg7ei64_v_i16m1 ( ... ) __riscv_vsuxseg7ei64_v_i16m1(__VA_ARGS__)

◆ vsuxseg7ei64_v_i16m1_m

#define vsuxseg7ei64_v_i16m1_m ( ... ) __riscv_vsuxseg7ei64_v_i16m1_m(__VA_ARGS__)

◆ vsuxseg7ei64_v_i16mf2

#define vsuxseg7ei64_v_i16mf2 ( ... ) __riscv_vsuxseg7ei64_v_i16mf2(__VA_ARGS__)

◆ vsuxseg7ei64_v_i16mf2_m

#define vsuxseg7ei64_v_i16mf2_m ( ... ) __riscv_vsuxseg7ei64_v_i16mf2_m(__VA_ARGS__)

◆ vsuxseg7ei64_v_i16mf4

#define vsuxseg7ei64_v_i16mf4 ( ... ) __riscv_vsuxseg7ei64_v_i16mf4(__VA_ARGS__)

◆ vsuxseg7ei64_v_i16mf4_m

#define vsuxseg7ei64_v_i16mf4_m ( ... ) __riscv_vsuxseg7ei64_v_i16mf4_m(__VA_ARGS__)

◆ vsuxseg7ei64_v_i32m1

#define vsuxseg7ei64_v_i32m1 ( ... ) __riscv_vsuxseg7ei64_v_i32m1(__VA_ARGS__)

◆ vsuxseg7ei64_v_i32m1_m

#define vsuxseg7ei64_v_i32m1_m ( ... ) __riscv_vsuxseg7ei64_v_i32m1_m(__VA_ARGS__)

◆ vsuxseg7ei64_v_i32mf2

#define vsuxseg7ei64_v_i32mf2 ( ... ) __riscv_vsuxseg7ei64_v_i32mf2(__VA_ARGS__)

◆ vsuxseg7ei64_v_i32mf2_m

#define vsuxseg7ei64_v_i32mf2_m ( ... ) __riscv_vsuxseg7ei64_v_i32mf2_m(__VA_ARGS__)

◆ vsuxseg7ei64_v_i64m1

#define vsuxseg7ei64_v_i64m1 ( ... ) __riscv_vsuxseg7ei64_v_i64m1(__VA_ARGS__)

◆ vsuxseg7ei64_v_i64m1_m

#define vsuxseg7ei64_v_i64m1_m ( ... ) __riscv_vsuxseg7ei64_v_i64m1_m(__VA_ARGS__)

◆ vsuxseg7ei64_v_i8m1

#define vsuxseg7ei64_v_i8m1 ( ... ) __riscv_vsuxseg7ei64_v_i8m1(__VA_ARGS__)

◆ vsuxseg7ei64_v_i8m1_m

#define vsuxseg7ei64_v_i8m1_m ( ... ) __riscv_vsuxseg7ei64_v_i8m1_m(__VA_ARGS__)

◆ vsuxseg7ei64_v_i8mf2

#define vsuxseg7ei64_v_i8mf2 ( ... ) __riscv_vsuxseg7ei64_v_i8mf2(__VA_ARGS__)

◆ vsuxseg7ei64_v_i8mf2_m

#define vsuxseg7ei64_v_i8mf2_m ( ... ) __riscv_vsuxseg7ei64_v_i8mf2_m(__VA_ARGS__)

◆ vsuxseg7ei64_v_i8mf4

#define vsuxseg7ei64_v_i8mf4 ( ... ) __riscv_vsuxseg7ei64_v_i8mf4(__VA_ARGS__)

◆ vsuxseg7ei64_v_i8mf4_m

#define vsuxseg7ei64_v_i8mf4_m ( ... ) __riscv_vsuxseg7ei64_v_i8mf4_m(__VA_ARGS__)

◆ vsuxseg7ei64_v_i8mf8

#define vsuxseg7ei64_v_i8mf8 ( ... ) __riscv_vsuxseg7ei64_v_i8mf8(__VA_ARGS__)

◆ vsuxseg7ei64_v_i8mf8_m

#define vsuxseg7ei64_v_i8mf8_m ( ... ) __riscv_vsuxseg7ei64_v_i8mf8_m(__VA_ARGS__)

◆ vsuxseg7ei64_v_u16m1

#define vsuxseg7ei64_v_u16m1 ( ... ) __riscv_vsuxseg7ei64_v_u16m1(__VA_ARGS__)

◆ vsuxseg7ei64_v_u16m1_m

#define vsuxseg7ei64_v_u16m1_m ( ... ) __riscv_vsuxseg7ei64_v_u16m1_m(__VA_ARGS__)

◆ vsuxseg7ei64_v_u16mf2

#define vsuxseg7ei64_v_u16mf2 ( ... ) __riscv_vsuxseg7ei64_v_u16mf2(__VA_ARGS__)

◆ vsuxseg7ei64_v_u16mf2_m

#define vsuxseg7ei64_v_u16mf2_m ( ... ) __riscv_vsuxseg7ei64_v_u16mf2_m(__VA_ARGS__)

◆ vsuxseg7ei64_v_u16mf4

#define vsuxseg7ei64_v_u16mf4 ( ... ) __riscv_vsuxseg7ei64_v_u16mf4(__VA_ARGS__)

◆ vsuxseg7ei64_v_u16mf4_m

#define vsuxseg7ei64_v_u16mf4_m ( ... ) __riscv_vsuxseg7ei64_v_u16mf4_m(__VA_ARGS__)

◆ vsuxseg7ei64_v_u32m1

#define vsuxseg7ei64_v_u32m1 ( ... ) __riscv_vsuxseg7ei64_v_u32m1(__VA_ARGS__)

◆ vsuxseg7ei64_v_u32m1_m

#define vsuxseg7ei64_v_u32m1_m ( ... ) __riscv_vsuxseg7ei64_v_u32m1_m(__VA_ARGS__)

◆ vsuxseg7ei64_v_u32mf2

#define vsuxseg7ei64_v_u32mf2 ( ... ) __riscv_vsuxseg7ei64_v_u32mf2(__VA_ARGS__)

◆ vsuxseg7ei64_v_u32mf2_m

#define vsuxseg7ei64_v_u32mf2_m ( ... ) __riscv_vsuxseg7ei64_v_u32mf2_m(__VA_ARGS__)

◆ vsuxseg7ei64_v_u64m1

#define vsuxseg7ei64_v_u64m1 ( ... ) __riscv_vsuxseg7ei64_v_u64m1(__VA_ARGS__)

◆ vsuxseg7ei64_v_u64m1_m

#define vsuxseg7ei64_v_u64m1_m ( ... ) __riscv_vsuxseg7ei64_v_u64m1_m(__VA_ARGS__)

◆ vsuxseg7ei64_v_u8m1

#define vsuxseg7ei64_v_u8m1 ( ... ) __riscv_vsuxseg7ei64_v_u8m1(__VA_ARGS__)

◆ vsuxseg7ei64_v_u8m1_m

#define vsuxseg7ei64_v_u8m1_m ( ... ) __riscv_vsuxseg7ei64_v_u8m1_m(__VA_ARGS__)

◆ vsuxseg7ei64_v_u8mf2

#define vsuxseg7ei64_v_u8mf2 ( ... ) __riscv_vsuxseg7ei64_v_u8mf2(__VA_ARGS__)

◆ vsuxseg7ei64_v_u8mf2_m

#define vsuxseg7ei64_v_u8mf2_m ( ... ) __riscv_vsuxseg7ei64_v_u8mf2_m(__VA_ARGS__)

◆ vsuxseg7ei64_v_u8mf4

#define vsuxseg7ei64_v_u8mf4 ( ... ) __riscv_vsuxseg7ei64_v_u8mf4(__VA_ARGS__)

◆ vsuxseg7ei64_v_u8mf4_m

#define vsuxseg7ei64_v_u8mf4_m ( ... ) __riscv_vsuxseg7ei64_v_u8mf4_m(__VA_ARGS__)

◆ vsuxseg7ei64_v_u8mf8

#define vsuxseg7ei64_v_u8mf8 ( ... ) __riscv_vsuxseg7ei64_v_u8mf8(__VA_ARGS__)

◆ vsuxseg7ei64_v_u8mf8_m

#define vsuxseg7ei64_v_u8mf8_m ( ... ) __riscv_vsuxseg7ei64_v_u8mf8_m(__VA_ARGS__)

◆ vsuxseg7ei8_v_f16m1

#define vsuxseg7ei8_v_f16m1 ( ... ) __riscv_vsuxseg7ei8_v_f16m1(__VA_ARGS__)

◆ vsuxseg7ei8_v_f16m1_m

#define vsuxseg7ei8_v_f16m1_m ( ... ) __riscv_vsuxseg7ei8_v_f16m1_m(__VA_ARGS__)

◆ vsuxseg7ei8_v_f16mf2

#define vsuxseg7ei8_v_f16mf2 ( ... ) __riscv_vsuxseg7ei8_v_f16mf2(__VA_ARGS__)

◆ vsuxseg7ei8_v_f16mf2_m

#define vsuxseg7ei8_v_f16mf2_m ( ... ) __riscv_vsuxseg7ei8_v_f16mf2_m(__VA_ARGS__)

◆ vsuxseg7ei8_v_f16mf4

#define vsuxseg7ei8_v_f16mf4 ( ... ) __riscv_vsuxseg7ei8_v_f16mf4(__VA_ARGS__)

◆ vsuxseg7ei8_v_f16mf4_m

#define vsuxseg7ei8_v_f16mf4_m ( ... ) __riscv_vsuxseg7ei8_v_f16mf4_m(__VA_ARGS__)

◆ vsuxseg7ei8_v_f32m1

#define vsuxseg7ei8_v_f32m1 ( ... ) __riscv_vsuxseg7ei8_v_f32m1(__VA_ARGS__)

◆ vsuxseg7ei8_v_f32m1_m

#define vsuxseg7ei8_v_f32m1_m ( ... ) __riscv_vsuxseg7ei8_v_f32m1_m(__VA_ARGS__)

◆ vsuxseg7ei8_v_f32mf2

#define vsuxseg7ei8_v_f32mf2 ( ... ) __riscv_vsuxseg7ei8_v_f32mf2(__VA_ARGS__)

◆ vsuxseg7ei8_v_f32mf2_m

#define vsuxseg7ei8_v_f32mf2_m ( ... ) __riscv_vsuxseg7ei8_v_f32mf2_m(__VA_ARGS__)

◆ vsuxseg7ei8_v_f64m1

#define vsuxseg7ei8_v_f64m1 ( ... ) __riscv_vsuxseg7ei8_v_f64m1(__VA_ARGS__)

◆ vsuxseg7ei8_v_f64m1_m

#define vsuxseg7ei8_v_f64m1_m ( ... ) __riscv_vsuxseg7ei8_v_f64m1_m(__VA_ARGS__)

◆ vsuxseg7ei8_v_i16m1

#define vsuxseg7ei8_v_i16m1 ( ... ) __riscv_vsuxseg7ei8_v_i16m1(__VA_ARGS__)

◆ vsuxseg7ei8_v_i16m1_m

#define vsuxseg7ei8_v_i16m1_m ( ... ) __riscv_vsuxseg7ei8_v_i16m1_m(__VA_ARGS__)

◆ vsuxseg7ei8_v_i16mf2

#define vsuxseg7ei8_v_i16mf2 ( ... ) __riscv_vsuxseg7ei8_v_i16mf2(__VA_ARGS__)

◆ vsuxseg7ei8_v_i16mf2_m

#define vsuxseg7ei8_v_i16mf2_m ( ... ) __riscv_vsuxseg7ei8_v_i16mf2_m(__VA_ARGS__)

◆ vsuxseg7ei8_v_i16mf4

#define vsuxseg7ei8_v_i16mf4 ( ... ) __riscv_vsuxseg7ei8_v_i16mf4(__VA_ARGS__)

◆ vsuxseg7ei8_v_i16mf4_m

#define vsuxseg7ei8_v_i16mf4_m ( ... ) __riscv_vsuxseg7ei8_v_i16mf4_m(__VA_ARGS__)

◆ vsuxseg7ei8_v_i32m1

#define vsuxseg7ei8_v_i32m1 ( ... ) __riscv_vsuxseg7ei8_v_i32m1(__VA_ARGS__)

◆ vsuxseg7ei8_v_i32m1_m

#define vsuxseg7ei8_v_i32m1_m ( ... ) __riscv_vsuxseg7ei8_v_i32m1_m(__VA_ARGS__)

◆ vsuxseg7ei8_v_i32mf2

#define vsuxseg7ei8_v_i32mf2 ( ... ) __riscv_vsuxseg7ei8_v_i32mf2(__VA_ARGS__)

◆ vsuxseg7ei8_v_i32mf2_m

#define vsuxseg7ei8_v_i32mf2_m ( ... ) __riscv_vsuxseg7ei8_v_i32mf2_m(__VA_ARGS__)

◆ vsuxseg7ei8_v_i64m1

#define vsuxseg7ei8_v_i64m1 ( ... ) __riscv_vsuxseg7ei8_v_i64m1(__VA_ARGS__)

◆ vsuxseg7ei8_v_i64m1_m

#define vsuxseg7ei8_v_i64m1_m ( ... ) __riscv_vsuxseg7ei8_v_i64m1_m(__VA_ARGS__)

◆ vsuxseg7ei8_v_i8m1

#define vsuxseg7ei8_v_i8m1 ( ... ) __riscv_vsuxseg7ei8_v_i8m1(__VA_ARGS__)

◆ vsuxseg7ei8_v_i8m1_m

#define vsuxseg7ei8_v_i8m1_m ( ... ) __riscv_vsuxseg7ei8_v_i8m1_m(__VA_ARGS__)

◆ vsuxseg7ei8_v_i8mf2

#define vsuxseg7ei8_v_i8mf2 ( ... ) __riscv_vsuxseg7ei8_v_i8mf2(__VA_ARGS__)

◆ vsuxseg7ei8_v_i8mf2_m

#define vsuxseg7ei8_v_i8mf2_m ( ... ) __riscv_vsuxseg7ei8_v_i8mf2_m(__VA_ARGS__)

◆ vsuxseg7ei8_v_i8mf4

#define vsuxseg7ei8_v_i8mf4 ( ... ) __riscv_vsuxseg7ei8_v_i8mf4(__VA_ARGS__)

◆ vsuxseg7ei8_v_i8mf4_m

#define vsuxseg7ei8_v_i8mf4_m ( ... ) __riscv_vsuxseg7ei8_v_i8mf4_m(__VA_ARGS__)

◆ vsuxseg7ei8_v_i8mf8

#define vsuxseg7ei8_v_i8mf8 ( ... ) __riscv_vsuxseg7ei8_v_i8mf8(__VA_ARGS__)

◆ vsuxseg7ei8_v_i8mf8_m

#define vsuxseg7ei8_v_i8mf8_m ( ... ) __riscv_vsuxseg7ei8_v_i8mf8_m(__VA_ARGS__)

◆ vsuxseg7ei8_v_u16m1

#define vsuxseg7ei8_v_u16m1 ( ... ) __riscv_vsuxseg7ei8_v_u16m1(__VA_ARGS__)

◆ vsuxseg7ei8_v_u16m1_m

#define vsuxseg7ei8_v_u16m1_m ( ... ) __riscv_vsuxseg7ei8_v_u16m1_m(__VA_ARGS__)

◆ vsuxseg7ei8_v_u16mf2

#define vsuxseg7ei8_v_u16mf2 ( ... ) __riscv_vsuxseg7ei8_v_u16mf2(__VA_ARGS__)

◆ vsuxseg7ei8_v_u16mf2_m

#define vsuxseg7ei8_v_u16mf2_m ( ... ) __riscv_vsuxseg7ei8_v_u16mf2_m(__VA_ARGS__)

◆ vsuxseg7ei8_v_u16mf4

#define vsuxseg7ei8_v_u16mf4 ( ... ) __riscv_vsuxseg7ei8_v_u16mf4(__VA_ARGS__)

◆ vsuxseg7ei8_v_u16mf4_m

#define vsuxseg7ei8_v_u16mf4_m ( ... ) __riscv_vsuxseg7ei8_v_u16mf4_m(__VA_ARGS__)

◆ vsuxseg7ei8_v_u32m1

#define vsuxseg7ei8_v_u32m1 ( ... ) __riscv_vsuxseg7ei8_v_u32m1(__VA_ARGS__)

◆ vsuxseg7ei8_v_u32m1_m

#define vsuxseg7ei8_v_u32m1_m ( ... ) __riscv_vsuxseg7ei8_v_u32m1_m(__VA_ARGS__)

◆ vsuxseg7ei8_v_u32mf2

#define vsuxseg7ei8_v_u32mf2 ( ... ) __riscv_vsuxseg7ei8_v_u32mf2(__VA_ARGS__)

◆ vsuxseg7ei8_v_u32mf2_m

#define vsuxseg7ei8_v_u32mf2_m ( ... ) __riscv_vsuxseg7ei8_v_u32mf2_m(__VA_ARGS__)

◆ vsuxseg7ei8_v_u64m1

#define vsuxseg7ei8_v_u64m1 ( ... ) __riscv_vsuxseg7ei8_v_u64m1(__VA_ARGS__)

◆ vsuxseg7ei8_v_u64m1_m

#define vsuxseg7ei8_v_u64m1_m ( ... ) __riscv_vsuxseg7ei8_v_u64m1_m(__VA_ARGS__)

◆ vsuxseg7ei8_v_u8m1

#define vsuxseg7ei8_v_u8m1 ( ... ) __riscv_vsuxseg7ei8_v_u8m1(__VA_ARGS__)

◆ vsuxseg7ei8_v_u8m1_m

#define vsuxseg7ei8_v_u8m1_m ( ... ) __riscv_vsuxseg7ei8_v_u8m1_m(__VA_ARGS__)

◆ vsuxseg7ei8_v_u8mf2

#define vsuxseg7ei8_v_u8mf2 ( ... ) __riscv_vsuxseg7ei8_v_u8mf2(__VA_ARGS__)

◆ vsuxseg7ei8_v_u8mf2_m

#define vsuxseg7ei8_v_u8mf2_m ( ... ) __riscv_vsuxseg7ei8_v_u8mf2_m(__VA_ARGS__)

◆ vsuxseg7ei8_v_u8mf4

#define vsuxseg7ei8_v_u8mf4 ( ... ) __riscv_vsuxseg7ei8_v_u8mf4(__VA_ARGS__)

◆ vsuxseg7ei8_v_u8mf4_m

#define vsuxseg7ei8_v_u8mf4_m ( ... ) __riscv_vsuxseg7ei8_v_u8mf4_m(__VA_ARGS__)

◆ vsuxseg7ei8_v_u8mf8

#define vsuxseg7ei8_v_u8mf8 ( ... ) __riscv_vsuxseg7ei8_v_u8mf8(__VA_ARGS__)

◆ vsuxseg7ei8_v_u8mf8_m

#define vsuxseg7ei8_v_u8mf8_m ( ... ) __riscv_vsuxseg7ei8_v_u8mf8_m(__VA_ARGS__)

◆ vsuxseg8ei16_v_f16m1

#define vsuxseg8ei16_v_f16m1 ( ... ) __riscv_vsuxseg8ei16_v_f16m1(__VA_ARGS__)

◆ vsuxseg8ei16_v_f16m1_m

#define vsuxseg8ei16_v_f16m1_m ( ... ) __riscv_vsuxseg8ei16_v_f16m1_m(__VA_ARGS__)

◆ vsuxseg8ei16_v_f16mf2

#define vsuxseg8ei16_v_f16mf2 ( ... ) __riscv_vsuxseg8ei16_v_f16mf2(__VA_ARGS__)

◆ vsuxseg8ei16_v_f16mf2_m

#define vsuxseg8ei16_v_f16mf2_m ( ... ) __riscv_vsuxseg8ei16_v_f16mf2_m(__VA_ARGS__)

◆ vsuxseg8ei16_v_f16mf4

#define vsuxseg8ei16_v_f16mf4 ( ... ) __riscv_vsuxseg8ei16_v_f16mf4(__VA_ARGS__)

◆ vsuxseg8ei16_v_f16mf4_m

#define vsuxseg8ei16_v_f16mf4_m ( ... ) __riscv_vsuxseg8ei16_v_f16mf4_m(__VA_ARGS__)

◆ vsuxseg8ei16_v_f32m1

#define vsuxseg8ei16_v_f32m1 ( ... ) __riscv_vsuxseg8ei16_v_f32m1(__VA_ARGS__)

◆ vsuxseg8ei16_v_f32m1_m

#define vsuxseg8ei16_v_f32m1_m ( ... ) __riscv_vsuxseg8ei16_v_f32m1_m(__VA_ARGS__)

◆ vsuxseg8ei16_v_f32mf2

#define vsuxseg8ei16_v_f32mf2 ( ... ) __riscv_vsuxseg8ei16_v_f32mf2(__VA_ARGS__)

◆ vsuxseg8ei16_v_f32mf2_m

#define vsuxseg8ei16_v_f32mf2_m ( ... ) __riscv_vsuxseg8ei16_v_f32mf2_m(__VA_ARGS__)

◆ vsuxseg8ei16_v_f64m1

#define vsuxseg8ei16_v_f64m1 ( ... ) __riscv_vsuxseg8ei16_v_f64m1(__VA_ARGS__)

◆ vsuxseg8ei16_v_f64m1_m

#define vsuxseg8ei16_v_f64m1_m ( ... ) __riscv_vsuxseg8ei16_v_f64m1_m(__VA_ARGS__)

◆ vsuxseg8ei16_v_i16m1

#define vsuxseg8ei16_v_i16m1 ( ... ) __riscv_vsuxseg8ei16_v_i16m1(__VA_ARGS__)

◆ vsuxseg8ei16_v_i16m1_m

#define vsuxseg8ei16_v_i16m1_m ( ... ) __riscv_vsuxseg8ei16_v_i16m1_m(__VA_ARGS__)

◆ vsuxseg8ei16_v_i16mf2

#define vsuxseg8ei16_v_i16mf2 ( ... ) __riscv_vsuxseg8ei16_v_i16mf2(__VA_ARGS__)

◆ vsuxseg8ei16_v_i16mf2_m

#define vsuxseg8ei16_v_i16mf2_m ( ... ) __riscv_vsuxseg8ei16_v_i16mf2_m(__VA_ARGS__)

◆ vsuxseg8ei16_v_i16mf4

#define vsuxseg8ei16_v_i16mf4 ( ... ) __riscv_vsuxseg8ei16_v_i16mf4(__VA_ARGS__)

◆ vsuxseg8ei16_v_i16mf4_m

#define vsuxseg8ei16_v_i16mf4_m ( ... ) __riscv_vsuxseg8ei16_v_i16mf4_m(__VA_ARGS__)

◆ vsuxseg8ei16_v_i32m1

#define vsuxseg8ei16_v_i32m1 ( ... ) __riscv_vsuxseg8ei16_v_i32m1(__VA_ARGS__)

◆ vsuxseg8ei16_v_i32m1_m

#define vsuxseg8ei16_v_i32m1_m ( ... ) __riscv_vsuxseg8ei16_v_i32m1_m(__VA_ARGS__)

◆ vsuxseg8ei16_v_i32mf2

#define vsuxseg8ei16_v_i32mf2 ( ... ) __riscv_vsuxseg8ei16_v_i32mf2(__VA_ARGS__)

◆ vsuxseg8ei16_v_i32mf2_m

#define vsuxseg8ei16_v_i32mf2_m ( ... ) __riscv_vsuxseg8ei16_v_i32mf2_m(__VA_ARGS__)

◆ vsuxseg8ei16_v_i64m1

#define vsuxseg8ei16_v_i64m1 ( ... ) __riscv_vsuxseg8ei16_v_i64m1(__VA_ARGS__)

◆ vsuxseg8ei16_v_i64m1_m

#define vsuxseg8ei16_v_i64m1_m ( ... ) __riscv_vsuxseg8ei16_v_i64m1_m(__VA_ARGS__)

◆ vsuxseg8ei16_v_i8m1

#define vsuxseg8ei16_v_i8m1 ( ... ) __riscv_vsuxseg8ei16_v_i8m1(__VA_ARGS__)

◆ vsuxseg8ei16_v_i8m1_m

#define vsuxseg8ei16_v_i8m1_m ( ... ) __riscv_vsuxseg8ei16_v_i8m1_m(__VA_ARGS__)

◆ vsuxseg8ei16_v_i8mf2

#define vsuxseg8ei16_v_i8mf2 ( ... ) __riscv_vsuxseg8ei16_v_i8mf2(__VA_ARGS__)

◆ vsuxseg8ei16_v_i8mf2_m

#define vsuxseg8ei16_v_i8mf2_m ( ... ) __riscv_vsuxseg8ei16_v_i8mf2_m(__VA_ARGS__)

◆ vsuxseg8ei16_v_i8mf4

#define vsuxseg8ei16_v_i8mf4 ( ... ) __riscv_vsuxseg8ei16_v_i8mf4(__VA_ARGS__)

◆ vsuxseg8ei16_v_i8mf4_m

#define vsuxseg8ei16_v_i8mf4_m ( ... ) __riscv_vsuxseg8ei16_v_i8mf4_m(__VA_ARGS__)

◆ vsuxseg8ei16_v_i8mf8

#define vsuxseg8ei16_v_i8mf8 ( ... ) __riscv_vsuxseg8ei16_v_i8mf8(__VA_ARGS__)

◆ vsuxseg8ei16_v_i8mf8_m

#define vsuxseg8ei16_v_i8mf8_m ( ... ) __riscv_vsuxseg8ei16_v_i8mf8_m(__VA_ARGS__)

◆ vsuxseg8ei16_v_u16m1

#define vsuxseg8ei16_v_u16m1 ( ... ) __riscv_vsuxseg8ei16_v_u16m1(__VA_ARGS__)

◆ vsuxseg8ei16_v_u16m1_m

#define vsuxseg8ei16_v_u16m1_m ( ... ) __riscv_vsuxseg8ei16_v_u16m1_m(__VA_ARGS__)

◆ vsuxseg8ei16_v_u16mf2

#define vsuxseg8ei16_v_u16mf2 ( ... ) __riscv_vsuxseg8ei16_v_u16mf2(__VA_ARGS__)

◆ vsuxseg8ei16_v_u16mf2_m

#define vsuxseg8ei16_v_u16mf2_m ( ... ) __riscv_vsuxseg8ei16_v_u16mf2_m(__VA_ARGS__)

◆ vsuxseg8ei16_v_u16mf4

#define vsuxseg8ei16_v_u16mf4 ( ... ) __riscv_vsuxseg8ei16_v_u16mf4(__VA_ARGS__)

◆ vsuxseg8ei16_v_u16mf4_m

#define vsuxseg8ei16_v_u16mf4_m ( ... ) __riscv_vsuxseg8ei16_v_u16mf4_m(__VA_ARGS__)

◆ vsuxseg8ei16_v_u32m1

#define vsuxseg8ei16_v_u32m1 ( ... ) __riscv_vsuxseg8ei16_v_u32m1(__VA_ARGS__)

◆ vsuxseg8ei16_v_u32m1_m

#define vsuxseg8ei16_v_u32m1_m ( ... ) __riscv_vsuxseg8ei16_v_u32m1_m(__VA_ARGS__)

◆ vsuxseg8ei16_v_u32mf2

#define vsuxseg8ei16_v_u32mf2 ( ... ) __riscv_vsuxseg8ei16_v_u32mf2(__VA_ARGS__)

◆ vsuxseg8ei16_v_u32mf2_m

#define vsuxseg8ei16_v_u32mf2_m ( ... ) __riscv_vsuxseg8ei16_v_u32mf2_m(__VA_ARGS__)

◆ vsuxseg8ei16_v_u64m1

#define vsuxseg8ei16_v_u64m1 ( ... ) __riscv_vsuxseg8ei16_v_u64m1(__VA_ARGS__)

◆ vsuxseg8ei16_v_u64m1_m

#define vsuxseg8ei16_v_u64m1_m ( ... ) __riscv_vsuxseg8ei16_v_u64m1_m(__VA_ARGS__)

◆ vsuxseg8ei16_v_u8m1

#define vsuxseg8ei16_v_u8m1 ( ... ) __riscv_vsuxseg8ei16_v_u8m1(__VA_ARGS__)

◆ vsuxseg8ei16_v_u8m1_m

#define vsuxseg8ei16_v_u8m1_m ( ... ) __riscv_vsuxseg8ei16_v_u8m1_m(__VA_ARGS__)

◆ vsuxseg8ei16_v_u8mf2

#define vsuxseg8ei16_v_u8mf2 ( ... ) __riscv_vsuxseg8ei16_v_u8mf2(__VA_ARGS__)

◆ vsuxseg8ei16_v_u8mf2_m

#define vsuxseg8ei16_v_u8mf2_m ( ... ) __riscv_vsuxseg8ei16_v_u8mf2_m(__VA_ARGS__)

◆ vsuxseg8ei16_v_u8mf4

#define vsuxseg8ei16_v_u8mf4 ( ... ) __riscv_vsuxseg8ei16_v_u8mf4(__VA_ARGS__)

◆ vsuxseg8ei16_v_u8mf4_m

#define vsuxseg8ei16_v_u8mf4_m ( ... ) __riscv_vsuxseg8ei16_v_u8mf4_m(__VA_ARGS__)

◆ vsuxseg8ei16_v_u8mf8

#define vsuxseg8ei16_v_u8mf8 ( ... ) __riscv_vsuxseg8ei16_v_u8mf8(__VA_ARGS__)

◆ vsuxseg8ei16_v_u8mf8_m

#define vsuxseg8ei16_v_u8mf8_m ( ... ) __riscv_vsuxseg8ei16_v_u8mf8_m(__VA_ARGS__)

◆ vsuxseg8ei32_v_f16m1

#define vsuxseg8ei32_v_f16m1 ( ... ) __riscv_vsuxseg8ei32_v_f16m1(__VA_ARGS__)

◆ vsuxseg8ei32_v_f16m1_m

#define vsuxseg8ei32_v_f16m1_m ( ... ) __riscv_vsuxseg8ei32_v_f16m1_m(__VA_ARGS__)

◆ vsuxseg8ei32_v_f16mf2

#define vsuxseg8ei32_v_f16mf2 ( ... ) __riscv_vsuxseg8ei32_v_f16mf2(__VA_ARGS__)

◆ vsuxseg8ei32_v_f16mf2_m

#define vsuxseg8ei32_v_f16mf2_m ( ... ) __riscv_vsuxseg8ei32_v_f16mf2_m(__VA_ARGS__)

◆ vsuxseg8ei32_v_f16mf4

#define vsuxseg8ei32_v_f16mf4 ( ... ) __riscv_vsuxseg8ei32_v_f16mf4(__VA_ARGS__)

◆ vsuxseg8ei32_v_f16mf4_m

#define vsuxseg8ei32_v_f16mf4_m ( ... ) __riscv_vsuxseg8ei32_v_f16mf4_m(__VA_ARGS__)

◆ vsuxseg8ei32_v_f32m1

#define vsuxseg8ei32_v_f32m1 ( ... ) __riscv_vsuxseg8ei32_v_f32m1(__VA_ARGS__)

◆ vsuxseg8ei32_v_f32m1_m

#define vsuxseg8ei32_v_f32m1_m ( ... ) __riscv_vsuxseg8ei32_v_f32m1_m(__VA_ARGS__)

◆ vsuxseg8ei32_v_f32mf2

#define vsuxseg8ei32_v_f32mf2 ( ... ) __riscv_vsuxseg8ei32_v_f32mf2(__VA_ARGS__)

◆ vsuxseg8ei32_v_f32mf2_m

#define vsuxseg8ei32_v_f32mf2_m ( ... ) __riscv_vsuxseg8ei32_v_f32mf2_m(__VA_ARGS__)

◆ vsuxseg8ei32_v_f64m1

#define vsuxseg8ei32_v_f64m1 ( ... ) __riscv_vsuxseg8ei32_v_f64m1(__VA_ARGS__)

◆ vsuxseg8ei32_v_f64m1_m

#define vsuxseg8ei32_v_f64m1_m ( ... ) __riscv_vsuxseg8ei32_v_f64m1_m(__VA_ARGS__)

◆ vsuxseg8ei32_v_i16m1

#define vsuxseg8ei32_v_i16m1 ( ... ) __riscv_vsuxseg8ei32_v_i16m1(__VA_ARGS__)

◆ vsuxseg8ei32_v_i16m1_m

#define vsuxseg8ei32_v_i16m1_m ( ... ) __riscv_vsuxseg8ei32_v_i16m1_m(__VA_ARGS__)

◆ vsuxseg8ei32_v_i16mf2

#define vsuxseg8ei32_v_i16mf2 ( ... ) __riscv_vsuxseg8ei32_v_i16mf2(__VA_ARGS__)

◆ vsuxseg8ei32_v_i16mf2_m

#define vsuxseg8ei32_v_i16mf2_m ( ... ) __riscv_vsuxseg8ei32_v_i16mf2_m(__VA_ARGS__)

◆ vsuxseg8ei32_v_i16mf4

#define vsuxseg8ei32_v_i16mf4 ( ... ) __riscv_vsuxseg8ei32_v_i16mf4(__VA_ARGS__)

◆ vsuxseg8ei32_v_i16mf4_m

#define vsuxseg8ei32_v_i16mf4_m ( ... ) __riscv_vsuxseg8ei32_v_i16mf4_m(__VA_ARGS__)

◆ vsuxseg8ei32_v_i32m1

#define vsuxseg8ei32_v_i32m1 ( ... ) __riscv_vsuxseg8ei32_v_i32m1(__VA_ARGS__)

◆ vsuxseg8ei32_v_i32m1_m

#define vsuxseg8ei32_v_i32m1_m ( ... ) __riscv_vsuxseg8ei32_v_i32m1_m(__VA_ARGS__)

◆ vsuxseg8ei32_v_i32mf2

#define vsuxseg8ei32_v_i32mf2 ( ... ) __riscv_vsuxseg8ei32_v_i32mf2(__VA_ARGS__)

◆ vsuxseg8ei32_v_i32mf2_m

#define vsuxseg8ei32_v_i32mf2_m ( ... ) __riscv_vsuxseg8ei32_v_i32mf2_m(__VA_ARGS__)

◆ vsuxseg8ei32_v_i64m1

#define vsuxseg8ei32_v_i64m1 ( ... ) __riscv_vsuxseg8ei32_v_i64m1(__VA_ARGS__)

◆ vsuxseg8ei32_v_i64m1_m

#define vsuxseg8ei32_v_i64m1_m ( ... ) __riscv_vsuxseg8ei32_v_i64m1_m(__VA_ARGS__)

◆ vsuxseg8ei32_v_i8m1

#define vsuxseg8ei32_v_i8m1 ( ... ) __riscv_vsuxseg8ei32_v_i8m1(__VA_ARGS__)

◆ vsuxseg8ei32_v_i8m1_m

#define vsuxseg8ei32_v_i8m1_m ( ... ) __riscv_vsuxseg8ei32_v_i8m1_m(__VA_ARGS__)

◆ vsuxseg8ei32_v_i8mf2

#define vsuxseg8ei32_v_i8mf2 ( ... ) __riscv_vsuxseg8ei32_v_i8mf2(__VA_ARGS__)

◆ vsuxseg8ei32_v_i8mf2_m

#define vsuxseg8ei32_v_i8mf2_m ( ... ) __riscv_vsuxseg8ei32_v_i8mf2_m(__VA_ARGS__)

◆ vsuxseg8ei32_v_i8mf4

#define vsuxseg8ei32_v_i8mf4 ( ... ) __riscv_vsuxseg8ei32_v_i8mf4(__VA_ARGS__)

◆ vsuxseg8ei32_v_i8mf4_m

#define vsuxseg8ei32_v_i8mf4_m ( ... ) __riscv_vsuxseg8ei32_v_i8mf4_m(__VA_ARGS__)

◆ vsuxseg8ei32_v_i8mf8

#define vsuxseg8ei32_v_i8mf8 ( ... ) __riscv_vsuxseg8ei32_v_i8mf8(__VA_ARGS__)

◆ vsuxseg8ei32_v_i8mf8_m

#define vsuxseg8ei32_v_i8mf8_m ( ... ) __riscv_vsuxseg8ei32_v_i8mf8_m(__VA_ARGS__)

◆ vsuxseg8ei32_v_u16m1

#define vsuxseg8ei32_v_u16m1 ( ... ) __riscv_vsuxseg8ei32_v_u16m1(__VA_ARGS__)

◆ vsuxseg8ei32_v_u16m1_m

#define vsuxseg8ei32_v_u16m1_m ( ... ) __riscv_vsuxseg8ei32_v_u16m1_m(__VA_ARGS__)

◆ vsuxseg8ei32_v_u16mf2

#define vsuxseg8ei32_v_u16mf2 ( ... ) __riscv_vsuxseg8ei32_v_u16mf2(__VA_ARGS__)

◆ vsuxseg8ei32_v_u16mf2_m

#define vsuxseg8ei32_v_u16mf2_m ( ... ) __riscv_vsuxseg8ei32_v_u16mf2_m(__VA_ARGS__)

◆ vsuxseg8ei32_v_u16mf4

#define vsuxseg8ei32_v_u16mf4 ( ... ) __riscv_vsuxseg8ei32_v_u16mf4(__VA_ARGS__)

◆ vsuxseg8ei32_v_u16mf4_m

#define vsuxseg8ei32_v_u16mf4_m ( ... ) __riscv_vsuxseg8ei32_v_u16mf4_m(__VA_ARGS__)

◆ vsuxseg8ei32_v_u32m1

#define vsuxseg8ei32_v_u32m1 ( ... ) __riscv_vsuxseg8ei32_v_u32m1(__VA_ARGS__)

◆ vsuxseg8ei32_v_u32m1_m

#define vsuxseg8ei32_v_u32m1_m ( ... ) __riscv_vsuxseg8ei32_v_u32m1_m(__VA_ARGS__)

◆ vsuxseg8ei32_v_u32mf2

#define vsuxseg8ei32_v_u32mf2 ( ... ) __riscv_vsuxseg8ei32_v_u32mf2(__VA_ARGS__)

◆ vsuxseg8ei32_v_u32mf2_m

#define vsuxseg8ei32_v_u32mf2_m ( ... ) __riscv_vsuxseg8ei32_v_u32mf2_m(__VA_ARGS__)

◆ vsuxseg8ei32_v_u64m1

#define vsuxseg8ei32_v_u64m1 ( ... ) __riscv_vsuxseg8ei32_v_u64m1(__VA_ARGS__)

◆ vsuxseg8ei32_v_u64m1_m

#define vsuxseg8ei32_v_u64m1_m ( ... ) __riscv_vsuxseg8ei32_v_u64m1_m(__VA_ARGS__)

◆ vsuxseg8ei32_v_u8m1

#define vsuxseg8ei32_v_u8m1 ( ... ) __riscv_vsuxseg8ei32_v_u8m1(__VA_ARGS__)

◆ vsuxseg8ei32_v_u8m1_m

#define vsuxseg8ei32_v_u8m1_m ( ... ) __riscv_vsuxseg8ei32_v_u8m1_m(__VA_ARGS__)

◆ vsuxseg8ei32_v_u8mf2

#define vsuxseg8ei32_v_u8mf2 ( ... ) __riscv_vsuxseg8ei32_v_u8mf2(__VA_ARGS__)

◆ vsuxseg8ei32_v_u8mf2_m

#define vsuxseg8ei32_v_u8mf2_m ( ... ) __riscv_vsuxseg8ei32_v_u8mf2_m(__VA_ARGS__)

◆ vsuxseg8ei32_v_u8mf4

#define vsuxseg8ei32_v_u8mf4 ( ... ) __riscv_vsuxseg8ei32_v_u8mf4(__VA_ARGS__)

◆ vsuxseg8ei32_v_u8mf4_m

#define vsuxseg8ei32_v_u8mf4_m ( ... ) __riscv_vsuxseg8ei32_v_u8mf4_m(__VA_ARGS__)

◆ vsuxseg8ei32_v_u8mf8

#define vsuxseg8ei32_v_u8mf8 ( ... ) __riscv_vsuxseg8ei32_v_u8mf8(__VA_ARGS__)

◆ vsuxseg8ei32_v_u8mf8_m

#define vsuxseg8ei32_v_u8mf8_m ( ... ) __riscv_vsuxseg8ei32_v_u8mf8_m(__VA_ARGS__)

◆ vsuxseg8ei64_v_f16m1

#define vsuxseg8ei64_v_f16m1 ( ... ) __riscv_vsuxseg8ei64_v_f16m1(__VA_ARGS__)

◆ vsuxseg8ei64_v_f16m1_m

#define vsuxseg8ei64_v_f16m1_m ( ... ) __riscv_vsuxseg8ei64_v_f16m1_m(__VA_ARGS__)

◆ vsuxseg8ei64_v_f16mf2

#define vsuxseg8ei64_v_f16mf2 ( ... ) __riscv_vsuxseg8ei64_v_f16mf2(__VA_ARGS__)

◆ vsuxseg8ei64_v_f16mf2_m

#define vsuxseg8ei64_v_f16mf2_m ( ... ) __riscv_vsuxseg8ei64_v_f16mf2_m(__VA_ARGS__)

◆ vsuxseg8ei64_v_f16mf4

#define vsuxseg8ei64_v_f16mf4 ( ... ) __riscv_vsuxseg8ei64_v_f16mf4(__VA_ARGS__)

◆ vsuxseg8ei64_v_f16mf4_m

#define vsuxseg8ei64_v_f16mf4_m ( ... ) __riscv_vsuxseg8ei64_v_f16mf4_m(__VA_ARGS__)

◆ vsuxseg8ei64_v_f32m1

#define vsuxseg8ei64_v_f32m1 ( ... ) __riscv_vsuxseg8ei64_v_f32m1(__VA_ARGS__)

◆ vsuxseg8ei64_v_f32m1_m

#define vsuxseg8ei64_v_f32m1_m ( ... ) __riscv_vsuxseg8ei64_v_f32m1_m(__VA_ARGS__)

◆ vsuxseg8ei64_v_f32mf2

#define vsuxseg8ei64_v_f32mf2 ( ... ) __riscv_vsuxseg8ei64_v_f32mf2(__VA_ARGS__)

◆ vsuxseg8ei64_v_f32mf2_m

#define vsuxseg8ei64_v_f32mf2_m ( ... ) __riscv_vsuxseg8ei64_v_f32mf2_m(__VA_ARGS__)

◆ vsuxseg8ei64_v_f64m1

#define vsuxseg8ei64_v_f64m1 ( ... ) __riscv_vsuxseg8ei64_v_f64m1(__VA_ARGS__)

◆ vsuxseg8ei64_v_f64m1_m

#define vsuxseg8ei64_v_f64m1_m ( ... ) __riscv_vsuxseg8ei64_v_f64m1_m(__VA_ARGS__)

◆ vsuxseg8ei64_v_i16m1

#define vsuxseg8ei64_v_i16m1 ( ... ) __riscv_vsuxseg8ei64_v_i16m1(__VA_ARGS__)

◆ vsuxseg8ei64_v_i16m1_m

#define vsuxseg8ei64_v_i16m1_m ( ... ) __riscv_vsuxseg8ei64_v_i16m1_m(__VA_ARGS__)

◆ vsuxseg8ei64_v_i16mf2

#define vsuxseg8ei64_v_i16mf2 ( ... ) __riscv_vsuxseg8ei64_v_i16mf2(__VA_ARGS__)

◆ vsuxseg8ei64_v_i16mf2_m

#define vsuxseg8ei64_v_i16mf2_m ( ... ) __riscv_vsuxseg8ei64_v_i16mf2_m(__VA_ARGS__)

◆ vsuxseg8ei64_v_i16mf4

#define vsuxseg8ei64_v_i16mf4 ( ... ) __riscv_vsuxseg8ei64_v_i16mf4(__VA_ARGS__)

◆ vsuxseg8ei64_v_i16mf4_m

#define vsuxseg8ei64_v_i16mf4_m ( ... ) __riscv_vsuxseg8ei64_v_i16mf4_m(__VA_ARGS__)

◆ vsuxseg8ei64_v_i32m1

#define vsuxseg8ei64_v_i32m1 ( ... ) __riscv_vsuxseg8ei64_v_i32m1(__VA_ARGS__)

◆ vsuxseg8ei64_v_i32m1_m

#define vsuxseg8ei64_v_i32m1_m ( ... ) __riscv_vsuxseg8ei64_v_i32m1_m(__VA_ARGS__)

◆ vsuxseg8ei64_v_i32mf2

#define vsuxseg8ei64_v_i32mf2 ( ... ) __riscv_vsuxseg8ei64_v_i32mf2(__VA_ARGS__)

◆ vsuxseg8ei64_v_i32mf2_m

#define vsuxseg8ei64_v_i32mf2_m ( ... ) __riscv_vsuxseg8ei64_v_i32mf2_m(__VA_ARGS__)

◆ vsuxseg8ei64_v_i64m1

#define vsuxseg8ei64_v_i64m1 ( ... ) __riscv_vsuxseg8ei64_v_i64m1(__VA_ARGS__)

◆ vsuxseg8ei64_v_i64m1_m

#define vsuxseg8ei64_v_i64m1_m ( ... ) __riscv_vsuxseg8ei64_v_i64m1_m(__VA_ARGS__)

◆ vsuxseg8ei64_v_i8m1

#define vsuxseg8ei64_v_i8m1 ( ... ) __riscv_vsuxseg8ei64_v_i8m1(__VA_ARGS__)

◆ vsuxseg8ei64_v_i8m1_m

#define vsuxseg8ei64_v_i8m1_m ( ... ) __riscv_vsuxseg8ei64_v_i8m1_m(__VA_ARGS__)

◆ vsuxseg8ei64_v_i8mf2

#define vsuxseg8ei64_v_i8mf2 ( ... ) __riscv_vsuxseg8ei64_v_i8mf2(__VA_ARGS__)

◆ vsuxseg8ei64_v_i8mf2_m

#define vsuxseg8ei64_v_i8mf2_m ( ... ) __riscv_vsuxseg8ei64_v_i8mf2_m(__VA_ARGS__)

◆ vsuxseg8ei64_v_i8mf4

#define vsuxseg8ei64_v_i8mf4 ( ... ) __riscv_vsuxseg8ei64_v_i8mf4(__VA_ARGS__)

◆ vsuxseg8ei64_v_i8mf4_m

#define vsuxseg8ei64_v_i8mf4_m ( ... ) __riscv_vsuxseg8ei64_v_i8mf4_m(__VA_ARGS__)

◆ vsuxseg8ei64_v_i8mf8

#define vsuxseg8ei64_v_i8mf8 ( ... ) __riscv_vsuxseg8ei64_v_i8mf8(__VA_ARGS__)

◆ vsuxseg8ei64_v_i8mf8_m

#define vsuxseg8ei64_v_i8mf8_m ( ... ) __riscv_vsuxseg8ei64_v_i8mf8_m(__VA_ARGS__)

◆ vsuxseg8ei64_v_u16m1

#define vsuxseg8ei64_v_u16m1 ( ... ) __riscv_vsuxseg8ei64_v_u16m1(__VA_ARGS__)

◆ vsuxseg8ei64_v_u16m1_m

#define vsuxseg8ei64_v_u16m1_m ( ... ) __riscv_vsuxseg8ei64_v_u16m1_m(__VA_ARGS__)

◆ vsuxseg8ei64_v_u16mf2

#define vsuxseg8ei64_v_u16mf2 ( ... ) __riscv_vsuxseg8ei64_v_u16mf2(__VA_ARGS__)

◆ vsuxseg8ei64_v_u16mf2_m

#define vsuxseg8ei64_v_u16mf2_m ( ... ) __riscv_vsuxseg8ei64_v_u16mf2_m(__VA_ARGS__)

◆ vsuxseg8ei64_v_u16mf4

#define vsuxseg8ei64_v_u16mf4 ( ... ) __riscv_vsuxseg8ei64_v_u16mf4(__VA_ARGS__)

◆ vsuxseg8ei64_v_u16mf4_m

#define vsuxseg8ei64_v_u16mf4_m ( ... ) __riscv_vsuxseg8ei64_v_u16mf4_m(__VA_ARGS__)

◆ vsuxseg8ei64_v_u32m1

#define vsuxseg8ei64_v_u32m1 ( ... ) __riscv_vsuxseg8ei64_v_u32m1(__VA_ARGS__)

◆ vsuxseg8ei64_v_u32m1_m

#define vsuxseg8ei64_v_u32m1_m ( ... ) __riscv_vsuxseg8ei64_v_u32m1_m(__VA_ARGS__)

◆ vsuxseg8ei64_v_u32mf2

#define vsuxseg8ei64_v_u32mf2 ( ... ) __riscv_vsuxseg8ei64_v_u32mf2(__VA_ARGS__)

◆ vsuxseg8ei64_v_u32mf2_m

#define vsuxseg8ei64_v_u32mf2_m ( ... ) __riscv_vsuxseg8ei64_v_u32mf2_m(__VA_ARGS__)

◆ vsuxseg8ei64_v_u64m1

#define vsuxseg8ei64_v_u64m1 ( ... ) __riscv_vsuxseg8ei64_v_u64m1(__VA_ARGS__)

◆ vsuxseg8ei64_v_u64m1_m

#define vsuxseg8ei64_v_u64m1_m ( ... ) __riscv_vsuxseg8ei64_v_u64m1_m(__VA_ARGS__)

◆ vsuxseg8ei64_v_u8m1

#define vsuxseg8ei64_v_u8m1 ( ... ) __riscv_vsuxseg8ei64_v_u8m1(__VA_ARGS__)

◆ vsuxseg8ei64_v_u8m1_m

#define vsuxseg8ei64_v_u8m1_m ( ... ) __riscv_vsuxseg8ei64_v_u8m1_m(__VA_ARGS__)

◆ vsuxseg8ei64_v_u8mf2

#define vsuxseg8ei64_v_u8mf2 ( ... ) __riscv_vsuxseg8ei64_v_u8mf2(__VA_ARGS__)

◆ vsuxseg8ei64_v_u8mf2_m

#define vsuxseg8ei64_v_u8mf2_m ( ... ) __riscv_vsuxseg8ei64_v_u8mf2_m(__VA_ARGS__)

◆ vsuxseg8ei64_v_u8mf4

#define vsuxseg8ei64_v_u8mf4 ( ... ) __riscv_vsuxseg8ei64_v_u8mf4(__VA_ARGS__)

◆ vsuxseg8ei64_v_u8mf4_m

#define vsuxseg8ei64_v_u8mf4_m ( ... ) __riscv_vsuxseg8ei64_v_u8mf4_m(__VA_ARGS__)

◆ vsuxseg8ei64_v_u8mf8

#define vsuxseg8ei64_v_u8mf8 ( ... ) __riscv_vsuxseg8ei64_v_u8mf8(__VA_ARGS__)

◆ vsuxseg8ei64_v_u8mf8_m

#define vsuxseg8ei64_v_u8mf8_m ( ... ) __riscv_vsuxseg8ei64_v_u8mf8_m(__VA_ARGS__)

◆ vsuxseg8ei8_v_f16m1

#define vsuxseg8ei8_v_f16m1 ( ... ) __riscv_vsuxseg8ei8_v_f16m1(__VA_ARGS__)

◆ vsuxseg8ei8_v_f16m1_m

#define vsuxseg8ei8_v_f16m1_m ( ... ) __riscv_vsuxseg8ei8_v_f16m1_m(__VA_ARGS__)

◆ vsuxseg8ei8_v_f16mf2

#define vsuxseg8ei8_v_f16mf2 ( ... ) __riscv_vsuxseg8ei8_v_f16mf2(__VA_ARGS__)

◆ vsuxseg8ei8_v_f16mf2_m

#define vsuxseg8ei8_v_f16mf2_m ( ... ) __riscv_vsuxseg8ei8_v_f16mf2_m(__VA_ARGS__)

◆ vsuxseg8ei8_v_f16mf4

#define vsuxseg8ei8_v_f16mf4 ( ... ) __riscv_vsuxseg8ei8_v_f16mf4(__VA_ARGS__)

◆ vsuxseg8ei8_v_f16mf4_m

#define vsuxseg8ei8_v_f16mf4_m ( ... ) __riscv_vsuxseg8ei8_v_f16mf4_m(__VA_ARGS__)

◆ vsuxseg8ei8_v_f32m1

#define vsuxseg8ei8_v_f32m1 ( ... ) __riscv_vsuxseg8ei8_v_f32m1(__VA_ARGS__)

◆ vsuxseg8ei8_v_f32m1_m

#define vsuxseg8ei8_v_f32m1_m ( ... ) __riscv_vsuxseg8ei8_v_f32m1_m(__VA_ARGS__)

◆ vsuxseg8ei8_v_f32mf2

#define vsuxseg8ei8_v_f32mf2 ( ... ) __riscv_vsuxseg8ei8_v_f32mf2(__VA_ARGS__)

◆ vsuxseg8ei8_v_f32mf2_m

#define vsuxseg8ei8_v_f32mf2_m ( ... ) __riscv_vsuxseg8ei8_v_f32mf2_m(__VA_ARGS__)

◆ vsuxseg8ei8_v_f64m1

#define vsuxseg8ei8_v_f64m1 ( ... ) __riscv_vsuxseg8ei8_v_f64m1(__VA_ARGS__)

◆ vsuxseg8ei8_v_f64m1_m

#define vsuxseg8ei8_v_f64m1_m ( ... ) __riscv_vsuxseg8ei8_v_f64m1_m(__VA_ARGS__)

◆ vsuxseg8ei8_v_i16m1

#define vsuxseg8ei8_v_i16m1 ( ... ) __riscv_vsuxseg8ei8_v_i16m1(__VA_ARGS__)

◆ vsuxseg8ei8_v_i16m1_m

#define vsuxseg8ei8_v_i16m1_m ( ... ) __riscv_vsuxseg8ei8_v_i16m1_m(__VA_ARGS__)

◆ vsuxseg8ei8_v_i16mf2

#define vsuxseg8ei8_v_i16mf2 ( ... ) __riscv_vsuxseg8ei8_v_i16mf2(__VA_ARGS__)

◆ vsuxseg8ei8_v_i16mf2_m

#define vsuxseg8ei8_v_i16mf2_m ( ... ) __riscv_vsuxseg8ei8_v_i16mf2_m(__VA_ARGS__)

◆ vsuxseg8ei8_v_i16mf4

#define vsuxseg8ei8_v_i16mf4 ( ... ) __riscv_vsuxseg8ei8_v_i16mf4(__VA_ARGS__)

◆ vsuxseg8ei8_v_i16mf4_m

#define vsuxseg8ei8_v_i16mf4_m ( ... ) __riscv_vsuxseg8ei8_v_i16mf4_m(__VA_ARGS__)

◆ vsuxseg8ei8_v_i32m1

#define vsuxseg8ei8_v_i32m1 ( ... ) __riscv_vsuxseg8ei8_v_i32m1(__VA_ARGS__)

◆ vsuxseg8ei8_v_i32m1_m

#define vsuxseg8ei8_v_i32m1_m ( ... ) __riscv_vsuxseg8ei8_v_i32m1_m(__VA_ARGS__)

◆ vsuxseg8ei8_v_i32mf2

#define vsuxseg8ei8_v_i32mf2 ( ... ) __riscv_vsuxseg8ei8_v_i32mf2(__VA_ARGS__)

◆ vsuxseg8ei8_v_i32mf2_m

#define vsuxseg8ei8_v_i32mf2_m ( ... ) __riscv_vsuxseg8ei8_v_i32mf2_m(__VA_ARGS__)

◆ vsuxseg8ei8_v_i64m1

#define vsuxseg8ei8_v_i64m1 ( ... ) __riscv_vsuxseg8ei8_v_i64m1(__VA_ARGS__)

◆ vsuxseg8ei8_v_i64m1_m

#define vsuxseg8ei8_v_i64m1_m ( ... ) __riscv_vsuxseg8ei8_v_i64m1_m(__VA_ARGS__)

◆ vsuxseg8ei8_v_i8m1

#define vsuxseg8ei8_v_i8m1 ( ... ) __riscv_vsuxseg8ei8_v_i8m1(__VA_ARGS__)

◆ vsuxseg8ei8_v_i8m1_m

#define vsuxseg8ei8_v_i8m1_m ( ... ) __riscv_vsuxseg8ei8_v_i8m1_m(__VA_ARGS__)

◆ vsuxseg8ei8_v_i8mf2

#define vsuxseg8ei8_v_i8mf2 ( ... ) __riscv_vsuxseg8ei8_v_i8mf2(__VA_ARGS__)

◆ vsuxseg8ei8_v_i8mf2_m

#define vsuxseg8ei8_v_i8mf2_m ( ... ) __riscv_vsuxseg8ei8_v_i8mf2_m(__VA_ARGS__)

◆ vsuxseg8ei8_v_i8mf4

#define vsuxseg8ei8_v_i8mf4 ( ... ) __riscv_vsuxseg8ei8_v_i8mf4(__VA_ARGS__)

◆ vsuxseg8ei8_v_i8mf4_m

#define vsuxseg8ei8_v_i8mf4_m ( ... ) __riscv_vsuxseg8ei8_v_i8mf4_m(__VA_ARGS__)

◆ vsuxseg8ei8_v_i8mf8

#define vsuxseg8ei8_v_i8mf8 ( ... ) __riscv_vsuxseg8ei8_v_i8mf8(__VA_ARGS__)

◆ vsuxseg8ei8_v_i8mf8_m

#define vsuxseg8ei8_v_i8mf8_m ( ... ) __riscv_vsuxseg8ei8_v_i8mf8_m(__VA_ARGS__)

◆ vsuxseg8ei8_v_u16m1

#define vsuxseg8ei8_v_u16m1 ( ... ) __riscv_vsuxseg8ei8_v_u16m1(__VA_ARGS__)

◆ vsuxseg8ei8_v_u16m1_m

#define vsuxseg8ei8_v_u16m1_m ( ... ) __riscv_vsuxseg8ei8_v_u16m1_m(__VA_ARGS__)

◆ vsuxseg8ei8_v_u16mf2

#define vsuxseg8ei8_v_u16mf2 ( ... ) __riscv_vsuxseg8ei8_v_u16mf2(__VA_ARGS__)

◆ vsuxseg8ei8_v_u16mf2_m

#define vsuxseg8ei8_v_u16mf2_m ( ... ) __riscv_vsuxseg8ei8_v_u16mf2_m(__VA_ARGS__)

◆ vsuxseg8ei8_v_u16mf4

#define vsuxseg8ei8_v_u16mf4 ( ... ) __riscv_vsuxseg8ei8_v_u16mf4(__VA_ARGS__)

◆ vsuxseg8ei8_v_u16mf4_m

#define vsuxseg8ei8_v_u16mf4_m ( ... ) __riscv_vsuxseg8ei8_v_u16mf4_m(__VA_ARGS__)

◆ vsuxseg8ei8_v_u32m1

#define vsuxseg8ei8_v_u32m1 ( ... ) __riscv_vsuxseg8ei8_v_u32m1(__VA_ARGS__)

◆ vsuxseg8ei8_v_u32m1_m

#define vsuxseg8ei8_v_u32m1_m ( ... ) __riscv_vsuxseg8ei8_v_u32m1_m(__VA_ARGS__)

◆ vsuxseg8ei8_v_u32mf2

#define vsuxseg8ei8_v_u32mf2 ( ... ) __riscv_vsuxseg8ei8_v_u32mf2(__VA_ARGS__)

◆ vsuxseg8ei8_v_u32mf2_m

#define vsuxseg8ei8_v_u32mf2_m ( ... ) __riscv_vsuxseg8ei8_v_u32mf2_m(__VA_ARGS__)

◆ vsuxseg8ei8_v_u64m1

#define vsuxseg8ei8_v_u64m1 ( ... ) __riscv_vsuxseg8ei8_v_u64m1(__VA_ARGS__)

◆ vsuxseg8ei8_v_u64m1_m

#define vsuxseg8ei8_v_u64m1_m ( ... ) __riscv_vsuxseg8ei8_v_u64m1_m(__VA_ARGS__)

◆ vsuxseg8ei8_v_u8m1

#define vsuxseg8ei8_v_u8m1 ( ... ) __riscv_vsuxseg8ei8_v_u8m1(__VA_ARGS__)

◆ vsuxseg8ei8_v_u8m1_m

#define vsuxseg8ei8_v_u8m1_m ( ... ) __riscv_vsuxseg8ei8_v_u8m1_m(__VA_ARGS__)

◆ vsuxseg8ei8_v_u8mf2

#define vsuxseg8ei8_v_u8mf2 ( ... ) __riscv_vsuxseg8ei8_v_u8mf2(__VA_ARGS__)

◆ vsuxseg8ei8_v_u8mf2_m

#define vsuxseg8ei8_v_u8mf2_m ( ... ) __riscv_vsuxseg8ei8_v_u8mf2_m(__VA_ARGS__)

◆ vsuxseg8ei8_v_u8mf4

#define vsuxseg8ei8_v_u8mf4 ( ... ) __riscv_vsuxseg8ei8_v_u8mf4(__VA_ARGS__)

◆ vsuxseg8ei8_v_u8mf4_m

#define vsuxseg8ei8_v_u8mf4_m ( ... ) __riscv_vsuxseg8ei8_v_u8mf4_m(__VA_ARGS__)

◆ vsuxseg8ei8_v_u8mf8

#define vsuxseg8ei8_v_u8mf8 ( ... ) __riscv_vsuxseg8ei8_v_u8mf8(__VA_ARGS__)

◆ vsuxseg8ei8_v_u8mf8_m

#define vsuxseg8ei8_v_u8mf8_m ( ... ) __riscv_vsuxseg8ei8_v_u8mf8_m(__VA_ARGS__)

◆ vundefined_f16m1

#define vundefined_f16m1 ( ... ) __riscv_vundefined_f16m1(__VA_ARGS__)

◆ vundefined_f16m2

#define vundefined_f16m2 ( ... ) __riscv_vundefined_f16m2(__VA_ARGS__)

◆ vundefined_f16m4

#define vundefined_f16m4 ( ... ) __riscv_vundefined_f16m4(__VA_ARGS__)

◆ vundefined_f16m8

#define vundefined_f16m8 ( ... ) __riscv_vundefined_f16m8(__VA_ARGS__)

◆ vundefined_f16mf2

#define vundefined_f16mf2 ( ... ) __riscv_vundefined_f16mf2(__VA_ARGS__)

◆ vundefined_f16mf4

#define vundefined_f16mf4 ( ... ) __riscv_vundefined_f16mf4(__VA_ARGS__)

◆ vundefined_f32m1

#define vundefined_f32m1 ( ... ) __riscv_vundefined_f32m1(__VA_ARGS__)

◆ vundefined_f32m2

#define vundefined_f32m2 ( ... ) __riscv_vundefined_f32m2(__VA_ARGS__)

◆ vundefined_f32m4

#define vundefined_f32m4 ( ... ) __riscv_vundefined_f32m4(__VA_ARGS__)

◆ vundefined_f32m8

#define vundefined_f32m8 ( ... ) __riscv_vundefined_f32m8(__VA_ARGS__)

◆ vundefined_f32mf2

#define vundefined_f32mf2 ( ... ) __riscv_vundefined_f32mf2(__VA_ARGS__)

◆ vundefined_f64m1

#define vundefined_f64m1 ( ... ) __riscv_vundefined_f64m1(__VA_ARGS__)

◆ vundefined_f64m2

#define vundefined_f64m2 ( ... ) __riscv_vundefined_f64m2(__VA_ARGS__)

◆ vundefined_f64m4

#define vundefined_f64m4 ( ... ) __riscv_vundefined_f64m4(__VA_ARGS__)

◆ vundefined_f64m8

#define vundefined_f64m8 ( ... ) __riscv_vundefined_f64m8(__VA_ARGS__)

◆ vundefined_i16m1

#define vundefined_i16m1 ( ... ) __riscv_vundefined_i16m1(__VA_ARGS__)

◆ vundefined_i16m2

#define vundefined_i16m2 ( ... ) __riscv_vundefined_i16m2(__VA_ARGS__)

◆ vundefined_i16m4

#define vundefined_i16m4 ( ... ) __riscv_vundefined_i16m4(__VA_ARGS__)

◆ vundefined_i16m8

#define vundefined_i16m8 ( ... ) __riscv_vundefined_i16m8(__VA_ARGS__)

◆ vundefined_i16mf2

#define vundefined_i16mf2 ( ... ) __riscv_vundefined_i16mf2(__VA_ARGS__)

◆ vundefined_i16mf4

#define vundefined_i16mf4 ( ... ) __riscv_vundefined_i16mf4(__VA_ARGS__)

◆ vundefined_i32m1

#define vundefined_i32m1 ( ... ) __riscv_vundefined_i32m1(__VA_ARGS__)

◆ vundefined_i32m2

#define vundefined_i32m2 ( ... ) __riscv_vundefined_i32m2(__VA_ARGS__)

◆ vundefined_i32m4

#define vundefined_i32m4 ( ... ) __riscv_vundefined_i32m4(__VA_ARGS__)

◆ vundefined_i32m8

#define vundefined_i32m8 ( ... ) __riscv_vundefined_i32m8(__VA_ARGS__)

◆ vundefined_i32mf2

#define vundefined_i32mf2 ( ... ) __riscv_vundefined_i32mf2(__VA_ARGS__)

◆ vundefined_i64m1

#define vundefined_i64m1 ( ... ) __riscv_vundefined_i64m1(__VA_ARGS__)

◆ vundefined_i64m2

#define vundefined_i64m2 ( ... ) __riscv_vundefined_i64m2(__VA_ARGS__)

◆ vundefined_i64m4

#define vundefined_i64m4 ( ... ) __riscv_vundefined_i64m4(__VA_ARGS__)

◆ vundefined_i64m8

#define vundefined_i64m8 ( ... ) __riscv_vundefined_i64m8(__VA_ARGS__)

◆ vundefined_i8m1

#define vundefined_i8m1 ( ... ) __riscv_vundefined_i8m1(__VA_ARGS__)

◆ vundefined_i8m2

#define vundefined_i8m2 ( ... ) __riscv_vundefined_i8m2(__VA_ARGS__)

◆ vundefined_i8m4

#define vundefined_i8m4 ( ... ) __riscv_vundefined_i8m4(__VA_ARGS__)

◆ vundefined_i8m8

#define vundefined_i8m8 ( ... ) __riscv_vundefined_i8m8(__VA_ARGS__)

◆ vundefined_i8mf2

#define vundefined_i8mf2 ( ... ) __riscv_vundefined_i8mf2(__VA_ARGS__)

◆ vundefined_i8mf4

#define vundefined_i8mf4 ( ... ) __riscv_vundefined_i8mf4(__VA_ARGS__)

◆ vundefined_i8mf8

#define vundefined_i8mf8 ( ... ) __riscv_vundefined_i8mf8(__VA_ARGS__)

◆ vundefined_u16m1

#define vundefined_u16m1 ( ... ) __riscv_vundefined_u16m1(__VA_ARGS__)

◆ vundefined_u16m2

#define vundefined_u16m2 ( ... ) __riscv_vundefined_u16m2(__VA_ARGS__)

◆ vundefined_u16m4

#define vundefined_u16m4 ( ... ) __riscv_vundefined_u16m4(__VA_ARGS__)

◆ vundefined_u16m8

#define vundefined_u16m8 ( ... ) __riscv_vundefined_u16m8(__VA_ARGS__)

◆ vundefined_u16mf2

#define vundefined_u16mf2 ( ... ) __riscv_vundefined_u16mf2(__VA_ARGS__)

◆ vundefined_u16mf4

#define vundefined_u16mf4 ( ... ) __riscv_vundefined_u16mf4(__VA_ARGS__)

◆ vundefined_u32m1

#define vundefined_u32m1 ( ... ) __riscv_vundefined_u32m1(__VA_ARGS__)

◆ vundefined_u32m2

#define vundefined_u32m2 ( ... ) __riscv_vundefined_u32m2(__VA_ARGS__)

◆ vundefined_u32m4

#define vundefined_u32m4 ( ... ) __riscv_vundefined_u32m4(__VA_ARGS__)

◆ vundefined_u32m8

#define vundefined_u32m8 ( ... ) __riscv_vundefined_u32m8(__VA_ARGS__)

◆ vundefined_u32mf2

#define vundefined_u32mf2 ( ... ) __riscv_vundefined_u32mf2(__VA_ARGS__)

◆ vundefined_u64m1

#define vundefined_u64m1 ( ... ) __riscv_vundefined_u64m1(__VA_ARGS__)

◆ vundefined_u64m2

#define vundefined_u64m2 ( ... ) __riscv_vundefined_u64m2(__VA_ARGS__)

◆ vundefined_u64m4

#define vundefined_u64m4 ( ... ) __riscv_vundefined_u64m4(__VA_ARGS__)

◆ vundefined_u64m8

#define vundefined_u64m8 ( ... ) __riscv_vundefined_u64m8(__VA_ARGS__)

◆ vundefined_u8m1

#define vundefined_u8m1 ( ... ) __riscv_vundefined_u8m1(__VA_ARGS__)

◆ vundefined_u8m2

#define vundefined_u8m2 ( ... ) __riscv_vundefined_u8m2(__VA_ARGS__)

◆ vundefined_u8m4

#define vundefined_u8m4 ( ... ) __riscv_vundefined_u8m4(__VA_ARGS__)

◆ vundefined_u8m8

#define vundefined_u8m8 ( ... ) __riscv_vundefined_u8m8(__VA_ARGS__)

◆ vundefined_u8mf2

#define vundefined_u8mf2 ( ... ) __riscv_vundefined_u8mf2(__VA_ARGS__)

◆ vundefined_u8mf4

#define vundefined_u8mf4 ( ... ) __riscv_vundefined_u8mf4(__VA_ARGS__)

◆ vundefined_u8mf8

#define vundefined_u8mf8 ( ... ) __riscv_vundefined_u8mf8(__VA_ARGS__)

◆ vwadd_vv_i16m1

#define vwadd_vv_i16m1 ( ... ) __riscv_vwadd_vv_i16m1(__VA_ARGS__)

◆ vwadd_vv_i16m1_m

#define vwadd_vv_i16m1_m ( ... ) __riscv_vwadd_vv_i16m1_tumu(__VA_ARGS__)

◆ vwadd_vv_i16m2

#define vwadd_vv_i16m2 ( ... ) __riscv_vwadd_vv_i16m2(__VA_ARGS__)

◆ vwadd_vv_i16m2_m

#define vwadd_vv_i16m2_m ( ... ) __riscv_vwadd_vv_i16m2_tumu(__VA_ARGS__)

◆ vwadd_vv_i16m4

#define vwadd_vv_i16m4 ( ... ) __riscv_vwadd_vv_i16m4(__VA_ARGS__)

◆ vwadd_vv_i16m4_m

#define vwadd_vv_i16m4_m ( ... ) __riscv_vwadd_vv_i16m4_tumu(__VA_ARGS__)

◆ vwadd_vv_i16m8

#define vwadd_vv_i16m8 ( ... ) __riscv_vwadd_vv_i16m8(__VA_ARGS__)

◆ vwadd_vv_i16m8_m

#define vwadd_vv_i16m8_m ( ... ) __riscv_vwadd_vv_i16m8_tumu(__VA_ARGS__)

◆ vwadd_vv_i16mf2

#define vwadd_vv_i16mf2 ( ... ) __riscv_vwadd_vv_i16mf2(__VA_ARGS__)

◆ vwadd_vv_i16mf2_m

#define vwadd_vv_i16mf2_m ( ... ) __riscv_vwadd_vv_i16mf2_tumu(__VA_ARGS__)

◆ vwadd_vv_i16mf4

#define vwadd_vv_i16mf4 ( ... ) __riscv_vwadd_vv_i16mf4(__VA_ARGS__)

◆ vwadd_vv_i16mf4_m

#define vwadd_vv_i16mf4_m ( ... ) __riscv_vwadd_vv_i16mf4_tumu(__VA_ARGS__)

◆ vwadd_vv_i32m1

#define vwadd_vv_i32m1 ( ... ) __riscv_vwadd_vv_i32m1(__VA_ARGS__)

◆ vwadd_vv_i32m1_m

#define vwadd_vv_i32m1_m ( ... ) __riscv_vwadd_vv_i32m1_tumu(__VA_ARGS__)

◆ vwadd_vv_i32m2

#define vwadd_vv_i32m2 ( ... ) __riscv_vwadd_vv_i32m2(__VA_ARGS__)

◆ vwadd_vv_i32m2_m

#define vwadd_vv_i32m2_m ( ... ) __riscv_vwadd_vv_i32m2_tumu(__VA_ARGS__)

◆ vwadd_vv_i32m4

#define vwadd_vv_i32m4 ( ... ) __riscv_vwadd_vv_i32m4(__VA_ARGS__)

◆ vwadd_vv_i32m4_m

#define vwadd_vv_i32m4_m ( ... ) __riscv_vwadd_vv_i32m4_tumu(__VA_ARGS__)

◆ vwadd_vv_i32m8

#define vwadd_vv_i32m8 ( ... ) __riscv_vwadd_vv_i32m8(__VA_ARGS__)

◆ vwadd_vv_i32m8_m

#define vwadd_vv_i32m8_m ( ... ) __riscv_vwadd_vv_i32m8_tumu(__VA_ARGS__)

◆ vwadd_vv_i32mf2

#define vwadd_vv_i32mf2 ( ... ) __riscv_vwadd_vv_i32mf2(__VA_ARGS__)

◆ vwadd_vv_i32mf2_m

#define vwadd_vv_i32mf2_m ( ... ) __riscv_vwadd_vv_i32mf2_tumu(__VA_ARGS__)

◆ vwadd_vv_i64m1

#define vwadd_vv_i64m1 ( ... ) __riscv_vwadd_vv_i64m1(__VA_ARGS__)

◆ vwadd_vv_i64m1_m

#define vwadd_vv_i64m1_m ( ... ) __riscv_vwadd_vv_i64m1_tumu(__VA_ARGS__)

◆ vwadd_vv_i64m2

#define vwadd_vv_i64m2 ( ... ) __riscv_vwadd_vv_i64m2(__VA_ARGS__)

◆ vwadd_vv_i64m2_m

#define vwadd_vv_i64m2_m ( ... ) __riscv_vwadd_vv_i64m2_tumu(__VA_ARGS__)

◆ vwadd_vv_i64m4

#define vwadd_vv_i64m4 ( ... ) __riscv_vwadd_vv_i64m4(__VA_ARGS__)

◆ vwadd_vv_i64m4_m

#define vwadd_vv_i64m4_m ( ... ) __riscv_vwadd_vv_i64m4_tumu(__VA_ARGS__)

◆ vwadd_vv_i64m8

#define vwadd_vv_i64m8 ( ... ) __riscv_vwadd_vv_i64m8(__VA_ARGS__)

◆ vwadd_vv_i64m8_m

#define vwadd_vv_i64m8_m ( ... ) __riscv_vwadd_vv_i64m8_tumu(__VA_ARGS__)

◆ vwadd_vx_i16m1

#define vwadd_vx_i16m1 ( ... ) __riscv_vwadd_vx_i16m1(__VA_ARGS__)

◆ vwadd_vx_i16m1_m

#define vwadd_vx_i16m1_m ( ... ) __riscv_vwadd_vx_i16m1_tumu(__VA_ARGS__)

◆ vwadd_vx_i16m2

#define vwadd_vx_i16m2 ( ... ) __riscv_vwadd_vx_i16m2(__VA_ARGS__)

◆ vwadd_vx_i16m2_m

#define vwadd_vx_i16m2_m ( ... ) __riscv_vwadd_vx_i16m2_tumu(__VA_ARGS__)

◆ vwadd_vx_i16m4

#define vwadd_vx_i16m4 ( ... ) __riscv_vwadd_vx_i16m4(__VA_ARGS__)

◆ vwadd_vx_i16m4_m

#define vwadd_vx_i16m4_m ( ... ) __riscv_vwadd_vx_i16m4_tumu(__VA_ARGS__)

◆ vwadd_vx_i16m8

#define vwadd_vx_i16m8 ( ... ) __riscv_vwadd_vx_i16m8(__VA_ARGS__)

◆ vwadd_vx_i16m8_m

#define vwadd_vx_i16m8_m ( ... ) __riscv_vwadd_vx_i16m8_tumu(__VA_ARGS__)

◆ vwadd_vx_i16mf2

#define vwadd_vx_i16mf2 ( ... ) __riscv_vwadd_vx_i16mf2(__VA_ARGS__)

◆ vwadd_vx_i16mf2_m

#define vwadd_vx_i16mf2_m ( ... ) __riscv_vwadd_vx_i16mf2_tumu(__VA_ARGS__)

◆ vwadd_vx_i16mf4

#define vwadd_vx_i16mf4 ( ... ) __riscv_vwadd_vx_i16mf4(__VA_ARGS__)

◆ vwadd_vx_i16mf4_m

#define vwadd_vx_i16mf4_m ( ... ) __riscv_vwadd_vx_i16mf4_tumu(__VA_ARGS__)

◆ vwadd_vx_i32m1

#define vwadd_vx_i32m1 ( ... ) __riscv_vwadd_vx_i32m1(__VA_ARGS__)

◆ vwadd_vx_i32m1_m

#define vwadd_vx_i32m1_m ( ... ) __riscv_vwadd_vx_i32m1_tumu(__VA_ARGS__)

◆ vwadd_vx_i32m2

#define vwadd_vx_i32m2 ( ... ) __riscv_vwadd_vx_i32m2(__VA_ARGS__)

◆ vwadd_vx_i32m2_m

#define vwadd_vx_i32m2_m ( ... ) __riscv_vwadd_vx_i32m2_tumu(__VA_ARGS__)

◆ vwadd_vx_i32m4

#define vwadd_vx_i32m4 ( ... ) __riscv_vwadd_vx_i32m4(__VA_ARGS__)

◆ vwadd_vx_i32m4_m

#define vwadd_vx_i32m4_m ( ... ) __riscv_vwadd_vx_i32m4_tumu(__VA_ARGS__)

◆ vwadd_vx_i32m8

#define vwadd_vx_i32m8 ( ... ) __riscv_vwadd_vx_i32m8(__VA_ARGS__)

◆ vwadd_vx_i32m8_m

#define vwadd_vx_i32m8_m ( ... ) __riscv_vwadd_vx_i32m8_tumu(__VA_ARGS__)

◆ vwadd_vx_i32mf2

#define vwadd_vx_i32mf2 ( ... ) __riscv_vwadd_vx_i32mf2(__VA_ARGS__)

◆ vwadd_vx_i32mf2_m

#define vwadd_vx_i32mf2_m ( ... ) __riscv_vwadd_vx_i32mf2_tumu(__VA_ARGS__)

◆ vwadd_vx_i64m1

#define vwadd_vx_i64m1 ( ... ) __riscv_vwadd_vx_i64m1(__VA_ARGS__)

◆ vwadd_vx_i64m1_m

#define vwadd_vx_i64m1_m ( ... ) __riscv_vwadd_vx_i64m1_tumu(__VA_ARGS__)

◆ vwadd_vx_i64m2

#define vwadd_vx_i64m2 ( ... ) __riscv_vwadd_vx_i64m2(__VA_ARGS__)

◆ vwadd_vx_i64m2_m

#define vwadd_vx_i64m2_m ( ... ) __riscv_vwadd_vx_i64m2_tumu(__VA_ARGS__)

◆ vwadd_vx_i64m4

#define vwadd_vx_i64m4 ( ... ) __riscv_vwadd_vx_i64m4(__VA_ARGS__)

◆ vwadd_vx_i64m4_m

#define vwadd_vx_i64m4_m ( ... ) __riscv_vwadd_vx_i64m4_tumu(__VA_ARGS__)

◆ vwadd_vx_i64m8

#define vwadd_vx_i64m8 ( ... ) __riscv_vwadd_vx_i64m8(__VA_ARGS__)

◆ vwadd_vx_i64m8_m

#define vwadd_vx_i64m8_m ( ... ) __riscv_vwadd_vx_i64m8_tumu(__VA_ARGS__)

◆ vwadd_wv_i16m1

#define vwadd_wv_i16m1 ( ... ) __riscv_vwadd_wv_i16m1(__VA_ARGS__)

◆ vwadd_wv_i16m1_m

#define vwadd_wv_i16m1_m ( ... ) __riscv_vwadd_wv_i16m1_tumu(__VA_ARGS__)

◆ vwadd_wv_i16m2

#define vwadd_wv_i16m2 ( ... ) __riscv_vwadd_wv_i16m2(__VA_ARGS__)

◆ vwadd_wv_i16m2_m

#define vwadd_wv_i16m2_m ( ... ) __riscv_vwadd_wv_i16m2_tumu(__VA_ARGS__)

◆ vwadd_wv_i16m4

#define vwadd_wv_i16m4 ( ... ) __riscv_vwadd_wv_i16m4(__VA_ARGS__)

◆ vwadd_wv_i16m4_m

#define vwadd_wv_i16m4_m ( ... ) __riscv_vwadd_wv_i16m4_tumu(__VA_ARGS__)

◆ vwadd_wv_i16m8

#define vwadd_wv_i16m8 ( ... ) __riscv_vwadd_wv_i16m8(__VA_ARGS__)

◆ vwadd_wv_i16m8_m

#define vwadd_wv_i16m8_m ( ... ) __riscv_vwadd_wv_i16m8_tumu(__VA_ARGS__)

◆ vwadd_wv_i16mf2

#define vwadd_wv_i16mf2 ( ... ) __riscv_vwadd_wv_i16mf2(__VA_ARGS__)

◆ vwadd_wv_i16mf2_m

#define vwadd_wv_i16mf2_m ( ... ) __riscv_vwadd_wv_i16mf2_tumu(__VA_ARGS__)

◆ vwadd_wv_i16mf4

#define vwadd_wv_i16mf4 ( ... ) __riscv_vwadd_wv_i16mf4(__VA_ARGS__)

◆ vwadd_wv_i16mf4_m

#define vwadd_wv_i16mf4_m ( ... ) __riscv_vwadd_wv_i16mf4_tumu(__VA_ARGS__)

◆ vwadd_wv_i32m1

#define vwadd_wv_i32m1 ( ... ) __riscv_vwadd_wv_i32m1(__VA_ARGS__)

◆ vwadd_wv_i32m1_m

#define vwadd_wv_i32m1_m ( ... ) __riscv_vwadd_wv_i32m1_tumu(__VA_ARGS__)

◆ vwadd_wv_i32m2

#define vwadd_wv_i32m2 ( ... ) __riscv_vwadd_wv_i32m2(__VA_ARGS__)

◆ vwadd_wv_i32m2_m

#define vwadd_wv_i32m2_m ( ... ) __riscv_vwadd_wv_i32m2_tumu(__VA_ARGS__)

◆ vwadd_wv_i32m4

#define vwadd_wv_i32m4 ( ... ) __riscv_vwadd_wv_i32m4(__VA_ARGS__)

◆ vwadd_wv_i32m4_m

#define vwadd_wv_i32m4_m ( ... ) __riscv_vwadd_wv_i32m4_tumu(__VA_ARGS__)

◆ vwadd_wv_i32m8

#define vwadd_wv_i32m8 ( ... ) __riscv_vwadd_wv_i32m8(__VA_ARGS__)

◆ vwadd_wv_i32m8_m

#define vwadd_wv_i32m8_m ( ... ) __riscv_vwadd_wv_i32m8_tumu(__VA_ARGS__)

◆ vwadd_wv_i32mf2

#define vwadd_wv_i32mf2 ( ... ) __riscv_vwadd_wv_i32mf2(__VA_ARGS__)

◆ vwadd_wv_i32mf2_m

#define vwadd_wv_i32mf2_m ( ... ) __riscv_vwadd_wv_i32mf2_tumu(__VA_ARGS__)

◆ vwadd_wv_i64m1

#define vwadd_wv_i64m1 ( ... ) __riscv_vwadd_wv_i64m1(__VA_ARGS__)

◆ vwadd_wv_i64m1_m

#define vwadd_wv_i64m1_m ( ... ) __riscv_vwadd_wv_i64m1_tumu(__VA_ARGS__)

◆ vwadd_wv_i64m2

#define vwadd_wv_i64m2 ( ... ) __riscv_vwadd_wv_i64m2(__VA_ARGS__)

◆ vwadd_wv_i64m2_m

#define vwadd_wv_i64m2_m ( ... ) __riscv_vwadd_wv_i64m2_tumu(__VA_ARGS__)

◆ vwadd_wv_i64m4

#define vwadd_wv_i64m4 ( ... ) __riscv_vwadd_wv_i64m4(__VA_ARGS__)

◆ vwadd_wv_i64m4_m

#define vwadd_wv_i64m4_m ( ... ) __riscv_vwadd_wv_i64m4_tumu(__VA_ARGS__)

◆ vwadd_wv_i64m8

#define vwadd_wv_i64m8 ( ... ) __riscv_vwadd_wv_i64m8(__VA_ARGS__)

◆ vwadd_wv_i64m8_m

#define vwadd_wv_i64m8_m ( ... ) __riscv_vwadd_wv_i64m8_tumu(__VA_ARGS__)

◆ vwadd_wx_i16m1

#define vwadd_wx_i16m1 ( ... ) __riscv_vwadd_wx_i16m1(__VA_ARGS__)

◆ vwadd_wx_i16m1_m

#define vwadd_wx_i16m1_m ( ... ) __riscv_vwadd_wx_i16m1_tumu(__VA_ARGS__)

◆ vwadd_wx_i16m2

#define vwadd_wx_i16m2 ( ... ) __riscv_vwadd_wx_i16m2(__VA_ARGS__)

◆ vwadd_wx_i16m2_m

#define vwadd_wx_i16m2_m ( ... ) __riscv_vwadd_wx_i16m2_tumu(__VA_ARGS__)

◆ vwadd_wx_i16m4

#define vwadd_wx_i16m4 ( ... ) __riscv_vwadd_wx_i16m4(__VA_ARGS__)

◆ vwadd_wx_i16m4_m

#define vwadd_wx_i16m4_m ( ... ) __riscv_vwadd_wx_i16m4_tumu(__VA_ARGS__)

◆ vwadd_wx_i16m8

#define vwadd_wx_i16m8 ( ... ) __riscv_vwadd_wx_i16m8(__VA_ARGS__)

◆ vwadd_wx_i16m8_m

#define vwadd_wx_i16m8_m ( ... ) __riscv_vwadd_wx_i16m8_tumu(__VA_ARGS__)

◆ vwadd_wx_i16mf2

#define vwadd_wx_i16mf2 ( ... ) __riscv_vwadd_wx_i16mf2(__VA_ARGS__)

◆ vwadd_wx_i16mf2_m

#define vwadd_wx_i16mf2_m ( ... ) __riscv_vwadd_wx_i16mf2_tumu(__VA_ARGS__)

◆ vwadd_wx_i16mf4

#define vwadd_wx_i16mf4 ( ... ) __riscv_vwadd_wx_i16mf4(__VA_ARGS__)

◆ vwadd_wx_i16mf4_m

#define vwadd_wx_i16mf4_m ( ... ) __riscv_vwadd_wx_i16mf4_tumu(__VA_ARGS__)

◆ vwadd_wx_i32m1

#define vwadd_wx_i32m1 ( ... ) __riscv_vwadd_wx_i32m1(__VA_ARGS__)

◆ vwadd_wx_i32m1_m

#define vwadd_wx_i32m1_m ( ... ) __riscv_vwadd_wx_i32m1_tumu(__VA_ARGS__)

◆ vwadd_wx_i32m2

#define vwadd_wx_i32m2 ( ... ) __riscv_vwadd_wx_i32m2(__VA_ARGS__)

◆ vwadd_wx_i32m2_m

#define vwadd_wx_i32m2_m ( ... ) __riscv_vwadd_wx_i32m2_tumu(__VA_ARGS__)

◆ vwadd_wx_i32m4

#define vwadd_wx_i32m4 ( ... ) __riscv_vwadd_wx_i32m4(__VA_ARGS__)

◆ vwadd_wx_i32m4_m

#define vwadd_wx_i32m4_m ( ... ) __riscv_vwadd_wx_i32m4_tumu(__VA_ARGS__)

◆ vwadd_wx_i32m8

#define vwadd_wx_i32m8 ( ... ) __riscv_vwadd_wx_i32m8(__VA_ARGS__)

◆ vwadd_wx_i32m8_m

#define vwadd_wx_i32m8_m ( ... ) __riscv_vwadd_wx_i32m8_tumu(__VA_ARGS__)

◆ vwadd_wx_i32mf2

#define vwadd_wx_i32mf2 ( ... ) __riscv_vwadd_wx_i32mf2(__VA_ARGS__)

◆ vwadd_wx_i32mf2_m

#define vwadd_wx_i32mf2_m ( ... ) __riscv_vwadd_wx_i32mf2_tumu(__VA_ARGS__)

◆ vwadd_wx_i64m1

#define vwadd_wx_i64m1 ( ... ) __riscv_vwadd_wx_i64m1(__VA_ARGS__)

◆ vwadd_wx_i64m1_m

#define vwadd_wx_i64m1_m ( ... ) __riscv_vwadd_wx_i64m1_tumu(__VA_ARGS__)

◆ vwadd_wx_i64m2

#define vwadd_wx_i64m2 ( ... ) __riscv_vwadd_wx_i64m2(__VA_ARGS__)

◆ vwadd_wx_i64m2_m

#define vwadd_wx_i64m2_m ( ... ) __riscv_vwadd_wx_i64m2_tumu(__VA_ARGS__)

◆ vwadd_wx_i64m4

#define vwadd_wx_i64m4 ( ... ) __riscv_vwadd_wx_i64m4(__VA_ARGS__)

◆ vwadd_wx_i64m4_m

#define vwadd_wx_i64m4_m ( ... ) __riscv_vwadd_wx_i64m4_tumu(__VA_ARGS__)

◆ vwadd_wx_i64m8

#define vwadd_wx_i64m8 ( ... ) __riscv_vwadd_wx_i64m8(__VA_ARGS__)

◆ vwadd_wx_i64m8_m

#define vwadd_wx_i64m8_m ( ... ) __riscv_vwadd_wx_i64m8_tumu(__VA_ARGS__)

◆ vwaddu_vv_u16m1

#define vwaddu_vv_u16m1 ( ... ) __riscv_vwaddu_vv_u16m1(__VA_ARGS__)

◆ vwaddu_vv_u16m1_m

#define vwaddu_vv_u16m1_m ( ... ) __riscv_vwaddu_vv_u16m1_tumu(__VA_ARGS__)

◆ vwaddu_vv_u16m2

#define vwaddu_vv_u16m2 ( ... ) __riscv_vwaddu_vv_u16m2(__VA_ARGS__)

◆ vwaddu_vv_u16m2_m

#define vwaddu_vv_u16m2_m ( ... ) __riscv_vwaddu_vv_u16m2_tumu(__VA_ARGS__)

◆ vwaddu_vv_u16m4

#define vwaddu_vv_u16m4 ( ... ) __riscv_vwaddu_vv_u16m4(__VA_ARGS__)

◆ vwaddu_vv_u16m4_m

#define vwaddu_vv_u16m4_m ( ... ) __riscv_vwaddu_vv_u16m4_tumu(__VA_ARGS__)

◆ vwaddu_vv_u16m8

#define vwaddu_vv_u16m8 ( ... ) __riscv_vwaddu_vv_u16m8(__VA_ARGS__)

◆ vwaddu_vv_u16m8_m

#define vwaddu_vv_u16m8_m ( ... ) __riscv_vwaddu_vv_u16m8_tumu(__VA_ARGS__)

◆ vwaddu_vv_u16mf2

#define vwaddu_vv_u16mf2 ( ... ) __riscv_vwaddu_vv_u16mf2(__VA_ARGS__)

◆ vwaddu_vv_u16mf2_m

#define vwaddu_vv_u16mf2_m ( ... ) __riscv_vwaddu_vv_u16mf2_tumu(__VA_ARGS__)

◆ vwaddu_vv_u16mf4

#define vwaddu_vv_u16mf4 ( ... ) __riscv_vwaddu_vv_u16mf4(__VA_ARGS__)

◆ vwaddu_vv_u16mf4_m

#define vwaddu_vv_u16mf4_m ( ... ) __riscv_vwaddu_vv_u16mf4_tumu(__VA_ARGS__)

◆ vwaddu_vv_u32m1

#define vwaddu_vv_u32m1 ( ... ) __riscv_vwaddu_vv_u32m1(__VA_ARGS__)

◆ vwaddu_vv_u32m1_m

#define vwaddu_vv_u32m1_m ( ... ) __riscv_vwaddu_vv_u32m1_tumu(__VA_ARGS__)

◆ vwaddu_vv_u32m2

#define vwaddu_vv_u32m2 ( ... ) __riscv_vwaddu_vv_u32m2(__VA_ARGS__)

◆ vwaddu_vv_u32m2_m

#define vwaddu_vv_u32m2_m ( ... ) __riscv_vwaddu_vv_u32m2_tumu(__VA_ARGS__)

◆ vwaddu_vv_u32m4

#define vwaddu_vv_u32m4 ( ... ) __riscv_vwaddu_vv_u32m4(__VA_ARGS__)

◆ vwaddu_vv_u32m4_m

#define vwaddu_vv_u32m4_m ( ... ) __riscv_vwaddu_vv_u32m4_tumu(__VA_ARGS__)

◆ vwaddu_vv_u32m8

#define vwaddu_vv_u32m8 ( ... ) __riscv_vwaddu_vv_u32m8(__VA_ARGS__)

◆ vwaddu_vv_u32m8_m

#define vwaddu_vv_u32m8_m ( ... ) __riscv_vwaddu_vv_u32m8_tumu(__VA_ARGS__)

◆ vwaddu_vv_u32mf2

#define vwaddu_vv_u32mf2 ( ... ) __riscv_vwaddu_vv_u32mf2(__VA_ARGS__)

◆ vwaddu_vv_u32mf2_m

#define vwaddu_vv_u32mf2_m ( ... ) __riscv_vwaddu_vv_u32mf2_tumu(__VA_ARGS__)

◆ vwaddu_vv_u64m1

#define vwaddu_vv_u64m1 ( ... ) __riscv_vwaddu_vv_u64m1(__VA_ARGS__)

◆ vwaddu_vv_u64m1_m

#define vwaddu_vv_u64m1_m ( ... ) __riscv_vwaddu_vv_u64m1_tumu(__VA_ARGS__)

◆ vwaddu_vv_u64m2

#define vwaddu_vv_u64m2 ( ... ) __riscv_vwaddu_vv_u64m2(__VA_ARGS__)

◆ vwaddu_vv_u64m2_m

#define vwaddu_vv_u64m2_m ( ... ) __riscv_vwaddu_vv_u64m2_tumu(__VA_ARGS__)

◆ vwaddu_vv_u64m4

#define vwaddu_vv_u64m4 ( ... ) __riscv_vwaddu_vv_u64m4(__VA_ARGS__)

◆ vwaddu_vv_u64m4_m

#define vwaddu_vv_u64m4_m ( ... ) __riscv_vwaddu_vv_u64m4_tumu(__VA_ARGS__)

◆ vwaddu_vv_u64m8

#define vwaddu_vv_u64m8 ( ... ) __riscv_vwaddu_vv_u64m8(__VA_ARGS__)

◆ vwaddu_vv_u64m8_m

#define vwaddu_vv_u64m8_m ( ... ) __riscv_vwaddu_vv_u64m8_tumu(__VA_ARGS__)

◆ vwaddu_vx_u16m1

#define vwaddu_vx_u16m1 ( ... ) __riscv_vwaddu_vx_u16m1(__VA_ARGS__)

◆ vwaddu_vx_u16m1_m

#define vwaddu_vx_u16m1_m ( ... ) __riscv_vwaddu_vx_u16m1_tumu(__VA_ARGS__)

◆ vwaddu_vx_u16m2

#define vwaddu_vx_u16m2 ( ... ) __riscv_vwaddu_vx_u16m2(__VA_ARGS__)

◆ vwaddu_vx_u16m2_m

#define vwaddu_vx_u16m2_m ( ... ) __riscv_vwaddu_vx_u16m2_tumu(__VA_ARGS__)

◆ vwaddu_vx_u16m4

#define vwaddu_vx_u16m4 ( ... ) __riscv_vwaddu_vx_u16m4(__VA_ARGS__)

◆ vwaddu_vx_u16m4_m

#define vwaddu_vx_u16m4_m ( ... ) __riscv_vwaddu_vx_u16m4_tumu(__VA_ARGS__)

◆ vwaddu_vx_u16m8

#define vwaddu_vx_u16m8 ( ... ) __riscv_vwaddu_vx_u16m8(__VA_ARGS__)

◆ vwaddu_vx_u16m8_m

#define vwaddu_vx_u16m8_m ( ... ) __riscv_vwaddu_vx_u16m8_tumu(__VA_ARGS__)

◆ vwaddu_vx_u16mf2

#define vwaddu_vx_u16mf2 ( ... ) __riscv_vwaddu_vx_u16mf2(__VA_ARGS__)

◆ vwaddu_vx_u16mf2_m

#define vwaddu_vx_u16mf2_m ( ... ) __riscv_vwaddu_vx_u16mf2_tumu(__VA_ARGS__)

◆ vwaddu_vx_u16mf4

#define vwaddu_vx_u16mf4 ( ... ) __riscv_vwaddu_vx_u16mf4(__VA_ARGS__)

◆ vwaddu_vx_u16mf4_m

#define vwaddu_vx_u16mf4_m ( ... ) __riscv_vwaddu_vx_u16mf4_tumu(__VA_ARGS__)

◆ vwaddu_vx_u32m1

#define vwaddu_vx_u32m1 ( ... ) __riscv_vwaddu_vx_u32m1(__VA_ARGS__)

◆ vwaddu_vx_u32m1_m

#define vwaddu_vx_u32m1_m ( ... ) __riscv_vwaddu_vx_u32m1_tumu(__VA_ARGS__)

◆ vwaddu_vx_u32m2

#define vwaddu_vx_u32m2 ( ... ) __riscv_vwaddu_vx_u32m2(__VA_ARGS__)

◆ vwaddu_vx_u32m2_m

#define vwaddu_vx_u32m2_m ( ... ) __riscv_vwaddu_vx_u32m2_tumu(__VA_ARGS__)

◆ vwaddu_vx_u32m4

#define vwaddu_vx_u32m4 ( ... ) __riscv_vwaddu_vx_u32m4(__VA_ARGS__)

◆ vwaddu_vx_u32m4_m

#define vwaddu_vx_u32m4_m ( ... ) __riscv_vwaddu_vx_u32m4_tumu(__VA_ARGS__)

◆ vwaddu_vx_u32m8

#define vwaddu_vx_u32m8 ( ... ) __riscv_vwaddu_vx_u32m8(__VA_ARGS__)

◆ vwaddu_vx_u32m8_m

#define vwaddu_vx_u32m8_m ( ... ) __riscv_vwaddu_vx_u32m8_tumu(__VA_ARGS__)

◆ vwaddu_vx_u32mf2

#define vwaddu_vx_u32mf2 ( ... ) __riscv_vwaddu_vx_u32mf2(__VA_ARGS__)

◆ vwaddu_vx_u32mf2_m

#define vwaddu_vx_u32mf2_m ( ... ) __riscv_vwaddu_vx_u32mf2_tumu(__VA_ARGS__)

◆ vwaddu_vx_u64m1

#define vwaddu_vx_u64m1 ( ... ) __riscv_vwaddu_vx_u64m1(__VA_ARGS__)

◆ vwaddu_vx_u64m1_m

#define vwaddu_vx_u64m1_m ( ... ) __riscv_vwaddu_vx_u64m1_tumu(__VA_ARGS__)

◆ vwaddu_vx_u64m2

#define vwaddu_vx_u64m2 ( ... ) __riscv_vwaddu_vx_u64m2(__VA_ARGS__)

◆ vwaddu_vx_u64m2_m

#define vwaddu_vx_u64m2_m ( ... ) __riscv_vwaddu_vx_u64m2_tumu(__VA_ARGS__)

◆ vwaddu_vx_u64m4

#define vwaddu_vx_u64m4 ( ... ) __riscv_vwaddu_vx_u64m4(__VA_ARGS__)

◆ vwaddu_vx_u64m4_m

#define vwaddu_vx_u64m4_m ( ... ) __riscv_vwaddu_vx_u64m4_tumu(__VA_ARGS__)

◆ vwaddu_vx_u64m8

#define vwaddu_vx_u64m8 ( ... ) __riscv_vwaddu_vx_u64m8(__VA_ARGS__)

◆ vwaddu_vx_u64m8_m

#define vwaddu_vx_u64m8_m ( ... ) __riscv_vwaddu_vx_u64m8_tumu(__VA_ARGS__)

◆ vwaddu_wv_u16m1

#define vwaddu_wv_u16m1 ( ... ) __riscv_vwaddu_wv_u16m1(__VA_ARGS__)

◆ vwaddu_wv_u16m1_m

#define vwaddu_wv_u16m1_m ( ... ) __riscv_vwaddu_wv_u16m1_tumu(__VA_ARGS__)

◆ vwaddu_wv_u16m2

#define vwaddu_wv_u16m2 ( ... ) __riscv_vwaddu_wv_u16m2(__VA_ARGS__)

◆ vwaddu_wv_u16m2_m

#define vwaddu_wv_u16m2_m ( ... ) __riscv_vwaddu_wv_u16m2_tumu(__VA_ARGS__)

◆ vwaddu_wv_u16m4

#define vwaddu_wv_u16m4 ( ... ) __riscv_vwaddu_wv_u16m4(__VA_ARGS__)

◆ vwaddu_wv_u16m4_m

#define vwaddu_wv_u16m4_m ( ... ) __riscv_vwaddu_wv_u16m4_tumu(__VA_ARGS__)

◆ vwaddu_wv_u16m8

#define vwaddu_wv_u16m8 ( ... ) __riscv_vwaddu_wv_u16m8(__VA_ARGS__)

◆ vwaddu_wv_u16m8_m

#define vwaddu_wv_u16m8_m ( ... ) __riscv_vwaddu_wv_u16m8_tumu(__VA_ARGS__)

◆ vwaddu_wv_u16mf2

#define vwaddu_wv_u16mf2 ( ... ) __riscv_vwaddu_wv_u16mf2(__VA_ARGS__)

◆ vwaddu_wv_u16mf2_m

#define vwaddu_wv_u16mf2_m ( ... ) __riscv_vwaddu_wv_u16mf2_tumu(__VA_ARGS__)

◆ vwaddu_wv_u16mf4

#define vwaddu_wv_u16mf4 ( ... ) __riscv_vwaddu_wv_u16mf4(__VA_ARGS__)

◆ vwaddu_wv_u16mf4_m

#define vwaddu_wv_u16mf4_m ( ... ) __riscv_vwaddu_wv_u16mf4_tumu(__VA_ARGS__)

◆ vwaddu_wv_u32m1

#define vwaddu_wv_u32m1 ( ... ) __riscv_vwaddu_wv_u32m1(__VA_ARGS__)

◆ vwaddu_wv_u32m1_m

#define vwaddu_wv_u32m1_m ( ... ) __riscv_vwaddu_wv_u32m1_tumu(__VA_ARGS__)

◆ vwaddu_wv_u32m2

#define vwaddu_wv_u32m2 ( ... ) __riscv_vwaddu_wv_u32m2(__VA_ARGS__)

◆ vwaddu_wv_u32m2_m

#define vwaddu_wv_u32m2_m ( ... ) __riscv_vwaddu_wv_u32m2_tumu(__VA_ARGS__)

◆ vwaddu_wv_u32m4

#define vwaddu_wv_u32m4 ( ... ) __riscv_vwaddu_wv_u32m4(__VA_ARGS__)

◆ vwaddu_wv_u32m4_m

#define vwaddu_wv_u32m4_m ( ... ) __riscv_vwaddu_wv_u32m4_tumu(__VA_ARGS__)

◆ vwaddu_wv_u32m8

#define vwaddu_wv_u32m8 ( ... ) __riscv_vwaddu_wv_u32m8(__VA_ARGS__)

◆ vwaddu_wv_u32m8_m

#define vwaddu_wv_u32m8_m ( ... ) __riscv_vwaddu_wv_u32m8_tumu(__VA_ARGS__)

◆ vwaddu_wv_u32mf2

#define vwaddu_wv_u32mf2 ( ... ) __riscv_vwaddu_wv_u32mf2(__VA_ARGS__)

◆ vwaddu_wv_u32mf2_m

#define vwaddu_wv_u32mf2_m ( ... ) __riscv_vwaddu_wv_u32mf2_tumu(__VA_ARGS__)

◆ vwaddu_wv_u64m1

#define vwaddu_wv_u64m1 ( ... ) __riscv_vwaddu_wv_u64m1(__VA_ARGS__)

◆ vwaddu_wv_u64m1_m

#define vwaddu_wv_u64m1_m ( ... ) __riscv_vwaddu_wv_u64m1_tumu(__VA_ARGS__)

◆ vwaddu_wv_u64m2

#define vwaddu_wv_u64m2 ( ... ) __riscv_vwaddu_wv_u64m2(__VA_ARGS__)

◆ vwaddu_wv_u64m2_m

#define vwaddu_wv_u64m2_m ( ... ) __riscv_vwaddu_wv_u64m2_tumu(__VA_ARGS__)

◆ vwaddu_wv_u64m4

#define vwaddu_wv_u64m4 ( ... ) __riscv_vwaddu_wv_u64m4(__VA_ARGS__)

◆ vwaddu_wv_u64m4_m

#define vwaddu_wv_u64m4_m ( ... ) __riscv_vwaddu_wv_u64m4_tumu(__VA_ARGS__)

◆ vwaddu_wv_u64m8

#define vwaddu_wv_u64m8 ( ... ) __riscv_vwaddu_wv_u64m8(__VA_ARGS__)

◆ vwaddu_wv_u64m8_m

#define vwaddu_wv_u64m8_m ( ... ) __riscv_vwaddu_wv_u64m8_tumu(__VA_ARGS__)

◆ vwaddu_wx_u16m1

#define vwaddu_wx_u16m1 ( ... ) __riscv_vwaddu_wx_u16m1(__VA_ARGS__)

◆ vwaddu_wx_u16m1_m

#define vwaddu_wx_u16m1_m ( ... ) __riscv_vwaddu_wx_u16m1_tumu(__VA_ARGS__)

◆ vwaddu_wx_u16m2

#define vwaddu_wx_u16m2 ( ... ) __riscv_vwaddu_wx_u16m2(__VA_ARGS__)

◆ vwaddu_wx_u16m2_m

#define vwaddu_wx_u16m2_m ( ... ) __riscv_vwaddu_wx_u16m2_tumu(__VA_ARGS__)

◆ vwaddu_wx_u16m4

#define vwaddu_wx_u16m4 ( ... ) __riscv_vwaddu_wx_u16m4(__VA_ARGS__)

◆ vwaddu_wx_u16m4_m

#define vwaddu_wx_u16m4_m ( ... ) __riscv_vwaddu_wx_u16m4_tumu(__VA_ARGS__)

◆ vwaddu_wx_u16m8

#define vwaddu_wx_u16m8 ( ... ) __riscv_vwaddu_wx_u16m8(__VA_ARGS__)

◆ vwaddu_wx_u16m8_m

#define vwaddu_wx_u16m8_m ( ... ) __riscv_vwaddu_wx_u16m8_tumu(__VA_ARGS__)

◆ vwaddu_wx_u16mf2

#define vwaddu_wx_u16mf2 ( ... ) __riscv_vwaddu_wx_u16mf2(__VA_ARGS__)

◆ vwaddu_wx_u16mf2_m

#define vwaddu_wx_u16mf2_m ( ... ) __riscv_vwaddu_wx_u16mf2_tumu(__VA_ARGS__)

◆ vwaddu_wx_u16mf4

#define vwaddu_wx_u16mf4 ( ... ) __riscv_vwaddu_wx_u16mf4(__VA_ARGS__)

◆ vwaddu_wx_u16mf4_m

#define vwaddu_wx_u16mf4_m ( ... ) __riscv_vwaddu_wx_u16mf4_tumu(__VA_ARGS__)

◆ vwaddu_wx_u32m1

#define vwaddu_wx_u32m1 ( ... ) __riscv_vwaddu_wx_u32m1(__VA_ARGS__)

◆ vwaddu_wx_u32m1_m

#define vwaddu_wx_u32m1_m ( ... ) __riscv_vwaddu_wx_u32m1_tumu(__VA_ARGS__)

◆ vwaddu_wx_u32m2

#define vwaddu_wx_u32m2 ( ... ) __riscv_vwaddu_wx_u32m2(__VA_ARGS__)

◆ vwaddu_wx_u32m2_m

#define vwaddu_wx_u32m2_m ( ... ) __riscv_vwaddu_wx_u32m2_tumu(__VA_ARGS__)

◆ vwaddu_wx_u32m4

#define vwaddu_wx_u32m4 ( ... ) __riscv_vwaddu_wx_u32m4(__VA_ARGS__)

◆ vwaddu_wx_u32m4_m

#define vwaddu_wx_u32m4_m ( ... ) __riscv_vwaddu_wx_u32m4_tumu(__VA_ARGS__)

◆ vwaddu_wx_u32m8

#define vwaddu_wx_u32m8 ( ... ) __riscv_vwaddu_wx_u32m8(__VA_ARGS__)

◆ vwaddu_wx_u32m8_m

#define vwaddu_wx_u32m8_m ( ... ) __riscv_vwaddu_wx_u32m8_tumu(__VA_ARGS__)

◆ vwaddu_wx_u32mf2

#define vwaddu_wx_u32mf2 ( ... ) __riscv_vwaddu_wx_u32mf2(__VA_ARGS__)

◆ vwaddu_wx_u32mf2_m

#define vwaddu_wx_u32mf2_m ( ... ) __riscv_vwaddu_wx_u32mf2_tumu(__VA_ARGS__)

◆ vwaddu_wx_u64m1

#define vwaddu_wx_u64m1 ( ... ) __riscv_vwaddu_wx_u64m1(__VA_ARGS__)

◆ vwaddu_wx_u64m1_m

#define vwaddu_wx_u64m1_m ( ... ) __riscv_vwaddu_wx_u64m1_tumu(__VA_ARGS__)

◆ vwaddu_wx_u64m2

#define vwaddu_wx_u64m2 ( ... ) __riscv_vwaddu_wx_u64m2(__VA_ARGS__)

◆ vwaddu_wx_u64m2_m

#define vwaddu_wx_u64m2_m ( ... ) __riscv_vwaddu_wx_u64m2_tumu(__VA_ARGS__)

◆ vwaddu_wx_u64m4

#define vwaddu_wx_u64m4 ( ... ) __riscv_vwaddu_wx_u64m4(__VA_ARGS__)

◆ vwaddu_wx_u64m4_m

#define vwaddu_wx_u64m4_m ( ... ) __riscv_vwaddu_wx_u64m4_tumu(__VA_ARGS__)

◆ vwaddu_wx_u64m8

#define vwaddu_wx_u64m8 ( ... ) __riscv_vwaddu_wx_u64m8(__VA_ARGS__)

◆ vwaddu_wx_u64m8_m

#define vwaddu_wx_u64m8_m ( ... ) __riscv_vwaddu_wx_u64m8_tumu(__VA_ARGS__)

◆ vwcvt_x_x_v_i16m1

#define vwcvt_x_x_v_i16m1 ( ... ) __riscv_vwcvt_x_x_v_i16m1(__VA_ARGS__)

◆ vwcvt_x_x_v_i16m1_m

#define vwcvt_x_x_v_i16m1_m ( ... ) __riscv_vwcvt_x_x_v_i16m1_tumu(__VA_ARGS__)

◆ vwcvt_x_x_v_i16m2

#define vwcvt_x_x_v_i16m2 ( ... ) __riscv_vwcvt_x_x_v_i16m2(__VA_ARGS__)

◆ vwcvt_x_x_v_i16m2_m

#define vwcvt_x_x_v_i16m2_m ( ... ) __riscv_vwcvt_x_x_v_i16m2_tumu(__VA_ARGS__)

◆ vwcvt_x_x_v_i16m4

#define vwcvt_x_x_v_i16m4 ( ... ) __riscv_vwcvt_x_x_v_i16m4(__VA_ARGS__)

◆ vwcvt_x_x_v_i16m4_m

#define vwcvt_x_x_v_i16m4_m ( ... ) __riscv_vwcvt_x_x_v_i16m4_tumu(__VA_ARGS__)

◆ vwcvt_x_x_v_i16m8

#define vwcvt_x_x_v_i16m8 ( ... ) __riscv_vwcvt_x_x_v_i16m8(__VA_ARGS__)

◆ vwcvt_x_x_v_i16m8_m

#define vwcvt_x_x_v_i16m8_m ( ... ) __riscv_vwcvt_x_x_v_i16m8_tumu(__VA_ARGS__)

◆ vwcvt_x_x_v_i16mf2

#define vwcvt_x_x_v_i16mf2 ( ... ) __riscv_vwcvt_x_x_v_i16mf2(__VA_ARGS__)

◆ vwcvt_x_x_v_i16mf2_m

#define vwcvt_x_x_v_i16mf2_m ( ... ) __riscv_vwcvt_x_x_v_i16mf2_tumu(__VA_ARGS__)

◆ vwcvt_x_x_v_i16mf4

#define vwcvt_x_x_v_i16mf4 ( ... ) __riscv_vwcvt_x_x_v_i16mf4(__VA_ARGS__)

◆ vwcvt_x_x_v_i16mf4_m

#define vwcvt_x_x_v_i16mf4_m ( ... ) __riscv_vwcvt_x_x_v_i16mf4_tumu(__VA_ARGS__)

◆ vwcvt_x_x_v_i32m1

#define vwcvt_x_x_v_i32m1 ( ... ) __riscv_vwcvt_x_x_v_i32m1(__VA_ARGS__)

◆ vwcvt_x_x_v_i32m1_m

#define vwcvt_x_x_v_i32m1_m ( ... ) __riscv_vwcvt_x_x_v_i32m1_tumu(__VA_ARGS__)

◆ vwcvt_x_x_v_i32m2

#define vwcvt_x_x_v_i32m2 ( ... ) __riscv_vwcvt_x_x_v_i32m2(__VA_ARGS__)

◆ vwcvt_x_x_v_i32m2_m

#define vwcvt_x_x_v_i32m2_m ( ... ) __riscv_vwcvt_x_x_v_i32m2_tumu(__VA_ARGS__)

◆ vwcvt_x_x_v_i32m4

#define vwcvt_x_x_v_i32m4 ( ... ) __riscv_vwcvt_x_x_v_i32m4(__VA_ARGS__)

◆ vwcvt_x_x_v_i32m4_m

#define vwcvt_x_x_v_i32m4_m ( ... ) __riscv_vwcvt_x_x_v_i32m4_tumu(__VA_ARGS__)

◆ vwcvt_x_x_v_i32m8

#define vwcvt_x_x_v_i32m8 ( ... ) __riscv_vwcvt_x_x_v_i32m8(__VA_ARGS__)

◆ vwcvt_x_x_v_i32m8_m

#define vwcvt_x_x_v_i32m8_m ( ... ) __riscv_vwcvt_x_x_v_i32m8_tumu(__VA_ARGS__)

◆ vwcvt_x_x_v_i32mf2

#define vwcvt_x_x_v_i32mf2 ( ... ) __riscv_vwcvt_x_x_v_i32mf2(__VA_ARGS__)

◆ vwcvt_x_x_v_i32mf2_m

#define vwcvt_x_x_v_i32mf2_m ( ... ) __riscv_vwcvt_x_x_v_i32mf2_tumu(__VA_ARGS__)

◆ vwcvt_x_x_v_i64m1

#define vwcvt_x_x_v_i64m1 ( ... ) __riscv_vwcvt_x_x_v_i64m1(__VA_ARGS__)

◆ vwcvt_x_x_v_i64m1_m

#define vwcvt_x_x_v_i64m1_m ( ... ) __riscv_vwcvt_x_x_v_i64m1_tumu(__VA_ARGS__)

◆ vwcvt_x_x_v_i64m2

#define vwcvt_x_x_v_i64m2 ( ... ) __riscv_vwcvt_x_x_v_i64m2(__VA_ARGS__)

◆ vwcvt_x_x_v_i64m2_m

#define vwcvt_x_x_v_i64m2_m ( ... ) __riscv_vwcvt_x_x_v_i64m2_tumu(__VA_ARGS__)

◆ vwcvt_x_x_v_i64m4

#define vwcvt_x_x_v_i64m4 ( ... ) __riscv_vwcvt_x_x_v_i64m4(__VA_ARGS__)

◆ vwcvt_x_x_v_i64m4_m

#define vwcvt_x_x_v_i64m4_m ( ... ) __riscv_vwcvt_x_x_v_i64m4_tumu(__VA_ARGS__)

◆ vwcvt_x_x_v_i64m8

#define vwcvt_x_x_v_i64m8 ( ... ) __riscv_vwcvt_x_x_v_i64m8(__VA_ARGS__)

◆ vwcvt_x_x_v_i64m8_m

#define vwcvt_x_x_v_i64m8_m ( ... ) __riscv_vwcvt_x_x_v_i64m8_tumu(__VA_ARGS__)

◆ vwcvtu_x_x_v_u16m1

#define vwcvtu_x_x_v_u16m1 ( ... ) __riscv_vwcvtu_x_x_v_u16m1(__VA_ARGS__)

◆ vwcvtu_x_x_v_u16m1_m

#define vwcvtu_x_x_v_u16m1_m ( ... ) __riscv_vwcvtu_x_x_v_u16m1_tumu(__VA_ARGS__)

◆ vwcvtu_x_x_v_u16m2

#define vwcvtu_x_x_v_u16m2 ( ... ) __riscv_vwcvtu_x_x_v_u16m2(__VA_ARGS__)

◆ vwcvtu_x_x_v_u16m2_m

#define vwcvtu_x_x_v_u16m2_m ( ... ) __riscv_vwcvtu_x_x_v_u16m2_tumu(__VA_ARGS__)

◆ vwcvtu_x_x_v_u16m4

#define vwcvtu_x_x_v_u16m4 ( ... ) __riscv_vwcvtu_x_x_v_u16m4(__VA_ARGS__)

◆ vwcvtu_x_x_v_u16m4_m

#define vwcvtu_x_x_v_u16m4_m ( ... ) __riscv_vwcvtu_x_x_v_u16m4_tumu(__VA_ARGS__)

◆ vwcvtu_x_x_v_u16m8

#define vwcvtu_x_x_v_u16m8 ( ... ) __riscv_vwcvtu_x_x_v_u16m8(__VA_ARGS__)

◆ vwcvtu_x_x_v_u16m8_m

#define vwcvtu_x_x_v_u16m8_m ( ... ) __riscv_vwcvtu_x_x_v_u16m8_tumu(__VA_ARGS__)

◆ vwcvtu_x_x_v_u16mf2

#define vwcvtu_x_x_v_u16mf2 ( ... ) __riscv_vwcvtu_x_x_v_u16mf2(__VA_ARGS__)

◆ vwcvtu_x_x_v_u16mf2_m

#define vwcvtu_x_x_v_u16mf2_m ( ... ) __riscv_vwcvtu_x_x_v_u16mf2_tumu(__VA_ARGS__)

◆ vwcvtu_x_x_v_u16mf4

#define vwcvtu_x_x_v_u16mf4 ( ... ) __riscv_vwcvtu_x_x_v_u16mf4(__VA_ARGS__)

◆ vwcvtu_x_x_v_u16mf4_m

#define vwcvtu_x_x_v_u16mf4_m ( ... ) __riscv_vwcvtu_x_x_v_u16mf4_tumu(__VA_ARGS__)

◆ vwcvtu_x_x_v_u32m1

#define vwcvtu_x_x_v_u32m1 ( ... ) __riscv_vwcvtu_x_x_v_u32m1(__VA_ARGS__)

◆ vwcvtu_x_x_v_u32m1_m

#define vwcvtu_x_x_v_u32m1_m ( ... ) __riscv_vwcvtu_x_x_v_u32m1_tumu(__VA_ARGS__)

◆ vwcvtu_x_x_v_u32m2

#define vwcvtu_x_x_v_u32m2 ( ... ) __riscv_vwcvtu_x_x_v_u32m2(__VA_ARGS__)

◆ vwcvtu_x_x_v_u32m2_m

#define vwcvtu_x_x_v_u32m2_m ( ... ) __riscv_vwcvtu_x_x_v_u32m2_tumu(__VA_ARGS__)

◆ vwcvtu_x_x_v_u32m4

#define vwcvtu_x_x_v_u32m4 ( ... ) __riscv_vwcvtu_x_x_v_u32m4(__VA_ARGS__)

◆ vwcvtu_x_x_v_u32m4_m

#define vwcvtu_x_x_v_u32m4_m ( ... ) __riscv_vwcvtu_x_x_v_u32m4_tumu(__VA_ARGS__)

◆ vwcvtu_x_x_v_u32m8

#define vwcvtu_x_x_v_u32m8 ( ... ) __riscv_vwcvtu_x_x_v_u32m8(__VA_ARGS__)

◆ vwcvtu_x_x_v_u32m8_m

#define vwcvtu_x_x_v_u32m8_m ( ... ) __riscv_vwcvtu_x_x_v_u32m8_tumu(__VA_ARGS__)

◆ vwcvtu_x_x_v_u32mf2

#define vwcvtu_x_x_v_u32mf2 ( ... ) __riscv_vwcvtu_x_x_v_u32mf2(__VA_ARGS__)

◆ vwcvtu_x_x_v_u32mf2_m

#define vwcvtu_x_x_v_u32mf2_m ( ... ) __riscv_vwcvtu_x_x_v_u32mf2_tumu(__VA_ARGS__)

◆ vwcvtu_x_x_v_u64m1

#define vwcvtu_x_x_v_u64m1 ( ... ) __riscv_vwcvtu_x_x_v_u64m1(__VA_ARGS__)

◆ vwcvtu_x_x_v_u64m1_m

#define vwcvtu_x_x_v_u64m1_m ( ... ) __riscv_vwcvtu_x_x_v_u64m1_tumu(__VA_ARGS__)

◆ vwcvtu_x_x_v_u64m2

#define vwcvtu_x_x_v_u64m2 ( ... ) __riscv_vwcvtu_x_x_v_u64m2(__VA_ARGS__)

◆ vwcvtu_x_x_v_u64m2_m

#define vwcvtu_x_x_v_u64m2_m ( ... ) __riscv_vwcvtu_x_x_v_u64m2_tumu(__VA_ARGS__)

◆ vwcvtu_x_x_v_u64m4

#define vwcvtu_x_x_v_u64m4 ( ... ) __riscv_vwcvtu_x_x_v_u64m4(__VA_ARGS__)

◆ vwcvtu_x_x_v_u64m4_m

#define vwcvtu_x_x_v_u64m4_m ( ... ) __riscv_vwcvtu_x_x_v_u64m4_tumu(__VA_ARGS__)

◆ vwcvtu_x_x_v_u64m8

#define vwcvtu_x_x_v_u64m8 ( ... ) __riscv_vwcvtu_x_x_v_u64m8(__VA_ARGS__)

◆ vwcvtu_x_x_v_u64m8_m

#define vwcvtu_x_x_v_u64m8_m ( ... ) __riscv_vwcvtu_x_x_v_u64m8_tumu(__VA_ARGS__)

◆ vwmacc_vv_i16m1

#define vwmacc_vv_i16m1 ( ... ) __riscv_vwmacc_vv_i16m1_tu(__VA_ARGS__)

◆ vwmacc_vv_i16m1_m

#define vwmacc_vv_i16m1_m ( ... ) __riscv_vwmacc_vv_i16m1_tumu(__VA_ARGS__)

◆ vwmacc_vv_i16m2

#define vwmacc_vv_i16m2 ( ... ) __riscv_vwmacc_vv_i16m2_tu(__VA_ARGS__)

◆ vwmacc_vv_i16m2_m

#define vwmacc_vv_i16m2_m ( ... ) __riscv_vwmacc_vv_i16m2_tumu(__VA_ARGS__)

◆ vwmacc_vv_i16m4

#define vwmacc_vv_i16m4 ( ... ) __riscv_vwmacc_vv_i16m4_tu(__VA_ARGS__)

◆ vwmacc_vv_i16m4_m

#define vwmacc_vv_i16m4_m ( ... ) __riscv_vwmacc_vv_i16m4_tumu(__VA_ARGS__)

◆ vwmacc_vv_i16m8

#define vwmacc_vv_i16m8 ( ... ) __riscv_vwmacc_vv_i16m8_tu(__VA_ARGS__)

◆ vwmacc_vv_i16m8_m

#define vwmacc_vv_i16m8_m ( ... ) __riscv_vwmacc_vv_i16m8_tumu(__VA_ARGS__)

◆ vwmacc_vv_i16mf2

#define vwmacc_vv_i16mf2 ( ... ) __riscv_vwmacc_vv_i16mf2_tu(__VA_ARGS__)

◆ vwmacc_vv_i16mf2_m

#define vwmacc_vv_i16mf2_m ( ... ) __riscv_vwmacc_vv_i16mf2_tumu(__VA_ARGS__)

◆ vwmacc_vv_i16mf4

#define vwmacc_vv_i16mf4 ( ... ) __riscv_vwmacc_vv_i16mf4_tu(__VA_ARGS__)

◆ vwmacc_vv_i16mf4_m

#define vwmacc_vv_i16mf4_m ( ... ) __riscv_vwmacc_vv_i16mf4_tumu(__VA_ARGS__)

◆ vwmacc_vv_i32m1

#define vwmacc_vv_i32m1 ( ... ) __riscv_vwmacc_vv_i32m1_tu(__VA_ARGS__)

◆ vwmacc_vv_i32m1_m

#define vwmacc_vv_i32m1_m ( ... ) __riscv_vwmacc_vv_i32m1_tumu(__VA_ARGS__)

◆ vwmacc_vv_i32m2

#define vwmacc_vv_i32m2 ( ... ) __riscv_vwmacc_vv_i32m2_tu(__VA_ARGS__)

◆ vwmacc_vv_i32m2_m

#define vwmacc_vv_i32m2_m ( ... ) __riscv_vwmacc_vv_i32m2_tumu(__VA_ARGS__)

◆ vwmacc_vv_i32m4

#define vwmacc_vv_i32m4 ( ... ) __riscv_vwmacc_vv_i32m4_tu(__VA_ARGS__)

◆ vwmacc_vv_i32m4_m

#define vwmacc_vv_i32m4_m ( ... ) __riscv_vwmacc_vv_i32m4_tumu(__VA_ARGS__)

◆ vwmacc_vv_i32m8

#define vwmacc_vv_i32m8 ( ... ) __riscv_vwmacc_vv_i32m8_tu(__VA_ARGS__)

◆ vwmacc_vv_i32m8_m

#define vwmacc_vv_i32m8_m ( ... ) __riscv_vwmacc_vv_i32m8_tumu(__VA_ARGS__)

◆ vwmacc_vv_i32mf2

#define vwmacc_vv_i32mf2 ( ... ) __riscv_vwmacc_vv_i32mf2_tu(__VA_ARGS__)

◆ vwmacc_vv_i32mf2_m

#define vwmacc_vv_i32mf2_m ( ... ) __riscv_vwmacc_vv_i32mf2_tumu(__VA_ARGS__)

◆ vwmacc_vv_i64m1

#define vwmacc_vv_i64m1 ( ... ) __riscv_vwmacc_vv_i64m1_tu(__VA_ARGS__)

◆ vwmacc_vv_i64m1_m

#define vwmacc_vv_i64m1_m ( ... ) __riscv_vwmacc_vv_i64m1_tumu(__VA_ARGS__)

◆ vwmacc_vv_i64m2

#define vwmacc_vv_i64m2 ( ... ) __riscv_vwmacc_vv_i64m2_tu(__VA_ARGS__)

◆ vwmacc_vv_i64m2_m

#define vwmacc_vv_i64m2_m ( ... ) __riscv_vwmacc_vv_i64m2_tumu(__VA_ARGS__)

◆ vwmacc_vv_i64m4

#define vwmacc_vv_i64m4 ( ... ) __riscv_vwmacc_vv_i64m4_tu(__VA_ARGS__)

◆ vwmacc_vv_i64m4_m

#define vwmacc_vv_i64m4_m ( ... ) __riscv_vwmacc_vv_i64m4_tumu(__VA_ARGS__)

◆ vwmacc_vv_i64m8

#define vwmacc_vv_i64m8 ( ... ) __riscv_vwmacc_vv_i64m8_tu(__VA_ARGS__)

◆ vwmacc_vv_i64m8_m

#define vwmacc_vv_i64m8_m ( ... ) __riscv_vwmacc_vv_i64m8_tumu(__VA_ARGS__)

◆ vwmacc_vx_i16m1

#define vwmacc_vx_i16m1 ( ... ) __riscv_vwmacc_vx_i16m1_tu(__VA_ARGS__)

◆ vwmacc_vx_i16m1_m

#define vwmacc_vx_i16m1_m ( ... ) __riscv_vwmacc_vx_i16m1_tumu(__VA_ARGS__)

◆ vwmacc_vx_i16m2

#define vwmacc_vx_i16m2 ( ... ) __riscv_vwmacc_vx_i16m2_tu(__VA_ARGS__)

◆ vwmacc_vx_i16m2_m

#define vwmacc_vx_i16m2_m ( ... ) __riscv_vwmacc_vx_i16m2_tumu(__VA_ARGS__)

◆ vwmacc_vx_i16m4

#define vwmacc_vx_i16m4 ( ... ) __riscv_vwmacc_vx_i16m4_tu(__VA_ARGS__)

◆ vwmacc_vx_i16m4_m

#define vwmacc_vx_i16m4_m ( ... ) __riscv_vwmacc_vx_i16m4_tumu(__VA_ARGS__)

◆ vwmacc_vx_i16m8

#define vwmacc_vx_i16m8 ( ... ) __riscv_vwmacc_vx_i16m8_tu(__VA_ARGS__)

◆ vwmacc_vx_i16m8_m

#define vwmacc_vx_i16m8_m ( ... ) __riscv_vwmacc_vx_i16m8_tumu(__VA_ARGS__)

◆ vwmacc_vx_i16mf2

#define vwmacc_vx_i16mf2 ( ... ) __riscv_vwmacc_vx_i16mf2_tu(__VA_ARGS__)

◆ vwmacc_vx_i16mf2_m

#define vwmacc_vx_i16mf2_m ( ... ) __riscv_vwmacc_vx_i16mf2_tumu(__VA_ARGS__)

◆ vwmacc_vx_i16mf4

#define vwmacc_vx_i16mf4 ( ... ) __riscv_vwmacc_vx_i16mf4_tu(__VA_ARGS__)

◆ vwmacc_vx_i16mf4_m

#define vwmacc_vx_i16mf4_m ( ... ) __riscv_vwmacc_vx_i16mf4_tumu(__VA_ARGS__)

◆ vwmacc_vx_i32m1

#define vwmacc_vx_i32m1 ( ... ) __riscv_vwmacc_vx_i32m1_tu(__VA_ARGS__)

◆ vwmacc_vx_i32m1_m

#define vwmacc_vx_i32m1_m ( ... ) __riscv_vwmacc_vx_i32m1_tumu(__VA_ARGS__)

◆ vwmacc_vx_i32m2

#define vwmacc_vx_i32m2 ( ... ) __riscv_vwmacc_vx_i32m2_tu(__VA_ARGS__)

◆ vwmacc_vx_i32m2_m

#define vwmacc_vx_i32m2_m ( ... ) __riscv_vwmacc_vx_i32m2_tumu(__VA_ARGS__)

◆ vwmacc_vx_i32m4

#define vwmacc_vx_i32m4 ( ... ) __riscv_vwmacc_vx_i32m4_tu(__VA_ARGS__)

◆ vwmacc_vx_i32m4_m

#define vwmacc_vx_i32m4_m ( ... ) __riscv_vwmacc_vx_i32m4_tumu(__VA_ARGS__)

◆ vwmacc_vx_i32m8

#define vwmacc_vx_i32m8 ( ... ) __riscv_vwmacc_vx_i32m8_tu(__VA_ARGS__)

◆ vwmacc_vx_i32m8_m

#define vwmacc_vx_i32m8_m ( ... ) __riscv_vwmacc_vx_i32m8_tumu(__VA_ARGS__)

◆ vwmacc_vx_i32mf2

#define vwmacc_vx_i32mf2 ( ... ) __riscv_vwmacc_vx_i32mf2_tu(__VA_ARGS__)

◆ vwmacc_vx_i32mf2_m

#define vwmacc_vx_i32mf2_m ( ... ) __riscv_vwmacc_vx_i32mf2_tumu(__VA_ARGS__)

◆ vwmacc_vx_i64m1

#define vwmacc_vx_i64m1 ( ... ) __riscv_vwmacc_vx_i64m1_tu(__VA_ARGS__)

◆ vwmacc_vx_i64m1_m

#define vwmacc_vx_i64m1_m ( ... ) __riscv_vwmacc_vx_i64m1_tumu(__VA_ARGS__)

◆ vwmacc_vx_i64m2

#define vwmacc_vx_i64m2 ( ... ) __riscv_vwmacc_vx_i64m2_tu(__VA_ARGS__)

◆ vwmacc_vx_i64m2_m

#define vwmacc_vx_i64m2_m ( ... ) __riscv_vwmacc_vx_i64m2_tumu(__VA_ARGS__)

◆ vwmacc_vx_i64m4

#define vwmacc_vx_i64m4 ( ... ) __riscv_vwmacc_vx_i64m4_tu(__VA_ARGS__)

◆ vwmacc_vx_i64m4_m

#define vwmacc_vx_i64m4_m ( ... ) __riscv_vwmacc_vx_i64m4_tumu(__VA_ARGS__)

◆ vwmacc_vx_i64m8

#define vwmacc_vx_i64m8 ( ... ) __riscv_vwmacc_vx_i64m8_tu(__VA_ARGS__)

◆ vwmacc_vx_i64m8_m

#define vwmacc_vx_i64m8_m ( ... ) __riscv_vwmacc_vx_i64m8_tumu(__VA_ARGS__)

◆ vwmaccsu_vv_i16m1

#define vwmaccsu_vv_i16m1 ( ... ) __riscv_vwmaccsu_vv_i16m1_tu(__VA_ARGS__)

◆ vwmaccsu_vv_i16m1_m

#define vwmaccsu_vv_i16m1_m ( ... ) __riscv_vwmaccsu_vv_i16m1_tumu(__VA_ARGS__)

◆ vwmaccsu_vv_i16m2

#define vwmaccsu_vv_i16m2 ( ... ) __riscv_vwmaccsu_vv_i16m2_tu(__VA_ARGS__)

◆ vwmaccsu_vv_i16m2_m

#define vwmaccsu_vv_i16m2_m ( ... ) __riscv_vwmaccsu_vv_i16m2_tumu(__VA_ARGS__)

◆ vwmaccsu_vv_i16m4

#define vwmaccsu_vv_i16m4 ( ... ) __riscv_vwmaccsu_vv_i16m4_tu(__VA_ARGS__)

◆ vwmaccsu_vv_i16m4_m

#define vwmaccsu_vv_i16m4_m ( ... ) __riscv_vwmaccsu_vv_i16m4_tumu(__VA_ARGS__)

◆ vwmaccsu_vv_i16m8

#define vwmaccsu_vv_i16m8 ( ... ) __riscv_vwmaccsu_vv_i16m8_tu(__VA_ARGS__)

◆ vwmaccsu_vv_i16m8_m

#define vwmaccsu_vv_i16m8_m ( ... ) __riscv_vwmaccsu_vv_i16m8_tumu(__VA_ARGS__)

◆ vwmaccsu_vv_i16mf2

#define vwmaccsu_vv_i16mf2 ( ... ) __riscv_vwmaccsu_vv_i16mf2_tu(__VA_ARGS__)

◆ vwmaccsu_vv_i16mf2_m

#define vwmaccsu_vv_i16mf2_m ( ... ) __riscv_vwmaccsu_vv_i16mf2_tumu(__VA_ARGS__)

◆ vwmaccsu_vv_i16mf4

#define vwmaccsu_vv_i16mf4 ( ... ) __riscv_vwmaccsu_vv_i16mf4_tu(__VA_ARGS__)

◆ vwmaccsu_vv_i16mf4_m

#define vwmaccsu_vv_i16mf4_m ( ... ) __riscv_vwmaccsu_vv_i16mf4_tumu(__VA_ARGS__)

◆ vwmaccsu_vv_i32m1

#define vwmaccsu_vv_i32m1 ( ... ) __riscv_vwmaccsu_vv_i32m1_tu(__VA_ARGS__)

◆ vwmaccsu_vv_i32m1_m

#define vwmaccsu_vv_i32m1_m ( ... ) __riscv_vwmaccsu_vv_i32m1_tumu(__VA_ARGS__)

◆ vwmaccsu_vv_i32m2

#define vwmaccsu_vv_i32m2 ( ... ) __riscv_vwmaccsu_vv_i32m2_tu(__VA_ARGS__)

◆ vwmaccsu_vv_i32m2_m

#define vwmaccsu_vv_i32m2_m ( ... ) __riscv_vwmaccsu_vv_i32m2_tumu(__VA_ARGS__)

◆ vwmaccsu_vv_i32m4

#define vwmaccsu_vv_i32m4 ( ... ) __riscv_vwmaccsu_vv_i32m4_tu(__VA_ARGS__)

◆ vwmaccsu_vv_i32m4_m

#define vwmaccsu_vv_i32m4_m ( ... ) __riscv_vwmaccsu_vv_i32m4_tumu(__VA_ARGS__)

◆ vwmaccsu_vv_i32m8

#define vwmaccsu_vv_i32m8 ( ... ) __riscv_vwmaccsu_vv_i32m8_tu(__VA_ARGS__)

◆ vwmaccsu_vv_i32m8_m

#define vwmaccsu_vv_i32m8_m ( ... ) __riscv_vwmaccsu_vv_i32m8_tumu(__VA_ARGS__)

◆ vwmaccsu_vv_i32mf2

#define vwmaccsu_vv_i32mf2 ( ... ) __riscv_vwmaccsu_vv_i32mf2_tu(__VA_ARGS__)

◆ vwmaccsu_vv_i32mf2_m

#define vwmaccsu_vv_i32mf2_m ( ... ) __riscv_vwmaccsu_vv_i32mf2_tumu(__VA_ARGS__)

◆ vwmaccsu_vv_i64m1

#define vwmaccsu_vv_i64m1 ( ... ) __riscv_vwmaccsu_vv_i64m1_tu(__VA_ARGS__)

◆ vwmaccsu_vv_i64m1_m

#define vwmaccsu_vv_i64m1_m ( ... ) __riscv_vwmaccsu_vv_i64m1_tumu(__VA_ARGS__)

◆ vwmaccsu_vv_i64m2

#define vwmaccsu_vv_i64m2 ( ... ) __riscv_vwmaccsu_vv_i64m2_tu(__VA_ARGS__)

◆ vwmaccsu_vv_i64m2_m

#define vwmaccsu_vv_i64m2_m ( ... ) __riscv_vwmaccsu_vv_i64m2_tumu(__VA_ARGS__)

◆ vwmaccsu_vv_i64m4

#define vwmaccsu_vv_i64m4 ( ... ) __riscv_vwmaccsu_vv_i64m4_tu(__VA_ARGS__)

◆ vwmaccsu_vv_i64m4_m

#define vwmaccsu_vv_i64m4_m ( ... ) __riscv_vwmaccsu_vv_i64m4_tumu(__VA_ARGS__)

◆ vwmaccsu_vv_i64m8

#define vwmaccsu_vv_i64m8 ( ... ) __riscv_vwmaccsu_vv_i64m8_tu(__VA_ARGS__)

◆ vwmaccsu_vv_i64m8_m

#define vwmaccsu_vv_i64m8_m ( ... ) __riscv_vwmaccsu_vv_i64m8_tumu(__VA_ARGS__)

◆ vwmaccsu_vx_i16m1

#define vwmaccsu_vx_i16m1 ( ... ) __riscv_vwmaccsu_vx_i16m1_tu(__VA_ARGS__)

◆ vwmaccsu_vx_i16m1_m

#define vwmaccsu_vx_i16m1_m ( ... ) __riscv_vwmaccsu_vx_i16m1_tumu(__VA_ARGS__)

◆ vwmaccsu_vx_i16m2

#define vwmaccsu_vx_i16m2 ( ... ) __riscv_vwmaccsu_vx_i16m2_tu(__VA_ARGS__)

◆ vwmaccsu_vx_i16m2_m

#define vwmaccsu_vx_i16m2_m ( ... ) __riscv_vwmaccsu_vx_i16m2_tumu(__VA_ARGS__)

◆ vwmaccsu_vx_i16m4

#define vwmaccsu_vx_i16m4 ( ... ) __riscv_vwmaccsu_vx_i16m4_tu(__VA_ARGS__)

◆ vwmaccsu_vx_i16m4_m

#define vwmaccsu_vx_i16m4_m ( ... ) __riscv_vwmaccsu_vx_i16m4_tumu(__VA_ARGS__)

◆ vwmaccsu_vx_i16m8

#define vwmaccsu_vx_i16m8 ( ... ) __riscv_vwmaccsu_vx_i16m8_tu(__VA_ARGS__)

◆ vwmaccsu_vx_i16m8_m

#define vwmaccsu_vx_i16m8_m ( ... ) __riscv_vwmaccsu_vx_i16m8_tumu(__VA_ARGS__)

◆ vwmaccsu_vx_i16mf2

#define vwmaccsu_vx_i16mf2 ( ... ) __riscv_vwmaccsu_vx_i16mf2_tu(__VA_ARGS__)

◆ vwmaccsu_vx_i16mf2_m

#define vwmaccsu_vx_i16mf2_m ( ... ) __riscv_vwmaccsu_vx_i16mf2_tumu(__VA_ARGS__)

◆ vwmaccsu_vx_i16mf4

#define vwmaccsu_vx_i16mf4 ( ... ) __riscv_vwmaccsu_vx_i16mf4_tu(__VA_ARGS__)

◆ vwmaccsu_vx_i16mf4_m

#define vwmaccsu_vx_i16mf4_m ( ... ) __riscv_vwmaccsu_vx_i16mf4_tumu(__VA_ARGS__)

◆ vwmaccsu_vx_i32m1

#define vwmaccsu_vx_i32m1 ( ... ) __riscv_vwmaccsu_vx_i32m1_tu(__VA_ARGS__)

◆ vwmaccsu_vx_i32m1_m

#define vwmaccsu_vx_i32m1_m ( ... ) __riscv_vwmaccsu_vx_i32m1_tumu(__VA_ARGS__)

◆ vwmaccsu_vx_i32m2

#define vwmaccsu_vx_i32m2 ( ... ) __riscv_vwmaccsu_vx_i32m2_tu(__VA_ARGS__)

◆ vwmaccsu_vx_i32m2_m

#define vwmaccsu_vx_i32m2_m ( ... ) __riscv_vwmaccsu_vx_i32m2_tumu(__VA_ARGS__)

◆ vwmaccsu_vx_i32m4

#define vwmaccsu_vx_i32m4 ( ... ) __riscv_vwmaccsu_vx_i32m4_tu(__VA_ARGS__)

◆ vwmaccsu_vx_i32m4_m

#define vwmaccsu_vx_i32m4_m ( ... ) __riscv_vwmaccsu_vx_i32m4_tumu(__VA_ARGS__)

◆ vwmaccsu_vx_i32m8

#define vwmaccsu_vx_i32m8 ( ... ) __riscv_vwmaccsu_vx_i32m8_tu(__VA_ARGS__)

◆ vwmaccsu_vx_i32m8_m

#define vwmaccsu_vx_i32m8_m ( ... ) __riscv_vwmaccsu_vx_i32m8_tumu(__VA_ARGS__)

◆ vwmaccsu_vx_i32mf2

#define vwmaccsu_vx_i32mf2 ( ... ) __riscv_vwmaccsu_vx_i32mf2_tu(__VA_ARGS__)

◆ vwmaccsu_vx_i32mf2_m

#define vwmaccsu_vx_i32mf2_m ( ... ) __riscv_vwmaccsu_vx_i32mf2_tumu(__VA_ARGS__)

◆ vwmaccsu_vx_i64m1

#define vwmaccsu_vx_i64m1 ( ... ) __riscv_vwmaccsu_vx_i64m1_tu(__VA_ARGS__)

◆ vwmaccsu_vx_i64m1_m

#define vwmaccsu_vx_i64m1_m ( ... ) __riscv_vwmaccsu_vx_i64m1_tumu(__VA_ARGS__)

◆ vwmaccsu_vx_i64m2

#define vwmaccsu_vx_i64m2 ( ... ) __riscv_vwmaccsu_vx_i64m2_tu(__VA_ARGS__)

◆ vwmaccsu_vx_i64m2_m

#define vwmaccsu_vx_i64m2_m ( ... ) __riscv_vwmaccsu_vx_i64m2_tumu(__VA_ARGS__)

◆ vwmaccsu_vx_i64m4

#define vwmaccsu_vx_i64m4 ( ... ) __riscv_vwmaccsu_vx_i64m4_tu(__VA_ARGS__)

◆ vwmaccsu_vx_i64m4_m

#define vwmaccsu_vx_i64m4_m ( ... ) __riscv_vwmaccsu_vx_i64m4_tumu(__VA_ARGS__)

◆ vwmaccsu_vx_i64m8

#define vwmaccsu_vx_i64m8 ( ... ) __riscv_vwmaccsu_vx_i64m8_tu(__VA_ARGS__)

◆ vwmaccsu_vx_i64m8_m

#define vwmaccsu_vx_i64m8_m ( ... ) __riscv_vwmaccsu_vx_i64m8_tumu(__VA_ARGS__)

◆ vwmaccu_vv_u16m1

#define vwmaccu_vv_u16m1 ( ... ) __riscv_vwmaccu_vv_u16m1_tu(__VA_ARGS__)

◆ vwmaccu_vv_u16m1_m

#define vwmaccu_vv_u16m1_m ( ... ) __riscv_vwmaccu_vv_u16m1_tumu(__VA_ARGS__)

◆ vwmaccu_vv_u16m2

#define vwmaccu_vv_u16m2 ( ... ) __riscv_vwmaccu_vv_u16m2_tu(__VA_ARGS__)

◆ vwmaccu_vv_u16m2_m

#define vwmaccu_vv_u16m2_m ( ... ) __riscv_vwmaccu_vv_u16m2_tumu(__VA_ARGS__)

◆ vwmaccu_vv_u16m4

#define vwmaccu_vv_u16m4 ( ... ) __riscv_vwmaccu_vv_u16m4_tu(__VA_ARGS__)

◆ vwmaccu_vv_u16m4_m

#define vwmaccu_vv_u16m4_m ( ... ) __riscv_vwmaccu_vv_u16m4_tumu(__VA_ARGS__)

◆ vwmaccu_vv_u16m8

#define vwmaccu_vv_u16m8 ( ... ) __riscv_vwmaccu_vv_u16m8_tu(__VA_ARGS__)

◆ vwmaccu_vv_u16m8_m

#define vwmaccu_vv_u16m8_m ( ... ) __riscv_vwmaccu_vv_u16m8_tumu(__VA_ARGS__)

◆ vwmaccu_vv_u16mf2

#define vwmaccu_vv_u16mf2 ( ... ) __riscv_vwmaccu_vv_u16mf2_tu(__VA_ARGS__)

◆ vwmaccu_vv_u16mf2_m

#define vwmaccu_vv_u16mf2_m ( ... ) __riscv_vwmaccu_vv_u16mf2_tumu(__VA_ARGS__)

◆ vwmaccu_vv_u16mf4

#define vwmaccu_vv_u16mf4 ( ... ) __riscv_vwmaccu_vv_u16mf4_tu(__VA_ARGS__)

◆ vwmaccu_vv_u16mf4_m

#define vwmaccu_vv_u16mf4_m ( ... ) __riscv_vwmaccu_vv_u16mf4_tumu(__VA_ARGS__)

◆ vwmaccu_vv_u32m1

#define vwmaccu_vv_u32m1 ( ... ) __riscv_vwmaccu_vv_u32m1_tu(__VA_ARGS__)

◆ vwmaccu_vv_u32m1_m

#define vwmaccu_vv_u32m1_m ( ... ) __riscv_vwmaccu_vv_u32m1_tumu(__VA_ARGS__)

◆ vwmaccu_vv_u32m2

#define vwmaccu_vv_u32m2 ( ... ) __riscv_vwmaccu_vv_u32m2_tu(__VA_ARGS__)

◆ vwmaccu_vv_u32m2_m

#define vwmaccu_vv_u32m2_m ( ... ) __riscv_vwmaccu_vv_u32m2_tumu(__VA_ARGS__)

◆ vwmaccu_vv_u32m4

#define vwmaccu_vv_u32m4 ( ... ) __riscv_vwmaccu_vv_u32m4_tu(__VA_ARGS__)

◆ vwmaccu_vv_u32m4_m

#define vwmaccu_vv_u32m4_m ( ... ) __riscv_vwmaccu_vv_u32m4_tumu(__VA_ARGS__)

◆ vwmaccu_vv_u32m8

#define vwmaccu_vv_u32m8 ( ... ) __riscv_vwmaccu_vv_u32m8_tu(__VA_ARGS__)

◆ vwmaccu_vv_u32m8_m

#define vwmaccu_vv_u32m8_m ( ... ) __riscv_vwmaccu_vv_u32m8_tumu(__VA_ARGS__)

◆ vwmaccu_vv_u32mf2

#define vwmaccu_vv_u32mf2 ( ... ) __riscv_vwmaccu_vv_u32mf2_tu(__VA_ARGS__)

◆ vwmaccu_vv_u32mf2_m

#define vwmaccu_vv_u32mf2_m ( ... ) __riscv_vwmaccu_vv_u32mf2_tumu(__VA_ARGS__)

◆ vwmaccu_vv_u64m1

#define vwmaccu_vv_u64m1 ( ... ) __riscv_vwmaccu_vv_u64m1_tu(__VA_ARGS__)

◆ vwmaccu_vv_u64m1_m

#define vwmaccu_vv_u64m1_m ( ... ) __riscv_vwmaccu_vv_u64m1_tumu(__VA_ARGS__)

◆ vwmaccu_vv_u64m2

#define vwmaccu_vv_u64m2 ( ... ) __riscv_vwmaccu_vv_u64m2_tu(__VA_ARGS__)

◆ vwmaccu_vv_u64m2_m

#define vwmaccu_vv_u64m2_m ( ... ) __riscv_vwmaccu_vv_u64m2_tumu(__VA_ARGS__)

◆ vwmaccu_vv_u64m4

#define vwmaccu_vv_u64m4 ( ... ) __riscv_vwmaccu_vv_u64m4_tu(__VA_ARGS__)

◆ vwmaccu_vv_u64m4_m

#define vwmaccu_vv_u64m4_m ( ... ) __riscv_vwmaccu_vv_u64m4_tumu(__VA_ARGS__)

◆ vwmaccu_vv_u64m8

#define vwmaccu_vv_u64m8 ( ... ) __riscv_vwmaccu_vv_u64m8_tu(__VA_ARGS__)

◆ vwmaccu_vv_u64m8_m

#define vwmaccu_vv_u64m8_m ( ... ) __riscv_vwmaccu_vv_u64m8_tumu(__VA_ARGS__)

◆ vwmaccu_vx_u16m1

#define vwmaccu_vx_u16m1 ( ... ) __riscv_vwmaccu_vx_u16m1_tu(__VA_ARGS__)

◆ vwmaccu_vx_u16m1_m

#define vwmaccu_vx_u16m1_m ( ... ) __riscv_vwmaccu_vx_u16m1_tumu(__VA_ARGS__)

◆ vwmaccu_vx_u16m2

#define vwmaccu_vx_u16m2 ( ... ) __riscv_vwmaccu_vx_u16m2_tu(__VA_ARGS__)

◆ vwmaccu_vx_u16m2_m

#define vwmaccu_vx_u16m2_m ( ... ) __riscv_vwmaccu_vx_u16m2_tumu(__VA_ARGS__)

◆ vwmaccu_vx_u16m4

#define vwmaccu_vx_u16m4 ( ... ) __riscv_vwmaccu_vx_u16m4_tu(__VA_ARGS__)

◆ vwmaccu_vx_u16m4_m

#define vwmaccu_vx_u16m4_m ( ... ) __riscv_vwmaccu_vx_u16m4_tumu(__VA_ARGS__)

◆ vwmaccu_vx_u16m8

#define vwmaccu_vx_u16m8 ( ... ) __riscv_vwmaccu_vx_u16m8_tu(__VA_ARGS__)

◆ vwmaccu_vx_u16m8_m

#define vwmaccu_vx_u16m8_m ( ... ) __riscv_vwmaccu_vx_u16m8_tumu(__VA_ARGS__)

◆ vwmaccu_vx_u16mf2

#define vwmaccu_vx_u16mf2 ( ... ) __riscv_vwmaccu_vx_u16mf2_tu(__VA_ARGS__)

◆ vwmaccu_vx_u16mf2_m

#define vwmaccu_vx_u16mf2_m ( ... ) __riscv_vwmaccu_vx_u16mf2_tumu(__VA_ARGS__)

◆ vwmaccu_vx_u16mf4

#define vwmaccu_vx_u16mf4 ( ... ) __riscv_vwmaccu_vx_u16mf4_tu(__VA_ARGS__)

◆ vwmaccu_vx_u16mf4_m

#define vwmaccu_vx_u16mf4_m ( ... ) __riscv_vwmaccu_vx_u16mf4_tumu(__VA_ARGS__)

◆ vwmaccu_vx_u32m1

#define vwmaccu_vx_u32m1 ( ... ) __riscv_vwmaccu_vx_u32m1_tu(__VA_ARGS__)

◆ vwmaccu_vx_u32m1_m

#define vwmaccu_vx_u32m1_m ( ... ) __riscv_vwmaccu_vx_u32m1_tumu(__VA_ARGS__)

◆ vwmaccu_vx_u32m2

#define vwmaccu_vx_u32m2 ( ... ) __riscv_vwmaccu_vx_u32m2_tu(__VA_ARGS__)

◆ vwmaccu_vx_u32m2_m

#define vwmaccu_vx_u32m2_m ( ... ) __riscv_vwmaccu_vx_u32m2_tumu(__VA_ARGS__)

◆ vwmaccu_vx_u32m4

#define vwmaccu_vx_u32m4 ( ... ) __riscv_vwmaccu_vx_u32m4_tu(__VA_ARGS__)

◆ vwmaccu_vx_u32m4_m

#define vwmaccu_vx_u32m4_m ( ... ) __riscv_vwmaccu_vx_u32m4_tumu(__VA_ARGS__)

◆ vwmaccu_vx_u32m8

#define vwmaccu_vx_u32m8 ( ... ) __riscv_vwmaccu_vx_u32m8_tu(__VA_ARGS__)

◆ vwmaccu_vx_u32m8_m

#define vwmaccu_vx_u32m8_m ( ... ) __riscv_vwmaccu_vx_u32m8_tumu(__VA_ARGS__)

◆ vwmaccu_vx_u32mf2

#define vwmaccu_vx_u32mf2 ( ... ) __riscv_vwmaccu_vx_u32mf2_tu(__VA_ARGS__)

◆ vwmaccu_vx_u32mf2_m

#define vwmaccu_vx_u32mf2_m ( ... ) __riscv_vwmaccu_vx_u32mf2_tumu(__VA_ARGS__)

◆ vwmaccu_vx_u64m1

#define vwmaccu_vx_u64m1 ( ... ) __riscv_vwmaccu_vx_u64m1_tu(__VA_ARGS__)

◆ vwmaccu_vx_u64m1_m

#define vwmaccu_vx_u64m1_m ( ... ) __riscv_vwmaccu_vx_u64m1_tumu(__VA_ARGS__)

◆ vwmaccu_vx_u64m2

#define vwmaccu_vx_u64m2 ( ... ) __riscv_vwmaccu_vx_u64m2_tu(__VA_ARGS__)

◆ vwmaccu_vx_u64m2_m

#define vwmaccu_vx_u64m2_m ( ... ) __riscv_vwmaccu_vx_u64m2_tumu(__VA_ARGS__)

◆ vwmaccu_vx_u64m4

#define vwmaccu_vx_u64m4 ( ... ) __riscv_vwmaccu_vx_u64m4_tu(__VA_ARGS__)

◆ vwmaccu_vx_u64m4_m

#define vwmaccu_vx_u64m4_m ( ... ) __riscv_vwmaccu_vx_u64m4_tumu(__VA_ARGS__)

◆ vwmaccu_vx_u64m8

#define vwmaccu_vx_u64m8 ( ... ) __riscv_vwmaccu_vx_u64m8_tu(__VA_ARGS__)

◆ vwmaccu_vx_u64m8_m

#define vwmaccu_vx_u64m8_m ( ... ) __riscv_vwmaccu_vx_u64m8_tumu(__VA_ARGS__)

◆ vwmaccus_vx_i16m1

#define vwmaccus_vx_i16m1 ( ... ) __riscv_vwmaccus_vx_i16m1_tu(__VA_ARGS__)

◆ vwmaccus_vx_i16m1_m

#define vwmaccus_vx_i16m1_m ( ... ) __riscv_vwmaccus_vx_i16m1_tumu(__VA_ARGS__)

◆ vwmaccus_vx_i16m2

#define vwmaccus_vx_i16m2 ( ... ) __riscv_vwmaccus_vx_i16m2_tu(__VA_ARGS__)

◆ vwmaccus_vx_i16m2_m

#define vwmaccus_vx_i16m2_m ( ... ) __riscv_vwmaccus_vx_i16m2_tumu(__VA_ARGS__)

◆ vwmaccus_vx_i16m4

#define vwmaccus_vx_i16m4 ( ... ) __riscv_vwmaccus_vx_i16m4_tu(__VA_ARGS__)

◆ vwmaccus_vx_i16m4_m

#define vwmaccus_vx_i16m4_m ( ... ) __riscv_vwmaccus_vx_i16m4_tumu(__VA_ARGS__)

◆ vwmaccus_vx_i16m8

#define vwmaccus_vx_i16m8 ( ... ) __riscv_vwmaccus_vx_i16m8_tu(__VA_ARGS__)

◆ vwmaccus_vx_i16m8_m

#define vwmaccus_vx_i16m8_m ( ... ) __riscv_vwmaccus_vx_i16m8_tumu(__VA_ARGS__)

◆ vwmaccus_vx_i16mf2

#define vwmaccus_vx_i16mf2 ( ... ) __riscv_vwmaccus_vx_i16mf2_tu(__VA_ARGS__)

◆ vwmaccus_vx_i16mf2_m

#define vwmaccus_vx_i16mf2_m ( ... ) __riscv_vwmaccus_vx_i16mf2_tumu(__VA_ARGS__)

◆ vwmaccus_vx_i16mf4

#define vwmaccus_vx_i16mf4 ( ... ) __riscv_vwmaccus_vx_i16mf4_tu(__VA_ARGS__)

◆ vwmaccus_vx_i16mf4_m

#define vwmaccus_vx_i16mf4_m ( ... ) __riscv_vwmaccus_vx_i16mf4_tumu(__VA_ARGS__)

◆ vwmaccus_vx_i32m1

#define vwmaccus_vx_i32m1 ( ... ) __riscv_vwmaccus_vx_i32m1_tu(__VA_ARGS__)

◆ vwmaccus_vx_i32m1_m

#define vwmaccus_vx_i32m1_m ( ... ) __riscv_vwmaccus_vx_i32m1_tumu(__VA_ARGS__)

◆ vwmaccus_vx_i32m2

#define vwmaccus_vx_i32m2 ( ... ) __riscv_vwmaccus_vx_i32m2_tu(__VA_ARGS__)

◆ vwmaccus_vx_i32m2_m

#define vwmaccus_vx_i32m2_m ( ... ) __riscv_vwmaccus_vx_i32m2_tumu(__VA_ARGS__)

◆ vwmaccus_vx_i32m4

#define vwmaccus_vx_i32m4 ( ... ) __riscv_vwmaccus_vx_i32m4_tu(__VA_ARGS__)

◆ vwmaccus_vx_i32m4_m

#define vwmaccus_vx_i32m4_m ( ... ) __riscv_vwmaccus_vx_i32m4_tumu(__VA_ARGS__)

◆ vwmaccus_vx_i32m8

#define vwmaccus_vx_i32m8 ( ... ) __riscv_vwmaccus_vx_i32m8_tu(__VA_ARGS__)

◆ vwmaccus_vx_i32m8_m

#define vwmaccus_vx_i32m8_m ( ... ) __riscv_vwmaccus_vx_i32m8_tumu(__VA_ARGS__)

◆ vwmaccus_vx_i32mf2

#define vwmaccus_vx_i32mf2 ( ... ) __riscv_vwmaccus_vx_i32mf2_tu(__VA_ARGS__)

◆ vwmaccus_vx_i32mf2_m

#define vwmaccus_vx_i32mf2_m ( ... ) __riscv_vwmaccus_vx_i32mf2_tumu(__VA_ARGS__)

◆ vwmaccus_vx_i64m1

#define vwmaccus_vx_i64m1 ( ... ) __riscv_vwmaccus_vx_i64m1_tu(__VA_ARGS__)

◆ vwmaccus_vx_i64m1_m

#define vwmaccus_vx_i64m1_m ( ... ) __riscv_vwmaccus_vx_i64m1_tumu(__VA_ARGS__)

◆ vwmaccus_vx_i64m2

#define vwmaccus_vx_i64m2 ( ... ) __riscv_vwmaccus_vx_i64m2_tu(__VA_ARGS__)

◆ vwmaccus_vx_i64m2_m

#define vwmaccus_vx_i64m2_m ( ... ) __riscv_vwmaccus_vx_i64m2_tumu(__VA_ARGS__)

◆ vwmaccus_vx_i64m4

#define vwmaccus_vx_i64m4 ( ... ) __riscv_vwmaccus_vx_i64m4_tu(__VA_ARGS__)

◆ vwmaccus_vx_i64m4_m

#define vwmaccus_vx_i64m4_m ( ... ) __riscv_vwmaccus_vx_i64m4_tumu(__VA_ARGS__)

◆ vwmaccus_vx_i64m8

#define vwmaccus_vx_i64m8 ( ... ) __riscv_vwmaccus_vx_i64m8_tu(__VA_ARGS__)

◆ vwmaccus_vx_i64m8_m

#define vwmaccus_vx_i64m8_m ( ... ) __riscv_vwmaccus_vx_i64m8_tumu(__VA_ARGS__)

◆ vwmul_vv_i16m1

#define vwmul_vv_i16m1 ( ... ) __riscv_vwmul_vv_i16m1(__VA_ARGS__)

◆ vwmul_vv_i16m1_m

#define vwmul_vv_i16m1_m ( ... ) __riscv_vwmul_vv_i16m1_tumu(__VA_ARGS__)

◆ vwmul_vv_i16m2

#define vwmul_vv_i16m2 ( ... ) __riscv_vwmul_vv_i16m2(__VA_ARGS__)

◆ vwmul_vv_i16m2_m

#define vwmul_vv_i16m2_m ( ... ) __riscv_vwmul_vv_i16m2_tumu(__VA_ARGS__)

◆ vwmul_vv_i16m4

#define vwmul_vv_i16m4 ( ... ) __riscv_vwmul_vv_i16m4(__VA_ARGS__)

◆ vwmul_vv_i16m4_m

#define vwmul_vv_i16m4_m ( ... ) __riscv_vwmul_vv_i16m4_tumu(__VA_ARGS__)

◆ vwmul_vv_i16m8

#define vwmul_vv_i16m8 ( ... ) __riscv_vwmul_vv_i16m8(__VA_ARGS__)

◆ vwmul_vv_i16m8_m

#define vwmul_vv_i16m8_m ( ... ) __riscv_vwmul_vv_i16m8_tumu(__VA_ARGS__)

◆ vwmul_vv_i16mf2

#define vwmul_vv_i16mf2 ( ... ) __riscv_vwmul_vv_i16mf2(__VA_ARGS__)

◆ vwmul_vv_i16mf2_m

#define vwmul_vv_i16mf2_m ( ... ) __riscv_vwmul_vv_i16mf2_tumu(__VA_ARGS__)

◆ vwmul_vv_i16mf4

#define vwmul_vv_i16mf4 ( ... ) __riscv_vwmul_vv_i16mf4(__VA_ARGS__)

◆ vwmul_vv_i16mf4_m

#define vwmul_vv_i16mf4_m ( ... ) __riscv_vwmul_vv_i16mf4_tumu(__VA_ARGS__)

◆ vwmul_vv_i32m1

#define vwmul_vv_i32m1 ( ... ) __riscv_vwmul_vv_i32m1(__VA_ARGS__)

◆ vwmul_vv_i32m1_m

#define vwmul_vv_i32m1_m ( ... ) __riscv_vwmul_vv_i32m1_tumu(__VA_ARGS__)

◆ vwmul_vv_i32m2

#define vwmul_vv_i32m2 ( ... ) __riscv_vwmul_vv_i32m2(__VA_ARGS__)

◆ vwmul_vv_i32m2_m

#define vwmul_vv_i32m2_m ( ... ) __riscv_vwmul_vv_i32m2_tumu(__VA_ARGS__)

◆ vwmul_vv_i32m4

#define vwmul_vv_i32m4 ( ... ) __riscv_vwmul_vv_i32m4(__VA_ARGS__)

◆ vwmul_vv_i32m4_m

#define vwmul_vv_i32m4_m ( ... ) __riscv_vwmul_vv_i32m4_tumu(__VA_ARGS__)

◆ vwmul_vv_i32m8

#define vwmul_vv_i32m8 ( ... ) __riscv_vwmul_vv_i32m8(__VA_ARGS__)

◆ vwmul_vv_i32m8_m

#define vwmul_vv_i32m8_m ( ... ) __riscv_vwmul_vv_i32m8_tumu(__VA_ARGS__)

◆ vwmul_vv_i32mf2

#define vwmul_vv_i32mf2 ( ... ) __riscv_vwmul_vv_i32mf2(__VA_ARGS__)

◆ vwmul_vv_i32mf2_m

#define vwmul_vv_i32mf2_m ( ... ) __riscv_vwmul_vv_i32mf2_tumu(__VA_ARGS__)

◆ vwmul_vv_i64m1

#define vwmul_vv_i64m1 ( ... ) __riscv_vwmul_vv_i64m1(__VA_ARGS__)

◆ vwmul_vv_i64m1_m

#define vwmul_vv_i64m1_m ( ... ) __riscv_vwmul_vv_i64m1_tumu(__VA_ARGS__)

◆ vwmul_vv_i64m2

#define vwmul_vv_i64m2 ( ... ) __riscv_vwmul_vv_i64m2(__VA_ARGS__)

◆ vwmul_vv_i64m2_m

#define vwmul_vv_i64m2_m ( ... ) __riscv_vwmul_vv_i64m2_tumu(__VA_ARGS__)

◆ vwmul_vv_i64m4

#define vwmul_vv_i64m4 ( ... ) __riscv_vwmul_vv_i64m4(__VA_ARGS__)

◆ vwmul_vv_i64m4_m

#define vwmul_vv_i64m4_m ( ... ) __riscv_vwmul_vv_i64m4_tumu(__VA_ARGS__)

◆ vwmul_vv_i64m8

#define vwmul_vv_i64m8 ( ... ) __riscv_vwmul_vv_i64m8(__VA_ARGS__)

◆ vwmul_vv_i64m8_m

#define vwmul_vv_i64m8_m ( ... ) __riscv_vwmul_vv_i64m8_tumu(__VA_ARGS__)

◆ vwmul_vx_i16m1

#define vwmul_vx_i16m1 ( ... ) __riscv_vwmul_vx_i16m1(__VA_ARGS__)

◆ vwmul_vx_i16m1_m

#define vwmul_vx_i16m1_m ( ... ) __riscv_vwmul_vx_i16m1_tumu(__VA_ARGS__)

◆ vwmul_vx_i16m2

#define vwmul_vx_i16m2 ( ... ) __riscv_vwmul_vx_i16m2(__VA_ARGS__)

◆ vwmul_vx_i16m2_m

#define vwmul_vx_i16m2_m ( ... ) __riscv_vwmul_vx_i16m2_tumu(__VA_ARGS__)

◆ vwmul_vx_i16m4

#define vwmul_vx_i16m4 ( ... ) __riscv_vwmul_vx_i16m4(__VA_ARGS__)

◆ vwmul_vx_i16m4_m

#define vwmul_vx_i16m4_m ( ... ) __riscv_vwmul_vx_i16m4_tumu(__VA_ARGS__)

◆ vwmul_vx_i16m8

#define vwmul_vx_i16m8 ( ... ) __riscv_vwmul_vx_i16m8(__VA_ARGS__)

◆ vwmul_vx_i16m8_m

#define vwmul_vx_i16m8_m ( ... ) __riscv_vwmul_vx_i16m8_tumu(__VA_ARGS__)

◆ vwmul_vx_i16mf2

#define vwmul_vx_i16mf2 ( ... ) __riscv_vwmul_vx_i16mf2(__VA_ARGS__)

◆ vwmul_vx_i16mf2_m

#define vwmul_vx_i16mf2_m ( ... ) __riscv_vwmul_vx_i16mf2_tumu(__VA_ARGS__)

◆ vwmul_vx_i16mf4

#define vwmul_vx_i16mf4 ( ... ) __riscv_vwmul_vx_i16mf4(__VA_ARGS__)

◆ vwmul_vx_i16mf4_m

#define vwmul_vx_i16mf4_m ( ... ) __riscv_vwmul_vx_i16mf4_tumu(__VA_ARGS__)

◆ vwmul_vx_i32m1

#define vwmul_vx_i32m1 ( ... ) __riscv_vwmul_vx_i32m1(__VA_ARGS__)

◆ vwmul_vx_i32m1_m

#define vwmul_vx_i32m1_m ( ... ) __riscv_vwmul_vx_i32m1_tumu(__VA_ARGS__)

◆ vwmul_vx_i32m2

#define vwmul_vx_i32m2 ( ... ) __riscv_vwmul_vx_i32m2(__VA_ARGS__)

◆ vwmul_vx_i32m2_m

#define vwmul_vx_i32m2_m ( ... ) __riscv_vwmul_vx_i32m2_tumu(__VA_ARGS__)

◆ vwmul_vx_i32m4

#define vwmul_vx_i32m4 ( ... ) __riscv_vwmul_vx_i32m4(__VA_ARGS__)

◆ vwmul_vx_i32m4_m

#define vwmul_vx_i32m4_m ( ... ) __riscv_vwmul_vx_i32m4_tumu(__VA_ARGS__)

◆ vwmul_vx_i32m8

#define vwmul_vx_i32m8 ( ... ) __riscv_vwmul_vx_i32m8(__VA_ARGS__)

◆ vwmul_vx_i32m8_m

#define vwmul_vx_i32m8_m ( ... ) __riscv_vwmul_vx_i32m8_tumu(__VA_ARGS__)

◆ vwmul_vx_i32mf2

#define vwmul_vx_i32mf2 ( ... ) __riscv_vwmul_vx_i32mf2(__VA_ARGS__)

◆ vwmul_vx_i32mf2_m

#define vwmul_vx_i32mf2_m ( ... ) __riscv_vwmul_vx_i32mf2_tumu(__VA_ARGS__)

◆ vwmul_vx_i64m1

#define vwmul_vx_i64m1 ( ... ) __riscv_vwmul_vx_i64m1(__VA_ARGS__)

◆ vwmul_vx_i64m1_m

#define vwmul_vx_i64m1_m ( ... ) __riscv_vwmul_vx_i64m1_tumu(__VA_ARGS__)

◆ vwmul_vx_i64m2

#define vwmul_vx_i64m2 ( ... ) __riscv_vwmul_vx_i64m2(__VA_ARGS__)

◆ vwmul_vx_i64m2_m

#define vwmul_vx_i64m2_m ( ... ) __riscv_vwmul_vx_i64m2_tumu(__VA_ARGS__)

◆ vwmul_vx_i64m4

#define vwmul_vx_i64m4 ( ... ) __riscv_vwmul_vx_i64m4(__VA_ARGS__)

◆ vwmul_vx_i64m4_m

#define vwmul_vx_i64m4_m ( ... ) __riscv_vwmul_vx_i64m4_tumu(__VA_ARGS__)

◆ vwmul_vx_i64m8

#define vwmul_vx_i64m8 ( ... ) __riscv_vwmul_vx_i64m8(__VA_ARGS__)

◆ vwmul_vx_i64m8_m

#define vwmul_vx_i64m8_m ( ... ) __riscv_vwmul_vx_i64m8_tumu(__VA_ARGS__)

◆ vwmulsu_vv_i16m1

#define vwmulsu_vv_i16m1 ( ... ) __riscv_vwmulsu_vv_i16m1(__VA_ARGS__)

◆ vwmulsu_vv_i16m1_m

#define vwmulsu_vv_i16m1_m ( ... ) __riscv_vwmulsu_vv_i16m1_tumu(__VA_ARGS__)

◆ vwmulsu_vv_i16m2

#define vwmulsu_vv_i16m2 ( ... ) __riscv_vwmulsu_vv_i16m2(__VA_ARGS__)

◆ vwmulsu_vv_i16m2_m

#define vwmulsu_vv_i16m2_m ( ... ) __riscv_vwmulsu_vv_i16m2_tumu(__VA_ARGS__)

◆ vwmulsu_vv_i16m4

#define vwmulsu_vv_i16m4 ( ... ) __riscv_vwmulsu_vv_i16m4(__VA_ARGS__)

◆ vwmulsu_vv_i16m4_m

#define vwmulsu_vv_i16m4_m ( ... ) __riscv_vwmulsu_vv_i16m4_tumu(__VA_ARGS__)

◆ vwmulsu_vv_i16m8

#define vwmulsu_vv_i16m8 ( ... ) __riscv_vwmulsu_vv_i16m8(__VA_ARGS__)

◆ vwmulsu_vv_i16m8_m

#define vwmulsu_vv_i16m8_m ( ... ) __riscv_vwmulsu_vv_i16m8_tumu(__VA_ARGS__)

◆ vwmulsu_vv_i16mf2

#define vwmulsu_vv_i16mf2 ( ... ) __riscv_vwmulsu_vv_i16mf2(__VA_ARGS__)

◆ vwmulsu_vv_i16mf2_m

#define vwmulsu_vv_i16mf2_m ( ... ) __riscv_vwmulsu_vv_i16mf2_tumu(__VA_ARGS__)

◆ vwmulsu_vv_i16mf4

#define vwmulsu_vv_i16mf4 ( ... ) __riscv_vwmulsu_vv_i16mf4(__VA_ARGS__)

◆ vwmulsu_vv_i16mf4_m

#define vwmulsu_vv_i16mf4_m ( ... ) __riscv_vwmulsu_vv_i16mf4_tumu(__VA_ARGS__)

◆ vwmulsu_vv_i32m1

#define vwmulsu_vv_i32m1 ( ... ) __riscv_vwmulsu_vv_i32m1(__VA_ARGS__)

◆ vwmulsu_vv_i32m1_m

#define vwmulsu_vv_i32m1_m ( ... ) __riscv_vwmulsu_vv_i32m1_tumu(__VA_ARGS__)

◆ vwmulsu_vv_i32m2

#define vwmulsu_vv_i32m2 ( ... ) __riscv_vwmulsu_vv_i32m2(__VA_ARGS__)

◆ vwmulsu_vv_i32m2_m

#define vwmulsu_vv_i32m2_m ( ... ) __riscv_vwmulsu_vv_i32m2_tumu(__VA_ARGS__)

◆ vwmulsu_vv_i32m4

#define vwmulsu_vv_i32m4 ( ... ) __riscv_vwmulsu_vv_i32m4(__VA_ARGS__)

◆ vwmulsu_vv_i32m4_m

#define vwmulsu_vv_i32m4_m ( ... ) __riscv_vwmulsu_vv_i32m4_tumu(__VA_ARGS__)

◆ vwmulsu_vv_i32m8

#define vwmulsu_vv_i32m8 ( ... ) __riscv_vwmulsu_vv_i32m8(__VA_ARGS__)

◆ vwmulsu_vv_i32m8_m

#define vwmulsu_vv_i32m8_m ( ... ) __riscv_vwmulsu_vv_i32m8_tumu(__VA_ARGS__)

◆ vwmulsu_vv_i32mf2

#define vwmulsu_vv_i32mf2 ( ... ) __riscv_vwmulsu_vv_i32mf2(__VA_ARGS__)

◆ vwmulsu_vv_i32mf2_m

#define vwmulsu_vv_i32mf2_m ( ... ) __riscv_vwmulsu_vv_i32mf2_tumu(__VA_ARGS__)

◆ vwmulsu_vv_i64m1

#define vwmulsu_vv_i64m1 ( ... ) __riscv_vwmulsu_vv_i64m1(__VA_ARGS__)

◆ vwmulsu_vv_i64m1_m

#define vwmulsu_vv_i64m1_m ( ... ) __riscv_vwmulsu_vv_i64m1_tumu(__VA_ARGS__)

◆ vwmulsu_vv_i64m2

#define vwmulsu_vv_i64m2 ( ... ) __riscv_vwmulsu_vv_i64m2(__VA_ARGS__)

◆ vwmulsu_vv_i64m2_m

#define vwmulsu_vv_i64m2_m ( ... ) __riscv_vwmulsu_vv_i64m2_tumu(__VA_ARGS__)

◆ vwmulsu_vv_i64m4

#define vwmulsu_vv_i64m4 ( ... ) __riscv_vwmulsu_vv_i64m4(__VA_ARGS__)

◆ vwmulsu_vv_i64m4_m

#define vwmulsu_vv_i64m4_m ( ... ) __riscv_vwmulsu_vv_i64m4_tumu(__VA_ARGS__)

◆ vwmulsu_vv_i64m8

#define vwmulsu_vv_i64m8 ( ... ) __riscv_vwmulsu_vv_i64m8(__VA_ARGS__)

◆ vwmulsu_vv_i64m8_m

#define vwmulsu_vv_i64m8_m ( ... ) __riscv_vwmulsu_vv_i64m8_tumu(__VA_ARGS__)

◆ vwmulsu_vx_i16m1

#define vwmulsu_vx_i16m1 ( ... ) __riscv_vwmulsu_vx_i16m1(__VA_ARGS__)

◆ vwmulsu_vx_i16m1_m

#define vwmulsu_vx_i16m1_m ( ... ) __riscv_vwmulsu_vx_i16m1_tumu(__VA_ARGS__)

◆ vwmulsu_vx_i16m2

#define vwmulsu_vx_i16m2 ( ... ) __riscv_vwmulsu_vx_i16m2(__VA_ARGS__)

◆ vwmulsu_vx_i16m2_m

#define vwmulsu_vx_i16m2_m ( ... ) __riscv_vwmulsu_vx_i16m2_tumu(__VA_ARGS__)

◆ vwmulsu_vx_i16m4

#define vwmulsu_vx_i16m4 ( ... ) __riscv_vwmulsu_vx_i16m4(__VA_ARGS__)

◆ vwmulsu_vx_i16m4_m

#define vwmulsu_vx_i16m4_m ( ... ) __riscv_vwmulsu_vx_i16m4_tumu(__VA_ARGS__)

◆ vwmulsu_vx_i16m8

#define vwmulsu_vx_i16m8 ( ... ) __riscv_vwmulsu_vx_i16m8(__VA_ARGS__)

◆ vwmulsu_vx_i16m8_m

#define vwmulsu_vx_i16m8_m ( ... ) __riscv_vwmulsu_vx_i16m8_tumu(__VA_ARGS__)

◆ vwmulsu_vx_i16mf2

#define vwmulsu_vx_i16mf2 ( ... ) __riscv_vwmulsu_vx_i16mf2(__VA_ARGS__)

◆ vwmulsu_vx_i16mf2_m

#define vwmulsu_vx_i16mf2_m ( ... ) __riscv_vwmulsu_vx_i16mf2_tumu(__VA_ARGS__)

◆ vwmulsu_vx_i16mf4

#define vwmulsu_vx_i16mf4 ( ... ) __riscv_vwmulsu_vx_i16mf4(__VA_ARGS__)

◆ vwmulsu_vx_i16mf4_m

#define vwmulsu_vx_i16mf4_m ( ... ) __riscv_vwmulsu_vx_i16mf4_tumu(__VA_ARGS__)

◆ vwmulsu_vx_i32m1

#define vwmulsu_vx_i32m1 ( ... ) __riscv_vwmulsu_vx_i32m1(__VA_ARGS__)

◆ vwmulsu_vx_i32m1_m

#define vwmulsu_vx_i32m1_m ( ... ) __riscv_vwmulsu_vx_i32m1_tumu(__VA_ARGS__)

◆ vwmulsu_vx_i32m2

#define vwmulsu_vx_i32m2 ( ... ) __riscv_vwmulsu_vx_i32m2(__VA_ARGS__)

◆ vwmulsu_vx_i32m2_m

#define vwmulsu_vx_i32m2_m ( ... ) __riscv_vwmulsu_vx_i32m2_tumu(__VA_ARGS__)

◆ vwmulsu_vx_i32m4

#define vwmulsu_vx_i32m4 ( ... ) __riscv_vwmulsu_vx_i32m4(__VA_ARGS__)

◆ vwmulsu_vx_i32m4_m

#define vwmulsu_vx_i32m4_m ( ... ) __riscv_vwmulsu_vx_i32m4_tumu(__VA_ARGS__)

◆ vwmulsu_vx_i32m8

#define vwmulsu_vx_i32m8 ( ... ) __riscv_vwmulsu_vx_i32m8(__VA_ARGS__)

◆ vwmulsu_vx_i32m8_m

#define vwmulsu_vx_i32m8_m ( ... ) __riscv_vwmulsu_vx_i32m8_tumu(__VA_ARGS__)

◆ vwmulsu_vx_i32mf2

#define vwmulsu_vx_i32mf2 ( ... ) __riscv_vwmulsu_vx_i32mf2(__VA_ARGS__)

◆ vwmulsu_vx_i32mf2_m

#define vwmulsu_vx_i32mf2_m ( ... ) __riscv_vwmulsu_vx_i32mf2_tumu(__VA_ARGS__)

◆ vwmulsu_vx_i64m1

#define vwmulsu_vx_i64m1 ( ... ) __riscv_vwmulsu_vx_i64m1(__VA_ARGS__)

◆ vwmulsu_vx_i64m1_m

#define vwmulsu_vx_i64m1_m ( ... ) __riscv_vwmulsu_vx_i64m1_tumu(__VA_ARGS__)

◆ vwmulsu_vx_i64m2

#define vwmulsu_vx_i64m2 ( ... ) __riscv_vwmulsu_vx_i64m2(__VA_ARGS__)

◆ vwmulsu_vx_i64m2_m

#define vwmulsu_vx_i64m2_m ( ... ) __riscv_vwmulsu_vx_i64m2_tumu(__VA_ARGS__)

◆ vwmulsu_vx_i64m4

#define vwmulsu_vx_i64m4 ( ... ) __riscv_vwmulsu_vx_i64m4(__VA_ARGS__)

◆ vwmulsu_vx_i64m4_m

#define vwmulsu_vx_i64m4_m ( ... ) __riscv_vwmulsu_vx_i64m4_tumu(__VA_ARGS__)

◆ vwmulsu_vx_i64m8

#define vwmulsu_vx_i64m8 ( ... ) __riscv_vwmulsu_vx_i64m8(__VA_ARGS__)

◆ vwmulsu_vx_i64m8_m

#define vwmulsu_vx_i64m8_m ( ... ) __riscv_vwmulsu_vx_i64m8_tumu(__VA_ARGS__)

◆ vwmulu_vv_u16m1

#define vwmulu_vv_u16m1 ( ... ) __riscv_vwmulu_vv_u16m1(__VA_ARGS__)

◆ vwmulu_vv_u16m1_m

#define vwmulu_vv_u16m1_m ( ... ) __riscv_vwmulu_vv_u16m1_tumu(__VA_ARGS__)

◆ vwmulu_vv_u16m2

#define vwmulu_vv_u16m2 ( ... ) __riscv_vwmulu_vv_u16m2(__VA_ARGS__)

◆ vwmulu_vv_u16m2_m

#define vwmulu_vv_u16m2_m ( ... ) __riscv_vwmulu_vv_u16m2_tumu(__VA_ARGS__)

◆ vwmulu_vv_u16m4

#define vwmulu_vv_u16m4 ( ... ) __riscv_vwmulu_vv_u16m4(__VA_ARGS__)

◆ vwmulu_vv_u16m4_m

#define vwmulu_vv_u16m4_m ( ... ) __riscv_vwmulu_vv_u16m4_tumu(__VA_ARGS__)

◆ vwmulu_vv_u16m8

#define vwmulu_vv_u16m8 ( ... ) __riscv_vwmulu_vv_u16m8(__VA_ARGS__)

◆ vwmulu_vv_u16m8_m

#define vwmulu_vv_u16m8_m ( ... ) __riscv_vwmulu_vv_u16m8_tumu(__VA_ARGS__)

◆ vwmulu_vv_u16mf2

#define vwmulu_vv_u16mf2 ( ... ) __riscv_vwmulu_vv_u16mf2(__VA_ARGS__)

◆ vwmulu_vv_u16mf2_m

#define vwmulu_vv_u16mf2_m ( ... ) __riscv_vwmulu_vv_u16mf2_tumu(__VA_ARGS__)

◆ vwmulu_vv_u16mf4

#define vwmulu_vv_u16mf4 ( ... ) __riscv_vwmulu_vv_u16mf4(__VA_ARGS__)

◆ vwmulu_vv_u16mf4_m

#define vwmulu_vv_u16mf4_m ( ... ) __riscv_vwmulu_vv_u16mf4_tumu(__VA_ARGS__)

◆ vwmulu_vv_u32m1

#define vwmulu_vv_u32m1 ( ... ) __riscv_vwmulu_vv_u32m1(__VA_ARGS__)

◆ vwmulu_vv_u32m1_m

#define vwmulu_vv_u32m1_m ( ... ) __riscv_vwmulu_vv_u32m1_tumu(__VA_ARGS__)

◆ vwmulu_vv_u32m2

#define vwmulu_vv_u32m2 ( ... ) __riscv_vwmulu_vv_u32m2(__VA_ARGS__)

◆ vwmulu_vv_u32m2_m

#define vwmulu_vv_u32m2_m ( ... ) __riscv_vwmulu_vv_u32m2_tumu(__VA_ARGS__)

◆ vwmulu_vv_u32m4

#define vwmulu_vv_u32m4 ( ... ) __riscv_vwmulu_vv_u32m4(__VA_ARGS__)

◆ vwmulu_vv_u32m4_m

#define vwmulu_vv_u32m4_m ( ... ) __riscv_vwmulu_vv_u32m4_tumu(__VA_ARGS__)

◆ vwmulu_vv_u32m8

#define vwmulu_vv_u32m8 ( ... ) __riscv_vwmulu_vv_u32m8(__VA_ARGS__)

◆ vwmulu_vv_u32m8_m

#define vwmulu_vv_u32m8_m ( ... ) __riscv_vwmulu_vv_u32m8_tumu(__VA_ARGS__)

◆ vwmulu_vv_u32mf2

#define vwmulu_vv_u32mf2 ( ... ) __riscv_vwmulu_vv_u32mf2(__VA_ARGS__)

◆ vwmulu_vv_u32mf2_m

#define vwmulu_vv_u32mf2_m ( ... ) __riscv_vwmulu_vv_u32mf2_tumu(__VA_ARGS__)

◆ vwmulu_vv_u64m1

#define vwmulu_vv_u64m1 ( ... ) __riscv_vwmulu_vv_u64m1(__VA_ARGS__)

◆ vwmulu_vv_u64m1_m

#define vwmulu_vv_u64m1_m ( ... ) __riscv_vwmulu_vv_u64m1_tumu(__VA_ARGS__)

◆ vwmulu_vv_u64m2

#define vwmulu_vv_u64m2 ( ... ) __riscv_vwmulu_vv_u64m2(__VA_ARGS__)

◆ vwmulu_vv_u64m2_m

#define vwmulu_vv_u64m2_m ( ... ) __riscv_vwmulu_vv_u64m2_tumu(__VA_ARGS__)

◆ vwmulu_vv_u64m4

#define vwmulu_vv_u64m4 ( ... ) __riscv_vwmulu_vv_u64m4(__VA_ARGS__)

◆ vwmulu_vv_u64m4_m

#define vwmulu_vv_u64m4_m ( ... ) __riscv_vwmulu_vv_u64m4_tumu(__VA_ARGS__)

◆ vwmulu_vv_u64m8

#define vwmulu_vv_u64m8 ( ... ) __riscv_vwmulu_vv_u64m8(__VA_ARGS__)

◆ vwmulu_vv_u64m8_m

#define vwmulu_vv_u64m8_m ( ... ) __riscv_vwmulu_vv_u64m8_tumu(__VA_ARGS__)

◆ vwmulu_vx_u16m1

#define vwmulu_vx_u16m1 ( ... ) __riscv_vwmulu_vx_u16m1(__VA_ARGS__)

◆ vwmulu_vx_u16m1_m

#define vwmulu_vx_u16m1_m ( ... ) __riscv_vwmulu_vx_u16m1_tumu(__VA_ARGS__)

◆ vwmulu_vx_u16m2

#define vwmulu_vx_u16m2 ( ... ) __riscv_vwmulu_vx_u16m2(__VA_ARGS__)

◆ vwmulu_vx_u16m2_m

#define vwmulu_vx_u16m2_m ( ... ) __riscv_vwmulu_vx_u16m2_tumu(__VA_ARGS__)

◆ vwmulu_vx_u16m4

#define vwmulu_vx_u16m4 ( ... ) __riscv_vwmulu_vx_u16m4(__VA_ARGS__)

◆ vwmulu_vx_u16m4_m

#define vwmulu_vx_u16m4_m ( ... ) __riscv_vwmulu_vx_u16m4_tumu(__VA_ARGS__)

◆ vwmulu_vx_u16m8

#define vwmulu_vx_u16m8 ( ... ) __riscv_vwmulu_vx_u16m8(__VA_ARGS__)

◆ vwmulu_vx_u16m8_m

#define vwmulu_vx_u16m8_m ( ... ) __riscv_vwmulu_vx_u16m8_tumu(__VA_ARGS__)

◆ vwmulu_vx_u16mf2

#define vwmulu_vx_u16mf2 ( ... ) __riscv_vwmulu_vx_u16mf2(__VA_ARGS__)

◆ vwmulu_vx_u16mf2_m

#define vwmulu_vx_u16mf2_m ( ... ) __riscv_vwmulu_vx_u16mf2_tumu(__VA_ARGS__)

◆ vwmulu_vx_u16mf4

#define vwmulu_vx_u16mf4 ( ... ) __riscv_vwmulu_vx_u16mf4(__VA_ARGS__)

◆ vwmulu_vx_u16mf4_m

#define vwmulu_vx_u16mf4_m ( ... ) __riscv_vwmulu_vx_u16mf4_tumu(__VA_ARGS__)

◆ vwmulu_vx_u32m1

#define vwmulu_vx_u32m1 ( ... ) __riscv_vwmulu_vx_u32m1(__VA_ARGS__)

◆ vwmulu_vx_u32m1_m

#define vwmulu_vx_u32m1_m ( ... ) __riscv_vwmulu_vx_u32m1_tumu(__VA_ARGS__)

◆ vwmulu_vx_u32m2

#define vwmulu_vx_u32m2 ( ... ) __riscv_vwmulu_vx_u32m2(__VA_ARGS__)

◆ vwmulu_vx_u32m2_m

#define vwmulu_vx_u32m2_m ( ... ) __riscv_vwmulu_vx_u32m2_tumu(__VA_ARGS__)

◆ vwmulu_vx_u32m4

#define vwmulu_vx_u32m4 ( ... ) __riscv_vwmulu_vx_u32m4(__VA_ARGS__)

◆ vwmulu_vx_u32m4_m

#define vwmulu_vx_u32m4_m ( ... ) __riscv_vwmulu_vx_u32m4_tumu(__VA_ARGS__)

◆ vwmulu_vx_u32m8

#define vwmulu_vx_u32m8 ( ... ) __riscv_vwmulu_vx_u32m8(__VA_ARGS__)

◆ vwmulu_vx_u32m8_m

#define vwmulu_vx_u32m8_m ( ... ) __riscv_vwmulu_vx_u32m8_tumu(__VA_ARGS__)

◆ vwmulu_vx_u32mf2

#define vwmulu_vx_u32mf2 ( ... ) __riscv_vwmulu_vx_u32mf2(__VA_ARGS__)

◆ vwmulu_vx_u32mf2_m

#define vwmulu_vx_u32mf2_m ( ... ) __riscv_vwmulu_vx_u32mf2_tumu(__VA_ARGS__)

◆ vwmulu_vx_u64m1

#define vwmulu_vx_u64m1 ( ... ) __riscv_vwmulu_vx_u64m1(__VA_ARGS__)

◆ vwmulu_vx_u64m1_m

#define vwmulu_vx_u64m1_m ( ... ) __riscv_vwmulu_vx_u64m1_tumu(__VA_ARGS__)

◆ vwmulu_vx_u64m2

#define vwmulu_vx_u64m2 ( ... ) __riscv_vwmulu_vx_u64m2(__VA_ARGS__)

◆ vwmulu_vx_u64m2_m

#define vwmulu_vx_u64m2_m ( ... ) __riscv_vwmulu_vx_u64m2_tumu(__VA_ARGS__)

◆ vwmulu_vx_u64m4

#define vwmulu_vx_u64m4 ( ... ) __riscv_vwmulu_vx_u64m4(__VA_ARGS__)

◆ vwmulu_vx_u64m4_m

#define vwmulu_vx_u64m4_m ( ... ) __riscv_vwmulu_vx_u64m4_tumu(__VA_ARGS__)

◆ vwmulu_vx_u64m8

#define vwmulu_vx_u64m8 ( ... ) __riscv_vwmulu_vx_u64m8(__VA_ARGS__)

◆ vwmulu_vx_u64m8_m

#define vwmulu_vx_u64m8_m ( ... ) __riscv_vwmulu_vx_u64m8_tumu(__VA_ARGS__)

◆ vwredsum_vs_i16m1_i32m1

#define vwredsum_vs_i16m1_i32m1 ( ... ) __riscv_vwredsum_vs_i16m1_i32m1_tu(__VA_ARGS__)

◆ vwredsum_vs_i16m1_i32m1_m

#define vwredsum_vs_i16m1_i32m1_m ( ... ) __riscv_vwredsum_vs_i16m1_i32m1_tum(__VA_ARGS__)

◆ vwredsum_vs_i16m2_i32m1

#define vwredsum_vs_i16m2_i32m1 ( ... ) __riscv_vwredsum_vs_i16m2_i32m1_tu(__VA_ARGS__)

◆ vwredsum_vs_i16m2_i32m1_m

#define vwredsum_vs_i16m2_i32m1_m ( ... ) __riscv_vwredsum_vs_i16m2_i32m1_tum(__VA_ARGS__)

◆ vwredsum_vs_i16m4_i32m1

#define vwredsum_vs_i16m4_i32m1 ( ... ) __riscv_vwredsum_vs_i16m4_i32m1_tu(__VA_ARGS__)

◆ vwredsum_vs_i16m4_i32m1_m

#define vwredsum_vs_i16m4_i32m1_m ( ... ) __riscv_vwredsum_vs_i16m4_i32m1_tum(__VA_ARGS__)

◆ vwredsum_vs_i16m8_i32m1

#define vwredsum_vs_i16m8_i32m1 ( ... ) __riscv_vwredsum_vs_i16m8_i32m1_tu(__VA_ARGS__)

◆ vwredsum_vs_i16m8_i32m1_m

#define vwredsum_vs_i16m8_i32m1_m ( ... ) __riscv_vwredsum_vs_i16m8_i32m1_tum(__VA_ARGS__)

◆ vwredsum_vs_i16mf2_i32m1

#define vwredsum_vs_i16mf2_i32m1 ( ... ) __riscv_vwredsum_vs_i16mf2_i32m1_tu(__VA_ARGS__)

◆ vwredsum_vs_i16mf2_i32m1_m

#define vwredsum_vs_i16mf2_i32m1_m ( ... ) __riscv_vwredsum_vs_i16mf2_i32m1_tum(__VA_ARGS__)

◆ vwredsum_vs_i16mf4_i32m1

#define vwredsum_vs_i16mf4_i32m1 ( ... ) __riscv_vwredsum_vs_i16mf4_i32m1_tu(__VA_ARGS__)

◆ vwredsum_vs_i16mf4_i32m1_m

#define vwredsum_vs_i16mf4_i32m1_m ( ... ) __riscv_vwredsum_vs_i16mf4_i32m1_tum(__VA_ARGS__)

◆ vwredsum_vs_i32m1_i64m1

#define vwredsum_vs_i32m1_i64m1 ( ... ) __riscv_vwredsum_vs_i32m1_i64m1_tu(__VA_ARGS__)

◆ vwredsum_vs_i32m1_i64m1_m

#define vwredsum_vs_i32m1_i64m1_m ( ... ) __riscv_vwredsum_vs_i32m1_i64m1_tum(__VA_ARGS__)

◆ vwredsum_vs_i32m2_i64m1

#define vwredsum_vs_i32m2_i64m1 ( ... ) __riscv_vwredsum_vs_i32m2_i64m1_tu(__VA_ARGS__)

◆ vwredsum_vs_i32m2_i64m1_m

#define vwredsum_vs_i32m2_i64m1_m ( ... ) __riscv_vwredsum_vs_i32m2_i64m1_tum(__VA_ARGS__)

◆ vwredsum_vs_i32m4_i64m1

#define vwredsum_vs_i32m4_i64m1 ( ... ) __riscv_vwredsum_vs_i32m4_i64m1_tu(__VA_ARGS__)

◆ vwredsum_vs_i32m4_i64m1_m

#define vwredsum_vs_i32m4_i64m1_m ( ... ) __riscv_vwredsum_vs_i32m4_i64m1_tum(__VA_ARGS__)

◆ vwredsum_vs_i32m8_i64m1

#define vwredsum_vs_i32m8_i64m1 ( ... ) __riscv_vwredsum_vs_i32m8_i64m1_tu(__VA_ARGS__)

◆ vwredsum_vs_i32m8_i64m1_m

#define vwredsum_vs_i32m8_i64m1_m ( ... ) __riscv_vwredsum_vs_i32m8_i64m1_tum(__VA_ARGS__)

◆ vwredsum_vs_i32mf2_i64m1

#define vwredsum_vs_i32mf2_i64m1 ( ... ) __riscv_vwredsum_vs_i32mf2_i64m1_tu(__VA_ARGS__)

◆ vwredsum_vs_i32mf2_i64m1_m

#define vwredsum_vs_i32mf2_i64m1_m ( ... ) __riscv_vwredsum_vs_i32mf2_i64m1_tum(__VA_ARGS__)

◆ vwredsum_vs_i8m1_i16m1

#define vwredsum_vs_i8m1_i16m1 ( ... ) __riscv_vwredsum_vs_i8m1_i16m1_tu(__VA_ARGS__)

◆ vwredsum_vs_i8m1_i16m1_m

#define vwredsum_vs_i8m1_i16m1_m ( ... ) __riscv_vwredsum_vs_i8m1_i16m1_tum(__VA_ARGS__)

◆ vwredsum_vs_i8m2_i16m1

#define vwredsum_vs_i8m2_i16m1 ( ... ) __riscv_vwredsum_vs_i8m2_i16m1_tu(__VA_ARGS__)

◆ vwredsum_vs_i8m2_i16m1_m

#define vwredsum_vs_i8m2_i16m1_m ( ... ) __riscv_vwredsum_vs_i8m2_i16m1_tum(__VA_ARGS__)

◆ vwredsum_vs_i8m4_i16m1

#define vwredsum_vs_i8m4_i16m1 ( ... ) __riscv_vwredsum_vs_i8m4_i16m1_tu(__VA_ARGS__)

◆ vwredsum_vs_i8m4_i16m1_m

#define vwredsum_vs_i8m4_i16m1_m ( ... ) __riscv_vwredsum_vs_i8m4_i16m1_tum(__VA_ARGS__)

◆ vwredsum_vs_i8m8_i16m1

#define vwredsum_vs_i8m8_i16m1 ( ... ) __riscv_vwredsum_vs_i8m8_i16m1_tu(__VA_ARGS__)

◆ vwredsum_vs_i8m8_i16m1_m

#define vwredsum_vs_i8m8_i16m1_m ( ... ) __riscv_vwredsum_vs_i8m8_i16m1_tum(__VA_ARGS__)

◆ vwredsum_vs_i8mf2_i16m1

#define vwredsum_vs_i8mf2_i16m1 ( ... ) __riscv_vwredsum_vs_i8mf2_i16m1_tu(__VA_ARGS__)

◆ vwredsum_vs_i8mf2_i16m1_m

#define vwredsum_vs_i8mf2_i16m1_m ( ... ) __riscv_vwredsum_vs_i8mf2_i16m1_tum(__VA_ARGS__)

◆ vwredsum_vs_i8mf4_i16m1

#define vwredsum_vs_i8mf4_i16m1 ( ... ) __riscv_vwredsum_vs_i8mf4_i16m1_tu(__VA_ARGS__)

◆ vwredsum_vs_i8mf4_i16m1_m

#define vwredsum_vs_i8mf4_i16m1_m ( ... ) __riscv_vwredsum_vs_i8mf4_i16m1_tum(__VA_ARGS__)

◆ vwredsum_vs_i8mf8_i16m1

#define vwredsum_vs_i8mf8_i16m1 ( ... ) __riscv_vwredsum_vs_i8mf8_i16m1_tu(__VA_ARGS__)

◆ vwredsum_vs_i8mf8_i16m1_m

#define vwredsum_vs_i8mf8_i16m1_m ( ... ) __riscv_vwredsum_vs_i8mf8_i16m1_tum(__VA_ARGS__)

◆ vwredsumu_vs_u16m1_u32m1

#define vwredsumu_vs_u16m1_u32m1 ( ... ) __riscv_vwredsumu_vs_u16m1_u32m1_tu(__VA_ARGS__)

◆ vwredsumu_vs_u16m1_u32m1_m

#define vwredsumu_vs_u16m1_u32m1_m ( ... ) __riscv_vwredsumu_vs_u16m1_u32m1_tum(__VA_ARGS__)

◆ vwredsumu_vs_u16m2_u32m1

#define vwredsumu_vs_u16m2_u32m1 ( ... ) __riscv_vwredsumu_vs_u16m2_u32m1_tu(__VA_ARGS__)

◆ vwredsumu_vs_u16m2_u32m1_m

#define vwredsumu_vs_u16m2_u32m1_m ( ... ) __riscv_vwredsumu_vs_u16m2_u32m1_tum(__VA_ARGS__)

◆ vwredsumu_vs_u16m4_u32m1

#define vwredsumu_vs_u16m4_u32m1 ( ... ) __riscv_vwredsumu_vs_u16m4_u32m1_tu(__VA_ARGS__)

◆ vwredsumu_vs_u16m4_u32m1_m

#define vwredsumu_vs_u16m4_u32m1_m ( ... ) __riscv_vwredsumu_vs_u16m4_u32m1_tum(__VA_ARGS__)

◆ vwredsumu_vs_u16m8_u32m1

#define vwredsumu_vs_u16m8_u32m1 ( ... ) __riscv_vwredsumu_vs_u16m8_u32m1_tu(__VA_ARGS__)

◆ vwredsumu_vs_u16m8_u32m1_m

#define vwredsumu_vs_u16m8_u32m1_m ( ... ) __riscv_vwredsumu_vs_u16m8_u32m1_tum(__VA_ARGS__)

◆ vwredsumu_vs_u16mf2_u32m1

#define vwredsumu_vs_u16mf2_u32m1 ( ... ) __riscv_vwredsumu_vs_u16mf2_u32m1_tu(__VA_ARGS__)

◆ vwredsumu_vs_u16mf2_u32m1_m

#define vwredsumu_vs_u16mf2_u32m1_m ( ... ) __riscv_vwredsumu_vs_u16mf2_u32m1_tum(__VA_ARGS__)

◆ vwredsumu_vs_u16mf4_u32m1

#define vwredsumu_vs_u16mf4_u32m1 ( ... ) __riscv_vwredsumu_vs_u16mf4_u32m1_tu(__VA_ARGS__)

◆ vwredsumu_vs_u16mf4_u32m1_m

#define vwredsumu_vs_u16mf4_u32m1_m ( ... ) __riscv_vwredsumu_vs_u16mf4_u32m1_tum(__VA_ARGS__)

◆ vwredsumu_vs_u32m1_u64m1

#define vwredsumu_vs_u32m1_u64m1 ( ... ) __riscv_vwredsumu_vs_u32m1_u64m1_tu(__VA_ARGS__)

◆ vwredsumu_vs_u32m1_u64m1_m

#define vwredsumu_vs_u32m1_u64m1_m ( ... ) __riscv_vwredsumu_vs_u32m1_u64m1_tum(__VA_ARGS__)

◆ vwredsumu_vs_u32m2_u64m1

#define vwredsumu_vs_u32m2_u64m1 ( ... ) __riscv_vwredsumu_vs_u32m2_u64m1_tu(__VA_ARGS__)

◆ vwredsumu_vs_u32m2_u64m1_m

#define vwredsumu_vs_u32m2_u64m1_m ( ... ) __riscv_vwredsumu_vs_u32m2_u64m1_tum(__VA_ARGS__)

◆ vwredsumu_vs_u32m4_u64m1

#define vwredsumu_vs_u32m4_u64m1 ( ... ) __riscv_vwredsumu_vs_u32m4_u64m1_tu(__VA_ARGS__)

◆ vwredsumu_vs_u32m4_u64m1_m

#define vwredsumu_vs_u32m4_u64m1_m ( ... ) __riscv_vwredsumu_vs_u32m4_u64m1_tum(__VA_ARGS__)

◆ vwredsumu_vs_u32m8_u64m1

#define vwredsumu_vs_u32m8_u64m1 ( ... ) __riscv_vwredsumu_vs_u32m8_u64m1_tu(__VA_ARGS__)

◆ vwredsumu_vs_u32m8_u64m1_m

#define vwredsumu_vs_u32m8_u64m1_m ( ... ) __riscv_vwredsumu_vs_u32m8_u64m1_tum(__VA_ARGS__)

◆ vwredsumu_vs_u32mf2_u64m1

#define vwredsumu_vs_u32mf2_u64m1 ( ... ) __riscv_vwredsumu_vs_u32mf2_u64m1_tu(__VA_ARGS__)

◆ vwredsumu_vs_u32mf2_u64m1_m

#define vwredsumu_vs_u32mf2_u64m1_m ( ... ) __riscv_vwredsumu_vs_u32mf2_u64m1_tum(__VA_ARGS__)

◆ vwredsumu_vs_u8m1_u16m1

#define vwredsumu_vs_u8m1_u16m1 ( ... ) __riscv_vwredsumu_vs_u8m1_u16m1_tu(__VA_ARGS__)

◆ vwredsumu_vs_u8m1_u16m1_m

#define vwredsumu_vs_u8m1_u16m1_m ( ... ) __riscv_vwredsumu_vs_u8m1_u16m1_tum(__VA_ARGS__)

◆ vwredsumu_vs_u8m2_u16m1

#define vwredsumu_vs_u8m2_u16m1 ( ... ) __riscv_vwredsumu_vs_u8m2_u16m1_tu(__VA_ARGS__)

◆ vwredsumu_vs_u8m2_u16m1_m

#define vwredsumu_vs_u8m2_u16m1_m ( ... ) __riscv_vwredsumu_vs_u8m2_u16m1_tum(__VA_ARGS__)

◆ vwredsumu_vs_u8m4_u16m1

#define vwredsumu_vs_u8m4_u16m1 ( ... ) __riscv_vwredsumu_vs_u8m4_u16m1_tu(__VA_ARGS__)

◆ vwredsumu_vs_u8m4_u16m1_m

#define vwredsumu_vs_u8m4_u16m1_m ( ... ) __riscv_vwredsumu_vs_u8m4_u16m1_tum(__VA_ARGS__)

◆ vwredsumu_vs_u8m8_u16m1

#define vwredsumu_vs_u8m8_u16m1 ( ... ) __riscv_vwredsumu_vs_u8m8_u16m1_tu(__VA_ARGS__)

◆ vwredsumu_vs_u8m8_u16m1_m

#define vwredsumu_vs_u8m8_u16m1_m ( ... ) __riscv_vwredsumu_vs_u8m8_u16m1_tum(__VA_ARGS__)

◆ vwredsumu_vs_u8mf2_u16m1

#define vwredsumu_vs_u8mf2_u16m1 ( ... ) __riscv_vwredsumu_vs_u8mf2_u16m1_tu(__VA_ARGS__)

◆ vwredsumu_vs_u8mf2_u16m1_m

#define vwredsumu_vs_u8mf2_u16m1_m ( ... ) __riscv_vwredsumu_vs_u8mf2_u16m1_tum(__VA_ARGS__)

◆ vwredsumu_vs_u8mf4_u16m1

#define vwredsumu_vs_u8mf4_u16m1 ( ... ) __riscv_vwredsumu_vs_u8mf4_u16m1_tu(__VA_ARGS__)

◆ vwredsumu_vs_u8mf4_u16m1_m

#define vwredsumu_vs_u8mf4_u16m1_m ( ... ) __riscv_vwredsumu_vs_u8mf4_u16m1_tum(__VA_ARGS__)

◆ vwredsumu_vs_u8mf8_u16m1

#define vwredsumu_vs_u8mf8_u16m1 ( ... ) __riscv_vwredsumu_vs_u8mf8_u16m1_tu(__VA_ARGS__)

◆ vwredsumu_vs_u8mf8_u16m1_m

#define vwredsumu_vs_u8mf8_u16m1_m ( ... ) __riscv_vwredsumu_vs_u8mf8_u16m1_tum(__VA_ARGS__)

◆ vwsub_vv_i16m1

#define vwsub_vv_i16m1 ( ... ) __riscv_vwsub_vv_i16m1(__VA_ARGS__)

◆ vwsub_vv_i16m1_m

#define vwsub_vv_i16m1_m ( ... ) __riscv_vwsub_vv_i16m1_tumu(__VA_ARGS__)

◆ vwsub_vv_i16m2

#define vwsub_vv_i16m2 ( ... ) __riscv_vwsub_vv_i16m2(__VA_ARGS__)

◆ vwsub_vv_i16m2_m

#define vwsub_vv_i16m2_m ( ... ) __riscv_vwsub_vv_i16m2_tumu(__VA_ARGS__)

◆ vwsub_vv_i16m4

#define vwsub_vv_i16m4 ( ... ) __riscv_vwsub_vv_i16m4(__VA_ARGS__)

◆ vwsub_vv_i16m4_m

#define vwsub_vv_i16m4_m ( ... ) __riscv_vwsub_vv_i16m4_tumu(__VA_ARGS__)

◆ vwsub_vv_i16m8

#define vwsub_vv_i16m8 ( ... ) __riscv_vwsub_vv_i16m8(__VA_ARGS__)

◆ vwsub_vv_i16m8_m

#define vwsub_vv_i16m8_m ( ... ) __riscv_vwsub_vv_i16m8_tumu(__VA_ARGS__)

◆ vwsub_vv_i16mf2

#define vwsub_vv_i16mf2 ( ... ) __riscv_vwsub_vv_i16mf2(__VA_ARGS__)

◆ vwsub_vv_i16mf2_m

#define vwsub_vv_i16mf2_m ( ... ) __riscv_vwsub_vv_i16mf2_tumu(__VA_ARGS__)

◆ vwsub_vv_i16mf4

#define vwsub_vv_i16mf4 ( ... ) __riscv_vwsub_vv_i16mf4(__VA_ARGS__)

◆ vwsub_vv_i16mf4_m

#define vwsub_vv_i16mf4_m ( ... ) __riscv_vwsub_vv_i16mf4_tumu(__VA_ARGS__)

◆ vwsub_vv_i32m1

#define vwsub_vv_i32m1 ( ... ) __riscv_vwsub_vv_i32m1(__VA_ARGS__)

◆ vwsub_vv_i32m1_m

#define vwsub_vv_i32m1_m ( ... ) __riscv_vwsub_vv_i32m1_tumu(__VA_ARGS__)

◆ vwsub_vv_i32m2

#define vwsub_vv_i32m2 ( ... ) __riscv_vwsub_vv_i32m2(__VA_ARGS__)

◆ vwsub_vv_i32m2_m

#define vwsub_vv_i32m2_m ( ... ) __riscv_vwsub_vv_i32m2_tumu(__VA_ARGS__)

◆ vwsub_vv_i32m4

#define vwsub_vv_i32m4 ( ... ) __riscv_vwsub_vv_i32m4(__VA_ARGS__)

◆ vwsub_vv_i32m4_m

#define vwsub_vv_i32m4_m ( ... ) __riscv_vwsub_vv_i32m4_tumu(__VA_ARGS__)

◆ vwsub_vv_i32m8

#define vwsub_vv_i32m8 ( ... ) __riscv_vwsub_vv_i32m8(__VA_ARGS__)

◆ vwsub_vv_i32m8_m

#define vwsub_vv_i32m8_m ( ... ) __riscv_vwsub_vv_i32m8_tumu(__VA_ARGS__)

◆ vwsub_vv_i32mf2

#define vwsub_vv_i32mf2 ( ... ) __riscv_vwsub_vv_i32mf2(__VA_ARGS__)

◆ vwsub_vv_i32mf2_m

#define vwsub_vv_i32mf2_m ( ... ) __riscv_vwsub_vv_i32mf2_tumu(__VA_ARGS__)

◆ vwsub_vv_i64m1

#define vwsub_vv_i64m1 ( ... ) __riscv_vwsub_vv_i64m1(__VA_ARGS__)

◆ vwsub_vv_i64m1_m

#define vwsub_vv_i64m1_m ( ... ) __riscv_vwsub_vv_i64m1_tumu(__VA_ARGS__)

◆ vwsub_vv_i64m2

#define vwsub_vv_i64m2 ( ... ) __riscv_vwsub_vv_i64m2(__VA_ARGS__)

◆ vwsub_vv_i64m2_m

#define vwsub_vv_i64m2_m ( ... ) __riscv_vwsub_vv_i64m2_tumu(__VA_ARGS__)

◆ vwsub_vv_i64m4

#define vwsub_vv_i64m4 ( ... ) __riscv_vwsub_vv_i64m4(__VA_ARGS__)

◆ vwsub_vv_i64m4_m

#define vwsub_vv_i64m4_m ( ... ) __riscv_vwsub_vv_i64m4_tumu(__VA_ARGS__)

◆ vwsub_vv_i64m8

#define vwsub_vv_i64m8 ( ... ) __riscv_vwsub_vv_i64m8(__VA_ARGS__)

◆ vwsub_vv_i64m8_m

#define vwsub_vv_i64m8_m ( ... ) __riscv_vwsub_vv_i64m8_tumu(__VA_ARGS__)

◆ vwsub_vx_i16m1

#define vwsub_vx_i16m1 ( ... ) __riscv_vwsub_vx_i16m1(__VA_ARGS__)

◆ vwsub_vx_i16m1_m

#define vwsub_vx_i16m1_m ( ... ) __riscv_vwsub_vx_i16m1_tumu(__VA_ARGS__)

◆ vwsub_vx_i16m2

#define vwsub_vx_i16m2 ( ... ) __riscv_vwsub_vx_i16m2(__VA_ARGS__)

◆ vwsub_vx_i16m2_m

#define vwsub_vx_i16m2_m ( ... ) __riscv_vwsub_vx_i16m2_tumu(__VA_ARGS__)

◆ vwsub_vx_i16m4

#define vwsub_vx_i16m4 ( ... ) __riscv_vwsub_vx_i16m4(__VA_ARGS__)

◆ vwsub_vx_i16m4_m

#define vwsub_vx_i16m4_m ( ... ) __riscv_vwsub_vx_i16m4_tumu(__VA_ARGS__)

◆ vwsub_vx_i16m8

#define vwsub_vx_i16m8 ( ... ) __riscv_vwsub_vx_i16m8(__VA_ARGS__)

◆ vwsub_vx_i16m8_m

#define vwsub_vx_i16m8_m ( ... ) __riscv_vwsub_vx_i16m8_tumu(__VA_ARGS__)

◆ vwsub_vx_i16mf2

#define vwsub_vx_i16mf2 ( ... ) __riscv_vwsub_vx_i16mf2(__VA_ARGS__)

◆ vwsub_vx_i16mf2_m

#define vwsub_vx_i16mf2_m ( ... ) __riscv_vwsub_vx_i16mf2_tumu(__VA_ARGS__)

◆ vwsub_vx_i16mf4

#define vwsub_vx_i16mf4 ( ... ) __riscv_vwsub_vx_i16mf4(__VA_ARGS__)

◆ vwsub_vx_i16mf4_m

#define vwsub_vx_i16mf4_m ( ... ) __riscv_vwsub_vx_i16mf4_tumu(__VA_ARGS__)

◆ vwsub_vx_i32m1

#define vwsub_vx_i32m1 ( ... ) __riscv_vwsub_vx_i32m1(__VA_ARGS__)

◆ vwsub_vx_i32m1_m

#define vwsub_vx_i32m1_m ( ... ) __riscv_vwsub_vx_i32m1_tumu(__VA_ARGS__)

◆ vwsub_vx_i32m2

#define vwsub_vx_i32m2 ( ... ) __riscv_vwsub_vx_i32m2(__VA_ARGS__)

◆ vwsub_vx_i32m2_m

#define vwsub_vx_i32m2_m ( ... ) __riscv_vwsub_vx_i32m2_tumu(__VA_ARGS__)

◆ vwsub_vx_i32m4

#define vwsub_vx_i32m4 ( ... ) __riscv_vwsub_vx_i32m4(__VA_ARGS__)

◆ vwsub_vx_i32m4_m

#define vwsub_vx_i32m4_m ( ... ) __riscv_vwsub_vx_i32m4_tumu(__VA_ARGS__)

◆ vwsub_vx_i32m8

#define vwsub_vx_i32m8 ( ... ) __riscv_vwsub_vx_i32m8(__VA_ARGS__)

◆ vwsub_vx_i32m8_m

#define vwsub_vx_i32m8_m ( ... ) __riscv_vwsub_vx_i32m8_tumu(__VA_ARGS__)

◆ vwsub_vx_i32mf2

#define vwsub_vx_i32mf2 ( ... ) __riscv_vwsub_vx_i32mf2(__VA_ARGS__)

◆ vwsub_vx_i32mf2_m

#define vwsub_vx_i32mf2_m ( ... ) __riscv_vwsub_vx_i32mf2_tumu(__VA_ARGS__)

◆ vwsub_vx_i64m1

#define vwsub_vx_i64m1 ( ... ) __riscv_vwsub_vx_i64m1(__VA_ARGS__)

◆ vwsub_vx_i64m1_m

#define vwsub_vx_i64m1_m ( ... ) __riscv_vwsub_vx_i64m1_tumu(__VA_ARGS__)

◆ vwsub_vx_i64m2

#define vwsub_vx_i64m2 ( ... ) __riscv_vwsub_vx_i64m2(__VA_ARGS__)

◆ vwsub_vx_i64m2_m

#define vwsub_vx_i64m2_m ( ... ) __riscv_vwsub_vx_i64m2_tumu(__VA_ARGS__)

◆ vwsub_vx_i64m4

#define vwsub_vx_i64m4 ( ... ) __riscv_vwsub_vx_i64m4(__VA_ARGS__)

◆ vwsub_vx_i64m4_m

#define vwsub_vx_i64m4_m ( ... ) __riscv_vwsub_vx_i64m4_tumu(__VA_ARGS__)

◆ vwsub_vx_i64m8

#define vwsub_vx_i64m8 ( ... ) __riscv_vwsub_vx_i64m8(__VA_ARGS__)

◆ vwsub_vx_i64m8_m

#define vwsub_vx_i64m8_m ( ... ) __riscv_vwsub_vx_i64m8_tumu(__VA_ARGS__)

◆ vwsub_wv_i16m1

#define vwsub_wv_i16m1 ( ... ) __riscv_vwsub_wv_i16m1(__VA_ARGS__)

◆ vwsub_wv_i16m1_m

#define vwsub_wv_i16m1_m ( ... ) __riscv_vwsub_wv_i16m1_tumu(__VA_ARGS__)

◆ vwsub_wv_i16m2

#define vwsub_wv_i16m2 ( ... ) __riscv_vwsub_wv_i16m2(__VA_ARGS__)

◆ vwsub_wv_i16m2_m

#define vwsub_wv_i16m2_m ( ... ) __riscv_vwsub_wv_i16m2_tumu(__VA_ARGS__)

◆ vwsub_wv_i16m4

#define vwsub_wv_i16m4 ( ... ) __riscv_vwsub_wv_i16m4(__VA_ARGS__)

◆ vwsub_wv_i16m4_m

#define vwsub_wv_i16m4_m ( ... ) __riscv_vwsub_wv_i16m4_tumu(__VA_ARGS__)

◆ vwsub_wv_i16m8

#define vwsub_wv_i16m8 ( ... ) __riscv_vwsub_wv_i16m8(__VA_ARGS__)

◆ vwsub_wv_i16m8_m

#define vwsub_wv_i16m8_m ( ... ) __riscv_vwsub_wv_i16m8_tumu(__VA_ARGS__)

◆ vwsub_wv_i16mf2

#define vwsub_wv_i16mf2 ( ... ) __riscv_vwsub_wv_i16mf2(__VA_ARGS__)

◆ vwsub_wv_i16mf2_m

#define vwsub_wv_i16mf2_m ( ... ) __riscv_vwsub_wv_i16mf2_tumu(__VA_ARGS__)

◆ vwsub_wv_i16mf4

#define vwsub_wv_i16mf4 ( ... ) __riscv_vwsub_wv_i16mf4(__VA_ARGS__)

◆ vwsub_wv_i16mf4_m

#define vwsub_wv_i16mf4_m ( ... ) __riscv_vwsub_wv_i16mf4_tumu(__VA_ARGS__)

◆ vwsub_wv_i32m1

#define vwsub_wv_i32m1 ( ... ) __riscv_vwsub_wv_i32m1(__VA_ARGS__)

◆ vwsub_wv_i32m1_m

#define vwsub_wv_i32m1_m ( ... ) __riscv_vwsub_wv_i32m1_tumu(__VA_ARGS__)

◆ vwsub_wv_i32m2

#define vwsub_wv_i32m2 ( ... ) __riscv_vwsub_wv_i32m2(__VA_ARGS__)

◆ vwsub_wv_i32m2_m

#define vwsub_wv_i32m2_m ( ... ) __riscv_vwsub_wv_i32m2_tumu(__VA_ARGS__)

◆ vwsub_wv_i32m4

#define vwsub_wv_i32m4 ( ... ) __riscv_vwsub_wv_i32m4(__VA_ARGS__)

◆ vwsub_wv_i32m4_m

#define vwsub_wv_i32m4_m ( ... ) __riscv_vwsub_wv_i32m4_tumu(__VA_ARGS__)

◆ vwsub_wv_i32m8

#define vwsub_wv_i32m8 ( ... ) __riscv_vwsub_wv_i32m8(__VA_ARGS__)

◆ vwsub_wv_i32m8_m

#define vwsub_wv_i32m8_m ( ... ) __riscv_vwsub_wv_i32m8_tumu(__VA_ARGS__)

◆ vwsub_wv_i32mf2

#define vwsub_wv_i32mf2 ( ... ) __riscv_vwsub_wv_i32mf2(__VA_ARGS__)

◆ vwsub_wv_i32mf2_m

#define vwsub_wv_i32mf2_m ( ... ) __riscv_vwsub_wv_i32mf2_tumu(__VA_ARGS__)

◆ vwsub_wv_i64m1

#define vwsub_wv_i64m1 ( ... ) __riscv_vwsub_wv_i64m1(__VA_ARGS__)

◆ vwsub_wv_i64m1_m

#define vwsub_wv_i64m1_m ( ... ) __riscv_vwsub_wv_i64m1_tumu(__VA_ARGS__)

◆ vwsub_wv_i64m2

#define vwsub_wv_i64m2 ( ... ) __riscv_vwsub_wv_i64m2(__VA_ARGS__)

◆ vwsub_wv_i64m2_m

#define vwsub_wv_i64m2_m ( ... ) __riscv_vwsub_wv_i64m2_tumu(__VA_ARGS__)

◆ vwsub_wv_i64m4

#define vwsub_wv_i64m4 ( ... ) __riscv_vwsub_wv_i64m4(__VA_ARGS__)

◆ vwsub_wv_i64m4_m

#define vwsub_wv_i64m4_m ( ... ) __riscv_vwsub_wv_i64m4_tumu(__VA_ARGS__)

◆ vwsub_wv_i64m8

#define vwsub_wv_i64m8 ( ... ) __riscv_vwsub_wv_i64m8(__VA_ARGS__)

◆ vwsub_wv_i64m8_m

#define vwsub_wv_i64m8_m ( ... ) __riscv_vwsub_wv_i64m8_tumu(__VA_ARGS__)

◆ vwsub_wx_i16m1

#define vwsub_wx_i16m1 ( ... ) __riscv_vwsub_wx_i16m1(__VA_ARGS__)

◆ vwsub_wx_i16m1_m

#define vwsub_wx_i16m1_m ( ... ) __riscv_vwsub_wx_i16m1_tumu(__VA_ARGS__)

◆ vwsub_wx_i16m2

#define vwsub_wx_i16m2 ( ... ) __riscv_vwsub_wx_i16m2(__VA_ARGS__)

◆ vwsub_wx_i16m2_m

#define vwsub_wx_i16m2_m ( ... ) __riscv_vwsub_wx_i16m2_tumu(__VA_ARGS__)

◆ vwsub_wx_i16m4

#define vwsub_wx_i16m4 ( ... ) __riscv_vwsub_wx_i16m4(__VA_ARGS__)

◆ vwsub_wx_i16m4_m

#define vwsub_wx_i16m4_m ( ... ) __riscv_vwsub_wx_i16m4_tumu(__VA_ARGS__)

◆ vwsub_wx_i16m8

#define vwsub_wx_i16m8 ( ... ) __riscv_vwsub_wx_i16m8(__VA_ARGS__)

◆ vwsub_wx_i16m8_m

#define vwsub_wx_i16m8_m ( ... ) __riscv_vwsub_wx_i16m8_tumu(__VA_ARGS__)

◆ vwsub_wx_i16mf2

#define vwsub_wx_i16mf2 ( ... ) __riscv_vwsub_wx_i16mf2(__VA_ARGS__)

◆ vwsub_wx_i16mf2_m

#define vwsub_wx_i16mf2_m ( ... ) __riscv_vwsub_wx_i16mf2_tumu(__VA_ARGS__)

◆ vwsub_wx_i16mf4

#define vwsub_wx_i16mf4 ( ... ) __riscv_vwsub_wx_i16mf4(__VA_ARGS__)

◆ vwsub_wx_i16mf4_m

#define vwsub_wx_i16mf4_m ( ... ) __riscv_vwsub_wx_i16mf4_tumu(__VA_ARGS__)

◆ vwsub_wx_i32m1

#define vwsub_wx_i32m1 ( ... ) __riscv_vwsub_wx_i32m1(__VA_ARGS__)

◆ vwsub_wx_i32m1_m

#define vwsub_wx_i32m1_m ( ... ) __riscv_vwsub_wx_i32m1_tumu(__VA_ARGS__)

◆ vwsub_wx_i32m2

#define vwsub_wx_i32m2 ( ... ) __riscv_vwsub_wx_i32m2(__VA_ARGS__)

◆ vwsub_wx_i32m2_m

#define vwsub_wx_i32m2_m ( ... ) __riscv_vwsub_wx_i32m2_tumu(__VA_ARGS__)

◆ vwsub_wx_i32m4

#define vwsub_wx_i32m4 ( ... ) __riscv_vwsub_wx_i32m4(__VA_ARGS__)

◆ vwsub_wx_i32m4_m

#define vwsub_wx_i32m4_m ( ... ) __riscv_vwsub_wx_i32m4_tumu(__VA_ARGS__)

◆ vwsub_wx_i32m8

#define vwsub_wx_i32m8 ( ... ) __riscv_vwsub_wx_i32m8(__VA_ARGS__)

◆ vwsub_wx_i32m8_m

#define vwsub_wx_i32m8_m ( ... ) __riscv_vwsub_wx_i32m8_tumu(__VA_ARGS__)

◆ vwsub_wx_i32mf2

#define vwsub_wx_i32mf2 ( ... ) __riscv_vwsub_wx_i32mf2(__VA_ARGS__)

◆ vwsub_wx_i32mf2_m

#define vwsub_wx_i32mf2_m ( ... ) __riscv_vwsub_wx_i32mf2_tumu(__VA_ARGS__)

◆ vwsub_wx_i64m1

#define vwsub_wx_i64m1 ( ... ) __riscv_vwsub_wx_i64m1(__VA_ARGS__)

◆ vwsub_wx_i64m1_m

#define vwsub_wx_i64m1_m ( ... ) __riscv_vwsub_wx_i64m1_tumu(__VA_ARGS__)

◆ vwsub_wx_i64m2

#define vwsub_wx_i64m2 ( ... ) __riscv_vwsub_wx_i64m2(__VA_ARGS__)

◆ vwsub_wx_i64m2_m

#define vwsub_wx_i64m2_m ( ... ) __riscv_vwsub_wx_i64m2_tumu(__VA_ARGS__)

◆ vwsub_wx_i64m4

#define vwsub_wx_i64m4 ( ... ) __riscv_vwsub_wx_i64m4(__VA_ARGS__)

◆ vwsub_wx_i64m4_m

#define vwsub_wx_i64m4_m ( ... ) __riscv_vwsub_wx_i64m4_tumu(__VA_ARGS__)

◆ vwsub_wx_i64m8

#define vwsub_wx_i64m8 ( ... ) __riscv_vwsub_wx_i64m8(__VA_ARGS__)

◆ vwsub_wx_i64m8_m

#define vwsub_wx_i64m8_m ( ... ) __riscv_vwsub_wx_i64m8_tumu(__VA_ARGS__)

◆ vwsubu_vv_u16m1

#define vwsubu_vv_u16m1 ( ... ) __riscv_vwsubu_vv_u16m1(__VA_ARGS__)

◆ vwsubu_vv_u16m1_m

#define vwsubu_vv_u16m1_m ( ... ) __riscv_vwsubu_vv_u16m1_tumu(__VA_ARGS__)

◆ vwsubu_vv_u16m2

#define vwsubu_vv_u16m2 ( ... ) __riscv_vwsubu_vv_u16m2(__VA_ARGS__)

◆ vwsubu_vv_u16m2_m

#define vwsubu_vv_u16m2_m ( ... ) __riscv_vwsubu_vv_u16m2_tumu(__VA_ARGS__)

◆ vwsubu_vv_u16m4

#define vwsubu_vv_u16m4 ( ... ) __riscv_vwsubu_vv_u16m4(__VA_ARGS__)

◆ vwsubu_vv_u16m4_m

#define vwsubu_vv_u16m4_m ( ... ) __riscv_vwsubu_vv_u16m4_tumu(__VA_ARGS__)

◆ vwsubu_vv_u16m8

#define vwsubu_vv_u16m8 ( ... ) __riscv_vwsubu_vv_u16m8(__VA_ARGS__)

◆ vwsubu_vv_u16m8_m

#define vwsubu_vv_u16m8_m ( ... ) __riscv_vwsubu_vv_u16m8_tumu(__VA_ARGS__)

◆ vwsubu_vv_u16mf2

#define vwsubu_vv_u16mf2 ( ... ) __riscv_vwsubu_vv_u16mf2(__VA_ARGS__)

◆ vwsubu_vv_u16mf2_m

#define vwsubu_vv_u16mf2_m ( ... ) __riscv_vwsubu_vv_u16mf2_tumu(__VA_ARGS__)

◆ vwsubu_vv_u16mf4

#define vwsubu_vv_u16mf4 ( ... ) __riscv_vwsubu_vv_u16mf4(__VA_ARGS__)

◆ vwsubu_vv_u16mf4_m

#define vwsubu_vv_u16mf4_m ( ... ) __riscv_vwsubu_vv_u16mf4_tumu(__VA_ARGS__)

◆ vwsubu_vv_u32m1

#define vwsubu_vv_u32m1 ( ... ) __riscv_vwsubu_vv_u32m1(__VA_ARGS__)

◆ vwsubu_vv_u32m1_m

#define vwsubu_vv_u32m1_m ( ... ) __riscv_vwsubu_vv_u32m1_tumu(__VA_ARGS__)

◆ vwsubu_vv_u32m2

#define vwsubu_vv_u32m2 ( ... ) __riscv_vwsubu_vv_u32m2(__VA_ARGS__)

◆ vwsubu_vv_u32m2_m

#define vwsubu_vv_u32m2_m ( ... ) __riscv_vwsubu_vv_u32m2_tumu(__VA_ARGS__)

◆ vwsubu_vv_u32m4

#define vwsubu_vv_u32m4 ( ... ) __riscv_vwsubu_vv_u32m4(__VA_ARGS__)

◆ vwsubu_vv_u32m4_m

#define vwsubu_vv_u32m4_m ( ... ) __riscv_vwsubu_vv_u32m4_tumu(__VA_ARGS__)

◆ vwsubu_vv_u32m8

#define vwsubu_vv_u32m8 ( ... ) __riscv_vwsubu_vv_u32m8(__VA_ARGS__)

◆ vwsubu_vv_u32m8_m

#define vwsubu_vv_u32m8_m ( ... ) __riscv_vwsubu_vv_u32m8_tumu(__VA_ARGS__)

◆ vwsubu_vv_u32mf2

#define vwsubu_vv_u32mf2 ( ... ) __riscv_vwsubu_vv_u32mf2(__VA_ARGS__)

◆ vwsubu_vv_u32mf2_m

#define vwsubu_vv_u32mf2_m ( ... ) __riscv_vwsubu_vv_u32mf2_tumu(__VA_ARGS__)

◆ vwsubu_vv_u64m1

#define vwsubu_vv_u64m1 ( ... ) __riscv_vwsubu_vv_u64m1(__VA_ARGS__)

◆ vwsubu_vv_u64m1_m

#define vwsubu_vv_u64m1_m ( ... ) __riscv_vwsubu_vv_u64m1_tumu(__VA_ARGS__)

◆ vwsubu_vv_u64m2

#define vwsubu_vv_u64m2 ( ... ) __riscv_vwsubu_vv_u64m2(__VA_ARGS__)

◆ vwsubu_vv_u64m2_m

#define vwsubu_vv_u64m2_m ( ... ) __riscv_vwsubu_vv_u64m2_tumu(__VA_ARGS__)

◆ vwsubu_vv_u64m4

#define vwsubu_vv_u64m4 ( ... ) __riscv_vwsubu_vv_u64m4(__VA_ARGS__)

◆ vwsubu_vv_u64m4_m

#define vwsubu_vv_u64m4_m ( ... ) __riscv_vwsubu_vv_u64m4_tumu(__VA_ARGS__)

◆ vwsubu_vv_u64m8

#define vwsubu_vv_u64m8 ( ... ) __riscv_vwsubu_vv_u64m8(__VA_ARGS__)

◆ vwsubu_vv_u64m8_m

#define vwsubu_vv_u64m8_m ( ... ) __riscv_vwsubu_vv_u64m8_tumu(__VA_ARGS__)

◆ vwsubu_vx_u16m1

#define vwsubu_vx_u16m1 ( ... ) __riscv_vwsubu_vx_u16m1(__VA_ARGS__)

◆ vwsubu_vx_u16m1_m

#define vwsubu_vx_u16m1_m ( ... ) __riscv_vwsubu_vx_u16m1_tumu(__VA_ARGS__)

◆ vwsubu_vx_u16m2

#define vwsubu_vx_u16m2 ( ... ) __riscv_vwsubu_vx_u16m2(__VA_ARGS__)

◆ vwsubu_vx_u16m2_m

#define vwsubu_vx_u16m2_m ( ... ) __riscv_vwsubu_vx_u16m2_tumu(__VA_ARGS__)

◆ vwsubu_vx_u16m4

#define vwsubu_vx_u16m4 ( ... ) __riscv_vwsubu_vx_u16m4(__VA_ARGS__)

◆ vwsubu_vx_u16m4_m

#define vwsubu_vx_u16m4_m ( ... ) __riscv_vwsubu_vx_u16m4_tumu(__VA_ARGS__)

◆ vwsubu_vx_u16m8

#define vwsubu_vx_u16m8 ( ... ) __riscv_vwsubu_vx_u16m8(__VA_ARGS__)

◆ vwsubu_vx_u16m8_m

#define vwsubu_vx_u16m8_m ( ... ) __riscv_vwsubu_vx_u16m8_tumu(__VA_ARGS__)

◆ vwsubu_vx_u16mf2

#define vwsubu_vx_u16mf2 ( ... ) __riscv_vwsubu_vx_u16mf2(__VA_ARGS__)

◆ vwsubu_vx_u16mf2_m

#define vwsubu_vx_u16mf2_m ( ... ) __riscv_vwsubu_vx_u16mf2_tumu(__VA_ARGS__)

◆ vwsubu_vx_u16mf4

#define vwsubu_vx_u16mf4 ( ... ) __riscv_vwsubu_vx_u16mf4(__VA_ARGS__)

◆ vwsubu_vx_u16mf4_m

#define vwsubu_vx_u16mf4_m ( ... ) __riscv_vwsubu_vx_u16mf4_tumu(__VA_ARGS__)

◆ vwsubu_vx_u32m1

#define vwsubu_vx_u32m1 ( ... ) __riscv_vwsubu_vx_u32m1(__VA_ARGS__)

◆ vwsubu_vx_u32m1_m

#define vwsubu_vx_u32m1_m ( ... ) __riscv_vwsubu_vx_u32m1_tumu(__VA_ARGS__)

◆ vwsubu_vx_u32m2

#define vwsubu_vx_u32m2 ( ... ) __riscv_vwsubu_vx_u32m2(__VA_ARGS__)

◆ vwsubu_vx_u32m2_m

#define vwsubu_vx_u32m2_m ( ... ) __riscv_vwsubu_vx_u32m2_tumu(__VA_ARGS__)

◆ vwsubu_vx_u32m4

#define vwsubu_vx_u32m4 ( ... ) __riscv_vwsubu_vx_u32m4(__VA_ARGS__)

◆ vwsubu_vx_u32m4_m

#define vwsubu_vx_u32m4_m ( ... ) __riscv_vwsubu_vx_u32m4_tumu(__VA_ARGS__)

◆ vwsubu_vx_u32m8

#define vwsubu_vx_u32m8 ( ... ) __riscv_vwsubu_vx_u32m8(__VA_ARGS__)

◆ vwsubu_vx_u32m8_m

#define vwsubu_vx_u32m8_m ( ... ) __riscv_vwsubu_vx_u32m8_tumu(__VA_ARGS__)

◆ vwsubu_vx_u32mf2

#define vwsubu_vx_u32mf2 ( ... ) __riscv_vwsubu_vx_u32mf2(__VA_ARGS__)

◆ vwsubu_vx_u32mf2_m

#define vwsubu_vx_u32mf2_m ( ... ) __riscv_vwsubu_vx_u32mf2_tumu(__VA_ARGS__)

◆ vwsubu_vx_u64m1

#define vwsubu_vx_u64m1 ( ... ) __riscv_vwsubu_vx_u64m1(__VA_ARGS__)

◆ vwsubu_vx_u64m1_m

#define vwsubu_vx_u64m1_m ( ... ) __riscv_vwsubu_vx_u64m1_tumu(__VA_ARGS__)

◆ vwsubu_vx_u64m2

#define vwsubu_vx_u64m2 ( ... ) __riscv_vwsubu_vx_u64m2(__VA_ARGS__)

◆ vwsubu_vx_u64m2_m

#define vwsubu_vx_u64m2_m ( ... ) __riscv_vwsubu_vx_u64m2_tumu(__VA_ARGS__)

◆ vwsubu_vx_u64m4

#define vwsubu_vx_u64m4 ( ... ) __riscv_vwsubu_vx_u64m4(__VA_ARGS__)

◆ vwsubu_vx_u64m4_m

#define vwsubu_vx_u64m4_m ( ... ) __riscv_vwsubu_vx_u64m4_tumu(__VA_ARGS__)

◆ vwsubu_vx_u64m8

#define vwsubu_vx_u64m8 ( ... ) __riscv_vwsubu_vx_u64m8(__VA_ARGS__)

◆ vwsubu_vx_u64m8_m

#define vwsubu_vx_u64m8_m ( ... ) __riscv_vwsubu_vx_u64m8_tumu(__VA_ARGS__)

◆ vwsubu_wv_u16m1

#define vwsubu_wv_u16m1 ( ... ) __riscv_vwsubu_wv_u16m1(__VA_ARGS__)

◆ vwsubu_wv_u16m1_m

#define vwsubu_wv_u16m1_m ( ... ) __riscv_vwsubu_wv_u16m1_tumu(__VA_ARGS__)

◆ vwsubu_wv_u16m2

#define vwsubu_wv_u16m2 ( ... ) __riscv_vwsubu_wv_u16m2(__VA_ARGS__)

◆ vwsubu_wv_u16m2_m

#define vwsubu_wv_u16m2_m ( ... ) __riscv_vwsubu_wv_u16m2_tumu(__VA_ARGS__)

◆ vwsubu_wv_u16m4

#define vwsubu_wv_u16m4 ( ... ) __riscv_vwsubu_wv_u16m4(__VA_ARGS__)

◆ vwsubu_wv_u16m4_m

#define vwsubu_wv_u16m4_m ( ... ) __riscv_vwsubu_wv_u16m4_tumu(__VA_ARGS__)

◆ vwsubu_wv_u16m8

#define vwsubu_wv_u16m8 ( ... ) __riscv_vwsubu_wv_u16m8(__VA_ARGS__)

◆ vwsubu_wv_u16m8_m

#define vwsubu_wv_u16m8_m ( ... ) __riscv_vwsubu_wv_u16m8_tumu(__VA_ARGS__)

◆ vwsubu_wv_u16mf2

#define vwsubu_wv_u16mf2 ( ... ) __riscv_vwsubu_wv_u16mf2(__VA_ARGS__)

◆ vwsubu_wv_u16mf2_m

#define vwsubu_wv_u16mf2_m ( ... ) __riscv_vwsubu_wv_u16mf2_tumu(__VA_ARGS__)

◆ vwsubu_wv_u16mf4

#define vwsubu_wv_u16mf4 ( ... ) __riscv_vwsubu_wv_u16mf4(__VA_ARGS__)

◆ vwsubu_wv_u16mf4_m

#define vwsubu_wv_u16mf4_m ( ... ) __riscv_vwsubu_wv_u16mf4_tumu(__VA_ARGS__)

◆ vwsubu_wv_u32m1

#define vwsubu_wv_u32m1 ( ... ) __riscv_vwsubu_wv_u32m1(__VA_ARGS__)

◆ vwsubu_wv_u32m1_m

#define vwsubu_wv_u32m1_m ( ... ) __riscv_vwsubu_wv_u32m1_tumu(__VA_ARGS__)

◆ vwsubu_wv_u32m2

#define vwsubu_wv_u32m2 ( ... ) __riscv_vwsubu_wv_u32m2(__VA_ARGS__)

◆ vwsubu_wv_u32m2_m

#define vwsubu_wv_u32m2_m ( ... ) __riscv_vwsubu_wv_u32m2_tumu(__VA_ARGS__)

◆ vwsubu_wv_u32m4

#define vwsubu_wv_u32m4 ( ... ) __riscv_vwsubu_wv_u32m4(__VA_ARGS__)

◆ vwsubu_wv_u32m4_m

#define vwsubu_wv_u32m4_m ( ... ) __riscv_vwsubu_wv_u32m4_tumu(__VA_ARGS__)

◆ vwsubu_wv_u32m8

#define vwsubu_wv_u32m8 ( ... ) __riscv_vwsubu_wv_u32m8(__VA_ARGS__)

◆ vwsubu_wv_u32m8_m

#define vwsubu_wv_u32m8_m ( ... ) __riscv_vwsubu_wv_u32m8_tumu(__VA_ARGS__)

◆ vwsubu_wv_u32mf2

#define vwsubu_wv_u32mf2 ( ... ) __riscv_vwsubu_wv_u32mf2(__VA_ARGS__)

◆ vwsubu_wv_u32mf2_m

#define vwsubu_wv_u32mf2_m ( ... ) __riscv_vwsubu_wv_u32mf2_tumu(__VA_ARGS__)

◆ vwsubu_wv_u64m1

#define vwsubu_wv_u64m1 ( ... ) __riscv_vwsubu_wv_u64m1(__VA_ARGS__)

◆ vwsubu_wv_u64m1_m

#define vwsubu_wv_u64m1_m ( ... ) __riscv_vwsubu_wv_u64m1_tumu(__VA_ARGS__)

◆ vwsubu_wv_u64m2

#define vwsubu_wv_u64m2 ( ... ) __riscv_vwsubu_wv_u64m2(__VA_ARGS__)

◆ vwsubu_wv_u64m2_m

#define vwsubu_wv_u64m2_m ( ... ) __riscv_vwsubu_wv_u64m2_tumu(__VA_ARGS__)

◆ vwsubu_wv_u64m4

#define vwsubu_wv_u64m4 ( ... ) __riscv_vwsubu_wv_u64m4(__VA_ARGS__)

◆ vwsubu_wv_u64m4_m

#define vwsubu_wv_u64m4_m ( ... ) __riscv_vwsubu_wv_u64m4_tumu(__VA_ARGS__)

◆ vwsubu_wv_u64m8

#define vwsubu_wv_u64m8 ( ... ) __riscv_vwsubu_wv_u64m8(__VA_ARGS__)

◆ vwsubu_wv_u64m8_m

#define vwsubu_wv_u64m8_m ( ... ) __riscv_vwsubu_wv_u64m8_tumu(__VA_ARGS__)

◆ vwsubu_wx_u16m1

#define vwsubu_wx_u16m1 ( ... ) __riscv_vwsubu_wx_u16m1(__VA_ARGS__)

◆ vwsubu_wx_u16m1_m

#define vwsubu_wx_u16m1_m ( ... ) __riscv_vwsubu_wx_u16m1_tumu(__VA_ARGS__)

◆ vwsubu_wx_u16m2

#define vwsubu_wx_u16m2 ( ... ) __riscv_vwsubu_wx_u16m2(__VA_ARGS__)

◆ vwsubu_wx_u16m2_m

#define vwsubu_wx_u16m2_m ( ... ) __riscv_vwsubu_wx_u16m2_tumu(__VA_ARGS__)

◆ vwsubu_wx_u16m4

#define vwsubu_wx_u16m4 ( ... ) __riscv_vwsubu_wx_u16m4(__VA_ARGS__)

◆ vwsubu_wx_u16m4_m

#define vwsubu_wx_u16m4_m ( ... ) __riscv_vwsubu_wx_u16m4_tumu(__VA_ARGS__)

◆ vwsubu_wx_u16m8

#define vwsubu_wx_u16m8 ( ... ) __riscv_vwsubu_wx_u16m8(__VA_ARGS__)

◆ vwsubu_wx_u16m8_m

#define vwsubu_wx_u16m8_m ( ... ) __riscv_vwsubu_wx_u16m8_tumu(__VA_ARGS__)

◆ vwsubu_wx_u16mf2

#define vwsubu_wx_u16mf2 ( ... ) __riscv_vwsubu_wx_u16mf2(__VA_ARGS__)

◆ vwsubu_wx_u16mf2_m

#define vwsubu_wx_u16mf2_m ( ... ) __riscv_vwsubu_wx_u16mf2_tumu(__VA_ARGS__)

◆ vwsubu_wx_u16mf4

#define vwsubu_wx_u16mf4 ( ... ) __riscv_vwsubu_wx_u16mf4(__VA_ARGS__)

◆ vwsubu_wx_u16mf4_m

#define vwsubu_wx_u16mf4_m ( ... ) __riscv_vwsubu_wx_u16mf4_tumu(__VA_ARGS__)

◆ vwsubu_wx_u32m1

#define vwsubu_wx_u32m1 ( ... ) __riscv_vwsubu_wx_u32m1(__VA_ARGS__)

◆ vwsubu_wx_u32m1_m

#define vwsubu_wx_u32m1_m ( ... ) __riscv_vwsubu_wx_u32m1_tumu(__VA_ARGS__)

◆ vwsubu_wx_u32m2

#define vwsubu_wx_u32m2 ( ... ) __riscv_vwsubu_wx_u32m2(__VA_ARGS__)

◆ vwsubu_wx_u32m2_m

#define vwsubu_wx_u32m2_m ( ... ) __riscv_vwsubu_wx_u32m2_tumu(__VA_ARGS__)

◆ vwsubu_wx_u32m4

#define vwsubu_wx_u32m4 ( ... ) __riscv_vwsubu_wx_u32m4(__VA_ARGS__)

◆ vwsubu_wx_u32m4_m

#define vwsubu_wx_u32m4_m ( ... ) __riscv_vwsubu_wx_u32m4_tumu(__VA_ARGS__)

◆ vwsubu_wx_u32m8

#define vwsubu_wx_u32m8 ( ... ) __riscv_vwsubu_wx_u32m8(__VA_ARGS__)

◆ vwsubu_wx_u32m8_m

#define vwsubu_wx_u32m8_m ( ... ) __riscv_vwsubu_wx_u32m8_tumu(__VA_ARGS__)

◆ vwsubu_wx_u32mf2

#define vwsubu_wx_u32mf2 ( ... ) __riscv_vwsubu_wx_u32mf2(__VA_ARGS__)

◆ vwsubu_wx_u32mf2_m

#define vwsubu_wx_u32mf2_m ( ... ) __riscv_vwsubu_wx_u32mf2_tumu(__VA_ARGS__)

◆ vwsubu_wx_u64m1

#define vwsubu_wx_u64m1 ( ... ) __riscv_vwsubu_wx_u64m1(__VA_ARGS__)

◆ vwsubu_wx_u64m1_m

#define vwsubu_wx_u64m1_m ( ... ) __riscv_vwsubu_wx_u64m1_tumu(__VA_ARGS__)

◆ vwsubu_wx_u64m2

#define vwsubu_wx_u64m2 ( ... ) __riscv_vwsubu_wx_u64m2(__VA_ARGS__)

◆ vwsubu_wx_u64m2_m

#define vwsubu_wx_u64m2_m ( ... ) __riscv_vwsubu_wx_u64m2_tumu(__VA_ARGS__)

◆ vwsubu_wx_u64m4

#define vwsubu_wx_u64m4 ( ... ) __riscv_vwsubu_wx_u64m4(__VA_ARGS__)

◆ vwsubu_wx_u64m4_m

#define vwsubu_wx_u64m4_m ( ... ) __riscv_vwsubu_wx_u64m4_tumu(__VA_ARGS__)

◆ vwsubu_wx_u64m8

#define vwsubu_wx_u64m8 ( ... ) __riscv_vwsubu_wx_u64m8(__VA_ARGS__)

◆ vwsubu_wx_u64m8_m

#define vwsubu_wx_u64m8_m ( ... ) __riscv_vwsubu_wx_u64m8_tumu(__VA_ARGS__)

◆ vxor_vv_i16m1

#define vxor_vv_i16m1 ( ... ) __riscv_vxor_vv_i16m1(__VA_ARGS__)

◆ vxor_vv_i16m1_m

#define vxor_vv_i16m1_m ( ... ) __riscv_vxor_vv_i16m1_tumu(__VA_ARGS__)

◆ vxor_vv_i16m2

#define vxor_vv_i16m2 ( ... ) __riscv_vxor_vv_i16m2(__VA_ARGS__)

◆ vxor_vv_i16m2_m

#define vxor_vv_i16m2_m ( ... ) __riscv_vxor_vv_i16m2_tumu(__VA_ARGS__)

◆ vxor_vv_i16m4

#define vxor_vv_i16m4 ( ... ) __riscv_vxor_vv_i16m4(__VA_ARGS__)

◆ vxor_vv_i16m4_m

#define vxor_vv_i16m4_m ( ... ) __riscv_vxor_vv_i16m4_tumu(__VA_ARGS__)

◆ vxor_vv_i16m8

#define vxor_vv_i16m8 ( ... ) __riscv_vxor_vv_i16m8(__VA_ARGS__)

◆ vxor_vv_i16m8_m

#define vxor_vv_i16m8_m ( ... ) __riscv_vxor_vv_i16m8_tumu(__VA_ARGS__)

◆ vxor_vv_i16mf2

#define vxor_vv_i16mf2 ( ... ) __riscv_vxor_vv_i16mf2(__VA_ARGS__)

◆ vxor_vv_i16mf2_m

#define vxor_vv_i16mf2_m ( ... ) __riscv_vxor_vv_i16mf2_tumu(__VA_ARGS__)

◆ vxor_vv_i16mf4

#define vxor_vv_i16mf4 ( ... ) __riscv_vxor_vv_i16mf4(__VA_ARGS__)

◆ vxor_vv_i16mf4_m

#define vxor_vv_i16mf4_m ( ... ) __riscv_vxor_vv_i16mf4_tumu(__VA_ARGS__)

◆ vxor_vv_i32m1

#define vxor_vv_i32m1 ( ... ) __riscv_vxor_vv_i32m1(__VA_ARGS__)

◆ vxor_vv_i32m1_m

#define vxor_vv_i32m1_m ( ... ) __riscv_vxor_vv_i32m1_tumu(__VA_ARGS__)

◆ vxor_vv_i32m2

#define vxor_vv_i32m2 ( ... ) __riscv_vxor_vv_i32m2(__VA_ARGS__)

◆ vxor_vv_i32m2_m

#define vxor_vv_i32m2_m ( ... ) __riscv_vxor_vv_i32m2_tumu(__VA_ARGS__)

◆ vxor_vv_i32m4

#define vxor_vv_i32m4 ( ... ) __riscv_vxor_vv_i32m4(__VA_ARGS__)

◆ vxor_vv_i32m4_m

#define vxor_vv_i32m4_m ( ... ) __riscv_vxor_vv_i32m4_tumu(__VA_ARGS__)

◆ vxor_vv_i32m8

#define vxor_vv_i32m8 ( ... ) __riscv_vxor_vv_i32m8(__VA_ARGS__)

◆ vxor_vv_i32m8_m

#define vxor_vv_i32m8_m ( ... ) __riscv_vxor_vv_i32m8_tumu(__VA_ARGS__)

◆ vxor_vv_i32mf2

#define vxor_vv_i32mf2 ( ... ) __riscv_vxor_vv_i32mf2(__VA_ARGS__)

◆ vxor_vv_i32mf2_m

#define vxor_vv_i32mf2_m ( ... ) __riscv_vxor_vv_i32mf2_tumu(__VA_ARGS__)

◆ vxor_vv_i64m1

#define vxor_vv_i64m1 ( ... ) __riscv_vxor_vv_i64m1(__VA_ARGS__)

◆ vxor_vv_i64m1_m

#define vxor_vv_i64m1_m ( ... ) __riscv_vxor_vv_i64m1_tumu(__VA_ARGS__)

◆ vxor_vv_i64m2

#define vxor_vv_i64m2 ( ... ) __riscv_vxor_vv_i64m2(__VA_ARGS__)

◆ vxor_vv_i64m2_m

#define vxor_vv_i64m2_m ( ... ) __riscv_vxor_vv_i64m2_tumu(__VA_ARGS__)

◆ vxor_vv_i64m4

#define vxor_vv_i64m4 ( ... ) __riscv_vxor_vv_i64m4(__VA_ARGS__)

◆ vxor_vv_i64m4_m

#define vxor_vv_i64m4_m ( ... ) __riscv_vxor_vv_i64m4_tumu(__VA_ARGS__)

◆ vxor_vv_i64m8

#define vxor_vv_i64m8 ( ... ) __riscv_vxor_vv_i64m8(__VA_ARGS__)

◆ vxor_vv_i64m8_m

#define vxor_vv_i64m8_m ( ... ) __riscv_vxor_vv_i64m8_tumu(__VA_ARGS__)

◆ vxor_vv_i8m1

#define vxor_vv_i8m1 ( ... ) __riscv_vxor_vv_i8m1(__VA_ARGS__)

◆ vxor_vv_i8m1_m

#define vxor_vv_i8m1_m ( ... ) __riscv_vxor_vv_i8m1_tumu(__VA_ARGS__)

◆ vxor_vv_i8m2

#define vxor_vv_i8m2 ( ... ) __riscv_vxor_vv_i8m2(__VA_ARGS__)

◆ vxor_vv_i8m2_m

#define vxor_vv_i8m2_m ( ... ) __riscv_vxor_vv_i8m2_tumu(__VA_ARGS__)

◆ vxor_vv_i8m4

#define vxor_vv_i8m4 ( ... ) __riscv_vxor_vv_i8m4(__VA_ARGS__)

◆ vxor_vv_i8m4_m

#define vxor_vv_i8m4_m ( ... ) __riscv_vxor_vv_i8m4_tumu(__VA_ARGS__)

◆ vxor_vv_i8m8

#define vxor_vv_i8m8 ( ... ) __riscv_vxor_vv_i8m8(__VA_ARGS__)

◆ vxor_vv_i8m8_m

#define vxor_vv_i8m8_m ( ... ) __riscv_vxor_vv_i8m8_tumu(__VA_ARGS__)

◆ vxor_vv_i8mf2

#define vxor_vv_i8mf2 ( ... ) __riscv_vxor_vv_i8mf2(__VA_ARGS__)

◆ vxor_vv_i8mf2_m

#define vxor_vv_i8mf2_m ( ... ) __riscv_vxor_vv_i8mf2_tumu(__VA_ARGS__)

◆ vxor_vv_i8mf4

#define vxor_vv_i8mf4 ( ... ) __riscv_vxor_vv_i8mf4(__VA_ARGS__)

◆ vxor_vv_i8mf4_m

#define vxor_vv_i8mf4_m ( ... ) __riscv_vxor_vv_i8mf4_tumu(__VA_ARGS__)

◆ vxor_vv_i8mf8

#define vxor_vv_i8mf8 ( ... ) __riscv_vxor_vv_i8mf8(__VA_ARGS__)

◆ vxor_vv_i8mf8_m

#define vxor_vv_i8mf8_m ( ... ) __riscv_vxor_vv_i8mf8_tumu(__VA_ARGS__)

◆ vxor_vv_u16m1

#define vxor_vv_u16m1 ( ... ) __riscv_vxor_vv_u16m1(__VA_ARGS__)

◆ vxor_vv_u16m1_m

#define vxor_vv_u16m1_m ( ... ) __riscv_vxor_vv_u16m1_tumu(__VA_ARGS__)

◆ vxor_vv_u16m2

#define vxor_vv_u16m2 ( ... ) __riscv_vxor_vv_u16m2(__VA_ARGS__)

◆ vxor_vv_u16m2_m

#define vxor_vv_u16m2_m ( ... ) __riscv_vxor_vv_u16m2_tumu(__VA_ARGS__)

◆ vxor_vv_u16m4

#define vxor_vv_u16m4 ( ... ) __riscv_vxor_vv_u16m4(__VA_ARGS__)

◆ vxor_vv_u16m4_m

#define vxor_vv_u16m4_m ( ... ) __riscv_vxor_vv_u16m4_tumu(__VA_ARGS__)

◆ vxor_vv_u16m8

#define vxor_vv_u16m8 ( ... ) __riscv_vxor_vv_u16m8(__VA_ARGS__)

◆ vxor_vv_u16m8_m

#define vxor_vv_u16m8_m ( ... ) __riscv_vxor_vv_u16m8_tumu(__VA_ARGS__)

◆ vxor_vv_u16mf2

#define vxor_vv_u16mf2 ( ... ) __riscv_vxor_vv_u16mf2(__VA_ARGS__)

◆ vxor_vv_u16mf2_m

#define vxor_vv_u16mf2_m ( ... ) __riscv_vxor_vv_u16mf2_tumu(__VA_ARGS__)

◆ vxor_vv_u16mf4

#define vxor_vv_u16mf4 ( ... ) __riscv_vxor_vv_u16mf4(__VA_ARGS__)

◆ vxor_vv_u16mf4_m

#define vxor_vv_u16mf4_m ( ... ) __riscv_vxor_vv_u16mf4_tumu(__VA_ARGS__)

◆ vxor_vv_u32m1

#define vxor_vv_u32m1 ( ... ) __riscv_vxor_vv_u32m1(__VA_ARGS__)

◆ vxor_vv_u32m1_m

#define vxor_vv_u32m1_m ( ... ) __riscv_vxor_vv_u32m1_tumu(__VA_ARGS__)

◆ vxor_vv_u32m2

#define vxor_vv_u32m2 ( ... ) __riscv_vxor_vv_u32m2(__VA_ARGS__)

◆ vxor_vv_u32m2_m

#define vxor_vv_u32m2_m ( ... ) __riscv_vxor_vv_u32m2_tumu(__VA_ARGS__)

◆ vxor_vv_u32m4

#define vxor_vv_u32m4 ( ... ) __riscv_vxor_vv_u32m4(__VA_ARGS__)

◆ vxor_vv_u32m4_m

#define vxor_vv_u32m4_m ( ... ) __riscv_vxor_vv_u32m4_tumu(__VA_ARGS__)

◆ vxor_vv_u32m8

#define vxor_vv_u32m8 ( ... ) __riscv_vxor_vv_u32m8(__VA_ARGS__)

◆ vxor_vv_u32m8_m

#define vxor_vv_u32m8_m ( ... ) __riscv_vxor_vv_u32m8_tumu(__VA_ARGS__)

◆ vxor_vv_u32mf2

#define vxor_vv_u32mf2 ( ... ) __riscv_vxor_vv_u32mf2(__VA_ARGS__)

◆ vxor_vv_u32mf2_m

#define vxor_vv_u32mf2_m ( ... ) __riscv_vxor_vv_u32mf2_tumu(__VA_ARGS__)

◆ vxor_vv_u64m1

#define vxor_vv_u64m1 ( ... ) __riscv_vxor_vv_u64m1(__VA_ARGS__)

◆ vxor_vv_u64m1_m

#define vxor_vv_u64m1_m ( ... ) __riscv_vxor_vv_u64m1_tumu(__VA_ARGS__)

◆ vxor_vv_u64m2

#define vxor_vv_u64m2 ( ... ) __riscv_vxor_vv_u64m2(__VA_ARGS__)

◆ vxor_vv_u64m2_m

#define vxor_vv_u64m2_m ( ... ) __riscv_vxor_vv_u64m2_tumu(__VA_ARGS__)

◆ vxor_vv_u64m4

#define vxor_vv_u64m4 ( ... ) __riscv_vxor_vv_u64m4(__VA_ARGS__)

◆ vxor_vv_u64m4_m

#define vxor_vv_u64m4_m ( ... ) __riscv_vxor_vv_u64m4_tumu(__VA_ARGS__)

◆ vxor_vv_u64m8

#define vxor_vv_u64m8 ( ... ) __riscv_vxor_vv_u64m8(__VA_ARGS__)

◆ vxor_vv_u64m8_m

#define vxor_vv_u64m8_m ( ... ) __riscv_vxor_vv_u64m8_tumu(__VA_ARGS__)

◆ vxor_vv_u8m1

#define vxor_vv_u8m1 ( ... ) __riscv_vxor_vv_u8m1(__VA_ARGS__)

◆ vxor_vv_u8m1_m

#define vxor_vv_u8m1_m ( ... ) __riscv_vxor_vv_u8m1_tumu(__VA_ARGS__)

◆ vxor_vv_u8m2

#define vxor_vv_u8m2 ( ... ) __riscv_vxor_vv_u8m2(__VA_ARGS__)

◆ vxor_vv_u8m2_m

#define vxor_vv_u8m2_m ( ... ) __riscv_vxor_vv_u8m2_tumu(__VA_ARGS__)

◆ vxor_vv_u8m4

#define vxor_vv_u8m4 ( ... ) __riscv_vxor_vv_u8m4(__VA_ARGS__)

◆ vxor_vv_u8m4_m

#define vxor_vv_u8m4_m ( ... ) __riscv_vxor_vv_u8m4_tumu(__VA_ARGS__)

◆ vxor_vv_u8m8

#define vxor_vv_u8m8 ( ... ) __riscv_vxor_vv_u8m8(__VA_ARGS__)

◆ vxor_vv_u8m8_m

#define vxor_vv_u8m8_m ( ... ) __riscv_vxor_vv_u8m8_tumu(__VA_ARGS__)

◆ vxor_vv_u8mf2

#define vxor_vv_u8mf2 ( ... ) __riscv_vxor_vv_u8mf2(__VA_ARGS__)

◆ vxor_vv_u8mf2_m

#define vxor_vv_u8mf2_m ( ... ) __riscv_vxor_vv_u8mf2_tumu(__VA_ARGS__)

◆ vxor_vv_u8mf4

#define vxor_vv_u8mf4 ( ... ) __riscv_vxor_vv_u8mf4(__VA_ARGS__)

◆ vxor_vv_u8mf4_m

#define vxor_vv_u8mf4_m ( ... ) __riscv_vxor_vv_u8mf4_tumu(__VA_ARGS__)

◆ vxor_vv_u8mf8

#define vxor_vv_u8mf8 ( ... ) __riscv_vxor_vv_u8mf8(__VA_ARGS__)

◆ vxor_vv_u8mf8_m

#define vxor_vv_u8mf8_m ( ... ) __riscv_vxor_vv_u8mf8_tumu(__VA_ARGS__)

◆ vxor_vx_i16m1

#define vxor_vx_i16m1 ( ... ) __riscv_vxor_vx_i16m1(__VA_ARGS__)

◆ vxor_vx_i16m1_m

#define vxor_vx_i16m1_m ( ... ) __riscv_vxor_vx_i16m1_tumu(__VA_ARGS__)

◆ vxor_vx_i16m2

#define vxor_vx_i16m2 ( ... ) __riscv_vxor_vx_i16m2(__VA_ARGS__)

◆ vxor_vx_i16m2_m

#define vxor_vx_i16m2_m ( ... ) __riscv_vxor_vx_i16m2_tumu(__VA_ARGS__)

◆ vxor_vx_i16m4

#define vxor_vx_i16m4 ( ... ) __riscv_vxor_vx_i16m4(__VA_ARGS__)

◆ vxor_vx_i16m4_m

#define vxor_vx_i16m4_m ( ... ) __riscv_vxor_vx_i16m4_tumu(__VA_ARGS__)

◆ vxor_vx_i16m8

#define vxor_vx_i16m8 ( ... ) __riscv_vxor_vx_i16m8(__VA_ARGS__)

◆ vxor_vx_i16m8_m

#define vxor_vx_i16m8_m ( ... ) __riscv_vxor_vx_i16m8_tumu(__VA_ARGS__)

◆ vxor_vx_i16mf2

#define vxor_vx_i16mf2 ( ... ) __riscv_vxor_vx_i16mf2(__VA_ARGS__)

◆ vxor_vx_i16mf2_m

#define vxor_vx_i16mf2_m ( ... ) __riscv_vxor_vx_i16mf2_tumu(__VA_ARGS__)

◆ vxor_vx_i16mf4

#define vxor_vx_i16mf4 ( ... ) __riscv_vxor_vx_i16mf4(__VA_ARGS__)

◆ vxor_vx_i16mf4_m

#define vxor_vx_i16mf4_m ( ... ) __riscv_vxor_vx_i16mf4_tumu(__VA_ARGS__)

◆ vxor_vx_i32m1

#define vxor_vx_i32m1 ( ... ) __riscv_vxor_vx_i32m1(__VA_ARGS__)

◆ vxor_vx_i32m1_m

#define vxor_vx_i32m1_m ( ... ) __riscv_vxor_vx_i32m1_tumu(__VA_ARGS__)

◆ vxor_vx_i32m2

#define vxor_vx_i32m2 ( ... ) __riscv_vxor_vx_i32m2(__VA_ARGS__)

◆ vxor_vx_i32m2_m

#define vxor_vx_i32m2_m ( ... ) __riscv_vxor_vx_i32m2_tumu(__VA_ARGS__)

◆ vxor_vx_i32m4

#define vxor_vx_i32m4 ( ... ) __riscv_vxor_vx_i32m4(__VA_ARGS__)

◆ vxor_vx_i32m4_m

#define vxor_vx_i32m4_m ( ... ) __riscv_vxor_vx_i32m4_tumu(__VA_ARGS__)

◆ vxor_vx_i32m8

#define vxor_vx_i32m8 ( ... ) __riscv_vxor_vx_i32m8(__VA_ARGS__)

◆ vxor_vx_i32m8_m

#define vxor_vx_i32m8_m ( ... ) __riscv_vxor_vx_i32m8_tumu(__VA_ARGS__)

◆ vxor_vx_i32mf2

#define vxor_vx_i32mf2 ( ... ) __riscv_vxor_vx_i32mf2(__VA_ARGS__)

◆ vxor_vx_i32mf2_m

#define vxor_vx_i32mf2_m ( ... ) __riscv_vxor_vx_i32mf2_tumu(__VA_ARGS__)

◆ vxor_vx_i64m1

#define vxor_vx_i64m1 ( ... ) __riscv_vxor_vx_i64m1(__VA_ARGS__)

◆ vxor_vx_i64m1_m

#define vxor_vx_i64m1_m ( ... ) __riscv_vxor_vx_i64m1_tumu(__VA_ARGS__)

◆ vxor_vx_i64m2

#define vxor_vx_i64m2 ( ... ) __riscv_vxor_vx_i64m2(__VA_ARGS__)

◆ vxor_vx_i64m2_m

#define vxor_vx_i64m2_m ( ... ) __riscv_vxor_vx_i64m2_tumu(__VA_ARGS__)

◆ vxor_vx_i64m4

#define vxor_vx_i64m4 ( ... ) __riscv_vxor_vx_i64m4(__VA_ARGS__)

◆ vxor_vx_i64m4_m

#define vxor_vx_i64m4_m ( ... ) __riscv_vxor_vx_i64m4_tumu(__VA_ARGS__)

◆ vxor_vx_i64m8

#define vxor_vx_i64m8 ( ... ) __riscv_vxor_vx_i64m8(__VA_ARGS__)

◆ vxor_vx_i64m8_m

#define vxor_vx_i64m8_m ( ... ) __riscv_vxor_vx_i64m8_tumu(__VA_ARGS__)

◆ vxor_vx_i8m1

#define vxor_vx_i8m1 ( ... ) __riscv_vxor_vx_i8m1(__VA_ARGS__)

◆ vxor_vx_i8m1_m

#define vxor_vx_i8m1_m ( ... ) __riscv_vxor_vx_i8m1_tumu(__VA_ARGS__)

◆ vxor_vx_i8m2

#define vxor_vx_i8m2 ( ... ) __riscv_vxor_vx_i8m2(__VA_ARGS__)

◆ vxor_vx_i8m2_m

#define vxor_vx_i8m2_m ( ... ) __riscv_vxor_vx_i8m2_tumu(__VA_ARGS__)

◆ vxor_vx_i8m4

#define vxor_vx_i8m4 ( ... ) __riscv_vxor_vx_i8m4(__VA_ARGS__)

◆ vxor_vx_i8m4_m

#define vxor_vx_i8m4_m ( ... ) __riscv_vxor_vx_i8m4_tumu(__VA_ARGS__)

◆ vxor_vx_i8m8

#define vxor_vx_i8m8 ( ... ) __riscv_vxor_vx_i8m8(__VA_ARGS__)

◆ vxor_vx_i8m8_m

#define vxor_vx_i8m8_m ( ... ) __riscv_vxor_vx_i8m8_tumu(__VA_ARGS__)

◆ vxor_vx_i8mf2

#define vxor_vx_i8mf2 ( ... ) __riscv_vxor_vx_i8mf2(__VA_ARGS__)

◆ vxor_vx_i8mf2_m

#define vxor_vx_i8mf2_m ( ... ) __riscv_vxor_vx_i8mf2_tumu(__VA_ARGS__)

◆ vxor_vx_i8mf4

#define vxor_vx_i8mf4 ( ... ) __riscv_vxor_vx_i8mf4(__VA_ARGS__)

◆ vxor_vx_i8mf4_m

#define vxor_vx_i8mf4_m ( ... ) __riscv_vxor_vx_i8mf4_tumu(__VA_ARGS__)

◆ vxor_vx_i8mf8

#define vxor_vx_i8mf8 ( ... ) __riscv_vxor_vx_i8mf8(__VA_ARGS__)

◆ vxor_vx_i8mf8_m

#define vxor_vx_i8mf8_m ( ... ) __riscv_vxor_vx_i8mf8_tumu(__VA_ARGS__)

◆ vxor_vx_u16m1

#define vxor_vx_u16m1 ( ... ) __riscv_vxor_vx_u16m1(__VA_ARGS__)

◆ vxor_vx_u16m1_m

#define vxor_vx_u16m1_m ( ... ) __riscv_vxor_vx_u16m1_tumu(__VA_ARGS__)

◆ vxor_vx_u16m2

#define vxor_vx_u16m2 ( ... ) __riscv_vxor_vx_u16m2(__VA_ARGS__)

◆ vxor_vx_u16m2_m

#define vxor_vx_u16m2_m ( ... ) __riscv_vxor_vx_u16m2_tumu(__VA_ARGS__)

◆ vxor_vx_u16m4

#define vxor_vx_u16m4 ( ... ) __riscv_vxor_vx_u16m4(__VA_ARGS__)

◆ vxor_vx_u16m4_m

#define vxor_vx_u16m4_m ( ... ) __riscv_vxor_vx_u16m4_tumu(__VA_ARGS__)

◆ vxor_vx_u16m8

#define vxor_vx_u16m8 ( ... ) __riscv_vxor_vx_u16m8(__VA_ARGS__)

◆ vxor_vx_u16m8_m

#define vxor_vx_u16m8_m ( ... ) __riscv_vxor_vx_u16m8_tumu(__VA_ARGS__)

◆ vxor_vx_u16mf2

#define vxor_vx_u16mf2 ( ... ) __riscv_vxor_vx_u16mf2(__VA_ARGS__)

◆ vxor_vx_u16mf2_m

#define vxor_vx_u16mf2_m ( ... ) __riscv_vxor_vx_u16mf2_tumu(__VA_ARGS__)

◆ vxor_vx_u16mf4

#define vxor_vx_u16mf4 ( ... ) __riscv_vxor_vx_u16mf4(__VA_ARGS__)

◆ vxor_vx_u16mf4_m

#define vxor_vx_u16mf4_m ( ... ) __riscv_vxor_vx_u16mf4_tumu(__VA_ARGS__)

◆ vxor_vx_u32m1

#define vxor_vx_u32m1 ( ... ) __riscv_vxor_vx_u32m1(__VA_ARGS__)

◆ vxor_vx_u32m1_m

#define vxor_vx_u32m1_m ( ... ) __riscv_vxor_vx_u32m1_tumu(__VA_ARGS__)

◆ vxor_vx_u32m2

#define vxor_vx_u32m2 ( ... ) __riscv_vxor_vx_u32m2(__VA_ARGS__)

◆ vxor_vx_u32m2_m

#define vxor_vx_u32m2_m ( ... ) __riscv_vxor_vx_u32m2_tumu(__VA_ARGS__)

◆ vxor_vx_u32m4

#define vxor_vx_u32m4 ( ... ) __riscv_vxor_vx_u32m4(__VA_ARGS__)

◆ vxor_vx_u32m4_m

#define vxor_vx_u32m4_m ( ... ) __riscv_vxor_vx_u32m4_tumu(__VA_ARGS__)

◆ vxor_vx_u32m8

#define vxor_vx_u32m8 ( ... ) __riscv_vxor_vx_u32m8(__VA_ARGS__)

◆ vxor_vx_u32m8_m

#define vxor_vx_u32m8_m ( ... ) __riscv_vxor_vx_u32m8_tumu(__VA_ARGS__)

◆ vxor_vx_u32mf2

#define vxor_vx_u32mf2 ( ... ) __riscv_vxor_vx_u32mf2(__VA_ARGS__)

◆ vxor_vx_u32mf2_m

#define vxor_vx_u32mf2_m ( ... ) __riscv_vxor_vx_u32mf2_tumu(__VA_ARGS__)

◆ vxor_vx_u64m1

#define vxor_vx_u64m1 ( ... ) __riscv_vxor_vx_u64m1(__VA_ARGS__)

◆ vxor_vx_u64m1_m

#define vxor_vx_u64m1_m ( ... ) __riscv_vxor_vx_u64m1_tumu(__VA_ARGS__)

◆ vxor_vx_u64m2

#define vxor_vx_u64m2 ( ... ) __riscv_vxor_vx_u64m2(__VA_ARGS__)

◆ vxor_vx_u64m2_m

#define vxor_vx_u64m2_m ( ... ) __riscv_vxor_vx_u64m2_tumu(__VA_ARGS__)

◆ vxor_vx_u64m4

#define vxor_vx_u64m4 ( ... ) __riscv_vxor_vx_u64m4(__VA_ARGS__)

◆ vxor_vx_u64m4_m

#define vxor_vx_u64m4_m ( ... ) __riscv_vxor_vx_u64m4_tumu(__VA_ARGS__)

◆ vxor_vx_u64m8

#define vxor_vx_u64m8 ( ... ) __riscv_vxor_vx_u64m8(__VA_ARGS__)

◆ vxor_vx_u64m8_m

#define vxor_vx_u64m8_m ( ... ) __riscv_vxor_vx_u64m8_tumu(__VA_ARGS__)

◆ vxor_vx_u8m1

#define vxor_vx_u8m1 ( ... ) __riscv_vxor_vx_u8m1(__VA_ARGS__)

◆ vxor_vx_u8m1_m

#define vxor_vx_u8m1_m ( ... ) __riscv_vxor_vx_u8m1_tumu(__VA_ARGS__)

◆ vxor_vx_u8m2

#define vxor_vx_u8m2 ( ... ) __riscv_vxor_vx_u8m2(__VA_ARGS__)

◆ vxor_vx_u8m2_m

#define vxor_vx_u8m2_m ( ... ) __riscv_vxor_vx_u8m2_tumu(__VA_ARGS__)

◆ vxor_vx_u8m4

#define vxor_vx_u8m4 ( ... ) __riscv_vxor_vx_u8m4(__VA_ARGS__)

◆ vxor_vx_u8m4_m

#define vxor_vx_u8m4_m ( ... ) __riscv_vxor_vx_u8m4_tumu(__VA_ARGS__)

◆ vxor_vx_u8m8

#define vxor_vx_u8m8 ( ... ) __riscv_vxor_vx_u8m8(__VA_ARGS__)

◆ vxor_vx_u8m8_m

#define vxor_vx_u8m8_m ( ... ) __riscv_vxor_vx_u8m8_tumu(__VA_ARGS__)

◆ vxor_vx_u8mf2

#define vxor_vx_u8mf2 ( ... ) __riscv_vxor_vx_u8mf2(__VA_ARGS__)

◆ vxor_vx_u8mf2_m

#define vxor_vx_u8mf2_m ( ... ) __riscv_vxor_vx_u8mf2_tumu(__VA_ARGS__)

◆ vxor_vx_u8mf4

#define vxor_vx_u8mf4 ( ... ) __riscv_vxor_vx_u8mf4(__VA_ARGS__)

◆ vxor_vx_u8mf4_m

#define vxor_vx_u8mf4_m ( ... ) __riscv_vxor_vx_u8mf4_tumu(__VA_ARGS__)

◆ vxor_vx_u8mf8

#define vxor_vx_u8mf8 ( ... ) __riscv_vxor_vx_u8mf8(__VA_ARGS__)

◆ vxor_vx_u8mf8_m

#define vxor_vx_u8mf8_m ( ... ) __riscv_vxor_vx_u8mf8_tumu(__VA_ARGS__)

◆ vzext_vf2_u16m1

#define vzext_vf2_u16m1 ( ... ) __riscv_vzext_vf2_u16m1(__VA_ARGS__)

◆ vzext_vf2_u16m1_m

#define vzext_vf2_u16m1_m ( ... ) __riscv_vzext_vf2_u16m1_tumu(__VA_ARGS__)

◆ vzext_vf2_u16m2

#define vzext_vf2_u16m2 ( ... ) __riscv_vzext_vf2_u16m2(__VA_ARGS__)

◆ vzext_vf2_u16m2_m

#define vzext_vf2_u16m2_m ( ... ) __riscv_vzext_vf2_u16m2_tumu(__VA_ARGS__)

◆ vzext_vf2_u16m4

#define vzext_vf2_u16m4 ( ... ) __riscv_vzext_vf2_u16m4(__VA_ARGS__)

◆ vzext_vf2_u16m4_m

#define vzext_vf2_u16m4_m ( ... ) __riscv_vzext_vf2_u16m4_tumu(__VA_ARGS__)

◆ vzext_vf2_u16m8

#define vzext_vf2_u16m8 ( ... ) __riscv_vzext_vf2_u16m8(__VA_ARGS__)

◆ vzext_vf2_u16m8_m

#define vzext_vf2_u16m8_m ( ... ) __riscv_vzext_vf2_u16m8_tumu(__VA_ARGS__)

◆ vzext_vf2_u16mf2

#define vzext_vf2_u16mf2 ( ... ) __riscv_vzext_vf2_u16mf2(__VA_ARGS__)

◆ vzext_vf2_u16mf2_m

#define vzext_vf2_u16mf2_m ( ... ) __riscv_vzext_vf2_u16mf2_tumu(__VA_ARGS__)

◆ vzext_vf2_u16mf4

#define vzext_vf2_u16mf4 ( ... ) __riscv_vzext_vf2_u16mf4(__VA_ARGS__)

◆ vzext_vf2_u16mf4_m

#define vzext_vf2_u16mf4_m ( ... ) __riscv_vzext_vf2_u16mf4_tumu(__VA_ARGS__)

◆ vzext_vf2_u32m1

#define vzext_vf2_u32m1 ( ... ) __riscv_vzext_vf2_u32m1(__VA_ARGS__)

◆ vzext_vf2_u32m1_m

#define vzext_vf2_u32m1_m ( ... ) __riscv_vzext_vf2_u32m1_tumu(__VA_ARGS__)

◆ vzext_vf2_u32m2

#define vzext_vf2_u32m2 ( ... ) __riscv_vzext_vf2_u32m2(__VA_ARGS__)

◆ vzext_vf2_u32m2_m

#define vzext_vf2_u32m2_m ( ... ) __riscv_vzext_vf2_u32m2_tumu(__VA_ARGS__)

◆ vzext_vf2_u32m4

#define vzext_vf2_u32m4 ( ... ) __riscv_vzext_vf2_u32m4(__VA_ARGS__)

◆ vzext_vf2_u32m4_m

#define vzext_vf2_u32m4_m ( ... ) __riscv_vzext_vf2_u32m4_tumu(__VA_ARGS__)

◆ vzext_vf2_u32m8

#define vzext_vf2_u32m8 ( ... ) __riscv_vzext_vf2_u32m8(__VA_ARGS__)

◆ vzext_vf2_u32m8_m

#define vzext_vf2_u32m8_m ( ... ) __riscv_vzext_vf2_u32m8_tumu(__VA_ARGS__)

◆ vzext_vf2_u32mf2

#define vzext_vf2_u32mf2 ( ... ) __riscv_vzext_vf2_u32mf2(__VA_ARGS__)

◆ vzext_vf2_u32mf2_m

#define vzext_vf2_u32mf2_m ( ... ) __riscv_vzext_vf2_u32mf2_tumu(__VA_ARGS__)

◆ vzext_vf2_u64m1

#define vzext_vf2_u64m1 ( ... ) __riscv_vzext_vf2_u64m1(__VA_ARGS__)

◆ vzext_vf2_u64m1_m

#define vzext_vf2_u64m1_m ( ... ) __riscv_vzext_vf2_u64m1_tumu(__VA_ARGS__)

◆ vzext_vf2_u64m2

#define vzext_vf2_u64m2 ( ... ) __riscv_vzext_vf2_u64m2(__VA_ARGS__)

◆ vzext_vf2_u64m2_m

#define vzext_vf2_u64m2_m ( ... ) __riscv_vzext_vf2_u64m2_tumu(__VA_ARGS__)

◆ vzext_vf2_u64m4

#define vzext_vf2_u64m4 ( ... ) __riscv_vzext_vf2_u64m4(__VA_ARGS__)

◆ vzext_vf2_u64m4_m

#define vzext_vf2_u64m4_m ( ... ) __riscv_vzext_vf2_u64m4_tumu(__VA_ARGS__)

◆ vzext_vf2_u64m8

#define vzext_vf2_u64m8 ( ... ) __riscv_vzext_vf2_u64m8(__VA_ARGS__)

◆ vzext_vf2_u64m8_m

#define vzext_vf2_u64m8_m ( ... ) __riscv_vzext_vf2_u64m8_tumu(__VA_ARGS__)

◆ vzext_vf4_u32m1

#define vzext_vf4_u32m1 ( ... ) __riscv_vzext_vf4_u32m1(__VA_ARGS__)

◆ vzext_vf4_u32m1_m

#define vzext_vf4_u32m1_m ( ... ) __riscv_vzext_vf4_u32m1_tumu(__VA_ARGS__)

◆ vzext_vf4_u32m2

#define vzext_vf4_u32m2 ( ... ) __riscv_vzext_vf4_u32m2(__VA_ARGS__)

◆ vzext_vf4_u32m2_m

#define vzext_vf4_u32m2_m ( ... ) __riscv_vzext_vf4_u32m2_tumu(__VA_ARGS__)

◆ vzext_vf4_u32m4

#define vzext_vf4_u32m4 ( ... ) __riscv_vzext_vf4_u32m4(__VA_ARGS__)

◆ vzext_vf4_u32m4_m

#define vzext_vf4_u32m4_m ( ... ) __riscv_vzext_vf4_u32m4_tumu(__VA_ARGS__)

◆ vzext_vf4_u32m8

#define vzext_vf4_u32m8 ( ... ) __riscv_vzext_vf4_u32m8(__VA_ARGS__)

◆ vzext_vf4_u32m8_m

#define vzext_vf4_u32m8_m ( ... ) __riscv_vzext_vf4_u32m8_tumu(__VA_ARGS__)

◆ vzext_vf4_u32mf2

#define vzext_vf4_u32mf2 ( ... ) __riscv_vzext_vf4_u32mf2(__VA_ARGS__)

◆ vzext_vf4_u32mf2_m

#define vzext_vf4_u32mf2_m ( ... ) __riscv_vzext_vf4_u32mf2_tumu(__VA_ARGS__)

◆ vzext_vf4_u64m1

#define vzext_vf4_u64m1 ( ... ) __riscv_vzext_vf4_u64m1(__VA_ARGS__)

◆ vzext_vf4_u64m1_m

#define vzext_vf4_u64m1_m ( ... ) __riscv_vzext_vf4_u64m1_tumu(__VA_ARGS__)

◆ vzext_vf4_u64m2

#define vzext_vf4_u64m2 ( ... ) __riscv_vzext_vf4_u64m2(__VA_ARGS__)

◆ vzext_vf4_u64m2_m

#define vzext_vf4_u64m2_m ( ... ) __riscv_vzext_vf4_u64m2_tumu(__VA_ARGS__)

◆ vzext_vf4_u64m4

#define vzext_vf4_u64m4 ( ... ) __riscv_vzext_vf4_u64m4(__VA_ARGS__)

◆ vzext_vf4_u64m4_m

#define vzext_vf4_u64m4_m ( ... ) __riscv_vzext_vf4_u64m4_tumu(__VA_ARGS__)

◆ vzext_vf4_u64m8

#define vzext_vf4_u64m8 ( ... ) __riscv_vzext_vf4_u64m8(__VA_ARGS__)

◆ vzext_vf4_u64m8_m

#define vzext_vf4_u64m8_m ( ... ) __riscv_vzext_vf4_u64m8_tumu(__VA_ARGS__)

◆ vzext_vf8_u64m1

#define vzext_vf8_u64m1 ( ... ) __riscv_vzext_vf8_u64m1(__VA_ARGS__)

◆ vzext_vf8_u64m1_m

#define vzext_vf8_u64m1_m ( ... ) __riscv_vzext_vf8_u64m1_tumu(__VA_ARGS__)

◆ vzext_vf8_u64m2

#define vzext_vf8_u64m2 ( ... ) __riscv_vzext_vf8_u64m2(__VA_ARGS__)

◆ vzext_vf8_u64m2_m

#define vzext_vf8_u64m2_m ( ... ) __riscv_vzext_vf8_u64m2_tumu(__VA_ARGS__)

◆ vzext_vf8_u64m4

#define vzext_vf8_u64m4 ( ... ) __riscv_vzext_vf8_u64m4(__VA_ARGS__)

◆ vzext_vf8_u64m4_m

#define vzext_vf8_u64m4_m ( ... ) __riscv_vzext_vf8_u64m4_tumu(__VA_ARGS__)

◆ vzext_vf8_u64m8

#define vzext_vf8_u64m8 ( ... ) __riscv_vzext_vf8_u64m8(__VA_ARGS__)

◆ vzext_vf8_u64m8_m

#define vzext_vf8_u64m8_m ( ... ) __riscv_vzext_vf8_u64m8_tumu(__VA_ARGS__)

Macros